1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 6 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 7 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 8 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK5 11 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 12 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 13 14 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 16 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK9 19 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 21 22 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 24 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 25 26 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK13 27 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 29 30 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 31 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 32 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 33 34 // expected-no-diagnostics 35 #ifndef HEADER 36 #define HEADER 37 38 typedef __INTPTR_TYPE__ intptr_t; 39 40 41 void foo(); 42 43 struct S { 44 intptr_t a, b, c; 45 S(intptr_t a) : a(a) {} 46 operator char() { extern void mayThrow(); mayThrow(); return a; } 47 ~S() {} 48 }; 49 50 template <typename T, int C> 51 int tmain() { 52 #pragma omp target 53 #pragma omp teams 54 #pragma omp distribute parallel for num_threads(C) 55 for (int i = 0; i < 100; i++) 56 foo(); 57 #pragma omp target 58 #pragma omp teams 59 #pragma omp distribute parallel for num_threads(T(23)) 60 for (int i = 0; i < 100; i++) 61 foo(); 62 return 0; 63 } 64 65 int main() { 66 S s(0); 67 char a = s; 68 #pragma omp target 69 #pragma omp teams 70 #pragma omp distribute parallel for num_threads(2) 71 for (int i = 0; i < 100; i++) { 72 foo(); 73 } 74 #pragma omp target 75 #pragma omp teams 76 77 #pragma omp distribute parallel for num_threads(a) 78 for (int i = 0; i < 100; i++) { 79 foo(); 80 } 81 return a + tmain<char, 5>() + tmain<S, 1>(); 82 } 83 84 // tmain 5 85 86 // tmain 1 87 88 89 90 91 92 93 94 95 #endif 96 // CHECK1-LABEL: define {{[^@]+}}@main 97 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 98 // CHECK1-NEXT: entry: 99 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 100 // CHECK1-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 101 // CHECK1-NEXT: [[A:%.*]] = alloca i8, align 1 102 // CHECK1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 103 // CHECK1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 104 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 105 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 106 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 107 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 108 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 109 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 110 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 111 // CHECK1-NEXT: call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0) 112 // CHECK1-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) 113 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 114 // CHECK1: invoke.cont: 115 // CHECK1-NEXT: store i8 [[CALL]], i8* [[A]], align 1 116 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 117 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 118 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 119 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 120 // CHECK1: omp_offload.failed: 121 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 122 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 123 // CHECK1: lpad: 124 // CHECK1-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 125 // CHECK1-NEXT: cleanup 126 // CHECK1-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 127 // CHECK1-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 128 // CHECK1-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 129 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 130 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 131 // CHECK1-NEXT: br label [[EH_RESUME:%.*]] 132 // CHECK1: omp_offload.cont: 133 // CHECK1-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 134 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 135 // CHECK1-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 136 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 137 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 138 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 139 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 140 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 141 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 142 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 143 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 144 // CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8 145 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 146 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 147 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 148 // CHECK1-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 149 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 150 // CHECK1-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 151 // CHECK1: omp_offload.failed2: 152 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 153 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 154 // CHECK1: omp_offload.cont3: 155 // CHECK1-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 156 // CHECK1-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 157 // CHECK1-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 158 // CHECK1-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 159 // CHECK1: invoke.cont5: 160 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 161 // CHECK1-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 162 // CHECK1-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 163 // CHECK1: invoke.cont7: 164 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 165 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 166 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 167 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 168 // CHECK1-NEXT: ret i32 [[TMP17]] 169 // CHECK1: eh.resume: 170 // CHECK1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 171 // CHECK1-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 172 // CHECK1-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 173 // CHECK1-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 174 // CHECK1-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 175 // 176 // 177 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1El 178 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 179 // CHECK1-NEXT: entry: 180 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 181 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 182 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 183 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 184 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 185 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 186 // CHECK1-NEXT: call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 187 // CHECK1-NEXT: ret void 188 // 189 // 190 // CHECK1-LABEL: define {{[^@]+}}@_ZN1ScvcEv 191 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 192 // CHECK1-NEXT: entry: 193 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 194 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 195 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 196 // CHECK1-NEXT: call void @_Z8mayThrowv() 197 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 198 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 199 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 200 // CHECK1-NEXT: ret i8 [[CONV]] 201 // 202 // 203 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 204 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 205 // CHECK1-NEXT: entry: 206 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 207 // CHECK1-NEXT: ret void 208 // 209 // 210 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 211 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 212 // CHECK1-NEXT: entry: 213 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 214 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 215 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 216 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 217 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 218 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 219 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 220 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 221 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 222 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 223 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 224 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 225 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 226 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 227 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 228 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 229 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 230 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 231 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 232 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 233 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 234 // CHECK1: cond.true: 235 // CHECK1-NEXT: br label [[COND_END:%.*]] 236 // CHECK1: cond.false: 237 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 238 // CHECK1-NEXT: br label [[COND_END]] 239 // CHECK1: cond.end: 240 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 241 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 242 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 243 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 244 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 245 // CHECK1: omp.inner.for.cond: 246 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 247 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 248 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 249 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 250 // CHECK1: omp.inner.for.body: 251 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 252 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 253 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 254 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 255 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 256 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 257 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 258 // CHECK1: omp.inner.for.inc: 259 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 260 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 261 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 262 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 263 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 264 // CHECK1: omp.inner.for.end: 265 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 266 // CHECK1: omp.loop.exit: 267 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 268 // CHECK1-NEXT: ret void 269 // 270 // 271 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 272 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 273 // CHECK1-NEXT: entry: 274 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 275 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 276 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 277 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 278 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 279 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 280 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 281 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 282 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 283 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 284 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 285 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 286 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 287 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 288 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 289 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 290 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 291 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 292 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 293 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 294 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 295 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 296 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 297 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 298 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 299 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 300 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 301 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 302 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 303 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 304 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 305 // CHECK1: cond.true: 306 // CHECK1-NEXT: br label [[COND_END:%.*]] 307 // CHECK1: cond.false: 308 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 309 // CHECK1-NEXT: br label [[COND_END]] 310 // CHECK1: cond.end: 311 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 312 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 313 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 314 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 315 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 316 // CHECK1: omp.inner.for.cond: 317 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 318 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 319 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 320 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 321 // CHECK1: omp.inner.for.body: 322 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 323 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 324 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 325 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 326 // CHECK1-NEXT: invoke void @_Z3foov() 327 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 328 // CHECK1: invoke.cont: 329 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 330 // CHECK1: omp.body.continue: 331 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 332 // CHECK1: omp.inner.for.inc: 333 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 334 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 335 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 336 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 337 // CHECK1: omp.inner.for.end: 338 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 339 // CHECK1: omp.loop.exit: 340 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 341 // CHECK1-NEXT: ret void 342 // CHECK1: terminate.lpad: 343 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 344 // CHECK1-NEXT: catch i8* null 345 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 346 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 347 // CHECK1-NEXT: unreachable 348 // 349 // 350 // CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate 351 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 352 // CHECK1-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 353 // CHECK1-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 354 // CHECK1-NEXT: unreachable 355 // 356 // 357 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 358 // CHECK1-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 359 // CHECK1-NEXT: entry: 360 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 361 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 362 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 363 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 364 // CHECK1-NEXT: ret void 365 // 366 // 367 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 368 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 369 // CHECK1-NEXT: entry: 370 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 371 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 372 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 373 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 374 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 375 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 376 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 377 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 378 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 379 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 380 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 381 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 382 // CHECK1-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 383 // CHECK1-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 384 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 385 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 386 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 387 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 388 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 389 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 390 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 391 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 392 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 393 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 394 // CHECK1: cond.true: 395 // CHECK1-NEXT: br label [[COND_END:%.*]] 396 // CHECK1: cond.false: 397 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 398 // CHECK1-NEXT: br label [[COND_END]] 399 // CHECK1: cond.end: 400 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 401 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 402 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 403 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 404 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 405 // CHECK1: omp.inner.for.cond: 406 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 407 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 408 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 409 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 410 // CHECK1: omp.inner.for.body: 411 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 412 // CHECK1-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 413 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 414 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 415 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 416 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 417 // CHECK1-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 418 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 419 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 420 // CHECK1: omp.inner.for.inc: 421 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 422 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 423 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 424 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 425 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 426 // CHECK1: omp.inner.for.end: 427 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 428 // CHECK1: omp.loop.exit: 429 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 430 // CHECK1-NEXT: ret void 431 // 432 // 433 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 434 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 435 // CHECK1-NEXT: entry: 436 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 437 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 438 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 439 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 440 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 441 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 442 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 443 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 444 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 445 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 446 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 447 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 448 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 449 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 450 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 451 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 452 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 453 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 454 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 455 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 456 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 457 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 458 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 459 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 460 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 461 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 462 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 463 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 464 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 465 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 466 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 467 // CHECK1: cond.true: 468 // CHECK1-NEXT: br label [[COND_END:%.*]] 469 // CHECK1: cond.false: 470 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 471 // CHECK1-NEXT: br label [[COND_END]] 472 // CHECK1: cond.end: 473 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 474 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 475 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 476 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 477 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 478 // CHECK1: omp.inner.for.cond: 479 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 480 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 481 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 482 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 483 // CHECK1: omp.inner.for.body: 484 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 485 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 486 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 487 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 488 // CHECK1-NEXT: invoke void @_Z3foov() 489 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 490 // CHECK1: invoke.cont: 491 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 492 // CHECK1: omp.body.continue: 493 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 494 // CHECK1: omp.inner.for.inc: 495 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 496 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 497 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 498 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 499 // CHECK1: omp.inner.for.end: 500 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 501 // CHECK1: omp.loop.exit: 502 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 503 // CHECK1-NEXT: ret void 504 // CHECK1: terminate.lpad: 505 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 506 // CHECK1-NEXT: catch i8* null 507 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 508 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 509 // CHECK1-NEXT: unreachable 510 // 511 // 512 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 513 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] comdat { 514 // CHECK1-NEXT: entry: 515 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 516 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 517 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 518 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 519 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 520 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 521 // CHECK1: omp_offload.failed: 522 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 523 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 524 // CHECK1: omp_offload.cont: 525 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 526 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 527 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 528 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 529 // CHECK1: omp_offload.failed2: 530 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 531 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 532 // CHECK1: omp_offload.cont3: 533 // CHECK1-NEXT: ret i32 0 534 // 535 // 536 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 537 // CHECK1-SAME: () #[[ATTR7]] comdat { 538 // CHECK1-NEXT: entry: 539 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 540 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 541 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 542 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 543 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 544 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 545 // CHECK1: omp_offload.failed: 546 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 547 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 548 // CHECK1: omp_offload.cont: 549 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 550 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 551 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 552 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 553 // CHECK1: omp_offload.failed2: 554 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 555 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 556 // CHECK1: omp_offload.cont3: 557 // CHECK1-NEXT: ret i32 0 558 // 559 // 560 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD1Ev 561 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 562 // CHECK1-NEXT: entry: 563 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 564 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 565 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 566 // CHECK1-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]] 567 // CHECK1-NEXT: ret void 568 // 569 // 570 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2El 571 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 572 // CHECK1-NEXT: entry: 573 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 574 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 575 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 576 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 577 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 578 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 579 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 580 // CHECK1-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 581 // CHECK1-NEXT: ret void 582 // 583 // 584 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD2Ev 585 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 586 // CHECK1-NEXT: entry: 587 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 588 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 589 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 590 // CHECK1-NEXT: ret void 591 // 592 // 593 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 594 // CHECK1-SAME: () #[[ATTR3]] { 595 // CHECK1-NEXT: entry: 596 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 597 // CHECK1-NEXT: ret void 598 // 599 // 600 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 601 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 602 // CHECK1-NEXT: entry: 603 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 604 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 605 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 606 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 607 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 608 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 609 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 610 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 611 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 612 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 613 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 614 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 615 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 616 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 617 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 618 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 619 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 620 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 621 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 622 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 623 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 624 // CHECK1: cond.true: 625 // CHECK1-NEXT: br label [[COND_END:%.*]] 626 // CHECK1: cond.false: 627 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 628 // CHECK1-NEXT: br label [[COND_END]] 629 // CHECK1: cond.end: 630 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 631 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 632 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 633 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 634 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 635 // CHECK1: omp.inner.for.cond: 636 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 637 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 638 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 639 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 640 // CHECK1: omp.inner.for.body: 641 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 642 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 643 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 644 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 645 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 646 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 647 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 648 // CHECK1: omp.inner.for.inc: 649 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 650 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 651 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 652 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 653 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 654 // CHECK1: omp.inner.for.end: 655 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 656 // CHECK1: omp.loop.exit: 657 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 658 // CHECK1-NEXT: ret void 659 // 660 // 661 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 662 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 663 // CHECK1-NEXT: entry: 664 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 665 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 666 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 667 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 668 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 669 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 670 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 671 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 672 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 673 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 674 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 675 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 676 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 677 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 678 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 679 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 680 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 681 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 682 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 683 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 684 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 685 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 686 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 687 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 688 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 689 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 690 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 691 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 692 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 693 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 694 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 695 // CHECK1: cond.true: 696 // CHECK1-NEXT: br label [[COND_END:%.*]] 697 // CHECK1: cond.false: 698 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 699 // CHECK1-NEXT: br label [[COND_END]] 700 // CHECK1: cond.end: 701 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 702 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 703 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 704 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 705 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 706 // CHECK1: omp.inner.for.cond: 707 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 708 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 709 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 710 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 711 // CHECK1: omp.inner.for.body: 712 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 713 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 714 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 715 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 716 // CHECK1-NEXT: invoke void @_Z3foov() 717 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 718 // CHECK1: invoke.cont: 719 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 720 // CHECK1: omp.body.continue: 721 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 722 // CHECK1: omp.inner.for.inc: 723 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 724 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 725 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 726 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 727 // CHECK1: omp.inner.for.end: 728 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 729 // CHECK1: omp.loop.exit: 730 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 731 // CHECK1-NEXT: ret void 732 // CHECK1: terminate.lpad: 733 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 734 // CHECK1-NEXT: catch i8* null 735 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 736 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 737 // CHECK1-NEXT: unreachable 738 // 739 // 740 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 741 // CHECK1-SAME: () #[[ATTR3]] { 742 // CHECK1-NEXT: entry: 743 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 744 // CHECK1-NEXT: ret void 745 // 746 // 747 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 748 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 749 // CHECK1-NEXT: entry: 750 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 751 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 752 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 753 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 754 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 755 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 756 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 757 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 758 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 759 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 760 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 761 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 762 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 763 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 764 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 765 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 766 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 767 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 768 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 769 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 770 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 771 // CHECK1: cond.true: 772 // CHECK1-NEXT: br label [[COND_END:%.*]] 773 // CHECK1: cond.false: 774 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 775 // CHECK1-NEXT: br label [[COND_END]] 776 // CHECK1: cond.end: 777 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 778 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 779 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 780 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 781 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 782 // CHECK1: omp.inner.for.cond: 783 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 784 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 785 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 786 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 787 // CHECK1: omp.inner.for.body: 788 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 789 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 790 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 791 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 792 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 793 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 794 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 795 // CHECK1: omp.inner.for.inc: 796 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 797 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 798 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 799 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 800 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 801 // CHECK1: omp.inner.for.end: 802 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 803 // CHECK1: omp.loop.exit: 804 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 805 // CHECK1-NEXT: ret void 806 // 807 // 808 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 809 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 810 // CHECK1-NEXT: entry: 811 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 812 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 813 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 814 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 815 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 816 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 817 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 818 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 819 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 820 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 821 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 822 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 823 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 824 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 825 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 826 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 827 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 828 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 829 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 830 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 831 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 832 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 833 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 834 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 835 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 836 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 837 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 838 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 839 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 840 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 841 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 842 // CHECK1: cond.true: 843 // CHECK1-NEXT: br label [[COND_END:%.*]] 844 // CHECK1: cond.false: 845 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 846 // CHECK1-NEXT: br label [[COND_END]] 847 // CHECK1: cond.end: 848 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 849 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 850 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 851 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 852 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 853 // CHECK1: omp.inner.for.cond: 854 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 855 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 856 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 857 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 858 // CHECK1: omp.inner.for.body: 859 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 860 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 861 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 862 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 863 // CHECK1-NEXT: invoke void @_Z3foov() 864 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 865 // CHECK1: invoke.cont: 866 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 867 // CHECK1: omp.body.continue: 868 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 869 // CHECK1: omp.inner.for.inc: 870 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 871 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 872 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 873 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 874 // CHECK1: omp.inner.for.end: 875 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 876 // CHECK1: omp.loop.exit: 877 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 878 // CHECK1-NEXT: ret void 879 // CHECK1: terminate.lpad: 880 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 881 // CHECK1-NEXT: catch i8* null 882 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 883 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 884 // CHECK1-NEXT: unreachable 885 // 886 // 887 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 888 // CHECK1-SAME: () #[[ATTR3]] { 889 // CHECK1-NEXT: entry: 890 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 891 // CHECK1-NEXT: ret void 892 // 893 // 894 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 895 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 896 // CHECK1-NEXT: entry: 897 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 898 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 899 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 900 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 901 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 902 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 903 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 904 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 905 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 906 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 907 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 908 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 909 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 910 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 911 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 912 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 913 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 914 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 915 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 916 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 917 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 918 // CHECK1: cond.true: 919 // CHECK1-NEXT: br label [[COND_END:%.*]] 920 // CHECK1: cond.false: 921 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 922 // CHECK1-NEXT: br label [[COND_END]] 923 // CHECK1: cond.end: 924 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 925 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 926 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 927 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 928 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 929 // CHECK1: omp.inner.for.cond: 930 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 931 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 932 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 933 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 934 // CHECK1: omp.inner.for.body: 935 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 936 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 937 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 938 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 939 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 940 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 941 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 942 // CHECK1: omp.inner.for.inc: 943 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 944 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 945 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 946 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 947 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 948 // CHECK1: omp.inner.for.end: 949 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 950 // CHECK1: omp.loop.exit: 951 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 952 // CHECK1-NEXT: ret void 953 // 954 // 955 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9 956 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 957 // CHECK1-NEXT: entry: 958 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 959 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 960 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 961 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 962 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 963 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 964 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 965 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 966 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 967 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 968 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 969 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 970 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 971 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 972 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 973 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 974 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 975 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 976 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 977 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 978 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 979 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 980 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 981 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 982 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 983 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 984 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 985 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 986 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 987 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 988 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 989 // CHECK1: cond.true: 990 // CHECK1-NEXT: br label [[COND_END:%.*]] 991 // CHECK1: cond.false: 992 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 993 // CHECK1-NEXT: br label [[COND_END]] 994 // CHECK1: cond.end: 995 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 996 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 997 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 998 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 999 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1000 // CHECK1: omp.inner.for.cond: 1001 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1002 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1003 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1004 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1005 // CHECK1: omp.inner.for.body: 1006 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1007 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1008 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1009 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1010 // CHECK1-NEXT: invoke void @_Z3foov() 1011 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1012 // CHECK1: invoke.cont: 1013 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1014 // CHECK1: omp.body.continue: 1015 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1016 // CHECK1: omp.inner.for.inc: 1017 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1018 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1019 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1020 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1021 // CHECK1: omp.inner.for.end: 1022 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1023 // CHECK1: omp.loop.exit: 1024 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1025 // CHECK1-NEXT: ret void 1026 // CHECK1: terminate.lpad: 1027 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1028 // CHECK1-NEXT: catch i8* null 1029 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1030 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 1031 // CHECK1-NEXT: unreachable 1032 // 1033 // 1034 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 1035 // CHECK1-SAME: () #[[ATTR3]] { 1036 // CHECK1-NEXT: entry: 1037 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 1038 // CHECK1-NEXT: ret void 1039 // 1040 // 1041 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 1042 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1043 // CHECK1-NEXT: entry: 1044 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1045 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1046 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1047 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1048 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1049 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1050 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1051 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1052 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1053 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 1054 // CHECK1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 1055 // CHECK1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 1056 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1057 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1058 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1059 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1060 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1061 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1062 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1063 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1064 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1065 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1066 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1067 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1068 // CHECK1: cond.true: 1069 // CHECK1-NEXT: br label [[COND_END:%.*]] 1070 // CHECK1: cond.false: 1071 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1072 // CHECK1-NEXT: br label [[COND_END]] 1073 // CHECK1: cond.end: 1074 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1075 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1076 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1077 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1078 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1079 // CHECK1: omp.inner.for.cond: 1080 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1081 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1082 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1083 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1084 // CHECK1: omp.inner.for.body: 1085 // CHECK1-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23) 1086 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1087 // CHECK1: invoke.cont: 1088 // CHECK1-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) 1089 // CHECK1-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 1090 // CHECK1: invoke.cont2: 1091 // CHECK1-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 1092 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 1093 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 1094 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1095 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1096 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1097 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1098 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 1099 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1100 // CHECK1: omp.inner.for.inc: 1101 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1102 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1103 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1104 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1105 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1106 // CHECK1: lpad: 1107 // CHECK1-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 1108 // CHECK1-NEXT: catch i8* null 1109 // CHECK1-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 1110 // CHECK1-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 1111 // CHECK1-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 1112 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 1113 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 1114 // CHECK1-NEXT: br label [[TERMINATE_HANDLER:%.*]] 1115 // CHECK1: omp.inner.for.end: 1116 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1117 // CHECK1: omp.loop.exit: 1118 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1119 // CHECK1-NEXT: ret void 1120 // CHECK1: terminate.lpad: 1121 // CHECK1-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 1122 // CHECK1-NEXT: catch i8* null 1123 // CHECK1-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 1124 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 1125 // CHECK1-NEXT: unreachable 1126 // CHECK1: terminate.handler: 1127 // CHECK1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 1128 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 1129 // CHECK1-NEXT: unreachable 1130 // 1131 // 1132 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 1133 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1134 // CHECK1-NEXT: entry: 1135 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1136 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1137 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1138 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1139 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1140 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1141 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1142 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1143 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1144 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1145 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1146 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1147 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1148 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1149 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1150 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1151 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1152 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1153 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1154 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1155 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1156 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1157 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1158 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1159 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1160 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1161 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1162 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1163 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1164 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1165 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1166 // CHECK1: cond.true: 1167 // CHECK1-NEXT: br label [[COND_END:%.*]] 1168 // CHECK1: cond.false: 1169 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1170 // CHECK1-NEXT: br label [[COND_END]] 1171 // CHECK1: cond.end: 1172 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1173 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1174 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1175 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1176 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1177 // CHECK1: omp.inner.for.cond: 1178 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1179 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1180 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1181 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1182 // CHECK1: omp.inner.for.body: 1183 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1184 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1185 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1186 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1187 // CHECK1-NEXT: invoke void @_Z3foov() 1188 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1189 // CHECK1: invoke.cont: 1190 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1191 // CHECK1: omp.body.continue: 1192 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1193 // CHECK1: omp.inner.for.inc: 1194 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1195 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1196 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1197 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1198 // CHECK1: omp.inner.for.end: 1199 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1200 // CHECK1: omp.loop.exit: 1201 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1202 // CHECK1-NEXT: ret void 1203 // CHECK1: terminate.lpad: 1204 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1205 // CHECK1-NEXT: catch i8* null 1206 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1207 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 1208 // CHECK1-NEXT: unreachable 1209 // 1210 // 1211 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1212 // CHECK1-SAME: () #[[ATTR9:[0-9]+]] { 1213 // CHECK1-NEXT: entry: 1214 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 1215 // CHECK1-NEXT: ret void 1216 // 1217 // 1218 // CHECK2-LABEL: define {{[^@]+}}@main 1219 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1220 // CHECK2-NEXT: entry: 1221 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1222 // CHECK2-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 1223 // CHECK2-NEXT: [[A:%.*]] = alloca i8, align 1 1224 // CHECK2-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 1225 // CHECK2-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 1226 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1227 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1228 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1229 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1230 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1231 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1232 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 1233 // CHECK2-NEXT: call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0) 1234 // CHECK2-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) 1235 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 1236 // CHECK2: invoke.cont: 1237 // CHECK2-NEXT: store i8 [[CALL]], i8* [[A]], align 1 1238 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 1239 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1240 // CHECK2-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 1241 // CHECK2-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1242 // CHECK2: omp_offload.failed: 1243 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 1244 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 1245 // CHECK2: lpad: 1246 // CHECK2-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 1247 // CHECK2-NEXT: cleanup 1248 // CHECK2-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 1249 // CHECK2-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 1250 // CHECK2-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 1251 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 1252 // CHECK2-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 1253 // CHECK2-NEXT: br label [[EH_RESUME:%.*]] 1254 // CHECK2: omp_offload.cont: 1255 // CHECK2-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 1256 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 1257 // CHECK2-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 1258 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 1259 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1260 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1261 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 1262 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1263 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1264 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 1265 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1266 // CHECK2-NEXT: store i8* null, i8** [[TMP11]], align 8 1267 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1268 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1269 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1270 // CHECK2-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1271 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 1272 // CHECK2-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 1273 // CHECK2: omp_offload.failed2: 1274 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 1275 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT3]] 1276 // CHECK2: omp_offload.cont3: 1277 // CHECK2-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 1278 // CHECK2-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 1279 // CHECK2-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 1280 // CHECK2-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 1281 // CHECK2: invoke.cont5: 1282 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 1283 // CHECK2-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 1284 // CHECK2-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 1285 // CHECK2: invoke.cont7: 1286 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 1287 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 1288 // CHECK2-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 1289 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 1290 // CHECK2-NEXT: ret i32 [[TMP17]] 1291 // CHECK2: eh.resume: 1292 // CHECK2-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 1293 // CHECK2-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 1294 // CHECK2-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 1295 // CHECK2-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 1296 // CHECK2-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 1297 // 1298 // 1299 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SC1El 1300 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1301 // CHECK2-NEXT: entry: 1302 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1303 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1304 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1305 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1306 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1307 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 1308 // CHECK2-NEXT: call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 1309 // CHECK2-NEXT: ret void 1310 // 1311 // 1312 // CHECK2-LABEL: define {{[^@]+}}@_ZN1ScvcEv 1313 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 1314 // CHECK2-NEXT: entry: 1315 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1316 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1317 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1318 // CHECK2-NEXT: call void @_Z8mayThrowv() 1319 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1320 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 1321 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 1322 // CHECK2-NEXT: ret i8 [[CONV]] 1323 // 1324 // 1325 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 1326 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { 1327 // CHECK2-NEXT: entry: 1328 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1329 // CHECK2-NEXT: ret void 1330 // 1331 // 1332 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 1333 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1334 // CHECK2-NEXT: entry: 1335 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1336 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1337 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1338 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1339 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1340 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1341 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1342 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1343 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1344 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1345 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1346 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1347 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1348 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1349 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1350 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1351 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1352 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1353 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1354 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1355 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1356 // CHECK2: cond.true: 1357 // CHECK2-NEXT: br label [[COND_END:%.*]] 1358 // CHECK2: cond.false: 1359 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1360 // CHECK2-NEXT: br label [[COND_END]] 1361 // CHECK2: cond.end: 1362 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1363 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1364 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1365 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1366 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1367 // CHECK2: omp.inner.for.cond: 1368 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1369 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1370 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1371 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1372 // CHECK2: omp.inner.for.body: 1373 // CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 1374 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1375 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1376 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1377 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1378 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1379 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1380 // CHECK2: omp.inner.for.inc: 1381 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1382 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1383 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1384 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1385 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1386 // CHECK2: omp.inner.for.end: 1387 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1388 // CHECK2: omp.loop.exit: 1389 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1390 // CHECK2-NEXT: ret void 1391 // 1392 // 1393 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 1394 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1395 // CHECK2-NEXT: entry: 1396 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1397 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1398 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1399 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1400 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1401 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1402 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1403 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1404 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1405 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1406 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1407 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1408 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1409 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1410 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1411 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1412 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1413 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1414 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1415 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1416 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1417 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1418 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1419 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1420 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1421 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1422 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1423 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1424 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1425 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1426 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1427 // CHECK2: cond.true: 1428 // CHECK2-NEXT: br label [[COND_END:%.*]] 1429 // CHECK2: cond.false: 1430 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1431 // CHECK2-NEXT: br label [[COND_END]] 1432 // CHECK2: cond.end: 1433 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1434 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1435 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1436 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1437 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1438 // CHECK2: omp.inner.for.cond: 1439 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1440 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1441 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1442 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1443 // CHECK2: omp.inner.for.body: 1444 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1445 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1446 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1447 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1448 // CHECK2-NEXT: invoke void @_Z3foov() 1449 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1450 // CHECK2: invoke.cont: 1451 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1452 // CHECK2: omp.body.continue: 1453 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1454 // CHECK2: omp.inner.for.inc: 1455 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1456 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1457 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1458 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1459 // CHECK2: omp.inner.for.end: 1460 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1461 // CHECK2: omp.loop.exit: 1462 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1463 // CHECK2-NEXT: ret void 1464 // CHECK2: terminate.lpad: 1465 // CHECK2-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1466 // CHECK2-NEXT: catch i8* null 1467 // CHECK2-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1468 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 1469 // CHECK2-NEXT: unreachable 1470 // 1471 // 1472 // CHECK2-LABEL: define {{[^@]+}}@__clang_call_terminate 1473 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1474 // CHECK2-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 1475 // CHECK2-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 1476 // CHECK2-NEXT: unreachable 1477 // 1478 // 1479 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 1480 // CHECK2-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 1481 // CHECK2-NEXT: entry: 1482 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1483 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1484 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 1485 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 1486 // CHECK2-NEXT: ret void 1487 // 1488 // 1489 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 1490 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 1491 // CHECK2-NEXT: entry: 1492 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1493 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1494 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 1495 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1496 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1497 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1498 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1499 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1500 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1501 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1502 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1503 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1504 // CHECK2-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 1505 // CHECK2-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 1506 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1507 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1508 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1509 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1510 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1511 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1512 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1513 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1514 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 1515 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1516 // CHECK2: cond.true: 1517 // CHECK2-NEXT: br label [[COND_END:%.*]] 1518 // CHECK2: cond.false: 1519 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1520 // CHECK2-NEXT: br label [[COND_END]] 1521 // CHECK2: cond.end: 1522 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1523 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1524 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1525 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1526 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1527 // CHECK2: omp.inner.for.cond: 1528 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1529 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1530 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1531 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1532 // CHECK2: omp.inner.for.body: 1533 // CHECK2-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 1534 // CHECK2-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 1535 // CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 1536 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1537 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1538 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1539 // CHECK2-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 1540 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 1541 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1542 // CHECK2: omp.inner.for.inc: 1543 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1544 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1545 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 1546 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1547 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1548 // CHECK2: omp.inner.for.end: 1549 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1550 // CHECK2: omp.loop.exit: 1551 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1552 // CHECK2-NEXT: ret void 1553 // 1554 // 1555 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 1556 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1557 // CHECK2-NEXT: entry: 1558 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1559 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1560 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1561 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1562 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1563 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1564 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1565 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1566 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1567 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1568 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1569 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1570 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1571 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1572 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1573 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1574 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1575 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1576 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1577 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1578 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1579 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1580 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1581 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1582 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1583 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1584 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1585 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1586 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1587 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1588 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1589 // CHECK2: cond.true: 1590 // CHECK2-NEXT: br label [[COND_END:%.*]] 1591 // CHECK2: cond.false: 1592 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1593 // CHECK2-NEXT: br label [[COND_END]] 1594 // CHECK2: cond.end: 1595 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1596 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1597 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1598 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1599 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1600 // CHECK2: omp.inner.for.cond: 1601 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1602 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1603 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1604 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1605 // CHECK2: omp.inner.for.body: 1606 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1607 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1608 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1609 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1610 // CHECK2-NEXT: invoke void @_Z3foov() 1611 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1612 // CHECK2: invoke.cont: 1613 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1614 // CHECK2: omp.body.continue: 1615 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1616 // CHECK2: omp.inner.for.inc: 1617 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1618 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1619 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1620 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1621 // CHECK2: omp.inner.for.end: 1622 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1623 // CHECK2: omp.loop.exit: 1624 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1625 // CHECK2-NEXT: ret void 1626 // CHECK2: terminate.lpad: 1627 // CHECK2-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1628 // CHECK2-NEXT: catch i8* null 1629 // CHECK2-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1630 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 1631 // CHECK2-NEXT: unreachable 1632 // 1633 // 1634 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 1635 // CHECK2-SAME: () #[[ATTR7:[0-9]+]] comdat { 1636 // CHECK2-NEXT: entry: 1637 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1638 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1639 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1640 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1641 // CHECK2-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 1642 // CHECK2-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1643 // CHECK2: omp_offload.failed: 1644 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 1645 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 1646 // CHECK2: omp_offload.cont: 1647 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1648 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1649 // CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 1650 // CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 1651 // CHECK2: omp_offload.failed2: 1652 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 1653 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT3]] 1654 // CHECK2: omp_offload.cont3: 1655 // CHECK2-NEXT: ret i32 0 1656 // 1657 // 1658 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 1659 // CHECK2-SAME: () #[[ATTR7]] comdat { 1660 // CHECK2-NEXT: entry: 1661 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1662 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1663 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1664 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1665 // CHECK2-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 1666 // CHECK2-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1667 // CHECK2: omp_offload.failed: 1668 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 1669 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 1670 // CHECK2: omp_offload.cont: 1671 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1672 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1673 // CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 1674 // CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 1675 // CHECK2: omp_offload.failed2: 1676 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 1677 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT3]] 1678 // CHECK2: omp_offload.cont3: 1679 // CHECK2-NEXT: ret i32 0 1680 // 1681 // 1682 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SD1Ev 1683 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 1684 // CHECK2-NEXT: entry: 1685 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1686 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1687 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1688 // CHECK2-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]] 1689 // CHECK2-NEXT: ret void 1690 // 1691 // 1692 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SC2El 1693 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 1694 // CHECK2-NEXT: entry: 1695 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1696 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1697 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1698 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1699 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1700 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1701 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 1702 // CHECK2-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 1703 // CHECK2-NEXT: ret void 1704 // 1705 // 1706 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SD2Ev 1707 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 1708 // CHECK2-NEXT: entry: 1709 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1710 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1711 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1712 // CHECK2-NEXT: ret void 1713 // 1714 // 1715 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 1716 // CHECK2-SAME: () #[[ATTR3]] { 1717 // CHECK2-NEXT: entry: 1718 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 1719 // CHECK2-NEXT: ret void 1720 // 1721 // 1722 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4 1723 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1724 // CHECK2-NEXT: entry: 1725 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1726 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1727 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1728 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1729 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1730 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1731 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1732 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1733 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1734 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1735 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1736 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1737 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1738 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1739 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1740 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1741 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1742 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1743 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1744 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1745 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1746 // CHECK2: cond.true: 1747 // CHECK2-NEXT: br label [[COND_END:%.*]] 1748 // CHECK2: cond.false: 1749 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1750 // CHECK2-NEXT: br label [[COND_END]] 1751 // CHECK2: cond.end: 1752 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1753 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1754 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1755 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1756 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1757 // CHECK2: omp.inner.for.cond: 1758 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1759 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1760 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1761 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1762 // CHECK2: omp.inner.for.body: 1763 // CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 1764 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1765 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1766 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1767 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1768 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1769 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1770 // CHECK2: omp.inner.for.inc: 1771 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1772 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1773 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1774 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1775 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1776 // CHECK2: omp.inner.for.end: 1777 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1778 // CHECK2: omp.loop.exit: 1779 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1780 // CHECK2-NEXT: ret void 1781 // 1782 // 1783 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..5 1784 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1785 // CHECK2-NEXT: entry: 1786 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1787 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1788 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1789 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1790 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1791 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1792 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1793 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1794 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1795 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1796 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1797 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1798 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1799 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1800 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1801 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1802 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1803 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1804 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1805 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1806 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1807 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1808 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1809 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1810 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1811 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1812 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1813 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1814 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1815 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1816 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1817 // CHECK2: cond.true: 1818 // CHECK2-NEXT: br label [[COND_END:%.*]] 1819 // CHECK2: cond.false: 1820 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1821 // CHECK2-NEXT: br label [[COND_END]] 1822 // CHECK2: cond.end: 1823 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1824 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1825 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1826 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1827 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1828 // CHECK2: omp.inner.for.cond: 1829 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1830 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1831 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1832 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1833 // CHECK2: omp.inner.for.body: 1834 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1835 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1836 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1837 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1838 // CHECK2-NEXT: invoke void @_Z3foov() 1839 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1840 // CHECK2: invoke.cont: 1841 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1842 // CHECK2: omp.body.continue: 1843 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1844 // CHECK2: omp.inner.for.inc: 1845 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1846 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1847 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1848 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1849 // CHECK2: omp.inner.for.end: 1850 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1851 // CHECK2: omp.loop.exit: 1852 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1853 // CHECK2-NEXT: ret void 1854 // CHECK2: terminate.lpad: 1855 // CHECK2-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1856 // CHECK2-NEXT: catch i8* null 1857 // CHECK2-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1858 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 1859 // CHECK2-NEXT: unreachable 1860 // 1861 // 1862 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 1863 // CHECK2-SAME: () #[[ATTR3]] { 1864 // CHECK2-NEXT: entry: 1865 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 1866 // CHECK2-NEXT: ret void 1867 // 1868 // 1869 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6 1870 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1871 // CHECK2-NEXT: entry: 1872 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1873 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1874 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1875 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1876 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1877 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1878 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1879 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1880 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1881 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1882 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1883 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1884 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1885 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1886 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1887 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1888 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1889 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1890 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1891 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1892 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1893 // CHECK2: cond.true: 1894 // CHECK2-NEXT: br label [[COND_END:%.*]] 1895 // CHECK2: cond.false: 1896 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1897 // CHECK2-NEXT: br label [[COND_END]] 1898 // CHECK2: cond.end: 1899 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1900 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1901 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1902 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1903 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1904 // CHECK2: omp.inner.for.cond: 1905 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1906 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1907 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1908 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1909 // CHECK2: omp.inner.for.body: 1910 // CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 1911 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1912 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1913 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1914 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1915 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1916 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1917 // CHECK2: omp.inner.for.inc: 1918 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1919 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1920 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1921 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1922 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1923 // CHECK2: omp.inner.for.end: 1924 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1925 // CHECK2: omp.loop.exit: 1926 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1927 // CHECK2-NEXT: ret void 1928 // 1929 // 1930 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7 1931 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1932 // CHECK2-NEXT: entry: 1933 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1934 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1935 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1936 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1937 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1938 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1939 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1940 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1941 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1942 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1943 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1944 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1945 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1946 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1947 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1948 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1949 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1950 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1951 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1952 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1953 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1954 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1955 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1956 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1957 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1958 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1959 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1960 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1961 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1962 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1963 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1964 // CHECK2: cond.true: 1965 // CHECK2-NEXT: br label [[COND_END:%.*]] 1966 // CHECK2: cond.false: 1967 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1968 // CHECK2-NEXT: br label [[COND_END]] 1969 // CHECK2: cond.end: 1970 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1971 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1972 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1973 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1974 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1975 // CHECK2: omp.inner.for.cond: 1976 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1977 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1978 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1979 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1980 // CHECK2: omp.inner.for.body: 1981 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1982 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1983 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1984 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1985 // CHECK2-NEXT: invoke void @_Z3foov() 1986 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1987 // CHECK2: invoke.cont: 1988 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1989 // CHECK2: omp.body.continue: 1990 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1991 // CHECK2: omp.inner.for.inc: 1992 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1993 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1994 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1995 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1996 // CHECK2: omp.inner.for.end: 1997 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1998 // CHECK2: omp.loop.exit: 1999 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2000 // CHECK2-NEXT: ret void 2001 // CHECK2: terminate.lpad: 2002 // CHECK2-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 2003 // CHECK2-NEXT: catch i8* null 2004 // CHECK2-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 2005 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 2006 // CHECK2-NEXT: unreachable 2007 // 2008 // 2009 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 2010 // CHECK2-SAME: () #[[ATTR3]] { 2011 // CHECK2-NEXT: entry: 2012 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 2013 // CHECK2-NEXT: ret void 2014 // 2015 // 2016 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8 2017 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2018 // CHECK2-NEXT: entry: 2019 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2020 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2021 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2022 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2023 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2024 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2025 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2026 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2027 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2028 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2029 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2030 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2031 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2032 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2033 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2034 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2035 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2036 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2037 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2038 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2039 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2040 // CHECK2: cond.true: 2041 // CHECK2-NEXT: br label [[COND_END:%.*]] 2042 // CHECK2: cond.false: 2043 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2044 // CHECK2-NEXT: br label [[COND_END]] 2045 // CHECK2: cond.end: 2046 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2047 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2048 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2049 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2050 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2051 // CHECK2: omp.inner.for.cond: 2052 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2053 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2054 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2055 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2056 // CHECK2: omp.inner.for.body: 2057 // CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 2058 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2059 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2060 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2061 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2062 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 2063 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2064 // CHECK2: omp.inner.for.inc: 2065 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2066 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2067 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 2068 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2069 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2070 // CHECK2: omp.inner.for.end: 2071 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2072 // CHECK2: omp.loop.exit: 2073 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2074 // CHECK2-NEXT: ret void 2075 // 2076 // 2077 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..9 2078 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2079 // CHECK2-NEXT: entry: 2080 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2081 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2082 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2083 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2084 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2085 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2086 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2087 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2088 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2089 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2090 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2091 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2092 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2093 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2094 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2095 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2096 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2097 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2098 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2099 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2100 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2101 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2102 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2103 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2104 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2105 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2106 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2107 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2108 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2109 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2110 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2111 // CHECK2: cond.true: 2112 // CHECK2-NEXT: br label [[COND_END:%.*]] 2113 // CHECK2: cond.false: 2114 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2115 // CHECK2-NEXT: br label [[COND_END]] 2116 // CHECK2: cond.end: 2117 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2118 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2119 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2120 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2121 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2122 // CHECK2: omp.inner.for.cond: 2123 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2124 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2125 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2126 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2127 // CHECK2: omp.inner.for.body: 2128 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2129 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2130 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2131 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2132 // CHECK2-NEXT: invoke void @_Z3foov() 2133 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2134 // CHECK2: invoke.cont: 2135 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2136 // CHECK2: omp.body.continue: 2137 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2138 // CHECK2: omp.inner.for.inc: 2139 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2140 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2141 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2142 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2143 // CHECK2: omp.inner.for.end: 2144 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2145 // CHECK2: omp.loop.exit: 2146 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2147 // CHECK2-NEXT: ret void 2148 // CHECK2: terminate.lpad: 2149 // CHECK2-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 2150 // CHECK2-NEXT: catch i8* null 2151 // CHECK2-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 2152 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 2153 // CHECK2-NEXT: unreachable 2154 // 2155 // 2156 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 2157 // CHECK2-SAME: () #[[ATTR3]] { 2158 // CHECK2-NEXT: entry: 2159 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 2160 // CHECK2-NEXT: ret void 2161 // 2162 // 2163 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10 2164 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2165 // CHECK2-NEXT: entry: 2166 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2167 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2168 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2169 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2170 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2171 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2172 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2173 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2174 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2175 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 2176 // CHECK2-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 2177 // CHECK2-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 2178 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2179 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2180 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2181 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2182 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2183 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2184 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2185 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2186 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2187 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2188 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2189 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2190 // CHECK2: cond.true: 2191 // CHECK2-NEXT: br label [[COND_END:%.*]] 2192 // CHECK2: cond.false: 2193 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2194 // CHECK2-NEXT: br label [[COND_END]] 2195 // CHECK2: cond.end: 2196 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2197 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2198 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2199 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2200 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2201 // CHECK2: omp.inner.for.cond: 2202 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2203 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2204 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2205 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2206 // CHECK2: omp.inner.for.body: 2207 // CHECK2-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23) 2208 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2209 // CHECK2: invoke.cont: 2210 // CHECK2-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) 2211 // CHECK2-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 2212 // CHECK2: invoke.cont2: 2213 // CHECK2-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 2214 // CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 2215 // CHECK2-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 2216 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2217 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2218 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2219 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2220 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 2221 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2222 // CHECK2: omp.inner.for.inc: 2223 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2224 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2225 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2226 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2227 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2228 // CHECK2: lpad: 2229 // CHECK2-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 2230 // CHECK2-NEXT: catch i8* null 2231 // CHECK2-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 2232 // CHECK2-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 2233 // CHECK2-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 2234 // CHECK2-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 2235 // CHECK2-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 2236 // CHECK2-NEXT: br label [[TERMINATE_HANDLER:%.*]] 2237 // CHECK2: omp.inner.for.end: 2238 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2239 // CHECK2: omp.loop.exit: 2240 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2241 // CHECK2-NEXT: ret void 2242 // CHECK2: terminate.lpad: 2243 // CHECK2-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 2244 // CHECK2-NEXT: catch i8* null 2245 // CHECK2-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 2246 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 2247 // CHECK2-NEXT: unreachable 2248 // CHECK2: terminate.handler: 2249 // CHECK2-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 2250 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 2251 // CHECK2-NEXT: unreachable 2252 // 2253 // 2254 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11 2255 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2256 // CHECK2-NEXT: entry: 2257 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2258 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2259 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2260 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2261 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2262 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2263 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2264 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2265 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2266 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2267 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2268 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2269 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2270 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2271 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2272 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2273 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2274 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2275 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2276 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2277 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2278 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2279 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2280 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2281 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2282 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2283 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2284 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2285 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2286 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2287 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2288 // CHECK2: cond.true: 2289 // CHECK2-NEXT: br label [[COND_END:%.*]] 2290 // CHECK2: cond.false: 2291 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2292 // CHECK2-NEXT: br label [[COND_END]] 2293 // CHECK2: cond.end: 2294 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2295 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2296 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2297 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2298 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2299 // CHECK2: omp.inner.for.cond: 2300 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2301 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2302 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2303 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2304 // CHECK2: omp.inner.for.body: 2305 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2306 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2307 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2308 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2309 // CHECK2-NEXT: invoke void @_Z3foov() 2310 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2311 // CHECK2: invoke.cont: 2312 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2313 // CHECK2: omp.body.continue: 2314 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2315 // CHECK2: omp.inner.for.inc: 2316 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2317 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2318 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2319 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2320 // CHECK2: omp.inner.for.end: 2321 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2322 // CHECK2: omp.loop.exit: 2323 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2324 // CHECK2-NEXT: ret void 2325 // CHECK2: terminate.lpad: 2326 // CHECK2-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 2327 // CHECK2-NEXT: catch i8* null 2328 // CHECK2-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 2329 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 2330 // CHECK2-NEXT: unreachable 2331 // 2332 // 2333 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2334 // CHECK2-SAME: () #[[ATTR9:[0-9]+]] { 2335 // CHECK2-NEXT: entry: 2336 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 2337 // CHECK2-NEXT: ret void 2338 // 2339 // 2340 // CHECK5-LABEL: define {{[^@]+}}@main 2341 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2342 // CHECK5-NEXT: entry: 2343 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2344 // CHECK5-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 2345 // CHECK5-NEXT: [[A:%.*]] = alloca i8, align 1 2346 // CHECK5-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 2347 // CHECK5-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 2348 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2349 // CHECK5-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 2350 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2351 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2352 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2353 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2354 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 2355 // CHECK5-NEXT: call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0) 2356 // CHECK5-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) 2357 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 2358 // CHECK5: invoke.cont: 2359 // CHECK5-NEXT: store i8 [[CALL]], i8* [[A]], align 1 2360 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 2361 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2362 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 2363 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2364 // CHECK5: omp_offload.failed: 2365 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 2366 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 2367 // CHECK5: lpad: 2368 // CHECK5-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 2369 // CHECK5-NEXT: cleanup 2370 // CHECK5-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 2371 // CHECK5-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 2372 // CHECK5-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 2373 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 2374 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 2375 // CHECK5-NEXT: br label [[EH_RESUME:%.*]] 2376 // CHECK5: omp_offload.cont: 2377 // CHECK5-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 2378 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 2379 // CHECK5-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 2380 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 2381 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2382 // CHECK5-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 2383 // CHECK5-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 2384 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2385 // CHECK5-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2386 // CHECK5-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 2387 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2388 // CHECK5-NEXT: store i8* null, i8** [[TMP11]], align 8 2389 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2390 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2391 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 2392 // CHECK5-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2393 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 2394 // CHECK5-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 2395 // CHECK5: omp_offload.failed2: 2396 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 2397 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]] 2398 // CHECK5: omp_offload.cont3: 2399 // CHECK5-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 2400 // CHECK5-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 2401 // CHECK5-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 2402 // CHECK5-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 2403 // CHECK5: invoke.cont5: 2404 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 2405 // CHECK5-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 2406 // CHECK5-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 2407 // CHECK5: invoke.cont7: 2408 // CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 2409 // CHECK5-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 2410 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 2411 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 2412 // CHECK5-NEXT: ret i32 [[TMP17]] 2413 // CHECK5: eh.resume: 2414 // CHECK5-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 2415 // CHECK5-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 2416 // CHECK5-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 2417 // CHECK5-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 2418 // CHECK5-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 2419 // 2420 // 2421 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC1El 2422 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2423 // CHECK5-NEXT: entry: 2424 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2425 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2426 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2427 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2428 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2429 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 2430 // CHECK5-NEXT: call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 2431 // CHECK5-NEXT: ret void 2432 // 2433 // 2434 // CHECK5-LABEL: define {{[^@]+}}@_ZN1ScvcEv 2435 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 2436 // CHECK5-NEXT: entry: 2437 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2438 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2439 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2440 // CHECK5-NEXT: call void @_Z8mayThrowv() 2441 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2442 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 2443 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 2444 // CHECK5-NEXT: ret i8 [[CONV]] 2445 // 2446 // 2447 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 2448 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] { 2449 // CHECK5-NEXT: entry: 2450 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 2451 // CHECK5-NEXT: ret void 2452 // 2453 // 2454 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. 2455 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2456 // CHECK5-NEXT: entry: 2457 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2458 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2459 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2460 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2461 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2462 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2463 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2464 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2465 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2466 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2467 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2468 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2469 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2470 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2471 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2472 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2473 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2474 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2475 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2476 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2477 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2478 // CHECK5: cond.true: 2479 // CHECK5-NEXT: br label [[COND_END:%.*]] 2480 // CHECK5: cond.false: 2481 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2482 // CHECK5-NEXT: br label [[COND_END]] 2483 // CHECK5: cond.end: 2484 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2485 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2486 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2487 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2488 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2489 // CHECK5: omp.inner.for.cond: 2490 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2491 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2492 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2493 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2494 // CHECK5: omp.inner.for.body: 2495 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 2496 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2497 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2498 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2499 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2500 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 2501 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2502 // CHECK5: omp.inner.for.inc: 2503 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2504 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2505 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 2506 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2507 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2508 // CHECK5: omp.inner.for.end: 2509 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2510 // CHECK5: omp.loop.exit: 2511 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2512 // CHECK5-NEXT: ret void 2513 // 2514 // 2515 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1 2516 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2517 // CHECK5-NEXT: entry: 2518 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2519 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2520 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2521 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2522 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2523 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2524 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2525 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2526 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2527 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2528 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2529 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2530 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2531 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2532 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2533 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2534 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2535 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2536 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2537 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2538 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2539 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2540 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2541 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2542 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2543 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2544 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2545 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2546 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2547 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2548 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2549 // CHECK5: cond.true: 2550 // CHECK5-NEXT: br label [[COND_END:%.*]] 2551 // CHECK5: cond.false: 2552 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2553 // CHECK5-NEXT: br label [[COND_END]] 2554 // CHECK5: cond.end: 2555 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2556 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2557 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2558 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2559 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2560 // CHECK5: omp.inner.for.cond: 2561 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2562 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2563 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2564 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2565 // CHECK5: omp.inner.for.body: 2566 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2567 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2568 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2569 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2570 // CHECK5-NEXT: invoke void @_Z3foov() 2571 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2572 // CHECK5: invoke.cont: 2573 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2574 // CHECK5: omp.body.continue: 2575 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2576 // CHECK5: omp.inner.for.inc: 2577 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2578 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2579 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2580 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2581 // CHECK5: omp.inner.for.end: 2582 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2583 // CHECK5: omp.loop.exit: 2584 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2585 // CHECK5-NEXT: ret void 2586 // CHECK5: terminate.lpad: 2587 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 2588 // CHECK5-NEXT: catch i8* null 2589 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 2590 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 2591 // CHECK5-NEXT: unreachable 2592 // 2593 // 2594 // CHECK5-LABEL: define {{[^@]+}}@__clang_call_terminate 2595 // CHECK5-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 2596 // CHECK5-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 2597 // CHECK5-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 2598 // CHECK5-NEXT: unreachable 2599 // 2600 // 2601 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 2602 // CHECK5-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 2603 // CHECK5-NEXT: entry: 2604 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2605 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2606 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 2607 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 2608 // CHECK5-NEXT: ret void 2609 // 2610 // 2611 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2 2612 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 2613 // CHECK5-NEXT: entry: 2614 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2615 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2616 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 2617 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2618 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2619 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2620 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2621 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2622 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2623 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2624 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2625 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2626 // CHECK5-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 2627 // CHECK5-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 2628 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2629 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2630 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2631 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2632 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2633 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2634 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2635 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2636 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 2637 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2638 // CHECK5: cond.true: 2639 // CHECK5-NEXT: br label [[COND_END:%.*]] 2640 // CHECK5: cond.false: 2641 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2642 // CHECK5-NEXT: br label [[COND_END]] 2643 // CHECK5: cond.end: 2644 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2645 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2646 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2647 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2648 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2649 // CHECK5: omp.inner.for.cond: 2650 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2651 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2652 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2653 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2654 // CHECK5: omp.inner.for.body: 2655 // CHECK5-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 2656 // CHECK5-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 2657 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 2658 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2659 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2660 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2661 // CHECK5-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 2662 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 2663 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2664 // CHECK5: omp.inner.for.inc: 2665 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2666 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2667 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 2668 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2669 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2670 // CHECK5: omp.inner.for.end: 2671 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2672 // CHECK5: omp.loop.exit: 2673 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2674 // CHECK5-NEXT: ret void 2675 // 2676 // 2677 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3 2678 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2679 // CHECK5-NEXT: entry: 2680 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2681 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2682 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2683 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2684 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2685 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2686 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2687 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2688 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2689 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2690 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2691 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2692 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2693 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2694 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2695 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2696 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2697 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2698 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2699 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2700 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2701 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2702 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2703 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2704 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2705 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2706 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2707 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2708 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2709 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2710 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2711 // CHECK5: cond.true: 2712 // CHECK5-NEXT: br label [[COND_END:%.*]] 2713 // CHECK5: cond.false: 2714 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2715 // CHECK5-NEXT: br label [[COND_END]] 2716 // CHECK5: cond.end: 2717 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2718 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2719 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2720 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2721 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2722 // CHECK5: omp.inner.for.cond: 2723 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2724 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2725 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2726 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2727 // CHECK5: omp.inner.for.body: 2728 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2729 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2730 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2731 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2732 // CHECK5-NEXT: invoke void @_Z3foov() 2733 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2734 // CHECK5: invoke.cont: 2735 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2736 // CHECK5: omp.body.continue: 2737 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2738 // CHECK5: omp.inner.for.inc: 2739 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2740 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2741 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2742 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2743 // CHECK5: omp.inner.for.end: 2744 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2745 // CHECK5: omp.loop.exit: 2746 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2747 // CHECK5-NEXT: ret void 2748 // CHECK5: terminate.lpad: 2749 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 2750 // CHECK5-NEXT: catch i8* null 2751 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 2752 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 2753 // CHECK5-NEXT: unreachable 2754 // 2755 // 2756 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 2757 // CHECK5-SAME: () #[[ATTR7:[0-9]+]] comdat { 2758 // CHECK5-NEXT: entry: 2759 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2760 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2761 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 2762 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2763 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 2764 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2765 // CHECK5: omp_offload.failed: 2766 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 2767 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 2768 // CHECK5: omp_offload.cont: 2769 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 2770 // CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2771 // CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 2772 // CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 2773 // CHECK5: omp_offload.failed2: 2774 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 2775 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]] 2776 // CHECK5: omp_offload.cont3: 2777 // CHECK5-NEXT: ret i32 0 2778 // 2779 // 2780 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 2781 // CHECK5-SAME: () #[[ATTR7]] comdat { 2782 // CHECK5-NEXT: entry: 2783 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2784 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2785 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 2786 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2787 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 2788 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2789 // CHECK5: omp_offload.failed: 2790 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 2791 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 2792 // CHECK5: omp_offload.cont: 2793 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 2794 // CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2795 // CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 2796 // CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 2797 // CHECK5: omp_offload.failed2: 2798 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 2799 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]] 2800 // CHECK5: omp_offload.cont3: 2801 // CHECK5-NEXT: ret i32 0 2802 // 2803 // 2804 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD1Ev 2805 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 2806 // CHECK5-NEXT: entry: 2807 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2808 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2809 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2810 // CHECK5-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]] 2811 // CHECK5-NEXT: ret void 2812 // 2813 // 2814 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC2El 2815 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 2816 // CHECK5-NEXT: entry: 2817 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2818 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2819 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2820 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2821 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2822 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2823 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 2824 // CHECK5-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 2825 // CHECK5-NEXT: ret void 2826 // 2827 // 2828 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 2829 // CHECK5-SAME: () #[[ATTR3]] { 2830 // CHECK5-NEXT: entry: 2831 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 2832 // CHECK5-NEXT: ret void 2833 // 2834 // 2835 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4 2836 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2837 // CHECK5-NEXT: entry: 2838 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2839 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2840 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2841 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2842 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2843 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2844 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2845 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2846 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2847 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2848 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2849 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2850 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2851 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2852 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2853 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2854 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2855 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2856 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2857 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2858 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2859 // CHECK5: cond.true: 2860 // CHECK5-NEXT: br label [[COND_END:%.*]] 2861 // CHECK5: cond.false: 2862 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2863 // CHECK5-NEXT: br label [[COND_END]] 2864 // CHECK5: cond.end: 2865 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2866 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2867 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2868 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2869 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2870 // CHECK5: omp.inner.for.cond: 2871 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2872 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2873 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2874 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2875 // CHECK5: omp.inner.for.body: 2876 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 2877 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2878 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2879 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2880 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2881 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 2882 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2883 // CHECK5: omp.inner.for.inc: 2884 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2885 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2886 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 2887 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2888 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2889 // CHECK5: omp.inner.for.end: 2890 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2891 // CHECK5: omp.loop.exit: 2892 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2893 // CHECK5-NEXT: ret void 2894 // 2895 // 2896 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5 2897 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2898 // CHECK5-NEXT: entry: 2899 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2900 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2901 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2902 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2903 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2904 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2905 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2906 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2907 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2908 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2909 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2910 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2911 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2912 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2913 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2914 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2915 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2916 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2917 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2918 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2919 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2920 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2921 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2922 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2923 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2924 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2925 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2926 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2927 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2928 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2929 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2930 // CHECK5: cond.true: 2931 // CHECK5-NEXT: br label [[COND_END:%.*]] 2932 // CHECK5: cond.false: 2933 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2934 // CHECK5-NEXT: br label [[COND_END]] 2935 // CHECK5: cond.end: 2936 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2937 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2938 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2939 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2940 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2941 // CHECK5: omp.inner.for.cond: 2942 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2943 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2944 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2945 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2946 // CHECK5: omp.inner.for.body: 2947 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2948 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2949 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2950 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2951 // CHECK5-NEXT: invoke void @_Z3foov() 2952 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2953 // CHECK5: invoke.cont: 2954 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2955 // CHECK5: omp.body.continue: 2956 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2957 // CHECK5: omp.inner.for.inc: 2958 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2959 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2960 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2961 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2962 // CHECK5: omp.inner.for.end: 2963 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2964 // CHECK5: omp.loop.exit: 2965 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2966 // CHECK5-NEXT: ret void 2967 // CHECK5: terminate.lpad: 2968 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 2969 // CHECK5-NEXT: catch i8* null 2970 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 2971 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 2972 // CHECK5-NEXT: unreachable 2973 // 2974 // 2975 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 2976 // CHECK5-SAME: () #[[ATTR3]] { 2977 // CHECK5-NEXT: entry: 2978 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 2979 // CHECK5-NEXT: ret void 2980 // 2981 // 2982 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6 2983 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2984 // CHECK5-NEXT: entry: 2985 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2986 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2987 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2988 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2989 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2990 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2991 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2992 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2993 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2994 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2995 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2996 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2997 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2998 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2999 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3000 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3001 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3002 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3003 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3004 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3005 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3006 // CHECK5: cond.true: 3007 // CHECK5-NEXT: br label [[COND_END:%.*]] 3008 // CHECK5: cond.false: 3009 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3010 // CHECK5-NEXT: br label [[COND_END]] 3011 // CHECK5: cond.end: 3012 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3013 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3014 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3015 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3016 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3017 // CHECK5: omp.inner.for.cond: 3018 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3019 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3020 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3021 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3022 // CHECK5: omp.inner.for.body: 3023 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 3024 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3025 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3026 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3027 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3028 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 3029 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3030 // CHECK5: omp.inner.for.inc: 3031 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3032 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3033 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3034 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3035 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3036 // CHECK5: omp.inner.for.end: 3037 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3038 // CHECK5: omp.loop.exit: 3039 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3040 // CHECK5-NEXT: ret void 3041 // 3042 // 3043 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7 3044 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3045 // CHECK5-NEXT: entry: 3046 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3047 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3048 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3049 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3050 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3051 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3052 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3053 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3054 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3055 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3056 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3057 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3058 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3059 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3060 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3061 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3062 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3063 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3064 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3065 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3066 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3067 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3068 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3069 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3070 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3071 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3072 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3073 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3074 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3075 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3076 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3077 // CHECK5: cond.true: 3078 // CHECK5-NEXT: br label [[COND_END:%.*]] 3079 // CHECK5: cond.false: 3080 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3081 // CHECK5-NEXT: br label [[COND_END]] 3082 // CHECK5: cond.end: 3083 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3084 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3085 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3086 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3087 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3088 // CHECK5: omp.inner.for.cond: 3089 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3090 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3091 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3092 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3093 // CHECK5: omp.inner.for.body: 3094 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3095 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3096 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3097 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3098 // CHECK5-NEXT: invoke void @_Z3foov() 3099 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3100 // CHECK5: invoke.cont: 3101 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3102 // CHECK5: omp.body.continue: 3103 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3104 // CHECK5: omp.inner.for.inc: 3105 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3106 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3107 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3108 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3109 // CHECK5: omp.inner.for.end: 3110 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3111 // CHECK5: omp.loop.exit: 3112 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3113 // CHECK5-NEXT: ret void 3114 // CHECK5: terminate.lpad: 3115 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3116 // CHECK5-NEXT: catch i8* null 3117 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3118 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 3119 // CHECK5-NEXT: unreachable 3120 // 3121 // 3122 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 3123 // CHECK5-SAME: () #[[ATTR3]] { 3124 // CHECK5-NEXT: entry: 3125 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 3126 // CHECK5-NEXT: ret void 3127 // 3128 // 3129 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..8 3130 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3131 // CHECK5-NEXT: entry: 3132 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3133 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3134 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3135 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3136 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3137 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3138 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3139 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3140 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3141 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3142 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3143 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3144 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3145 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3146 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3147 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3148 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3149 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3150 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3151 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3152 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3153 // CHECK5: cond.true: 3154 // CHECK5-NEXT: br label [[COND_END:%.*]] 3155 // CHECK5: cond.false: 3156 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3157 // CHECK5-NEXT: br label [[COND_END]] 3158 // CHECK5: cond.end: 3159 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3160 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3161 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3162 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3163 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3164 // CHECK5: omp.inner.for.cond: 3165 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3166 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3167 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3168 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3169 // CHECK5: omp.inner.for.body: 3170 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 3171 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3172 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3173 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3174 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3175 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 3176 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3177 // CHECK5: omp.inner.for.inc: 3178 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3179 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3180 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3181 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3182 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3183 // CHECK5: omp.inner.for.end: 3184 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3185 // CHECK5: omp.loop.exit: 3186 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3187 // CHECK5-NEXT: ret void 3188 // 3189 // 3190 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..9 3191 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3192 // CHECK5-NEXT: entry: 3193 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3194 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3195 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3196 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3197 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3198 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3199 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3200 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3201 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3202 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3203 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3204 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3205 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3206 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3207 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3208 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3209 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3210 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3211 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3212 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3213 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3214 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3215 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3216 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3217 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3218 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3219 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3220 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3221 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3222 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3223 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3224 // CHECK5: cond.true: 3225 // CHECK5-NEXT: br label [[COND_END:%.*]] 3226 // CHECK5: cond.false: 3227 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3228 // CHECK5-NEXT: br label [[COND_END]] 3229 // CHECK5: cond.end: 3230 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3231 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3232 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3233 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3234 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3235 // CHECK5: omp.inner.for.cond: 3236 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3237 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3238 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3239 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3240 // CHECK5: omp.inner.for.body: 3241 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3242 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3243 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3244 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3245 // CHECK5-NEXT: invoke void @_Z3foov() 3246 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3247 // CHECK5: invoke.cont: 3248 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3249 // CHECK5: omp.body.continue: 3250 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3251 // CHECK5: omp.inner.for.inc: 3252 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3253 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3254 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3255 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3256 // CHECK5: omp.inner.for.end: 3257 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3258 // CHECK5: omp.loop.exit: 3259 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3260 // CHECK5-NEXT: ret void 3261 // CHECK5: terminate.lpad: 3262 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3263 // CHECK5-NEXT: catch i8* null 3264 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3265 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 3266 // CHECK5-NEXT: unreachable 3267 // 3268 // 3269 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 3270 // CHECK5-SAME: () #[[ATTR3]] { 3271 // CHECK5-NEXT: entry: 3272 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 3273 // CHECK5-NEXT: ret void 3274 // 3275 // 3276 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10 3277 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3278 // CHECK5-NEXT: entry: 3279 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3280 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3281 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3282 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3283 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3284 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3285 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3286 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3287 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3288 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 3289 // CHECK5-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 3290 // CHECK5-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 3291 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3292 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3293 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3294 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3295 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3296 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3297 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3298 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3299 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3300 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3301 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3302 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3303 // CHECK5: cond.true: 3304 // CHECK5-NEXT: br label [[COND_END:%.*]] 3305 // CHECK5: cond.false: 3306 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3307 // CHECK5-NEXT: br label [[COND_END]] 3308 // CHECK5: cond.end: 3309 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3310 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3311 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3312 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3313 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3314 // CHECK5: omp.inner.for.cond: 3315 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3316 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3317 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3318 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3319 // CHECK5: omp.inner.for.body: 3320 // CHECK5-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23) 3321 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3322 // CHECK5: invoke.cont: 3323 // CHECK5-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) 3324 // CHECK5-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 3325 // CHECK5: invoke.cont2: 3326 // CHECK5-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 3327 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 3328 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 3329 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3330 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 3331 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3332 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3333 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 3334 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3335 // CHECK5: omp.inner.for.inc: 3336 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3337 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3338 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3339 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3340 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3341 // CHECK5: lpad: 3342 // CHECK5-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 3343 // CHECK5-NEXT: catch i8* null 3344 // CHECK5-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 3345 // CHECK5-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 3346 // CHECK5-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 3347 // CHECK5-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 3348 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 3349 // CHECK5-NEXT: br label [[TERMINATE_HANDLER:%.*]] 3350 // CHECK5: omp.inner.for.end: 3351 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3352 // CHECK5: omp.loop.exit: 3353 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3354 // CHECK5-NEXT: ret void 3355 // CHECK5: terminate.lpad: 3356 // CHECK5-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 3357 // CHECK5-NEXT: catch i8* null 3358 // CHECK5-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 3359 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 3360 // CHECK5-NEXT: unreachable 3361 // CHECK5: terminate.handler: 3362 // CHECK5-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 3363 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 3364 // CHECK5-NEXT: unreachable 3365 // 3366 // 3367 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11 3368 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3369 // CHECK5-NEXT: entry: 3370 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3371 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3372 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3373 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3374 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3375 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3376 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3377 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3378 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3379 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3380 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3381 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3382 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3383 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3384 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3385 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3386 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3387 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3388 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3389 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3390 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3391 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3392 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3393 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3394 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3395 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3396 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3397 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3398 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3399 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3400 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3401 // CHECK5: cond.true: 3402 // CHECK5-NEXT: br label [[COND_END:%.*]] 3403 // CHECK5: cond.false: 3404 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3405 // CHECK5-NEXT: br label [[COND_END]] 3406 // CHECK5: cond.end: 3407 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3408 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3409 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3410 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3411 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3412 // CHECK5: omp.inner.for.cond: 3413 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3414 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3415 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3416 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3417 // CHECK5: omp.inner.for.body: 3418 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3419 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3420 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3421 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3422 // CHECK5-NEXT: invoke void @_Z3foov() 3423 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3424 // CHECK5: invoke.cont: 3425 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3426 // CHECK5: omp.body.continue: 3427 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3428 // CHECK5: omp.inner.for.inc: 3429 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3430 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3431 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3432 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3433 // CHECK5: omp.inner.for.end: 3434 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3435 // CHECK5: omp.loop.exit: 3436 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3437 // CHECK5-NEXT: ret void 3438 // CHECK5: terminate.lpad: 3439 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3440 // CHECK5-NEXT: catch i8* null 3441 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3442 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 3443 // CHECK5-NEXT: unreachable 3444 // 3445 // 3446 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD2Ev 3447 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 3448 // CHECK5-NEXT: entry: 3449 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3450 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3451 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3452 // CHECK5-NEXT: ret void 3453 // 3454 // 3455 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3456 // CHECK5-SAME: () #[[ATTR9:[0-9]+]] { 3457 // CHECK5-NEXT: entry: 3458 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1) 3459 // CHECK5-NEXT: ret void 3460 // 3461 // 3462 // CHECK6-LABEL: define {{[^@]+}}@main 3463 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3464 // CHECK6-NEXT: entry: 3465 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3466 // CHECK6-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 3467 // CHECK6-NEXT: [[A:%.*]] = alloca i8, align 1 3468 // CHECK6-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 3469 // CHECK6-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 3470 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 3471 // CHECK6-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 3472 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 3473 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 3474 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 3475 // CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3476 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 3477 // CHECK6-NEXT: call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0) 3478 // CHECK6-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) 3479 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 3480 // CHECK6: invoke.cont: 3481 // CHECK6-NEXT: store i8 [[CALL]], i8* [[A]], align 1 3482 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 3483 // CHECK6-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3484 // CHECK6-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 3485 // CHECK6-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3486 // CHECK6: omp_offload.failed: 3487 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 3488 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]] 3489 // CHECK6: lpad: 3490 // CHECK6-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 3491 // CHECK6-NEXT: cleanup 3492 // CHECK6-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 3493 // CHECK6-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 3494 // CHECK6-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 3495 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 3496 // CHECK6-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 3497 // CHECK6-NEXT: br label [[EH_RESUME:%.*]] 3498 // CHECK6: omp_offload.cont: 3499 // CHECK6-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 3500 // CHECK6-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 3501 // CHECK6-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 3502 // CHECK6-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 3503 // CHECK6-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3504 // CHECK6-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 3505 // CHECK6-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 3506 // CHECK6-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3507 // CHECK6-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 3508 // CHECK6-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 3509 // CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3510 // CHECK6-NEXT: store i8* null, i8** [[TMP11]], align 8 3511 // CHECK6-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3512 // CHECK6-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3513 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3514 // CHECK6-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3515 // CHECK6-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 3516 // CHECK6-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 3517 // CHECK6: omp_offload.failed2: 3518 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 3519 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT3]] 3520 // CHECK6: omp_offload.cont3: 3521 // CHECK6-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 3522 // CHECK6-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 3523 // CHECK6-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 3524 // CHECK6-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 3525 // CHECK6: invoke.cont5: 3526 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 3527 // CHECK6-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 3528 // CHECK6-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 3529 // CHECK6: invoke.cont7: 3530 // CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 3531 // CHECK6-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 3532 // CHECK6-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 3533 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 3534 // CHECK6-NEXT: ret i32 [[TMP17]] 3535 // CHECK6: eh.resume: 3536 // CHECK6-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 3537 // CHECK6-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 3538 // CHECK6-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 3539 // CHECK6-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 3540 // CHECK6-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 3541 // 3542 // 3543 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SC1El 3544 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3545 // CHECK6-NEXT: entry: 3546 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3547 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 3548 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3549 // CHECK6-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 3550 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3551 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 3552 // CHECK6-NEXT: call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 3553 // CHECK6-NEXT: ret void 3554 // 3555 // 3556 // CHECK6-LABEL: define {{[^@]+}}@_ZN1ScvcEv 3557 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 3558 // CHECK6-NEXT: entry: 3559 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3560 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3561 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3562 // CHECK6-NEXT: call void @_Z8mayThrowv() 3563 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3564 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 3565 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 3566 // CHECK6-NEXT: ret i8 [[CONV]] 3567 // 3568 // 3569 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 3570 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] { 3571 // CHECK6-NEXT: entry: 3572 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 3573 // CHECK6-NEXT: ret void 3574 // 3575 // 3576 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined. 3577 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3578 // CHECK6-NEXT: entry: 3579 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3580 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3581 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3582 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 3583 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3584 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3585 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3586 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3587 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 3588 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3589 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3590 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3591 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3592 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3593 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3594 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3595 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3596 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3597 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3598 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3599 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3600 // CHECK6: cond.true: 3601 // CHECK6-NEXT: br label [[COND_END:%.*]] 3602 // CHECK6: cond.false: 3603 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3604 // CHECK6-NEXT: br label [[COND_END]] 3605 // CHECK6: cond.end: 3606 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3607 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3608 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3609 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3610 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3611 // CHECK6: omp.inner.for.cond: 3612 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3613 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3614 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3615 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3616 // CHECK6: omp.inner.for.body: 3617 // CHECK6-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 3618 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3619 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3620 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3621 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3622 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 3623 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3624 // CHECK6: omp.inner.for.inc: 3625 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3626 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3627 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3628 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3629 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 3630 // CHECK6: omp.inner.for.end: 3631 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3632 // CHECK6: omp.loop.exit: 3633 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3634 // CHECK6-NEXT: ret void 3635 // 3636 // 3637 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1 3638 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3639 // CHECK6-NEXT: entry: 3640 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3641 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3642 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3643 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3644 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3645 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 3646 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3647 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3648 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3649 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3650 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 3651 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3652 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3653 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3654 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3655 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3656 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3657 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3658 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3659 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3660 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3661 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3662 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3663 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3664 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3665 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3666 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3667 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3668 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3669 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3670 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3671 // CHECK6: cond.true: 3672 // CHECK6-NEXT: br label [[COND_END:%.*]] 3673 // CHECK6: cond.false: 3674 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3675 // CHECK6-NEXT: br label [[COND_END]] 3676 // CHECK6: cond.end: 3677 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3678 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3679 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3680 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3681 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3682 // CHECK6: omp.inner.for.cond: 3683 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3684 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3685 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3686 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3687 // CHECK6: omp.inner.for.body: 3688 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3689 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3690 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3691 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3692 // CHECK6-NEXT: invoke void @_Z3foov() 3693 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3694 // CHECK6: invoke.cont: 3695 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3696 // CHECK6: omp.body.continue: 3697 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3698 // CHECK6: omp.inner.for.inc: 3699 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3700 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3701 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3702 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 3703 // CHECK6: omp.inner.for.end: 3704 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3705 // CHECK6: omp.loop.exit: 3706 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3707 // CHECK6-NEXT: ret void 3708 // CHECK6: terminate.lpad: 3709 // CHECK6-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3710 // CHECK6-NEXT: catch i8* null 3711 // CHECK6-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3712 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 3713 // CHECK6-NEXT: unreachable 3714 // 3715 // 3716 // CHECK6-LABEL: define {{[^@]+}}@__clang_call_terminate 3717 // CHECK6-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 3718 // CHECK6-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 3719 // CHECK6-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 3720 // CHECK6-NEXT: unreachable 3721 // 3722 // 3723 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 3724 // CHECK6-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 3725 // CHECK6-NEXT: entry: 3726 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 3727 // CHECK6-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 3728 // CHECK6-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 3729 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 3730 // CHECK6-NEXT: ret void 3731 // 3732 // 3733 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2 3734 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 3735 // CHECK6-NEXT: entry: 3736 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3737 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3738 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 3739 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3740 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 3741 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3742 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3743 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3744 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3745 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 3746 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3747 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3748 // CHECK6-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 3749 // CHECK6-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 3750 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3751 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3752 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3753 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3754 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3755 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3756 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3757 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3758 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 3759 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3760 // CHECK6: cond.true: 3761 // CHECK6-NEXT: br label [[COND_END:%.*]] 3762 // CHECK6: cond.false: 3763 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3764 // CHECK6-NEXT: br label [[COND_END]] 3765 // CHECK6: cond.end: 3766 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3767 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3768 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3769 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3770 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3771 // CHECK6: omp.inner.for.cond: 3772 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3773 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3774 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3775 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3776 // CHECK6: omp.inner.for.body: 3777 // CHECK6-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 3778 // CHECK6-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 3779 // CHECK6-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 3780 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3781 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3782 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3783 // CHECK6-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 3784 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 3785 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3786 // CHECK6: omp.inner.for.inc: 3787 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3788 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3789 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 3790 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3791 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 3792 // CHECK6: omp.inner.for.end: 3793 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3794 // CHECK6: omp.loop.exit: 3795 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3796 // CHECK6-NEXT: ret void 3797 // 3798 // 3799 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3 3800 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3801 // CHECK6-NEXT: entry: 3802 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3803 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3804 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3805 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3806 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3807 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 3808 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3809 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3810 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3811 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3812 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 3813 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3814 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3815 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3816 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3817 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3818 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3819 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3820 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3821 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3822 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3823 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3824 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3825 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3826 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3827 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3828 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3829 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3830 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3831 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3832 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3833 // CHECK6: cond.true: 3834 // CHECK6-NEXT: br label [[COND_END:%.*]] 3835 // CHECK6: cond.false: 3836 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3837 // CHECK6-NEXT: br label [[COND_END]] 3838 // CHECK6: cond.end: 3839 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3840 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3841 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3842 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3843 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3844 // CHECK6: omp.inner.for.cond: 3845 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3846 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3847 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3848 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3849 // CHECK6: omp.inner.for.body: 3850 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3851 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3852 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3853 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3854 // CHECK6-NEXT: invoke void @_Z3foov() 3855 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3856 // CHECK6: invoke.cont: 3857 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3858 // CHECK6: omp.body.continue: 3859 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3860 // CHECK6: omp.inner.for.inc: 3861 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3862 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3863 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3864 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 3865 // CHECK6: omp.inner.for.end: 3866 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3867 // CHECK6: omp.loop.exit: 3868 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3869 // CHECK6-NEXT: ret void 3870 // CHECK6: terminate.lpad: 3871 // CHECK6-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3872 // CHECK6-NEXT: catch i8* null 3873 // CHECK6-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3874 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 3875 // CHECK6-NEXT: unreachable 3876 // 3877 // 3878 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 3879 // CHECK6-SAME: () #[[ATTR7:[0-9]+]] comdat { 3880 // CHECK6-NEXT: entry: 3881 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 3882 // CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3883 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3884 // CHECK6-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3885 // CHECK6-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 3886 // CHECK6-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3887 // CHECK6: omp_offload.failed: 3888 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 3889 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]] 3890 // CHECK6: omp_offload.cont: 3891 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3892 // CHECK6-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3893 // CHECK6-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 3894 // CHECK6-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 3895 // CHECK6: omp_offload.failed2: 3896 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 3897 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT3]] 3898 // CHECK6: omp_offload.cont3: 3899 // CHECK6-NEXT: ret i32 0 3900 // 3901 // 3902 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 3903 // CHECK6-SAME: () #[[ATTR7]] comdat { 3904 // CHECK6-NEXT: entry: 3905 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 3906 // CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3907 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3908 // CHECK6-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3909 // CHECK6-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 3910 // CHECK6-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3911 // CHECK6: omp_offload.failed: 3912 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 3913 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]] 3914 // CHECK6: omp_offload.cont: 3915 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3916 // CHECK6-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3917 // CHECK6-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 3918 // CHECK6-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 3919 // CHECK6: omp_offload.failed2: 3920 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 3921 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT3]] 3922 // CHECK6: omp_offload.cont3: 3923 // CHECK6-NEXT: ret i32 0 3924 // 3925 // 3926 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SD1Ev 3927 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 3928 // CHECK6-NEXT: entry: 3929 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3930 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3931 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3932 // CHECK6-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]] 3933 // CHECK6-NEXT: ret void 3934 // 3935 // 3936 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SC2El 3937 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 3938 // CHECK6-NEXT: entry: 3939 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3940 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 3941 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3942 // CHECK6-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 3943 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3944 // CHECK6-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3945 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 3946 // CHECK6-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 3947 // CHECK6-NEXT: ret void 3948 // 3949 // 3950 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 3951 // CHECK6-SAME: () #[[ATTR3]] { 3952 // CHECK6-NEXT: entry: 3953 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 3954 // CHECK6-NEXT: ret void 3955 // 3956 // 3957 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..4 3958 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3959 // CHECK6-NEXT: entry: 3960 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3961 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3962 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3963 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 3964 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3965 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3966 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3967 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3968 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 3969 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3970 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3971 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3972 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3973 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3974 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3975 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3976 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3977 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3978 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3979 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3980 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3981 // CHECK6: cond.true: 3982 // CHECK6-NEXT: br label [[COND_END:%.*]] 3983 // CHECK6: cond.false: 3984 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3985 // CHECK6-NEXT: br label [[COND_END]] 3986 // CHECK6: cond.end: 3987 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3988 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3989 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3990 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3991 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3992 // CHECK6: omp.inner.for.cond: 3993 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3994 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3995 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3996 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3997 // CHECK6: omp.inner.for.body: 3998 // CHECK6-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 3999 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4000 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4001 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4002 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4003 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 4004 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4005 // CHECK6: omp.inner.for.inc: 4006 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4007 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4008 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 4009 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4010 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4011 // CHECK6: omp.inner.for.end: 4012 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4013 // CHECK6: omp.loop.exit: 4014 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4015 // CHECK6-NEXT: ret void 4016 // 4017 // 4018 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..5 4019 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4020 // CHECK6-NEXT: entry: 4021 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4022 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4023 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4024 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4025 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4026 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4027 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4028 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4029 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4030 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4031 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4032 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4033 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4034 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4035 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4036 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4037 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4038 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4039 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4040 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4041 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4042 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4043 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4044 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4045 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4046 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4047 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4048 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4049 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4050 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4051 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4052 // CHECK6: cond.true: 4053 // CHECK6-NEXT: br label [[COND_END:%.*]] 4054 // CHECK6: cond.false: 4055 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4056 // CHECK6-NEXT: br label [[COND_END]] 4057 // CHECK6: cond.end: 4058 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4059 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4060 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4061 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4062 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4063 // CHECK6: omp.inner.for.cond: 4064 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4065 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4066 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4067 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4068 // CHECK6: omp.inner.for.body: 4069 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4070 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4071 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4072 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4073 // CHECK6-NEXT: invoke void @_Z3foov() 4074 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4075 // CHECK6: invoke.cont: 4076 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4077 // CHECK6: omp.body.continue: 4078 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4079 // CHECK6: omp.inner.for.inc: 4080 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4081 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4082 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4083 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4084 // CHECK6: omp.inner.for.end: 4085 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4086 // CHECK6: omp.loop.exit: 4087 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4088 // CHECK6-NEXT: ret void 4089 // CHECK6: terminate.lpad: 4090 // CHECK6-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4091 // CHECK6-NEXT: catch i8* null 4092 // CHECK6-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4093 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 4094 // CHECK6-NEXT: unreachable 4095 // 4096 // 4097 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 4098 // CHECK6-SAME: () #[[ATTR3]] { 4099 // CHECK6-NEXT: entry: 4100 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 4101 // CHECK6-NEXT: ret void 4102 // 4103 // 4104 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6 4105 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 4106 // CHECK6-NEXT: entry: 4107 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4108 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4109 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4110 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4111 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4112 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4113 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4114 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4115 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4116 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4117 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4118 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4119 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4120 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4121 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4122 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4123 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4124 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4125 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4126 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4127 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4128 // CHECK6: cond.true: 4129 // CHECK6-NEXT: br label [[COND_END:%.*]] 4130 // CHECK6: cond.false: 4131 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4132 // CHECK6-NEXT: br label [[COND_END]] 4133 // CHECK6: cond.end: 4134 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4135 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4136 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4137 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4138 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4139 // CHECK6: omp.inner.for.cond: 4140 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4141 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4142 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4143 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4144 // CHECK6: omp.inner.for.body: 4145 // CHECK6-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 4146 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4147 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4148 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4149 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4150 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 4151 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4152 // CHECK6: omp.inner.for.inc: 4153 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4154 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4155 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 4156 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4157 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4158 // CHECK6: omp.inner.for.end: 4159 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4160 // CHECK6: omp.loop.exit: 4161 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4162 // CHECK6-NEXT: ret void 4163 // 4164 // 4165 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..7 4166 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4167 // CHECK6-NEXT: entry: 4168 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4169 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4170 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4171 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4172 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4173 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4174 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4175 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4176 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4177 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4178 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4179 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4180 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4181 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4182 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4183 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4184 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4185 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4186 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4187 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4188 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4189 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4190 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4191 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4192 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4193 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4194 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4195 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4196 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4197 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4198 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4199 // CHECK6: cond.true: 4200 // CHECK6-NEXT: br label [[COND_END:%.*]] 4201 // CHECK6: cond.false: 4202 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4203 // CHECK6-NEXT: br label [[COND_END]] 4204 // CHECK6: cond.end: 4205 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4206 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4207 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4208 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4209 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4210 // CHECK6: omp.inner.for.cond: 4211 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4212 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4213 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4214 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4215 // CHECK6: omp.inner.for.body: 4216 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4217 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4218 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4219 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4220 // CHECK6-NEXT: invoke void @_Z3foov() 4221 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4222 // CHECK6: invoke.cont: 4223 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4224 // CHECK6: omp.body.continue: 4225 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4226 // CHECK6: omp.inner.for.inc: 4227 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4228 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4229 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4230 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4231 // CHECK6: omp.inner.for.end: 4232 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4233 // CHECK6: omp.loop.exit: 4234 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4235 // CHECK6-NEXT: ret void 4236 // CHECK6: terminate.lpad: 4237 // CHECK6-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4238 // CHECK6-NEXT: catch i8* null 4239 // CHECK6-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4240 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 4241 // CHECK6-NEXT: unreachable 4242 // 4243 // 4244 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 4245 // CHECK6-SAME: () #[[ATTR3]] { 4246 // CHECK6-NEXT: entry: 4247 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 4248 // CHECK6-NEXT: ret void 4249 // 4250 // 4251 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..8 4252 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 4253 // CHECK6-NEXT: entry: 4254 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4255 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4256 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4257 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4258 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4259 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4260 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4261 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4262 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4263 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4264 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4265 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4266 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4267 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4268 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4269 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4270 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4271 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4272 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4273 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4274 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4275 // CHECK6: cond.true: 4276 // CHECK6-NEXT: br label [[COND_END:%.*]] 4277 // CHECK6: cond.false: 4278 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4279 // CHECK6-NEXT: br label [[COND_END]] 4280 // CHECK6: cond.end: 4281 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4282 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4283 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4284 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4285 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4286 // CHECK6: omp.inner.for.cond: 4287 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4288 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4289 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4290 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4291 // CHECK6: omp.inner.for.body: 4292 // CHECK6-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 4293 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4294 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4295 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4296 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4297 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 4298 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4299 // CHECK6: omp.inner.for.inc: 4300 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4301 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4302 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 4303 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4304 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4305 // CHECK6: omp.inner.for.end: 4306 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4307 // CHECK6: omp.loop.exit: 4308 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4309 // CHECK6-NEXT: ret void 4310 // 4311 // 4312 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..9 4313 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4314 // CHECK6-NEXT: entry: 4315 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4316 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4317 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4318 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4319 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4320 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4321 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4322 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4323 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4324 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4325 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4326 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4327 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4328 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4329 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4330 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4331 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4332 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4333 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4334 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4335 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4336 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4337 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4338 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4339 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4340 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4341 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4342 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4343 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4344 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4345 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4346 // CHECK6: cond.true: 4347 // CHECK6-NEXT: br label [[COND_END:%.*]] 4348 // CHECK6: cond.false: 4349 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4350 // CHECK6-NEXT: br label [[COND_END]] 4351 // CHECK6: cond.end: 4352 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4353 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4354 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4355 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4356 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4357 // CHECK6: omp.inner.for.cond: 4358 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4359 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4360 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4361 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4362 // CHECK6: omp.inner.for.body: 4363 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4364 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4365 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4366 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4367 // CHECK6-NEXT: invoke void @_Z3foov() 4368 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4369 // CHECK6: invoke.cont: 4370 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4371 // CHECK6: omp.body.continue: 4372 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4373 // CHECK6: omp.inner.for.inc: 4374 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4375 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4376 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4377 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4378 // CHECK6: omp.inner.for.end: 4379 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4380 // CHECK6: omp.loop.exit: 4381 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4382 // CHECK6-NEXT: ret void 4383 // CHECK6: terminate.lpad: 4384 // CHECK6-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4385 // CHECK6-NEXT: catch i8* null 4386 // CHECK6-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4387 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 4388 // CHECK6-NEXT: unreachable 4389 // 4390 // 4391 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 4392 // CHECK6-SAME: () #[[ATTR3]] { 4393 // CHECK6-NEXT: entry: 4394 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 4395 // CHECK6-NEXT: ret void 4396 // 4397 // 4398 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..10 4399 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4400 // CHECK6-NEXT: entry: 4401 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4402 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4403 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4404 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4405 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4406 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4407 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4408 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4409 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4410 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 4411 // CHECK6-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 4412 // CHECK6-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 4413 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4414 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4415 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4416 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4417 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4418 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4419 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4420 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4421 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4422 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4423 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4424 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4425 // CHECK6: cond.true: 4426 // CHECK6-NEXT: br label [[COND_END:%.*]] 4427 // CHECK6: cond.false: 4428 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4429 // CHECK6-NEXT: br label [[COND_END]] 4430 // CHECK6: cond.end: 4431 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4432 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4433 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4434 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4435 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4436 // CHECK6: omp.inner.for.cond: 4437 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4438 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4439 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4440 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4441 // CHECK6: omp.inner.for.body: 4442 // CHECK6-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23) 4443 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4444 // CHECK6: invoke.cont: 4445 // CHECK6-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) 4446 // CHECK6-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 4447 // CHECK6: invoke.cont2: 4448 // CHECK6-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 4449 // CHECK6-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 4450 // CHECK6-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 4451 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4452 // CHECK6-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4453 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4454 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4455 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 4456 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4457 // CHECK6: omp.inner.for.inc: 4458 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4459 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4460 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4461 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4462 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4463 // CHECK6: lpad: 4464 // CHECK6-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 4465 // CHECK6-NEXT: catch i8* null 4466 // CHECK6-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 4467 // CHECK6-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 4468 // CHECK6-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 4469 // CHECK6-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 4470 // CHECK6-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 4471 // CHECK6-NEXT: br label [[TERMINATE_HANDLER:%.*]] 4472 // CHECK6: omp.inner.for.end: 4473 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4474 // CHECK6: omp.loop.exit: 4475 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4476 // CHECK6-NEXT: ret void 4477 // CHECK6: terminate.lpad: 4478 // CHECK6-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 4479 // CHECK6-NEXT: catch i8* null 4480 // CHECK6-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 4481 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 4482 // CHECK6-NEXT: unreachable 4483 // CHECK6: terminate.handler: 4484 // CHECK6-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 4485 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 4486 // CHECK6-NEXT: unreachable 4487 // 4488 // 4489 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..11 4490 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4491 // CHECK6-NEXT: entry: 4492 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4493 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4494 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4495 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4496 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4497 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4498 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4499 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4500 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4501 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4502 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4503 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4504 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4505 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4506 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4507 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4508 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4509 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4510 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4511 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4512 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4513 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4514 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4515 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4516 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4517 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4518 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4519 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4520 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4521 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4522 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4523 // CHECK6: cond.true: 4524 // CHECK6-NEXT: br label [[COND_END:%.*]] 4525 // CHECK6: cond.false: 4526 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4527 // CHECK6-NEXT: br label [[COND_END]] 4528 // CHECK6: cond.end: 4529 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4530 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4531 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4532 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4533 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4534 // CHECK6: omp.inner.for.cond: 4535 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4536 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4537 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4538 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4539 // CHECK6: omp.inner.for.body: 4540 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4541 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4542 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4543 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4544 // CHECK6-NEXT: invoke void @_Z3foov() 4545 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4546 // CHECK6: invoke.cont: 4547 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4548 // CHECK6: omp.body.continue: 4549 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4550 // CHECK6: omp.inner.for.inc: 4551 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4552 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4553 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4554 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4555 // CHECK6: omp.inner.for.end: 4556 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4557 // CHECK6: omp.loop.exit: 4558 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4559 // CHECK6-NEXT: ret void 4560 // CHECK6: terminate.lpad: 4561 // CHECK6-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4562 // CHECK6-NEXT: catch i8* null 4563 // CHECK6-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4564 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 4565 // CHECK6-NEXT: unreachable 4566 // 4567 // 4568 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SD2Ev 4569 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 4570 // CHECK6-NEXT: entry: 4571 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4572 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4573 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4574 // CHECK6-NEXT: ret void 4575 // 4576 // 4577 // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4578 // CHECK6-SAME: () #[[ATTR9:[0-9]+]] { 4579 // CHECK6-NEXT: entry: 4580 // CHECK6-NEXT: call void @__tgt_register_requires(i64 1) 4581 // CHECK6-NEXT: ret void 4582 // 4583 // 4584 // CHECK9-LABEL: define {{[^@]+}}@main 4585 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4586 // CHECK9-NEXT: entry: 4587 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4588 // CHECK9-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 4589 // CHECK9-NEXT: [[A:%.*]] = alloca i8, align 1 4590 // CHECK9-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 4591 // CHECK9-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 4592 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4593 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 4594 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 4595 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 4596 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 4597 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4598 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 4599 // CHECK9-NEXT: call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0) 4600 // CHECK9-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) 4601 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 4602 // CHECK9: invoke.cont: 4603 // CHECK9-NEXT: store i8 [[CALL]], i8* [[A]], align 1 4604 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 4605 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 4606 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 4607 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4608 // CHECK9: omp_offload.failed: 4609 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 4610 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 4611 // CHECK9: lpad: 4612 // CHECK9-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 4613 // CHECK9-NEXT: cleanup 4614 // CHECK9-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 4615 // CHECK9-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 4616 // CHECK9-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 4617 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 4618 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 4619 // CHECK9-NEXT: br label [[EH_RESUME:%.*]] 4620 // CHECK9: omp_offload.cont: 4621 // CHECK9-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 4622 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 4623 // CHECK9-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 4624 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 4625 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4626 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 4627 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 4628 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4629 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 4630 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 4631 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 4632 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 4633 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4634 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4635 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 4636 // CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4637 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 4638 // CHECK9-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 4639 // CHECK9: omp_offload.failed2: 4640 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 4641 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]] 4642 // CHECK9: omp_offload.cont3: 4643 // CHECK9-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 4644 // CHECK9-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 4645 // CHECK9-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 4646 // CHECK9-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 4647 // CHECK9: invoke.cont5: 4648 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 4649 // CHECK9-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 4650 // CHECK9-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 4651 // CHECK9: invoke.cont7: 4652 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 4653 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 4654 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 4655 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 4656 // CHECK9-NEXT: ret i32 [[TMP17]] 4657 // CHECK9: eh.resume: 4658 // CHECK9-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 4659 // CHECK9-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 4660 // CHECK9-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 4661 // CHECK9-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 4662 // CHECK9-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 4663 // 4664 // 4665 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SC1El 4666 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4667 // CHECK9-NEXT: entry: 4668 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4669 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 4670 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4671 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 4672 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4673 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 4674 // CHECK9-NEXT: call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 4675 // CHECK9-NEXT: ret void 4676 // 4677 // 4678 // CHECK9-LABEL: define {{[^@]+}}@_ZN1ScvcEv 4679 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 4680 // CHECK9-NEXT: entry: 4681 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4682 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4683 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4684 // CHECK9-NEXT: call void @_Z8mayThrowv() 4685 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4686 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 4687 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 4688 // CHECK9-NEXT: ret i8 [[CONV]] 4689 // 4690 // 4691 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 4692 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 4693 // CHECK9-NEXT: entry: 4694 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 4695 // CHECK9-NEXT: ret void 4696 // 4697 // 4698 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 4699 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 4700 // CHECK9-NEXT: entry: 4701 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4702 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4703 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4704 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4705 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4706 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4707 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4708 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4709 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4710 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4711 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4712 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4713 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4714 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4715 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4716 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4717 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4718 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4719 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4720 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4721 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4722 // CHECK9: cond.true: 4723 // CHECK9-NEXT: br label [[COND_END:%.*]] 4724 // CHECK9: cond.false: 4725 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4726 // CHECK9-NEXT: br label [[COND_END]] 4727 // CHECK9: cond.end: 4728 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4729 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4730 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4731 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4732 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4733 // CHECK9: omp.inner.for.cond: 4734 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4735 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4736 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4737 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4738 // CHECK9: omp.inner.for.body: 4739 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 4740 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4741 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4742 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4743 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4744 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 4745 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4746 // CHECK9: omp.inner.for.inc: 4747 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4748 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4749 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 4750 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4751 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 4752 // CHECK9: omp.inner.for.end: 4753 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4754 // CHECK9: omp.loop.exit: 4755 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4756 // CHECK9-NEXT: ret void 4757 // 4758 // 4759 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 4760 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4761 // CHECK9-NEXT: entry: 4762 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4763 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4764 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4765 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4766 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4767 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4768 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4769 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4770 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4771 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4772 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4773 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4774 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4775 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4776 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4777 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4778 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4779 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4780 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4781 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4782 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4783 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4784 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4785 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4786 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4787 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4788 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4789 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4790 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4791 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4792 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4793 // CHECK9: cond.true: 4794 // CHECK9-NEXT: br label [[COND_END:%.*]] 4795 // CHECK9: cond.false: 4796 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4797 // CHECK9-NEXT: br label [[COND_END]] 4798 // CHECK9: cond.end: 4799 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4800 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4801 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4802 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4803 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4804 // CHECK9: omp.inner.for.cond: 4805 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4806 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4807 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4808 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4809 // CHECK9: omp.inner.for.body: 4810 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4811 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4812 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4813 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4814 // CHECK9-NEXT: invoke void @_Z3foov() 4815 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4816 // CHECK9: invoke.cont: 4817 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4818 // CHECK9: omp.body.continue: 4819 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4820 // CHECK9: omp.inner.for.inc: 4821 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4822 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4823 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4824 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 4825 // CHECK9: omp.inner.for.end: 4826 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4827 // CHECK9: omp.loop.exit: 4828 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4829 // CHECK9-NEXT: ret void 4830 // CHECK9: terminate.lpad: 4831 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4832 // CHECK9-NEXT: catch i8* null 4833 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4834 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 4835 // CHECK9-NEXT: unreachable 4836 // 4837 // 4838 // CHECK9-LABEL: define {{[^@]+}}@__clang_call_terminate 4839 // CHECK9-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 4840 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 4841 // CHECK9-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 4842 // CHECK9-NEXT: unreachable 4843 // 4844 // 4845 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 4846 // CHECK9-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 4847 // CHECK9-NEXT: entry: 4848 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 4849 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 4850 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 4851 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 4852 // CHECK9-NEXT: ret void 4853 // 4854 // 4855 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 4856 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 4857 // CHECK9-NEXT: entry: 4858 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4859 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4860 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 4861 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4862 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4863 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4864 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4865 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4866 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4867 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4868 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4869 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4870 // CHECK9-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 4871 // CHECK9-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 4872 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4873 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4874 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4875 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4876 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4877 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4878 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4879 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4880 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 4881 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4882 // CHECK9: cond.true: 4883 // CHECK9-NEXT: br label [[COND_END:%.*]] 4884 // CHECK9: cond.false: 4885 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4886 // CHECK9-NEXT: br label [[COND_END]] 4887 // CHECK9: cond.end: 4888 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4889 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4890 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4891 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4892 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4893 // CHECK9: omp.inner.for.cond: 4894 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4895 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4896 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4897 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4898 // CHECK9: omp.inner.for.body: 4899 // CHECK9-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 4900 // CHECK9-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 4901 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 4902 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4903 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4904 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4905 // CHECK9-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 4906 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 4907 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4908 // CHECK9: omp.inner.for.inc: 4909 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4910 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4911 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 4912 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4913 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 4914 // CHECK9: omp.inner.for.end: 4915 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4916 // CHECK9: omp.loop.exit: 4917 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4918 // CHECK9-NEXT: ret void 4919 // 4920 // 4921 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 4922 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4923 // CHECK9-NEXT: entry: 4924 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4925 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4926 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4927 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4928 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4929 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4930 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4931 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4932 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4933 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4934 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4935 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4936 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4937 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4938 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4939 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4940 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4941 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4942 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4943 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4944 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4945 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4946 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4947 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4948 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4949 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4950 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4951 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4952 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4953 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4954 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4955 // CHECK9: cond.true: 4956 // CHECK9-NEXT: br label [[COND_END:%.*]] 4957 // CHECK9: cond.false: 4958 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4959 // CHECK9-NEXT: br label [[COND_END]] 4960 // CHECK9: cond.end: 4961 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4962 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4963 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4964 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4965 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4966 // CHECK9: omp.inner.for.cond: 4967 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4968 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4969 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4970 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4971 // CHECK9: omp.inner.for.body: 4972 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4973 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4974 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4975 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4976 // CHECK9-NEXT: invoke void @_Z3foov() 4977 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4978 // CHECK9: invoke.cont: 4979 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4980 // CHECK9: omp.body.continue: 4981 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4982 // CHECK9: omp.inner.for.inc: 4983 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4984 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4985 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4986 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 4987 // CHECK9: omp.inner.for.end: 4988 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4989 // CHECK9: omp.loop.exit: 4990 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4991 // CHECK9-NEXT: ret void 4992 // CHECK9: terminate.lpad: 4993 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4994 // CHECK9-NEXT: catch i8* null 4995 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4996 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 4997 // CHECK9-NEXT: unreachable 4998 // 4999 // 5000 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 5001 // CHECK9-SAME: () #[[ATTR7:[0-9]+]] comdat { 5002 // CHECK9-NEXT: entry: 5003 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5004 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 5005 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 5006 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 5007 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 5008 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5009 // CHECK9: omp_offload.failed: 5010 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 5011 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 5012 // CHECK9: omp_offload.cont: 5013 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 5014 // CHECK9-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 5015 // CHECK9-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 5016 // CHECK9-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 5017 // CHECK9: omp_offload.failed2: 5018 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 5019 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]] 5020 // CHECK9: omp_offload.cont3: 5021 // CHECK9-NEXT: ret i32 0 5022 // 5023 // 5024 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 5025 // CHECK9-SAME: () #[[ATTR7]] comdat { 5026 // CHECK9-NEXT: entry: 5027 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5028 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 5029 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 5030 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 5031 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 5032 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5033 // CHECK9: omp_offload.failed: 5034 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 5035 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 5036 // CHECK9: omp_offload.cont: 5037 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 5038 // CHECK9-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 5039 // CHECK9-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 5040 // CHECK9-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 5041 // CHECK9: omp_offload.failed2: 5042 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 5043 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]] 5044 // CHECK9: omp_offload.cont3: 5045 // CHECK9-NEXT: ret i32 0 5046 // 5047 // 5048 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SD1Ev 5049 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 5050 // CHECK9-NEXT: entry: 5051 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5052 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5053 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5054 // CHECK9-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]] 5055 // CHECK9-NEXT: ret void 5056 // 5057 // 5058 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SC2El 5059 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 5060 // CHECK9-NEXT: entry: 5061 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5062 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 5063 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5064 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 5065 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5066 // CHECK9-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5067 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 5068 // CHECK9-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 5069 // CHECK9-NEXT: ret void 5070 // 5071 // 5072 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SD2Ev 5073 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 5074 // CHECK9-NEXT: entry: 5075 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5076 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5077 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5078 // CHECK9-NEXT: ret void 5079 // 5080 // 5081 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 5082 // CHECK9-SAME: () #[[ATTR3]] { 5083 // CHECK9-NEXT: entry: 5084 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 5085 // CHECK9-NEXT: ret void 5086 // 5087 // 5088 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 5089 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 5090 // CHECK9-NEXT: entry: 5091 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5092 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5093 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5094 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5095 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5096 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5097 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5098 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5099 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5100 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5101 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5102 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5103 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 5104 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5105 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5106 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5107 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 5108 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5109 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5110 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 5111 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5112 // CHECK9: cond.true: 5113 // CHECK9-NEXT: br label [[COND_END:%.*]] 5114 // CHECK9: cond.false: 5115 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5116 // CHECK9-NEXT: br label [[COND_END]] 5117 // CHECK9: cond.end: 5118 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5119 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5120 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5121 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 5122 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5123 // CHECK9: omp.inner.for.cond: 5124 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5125 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5126 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5127 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5128 // CHECK9: omp.inner.for.body: 5129 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 5130 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5131 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 5132 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5133 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 5134 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 5135 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5136 // CHECK9: omp.inner.for.inc: 5137 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5138 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5139 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 5140 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5141 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5142 // CHECK9: omp.inner.for.end: 5143 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5144 // CHECK9: omp.loop.exit: 5145 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 5146 // CHECK9-NEXT: ret void 5147 // 5148 // 5149 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5 5150 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5151 // CHECK9-NEXT: entry: 5152 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5153 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5154 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5155 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5156 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5157 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5158 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5159 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5160 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5161 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5162 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5163 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5164 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5165 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5166 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5167 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5168 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 5169 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5170 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5171 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5172 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5173 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5174 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5175 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5176 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5177 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5178 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 5179 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5180 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5181 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5182 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5183 // CHECK9: cond.true: 5184 // CHECK9-NEXT: br label [[COND_END:%.*]] 5185 // CHECK9: cond.false: 5186 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5187 // CHECK9-NEXT: br label [[COND_END]] 5188 // CHECK9: cond.end: 5189 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5190 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5191 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5192 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 5193 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5194 // CHECK9: omp.inner.for.cond: 5195 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5196 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5197 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5198 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5199 // CHECK9: omp.inner.for.body: 5200 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5201 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5202 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5203 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5204 // CHECK9-NEXT: invoke void @_Z3foov() 5205 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5206 // CHECK9: invoke.cont: 5207 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5208 // CHECK9: omp.body.continue: 5209 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5210 // CHECK9: omp.inner.for.inc: 5211 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5212 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5213 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5214 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5215 // CHECK9: omp.inner.for.end: 5216 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5217 // CHECK9: omp.loop.exit: 5218 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 5219 // CHECK9-NEXT: ret void 5220 // CHECK9: terminate.lpad: 5221 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 5222 // CHECK9-NEXT: catch i8* null 5223 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 5224 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 5225 // CHECK9-NEXT: unreachable 5226 // 5227 // 5228 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 5229 // CHECK9-SAME: () #[[ATTR3]] { 5230 // CHECK9-NEXT: entry: 5231 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 5232 // CHECK9-NEXT: ret void 5233 // 5234 // 5235 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6 5236 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 5237 // CHECK9-NEXT: entry: 5238 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5239 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5240 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5241 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5242 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5243 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5244 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5245 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5246 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5247 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5248 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5249 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5250 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 5251 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5252 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5253 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5254 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 5255 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5256 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5257 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 5258 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5259 // CHECK9: cond.true: 5260 // CHECK9-NEXT: br label [[COND_END:%.*]] 5261 // CHECK9: cond.false: 5262 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5263 // CHECK9-NEXT: br label [[COND_END]] 5264 // CHECK9: cond.end: 5265 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5266 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5267 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5268 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 5269 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5270 // CHECK9: omp.inner.for.cond: 5271 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5272 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5273 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5274 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5275 // CHECK9: omp.inner.for.body: 5276 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 5277 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5278 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 5279 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5280 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 5281 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 5282 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5283 // CHECK9: omp.inner.for.inc: 5284 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5285 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5286 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 5287 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5288 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5289 // CHECK9: omp.inner.for.end: 5290 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5291 // CHECK9: omp.loop.exit: 5292 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 5293 // CHECK9-NEXT: ret void 5294 // 5295 // 5296 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 5297 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5298 // CHECK9-NEXT: entry: 5299 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5300 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5301 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5302 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5303 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5304 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5305 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5306 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5307 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5308 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5309 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5310 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5311 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5312 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5313 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5314 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5315 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 5316 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5317 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5318 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5319 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5320 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5321 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5322 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5323 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5324 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5325 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 5326 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5327 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5328 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5329 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5330 // CHECK9: cond.true: 5331 // CHECK9-NEXT: br label [[COND_END:%.*]] 5332 // CHECK9: cond.false: 5333 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5334 // CHECK9-NEXT: br label [[COND_END]] 5335 // CHECK9: cond.end: 5336 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5337 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5338 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5339 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 5340 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5341 // CHECK9: omp.inner.for.cond: 5342 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5343 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5344 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5345 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5346 // CHECK9: omp.inner.for.body: 5347 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5348 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5349 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5350 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5351 // CHECK9-NEXT: invoke void @_Z3foov() 5352 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5353 // CHECK9: invoke.cont: 5354 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5355 // CHECK9: omp.body.continue: 5356 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5357 // CHECK9: omp.inner.for.inc: 5358 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5359 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5360 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5361 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5362 // CHECK9: omp.inner.for.end: 5363 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5364 // CHECK9: omp.loop.exit: 5365 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 5366 // CHECK9-NEXT: ret void 5367 // CHECK9: terminate.lpad: 5368 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 5369 // CHECK9-NEXT: catch i8* null 5370 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 5371 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 5372 // CHECK9-NEXT: unreachable 5373 // 5374 // 5375 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 5376 // CHECK9-SAME: () #[[ATTR3]] { 5377 // CHECK9-NEXT: entry: 5378 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 5379 // CHECK9-NEXT: ret void 5380 // 5381 // 5382 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8 5383 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 5384 // CHECK9-NEXT: entry: 5385 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5386 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5387 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5388 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5389 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5390 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5391 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5392 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5393 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5394 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5395 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5396 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5397 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 5398 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5399 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5400 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5401 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 5402 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5403 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5404 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 5405 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5406 // CHECK9: cond.true: 5407 // CHECK9-NEXT: br label [[COND_END:%.*]] 5408 // CHECK9: cond.false: 5409 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5410 // CHECK9-NEXT: br label [[COND_END]] 5411 // CHECK9: cond.end: 5412 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5413 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5414 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5415 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 5416 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5417 // CHECK9: omp.inner.for.cond: 5418 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5419 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5420 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5421 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5422 // CHECK9: omp.inner.for.body: 5423 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 5424 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5425 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 5426 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5427 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 5428 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 5429 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5430 // CHECK9: omp.inner.for.inc: 5431 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5432 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5433 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 5434 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5435 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5436 // CHECK9: omp.inner.for.end: 5437 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5438 // CHECK9: omp.loop.exit: 5439 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 5440 // CHECK9-NEXT: ret void 5441 // 5442 // 5443 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9 5444 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5445 // CHECK9-NEXT: entry: 5446 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5447 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5448 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5449 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5450 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5451 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5452 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5453 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5454 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5455 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5456 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5457 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5458 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5459 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5460 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5461 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5462 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 5463 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5464 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5465 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5466 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5467 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5468 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5469 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5470 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5471 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5472 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 5473 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5474 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5475 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5476 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5477 // CHECK9: cond.true: 5478 // CHECK9-NEXT: br label [[COND_END:%.*]] 5479 // CHECK9: cond.false: 5480 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5481 // CHECK9-NEXT: br label [[COND_END]] 5482 // CHECK9: cond.end: 5483 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5484 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5485 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5486 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 5487 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5488 // CHECK9: omp.inner.for.cond: 5489 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5490 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5491 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5492 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5493 // CHECK9: omp.inner.for.body: 5494 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5495 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5496 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5497 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5498 // CHECK9-NEXT: invoke void @_Z3foov() 5499 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5500 // CHECK9: invoke.cont: 5501 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5502 // CHECK9: omp.body.continue: 5503 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5504 // CHECK9: omp.inner.for.inc: 5505 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5506 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5507 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5508 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5509 // CHECK9: omp.inner.for.end: 5510 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5511 // CHECK9: omp.loop.exit: 5512 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 5513 // CHECK9-NEXT: ret void 5514 // CHECK9: terminate.lpad: 5515 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 5516 // CHECK9-NEXT: catch i8* null 5517 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 5518 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 5519 // CHECK9-NEXT: unreachable 5520 // 5521 // 5522 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 5523 // CHECK9-SAME: () #[[ATTR3]] { 5524 // CHECK9-NEXT: entry: 5525 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 5526 // CHECK9-NEXT: ret void 5527 // 5528 // 5529 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 5530 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5531 // CHECK9-NEXT: entry: 5532 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5533 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5534 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5535 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5536 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5537 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5538 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5539 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5540 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5541 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 5542 // CHECK9-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 5543 // CHECK9-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 5544 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5545 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5546 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5547 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 5548 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5549 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5550 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5551 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 5552 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5553 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5554 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 5555 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5556 // CHECK9: cond.true: 5557 // CHECK9-NEXT: br label [[COND_END:%.*]] 5558 // CHECK9: cond.false: 5559 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5560 // CHECK9-NEXT: br label [[COND_END]] 5561 // CHECK9: cond.end: 5562 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5563 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5564 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5565 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 5566 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5567 // CHECK9: omp.inner.for.cond: 5568 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5569 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5570 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5571 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5572 // CHECK9: omp.inner.for.body: 5573 // CHECK9-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23) 5574 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5575 // CHECK9: invoke.cont: 5576 // CHECK9-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) 5577 // CHECK9-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 5578 // CHECK9: invoke.cont2: 5579 // CHECK9-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 5580 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 5581 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 5582 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5583 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5584 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5585 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5586 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 5587 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5588 // CHECK9: omp.inner.for.inc: 5589 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5590 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5591 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5592 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5593 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5594 // CHECK9: lpad: 5595 // CHECK9-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 5596 // CHECK9-NEXT: catch i8* null 5597 // CHECK9-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 5598 // CHECK9-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 5599 // CHECK9-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 5600 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 5601 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 5602 // CHECK9-NEXT: br label [[TERMINATE_HANDLER:%.*]] 5603 // CHECK9: omp.inner.for.end: 5604 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5605 // CHECK9: omp.loop.exit: 5606 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 5607 // CHECK9-NEXT: ret void 5608 // CHECK9: terminate.lpad: 5609 // CHECK9-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 5610 // CHECK9-NEXT: catch i8* null 5611 // CHECK9-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 5612 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 5613 // CHECK9-NEXT: unreachable 5614 // CHECK9: terminate.handler: 5615 // CHECK9-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 5616 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 5617 // CHECK9-NEXT: unreachable 5618 // 5619 // 5620 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11 5621 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5622 // CHECK9-NEXT: entry: 5623 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5624 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5625 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5626 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5627 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5628 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5629 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5630 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5631 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5632 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5633 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5634 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5635 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5636 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5637 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5638 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5639 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 5640 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5641 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5642 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5643 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5644 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5645 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5646 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5647 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5648 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5649 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 5650 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5651 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5652 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5653 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5654 // CHECK9: cond.true: 5655 // CHECK9-NEXT: br label [[COND_END:%.*]] 5656 // CHECK9: cond.false: 5657 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5658 // CHECK9-NEXT: br label [[COND_END]] 5659 // CHECK9: cond.end: 5660 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5661 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5662 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5663 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 5664 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5665 // CHECK9: omp.inner.for.cond: 5666 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5667 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5668 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5669 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5670 // CHECK9: omp.inner.for.body: 5671 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5672 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5673 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5674 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5675 // CHECK9-NEXT: invoke void @_Z3foov() 5676 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5677 // CHECK9: invoke.cont: 5678 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5679 // CHECK9: omp.body.continue: 5680 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5681 // CHECK9: omp.inner.for.inc: 5682 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5683 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5684 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5685 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5686 // CHECK9: omp.inner.for.end: 5687 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5688 // CHECK9: omp.loop.exit: 5689 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 5690 // CHECK9-NEXT: ret void 5691 // CHECK9: terminate.lpad: 5692 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 5693 // CHECK9-NEXT: catch i8* null 5694 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 5695 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 5696 // CHECK9-NEXT: unreachable 5697 // 5698 // 5699 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 5700 // CHECK9-SAME: () #[[ATTR9:[0-9]+]] { 5701 // CHECK9-NEXT: entry: 5702 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 5703 // CHECK9-NEXT: ret void 5704 // 5705 // 5706 // CHECK10-LABEL: define {{[^@]+}}@main 5707 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5708 // CHECK10-NEXT: entry: 5709 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5710 // CHECK10-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 5711 // CHECK10-NEXT: [[A:%.*]] = alloca i8, align 1 5712 // CHECK10-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 5713 // CHECK10-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 5714 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 5715 // CHECK10-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 5716 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 5717 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 5718 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 5719 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 5720 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 5721 // CHECK10-NEXT: call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0) 5722 // CHECK10-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) 5723 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 5724 // CHECK10: invoke.cont: 5725 // CHECK10-NEXT: store i8 [[CALL]], i8* [[A]], align 1 5726 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 5727 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 5728 // CHECK10-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 5729 // CHECK10-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5730 // CHECK10: omp_offload.failed: 5731 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 5732 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 5733 // CHECK10: lpad: 5734 // CHECK10-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 5735 // CHECK10-NEXT: cleanup 5736 // CHECK10-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 5737 // CHECK10-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 5738 // CHECK10-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 5739 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 5740 // CHECK10-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 5741 // CHECK10-NEXT: br label [[EH_RESUME:%.*]] 5742 // CHECK10: omp_offload.cont: 5743 // CHECK10-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 5744 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 5745 // CHECK10-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 5746 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 5747 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5748 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 5749 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 5750 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5751 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 5752 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 5753 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 5754 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 5755 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5756 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5757 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 5758 // CHECK10-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5759 // CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 5760 // CHECK10-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 5761 // CHECK10: omp_offload.failed2: 5762 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 5763 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT3]] 5764 // CHECK10: omp_offload.cont3: 5765 // CHECK10-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 5766 // CHECK10-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 5767 // CHECK10-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 5768 // CHECK10-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 5769 // CHECK10: invoke.cont5: 5770 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 5771 // CHECK10-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 5772 // CHECK10-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 5773 // CHECK10: invoke.cont7: 5774 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 5775 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 5776 // CHECK10-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 5777 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 5778 // CHECK10-NEXT: ret i32 [[TMP17]] 5779 // CHECK10: eh.resume: 5780 // CHECK10-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 5781 // CHECK10-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 5782 // CHECK10-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 5783 // CHECK10-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 5784 // CHECK10-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 5785 // 5786 // 5787 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SC1El 5788 // CHECK10-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5789 // CHECK10-NEXT: entry: 5790 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5791 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 5792 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5793 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 5794 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5795 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 5796 // CHECK10-NEXT: call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 5797 // CHECK10-NEXT: ret void 5798 // 5799 // 5800 // CHECK10-LABEL: define {{[^@]+}}@_ZN1ScvcEv 5801 // CHECK10-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 5802 // CHECK10-NEXT: entry: 5803 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5804 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5805 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5806 // CHECK10-NEXT: call void @_Z8mayThrowv() 5807 // CHECK10-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5808 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 5809 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 5810 // CHECK10-NEXT: ret i8 [[CONV]] 5811 // 5812 // 5813 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 5814 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] { 5815 // CHECK10-NEXT: entry: 5816 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 5817 // CHECK10-NEXT: ret void 5818 // 5819 // 5820 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 5821 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 5822 // CHECK10-NEXT: entry: 5823 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5824 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5825 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5826 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 5827 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5828 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5829 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5830 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5831 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 5832 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5833 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5834 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5835 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 5836 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5837 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5838 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5839 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 5840 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5841 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5842 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 5843 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5844 // CHECK10: cond.true: 5845 // CHECK10-NEXT: br label [[COND_END:%.*]] 5846 // CHECK10: cond.false: 5847 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5848 // CHECK10-NEXT: br label [[COND_END]] 5849 // CHECK10: cond.end: 5850 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5851 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5852 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5853 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 5854 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5855 // CHECK10: omp.inner.for.cond: 5856 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5857 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5858 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5859 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5860 // CHECK10: omp.inner.for.body: 5861 // CHECK10-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 5862 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5863 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 5864 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5865 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 5866 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 5867 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5868 // CHECK10: omp.inner.for.inc: 5869 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5870 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5871 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 5872 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5873 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 5874 // CHECK10: omp.inner.for.end: 5875 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5876 // CHECK10: omp.loop.exit: 5877 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 5878 // CHECK10-NEXT: ret void 5879 // 5880 // 5881 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 5882 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5883 // CHECK10-NEXT: entry: 5884 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5885 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5886 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5887 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5888 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5889 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 5890 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5891 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5892 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5893 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5894 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 5895 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5896 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5897 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5898 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5899 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5900 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 5901 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5902 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5903 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5904 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5905 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5906 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5907 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5908 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5909 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5910 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 5911 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5912 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5913 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5914 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5915 // CHECK10: cond.true: 5916 // CHECK10-NEXT: br label [[COND_END:%.*]] 5917 // CHECK10: cond.false: 5918 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5919 // CHECK10-NEXT: br label [[COND_END]] 5920 // CHECK10: cond.end: 5921 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5922 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5923 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5924 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 5925 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5926 // CHECK10: omp.inner.for.cond: 5927 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5928 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5929 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5930 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5931 // CHECK10: omp.inner.for.body: 5932 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5933 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5934 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5935 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5936 // CHECK10-NEXT: invoke void @_Z3foov() 5937 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5938 // CHECK10: invoke.cont: 5939 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5940 // CHECK10: omp.body.continue: 5941 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5942 // CHECK10: omp.inner.for.inc: 5943 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5944 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5945 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5946 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 5947 // CHECK10: omp.inner.for.end: 5948 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5949 // CHECK10: omp.loop.exit: 5950 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 5951 // CHECK10-NEXT: ret void 5952 // CHECK10: terminate.lpad: 5953 // CHECK10-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 5954 // CHECK10-NEXT: catch i8* null 5955 // CHECK10-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 5956 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 5957 // CHECK10-NEXT: unreachable 5958 // 5959 // 5960 // CHECK10-LABEL: define {{[^@]+}}@__clang_call_terminate 5961 // CHECK10-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 5962 // CHECK10-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 5963 // CHECK10-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 5964 // CHECK10-NEXT: unreachable 5965 // 5966 // 5967 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 5968 // CHECK10-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 5969 // CHECK10-NEXT: entry: 5970 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 5971 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 5972 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 5973 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 5974 // CHECK10-NEXT: ret void 5975 // 5976 // 5977 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 5978 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 5979 // CHECK10-NEXT: entry: 5980 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5981 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5982 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 5983 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5984 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 5985 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5986 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5987 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5988 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5989 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 5990 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5991 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5992 // CHECK10-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 5993 // CHECK10-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 5994 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5995 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 5996 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5997 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5998 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5999 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6000 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6001 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6002 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 6003 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6004 // CHECK10: cond.true: 6005 // CHECK10-NEXT: br label [[COND_END:%.*]] 6006 // CHECK10: cond.false: 6007 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6008 // CHECK10-NEXT: br label [[COND_END]] 6009 // CHECK10: cond.end: 6010 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6011 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6012 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6013 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6014 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6015 // CHECK10: omp.inner.for.cond: 6016 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6017 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6018 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6019 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6020 // CHECK10: omp.inner.for.body: 6021 // CHECK10-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 6022 // CHECK10-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 6023 // CHECK10-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 6024 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6025 // CHECK10-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 6026 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6027 // CHECK10-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 6028 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 6029 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6030 // CHECK10: omp.inner.for.inc: 6031 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6032 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6033 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 6034 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6035 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 6036 // CHECK10: omp.inner.for.end: 6037 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6038 // CHECK10: omp.loop.exit: 6039 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6040 // CHECK10-NEXT: ret void 6041 // 6042 // 6043 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 6044 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 6045 // CHECK10-NEXT: entry: 6046 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6047 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6048 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6049 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6050 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6051 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6052 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6053 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6054 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6055 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6056 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 6057 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6058 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6059 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6060 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6061 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6062 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6063 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6064 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6065 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6066 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6067 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6068 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6069 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6070 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6071 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6072 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6073 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6074 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6075 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6076 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6077 // CHECK10: cond.true: 6078 // CHECK10-NEXT: br label [[COND_END:%.*]] 6079 // CHECK10: cond.false: 6080 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6081 // CHECK10-NEXT: br label [[COND_END]] 6082 // CHECK10: cond.end: 6083 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6084 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6085 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6086 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6087 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6088 // CHECK10: omp.inner.for.cond: 6089 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6090 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6091 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6092 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6093 // CHECK10: omp.inner.for.body: 6094 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6095 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6096 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6097 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6098 // CHECK10-NEXT: invoke void @_Z3foov() 6099 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 6100 // CHECK10: invoke.cont: 6101 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6102 // CHECK10: omp.body.continue: 6103 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6104 // CHECK10: omp.inner.for.inc: 6105 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6106 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6107 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6108 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 6109 // CHECK10: omp.inner.for.end: 6110 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6111 // CHECK10: omp.loop.exit: 6112 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6113 // CHECK10-NEXT: ret void 6114 // CHECK10: terminate.lpad: 6115 // CHECK10-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 6116 // CHECK10-NEXT: catch i8* null 6117 // CHECK10-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 6118 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 6119 // CHECK10-NEXT: unreachable 6120 // 6121 // 6122 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 6123 // CHECK10-SAME: () #[[ATTR7:[0-9]+]] comdat { 6124 // CHECK10-NEXT: entry: 6125 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6126 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 6127 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6128 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 6129 // CHECK10-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 6130 // CHECK10-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6131 // CHECK10: omp_offload.failed: 6132 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 6133 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 6134 // CHECK10: omp_offload.cont: 6135 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6136 // CHECK10-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 6137 // CHECK10-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 6138 // CHECK10-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 6139 // CHECK10: omp_offload.failed2: 6140 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 6141 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT3]] 6142 // CHECK10: omp_offload.cont3: 6143 // CHECK10-NEXT: ret i32 0 6144 // 6145 // 6146 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 6147 // CHECK10-SAME: () #[[ATTR7]] comdat { 6148 // CHECK10-NEXT: entry: 6149 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6150 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 6151 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6152 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 6153 // CHECK10-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 6154 // CHECK10-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6155 // CHECK10: omp_offload.failed: 6156 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 6157 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 6158 // CHECK10: omp_offload.cont: 6159 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6160 // CHECK10-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 6161 // CHECK10-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 6162 // CHECK10-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 6163 // CHECK10: omp_offload.failed2: 6164 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 6165 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT3]] 6166 // CHECK10: omp_offload.cont3: 6167 // CHECK10-NEXT: ret i32 0 6168 // 6169 // 6170 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SD1Ev 6171 // CHECK10-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 6172 // CHECK10-NEXT: entry: 6173 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 6174 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 6175 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 6176 // CHECK10-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]] 6177 // CHECK10-NEXT: ret void 6178 // 6179 // 6180 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SC2El 6181 // CHECK10-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 6182 // CHECK10-NEXT: entry: 6183 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 6184 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 6185 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 6186 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 6187 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 6188 // CHECK10-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 6189 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 6190 // CHECK10-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 6191 // CHECK10-NEXT: ret void 6192 // 6193 // 6194 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SD2Ev 6195 // CHECK10-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 6196 // CHECK10-NEXT: entry: 6197 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 6198 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 6199 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 6200 // CHECK10-NEXT: ret void 6201 // 6202 // 6203 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 6204 // CHECK10-SAME: () #[[ATTR3]] { 6205 // CHECK10-NEXT: entry: 6206 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 6207 // CHECK10-NEXT: ret void 6208 // 6209 // 6210 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4 6211 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 6212 // CHECK10-NEXT: entry: 6213 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6214 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6215 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6216 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6217 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6218 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6219 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6220 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6221 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 6222 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6223 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6224 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6225 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6226 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6227 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6228 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6229 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6230 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6231 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6232 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6233 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6234 // CHECK10: cond.true: 6235 // CHECK10-NEXT: br label [[COND_END:%.*]] 6236 // CHECK10: cond.false: 6237 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6238 // CHECK10-NEXT: br label [[COND_END]] 6239 // CHECK10: cond.end: 6240 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6241 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6242 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6243 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6244 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6245 // CHECK10: omp.inner.for.cond: 6246 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6247 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6248 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6249 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6250 // CHECK10: omp.inner.for.body: 6251 // CHECK10-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 6252 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6253 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6254 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6255 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6256 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 6257 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6258 // CHECK10: omp.inner.for.inc: 6259 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6260 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6261 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 6262 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6263 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 6264 // CHECK10: omp.inner.for.end: 6265 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6266 // CHECK10: omp.loop.exit: 6267 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6268 // CHECK10-NEXT: ret void 6269 // 6270 // 6271 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5 6272 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 6273 // CHECK10-NEXT: entry: 6274 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6275 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6276 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6277 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6278 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6279 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6280 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6281 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6282 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6283 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6284 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 6285 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6286 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6287 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6288 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6289 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6290 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6291 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6292 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6293 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6294 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6295 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6296 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6297 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6298 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6299 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6300 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6301 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6302 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6303 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6304 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6305 // CHECK10: cond.true: 6306 // CHECK10-NEXT: br label [[COND_END:%.*]] 6307 // CHECK10: cond.false: 6308 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6309 // CHECK10-NEXT: br label [[COND_END]] 6310 // CHECK10: cond.end: 6311 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6312 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6313 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6314 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6315 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6316 // CHECK10: omp.inner.for.cond: 6317 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6318 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6319 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6320 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6321 // CHECK10: omp.inner.for.body: 6322 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6323 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6324 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6325 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6326 // CHECK10-NEXT: invoke void @_Z3foov() 6327 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 6328 // CHECK10: invoke.cont: 6329 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6330 // CHECK10: omp.body.continue: 6331 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6332 // CHECK10: omp.inner.for.inc: 6333 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6334 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6335 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6336 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 6337 // CHECK10: omp.inner.for.end: 6338 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6339 // CHECK10: omp.loop.exit: 6340 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6341 // CHECK10-NEXT: ret void 6342 // CHECK10: terminate.lpad: 6343 // CHECK10-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 6344 // CHECK10-NEXT: catch i8* null 6345 // CHECK10-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 6346 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 6347 // CHECK10-NEXT: unreachable 6348 // 6349 // 6350 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 6351 // CHECK10-SAME: () #[[ATTR3]] { 6352 // CHECK10-NEXT: entry: 6353 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 6354 // CHECK10-NEXT: ret void 6355 // 6356 // 6357 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..6 6358 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 6359 // CHECK10-NEXT: entry: 6360 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6361 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6362 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6363 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6364 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6365 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6366 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6367 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6368 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 6369 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6370 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6371 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6372 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6373 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6374 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6375 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6376 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6377 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6378 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6379 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6380 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6381 // CHECK10: cond.true: 6382 // CHECK10-NEXT: br label [[COND_END:%.*]] 6383 // CHECK10: cond.false: 6384 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6385 // CHECK10-NEXT: br label [[COND_END]] 6386 // CHECK10: cond.end: 6387 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6388 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6389 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6390 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6391 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6392 // CHECK10: omp.inner.for.cond: 6393 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6394 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6395 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6396 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6397 // CHECK10: omp.inner.for.body: 6398 // CHECK10-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 6399 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6400 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6401 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6402 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6403 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 6404 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6405 // CHECK10: omp.inner.for.inc: 6406 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6407 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6408 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 6409 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6410 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 6411 // CHECK10: omp.inner.for.end: 6412 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6413 // CHECK10: omp.loop.exit: 6414 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6415 // CHECK10-NEXT: ret void 6416 // 6417 // 6418 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..7 6419 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 6420 // CHECK10-NEXT: entry: 6421 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6422 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6423 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6424 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6425 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6426 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6427 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6428 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6429 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6430 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6431 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 6432 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6433 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6434 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6435 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6436 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6437 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6438 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6439 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6440 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6441 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6442 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6443 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6444 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6445 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6446 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6447 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6448 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6449 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6450 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6451 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6452 // CHECK10: cond.true: 6453 // CHECK10-NEXT: br label [[COND_END:%.*]] 6454 // CHECK10: cond.false: 6455 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6456 // CHECK10-NEXT: br label [[COND_END]] 6457 // CHECK10: cond.end: 6458 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6459 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6460 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6461 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6462 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6463 // CHECK10: omp.inner.for.cond: 6464 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6465 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6466 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6467 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6468 // CHECK10: omp.inner.for.body: 6469 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6470 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6471 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6472 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6473 // CHECK10-NEXT: invoke void @_Z3foov() 6474 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 6475 // CHECK10: invoke.cont: 6476 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6477 // CHECK10: omp.body.continue: 6478 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6479 // CHECK10: omp.inner.for.inc: 6480 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6481 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6482 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6483 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 6484 // CHECK10: omp.inner.for.end: 6485 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6486 // CHECK10: omp.loop.exit: 6487 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6488 // CHECK10-NEXT: ret void 6489 // CHECK10: terminate.lpad: 6490 // CHECK10-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 6491 // CHECK10-NEXT: catch i8* null 6492 // CHECK10-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 6493 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 6494 // CHECK10-NEXT: unreachable 6495 // 6496 // 6497 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 6498 // CHECK10-SAME: () #[[ATTR3]] { 6499 // CHECK10-NEXT: entry: 6500 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 6501 // CHECK10-NEXT: ret void 6502 // 6503 // 6504 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..8 6505 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 6506 // CHECK10-NEXT: entry: 6507 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6508 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6509 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6510 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6511 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6512 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6513 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6514 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6515 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 6516 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6517 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6518 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6519 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6520 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6521 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6522 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6523 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6524 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6525 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6526 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6527 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6528 // CHECK10: cond.true: 6529 // CHECK10-NEXT: br label [[COND_END:%.*]] 6530 // CHECK10: cond.false: 6531 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6532 // CHECK10-NEXT: br label [[COND_END]] 6533 // CHECK10: cond.end: 6534 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6535 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6536 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6537 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6538 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6539 // CHECK10: omp.inner.for.cond: 6540 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6541 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6542 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6543 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6544 // CHECK10: omp.inner.for.body: 6545 // CHECK10-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 6546 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6547 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6548 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6549 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6550 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 6551 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6552 // CHECK10: omp.inner.for.inc: 6553 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6554 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6555 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 6556 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6557 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 6558 // CHECK10: omp.inner.for.end: 6559 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6560 // CHECK10: omp.loop.exit: 6561 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6562 // CHECK10-NEXT: ret void 6563 // 6564 // 6565 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..9 6566 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 6567 // CHECK10-NEXT: entry: 6568 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6569 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6570 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6571 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6572 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6573 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6574 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6575 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6576 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6577 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6578 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 6579 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6580 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6581 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6582 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6583 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6584 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6585 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6586 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6587 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6588 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6589 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6590 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6591 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6592 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6593 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6594 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6595 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6596 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6597 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6598 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6599 // CHECK10: cond.true: 6600 // CHECK10-NEXT: br label [[COND_END:%.*]] 6601 // CHECK10: cond.false: 6602 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6603 // CHECK10-NEXT: br label [[COND_END]] 6604 // CHECK10: cond.end: 6605 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6606 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6607 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6608 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6609 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6610 // CHECK10: omp.inner.for.cond: 6611 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6612 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6613 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6614 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6615 // CHECK10: omp.inner.for.body: 6616 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6617 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6618 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6619 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6620 // CHECK10-NEXT: invoke void @_Z3foov() 6621 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 6622 // CHECK10: invoke.cont: 6623 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6624 // CHECK10: omp.body.continue: 6625 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6626 // CHECK10: omp.inner.for.inc: 6627 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6628 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6629 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6630 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 6631 // CHECK10: omp.inner.for.end: 6632 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6633 // CHECK10: omp.loop.exit: 6634 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6635 // CHECK10-NEXT: ret void 6636 // CHECK10: terminate.lpad: 6637 // CHECK10-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 6638 // CHECK10-NEXT: catch i8* null 6639 // CHECK10-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 6640 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 6641 // CHECK10-NEXT: unreachable 6642 // 6643 // 6644 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 6645 // CHECK10-SAME: () #[[ATTR3]] { 6646 // CHECK10-NEXT: entry: 6647 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 6648 // CHECK10-NEXT: ret void 6649 // 6650 // 6651 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..10 6652 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 6653 // CHECK10-NEXT: entry: 6654 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6655 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6656 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6657 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6658 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6659 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6660 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6661 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6662 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 6663 // CHECK10-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 6664 // CHECK10-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 6665 // CHECK10-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 6666 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6667 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6668 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6669 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6670 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6671 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6672 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6673 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6674 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6675 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6676 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6677 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6678 // CHECK10: cond.true: 6679 // CHECK10-NEXT: br label [[COND_END:%.*]] 6680 // CHECK10: cond.false: 6681 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6682 // CHECK10-NEXT: br label [[COND_END]] 6683 // CHECK10: cond.end: 6684 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6685 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6686 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6687 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6688 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6689 // CHECK10: omp.inner.for.cond: 6690 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6691 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6692 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6693 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6694 // CHECK10: omp.inner.for.body: 6695 // CHECK10-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23) 6696 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 6697 // CHECK10: invoke.cont: 6698 // CHECK10-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) 6699 // CHECK10-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 6700 // CHECK10: invoke.cont2: 6701 // CHECK10-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 6702 // CHECK10-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 6703 // CHECK10-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 6704 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6705 // CHECK10-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 6706 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6707 // CHECK10-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 6708 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 6709 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6710 // CHECK10: omp.inner.for.inc: 6711 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6712 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6713 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 6714 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6715 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 6716 // CHECK10: lpad: 6717 // CHECK10-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 6718 // CHECK10-NEXT: catch i8* null 6719 // CHECK10-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 6720 // CHECK10-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 6721 // CHECK10-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 6722 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 6723 // CHECK10-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 6724 // CHECK10-NEXT: br label [[TERMINATE_HANDLER:%.*]] 6725 // CHECK10: omp.inner.for.end: 6726 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6727 // CHECK10: omp.loop.exit: 6728 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6729 // CHECK10-NEXT: ret void 6730 // CHECK10: terminate.lpad: 6731 // CHECK10-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 6732 // CHECK10-NEXT: catch i8* null 6733 // CHECK10-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 6734 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 6735 // CHECK10-NEXT: unreachable 6736 // CHECK10: terminate.handler: 6737 // CHECK10-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 6738 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 6739 // CHECK10-NEXT: unreachable 6740 // 6741 // 6742 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..11 6743 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 6744 // CHECK10-NEXT: entry: 6745 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6746 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6747 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6748 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6749 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6750 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6751 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6752 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6753 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6754 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6755 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 6756 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6757 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6758 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6759 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6760 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6761 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6762 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6763 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6764 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6765 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6766 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6767 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6768 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6769 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6770 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6771 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6772 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6773 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6774 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6775 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6776 // CHECK10: cond.true: 6777 // CHECK10-NEXT: br label [[COND_END:%.*]] 6778 // CHECK10: cond.false: 6779 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6780 // CHECK10-NEXT: br label [[COND_END]] 6781 // CHECK10: cond.end: 6782 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6783 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6784 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6785 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6786 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6787 // CHECK10: omp.inner.for.cond: 6788 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6789 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6790 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6791 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6792 // CHECK10: omp.inner.for.body: 6793 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6794 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6795 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6796 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6797 // CHECK10-NEXT: invoke void @_Z3foov() 6798 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 6799 // CHECK10: invoke.cont: 6800 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6801 // CHECK10: omp.body.continue: 6802 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6803 // CHECK10: omp.inner.for.inc: 6804 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6805 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6806 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6807 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 6808 // CHECK10: omp.inner.for.end: 6809 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6810 // CHECK10: omp.loop.exit: 6811 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6812 // CHECK10-NEXT: ret void 6813 // CHECK10: terminate.lpad: 6814 // CHECK10-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 6815 // CHECK10-NEXT: catch i8* null 6816 // CHECK10-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 6817 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 6818 // CHECK10-NEXT: unreachable 6819 // 6820 // 6821 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 6822 // CHECK10-SAME: () #[[ATTR9:[0-9]+]] { 6823 // CHECK10-NEXT: entry: 6824 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 6825 // CHECK10-NEXT: ret void 6826 // 6827 // 6828 // CHECK13-LABEL: define {{[^@]+}}@main 6829 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 6830 // CHECK13-NEXT: entry: 6831 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6832 // CHECK13-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 6833 // CHECK13-NEXT: [[A:%.*]] = alloca i8, align 1 6834 // CHECK13-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 6835 // CHECK13-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 6836 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6837 // CHECK13-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 6838 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 6839 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 6840 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 6841 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 6842 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 6843 // CHECK13-NEXT: call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0) 6844 // CHECK13-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) 6845 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 6846 // CHECK13: invoke.cont: 6847 // CHECK13-NEXT: store i8 [[CALL]], i8* [[A]], align 1 6848 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 6849 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 6850 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 6851 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6852 // CHECK13: omp_offload.failed: 6853 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 6854 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 6855 // CHECK13: lpad: 6856 // CHECK13-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 6857 // CHECK13-NEXT: cleanup 6858 // CHECK13-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 6859 // CHECK13-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 6860 // CHECK13-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 6861 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 6862 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 6863 // CHECK13-NEXT: br label [[EH_RESUME:%.*]] 6864 // CHECK13: omp_offload.cont: 6865 // CHECK13-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 6866 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 6867 // CHECK13-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 6868 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 6869 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6870 // CHECK13-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 6871 // CHECK13-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 6872 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6873 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 6874 // CHECK13-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 6875 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 6876 // CHECK13-NEXT: store i8* null, i8** [[TMP11]], align 8 6877 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6878 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6879 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6880 // CHECK13-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6881 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 6882 // CHECK13-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 6883 // CHECK13: omp_offload.failed2: 6884 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 6885 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]] 6886 // CHECK13: omp_offload.cont3: 6887 // CHECK13-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 6888 // CHECK13-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 6889 // CHECK13-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 6890 // CHECK13-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 6891 // CHECK13: invoke.cont5: 6892 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 6893 // CHECK13-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 6894 // CHECK13-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 6895 // CHECK13: invoke.cont7: 6896 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 6897 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 6898 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 6899 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 6900 // CHECK13-NEXT: ret i32 [[TMP17]] 6901 // CHECK13: eh.resume: 6902 // CHECK13-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 6903 // CHECK13-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 6904 // CHECK13-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 6905 // CHECK13-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 6906 // CHECK13-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 6907 // 6908 // 6909 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SC1El 6910 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 6911 // CHECK13-NEXT: entry: 6912 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 6913 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 6914 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 6915 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 6916 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 6917 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 6918 // CHECK13-NEXT: call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 6919 // CHECK13-NEXT: ret void 6920 // 6921 // 6922 // CHECK13-LABEL: define {{[^@]+}}@_ZN1ScvcEv 6923 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 6924 // CHECK13-NEXT: entry: 6925 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 6926 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 6927 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 6928 // CHECK13-NEXT: call void @_Z8mayThrowv() 6929 // CHECK13-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 6930 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 6931 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 6932 // CHECK13-NEXT: ret i8 [[CONV]] 6933 // 6934 // 6935 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 6936 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] { 6937 // CHECK13-NEXT: entry: 6938 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 6939 // CHECK13-NEXT: ret void 6940 // 6941 // 6942 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined. 6943 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 6944 // CHECK13-NEXT: entry: 6945 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6946 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6947 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6948 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6949 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6950 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6951 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6952 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6953 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6954 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6955 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6956 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6957 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6958 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6959 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6960 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6961 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6962 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6963 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6964 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6965 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6966 // CHECK13: cond.true: 6967 // CHECK13-NEXT: br label [[COND_END:%.*]] 6968 // CHECK13: cond.false: 6969 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6970 // CHECK13-NEXT: br label [[COND_END]] 6971 // CHECK13: cond.end: 6972 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6973 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6974 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6975 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6976 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6977 // CHECK13: omp.inner.for.cond: 6978 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6979 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6980 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6981 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6982 // CHECK13: omp.inner.for.body: 6983 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 6984 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6985 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6986 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6987 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6988 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 6989 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6990 // CHECK13: omp.inner.for.inc: 6991 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6992 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6993 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 6994 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6995 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 6996 // CHECK13: omp.inner.for.end: 6997 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6998 // CHECK13: omp.loop.exit: 6999 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7000 // CHECK13-NEXT: ret void 7001 // 7002 // 7003 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1 7004 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7005 // CHECK13-NEXT: entry: 7006 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7007 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7008 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7009 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7010 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7011 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7012 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7013 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7014 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7015 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7016 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7017 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7018 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7019 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7020 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7021 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7022 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7023 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7024 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7025 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7026 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7027 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7028 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7029 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7030 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7031 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7032 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7033 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7034 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7035 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7036 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7037 // CHECK13: cond.true: 7038 // CHECK13-NEXT: br label [[COND_END:%.*]] 7039 // CHECK13: cond.false: 7040 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7041 // CHECK13-NEXT: br label [[COND_END]] 7042 // CHECK13: cond.end: 7043 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7044 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7045 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7046 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7047 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7048 // CHECK13: omp.inner.for.cond: 7049 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7050 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7051 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7052 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7053 // CHECK13: omp.inner.for.body: 7054 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7055 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7056 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7057 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7058 // CHECK13-NEXT: invoke void @_Z3foov() 7059 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7060 // CHECK13: invoke.cont: 7061 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7062 // CHECK13: omp.body.continue: 7063 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7064 // CHECK13: omp.inner.for.inc: 7065 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7066 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7067 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7068 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 7069 // CHECK13: omp.inner.for.end: 7070 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7071 // CHECK13: omp.loop.exit: 7072 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7073 // CHECK13-NEXT: ret void 7074 // CHECK13: terminate.lpad: 7075 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 7076 // CHECK13-NEXT: catch i8* null 7077 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 7078 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 7079 // CHECK13-NEXT: unreachable 7080 // 7081 // 7082 // CHECK13-LABEL: define {{[^@]+}}@__clang_call_terminate 7083 // CHECK13-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 7084 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 7085 // CHECK13-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 7086 // CHECK13-NEXT: unreachable 7087 // 7088 // 7089 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 7090 // CHECK13-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 7091 // CHECK13-NEXT: entry: 7092 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7093 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7094 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 7095 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 7096 // CHECK13-NEXT: ret void 7097 // 7098 // 7099 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2 7100 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 7101 // CHECK13-NEXT: entry: 7102 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7103 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7104 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 7105 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7106 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7107 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7108 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7109 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7110 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7111 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7112 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7113 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7114 // CHECK13-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 7115 // CHECK13-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 7116 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7117 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7118 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7119 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7120 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7121 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 7122 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7123 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7124 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 7125 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7126 // CHECK13: cond.true: 7127 // CHECK13-NEXT: br label [[COND_END:%.*]] 7128 // CHECK13: cond.false: 7129 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7130 // CHECK13-NEXT: br label [[COND_END]] 7131 // CHECK13: cond.end: 7132 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7133 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7134 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7135 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 7136 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7137 // CHECK13: omp.inner.for.cond: 7138 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7139 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7140 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7141 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7142 // CHECK13: omp.inner.for.body: 7143 // CHECK13-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 7144 // CHECK13-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 7145 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 7146 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7147 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 7148 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7149 // CHECK13-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 7150 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 7151 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7152 // CHECK13: omp.inner.for.inc: 7153 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7154 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7155 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 7156 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7157 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 7158 // CHECK13: omp.inner.for.end: 7159 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7160 // CHECK13: omp.loop.exit: 7161 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 7162 // CHECK13-NEXT: ret void 7163 // 7164 // 7165 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3 7166 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7167 // CHECK13-NEXT: entry: 7168 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7169 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7170 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7171 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7172 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7173 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7174 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7175 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7176 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7177 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7178 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7179 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7180 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7181 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7182 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7183 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7184 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7185 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7186 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7187 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7188 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7189 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7190 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7191 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7192 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7193 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7194 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7195 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7196 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7197 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7198 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7199 // CHECK13: cond.true: 7200 // CHECK13-NEXT: br label [[COND_END:%.*]] 7201 // CHECK13: cond.false: 7202 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7203 // CHECK13-NEXT: br label [[COND_END]] 7204 // CHECK13: cond.end: 7205 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7206 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7207 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7208 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7209 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7210 // CHECK13: omp.inner.for.cond: 7211 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7212 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7213 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7214 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7215 // CHECK13: omp.inner.for.body: 7216 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7217 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7218 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7219 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7220 // CHECK13-NEXT: invoke void @_Z3foov() 7221 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7222 // CHECK13: invoke.cont: 7223 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7224 // CHECK13: omp.body.continue: 7225 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7226 // CHECK13: omp.inner.for.inc: 7227 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7228 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7229 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7230 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 7231 // CHECK13: omp.inner.for.end: 7232 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7233 // CHECK13: omp.loop.exit: 7234 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7235 // CHECK13-NEXT: ret void 7236 // CHECK13: terminate.lpad: 7237 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 7238 // CHECK13-NEXT: catch i8* null 7239 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 7240 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 7241 // CHECK13-NEXT: unreachable 7242 // 7243 // 7244 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 7245 // CHECK13-SAME: () #[[ATTR7:[0-9]+]] comdat { 7246 // CHECK13-NEXT: entry: 7247 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7248 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 7249 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 7250 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 7251 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 7252 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7253 // CHECK13: omp_offload.failed: 7254 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 7255 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 7256 // CHECK13: omp_offload.cont: 7257 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 7258 // CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 7259 // CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 7260 // CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 7261 // CHECK13: omp_offload.failed2: 7262 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 7263 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]] 7264 // CHECK13: omp_offload.cont3: 7265 // CHECK13-NEXT: ret i32 0 7266 // 7267 // 7268 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 7269 // CHECK13-SAME: () #[[ATTR7]] comdat { 7270 // CHECK13-NEXT: entry: 7271 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7272 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 7273 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 7274 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 7275 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 7276 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7277 // CHECK13: omp_offload.failed: 7278 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 7279 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 7280 // CHECK13: omp_offload.cont: 7281 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 7282 // CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 7283 // CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 7284 // CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 7285 // CHECK13: omp_offload.failed2: 7286 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 7287 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]] 7288 // CHECK13: omp_offload.cont3: 7289 // CHECK13-NEXT: ret i32 0 7290 // 7291 // 7292 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SD1Ev 7293 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 7294 // CHECK13-NEXT: entry: 7295 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 7296 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 7297 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 7298 // CHECK13-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]] 7299 // CHECK13-NEXT: ret void 7300 // 7301 // 7302 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SC2El 7303 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 7304 // CHECK13-NEXT: entry: 7305 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 7306 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7307 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 7308 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7309 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 7310 // CHECK13-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 7311 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 7312 // CHECK13-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 7313 // CHECK13-NEXT: ret void 7314 // 7315 // 7316 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 7317 // CHECK13-SAME: () #[[ATTR3]] { 7318 // CHECK13-NEXT: entry: 7319 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 7320 // CHECK13-NEXT: ret void 7321 // 7322 // 7323 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..4 7324 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 7325 // CHECK13-NEXT: entry: 7326 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7327 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7328 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7329 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7330 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7331 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7332 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7333 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7334 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7335 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7336 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7337 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7338 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7339 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7340 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7341 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7342 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7343 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7344 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7345 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7346 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7347 // CHECK13: cond.true: 7348 // CHECK13-NEXT: br label [[COND_END:%.*]] 7349 // CHECK13: cond.false: 7350 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7351 // CHECK13-NEXT: br label [[COND_END]] 7352 // CHECK13: cond.end: 7353 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7354 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7355 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7356 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7357 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7358 // CHECK13: omp.inner.for.cond: 7359 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7360 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7361 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7362 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7363 // CHECK13: omp.inner.for.body: 7364 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 7365 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7366 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 7367 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7368 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 7369 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 7370 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7371 // CHECK13: omp.inner.for.inc: 7372 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7373 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7374 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 7375 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7376 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 7377 // CHECK13: omp.inner.for.end: 7378 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7379 // CHECK13: omp.loop.exit: 7380 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7381 // CHECK13-NEXT: ret void 7382 // 7383 // 7384 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5 7385 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7386 // CHECK13-NEXT: entry: 7387 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7388 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7389 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7390 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7391 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7392 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7393 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7394 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7395 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7396 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7397 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7398 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7399 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7400 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7401 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7402 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7403 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7404 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7405 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7406 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7407 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7408 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7409 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7410 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7411 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7412 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7413 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7414 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7415 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7416 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7417 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7418 // CHECK13: cond.true: 7419 // CHECK13-NEXT: br label [[COND_END:%.*]] 7420 // CHECK13: cond.false: 7421 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7422 // CHECK13-NEXT: br label [[COND_END]] 7423 // CHECK13: cond.end: 7424 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7425 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7426 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7427 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7428 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7429 // CHECK13: omp.inner.for.cond: 7430 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7431 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7432 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7433 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7434 // CHECK13: omp.inner.for.body: 7435 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7436 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7437 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7438 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7439 // CHECK13-NEXT: invoke void @_Z3foov() 7440 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7441 // CHECK13: invoke.cont: 7442 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7443 // CHECK13: omp.body.continue: 7444 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7445 // CHECK13: omp.inner.for.inc: 7446 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7447 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7448 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7449 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 7450 // CHECK13: omp.inner.for.end: 7451 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7452 // CHECK13: omp.loop.exit: 7453 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7454 // CHECK13-NEXT: ret void 7455 // CHECK13: terminate.lpad: 7456 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 7457 // CHECK13-NEXT: catch i8* null 7458 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 7459 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 7460 // CHECK13-NEXT: unreachable 7461 // 7462 // 7463 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 7464 // CHECK13-SAME: () #[[ATTR3]] { 7465 // CHECK13-NEXT: entry: 7466 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 7467 // CHECK13-NEXT: ret void 7468 // 7469 // 7470 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6 7471 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 7472 // CHECK13-NEXT: entry: 7473 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7474 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7475 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7476 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7477 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7478 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7479 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7480 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7481 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7482 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7483 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7484 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7485 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7486 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7487 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7488 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7489 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7490 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7491 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7492 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7493 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7494 // CHECK13: cond.true: 7495 // CHECK13-NEXT: br label [[COND_END:%.*]] 7496 // CHECK13: cond.false: 7497 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7498 // CHECK13-NEXT: br label [[COND_END]] 7499 // CHECK13: cond.end: 7500 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7501 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7502 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7503 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7504 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7505 // CHECK13: omp.inner.for.cond: 7506 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7507 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7508 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7509 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7510 // CHECK13: omp.inner.for.body: 7511 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 7512 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7513 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 7514 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7515 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 7516 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 7517 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7518 // CHECK13: omp.inner.for.inc: 7519 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7520 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7521 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 7522 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7523 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 7524 // CHECK13: omp.inner.for.end: 7525 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7526 // CHECK13: omp.loop.exit: 7527 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7528 // CHECK13-NEXT: ret void 7529 // 7530 // 7531 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7 7532 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7533 // CHECK13-NEXT: entry: 7534 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7535 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7536 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7537 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7538 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7539 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7540 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7541 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7542 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7543 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7544 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7545 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7546 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7547 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7548 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7549 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7550 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7551 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7552 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7553 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7554 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7555 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7556 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7557 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7558 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7559 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7560 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7561 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7562 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7563 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7564 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7565 // CHECK13: cond.true: 7566 // CHECK13-NEXT: br label [[COND_END:%.*]] 7567 // CHECK13: cond.false: 7568 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7569 // CHECK13-NEXT: br label [[COND_END]] 7570 // CHECK13: cond.end: 7571 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7572 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7573 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7574 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7575 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7576 // CHECK13: omp.inner.for.cond: 7577 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7578 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7579 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7580 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7581 // CHECK13: omp.inner.for.body: 7582 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7583 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7584 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7585 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7586 // CHECK13-NEXT: invoke void @_Z3foov() 7587 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7588 // CHECK13: invoke.cont: 7589 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7590 // CHECK13: omp.body.continue: 7591 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7592 // CHECK13: omp.inner.for.inc: 7593 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7594 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7595 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7596 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 7597 // CHECK13: omp.inner.for.end: 7598 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7599 // CHECK13: omp.loop.exit: 7600 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7601 // CHECK13-NEXT: ret void 7602 // CHECK13: terminate.lpad: 7603 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 7604 // CHECK13-NEXT: catch i8* null 7605 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 7606 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 7607 // CHECK13-NEXT: unreachable 7608 // 7609 // 7610 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 7611 // CHECK13-SAME: () #[[ATTR3]] { 7612 // CHECK13-NEXT: entry: 7613 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 7614 // CHECK13-NEXT: ret void 7615 // 7616 // 7617 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8 7618 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 7619 // CHECK13-NEXT: entry: 7620 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7621 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7622 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7623 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7624 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7625 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7626 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7627 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7628 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7629 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7630 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7631 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7632 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7633 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7634 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7635 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7636 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7637 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7638 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7639 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7640 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7641 // CHECK13: cond.true: 7642 // CHECK13-NEXT: br label [[COND_END:%.*]] 7643 // CHECK13: cond.false: 7644 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7645 // CHECK13-NEXT: br label [[COND_END]] 7646 // CHECK13: cond.end: 7647 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7648 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7649 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7650 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7651 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7652 // CHECK13: omp.inner.for.cond: 7653 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7654 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7655 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7656 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7657 // CHECK13: omp.inner.for.body: 7658 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 7659 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7660 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 7661 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7662 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 7663 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 7664 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7665 // CHECK13: omp.inner.for.inc: 7666 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7667 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7668 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 7669 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7670 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 7671 // CHECK13: omp.inner.for.end: 7672 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7673 // CHECK13: omp.loop.exit: 7674 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7675 // CHECK13-NEXT: ret void 7676 // 7677 // 7678 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9 7679 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7680 // CHECK13-NEXT: entry: 7681 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7682 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7683 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7684 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7685 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7686 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7687 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7688 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7689 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7690 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7691 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7692 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7693 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7694 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7695 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7696 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7697 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7698 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7699 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7700 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7701 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7702 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7703 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7704 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7705 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7706 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7707 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7708 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7709 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7710 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7711 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7712 // CHECK13: cond.true: 7713 // CHECK13-NEXT: br label [[COND_END:%.*]] 7714 // CHECK13: cond.false: 7715 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7716 // CHECK13-NEXT: br label [[COND_END]] 7717 // CHECK13: cond.end: 7718 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7719 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7720 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7721 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7722 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7723 // CHECK13: omp.inner.for.cond: 7724 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7725 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7726 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7727 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7728 // CHECK13: omp.inner.for.body: 7729 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7730 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7731 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7732 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7733 // CHECK13-NEXT: invoke void @_Z3foov() 7734 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7735 // CHECK13: invoke.cont: 7736 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7737 // CHECK13: omp.body.continue: 7738 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7739 // CHECK13: omp.inner.for.inc: 7740 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7741 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7742 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7743 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 7744 // CHECK13: omp.inner.for.end: 7745 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7746 // CHECK13: omp.loop.exit: 7747 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7748 // CHECK13-NEXT: ret void 7749 // CHECK13: terminate.lpad: 7750 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 7751 // CHECK13-NEXT: catch i8* null 7752 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 7753 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 7754 // CHECK13-NEXT: unreachable 7755 // 7756 // 7757 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 7758 // CHECK13-SAME: () #[[ATTR3]] { 7759 // CHECK13-NEXT: entry: 7760 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 7761 // CHECK13-NEXT: ret void 7762 // 7763 // 7764 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10 7765 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7766 // CHECK13-NEXT: entry: 7767 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7768 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7769 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7770 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7771 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7772 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7773 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7774 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7775 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7776 // CHECK13-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 7777 // CHECK13-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 7778 // CHECK13-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 7779 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7780 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7781 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7782 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7783 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7784 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7785 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7786 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7787 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7788 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7789 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7790 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7791 // CHECK13: cond.true: 7792 // CHECK13-NEXT: br label [[COND_END:%.*]] 7793 // CHECK13: cond.false: 7794 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7795 // CHECK13-NEXT: br label [[COND_END]] 7796 // CHECK13: cond.end: 7797 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7798 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7799 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7800 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7801 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7802 // CHECK13: omp.inner.for.cond: 7803 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7804 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7805 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7806 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7807 // CHECK13: omp.inner.for.body: 7808 // CHECK13-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23) 7809 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7810 // CHECK13: invoke.cont: 7811 // CHECK13-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) 7812 // CHECK13-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 7813 // CHECK13: invoke.cont2: 7814 // CHECK13-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 7815 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 7816 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 7817 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7818 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 7819 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7820 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 7821 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 7822 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7823 // CHECK13: omp.inner.for.inc: 7824 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7825 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7826 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 7827 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7828 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 7829 // CHECK13: lpad: 7830 // CHECK13-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 7831 // CHECK13-NEXT: catch i8* null 7832 // CHECK13-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 7833 // CHECK13-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 7834 // CHECK13-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 7835 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 7836 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 7837 // CHECK13-NEXT: br label [[TERMINATE_HANDLER:%.*]] 7838 // CHECK13: omp.inner.for.end: 7839 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7840 // CHECK13: omp.loop.exit: 7841 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7842 // CHECK13-NEXT: ret void 7843 // CHECK13: terminate.lpad: 7844 // CHECK13-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 7845 // CHECK13-NEXT: catch i8* null 7846 // CHECK13-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 7847 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 7848 // CHECK13-NEXT: unreachable 7849 // CHECK13: terminate.handler: 7850 // CHECK13-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 7851 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 7852 // CHECK13-NEXT: unreachable 7853 // 7854 // 7855 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11 7856 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7857 // CHECK13-NEXT: entry: 7858 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7859 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7860 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7861 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7862 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7863 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7864 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7865 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7866 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7867 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7868 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7869 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7870 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7871 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7872 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7873 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7874 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7875 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7876 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7877 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7878 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7879 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7880 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7881 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7882 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7883 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7884 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7885 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7886 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7887 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7888 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7889 // CHECK13: cond.true: 7890 // CHECK13-NEXT: br label [[COND_END:%.*]] 7891 // CHECK13: cond.false: 7892 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7893 // CHECK13-NEXT: br label [[COND_END]] 7894 // CHECK13: cond.end: 7895 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7896 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7897 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7898 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7899 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7900 // CHECK13: omp.inner.for.cond: 7901 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7902 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7903 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7904 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7905 // CHECK13: omp.inner.for.body: 7906 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7907 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7908 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7909 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7910 // CHECK13-NEXT: invoke void @_Z3foov() 7911 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7912 // CHECK13: invoke.cont: 7913 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7914 // CHECK13: omp.body.continue: 7915 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7916 // CHECK13: omp.inner.for.inc: 7917 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7918 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7919 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7920 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 7921 // CHECK13: omp.inner.for.end: 7922 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7923 // CHECK13: omp.loop.exit: 7924 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7925 // CHECK13-NEXT: ret void 7926 // CHECK13: terminate.lpad: 7927 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 7928 // CHECK13-NEXT: catch i8* null 7929 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 7930 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 7931 // CHECK13-NEXT: unreachable 7932 // 7933 // 7934 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SD2Ev 7935 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 7936 // CHECK13-NEXT: entry: 7937 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 7938 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 7939 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 7940 // CHECK13-NEXT: ret void 7941 // 7942 // 7943 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 7944 // CHECK13-SAME: () #[[ATTR9:[0-9]+]] { 7945 // CHECK13-NEXT: entry: 7946 // CHECK13-NEXT: call void @__tgt_register_requires(i64 1) 7947 // CHECK13-NEXT: ret void 7948 // 7949 // 7950 // CHECK14-LABEL: define {{[^@]+}}@main 7951 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7952 // CHECK14-NEXT: entry: 7953 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7954 // CHECK14-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 7955 // CHECK14-NEXT: [[A:%.*]] = alloca i8, align 1 7956 // CHECK14-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 7957 // CHECK14-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 7958 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 7959 // CHECK14-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 7960 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 7961 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 7962 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 7963 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 7964 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 7965 // CHECK14-NEXT: call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0) 7966 // CHECK14-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) 7967 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 7968 // CHECK14: invoke.cont: 7969 // CHECK14-NEXT: store i8 [[CALL]], i8* [[A]], align 1 7970 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 7971 // CHECK14-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 7972 // CHECK14-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 7973 // CHECK14-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7974 // CHECK14: omp_offload.failed: 7975 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 7976 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] 7977 // CHECK14: lpad: 7978 // CHECK14-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 7979 // CHECK14-NEXT: cleanup 7980 // CHECK14-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 7981 // CHECK14-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 7982 // CHECK14-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 7983 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 7984 // CHECK14-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 7985 // CHECK14-NEXT: br label [[EH_RESUME:%.*]] 7986 // CHECK14: omp_offload.cont: 7987 // CHECK14-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 7988 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 7989 // CHECK14-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 7990 // CHECK14-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 7991 // CHECK14-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7992 // CHECK14-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 7993 // CHECK14-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 7994 // CHECK14-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7995 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 7996 // CHECK14-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 7997 // CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 7998 // CHECK14-NEXT: store i8* null, i8** [[TMP11]], align 8 7999 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8000 // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8001 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 8002 // CHECK14-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8003 // CHECK14-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 8004 // CHECK14-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 8005 // CHECK14: omp_offload.failed2: 8006 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 8007 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT3]] 8008 // CHECK14: omp_offload.cont3: 8009 // CHECK14-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 8010 // CHECK14-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 8011 // CHECK14-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 8012 // CHECK14-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 8013 // CHECK14: invoke.cont5: 8014 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 8015 // CHECK14-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 8016 // CHECK14-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 8017 // CHECK14: invoke.cont7: 8018 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 8019 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 8020 // CHECK14-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 8021 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 8022 // CHECK14-NEXT: ret i32 [[TMP17]] 8023 // CHECK14: eh.resume: 8024 // CHECK14-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 8025 // CHECK14-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 8026 // CHECK14-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 8027 // CHECK14-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 8028 // CHECK14-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 8029 // 8030 // 8031 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SC1El 8032 // CHECK14-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 8033 // CHECK14-NEXT: entry: 8034 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8035 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8036 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8037 // CHECK14-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8038 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8039 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 8040 // CHECK14-NEXT: call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 8041 // CHECK14-NEXT: ret void 8042 // 8043 // 8044 // CHECK14-LABEL: define {{[^@]+}}@_ZN1ScvcEv 8045 // CHECK14-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 8046 // CHECK14-NEXT: entry: 8047 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8048 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8049 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8050 // CHECK14-NEXT: call void @_Z8mayThrowv() 8051 // CHECK14-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 8052 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 8053 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 8054 // CHECK14-NEXT: ret i8 [[CONV]] 8055 // 8056 // 8057 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 8058 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] { 8059 // CHECK14-NEXT: entry: 8060 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 8061 // CHECK14-NEXT: ret void 8062 // 8063 // 8064 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined. 8065 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 8066 // CHECK14-NEXT: entry: 8067 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8068 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8069 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8070 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 8071 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8072 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8073 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8074 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8075 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 8076 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8077 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8078 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8079 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8080 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8081 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8082 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8083 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8084 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8085 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8086 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 8087 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8088 // CHECK14: cond.true: 8089 // CHECK14-NEXT: br label [[COND_END:%.*]] 8090 // CHECK14: cond.false: 8091 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8092 // CHECK14-NEXT: br label [[COND_END]] 8093 // CHECK14: cond.end: 8094 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8095 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8096 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8097 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8098 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8099 // CHECK14: omp.inner.for.cond: 8100 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8101 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8102 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8103 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8104 // CHECK14: omp.inner.for.body: 8105 // CHECK14-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 8106 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8107 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 8108 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8109 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 8110 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 8111 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8112 // CHECK14: omp.inner.for.inc: 8113 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8114 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8115 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 8116 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8117 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 8118 // CHECK14: omp.inner.for.end: 8119 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8120 // CHECK14: omp.loop.exit: 8121 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8122 // CHECK14-NEXT: ret void 8123 // 8124 // 8125 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..1 8126 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 8127 // CHECK14-NEXT: entry: 8128 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8129 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8130 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8131 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8132 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8133 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 8134 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8135 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8136 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8137 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8138 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 8139 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8140 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8141 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8142 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8143 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8144 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 8145 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8146 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 8147 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8148 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 8149 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8150 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 8151 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8152 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8153 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8154 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 8155 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8156 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8157 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 8158 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8159 // CHECK14: cond.true: 8160 // CHECK14-NEXT: br label [[COND_END:%.*]] 8161 // CHECK14: cond.false: 8162 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8163 // CHECK14-NEXT: br label [[COND_END]] 8164 // CHECK14: cond.end: 8165 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 8166 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8167 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8168 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 8169 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8170 // CHECK14: omp.inner.for.cond: 8171 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8172 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8173 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 8174 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8175 // CHECK14: omp.inner.for.body: 8176 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8177 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 8178 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8179 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8180 // CHECK14-NEXT: invoke void @_Z3foov() 8181 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 8182 // CHECK14: invoke.cont: 8183 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8184 // CHECK14: omp.body.continue: 8185 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8186 // CHECK14: omp.inner.for.inc: 8187 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8188 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 8189 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 8190 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 8191 // CHECK14: omp.inner.for.end: 8192 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8193 // CHECK14: omp.loop.exit: 8194 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 8195 // CHECK14-NEXT: ret void 8196 // CHECK14: terminate.lpad: 8197 // CHECK14-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 8198 // CHECK14-NEXT: catch i8* null 8199 // CHECK14-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 8200 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 8201 // CHECK14-NEXT: unreachable 8202 // 8203 // 8204 // CHECK14-LABEL: define {{[^@]+}}@__clang_call_terminate 8205 // CHECK14-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 8206 // CHECK14-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 8207 // CHECK14-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 8208 // CHECK14-NEXT: unreachable 8209 // 8210 // 8211 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 8212 // CHECK14-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 8213 // CHECK14-NEXT: entry: 8214 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8215 // CHECK14-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8216 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 8217 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 8218 // CHECK14-NEXT: ret void 8219 // 8220 // 8221 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..2 8222 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 8223 // CHECK14-NEXT: entry: 8224 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8225 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8226 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 8227 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8228 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 8229 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8230 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8231 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8232 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8233 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 8234 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8235 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8236 // CHECK14-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 8237 // CHECK14-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 8238 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8239 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8240 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8241 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8242 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8243 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 8244 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8245 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8246 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 8247 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8248 // CHECK14: cond.true: 8249 // CHECK14-NEXT: br label [[COND_END:%.*]] 8250 // CHECK14: cond.false: 8251 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8252 // CHECK14-NEXT: br label [[COND_END]] 8253 // CHECK14: cond.end: 8254 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8255 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8256 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8257 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 8258 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8259 // CHECK14: omp.inner.for.cond: 8260 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8261 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8262 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8263 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8264 // CHECK14: omp.inner.for.body: 8265 // CHECK14-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 8266 // CHECK14-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 8267 // CHECK14-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 8268 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8269 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 8270 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8271 // CHECK14-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 8272 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 8273 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8274 // CHECK14: omp.inner.for.inc: 8275 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8276 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8277 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 8278 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8279 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 8280 // CHECK14: omp.inner.for.end: 8281 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8282 // CHECK14: omp.loop.exit: 8283 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 8284 // CHECK14-NEXT: ret void 8285 // 8286 // 8287 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..3 8288 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 8289 // CHECK14-NEXT: entry: 8290 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8291 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8292 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8293 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8294 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8295 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 8296 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8297 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8298 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8299 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8300 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 8301 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8302 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8303 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8304 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8305 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8306 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 8307 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8308 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 8309 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8310 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 8311 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8312 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 8313 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8314 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8315 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8316 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 8317 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8318 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8319 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 8320 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8321 // CHECK14: cond.true: 8322 // CHECK14-NEXT: br label [[COND_END:%.*]] 8323 // CHECK14: cond.false: 8324 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8325 // CHECK14-NEXT: br label [[COND_END]] 8326 // CHECK14: cond.end: 8327 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 8328 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8329 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8330 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 8331 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8332 // CHECK14: omp.inner.for.cond: 8333 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8334 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8335 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 8336 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8337 // CHECK14: omp.inner.for.body: 8338 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8339 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 8340 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8341 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8342 // CHECK14-NEXT: invoke void @_Z3foov() 8343 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 8344 // CHECK14: invoke.cont: 8345 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8346 // CHECK14: omp.body.continue: 8347 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8348 // CHECK14: omp.inner.for.inc: 8349 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8350 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 8351 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 8352 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 8353 // CHECK14: omp.inner.for.end: 8354 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8355 // CHECK14: omp.loop.exit: 8356 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 8357 // CHECK14-NEXT: ret void 8358 // CHECK14: terminate.lpad: 8359 // CHECK14-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 8360 // CHECK14-NEXT: catch i8* null 8361 // CHECK14-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 8362 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 8363 // CHECK14-NEXT: unreachable 8364 // 8365 // 8366 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 8367 // CHECK14-SAME: () #[[ATTR7:[0-9]+]] comdat { 8368 // CHECK14-NEXT: entry: 8369 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 8370 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 8371 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 8372 // CHECK14-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 8373 // CHECK14-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 8374 // CHECK14-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8375 // CHECK14: omp_offload.failed: 8376 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 8377 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] 8378 // CHECK14: omp_offload.cont: 8379 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 8380 // CHECK14-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 8381 // CHECK14-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 8382 // CHECK14-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 8383 // CHECK14: omp_offload.failed2: 8384 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 8385 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT3]] 8386 // CHECK14: omp_offload.cont3: 8387 // CHECK14-NEXT: ret i32 0 8388 // 8389 // 8390 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 8391 // CHECK14-SAME: () #[[ATTR7]] comdat { 8392 // CHECK14-NEXT: entry: 8393 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 8394 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 8395 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 8396 // CHECK14-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 8397 // CHECK14-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 8398 // CHECK14-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8399 // CHECK14: omp_offload.failed: 8400 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 8401 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] 8402 // CHECK14: omp_offload.cont: 8403 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 8404 // CHECK14-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 8405 // CHECK14-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 8406 // CHECK14-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 8407 // CHECK14: omp_offload.failed2: 8408 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 8409 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT3]] 8410 // CHECK14: omp_offload.cont3: 8411 // CHECK14-NEXT: ret i32 0 8412 // 8413 // 8414 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SD1Ev 8415 // CHECK14-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 8416 // CHECK14-NEXT: entry: 8417 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8418 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8419 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8420 // CHECK14-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]] 8421 // CHECK14-NEXT: ret void 8422 // 8423 // 8424 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SC2El 8425 // CHECK14-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 8426 // CHECK14-NEXT: entry: 8427 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8428 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8429 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8430 // CHECK14-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8431 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8432 // CHECK14-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 8433 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 8434 // CHECK14-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 8435 // CHECK14-NEXT: ret void 8436 // 8437 // 8438 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 8439 // CHECK14-SAME: () #[[ATTR3]] { 8440 // CHECK14-NEXT: entry: 8441 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 8442 // CHECK14-NEXT: ret void 8443 // 8444 // 8445 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..4 8446 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 8447 // CHECK14-NEXT: entry: 8448 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8449 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8450 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8451 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 8452 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8453 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8454 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8455 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8456 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 8457 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8458 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8459 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8460 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8461 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8462 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8463 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8464 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8465 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8466 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8467 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 8468 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8469 // CHECK14: cond.true: 8470 // CHECK14-NEXT: br label [[COND_END:%.*]] 8471 // CHECK14: cond.false: 8472 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8473 // CHECK14-NEXT: br label [[COND_END]] 8474 // CHECK14: cond.end: 8475 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8476 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8477 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8478 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8479 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8480 // CHECK14: omp.inner.for.cond: 8481 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8482 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8483 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8484 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8485 // CHECK14: omp.inner.for.body: 8486 // CHECK14-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 8487 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8488 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 8489 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8490 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 8491 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 8492 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8493 // CHECK14: omp.inner.for.inc: 8494 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8495 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8496 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 8497 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8498 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 8499 // CHECK14: omp.inner.for.end: 8500 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8501 // CHECK14: omp.loop.exit: 8502 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8503 // CHECK14-NEXT: ret void 8504 // 8505 // 8506 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..5 8507 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 8508 // CHECK14-NEXT: entry: 8509 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8510 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8511 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8512 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8513 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8514 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 8515 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8516 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8517 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8518 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8519 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 8520 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8521 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8522 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8523 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8524 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8525 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 8526 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8527 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 8528 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8529 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 8530 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8531 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 8532 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8533 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8534 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8535 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 8536 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8537 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8538 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 8539 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8540 // CHECK14: cond.true: 8541 // CHECK14-NEXT: br label [[COND_END:%.*]] 8542 // CHECK14: cond.false: 8543 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8544 // CHECK14-NEXT: br label [[COND_END]] 8545 // CHECK14: cond.end: 8546 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 8547 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8548 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8549 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 8550 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8551 // CHECK14: omp.inner.for.cond: 8552 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8553 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8554 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 8555 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8556 // CHECK14: omp.inner.for.body: 8557 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8558 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 8559 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8560 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8561 // CHECK14-NEXT: invoke void @_Z3foov() 8562 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 8563 // CHECK14: invoke.cont: 8564 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8565 // CHECK14: omp.body.continue: 8566 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8567 // CHECK14: omp.inner.for.inc: 8568 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8569 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 8570 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 8571 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 8572 // CHECK14: omp.inner.for.end: 8573 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8574 // CHECK14: omp.loop.exit: 8575 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 8576 // CHECK14-NEXT: ret void 8577 // CHECK14: terminate.lpad: 8578 // CHECK14-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 8579 // CHECK14-NEXT: catch i8* null 8580 // CHECK14-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 8581 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 8582 // CHECK14-NEXT: unreachable 8583 // 8584 // 8585 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 8586 // CHECK14-SAME: () #[[ATTR3]] { 8587 // CHECK14-NEXT: entry: 8588 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 8589 // CHECK14-NEXT: ret void 8590 // 8591 // 8592 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..6 8593 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 8594 // CHECK14-NEXT: entry: 8595 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8596 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8597 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8598 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 8599 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8600 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8601 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8602 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8603 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 8604 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8605 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8606 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8607 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8608 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8609 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8610 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8611 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8612 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8613 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8614 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 8615 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8616 // CHECK14: cond.true: 8617 // CHECK14-NEXT: br label [[COND_END:%.*]] 8618 // CHECK14: cond.false: 8619 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8620 // CHECK14-NEXT: br label [[COND_END]] 8621 // CHECK14: cond.end: 8622 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8623 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8624 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8625 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8626 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8627 // CHECK14: omp.inner.for.cond: 8628 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8629 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8630 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8631 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8632 // CHECK14: omp.inner.for.body: 8633 // CHECK14-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 8634 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8635 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 8636 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8637 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 8638 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 8639 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8640 // CHECK14: omp.inner.for.inc: 8641 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8642 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8643 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 8644 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8645 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 8646 // CHECK14: omp.inner.for.end: 8647 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8648 // CHECK14: omp.loop.exit: 8649 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8650 // CHECK14-NEXT: ret void 8651 // 8652 // 8653 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..7 8654 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 8655 // CHECK14-NEXT: entry: 8656 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8657 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8658 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8659 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8660 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8661 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 8662 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8663 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8664 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8665 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8666 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 8667 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8668 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8669 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8670 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8671 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8672 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 8673 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8674 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 8675 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8676 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 8677 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8678 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 8679 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8680 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8681 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8682 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 8683 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8684 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8685 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 8686 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8687 // CHECK14: cond.true: 8688 // CHECK14-NEXT: br label [[COND_END:%.*]] 8689 // CHECK14: cond.false: 8690 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8691 // CHECK14-NEXT: br label [[COND_END]] 8692 // CHECK14: cond.end: 8693 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 8694 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8695 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8696 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 8697 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8698 // CHECK14: omp.inner.for.cond: 8699 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8700 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8701 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 8702 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8703 // CHECK14: omp.inner.for.body: 8704 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8705 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 8706 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8707 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8708 // CHECK14-NEXT: invoke void @_Z3foov() 8709 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 8710 // CHECK14: invoke.cont: 8711 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8712 // CHECK14: omp.body.continue: 8713 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8714 // CHECK14: omp.inner.for.inc: 8715 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8716 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 8717 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 8718 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 8719 // CHECK14: omp.inner.for.end: 8720 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8721 // CHECK14: omp.loop.exit: 8722 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 8723 // CHECK14-NEXT: ret void 8724 // CHECK14: terminate.lpad: 8725 // CHECK14-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 8726 // CHECK14-NEXT: catch i8* null 8727 // CHECK14-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 8728 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 8729 // CHECK14-NEXT: unreachable 8730 // 8731 // 8732 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 8733 // CHECK14-SAME: () #[[ATTR3]] { 8734 // CHECK14-NEXT: entry: 8735 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 8736 // CHECK14-NEXT: ret void 8737 // 8738 // 8739 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..8 8740 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 8741 // CHECK14-NEXT: entry: 8742 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8743 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8744 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8745 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 8746 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8747 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8748 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8749 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8750 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 8751 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8752 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8753 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8754 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8755 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8756 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8757 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8758 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8759 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8760 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8761 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 8762 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8763 // CHECK14: cond.true: 8764 // CHECK14-NEXT: br label [[COND_END:%.*]] 8765 // CHECK14: cond.false: 8766 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8767 // CHECK14-NEXT: br label [[COND_END]] 8768 // CHECK14: cond.end: 8769 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8770 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8771 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8772 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8773 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8774 // CHECK14: omp.inner.for.cond: 8775 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8776 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8777 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8778 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8779 // CHECK14: omp.inner.for.body: 8780 // CHECK14-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 8781 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8782 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 8783 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8784 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 8785 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 8786 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8787 // CHECK14: omp.inner.for.inc: 8788 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8789 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8790 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 8791 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8792 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 8793 // CHECK14: omp.inner.for.end: 8794 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8795 // CHECK14: omp.loop.exit: 8796 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8797 // CHECK14-NEXT: ret void 8798 // 8799 // 8800 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..9 8801 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 8802 // CHECK14-NEXT: entry: 8803 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8804 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8805 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8806 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8807 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8808 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 8809 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8810 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8811 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8812 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8813 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 8814 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8815 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8816 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8817 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8818 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8819 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 8820 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8821 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 8822 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8823 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 8824 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8825 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 8826 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8827 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8828 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8829 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 8830 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8831 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8832 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 8833 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8834 // CHECK14: cond.true: 8835 // CHECK14-NEXT: br label [[COND_END:%.*]] 8836 // CHECK14: cond.false: 8837 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8838 // CHECK14-NEXT: br label [[COND_END]] 8839 // CHECK14: cond.end: 8840 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 8841 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8842 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8843 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 8844 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8845 // CHECK14: omp.inner.for.cond: 8846 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8847 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8848 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 8849 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8850 // CHECK14: omp.inner.for.body: 8851 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8852 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 8853 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8854 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8855 // CHECK14-NEXT: invoke void @_Z3foov() 8856 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 8857 // CHECK14: invoke.cont: 8858 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8859 // CHECK14: omp.body.continue: 8860 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8861 // CHECK14: omp.inner.for.inc: 8862 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8863 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 8864 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 8865 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 8866 // CHECK14: omp.inner.for.end: 8867 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8868 // CHECK14: omp.loop.exit: 8869 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 8870 // CHECK14-NEXT: ret void 8871 // CHECK14: terminate.lpad: 8872 // CHECK14-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 8873 // CHECK14-NEXT: catch i8* null 8874 // CHECK14-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 8875 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 8876 // CHECK14-NEXT: unreachable 8877 // 8878 // 8879 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 8880 // CHECK14-SAME: () #[[ATTR3]] { 8881 // CHECK14-NEXT: entry: 8882 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 8883 // CHECK14-NEXT: ret void 8884 // 8885 // 8886 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..10 8887 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 8888 // CHECK14-NEXT: entry: 8889 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8890 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8891 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8892 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 8893 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8894 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8895 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8896 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8897 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 8898 // CHECK14-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 8899 // CHECK14-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 8900 // CHECK14-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 8901 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8902 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8903 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8904 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8905 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8906 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8907 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8908 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8909 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8910 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8911 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 8912 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8913 // CHECK14: cond.true: 8914 // CHECK14-NEXT: br label [[COND_END:%.*]] 8915 // CHECK14: cond.false: 8916 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8917 // CHECK14-NEXT: br label [[COND_END]] 8918 // CHECK14: cond.end: 8919 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8920 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8921 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8922 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8923 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8924 // CHECK14: omp.inner.for.cond: 8925 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8926 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8927 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8928 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8929 // CHECK14: omp.inner.for.body: 8930 // CHECK14-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23) 8931 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 8932 // CHECK14: invoke.cont: 8933 // CHECK14-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) 8934 // CHECK14-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 8935 // CHECK14: invoke.cont2: 8936 // CHECK14-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 8937 // CHECK14-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 8938 // CHECK14-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 8939 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8940 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 8941 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8942 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 8943 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 8944 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8945 // CHECK14: omp.inner.for.inc: 8946 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8947 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8948 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 8949 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8950 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 8951 // CHECK14: lpad: 8952 // CHECK14-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 8953 // CHECK14-NEXT: catch i8* null 8954 // CHECK14-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 8955 // CHECK14-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 8956 // CHECK14-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 8957 // CHECK14-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 8958 // CHECK14-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 8959 // CHECK14-NEXT: br label [[TERMINATE_HANDLER:%.*]] 8960 // CHECK14: omp.inner.for.end: 8961 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8962 // CHECK14: omp.loop.exit: 8963 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8964 // CHECK14-NEXT: ret void 8965 // CHECK14: terminate.lpad: 8966 // CHECK14-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 8967 // CHECK14-NEXT: catch i8* null 8968 // CHECK14-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 8969 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 8970 // CHECK14-NEXT: unreachable 8971 // CHECK14: terminate.handler: 8972 // CHECK14-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 8973 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 8974 // CHECK14-NEXT: unreachable 8975 // 8976 // 8977 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..11 8978 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 8979 // CHECK14-NEXT: entry: 8980 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8981 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8982 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8983 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8984 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8985 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 8986 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8987 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8988 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8989 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8990 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 8991 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8992 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8993 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8994 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8995 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8996 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 8997 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8998 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 8999 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9000 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9001 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9002 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9003 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9004 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9005 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9006 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 9007 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9008 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9009 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 9010 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9011 // CHECK14: cond.true: 9012 // CHECK14-NEXT: br label [[COND_END:%.*]] 9013 // CHECK14: cond.false: 9014 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9015 // CHECK14-NEXT: br label [[COND_END]] 9016 // CHECK14: cond.end: 9017 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 9018 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9019 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9020 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 9021 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9022 // CHECK14: omp.inner.for.cond: 9023 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9024 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9025 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 9026 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9027 // CHECK14: omp.inner.for.body: 9028 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9029 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 9030 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9031 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9032 // CHECK14-NEXT: invoke void @_Z3foov() 9033 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 9034 // CHECK14: invoke.cont: 9035 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9036 // CHECK14: omp.body.continue: 9037 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9038 // CHECK14: omp.inner.for.inc: 9039 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9040 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 9041 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9042 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 9043 // CHECK14: omp.inner.for.end: 9044 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9045 // CHECK14: omp.loop.exit: 9046 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 9047 // CHECK14-NEXT: ret void 9048 // CHECK14: terminate.lpad: 9049 // CHECK14-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 9050 // CHECK14-NEXT: catch i8* null 9051 // CHECK14-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 9052 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 9053 // CHECK14-NEXT: unreachable 9054 // 9055 // 9056 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SD2Ev 9057 // CHECK14-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 9058 // CHECK14-NEXT: entry: 9059 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 9060 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 9061 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 9062 // CHECK14-NEXT: ret void 9063 // 9064 // 9065 // CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 9066 // CHECK14-SAME: () #[[ATTR9:[0-9]+]] { 9067 // CHECK14-NEXT: entry: 9068 // CHECK14-NEXT: call void @__tgt_register_requires(i64 1) 9069 // CHECK14-NEXT: ret void 9070 // 9071 //