1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 6 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK3 7 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 8 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 9 10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK5 11 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 12 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 13 14 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK7 15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 16 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 17 18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK9 19 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 21 22 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK11 23 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 24 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 25 26 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK13 27 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 29 30 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK15 31 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 32 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 33 34 // expected-no-diagnostics 35 #ifndef HEADER 36 #define HEADER 37 38 typedef __INTPTR_TYPE__ intptr_t; 39 40 41 void foo(); 42 43 struct S { 44 intptr_t a, b, c; 45 S(intptr_t a) : a(a) {} 46 operator char() { extern void mayThrow(); mayThrow(); return a; } 47 ~S() {} 48 }; 49 50 template <typename T, int C> 51 int tmain() { 52 #pragma omp target 53 #pragma omp teams 54 #pragma omp distribute parallel for num_threads(C) 55 for (int i = 0; i < 100; i++) 56 foo(); 57 #pragma omp target 58 #pragma omp teams 59 #pragma omp distribute parallel for num_threads(T(23)) 60 for (int i = 0; i < 100; i++) 61 foo(); 62 return 0; 63 } 64 65 int main() { 66 S s(0); 67 char a = s; 68 #pragma omp target 69 #pragma omp teams 70 #pragma omp distribute parallel for num_threads(2) 71 for (int i = 0; i < 100; i++) { 72 foo(); 73 } 74 #pragma omp target 75 #pragma omp teams 76 77 #pragma omp distribute parallel for num_threads(a) 78 for (int i = 0; i < 100; i++) { 79 foo(); 80 } 81 return a + tmain<char, 5>() + tmain<S, 1>(); 82 } 83 84 // tmain 5 85 86 // tmain 1 87 88 89 90 91 92 93 94 95 #endif 96 // CHECK1-LABEL: define {{[^@]+}}@main 97 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 98 // CHECK1-NEXT: entry: 99 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 100 // CHECK1-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 101 // CHECK1-NEXT: [[A:%.*]] = alloca i8, align 1 102 // CHECK1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 103 // CHECK1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 104 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 105 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 106 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 107 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 108 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 109 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 110 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 111 // CHECK1-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 112 // CHECK1-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 113 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 114 // CHECK1: invoke.cont: 115 // CHECK1-NEXT: store i8 [[CALL]], i8* [[A]], align 1 116 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 117 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 118 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 119 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 120 // CHECK1: omp_offload.failed: 121 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 122 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 123 // CHECK1: lpad: 124 // CHECK1-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 125 // CHECK1-NEXT: cleanup 126 // CHECK1-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 127 // CHECK1-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 128 // CHECK1-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 129 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 130 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 131 // CHECK1-NEXT: br label [[EH_RESUME:%.*]] 132 // CHECK1: omp_offload.cont: 133 // CHECK1-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 134 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 135 // CHECK1-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 136 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 137 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 138 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 139 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 140 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 141 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 142 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 143 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 144 // CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8 145 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 146 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 147 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 148 // CHECK1-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 149 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 150 // CHECK1-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 151 // CHECK1: omp_offload.failed2: 152 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 153 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 154 // CHECK1: omp_offload.cont3: 155 // CHECK1-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 156 // CHECK1-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 157 // CHECK1-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 158 // CHECK1-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 159 // CHECK1: invoke.cont5: 160 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 161 // CHECK1-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 162 // CHECK1-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 163 // CHECK1: invoke.cont7: 164 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 165 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 166 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 167 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 168 // CHECK1-NEXT: ret i32 [[TMP17]] 169 // CHECK1: eh.resume: 170 // CHECK1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 171 // CHECK1-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 172 // CHECK1-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 173 // CHECK1-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 174 // CHECK1-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 175 // 176 // 177 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1El 178 // CHECK1-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 179 // CHECK1-NEXT: entry: 180 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 181 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 182 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 183 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 184 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 185 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 186 // CHECK1-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 187 // CHECK1-NEXT: ret void 188 // 189 // 190 // CHECK1-LABEL: define {{[^@]+}}@_ZN1ScvcEv 191 // CHECK1-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 192 // CHECK1-NEXT: entry: 193 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 194 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 195 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 196 // CHECK1-NEXT: call void @_Z8mayThrowv() 197 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 198 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 199 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 200 // CHECK1-NEXT: ret i8 [[CONV]] 201 // 202 // 203 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 204 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 205 // CHECK1-NEXT: entry: 206 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 207 // CHECK1-NEXT: ret void 208 // 209 // 210 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 211 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 212 // CHECK1-NEXT: entry: 213 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 214 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 215 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 216 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 217 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 218 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 219 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 220 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 221 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 222 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 223 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 224 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 225 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 226 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 227 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 228 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 229 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 230 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 231 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 232 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 233 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 234 // CHECK1: cond.true: 235 // CHECK1-NEXT: br label [[COND_END:%.*]] 236 // CHECK1: cond.false: 237 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 238 // CHECK1-NEXT: br label [[COND_END]] 239 // CHECK1: cond.end: 240 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 241 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 242 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 243 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 244 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 245 // CHECK1: omp.inner.for.cond: 246 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 247 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 248 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 249 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 250 // CHECK1: omp.inner.for.body: 251 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 252 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 253 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 254 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 255 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 256 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 257 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 258 // CHECK1: omp.inner.for.inc: 259 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 260 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 261 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 262 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 263 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 264 // CHECK1: omp.inner.for.end: 265 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 266 // CHECK1: omp.loop.exit: 267 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 268 // CHECK1-NEXT: ret void 269 // 270 // 271 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 272 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 273 // CHECK1-NEXT: entry: 274 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 275 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 276 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 277 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 278 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 279 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 280 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 281 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 282 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 283 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 284 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 285 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 286 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 287 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 288 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 289 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 290 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 291 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 292 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 293 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 294 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 295 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 296 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 297 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 298 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 299 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 300 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 301 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 302 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 303 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 304 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 305 // CHECK1: cond.true: 306 // CHECK1-NEXT: br label [[COND_END:%.*]] 307 // CHECK1: cond.false: 308 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 309 // CHECK1-NEXT: br label [[COND_END]] 310 // CHECK1: cond.end: 311 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 312 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 313 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 314 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 315 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 316 // CHECK1: omp.inner.for.cond: 317 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 318 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 319 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 320 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 321 // CHECK1: omp.inner.for.body: 322 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 323 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 324 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 325 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 326 // CHECK1-NEXT: invoke void @_Z3foov() 327 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 328 // CHECK1: invoke.cont: 329 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 330 // CHECK1: omp.body.continue: 331 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 332 // CHECK1: omp.inner.for.inc: 333 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 334 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 335 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 336 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 337 // CHECK1: omp.inner.for.end: 338 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 339 // CHECK1: omp.loop.exit: 340 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 341 // CHECK1-NEXT: ret void 342 // CHECK1: terminate.lpad: 343 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 344 // CHECK1-NEXT: catch i8* null 345 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 346 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 347 // CHECK1-NEXT: unreachable 348 // 349 // 350 // CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate 351 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 352 // CHECK1-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 353 // CHECK1-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 354 // CHECK1-NEXT: unreachable 355 // 356 // 357 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 358 // CHECK1-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 359 // CHECK1-NEXT: entry: 360 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 361 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 362 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 363 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 364 // CHECK1-NEXT: ret void 365 // 366 // 367 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 368 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 369 // CHECK1-NEXT: entry: 370 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 371 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 372 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 373 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 374 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 375 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 376 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 377 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 378 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 379 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 380 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 381 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 382 // CHECK1-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 383 // CHECK1-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 384 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 385 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 386 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 387 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 388 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 389 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 390 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 391 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 392 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 393 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 394 // CHECK1: cond.true: 395 // CHECK1-NEXT: br label [[COND_END:%.*]] 396 // CHECK1: cond.false: 397 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 398 // CHECK1-NEXT: br label [[COND_END]] 399 // CHECK1: cond.end: 400 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 401 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 402 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 403 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 404 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 405 // CHECK1: omp.inner.for.cond: 406 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 407 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 408 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 409 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 410 // CHECK1: omp.inner.for.body: 411 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 412 // CHECK1-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 413 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 414 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 415 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 416 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 417 // CHECK1-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 418 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 419 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 420 // CHECK1: omp.inner.for.inc: 421 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 422 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 423 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 424 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 425 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 426 // CHECK1: omp.inner.for.end: 427 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 428 // CHECK1: omp.loop.exit: 429 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 430 // CHECK1-NEXT: ret void 431 // 432 // 433 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 434 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 435 // CHECK1-NEXT: entry: 436 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 437 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 438 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 439 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 440 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 441 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 442 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 443 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 444 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 445 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 446 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 447 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 448 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 449 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 450 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 451 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 452 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 453 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 454 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 455 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 456 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 457 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 458 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 459 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 460 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 461 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 462 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 463 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 464 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 465 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 466 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 467 // CHECK1: cond.true: 468 // CHECK1-NEXT: br label [[COND_END:%.*]] 469 // CHECK1: cond.false: 470 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 471 // CHECK1-NEXT: br label [[COND_END]] 472 // CHECK1: cond.end: 473 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 474 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 475 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 476 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 477 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 478 // CHECK1: omp.inner.for.cond: 479 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 480 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 481 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 482 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 483 // CHECK1: omp.inner.for.body: 484 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 485 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 486 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 487 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 488 // CHECK1-NEXT: invoke void @_Z3foov() 489 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 490 // CHECK1: invoke.cont: 491 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 492 // CHECK1: omp.body.continue: 493 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 494 // CHECK1: omp.inner.for.inc: 495 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 496 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 497 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 498 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 499 // CHECK1: omp.inner.for.end: 500 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 501 // CHECK1: omp.loop.exit: 502 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 503 // CHECK1-NEXT: ret void 504 // CHECK1: terminate.lpad: 505 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 506 // CHECK1-NEXT: catch i8* null 507 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 508 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 509 // CHECK1-NEXT: unreachable 510 // 511 // 512 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 513 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] comdat { 514 // CHECK1-NEXT: entry: 515 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 516 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 517 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 518 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 519 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 520 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 521 // CHECK1: omp_offload.failed: 522 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 523 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 524 // CHECK1: omp_offload.cont: 525 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 526 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 527 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 528 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 529 // CHECK1: omp_offload.failed2: 530 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 531 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 532 // CHECK1: omp_offload.cont3: 533 // CHECK1-NEXT: ret i32 0 534 // 535 // 536 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 537 // CHECK1-SAME: () #[[ATTR7]] comdat { 538 // CHECK1-NEXT: entry: 539 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 540 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 541 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 542 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 543 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 544 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 545 // CHECK1: omp_offload.failed: 546 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 547 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 548 // CHECK1: omp_offload.cont: 549 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 550 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 551 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 552 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 553 // CHECK1: omp_offload.failed2: 554 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 555 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 556 // CHECK1: omp_offload.cont3: 557 // CHECK1-NEXT: ret i32 0 558 // 559 // 560 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD1Ev 561 // CHECK1-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 562 // CHECK1-NEXT: entry: 563 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 564 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 565 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 566 // CHECK1-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR6]] 567 // CHECK1-NEXT: ret void 568 // 569 // 570 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2El 571 // CHECK1-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 572 // CHECK1-NEXT: entry: 573 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 574 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 575 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 576 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 577 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 578 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 579 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 580 // CHECK1-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 581 // CHECK1-NEXT: ret void 582 // 583 // 584 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD2Ev 585 // CHECK1-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 586 // CHECK1-NEXT: entry: 587 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 588 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 589 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 590 // CHECK1-NEXT: ret void 591 // 592 // 593 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 594 // CHECK1-SAME: () #[[ATTR3]] { 595 // CHECK1-NEXT: entry: 596 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 597 // CHECK1-NEXT: ret void 598 // 599 // 600 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 601 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 602 // CHECK1-NEXT: entry: 603 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 604 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 605 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 606 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 607 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 608 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 609 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 610 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 611 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 612 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 613 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 614 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 615 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 616 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 617 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 618 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 619 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 620 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 621 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 622 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 623 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 624 // CHECK1: cond.true: 625 // CHECK1-NEXT: br label [[COND_END:%.*]] 626 // CHECK1: cond.false: 627 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 628 // CHECK1-NEXT: br label [[COND_END]] 629 // CHECK1: cond.end: 630 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 631 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 632 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 633 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 634 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 635 // CHECK1: omp.inner.for.cond: 636 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 637 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 638 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 639 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 640 // CHECK1: omp.inner.for.body: 641 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 642 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 643 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 644 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 645 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 646 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 647 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 648 // CHECK1: omp.inner.for.inc: 649 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 650 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 651 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 652 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 653 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 654 // CHECK1: omp.inner.for.end: 655 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 656 // CHECK1: omp.loop.exit: 657 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 658 // CHECK1-NEXT: ret void 659 // 660 // 661 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 662 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 663 // CHECK1-NEXT: entry: 664 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 665 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 666 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 667 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 668 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 669 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 670 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 671 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 672 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 673 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 674 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 675 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 676 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 677 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 678 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 679 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 680 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 681 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 682 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 683 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 684 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 685 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 686 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 687 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 688 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 689 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 690 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 691 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 692 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 693 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 694 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 695 // CHECK1: cond.true: 696 // CHECK1-NEXT: br label [[COND_END:%.*]] 697 // CHECK1: cond.false: 698 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 699 // CHECK1-NEXT: br label [[COND_END]] 700 // CHECK1: cond.end: 701 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 702 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 703 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 704 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 705 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 706 // CHECK1: omp.inner.for.cond: 707 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 708 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 709 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 710 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 711 // CHECK1: omp.inner.for.body: 712 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 713 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 714 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 715 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 716 // CHECK1-NEXT: invoke void @_Z3foov() 717 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 718 // CHECK1: invoke.cont: 719 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 720 // CHECK1: omp.body.continue: 721 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 722 // CHECK1: omp.inner.for.inc: 723 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 724 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 725 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 726 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 727 // CHECK1: omp.inner.for.end: 728 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 729 // CHECK1: omp.loop.exit: 730 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 731 // CHECK1-NEXT: ret void 732 // CHECK1: terminate.lpad: 733 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 734 // CHECK1-NEXT: catch i8* null 735 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 736 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 737 // CHECK1-NEXT: unreachable 738 // 739 // 740 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 741 // CHECK1-SAME: () #[[ATTR3]] { 742 // CHECK1-NEXT: entry: 743 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 744 // CHECK1-NEXT: ret void 745 // 746 // 747 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 748 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 749 // CHECK1-NEXT: entry: 750 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 751 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 752 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 753 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 754 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 755 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 756 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 757 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 758 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 759 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 760 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 761 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 762 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 763 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 764 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 765 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 766 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 767 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 768 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 769 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 770 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 771 // CHECK1: cond.true: 772 // CHECK1-NEXT: br label [[COND_END:%.*]] 773 // CHECK1: cond.false: 774 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 775 // CHECK1-NEXT: br label [[COND_END]] 776 // CHECK1: cond.end: 777 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 778 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 779 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 780 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 781 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 782 // CHECK1: omp.inner.for.cond: 783 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 784 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 785 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 786 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 787 // CHECK1: omp.inner.for.body: 788 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 789 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 790 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 791 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 792 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 793 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 794 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 795 // CHECK1: omp.inner.for.inc: 796 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 797 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 798 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 799 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 800 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 801 // CHECK1: omp.inner.for.end: 802 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 803 // CHECK1: omp.loop.exit: 804 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 805 // CHECK1-NEXT: ret void 806 // 807 // 808 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 809 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 810 // CHECK1-NEXT: entry: 811 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 812 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 813 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 814 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 815 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 816 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 817 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 818 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 819 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 820 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 821 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 822 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 823 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 824 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 825 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 826 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 827 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 828 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 829 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 830 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 831 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 832 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 833 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 834 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 835 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 836 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 837 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 838 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 839 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 840 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 841 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 842 // CHECK1: cond.true: 843 // CHECK1-NEXT: br label [[COND_END:%.*]] 844 // CHECK1: cond.false: 845 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 846 // CHECK1-NEXT: br label [[COND_END]] 847 // CHECK1: cond.end: 848 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 849 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 850 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 851 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 852 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 853 // CHECK1: omp.inner.for.cond: 854 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 855 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 856 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 857 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 858 // CHECK1: omp.inner.for.body: 859 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 860 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 861 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 862 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 863 // CHECK1-NEXT: invoke void @_Z3foov() 864 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 865 // CHECK1: invoke.cont: 866 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 867 // CHECK1: omp.body.continue: 868 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 869 // CHECK1: omp.inner.for.inc: 870 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 871 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 872 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 873 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 874 // CHECK1: omp.inner.for.end: 875 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 876 // CHECK1: omp.loop.exit: 877 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 878 // CHECK1-NEXT: ret void 879 // CHECK1: terminate.lpad: 880 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 881 // CHECK1-NEXT: catch i8* null 882 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 883 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 884 // CHECK1-NEXT: unreachable 885 // 886 // 887 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 888 // CHECK1-SAME: () #[[ATTR3]] { 889 // CHECK1-NEXT: entry: 890 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 891 // CHECK1-NEXT: ret void 892 // 893 // 894 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 895 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 896 // CHECK1-NEXT: entry: 897 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 898 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 899 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 900 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 901 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 902 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 903 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 904 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 905 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 906 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 907 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 908 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 909 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 910 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 911 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 912 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 913 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 914 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 915 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 916 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 917 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 918 // CHECK1: cond.true: 919 // CHECK1-NEXT: br label [[COND_END:%.*]] 920 // CHECK1: cond.false: 921 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 922 // CHECK1-NEXT: br label [[COND_END]] 923 // CHECK1: cond.end: 924 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 925 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 926 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 927 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 928 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 929 // CHECK1: omp.inner.for.cond: 930 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 931 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 932 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 933 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 934 // CHECK1: omp.inner.for.body: 935 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 936 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 937 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 938 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 939 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 940 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 941 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 942 // CHECK1: omp.inner.for.inc: 943 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 944 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 945 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 946 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 947 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 948 // CHECK1: omp.inner.for.end: 949 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 950 // CHECK1: omp.loop.exit: 951 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 952 // CHECK1-NEXT: ret void 953 // 954 // 955 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9 956 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 957 // CHECK1-NEXT: entry: 958 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 959 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 960 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 961 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 962 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 963 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 964 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 965 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 966 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 967 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 968 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 969 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 970 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 971 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 972 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 973 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 974 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 975 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 976 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 977 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 978 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 979 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 980 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 981 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 982 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 983 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 984 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 985 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 986 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 987 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 988 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 989 // CHECK1: cond.true: 990 // CHECK1-NEXT: br label [[COND_END:%.*]] 991 // CHECK1: cond.false: 992 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 993 // CHECK1-NEXT: br label [[COND_END]] 994 // CHECK1: cond.end: 995 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 996 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 997 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 998 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 999 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1000 // CHECK1: omp.inner.for.cond: 1001 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1002 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1003 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1004 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1005 // CHECK1: omp.inner.for.body: 1006 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1007 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1008 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1009 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1010 // CHECK1-NEXT: invoke void @_Z3foov() 1011 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1012 // CHECK1: invoke.cont: 1013 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1014 // CHECK1: omp.body.continue: 1015 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1016 // CHECK1: omp.inner.for.inc: 1017 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1018 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1019 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1020 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1021 // CHECK1: omp.inner.for.end: 1022 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1023 // CHECK1: omp.loop.exit: 1024 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1025 // CHECK1-NEXT: ret void 1026 // CHECK1: terminate.lpad: 1027 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1028 // CHECK1-NEXT: catch i8* null 1029 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1030 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 1031 // CHECK1-NEXT: unreachable 1032 // 1033 // 1034 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 1035 // CHECK1-SAME: () #[[ATTR3]] { 1036 // CHECK1-NEXT: entry: 1037 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 1038 // CHECK1-NEXT: ret void 1039 // 1040 // 1041 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 1042 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1043 // CHECK1-NEXT: entry: 1044 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1045 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1046 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1047 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1048 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1049 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1050 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1051 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1052 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1053 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 1054 // CHECK1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 1055 // CHECK1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 1056 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1057 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1058 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1059 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1060 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1061 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1062 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1063 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1064 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1065 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1066 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1067 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1068 // CHECK1: cond.true: 1069 // CHECK1-NEXT: br label [[COND_END:%.*]] 1070 // CHECK1: cond.false: 1071 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1072 // CHECK1-NEXT: br label [[COND_END]] 1073 // CHECK1: cond.end: 1074 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1075 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1076 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1077 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1078 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1079 // CHECK1: omp.inner.for.cond: 1080 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1081 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1082 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1083 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1084 // CHECK1: omp.inner.for.body: 1085 // CHECK1-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[REF_TMP]], i64 23) 1086 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1087 // CHECK1: invoke.cont: 1088 // CHECK1-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) 1089 // CHECK1-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 1090 // CHECK1: invoke.cont2: 1091 // CHECK1-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 1092 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 1093 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 1094 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1095 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1096 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1097 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1098 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 1099 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1100 // CHECK1: omp.inner.for.inc: 1101 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1102 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1103 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1104 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1105 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1106 // CHECK1: lpad: 1107 // CHECK1-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 1108 // CHECK1-NEXT: catch i8* null 1109 // CHECK1-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 1110 // CHECK1-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 1111 // CHECK1-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 1112 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 1113 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 1114 // CHECK1-NEXT: br label [[TERMINATE_HANDLER:%.*]] 1115 // CHECK1: omp.inner.for.end: 1116 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1117 // CHECK1: omp.loop.exit: 1118 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1119 // CHECK1-NEXT: ret void 1120 // CHECK1: terminate.lpad: 1121 // CHECK1-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 1122 // CHECK1-NEXT: catch i8* null 1123 // CHECK1-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 1124 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 1125 // CHECK1-NEXT: unreachable 1126 // CHECK1: terminate.handler: 1127 // CHECK1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 1128 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 1129 // CHECK1-NEXT: unreachable 1130 // 1131 // 1132 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 1133 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1134 // CHECK1-NEXT: entry: 1135 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1136 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1137 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1138 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1139 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1140 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1141 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1142 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1143 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1144 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1145 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1146 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1147 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1148 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1149 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1150 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1151 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1152 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1153 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1154 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1155 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1156 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1157 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1158 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1159 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1160 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1161 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1162 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1163 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1164 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1165 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1166 // CHECK1: cond.true: 1167 // CHECK1-NEXT: br label [[COND_END:%.*]] 1168 // CHECK1: cond.false: 1169 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1170 // CHECK1-NEXT: br label [[COND_END]] 1171 // CHECK1: cond.end: 1172 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1173 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1174 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1175 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1176 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1177 // CHECK1: omp.inner.for.cond: 1178 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1179 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1180 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1181 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1182 // CHECK1: omp.inner.for.body: 1183 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1184 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1185 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1186 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1187 // CHECK1-NEXT: invoke void @_Z3foov() 1188 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1189 // CHECK1: invoke.cont: 1190 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1191 // CHECK1: omp.body.continue: 1192 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1193 // CHECK1: omp.inner.for.inc: 1194 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1195 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1196 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1197 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1198 // CHECK1: omp.inner.for.end: 1199 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1200 // CHECK1: omp.loop.exit: 1201 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1202 // CHECK1-NEXT: ret void 1203 // CHECK1: terminate.lpad: 1204 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1205 // CHECK1-NEXT: catch i8* null 1206 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1207 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 1208 // CHECK1-NEXT: unreachable 1209 // 1210 // 1211 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1212 // CHECK1-SAME: () #[[ATTR9:[0-9]+]] { 1213 // CHECK1-NEXT: entry: 1214 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 1215 // CHECK1-NEXT: ret void 1216 // 1217 // 1218 // CHECK2-LABEL: define {{[^@]+}}@main 1219 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1220 // CHECK2-NEXT: entry: 1221 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1222 // CHECK2-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 1223 // CHECK2-NEXT: [[A:%.*]] = alloca i8, align 1 1224 // CHECK2-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 1225 // CHECK2-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 1226 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1227 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1228 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1229 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1230 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1231 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1232 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 1233 // CHECK2-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 1234 // CHECK2-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 1235 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 1236 // CHECK2: invoke.cont: 1237 // CHECK2-NEXT: store i8 [[CALL]], i8* [[A]], align 1 1238 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 1239 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1240 // CHECK2-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 1241 // CHECK2-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1242 // CHECK2: omp_offload.failed: 1243 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 1244 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 1245 // CHECK2: lpad: 1246 // CHECK2-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 1247 // CHECK2-NEXT: cleanup 1248 // CHECK2-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 1249 // CHECK2-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 1250 // CHECK2-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 1251 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 1252 // CHECK2-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 1253 // CHECK2-NEXT: br label [[EH_RESUME:%.*]] 1254 // CHECK2: omp_offload.cont: 1255 // CHECK2-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 1256 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 1257 // CHECK2-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 1258 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 1259 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1260 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1261 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 1262 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1263 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1264 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 1265 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1266 // CHECK2-NEXT: store i8* null, i8** [[TMP11]], align 8 1267 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1268 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1269 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1270 // CHECK2-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1271 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 1272 // CHECK2-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 1273 // CHECK2: omp_offload.failed2: 1274 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 1275 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT3]] 1276 // CHECK2: omp_offload.cont3: 1277 // CHECK2-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 1278 // CHECK2-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 1279 // CHECK2-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 1280 // CHECK2-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 1281 // CHECK2: invoke.cont5: 1282 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 1283 // CHECK2-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 1284 // CHECK2-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 1285 // CHECK2: invoke.cont7: 1286 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 1287 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 1288 // CHECK2-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 1289 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 1290 // CHECK2-NEXT: ret i32 [[TMP17]] 1291 // CHECK2: eh.resume: 1292 // CHECK2-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 1293 // CHECK2-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 1294 // CHECK2-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 1295 // CHECK2-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 1296 // CHECK2-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 1297 // 1298 // 1299 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SC1El 1300 // CHECK2-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1301 // CHECK2-NEXT: entry: 1302 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1303 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1304 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1305 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1306 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1307 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 1308 // CHECK2-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 1309 // CHECK2-NEXT: ret void 1310 // 1311 // 1312 // CHECK2-LABEL: define {{[^@]+}}@_ZN1ScvcEv 1313 // CHECK2-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 1314 // CHECK2-NEXT: entry: 1315 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1316 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1317 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1318 // CHECK2-NEXT: call void @_Z8mayThrowv() 1319 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1320 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 1321 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 1322 // CHECK2-NEXT: ret i8 [[CONV]] 1323 // 1324 // 1325 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 1326 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { 1327 // CHECK2-NEXT: entry: 1328 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1329 // CHECK2-NEXT: ret void 1330 // 1331 // 1332 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 1333 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1334 // CHECK2-NEXT: entry: 1335 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1336 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1337 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1338 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1339 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1340 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1341 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1342 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1343 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1344 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1345 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1346 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1347 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1348 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1349 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1350 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1351 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1352 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1353 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1354 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1355 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1356 // CHECK2: cond.true: 1357 // CHECK2-NEXT: br label [[COND_END:%.*]] 1358 // CHECK2: cond.false: 1359 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1360 // CHECK2-NEXT: br label [[COND_END]] 1361 // CHECK2: cond.end: 1362 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1363 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1364 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1365 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1366 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1367 // CHECK2: omp.inner.for.cond: 1368 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1369 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1370 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1371 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1372 // CHECK2: omp.inner.for.body: 1373 // CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 1374 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1375 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1376 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1377 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1378 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1379 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1380 // CHECK2: omp.inner.for.inc: 1381 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1382 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1383 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1384 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1385 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1386 // CHECK2: omp.inner.for.end: 1387 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1388 // CHECK2: omp.loop.exit: 1389 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1390 // CHECK2-NEXT: ret void 1391 // 1392 // 1393 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 1394 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1395 // CHECK2-NEXT: entry: 1396 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1397 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1398 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1399 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1400 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1401 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1402 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1403 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1404 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1405 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1406 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1407 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1408 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1409 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1410 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1411 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1412 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1413 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1414 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1415 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1416 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1417 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1418 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1419 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1420 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1421 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1422 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1423 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1424 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1425 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1426 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1427 // CHECK2: cond.true: 1428 // CHECK2-NEXT: br label [[COND_END:%.*]] 1429 // CHECK2: cond.false: 1430 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1431 // CHECK2-NEXT: br label [[COND_END]] 1432 // CHECK2: cond.end: 1433 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1434 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1435 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1436 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1437 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1438 // CHECK2: omp.inner.for.cond: 1439 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1440 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1441 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1442 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1443 // CHECK2: omp.inner.for.body: 1444 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1445 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1446 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1447 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1448 // CHECK2-NEXT: invoke void @_Z3foov() 1449 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1450 // CHECK2: invoke.cont: 1451 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1452 // CHECK2: omp.body.continue: 1453 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1454 // CHECK2: omp.inner.for.inc: 1455 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1456 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1457 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1458 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1459 // CHECK2: omp.inner.for.end: 1460 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1461 // CHECK2: omp.loop.exit: 1462 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1463 // CHECK2-NEXT: ret void 1464 // CHECK2: terminate.lpad: 1465 // CHECK2-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1466 // CHECK2-NEXT: catch i8* null 1467 // CHECK2-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1468 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 1469 // CHECK2-NEXT: unreachable 1470 // 1471 // 1472 // CHECK2-LABEL: define {{[^@]+}}@__clang_call_terminate 1473 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1474 // CHECK2-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 1475 // CHECK2-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 1476 // CHECK2-NEXT: unreachable 1477 // 1478 // 1479 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 1480 // CHECK2-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 1481 // CHECK2-NEXT: entry: 1482 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1483 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1484 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 1485 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 1486 // CHECK2-NEXT: ret void 1487 // 1488 // 1489 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 1490 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 1491 // CHECK2-NEXT: entry: 1492 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1493 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1494 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 1495 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1496 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1497 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1498 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1499 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1500 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1501 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1502 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1503 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1504 // CHECK2-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 1505 // CHECK2-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 1506 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1507 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1508 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1509 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1510 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1511 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1512 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1513 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1514 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 1515 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1516 // CHECK2: cond.true: 1517 // CHECK2-NEXT: br label [[COND_END:%.*]] 1518 // CHECK2: cond.false: 1519 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1520 // CHECK2-NEXT: br label [[COND_END]] 1521 // CHECK2: cond.end: 1522 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1523 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1524 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1525 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1526 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1527 // CHECK2: omp.inner.for.cond: 1528 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1529 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1530 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1531 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1532 // CHECK2: omp.inner.for.body: 1533 // CHECK2-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 1534 // CHECK2-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 1535 // CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 1536 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1537 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1538 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1539 // CHECK2-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 1540 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 1541 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1542 // CHECK2: omp.inner.for.inc: 1543 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1544 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1545 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 1546 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1547 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1548 // CHECK2: omp.inner.for.end: 1549 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1550 // CHECK2: omp.loop.exit: 1551 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1552 // CHECK2-NEXT: ret void 1553 // 1554 // 1555 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 1556 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1557 // CHECK2-NEXT: entry: 1558 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1559 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1560 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1561 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1562 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1563 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1564 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1565 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1566 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1567 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1568 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1569 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1570 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1571 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1572 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1573 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1574 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1575 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1576 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1577 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1578 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1579 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1580 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1581 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1582 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1583 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1584 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1585 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1586 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1587 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1588 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1589 // CHECK2: cond.true: 1590 // CHECK2-NEXT: br label [[COND_END:%.*]] 1591 // CHECK2: cond.false: 1592 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1593 // CHECK2-NEXT: br label [[COND_END]] 1594 // CHECK2: cond.end: 1595 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1596 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1597 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1598 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1599 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1600 // CHECK2: omp.inner.for.cond: 1601 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1602 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1603 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1604 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1605 // CHECK2: omp.inner.for.body: 1606 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1607 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1608 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1609 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1610 // CHECK2-NEXT: invoke void @_Z3foov() 1611 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1612 // CHECK2: invoke.cont: 1613 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1614 // CHECK2: omp.body.continue: 1615 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1616 // CHECK2: omp.inner.for.inc: 1617 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1618 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1619 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1620 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1621 // CHECK2: omp.inner.for.end: 1622 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1623 // CHECK2: omp.loop.exit: 1624 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1625 // CHECK2-NEXT: ret void 1626 // CHECK2: terminate.lpad: 1627 // CHECK2-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1628 // CHECK2-NEXT: catch i8* null 1629 // CHECK2-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1630 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 1631 // CHECK2-NEXT: unreachable 1632 // 1633 // 1634 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 1635 // CHECK2-SAME: () #[[ATTR7:[0-9]+]] comdat { 1636 // CHECK2-NEXT: entry: 1637 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1638 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1639 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1640 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1641 // CHECK2-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 1642 // CHECK2-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1643 // CHECK2: omp_offload.failed: 1644 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 1645 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 1646 // CHECK2: omp_offload.cont: 1647 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1648 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1649 // CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 1650 // CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 1651 // CHECK2: omp_offload.failed2: 1652 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 1653 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT3]] 1654 // CHECK2: omp_offload.cont3: 1655 // CHECK2-NEXT: ret i32 0 1656 // 1657 // 1658 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 1659 // CHECK2-SAME: () #[[ATTR7]] comdat { 1660 // CHECK2-NEXT: entry: 1661 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1662 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1663 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1664 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1665 // CHECK2-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 1666 // CHECK2-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1667 // CHECK2: omp_offload.failed: 1668 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 1669 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 1670 // CHECK2: omp_offload.cont: 1671 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1672 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1673 // CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 1674 // CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 1675 // CHECK2: omp_offload.failed2: 1676 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 1677 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT3]] 1678 // CHECK2: omp_offload.cont3: 1679 // CHECK2-NEXT: ret i32 0 1680 // 1681 // 1682 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SD1Ev 1683 // CHECK2-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 1684 // CHECK2-NEXT: entry: 1685 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1686 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1687 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1688 // CHECK2-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR6]] 1689 // CHECK2-NEXT: ret void 1690 // 1691 // 1692 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SC2El 1693 // CHECK2-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 1694 // CHECK2-NEXT: entry: 1695 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1696 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1697 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1698 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1699 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1700 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1701 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 1702 // CHECK2-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 1703 // CHECK2-NEXT: ret void 1704 // 1705 // 1706 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SD2Ev 1707 // CHECK2-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 1708 // CHECK2-NEXT: entry: 1709 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1710 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1711 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1712 // CHECK2-NEXT: ret void 1713 // 1714 // 1715 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 1716 // CHECK2-SAME: () #[[ATTR3]] { 1717 // CHECK2-NEXT: entry: 1718 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 1719 // CHECK2-NEXT: ret void 1720 // 1721 // 1722 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4 1723 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1724 // CHECK2-NEXT: entry: 1725 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1726 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1727 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1728 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1729 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1730 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1731 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1732 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1733 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1734 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1735 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1736 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1737 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1738 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1739 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1740 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1741 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1742 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1743 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1744 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1745 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1746 // CHECK2: cond.true: 1747 // CHECK2-NEXT: br label [[COND_END:%.*]] 1748 // CHECK2: cond.false: 1749 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1750 // CHECK2-NEXT: br label [[COND_END]] 1751 // CHECK2: cond.end: 1752 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1753 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1754 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1755 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1756 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1757 // CHECK2: omp.inner.for.cond: 1758 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1759 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1760 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1761 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1762 // CHECK2: omp.inner.for.body: 1763 // CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 1764 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1765 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1766 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1767 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1768 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1769 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1770 // CHECK2: omp.inner.for.inc: 1771 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1772 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1773 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1774 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1775 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1776 // CHECK2: omp.inner.for.end: 1777 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1778 // CHECK2: omp.loop.exit: 1779 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1780 // CHECK2-NEXT: ret void 1781 // 1782 // 1783 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..5 1784 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1785 // CHECK2-NEXT: entry: 1786 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1787 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1788 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1789 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1790 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1791 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1792 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1793 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1794 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1795 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1796 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1797 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1798 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1799 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1800 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1801 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1802 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1803 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1804 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1805 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1806 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1807 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1808 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1809 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1810 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1811 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1812 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1813 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1814 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1815 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1816 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1817 // CHECK2: cond.true: 1818 // CHECK2-NEXT: br label [[COND_END:%.*]] 1819 // CHECK2: cond.false: 1820 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1821 // CHECK2-NEXT: br label [[COND_END]] 1822 // CHECK2: cond.end: 1823 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1824 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1825 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1826 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1827 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1828 // CHECK2: omp.inner.for.cond: 1829 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1830 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1831 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1832 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1833 // CHECK2: omp.inner.for.body: 1834 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1835 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1836 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1837 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1838 // CHECK2-NEXT: invoke void @_Z3foov() 1839 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1840 // CHECK2: invoke.cont: 1841 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1842 // CHECK2: omp.body.continue: 1843 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1844 // CHECK2: omp.inner.for.inc: 1845 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1846 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1847 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1848 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1849 // CHECK2: omp.inner.for.end: 1850 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1851 // CHECK2: omp.loop.exit: 1852 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1853 // CHECK2-NEXT: ret void 1854 // CHECK2: terminate.lpad: 1855 // CHECK2-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1856 // CHECK2-NEXT: catch i8* null 1857 // CHECK2-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1858 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 1859 // CHECK2-NEXT: unreachable 1860 // 1861 // 1862 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 1863 // CHECK2-SAME: () #[[ATTR3]] { 1864 // CHECK2-NEXT: entry: 1865 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 1866 // CHECK2-NEXT: ret void 1867 // 1868 // 1869 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6 1870 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1871 // CHECK2-NEXT: entry: 1872 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1873 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1874 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1875 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1876 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1877 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1878 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1879 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1880 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1881 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1882 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1883 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1884 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1885 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1886 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1887 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1888 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1889 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1890 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1891 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1892 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1893 // CHECK2: cond.true: 1894 // CHECK2-NEXT: br label [[COND_END:%.*]] 1895 // CHECK2: cond.false: 1896 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1897 // CHECK2-NEXT: br label [[COND_END]] 1898 // CHECK2: cond.end: 1899 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1900 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1901 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1902 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1903 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1904 // CHECK2: omp.inner.for.cond: 1905 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1906 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1907 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1908 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1909 // CHECK2: omp.inner.for.body: 1910 // CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 1911 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1912 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1913 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1914 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1915 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1916 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1917 // CHECK2: omp.inner.for.inc: 1918 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1919 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1920 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1921 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1922 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1923 // CHECK2: omp.inner.for.end: 1924 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1925 // CHECK2: omp.loop.exit: 1926 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1927 // CHECK2-NEXT: ret void 1928 // 1929 // 1930 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7 1931 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1932 // CHECK2-NEXT: entry: 1933 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1934 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1935 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1936 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1937 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1938 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1939 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1940 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1941 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1942 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1943 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1944 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1945 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1946 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1947 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1948 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1949 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1950 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1951 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1952 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1953 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1954 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1955 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1956 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1957 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1958 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1959 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1960 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1961 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1962 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1963 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1964 // CHECK2: cond.true: 1965 // CHECK2-NEXT: br label [[COND_END:%.*]] 1966 // CHECK2: cond.false: 1967 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1968 // CHECK2-NEXT: br label [[COND_END]] 1969 // CHECK2: cond.end: 1970 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1971 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1972 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1973 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1974 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1975 // CHECK2: omp.inner.for.cond: 1976 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1977 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1978 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1979 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1980 // CHECK2: omp.inner.for.body: 1981 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1982 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1983 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1984 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1985 // CHECK2-NEXT: invoke void @_Z3foov() 1986 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1987 // CHECK2: invoke.cont: 1988 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1989 // CHECK2: omp.body.continue: 1990 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1991 // CHECK2: omp.inner.for.inc: 1992 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1993 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1994 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1995 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1996 // CHECK2: omp.inner.for.end: 1997 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1998 // CHECK2: omp.loop.exit: 1999 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2000 // CHECK2-NEXT: ret void 2001 // CHECK2: terminate.lpad: 2002 // CHECK2-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 2003 // CHECK2-NEXT: catch i8* null 2004 // CHECK2-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 2005 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 2006 // CHECK2-NEXT: unreachable 2007 // 2008 // 2009 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 2010 // CHECK2-SAME: () #[[ATTR3]] { 2011 // CHECK2-NEXT: entry: 2012 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 2013 // CHECK2-NEXT: ret void 2014 // 2015 // 2016 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8 2017 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2018 // CHECK2-NEXT: entry: 2019 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2020 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2021 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2022 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2023 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2024 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2025 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2026 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2027 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2028 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2029 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2030 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2031 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2032 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2033 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2034 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2035 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2036 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2037 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2038 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2039 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2040 // CHECK2: cond.true: 2041 // CHECK2-NEXT: br label [[COND_END:%.*]] 2042 // CHECK2: cond.false: 2043 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2044 // CHECK2-NEXT: br label [[COND_END]] 2045 // CHECK2: cond.end: 2046 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2047 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2048 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2049 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2050 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2051 // CHECK2: omp.inner.for.cond: 2052 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2053 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2054 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2055 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2056 // CHECK2: omp.inner.for.body: 2057 // CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 2058 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2059 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2060 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2061 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2062 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 2063 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2064 // CHECK2: omp.inner.for.inc: 2065 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2066 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2067 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 2068 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2069 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2070 // CHECK2: omp.inner.for.end: 2071 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2072 // CHECK2: omp.loop.exit: 2073 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2074 // CHECK2-NEXT: ret void 2075 // 2076 // 2077 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..9 2078 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2079 // CHECK2-NEXT: entry: 2080 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2081 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2082 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2083 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2084 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2085 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2086 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2087 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2088 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2089 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2090 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2091 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2092 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2093 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2094 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2095 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2096 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2097 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2098 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2099 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2100 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2101 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2102 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2103 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2104 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2105 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2106 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2107 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2108 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2109 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2110 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2111 // CHECK2: cond.true: 2112 // CHECK2-NEXT: br label [[COND_END:%.*]] 2113 // CHECK2: cond.false: 2114 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2115 // CHECK2-NEXT: br label [[COND_END]] 2116 // CHECK2: cond.end: 2117 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2118 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2119 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2120 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2121 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2122 // CHECK2: omp.inner.for.cond: 2123 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2124 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2125 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2126 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2127 // CHECK2: omp.inner.for.body: 2128 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2129 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2130 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2131 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2132 // CHECK2-NEXT: invoke void @_Z3foov() 2133 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2134 // CHECK2: invoke.cont: 2135 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2136 // CHECK2: omp.body.continue: 2137 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2138 // CHECK2: omp.inner.for.inc: 2139 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2140 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2141 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2142 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2143 // CHECK2: omp.inner.for.end: 2144 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2145 // CHECK2: omp.loop.exit: 2146 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2147 // CHECK2-NEXT: ret void 2148 // CHECK2: terminate.lpad: 2149 // CHECK2-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 2150 // CHECK2-NEXT: catch i8* null 2151 // CHECK2-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 2152 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 2153 // CHECK2-NEXT: unreachable 2154 // 2155 // 2156 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 2157 // CHECK2-SAME: () #[[ATTR3]] { 2158 // CHECK2-NEXT: entry: 2159 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 2160 // CHECK2-NEXT: ret void 2161 // 2162 // 2163 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10 2164 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2165 // CHECK2-NEXT: entry: 2166 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2167 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2168 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2169 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2170 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2171 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2172 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2173 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2174 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2175 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 2176 // CHECK2-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 2177 // CHECK2-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 2178 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2179 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2180 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2181 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2182 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2183 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2184 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2185 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2186 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2187 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2188 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2189 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2190 // CHECK2: cond.true: 2191 // CHECK2-NEXT: br label [[COND_END:%.*]] 2192 // CHECK2: cond.false: 2193 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2194 // CHECK2-NEXT: br label [[COND_END]] 2195 // CHECK2: cond.end: 2196 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2197 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2198 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2199 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2200 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2201 // CHECK2: omp.inner.for.cond: 2202 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2203 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2204 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2205 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2206 // CHECK2: omp.inner.for.body: 2207 // CHECK2-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[REF_TMP]], i64 23) 2208 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2209 // CHECK2: invoke.cont: 2210 // CHECK2-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) 2211 // CHECK2-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 2212 // CHECK2: invoke.cont2: 2213 // CHECK2-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 2214 // CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 2215 // CHECK2-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 2216 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2217 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2218 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2219 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2220 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 2221 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2222 // CHECK2: omp.inner.for.inc: 2223 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2224 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2225 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2226 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2227 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2228 // CHECK2: lpad: 2229 // CHECK2-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 2230 // CHECK2-NEXT: catch i8* null 2231 // CHECK2-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 2232 // CHECK2-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 2233 // CHECK2-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 2234 // CHECK2-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 2235 // CHECK2-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 2236 // CHECK2-NEXT: br label [[TERMINATE_HANDLER:%.*]] 2237 // CHECK2: omp.inner.for.end: 2238 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2239 // CHECK2: omp.loop.exit: 2240 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2241 // CHECK2-NEXT: ret void 2242 // CHECK2: terminate.lpad: 2243 // CHECK2-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 2244 // CHECK2-NEXT: catch i8* null 2245 // CHECK2-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 2246 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 2247 // CHECK2-NEXT: unreachable 2248 // CHECK2: terminate.handler: 2249 // CHECK2-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 2250 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 2251 // CHECK2-NEXT: unreachable 2252 // 2253 // 2254 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11 2255 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2256 // CHECK2-NEXT: entry: 2257 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2258 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2259 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2260 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2261 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2262 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2263 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2264 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2265 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2266 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2267 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2268 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2269 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2270 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2271 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2272 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2273 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2274 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2275 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2276 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2277 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2278 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2279 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2280 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2281 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2282 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2283 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2284 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2285 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2286 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2287 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2288 // CHECK2: cond.true: 2289 // CHECK2-NEXT: br label [[COND_END:%.*]] 2290 // CHECK2: cond.false: 2291 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2292 // CHECK2-NEXT: br label [[COND_END]] 2293 // CHECK2: cond.end: 2294 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2295 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2296 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2297 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2298 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2299 // CHECK2: omp.inner.for.cond: 2300 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2301 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2302 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2303 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2304 // CHECK2: omp.inner.for.body: 2305 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2306 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2307 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2308 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2309 // CHECK2-NEXT: invoke void @_Z3foov() 2310 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2311 // CHECK2: invoke.cont: 2312 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2313 // CHECK2: omp.body.continue: 2314 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2315 // CHECK2: omp.inner.for.inc: 2316 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2317 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2318 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2319 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2320 // CHECK2: omp.inner.for.end: 2321 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2322 // CHECK2: omp.loop.exit: 2323 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2324 // CHECK2-NEXT: ret void 2325 // CHECK2: terminate.lpad: 2326 // CHECK2-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 2327 // CHECK2-NEXT: catch i8* null 2328 // CHECK2-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 2329 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 2330 // CHECK2-NEXT: unreachable 2331 // 2332 // 2333 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2334 // CHECK2-SAME: () #[[ATTR9:[0-9]+]] { 2335 // CHECK2-NEXT: entry: 2336 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 2337 // CHECK2-NEXT: ret void 2338 // 2339 // 2340 // CHECK3-LABEL: define {{[^@]+}}@main 2341 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2342 // CHECK3-NEXT: entry: 2343 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2344 // CHECK3-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 2345 // CHECK3-NEXT: [[A:%.*]] = alloca i8, align 1 2346 // CHECK3-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 2347 // CHECK3-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 2348 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2349 // CHECK3-NEXT: [[I2:%.*]] = alloca i32, align 4 2350 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 2351 // CHECK3-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 2352 // CHECK3-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 2353 // CHECK3-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 2354 // CHECK3: invoke.cont: 2355 // CHECK3-NEXT: store i8 [[CALL]], i8* [[A]], align 1 2356 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 2357 // CHECK3-NEXT: br label [[FOR_COND:%.*]] 2358 // CHECK3: for.cond: 2359 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2360 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 2361 // CHECK3-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2362 // CHECK3: for.body: 2363 // CHECK3-NEXT: invoke void @_Z3foov() 2364 // CHECK3-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2365 // CHECK3: invoke.cont1: 2366 // CHECK3-NEXT: br label [[FOR_INC:%.*]] 2367 // CHECK3: for.inc: 2368 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2369 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2370 // CHECK3-NEXT: store i32 [[INC]], i32* [[I]], align 4 2371 // CHECK3-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2372 // CHECK3: lpad: 2373 // CHECK3-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 2374 // CHECK3-NEXT: cleanup 2375 // CHECK3-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 2376 // CHECK3-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 2377 // CHECK3-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 2378 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 2379 // CHECK3-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]] 2380 // CHECK3-NEXT: br label [[EH_RESUME:%.*]] 2381 // CHECK3: for.end: 2382 // CHECK3-NEXT: store i32 0, i32* [[I2]], align 4 2383 // CHECK3-NEXT: br label [[FOR_COND3:%.*]] 2384 // CHECK3: for.cond3: 2385 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4 2386 // CHECK3-NEXT: [[CMP4:%.*]] = icmp slt i32 [[TMP5]], 100 2387 // CHECK3-NEXT: br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END9:%.*]] 2388 // CHECK3: for.body5: 2389 // CHECK3-NEXT: invoke void @_Z3foov() 2390 // CHECK3-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[TERMINATE_LPAD]] 2391 // CHECK3: invoke.cont6: 2392 // CHECK3-NEXT: br label [[FOR_INC7:%.*]] 2393 // CHECK3: for.inc7: 2394 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[I2]], align 4 2395 // CHECK3-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP6]], 1 2396 // CHECK3-NEXT: store i32 [[INC8]], i32* [[I2]], align 4 2397 // CHECK3-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP4:![0-9]+]] 2398 // CHECK3: for.end9: 2399 // CHECK3-NEXT: [[TMP7:%.*]] = load i8, i8* [[A]], align 1 2400 // CHECK3-NEXT: [[CONV:%.*]] = sext i8 [[TMP7]] to i32 2401 // CHECK3-NEXT: [[CALL11:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 2402 // CHECK3-NEXT: to label [[INVOKE_CONT10:%.*]] unwind label [[LPAD]] 2403 // CHECK3: invoke.cont10: 2404 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CALL11]] 2405 // CHECK3-NEXT: [[CALL13:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 2406 // CHECK3-NEXT: to label [[INVOKE_CONT12:%.*]] unwind label [[LPAD]] 2407 // CHECK3: invoke.cont12: 2408 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[ADD]], [[CALL13]] 2409 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[RETVAL]], align 4 2410 // CHECK3-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7]] 2411 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[RETVAL]], align 4 2412 // CHECK3-NEXT: ret i32 [[TMP8]] 2413 // CHECK3: eh.resume: 2414 // CHECK3-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 2415 // CHECK3-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 2416 // CHECK3-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 2417 // CHECK3-NEXT: [[LPAD_VAL15:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 2418 // CHECK3-NEXT: resume { i8*, i32 } [[LPAD_VAL15]] 2419 // CHECK3: terminate.lpad: 2420 // CHECK3-NEXT: [[TMP9:%.*]] = landingpad { i8*, i32 } 2421 // CHECK3-NEXT: catch i8* null 2422 // CHECK3-NEXT: [[TMP10:%.*]] = extractvalue { i8*, i32 } [[TMP9]], 0 2423 // CHECK3-NEXT: call void @__clang_call_terminate(i8* [[TMP10]]) #[[ATTR8:[0-9]+]] 2424 // CHECK3-NEXT: unreachable 2425 // 2426 // 2427 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SC1El 2428 // CHECK3-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2429 // CHECK3-NEXT: entry: 2430 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2431 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2432 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2433 // CHECK3-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2434 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2435 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 2436 // CHECK3-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 2437 // CHECK3-NEXT: ret void 2438 // 2439 // 2440 // CHECK3-LABEL: define {{[^@]+}}@_ZN1ScvcEv 2441 // CHECK3-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 2442 // CHECK3-NEXT: entry: 2443 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2444 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2445 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2446 // CHECK3-NEXT: call void @_Z8mayThrowv() 2447 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2448 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 2449 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 2450 // CHECK3-NEXT: ret i8 [[CONV]] 2451 // 2452 // 2453 // CHECK3-LABEL: define {{[^@]+}}@__clang_call_terminate 2454 // CHECK3-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat { 2455 // CHECK3-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]] 2456 // CHECK3-NEXT: call void @_ZSt9terminatev() #[[ATTR8]] 2457 // CHECK3-NEXT: unreachable 2458 // 2459 // 2460 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 2461 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2462 // CHECK3-NEXT: entry: 2463 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2464 // CHECK3-NEXT: [[I1:%.*]] = alloca i32, align 4 2465 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 2466 // CHECK3-NEXT: br label [[FOR_COND:%.*]] 2467 // CHECK3: for.cond: 2468 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2469 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 2470 // CHECK3-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2471 // CHECK3: for.body: 2472 // CHECK3-NEXT: invoke void @_Z3foov() 2473 // CHECK3-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2474 // CHECK3: invoke.cont: 2475 // CHECK3-NEXT: br label [[FOR_INC:%.*]] 2476 // CHECK3: for.inc: 2477 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2478 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2479 // CHECK3-NEXT: store i32 [[INC]], i32* [[I]], align 4 2480 // CHECK3-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 2481 // CHECK3: for.end: 2482 // CHECK3-NEXT: store i32 0, i32* [[I1]], align 4 2483 // CHECK3-NEXT: br label [[FOR_COND2:%.*]] 2484 // CHECK3: for.cond2: 2485 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 2486 // CHECK3-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 2487 // CHECK3-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 2488 // CHECK3: for.body4: 2489 // CHECK3-NEXT: invoke void @_Z3foov() 2490 // CHECK3-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 2491 // CHECK3: invoke.cont5: 2492 // CHECK3-NEXT: br label [[FOR_INC6:%.*]] 2493 // CHECK3: for.inc6: 2494 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 2495 // CHECK3-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 2496 // CHECK3-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 2497 // CHECK3-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP6:![0-9]+]] 2498 // CHECK3: for.end8: 2499 // CHECK3-NEXT: ret i32 0 2500 // CHECK3: terminate.lpad: 2501 // CHECK3-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 2502 // CHECK3-NEXT: catch i8* null 2503 // CHECK3-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 2504 // CHECK3-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 2505 // CHECK3-NEXT: unreachable 2506 // 2507 // 2508 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 2509 // CHECK3-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2510 // CHECK3-NEXT: entry: 2511 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2512 // CHECK3-NEXT: [[I1:%.*]] = alloca i32, align 4 2513 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 2514 // CHECK3-NEXT: br label [[FOR_COND:%.*]] 2515 // CHECK3: for.cond: 2516 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2517 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 2518 // CHECK3-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2519 // CHECK3: for.body: 2520 // CHECK3-NEXT: invoke void @_Z3foov() 2521 // CHECK3-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2522 // CHECK3: invoke.cont: 2523 // CHECK3-NEXT: br label [[FOR_INC:%.*]] 2524 // CHECK3: for.inc: 2525 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2526 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2527 // CHECK3-NEXT: store i32 [[INC]], i32* [[I]], align 4 2528 // CHECK3-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 2529 // CHECK3: for.end: 2530 // CHECK3-NEXT: store i32 0, i32* [[I1]], align 4 2531 // CHECK3-NEXT: br label [[FOR_COND2:%.*]] 2532 // CHECK3: for.cond2: 2533 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 2534 // CHECK3-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 2535 // CHECK3-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 2536 // CHECK3: for.body4: 2537 // CHECK3-NEXT: invoke void @_Z3foov() 2538 // CHECK3-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 2539 // CHECK3: invoke.cont5: 2540 // CHECK3-NEXT: br label [[FOR_INC6:%.*]] 2541 // CHECK3: for.inc6: 2542 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 2543 // CHECK3-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 2544 // CHECK3-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 2545 // CHECK3-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP8:![0-9]+]] 2546 // CHECK3: for.end8: 2547 // CHECK3-NEXT: ret i32 0 2548 // CHECK3: terminate.lpad: 2549 // CHECK3-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 2550 // CHECK3-NEXT: catch i8* null 2551 // CHECK3-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 2552 // CHECK3-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 2553 // CHECK3-NEXT: unreachable 2554 // 2555 // 2556 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SD1Ev 2557 // CHECK3-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 { 2558 // CHECK3-NEXT: entry: 2559 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2560 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2561 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2562 // CHECK3-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR7]] 2563 // CHECK3-NEXT: ret void 2564 // 2565 // 2566 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SC2El 2567 // CHECK3-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 2568 // CHECK3-NEXT: entry: 2569 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2570 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2571 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2572 // CHECK3-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2573 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2574 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2575 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 2576 // CHECK3-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 2577 // CHECK3-NEXT: ret void 2578 // 2579 // 2580 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SD2Ev 2581 // CHECK3-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 2582 // CHECK3-NEXT: entry: 2583 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2584 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2585 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2586 // CHECK3-NEXT: ret void 2587 // 2588 // 2589 // CHECK4-LABEL: define {{[^@]+}}@main 2590 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2591 // CHECK4-NEXT: entry: 2592 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2593 // CHECK4-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 2594 // CHECK4-NEXT: [[A:%.*]] = alloca i8, align 1 2595 // CHECK4-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 2596 // CHECK4-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 2597 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2598 // CHECK4-NEXT: [[I2:%.*]] = alloca i32, align 4 2599 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 2600 // CHECK4-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 2601 // CHECK4-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 2602 // CHECK4-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 2603 // CHECK4: invoke.cont: 2604 // CHECK4-NEXT: store i8 [[CALL]], i8* [[A]], align 1 2605 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 2606 // CHECK4-NEXT: br label [[FOR_COND:%.*]] 2607 // CHECK4: for.cond: 2608 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2609 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 2610 // CHECK4-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2611 // CHECK4: for.body: 2612 // CHECK4-NEXT: invoke void @_Z3foov() 2613 // CHECK4-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2614 // CHECK4: invoke.cont1: 2615 // CHECK4-NEXT: br label [[FOR_INC:%.*]] 2616 // CHECK4: for.inc: 2617 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2618 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2619 // CHECK4-NEXT: store i32 [[INC]], i32* [[I]], align 4 2620 // CHECK4-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2621 // CHECK4: lpad: 2622 // CHECK4-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 2623 // CHECK4-NEXT: cleanup 2624 // CHECK4-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 2625 // CHECK4-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 2626 // CHECK4-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 2627 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 2628 // CHECK4-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]] 2629 // CHECK4-NEXT: br label [[EH_RESUME:%.*]] 2630 // CHECK4: for.end: 2631 // CHECK4-NEXT: store i32 0, i32* [[I2]], align 4 2632 // CHECK4-NEXT: br label [[FOR_COND3:%.*]] 2633 // CHECK4: for.cond3: 2634 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4 2635 // CHECK4-NEXT: [[CMP4:%.*]] = icmp slt i32 [[TMP5]], 100 2636 // CHECK4-NEXT: br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END9:%.*]] 2637 // CHECK4: for.body5: 2638 // CHECK4-NEXT: invoke void @_Z3foov() 2639 // CHECK4-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[TERMINATE_LPAD]] 2640 // CHECK4: invoke.cont6: 2641 // CHECK4-NEXT: br label [[FOR_INC7:%.*]] 2642 // CHECK4: for.inc7: 2643 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[I2]], align 4 2644 // CHECK4-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP6]], 1 2645 // CHECK4-NEXT: store i32 [[INC8]], i32* [[I2]], align 4 2646 // CHECK4-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP4:![0-9]+]] 2647 // CHECK4: for.end9: 2648 // CHECK4-NEXT: [[TMP7:%.*]] = load i8, i8* [[A]], align 1 2649 // CHECK4-NEXT: [[CONV:%.*]] = sext i8 [[TMP7]] to i32 2650 // CHECK4-NEXT: [[CALL11:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 2651 // CHECK4-NEXT: to label [[INVOKE_CONT10:%.*]] unwind label [[LPAD]] 2652 // CHECK4: invoke.cont10: 2653 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CALL11]] 2654 // CHECK4-NEXT: [[CALL13:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 2655 // CHECK4-NEXT: to label [[INVOKE_CONT12:%.*]] unwind label [[LPAD]] 2656 // CHECK4: invoke.cont12: 2657 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[ADD]], [[CALL13]] 2658 // CHECK4-NEXT: store i32 [[ADD14]], i32* [[RETVAL]], align 4 2659 // CHECK4-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7]] 2660 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[RETVAL]], align 4 2661 // CHECK4-NEXT: ret i32 [[TMP8]] 2662 // CHECK4: eh.resume: 2663 // CHECK4-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 2664 // CHECK4-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 2665 // CHECK4-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 2666 // CHECK4-NEXT: [[LPAD_VAL15:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 2667 // CHECK4-NEXT: resume { i8*, i32 } [[LPAD_VAL15]] 2668 // CHECK4: terminate.lpad: 2669 // CHECK4-NEXT: [[TMP9:%.*]] = landingpad { i8*, i32 } 2670 // CHECK4-NEXT: catch i8* null 2671 // CHECK4-NEXT: [[TMP10:%.*]] = extractvalue { i8*, i32 } [[TMP9]], 0 2672 // CHECK4-NEXT: call void @__clang_call_terminate(i8* [[TMP10]]) #[[ATTR8:[0-9]+]] 2673 // CHECK4-NEXT: unreachable 2674 // 2675 // 2676 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SC1El 2677 // CHECK4-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2678 // CHECK4-NEXT: entry: 2679 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2680 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2681 // CHECK4-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2682 // CHECK4-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2683 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2684 // CHECK4-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 2685 // CHECK4-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 2686 // CHECK4-NEXT: ret void 2687 // 2688 // 2689 // CHECK4-LABEL: define {{[^@]+}}@_ZN1ScvcEv 2690 // CHECK4-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 2691 // CHECK4-NEXT: entry: 2692 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2693 // CHECK4-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2694 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2695 // CHECK4-NEXT: call void @_Z8mayThrowv() 2696 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2697 // CHECK4-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 2698 // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 2699 // CHECK4-NEXT: ret i8 [[CONV]] 2700 // 2701 // 2702 // CHECK4-LABEL: define {{[^@]+}}@__clang_call_terminate 2703 // CHECK4-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat { 2704 // CHECK4-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]] 2705 // CHECK4-NEXT: call void @_ZSt9terminatev() #[[ATTR8]] 2706 // CHECK4-NEXT: unreachable 2707 // 2708 // 2709 // CHECK4-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 2710 // CHECK4-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2711 // CHECK4-NEXT: entry: 2712 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2713 // CHECK4-NEXT: [[I1:%.*]] = alloca i32, align 4 2714 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 2715 // CHECK4-NEXT: br label [[FOR_COND:%.*]] 2716 // CHECK4: for.cond: 2717 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2718 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 2719 // CHECK4-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2720 // CHECK4: for.body: 2721 // CHECK4-NEXT: invoke void @_Z3foov() 2722 // CHECK4-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2723 // CHECK4: invoke.cont: 2724 // CHECK4-NEXT: br label [[FOR_INC:%.*]] 2725 // CHECK4: for.inc: 2726 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2727 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2728 // CHECK4-NEXT: store i32 [[INC]], i32* [[I]], align 4 2729 // CHECK4-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 2730 // CHECK4: for.end: 2731 // CHECK4-NEXT: store i32 0, i32* [[I1]], align 4 2732 // CHECK4-NEXT: br label [[FOR_COND2:%.*]] 2733 // CHECK4: for.cond2: 2734 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 2735 // CHECK4-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 2736 // CHECK4-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 2737 // CHECK4: for.body4: 2738 // CHECK4-NEXT: invoke void @_Z3foov() 2739 // CHECK4-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 2740 // CHECK4: invoke.cont5: 2741 // CHECK4-NEXT: br label [[FOR_INC6:%.*]] 2742 // CHECK4: for.inc6: 2743 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 2744 // CHECK4-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 2745 // CHECK4-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 2746 // CHECK4-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP6:![0-9]+]] 2747 // CHECK4: for.end8: 2748 // CHECK4-NEXT: ret i32 0 2749 // CHECK4: terminate.lpad: 2750 // CHECK4-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 2751 // CHECK4-NEXT: catch i8* null 2752 // CHECK4-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 2753 // CHECK4-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 2754 // CHECK4-NEXT: unreachable 2755 // 2756 // 2757 // CHECK4-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 2758 // CHECK4-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2759 // CHECK4-NEXT: entry: 2760 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2761 // CHECK4-NEXT: [[I1:%.*]] = alloca i32, align 4 2762 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 2763 // CHECK4-NEXT: br label [[FOR_COND:%.*]] 2764 // CHECK4: for.cond: 2765 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2766 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 2767 // CHECK4-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2768 // CHECK4: for.body: 2769 // CHECK4-NEXT: invoke void @_Z3foov() 2770 // CHECK4-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2771 // CHECK4: invoke.cont: 2772 // CHECK4-NEXT: br label [[FOR_INC:%.*]] 2773 // CHECK4: for.inc: 2774 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2775 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2776 // CHECK4-NEXT: store i32 [[INC]], i32* [[I]], align 4 2777 // CHECK4-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 2778 // CHECK4: for.end: 2779 // CHECK4-NEXT: store i32 0, i32* [[I1]], align 4 2780 // CHECK4-NEXT: br label [[FOR_COND2:%.*]] 2781 // CHECK4: for.cond2: 2782 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 2783 // CHECK4-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 2784 // CHECK4-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 2785 // CHECK4: for.body4: 2786 // CHECK4-NEXT: invoke void @_Z3foov() 2787 // CHECK4-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 2788 // CHECK4: invoke.cont5: 2789 // CHECK4-NEXT: br label [[FOR_INC6:%.*]] 2790 // CHECK4: for.inc6: 2791 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 2792 // CHECK4-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 2793 // CHECK4-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 2794 // CHECK4-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP8:![0-9]+]] 2795 // CHECK4: for.end8: 2796 // CHECK4-NEXT: ret i32 0 2797 // CHECK4: terminate.lpad: 2798 // CHECK4-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 2799 // CHECK4-NEXT: catch i8* null 2800 // CHECK4-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 2801 // CHECK4-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 2802 // CHECK4-NEXT: unreachable 2803 // 2804 // 2805 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SD1Ev 2806 // CHECK4-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 { 2807 // CHECK4-NEXT: entry: 2808 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2809 // CHECK4-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2810 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2811 // CHECK4-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR7]] 2812 // CHECK4-NEXT: ret void 2813 // 2814 // 2815 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SC2El 2816 // CHECK4-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 2817 // CHECK4-NEXT: entry: 2818 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2819 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2820 // CHECK4-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2821 // CHECK4-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2822 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2823 // CHECK4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2824 // CHECK4-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 2825 // CHECK4-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 2826 // CHECK4-NEXT: ret void 2827 // 2828 // 2829 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SD2Ev 2830 // CHECK4-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 2831 // CHECK4-NEXT: entry: 2832 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2833 // CHECK4-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2834 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2835 // CHECK4-NEXT: ret void 2836 // 2837 // 2838 // CHECK5-LABEL: define {{[^@]+}}@main 2839 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2840 // CHECK5-NEXT: entry: 2841 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2842 // CHECK5-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 2843 // CHECK5-NEXT: [[A:%.*]] = alloca i8, align 1 2844 // CHECK5-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 2845 // CHECK5-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 2846 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2847 // CHECK5-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 2848 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2849 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2850 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2851 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2852 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 2853 // CHECK5-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 2854 // CHECK5-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 2855 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 2856 // CHECK5: invoke.cont: 2857 // CHECK5-NEXT: store i8 [[CALL]], i8* [[A]], align 1 2858 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 2859 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2860 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 2861 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2862 // CHECK5: omp_offload.failed: 2863 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 2864 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 2865 // CHECK5: lpad: 2866 // CHECK5-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 2867 // CHECK5-NEXT: cleanup 2868 // CHECK5-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 2869 // CHECK5-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 2870 // CHECK5-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 2871 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 2872 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 2873 // CHECK5-NEXT: br label [[EH_RESUME:%.*]] 2874 // CHECK5: omp_offload.cont: 2875 // CHECK5-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 2876 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 2877 // CHECK5-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 2878 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 2879 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2880 // CHECK5-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 2881 // CHECK5-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 2882 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2883 // CHECK5-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2884 // CHECK5-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 2885 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2886 // CHECK5-NEXT: store i8* null, i8** [[TMP11]], align 8 2887 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2888 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2889 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 2890 // CHECK5-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2891 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 2892 // CHECK5-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 2893 // CHECK5: omp_offload.failed2: 2894 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 2895 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]] 2896 // CHECK5: omp_offload.cont3: 2897 // CHECK5-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 2898 // CHECK5-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 2899 // CHECK5-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 2900 // CHECK5-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 2901 // CHECK5: invoke.cont5: 2902 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 2903 // CHECK5-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 2904 // CHECK5-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 2905 // CHECK5: invoke.cont7: 2906 // CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 2907 // CHECK5-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 2908 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 2909 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 2910 // CHECK5-NEXT: ret i32 [[TMP17]] 2911 // CHECK5: eh.resume: 2912 // CHECK5-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 2913 // CHECK5-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 2914 // CHECK5-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 2915 // CHECK5-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 2916 // CHECK5-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 2917 // 2918 // 2919 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC1El 2920 // CHECK5-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2921 // CHECK5-NEXT: entry: 2922 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2923 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2924 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2925 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2926 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2927 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 2928 // CHECK5-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 2929 // CHECK5-NEXT: ret void 2930 // 2931 // 2932 // CHECK5-LABEL: define {{[^@]+}}@_ZN1ScvcEv 2933 // CHECK5-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 2934 // CHECK5-NEXT: entry: 2935 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2936 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2937 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2938 // CHECK5-NEXT: call void @_Z8mayThrowv() 2939 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2940 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 2941 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 2942 // CHECK5-NEXT: ret i8 [[CONV]] 2943 // 2944 // 2945 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 2946 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] { 2947 // CHECK5-NEXT: entry: 2948 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 2949 // CHECK5-NEXT: ret void 2950 // 2951 // 2952 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. 2953 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2954 // CHECK5-NEXT: entry: 2955 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2956 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2957 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2958 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2959 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2960 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2961 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2962 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2963 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2964 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2965 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2966 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2967 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2968 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2969 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2970 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2971 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2972 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2973 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2974 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2975 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2976 // CHECK5: cond.true: 2977 // CHECK5-NEXT: br label [[COND_END:%.*]] 2978 // CHECK5: cond.false: 2979 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2980 // CHECK5-NEXT: br label [[COND_END]] 2981 // CHECK5: cond.end: 2982 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2983 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2984 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2985 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2986 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2987 // CHECK5: omp.inner.for.cond: 2988 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2989 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2990 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2991 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2992 // CHECK5: omp.inner.for.body: 2993 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 2994 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2995 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2996 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2997 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2998 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 2999 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3000 // CHECK5: omp.inner.for.inc: 3001 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3002 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3003 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3004 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3005 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3006 // CHECK5: omp.inner.for.end: 3007 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3008 // CHECK5: omp.loop.exit: 3009 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3010 // CHECK5-NEXT: ret void 3011 // 3012 // 3013 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1 3014 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3015 // CHECK5-NEXT: entry: 3016 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3017 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3018 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3019 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3020 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3021 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3022 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3023 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3024 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3025 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3026 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3027 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3028 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3029 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3030 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3031 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3032 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3033 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3034 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3035 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3036 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3037 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3038 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3039 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3040 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3041 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3042 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3043 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3044 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3045 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3046 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3047 // CHECK5: cond.true: 3048 // CHECK5-NEXT: br label [[COND_END:%.*]] 3049 // CHECK5: cond.false: 3050 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3051 // CHECK5-NEXT: br label [[COND_END]] 3052 // CHECK5: cond.end: 3053 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3054 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3055 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3056 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3057 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3058 // CHECK5: omp.inner.for.cond: 3059 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3060 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3061 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3062 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3063 // CHECK5: omp.inner.for.body: 3064 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3065 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3066 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3067 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3068 // CHECK5-NEXT: invoke void @_Z3foov() 3069 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3070 // CHECK5: invoke.cont: 3071 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3072 // CHECK5: omp.body.continue: 3073 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3074 // CHECK5: omp.inner.for.inc: 3075 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3076 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3077 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3078 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3079 // CHECK5: omp.inner.for.end: 3080 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3081 // CHECK5: omp.loop.exit: 3082 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3083 // CHECK5-NEXT: ret void 3084 // CHECK5: terminate.lpad: 3085 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3086 // CHECK5-NEXT: catch i8* null 3087 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3088 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 3089 // CHECK5-NEXT: unreachable 3090 // 3091 // 3092 // CHECK5-LABEL: define {{[^@]+}}@__clang_call_terminate 3093 // CHECK5-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 3094 // CHECK5-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 3095 // CHECK5-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 3096 // CHECK5-NEXT: unreachable 3097 // 3098 // 3099 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 3100 // CHECK5-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 3101 // CHECK5-NEXT: entry: 3102 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 3103 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 3104 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 3105 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 3106 // CHECK5-NEXT: ret void 3107 // 3108 // 3109 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2 3110 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 3111 // CHECK5-NEXT: entry: 3112 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3113 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3114 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 3115 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3116 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3117 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3118 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3119 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3120 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3121 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3122 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3123 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3124 // CHECK5-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 3125 // CHECK5-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 3126 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3127 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3128 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3129 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3130 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3131 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3132 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3133 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3134 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 3135 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3136 // CHECK5: cond.true: 3137 // CHECK5-NEXT: br label [[COND_END:%.*]] 3138 // CHECK5: cond.false: 3139 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3140 // CHECK5-NEXT: br label [[COND_END]] 3141 // CHECK5: cond.end: 3142 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3143 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3144 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3145 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3146 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3147 // CHECK5: omp.inner.for.cond: 3148 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3149 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3150 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3151 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3152 // CHECK5: omp.inner.for.body: 3153 // CHECK5-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 3154 // CHECK5-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 3155 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 3156 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3157 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3158 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3159 // CHECK5-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 3160 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 3161 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3162 // CHECK5: omp.inner.for.inc: 3163 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3164 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3165 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 3166 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3167 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3168 // CHECK5: omp.inner.for.end: 3169 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3170 // CHECK5: omp.loop.exit: 3171 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3172 // CHECK5-NEXT: ret void 3173 // 3174 // 3175 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3 3176 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3177 // CHECK5-NEXT: entry: 3178 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3179 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3180 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3181 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3182 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3183 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3184 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3185 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3186 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3187 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3188 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3189 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3190 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3191 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3192 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3193 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3194 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3195 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3196 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3197 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3198 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3199 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3200 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3201 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3202 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3203 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3204 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3205 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3206 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3207 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3208 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3209 // CHECK5: cond.true: 3210 // CHECK5-NEXT: br label [[COND_END:%.*]] 3211 // CHECK5: cond.false: 3212 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3213 // CHECK5-NEXT: br label [[COND_END]] 3214 // CHECK5: cond.end: 3215 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3216 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3217 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3218 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3219 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3220 // CHECK5: omp.inner.for.cond: 3221 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3222 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3223 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3224 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3225 // CHECK5: omp.inner.for.body: 3226 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3227 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3228 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3229 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3230 // CHECK5-NEXT: invoke void @_Z3foov() 3231 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3232 // CHECK5: invoke.cont: 3233 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3234 // CHECK5: omp.body.continue: 3235 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3236 // CHECK5: omp.inner.for.inc: 3237 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3238 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3239 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3240 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3241 // CHECK5: omp.inner.for.end: 3242 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3243 // CHECK5: omp.loop.exit: 3244 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3245 // CHECK5-NEXT: ret void 3246 // CHECK5: terminate.lpad: 3247 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3248 // CHECK5-NEXT: catch i8* null 3249 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3250 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 3251 // CHECK5-NEXT: unreachable 3252 // 3253 // 3254 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 3255 // CHECK5-SAME: () #[[ATTR7:[0-9]+]] comdat { 3256 // CHECK5-NEXT: entry: 3257 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3258 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3259 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3260 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3261 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 3262 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3263 // CHECK5: omp_offload.failed: 3264 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 3265 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 3266 // CHECK5: omp_offload.cont: 3267 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3268 // CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3269 // CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 3270 // CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 3271 // CHECK5: omp_offload.failed2: 3272 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 3273 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]] 3274 // CHECK5: omp_offload.cont3: 3275 // CHECK5-NEXT: ret i32 0 3276 // 3277 // 3278 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 3279 // CHECK5-SAME: () #[[ATTR7]] comdat { 3280 // CHECK5-NEXT: entry: 3281 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3282 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3283 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3284 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3285 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 3286 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3287 // CHECK5: omp_offload.failed: 3288 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 3289 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 3290 // CHECK5: omp_offload.cont: 3291 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3292 // CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3293 // CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 3294 // CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 3295 // CHECK5: omp_offload.failed2: 3296 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 3297 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]] 3298 // CHECK5: omp_offload.cont3: 3299 // CHECK5-NEXT: ret i32 0 3300 // 3301 // 3302 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD1Ev 3303 // CHECK5-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 3304 // CHECK5-NEXT: entry: 3305 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3306 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3307 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3308 // CHECK5-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR6]] 3309 // CHECK5-NEXT: ret void 3310 // 3311 // 3312 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC2El 3313 // CHECK5-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 3314 // CHECK5-NEXT: entry: 3315 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3316 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 3317 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3318 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 3319 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3320 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3321 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 3322 // CHECK5-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 3323 // CHECK5-NEXT: ret void 3324 // 3325 // 3326 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 3327 // CHECK5-SAME: () #[[ATTR3]] { 3328 // CHECK5-NEXT: entry: 3329 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 3330 // CHECK5-NEXT: ret void 3331 // 3332 // 3333 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4 3334 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3335 // CHECK5-NEXT: entry: 3336 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3337 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3338 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3339 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3340 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3341 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3342 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3343 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3344 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3345 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3346 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3347 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3348 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3349 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3350 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3351 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3352 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3353 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3354 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3355 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3356 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3357 // CHECK5: cond.true: 3358 // CHECK5-NEXT: br label [[COND_END:%.*]] 3359 // CHECK5: cond.false: 3360 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3361 // CHECK5-NEXT: br label [[COND_END]] 3362 // CHECK5: cond.end: 3363 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3364 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3365 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3366 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3367 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3368 // CHECK5: omp.inner.for.cond: 3369 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3370 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3371 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3372 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3373 // CHECK5: omp.inner.for.body: 3374 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 3375 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3376 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3377 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3378 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3379 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 3380 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3381 // CHECK5: omp.inner.for.inc: 3382 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3383 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3384 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3385 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3386 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3387 // CHECK5: omp.inner.for.end: 3388 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3389 // CHECK5: omp.loop.exit: 3390 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3391 // CHECK5-NEXT: ret void 3392 // 3393 // 3394 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5 3395 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3396 // CHECK5-NEXT: entry: 3397 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3398 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3399 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3400 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3401 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3402 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3403 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3404 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3405 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3406 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3407 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3408 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3409 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3410 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3411 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3412 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3413 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3414 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3415 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3416 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3417 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3418 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3419 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3420 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3421 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3422 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3423 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3424 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3425 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3426 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3427 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3428 // CHECK5: cond.true: 3429 // CHECK5-NEXT: br label [[COND_END:%.*]] 3430 // CHECK5: cond.false: 3431 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3432 // CHECK5-NEXT: br label [[COND_END]] 3433 // CHECK5: cond.end: 3434 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3435 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3436 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3437 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3438 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3439 // CHECK5: omp.inner.for.cond: 3440 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3441 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3442 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3443 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3444 // CHECK5: omp.inner.for.body: 3445 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3446 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3447 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3448 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3449 // CHECK5-NEXT: invoke void @_Z3foov() 3450 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3451 // CHECK5: invoke.cont: 3452 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3453 // CHECK5: omp.body.continue: 3454 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3455 // CHECK5: omp.inner.for.inc: 3456 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3457 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3458 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3459 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3460 // CHECK5: omp.inner.for.end: 3461 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3462 // CHECK5: omp.loop.exit: 3463 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3464 // CHECK5-NEXT: ret void 3465 // CHECK5: terminate.lpad: 3466 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3467 // CHECK5-NEXT: catch i8* null 3468 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3469 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 3470 // CHECK5-NEXT: unreachable 3471 // 3472 // 3473 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 3474 // CHECK5-SAME: () #[[ATTR3]] { 3475 // CHECK5-NEXT: entry: 3476 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 3477 // CHECK5-NEXT: ret void 3478 // 3479 // 3480 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6 3481 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3482 // CHECK5-NEXT: entry: 3483 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3484 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3485 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3486 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3487 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3488 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3489 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3490 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3491 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3492 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3493 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3494 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3495 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3496 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3497 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3498 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3499 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3500 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3501 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3502 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3503 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3504 // CHECK5: cond.true: 3505 // CHECK5-NEXT: br label [[COND_END:%.*]] 3506 // CHECK5: cond.false: 3507 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3508 // CHECK5-NEXT: br label [[COND_END]] 3509 // CHECK5: cond.end: 3510 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3511 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3512 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3513 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3514 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3515 // CHECK5: omp.inner.for.cond: 3516 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3517 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3518 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3519 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3520 // CHECK5: omp.inner.for.body: 3521 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 3522 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3523 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3524 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3525 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3526 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 3527 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3528 // CHECK5: omp.inner.for.inc: 3529 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3530 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3531 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3532 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3533 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3534 // CHECK5: omp.inner.for.end: 3535 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3536 // CHECK5: omp.loop.exit: 3537 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3538 // CHECK5-NEXT: ret void 3539 // 3540 // 3541 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7 3542 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3543 // CHECK5-NEXT: entry: 3544 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3545 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3546 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3547 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3548 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3549 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3550 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3551 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3552 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3553 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3554 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3555 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3556 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3557 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3558 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3559 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3560 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3561 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3562 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3563 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3564 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3565 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3566 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3567 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3568 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3569 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3570 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3571 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3572 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3573 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3574 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3575 // CHECK5: cond.true: 3576 // CHECK5-NEXT: br label [[COND_END:%.*]] 3577 // CHECK5: cond.false: 3578 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3579 // CHECK5-NEXT: br label [[COND_END]] 3580 // CHECK5: cond.end: 3581 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3582 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3583 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3584 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3585 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3586 // CHECK5: omp.inner.for.cond: 3587 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3588 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3589 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3590 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3591 // CHECK5: omp.inner.for.body: 3592 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3593 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3594 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3595 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3596 // CHECK5-NEXT: invoke void @_Z3foov() 3597 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3598 // CHECK5: invoke.cont: 3599 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3600 // CHECK5: omp.body.continue: 3601 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3602 // CHECK5: omp.inner.for.inc: 3603 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3604 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3605 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3606 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3607 // CHECK5: omp.inner.for.end: 3608 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3609 // CHECK5: omp.loop.exit: 3610 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3611 // CHECK5-NEXT: ret void 3612 // CHECK5: terminate.lpad: 3613 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3614 // CHECK5-NEXT: catch i8* null 3615 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3616 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 3617 // CHECK5-NEXT: unreachable 3618 // 3619 // 3620 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 3621 // CHECK5-SAME: () #[[ATTR3]] { 3622 // CHECK5-NEXT: entry: 3623 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 3624 // CHECK5-NEXT: ret void 3625 // 3626 // 3627 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..8 3628 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3629 // CHECK5-NEXT: entry: 3630 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3631 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3632 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3633 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3634 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3635 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3636 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3637 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3638 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3639 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3640 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3641 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3642 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3643 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3644 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3645 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3646 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3647 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3648 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3649 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3650 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3651 // CHECK5: cond.true: 3652 // CHECK5-NEXT: br label [[COND_END:%.*]] 3653 // CHECK5: cond.false: 3654 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3655 // CHECK5-NEXT: br label [[COND_END]] 3656 // CHECK5: cond.end: 3657 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3658 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3659 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3660 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3661 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3662 // CHECK5: omp.inner.for.cond: 3663 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3664 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3665 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3666 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3667 // CHECK5: omp.inner.for.body: 3668 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 3669 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3670 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3671 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3672 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3673 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 3674 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3675 // CHECK5: omp.inner.for.inc: 3676 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3677 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3678 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3679 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3680 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3681 // CHECK5: omp.inner.for.end: 3682 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3683 // CHECK5: omp.loop.exit: 3684 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3685 // CHECK5-NEXT: ret void 3686 // 3687 // 3688 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..9 3689 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3690 // CHECK5-NEXT: entry: 3691 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3692 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3693 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3694 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3695 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3696 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3697 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3698 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3699 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3700 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3701 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3702 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3703 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3704 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3705 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3706 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3707 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3708 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3709 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3710 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3711 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3712 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3713 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3714 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3715 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3716 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3717 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3718 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3719 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3720 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3721 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3722 // CHECK5: cond.true: 3723 // CHECK5-NEXT: br label [[COND_END:%.*]] 3724 // CHECK5: cond.false: 3725 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3726 // CHECK5-NEXT: br label [[COND_END]] 3727 // CHECK5: cond.end: 3728 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3729 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3730 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3731 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3732 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3733 // CHECK5: omp.inner.for.cond: 3734 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3735 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3736 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3737 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3738 // CHECK5: omp.inner.for.body: 3739 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3740 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3741 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3742 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3743 // CHECK5-NEXT: invoke void @_Z3foov() 3744 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3745 // CHECK5: invoke.cont: 3746 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3747 // CHECK5: omp.body.continue: 3748 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3749 // CHECK5: omp.inner.for.inc: 3750 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3751 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3752 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3753 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3754 // CHECK5: omp.inner.for.end: 3755 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3756 // CHECK5: omp.loop.exit: 3757 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3758 // CHECK5-NEXT: ret void 3759 // CHECK5: terminate.lpad: 3760 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3761 // CHECK5-NEXT: catch i8* null 3762 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3763 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 3764 // CHECK5-NEXT: unreachable 3765 // 3766 // 3767 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 3768 // CHECK5-SAME: () #[[ATTR3]] { 3769 // CHECK5-NEXT: entry: 3770 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 3771 // CHECK5-NEXT: ret void 3772 // 3773 // 3774 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10 3775 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3776 // CHECK5-NEXT: entry: 3777 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3778 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3779 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3780 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3781 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3782 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3783 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3784 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3785 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3786 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 3787 // CHECK5-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 3788 // CHECK5-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 3789 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3790 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3791 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3792 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3793 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3794 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3795 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3796 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3797 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3798 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3799 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3800 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3801 // CHECK5: cond.true: 3802 // CHECK5-NEXT: br label [[COND_END:%.*]] 3803 // CHECK5: cond.false: 3804 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3805 // CHECK5-NEXT: br label [[COND_END]] 3806 // CHECK5: cond.end: 3807 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3808 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3809 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3810 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3811 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3812 // CHECK5: omp.inner.for.cond: 3813 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3814 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3815 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3816 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3817 // CHECK5: omp.inner.for.body: 3818 // CHECK5-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[REF_TMP]], i64 23) 3819 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3820 // CHECK5: invoke.cont: 3821 // CHECK5-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) 3822 // CHECK5-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 3823 // CHECK5: invoke.cont2: 3824 // CHECK5-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 3825 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 3826 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 3827 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3828 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 3829 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3830 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3831 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 3832 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3833 // CHECK5: omp.inner.for.inc: 3834 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3835 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3836 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3837 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3838 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3839 // CHECK5: lpad: 3840 // CHECK5-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 3841 // CHECK5-NEXT: catch i8* null 3842 // CHECK5-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 3843 // CHECK5-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 3844 // CHECK5-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 3845 // CHECK5-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 3846 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 3847 // CHECK5-NEXT: br label [[TERMINATE_HANDLER:%.*]] 3848 // CHECK5: omp.inner.for.end: 3849 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3850 // CHECK5: omp.loop.exit: 3851 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3852 // CHECK5-NEXT: ret void 3853 // CHECK5: terminate.lpad: 3854 // CHECK5-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 3855 // CHECK5-NEXT: catch i8* null 3856 // CHECK5-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 3857 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 3858 // CHECK5-NEXT: unreachable 3859 // CHECK5: terminate.handler: 3860 // CHECK5-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 3861 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 3862 // CHECK5-NEXT: unreachable 3863 // 3864 // 3865 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11 3866 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3867 // CHECK5-NEXT: entry: 3868 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3869 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3870 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3871 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3872 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3873 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3874 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3875 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3876 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3877 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3878 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3879 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3880 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3881 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3882 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3883 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3884 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3885 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3886 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3887 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3888 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3889 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3890 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3891 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3892 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3893 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3894 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3895 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3896 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3897 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3898 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3899 // CHECK5: cond.true: 3900 // CHECK5-NEXT: br label [[COND_END:%.*]] 3901 // CHECK5: cond.false: 3902 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3903 // CHECK5-NEXT: br label [[COND_END]] 3904 // CHECK5: cond.end: 3905 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3906 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3907 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3908 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3909 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3910 // CHECK5: omp.inner.for.cond: 3911 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3912 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3913 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3914 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3915 // CHECK5: omp.inner.for.body: 3916 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3917 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3918 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3919 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3920 // CHECK5-NEXT: invoke void @_Z3foov() 3921 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3922 // CHECK5: invoke.cont: 3923 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3924 // CHECK5: omp.body.continue: 3925 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3926 // CHECK5: omp.inner.for.inc: 3927 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3928 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3929 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3930 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3931 // CHECK5: omp.inner.for.end: 3932 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3933 // CHECK5: omp.loop.exit: 3934 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3935 // CHECK5-NEXT: ret void 3936 // CHECK5: terminate.lpad: 3937 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3938 // CHECK5-NEXT: catch i8* null 3939 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3940 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 3941 // CHECK5-NEXT: unreachable 3942 // 3943 // 3944 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD2Ev 3945 // CHECK5-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 3946 // CHECK5-NEXT: entry: 3947 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3948 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3949 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3950 // CHECK5-NEXT: ret void 3951 // 3952 // 3953 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3954 // CHECK5-SAME: () #[[ATTR9:[0-9]+]] { 3955 // CHECK5-NEXT: entry: 3956 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1) 3957 // CHECK5-NEXT: ret void 3958 // 3959 // 3960 // CHECK6-LABEL: define {{[^@]+}}@main 3961 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3962 // CHECK6-NEXT: entry: 3963 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3964 // CHECK6-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 3965 // CHECK6-NEXT: [[A:%.*]] = alloca i8, align 1 3966 // CHECK6-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 3967 // CHECK6-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 3968 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 3969 // CHECK6-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 3970 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 3971 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 3972 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 3973 // CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3974 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 3975 // CHECK6-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 3976 // CHECK6-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 3977 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 3978 // CHECK6: invoke.cont: 3979 // CHECK6-NEXT: store i8 [[CALL]], i8* [[A]], align 1 3980 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 3981 // CHECK6-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3982 // CHECK6-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 3983 // CHECK6-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3984 // CHECK6: omp_offload.failed: 3985 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 3986 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]] 3987 // CHECK6: lpad: 3988 // CHECK6-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 3989 // CHECK6-NEXT: cleanup 3990 // CHECK6-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 3991 // CHECK6-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 3992 // CHECK6-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 3993 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 3994 // CHECK6-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 3995 // CHECK6-NEXT: br label [[EH_RESUME:%.*]] 3996 // CHECK6: omp_offload.cont: 3997 // CHECK6-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 3998 // CHECK6-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 3999 // CHECK6-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 4000 // CHECK6-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 4001 // CHECK6-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4002 // CHECK6-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 4003 // CHECK6-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 4004 // CHECK6-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4005 // CHECK6-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 4006 // CHECK6-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 4007 // CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 4008 // CHECK6-NEXT: store i8* null, i8** [[TMP11]], align 8 4009 // CHECK6-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4010 // CHECK6-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4011 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 4012 // CHECK6-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4013 // CHECK6-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 4014 // CHECK6-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 4015 // CHECK6: omp_offload.failed2: 4016 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 4017 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT3]] 4018 // CHECK6: omp_offload.cont3: 4019 // CHECK6-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 4020 // CHECK6-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 4021 // CHECK6-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 4022 // CHECK6-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 4023 // CHECK6: invoke.cont5: 4024 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 4025 // CHECK6-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 4026 // CHECK6-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 4027 // CHECK6: invoke.cont7: 4028 // CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 4029 // CHECK6-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 4030 // CHECK6-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 4031 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 4032 // CHECK6-NEXT: ret i32 [[TMP17]] 4033 // CHECK6: eh.resume: 4034 // CHECK6-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 4035 // CHECK6-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 4036 // CHECK6-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 4037 // CHECK6-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 4038 // CHECK6-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 4039 // 4040 // 4041 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SC1El 4042 // CHECK6-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4043 // CHECK6-NEXT: entry: 4044 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4045 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 4046 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4047 // CHECK6-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 4048 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4049 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 4050 // CHECK6-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 4051 // CHECK6-NEXT: ret void 4052 // 4053 // 4054 // CHECK6-LABEL: define {{[^@]+}}@_ZN1ScvcEv 4055 // CHECK6-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 4056 // CHECK6-NEXT: entry: 4057 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4058 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4059 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4060 // CHECK6-NEXT: call void @_Z8mayThrowv() 4061 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4062 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 4063 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 4064 // CHECK6-NEXT: ret i8 [[CONV]] 4065 // 4066 // 4067 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 4068 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] { 4069 // CHECK6-NEXT: entry: 4070 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 4071 // CHECK6-NEXT: ret void 4072 // 4073 // 4074 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined. 4075 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 4076 // CHECK6-NEXT: entry: 4077 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4078 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4079 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4080 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4081 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4082 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4083 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4084 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4085 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4086 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4087 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4088 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4089 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4090 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4091 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4092 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4093 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4094 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4095 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4096 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4097 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4098 // CHECK6: cond.true: 4099 // CHECK6-NEXT: br label [[COND_END:%.*]] 4100 // CHECK6: cond.false: 4101 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4102 // CHECK6-NEXT: br label [[COND_END]] 4103 // CHECK6: cond.end: 4104 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4105 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4106 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4107 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4108 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4109 // CHECK6: omp.inner.for.cond: 4110 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4111 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4112 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4113 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4114 // CHECK6: omp.inner.for.body: 4115 // CHECK6-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 4116 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4117 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4118 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4119 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4120 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 4121 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4122 // CHECK6: omp.inner.for.inc: 4123 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4124 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4125 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 4126 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4127 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4128 // CHECK6: omp.inner.for.end: 4129 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4130 // CHECK6: omp.loop.exit: 4131 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4132 // CHECK6-NEXT: ret void 4133 // 4134 // 4135 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1 4136 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4137 // CHECK6-NEXT: entry: 4138 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4139 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4140 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4141 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4142 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4143 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4144 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4145 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4146 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4147 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4148 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4149 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4150 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4151 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4152 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4153 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4154 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4155 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4156 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4157 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4158 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4159 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4160 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4161 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4162 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4163 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4164 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4165 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4166 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4167 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4168 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4169 // CHECK6: cond.true: 4170 // CHECK6-NEXT: br label [[COND_END:%.*]] 4171 // CHECK6: cond.false: 4172 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4173 // CHECK6-NEXT: br label [[COND_END]] 4174 // CHECK6: cond.end: 4175 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4176 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4177 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4178 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4179 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4180 // CHECK6: omp.inner.for.cond: 4181 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4182 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4183 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4184 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4185 // CHECK6: omp.inner.for.body: 4186 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4187 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4188 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4189 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4190 // CHECK6-NEXT: invoke void @_Z3foov() 4191 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4192 // CHECK6: invoke.cont: 4193 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4194 // CHECK6: omp.body.continue: 4195 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4196 // CHECK6: omp.inner.for.inc: 4197 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4198 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4199 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4200 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4201 // CHECK6: omp.inner.for.end: 4202 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4203 // CHECK6: omp.loop.exit: 4204 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4205 // CHECK6-NEXT: ret void 4206 // CHECK6: terminate.lpad: 4207 // CHECK6-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4208 // CHECK6-NEXT: catch i8* null 4209 // CHECK6-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4210 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 4211 // CHECK6-NEXT: unreachable 4212 // 4213 // 4214 // CHECK6-LABEL: define {{[^@]+}}@__clang_call_terminate 4215 // CHECK6-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 4216 // CHECK6-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 4217 // CHECK6-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 4218 // CHECK6-NEXT: unreachable 4219 // 4220 // 4221 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 4222 // CHECK6-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 4223 // CHECK6-NEXT: entry: 4224 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 4225 // CHECK6-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 4226 // CHECK6-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 4227 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 4228 // CHECK6-NEXT: ret void 4229 // 4230 // 4231 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2 4232 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 4233 // CHECK6-NEXT: entry: 4234 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4235 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4236 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 4237 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4238 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4239 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4240 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4241 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4242 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4243 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4244 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4245 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4246 // CHECK6-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 4247 // CHECK6-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 4248 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4249 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4250 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4251 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4252 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4253 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4254 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4255 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4256 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 4257 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4258 // CHECK6: cond.true: 4259 // CHECK6-NEXT: br label [[COND_END:%.*]] 4260 // CHECK6: cond.false: 4261 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4262 // CHECK6-NEXT: br label [[COND_END]] 4263 // CHECK6: cond.end: 4264 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4265 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4266 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4267 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4268 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4269 // CHECK6: omp.inner.for.cond: 4270 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4271 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4272 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4273 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4274 // CHECK6: omp.inner.for.body: 4275 // CHECK6-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 4276 // CHECK6-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 4277 // CHECK6-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 4278 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4279 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4280 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4281 // CHECK6-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 4282 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 4283 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4284 // CHECK6: omp.inner.for.inc: 4285 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4286 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4287 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 4288 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4289 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4290 // CHECK6: omp.inner.for.end: 4291 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4292 // CHECK6: omp.loop.exit: 4293 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4294 // CHECK6-NEXT: ret void 4295 // 4296 // 4297 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3 4298 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4299 // CHECK6-NEXT: entry: 4300 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4301 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4302 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4303 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4304 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4305 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4306 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4307 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4308 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4309 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4310 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4311 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4312 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4313 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4314 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4315 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4316 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4317 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4318 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4319 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4320 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4321 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4322 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4323 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4324 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4325 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4326 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4327 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4328 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4329 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4330 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4331 // CHECK6: cond.true: 4332 // CHECK6-NEXT: br label [[COND_END:%.*]] 4333 // CHECK6: cond.false: 4334 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4335 // CHECK6-NEXT: br label [[COND_END]] 4336 // CHECK6: cond.end: 4337 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4338 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4339 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4340 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4341 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4342 // CHECK6: omp.inner.for.cond: 4343 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4344 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4345 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4346 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4347 // CHECK6: omp.inner.for.body: 4348 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4349 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4350 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4351 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4352 // CHECK6-NEXT: invoke void @_Z3foov() 4353 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4354 // CHECK6: invoke.cont: 4355 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4356 // CHECK6: omp.body.continue: 4357 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4358 // CHECK6: omp.inner.for.inc: 4359 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4360 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4361 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4362 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4363 // CHECK6: omp.inner.for.end: 4364 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4365 // CHECK6: omp.loop.exit: 4366 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4367 // CHECK6-NEXT: ret void 4368 // CHECK6: terminate.lpad: 4369 // CHECK6-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4370 // CHECK6-NEXT: catch i8* null 4371 // CHECK6-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4372 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 4373 // CHECK6-NEXT: unreachable 4374 // 4375 // 4376 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 4377 // CHECK6-SAME: () #[[ATTR7:[0-9]+]] comdat { 4378 // CHECK6-NEXT: entry: 4379 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4380 // CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4381 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 4382 // CHECK6-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 4383 // CHECK6-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 4384 // CHECK6-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4385 // CHECK6: omp_offload.failed: 4386 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 4387 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]] 4388 // CHECK6: omp_offload.cont: 4389 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 4390 // CHECK6-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 4391 // CHECK6-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 4392 // CHECK6-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 4393 // CHECK6: omp_offload.failed2: 4394 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 4395 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT3]] 4396 // CHECK6: omp_offload.cont3: 4397 // CHECK6-NEXT: ret i32 0 4398 // 4399 // 4400 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 4401 // CHECK6-SAME: () #[[ATTR7]] comdat { 4402 // CHECK6-NEXT: entry: 4403 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4404 // CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4405 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 4406 // CHECK6-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 4407 // CHECK6-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 4408 // CHECK6-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4409 // CHECK6: omp_offload.failed: 4410 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 4411 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]] 4412 // CHECK6: omp_offload.cont: 4413 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 4414 // CHECK6-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 4415 // CHECK6-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 4416 // CHECK6-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 4417 // CHECK6: omp_offload.failed2: 4418 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 4419 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT3]] 4420 // CHECK6: omp_offload.cont3: 4421 // CHECK6-NEXT: ret i32 0 4422 // 4423 // 4424 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SD1Ev 4425 // CHECK6-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 4426 // CHECK6-NEXT: entry: 4427 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4428 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4429 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4430 // CHECK6-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR6]] 4431 // CHECK6-NEXT: ret void 4432 // 4433 // 4434 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SC2El 4435 // CHECK6-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 4436 // CHECK6-NEXT: entry: 4437 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4438 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 4439 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4440 // CHECK6-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 4441 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4442 // CHECK6-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4443 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 4444 // CHECK6-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 4445 // CHECK6-NEXT: ret void 4446 // 4447 // 4448 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 4449 // CHECK6-SAME: () #[[ATTR3]] { 4450 // CHECK6-NEXT: entry: 4451 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 4452 // CHECK6-NEXT: ret void 4453 // 4454 // 4455 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..4 4456 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 4457 // CHECK6-NEXT: entry: 4458 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4459 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4460 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4461 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4462 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4463 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4464 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4465 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4466 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4467 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4468 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4469 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4470 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4471 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4472 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4473 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4474 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4475 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4476 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4477 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4478 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4479 // CHECK6: cond.true: 4480 // CHECK6-NEXT: br label [[COND_END:%.*]] 4481 // CHECK6: cond.false: 4482 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4483 // CHECK6-NEXT: br label [[COND_END]] 4484 // CHECK6: cond.end: 4485 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4486 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4487 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4488 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4489 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4490 // CHECK6: omp.inner.for.cond: 4491 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4492 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4493 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4494 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4495 // CHECK6: omp.inner.for.body: 4496 // CHECK6-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 4497 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4498 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4499 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4500 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4501 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 4502 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4503 // CHECK6: omp.inner.for.inc: 4504 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4505 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4506 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 4507 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4508 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4509 // CHECK6: omp.inner.for.end: 4510 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4511 // CHECK6: omp.loop.exit: 4512 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4513 // CHECK6-NEXT: ret void 4514 // 4515 // 4516 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..5 4517 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4518 // CHECK6-NEXT: entry: 4519 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4520 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4521 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4522 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4523 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4524 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4525 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4526 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4527 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4528 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4529 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4530 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4531 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4532 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4533 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4534 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4535 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4536 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4537 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4538 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4539 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4540 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4541 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4542 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4543 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4544 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4545 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4546 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4547 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4548 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4549 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4550 // CHECK6: cond.true: 4551 // CHECK6-NEXT: br label [[COND_END:%.*]] 4552 // CHECK6: cond.false: 4553 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4554 // CHECK6-NEXT: br label [[COND_END]] 4555 // CHECK6: cond.end: 4556 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4557 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4558 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4559 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4560 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4561 // CHECK6: omp.inner.for.cond: 4562 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4563 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4564 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4565 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4566 // CHECK6: omp.inner.for.body: 4567 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4568 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4569 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4570 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4571 // CHECK6-NEXT: invoke void @_Z3foov() 4572 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4573 // CHECK6: invoke.cont: 4574 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4575 // CHECK6: omp.body.continue: 4576 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4577 // CHECK6: omp.inner.for.inc: 4578 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4579 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4580 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4581 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4582 // CHECK6: omp.inner.for.end: 4583 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4584 // CHECK6: omp.loop.exit: 4585 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4586 // CHECK6-NEXT: ret void 4587 // CHECK6: terminate.lpad: 4588 // CHECK6-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4589 // CHECK6-NEXT: catch i8* null 4590 // CHECK6-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4591 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 4592 // CHECK6-NEXT: unreachable 4593 // 4594 // 4595 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 4596 // CHECK6-SAME: () #[[ATTR3]] { 4597 // CHECK6-NEXT: entry: 4598 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 4599 // CHECK6-NEXT: ret void 4600 // 4601 // 4602 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6 4603 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 4604 // CHECK6-NEXT: entry: 4605 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4606 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4607 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4608 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4609 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4610 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4611 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4612 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4613 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4614 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4615 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4616 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4617 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4618 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4619 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4620 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4621 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4622 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4623 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4624 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4625 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4626 // CHECK6: cond.true: 4627 // CHECK6-NEXT: br label [[COND_END:%.*]] 4628 // CHECK6: cond.false: 4629 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4630 // CHECK6-NEXT: br label [[COND_END]] 4631 // CHECK6: cond.end: 4632 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4633 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4634 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4635 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4636 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4637 // CHECK6: omp.inner.for.cond: 4638 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4639 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4640 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4641 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4642 // CHECK6: omp.inner.for.body: 4643 // CHECK6-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 4644 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4645 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4646 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4647 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4648 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 4649 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4650 // CHECK6: omp.inner.for.inc: 4651 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4652 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4653 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 4654 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4655 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4656 // CHECK6: omp.inner.for.end: 4657 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4658 // CHECK6: omp.loop.exit: 4659 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4660 // CHECK6-NEXT: ret void 4661 // 4662 // 4663 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..7 4664 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4665 // CHECK6-NEXT: entry: 4666 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4667 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4668 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4669 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4670 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4671 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4672 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4673 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4674 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4675 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4676 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4677 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4678 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4679 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4680 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4681 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4682 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4683 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4684 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4685 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4686 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4687 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4688 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4689 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4690 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4691 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4692 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4693 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4694 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4695 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4696 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4697 // CHECK6: cond.true: 4698 // CHECK6-NEXT: br label [[COND_END:%.*]] 4699 // CHECK6: cond.false: 4700 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4701 // CHECK6-NEXT: br label [[COND_END]] 4702 // CHECK6: cond.end: 4703 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4704 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4705 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4706 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4707 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4708 // CHECK6: omp.inner.for.cond: 4709 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4710 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4711 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4712 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4713 // CHECK6: omp.inner.for.body: 4714 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4715 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4716 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4717 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4718 // CHECK6-NEXT: invoke void @_Z3foov() 4719 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4720 // CHECK6: invoke.cont: 4721 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4722 // CHECK6: omp.body.continue: 4723 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4724 // CHECK6: omp.inner.for.inc: 4725 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4726 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4727 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4728 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4729 // CHECK6: omp.inner.for.end: 4730 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4731 // CHECK6: omp.loop.exit: 4732 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4733 // CHECK6-NEXT: ret void 4734 // CHECK6: terminate.lpad: 4735 // CHECK6-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4736 // CHECK6-NEXT: catch i8* null 4737 // CHECK6-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4738 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 4739 // CHECK6-NEXT: unreachable 4740 // 4741 // 4742 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 4743 // CHECK6-SAME: () #[[ATTR3]] { 4744 // CHECK6-NEXT: entry: 4745 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 4746 // CHECK6-NEXT: ret void 4747 // 4748 // 4749 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..8 4750 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 4751 // CHECK6-NEXT: entry: 4752 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4753 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4754 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4755 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4756 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4757 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4758 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4759 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4760 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4761 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4762 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4763 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4764 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4765 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4766 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4767 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4768 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4769 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4770 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4771 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4772 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4773 // CHECK6: cond.true: 4774 // CHECK6-NEXT: br label [[COND_END:%.*]] 4775 // CHECK6: cond.false: 4776 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4777 // CHECK6-NEXT: br label [[COND_END]] 4778 // CHECK6: cond.end: 4779 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4780 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4781 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4782 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4783 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4784 // CHECK6: omp.inner.for.cond: 4785 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4786 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4787 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4788 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4789 // CHECK6: omp.inner.for.body: 4790 // CHECK6-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 4791 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4792 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4793 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4794 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4795 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 4796 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4797 // CHECK6: omp.inner.for.inc: 4798 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4799 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4800 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 4801 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4802 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4803 // CHECK6: omp.inner.for.end: 4804 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4805 // CHECK6: omp.loop.exit: 4806 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4807 // CHECK6-NEXT: ret void 4808 // 4809 // 4810 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..9 4811 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4812 // CHECK6-NEXT: entry: 4813 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4814 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4815 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4816 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4817 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4818 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4819 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4820 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4821 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4822 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4823 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4824 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4825 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4826 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4827 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4828 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4829 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4830 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4831 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4832 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4833 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4834 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4835 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4836 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4837 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4838 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4839 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4840 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4841 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4842 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4843 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4844 // CHECK6: cond.true: 4845 // CHECK6-NEXT: br label [[COND_END:%.*]] 4846 // CHECK6: cond.false: 4847 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4848 // CHECK6-NEXT: br label [[COND_END]] 4849 // CHECK6: cond.end: 4850 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4851 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4852 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4853 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4854 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4855 // CHECK6: omp.inner.for.cond: 4856 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4857 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4858 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4859 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4860 // CHECK6: omp.inner.for.body: 4861 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4862 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4863 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4864 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4865 // CHECK6-NEXT: invoke void @_Z3foov() 4866 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4867 // CHECK6: invoke.cont: 4868 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4869 // CHECK6: omp.body.continue: 4870 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4871 // CHECK6: omp.inner.for.inc: 4872 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4873 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4874 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4875 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4876 // CHECK6: omp.inner.for.end: 4877 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4878 // CHECK6: omp.loop.exit: 4879 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4880 // CHECK6-NEXT: ret void 4881 // CHECK6: terminate.lpad: 4882 // CHECK6-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4883 // CHECK6-NEXT: catch i8* null 4884 // CHECK6-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4885 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 4886 // CHECK6-NEXT: unreachable 4887 // 4888 // 4889 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 4890 // CHECK6-SAME: () #[[ATTR3]] { 4891 // CHECK6-NEXT: entry: 4892 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 4893 // CHECK6-NEXT: ret void 4894 // 4895 // 4896 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..10 4897 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4898 // CHECK6-NEXT: entry: 4899 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4900 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4901 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4902 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4903 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4904 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4905 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4906 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4907 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4908 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 4909 // CHECK6-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 4910 // CHECK6-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 4911 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4912 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4913 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4914 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4915 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4916 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4917 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4918 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4919 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4920 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4921 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4922 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4923 // CHECK6: cond.true: 4924 // CHECK6-NEXT: br label [[COND_END:%.*]] 4925 // CHECK6: cond.false: 4926 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4927 // CHECK6-NEXT: br label [[COND_END]] 4928 // CHECK6: cond.end: 4929 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4930 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4931 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4932 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4933 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4934 // CHECK6: omp.inner.for.cond: 4935 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4936 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4937 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4938 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4939 // CHECK6: omp.inner.for.body: 4940 // CHECK6-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[REF_TMP]], i64 23) 4941 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4942 // CHECK6: invoke.cont: 4943 // CHECK6-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) 4944 // CHECK6-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 4945 // CHECK6: invoke.cont2: 4946 // CHECK6-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 4947 // CHECK6-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 4948 // CHECK6-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 4949 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4950 // CHECK6-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4951 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4952 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4953 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 4954 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4955 // CHECK6: omp.inner.for.inc: 4956 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4957 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4958 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4959 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4960 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4961 // CHECK6: lpad: 4962 // CHECK6-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 4963 // CHECK6-NEXT: catch i8* null 4964 // CHECK6-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 4965 // CHECK6-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 4966 // CHECK6-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 4967 // CHECK6-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 4968 // CHECK6-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 4969 // CHECK6-NEXT: br label [[TERMINATE_HANDLER:%.*]] 4970 // CHECK6: omp.inner.for.end: 4971 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4972 // CHECK6: omp.loop.exit: 4973 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4974 // CHECK6-NEXT: ret void 4975 // CHECK6: terminate.lpad: 4976 // CHECK6-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 4977 // CHECK6-NEXT: catch i8* null 4978 // CHECK6-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 4979 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 4980 // CHECK6-NEXT: unreachable 4981 // CHECK6: terminate.handler: 4982 // CHECK6-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 4983 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 4984 // CHECK6-NEXT: unreachable 4985 // 4986 // 4987 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..11 4988 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4989 // CHECK6-NEXT: entry: 4990 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4991 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4992 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4993 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4994 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4995 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4996 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4997 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4998 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4999 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5000 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5001 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5002 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5003 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5004 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5005 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5006 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 5007 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5008 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5009 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5010 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5011 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5012 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5013 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5014 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5015 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5016 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 5017 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5018 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5019 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5020 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5021 // CHECK6: cond.true: 5022 // CHECK6-NEXT: br label [[COND_END:%.*]] 5023 // CHECK6: cond.false: 5024 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5025 // CHECK6-NEXT: br label [[COND_END]] 5026 // CHECK6: cond.end: 5027 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5028 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5029 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5030 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 5031 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5032 // CHECK6: omp.inner.for.cond: 5033 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5034 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5035 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5036 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5037 // CHECK6: omp.inner.for.body: 5038 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5039 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5040 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5041 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5042 // CHECK6-NEXT: invoke void @_Z3foov() 5043 // CHECK6-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5044 // CHECK6: invoke.cont: 5045 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5046 // CHECK6: omp.body.continue: 5047 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5048 // CHECK6: omp.inner.for.inc: 5049 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5050 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5051 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5052 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5053 // CHECK6: omp.inner.for.end: 5054 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5055 // CHECK6: omp.loop.exit: 5056 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 5057 // CHECK6-NEXT: ret void 5058 // CHECK6: terminate.lpad: 5059 // CHECK6-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 5060 // CHECK6-NEXT: catch i8* null 5061 // CHECK6-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 5062 // CHECK6-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 5063 // CHECK6-NEXT: unreachable 5064 // 5065 // 5066 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SD2Ev 5067 // CHECK6-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 5068 // CHECK6-NEXT: entry: 5069 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5070 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5071 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5072 // CHECK6-NEXT: ret void 5073 // 5074 // 5075 // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 5076 // CHECK6-SAME: () #[[ATTR9:[0-9]+]] { 5077 // CHECK6-NEXT: entry: 5078 // CHECK6-NEXT: call void @__tgt_register_requires(i64 1) 5079 // CHECK6-NEXT: ret void 5080 // 5081 // 5082 // CHECK7-LABEL: define {{[^@]+}}@main 5083 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5084 // CHECK7-NEXT: entry: 5085 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5086 // CHECK7-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 5087 // CHECK7-NEXT: [[A:%.*]] = alloca i8, align 1 5088 // CHECK7-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 5089 // CHECK7-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 5090 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 5091 // CHECK7-NEXT: [[I2:%.*]] = alloca i32, align 4 5092 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 5093 // CHECK7-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 5094 // CHECK7-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 5095 // CHECK7-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 5096 // CHECK7: invoke.cont: 5097 // CHECK7-NEXT: store i8 [[CALL]], i8* [[A]], align 1 5098 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 5099 // CHECK7-NEXT: br label [[FOR_COND:%.*]] 5100 // CHECK7: for.cond: 5101 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5102 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 5103 // CHECK7-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5104 // CHECK7: for.body: 5105 // CHECK7-NEXT: invoke void @_Z3foov() 5106 // CHECK7-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5107 // CHECK7: invoke.cont1: 5108 // CHECK7-NEXT: br label [[FOR_INC:%.*]] 5109 // CHECK7: for.inc: 5110 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5111 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 5112 // CHECK7-NEXT: store i32 [[INC]], i32* [[I]], align 4 5113 // CHECK7-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 5114 // CHECK7: lpad: 5115 // CHECK7-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 5116 // CHECK7-NEXT: cleanup 5117 // CHECK7-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 5118 // CHECK7-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 5119 // CHECK7-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 5120 // CHECK7-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 5121 // CHECK7-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]] 5122 // CHECK7-NEXT: br label [[EH_RESUME:%.*]] 5123 // CHECK7: for.end: 5124 // CHECK7-NEXT: store i32 0, i32* [[I2]], align 4 5125 // CHECK7-NEXT: br label [[FOR_COND3:%.*]] 5126 // CHECK7: for.cond3: 5127 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4 5128 // CHECK7-NEXT: [[CMP4:%.*]] = icmp slt i32 [[TMP5]], 100 5129 // CHECK7-NEXT: br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END9:%.*]] 5130 // CHECK7: for.body5: 5131 // CHECK7-NEXT: invoke void @_Z3foov() 5132 // CHECK7-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[TERMINATE_LPAD]] 5133 // CHECK7: invoke.cont6: 5134 // CHECK7-NEXT: br label [[FOR_INC7:%.*]] 5135 // CHECK7: for.inc7: 5136 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[I2]], align 4 5137 // CHECK7-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP6]], 1 5138 // CHECK7-NEXT: store i32 [[INC8]], i32* [[I2]], align 4 5139 // CHECK7-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP4:![0-9]+]] 5140 // CHECK7: for.end9: 5141 // CHECK7-NEXT: [[TMP7:%.*]] = load i8, i8* [[A]], align 1 5142 // CHECK7-NEXT: [[CONV:%.*]] = sext i8 [[TMP7]] to i32 5143 // CHECK7-NEXT: [[CALL11:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 5144 // CHECK7-NEXT: to label [[INVOKE_CONT10:%.*]] unwind label [[LPAD]] 5145 // CHECK7: invoke.cont10: 5146 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CALL11]] 5147 // CHECK7-NEXT: [[CALL13:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 5148 // CHECK7-NEXT: to label [[INVOKE_CONT12:%.*]] unwind label [[LPAD]] 5149 // CHECK7: invoke.cont12: 5150 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[ADD]], [[CALL13]] 5151 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[RETVAL]], align 4 5152 // CHECK7-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7]] 5153 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[RETVAL]], align 4 5154 // CHECK7-NEXT: ret i32 [[TMP8]] 5155 // CHECK7: eh.resume: 5156 // CHECK7-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 5157 // CHECK7-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 5158 // CHECK7-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 5159 // CHECK7-NEXT: [[LPAD_VAL15:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 5160 // CHECK7-NEXT: resume { i8*, i32 } [[LPAD_VAL15]] 5161 // CHECK7: terminate.lpad: 5162 // CHECK7-NEXT: [[TMP9:%.*]] = landingpad { i8*, i32 } 5163 // CHECK7-NEXT: catch i8* null 5164 // CHECK7-NEXT: [[TMP10:%.*]] = extractvalue { i8*, i32 } [[TMP9]], 0 5165 // CHECK7-NEXT: call void @__clang_call_terminate(i8* [[TMP10]]) #[[ATTR8:[0-9]+]] 5166 // CHECK7-NEXT: unreachable 5167 // 5168 // 5169 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SC1El 5170 // CHECK7-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5171 // CHECK7-NEXT: entry: 5172 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5173 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 5174 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5175 // CHECK7-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 5176 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5177 // CHECK7-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 5178 // CHECK7-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 5179 // CHECK7-NEXT: ret void 5180 // 5181 // 5182 // CHECK7-LABEL: define {{[^@]+}}@_ZN1ScvcEv 5183 // CHECK7-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 5184 // CHECK7-NEXT: entry: 5185 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5186 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5187 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5188 // CHECK7-NEXT: call void @_Z8mayThrowv() 5189 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5190 // CHECK7-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 5191 // CHECK7-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 5192 // CHECK7-NEXT: ret i8 [[CONV]] 5193 // 5194 // 5195 // CHECK7-LABEL: define {{[^@]+}}@__clang_call_terminate 5196 // CHECK7-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat { 5197 // CHECK7-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]] 5198 // CHECK7-NEXT: call void @_ZSt9terminatev() #[[ATTR8]] 5199 // CHECK7-NEXT: unreachable 5200 // 5201 // 5202 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 5203 // CHECK7-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5204 // CHECK7-NEXT: entry: 5205 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 5206 // CHECK7-NEXT: [[I1:%.*]] = alloca i32, align 4 5207 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 5208 // CHECK7-NEXT: br label [[FOR_COND:%.*]] 5209 // CHECK7: for.cond: 5210 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5211 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 5212 // CHECK7-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5213 // CHECK7: for.body: 5214 // CHECK7-NEXT: invoke void @_Z3foov() 5215 // CHECK7-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5216 // CHECK7: invoke.cont: 5217 // CHECK7-NEXT: br label [[FOR_INC:%.*]] 5218 // CHECK7: for.inc: 5219 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5220 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 5221 // CHECK7-NEXT: store i32 [[INC]], i32* [[I]], align 4 5222 // CHECK7-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 5223 // CHECK7: for.end: 5224 // CHECK7-NEXT: store i32 0, i32* [[I1]], align 4 5225 // CHECK7-NEXT: br label [[FOR_COND2:%.*]] 5226 // CHECK7: for.cond2: 5227 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 5228 // CHECK7-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 5229 // CHECK7-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 5230 // CHECK7: for.body4: 5231 // CHECK7-NEXT: invoke void @_Z3foov() 5232 // CHECK7-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 5233 // CHECK7: invoke.cont5: 5234 // CHECK7-NEXT: br label [[FOR_INC6:%.*]] 5235 // CHECK7: for.inc6: 5236 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 5237 // CHECK7-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 5238 // CHECK7-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 5239 // CHECK7-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP6:![0-9]+]] 5240 // CHECK7: for.end8: 5241 // CHECK7-NEXT: ret i32 0 5242 // CHECK7: terminate.lpad: 5243 // CHECK7-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 5244 // CHECK7-NEXT: catch i8* null 5245 // CHECK7-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 5246 // CHECK7-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 5247 // CHECK7-NEXT: unreachable 5248 // 5249 // 5250 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 5251 // CHECK7-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5252 // CHECK7-NEXT: entry: 5253 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 5254 // CHECK7-NEXT: [[I1:%.*]] = alloca i32, align 4 5255 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 5256 // CHECK7-NEXT: br label [[FOR_COND:%.*]] 5257 // CHECK7: for.cond: 5258 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5259 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 5260 // CHECK7-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5261 // CHECK7: for.body: 5262 // CHECK7-NEXT: invoke void @_Z3foov() 5263 // CHECK7-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5264 // CHECK7: invoke.cont: 5265 // CHECK7-NEXT: br label [[FOR_INC:%.*]] 5266 // CHECK7: for.inc: 5267 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5268 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 5269 // CHECK7-NEXT: store i32 [[INC]], i32* [[I]], align 4 5270 // CHECK7-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 5271 // CHECK7: for.end: 5272 // CHECK7-NEXT: store i32 0, i32* [[I1]], align 4 5273 // CHECK7-NEXT: br label [[FOR_COND2:%.*]] 5274 // CHECK7: for.cond2: 5275 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 5276 // CHECK7-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 5277 // CHECK7-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 5278 // CHECK7: for.body4: 5279 // CHECK7-NEXT: invoke void @_Z3foov() 5280 // CHECK7-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 5281 // CHECK7: invoke.cont5: 5282 // CHECK7-NEXT: br label [[FOR_INC6:%.*]] 5283 // CHECK7: for.inc6: 5284 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 5285 // CHECK7-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 5286 // CHECK7-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 5287 // CHECK7-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP8:![0-9]+]] 5288 // CHECK7: for.end8: 5289 // CHECK7-NEXT: ret i32 0 5290 // CHECK7: terminate.lpad: 5291 // CHECK7-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 5292 // CHECK7-NEXT: catch i8* null 5293 // CHECK7-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 5294 // CHECK7-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 5295 // CHECK7-NEXT: unreachable 5296 // 5297 // 5298 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SD1Ev 5299 // CHECK7-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 { 5300 // CHECK7-NEXT: entry: 5301 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5302 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5303 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5304 // CHECK7-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR7]] 5305 // CHECK7-NEXT: ret void 5306 // 5307 // 5308 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SC2El 5309 // CHECK7-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 5310 // CHECK7-NEXT: entry: 5311 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5312 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 5313 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5314 // CHECK7-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 5315 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5316 // CHECK7-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5317 // CHECK7-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 5318 // CHECK7-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 5319 // CHECK7-NEXT: ret void 5320 // 5321 // 5322 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SD2Ev 5323 // CHECK7-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 5324 // CHECK7-NEXT: entry: 5325 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5326 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5327 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5328 // CHECK7-NEXT: ret void 5329 // 5330 // 5331 // CHECK8-LABEL: define {{[^@]+}}@main 5332 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5333 // CHECK8-NEXT: entry: 5334 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5335 // CHECK8-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 5336 // CHECK8-NEXT: [[A:%.*]] = alloca i8, align 1 5337 // CHECK8-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 5338 // CHECK8-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 5339 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 5340 // CHECK8-NEXT: [[I2:%.*]] = alloca i32, align 4 5341 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 5342 // CHECK8-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 5343 // CHECK8-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 5344 // CHECK8-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 5345 // CHECK8: invoke.cont: 5346 // CHECK8-NEXT: store i8 [[CALL]], i8* [[A]], align 1 5347 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 5348 // CHECK8-NEXT: br label [[FOR_COND:%.*]] 5349 // CHECK8: for.cond: 5350 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5351 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 5352 // CHECK8-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5353 // CHECK8: for.body: 5354 // CHECK8-NEXT: invoke void @_Z3foov() 5355 // CHECK8-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5356 // CHECK8: invoke.cont1: 5357 // CHECK8-NEXT: br label [[FOR_INC:%.*]] 5358 // CHECK8: for.inc: 5359 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5360 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 5361 // CHECK8-NEXT: store i32 [[INC]], i32* [[I]], align 4 5362 // CHECK8-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 5363 // CHECK8: lpad: 5364 // CHECK8-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 5365 // CHECK8-NEXT: cleanup 5366 // CHECK8-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 5367 // CHECK8-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 5368 // CHECK8-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 5369 // CHECK8-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 5370 // CHECK8-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]] 5371 // CHECK8-NEXT: br label [[EH_RESUME:%.*]] 5372 // CHECK8: for.end: 5373 // CHECK8-NEXT: store i32 0, i32* [[I2]], align 4 5374 // CHECK8-NEXT: br label [[FOR_COND3:%.*]] 5375 // CHECK8: for.cond3: 5376 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4 5377 // CHECK8-NEXT: [[CMP4:%.*]] = icmp slt i32 [[TMP5]], 100 5378 // CHECK8-NEXT: br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END9:%.*]] 5379 // CHECK8: for.body5: 5380 // CHECK8-NEXT: invoke void @_Z3foov() 5381 // CHECK8-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[TERMINATE_LPAD]] 5382 // CHECK8: invoke.cont6: 5383 // CHECK8-NEXT: br label [[FOR_INC7:%.*]] 5384 // CHECK8: for.inc7: 5385 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[I2]], align 4 5386 // CHECK8-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP6]], 1 5387 // CHECK8-NEXT: store i32 [[INC8]], i32* [[I2]], align 4 5388 // CHECK8-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP4:![0-9]+]] 5389 // CHECK8: for.end9: 5390 // CHECK8-NEXT: [[TMP7:%.*]] = load i8, i8* [[A]], align 1 5391 // CHECK8-NEXT: [[CONV:%.*]] = sext i8 [[TMP7]] to i32 5392 // CHECK8-NEXT: [[CALL11:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 5393 // CHECK8-NEXT: to label [[INVOKE_CONT10:%.*]] unwind label [[LPAD]] 5394 // CHECK8: invoke.cont10: 5395 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CALL11]] 5396 // CHECK8-NEXT: [[CALL13:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 5397 // CHECK8-NEXT: to label [[INVOKE_CONT12:%.*]] unwind label [[LPAD]] 5398 // CHECK8: invoke.cont12: 5399 // CHECK8-NEXT: [[ADD14:%.*]] = add nsw i32 [[ADD]], [[CALL13]] 5400 // CHECK8-NEXT: store i32 [[ADD14]], i32* [[RETVAL]], align 4 5401 // CHECK8-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7]] 5402 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[RETVAL]], align 4 5403 // CHECK8-NEXT: ret i32 [[TMP8]] 5404 // CHECK8: eh.resume: 5405 // CHECK8-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 5406 // CHECK8-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 5407 // CHECK8-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 5408 // CHECK8-NEXT: [[LPAD_VAL15:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 5409 // CHECK8-NEXT: resume { i8*, i32 } [[LPAD_VAL15]] 5410 // CHECK8: terminate.lpad: 5411 // CHECK8-NEXT: [[TMP9:%.*]] = landingpad { i8*, i32 } 5412 // CHECK8-NEXT: catch i8* null 5413 // CHECK8-NEXT: [[TMP10:%.*]] = extractvalue { i8*, i32 } [[TMP9]], 0 5414 // CHECK8-NEXT: call void @__clang_call_terminate(i8* [[TMP10]]) #[[ATTR8:[0-9]+]] 5415 // CHECK8-NEXT: unreachable 5416 // 5417 // 5418 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SC1El 5419 // CHECK8-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5420 // CHECK8-NEXT: entry: 5421 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5422 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 5423 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5424 // CHECK8-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 5425 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5426 // CHECK8-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 5427 // CHECK8-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 5428 // CHECK8-NEXT: ret void 5429 // 5430 // 5431 // CHECK8-LABEL: define {{[^@]+}}@_ZN1ScvcEv 5432 // CHECK8-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 5433 // CHECK8-NEXT: entry: 5434 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5435 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5436 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5437 // CHECK8-NEXT: call void @_Z8mayThrowv() 5438 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5439 // CHECK8-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 5440 // CHECK8-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 5441 // CHECK8-NEXT: ret i8 [[CONV]] 5442 // 5443 // 5444 // CHECK8-LABEL: define {{[^@]+}}@__clang_call_terminate 5445 // CHECK8-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat { 5446 // CHECK8-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]] 5447 // CHECK8-NEXT: call void @_ZSt9terminatev() #[[ATTR8]] 5448 // CHECK8-NEXT: unreachable 5449 // 5450 // 5451 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 5452 // CHECK8-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5453 // CHECK8-NEXT: entry: 5454 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 5455 // CHECK8-NEXT: [[I1:%.*]] = alloca i32, align 4 5456 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 5457 // CHECK8-NEXT: br label [[FOR_COND:%.*]] 5458 // CHECK8: for.cond: 5459 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5460 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 5461 // CHECK8-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5462 // CHECK8: for.body: 5463 // CHECK8-NEXT: invoke void @_Z3foov() 5464 // CHECK8-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5465 // CHECK8: invoke.cont: 5466 // CHECK8-NEXT: br label [[FOR_INC:%.*]] 5467 // CHECK8: for.inc: 5468 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5469 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 5470 // CHECK8-NEXT: store i32 [[INC]], i32* [[I]], align 4 5471 // CHECK8-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 5472 // CHECK8: for.end: 5473 // CHECK8-NEXT: store i32 0, i32* [[I1]], align 4 5474 // CHECK8-NEXT: br label [[FOR_COND2:%.*]] 5475 // CHECK8: for.cond2: 5476 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 5477 // CHECK8-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 5478 // CHECK8-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 5479 // CHECK8: for.body4: 5480 // CHECK8-NEXT: invoke void @_Z3foov() 5481 // CHECK8-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 5482 // CHECK8: invoke.cont5: 5483 // CHECK8-NEXT: br label [[FOR_INC6:%.*]] 5484 // CHECK8: for.inc6: 5485 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 5486 // CHECK8-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 5487 // CHECK8-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 5488 // CHECK8-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP6:![0-9]+]] 5489 // CHECK8: for.end8: 5490 // CHECK8-NEXT: ret i32 0 5491 // CHECK8: terminate.lpad: 5492 // CHECK8-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 5493 // CHECK8-NEXT: catch i8* null 5494 // CHECK8-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 5495 // CHECK8-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 5496 // CHECK8-NEXT: unreachable 5497 // 5498 // 5499 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 5500 // CHECK8-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5501 // CHECK8-NEXT: entry: 5502 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 5503 // CHECK8-NEXT: [[I1:%.*]] = alloca i32, align 4 5504 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 5505 // CHECK8-NEXT: br label [[FOR_COND:%.*]] 5506 // CHECK8: for.cond: 5507 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5508 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 5509 // CHECK8-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5510 // CHECK8: for.body: 5511 // CHECK8-NEXT: invoke void @_Z3foov() 5512 // CHECK8-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5513 // CHECK8: invoke.cont: 5514 // CHECK8-NEXT: br label [[FOR_INC:%.*]] 5515 // CHECK8: for.inc: 5516 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5517 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 5518 // CHECK8-NEXT: store i32 [[INC]], i32* [[I]], align 4 5519 // CHECK8-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 5520 // CHECK8: for.end: 5521 // CHECK8-NEXT: store i32 0, i32* [[I1]], align 4 5522 // CHECK8-NEXT: br label [[FOR_COND2:%.*]] 5523 // CHECK8: for.cond2: 5524 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 5525 // CHECK8-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 5526 // CHECK8-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 5527 // CHECK8: for.body4: 5528 // CHECK8-NEXT: invoke void @_Z3foov() 5529 // CHECK8-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 5530 // CHECK8: invoke.cont5: 5531 // CHECK8-NEXT: br label [[FOR_INC6:%.*]] 5532 // CHECK8: for.inc6: 5533 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 5534 // CHECK8-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 5535 // CHECK8-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 5536 // CHECK8-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP8:![0-9]+]] 5537 // CHECK8: for.end8: 5538 // CHECK8-NEXT: ret i32 0 5539 // CHECK8: terminate.lpad: 5540 // CHECK8-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 5541 // CHECK8-NEXT: catch i8* null 5542 // CHECK8-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 5543 // CHECK8-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 5544 // CHECK8-NEXT: unreachable 5545 // 5546 // 5547 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SD1Ev 5548 // CHECK8-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 { 5549 // CHECK8-NEXT: entry: 5550 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5551 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5552 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5553 // CHECK8-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR7]] 5554 // CHECK8-NEXT: ret void 5555 // 5556 // 5557 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SC2El 5558 // CHECK8-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 5559 // CHECK8-NEXT: entry: 5560 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5561 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 5562 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5563 // CHECK8-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 5564 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5565 // CHECK8-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5566 // CHECK8-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 5567 // CHECK8-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 5568 // CHECK8-NEXT: ret void 5569 // 5570 // 5571 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SD2Ev 5572 // CHECK8-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 5573 // CHECK8-NEXT: entry: 5574 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5575 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5576 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5577 // CHECK8-NEXT: ret void 5578 // 5579 // 5580 // CHECK9-LABEL: define {{[^@]+}}@main 5581 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5582 // CHECK9-NEXT: entry: 5583 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5584 // CHECK9-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 5585 // CHECK9-NEXT: [[A:%.*]] = alloca i8, align 1 5586 // CHECK9-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 5587 // CHECK9-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 5588 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5589 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 5590 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 5591 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 5592 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 5593 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 5594 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 5595 // CHECK9-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 5596 // CHECK9-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 5597 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 5598 // CHECK9: invoke.cont: 5599 // CHECK9-NEXT: store i8 [[CALL]], i8* [[A]], align 1 5600 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 5601 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 5602 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 5603 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5604 // CHECK9: omp_offload.failed: 5605 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 5606 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 5607 // CHECK9: lpad: 5608 // CHECK9-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 5609 // CHECK9-NEXT: cleanup 5610 // CHECK9-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 5611 // CHECK9-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 5612 // CHECK9-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 5613 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 5614 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 5615 // CHECK9-NEXT: br label [[EH_RESUME:%.*]] 5616 // CHECK9: omp_offload.cont: 5617 // CHECK9-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 5618 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 5619 // CHECK9-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 5620 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 5621 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5622 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 5623 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 5624 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5625 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 5626 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 5627 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 5628 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 5629 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5630 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5631 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 5632 // CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5633 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 5634 // CHECK9-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 5635 // CHECK9: omp_offload.failed2: 5636 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 5637 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]] 5638 // CHECK9: omp_offload.cont3: 5639 // CHECK9-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 5640 // CHECK9-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 5641 // CHECK9-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 5642 // CHECK9-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 5643 // CHECK9: invoke.cont5: 5644 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 5645 // CHECK9-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 5646 // CHECK9-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 5647 // CHECK9: invoke.cont7: 5648 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 5649 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 5650 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 5651 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 5652 // CHECK9-NEXT: ret i32 [[TMP17]] 5653 // CHECK9: eh.resume: 5654 // CHECK9-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 5655 // CHECK9-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 5656 // CHECK9-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 5657 // CHECK9-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 5658 // CHECK9-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 5659 // 5660 // 5661 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SC1El 5662 // CHECK9-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5663 // CHECK9-NEXT: entry: 5664 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5665 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 5666 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5667 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 5668 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5669 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 5670 // CHECK9-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 5671 // CHECK9-NEXT: ret void 5672 // 5673 // 5674 // CHECK9-LABEL: define {{[^@]+}}@_ZN1ScvcEv 5675 // CHECK9-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 5676 // CHECK9-NEXT: entry: 5677 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5678 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5679 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5680 // CHECK9-NEXT: call void @_Z8mayThrowv() 5681 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5682 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 5683 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 5684 // CHECK9-NEXT: ret i8 [[CONV]] 5685 // 5686 // 5687 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 5688 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 5689 // CHECK9-NEXT: entry: 5690 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 5691 // CHECK9-NEXT: ret void 5692 // 5693 // 5694 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 5695 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 5696 // CHECK9-NEXT: entry: 5697 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5698 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5699 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5700 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5701 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5702 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5703 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5704 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5705 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5706 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5707 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5708 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5709 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 5710 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5711 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5712 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5713 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 5714 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5715 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5716 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 5717 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5718 // CHECK9: cond.true: 5719 // CHECK9-NEXT: br label [[COND_END:%.*]] 5720 // CHECK9: cond.false: 5721 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5722 // CHECK9-NEXT: br label [[COND_END]] 5723 // CHECK9: cond.end: 5724 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5725 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5726 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5727 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 5728 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5729 // CHECK9: omp.inner.for.cond: 5730 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5731 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5732 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5733 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5734 // CHECK9: omp.inner.for.body: 5735 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 5736 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5737 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 5738 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5739 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 5740 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 5741 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5742 // CHECK9: omp.inner.for.inc: 5743 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5744 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5745 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 5746 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5747 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5748 // CHECK9: omp.inner.for.end: 5749 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5750 // CHECK9: omp.loop.exit: 5751 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 5752 // CHECK9-NEXT: ret void 5753 // 5754 // 5755 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 5756 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5757 // CHECK9-NEXT: entry: 5758 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5759 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5760 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5761 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5762 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5763 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5764 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5765 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5766 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5767 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5768 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5769 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5770 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5771 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5772 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5773 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5774 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 5775 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5776 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5777 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5778 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5779 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5780 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5781 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5782 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5783 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5784 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 5785 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5786 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5787 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5788 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5789 // CHECK9: cond.true: 5790 // CHECK9-NEXT: br label [[COND_END:%.*]] 5791 // CHECK9: cond.false: 5792 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5793 // CHECK9-NEXT: br label [[COND_END]] 5794 // CHECK9: cond.end: 5795 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5796 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5797 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5798 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 5799 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5800 // CHECK9: omp.inner.for.cond: 5801 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5802 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5803 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5804 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5805 // CHECK9: omp.inner.for.body: 5806 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5807 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5808 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5809 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5810 // CHECK9-NEXT: invoke void @_Z3foov() 5811 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5812 // CHECK9: invoke.cont: 5813 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5814 // CHECK9: omp.body.continue: 5815 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5816 // CHECK9: omp.inner.for.inc: 5817 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5818 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5819 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5820 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5821 // CHECK9: omp.inner.for.end: 5822 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5823 // CHECK9: omp.loop.exit: 5824 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 5825 // CHECK9-NEXT: ret void 5826 // CHECK9: terminate.lpad: 5827 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 5828 // CHECK9-NEXT: catch i8* null 5829 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 5830 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 5831 // CHECK9-NEXT: unreachable 5832 // 5833 // 5834 // CHECK9-LABEL: define {{[^@]+}}@__clang_call_terminate 5835 // CHECK9-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 5836 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 5837 // CHECK9-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 5838 // CHECK9-NEXT: unreachable 5839 // 5840 // 5841 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 5842 // CHECK9-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 5843 // CHECK9-NEXT: entry: 5844 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 5845 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 5846 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 5847 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 5848 // CHECK9-NEXT: ret void 5849 // 5850 // 5851 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 5852 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 5853 // CHECK9-NEXT: entry: 5854 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5855 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5856 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 5857 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5858 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5859 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5860 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5861 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5862 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5863 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5864 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5865 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5866 // CHECK9-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 5867 // CHECK9-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 5868 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5869 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 5870 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5871 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5872 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5873 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5874 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5875 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5876 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 5877 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5878 // CHECK9: cond.true: 5879 // CHECK9-NEXT: br label [[COND_END:%.*]] 5880 // CHECK9: cond.false: 5881 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5882 // CHECK9-NEXT: br label [[COND_END]] 5883 // CHECK9: cond.end: 5884 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5885 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5886 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5887 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5888 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5889 // CHECK9: omp.inner.for.cond: 5890 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5891 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5892 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5893 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5894 // CHECK9: omp.inner.for.body: 5895 // CHECK9-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 5896 // CHECK9-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 5897 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 5898 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5899 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5900 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5901 // CHECK9-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 5902 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 5903 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5904 // CHECK9: omp.inner.for.inc: 5905 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5906 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5907 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 5908 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5909 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5910 // CHECK9: omp.inner.for.end: 5911 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5912 // CHECK9: omp.loop.exit: 5913 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5914 // CHECK9-NEXT: ret void 5915 // 5916 // 5917 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 5918 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 5919 // CHECK9-NEXT: entry: 5920 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5921 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5922 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5923 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5924 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5925 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5926 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5927 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5928 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5929 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5930 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5931 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5932 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5933 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5934 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5935 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5936 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 5937 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5938 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5939 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5940 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5941 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5942 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5943 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5944 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5945 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5946 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 5947 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5948 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5949 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5950 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5951 // CHECK9: cond.true: 5952 // CHECK9-NEXT: br label [[COND_END:%.*]] 5953 // CHECK9: cond.false: 5954 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5955 // CHECK9-NEXT: br label [[COND_END]] 5956 // CHECK9: cond.end: 5957 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5958 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5959 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5960 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 5961 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5962 // CHECK9: omp.inner.for.cond: 5963 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5964 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5965 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5966 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5967 // CHECK9: omp.inner.for.body: 5968 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5969 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5970 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5971 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5972 // CHECK9-NEXT: invoke void @_Z3foov() 5973 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 5974 // CHECK9: invoke.cont: 5975 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5976 // CHECK9: omp.body.continue: 5977 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5978 // CHECK9: omp.inner.for.inc: 5979 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5980 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5981 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5982 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5983 // CHECK9: omp.inner.for.end: 5984 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5985 // CHECK9: omp.loop.exit: 5986 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 5987 // CHECK9-NEXT: ret void 5988 // CHECK9: terminate.lpad: 5989 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 5990 // CHECK9-NEXT: catch i8* null 5991 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 5992 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 5993 // CHECK9-NEXT: unreachable 5994 // 5995 // 5996 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 5997 // CHECK9-SAME: () #[[ATTR7:[0-9]+]] comdat { 5998 // CHECK9-NEXT: entry: 5999 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6000 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 6001 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6002 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 6003 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 6004 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6005 // CHECK9: omp_offload.failed: 6006 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 6007 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 6008 // CHECK9: omp_offload.cont: 6009 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6010 // CHECK9-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 6011 // CHECK9-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 6012 // CHECK9-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 6013 // CHECK9: omp_offload.failed2: 6014 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 6015 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]] 6016 // CHECK9: omp_offload.cont3: 6017 // CHECK9-NEXT: ret i32 0 6018 // 6019 // 6020 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 6021 // CHECK9-SAME: () #[[ATTR7]] comdat { 6022 // CHECK9-NEXT: entry: 6023 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6024 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 6025 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6026 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 6027 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 6028 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6029 // CHECK9: omp_offload.failed: 6030 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 6031 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 6032 // CHECK9: omp_offload.cont: 6033 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6034 // CHECK9-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 6035 // CHECK9-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 6036 // CHECK9-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 6037 // CHECK9: omp_offload.failed2: 6038 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 6039 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]] 6040 // CHECK9: omp_offload.cont3: 6041 // CHECK9-NEXT: ret i32 0 6042 // 6043 // 6044 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SD1Ev 6045 // CHECK9-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 6046 // CHECK9-NEXT: entry: 6047 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 6048 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 6049 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 6050 // CHECK9-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR6]] 6051 // CHECK9-NEXT: ret void 6052 // 6053 // 6054 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SC2El 6055 // CHECK9-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 6056 // CHECK9-NEXT: entry: 6057 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 6058 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 6059 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 6060 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 6061 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 6062 // CHECK9-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 6063 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 6064 // CHECK9-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 6065 // CHECK9-NEXT: ret void 6066 // 6067 // 6068 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SD2Ev 6069 // CHECK9-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 6070 // CHECK9-NEXT: entry: 6071 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 6072 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 6073 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 6074 // CHECK9-NEXT: ret void 6075 // 6076 // 6077 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 6078 // CHECK9-SAME: () #[[ATTR3]] { 6079 // CHECK9-NEXT: entry: 6080 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 6081 // CHECK9-NEXT: ret void 6082 // 6083 // 6084 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 6085 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 6086 // CHECK9-NEXT: entry: 6087 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6088 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6089 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6090 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6091 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6092 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6093 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6094 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6095 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6096 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6097 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6098 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6099 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6100 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6101 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6102 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6103 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6104 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6105 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6106 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6107 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6108 // CHECK9: cond.true: 6109 // CHECK9-NEXT: br label [[COND_END:%.*]] 6110 // CHECK9: cond.false: 6111 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6112 // CHECK9-NEXT: br label [[COND_END]] 6113 // CHECK9: cond.end: 6114 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6115 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6116 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6117 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6118 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6119 // CHECK9: omp.inner.for.cond: 6120 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6121 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6122 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6123 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6124 // CHECK9: omp.inner.for.body: 6125 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 6126 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6127 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6128 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6129 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6130 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 6131 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6132 // CHECK9: omp.inner.for.inc: 6133 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6134 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6135 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 6136 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6137 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6138 // CHECK9: omp.inner.for.end: 6139 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6140 // CHECK9: omp.loop.exit: 6141 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6142 // CHECK9-NEXT: ret void 6143 // 6144 // 6145 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5 6146 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 6147 // CHECK9-NEXT: entry: 6148 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6149 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6150 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6151 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6152 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6153 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6154 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6155 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6156 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6157 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6158 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6159 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6160 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6161 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6162 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6163 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6164 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6165 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6166 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6167 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6168 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6169 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6170 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6171 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6172 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6173 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6174 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6175 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6176 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6177 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6178 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6179 // CHECK9: cond.true: 6180 // CHECK9-NEXT: br label [[COND_END:%.*]] 6181 // CHECK9: cond.false: 6182 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6183 // CHECK9-NEXT: br label [[COND_END]] 6184 // CHECK9: cond.end: 6185 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6186 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6187 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6188 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6189 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6190 // CHECK9: omp.inner.for.cond: 6191 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6192 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6193 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6194 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6195 // CHECK9: omp.inner.for.body: 6196 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6197 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6198 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6199 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6200 // CHECK9-NEXT: invoke void @_Z3foov() 6201 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 6202 // CHECK9: invoke.cont: 6203 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6204 // CHECK9: omp.body.continue: 6205 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6206 // CHECK9: omp.inner.for.inc: 6207 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6208 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6209 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6210 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6211 // CHECK9: omp.inner.for.end: 6212 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6213 // CHECK9: omp.loop.exit: 6214 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6215 // CHECK9-NEXT: ret void 6216 // CHECK9: terminate.lpad: 6217 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 6218 // CHECK9-NEXT: catch i8* null 6219 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 6220 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 6221 // CHECK9-NEXT: unreachable 6222 // 6223 // 6224 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 6225 // CHECK9-SAME: () #[[ATTR3]] { 6226 // CHECK9-NEXT: entry: 6227 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 6228 // CHECK9-NEXT: ret void 6229 // 6230 // 6231 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6 6232 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 6233 // CHECK9-NEXT: entry: 6234 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6235 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6236 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6237 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6238 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6239 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6240 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6241 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6242 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6243 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6244 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6245 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6246 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6247 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6248 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6249 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6250 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6251 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6252 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6253 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6254 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6255 // CHECK9: cond.true: 6256 // CHECK9-NEXT: br label [[COND_END:%.*]] 6257 // CHECK9: cond.false: 6258 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6259 // CHECK9-NEXT: br label [[COND_END]] 6260 // CHECK9: cond.end: 6261 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6262 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6263 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6264 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6265 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6266 // CHECK9: omp.inner.for.cond: 6267 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6268 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6269 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6270 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6271 // CHECK9: omp.inner.for.body: 6272 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 6273 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6274 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6275 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6276 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6277 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 6278 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6279 // CHECK9: omp.inner.for.inc: 6280 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6281 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6282 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 6283 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6284 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6285 // CHECK9: omp.inner.for.end: 6286 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6287 // CHECK9: omp.loop.exit: 6288 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6289 // CHECK9-NEXT: ret void 6290 // 6291 // 6292 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 6293 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 6294 // CHECK9-NEXT: entry: 6295 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6296 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6297 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6298 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6299 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6300 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6301 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6302 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6303 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6304 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6305 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6306 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6307 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6308 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6309 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6310 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6311 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6312 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6313 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6314 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6315 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6316 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6317 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6318 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6319 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6320 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6321 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6322 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6323 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6324 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6325 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6326 // CHECK9: cond.true: 6327 // CHECK9-NEXT: br label [[COND_END:%.*]] 6328 // CHECK9: cond.false: 6329 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6330 // CHECK9-NEXT: br label [[COND_END]] 6331 // CHECK9: cond.end: 6332 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6333 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6334 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6335 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6336 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6337 // CHECK9: omp.inner.for.cond: 6338 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6339 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6340 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6341 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6342 // CHECK9: omp.inner.for.body: 6343 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6344 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6345 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6346 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6347 // CHECK9-NEXT: invoke void @_Z3foov() 6348 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 6349 // CHECK9: invoke.cont: 6350 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6351 // CHECK9: omp.body.continue: 6352 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6353 // CHECK9: omp.inner.for.inc: 6354 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6355 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6356 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6357 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6358 // CHECK9: omp.inner.for.end: 6359 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6360 // CHECK9: omp.loop.exit: 6361 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6362 // CHECK9-NEXT: ret void 6363 // CHECK9: terminate.lpad: 6364 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 6365 // CHECK9-NEXT: catch i8* null 6366 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 6367 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 6368 // CHECK9-NEXT: unreachable 6369 // 6370 // 6371 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 6372 // CHECK9-SAME: () #[[ATTR3]] { 6373 // CHECK9-NEXT: entry: 6374 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 6375 // CHECK9-NEXT: ret void 6376 // 6377 // 6378 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8 6379 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 6380 // CHECK9-NEXT: entry: 6381 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6382 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6383 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6384 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6385 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6386 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6387 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6388 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6389 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6390 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6391 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6392 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6393 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6394 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6395 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6396 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6397 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6398 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6399 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6400 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6401 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6402 // CHECK9: cond.true: 6403 // CHECK9-NEXT: br label [[COND_END:%.*]] 6404 // CHECK9: cond.false: 6405 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6406 // CHECK9-NEXT: br label [[COND_END]] 6407 // CHECK9: cond.end: 6408 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6409 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6410 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6411 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6412 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6413 // CHECK9: omp.inner.for.cond: 6414 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6415 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6416 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6417 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6418 // CHECK9: omp.inner.for.body: 6419 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 6420 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6421 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6422 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6423 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6424 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 6425 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6426 // CHECK9: omp.inner.for.inc: 6427 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6428 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6429 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 6430 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6431 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6432 // CHECK9: omp.inner.for.end: 6433 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6434 // CHECK9: omp.loop.exit: 6435 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6436 // CHECK9-NEXT: ret void 6437 // 6438 // 6439 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9 6440 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 6441 // CHECK9-NEXT: entry: 6442 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6443 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6444 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6445 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6446 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6447 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6448 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6449 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6450 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6451 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6452 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6453 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6454 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6455 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6456 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6457 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6458 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6459 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6460 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6461 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6462 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6463 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6464 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6465 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6466 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6467 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6468 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6469 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6470 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6471 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6472 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6473 // CHECK9: cond.true: 6474 // CHECK9-NEXT: br label [[COND_END:%.*]] 6475 // CHECK9: cond.false: 6476 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6477 // CHECK9-NEXT: br label [[COND_END]] 6478 // CHECK9: cond.end: 6479 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6480 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6481 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6482 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6483 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6484 // CHECK9: omp.inner.for.cond: 6485 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6486 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6487 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6488 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6489 // CHECK9: omp.inner.for.body: 6490 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6491 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6492 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6493 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6494 // CHECK9-NEXT: invoke void @_Z3foov() 6495 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 6496 // CHECK9: invoke.cont: 6497 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6498 // CHECK9: omp.body.continue: 6499 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6500 // CHECK9: omp.inner.for.inc: 6501 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6502 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6503 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6504 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6505 // CHECK9: omp.inner.for.end: 6506 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6507 // CHECK9: omp.loop.exit: 6508 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6509 // CHECK9-NEXT: ret void 6510 // CHECK9: terminate.lpad: 6511 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 6512 // CHECK9-NEXT: catch i8* null 6513 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 6514 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 6515 // CHECK9-NEXT: unreachable 6516 // 6517 // 6518 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 6519 // CHECK9-SAME: () #[[ATTR3]] { 6520 // CHECK9-NEXT: entry: 6521 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 6522 // CHECK9-NEXT: ret void 6523 // 6524 // 6525 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 6526 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 6527 // CHECK9-NEXT: entry: 6528 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6529 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6530 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6531 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6532 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6533 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6534 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6535 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6536 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6537 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 6538 // CHECK9-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 6539 // CHECK9-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 6540 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6541 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6542 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6543 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6544 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6545 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6546 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6547 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6548 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6549 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6550 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6551 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6552 // CHECK9: cond.true: 6553 // CHECK9-NEXT: br label [[COND_END:%.*]] 6554 // CHECK9: cond.false: 6555 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6556 // CHECK9-NEXT: br label [[COND_END]] 6557 // CHECK9: cond.end: 6558 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6559 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6560 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6561 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6562 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6563 // CHECK9: omp.inner.for.cond: 6564 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6565 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6566 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6567 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6568 // CHECK9: omp.inner.for.body: 6569 // CHECK9-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[REF_TMP]], i64 23) 6570 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 6571 // CHECK9: invoke.cont: 6572 // CHECK9-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) 6573 // CHECK9-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 6574 // CHECK9: invoke.cont2: 6575 // CHECK9-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 6576 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 6577 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 6578 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6579 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 6580 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6581 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 6582 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 6583 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6584 // CHECK9: omp.inner.for.inc: 6585 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6586 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6587 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 6588 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6589 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6590 // CHECK9: lpad: 6591 // CHECK9-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 6592 // CHECK9-NEXT: catch i8* null 6593 // CHECK9-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 6594 // CHECK9-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 6595 // CHECK9-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 6596 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 6597 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 6598 // CHECK9-NEXT: br label [[TERMINATE_HANDLER:%.*]] 6599 // CHECK9: omp.inner.for.end: 6600 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6601 // CHECK9: omp.loop.exit: 6602 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6603 // CHECK9-NEXT: ret void 6604 // CHECK9: terminate.lpad: 6605 // CHECK9-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 6606 // CHECK9-NEXT: catch i8* null 6607 // CHECK9-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 6608 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 6609 // CHECK9-NEXT: unreachable 6610 // CHECK9: terminate.handler: 6611 // CHECK9-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 6612 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 6613 // CHECK9-NEXT: unreachable 6614 // 6615 // 6616 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11 6617 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 6618 // CHECK9-NEXT: entry: 6619 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6620 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6621 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6622 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6623 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6624 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6625 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6626 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6627 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6628 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6629 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6630 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6631 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6632 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6633 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6634 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6635 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6636 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6637 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6638 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6639 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6640 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6641 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6642 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6643 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6644 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6645 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6646 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6647 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6648 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6649 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6650 // CHECK9: cond.true: 6651 // CHECK9-NEXT: br label [[COND_END:%.*]] 6652 // CHECK9: cond.false: 6653 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6654 // CHECK9-NEXT: br label [[COND_END]] 6655 // CHECK9: cond.end: 6656 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6657 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6658 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6659 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6660 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6661 // CHECK9: omp.inner.for.cond: 6662 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6663 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6664 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6665 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6666 // CHECK9: omp.inner.for.body: 6667 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6668 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6669 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6670 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6671 // CHECK9-NEXT: invoke void @_Z3foov() 6672 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 6673 // CHECK9: invoke.cont: 6674 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6675 // CHECK9: omp.body.continue: 6676 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6677 // CHECK9: omp.inner.for.inc: 6678 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6679 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6680 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6681 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6682 // CHECK9: omp.inner.for.end: 6683 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6684 // CHECK9: omp.loop.exit: 6685 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6686 // CHECK9-NEXT: ret void 6687 // CHECK9: terminate.lpad: 6688 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 6689 // CHECK9-NEXT: catch i8* null 6690 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 6691 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 6692 // CHECK9-NEXT: unreachable 6693 // 6694 // 6695 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 6696 // CHECK9-SAME: () #[[ATTR9:[0-9]+]] { 6697 // CHECK9-NEXT: entry: 6698 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 6699 // CHECK9-NEXT: ret void 6700 // 6701 // 6702 // CHECK10-LABEL: define {{[^@]+}}@main 6703 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 6704 // CHECK10-NEXT: entry: 6705 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6706 // CHECK10-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 6707 // CHECK10-NEXT: [[A:%.*]] = alloca i8, align 1 6708 // CHECK10-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 6709 // CHECK10-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 6710 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6711 // CHECK10-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 6712 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 6713 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 6714 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 6715 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 6716 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 6717 // CHECK10-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 6718 // CHECK10-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 6719 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 6720 // CHECK10: invoke.cont: 6721 // CHECK10-NEXT: store i8 [[CALL]], i8* [[A]], align 1 6722 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 6723 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 6724 // CHECK10-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 6725 // CHECK10-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6726 // CHECK10: omp_offload.failed: 6727 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 6728 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 6729 // CHECK10: lpad: 6730 // CHECK10-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 6731 // CHECK10-NEXT: cleanup 6732 // CHECK10-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 6733 // CHECK10-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 6734 // CHECK10-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 6735 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 6736 // CHECK10-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 6737 // CHECK10-NEXT: br label [[EH_RESUME:%.*]] 6738 // CHECK10: omp_offload.cont: 6739 // CHECK10-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 6740 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 6741 // CHECK10-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 6742 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 6743 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6744 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 6745 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 6746 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6747 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 6748 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 6749 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 6750 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 6751 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6752 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6753 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6754 // CHECK10-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6755 // CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 6756 // CHECK10-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 6757 // CHECK10: omp_offload.failed2: 6758 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 6759 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT3]] 6760 // CHECK10: omp_offload.cont3: 6761 // CHECK10-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 6762 // CHECK10-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 6763 // CHECK10-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 6764 // CHECK10-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 6765 // CHECK10: invoke.cont5: 6766 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 6767 // CHECK10-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 6768 // CHECK10-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 6769 // CHECK10: invoke.cont7: 6770 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 6771 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 6772 // CHECK10-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 6773 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 6774 // CHECK10-NEXT: ret i32 [[TMP17]] 6775 // CHECK10: eh.resume: 6776 // CHECK10-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 6777 // CHECK10-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 6778 // CHECK10-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 6779 // CHECK10-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 6780 // CHECK10-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 6781 // 6782 // 6783 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SC1El 6784 // CHECK10-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 6785 // CHECK10-NEXT: entry: 6786 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 6787 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 6788 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 6789 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 6790 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 6791 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 6792 // CHECK10-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 6793 // CHECK10-NEXT: ret void 6794 // 6795 // 6796 // CHECK10-LABEL: define {{[^@]+}}@_ZN1ScvcEv 6797 // CHECK10-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 6798 // CHECK10-NEXT: entry: 6799 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 6800 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 6801 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 6802 // CHECK10-NEXT: call void @_Z8mayThrowv() 6803 // CHECK10-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 6804 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 6805 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 6806 // CHECK10-NEXT: ret i8 [[CONV]] 6807 // 6808 // 6809 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 6810 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] { 6811 // CHECK10-NEXT: entry: 6812 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 6813 // CHECK10-NEXT: ret void 6814 // 6815 // 6816 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 6817 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 6818 // CHECK10-NEXT: entry: 6819 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6820 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6821 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6822 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6823 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6824 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6825 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6826 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6827 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 6828 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6829 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6830 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6831 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6832 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6833 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6834 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6835 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6836 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6837 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6838 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6839 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6840 // CHECK10: cond.true: 6841 // CHECK10-NEXT: br label [[COND_END:%.*]] 6842 // CHECK10: cond.false: 6843 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6844 // CHECK10-NEXT: br label [[COND_END]] 6845 // CHECK10: cond.end: 6846 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6847 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6848 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6849 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6850 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6851 // CHECK10: omp.inner.for.cond: 6852 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6853 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6854 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6855 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6856 // CHECK10: omp.inner.for.body: 6857 // CHECK10-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 6858 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6859 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6860 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6861 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6862 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 6863 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6864 // CHECK10: omp.inner.for.inc: 6865 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6866 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6867 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 6868 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6869 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 6870 // CHECK10: omp.inner.for.end: 6871 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6872 // CHECK10: omp.loop.exit: 6873 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6874 // CHECK10-NEXT: ret void 6875 // 6876 // 6877 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 6878 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 6879 // CHECK10-NEXT: entry: 6880 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6881 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6882 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6883 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6884 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6885 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6886 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6887 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6888 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6889 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6890 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 6891 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6892 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6893 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6894 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6895 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6896 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6897 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6898 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6899 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6900 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6901 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6902 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6903 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6904 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6905 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6906 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6907 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6908 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6909 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6910 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6911 // CHECK10: cond.true: 6912 // CHECK10-NEXT: br label [[COND_END:%.*]] 6913 // CHECK10: cond.false: 6914 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6915 // CHECK10-NEXT: br label [[COND_END]] 6916 // CHECK10: cond.end: 6917 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6918 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6919 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6920 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6921 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6922 // CHECK10: omp.inner.for.cond: 6923 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6924 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6925 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6926 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6927 // CHECK10: omp.inner.for.body: 6928 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6929 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6930 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6931 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6932 // CHECK10-NEXT: invoke void @_Z3foov() 6933 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 6934 // CHECK10: invoke.cont: 6935 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6936 // CHECK10: omp.body.continue: 6937 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6938 // CHECK10: omp.inner.for.inc: 6939 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6940 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6941 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6942 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 6943 // CHECK10: omp.inner.for.end: 6944 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6945 // CHECK10: omp.loop.exit: 6946 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6947 // CHECK10-NEXT: ret void 6948 // CHECK10: terminate.lpad: 6949 // CHECK10-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 6950 // CHECK10-NEXT: catch i8* null 6951 // CHECK10-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 6952 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 6953 // CHECK10-NEXT: unreachable 6954 // 6955 // 6956 // CHECK10-LABEL: define {{[^@]+}}@__clang_call_terminate 6957 // CHECK10-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 6958 // CHECK10-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 6959 // CHECK10-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 6960 // CHECK10-NEXT: unreachable 6961 // 6962 // 6963 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 6964 // CHECK10-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 6965 // CHECK10-NEXT: entry: 6966 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 6967 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 6968 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 6969 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 6970 // CHECK10-NEXT: ret void 6971 // 6972 // 6973 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 6974 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 6975 // CHECK10-NEXT: entry: 6976 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6977 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6978 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 6979 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6980 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 6981 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6982 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6983 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6984 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6985 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 6986 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6987 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6988 // CHECK10-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 6989 // CHECK10-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 6990 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6991 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6992 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6993 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6994 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6995 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6996 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6997 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6998 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 6999 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7000 // CHECK10: cond.true: 7001 // CHECK10-NEXT: br label [[COND_END:%.*]] 7002 // CHECK10: cond.false: 7003 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7004 // CHECK10-NEXT: br label [[COND_END]] 7005 // CHECK10: cond.end: 7006 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7007 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7008 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7009 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 7010 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7011 // CHECK10: omp.inner.for.cond: 7012 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7013 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7014 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7015 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7016 // CHECK10: omp.inner.for.body: 7017 // CHECK10-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 7018 // CHECK10-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 7019 // CHECK10-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 7020 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7021 // CHECK10-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 7022 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7023 // CHECK10-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 7024 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 7025 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7026 // CHECK10: omp.inner.for.inc: 7027 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7028 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7029 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 7030 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7031 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7032 // CHECK10: omp.inner.for.end: 7033 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7034 // CHECK10: omp.loop.exit: 7035 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 7036 // CHECK10-NEXT: ret void 7037 // 7038 // 7039 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 7040 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7041 // CHECK10-NEXT: entry: 7042 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7043 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7044 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7045 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7046 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7047 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7048 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7049 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7050 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7051 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7052 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7053 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7054 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7055 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7056 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7057 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7058 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7059 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7060 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7061 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7062 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7063 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7064 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7065 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7066 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7067 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7068 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7069 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7070 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7071 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7072 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7073 // CHECK10: cond.true: 7074 // CHECK10-NEXT: br label [[COND_END:%.*]] 7075 // CHECK10: cond.false: 7076 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7077 // CHECK10-NEXT: br label [[COND_END]] 7078 // CHECK10: cond.end: 7079 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7080 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7081 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7082 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7083 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7084 // CHECK10: omp.inner.for.cond: 7085 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7086 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7087 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7088 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7089 // CHECK10: omp.inner.for.body: 7090 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7091 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7092 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7093 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7094 // CHECK10-NEXT: invoke void @_Z3foov() 7095 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7096 // CHECK10: invoke.cont: 7097 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7098 // CHECK10: omp.body.continue: 7099 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7100 // CHECK10: omp.inner.for.inc: 7101 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7102 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7103 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7104 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7105 // CHECK10: omp.inner.for.end: 7106 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7107 // CHECK10: omp.loop.exit: 7108 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7109 // CHECK10-NEXT: ret void 7110 // CHECK10: terminate.lpad: 7111 // CHECK10-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 7112 // CHECK10-NEXT: catch i8* null 7113 // CHECK10-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 7114 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 7115 // CHECK10-NEXT: unreachable 7116 // 7117 // 7118 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 7119 // CHECK10-SAME: () #[[ATTR7:[0-9]+]] comdat { 7120 // CHECK10-NEXT: entry: 7121 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7122 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 7123 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 7124 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 7125 // CHECK10-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 7126 // CHECK10-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7127 // CHECK10: omp_offload.failed: 7128 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 7129 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 7130 // CHECK10: omp_offload.cont: 7131 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 7132 // CHECK10-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 7133 // CHECK10-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 7134 // CHECK10-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 7135 // CHECK10: omp_offload.failed2: 7136 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 7137 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT3]] 7138 // CHECK10: omp_offload.cont3: 7139 // CHECK10-NEXT: ret i32 0 7140 // 7141 // 7142 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 7143 // CHECK10-SAME: () #[[ATTR7]] comdat { 7144 // CHECK10-NEXT: entry: 7145 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7146 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 7147 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 7148 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 7149 // CHECK10-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 7150 // CHECK10-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7151 // CHECK10: omp_offload.failed: 7152 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 7153 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 7154 // CHECK10: omp_offload.cont: 7155 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 7156 // CHECK10-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 7157 // CHECK10-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 7158 // CHECK10-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 7159 // CHECK10: omp_offload.failed2: 7160 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 7161 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT3]] 7162 // CHECK10: omp_offload.cont3: 7163 // CHECK10-NEXT: ret i32 0 7164 // 7165 // 7166 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SD1Ev 7167 // CHECK10-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 7168 // CHECK10-NEXT: entry: 7169 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 7170 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 7171 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 7172 // CHECK10-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR6]] 7173 // CHECK10-NEXT: ret void 7174 // 7175 // 7176 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SC2El 7177 // CHECK10-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 7178 // CHECK10-NEXT: entry: 7179 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 7180 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7181 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 7182 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7183 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 7184 // CHECK10-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 7185 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 7186 // CHECK10-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 7187 // CHECK10-NEXT: ret void 7188 // 7189 // 7190 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SD2Ev 7191 // CHECK10-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 7192 // CHECK10-NEXT: entry: 7193 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 7194 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 7195 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 7196 // CHECK10-NEXT: ret void 7197 // 7198 // 7199 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 7200 // CHECK10-SAME: () #[[ATTR3]] { 7201 // CHECK10-NEXT: entry: 7202 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 7203 // CHECK10-NEXT: ret void 7204 // 7205 // 7206 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4 7207 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 7208 // CHECK10-NEXT: entry: 7209 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7210 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7211 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7212 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7213 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7214 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7215 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7216 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7217 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7218 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7219 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7220 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7221 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7222 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7223 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7224 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7225 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7226 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7227 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7228 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7229 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7230 // CHECK10: cond.true: 7231 // CHECK10-NEXT: br label [[COND_END:%.*]] 7232 // CHECK10: cond.false: 7233 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7234 // CHECK10-NEXT: br label [[COND_END]] 7235 // CHECK10: cond.end: 7236 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7237 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7238 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7239 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7240 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7241 // CHECK10: omp.inner.for.cond: 7242 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7243 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7244 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7245 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7246 // CHECK10: omp.inner.for.body: 7247 // CHECK10-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 7248 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7249 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 7250 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7251 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 7252 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 7253 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7254 // CHECK10: omp.inner.for.inc: 7255 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7256 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7257 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 7258 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7259 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7260 // CHECK10: omp.inner.for.end: 7261 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7262 // CHECK10: omp.loop.exit: 7263 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7264 // CHECK10-NEXT: ret void 7265 // 7266 // 7267 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5 7268 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7269 // CHECK10-NEXT: entry: 7270 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7271 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7272 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7273 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7274 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7275 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7276 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7277 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7278 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7279 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7280 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7281 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7282 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7283 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7284 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7285 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7286 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7287 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7288 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7289 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7290 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7291 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7292 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7293 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7294 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7295 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7296 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7297 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7298 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7299 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7300 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7301 // CHECK10: cond.true: 7302 // CHECK10-NEXT: br label [[COND_END:%.*]] 7303 // CHECK10: cond.false: 7304 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7305 // CHECK10-NEXT: br label [[COND_END]] 7306 // CHECK10: cond.end: 7307 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7308 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7309 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7310 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7311 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7312 // CHECK10: omp.inner.for.cond: 7313 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7314 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7315 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7316 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7317 // CHECK10: omp.inner.for.body: 7318 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7319 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7320 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7321 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7322 // CHECK10-NEXT: invoke void @_Z3foov() 7323 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7324 // CHECK10: invoke.cont: 7325 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7326 // CHECK10: omp.body.continue: 7327 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7328 // CHECK10: omp.inner.for.inc: 7329 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7330 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7331 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7332 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7333 // CHECK10: omp.inner.for.end: 7334 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7335 // CHECK10: omp.loop.exit: 7336 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7337 // CHECK10-NEXT: ret void 7338 // CHECK10: terminate.lpad: 7339 // CHECK10-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 7340 // CHECK10-NEXT: catch i8* null 7341 // CHECK10-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 7342 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 7343 // CHECK10-NEXT: unreachable 7344 // 7345 // 7346 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 7347 // CHECK10-SAME: () #[[ATTR3]] { 7348 // CHECK10-NEXT: entry: 7349 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 7350 // CHECK10-NEXT: ret void 7351 // 7352 // 7353 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..6 7354 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 7355 // CHECK10-NEXT: entry: 7356 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7357 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7358 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7359 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7360 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7361 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7362 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7363 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7364 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7365 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7366 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7367 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7368 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7369 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7370 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7371 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7372 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7373 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7374 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7375 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7376 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7377 // CHECK10: cond.true: 7378 // CHECK10-NEXT: br label [[COND_END:%.*]] 7379 // CHECK10: cond.false: 7380 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7381 // CHECK10-NEXT: br label [[COND_END]] 7382 // CHECK10: cond.end: 7383 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7384 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7385 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7386 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7387 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7388 // CHECK10: omp.inner.for.cond: 7389 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7390 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7391 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7392 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7393 // CHECK10: omp.inner.for.body: 7394 // CHECK10-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 7395 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7396 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 7397 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7398 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 7399 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 7400 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7401 // CHECK10: omp.inner.for.inc: 7402 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7403 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7404 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 7405 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7406 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7407 // CHECK10: omp.inner.for.end: 7408 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7409 // CHECK10: omp.loop.exit: 7410 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7411 // CHECK10-NEXT: ret void 7412 // 7413 // 7414 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..7 7415 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7416 // CHECK10-NEXT: entry: 7417 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7418 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7419 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7420 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7421 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7422 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7423 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7424 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7425 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7426 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7427 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7428 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7429 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7430 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7431 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7432 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7433 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7434 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7435 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7436 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7437 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7438 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7439 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7440 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7441 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7442 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7443 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7444 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7445 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7446 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7447 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7448 // CHECK10: cond.true: 7449 // CHECK10-NEXT: br label [[COND_END:%.*]] 7450 // CHECK10: cond.false: 7451 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7452 // CHECK10-NEXT: br label [[COND_END]] 7453 // CHECK10: cond.end: 7454 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7455 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7456 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7457 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7458 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7459 // CHECK10: omp.inner.for.cond: 7460 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7461 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7462 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7463 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7464 // CHECK10: omp.inner.for.body: 7465 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7466 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7467 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7468 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7469 // CHECK10-NEXT: invoke void @_Z3foov() 7470 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7471 // CHECK10: invoke.cont: 7472 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7473 // CHECK10: omp.body.continue: 7474 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7475 // CHECK10: omp.inner.for.inc: 7476 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7477 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7478 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7479 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7480 // CHECK10: omp.inner.for.end: 7481 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7482 // CHECK10: omp.loop.exit: 7483 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7484 // CHECK10-NEXT: ret void 7485 // CHECK10: terminate.lpad: 7486 // CHECK10-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 7487 // CHECK10-NEXT: catch i8* null 7488 // CHECK10-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 7489 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 7490 // CHECK10-NEXT: unreachable 7491 // 7492 // 7493 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 7494 // CHECK10-SAME: () #[[ATTR3]] { 7495 // CHECK10-NEXT: entry: 7496 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 7497 // CHECK10-NEXT: ret void 7498 // 7499 // 7500 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..8 7501 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 7502 // CHECK10-NEXT: entry: 7503 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7504 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7505 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7506 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7507 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7508 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7509 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7510 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7511 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7512 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7513 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7514 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7515 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7516 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7517 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7518 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7519 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7520 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7521 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7522 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7523 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7524 // CHECK10: cond.true: 7525 // CHECK10-NEXT: br label [[COND_END:%.*]] 7526 // CHECK10: cond.false: 7527 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7528 // CHECK10-NEXT: br label [[COND_END]] 7529 // CHECK10: cond.end: 7530 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7531 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7532 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7533 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7534 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7535 // CHECK10: omp.inner.for.cond: 7536 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7537 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7538 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7539 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7540 // CHECK10: omp.inner.for.body: 7541 // CHECK10-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 7542 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7543 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 7544 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7545 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 7546 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 7547 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7548 // CHECK10: omp.inner.for.inc: 7549 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7550 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7551 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 7552 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7553 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7554 // CHECK10: omp.inner.for.end: 7555 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7556 // CHECK10: omp.loop.exit: 7557 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7558 // CHECK10-NEXT: ret void 7559 // 7560 // 7561 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..9 7562 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7563 // CHECK10-NEXT: entry: 7564 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7565 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7566 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7567 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7568 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7569 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7570 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7571 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7572 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7573 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7574 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7575 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7576 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7577 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7578 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7579 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7580 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7581 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7582 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7583 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7584 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7585 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7586 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7587 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7588 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7589 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7590 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7591 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7592 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7593 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7594 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7595 // CHECK10: cond.true: 7596 // CHECK10-NEXT: br label [[COND_END:%.*]] 7597 // CHECK10: cond.false: 7598 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7599 // CHECK10-NEXT: br label [[COND_END]] 7600 // CHECK10: cond.end: 7601 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7602 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7603 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7604 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7605 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7606 // CHECK10: omp.inner.for.cond: 7607 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7608 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7609 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7610 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7611 // CHECK10: omp.inner.for.body: 7612 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7613 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7614 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7615 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7616 // CHECK10-NEXT: invoke void @_Z3foov() 7617 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7618 // CHECK10: invoke.cont: 7619 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7620 // CHECK10: omp.body.continue: 7621 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7622 // CHECK10: omp.inner.for.inc: 7623 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7624 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7625 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7626 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7627 // CHECK10: omp.inner.for.end: 7628 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7629 // CHECK10: omp.loop.exit: 7630 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7631 // CHECK10-NEXT: ret void 7632 // CHECK10: terminate.lpad: 7633 // CHECK10-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 7634 // CHECK10-NEXT: catch i8* null 7635 // CHECK10-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 7636 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 7637 // CHECK10-NEXT: unreachable 7638 // 7639 // 7640 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 7641 // CHECK10-SAME: () #[[ATTR3]] { 7642 // CHECK10-NEXT: entry: 7643 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 7644 // CHECK10-NEXT: ret void 7645 // 7646 // 7647 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..10 7648 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7649 // CHECK10-NEXT: entry: 7650 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7651 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7652 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7653 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7654 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7655 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7656 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7657 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7658 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7659 // CHECK10-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 7660 // CHECK10-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 7661 // CHECK10-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 7662 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7663 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7664 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7665 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7666 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7667 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7668 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7669 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7670 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7671 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7672 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7673 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7674 // CHECK10: cond.true: 7675 // CHECK10-NEXT: br label [[COND_END:%.*]] 7676 // CHECK10: cond.false: 7677 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7678 // CHECK10-NEXT: br label [[COND_END]] 7679 // CHECK10: cond.end: 7680 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7681 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7682 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7683 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7684 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7685 // CHECK10: omp.inner.for.cond: 7686 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7687 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7688 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7689 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7690 // CHECK10: omp.inner.for.body: 7691 // CHECK10-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[REF_TMP]], i64 23) 7692 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7693 // CHECK10: invoke.cont: 7694 // CHECK10-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) 7695 // CHECK10-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 7696 // CHECK10: invoke.cont2: 7697 // CHECK10-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 7698 // CHECK10-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 7699 // CHECK10-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 7700 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7701 // CHECK10-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 7702 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7703 // CHECK10-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 7704 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 7705 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7706 // CHECK10: omp.inner.for.inc: 7707 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7708 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7709 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 7710 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7711 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7712 // CHECK10: lpad: 7713 // CHECK10-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 7714 // CHECK10-NEXT: catch i8* null 7715 // CHECK10-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 7716 // CHECK10-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 7717 // CHECK10-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 7718 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 7719 // CHECK10-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 7720 // CHECK10-NEXT: br label [[TERMINATE_HANDLER:%.*]] 7721 // CHECK10: omp.inner.for.end: 7722 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7723 // CHECK10: omp.loop.exit: 7724 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7725 // CHECK10-NEXT: ret void 7726 // CHECK10: terminate.lpad: 7727 // CHECK10-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 7728 // CHECK10-NEXT: catch i8* null 7729 // CHECK10-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 7730 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 7731 // CHECK10-NEXT: unreachable 7732 // CHECK10: terminate.handler: 7733 // CHECK10-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 7734 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 7735 // CHECK10-NEXT: unreachable 7736 // 7737 // 7738 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..11 7739 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7740 // CHECK10-NEXT: entry: 7741 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7742 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7743 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7744 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7745 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7746 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7747 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7748 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7749 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7750 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7751 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7752 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7753 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7754 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7755 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7756 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7757 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7758 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7759 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7760 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7761 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7762 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7763 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7764 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7765 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7766 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7767 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7768 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7769 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7770 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7771 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7772 // CHECK10: cond.true: 7773 // CHECK10-NEXT: br label [[COND_END:%.*]] 7774 // CHECK10: cond.false: 7775 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7776 // CHECK10-NEXT: br label [[COND_END]] 7777 // CHECK10: cond.end: 7778 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7779 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7780 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7781 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7782 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7783 // CHECK10: omp.inner.for.cond: 7784 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7785 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7786 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7787 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7788 // CHECK10: omp.inner.for.body: 7789 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7790 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7791 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7792 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7793 // CHECK10-NEXT: invoke void @_Z3foov() 7794 // CHECK10-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7795 // CHECK10: invoke.cont: 7796 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7797 // CHECK10: omp.body.continue: 7798 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7799 // CHECK10: omp.inner.for.inc: 7800 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7801 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7802 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7803 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7804 // CHECK10: omp.inner.for.end: 7805 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7806 // CHECK10: omp.loop.exit: 7807 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7808 // CHECK10-NEXT: ret void 7809 // CHECK10: terminate.lpad: 7810 // CHECK10-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 7811 // CHECK10-NEXT: catch i8* null 7812 // CHECK10-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 7813 // CHECK10-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 7814 // CHECK10-NEXT: unreachable 7815 // 7816 // 7817 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 7818 // CHECK10-SAME: () #[[ATTR9:[0-9]+]] { 7819 // CHECK10-NEXT: entry: 7820 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 7821 // CHECK10-NEXT: ret void 7822 // 7823 // 7824 // CHECK11-LABEL: define {{[^@]+}}@main 7825 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7826 // CHECK11-NEXT: entry: 7827 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7828 // CHECK11-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 7829 // CHECK11-NEXT: [[A:%.*]] = alloca i8, align 1 7830 // CHECK11-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 7831 // CHECK11-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 7832 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 7833 // CHECK11-NEXT: [[I2:%.*]] = alloca i32, align 4 7834 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 7835 // CHECK11-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 7836 // CHECK11-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 7837 // CHECK11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 7838 // CHECK11: invoke.cont: 7839 // CHECK11-NEXT: store i8 [[CALL]], i8* [[A]], align 1 7840 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 7841 // CHECK11-NEXT: br label [[FOR_COND:%.*]] 7842 // CHECK11: for.cond: 7843 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 7844 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 7845 // CHECK11-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 7846 // CHECK11: for.body: 7847 // CHECK11-NEXT: invoke void @_Z3foov() 7848 // CHECK11-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7849 // CHECK11: invoke.cont1: 7850 // CHECK11-NEXT: br label [[FOR_INC:%.*]] 7851 // CHECK11: for.inc: 7852 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 7853 // CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 7854 // CHECK11-NEXT: store i32 [[INC]], i32* [[I]], align 4 7855 // CHECK11-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 7856 // CHECK11: lpad: 7857 // CHECK11-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 7858 // CHECK11-NEXT: cleanup 7859 // CHECK11-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 7860 // CHECK11-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 7861 // CHECK11-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 7862 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 7863 // CHECK11-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]] 7864 // CHECK11-NEXT: br label [[EH_RESUME:%.*]] 7865 // CHECK11: for.end: 7866 // CHECK11-NEXT: store i32 0, i32* [[I2]], align 4 7867 // CHECK11-NEXT: br label [[FOR_COND3:%.*]] 7868 // CHECK11: for.cond3: 7869 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4 7870 // CHECK11-NEXT: [[CMP4:%.*]] = icmp slt i32 [[TMP5]], 100 7871 // CHECK11-NEXT: br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END9:%.*]] 7872 // CHECK11: for.body5: 7873 // CHECK11-NEXT: invoke void @_Z3foov() 7874 // CHECK11-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[TERMINATE_LPAD]] 7875 // CHECK11: invoke.cont6: 7876 // CHECK11-NEXT: br label [[FOR_INC7:%.*]] 7877 // CHECK11: for.inc7: 7878 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[I2]], align 4 7879 // CHECK11-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP6]], 1 7880 // CHECK11-NEXT: store i32 [[INC8]], i32* [[I2]], align 4 7881 // CHECK11-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP8:![0-9]+]] 7882 // CHECK11: for.end9: 7883 // CHECK11-NEXT: [[TMP7:%.*]] = load i8, i8* [[A]], align 1 7884 // CHECK11-NEXT: [[CONV:%.*]] = sext i8 [[TMP7]] to i32 7885 // CHECK11-NEXT: [[CALL11:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 7886 // CHECK11-NEXT: to label [[INVOKE_CONT10:%.*]] unwind label [[LPAD]] 7887 // CHECK11: invoke.cont10: 7888 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CALL11]] 7889 // CHECK11-NEXT: [[CALL13:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 7890 // CHECK11-NEXT: to label [[INVOKE_CONT12:%.*]] unwind label [[LPAD]] 7891 // CHECK11: invoke.cont12: 7892 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[ADD]], [[CALL13]] 7893 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[RETVAL]], align 4 7894 // CHECK11-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7]] 7895 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[RETVAL]], align 4 7896 // CHECK11-NEXT: ret i32 [[TMP8]] 7897 // CHECK11: eh.resume: 7898 // CHECK11-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 7899 // CHECK11-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 7900 // CHECK11-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 7901 // CHECK11-NEXT: [[LPAD_VAL15:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 7902 // CHECK11-NEXT: resume { i8*, i32 } [[LPAD_VAL15]] 7903 // CHECK11: terminate.lpad: 7904 // CHECK11-NEXT: [[TMP9:%.*]] = landingpad { i8*, i32 } 7905 // CHECK11-NEXT: catch i8* null 7906 // CHECK11-NEXT: [[TMP10:%.*]] = extractvalue { i8*, i32 } [[TMP9]], 0 7907 // CHECK11-NEXT: call void @__clang_call_terminate(i8* [[TMP10]]) #[[ATTR8:[0-9]+]] 7908 // CHECK11-NEXT: unreachable 7909 // 7910 // 7911 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SC1El 7912 // CHECK11-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 7913 // CHECK11-NEXT: entry: 7914 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 7915 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7916 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 7917 // CHECK11-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7918 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 7919 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 7920 // CHECK11-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 7921 // CHECK11-NEXT: ret void 7922 // 7923 // 7924 // CHECK11-LABEL: define {{[^@]+}}@_ZN1ScvcEv 7925 // CHECK11-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 7926 // CHECK11-NEXT: entry: 7927 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 7928 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 7929 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 7930 // CHECK11-NEXT: call void @_Z8mayThrowv() 7931 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 7932 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 7933 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 7934 // CHECK11-NEXT: ret i8 [[CONV]] 7935 // 7936 // 7937 // CHECK11-LABEL: define {{[^@]+}}@__clang_call_terminate 7938 // CHECK11-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat { 7939 // CHECK11-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]] 7940 // CHECK11-NEXT: call void @_ZSt9terminatev() #[[ATTR8]] 7941 // CHECK11-NEXT: unreachable 7942 // 7943 // 7944 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 7945 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7946 // CHECK11-NEXT: entry: 7947 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 7948 // CHECK11-NEXT: [[I1:%.*]] = alloca i32, align 4 7949 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 7950 // CHECK11-NEXT: br label [[FOR_COND:%.*]] 7951 // CHECK11: for.cond: 7952 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 7953 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 7954 // CHECK11-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 7955 // CHECK11: for.body: 7956 // CHECK11-NEXT: invoke void @_Z3foov() 7957 // CHECK11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 7958 // CHECK11: invoke.cont: 7959 // CHECK11-NEXT: br label [[FOR_INC:%.*]] 7960 // CHECK11: for.inc: 7961 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 7962 // CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 7963 // CHECK11-NEXT: store i32 [[INC]], i32* [[I]], align 4 7964 // CHECK11-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 7965 // CHECK11: for.end: 7966 // CHECK11-NEXT: store i32 0, i32* [[I1]], align 4 7967 // CHECK11-NEXT: br label [[FOR_COND2:%.*]] 7968 // CHECK11: for.cond2: 7969 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 7970 // CHECK11-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 7971 // CHECK11-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 7972 // CHECK11: for.body4: 7973 // CHECK11-NEXT: invoke void @_Z3foov() 7974 // CHECK11-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 7975 // CHECK11: invoke.cont5: 7976 // CHECK11-NEXT: br label [[FOR_INC6:%.*]] 7977 // CHECK11: for.inc6: 7978 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 7979 // CHECK11-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 7980 // CHECK11-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 7981 // CHECK11-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP10:![0-9]+]] 7982 // CHECK11: for.end8: 7983 // CHECK11-NEXT: ret i32 0 7984 // CHECK11: terminate.lpad: 7985 // CHECK11-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 7986 // CHECK11-NEXT: catch i8* null 7987 // CHECK11-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 7988 // CHECK11-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 7989 // CHECK11-NEXT: unreachable 7990 // 7991 // 7992 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 7993 // CHECK11-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 7994 // CHECK11-NEXT: entry: 7995 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 7996 // CHECK11-NEXT: [[I1:%.*]] = alloca i32, align 4 7997 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 7998 // CHECK11-NEXT: br label [[FOR_COND:%.*]] 7999 // CHECK11: for.cond: 8000 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 8001 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 8002 // CHECK11-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 8003 // CHECK11: for.body: 8004 // CHECK11-NEXT: invoke void @_Z3foov() 8005 // CHECK11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 8006 // CHECK11: invoke.cont: 8007 // CHECK11-NEXT: br label [[FOR_INC:%.*]] 8008 // CHECK11: for.inc: 8009 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 8010 // CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 8011 // CHECK11-NEXT: store i32 [[INC]], i32* [[I]], align 4 8012 // CHECK11-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 8013 // CHECK11: for.end: 8014 // CHECK11-NEXT: store i32 0, i32* [[I1]], align 4 8015 // CHECK11-NEXT: br label [[FOR_COND2:%.*]] 8016 // CHECK11: for.cond2: 8017 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 8018 // CHECK11-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 8019 // CHECK11-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 8020 // CHECK11: for.body4: 8021 // CHECK11-NEXT: invoke void @_Z3foov() 8022 // CHECK11-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 8023 // CHECK11: invoke.cont5: 8024 // CHECK11-NEXT: br label [[FOR_INC6:%.*]] 8025 // CHECK11: for.inc6: 8026 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 8027 // CHECK11-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 8028 // CHECK11-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 8029 // CHECK11-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP12:![0-9]+]] 8030 // CHECK11: for.end8: 8031 // CHECK11-NEXT: ret i32 0 8032 // CHECK11: terminate.lpad: 8033 // CHECK11-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 8034 // CHECK11-NEXT: catch i8* null 8035 // CHECK11-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 8036 // CHECK11-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 8037 // CHECK11-NEXT: unreachable 8038 // 8039 // 8040 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SD1Ev 8041 // CHECK11-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 { 8042 // CHECK11-NEXT: entry: 8043 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8044 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8045 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8046 // CHECK11-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR7]] 8047 // CHECK11-NEXT: ret void 8048 // 8049 // 8050 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SC2El 8051 // CHECK11-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 8052 // CHECK11-NEXT: entry: 8053 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8054 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8055 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8056 // CHECK11-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8057 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8058 // CHECK11-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 8059 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 8060 // CHECK11-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 8061 // CHECK11-NEXT: ret void 8062 // 8063 // 8064 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SD2Ev 8065 // CHECK11-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 8066 // CHECK11-NEXT: entry: 8067 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8068 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8069 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8070 // CHECK11-NEXT: ret void 8071 // 8072 // 8073 // CHECK12-LABEL: define {{[^@]+}}@main 8074 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 8075 // CHECK12-NEXT: entry: 8076 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 8077 // CHECK12-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 8078 // CHECK12-NEXT: [[A:%.*]] = alloca i8, align 1 8079 // CHECK12-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 8080 // CHECK12-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 8081 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 8082 // CHECK12-NEXT: [[I2:%.*]] = alloca i32, align 4 8083 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 8084 // CHECK12-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 8085 // CHECK12-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 8086 // CHECK12-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 8087 // CHECK12: invoke.cont: 8088 // CHECK12-NEXT: store i8 [[CALL]], i8* [[A]], align 1 8089 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 8090 // CHECK12-NEXT: br label [[FOR_COND:%.*]] 8091 // CHECK12: for.cond: 8092 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 8093 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 8094 // CHECK12-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 8095 // CHECK12: for.body: 8096 // CHECK12-NEXT: invoke void @_Z3foov() 8097 // CHECK12-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 8098 // CHECK12: invoke.cont1: 8099 // CHECK12-NEXT: br label [[FOR_INC:%.*]] 8100 // CHECK12: for.inc: 8101 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 8102 // CHECK12-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 8103 // CHECK12-NEXT: store i32 [[INC]], i32* [[I]], align 4 8104 // CHECK12-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 8105 // CHECK12: lpad: 8106 // CHECK12-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 8107 // CHECK12-NEXT: cleanup 8108 // CHECK12-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 8109 // CHECK12-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 8110 // CHECK12-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 8111 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 8112 // CHECK12-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]] 8113 // CHECK12-NEXT: br label [[EH_RESUME:%.*]] 8114 // CHECK12: for.end: 8115 // CHECK12-NEXT: store i32 0, i32* [[I2]], align 4 8116 // CHECK12-NEXT: br label [[FOR_COND3:%.*]] 8117 // CHECK12: for.cond3: 8118 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4 8119 // CHECK12-NEXT: [[CMP4:%.*]] = icmp slt i32 [[TMP5]], 100 8120 // CHECK12-NEXT: br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END9:%.*]] 8121 // CHECK12: for.body5: 8122 // CHECK12-NEXT: invoke void @_Z3foov() 8123 // CHECK12-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[TERMINATE_LPAD]] 8124 // CHECK12: invoke.cont6: 8125 // CHECK12-NEXT: br label [[FOR_INC7:%.*]] 8126 // CHECK12: for.inc7: 8127 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[I2]], align 4 8128 // CHECK12-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP6]], 1 8129 // CHECK12-NEXT: store i32 [[INC8]], i32* [[I2]], align 4 8130 // CHECK12-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP8:![0-9]+]] 8131 // CHECK12: for.end9: 8132 // CHECK12-NEXT: [[TMP7:%.*]] = load i8, i8* [[A]], align 1 8133 // CHECK12-NEXT: [[CONV:%.*]] = sext i8 [[TMP7]] to i32 8134 // CHECK12-NEXT: [[CALL11:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 8135 // CHECK12-NEXT: to label [[INVOKE_CONT10:%.*]] unwind label [[LPAD]] 8136 // CHECK12: invoke.cont10: 8137 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CALL11]] 8138 // CHECK12-NEXT: [[CALL13:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 8139 // CHECK12-NEXT: to label [[INVOKE_CONT12:%.*]] unwind label [[LPAD]] 8140 // CHECK12: invoke.cont12: 8141 // CHECK12-NEXT: [[ADD14:%.*]] = add nsw i32 [[ADD]], [[CALL13]] 8142 // CHECK12-NEXT: store i32 [[ADD14]], i32* [[RETVAL]], align 4 8143 // CHECK12-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7]] 8144 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[RETVAL]], align 4 8145 // CHECK12-NEXT: ret i32 [[TMP8]] 8146 // CHECK12: eh.resume: 8147 // CHECK12-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 8148 // CHECK12-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 8149 // CHECK12-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 8150 // CHECK12-NEXT: [[LPAD_VAL15:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 8151 // CHECK12-NEXT: resume { i8*, i32 } [[LPAD_VAL15]] 8152 // CHECK12: terminate.lpad: 8153 // CHECK12-NEXT: [[TMP9:%.*]] = landingpad { i8*, i32 } 8154 // CHECK12-NEXT: catch i8* null 8155 // CHECK12-NEXT: [[TMP10:%.*]] = extractvalue { i8*, i32 } [[TMP9]], 0 8156 // CHECK12-NEXT: call void @__clang_call_terminate(i8* [[TMP10]]) #[[ATTR8:[0-9]+]] 8157 // CHECK12-NEXT: unreachable 8158 // 8159 // 8160 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SC1El 8161 // CHECK12-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 8162 // CHECK12-NEXT: entry: 8163 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8164 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8165 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8166 // CHECK12-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8167 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8168 // CHECK12-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 8169 // CHECK12-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 8170 // CHECK12-NEXT: ret void 8171 // 8172 // 8173 // CHECK12-LABEL: define {{[^@]+}}@_ZN1ScvcEv 8174 // CHECK12-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 8175 // CHECK12-NEXT: entry: 8176 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8177 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8178 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8179 // CHECK12-NEXT: call void @_Z8mayThrowv() 8180 // CHECK12-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 8181 // CHECK12-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 8182 // CHECK12-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 8183 // CHECK12-NEXT: ret i8 [[CONV]] 8184 // 8185 // 8186 // CHECK12-LABEL: define {{[^@]+}}@__clang_call_terminate 8187 // CHECK12-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat { 8188 // CHECK12-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]] 8189 // CHECK12-NEXT: call void @_ZSt9terminatev() #[[ATTR8]] 8190 // CHECK12-NEXT: unreachable 8191 // 8192 // 8193 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 8194 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 8195 // CHECK12-NEXT: entry: 8196 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 8197 // CHECK12-NEXT: [[I1:%.*]] = alloca i32, align 4 8198 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 8199 // CHECK12-NEXT: br label [[FOR_COND:%.*]] 8200 // CHECK12: for.cond: 8201 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 8202 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 8203 // CHECK12-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 8204 // CHECK12: for.body: 8205 // CHECK12-NEXT: invoke void @_Z3foov() 8206 // CHECK12-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 8207 // CHECK12: invoke.cont: 8208 // CHECK12-NEXT: br label [[FOR_INC:%.*]] 8209 // CHECK12: for.inc: 8210 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 8211 // CHECK12-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 8212 // CHECK12-NEXT: store i32 [[INC]], i32* [[I]], align 4 8213 // CHECK12-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 8214 // CHECK12: for.end: 8215 // CHECK12-NEXT: store i32 0, i32* [[I1]], align 4 8216 // CHECK12-NEXT: br label [[FOR_COND2:%.*]] 8217 // CHECK12: for.cond2: 8218 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 8219 // CHECK12-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 8220 // CHECK12-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 8221 // CHECK12: for.body4: 8222 // CHECK12-NEXT: invoke void @_Z3foov() 8223 // CHECK12-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 8224 // CHECK12: invoke.cont5: 8225 // CHECK12-NEXT: br label [[FOR_INC6:%.*]] 8226 // CHECK12: for.inc6: 8227 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 8228 // CHECK12-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 8229 // CHECK12-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 8230 // CHECK12-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP10:![0-9]+]] 8231 // CHECK12: for.end8: 8232 // CHECK12-NEXT: ret i32 0 8233 // CHECK12: terminate.lpad: 8234 // CHECK12-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 8235 // CHECK12-NEXT: catch i8* null 8236 // CHECK12-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 8237 // CHECK12-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 8238 // CHECK12-NEXT: unreachable 8239 // 8240 // 8241 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 8242 // CHECK12-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 8243 // CHECK12-NEXT: entry: 8244 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 8245 // CHECK12-NEXT: [[I1:%.*]] = alloca i32, align 4 8246 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 8247 // CHECK12-NEXT: br label [[FOR_COND:%.*]] 8248 // CHECK12: for.cond: 8249 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 8250 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 8251 // CHECK12-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 8252 // CHECK12: for.body: 8253 // CHECK12-NEXT: invoke void @_Z3foov() 8254 // CHECK12-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 8255 // CHECK12: invoke.cont: 8256 // CHECK12-NEXT: br label [[FOR_INC:%.*]] 8257 // CHECK12: for.inc: 8258 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 8259 // CHECK12-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 8260 // CHECK12-NEXT: store i32 [[INC]], i32* [[I]], align 4 8261 // CHECK12-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 8262 // CHECK12: for.end: 8263 // CHECK12-NEXT: store i32 0, i32* [[I1]], align 4 8264 // CHECK12-NEXT: br label [[FOR_COND2:%.*]] 8265 // CHECK12: for.cond2: 8266 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 8267 // CHECK12-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 8268 // CHECK12-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 8269 // CHECK12: for.body4: 8270 // CHECK12-NEXT: invoke void @_Z3foov() 8271 // CHECK12-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 8272 // CHECK12: invoke.cont5: 8273 // CHECK12-NEXT: br label [[FOR_INC6:%.*]] 8274 // CHECK12: for.inc6: 8275 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 8276 // CHECK12-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 8277 // CHECK12-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 8278 // CHECK12-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP12:![0-9]+]] 8279 // CHECK12: for.end8: 8280 // CHECK12-NEXT: ret i32 0 8281 // CHECK12: terminate.lpad: 8282 // CHECK12-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 8283 // CHECK12-NEXT: catch i8* null 8284 // CHECK12-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 8285 // CHECK12-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 8286 // CHECK12-NEXT: unreachable 8287 // 8288 // 8289 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SD1Ev 8290 // CHECK12-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 { 8291 // CHECK12-NEXT: entry: 8292 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8293 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8294 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8295 // CHECK12-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR7]] 8296 // CHECK12-NEXT: ret void 8297 // 8298 // 8299 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SC2El 8300 // CHECK12-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 8301 // CHECK12-NEXT: entry: 8302 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8303 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8304 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8305 // CHECK12-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8306 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8307 // CHECK12-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 8308 // CHECK12-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 8309 // CHECK12-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 8310 // CHECK12-NEXT: ret void 8311 // 8312 // 8313 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SD2Ev 8314 // CHECK12-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 8315 // CHECK12-NEXT: entry: 8316 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8317 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8318 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8319 // CHECK12-NEXT: ret void 8320 // 8321 // 8322 // CHECK13-LABEL: define {{[^@]+}}@main 8323 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 8324 // CHECK13-NEXT: entry: 8325 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 8326 // CHECK13-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 8327 // CHECK13-NEXT: [[A:%.*]] = alloca i8, align 1 8328 // CHECK13-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 8329 // CHECK13-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 8330 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8331 // CHECK13-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 8332 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 8333 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 8334 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 8335 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 8336 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 8337 // CHECK13-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 8338 // CHECK13-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 8339 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 8340 // CHECK13: invoke.cont: 8341 // CHECK13-NEXT: store i8 [[CALL]], i8* [[A]], align 1 8342 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 8343 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 8344 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 8345 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8346 // CHECK13: omp_offload.failed: 8347 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 8348 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 8349 // CHECK13: lpad: 8350 // CHECK13-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 8351 // CHECK13-NEXT: cleanup 8352 // CHECK13-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 8353 // CHECK13-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 8354 // CHECK13-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 8355 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 8356 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 8357 // CHECK13-NEXT: br label [[EH_RESUME:%.*]] 8358 // CHECK13: omp_offload.cont: 8359 // CHECK13-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 8360 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 8361 // CHECK13-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 8362 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 8363 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8364 // CHECK13-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 8365 // CHECK13-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 8366 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8367 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 8368 // CHECK13-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 8369 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 8370 // CHECK13-NEXT: store i8* null, i8** [[TMP11]], align 8 8371 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8372 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8373 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 8374 // CHECK13-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8375 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 8376 // CHECK13-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 8377 // CHECK13: omp_offload.failed2: 8378 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 8379 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]] 8380 // CHECK13: omp_offload.cont3: 8381 // CHECK13-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 8382 // CHECK13-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 8383 // CHECK13-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 8384 // CHECK13-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 8385 // CHECK13: invoke.cont5: 8386 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 8387 // CHECK13-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 8388 // CHECK13-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 8389 // CHECK13: invoke.cont7: 8390 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 8391 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 8392 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 8393 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 8394 // CHECK13-NEXT: ret i32 [[TMP17]] 8395 // CHECK13: eh.resume: 8396 // CHECK13-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 8397 // CHECK13-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 8398 // CHECK13-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 8399 // CHECK13-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 8400 // CHECK13-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 8401 // 8402 // 8403 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SC1El 8404 // CHECK13-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 8405 // CHECK13-NEXT: entry: 8406 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8407 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8408 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8409 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8410 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8411 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 8412 // CHECK13-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 8413 // CHECK13-NEXT: ret void 8414 // 8415 // 8416 // CHECK13-LABEL: define {{[^@]+}}@_ZN1ScvcEv 8417 // CHECK13-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 8418 // CHECK13-NEXT: entry: 8419 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8420 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8421 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8422 // CHECK13-NEXT: call void @_Z8mayThrowv() 8423 // CHECK13-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 8424 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 8425 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 8426 // CHECK13-NEXT: ret i8 [[CONV]] 8427 // 8428 // 8429 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 8430 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] { 8431 // CHECK13-NEXT: entry: 8432 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 8433 // CHECK13-NEXT: ret void 8434 // 8435 // 8436 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined. 8437 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 8438 // CHECK13-NEXT: entry: 8439 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8440 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8441 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8442 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8443 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8444 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8445 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8446 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8447 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8448 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8449 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8450 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8451 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8452 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8453 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8454 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8455 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8456 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8457 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8458 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 8459 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8460 // CHECK13: cond.true: 8461 // CHECK13-NEXT: br label [[COND_END:%.*]] 8462 // CHECK13: cond.false: 8463 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8464 // CHECK13-NEXT: br label [[COND_END]] 8465 // CHECK13: cond.end: 8466 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8467 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8468 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8469 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8470 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8471 // CHECK13: omp.inner.for.cond: 8472 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8473 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8474 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8475 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8476 // CHECK13: omp.inner.for.body: 8477 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 8478 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8479 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 8480 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8481 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 8482 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 8483 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8484 // CHECK13: omp.inner.for.inc: 8485 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8486 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8487 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 8488 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8489 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8490 // CHECK13: omp.inner.for.end: 8491 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8492 // CHECK13: omp.loop.exit: 8493 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8494 // CHECK13-NEXT: ret void 8495 // 8496 // 8497 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1 8498 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 8499 // CHECK13-NEXT: entry: 8500 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8501 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8502 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8503 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8504 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8505 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8506 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8507 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8508 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8509 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8510 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8511 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8512 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8513 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8514 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8515 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8516 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 8517 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8518 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 8519 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8520 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 8521 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8522 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 8523 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8524 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8525 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8526 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 8527 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8528 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8529 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 8530 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8531 // CHECK13: cond.true: 8532 // CHECK13-NEXT: br label [[COND_END:%.*]] 8533 // CHECK13: cond.false: 8534 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8535 // CHECK13-NEXT: br label [[COND_END]] 8536 // CHECK13: cond.end: 8537 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 8538 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8539 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8540 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 8541 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8542 // CHECK13: omp.inner.for.cond: 8543 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8544 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8545 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 8546 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8547 // CHECK13: omp.inner.for.body: 8548 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8549 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 8550 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8551 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8552 // CHECK13-NEXT: invoke void @_Z3foov() 8553 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 8554 // CHECK13: invoke.cont: 8555 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8556 // CHECK13: omp.body.continue: 8557 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8558 // CHECK13: omp.inner.for.inc: 8559 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8560 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 8561 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 8562 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8563 // CHECK13: omp.inner.for.end: 8564 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8565 // CHECK13: omp.loop.exit: 8566 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 8567 // CHECK13-NEXT: ret void 8568 // CHECK13: terminate.lpad: 8569 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 8570 // CHECK13-NEXT: catch i8* null 8571 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 8572 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 8573 // CHECK13-NEXT: unreachable 8574 // 8575 // 8576 // CHECK13-LABEL: define {{[^@]+}}@__clang_call_terminate 8577 // CHECK13-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 8578 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 8579 // CHECK13-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 8580 // CHECK13-NEXT: unreachable 8581 // 8582 // 8583 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 8584 // CHECK13-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 8585 // CHECK13-NEXT: entry: 8586 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8587 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8588 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 8589 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 8590 // CHECK13-NEXT: ret void 8591 // 8592 // 8593 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2 8594 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 8595 // CHECK13-NEXT: entry: 8596 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8597 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8598 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 8599 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8600 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8601 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8602 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8603 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8604 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8605 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8606 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8607 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8608 // CHECK13-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 8609 // CHECK13-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 8610 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8611 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8612 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8613 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8614 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8615 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 8616 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8617 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8618 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 8619 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8620 // CHECK13: cond.true: 8621 // CHECK13-NEXT: br label [[COND_END:%.*]] 8622 // CHECK13: cond.false: 8623 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8624 // CHECK13-NEXT: br label [[COND_END]] 8625 // CHECK13: cond.end: 8626 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8627 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8628 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8629 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 8630 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8631 // CHECK13: omp.inner.for.cond: 8632 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8633 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8634 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8635 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8636 // CHECK13: omp.inner.for.body: 8637 // CHECK13-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 8638 // CHECK13-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 8639 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 8640 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8641 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 8642 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8643 // CHECK13-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 8644 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 8645 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8646 // CHECK13: omp.inner.for.inc: 8647 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8648 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8649 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 8650 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8651 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8652 // CHECK13: omp.inner.for.end: 8653 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8654 // CHECK13: omp.loop.exit: 8655 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 8656 // CHECK13-NEXT: ret void 8657 // 8658 // 8659 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3 8660 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 8661 // CHECK13-NEXT: entry: 8662 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8663 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8664 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8665 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8666 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8667 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8668 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8669 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8670 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8671 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8672 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8673 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8674 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8675 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8676 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8677 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8678 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 8679 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8680 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 8681 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8682 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 8683 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8684 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 8685 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8686 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8687 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8688 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 8689 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8690 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8691 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 8692 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8693 // CHECK13: cond.true: 8694 // CHECK13-NEXT: br label [[COND_END:%.*]] 8695 // CHECK13: cond.false: 8696 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8697 // CHECK13-NEXT: br label [[COND_END]] 8698 // CHECK13: cond.end: 8699 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 8700 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8701 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8702 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 8703 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8704 // CHECK13: omp.inner.for.cond: 8705 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8706 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8707 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 8708 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8709 // CHECK13: omp.inner.for.body: 8710 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8711 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 8712 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8713 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8714 // CHECK13-NEXT: invoke void @_Z3foov() 8715 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 8716 // CHECK13: invoke.cont: 8717 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8718 // CHECK13: omp.body.continue: 8719 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8720 // CHECK13: omp.inner.for.inc: 8721 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8722 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 8723 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 8724 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8725 // CHECK13: omp.inner.for.end: 8726 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8727 // CHECK13: omp.loop.exit: 8728 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 8729 // CHECK13-NEXT: ret void 8730 // CHECK13: terminate.lpad: 8731 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 8732 // CHECK13-NEXT: catch i8* null 8733 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 8734 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 8735 // CHECK13-NEXT: unreachable 8736 // 8737 // 8738 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 8739 // CHECK13-SAME: () #[[ATTR7:[0-9]+]] comdat { 8740 // CHECK13-NEXT: entry: 8741 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8742 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 8743 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 8744 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 8745 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 8746 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8747 // CHECK13: omp_offload.failed: 8748 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 8749 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 8750 // CHECK13: omp_offload.cont: 8751 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 8752 // CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 8753 // CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 8754 // CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 8755 // CHECK13: omp_offload.failed2: 8756 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 8757 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]] 8758 // CHECK13: omp_offload.cont3: 8759 // CHECK13-NEXT: ret i32 0 8760 // 8761 // 8762 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 8763 // CHECK13-SAME: () #[[ATTR7]] comdat { 8764 // CHECK13-NEXT: entry: 8765 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8766 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 8767 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 8768 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 8769 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 8770 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8771 // CHECK13: omp_offload.failed: 8772 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 8773 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 8774 // CHECK13: omp_offload.cont: 8775 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 8776 // CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 8777 // CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 8778 // CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 8779 // CHECK13: omp_offload.failed2: 8780 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 8781 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]] 8782 // CHECK13: omp_offload.cont3: 8783 // CHECK13-NEXT: ret i32 0 8784 // 8785 // 8786 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SD1Ev 8787 // CHECK13-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 8788 // CHECK13-NEXT: entry: 8789 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8790 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8791 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8792 // CHECK13-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR6]] 8793 // CHECK13-NEXT: ret void 8794 // 8795 // 8796 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SC2El 8797 // CHECK13-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 8798 // CHECK13-NEXT: entry: 8799 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 8800 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8801 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 8802 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8803 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 8804 // CHECK13-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 8805 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 8806 // CHECK13-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 8807 // CHECK13-NEXT: ret void 8808 // 8809 // 8810 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 8811 // CHECK13-SAME: () #[[ATTR3]] { 8812 // CHECK13-NEXT: entry: 8813 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 8814 // CHECK13-NEXT: ret void 8815 // 8816 // 8817 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..4 8818 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 8819 // CHECK13-NEXT: entry: 8820 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8821 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8822 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8823 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8824 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8825 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8826 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8827 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8828 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8829 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8830 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8831 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8832 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8833 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8834 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8835 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8836 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8837 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8838 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8839 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 8840 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8841 // CHECK13: cond.true: 8842 // CHECK13-NEXT: br label [[COND_END:%.*]] 8843 // CHECK13: cond.false: 8844 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8845 // CHECK13-NEXT: br label [[COND_END]] 8846 // CHECK13: cond.end: 8847 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8848 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8849 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8850 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8851 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8852 // CHECK13: omp.inner.for.cond: 8853 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8854 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8855 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8856 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8857 // CHECK13: omp.inner.for.body: 8858 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 8859 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8860 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 8861 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8862 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 8863 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 8864 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8865 // CHECK13: omp.inner.for.inc: 8866 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8867 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8868 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 8869 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8870 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8871 // CHECK13: omp.inner.for.end: 8872 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8873 // CHECK13: omp.loop.exit: 8874 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8875 // CHECK13-NEXT: ret void 8876 // 8877 // 8878 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5 8879 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 8880 // CHECK13-NEXT: entry: 8881 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8882 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8883 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8884 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8885 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8886 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8887 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8888 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8889 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8890 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8891 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8892 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8893 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8894 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8895 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8896 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8897 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 8898 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8899 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 8900 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8901 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 8902 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8903 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 8904 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8905 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8906 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8907 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 8908 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8909 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8910 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 8911 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8912 // CHECK13: cond.true: 8913 // CHECK13-NEXT: br label [[COND_END:%.*]] 8914 // CHECK13: cond.false: 8915 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8916 // CHECK13-NEXT: br label [[COND_END]] 8917 // CHECK13: cond.end: 8918 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 8919 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8920 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8921 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 8922 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8923 // CHECK13: omp.inner.for.cond: 8924 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8925 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8926 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 8927 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8928 // CHECK13: omp.inner.for.body: 8929 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8930 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 8931 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8932 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8933 // CHECK13-NEXT: invoke void @_Z3foov() 8934 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 8935 // CHECK13: invoke.cont: 8936 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8937 // CHECK13: omp.body.continue: 8938 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8939 // CHECK13: omp.inner.for.inc: 8940 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8941 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 8942 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 8943 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8944 // CHECK13: omp.inner.for.end: 8945 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8946 // CHECK13: omp.loop.exit: 8947 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 8948 // CHECK13-NEXT: ret void 8949 // CHECK13: terminate.lpad: 8950 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 8951 // CHECK13-NEXT: catch i8* null 8952 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 8953 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 8954 // CHECK13-NEXT: unreachable 8955 // 8956 // 8957 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 8958 // CHECK13-SAME: () #[[ATTR3]] { 8959 // CHECK13-NEXT: entry: 8960 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 8961 // CHECK13-NEXT: ret void 8962 // 8963 // 8964 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6 8965 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 8966 // CHECK13-NEXT: entry: 8967 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8968 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8969 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8970 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8971 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8972 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8973 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8974 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8975 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8976 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8977 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8978 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8979 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8980 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8981 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8982 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8983 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8984 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8985 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8986 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 8987 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8988 // CHECK13: cond.true: 8989 // CHECK13-NEXT: br label [[COND_END:%.*]] 8990 // CHECK13: cond.false: 8991 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8992 // CHECK13-NEXT: br label [[COND_END]] 8993 // CHECK13: cond.end: 8994 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8995 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8996 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8997 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8998 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8999 // CHECK13: omp.inner.for.cond: 9000 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9001 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9002 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 9003 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9004 // CHECK13: omp.inner.for.body: 9005 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 9006 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9007 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 9008 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9009 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 9010 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 9011 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9012 // CHECK13: omp.inner.for.inc: 9013 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9014 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9015 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 9016 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9017 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9018 // CHECK13: omp.inner.for.end: 9019 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9020 // CHECK13: omp.loop.exit: 9021 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 9022 // CHECK13-NEXT: ret void 9023 // 9024 // 9025 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7 9026 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 9027 // CHECK13-NEXT: entry: 9028 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9029 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9030 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9031 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9032 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9033 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9034 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9035 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9036 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9037 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9038 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9039 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9040 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9041 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9042 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9043 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9044 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 9045 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9046 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 9047 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9048 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9049 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9050 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9051 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9052 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9053 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9054 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 9055 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9056 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9057 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 9058 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9059 // CHECK13: cond.true: 9060 // CHECK13-NEXT: br label [[COND_END:%.*]] 9061 // CHECK13: cond.false: 9062 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9063 // CHECK13-NEXT: br label [[COND_END]] 9064 // CHECK13: cond.end: 9065 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 9066 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9067 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9068 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 9069 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9070 // CHECK13: omp.inner.for.cond: 9071 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9072 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9073 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 9074 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9075 // CHECK13: omp.inner.for.body: 9076 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9077 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 9078 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9079 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9080 // CHECK13-NEXT: invoke void @_Z3foov() 9081 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 9082 // CHECK13: invoke.cont: 9083 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9084 // CHECK13: omp.body.continue: 9085 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9086 // CHECK13: omp.inner.for.inc: 9087 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9088 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 9089 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9090 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9091 // CHECK13: omp.inner.for.end: 9092 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9093 // CHECK13: omp.loop.exit: 9094 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 9095 // CHECK13-NEXT: ret void 9096 // CHECK13: terminate.lpad: 9097 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 9098 // CHECK13-NEXT: catch i8* null 9099 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 9100 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 9101 // CHECK13-NEXT: unreachable 9102 // 9103 // 9104 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 9105 // CHECK13-SAME: () #[[ATTR3]] { 9106 // CHECK13-NEXT: entry: 9107 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 9108 // CHECK13-NEXT: ret void 9109 // 9110 // 9111 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8 9112 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 9113 // CHECK13-NEXT: entry: 9114 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9115 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9116 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9117 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9118 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9119 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9120 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9121 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9122 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9123 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9124 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9125 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9126 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 9127 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9128 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9129 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9130 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 9131 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9132 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9133 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 9134 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9135 // CHECK13: cond.true: 9136 // CHECK13-NEXT: br label [[COND_END:%.*]] 9137 // CHECK13: cond.false: 9138 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9139 // CHECK13-NEXT: br label [[COND_END]] 9140 // CHECK13: cond.end: 9141 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 9142 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9143 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9144 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 9145 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9146 // CHECK13: omp.inner.for.cond: 9147 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9148 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9149 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 9150 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9151 // CHECK13: omp.inner.for.body: 9152 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 9153 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9154 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 9155 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9156 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 9157 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 9158 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9159 // CHECK13: omp.inner.for.inc: 9160 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9161 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9162 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 9163 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9164 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9165 // CHECK13: omp.inner.for.end: 9166 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9167 // CHECK13: omp.loop.exit: 9168 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 9169 // CHECK13-NEXT: ret void 9170 // 9171 // 9172 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9 9173 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 9174 // CHECK13-NEXT: entry: 9175 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9176 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9177 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9178 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9179 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9180 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9181 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9182 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9183 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9184 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9185 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9186 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9187 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9188 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9189 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9190 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9191 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 9192 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9193 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 9194 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9195 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9196 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9197 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9198 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9199 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9200 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9201 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 9202 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9203 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9204 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 9205 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9206 // CHECK13: cond.true: 9207 // CHECK13-NEXT: br label [[COND_END:%.*]] 9208 // CHECK13: cond.false: 9209 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9210 // CHECK13-NEXT: br label [[COND_END]] 9211 // CHECK13: cond.end: 9212 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 9213 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9214 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9215 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 9216 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9217 // CHECK13: omp.inner.for.cond: 9218 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9219 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9220 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 9221 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9222 // CHECK13: omp.inner.for.body: 9223 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9224 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 9225 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9226 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9227 // CHECK13-NEXT: invoke void @_Z3foov() 9228 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 9229 // CHECK13: invoke.cont: 9230 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9231 // CHECK13: omp.body.continue: 9232 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9233 // CHECK13: omp.inner.for.inc: 9234 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9235 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 9236 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9237 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9238 // CHECK13: omp.inner.for.end: 9239 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9240 // CHECK13: omp.loop.exit: 9241 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 9242 // CHECK13-NEXT: ret void 9243 // CHECK13: terminate.lpad: 9244 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 9245 // CHECK13-NEXT: catch i8* null 9246 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 9247 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 9248 // CHECK13-NEXT: unreachable 9249 // 9250 // 9251 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 9252 // CHECK13-SAME: () #[[ATTR3]] { 9253 // CHECK13-NEXT: entry: 9254 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 9255 // CHECK13-NEXT: ret void 9256 // 9257 // 9258 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10 9259 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 9260 // CHECK13-NEXT: entry: 9261 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9262 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9263 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9264 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9265 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9266 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9267 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9268 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9269 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9270 // CHECK13-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 9271 // CHECK13-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 9272 // CHECK13-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 9273 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9274 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9275 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9276 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 9277 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9278 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9279 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9280 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 9281 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9282 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9283 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 9284 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9285 // CHECK13: cond.true: 9286 // CHECK13-NEXT: br label [[COND_END:%.*]] 9287 // CHECK13: cond.false: 9288 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9289 // CHECK13-NEXT: br label [[COND_END]] 9290 // CHECK13: cond.end: 9291 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 9292 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9293 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9294 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 9295 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9296 // CHECK13: omp.inner.for.cond: 9297 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9298 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9299 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 9300 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9301 // CHECK13: omp.inner.for.body: 9302 // CHECK13-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[REF_TMP]], i64 23) 9303 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 9304 // CHECK13: invoke.cont: 9305 // CHECK13-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) 9306 // CHECK13-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 9307 // CHECK13: invoke.cont2: 9308 // CHECK13-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 9309 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 9310 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 9311 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9312 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 9313 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9314 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 9315 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 9316 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9317 // CHECK13: omp.inner.for.inc: 9318 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9319 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9320 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 9321 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9322 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9323 // CHECK13: lpad: 9324 // CHECK13-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 9325 // CHECK13-NEXT: catch i8* null 9326 // CHECK13-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 9327 // CHECK13-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 9328 // CHECK13-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 9329 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 9330 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 9331 // CHECK13-NEXT: br label [[TERMINATE_HANDLER:%.*]] 9332 // CHECK13: omp.inner.for.end: 9333 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9334 // CHECK13: omp.loop.exit: 9335 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 9336 // CHECK13-NEXT: ret void 9337 // CHECK13: terminate.lpad: 9338 // CHECK13-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 9339 // CHECK13-NEXT: catch i8* null 9340 // CHECK13-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 9341 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 9342 // CHECK13-NEXT: unreachable 9343 // CHECK13: terminate.handler: 9344 // CHECK13-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 9345 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 9346 // CHECK13-NEXT: unreachable 9347 // 9348 // 9349 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11 9350 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 9351 // CHECK13-NEXT: entry: 9352 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9353 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9354 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9355 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9356 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9357 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9358 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9359 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9360 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9361 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9362 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9363 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9364 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9365 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9366 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9367 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9368 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 9369 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9370 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 9371 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9372 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9373 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9374 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9375 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9376 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9377 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9378 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 9379 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9380 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9381 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 9382 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9383 // CHECK13: cond.true: 9384 // CHECK13-NEXT: br label [[COND_END:%.*]] 9385 // CHECK13: cond.false: 9386 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9387 // CHECK13-NEXT: br label [[COND_END]] 9388 // CHECK13: cond.end: 9389 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 9390 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9391 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9392 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 9393 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9394 // CHECK13: omp.inner.for.cond: 9395 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9396 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9397 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 9398 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9399 // CHECK13: omp.inner.for.body: 9400 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9401 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 9402 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9403 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9404 // CHECK13-NEXT: invoke void @_Z3foov() 9405 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 9406 // CHECK13: invoke.cont: 9407 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9408 // CHECK13: omp.body.continue: 9409 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9410 // CHECK13: omp.inner.for.inc: 9411 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9412 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 9413 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9414 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9415 // CHECK13: omp.inner.for.end: 9416 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9417 // CHECK13: omp.loop.exit: 9418 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 9419 // CHECK13-NEXT: ret void 9420 // CHECK13: terminate.lpad: 9421 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 9422 // CHECK13-NEXT: catch i8* null 9423 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 9424 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 9425 // CHECK13-NEXT: unreachable 9426 // 9427 // 9428 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SD2Ev 9429 // CHECK13-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 9430 // CHECK13-NEXT: entry: 9431 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 9432 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 9433 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 9434 // CHECK13-NEXT: ret void 9435 // 9436 // 9437 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 9438 // CHECK13-SAME: () #[[ATTR9:[0-9]+]] { 9439 // CHECK13-NEXT: entry: 9440 // CHECK13-NEXT: call void @__tgt_register_requires(i64 1) 9441 // CHECK13-NEXT: ret void 9442 // 9443 // 9444 // CHECK14-LABEL: define {{[^@]+}}@main 9445 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 9446 // CHECK14-NEXT: entry: 9447 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 9448 // CHECK14-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 9449 // CHECK14-NEXT: [[A:%.*]] = alloca i8, align 1 9450 // CHECK14-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 9451 // CHECK14-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 9452 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 9453 // CHECK14-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 9454 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 9455 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 9456 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 9457 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 9458 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 9459 // CHECK14-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 9460 // CHECK14-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 9461 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 9462 // CHECK14: invoke.cont: 9463 // CHECK14-NEXT: store i8 [[CALL]], i8* [[A]], align 1 9464 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 9465 // CHECK14-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 9466 // CHECK14-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 9467 // CHECK14-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 9468 // CHECK14: omp_offload.failed: 9469 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 9470 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] 9471 // CHECK14: lpad: 9472 // CHECK14-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 9473 // CHECK14-NEXT: cleanup 9474 // CHECK14-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 9475 // CHECK14-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 9476 // CHECK14-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 9477 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 9478 // CHECK14-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 9479 // CHECK14-NEXT: br label [[EH_RESUME:%.*]] 9480 // CHECK14: omp_offload.cont: 9481 // CHECK14-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 9482 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 9483 // CHECK14-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 9484 // CHECK14-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 9485 // CHECK14-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9486 // CHECK14-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 9487 // CHECK14-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 9488 // CHECK14-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9489 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 9490 // CHECK14-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 9491 // CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 9492 // CHECK14-NEXT: store i8* null, i8** [[TMP11]], align 8 9493 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9494 // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9495 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 9496 // CHECK14-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 9497 // CHECK14-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 9498 // CHECK14-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 9499 // CHECK14: omp_offload.failed2: 9500 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 9501 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT3]] 9502 // CHECK14: omp_offload.cont3: 9503 // CHECK14-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 9504 // CHECK14-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 9505 // CHECK14-NEXT: [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 9506 // CHECK14-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 9507 // CHECK14: invoke.cont5: 9508 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 9509 // CHECK14-NEXT: [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 9510 // CHECK14-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 9511 // CHECK14: invoke.cont7: 9512 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 9513 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 9514 // CHECK14-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR6]] 9515 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 9516 // CHECK14-NEXT: ret i32 [[TMP17]] 9517 // CHECK14: eh.resume: 9518 // CHECK14-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 9519 // CHECK14-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 9520 // CHECK14-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 9521 // CHECK14-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 9522 // CHECK14-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 9523 // 9524 // 9525 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SC1El 9526 // CHECK14-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 9527 // CHECK14-NEXT: entry: 9528 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 9529 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 9530 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 9531 // CHECK14-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 9532 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 9533 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 9534 // CHECK14-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 9535 // CHECK14-NEXT: ret void 9536 // 9537 // 9538 // CHECK14-LABEL: define {{[^@]+}}@_ZN1ScvcEv 9539 // CHECK14-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 9540 // CHECK14-NEXT: entry: 9541 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 9542 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 9543 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 9544 // CHECK14-NEXT: call void @_Z8mayThrowv() 9545 // CHECK14-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 9546 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 9547 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 9548 // CHECK14-NEXT: ret i8 [[CONV]] 9549 // 9550 // 9551 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 9552 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] { 9553 // CHECK14-NEXT: entry: 9554 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 9555 // CHECK14-NEXT: ret void 9556 // 9557 // 9558 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined. 9559 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 9560 // CHECK14-NEXT: entry: 9561 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9562 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9563 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9564 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 9565 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9566 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9567 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9568 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9569 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 9570 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9571 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9572 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9573 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 9574 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9575 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9576 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9577 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 9578 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9579 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9580 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 9581 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9582 // CHECK14: cond.true: 9583 // CHECK14-NEXT: br label [[COND_END:%.*]] 9584 // CHECK14: cond.false: 9585 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9586 // CHECK14-NEXT: br label [[COND_END]] 9587 // CHECK14: cond.end: 9588 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 9589 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9590 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9591 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 9592 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9593 // CHECK14: omp.inner.for.cond: 9594 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9595 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9596 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 9597 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9598 // CHECK14: omp.inner.for.body: 9599 // CHECK14-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 9600 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9601 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 9602 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9603 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 9604 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 9605 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9606 // CHECK14: omp.inner.for.inc: 9607 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9608 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9609 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 9610 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9611 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 9612 // CHECK14: omp.inner.for.end: 9613 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9614 // CHECK14: omp.loop.exit: 9615 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 9616 // CHECK14-NEXT: ret void 9617 // 9618 // 9619 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..1 9620 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 9621 // CHECK14-NEXT: entry: 9622 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9623 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9624 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9625 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9626 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9627 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 9628 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9629 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9630 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9631 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9632 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 9633 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9634 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9635 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9636 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9637 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9638 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 9639 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9640 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 9641 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9642 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9643 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9644 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9645 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9646 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9647 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9648 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 9649 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9650 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9651 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 9652 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9653 // CHECK14: cond.true: 9654 // CHECK14-NEXT: br label [[COND_END:%.*]] 9655 // CHECK14: cond.false: 9656 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9657 // CHECK14-NEXT: br label [[COND_END]] 9658 // CHECK14: cond.end: 9659 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 9660 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9661 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9662 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 9663 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9664 // CHECK14: omp.inner.for.cond: 9665 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9666 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9667 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 9668 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9669 // CHECK14: omp.inner.for.body: 9670 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9671 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 9672 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9673 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9674 // CHECK14-NEXT: invoke void @_Z3foov() 9675 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 9676 // CHECK14: invoke.cont: 9677 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9678 // CHECK14: omp.body.continue: 9679 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9680 // CHECK14: omp.inner.for.inc: 9681 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9682 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 9683 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9684 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 9685 // CHECK14: omp.inner.for.end: 9686 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9687 // CHECK14: omp.loop.exit: 9688 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 9689 // CHECK14-NEXT: ret void 9690 // CHECK14: terminate.lpad: 9691 // CHECK14-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 9692 // CHECK14-NEXT: catch i8* null 9693 // CHECK14-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 9694 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 9695 // CHECK14-NEXT: unreachable 9696 // 9697 // 9698 // CHECK14-LABEL: define {{[^@]+}}@__clang_call_terminate 9699 // CHECK14-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 9700 // CHECK14-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 9701 // CHECK14-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 9702 // CHECK14-NEXT: unreachable 9703 // 9704 // 9705 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 9706 // CHECK14-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { 9707 // CHECK14-NEXT: entry: 9708 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 9709 // CHECK14-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 9710 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 9711 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 9712 // CHECK14-NEXT: ret void 9713 // 9714 // 9715 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..2 9716 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 9717 // CHECK14-NEXT: entry: 9718 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9719 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9720 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 9721 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9722 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 9723 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9724 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9725 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9726 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9727 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 9728 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9729 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9730 // CHECK14-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 9731 // CHECK14-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 9732 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9733 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 9734 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9735 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9736 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9737 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9738 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9739 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9740 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 9741 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9742 // CHECK14: cond.true: 9743 // CHECK14-NEXT: br label [[COND_END:%.*]] 9744 // CHECK14: cond.false: 9745 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9746 // CHECK14-NEXT: br label [[COND_END]] 9747 // CHECK14: cond.end: 9748 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9749 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9750 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9751 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 9752 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9753 // CHECK14: omp.inner.for.cond: 9754 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9755 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9756 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9757 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9758 // CHECK14: omp.inner.for.body: 9759 // CHECK14-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 9760 // CHECK14-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 9761 // CHECK14-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 9762 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9763 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 9764 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9765 // CHECK14-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 9766 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 9767 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9768 // CHECK14: omp.inner.for.inc: 9769 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9770 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9771 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 9772 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9773 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 9774 // CHECK14: omp.inner.for.end: 9775 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9776 // CHECK14: omp.loop.exit: 9777 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 9778 // CHECK14-NEXT: ret void 9779 // 9780 // 9781 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..3 9782 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 9783 // CHECK14-NEXT: entry: 9784 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9785 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9786 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9787 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9788 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9789 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 9790 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9791 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9792 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9793 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9794 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 9795 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9796 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9797 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9798 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9799 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9800 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 9801 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9802 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 9803 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9804 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9805 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9806 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9807 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9808 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9809 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9810 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 9811 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9812 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9813 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 9814 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9815 // CHECK14: cond.true: 9816 // CHECK14-NEXT: br label [[COND_END:%.*]] 9817 // CHECK14: cond.false: 9818 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9819 // CHECK14-NEXT: br label [[COND_END]] 9820 // CHECK14: cond.end: 9821 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 9822 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9823 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9824 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 9825 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9826 // CHECK14: omp.inner.for.cond: 9827 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9828 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9829 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 9830 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9831 // CHECK14: omp.inner.for.body: 9832 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9833 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 9834 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9835 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9836 // CHECK14-NEXT: invoke void @_Z3foov() 9837 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 9838 // CHECK14: invoke.cont: 9839 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9840 // CHECK14: omp.body.continue: 9841 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9842 // CHECK14: omp.inner.for.inc: 9843 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9844 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 9845 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9846 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 9847 // CHECK14: omp.inner.for.end: 9848 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9849 // CHECK14: omp.loop.exit: 9850 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 9851 // CHECK14-NEXT: ret void 9852 // CHECK14: terminate.lpad: 9853 // CHECK14-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 9854 // CHECK14-NEXT: catch i8* null 9855 // CHECK14-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 9856 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 9857 // CHECK14-NEXT: unreachable 9858 // 9859 // 9860 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 9861 // CHECK14-SAME: () #[[ATTR7:[0-9]+]] comdat { 9862 // CHECK14-NEXT: entry: 9863 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 9864 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 9865 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 9866 // CHECK14-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 9867 // CHECK14-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 9868 // CHECK14-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 9869 // CHECK14: omp_offload.failed: 9870 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 9871 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] 9872 // CHECK14: omp_offload.cont: 9873 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 9874 // CHECK14-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 9875 // CHECK14-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 9876 // CHECK14-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 9877 // CHECK14: omp_offload.failed2: 9878 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 9879 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT3]] 9880 // CHECK14: omp_offload.cont3: 9881 // CHECK14-NEXT: ret i32 0 9882 // 9883 // 9884 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 9885 // CHECK14-SAME: () #[[ATTR7]] comdat { 9886 // CHECK14-NEXT: entry: 9887 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 9888 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 9889 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 9890 // CHECK14-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 9891 // CHECK14-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 9892 // CHECK14-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 9893 // CHECK14: omp_offload.failed: 9894 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 9895 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] 9896 // CHECK14: omp_offload.cont: 9897 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 9898 // CHECK14-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 9899 // CHECK14-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 9900 // CHECK14-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 9901 // CHECK14: omp_offload.failed2: 9902 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 9903 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT3]] 9904 // CHECK14: omp_offload.cont3: 9905 // CHECK14-NEXT: ret i32 0 9906 // 9907 // 9908 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SD1Ev 9909 // CHECK14-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 9910 // CHECK14-NEXT: entry: 9911 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 9912 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 9913 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 9914 // CHECK14-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR6]] 9915 // CHECK14-NEXT: ret void 9916 // 9917 // 9918 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SC2El 9919 // CHECK14-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 9920 // CHECK14-NEXT: entry: 9921 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 9922 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 9923 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 9924 // CHECK14-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 9925 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 9926 // CHECK14-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 9927 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 9928 // CHECK14-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 9929 // CHECK14-NEXT: ret void 9930 // 9931 // 9932 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 9933 // CHECK14-SAME: () #[[ATTR3]] { 9934 // CHECK14-NEXT: entry: 9935 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 9936 // CHECK14-NEXT: ret void 9937 // 9938 // 9939 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..4 9940 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 9941 // CHECK14-NEXT: entry: 9942 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9943 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9944 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9945 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 9946 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9947 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9948 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9949 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9950 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 9951 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9952 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9953 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9954 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 9955 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9956 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9957 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9958 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 9959 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9960 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9961 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 9962 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9963 // CHECK14: cond.true: 9964 // CHECK14-NEXT: br label [[COND_END:%.*]] 9965 // CHECK14: cond.false: 9966 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9967 // CHECK14-NEXT: br label [[COND_END]] 9968 // CHECK14: cond.end: 9969 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 9970 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9971 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9972 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 9973 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9974 // CHECK14: omp.inner.for.cond: 9975 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9976 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9977 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 9978 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9979 // CHECK14: omp.inner.for.body: 9980 // CHECK14-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 9981 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9982 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 9983 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9984 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 9985 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 9986 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9987 // CHECK14: omp.inner.for.inc: 9988 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9989 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9990 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 9991 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9992 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 9993 // CHECK14: omp.inner.for.end: 9994 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9995 // CHECK14: omp.loop.exit: 9996 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 9997 // CHECK14-NEXT: ret void 9998 // 9999 // 10000 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..5 10001 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 10002 // CHECK14-NEXT: entry: 10003 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10004 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10005 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10006 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10007 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10008 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10009 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10010 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10011 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10012 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10013 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10014 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10015 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10016 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10017 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10018 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10019 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 10020 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10021 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 10022 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10023 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 10024 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10025 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 10026 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10027 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10028 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10029 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 10030 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10031 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10032 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 10033 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10034 // CHECK14: cond.true: 10035 // CHECK14-NEXT: br label [[COND_END:%.*]] 10036 // CHECK14: cond.false: 10037 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10038 // CHECK14-NEXT: br label [[COND_END]] 10039 // CHECK14: cond.end: 10040 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 10041 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10042 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10043 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 10044 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10045 // CHECK14: omp.inner.for.cond: 10046 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10047 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10048 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 10049 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10050 // CHECK14: omp.inner.for.body: 10051 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10052 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 10053 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10054 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10055 // CHECK14-NEXT: invoke void @_Z3foov() 10056 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 10057 // CHECK14: invoke.cont: 10058 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10059 // CHECK14: omp.body.continue: 10060 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10061 // CHECK14: omp.inner.for.inc: 10062 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10063 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 10064 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 10065 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10066 // CHECK14: omp.inner.for.end: 10067 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10068 // CHECK14: omp.loop.exit: 10069 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 10070 // CHECK14-NEXT: ret void 10071 // CHECK14: terminate.lpad: 10072 // CHECK14-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 10073 // CHECK14-NEXT: catch i8* null 10074 // CHECK14-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 10075 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 10076 // CHECK14-NEXT: unreachable 10077 // 10078 // 10079 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 10080 // CHECK14-SAME: () #[[ATTR3]] { 10081 // CHECK14-NEXT: entry: 10082 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 10083 // CHECK14-NEXT: ret void 10084 // 10085 // 10086 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..6 10087 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 10088 // CHECK14-NEXT: entry: 10089 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10090 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10091 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10092 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10093 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10094 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10095 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10096 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10097 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10098 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10099 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10100 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10101 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 10102 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10103 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10104 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10105 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 10106 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10107 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10108 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 10109 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10110 // CHECK14: cond.true: 10111 // CHECK14-NEXT: br label [[COND_END:%.*]] 10112 // CHECK14: cond.false: 10113 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10114 // CHECK14-NEXT: br label [[COND_END]] 10115 // CHECK14: cond.end: 10116 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 10117 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10118 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10119 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 10120 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10121 // CHECK14: omp.inner.for.cond: 10122 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10123 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10124 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 10125 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10126 // CHECK14: omp.inner.for.body: 10127 // CHECK14-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 10128 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10129 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 10130 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10131 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 10132 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 10133 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10134 // CHECK14: omp.inner.for.inc: 10135 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10136 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10137 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 10138 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10139 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10140 // CHECK14: omp.inner.for.end: 10141 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10142 // CHECK14: omp.loop.exit: 10143 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 10144 // CHECK14-NEXT: ret void 10145 // 10146 // 10147 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..7 10148 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 10149 // CHECK14-NEXT: entry: 10150 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10151 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10152 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10153 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10154 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10155 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10156 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10157 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10158 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10159 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10160 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10161 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10162 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10163 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10164 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10165 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10166 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 10167 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10168 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 10169 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10170 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 10171 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10172 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 10173 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10174 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10175 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10176 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 10177 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10178 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10179 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 10180 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10181 // CHECK14: cond.true: 10182 // CHECK14-NEXT: br label [[COND_END:%.*]] 10183 // CHECK14: cond.false: 10184 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10185 // CHECK14-NEXT: br label [[COND_END]] 10186 // CHECK14: cond.end: 10187 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 10188 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10189 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10190 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 10191 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10192 // CHECK14: omp.inner.for.cond: 10193 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10194 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10195 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 10196 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10197 // CHECK14: omp.inner.for.body: 10198 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10199 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 10200 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10201 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10202 // CHECK14-NEXT: invoke void @_Z3foov() 10203 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 10204 // CHECK14: invoke.cont: 10205 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10206 // CHECK14: omp.body.continue: 10207 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10208 // CHECK14: omp.inner.for.inc: 10209 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10210 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 10211 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 10212 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10213 // CHECK14: omp.inner.for.end: 10214 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10215 // CHECK14: omp.loop.exit: 10216 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 10217 // CHECK14-NEXT: ret void 10218 // CHECK14: terminate.lpad: 10219 // CHECK14-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 10220 // CHECK14-NEXT: catch i8* null 10221 // CHECK14-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 10222 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 10223 // CHECK14-NEXT: unreachable 10224 // 10225 // 10226 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 10227 // CHECK14-SAME: () #[[ATTR3]] { 10228 // CHECK14-NEXT: entry: 10229 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 10230 // CHECK14-NEXT: ret void 10231 // 10232 // 10233 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..8 10234 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 10235 // CHECK14-NEXT: entry: 10236 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10237 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10238 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10239 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10240 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10241 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10242 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10243 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10244 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10245 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10246 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10247 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10248 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 10249 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10250 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10251 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10252 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 10253 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10254 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10255 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 10256 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10257 // CHECK14: cond.true: 10258 // CHECK14-NEXT: br label [[COND_END:%.*]] 10259 // CHECK14: cond.false: 10260 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10261 // CHECK14-NEXT: br label [[COND_END]] 10262 // CHECK14: cond.end: 10263 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 10264 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10265 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10266 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 10267 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10268 // CHECK14: omp.inner.for.cond: 10269 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10270 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10271 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 10272 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10273 // CHECK14: omp.inner.for.body: 10274 // CHECK14-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 10275 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10276 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 10277 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10278 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 10279 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 10280 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10281 // CHECK14: omp.inner.for.inc: 10282 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10283 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10284 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 10285 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10286 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10287 // CHECK14: omp.inner.for.end: 10288 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10289 // CHECK14: omp.loop.exit: 10290 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 10291 // CHECK14-NEXT: ret void 10292 // 10293 // 10294 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..9 10295 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 10296 // CHECK14-NEXT: entry: 10297 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10298 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10299 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10300 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10301 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10302 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10303 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10304 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10305 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10306 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10307 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10308 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10309 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10310 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10311 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10312 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10313 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 10314 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10315 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 10316 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10317 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 10318 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10319 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 10320 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10321 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10322 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10323 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 10324 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10325 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10326 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 10327 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10328 // CHECK14: cond.true: 10329 // CHECK14-NEXT: br label [[COND_END:%.*]] 10330 // CHECK14: cond.false: 10331 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10332 // CHECK14-NEXT: br label [[COND_END]] 10333 // CHECK14: cond.end: 10334 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 10335 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10336 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10337 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 10338 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10339 // CHECK14: omp.inner.for.cond: 10340 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10341 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10342 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 10343 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10344 // CHECK14: omp.inner.for.body: 10345 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10346 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 10347 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10348 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10349 // CHECK14-NEXT: invoke void @_Z3foov() 10350 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 10351 // CHECK14: invoke.cont: 10352 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10353 // CHECK14: omp.body.continue: 10354 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10355 // CHECK14: omp.inner.for.inc: 10356 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10357 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 10358 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 10359 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10360 // CHECK14: omp.inner.for.end: 10361 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10362 // CHECK14: omp.loop.exit: 10363 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 10364 // CHECK14-NEXT: ret void 10365 // CHECK14: terminate.lpad: 10366 // CHECK14-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 10367 // CHECK14-NEXT: catch i8* null 10368 // CHECK14-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 10369 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 10370 // CHECK14-NEXT: unreachable 10371 // 10372 // 10373 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 10374 // CHECK14-SAME: () #[[ATTR3]] { 10375 // CHECK14-NEXT: entry: 10376 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 10377 // CHECK14-NEXT: ret void 10378 // 10379 // 10380 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..10 10381 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 10382 // CHECK14-NEXT: entry: 10383 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10384 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10385 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10386 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10387 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10388 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10389 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10390 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10391 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10392 // CHECK14-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 10393 // CHECK14-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 10394 // CHECK14-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 10395 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10396 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10397 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10398 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 10399 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10400 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10401 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10402 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 10403 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10404 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10405 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 10406 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10407 // CHECK14: cond.true: 10408 // CHECK14-NEXT: br label [[COND_END:%.*]] 10409 // CHECK14: cond.false: 10410 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10411 // CHECK14-NEXT: br label [[COND_END]] 10412 // CHECK14: cond.end: 10413 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 10414 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10415 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10416 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 10417 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10418 // CHECK14: omp.inner.for.cond: 10419 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10420 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10421 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 10422 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10423 // CHECK14: omp.inner.for.body: 10424 // CHECK14-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[REF_TMP]], i64 23) 10425 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 10426 // CHECK14: invoke.cont: 10427 // CHECK14-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) 10428 // CHECK14-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]] 10429 // CHECK14: invoke.cont2: 10430 // CHECK14-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 10431 // CHECK14-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 10432 // CHECK14-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 10433 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10434 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 10435 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10436 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 10437 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 10438 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10439 // CHECK14: omp.inner.for.inc: 10440 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10441 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10442 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 10443 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10444 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10445 // CHECK14: lpad: 10446 // CHECK14-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 10447 // CHECK14-NEXT: catch i8* null 10448 // CHECK14-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 10449 // CHECK14-NEXT: store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8 10450 // CHECK14-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1 10451 // CHECK14-NEXT: store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4 10452 // CHECK14-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 10453 // CHECK14-NEXT: br label [[TERMINATE_HANDLER:%.*]] 10454 // CHECK14: omp.inner.for.end: 10455 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10456 // CHECK14: omp.loop.exit: 10457 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 10458 // CHECK14-NEXT: ret void 10459 // CHECK14: terminate.lpad: 10460 // CHECK14-NEXT: [[TMP17:%.*]] = landingpad { i8*, i32 } 10461 // CHECK14-NEXT: catch i8* null 10462 // CHECK14-NEXT: [[TMP18:%.*]] = extractvalue { i8*, i32 } [[TMP17]], 0 10463 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[TMP18]]) #[[ATTR10]] 10464 // CHECK14-NEXT: unreachable 10465 // CHECK14: terminate.handler: 10466 // CHECK14-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 10467 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]] 10468 // CHECK14-NEXT: unreachable 10469 // 10470 // 10471 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..11 10472 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 10473 // CHECK14-NEXT: entry: 10474 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10475 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10476 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10477 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10478 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10479 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10480 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10481 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10482 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10483 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10484 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10485 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10486 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10487 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10488 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10489 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10490 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 10491 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10492 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 10493 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10494 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 10495 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10496 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 10497 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10498 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10499 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10500 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 10501 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10502 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10503 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 10504 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10505 // CHECK14: cond.true: 10506 // CHECK14-NEXT: br label [[COND_END:%.*]] 10507 // CHECK14: cond.false: 10508 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10509 // CHECK14-NEXT: br label [[COND_END]] 10510 // CHECK14: cond.end: 10511 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 10512 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10513 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10514 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 10515 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10516 // CHECK14: omp.inner.for.cond: 10517 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10518 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10519 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 10520 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10521 // CHECK14: omp.inner.for.body: 10522 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10523 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 10524 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10525 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10526 // CHECK14-NEXT: invoke void @_Z3foov() 10527 // CHECK14-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 10528 // CHECK14: invoke.cont: 10529 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10530 // CHECK14: omp.body.continue: 10531 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10532 // CHECK14: omp.inner.for.inc: 10533 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10534 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 10535 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 10536 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10537 // CHECK14: omp.inner.for.end: 10538 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10539 // CHECK14: omp.loop.exit: 10540 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 10541 // CHECK14-NEXT: ret void 10542 // CHECK14: terminate.lpad: 10543 // CHECK14-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 10544 // CHECK14-NEXT: catch i8* null 10545 // CHECK14-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 10546 // CHECK14-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 10547 // CHECK14-NEXT: unreachable 10548 // 10549 // 10550 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SD2Ev 10551 // CHECK14-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 10552 // CHECK14-NEXT: entry: 10553 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 10554 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 10555 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 10556 // CHECK14-NEXT: ret void 10557 // 10558 // 10559 // CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 10560 // CHECK14-SAME: () #[[ATTR9:[0-9]+]] { 10561 // CHECK14-NEXT: entry: 10562 // CHECK14-NEXT: call void @__tgt_register_requires(i64 1) 10563 // CHECK14-NEXT: ret void 10564 // 10565 // 10566 // CHECK15-LABEL: define {{[^@]+}}@main 10567 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 10568 // CHECK15-NEXT: entry: 10569 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 10570 // CHECK15-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 10571 // CHECK15-NEXT: [[A:%.*]] = alloca i8, align 1 10572 // CHECK15-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 10573 // CHECK15-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 10574 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 10575 // CHECK15-NEXT: [[I2:%.*]] = alloca i32, align 4 10576 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 10577 // CHECK15-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 10578 // CHECK15-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 10579 // CHECK15-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 10580 // CHECK15: invoke.cont: 10581 // CHECK15-NEXT: store i8 [[CALL]], i8* [[A]], align 1 10582 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 10583 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 10584 // CHECK15: for.cond: 10585 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 10586 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 10587 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 10588 // CHECK15: for.body: 10589 // CHECK15-NEXT: invoke void @_Z3foov() 10590 // CHECK15-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 10591 // CHECK15: invoke.cont1: 10592 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 10593 // CHECK15: for.inc: 10594 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 10595 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 10596 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 10597 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 10598 // CHECK15: lpad: 10599 // CHECK15-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 10600 // CHECK15-NEXT: cleanup 10601 // CHECK15-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 10602 // CHECK15-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 10603 // CHECK15-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 10604 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 10605 // CHECK15-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]] 10606 // CHECK15-NEXT: br label [[EH_RESUME:%.*]] 10607 // CHECK15: for.end: 10608 // CHECK15-NEXT: store i32 0, i32* [[I2]], align 4 10609 // CHECK15-NEXT: br label [[FOR_COND3:%.*]] 10610 // CHECK15: for.cond3: 10611 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4 10612 // CHECK15-NEXT: [[CMP4:%.*]] = icmp slt i32 [[TMP5]], 100 10613 // CHECK15-NEXT: br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END9:%.*]] 10614 // CHECK15: for.body5: 10615 // CHECK15-NEXT: invoke void @_Z3foov() 10616 // CHECK15-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[TERMINATE_LPAD]] 10617 // CHECK15: invoke.cont6: 10618 // CHECK15-NEXT: br label [[FOR_INC7:%.*]] 10619 // CHECK15: for.inc7: 10620 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[I2]], align 4 10621 // CHECK15-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP6]], 1 10622 // CHECK15-NEXT: store i32 [[INC8]], i32* [[I2]], align 4 10623 // CHECK15-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP8:![0-9]+]] 10624 // CHECK15: for.end9: 10625 // CHECK15-NEXT: [[TMP7:%.*]] = load i8, i8* [[A]], align 1 10626 // CHECK15-NEXT: [[CONV:%.*]] = sext i8 [[TMP7]] to i32 10627 // CHECK15-NEXT: [[CALL11:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 10628 // CHECK15-NEXT: to label [[INVOKE_CONT10:%.*]] unwind label [[LPAD]] 10629 // CHECK15: invoke.cont10: 10630 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CALL11]] 10631 // CHECK15-NEXT: [[CALL13:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 10632 // CHECK15-NEXT: to label [[INVOKE_CONT12:%.*]] unwind label [[LPAD]] 10633 // CHECK15: invoke.cont12: 10634 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[ADD]], [[CALL13]] 10635 // CHECK15-NEXT: store i32 [[ADD14]], i32* [[RETVAL]], align 4 10636 // CHECK15-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7]] 10637 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[RETVAL]], align 4 10638 // CHECK15-NEXT: ret i32 [[TMP8]] 10639 // CHECK15: eh.resume: 10640 // CHECK15-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 10641 // CHECK15-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 10642 // CHECK15-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 10643 // CHECK15-NEXT: [[LPAD_VAL15:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 10644 // CHECK15-NEXT: resume { i8*, i32 } [[LPAD_VAL15]] 10645 // CHECK15: terminate.lpad: 10646 // CHECK15-NEXT: [[TMP9:%.*]] = landingpad { i8*, i32 } 10647 // CHECK15-NEXT: catch i8* null 10648 // CHECK15-NEXT: [[TMP10:%.*]] = extractvalue { i8*, i32 } [[TMP9]], 0 10649 // CHECK15-NEXT: call void @__clang_call_terminate(i8* [[TMP10]]) #[[ATTR8:[0-9]+]] 10650 // CHECK15-NEXT: unreachable 10651 // 10652 // 10653 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SC1El 10654 // CHECK15-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 10655 // CHECK15-NEXT: entry: 10656 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 10657 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 10658 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 10659 // CHECK15-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 10660 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 10661 // CHECK15-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 10662 // CHECK15-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 10663 // CHECK15-NEXT: ret void 10664 // 10665 // 10666 // CHECK15-LABEL: define {{[^@]+}}@_ZN1ScvcEv 10667 // CHECK15-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 10668 // CHECK15-NEXT: entry: 10669 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 10670 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 10671 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 10672 // CHECK15-NEXT: call void @_Z8mayThrowv() 10673 // CHECK15-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 10674 // CHECK15-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 10675 // CHECK15-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 10676 // CHECK15-NEXT: ret i8 [[CONV]] 10677 // 10678 // 10679 // CHECK15-LABEL: define {{[^@]+}}@__clang_call_terminate 10680 // CHECK15-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat { 10681 // CHECK15-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]] 10682 // CHECK15-NEXT: call void @_ZSt9terminatev() #[[ATTR8]] 10683 // CHECK15-NEXT: unreachable 10684 // 10685 // 10686 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 10687 // CHECK15-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 10688 // CHECK15-NEXT: entry: 10689 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 10690 // CHECK15-NEXT: [[I1:%.*]] = alloca i32, align 4 10691 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 10692 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 10693 // CHECK15: for.cond: 10694 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 10695 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 10696 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 10697 // CHECK15: for.body: 10698 // CHECK15-NEXT: invoke void @_Z3foov() 10699 // CHECK15-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 10700 // CHECK15: invoke.cont: 10701 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 10702 // CHECK15: for.inc: 10703 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 10704 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 10705 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 10706 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 10707 // CHECK15: for.end: 10708 // CHECK15-NEXT: store i32 0, i32* [[I1]], align 4 10709 // CHECK15-NEXT: br label [[FOR_COND2:%.*]] 10710 // CHECK15: for.cond2: 10711 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 10712 // CHECK15-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 10713 // CHECK15-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 10714 // CHECK15: for.body4: 10715 // CHECK15-NEXT: invoke void @_Z3foov() 10716 // CHECK15-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 10717 // CHECK15: invoke.cont5: 10718 // CHECK15-NEXT: br label [[FOR_INC6:%.*]] 10719 // CHECK15: for.inc6: 10720 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 10721 // CHECK15-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 10722 // CHECK15-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 10723 // CHECK15-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP10:![0-9]+]] 10724 // CHECK15: for.end8: 10725 // CHECK15-NEXT: ret i32 0 10726 // CHECK15: terminate.lpad: 10727 // CHECK15-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 10728 // CHECK15-NEXT: catch i8* null 10729 // CHECK15-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 10730 // CHECK15-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 10731 // CHECK15-NEXT: unreachable 10732 // 10733 // 10734 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 10735 // CHECK15-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 10736 // CHECK15-NEXT: entry: 10737 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 10738 // CHECK15-NEXT: [[I1:%.*]] = alloca i32, align 4 10739 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 10740 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 10741 // CHECK15: for.cond: 10742 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 10743 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 10744 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 10745 // CHECK15: for.body: 10746 // CHECK15-NEXT: invoke void @_Z3foov() 10747 // CHECK15-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 10748 // CHECK15: invoke.cont: 10749 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 10750 // CHECK15: for.inc: 10751 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 10752 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 10753 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 10754 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 10755 // CHECK15: for.end: 10756 // CHECK15-NEXT: store i32 0, i32* [[I1]], align 4 10757 // CHECK15-NEXT: br label [[FOR_COND2:%.*]] 10758 // CHECK15: for.cond2: 10759 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 10760 // CHECK15-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 10761 // CHECK15-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 10762 // CHECK15: for.body4: 10763 // CHECK15-NEXT: invoke void @_Z3foov() 10764 // CHECK15-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 10765 // CHECK15: invoke.cont5: 10766 // CHECK15-NEXT: br label [[FOR_INC6:%.*]] 10767 // CHECK15: for.inc6: 10768 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 10769 // CHECK15-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 10770 // CHECK15-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 10771 // CHECK15-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP12:![0-9]+]] 10772 // CHECK15: for.end8: 10773 // CHECK15-NEXT: ret i32 0 10774 // CHECK15: terminate.lpad: 10775 // CHECK15-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 10776 // CHECK15-NEXT: catch i8* null 10777 // CHECK15-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 10778 // CHECK15-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 10779 // CHECK15-NEXT: unreachable 10780 // 10781 // 10782 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SD1Ev 10783 // CHECK15-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 { 10784 // CHECK15-NEXT: entry: 10785 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 10786 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 10787 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 10788 // CHECK15-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR7]] 10789 // CHECK15-NEXT: ret void 10790 // 10791 // 10792 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SC2El 10793 // CHECK15-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 10794 // CHECK15-NEXT: entry: 10795 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 10796 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 10797 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 10798 // CHECK15-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 10799 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 10800 // CHECK15-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 10801 // CHECK15-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 10802 // CHECK15-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 10803 // CHECK15-NEXT: ret void 10804 // 10805 // 10806 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SD2Ev 10807 // CHECK15-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 10808 // CHECK15-NEXT: entry: 10809 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 10810 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 10811 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 10812 // CHECK15-NEXT: ret void 10813 // 10814 // 10815 // CHECK16-LABEL: define {{[^@]+}}@main 10816 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 10817 // CHECK16-NEXT: entry: 10818 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 10819 // CHECK16-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 10820 // CHECK16-NEXT: [[A:%.*]] = alloca i8, align 1 10821 // CHECK16-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 10822 // CHECK16-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 10823 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 10824 // CHECK16-NEXT: [[I2:%.*]] = alloca i32, align 4 10825 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 10826 // CHECK16-NEXT: call void @_ZN1SC1El(%struct.S* nonnull dereferenceable(24) [[S]], i64 0) 10827 // CHECK16-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull dereferenceable(24) [[S]]) 10828 // CHECK16-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 10829 // CHECK16: invoke.cont: 10830 // CHECK16-NEXT: store i8 [[CALL]], i8* [[A]], align 1 10831 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 10832 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 10833 // CHECK16: for.cond: 10834 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 10835 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 10836 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 10837 // CHECK16: for.body: 10838 // CHECK16-NEXT: invoke void @_Z3foov() 10839 // CHECK16-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 10840 // CHECK16: invoke.cont1: 10841 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 10842 // CHECK16: for.inc: 10843 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 10844 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 10845 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 10846 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 10847 // CHECK16: lpad: 10848 // CHECK16-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 10849 // CHECK16-NEXT: cleanup 10850 // CHECK16-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 10851 // CHECK16-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 10852 // CHECK16-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 10853 // CHECK16-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 10854 // CHECK16-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]] 10855 // CHECK16-NEXT: br label [[EH_RESUME:%.*]] 10856 // CHECK16: for.end: 10857 // CHECK16-NEXT: store i32 0, i32* [[I2]], align 4 10858 // CHECK16-NEXT: br label [[FOR_COND3:%.*]] 10859 // CHECK16: for.cond3: 10860 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4 10861 // CHECK16-NEXT: [[CMP4:%.*]] = icmp slt i32 [[TMP5]], 100 10862 // CHECK16-NEXT: br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END9:%.*]] 10863 // CHECK16: for.body5: 10864 // CHECK16-NEXT: invoke void @_Z3foov() 10865 // CHECK16-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[TERMINATE_LPAD]] 10866 // CHECK16: invoke.cont6: 10867 // CHECK16-NEXT: br label [[FOR_INC7:%.*]] 10868 // CHECK16: for.inc7: 10869 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[I2]], align 4 10870 // CHECK16-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP6]], 1 10871 // CHECK16-NEXT: store i32 [[INC8]], i32* [[I2]], align 4 10872 // CHECK16-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP8:![0-9]+]] 10873 // CHECK16: for.end9: 10874 // CHECK16-NEXT: [[TMP7:%.*]] = load i8, i8* [[A]], align 1 10875 // CHECK16-NEXT: [[CONV:%.*]] = sext i8 [[TMP7]] to i32 10876 // CHECK16-NEXT: [[CALL11:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv() 10877 // CHECK16-NEXT: to label [[INVOKE_CONT10:%.*]] unwind label [[LPAD]] 10878 // CHECK16: invoke.cont10: 10879 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CALL11]] 10880 // CHECK16-NEXT: [[CALL13:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv() 10881 // CHECK16-NEXT: to label [[INVOKE_CONT12:%.*]] unwind label [[LPAD]] 10882 // CHECK16: invoke.cont12: 10883 // CHECK16-NEXT: [[ADD14:%.*]] = add nsw i32 [[ADD]], [[CALL13]] 10884 // CHECK16-NEXT: store i32 [[ADD14]], i32* [[RETVAL]], align 4 10885 // CHECK16-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(24) [[S]]) #[[ATTR7]] 10886 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[RETVAL]], align 4 10887 // CHECK16-NEXT: ret i32 [[TMP8]] 10888 // CHECK16: eh.resume: 10889 // CHECK16-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 10890 // CHECK16-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 10891 // CHECK16-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 10892 // CHECK16-NEXT: [[LPAD_VAL15:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 10893 // CHECK16-NEXT: resume { i8*, i32 } [[LPAD_VAL15]] 10894 // CHECK16: terminate.lpad: 10895 // CHECK16-NEXT: [[TMP9:%.*]] = landingpad { i8*, i32 } 10896 // CHECK16-NEXT: catch i8* null 10897 // CHECK16-NEXT: [[TMP10:%.*]] = extractvalue { i8*, i32 } [[TMP9]], 0 10898 // CHECK16-NEXT: call void @__clang_call_terminate(i8* [[TMP10]]) #[[ATTR8:[0-9]+]] 10899 // CHECK16-NEXT: unreachable 10900 // 10901 // 10902 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SC1El 10903 // CHECK16-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 10904 // CHECK16-NEXT: entry: 10905 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 10906 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 10907 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 10908 // CHECK16-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 10909 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 10910 // CHECK16-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 10911 // CHECK16-NEXT: call void @_ZN1SC2El(%struct.S* nonnull dereferenceable(24) [[THIS1]], i64 [[TMP0]]) 10912 // CHECK16-NEXT: ret void 10913 // 10914 // 10915 // CHECK16-LABEL: define {{[^@]+}}@_ZN1ScvcEv 10916 // CHECK16-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 10917 // CHECK16-NEXT: entry: 10918 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 10919 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 10920 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 10921 // CHECK16-NEXT: call void @_Z8mayThrowv() 10922 // CHECK16-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 10923 // CHECK16-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 10924 // CHECK16-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 10925 // CHECK16-NEXT: ret i8 [[CONV]] 10926 // 10927 // 10928 // CHECK16-LABEL: define {{[^@]+}}@__clang_call_terminate 10929 // CHECK16-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat { 10930 // CHECK16-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]] 10931 // CHECK16-NEXT: call void @_ZSt9terminatev() #[[ATTR8]] 10932 // CHECK16-NEXT: unreachable 10933 // 10934 // 10935 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 10936 // CHECK16-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 10937 // CHECK16-NEXT: entry: 10938 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 10939 // CHECK16-NEXT: [[I1:%.*]] = alloca i32, align 4 10940 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 10941 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 10942 // CHECK16: for.cond: 10943 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 10944 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 10945 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 10946 // CHECK16: for.body: 10947 // CHECK16-NEXT: invoke void @_Z3foov() 10948 // CHECK16-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 10949 // CHECK16: invoke.cont: 10950 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 10951 // CHECK16: for.inc: 10952 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 10953 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 10954 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 10955 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 10956 // CHECK16: for.end: 10957 // CHECK16-NEXT: store i32 0, i32* [[I1]], align 4 10958 // CHECK16-NEXT: br label [[FOR_COND2:%.*]] 10959 // CHECK16: for.cond2: 10960 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 10961 // CHECK16-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 10962 // CHECK16-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 10963 // CHECK16: for.body4: 10964 // CHECK16-NEXT: invoke void @_Z3foov() 10965 // CHECK16-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 10966 // CHECK16: invoke.cont5: 10967 // CHECK16-NEXT: br label [[FOR_INC6:%.*]] 10968 // CHECK16: for.inc6: 10969 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 10970 // CHECK16-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 10971 // CHECK16-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 10972 // CHECK16-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP10:![0-9]+]] 10973 // CHECK16: for.end8: 10974 // CHECK16-NEXT: ret i32 0 10975 // CHECK16: terminate.lpad: 10976 // CHECK16-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 10977 // CHECK16-NEXT: catch i8* null 10978 // CHECK16-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 10979 // CHECK16-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 10980 // CHECK16-NEXT: unreachable 10981 // 10982 // 10983 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 10984 // CHECK16-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 10985 // CHECK16-NEXT: entry: 10986 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 10987 // CHECK16-NEXT: [[I1:%.*]] = alloca i32, align 4 10988 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 10989 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 10990 // CHECK16: for.cond: 10991 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 10992 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 10993 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 10994 // CHECK16: for.body: 10995 // CHECK16-NEXT: invoke void @_Z3foov() 10996 // CHECK16-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 10997 // CHECK16: invoke.cont: 10998 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 10999 // CHECK16: for.inc: 11000 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 11001 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 11002 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 11003 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 11004 // CHECK16: for.end: 11005 // CHECK16-NEXT: store i32 0, i32* [[I1]], align 4 11006 // CHECK16-NEXT: br label [[FOR_COND2:%.*]] 11007 // CHECK16: for.cond2: 11008 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 11009 // CHECK16-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 11010 // CHECK16-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 11011 // CHECK16: for.body4: 11012 // CHECK16-NEXT: invoke void @_Z3foov() 11013 // CHECK16-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD]] 11014 // CHECK16: invoke.cont5: 11015 // CHECK16-NEXT: br label [[FOR_INC6:%.*]] 11016 // CHECK16: for.inc6: 11017 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 11018 // CHECK16-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP3]], 1 11019 // CHECK16-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 11020 // CHECK16-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP12:![0-9]+]] 11021 // CHECK16: for.end8: 11022 // CHECK16-NEXT: ret i32 0 11023 // CHECK16: terminate.lpad: 11024 // CHECK16-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 11025 // CHECK16-NEXT: catch i8* null 11026 // CHECK16-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 11027 // CHECK16-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR8]] 11028 // CHECK16-NEXT: unreachable 11029 // 11030 // 11031 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SD1Ev 11032 // CHECK16-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 { 11033 // CHECK16-NEXT: entry: 11034 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 11035 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 11036 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 11037 // CHECK16-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull dereferenceable(24) [[THIS1]]) #[[ATTR7]] 11038 // CHECK16-NEXT: ret void 11039 // 11040 // 11041 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SC2El 11042 // CHECK16-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 11043 // CHECK16-NEXT: entry: 11044 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 11045 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 11046 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 11047 // CHECK16-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 11048 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 11049 // CHECK16-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 11050 // CHECK16-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 11051 // CHECK16-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 11052 // CHECK16-NEXT: ret void 11053 // 11054 // 11055 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SD2Ev 11056 // CHECK16-SAME: (%struct.S* nonnull dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { 11057 // CHECK16-NEXT: entry: 11058 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 11059 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 11060 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 11061 // CHECK16-NEXT: ret void 11062 // 11063