1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5 11 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7 14 15 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK8 16 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 17 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9 18 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11 21 22 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK12 23 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13 25 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK14 26 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15 28 // expected-no-diagnostics 29 #ifndef HEADER 30 #define HEADER 31 32 template <class T> 33 struct S { 34 T f; 35 S(T a) : f(a) {} 36 S() : f() {} 37 operator T() { return T(); } 38 ~S() {} 39 }; 40 41 template <typename T> 42 T tmain() { 43 S<T> test; 44 T t_var = T(); 45 T vec[] = {1, 2}; 46 S<T> s_arr[] = {1, 2}; 47 S<T> &var = test; 48 #pragma omp target 49 #pragma omp teams 50 #pragma omp distribute parallel for firstprivate(t_var, vec, s_arr, s_arr, var, var) 51 for (int i = 0; i < 2; ++i) { 52 vec[i] = t_var; 53 s_arr[i] = var; 54 } 55 return T(); 56 } 57 58 int main() { 59 static int svar; 60 volatile double g; 61 volatile double &g1 = g; 62 63 #ifdef LAMBDA 64 [&]() { 65 static float sfvar; 66 67 #pragma omp target 68 #pragma omp teams 69 #pragma omp distribute parallel for firstprivate(g, g1, svar, sfvar) 70 for (int i = 0; i < 2; ++i) { 71 72 // addr alloca's 73 74 // private alloca's 75 76 // transfer input parameters into addr alloca's 77 78 79 // init private alloca's with addr alloca's 80 // g 81 82 // g1 83 84 // svar 85 86 // sfvar 87 88 // pass firstprivate parameters to parallel outlined function 89 // g 90 91 // g1 92 93 // svar 94 95 // sfvar 96 97 98 99 // skip initial params 100 101 // addr alloca's 102 103 // private alloca's (only for 32-bit) 104 105 // transfer input parameters into addr alloca's 106 107 // prepare parameters for lambda 108 // g 109 110 // g1 111 112 // svar 113 114 // sfvar 115 116 g = 1; 117 g1 = 1; 118 svar = 3; 119 sfvar = 4.0; 120 121 // pass params to inner lambda 122 [&]() { 123 g = 2; 124 g1 = 2; 125 svar = 4; 126 sfvar = 8.0; 127 128 }(); 129 } 130 }(); 131 return 0; 132 #else 133 S<float> test; 134 int t_var = 0; 135 int vec[] = {1, 2}; 136 S<float> s_arr[] = {1, 2}; 137 S<float> &var = test; 138 139 #pragma omp target 140 #pragma omp teams 141 #pragma omp distribute parallel for firstprivate(t_var, vec, s_arr, s_arr, var, var, svar) 142 for (int i = 0; i < 2; ++i) { 143 vec[i] = t_var; 144 s_arr[i] = var; 145 } 146 return tmain<int>(); 147 #endif 148 } 149 150 151 152 153 // addr alloca's 154 155 // skip loop alloca's 156 157 // private alloca's 158 159 160 // init addr alloca's with input values 161 162 // init private alloca's with addr alloca's 163 // t-var 164 165 // vec 166 167 // s_arr 168 169 // var 170 171 // svar 172 173 // pass private alloca's to fork 174 // not dag to distinguish with S_VAR_CAST 175 176 // call destructors: var.. 177 178 // ..and s_arr 179 180 181 // By OpenMP specifications, 'firstprivate' applies to both distribute and parallel for. 182 // However, the support for 'firstprivate' of 'parallel' is only used when 'parallel' 183 // is found alone. Therefore we only have one 'firstprivate' support for 'parallel for' 184 // in combination 185 186 // addr alloca's 187 188 // skip loop alloca's 189 190 // private alloca's 191 192 193 // init addr alloca's with input values 194 195 // init private alloca's with addr alloca's 196 // vec 197 198 // s_arr 199 200 // var 201 202 203 // call destructors: var.. 204 205 // ..and s_arr 206 207 208 // template tmain with S_INT_TY 209 210 211 212 // addr alloca's 213 214 // skip loop alloca's 215 216 // private alloca's 217 218 219 // init addr alloca's with input values 220 221 // init private alloca's with addr alloca's 222 // t-var 223 224 // vec 225 226 // s_arr 227 228 // var 229 230 // pass private alloca's to fork 231 // not dag to distinguish with S_VAR_CAST 232 233 // call destructors: var.. 234 235 // ..and s_arr 236 237 238 // By OpenMP specifications, 'firstprivate' applies to both distribute and parallel for. 239 // However, the support for 'firstprivate' of 'parallel' is only used when 'parallel' 240 // is found alone. Therefore we only have one 'firstprivate' support for 'parallel for' 241 // in combination 242 243 // addr alloca's 244 245 // skip loop alloca's 246 247 // private alloca's 248 249 250 // init addr alloca's with input values 251 252 // init private alloca's with addr alloca's 253 // vec 254 255 // s_arr 256 257 // var 258 259 260 // call destructors: var.. 261 262 // ..and s_arr 263 264 265 #endif 266 // CHECK1-LABEL: define {{[^@]+}}@main 267 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 268 // CHECK1-NEXT: entry: 269 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 270 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 271 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 272 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 273 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 274 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 275 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 276 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8 277 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 278 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 279 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 280 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(16) [[REF_TMP]]) 281 // CHECK1-NEXT: ret i32 0 282 // 283 // 284 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 285 // CHECK1-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 286 // CHECK1-NEXT: entry: 287 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 288 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 289 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 290 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 291 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 292 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 293 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 294 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 295 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 296 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 297 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 298 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 299 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 300 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 301 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 302 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]]) 303 // CHECK1-NEXT: ret void 304 // 305 // 306 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 307 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 308 // CHECK1-NEXT: entry: 309 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 310 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 311 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 312 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 313 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 314 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 315 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 316 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 317 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 318 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 319 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 320 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 321 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 322 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 323 // CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8 324 // CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8 325 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca double*, align 8 326 // CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 327 // CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 328 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 329 // CHECK1-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8 330 // CHECK1-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8 331 // CHECK1-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 332 // CHECK1-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8 333 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 334 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 335 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 336 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 337 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 338 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 339 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 340 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 341 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 342 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 343 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 344 // CHECK1-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8 345 // CHECK1-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8 346 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 347 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 348 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 349 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 350 // CHECK1-NEXT: [[TMP5:%.*]] = load double, double* [[TMP0]], align 8 351 // CHECK1-NEXT: store double [[TMP5]], double* [[G3]], align 8 352 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 8 353 // CHECK1-NEXT: [[TMP7:%.*]] = load double, double* [[TMP6]], align 8 354 // CHECK1-NEXT: store double [[TMP7]], double* [[G14]], align 8 355 // CHECK1-NEXT: store double* [[G14]], double** [[_TMP5]], align 8 356 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 357 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 358 // CHECK1-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 359 // CHECK1-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 360 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 361 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 362 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 363 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 364 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 365 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 366 // CHECK1: cond.true: 367 // CHECK1-NEXT: br label [[COND_END:%.*]] 368 // CHECK1: cond.false: 369 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 370 // CHECK1-NEXT: br label [[COND_END]] 371 // CHECK1: cond.end: 372 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 373 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 374 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 375 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 376 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 377 // CHECK1: omp.inner.for.cond: 378 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 379 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 380 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 381 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 382 // CHECK1: omp.inner.for.body: 383 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 384 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 385 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 386 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 387 // CHECK1-NEXT: [[TMP21:%.*]] = load double, double* [[G3]], align 8 388 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_CASTED]] to double* 389 // CHECK1-NEXT: store double [[TMP21]], double* [[CONV]], align 8 390 // CHECK1-NEXT: [[TMP22:%.*]] = load i64, i64* [[G_CASTED]], align 8 391 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP5]], align 8 392 // CHECK1-NEXT: [[TMP24:%.*]] = load volatile double, double* [[TMP23]], align 8 393 // CHECK1-NEXT: [[CONV9:%.*]] = bitcast i64* [[G1_CASTED]] to double* 394 // CHECK1-NEXT: store double [[TMP24]], double* [[CONV9]], align 8 395 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[G1_CASTED]], align 8 396 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR6]], align 4 397 // CHECK1-NEXT: [[CONV10:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 398 // CHECK1-NEXT: store i32 [[TMP26]], i32* [[CONV10]], align 4 399 // CHECK1-NEXT: [[TMP27:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 400 // CHECK1-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR7]], align 4 401 // CHECK1-NEXT: [[CONV11:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float* 402 // CHECK1-NEXT: store float [[TMP28]], float* [[CONV11]], align 4 403 // CHECK1-NEXT: [[TMP29:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8 404 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP22]], i64 [[TMP25]], i64 [[TMP27]], i64 [[TMP29]]) 405 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 406 // CHECK1: omp.inner.for.inc: 407 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 408 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 409 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 410 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 411 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 412 // CHECK1: omp.inner.for.end: 413 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 414 // CHECK1: omp.loop.exit: 415 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 416 // CHECK1-NEXT: ret void 417 // 418 // 419 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 420 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2]] { 421 // CHECK1-NEXT: entry: 422 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 423 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 424 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 425 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 426 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 427 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 428 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 429 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 430 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 431 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 432 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 433 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 434 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 435 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 436 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 437 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 438 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 439 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 440 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 441 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 442 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 443 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 444 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 445 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 446 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 447 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 448 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 449 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 450 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 451 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 452 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 453 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 454 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 455 // CHECK1-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP0]] to i32 456 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 457 // CHECK1-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP1]] to i32 458 // CHECK1-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4 459 // CHECK1-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4 460 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 461 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 462 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 463 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 464 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 465 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 466 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 467 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 468 // CHECK1: cond.true: 469 // CHECK1-NEXT: br label [[COND_END:%.*]] 470 // CHECK1: cond.false: 471 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 472 // CHECK1-NEXT: br label [[COND_END]] 473 // CHECK1: cond.end: 474 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 475 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 476 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 477 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 478 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 479 // CHECK1: omp.inner.for.cond: 480 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 481 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 482 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 483 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 484 // CHECK1: omp.inner.for.body: 485 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 486 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 487 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 488 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 489 // CHECK1-NEXT: store double 1.000000e+00, double* [[CONV]], align 8 490 // CHECK1-NEXT: [[TMP10:%.*]] = load double*, double** [[TMP]], align 8 491 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 8 492 // CHECK1-NEXT: store i32 3, i32* [[CONV2]], align 8 493 // CHECK1-NEXT: store float 4.000000e+00, float* [[CONV3]], align 8 494 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 495 // CHECK1-NEXT: store double* [[CONV]], double** [[TMP11]], align 8 496 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 497 // CHECK1-NEXT: [[TMP13:%.*]] = load double*, double** [[TMP]], align 8 498 // CHECK1-NEXT: store double* [[TMP13]], double** [[TMP12]], align 8 499 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 500 // CHECK1-NEXT: store i32* [[CONV2]], i32** [[TMP14]], align 8 501 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 502 // CHECK1-NEXT: store float* [[CONV3]], float** [[TMP15]], align 8 503 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull dereferenceable(32) [[REF_TMP]]) 504 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 505 // CHECK1: omp.body.continue: 506 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 507 // CHECK1: omp.inner.for.inc: 508 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 509 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1 510 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 511 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 512 // CHECK1: omp.inner.for.end: 513 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 514 // CHECK1: omp.loop.exit: 515 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 516 // CHECK1-NEXT: ret void 517 // 518 // 519 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 520 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 521 // CHECK1-NEXT: entry: 522 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 523 // CHECK1-NEXT: ret void 524 // 525 // 526 // CHECK2-LABEL: define {{[^@]+}}@main 527 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 528 // CHECK2-NEXT: entry: 529 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 530 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 531 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8 532 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 533 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 534 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8 535 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 536 // CHECK2-NEXT: store double* [[G]], double** [[TMP0]], align 8 537 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 538 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 539 // CHECK2-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 540 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(16) [[REF_TMP]]) 541 // CHECK2-NEXT: ret i32 0 542 // 543 // 544 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 545 // CHECK2-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 546 // CHECK2-NEXT: entry: 547 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 548 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 549 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 550 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 551 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 552 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 553 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 554 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 555 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 556 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 557 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 558 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 559 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 560 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 561 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 562 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]]) 563 // CHECK2-NEXT: ret void 564 // 565 // 566 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 567 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 568 // CHECK2-NEXT: entry: 569 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 570 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 571 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 572 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 573 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 574 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 575 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 576 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 577 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 578 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 579 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 580 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 581 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 582 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 583 // CHECK2-NEXT: [[G3:%.*]] = alloca double, align 8 584 // CHECK2-NEXT: [[G14:%.*]] = alloca double, align 8 585 // CHECK2-NEXT: [[_TMP5:%.*]] = alloca double*, align 8 586 // CHECK2-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 587 // CHECK2-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 588 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 589 // CHECK2-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8 590 // CHECK2-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8 591 // CHECK2-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 592 // CHECK2-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8 593 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 594 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 595 // CHECK2-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 596 // CHECK2-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 597 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 598 // CHECK2-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 599 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 600 // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 601 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 602 // CHECK2-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 603 // CHECK2-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 604 // CHECK2-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8 605 // CHECK2-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8 606 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 607 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 608 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 609 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 610 // CHECK2-NEXT: [[TMP5:%.*]] = load double, double* [[TMP0]], align 8 611 // CHECK2-NEXT: store double [[TMP5]], double* [[G3]], align 8 612 // CHECK2-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 8 613 // CHECK2-NEXT: [[TMP7:%.*]] = load double, double* [[TMP6]], align 8 614 // CHECK2-NEXT: store double [[TMP7]], double* [[G14]], align 8 615 // CHECK2-NEXT: store double* [[G14]], double** [[_TMP5]], align 8 616 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 617 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 618 // CHECK2-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 619 // CHECK2-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 620 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 621 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 622 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 623 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 624 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 625 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 626 // CHECK2: cond.true: 627 // CHECK2-NEXT: br label [[COND_END:%.*]] 628 // CHECK2: cond.false: 629 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 630 // CHECK2-NEXT: br label [[COND_END]] 631 // CHECK2: cond.end: 632 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 633 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 634 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 635 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 636 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 637 // CHECK2: omp.inner.for.cond: 638 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 639 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 640 // CHECK2-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 641 // CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 642 // CHECK2: omp.inner.for.body: 643 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 644 // CHECK2-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 645 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 646 // CHECK2-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 647 // CHECK2-NEXT: [[TMP21:%.*]] = load double, double* [[G3]], align 8 648 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_CASTED]] to double* 649 // CHECK2-NEXT: store double [[TMP21]], double* [[CONV]], align 8 650 // CHECK2-NEXT: [[TMP22:%.*]] = load i64, i64* [[G_CASTED]], align 8 651 // CHECK2-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP5]], align 8 652 // CHECK2-NEXT: [[TMP24:%.*]] = load volatile double, double* [[TMP23]], align 8 653 // CHECK2-NEXT: [[CONV9:%.*]] = bitcast i64* [[G1_CASTED]] to double* 654 // CHECK2-NEXT: store double [[TMP24]], double* [[CONV9]], align 8 655 // CHECK2-NEXT: [[TMP25:%.*]] = load i64, i64* [[G1_CASTED]], align 8 656 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR6]], align 4 657 // CHECK2-NEXT: [[CONV10:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 658 // CHECK2-NEXT: store i32 [[TMP26]], i32* [[CONV10]], align 4 659 // CHECK2-NEXT: [[TMP27:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 660 // CHECK2-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR7]], align 4 661 // CHECK2-NEXT: [[CONV11:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float* 662 // CHECK2-NEXT: store float [[TMP28]], float* [[CONV11]], align 4 663 // CHECK2-NEXT: [[TMP29:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8 664 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP22]], i64 [[TMP25]], i64 [[TMP27]], i64 [[TMP29]]) 665 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 666 // CHECK2: omp.inner.for.inc: 667 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 668 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 669 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 670 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 671 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 672 // CHECK2: omp.inner.for.end: 673 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 674 // CHECK2: omp.loop.exit: 675 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 676 // CHECK2-NEXT: ret void 677 // 678 // 679 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 680 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2]] { 681 // CHECK2-NEXT: entry: 682 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 683 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 684 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 685 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 686 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 687 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 688 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 689 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 690 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 691 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 692 // CHECK2-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 693 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 694 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 695 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 696 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 697 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 698 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 699 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 700 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 701 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 702 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 703 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 704 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 705 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 706 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 707 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 708 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 709 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 710 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 711 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 712 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 713 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 714 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 715 // CHECK2-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP0]] to i32 716 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 717 // CHECK2-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP1]] to i32 718 // CHECK2-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4 719 // CHECK2-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4 720 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 721 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 722 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 723 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 724 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 725 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 726 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 727 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 728 // CHECK2: cond.true: 729 // CHECK2-NEXT: br label [[COND_END:%.*]] 730 // CHECK2: cond.false: 731 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 732 // CHECK2-NEXT: br label [[COND_END]] 733 // CHECK2: cond.end: 734 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 735 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 736 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 737 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 738 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 739 // CHECK2: omp.inner.for.cond: 740 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 741 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 742 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 743 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 744 // CHECK2: omp.inner.for.body: 745 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 746 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 747 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 748 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 749 // CHECK2-NEXT: store double 1.000000e+00, double* [[CONV]], align 8 750 // CHECK2-NEXT: [[TMP10:%.*]] = load double*, double** [[TMP]], align 8 751 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 8 752 // CHECK2-NEXT: store i32 3, i32* [[CONV2]], align 8 753 // CHECK2-NEXT: store float 4.000000e+00, float* [[CONV3]], align 8 754 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 755 // CHECK2-NEXT: store double* [[CONV]], double** [[TMP11]], align 8 756 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 757 // CHECK2-NEXT: [[TMP13:%.*]] = load double*, double** [[TMP]], align 8 758 // CHECK2-NEXT: store double* [[TMP13]], double** [[TMP12]], align 8 759 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 760 // CHECK2-NEXT: store i32* [[CONV2]], i32** [[TMP14]], align 8 761 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 762 // CHECK2-NEXT: store float* [[CONV3]], float** [[TMP15]], align 8 763 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull dereferenceable(32) [[REF_TMP]]) 764 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 765 // CHECK2: omp.body.continue: 766 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 767 // CHECK2: omp.inner.for.inc: 768 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 769 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1 770 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 771 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 772 // CHECK2: omp.inner.for.end: 773 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 774 // CHECK2: omp.loop.exit: 775 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 776 // CHECK2-NEXT: ret void 777 // 778 // 779 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 780 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 781 // CHECK2-NEXT: entry: 782 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 783 // CHECK2-NEXT: ret void 784 // 785 // 786 // CHECK3-LABEL: define {{[^@]+}}@main 787 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 788 // CHECK3-NEXT: entry: 789 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 790 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 791 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 792 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 793 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 794 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 795 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 796 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4 797 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 798 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 799 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 800 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(8) [[REF_TMP]]) 801 // CHECK3-NEXT: ret i32 0 802 // 803 // 804 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 805 // CHECK3-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 806 // CHECK3-NEXT: entry: 807 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 808 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 809 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 810 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 811 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 812 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 813 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 814 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 815 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 816 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 817 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 818 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 819 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 820 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 821 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 822 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 823 // CHECK3-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8 824 // CHECK3-NEXT: store double [[TMP2]], double* [[G2]], align 8 825 // CHECK3-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4 826 // CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4 827 // CHECK3-NEXT: store double [[TMP4]], double* [[G13]], align 8 828 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 829 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4 830 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]]) 831 // CHECK3-NEXT: ret void 832 // 833 // 834 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 835 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 836 // CHECK3-NEXT: entry: 837 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 838 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 839 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 840 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 841 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 842 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 843 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 844 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 845 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 846 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 847 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 848 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 849 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 850 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 851 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8 852 // CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8 853 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca double*, align 4 854 // CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 855 // CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 856 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 857 // CHECK3-NEXT: [[G1_CASTED:%.*]] = alloca i32, align 4 858 // CHECK3-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 859 // CHECK3-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4 860 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 861 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 862 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 863 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 864 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 865 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 866 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 867 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 868 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 869 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 870 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 871 // CHECK3-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4 872 // CHECK3-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4 873 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 874 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 875 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 876 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 877 // CHECK3-NEXT: [[TMP5:%.*]] = load double, double* [[TMP0]], align 8 878 // CHECK3-NEXT: store double [[TMP5]], double* [[G3]], align 8 879 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 4 880 // CHECK3-NEXT: [[TMP7:%.*]] = load double, double* [[TMP6]], align 4 881 // CHECK3-NEXT: store double [[TMP7]], double* [[G14]], align 8 882 // CHECK3-NEXT: store double* [[G14]], double** [[_TMP5]], align 4 883 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 884 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 885 // CHECK3-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 886 // CHECK3-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 887 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 888 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 889 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 890 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 891 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 892 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 893 // CHECK3: cond.true: 894 // CHECK3-NEXT: br label [[COND_END:%.*]] 895 // CHECK3: cond.false: 896 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 897 // CHECK3-NEXT: br label [[COND_END]] 898 // CHECK3: cond.end: 899 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 900 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 901 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 902 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 903 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 904 // CHECK3: omp.inner.for.cond: 905 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 906 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 907 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 908 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 909 // CHECK3: omp.inner.for.body: 910 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 911 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 912 // CHECK3-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 4 913 // CHECK3-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 4 914 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[G1_CASTED]] to double* 915 // CHECK3-NEXT: store double [[TMP20]], double* [[CONV]], align 4 916 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[G1_CASTED]], align 4 917 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[SVAR6]], align 4 918 // CHECK3-NEXT: store i32 [[TMP22]], i32* [[SVAR_CASTED]], align 4 919 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 920 // CHECK3-NEXT: [[TMP24:%.*]] = load float, float* [[SFVAR7]], align 4 921 // CHECK3-NEXT: [[CONV9:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float* 922 // CHECK3-NEXT: store float [[TMP24]], float* [[CONV9]], align 4 923 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4 924 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, double*, i32, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], double* [[G3]], i32 [[TMP21]], i32 [[TMP23]], i32 [[TMP25]]) 925 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 926 // CHECK3: omp.inner.for.inc: 927 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 928 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 929 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 930 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 931 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 932 // CHECK3: omp.inner.for.end: 933 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 934 // CHECK3: omp.loop.exit: 935 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 936 // CHECK3-NEXT: ret void 937 // 938 // 939 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 940 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], i32 [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2]] { 941 // CHECK3-NEXT: entry: 942 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 943 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 944 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 945 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 946 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 947 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca i32, align 4 948 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 949 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 950 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 951 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 952 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 953 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 954 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 955 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 956 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 957 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8 958 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 959 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 960 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 961 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 962 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 963 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 964 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 965 // CHECK3-NEXT: store i32 [[G1]], i32* [[G1_ADDR]], align 4 966 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 967 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 968 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 969 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[G1_ADDR]] to double* 970 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 971 // CHECK3-NEXT: store double* [[CONV]], double** [[TMP]], align 4 972 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 973 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 974 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 975 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 976 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 977 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 978 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 979 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 980 // CHECK3-NEXT: [[TMP3:%.*]] = load double, double* [[TMP0]], align 8 981 // CHECK3-NEXT: store double [[TMP3]], double* [[G3]], align 8 982 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 983 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 984 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 985 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 986 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 987 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 988 // CHECK3: cond.true: 989 // CHECK3-NEXT: br label [[COND_END:%.*]] 990 // CHECK3: cond.false: 991 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 992 // CHECK3-NEXT: br label [[COND_END]] 993 // CHECK3: cond.end: 994 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 995 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 996 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 997 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 998 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 999 // CHECK3: omp.inner.for.cond: 1000 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1001 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1002 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1003 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1004 // CHECK3: omp.inner.for.body: 1005 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1006 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1007 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1008 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1009 // CHECK3-NEXT: store double 1.000000e+00, double* [[G3]], align 8 1010 // CHECK3-NEXT: [[TMP12:%.*]] = load double*, double** [[TMP]], align 4 1011 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP12]], align 4 1012 // CHECK3-NEXT: store i32 3, i32* [[SVAR_ADDR]], align 4 1013 // CHECK3-NEXT: store float 4.000000e+00, float* [[CONV1]], align 4 1014 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1015 // CHECK3-NEXT: store double* [[G3]], double** [[TMP13]], align 4 1016 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1017 // CHECK3-NEXT: [[TMP15:%.*]] = load double*, double** [[TMP]], align 4 1018 // CHECK3-NEXT: store double* [[TMP15]], double** [[TMP14]], align 4 1019 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1020 // CHECK3-NEXT: store i32* [[SVAR_ADDR]], i32** [[TMP16]], align 4 1021 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1022 // CHECK3-NEXT: store float* [[CONV1]], float** [[TMP17]], align 4 1023 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull dereferenceable(16) [[REF_TMP]]) 1024 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1025 // CHECK3: omp.body.continue: 1026 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1027 // CHECK3: omp.inner.for.inc: 1028 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1029 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP18]], 1 1030 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 1031 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1032 // CHECK3: omp.inner.for.end: 1033 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1034 // CHECK3: omp.loop.exit: 1035 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 1036 // CHECK3-NEXT: ret void 1037 // 1038 // 1039 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1040 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 1041 // CHECK3-NEXT: entry: 1042 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1043 // CHECK3-NEXT: ret void 1044 // 1045 // 1046 // CHECK4-LABEL: define {{[^@]+}}@main 1047 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 1048 // CHECK4-NEXT: entry: 1049 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1050 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 1051 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4 1052 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 1053 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 1054 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4 1055 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1056 // CHECK4-NEXT: store double* [[G]], double** [[TMP0]], align 4 1057 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 1058 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 1059 // CHECK4-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 1060 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(8) [[REF_TMP]]) 1061 // CHECK4-NEXT: ret i32 0 1062 // 1063 // 1064 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 1065 // CHECK4-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 1066 // CHECK4-NEXT: entry: 1067 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 1068 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 1069 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 1070 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 1071 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 1072 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8 1073 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8 1074 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 1075 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 1076 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 1077 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 1078 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 1079 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 1080 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 1081 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 1082 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 1083 // CHECK4-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8 1084 // CHECK4-NEXT: store double [[TMP2]], double* [[G2]], align 8 1085 // CHECK4-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4 1086 // CHECK4-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4 1087 // CHECK4-NEXT: store double [[TMP4]], double* [[G13]], align 8 1088 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 1089 // CHECK4-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4 1090 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]]) 1091 // CHECK4-NEXT: ret void 1092 // 1093 // 1094 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1095 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 1096 // CHECK4-NEXT: entry: 1097 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1098 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1099 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 1100 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 1101 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 1102 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 1103 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 1104 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 1105 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1106 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1107 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1108 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1109 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1110 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1111 // CHECK4-NEXT: [[G3:%.*]] = alloca double, align 8 1112 // CHECK4-NEXT: [[G14:%.*]] = alloca double, align 8 1113 // CHECK4-NEXT: [[_TMP5:%.*]] = alloca double*, align 4 1114 // CHECK4-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 1115 // CHECK4-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 1116 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1117 // CHECK4-NEXT: [[G1_CASTED:%.*]] = alloca i32, align 4 1118 // CHECK4-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 1119 // CHECK4-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4 1120 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1121 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1122 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 1123 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 1124 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 1125 // CHECK4-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 1126 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 1127 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 1128 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 1129 // CHECK4-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 1130 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 1131 // CHECK4-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4 1132 // CHECK4-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4 1133 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1134 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1135 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1136 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1137 // CHECK4-NEXT: [[TMP5:%.*]] = load double, double* [[TMP0]], align 8 1138 // CHECK4-NEXT: store double [[TMP5]], double* [[G3]], align 8 1139 // CHECK4-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 4 1140 // CHECK4-NEXT: [[TMP7:%.*]] = load double, double* [[TMP6]], align 4 1141 // CHECK4-NEXT: store double [[TMP7]], double* [[G14]], align 8 1142 // CHECK4-NEXT: store double* [[G14]], double** [[_TMP5]], align 4 1143 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 1144 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 1145 // CHECK4-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 1146 // CHECK4-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 1147 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1148 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1149 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1150 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1151 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 1152 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1153 // CHECK4: cond.true: 1154 // CHECK4-NEXT: br label [[COND_END:%.*]] 1155 // CHECK4: cond.false: 1156 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1157 // CHECK4-NEXT: br label [[COND_END]] 1158 // CHECK4: cond.end: 1159 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1160 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1161 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1162 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1163 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1164 // CHECK4: omp.inner.for.cond: 1165 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1166 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1167 // CHECK4-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1168 // CHECK4-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1169 // CHECK4: omp.inner.for.body: 1170 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1171 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1172 // CHECK4-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 4 1173 // CHECK4-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 4 1174 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[G1_CASTED]] to double* 1175 // CHECK4-NEXT: store double [[TMP20]], double* [[CONV]], align 4 1176 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[G1_CASTED]], align 4 1177 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[SVAR6]], align 4 1178 // CHECK4-NEXT: store i32 [[TMP22]], i32* [[SVAR_CASTED]], align 4 1179 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 1180 // CHECK4-NEXT: [[TMP24:%.*]] = load float, float* [[SFVAR7]], align 4 1181 // CHECK4-NEXT: [[CONV9:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float* 1182 // CHECK4-NEXT: store float [[TMP24]], float* [[CONV9]], align 4 1183 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4 1184 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, double*, i32, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], double* [[G3]], i32 [[TMP21]], i32 [[TMP23]], i32 [[TMP25]]) 1185 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1186 // CHECK4: omp.inner.for.inc: 1187 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1188 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1189 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 1190 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1191 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1192 // CHECK4: omp.inner.for.end: 1193 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1194 // CHECK4: omp.loop.exit: 1195 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 1196 // CHECK4-NEXT: ret void 1197 // 1198 // 1199 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 1200 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], i32 [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2]] { 1201 // CHECK4-NEXT: entry: 1202 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1203 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1204 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1205 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1206 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 1207 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca i32, align 4 1208 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 1209 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 1210 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 1211 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1212 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1213 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1214 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1215 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1216 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1217 // CHECK4-NEXT: [[G3:%.*]] = alloca double, align 8 1218 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1219 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 1220 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1221 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1222 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1223 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1224 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 1225 // CHECK4-NEXT: store i32 [[G1]], i32* [[G1_ADDR]], align 4 1226 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 1227 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 1228 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 1229 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[G1_ADDR]] to double* 1230 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 1231 // CHECK4-NEXT: store double* [[CONV]], double** [[TMP]], align 4 1232 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1233 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1234 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1235 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1236 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 1237 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 1238 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1239 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1240 // CHECK4-NEXT: [[TMP3:%.*]] = load double, double* [[TMP0]], align 8 1241 // CHECK4-NEXT: store double [[TMP3]], double* [[G3]], align 8 1242 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1243 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1244 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1245 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1246 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1247 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1248 // CHECK4: cond.true: 1249 // CHECK4-NEXT: br label [[COND_END:%.*]] 1250 // CHECK4: cond.false: 1251 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1252 // CHECK4-NEXT: br label [[COND_END]] 1253 // CHECK4: cond.end: 1254 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1255 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1256 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1257 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1258 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1259 // CHECK4: omp.inner.for.cond: 1260 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1261 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1262 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1263 // CHECK4-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1264 // CHECK4: omp.inner.for.body: 1265 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1266 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1267 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1268 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1269 // CHECK4-NEXT: store double 1.000000e+00, double* [[G3]], align 8 1270 // CHECK4-NEXT: [[TMP12:%.*]] = load double*, double** [[TMP]], align 4 1271 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP12]], align 4 1272 // CHECK4-NEXT: store i32 3, i32* [[SVAR_ADDR]], align 4 1273 // CHECK4-NEXT: store float 4.000000e+00, float* [[CONV1]], align 4 1274 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1275 // CHECK4-NEXT: store double* [[G3]], double** [[TMP13]], align 4 1276 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1277 // CHECK4-NEXT: [[TMP15:%.*]] = load double*, double** [[TMP]], align 4 1278 // CHECK4-NEXT: store double* [[TMP15]], double** [[TMP14]], align 4 1279 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1280 // CHECK4-NEXT: store i32* [[SVAR_ADDR]], i32** [[TMP16]], align 4 1281 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1282 // CHECK4-NEXT: store float* [[CONV1]], float** [[TMP17]], align 4 1283 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull dereferenceable(16) [[REF_TMP]]) 1284 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1285 // CHECK4: omp.body.continue: 1286 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1287 // CHECK4: omp.inner.for.inc: 1288 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1289 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP18]], 1 1290 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 1291 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1292 // CHECK4: omp.inner.for.end: 1293 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1294 // CHECK4: omp.loop.exit: 1295 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 1296 // CHECK4-NEXT: ret void 1297 // 1298 // 1299 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1300 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 1301 // CHECK4-NEXT: entry: 1302 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 1303 // CHECK4-NEXT: ret void 1304 // 1305 // 1306 // CHECK5-LABEL: define {{[^@]+}}@main 1307 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 1308 // CHECK5-NEXT: entry: 1309 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1310 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 1311 // CHECK5-NEXT: [[G1:%.*]] = alloca double*, align 8 1312 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 1313 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 1314 // CHECK5-NEXT: store double* [[G]], double** [[G1]], align 8 1315 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1316 // CHECK5-NEXT: store double* [[G]], double** [[TMP0]], align 8 1317 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 1318 // CHECK5-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 1319 // CHECK5-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 1320 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(16) [[REF_TMP]]) 1321 // CHECK5-NEXT: ret i32 0 1322 // 1323 // 1324 // CHECK6-LABEL: define {{[^@]+}}@main 1325 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 1326 // CHECK6-NEXT: entry: 1327 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1328 // CHECK6-NEXT: [[G:%.*]] = alloca double, align 8 1329 // CHECK6-NEXT: [[G1:%.*]] = alloca double*, align 4 1330 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 1331 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 1332 // CHECK6-NEXT: store double* [[G]], double** [[G1]], align 4 1333 // CHECK6-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1334 // CHECK6-NEXT: store double* [[G]], double** [[TMP0]], align 4 1335 // CHECK6-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 1336 // CHECK6-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 1337 // CHECK6-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 1338 // CHECK6-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(8) [[REF_TMP]]) 1339 // CHECK6-NEXT: ret i32 0 1340 // 1341 // 1342 // CHECK7-LABEL: define {{[^@]+}}@main 1343 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 1344 // CHECK7-NEXT: entry: 1345 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1346 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 1347 // CHECK7-NEXT: [[G1:%.*]] = alloca double*, align 4 1348 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 1349 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 1350 // CHECK7-NEXT: store double* [[G]], double** [[G1]], align 4 1351 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1352 // CHECK7-NEXT: store double* [[G]], double** [[TMP0]], align 4 1353 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 1354 // CHECK7-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 1355 // CHECK7-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 1356 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(8) [[REF_TMP]]) 1357 // CHECK7-NEXT: ret i32 0 1358 // 1359 // 1360 // CHECK8-LABEL: define {{[^@]+}}@main 1361 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 1362 // CHECK8-NEXT: entry: 1363 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1364 // CHECK8-NEXT: [[G:%.*]] = alloca double, align 8 1365 // CHECK8-NEXT: [[G1:%.*]] = alloca double*, align 8 1366 // CHECK8-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1367 // CHECK8-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1368 // CHECK8-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1369 // CHECK8-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1370 // CHECK8-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1371 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1372 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1373 // CHECK8-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 1374 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1375 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1376 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1377 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1378 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 1379 // CHECK8-NEXT: store double* [[G]], double** [[G1]], align 8 1380 // CHECK8-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) 1381 // CHECK8-NEXT: store i32 0, i32* [[T_VAR]], align 4 1382 // CHECK8-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1383 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1384 // CHECK8-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1385 // CHECK8-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1386 // CHECK8-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1387 // CHECK8-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1388 // CHECK8-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1389 // CHECK8-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 1390 // CHECK8-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 1391 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1392 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1393 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1394 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1395 // CHECK8-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1396 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 1397 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 1398 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 1399 // CHECK8-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 1400 // CHECK8-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1401 // CHECK8-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1402 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1403 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1404 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1405 // CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1406 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 1407 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 1408 // CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1409 // CHECK8-NEXT: store i8* null, i8** [[TMP13]], align 8 1410 // CHECK8-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1411 // CHECK8-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1412 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1413 // CHECK8-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1414 // CHECK8-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 1415 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8 1416 // CHECK8-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1417 // CHECK8-NEXT: store i8* null, i8** [[TMP18]], align 8 1418 // CHECK8-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1419 // CHECK8-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 1420 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 1421 // CHECK8-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1422 // CHECK8-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 1423 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8 1424 // CHECK8-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1425 // CHECK8-NEXT: store i8* null, i8** [[TMP23]], align 8 1426 // CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1427 // CHECK8-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 1428 // CHECK8-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8 1429 // CHECK8-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1430 // CHECK8-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 1431 // CHECK8-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8 1432 // CHECK8-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1433 // CHECK8-NEXT: store i8* null, i8** [[TMP28]], align 8 1434 // CHECK8-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1435 // CHECK8-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 1436 // CHECK8-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 1437 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1438 // CHECK8-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 1439 // CHECK8-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8 1440 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1441 // CHECK8-NEXT: store i8* null, i8** [[TMP33]], align 8 1442 // CHECK8-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1443 // CHECK8-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1444 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 1445 // CHECK8-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1446 // CHECK8-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 1447 // CHECK8-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1448 // CHECK8: omp_offload.failed: 1449 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 1450 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]] 1451 // CHECK8: omp_offload.cont: 1452 // CHECK8-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 1453 // CHECK8-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1454 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1455 // CHECK8-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1456 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1457 // CHECK8: arraydestroy.body: 1458 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1459 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1460 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1461 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1462 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1463 // CHECK8: arraydestroy.done3: 1464 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 1465 // CHECK8-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 1466 // CHECK8-NEXT: ret i32 [[TMP39]] 1467 // 1468 // 1469 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1470 // CHECK8-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1471 // CHECK8-NEXT: entry: 1472 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1473 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1474 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1475 // CHECK8-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) 1476 // CHECK8-NEXT: ret void 1477 // 1478 // 1479 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1480 // CHECK8-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1481 // CHECK8-NEXT: entry: 1482 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1483 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1484 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1485 // CHECK8-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1486 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1487 // CHECK8-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1488 // CHECK8-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull dereferenceable(4) [[THIS1]], float [[TMP0]]) 1489 // CHECK8-NEXT: ret void 1490 // 1491 // 1492 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 1493 // CHECK8-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1494 // CHECK8-NEXT: entry: 1495 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1496 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1497 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1498 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1499 // CHECK8-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1500 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1501 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1502 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1503 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1504 // CHECK8-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1505 // CHECK8-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1506 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1507 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1508 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1509 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1510 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1511 // CHECK8-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1512 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1513 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]]) 1514 // CHECK8-NEXT: ret void 1515 // 1516 // 1517 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined. 1518 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 1519 // CHECK8-NEXT: entry: 1520 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1521 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1522 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1523 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1524 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1525 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1526 // CHECK8-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 1527 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1528 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1529 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1530 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1531 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1532 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1533 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1534 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1535 // CHECK8-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1536 // CHECK8-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1537 // CHECK8-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 1538 // CHECK8-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1539 // CHECK8-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 8 1540 // CHECK8-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 1541 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 1542 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1543 // CHECK8-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 1544 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1545 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1546 // CHECK8-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1547 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1548 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1549 // CHECK8-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1550 // CHECK8-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 1551 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1552 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1553 // CHECK8-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1554 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1555 // CHECK8-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 1556 // CHECK8-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 1557 // CHECK8-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1558 // CHECK8-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8 1559 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1560 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1561 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1562 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1563 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 1564 // CHECK8-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 1565 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 1566 // CHECK8-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 1567 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 8, i1 false) 1568 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1569 // CHECK8-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 1570 // CHECK8-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1571 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 1572 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1573 // CHECK8: omp.arraycpy.body: 1574 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1575 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1576 // CHECK8-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1577 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1578 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 4, i1 false) 1579 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1580 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1581 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 1582 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 1583 // CHECK8: omp.arraycpy.done6: 1584 // CHECK8-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 1585 // CHECK8-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 1586 // CHECK8-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 1587 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 1588 // CHECK8-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8 1589 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 1590 // CHECK8-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 1591 // CHECK8-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1592 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1593 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1594 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1595 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 1596 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1597 // CHECK8: cond.true: 1598 // CHECK8-NEXT: br label [[COND_END:%.*]] 1599 // CHECK8: cond.false: 1600 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1601 // CHECK8-NEXT: br label [[COND_END]] 1602 // CHECK8: cond.end: 1603 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 1604 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1605 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1606 // CHECK8-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 1607 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1608 // CHECK8: omp.inner.for.cond: 1609 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1610 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1611 // CHECK8-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 1612 // CHECK8-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1613 // CHECK8: omp.inner.for.cond.cleanup: 1614 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1615 // CHECK8: omp.inner.for.body: 1616 // CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1617 // CHECK8-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64 1618 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1619 // CHECK8-NEXT: [[TMP27:%.*]] = zext i32 [[TMP26]] to i64 1620 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[T_VAR3]], align 4 1621 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1622 // CHECK8-NEXT: store i32 [[TMP28]], i32* [[CONV]], align 4 1623 // CHECK8-NEXT: [[TMP29:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1624 // CHECK8-NEXT: [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8 1625 // CHECK8-NEXT: [[TMP31:%.*]] = load i32, i32* [[SVAR9]], align 4 1626 // CHECK8-NEXT: [[CONV11:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 1627 // CHECK8-NEXT: store i32 [[TMP31]], i32* [[CONV11]], align 4 1628 // CHECK8-NEXT: [[TMP32:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 1629 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP25]], i64 [[TMP27]], [2 x i32]* [[VEC4]], i64 [[TMP29]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP30]], i64 [[TMP32]]) 1630 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1631 // CHECK8: omp.inner.for.inc: 1632 // CHECK8-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1633 // CHECK8-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1634 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], [[TMP34]] 1635 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1636 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 1637 // CHECK8: omp.inner.for.end: 1638 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1639 // CHECK8: omp.loop.exit: 1640 // CHECK8-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1641 // CHECK8-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 1642 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]]) 1643 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[VAR7]]) #[[ATTR4]] 1644 // CHECK8-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1645 // CHECK8-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2 1646 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1647 // CHECK8: arraydestroy.body: 1648 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP37]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1649 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1650 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1651 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 1652 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 1653 // CHECK8: arraydestroy.done13: 1654 // CHECK8-NEXT: ret void 1655 // 1656 // 1657 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..1 1658 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3]] { 1659 // CHECK8-NEXT: entry: 1660 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1661 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1662 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1663 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1664 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1665 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1666 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1667 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1668 // CHECK8-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1669 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1670 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1671 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1672 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1673 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1674 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1675 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1676 // CHECK8-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 4 1677 // CHECK8-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4 1678 // CHECK8-NEXT: [[VAR8:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1679 // CHECK8-NEXT: [[_TMP9:%.*]] = alloca %struct.S*, align 8 1680 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 1681 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1682 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1683 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1684 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1685 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1686 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1687 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1688 // CHECK8-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1689 // CHECK8-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1690 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1691 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1692 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1693 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1694 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1695 // CHECK8-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1696 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1697 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1698 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1699 // CHECK8-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP3]] to i32 1700 // CHECK8-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1701 // CHECK8-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP4]] to i32 1702 // CHECK8-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 1703 // CHECK8-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 1704 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1705 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1706 // CHECK8-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8* 1707 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1708 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i64 8, i1 false) 1709 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0 1710 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S* 1711 // CHECK8-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1712 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP8]] 1713 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1714 // CHECK8: omp.arraycpy.body: 1715 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1716 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1717 // CHECK8-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1718 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1719 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false) 1720 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1721 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1722 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 1723 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]] 1724 // CHECK8: omp.arraycpy.done7: 1725 // CHECK8-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1726 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR8]] to i8* 1727 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 1728 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 1729 // CHECK8-NEXT: store %struct.S* [[VAR8]], %struct.S** [[_TMP9]], align 8 1730 // CHECK8-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1731 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 1732 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1733 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1734 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 1735 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1736 // CHECK8: cond.true: 1737 // CHECK8-NEXT: br label [[COND_END:%.*]] 1738 // CHECK8: cond.false: 1739 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1740 // CHECK8-NEXT: br label [[COND_END]] 1741 // CHECK8: cond.end: 1742 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1743 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1744 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1745 // CHECK8-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 1746 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1747 // CHECK8: omp.inner.for.cond: 1748 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1749 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1750 // CHECK8-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 1751 // CHECK8-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1752 // CHECK8: omp.inner.for.cond.cleanup: 1753 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1754 // CHECK8: omp.inner.for.body: 1755 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1756 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 1757 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1758 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1759 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV]], align 8 1760 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4 1761 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 1762 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i64 0, i64 [[IDXPROM]] 1763 // CHECK8-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4 1764 // CHECK8-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP9]], align 8 1765 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4 1766 // CHECK8-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP25]] to i64 1767 // CHECK8-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i64 0, i64 [[IDXPROM11]] 1768 // CHECK8-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[ARRAYIDX12]] to i8* 1769 // CHECK8-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[TMP24]] to i8* 1770 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false) 1771 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1772 // CHECK8: omp.body.continue: 1773 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1774 // CHECK8: omp.inner.for.inc: 1775 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1776 // CHECK8-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP28]], 1 1777 // CHECK8-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4 1778 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 1779 // CHECK8: omp.inner.for.end: 1780 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1781 // CHECK8: omp.loop.exit: 1782 // CHECK8-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1783 // CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 1784 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 1785 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[VAR8]]) #[[ATTR4]] 1786 // CHECK8-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0 1787 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2 1788 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1789 // CHECK8: arraydestroy.body: 1790 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1791 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1792 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1793 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 1794 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 1795 // CHECK8: arraydestroy.done15: 1796 // CHECK8-NEXT: ret void 1797 // 1798 // 1799 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1800 // CHECK8-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1801 // CHECK8-NEXT: entry: 1802 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1803 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1804 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1805 // CHECK8-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1806 // CHECK8-NEXT: ret void 1807 // 1808 // 1809 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1810 // CHECK8-SAME: () #[[ATTR5:[0-9]+]] comdat { 1811 // CHECK8-NEXT: entry: 1812 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1813 // CHECK8-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1814 // CHECK8-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1815 // CHECK8-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1816 // CHECK8-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1817 // CHECK8-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1818 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1819 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1820 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1821 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1822 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1823 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1824 // CHECK8-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) 1825 // CHECK8-NEXT: store i32 0, i32* [[T_VAR]], align 4 1826 // CHECK8-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1827 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1828 // CHECK8-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1829 // CHECK8-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 1830 // CHECK8-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1831 // CHECK8-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 1832 // CHECK8-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1833 // CHECK8-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 1834 // CHECK8-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 1835 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1836 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1837 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1838 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1839 // CHECK8-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1840 // CHECK8-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1841 // CHECK8-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1842 // CHECK8-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1843 // CHECK8-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1844 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8 1845 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1846 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1847 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1848 // CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1849 // CHECK8-NEXT: store i8* null, i8** [[TMP11]], align 8 1850 // CHECK8-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1851 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 1852 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 1853 // CHECK8-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1854 // CHECK8-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1855 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1856 // CHECK8-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1857 // CHECK8-NEXT: store i8* null, i8** [[TMP16]], align 8 1858 // CHECK8-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1859 // CHECK8-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 1860 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 1861 // CHECK8-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1862 // CHECK8-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 1863 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8 1864 // CHECK8-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1865 // CHECK8-NEXT: store i8* null, i8** [[TMP21]], align 8 1866 // CHECK8-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1867 // CHECK8-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 1868 // CHECK8-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8 1869 // CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1870 // CHECK8-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 1871 // CHECK8-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8 1872 // CHECK8-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1873 // CHECK8-NEXT: store i8* null, i8** [[TMP26]], align 8 1874 // CHECK8-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1875 // CHECK8-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1876 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 1877 // CHECK8-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1878 // CHECK8-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1879 // CHECK8-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1880 // CHECK8: omp_offload.failed: 1881 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 1882 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]] 1883 // CHECK8: omp_offload.cont: 1884 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 1885 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1886 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1887 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1888 // CHECK8: arraydestroy.body: 1889 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1890 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1891 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1892 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1893 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1894 // CHECK8: arraydestroy.done2: 1895 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 1896 // CHECK8-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 1897 // CHECK8-NEXT: ret i32 [[TMP32]] 1898 // 1899 // 1900 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1901 // CHECK8-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1902 // CHECK8-NEXT: entry: 1903 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1904 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1905 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1906 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1907 // CHECK8-NEXT: store float 0.000000e+00, float* [[F]], align 4 1908 // CHECK8-NEXT: ret void 1909 // 1910 // 1911 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1912 // CHECK8-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1913 // CHECK8-NEXT: entry: 1914 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1915 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1916 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1917 // CHECK8-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1918 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1919 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1920 // CHECK8-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1921 // CHECK8-NEXT: store float [[TMP0]], float* [[F]], align 4 1922 // CHECK8-NEXT: ret void 1923 // 1924 // 1925 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1926 // CHECK8-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1927 // CHECK8-NEXT: entry: 1928 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1929 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1930 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1931 // CHECK8-NEXT: ret void 1932 // 1933 // 1934 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1935 // CHECK8-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1936 // CHECK8-NEXT: entry: 1937 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1938 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1939 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1940 // CHECK8-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) 1941 // CHECK8-NEXT: ret void 1942 // 1943 // 1944 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1945 // CHECK8-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1946 // CHECK8-NEXT: entry: 1947 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1948 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1949 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1950 // CHECK8-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1951 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1952 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1953 // CHECK8-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 1954 // CHECK8-NEXT: ret void 1955 // 1956 // 1957 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 1958 // CHECK8-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1959 // CHECK8-NEXT: entry: 1960 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1961 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1962 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1963 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1964 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1965 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1966 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1967 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1968 // CHECK8-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1969 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1970 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1971 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1972 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1973 // CHECK8-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 1974 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1975 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 1976 // CHECK8-NEXT: ret void 1977 // 1978 // 1979 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..2 1980 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1981 // CHECK8-NEXT: entry: 1982 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1983 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1984 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1985 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1986 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1987 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1988 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1989 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1990 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1991 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1992 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1993 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1994 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1995 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1996 // CHECK8-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1997 // CHECK8-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1998 // CHECK8-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 1999 // CHECK8-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2000 // CHECK8-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8 2001 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 2002 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 2003 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2004 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2005 // CHECK8-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 2006 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2007 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2008 // CHECK8-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2009 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 2010 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2011 // CHECK8-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2012 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2013 // CHECK8-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 2014 // CHECK8-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2015 // CHECK8-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8 2016 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2017 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2018 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2019 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2020 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2021 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 2022 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2023 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 2024 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 8, i1 false) 2025 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2026 // CHECK8-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 2027 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2028 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 2029 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2030 // CHECK8: omp.arraycpy.body: 2031 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2032 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2033 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2034 // CHECK8-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2035 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 2036 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2037 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2038 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 2039 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2040 // CHECK8: omp.arraycpy.done6: 2041 // CHECK8-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 2042 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 2043 // CHECK8-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 2044 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false) 2045 // CHECK8-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8 2046 // CHECK8-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2047 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2048 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2049 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2050 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 2051 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2052 // CHECK8: cond.true: 2053 // CHECK8-NEXT: br label [[COND_END:%.*]] 2054 // CHECK8: cond.false: 2055 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2056 // CHECK8-NEXT: br label [[COND_END]] 2057 // CHECK8: cond.end: 2058 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 2059 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2060 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2061 // CHECK8-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 2062 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2063 // CHECK8: omp.inner.for.cond: 2064 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2065 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2066 // CHECK8-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2067 // CHECK8-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2068 // CHECK8: omp.inner.for.cond.cleanup: 2069 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2070 // CHECK8: omp.inner.for.body: 2071 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2072 // CHECK8-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64 2073 // CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2074 // CHECK8-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64 2075 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4 2076 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 2077 // CHECK8-NEXT: store i32 [[TMP26]], i32* [[CONV]], align 4 2078 // CHECK8-NEXT: [[TMP27:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 2079 // CHECK8-NEXT: [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8 2080 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP23]], i64 [[TMP25]], [2 x i32]* [[VEC4]], i64 [[TMP27]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP28]]) 2081 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2082 // CHECK8: omp.inner.for.inc: 2083 // CHECK8-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2084 // CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2085 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], [[TMP30]] 2086 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2087 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 2088 // CHECK8: omp.inner.for.end: 2089 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2090 // CHECK8: omp.loop.exit: 2091 // CHECK8-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2092 // CHECK8-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4 2093 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]]) 2094 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR7]]) #[[ATTR4]] 2095 // CHECK8-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2096 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2 2097 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2098 // CHECK8: arraydestroy.body: 2099 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2100 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2101 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2102 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 2103 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 2104 // CHECK8: arraydestroy.done11: 2105 // CHECK8-NEXT: ret void 2106 // 2107 // 2108 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..3 2109 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2110 // CHECK8-NEXT: entry: 2111 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2112 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2113 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2114 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2115 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2116 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2117 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2118 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2119 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2120 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2121 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2122 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2123 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2124 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2125 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2126 // CHECK8-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2127 // CHECK8-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 2128 // CHECK8-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2129 // CHECK8-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8 2130 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 2131 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2132 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2133 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2134 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2135 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2136 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2137 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2138 // CHECK8-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2139 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2140 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2141 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2142 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2143 // CHECK8-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 2144 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2145 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2146 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2147 // CHECK8-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP3]] to i32 2148 // CHECK8-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2149 // CHECK8-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP4]] to i32 2150 // CHECK8-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4 2151 // CHECK8-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 2152 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2153 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2154 // CHECK8-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2155 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2156 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i64 8, i1 false) 2157 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2158 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP1]] to %struct.S.0* 2159 // CHECK8-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2160 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]] 2161 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2162 // CHECK8: omp.arraycpy.body: 2163 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2164 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2165 // CHECK8-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2166 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2167 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false) 2168 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2169 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2170 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 2171 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2172 // CHECK8: omp.arraycpy.done6: 2173 // CHECK8-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2174 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 2175 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 2176 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 2177 // CHECK8-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8 2178 // CHECK8-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2179 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 2180 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2181 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2182 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 2183 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2184 // CHECK8: cond.true: 2185 // CHECK8-NEXT: br label [[COND_END:%.*]] 2186 // CHECK8: cond.false: 2187 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2188 // CHECK8-NEXT: br label [[COND_END]] 2189 // CHECK8: cond.end: 2190 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 2191 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2192 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2193 // CHECK8-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 2194 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2195 // CHECK8: omp.inner.for.cond: 2196 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2197 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2198 // CHECK8-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 2199 // CHECK8-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2200 // CHECK8: omp.inner.for.cond.cleanup: 2201 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2202 // CHECK8: omp.inner.for.body: 2203 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2204 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 2205 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2206 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2207 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV]], align 8 2208 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4 2209 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 2210 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 2211 // CHECK8-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4 2212 // CHECK8-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8 2213 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4 2214 // CHECK8-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP25]] to i64 2215 // CHECK8-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 2216 // CHECK8-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8* 2217 // CHECK8-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8* 2218 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false) 2219 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2220 // CHECK8: omp.body.continue: 2221 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2222 // CHECK8: omp.inner.for.inc: 2223 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2224 // CHECK8-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 2225 // CHECK8-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 2226 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 2227 // CHECK8: omp.inner.for.end: 2228 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2229 // CHECK8: omp.loop.exit: 2230 // CHECK8-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2231 // CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 2232 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 2233 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR7]]) #[[ATTR4]] 2234 // CHECK8-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2235 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 2236 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2237 // CHECK8: arraydestroy.body: 2238 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2239 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2240 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2241 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2242 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2243 // CHECK8: arraydestroy.done14: 2244 // CHECK8-NEXT: ret void 2245 // 2246 // 2247 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2248 // CHECK8-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2249 // CHECK8-NEXT: entry: 2250 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2251 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2252 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2253 // CHECK8-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2254 // CHECK8-NEXT: ret void 2255 // 2256 // 2257 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2258 // CHECK8-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2259 // CHECK8-NEXT: entry: 2260 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2261 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2262 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2263 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2264 // CHECK8-NEXT: store i32 0, i32* [[F]], align 4 2265 // CHECK8-NEXT: ret void 2266 // 2267 // 2268 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2269 // CHECK8-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2270 // CHECK8-NEXT: entry: 2271 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2272 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2273 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2274 // CHECK8-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2275 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2276 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2277 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2278 // CHECK8-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2279 // CHECK8-NEXT: ret void 2280 // 2281 // 2282 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2283 // CHECK8-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2284 // CHECK8-NEXT: entry: 2285 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2286 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2287 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2288 // CHECK8-NEXT: ret void 2289 // 2290 // 2291 // CHECK8-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2292 // CHECK8-SAME: () #[[ATTR6:[0-9]+]] { 2293 // CHECK8-NEXT: entry: 2294 // CHECK8-NEXT: call void @__tgt_register_requires(i64 1) 2295 // CHECK8-NEXT: ret void 2296 // 2297 // 2298 // CHECK9-LABEL: define {{[^@]+}}@main 2299 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 2300 // CHECK9-NEXT: entry: 2301 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2302 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 2303 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 2304 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2305 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2306 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2307 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2308 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 2309 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 2310 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 2311 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 2312 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 2313 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 2314 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 2315 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2316 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 2317 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 2318 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) 2319 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 2320 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2321 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 2322 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 2323 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 2324 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 2325 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 2326 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 2327 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 2328 // CHECK9-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 2329 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2330 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 2331 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 2332 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 2333 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2334 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 2335 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 2336 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 2337 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 2338 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2339 // CHECK9-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2340 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2341 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2342 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 2343 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2344 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 2345 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 2346 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2347 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 2348 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2349 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2350 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 2351 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2352 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 2353 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8 2354 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2355 // CHECK9-NEXT: store i8* null, i8** [[TMP18]], align 8 2356 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2357 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 2358 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 2359 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2360 // CHECK9-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 2361 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8 2362 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2363 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8 2364 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2365 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 2366 // CHECK9-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8 2367 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2368 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 2369 // CHECK9-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8 2370 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 2371 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8 2372 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2373 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 2374 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 2375 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2376 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 2377 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8 2378 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 2379 // CHECK9-NEXT: store i8* null, i8** [[TMP33]], align 8 2380 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2381 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2382 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 2383 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2384 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 2385 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2386 // CHECK9: omp_offload.failed: 2387 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 2388 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 2389 // CHECK9: omp_offload.cont: 2390 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 2391 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2392 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2393 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 2394 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2395 // CHECK9: arraydestroy.body: 2396 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2397 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2398 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2399 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2400 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 2401 // CHECK9: arraydestroy.done3: 2402 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 2403 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 2404 // CHECK9-NEXT: ret i32 [[TMP39]] 2405 // 2406 // 2407 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2408 // CHECK9-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2409 // CHECK9-NEXT: entry: 2410 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2411 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2412 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2413 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) 2414 // CHECK9-NEXT: ret void 2415 // 2416 // 2417 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2418 // CHECK9-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2419 // CHECK9-NEXT: entry: 2420 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2421 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2422 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2423 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2424 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2425 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2426 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull dereferenceable(4) [[THIS1]], float [[TMP0]]) 2427 // CHECK9-NEXT: ret void 2428 // 2429 // 2430 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 2431 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 2432 // CHECK9-NEXT: entry: 2433 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2434 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2435 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 2436 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 2437 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 2438 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 2439 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2440 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2441 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2442 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 2443 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 2444 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2445 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2446 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2447 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 2448 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 2449 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 2450 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2451 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]]) 2452 // CHECK9-NEXT: ret void 2453 // 2454 // 2455 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 2456 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 2457 // CHECK9-NEXT: entry: 2458 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2459 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2460 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 2461 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2462 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 2463 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 2464 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 2465 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 2466 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 2467 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2468 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2469 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2470 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2471 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2472 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2473 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2474 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2475 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 2476 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2477 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 8 2478 // CHECK9-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 2479 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2480 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 2481 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 2482 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2483 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2484 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 2485 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2486 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2487 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 2488 // CHECK9-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 2489 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 2490 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2491 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2492 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 2493 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 2494 // CHECK9-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 2495 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2496 // CHECK9-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8 2497 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2498 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2499 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2500 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2501 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 2502 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 2503 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2504 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 2505 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 8, i1 false) 2506 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 2507 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 2508 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 2509 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 2510 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2511 // CHECK9: omp.arraycpy.body: 2512 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2513 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2514 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2515 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2516 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 4, i1 false) 2517 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2518 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2519 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 2520 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2521 // CHECK9: omp.arraycpy.done6: 2522 // CHECK9-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 2523 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 2524 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 2525 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 2526 // CHECK9-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8 2527 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 2528 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 2529 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2530 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 2531 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2532 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2533 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 2534 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2535 // CHECK9: cond.true: 2536 // CHECK9-NEXT: br label [[COND_END:%.*]] 2537 // CHECK9: cond.false: 2538 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2539 // CHECK9-NEXT: br label [[COND_END]] 2540 // CHECK9: cond.end: 2541 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 2542 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2543 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2544 // CHECK9-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 2545 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2546 // CHECK9: omp.inner.for.cond: 2547 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2548 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2549 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 2550 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2551 // CHECK9: omp.inner.for.cond.cleanup: 2552 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2553 // CHECK9: omp.inner.for.body: 2554 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2555 // CHECK9-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64 2556 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2557 // CHECK9-NEXT: [[TMP27:%.*]] = zext i32 [[TMP26]] to i64 2558 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[T_VAR3]], align 4 2559 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 2560 // CHECK9-NEXT: store i32 [[TMP28]], i32* [[CONV]], align 4 2561 // CHECK9-NEXT: [[TMP29:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 2562 // CHECK9-NEXT: [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8 2563 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[SVAR9]], align 4 2564 // CHECK9-NEXT: [[CONV11:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 2565 // CHECK9-NEXT: store i32 [[TMP31]], i32* [[CONV11]], align 4 2566 // CHECK9-NEXT: [[TMP32:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 2567 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP25]], i64 [[TMP27]], [2 x i32]* [[VEC4]], i64 [[TMP29]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP30]], i64 [[TMP32]]) 2568 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2569 // CHECK9: omp.inner.for.inc: 2570 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2571 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2572 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], [[TMP34]] 2573 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2574 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2575 // CHECK9: omp.inner.for.end: 2576 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2577 // CHECK9: omp.loop.exit: 2578 // CHECK9-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2579 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 2580 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]]) 2581 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[VAR7]]) #[[ATTR4]] 2582 // CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 2583 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2 2584 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2585 // CHECK9: arraydestroy.body: 2586 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP37]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2587 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2588 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2589 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 2590 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 2591 // CHECK9: arraydestroy.done13: 2592 // CHECK9-NEXT: ret void 2593 // 2594 // 2595 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 2596 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3]] { 2597 // CHECK9-NEXT: entry: 2598 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2599 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2600 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2601 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2602 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2603 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2604 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 2605 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 2606 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 2607 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 2608 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2609 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2610 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2611 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2612 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2613 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2614 // CHECK9-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 4 2615 // CHECK9-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4 2616 // CHECK9-NEXT: [[VAR8:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2617 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca %struct.S*, align 8 2618 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2619 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2620 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2621 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2622 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2623 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2624 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2625 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2626 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 2627 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 2628 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2629 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2630 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2631 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 2632 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 2633 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 2634 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2635 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2636 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2637 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP3]] to i32 2638 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2639 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP4]] to i32 2640 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 2641 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 2642 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2643 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2644 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8* 2645 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2646 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i64 8, i1 false) 2647 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0 2648 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S* 2649 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 2650 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP8]] 2651 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2652 // CHECK9: omp.arraycpy.body: 2653 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2654 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2655 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2656 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2657 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false) 2658 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2659 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2660 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 2661 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]] 2662 // CHECK9: omp.arraycpy.done7: 2663 // CHECK9-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2664 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR8]] to i8* 2665 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 2666 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 2667 // CHECK9-NEXT: store %struct.S* [[VAR8]], %struct.S** [[_TMP9]], align 8 2668 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2669 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 2670 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2671 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2672 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 2673 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2674 // CHECK9: cond.true: 2675 // CHECK9-NEXT: br label [[COND_END:%.*]] 2676 // CHECK9: cond.false: 2677 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2678 // CHECK9-NEXT: br label [[COND_END]] 2679 // CHECK9: cond.end: 2680 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 2681 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2682 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2683 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 2684 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2685 // CHECK9: omp.inner.for.cond: 2686 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2687 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2688 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 2689 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2690 // CHECK9: omp.inner.for.cond.cleanup: 2691 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2692 // CHECK9: omp.inner.for.body: 2693 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2694 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 2695 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2696 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2697 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV]], align 8 2698 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4 2699 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 2700 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i64 0, i64 [[IDXPROM]] 2701 // CHECK9-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4 2702 // CHECK9-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP9]], align 8 2703 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4 2704 // CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP25]] to i64 2705 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i64 0, i64 [[IDXPROM11]] 2706 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[ARRAYIDX12]] to i8* 2707 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[TMP24]] to i8* 2708 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false) 2709 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2710 // CHECK9: omp.body.continue: 2711 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2712 // CHECK9: omp.inner.for.inc: 2713 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2714 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP28]], 1 2715 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4 2716 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2717 // CHECK9: omp.inner.for.end: 2718 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2719 // CHECK9: omp.loop.exit: 2720 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2721 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 2722 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 2723 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[VAR8]]) #[[ATTR4]] 2724 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0 2725 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2 2726 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2727 // CHECK9: arraydestroy.body: 2728 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2729 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2730 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2731 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 2732 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 2733 // CHECK9: arraydestroy.done15: 2734 // CHECK9-NEXT: ret void 2735 // 2736 // 2737 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2738 // CHECK9-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2739 // CHECK9-NEXT: entry: 2740 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2741 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2742 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2743 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2744 // CHECK9-NEXT: ret void 2745 // 2746 // 2747 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2748 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 2749 // CHECK9-NEXT: entry: 2750 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2751 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2752 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2753 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2754 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2755 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 2756 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2757 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 2758 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 2759 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 2760 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 2761 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2762 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) 2763 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 2764 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2765 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 2766 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 2767 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 2768 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 2769 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 2770 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 2771 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 2772 // CHECK9-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 2773 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2774 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 2775 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 2776 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 2777 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2778 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2779 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2780 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2781 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 2782 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8 2783 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2784 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2785 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 2786 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2787 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 2788 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2789 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 2790 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 2791 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2792 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2793 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 2794 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2795 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 2796 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2797 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 2798 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 2799 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2800 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 2801 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8 2802 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2803 // CHECK9-NEXT: store i8* null, i8** [[TMP21]], align 8 2804 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2805 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 2806 // CHECK9-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8 2807 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2808 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 2809 // CHECK9-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8 2810 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 2811 // CHECK9-NEXT: store i8* null, i8** [[TMP26]], align 8 2812 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2813 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2814 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 2815 // CHECK9-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2816 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 2817 // CHECK9-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2818 // CHECK9: omp_offload.failed: 2819 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 2820 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 2821 // CHECK9: omp_offload.cont: 2822 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 2823 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2824 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2825 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2826 // CHECK9: arraydestroy.body: 2827 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2828 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2829 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2830 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2831 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2832 // CHECK9: arraydestroy.done2: 2833 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 2834 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 2835 // CHECK9-NEXT: ret i32 [[TMP32]] 2836 // 2837 // 2838 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2839 // CHECK9-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2840 // CHECK9-NEXT: entry: 2841 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2842 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2843 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2844 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2845 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 2846 // CHECK9-NEXT: ret void 2847 // 2848 // 2849 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2850 // CHECK9-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2851 // CHECK9-NEXT: entry: 2852 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2853 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2854 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2855 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2856 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2857 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2858 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2859 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 2860 // CHECK9-NEXT: ret void 2861 // 2862 // 2863 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2864 // CHECK9-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2865 // CHECK9-NEXT: entry: 2866 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2867 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2868 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2869 // CHECK9-NEXT: ret void 2870 // 2871 // 2872 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2873 // CHECK9-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2874 // CHECK9-NEXT: entry: 2875 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2876 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2877 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2878 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) 2879 // CHECK9-NEXT: ret void 2880 // 2881 // 2882 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2883 // CHECK9-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2884 // CHECK9-NEXT: entry: 2885 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2886 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2887 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2888 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2889 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2890 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2891 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 2892 // CHECK9-NEXT: ret void 2893 // 2894 // 2895 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 2896 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2897 // CHECK9-NEXT: entry: 2898 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2899 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2900 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2901 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2902 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2903 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2904 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2905 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2906 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2907 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2908 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2909 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2910 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2911 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 2912 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2913 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 2914 // CHECK9-NEXT: ret void 2915 // 2916 // 2917 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 2918 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2919 // CHECK9-NEXT: entry: 2920 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2921 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2922 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 2923 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2924 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2925 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2926 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2927 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 2928 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2929 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2930 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2931 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2932 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2933 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2934 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2935 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2936 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 2937 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2938 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8 2939 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2940 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 2941 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2942 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2943 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 2944 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2945 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2946 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2947 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 2948 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2949 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2950 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2951 // CHECK9-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 2952 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2953 // CHECK9-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8 2954 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2955 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2956 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2957 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2958 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2959 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 2960 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2961 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 2962 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 8, i1 false) 2963 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2964 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 2965 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2966 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 2967 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2968 // CHECK9: omp.arraycpy.body: 2969 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2970 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2971 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2972 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2973 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 2974 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2975 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2976 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 2977 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2978 // CHECK9: omp.arraycpy.done6: 2979 // CHECK9-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 2980 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 2981 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 2982 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false) 2983 // CHECK9-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8 2984 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2985 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2986 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2987 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2988 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 2989 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2990 // CHECK9: cond.true: 2991 // CHECK9-NEXT: br label [[COND_END:%.*]] 2992 // CHECK9: cond.false: 2993 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2994 // CHECK9-NEXT: br label [[COND_END]] 2995 // CHECK9: cond.end: 2996 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 2997 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2998 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2999 // CHECK9-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 3000 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3001 // CHECK9: omp.inner.for.cond: 3002 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3003 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3004 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 3005 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3006 // CHECK9: omp.inner.for.cond.cleanup: 3007 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3008 // CHECK9: omp.inner.for.body: 3009 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3010 // CHECK9-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64 3011 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3012 // CHECK9-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64 3013 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4 3014 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 3015 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[CONV]], align 4 3016 // CHECK9-NEXT: [[TMP27:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 3017 // CHECK9-NEXT: [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8 3018 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP23]], i64 [[TMP25]], [2 x i32]* [[VEC4]], i64 [[TMP27]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP28]]) 3019 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3020 // CHECK9: omp.inner.for.inc: 3021 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3022 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3023 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], [[TMP30]] 3024 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3025 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 3026 // CHECK9: omp.inner.for.end: 3027 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3028 // CHECK9: omp.loop.exit: 3029 // CHECK9-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3030 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4 3031 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]]) 3032 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR7]]) #[[ATTR4]] 3033 // CHECK9-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3034 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2 3035 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3036 // CHECK9: arraydestroy.body: 3037 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3038 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3039 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3040 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 3041 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 3042 // CHECK9: arraydestroy.done11: 3043 // CHECK9-NEXT: ret void 3044 // 3045 // 3046 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 3047 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3048 // CHECK9-NEXT: entry: 3049 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3050 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3051 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3052 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3053 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 3054 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 3055 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 3056 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 3057 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 3058 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3059 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3060 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3061 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3062 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3063 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3064 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 3065 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 3066 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3067 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8 3068 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 3069 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3070 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3071 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3072 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3073 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 3074 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 3075 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 3076 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 3077 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 3078 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 3079 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 3080 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 3081 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 3082 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3083 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3084 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3085 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP3]] to i32 3086 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3087 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP4]] to i32 3088 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4 3089 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 3090 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3091 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3092 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 3093 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3094 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i64 8, i1 false) 3095 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3096 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP1]] to %struct.S.0* 3097 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3098 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]] 3099 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3100 // CHECK9: omp.arraycpy.body: 3101 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3102 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3103 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3104 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3105 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false) 3106 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3107 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3108 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 3109 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 3110 // CHECK9: omp.arraycpy.done6: 3111 // CHECK9-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 3112 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 3113 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 3114 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 3115 // CHECK9-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8 3116 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3117 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 3118 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3119 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3120 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 3121 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3122 // CHECK9: cond.true: 3123 // CHECK9-NEXT: br label [[COND_END:%.*]] 3124 // CHECK9: cond.false: 3125 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3126 // CHECK9-NEXT: br label [[COND_END]] 3127 // CHECK9: cond.end: 3128 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 3129 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3130 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3131 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 3132 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3133 // CHECK9: omp.inner.for.cond: 3134 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3135 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3136 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 3137 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3138 // CHECK9: omp.inner.for.cond.cleanup: 3139 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3140 // CHECK9: omp.inner.for.body: 3141 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3142 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 3143 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3144 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3145 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV]], align 8 3146 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4 3147 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 3148 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 3149 // CHECK9-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4 3150 // CHECK9-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8 3151 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4 3152 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP25]] to i64 3153 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 3154 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8* 3155 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8* 3156 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false) 3157 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3158 // CHECK9: omp.body.continue: 3159 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3160 // CHECK9: omp.inner.for.inc: 3161 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3162 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 3163 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 3164 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 3165 // CHECK9: omp.inner.for.end: 3166 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3167 // CHECK9: omp.loop.exit: 3168 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3169 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 3170 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 3171 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR7]]) #[[ATTR4]] 3172 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3173 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 3174 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3175 // CHECK9: arraydestroy.body: 3176 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3177 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3178 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3179 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 3180 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 3181 // CHECK9: arraydestroy.done14: 3182 // CHECK9-NEXT: ret void 3183 // 3184 // 3185 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3186 // CHECK9-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3187 // CHECK9-NEXT: entry: 3188 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3189 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3190 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3191 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3192 // CHECK9-NEXT: ret void 3193 // 3194 // 3195 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3196 // CHECK9-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3197 // CHECK9-NEXT: entry: 3198 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3199 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3200 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3201 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3202 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 3203 // CHECK9-NEXT: ret void 3204 // 3205 // 3206 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3207 // CHECK9-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3208 // CHECK9-NEXT: entry: 3209 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3210 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3211 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3212 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3213 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3214 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3215 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3216 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3217 // CHECK9-NEXT: ret void 3218 // 3219 // 3220 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3221 // CHECK9-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3222 // CHECK9-NEXT: entry: 3223 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3224 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3225 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3226 // CHECK9-NEXT: ret void 3227 // 3228 // 3229 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3230 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 3231 // CHECK9-NEXT: entry: 3232 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 3233 // CHECK9-NEXT: ret void 3234 // 3235 // 3236 // CHECK10-LABEL: define {{[^@]+}}@main 3237 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 3238 // CHECK10-NEXT: entry: 3239 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3240 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8 3241 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 4 3242 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3243 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3244 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3245 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3246 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 3247 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3248 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3249 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 3250 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 3251 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 3252 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 3253 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3254 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 3255 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 4 3256 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) 3257 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 3258 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3259 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 3260 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3261 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3262 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 3263 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3264 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 3265 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 3266 // CHECK10-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 3267 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 3268 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 3269 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3270 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3271 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 3272 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 3273 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 3274 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3275 // CHECK10-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3276 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3277 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3278 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 3279 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3280 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 3281 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 3282 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3283 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 4 3284 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3285 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 3286 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 3287 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3288 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 3289 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4 3290 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3291 // CHECK10-NEXT: store i8* null, i8** [[TMP18]], align 4 3292 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3293 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 3294 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 3295 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3296 // CHECK10-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 3297 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4 3298 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3299 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 4 3300 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3301 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 3302 // CHECK10-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4 3303 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3304 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 3305 // CHECK10-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4 3306 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3307 // CHECK10-NEXT: store i8* null, i8** [[TMP28]], align 4 3308 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 3309 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 3310 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 3311 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 3312 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 3313 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4 3314 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 3315 // CHECK10-NEXT: store i8* null, i8** [[TMP33]], align 4 3316 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3317 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3318 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 3319 // CHECK10-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3320 // CHECK10-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 3321 // CHECK10-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3322 // CHECK10: omp_offload.failed: 3323 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 3324 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 3325 // CHECK10: omp_offload.cont: 3326 // CHECK10-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 3327 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3328 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3329 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3330 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3331 // CHECK10: arraydestroy.body: 3332 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3333 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3334 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3335 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3336 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3337 // CHECK10: arraydestroy.done2: 3338 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 3339 // CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 3340 // CHECK10-NEXT: ret i32 [[TMP39]] 3341 // 3342 // 3343 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3344 // CHECK10-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3345 // CHECK10-NEXT: entry: 3346 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3347 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3348 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3349 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) 3350 // CHECK10-NEXT: ret void 3351 // 3352 // 3353 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3354 // CHECK10-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3355 // CHECK10-NEXT: entry: 3356 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3357 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3358 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3359 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3360 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3361 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3362 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull dereferenceable(4) [[THIS1]], float [[TMP0]]) 3363 // CHECK10-NEXT: ret void 3364 // 3365 // 3366 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 3367 // CHECK10-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 3368 // CHECK10-NEXT: entry: 3369 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3370 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3371 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3372 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3373 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 3374 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3375 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3376 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3377 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3378 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3379 // CHECK10-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 3380 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3381 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3382 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3383 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 3384 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3385 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]]) 3386 // CHECK10-NEXT: ret void 3387 // 3388 // 3389 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 3390 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 3391 // CHECK10-NEXT: entry: 3392 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3393 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3394 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3395 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3396 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3397 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3398 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 3399 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3400 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 3401 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3402 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3403 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3404 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3405 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3406 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3407 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 3408 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 3409 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 3410 // CHECK10-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3411 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 4 3412 // CHECK10-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 3413 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3414 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3415 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 3416 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3417 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3418 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3419 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3420 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3421 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3422 // CHECK10-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 3423 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3424 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3425 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3426 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3427 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 3428 // CHECK10-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 3429 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3430 // CHECK10-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4 3431 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3432 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 3433 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3434 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3435 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 3436 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 3437 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 3438 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 3439 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 8, i1 false) 3440 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 3441 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 3442 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3443 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 3444 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3445 // CHECK10: omp.arraycpy.body: 3446 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3447 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3448 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3449 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3450 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 4, i1 false) 3451 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3452 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3453 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 3454 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 3455 // CHECK10: omp.arraycpy.done6: 3456 // CHECK10-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 3457 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 3458 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 3459 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false) 3460 // CHECK10-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4 3461 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 3462 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 3463 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3464 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 3465 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3466 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3467 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 3468 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3469 // CHECK10: cond.true: 3470 // CHECK10-NEXT: br label [[COND_END:%.*]] 3471 // CHECK10: cond.false: 3472 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3473 // CHECK10-NEXT: br label [[COND_END]] 3474 // CHECK10: cond.end: 3475 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 3476 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3477 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3478 // CHECK10-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 3479 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3480 // CHECK10: omp.inner.for.cond: 3481 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3482 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3483 // CHECK10-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 3484 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3485 // CHECK10: omp.inner.for.cond.cleanup: 3486 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3487 // CHECK10: omp.inner.for.body: 3488 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3489 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3490 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4 3491 // CHECK10-NEXT: store i32 [[TMP26]], i32* [[T_VAR_CASTED]], align 4 3492 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3493 // CHECK10-NEXT: [[TMP28:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4 3494 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[SVAR9]], align 4 3495 // CHECK10-NEXT: store i32 [[TMP29]], i32* [[SVAR_CASTED]], align 4 3496 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 3497 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP24]], i32 [[TMP25]], [2 x i32]* [[VEC4]], i32 [[TMP27]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP28]], i32 [[TMP30]]) 3498 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3499 // CHECK10: omp.inner.for.inc: 3500 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3501 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3502 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP31]], [[TMP32]] 3503 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3504 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 3505 // CHECK10: omp.inner.for.end: 3506 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3507 // CHECK10: omp.loop.exit: 3508 // CHECK10-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3509 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 3510 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 3511 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[VAR7]]) #[[ATTR4]] 3512 // CHECK10-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 3513 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 3514 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3515 // CHECK10: arraydestroy.body: 3516 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP35]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3517 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3518 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3519 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] 3520 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] 3521 // CHECK10: arraydestroy.done12: 3522 // CHECK10-NEXT: ret void 3523 // 3524 // 3525 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 3526 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3]] { 3527 // CHECK10-NEXT: entry: 3528 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3529 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3530 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3531 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3532 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3533 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3534 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3535 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3536 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 3537 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3538 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3539 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3540 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3541 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3542 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3543 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3544 // CHECK10-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3545 // CHECK10-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 3546 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3547 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 3548 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3549 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3550 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3551 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3552 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3553 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3554 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3555 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3556 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3557 // CHECK10-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 3558 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3559 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3560 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3561 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 3562 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3563 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3564 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3565 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3566 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4 3567 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 3568 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3569 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3570 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8* 3571 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3572 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 8, i1 false) 3573 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3574 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S* 3575 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3576 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP8]] 3577 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3578 // CHECK10: omp.arraycpy.body: 3579 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3580 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3581 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3582 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3583 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false) 3584 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3585 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3586 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 3587 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 3588 // CHECK10: omp.arraycpy.done4: 3589 // CHECK10-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3590 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR5]] to i8* 3591 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 3592 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 3593 // CHECK10-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 3594 // CHECK10-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3595 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 3596 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3597 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3598 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 3599 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3600 // CHECK10: cond.true: 3601 // CHECK10-NEXT: br label [[COND_END:%.*]] 3602 // CHECK10: cond.false: 3603 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3604 // CHECK10-NEXT: br label [[COND_END]] 3605 // CHECK10: cond.end: 3606 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 3607 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3608 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3609 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 3610 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3611 // CHECK10: omp.inner.for.cond: 3612 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3613 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3614 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 3615 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3616 // CHECK10: omp.inner.for.cond.cleanup: 3617 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3618 // CHECK10: omp.inner.for.body: 3619 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3620 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 3621 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3622 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3623 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 3624 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4 3625 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP23]] 3626 // CHECK10-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4 3627 // CHECK10-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 3628 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4 3629 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 [[TMP25]] 3630 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8* 3631 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[TMP24]] to i8* 3632 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false) 3633 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3634 // CHECK10: omp.body.continue: 3635 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3636 // CHECK10: omp.inner.for.inc: 3637 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3638 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 3639 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 3640 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 3641 // CHECK10: omp.inner.for.end: 3642 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3643 // CHECK10: omp.loop.exit: 3644 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3645 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 3646 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 3647 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[VAR5]]) #[[ATTR4]] 3648 // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3649 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i32 2 3650 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3651 // CHECK10: arraydestroy.body: 3652 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3653 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3654 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3655 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 3656 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 3657 // CHECK10: arraydestroy.done11: 3658 // CHECK10-NEXT: ret void 3659 // 3660 // 3661 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3662 // CHECK10-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3663 // CHECK10-NEXT: entry: 3664 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3665 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3666 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3667 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3668 // CHECK10-NEXT: ret void 3669 // 3670 // 3671 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3672 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 3673 // CHECK10-NEXT: entry: 3674 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3675 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3676 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3677 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3678 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3679 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 3680 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3681 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3682 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 3683 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 3684 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 3685 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3686 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) 3687 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 3688 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3689 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 3690 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3691 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 3692 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 3693 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 3694 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 3695 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 3696 // CHECK10-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 3697 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 3698 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 3699 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3700 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3701 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3702 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3703 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3704 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 3705 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 3706 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3707 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3708 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 3709 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3710 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 4 3711 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3712 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 3713 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 3714 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3715 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 3716 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 3717 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3718 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 4 3719 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3720 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 3721 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 3722 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3723 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 3724 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4 3725 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3726 // CHECK10-NEXT: store i8* null, i8** [[TMP21]], align 4 3727 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3728 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 3729 // CHECK10-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4 3730 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3731 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 3732 // CHECK10-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4 3733 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3734 // CHECK10-NEXT: store i8* null, i8** [[TMP26]], align 4 3735 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3736 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3737 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 3738 // CHECK10-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3739 // CHECK10-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 3740 // CHECK10-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3741 // CHECK10: omp_offload.failed: 3742 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 3743 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 3744 // CHECK10: omp_offload.cont: 3745 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 3746 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3747 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3748 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3749 // CHECK10: arraydestroy.body: 3750 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3751 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3752 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3753 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3754 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3755 // CHECK10: arraydestroy.done2: 3756 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 3757 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 3758 // CHECK10-NEXT: ret i32 [[TMP32]] 3759 // 3760 // 3761 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3762 // CHECK10-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3763 // CHECK10-NEXT: entry: 3764 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3765 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3766 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3767 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3768 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 3769 // CHECK10-NEXT: ret void 3770 // 3771 // 3772 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3773 // CHECK10-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3774 // CHECK10-NEXT: entry: 3775 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3776 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3777 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3778 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3779 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3780 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3781 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3782 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 3783 // CHECK10-NEXT: ret void 3784 // 3785 // 3786 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3787 // CHECK10-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3788 // CHECK10-NEXT: entry: 3789 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3790 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3791 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3792 // CHECK10-NEXT: ret void 3793 // 3794 // 3795 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3796 // CHECK10-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3797 // CHECK10-NEXT: entry: 3798 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3799 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3800 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3801 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) 3802 // CHECK10-NEXT: ret void 3803 // 3804 // 3805 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3806 // CHECK10-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3807 // CHECK10-NEXT: entry: 3808 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3809 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3810 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3811 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3812 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3813 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3814 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 3815 // CHECK10-NEXT: ret void 3816 // 3817 // 3818 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 3819 // CHECK10-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3820 // CHECK10-NEXT: entry: 3821 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3822 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3823 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3824 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3825 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3826 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3827 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3828 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3829 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3830 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3831 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3832 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3833 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 3834 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3835 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 3836 // CHECK10-NEXT: ret void 3837 // 3838 // 3839 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 3840 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3841 // CHECK10-NEXT: entry: 3842 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3843 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3844 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3845 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3846 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3847 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3848 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3849 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 3850 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3851 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3852 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3853 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3854 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3855 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3856 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 3857 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 3858 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 3859 // CHECK10-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3860 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 4 3861 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3862 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3863 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3864 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3865 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3866 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3867 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3868 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3869 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3870 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3871 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3872 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3873 // CHECK10-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 3874 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3875 // CHECK10-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4 3876 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3877 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 3878 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3879 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3880 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3881 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 3882 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 3883 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 3884 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 8, i1 false) 3885 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3886 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 3887 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3888 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 3889 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3890 // CHECK10: omp.arraycpy.body: 3891 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3892 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3893 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3894 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3895 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 3896 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3897 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3898 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 3899 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 3900 // CHECK10: omp.arraycpy.done6: 3901 // CHECK10-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 3902 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 3903 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 3904 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false) 3905 // CHECK10-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4 3906 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3907 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 3908 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3909 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3910 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 3911 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3912 // CHECK10: cond.true: 3913 // CHECK10-NEXT: br label [[COND_END:%.*]] 3914 // CHECK10: cond.false: 3915 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3916 // CHECK10-NEXT: br label [[COND_END]] 3917 // CHECK10: cond.end: 3918 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 3919 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3920 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3921 // CHECK10-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 3922 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3923 // CHECK10: omp.inner.for.cond: 3924 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3925 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3926 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 3927 // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3928 // CHECK10: omp.inner.for.cond.cleanup: 3929 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3930 // CHECK10: omp.inner.for.body: 3931 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3932 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3933 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR3]], align 4 3934 // CHECK10-NEXT: store i32 [[TMP24]], i32* [[T_VAR_CASTED]], align 4 3935 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3936 // CHECK10-NEXT: [[TMP26:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4 3937 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP23]], [2 x i32]* [[VEC4]], i32 [[TMP25]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP26]]) 3938 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3939 // CHECK10: omp.inner.for.inc: 3940 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3941 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3942 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 3943 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3944 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 3945 // CHECK10: omp.inner.for.end: 3946 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3947 // CHECK10: omp.loop.exit: 3948 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3949 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 3950 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 3951 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR7]]) #[[ATTR4]] 3952 // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3953 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 3954 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3955 // CHECK10: arraydestroy.body: 3956 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3957 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3958 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3959 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 3960 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 3961 // CHECK10: arraydestroy.done11: 3962 // CHECK10-NEXT: ret void 3963 // 3964 // 3965 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 3966 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3967 // CHECK10-NEXT: entry: 3968 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3969 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3970 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3971 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3972 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3973 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3974 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3975 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3976 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3977 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3978 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3979 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3980 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3981 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3982 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3983 // CHECK10-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3984 // CHECK10-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4 3985 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3986 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 3987 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3988 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3989 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3990 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3991 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3992 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3993 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3994 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3995 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3996 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3997 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3998 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3999 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 4000 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4001 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4002 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4003 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4004 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4 4005 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 4006 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4007 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4008 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8* 4009 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 4010 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 8, i1 false) 4011 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4012 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP1]] to %struct.S.0* 4013 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4014 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]] 4015 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4016 // CHECK10: omp.arraycpy.body: 4017 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4018 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4019 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4020 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4021 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false) 4022 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4023 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4024 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 4025 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 4026 // CHECK10: omp.arraycpy.done4: 4027 // CHECK10-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4028 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR5]] to i8* 4029 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 4030 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 4031 // CHECK10-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 4032 // CHECK10-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4033 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 4034 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4035 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4036 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 4037 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4038 // CHECK10: cond.true: 4039 // CHECK10-NEXT: br label [[COND_END:%.*]] 4040 // CHECK10: cond.false: 4041 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4042 // CHECK10-NEXT: br label [[COND_END]] 4043 // CHECK10: cond.end: 4044 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 4045 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4046 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4047 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 4048 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4049 // CHECK10: omp.inner.for.cond: 4050 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4051 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4052 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 4053 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4054 // CHECK10: omp.inner.for.cond.cleanup: 4055 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4056 // CHECK10: omp.inner.for.body: 4057 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4058 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 4059 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4060 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4061 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 4062 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4 4063 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP23]] 4064 // CHECK10-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4 4065 // CHECK10-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 4066 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4 4067 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 [[TMP25]] 4068 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 4069 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8* 4070 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false) 4071 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4072 // CHECK10: omp.body.continue: 4073 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4074 // CHECK10: omp.inner.for.inc: 4075 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4076 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 4077 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 4078 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 4079 // CHECK10: omp.inner.for.end: 4080 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4081 // CHECK10: omp.loop.exit: 4082 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4083 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 4084 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 4085 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4086 // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4087 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 4088 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4089 // CHECK10: arraydestroy.body: 4090 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4091 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4092 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4093 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 4094 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 4095 // CHECK10: arraydestroy.done11: 4096 // CHECK10-NEXT: ret void 4097 // 4098 // 4099 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4100 // CHECK10-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4101 // CHECK10-NEXT: entry: 4102 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4103 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4104 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4105 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4106 // CHECK10-NEXT: ret void 4107 // 4108 // 4109 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4110 // CHECK10-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4111 // CHECK10-NEXT: entry: 4112 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4113 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4114 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4115 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4116 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 4117 // CHECK10-NEXT: ret void 4118 // 4119 // 4120 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4121 // CHECK10-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4122 // CHECK10-NEXT: entry: 4123 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4124 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4125 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4126 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4127 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4128 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4129 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4130 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4131 // CHECK10-NEXT: ret void 4132 // 4133 // 4134 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4135 // CHECK10-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4136 // CHECK10-NEXT: entry: 4137 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4138 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4139 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4140 // CHECK10-NEXT: ret void 4141 // 4142 // 4143 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4144 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 4145 // CHECK10-NEXT: entry: 4146 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 4147 // CHECK10-NEXT: ret void 4148 // 4149 // 4150 // CHECK11-LABEL: define {{[^@]+}}@main 4151 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 4152 // CHECK11-NEXT: entry: 4153 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4154 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 4155 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 4156 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4157 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4158 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4159 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4160 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4161 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4162 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 4163 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 4164 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 4165 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 4166 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 4167 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4168 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 4169 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 4170 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) 4171 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 4172 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4173 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4174 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4175 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 4176 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4177 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 4178 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4179 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4180 // CHECK11-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 4181 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 4182 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 4183 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 4184 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4185 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 4186 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 4187 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 4188 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4189 // CHECK11-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4190 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4191 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4192 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4193 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4194 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 4195 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 4196 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4197 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 4198 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4199 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 4200 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 4201 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4202 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 4203 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4 4204 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4205 // CHECK11-NEXT: store i8* null, i8** [[TMP18]], align 4 4206 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4207 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 4208 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 4209 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4210 // CHECK11-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 4211 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4 4212 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4213 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4 4214 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 4215 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 4216 // CHECK11-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4 4217 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 4218 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 4219 // CHECK11-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4 4220 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 4221 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4 4222 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 4223 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 4224 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 4225 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 4226 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 4227 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4 4228 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 4229 // CHECK11-NEXT: store i8* null, i8** [[TMP33]], align 4 4230 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4231 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4232 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 4233 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4234 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 4235 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4236 // CHECK11: omp_offload.failed: 4237 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 4238 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 4239 // CHECK11: omp_offload.cont: 4240 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 4241 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4242 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4243 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4244 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4245 // CHECK11: arraydestroy.body: 4246 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4247 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4248 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4249 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4250 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 4251 // CHECK11: arraydestroy.done2: 4252 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 4253 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 4254 // CHECK11-NEXT: ret i32 [[TMP39]] 4255 // 4256 // 4257 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4258 // CHECK11-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4259 // CHECK11-NEXT: entry: 4260 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4261 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4262 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4263 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) 4264 // CHECK11-NEXT: ret void 4265 // 4266 // 4267 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4268 // CHECK11-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4269 // CHECK11-NEXT: entry: 4270 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4271 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4272 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4273 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4274 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4275 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4276 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull dereferenceable(4) [[THIS1]], float [[TMP0]]) 4277 // CHECK11-NEXT: ret void 4278 // 4279 // 4280 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 4281 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 4282 // CHECK11-NEXT: entry: 4283 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 4284 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4285 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 4286 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 4287 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 4288 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4289 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 4290 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4291 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4292 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 4293 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 4294 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4295 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4296 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 4297 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 4298 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4299 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]]) 4300 // CHECK11-NEXT: ret void 4301 // 4302 // 4303 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 4304 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 4305 // CHECK11-NEXT: entry: 4306 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4307 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4308 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 4309 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4310 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 4311 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 4312 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 4313 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4314 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 4315 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4316 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 4317 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4318 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4319 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4320 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4321 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 4322 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 4323 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 4324 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4325 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 4 4326 // CHECK11-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 4327 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4328 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 4329 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 4330 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4331 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4332 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 4333 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4334 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4335 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 4336 // CHECK11-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 4337 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 4338 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4339 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4340 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 4341 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 4342 // CHECK11-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 4343 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4344 // CHECK11-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4 4345 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4346 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 4347 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4348 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4349 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 4350 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 4351 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 4352 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 4353 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 8, i1 false) 4354 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 4355 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 4356 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4357 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 4358 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4359 // CHECK11: omp.arraycpy.body: 4360 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4361 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4362 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4363 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4364 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 4, i1 false) 4365 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4366 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4367 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 4368 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 4369 // CHECK11: omp.arraycpy.done6: 4370 // CHECK11-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 4371 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 4372 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 4373 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false) 4374 // CHECK11-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4 4375 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 4376 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 4377 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4378 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 4379 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4380 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4381 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 4382 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4383 // CHECK11: cond.true: 4384 // CHECK11-NEXT: br label [[COND_END:%.*]] 4385 // CHECK11: cond.false: 4386 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4387 // CHECK11-NEXT: br label [[COND_END]] 4388 // CHECK11: cond.end: 4389 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 4390 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4391 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4392 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 4393 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4394 // CHECK11: omp.inner.for.cond: 4395 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4396 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4397 // CHECK11-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 4398 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4399 // CHECK11: omp.inner.for.cond.cleanup: 4400 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4401 // CHECK11: omp.inner.for.body: 4402 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4403 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4404 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4 4405 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[T_VAR_CASTED]], align 4 4406 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 4407 // CHECK11-NEXT: [[TMP28:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4 4408 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[SVAR9]], align 4 4409 // CHECK11-NEXT: store i32 [[TMP29]], i32* [[SVAR_CASTED]], align 4 4410 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 4411 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP24]], i32 [[TMP25]], [2 x i32]* [[VEC4]], i32 [[TMP27]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP28]], i32 [[TMP30]]) 4412 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4413 // CHECK11: omp.inner.for.inc: 4414 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4415 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4416 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP31]], [[TMP32]] 4417 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4418 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 4419 // CHECK11: omp.inner.for.end: 4420 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4421 // CHECK11: omp.loop.exit: 4422 // CHECK11-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4423 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 4424 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 4425 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[VAR7]]) #[[ATTR4]] 4426 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 4427 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 4428 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4429 // CHECK11: arraydestroy.body: 4430 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP35]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4431 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4432 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4433 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] 4434 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] 4435 // CHECK11: arraydestroy.done12: 4436 // CHECK11-NEXT: ret void 4437 // 4438 // 4439 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 4440 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3]] { 4441 // CHECK11-NEXT: entry: 4442 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4443 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4444 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4445 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4446 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4447 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 4448 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 4449 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 4450 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 4451 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4452 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4453 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4454 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4455 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4456 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4457 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4458 // CHECK11-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 4459 // CHECK11-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 4460 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4461 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 4462 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4463 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4464 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4465 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4466 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4467 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4468 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 4469 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4470 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 4471 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 4472 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4473 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4474 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 4475 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 4476 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4477 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4478 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4479 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4480 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4 4481 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 4482 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4483 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4484 // CHECK11-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8* 4485 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 4486 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 8, i1 false) 4487 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 4488 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S* 4489 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4490 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP8]] 4491 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4492 // CHECK11: omp.arraycpy.body: 4493 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4494 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4495 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4496 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4497 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false) 4498 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4499 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4500 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 4501 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 4502 // CHECK11: omp.arraycpy.done4: 4503 // CHECK11-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4504 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR5]] to i8* 4505 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 4506 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 4507 // CHECK11-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 4508 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4509 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 4510 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4511 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4512 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 4513 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4514 // CHECK11: cond.true: 4515 // CHECK11-NEXT: br label [[COND_END:%.*]] 4516 // CHECK11: cond.false: 4517 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4518 // CHECK11-NEXT: br label [[COND_END]] 4519 // CHECK11: cond.end: 4520 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 4521 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4522 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4523 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 4524 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4525 // CHECK11: omp.inner.for.cond: 4526 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4527 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4528 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 4529 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4530 // CHECK11: omp.inner.for.cond.cleanup: 4531 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4532 // CHECK11: omp.inner.for.body: 4533 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4534 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 4535 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4536 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4537 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 4538 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4 4539 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP23]] 4540 // CHECK11-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4 4541 // CHECK11-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 4542 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4 4543 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 [[TMP25]] 4544 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8* 4545 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[TMP24]] to i8* 4546 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false) 4547 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4548 // CHECK11: omp.body.continue: 4549 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4550 // CHECK11: omp.inner.for.inc: 4551 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4552 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 4553 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 4554 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 4555 // CHECK11: omp.inner.for.end: 4556 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4557 // CHECK11: omp.loop.exit: 4558 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4559 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 4560 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 4561 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4562 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 4563 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i32 2 4564 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4565 // CHECK11: arraydestroy.body: 4566 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4567 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4568 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4569 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 4570 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 4571 // CHECK11: arraydestroy.done11: 4572 // CHECK11-NEXT: ret void 4573 // 4574 // 4575 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4576 // CHECK11-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4577 // CHECK11-NEXT: entry: 4578 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4579 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4580 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4581 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4582 // CHECK11-NEXT: ret void 4583 // 4584 // 4585 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4586 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 4587 // CHECK11-NEXT: entry: 4588 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4589 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4590 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4591 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4592 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4593 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4594 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4595 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 4596 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 4597 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 4598 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 4599 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4600 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) 4601 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 4602 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4603 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4604 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4605 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 4606 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4607 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 4608 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 4609 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4610 // CHECK11-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 4611 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 4612 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 4613 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 4614 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4615 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4616 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4617 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4618 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 4619 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 4620 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4621 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4622 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4623 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4624 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 4625 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4626 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 4627 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 4628 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4629 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 4630 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 4631 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4632 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 4633 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4634 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 4635 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 4636 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4637 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 4638 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4 4639 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4640 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4 4641 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 4642 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 4643 // CHECK11-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4 4644 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 4645 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 4646 // CHECK11-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4 4647 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 4648 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4 4649 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4650 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4651 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 4652 // CHECK11-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4653 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 4654 // CHECK11-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4655 // CHECK11: omp_offload.failed: 4656 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 4657 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 4658 // CHECK11: omp_offload.cont: 4659 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 4660 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4661 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4662 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4663 // CHECK11: arraydestroy.body: 4664 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4665 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4666 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4667 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4668 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 4669 // CHECK11: arraydestroy.done2: 4670 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 4671 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 4672 // CHECK11-NEXT: ret i32 [[TMP32]] 4673 // 4674 // 4675 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4676 // CHECK11-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4677 // CHECK11-NEXT: entry: 4678 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4679 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4680 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4681 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4682 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 4683 // CHECK11-NEXT: ret void 4684 // 4685 // 4686 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4687 // CHECK11-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4688 // CHECK11-NEXT: entry: 4689 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4690 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4691 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4692 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4693 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4694 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4695 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4696 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 4697 // CHECK11-NEXT: ret void 4698 // 4699 // 4700 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4701 // CHECK11-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4702 // CHECK11-NEXT: entry: 4703 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4704 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4705 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4706 // CHECK11-NEXT: ret void 4707 // 4708 // 4709 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4710 // CHECK11-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4711 // CHECK11-NEXT: entry: 4712 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4713 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4714 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4715 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) 4716 // CHECK11-NEXT: ret void 4717 // 4718 // 4719 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4720 // CHECK11-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4721 // CHECK11-NEXT: entry: 4722 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4723 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4724 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4725 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4726 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4727 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4728 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 4729 // CHECK11-NEXT: ret void 4730 // 4731 // 4732 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 4733 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 4734 // CHECK11-NEXT: entry: 4735 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 4736 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4737 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 4738 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 4739 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4740 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 4741 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4742 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4743 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 4744 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4745 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4746 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 4747 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 4748 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4749 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 4750 // CHECK11-NEXT: ret void 4751 // 4752 // 4753 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 4754 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 4755 // CHECK11-NEXT: entry: 4756 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4757 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4758 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 4759 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4760 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 4761 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 4762 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4763 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 4764 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4765 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 4766 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4767 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4768 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4769 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4770 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 4771 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 4772 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 4773 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4774 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 4 4775 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4776 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 4777 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4778 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4779 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 4780 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4781 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4782 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 4783 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 4784 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4785 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4786 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 4787 // CHECK11-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 4788 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4789 // CHECK11-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4 4790 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4791 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 4792 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4793 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4794 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 4795 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 4796 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 4797 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 4798 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 8, i1 false) 4799 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 4800 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 4801 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4802 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 4803 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4804 // CHECK11: omp.arraycpy.body: 4805 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4806 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4807 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4808 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4809 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 4810 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4811 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4812 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 4813 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 4814 // CHECK11: omp.arraycpy.done6: 4815 // CHECK11-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 4816 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 4817 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 4818 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false) 4819 // CHECK11-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4 4820 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4821 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 4822 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4823 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4824 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 4825 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4826 // CHECK11: cond.true: 4827 // CHECK11-NEXT: br label [[COND_END:%.*]] 4828 // CHECK11: cond.false: 4829 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4830 // CHECK11-NEXT: br label [[COND_END]] 4831 // CHECK11: cond.end: 4832 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 4833 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4834 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4835 // CHECK11-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 4836 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4837 // CHECK11: omp.inner.for.cond: 4838 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4839 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4840 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 4841 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4842 // CHECK11: omp.inner.for.cond.cleanup: 4843 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4844 // CHECK11: omp.inner.for.body: 4845 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4846 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4847 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR3]], align 4 4848 // CHECK11-NEXT: store i32 [[TMP24]], i32* [[T_VAR_CASTED]], align 4 4849 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 4850 // CHECK11-NEXT: [[TMP26:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4 4851 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP23]], [2 x i32]* [[VEC4]], i32 [[TMP25]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP26]]) 4852 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4853 // CHECK11: omp.inner.for.inc: 4854 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4855 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4856 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 4857 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4858 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 4859 // CHECK11: omp.inner.for.end: 4860 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4861 // CHECK11: omp.loop.exit: 4862 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4863 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 4864 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 4865 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR7]]) #[[ATTR4]] 4866 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 4867 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 4868 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4869 // CHECK11: arraydestroy.body: 4870 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4871 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4872 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4873 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 4874 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 4875 // CHECK11: arraydestroy.done11: 4876 // CHECK11-NEXT: ret void 4877 // 4878 // 4879 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 4880 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 4881 // CHECK11-NEXT: entry: 4882 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4883 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4884 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4885 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4886 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4887 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 4888 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 4889 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 4890 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4891 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4892 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4893 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4894 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4895 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4896 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4897 // CHECK11-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 4898 // CHECK11-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4 4899 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4900 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 4901 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4902 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4903 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4904 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4905 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4906 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4907 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 4908 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4909 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 4910 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4911 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4912 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 4913 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 4914 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4915 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4916 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4917 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4918 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4 4919 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 4920 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4921 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4922 // CHECK11-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8* 4923 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 4924 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 8, i1 false) 4925 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4926 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP1]] to %struct.S.0* 4927 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4928 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]] 4929 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4930 // CHECK11: omp.arraycpy.body: 4931 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4932 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4933 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4934 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4935 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false) 4936 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4937 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4938 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 4939 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 4940 // CHECK11: omp.arraycpy.done4: 4941 // CHECK11-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4942 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR5]] to i8* 4943 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 4944 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 4945 // CHECK11-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 4946 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4947 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 4948 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4949 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4950 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 4951 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4952 // CHECK11: cond.true: 4953 // CHECK11-NEXT: br label [[COND_END:%.*]] 4954 // CHECK11: cond.false: 4955 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4956 // CHECK11-NEXT: br label [[COND_END]] 4957 // CHECK11: cond.end: 4958 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 4959 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4960 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4961 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 4962 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4963 // CHECK11: omp.inner.for.cond: 4964 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4965 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4966 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 4967 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4968 // CHECK11: omp.inner.for.cond.cleanup: 4969 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4970 // CHECK11: omp.inner.for.body: 4971 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4972 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 4973 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4974 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4975 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 4976 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4 4977 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP23]] 4978 // CHECK11-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4 4979 // CHECK11-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 4980 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4 4981 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 [[TMP25]] 4982 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 4983 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8* 4984 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false) 4985 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4986 // CHECK11: omp.body.continue: 4987 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4988 // CHECK11: omp.inner.for.inc: 4989 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4990 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 4991 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 4992 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 4993 // CHECK11: omp.inner.for.end: 4994 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4995 // CHECK11: omp.loop.exit: 4996 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4997 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 4998 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 4999 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR5]]) #[[ATTR4]] 5000 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 5001 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 5002 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5003 // CHECK11: arraydestroy.body: 5004 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5005 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 5006 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5007 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 5008 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 5009 // CHECK11: arraydestroy.done11: 5010 // CHECK11-NEXT: ret void 5011 // 5012 // 5013 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 5014 // CHECK11-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5015 // CHECK11-NEXT: entry: 5016 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5017 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5018 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5019 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5020 // CHECK11-NEXT: ret void 5021 // 5022 // 5023 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 5024 // CHECK11-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5025 // CHECK11-NEXT: entry: 5026 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5027 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5028 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5029 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5030 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 5031 // CHECK11-NEXT: ret void 5032 // 5033 // 5034 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 5035 // CHECK11-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5036 // CHECK11-NEXT: entry: 5037 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5038 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5039 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5040 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5041 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5042 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5043 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5044 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 5045 // CHECK11-NEXT: ret void 5046 // 5047 // 5048 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 5049 // CHECK11-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5050 // CHECK11-NEXT: entry: 5051 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5052 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5053 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5054 // CHECK11-NEXT: ret void 5055 // 5056 // 5057 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 5058 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 5059 // CHECK11-NEXT: entry: 5060 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 5061 // CHECK11-NEXT: ret void 5062 // 5063 // 5064 // CHECK12-LABEL: define {{[^@]+}}@main 5065 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 5066 // CHECK12-NEXT: entry: 5067 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5068 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8 5069 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 8 5070 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 5071 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5072 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5073 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 5074 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 5075 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 5076 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 5077 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 5078 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 5079 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 5080 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 8 5081 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) 5082 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 5083 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5084 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 5085 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 5086 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 5087 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 5088 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 5089 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 5090 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 5091 // CHECK12-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 5092 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 5093 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 5094 // CHECK12-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8 5095 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 5096 // CHECK12-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 8 5097 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 5098 // CHECK12-NEXT: br label [[FOR_COND:%.*]] 5099 // CHECK12: for.cond: 5100 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5101 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 5102 // CHECK12-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5103 // CHECK12: for.body: 5104 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 5105 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 5106 // CHECK12-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64 5107 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 5108 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 5109 // CHECK12-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8 5110 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5111 // CHECK12-NEXT: [[IDXPROM3:%.*]] = sext i32 [[TMP9]] to i64 5112 // CHECK12-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM3]] 5113 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 5114 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 5115 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 5116 // CHECK12-NEXT: br label [[FOR_INC:%.*]] 5117 // CHECK12: for.inc: 5118 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 5119 // CHECK12-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 5120 // CHECK12-NEXT: store i32 [[INC]], i32* [[I]], align 4 5121 // CHECK12-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 5122 // CHECK12: for.end: 5123 // CHECK12-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 5124 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5125 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5126 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 5127 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5128 // CHECK12: arraydestroy.body: 5129 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5130 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 5131 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 5132 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5133 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 5134 // CHECK12: arraydestroy.done5: 5135 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 5136 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 5137 // CHECK12-NEXT: ret i32 [[TMP14]] 5138 // 5139 // 5140 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 5141 // CHECK12-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5142 // CHECK12-NEXT: entry: 5143 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5144 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5145 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5146 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) 5147 // CHECK12-NEXT: ret void 5148 // 5149 // 5150 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 5151 // CHECK12-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5152 // CHECK12-NEXT: entry: 5153 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5154 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5155 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5156 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5157 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5158 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5159 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull dereferenceable(4) [[THIS1]], float [[TMP0]]) 5160 // CHECK12-NEXT: ret void 5161 // 5162 // 5163 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 5164 // CHECK12-SAME: () #[[ATTR3:[0-9]+]] comdat { 5165 // CHECK12-NEXT: entry: 5166 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5167 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 5168 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5169 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5170 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 5171 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 5172 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 5173 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 5174 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 5175 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 5176 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) 5177 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 5178 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5179 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 5180 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 5181 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 5182 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 5183 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 5184 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 5185 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 5186 // CHECK12-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 5187 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 5188 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 5189 // CHECK12-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8 5190 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 5191 // CHECK12-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 8 5192 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 5193 // CHECK12-NEXT: br label [[FOR_COND:%.*]] 5194 // CHECK12: for.cond: 5195 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5196 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 5197 // CHECK12-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5198 // CHECK12: for.body: 5199 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 5200 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 5201 // CHECK12-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64 5202 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 5203 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 5204 // CHECK12-NEXT: [[TMP8:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8 5205 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5206 // CHECK12-NEXT: [[IDXPROM3:%.*]] = sext i32 [[TMP9]] to i64 5207 // CHECK12-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM3]] 5208 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 5209 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[TMP8]] to i8* 5210 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 5211 // CHECK12-NEXT: br label [[FOR_INC:%.*]] 5212 // CHECK12: for.inc: 5213 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 5214 // CHECK12-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 5215 // CHECK12-NEXT: store i32 [[INC]], i32* [[I]], align 4 5216 // CHECK12-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 5217 // CHECK12: for.end: 5218 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 5219 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5220 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 5221 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5222 // CHECK12: arraydestroy.body: 5223 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5224 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 5225 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5226 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5227 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 5228 // CHECK12: arraydestroy.done5: 5229 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 5230 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 5231 // CHECK12-NEXT: ret i32 [[TMP14]] 5232 // 5233 // 5234 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 5235 // CHECK12-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5236 // CHECK12-NEXT: entry: 5237 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5238 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5239 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5240 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5241 // CHECK12-NEXT: ret void 5242 // 5243 // 5244 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 5245 // CHECK12-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5246 // CHECK12-NEXT: entry: 5247 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5248 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5249 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5250 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5251 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 5252 // CHECK12-NEXT: ret void 5253 // 5254 // 5255 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 5256 // CHECK12-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5257 // CHECK12-NEXT: entry: 5258 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5259 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5260 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5261 // CHECK12-NEXT: ret void 5262 // 5263 // 5264 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 5265 // CHECK12-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5266 // CHECK12-NEXT: entry: 5267 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5268 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5269 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5270 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5271 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5272 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5273 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5274 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 5275 // CHECK12-NEXT: ret void 5276 // 5277 // 5278 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 5279 // CHECK12-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5280 // CHECK12-NEXT: entry: 5281 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5282 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5283 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5284 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) 5285 // CHECK12-NEXT: ret void 5286 // 5287 // 5288 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 5289 // CHECK12-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5290 // CHECK12-NEXT: entry: 5291 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5292 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5293 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5294 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5295 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5296 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5297 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 5298 // CHECK12-NEXT: ret void 5299 // 5300 // 5301 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 5302 // CHECK12-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5303 // CHECK12-NEXT: entry: 5304 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5305 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5306 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5307 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5308 // CHECK12-NEXT: ret void 5309 // 5310 // 5311 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 5312 // CHECK12-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5313 // CHECK12-NEXT: entry: 5314 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5315 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5316 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5317 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5318 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 5319 // CHECK12-NEXT: ret void 5320 // 5321 // 5322 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 5323 // CHECK12-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5324 // CHECK12-NEXT: entry: 5325 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5326 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5327 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5328 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5329 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5330 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5331 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5332 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 5333 // CHECK12-NEXT: ret void 5334 // 5335 // 5336 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 5337 // CHECK12-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5338 // CHECK12-NEXT: entry: 5339 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5340 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5341 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5342 // CHECK12-NEXT: ret void 5343 // 5344 // 5345 // CHECK13-LABEL: define {{[^@]+}}@main 5346 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 5347 // CHECK13-NEXT: entry: 5348 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5349 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 5350 // CHECK13-NEXT: [[G1:%.*]] = alloca double*, align 8 5351 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 5352 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5353 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5354 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 5355 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 5356 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 5357 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 5358 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 5359 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5360 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 5361 // CHECK13-NEXT: store double* [[G]], double** [[G1]], align 8 5362 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) 5363 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 5364 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5365 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 5366 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 5367 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 5368 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 5369 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 5370 // CHECK13-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 5371 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 5372 // CHECK13-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 5373 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 5374 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 5375 // CHECK13-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8 5376 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 5377 // CHECK13-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 8 5378 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 5379 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 5380 // CHECK13: for.cond: 5381 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5382 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 5383 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5384 // CHECK13: for.body: 5385 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 5386 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 5387 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64 5388 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 5389 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 5390 // CHECK13-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8 5391 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5392 // CHECK13-NEXT: [[IDXPROM3:%.*]] = sext i32 [[TMP9]] to i64 5393 // CHECK13-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM3]] 5394 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 5395 // CHECK13-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 5396 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 5397 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 5398 // CHECK13: for.inc: 5399 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 5400 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 5401 // CHECK13-NEXT: store i32 [[INC]], i32* [[I]], align 4 5402 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 5403 // CHECK13: for.end: 5404 // CHECK13-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 5405 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5406 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5407 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 5408 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5409 // CHECK13: arraydestroy.body: 5410 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5411 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 5412 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 5413 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5414 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 5415 // CHECK13: arraydestroy.done5: 5416 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 5417 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 5418 // CHECK13-NEXT: ret i32 [[TMP14]] 5419 // 5420 // 5421 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 5422 // CHECK13-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5423 // CHECK13-NEXT: entry: 5424 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5425 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5426 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5427 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) 5428 // CHECK13-NEXT: ret void 5429 // 5430 // 5431 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 5432 // CHECK13-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5433 // CHECK13-NEXT: entry: 5434 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5435 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5436 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5437 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5438 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5439 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5440 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull dereferenceable(4) [[THIS1]], float [[TMP0]]) 5441 // CHECK13-NEXT: ret void 5442 // 5443 // 5444 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 5445 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { 5446 // CHECK13-NEXT: entry: 5447 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5448 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 5449 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5450 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5451 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 5452 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 5453 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 5454 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 5455 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 5456 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5457 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) 5458 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 5459 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5460 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 5461 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 5462 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 5463 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 5464 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 5465 // CHECK13-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 5466 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 5467 // CHECK13-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 5468 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 5469 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 5470 // CHECK13-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8 5471 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 5472 // CHECK13-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 8 5473 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 5474 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 5475 // CHECK13: for.cond: 5476 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5477 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 5478 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5479 // CHECK13: for.body: 5480 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 5481 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 5482 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64 5483 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 5484 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 5485 // CHECK13-NEXT: [[TMP8:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8 5486 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5487 // CHECK13-NEXT: [[IDXPROM3:%.*]] = sext i32 [[TMP9]] to i64 5488 // CHECK13-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM3]] 5489 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 5490 // CHECK13-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[TMP8]] to i8* 5491 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 5492 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 5493 // CHECK13: for.inc: 5494 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 5495 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 5496 // CHECK13-NEXT: store i32 [[INC]], i32* [[I]], align 4 5497 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 5498 // CHECK13: for.end: 5499 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 5500 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5501 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 5502 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5503 // CHECK13: arraydestroy.body: 5504 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5505 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 5506 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5507 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5508 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 5509 // CHECK13: arraydestroy.done5: 5510 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 5511 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 5512 // CHECK13-NEXT: ret i32 [[TMP14]] 5513 // 5514 // 5515 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 5516 // CHECK13-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5517 // CHECK13-NEXT: entry: 5518 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5519 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5520 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5521 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5522 // CHECK13-NEXT: ret void 5523 // 5524 // 5525 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 5526 // CHECK13-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5527 // CHECK13-NEXT: entry: 5528 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5529 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5530 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5531 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5532 // CHECK13-NEXT: store float 0.000000e+00, float* [[F]], align 4 5533 // CHECK13-NEXT: ret void 5534 // 5535 // 5536 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 5537 // CHECK13-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5538 // CHECK13-NEXT: entry: 5539 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5540 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5541 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5542 // CHECK13-NEXT: ret void 5543 // 5544 // 5545 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 5546 // CHECK13-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5547 // CHECK13-NEXT: entry: 5548 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5549 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5550 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5551 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5552 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5553 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5554 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5555 // CHECK13-NEXT: store float [[TMP0]], float* [[F]], align 4 5556 // CHECK13-NEXT: ret void 5557 // 5558 // 5559 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 5560 // CHECK13-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5561 // CHECK13-NEXT: entry: 5562 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5563 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5564 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5565 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) 5566 // CHECK13-NEXT: ret void 5567 // 5568 // 5569 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 5570 // CHECK13-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5571 // CHECK13-NEXT: entry: 5572 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5573 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5574 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5575 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5576 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5577 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5578 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 5579 // CHECK13-NEXT: ret void 5580 // 5581 // 5582 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 5583 // CHECK13-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5584 // CHECK13-NEXT: entry: 5585 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5586 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5587 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5588 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5589 // CHECK13-NEXT: ret void 5590 // 5591 // 5592 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 5593 // CHECK13-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5594 // CHECK13-NEXT: entry: 5595 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5596 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5597 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5598 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5599 // CHECK13-NEXT: store i32 0, i32* [[F]], align 4 5600 // CHECK13-NEXT: ret void 5601 // 5602 // 5603 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 5604 // CHECK13-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5605 // CHECK13-NEXT: entry: 5606 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5607 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5608 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5609 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5610 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5611 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5612 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5613 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 5614 // CHECK13-NEXT: ret void 5615 // 5616 // 5617 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 5618 // CHECK13-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5619 // CHECK13-NEXT: entry: 5620 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5621 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5622 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5623 // CHECK13-NEXT: ret void 5624 // 5625 // 5626 // CHECK14-LABEL: define {{[^@]+}}@main 5627 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 5628 // CHECK14-NEXT: entry: 5629 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5630 // CHECK14-NEXT: [[G:%.*]] = alloca double, align 8 5631 // CHECK14-NEXT: [[G1:%.*]] = alloca double*, align 4 5632 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 5633 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5634 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5635 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 5636 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 5637 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 5638 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 5639 // CHECK14-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 5640 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 5641 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 5642 // CHECK14-NEXT: store double* [[G]], double** [[G1]], align 4 5643 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) 5644 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 5645 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5646 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 5647 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5648 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 5649 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 5650 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 5651 // CHECK14-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 5652 // CHECK14-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 5653 // CHECK14-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 5654 // CHECK14-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 5655 // CHECK14-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 5656 // CHECK14-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4 5657 // CHECK14-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 5658 // CHECK14-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 4 5659 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 5660 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 5661 // CHECK14: for.cond: 5662 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5663 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 5664 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5665 // CHECK14: for.body: 5666 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 5667 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 5668 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP7]] 5669 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 5670 // CHECK14-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4 5671 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5672 // CHECK14-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP9]] 5673 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[ARRAYIDX3]] to i8* 5674 // CHECK14-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 5675 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 5676 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 5677 // CHECK14: for.inc: 5678 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 5679 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 5680 // CHECK14-NEXT: store i32 [[INC]], i32* [[I]], align 4 5681 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 5682 // CHECK14: for.end: 5683 // CHECK14-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 5684 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5685 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5686 // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 5687 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5688 // CHECK14: arraydestroy.body: 5689 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5690 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 5691 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 5692 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5693 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 5694 // CHECK14: arraydestroy.done4: 5695 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 5696 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 5697 // CHECK14-NEXT: ret i32 [[TMP14]] 5698 // 5699 // 5700 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 5701 // CHECK14-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5702 // CHECK14-NEXT: entry: 5703 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5704 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5705 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5706 // CHECK14-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) 5707 // CHECK14-NEXT: ret void 5708 // 5709 // 5710 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 5711 // CHECK14-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5712 // CHECK14-NEXT: entry: 5713 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5714 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5715 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5716 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5717 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5718 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5719 // CHECK14-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull dereferenceable(4) [[THIS1]], float [[TMP0]]) 5720 // CHECK14-NEXT: ret void 5721 // 5722 // 5723 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 5724 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat { 5725 // CHECK14-NEXT: entry: 5726 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5727 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 5728 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5729 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5730 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 5731 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 5732 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 5733 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 5734 // CHECK14-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 5735 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 5736 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) 5737 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 5738 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5739 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 5740 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5741 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 5742 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 5743 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 5744 // CHECK14-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 5745 // CHECK14-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 5746 // CHECK14-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 5747 // CHECK14-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 5748 // CHECK14-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 5749 // CHECK14-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4 5750 // CHECK14-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 5751 // CHECK14-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 4 5752 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 5753 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 5754 // CHECK14: for.cond: 5755 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5756 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 5757 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5758 // CHECK14: for.body: 5759 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 5760 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 5761 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP7]] 5762 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 5763 // CHECK14-NEXT: [[TMP8:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4 5764 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5765 // CHECK14-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP9]] 5766 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[ARRAYIDX3]] to i8* 5767 // CHECK14-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[TMP8]] to i8* 5768 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 5769 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 5770 // CHECK14: for.inc: 5771 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 5772 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 5773 // CHECK14-NEXT: store i32 [[INC]], i32* [[I]], align 4 5774 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 5775 // CHECK14: for.end: 5776 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 5777 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5778 // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 5779 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5780 // CHECK14: arraydestroy.body: 5781 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5782 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 5783 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5784 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5785 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 5786 // CHECK14: arraydestroy.done4: 5787 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 5788 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 5789 // CHECK14-NEXT: ret i32 [[TMP14]] 5790 // 5791 // 5792 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 5793 // CHECK14-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5794 // CHECK14-NEXT: entry: 5795 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5796 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5797 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5798 // CHECK14-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5799 // CHECK14-NEXT: ret void 5800 // 5801 // 5802 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 5803 // CHECK14-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5804 // CHECK14-NEXT: entry: 5805 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5806 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5807 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5808 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5809 // CHECK14-NEXT: store float 0.000000e+00, float* [[F]], align 4 5810 // CHECK14-NEXT: ret void 5811 // 5812 // 5813 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 5814 // CHECK14-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5815 // CHECK14-NEXT: entry: 5816 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5817 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5818 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5819 // CHECK14-NEXT: ret void 5820 // 5821 // 5822 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 5823 // CHECK14-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5824 // CHECK14-NEXT: entry: 5825 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5826 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5827 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5828 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5829 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5830 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5831 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5832 // CHECK14-NEXT: store float [[TMP0]], float* [[F]], align 4 5833 // CHECK14-NEXT: ret void 5834 // 5835 // 5836 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 5837 // CHECK14-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5838 // CHECK14-NEXT: entry: 5839 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5840 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5841 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5842 // CHECK14-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) 5843 // CHECK14-NEXT: ret void 5844 // 5845 // 5846 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 5847 // CHECK14-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5848 // CHECK14-NEXT: entry: 5849 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5850 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5851 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5852 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5853 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5854 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5855 // CHECK14-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 5856 // CHECK14-NEXT: ret void 5857 // 5858 // 5859 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 5860 // CHECK14-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5861 // CHECK14-NEXT: entry: 5862 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5863 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5864 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5865 // CHECK14-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5866 // CHECK14-NEXT: ret void 5867 // 5868 // 5869 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 5870 // CHECK14-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5871 // CHECK14-NEXT: entry: 5872 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5873 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5874 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5875 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5876 // CHECK14-NEXT: store i32 0, i32* [[F]], align 4 5877 // CHECK14-NEXT: ret void 5878 // 5879 // 5880 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 5881 // CHECK14-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5882 // CHECK14-NEXT: entry: 5883 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5884 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5885 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5886 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5887 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5888 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5889 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5890 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 5891 // CHECK14-NEXT: ret void 5892 // 5893 // 5894 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 5895 // CHECK14-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5896 // CHECK14-NEXT: entry: 5897 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5898 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5899 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5900 // CHECK14-NEXT: ret void 5901 // 5902 // 5903 // CHECK15-LABEL: define {{[^@]+}}@main 5904 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 5905 // CHECK15-NEXT: entry: 5906 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5907 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 5908 // CHECK15-NEXT: [[G1:%.*]] = alloca double*, align 4 5909 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 5910 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5911 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5912 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 5913 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 5914 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 5915 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 5916 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 5917 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 5918 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 5919 // CHECK15-NEXT: store double* [[G]], double** [[G1]], align 4 5920 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) 5921 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 5922 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5923 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 5924 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5925 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 5926 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 5927 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 5928 // CHECK15-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 5929 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 5930 // CHECK15-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 5931 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 5932 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 5933 // CHECK15-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4 5934 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 5935 // CHECK15-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 4 5936 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 5937 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 5938 // CHECK15: for.cond: 5939 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5940 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 5941 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5942 // CHECK15: for.body: 5943 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 5944 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 5945 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP7]] 5946 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 5947 // CHECK15-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4 5948 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5949 // CHECK15-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP9]] 5950 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[ARRAYIDX3]] to i8* 5951 // CHECK15-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 5952 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 5953 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 5954 // CHECK15: for.inc: 5955 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 5956 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 5957 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 5958 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 5959 // CHECK15: for.end: 5960 // CHECK15-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 5961 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5962 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5963 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 5964 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5965 // CHECK15: arraydestroy.body: 5966 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5967 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 5968 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 5969 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5970 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 5971 // CHECK15: arraydestroy.done4: 5972 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 5973 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 5974 // CHECK15-NEXT: ret i32 [[TMP14]] 5975 // 5976 // 5977 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 5978 // CHECK15-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5979 // CHECK15-NEXT: entry: 5980 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5981 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5982 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5983 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) 5984 // CHECK15-NEXT: ret void 5985 // 5986 // 5987 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 5988 // CHECK15-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5989 // CHECK15-NEXT: entry: 5990 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5991 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5992 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5993 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5994 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5995 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5996 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull dereferenceable(4) [[THIS1]], float [[TMP0]]) 5997 // CHECK15-NEXT: ret void 5998 // 5999 // 6000 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 6001 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { 6002 // CHECK15-NEXT: entry: 6003 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6004 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 6005 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 6006 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 6007 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 6008 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 6009 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 6010 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 6011 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 6012 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 6013 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) 6014 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 6015 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 6016 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 6017 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 6018 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 6019 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 6020 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 6021 // CHECK15-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 6022 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 6023 // CHECK15-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 6024 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 6025 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 6026 // CHECK15-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4 6027 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 6028 // CHECK15-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 4 6029 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 6030 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 6031 // CHECK15: for.cond: 6032 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 6033 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 6034 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 6035 // CHECK15: for.body: 6036 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 6037 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 6038 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP7]] 6039 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 6040 // CHECK15-NEXT: [[TMP8:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4 6041 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 6042 // CHECK15-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP9]] 6043 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[ARRAYIDX3]] to i8* 6044 // CHECK15-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[TMP8]] to i8* 6045 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 6046 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 6047 // CHECK15: for.inc: 6048 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 6049 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 6050 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 6051 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 6052 // CHECK15: for.end: 6053 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 6054 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 6055 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 6056 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 6057 // CHECK15: arraydestroy.body: 6058 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 6059 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 6060 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 6061 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 6062 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 6063 // CHECK15: arraydestroy.done4: 6064 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 6065 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 6066 // CHECK15-NEXT: ret i32 [[TMP14]] 6067 // 6068 // 6069 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 6070 // CHECK15-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6071 // CHECK15-NEXT: entry: 6072 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6073 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6074 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6075 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 6076 // CHECK15-NEXT: ret void 6077 // 6078 // 6079 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 6080 // CHECK15-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6081 // CHECK15-NEXT: entry: 6082 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6083 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6084 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6085 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 6086 // CHECK15-NEXT: store float 0.000000e+00, float* [[F]], align 4 6087 // CHECK15-NEXT: ret void 6088 // 6089 // 6090 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 6091 // CHECK15-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6092 // CHECK15-NEXT: entry: 6093 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6094 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6095 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6096 // CHECK15-NEXT: ret void 6097 // 6098 // 6099 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 6100 // CHECK15-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6101 // CHECK15-NEXT: entry: 6102 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6103 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 6104 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6105 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 6106 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6107 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 6108 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 6109 // CHECK15-NEXT: store float [[TMP0]], float* [[F]], align 4 6110 // CHECK15-NEXT: ret void 6111 // 6112 // 6113 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 6114 // CHECK15-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6115 // CHECK15-NEXT: entry: 6116 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6117 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6118 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6119 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) 6120 // CHECK15-NEXT: ret void 6121 // 6122 // 6123 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 6124 // CHECK15-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6125 // CHECK15-NEXT: entry: 6126 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6127 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6128 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6129 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6130 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6131 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 6132 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 6133 // CHECK15-NEXT: ret void 6134 // 6135 // 6136 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 6137 // CHECK15-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6138 // CHECK15-NEXT: entry: 6139 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6140 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6141 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6142 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 6143 // CHECK15-NEXT: ret void 6144 // 6145 // 6146 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 6147 // CHECK15-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6148 // CHECK15-NEXT: entry: 6149 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6150 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6151 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6152 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 6153 // CHECK15-NEXT: store i32 0, i32* [[F]], align 4 6154 // CHECK15-NEXT: ret void 6155 // 6156 // 6157 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 6158 // CHECK15-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6159 // CHECK15-NEXT: entry: 6160 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6161 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6162 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6163 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6164 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6165 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 6166 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 6167 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 6168 // CHECK15-NEXT: ret void 6169 // 6170 // 6171 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 6172 // CHECK15-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6173 // CHECK15-NEXT: entry: 6174 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6175 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6176 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6177 // CHECK15-NEXT: ret void 6178 // 6179