1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
8
9 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
10 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
11 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
13 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
14
15 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK8
16 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
17 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK8
18 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10
19 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10
21
22 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
23 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
25 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
26 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
28 // expected-no-diagnostics
29 #ifndef HEADER
30 #define HEADER
31
32 template <class T>
33 struct S {
34 T f;
SS35 S(T a) : f(a) {}
SS36 S() : f() {}
operator TS37 operator T() { return T(); }
~SS38 ~S() {}
39 };
40
41 template <typename T>
tmain()42 T tmain() {
43 S<T> test;
44 T t_var = T();
45 T vec[] = {1, 2};
46 S<T> s_arr[] = {1, 2};
47 S<T> &var = test;
48 #pragma omp target
49 #pragma omp teams
50 #pragma omp distribute parallel for firstprivate(t_var, vec, s_arr, s_arr, var, var)
51 for (int i = 0; i < 2; ++i) {
52 vec[i] = t_var;
53 s_arr[i] = var;
54 }
55 return T();
56 }
57
main()58 int main() {
59 static int svar;
60 volatile double g;
61 volatile double &g1 = g;
62
63 #ifdef LAMBDA
64 [&]() {
65 static float sfvar;
66
67 #pragma omp target
68 #pragma omp teams
69 #pragma omp distribute parallel for firstprivate(g, g1, svar, sfvar)
70 for (int i = 0; i < 2; ++i) {
71
72 // addr alloca's
73
74 // private alloca's
75
76 // transfer input parameters into addr alloca's
77
78
79 // init private alloca's with addr alloca's
80 // g
81
82 // g1
83
84 // svar
85
86 // sfvar
87
88 // pass firstprivate parameters to parallel outlined function
89 // g
90
91 // g1
92
93 // svar
94
95 // sfvar
96
97
98
99 // skip initial params
100
101 // addr alloca's
102
103 // private alloca's (only for 32-bit)
104
105 // transfer input parameters into addr alloca's
106
107 // prepare parameters for lambda
108 // g
109
110 // g1
111
112 // svar
113
114 // sfvar
115
116 g = 1;
117 g1 = 1;
118 svar = 3;
119 sfvar = 4.0;
120
121 // pass params to inner lambda
122 [&]() {
123 g = 2;
124 g1 = 2;
125 svar = 4;
126 sfvar = 8.0;
127
128 }();
129 }
130 }();
131 return 0;
132 #else
133 S<float> test;
134 int t_var = 0;
135 int vec[] = {1, 2};
136 S<float> s_arr[] = {1, 2};
137 S<float> &var = test;
138
139 #pragma omp target
140 #pragma omp teams
141 #pragma omp distribute parallel for firstprivate(t_var, vec, s_arr, s_arr, var, var, svar)
142 for (int i = 0; i < 2; ++i) {
143 vec[i] = t_var;
144 s_arr[i] = var;
145 }
146 return tmain<int>();
147 #endif
148 }
149
150
151
152
153 // addr alloca's
154
155 // skip loop alloca's
156
157 // private alloca's
158
159
160 // init addr alloca's with input values
161
162 // init private alloca's with addr alloca's
163 // t-var
164
165 // vec
166
167 // s_arr
168
169 // var
170
171 // svar
172
173 // pass private alloca's to fork
174 // not dag to distinguish with S_VAR_CAST
175
176 // call destructors: var..
177
178 // ..and s_arr
179
180
181 // By OpenMP specifications, 'firstprivate' applies to both distribute and parallel for.
182 // However, the support for 'firstprivate' of 'parallel' is only used when 'parallel'
183 // is found alone. Therefore we only have one 'firstprivate' support for 'parallel for'
184 // in combination
185
186 // addr alloca's
187
188 // skip loop alloca's
189
190 // private alloca's
191
192
193 // init addr alloca's with input values
194
195 // init private alloca's with addr alloca's
196 // vec
197
198 // s_arr
199
200 // var
201
202
203 // call destructors: var..
204
205 // ..and s_arr
206
207
208 // template tmain with S_INT_TY
209
210
211
212 // addr alloca's
213
214 // skip loop alloca's
215
216 // private alloca's
217
218
219 // init addr alloca's with input values
220
221 // init private alloca's with addr alloca's
222 // t-var
223
224 // vec
225
226 // s_arr
227
228 // var
229
230 // pass private alloca's to fork
231 // not dag to distinguish with S_VAR_CAST
232
233 // call destructors: var..
234
235 // ..and s_arr
236
237
238 // By OpenMP specifications, 'firstprivate' applies to both distribute and parallel for.
239 // However, the support for 'firstprivate' of 'parallel' is only used when 'parallel'
240 // is found alone. Therefore we only have one 'firstprivate' support for 'parallel for'
241 // in combination
242
243 // addr alloca's
244
245 // skip loop alloca's
246
247 // private alloca's
248
249
250 // init addr alloca's with input values
251
252 // init private alloca's with addr alloca's
253 // vec
254
255 // s_arr
256
257 // var
258
259
260 // call destructors: var..
261
262 // ..and s_arr
263
264
265 #endif
266 // CHECK1-LABEL: define {{[^@]+}}@main
267 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
268 // CHECK1-NEXT: entry:
269 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
270 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8
271 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8
272 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
273 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
274 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8
275 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
276 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8
277 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
278 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8
279 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8
280 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
281 // CHECK1-NEXT: ret i32 0
282 //
283 //
284 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
285 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
286 // CHECK1-NEXT: entry:
287 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
288 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
289 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
290 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
291 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
292 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
293 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
294 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
295 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
296 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
297 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
298 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
299 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
300 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8
301 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
302 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]])
303 // CHECK1-NEXT: ret void
304 //
305 //
306 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
307 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
308 // CHECK1-NEXT: entry:
309 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
310 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
311 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8
312 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8
313 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
314 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8
315 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
316 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8
317 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
318 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
319 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
320 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
321 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
322 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
323 // CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8
324 // CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8
325 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca double*, align 8
326 // CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
327 // CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
328 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
329 // CHECK1-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8
330 // CHECK1-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8
331 // CHECK1-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
332 // CHECK1-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8
333 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
334 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
335 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8
336 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8
337 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
338 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
339 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
340 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
341 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
342 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
343 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8
344 // CHECK1-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8
345 // CHECK1-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8
346 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
347 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
348 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
349 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
350 // CHECK1-NEXT: [[TMP5:%.*]] = load double, double* [[TMP0]], align 8
351 // CHECK1-NEXT: store double [[TMP5]], double* [[G3]], align 8
352 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 8
353 // CHECK1-NEXT: [[TMP7:%.*]] = load double, double* [[TMP6]], align 8
354 // CHECK1-NEXT: store double [[TMP7]], double* [[G14]], align 8
355 // CHECK1-NEXT: store double* [[G14]], double** [[_TMP5]], align 8
356 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4
357 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4
358 // CHECK1-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4
359 // CHECK1-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4
360 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
361 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
362 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
363 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
364 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
365 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
366 // CHECK1: cond.true:
367 // CHECK1-NEXT: br label [[COND_END:%.*]]
368 // CHECK1: cond.false:
369 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
370 // CHECK1-NEXT: br label [[COND_END]]
371 // CHECK1: cond.end:
372 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
373 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
374 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
375 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
376 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
377 // CHECK1: omp.inner.for.cond:
378 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
379 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
380 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
381 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
382 // CHECK1: omp.inner.for.body:
383 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
384 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
385 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
386 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
387 // CHECK1-NEXT: [[TMP21:%.*]] = load double, double* [[G3]], align 8
388 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_CASTED]] to double*
389 // CHECK1-NEXT: store double [[TMP21]], double* [[CONV]], align 8
390 // CHECK1-NEXT: [[TMP22:%.*]] = load i64, i64* [[G_CASTED]], align 8
391 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP5]], align 8
392 // CHECK1-NEXT: [[TMP24:%.*]] = load volatile double, double* [[TMP23]], align 8
393 // CHECK1-NEXT: [[CONV9:%.*]] = bitcast i64* [[G1_CASTED]] to double*
394 // CHECK1-NEXT: store double [[TMP24]], double* [[CONV9]], align 8
395 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[G1_CASTED]], align 8
396 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR6]], align 4
397 // CHECK1-NEXT: [[CONV10:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
398 // CHECK1-NEXT: store i32 [[TMP26]], i32* [[CONV10]], align 4
399 // CHECK1-NEXT: [[TMP27:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
400 // CHECK1-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR7]], align 4
401 // CHECK1-NEXT: [[CONV11:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float*
402 // CHECK1-NEXT: store float [[TMP28]], float* [[CONV11]], align 4
403 // CHECK1-NEXT: [[TMP29:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8
404 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP22]], i64 [[TMP25]], i64 [[TMP27]], i64 [[TMP29]])
405 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
406 // CHECK1: omp.inner.for.inc:
407 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
408 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
409 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
410 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
411 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
412 // CHECK1: omp.inner.for.end:
413 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
414 // CHECK1: omp.loop.exit:
415 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]])
416 // CHECK1-NEXT: ret void
417 //
418 //
419 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
420 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2]] {
421 // CHECK1-NEXT: entry:
422 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
423 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
424 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
425 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
426 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
427 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
428 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
429 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
430 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
431 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
432 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
433 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
434 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
435 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
436 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
437 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
438 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
439 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
440 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
441 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
442 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
443 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
444 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
445 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
446 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
447 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
448 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
449 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
450 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
451 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8
452 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
453 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
454 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
455 // CHECK1-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP0]] to i32
456 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
457 // CHECK1-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP1]] to i32
458 // CHECK1-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
459 // CHECK1-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
460 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
461 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
462 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
463 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
464 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
465 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
466 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
467 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
468 // CHECK1: cond.true:
469 // CHECK1-NEXT: br label [[COND_END:%.*]]
470 // CHECK1: cond.false:
471 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
472 // CHECK1-NEXT: br label [[COND_END]]
473 // CHECK1: cond.end:
474 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
475 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
476 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
477 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
478 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
479 // CHECK1: omp.inner.for.cond:
480 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
481 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
482 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
483 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
484 // CHECK1: omp.inner.for.body:
485 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
486 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
487 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
488 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
489 // CHECK1-NEXT: store double 1.000000e+00, double* [[CONV]], align 8
490 // CHECK1-NEXT: [[TMP10:%.*]] = load double*, double** [[TMP]], align 8
491 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 8
492 // CHECK1-NEXT: store i32 3, i32* [[CONV2]], align 4
493 // CHECK1-NEXT: store float 4.000000e+00, float* [[CONV3]], align 4
494 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
495 // CHECK1-NEXT: store double* [[CONV]], double** [[TMP11]], align 8
496 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
497 // CHECK1-NEXT: [[TMP13:%.*]] = load double*, double** [[TMP]], align 8
498 // CHECK1-NEXT: store double* [[TMP13]], double** [[TMP12]], align 8
499 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
500 // CHECK1-NEXT: store i32* [[CONV2]], i32** [[TMP14]], align 8
501 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
502 // CHECK1-NEXT: store float* [[CONV3]], float** [[TMP15]], align 8
503 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])
504 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
505 // CHECK1: omp.body.continue:
506 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
507 // CHECK1: omp.inner.for.inc:
508 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
509 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1
510 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
511 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
512 // CHECK1: omp.inner.for.end:
513 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
514 // CHECK1: omp.loop.exit:
515 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
516 // CHECK1-NEXT: ret void
517 //
518 //
519 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
520 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
521 // CHECK1-NEXT: entry:
522 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
523 // CHECK1-NEXT: ret void
524 //
525 //
526 // CHECK3-LABEL: define {{[^@]+}}@main
527 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
528 // CHECK3-NEXT: entry:
529 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
530 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8
531 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4
532 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
533 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
534 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4
535 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
536 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4
537 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
538 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4
539 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4
540 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
541 // CHECK3-NEXT: ret i32 0
542 //
543 //
544 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
545 // CHECK3-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
546 // CHECK3-NEXT: entry:
547 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
548 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
549 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
550 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
551 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
552 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8
553 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8
554 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4
555 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
556 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
557 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
558 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
559 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
560 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
561 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
562 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
563 // CHECK3-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8
564 // CHECK3-NEXT: store double [[TMP2]], double* [[G2]], align 8
565 // CHECK3-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4
566 // CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4
567 // CHECK3-NEXT: store double [[TMP4]], double* [[G13]], align 8
568 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4
569 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4
570 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]])
571 // CHECK3-NEXT: ret void
572 //
573 //
574 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
575 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
576 // CHECK3-NEXT: entry:
577 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
578 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
579 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
580 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
581 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
582 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4
583 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
584 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4
585 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
586 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
587 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
588 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
589 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
590 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
591 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8
592 // CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8
593 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca double*, align 4
594 // CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
595 // CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
596 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
597 // CHECK3-NEXT: [[G1_CASTED:%.*]] = alloca i32, align 4
598 // CHECK3-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
599 // CHECK3-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4
600 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
601 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
602 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
603 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
604 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
605 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
606 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
607 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
608 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
609 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
610 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
611 // CHECK3-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
612 // CHECK3-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4
613 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
614 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
615 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
616 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
617 // CHECK3-NEXT: [[TMP5:%.*]] = load double, double* [[TMP0]], align 8
618 // CHECK3-NEXT: store double [[TMP5]], double* [[G3]], align 8
619 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 4
620 // CHECK3-NEXT: [[TMP7:%.*]] = load double, double* [[TMP6]], align 4
621 // CHECK3-NEXT: store double [[TMP7]], double* [[G14]], align 8
622 // CHECK3-NEXT: store double* [[G14]], double** [[_TMP5]], align 4
623 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4
624 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4
625 // CHECK3-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4
626 // CHECK3-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4
627 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
628 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
629 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
630 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
631 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
632 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
633 // CHECK3: cond.true:
634 // CHECK3-NEXT: br label [[COND_END:%.*]]
635 // CHECK3: cond.false:
636 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
637 // CHECK3-NEXT: br label [[COND_END]]
638 // CHECK3: cond.end:
639 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
640 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
641 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
642 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
643 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
644 // CHECK3: omp.inner.for.cond:
645 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
646 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
647 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
648 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
649 // CHECK3: omp.inner.for.body:
650 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
651 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
652 // CHECK3-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 4
653 // CHECK3-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 4
654 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[G1_CASTED]] to double*
655 // CHECK3-NEXT: store double [[TMP20]], double* [[CONV]], align 4
656 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[G1_CASTED]], align 4
657 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[SVAR6]], align 4
658 // CHECK3-NEXT: store i32 [[TMP22]], i32* [[SVAR_CASTED]], align 4
659 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
660 // CHECK3-NEXT: [[TMP24:%.*]] = load float, float* [[SFVAR7]], align 4
661 // CHECK3-NEXT: [[CONV9:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float*
662 // CHECK3-NEXT: store float [[TMP24]], float* [[CONV9]], align 4
663 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4
664 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, double*, i32, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], double* [[G3]], i32 [[TMP21]], i32 [[TMP23]], i32 [[TMP25]])
665 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
666 // CHECK3: omp.inner.for.inc:
667 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
668 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
669 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
670 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
671 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
672 // CHECK3: omp.inner.for.end:
673 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
674 // CHECK3: omp.loop.exit:
675 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]])
676 // CHECK3-NEXT: ret void
677 //
678 //
679 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
680 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], i32 noundef [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2]] {
681 // CHECK3-NEXT: entry:
682 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
683 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
684 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
685 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
686 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
687 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca i32, align 4
688 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
689 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
690 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
691 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
692 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
693 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
694 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
695 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
696 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
697 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8
698 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
699 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
700 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
701 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
702 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
703 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
704 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
705 // CHECK3-NEXT: store i32 [[G1]], i32* [[G1_ADDR]], align 4
706 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
707 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
708 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
709 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[G1_ADDR]] to double*
710 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
711 // CHECK3-NEXT: store double* [[CONV]], double** [[TMP]], align 4
712 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
713 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
714 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
715 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
716 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
717 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
718 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
719 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
720 // CHECK3-NEXT: [[TMP3:%.*]] = load double, double* [[TMP0]], align 8
721 // CHECK3-NEXT: store double [[TMP3]], double* [[G3]], align 8
722 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
723 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
724 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
725 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
726 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
727 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
728 // CHECK3: cond.true:
729 // CHECK3-NEXT: br label [[COND_END:%.*]]
730 // CHECK3: cond.false:
731 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
732 // CHECK3-NEXT: br label [[COND_END]]
733 // CHECK3: cond.end:
734 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
735 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
736 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
737 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
738 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
739 // CHECK3: omp.inner.for.cond:
740 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
741 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
742 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
743 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
744 // CHECK3: omp.inner.for.body:
745 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
746 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
747 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
748 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
749 // CHECK3-NEXT: store double 1.000000e+00, double* [[G3]], align 8
750 // CHECK3-NEXT: [[TMP12:%.*]] = load double*, double** [[TMP]], align 4
751 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP12]], align 4
752 // CHECK3-NEXT: store i32 3, i32* [[SVAR_ADDR]], align 4
753 // CHECK3-NEXT: store float 4.000000e+00, float* [[CONV1]], align 4
754 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
755 // CHECK3-NEXT: store double* [[G3]], double** [[TMP13]], align 4
756 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
757 // CHECK3-NEXT: [[TMP15:%.*]] = load double*, double** [[TMP]], align 4
758 // CHECK3-NEXT: store double* [[TMP15]], double** [[TMP14]], align 4
759 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
760 // CHECK3-NEXT: store i32* [[SVAR_ADDR]], i32** [[TMP16]], align 4
761 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
762 // CHECK3-NEXT: store float* [[CONV1]], float** [[TMP17]], align 4
763 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]])
764 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
765 // CHECK3: omp.body.continue:
766 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
767 // CHECK3: omp.inner.for.inc:
768 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
769 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP18]], 1
770 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
771 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
772 // CHECK3: omp.inner.for.end:
773 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
774 // CHECK3: omp.loop.exit:
775 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
776 // CHECK3-NEXT: ret void
777 //
778 //
779 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
780 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
781 // CHECK3-NEXT: entry:
782 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
783 // CHECK3-NEXT: ret void
784 //
785 //
786 // CHECK8-LABEL: define {{[^@]+}}@main
787 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
788 // CHECK8-NEXT: entry:
789 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
790 // CHECK8-NEXT: [[G:%.*]] = alloca double, align 8
791 // CHECK8-NEXT: [[G1:%.*]] = alloca double*, align 8
792 // CHECK8-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
793 // CHECK8-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
794 // CHECK8-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
795 // CHECK8-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
796 // CHECK8-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8
797 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
798 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
799 // CHECK8-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
800 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
801 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
802 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
803 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
804 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4
805 // CHECK8-NEXT: store double* [[G]], double** [[G1]], align 8
806 // CHECK8-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
807 // CHECK8-NEXT: store i32 0, i32* [[T_VAR]], align 4
808 // CHECK8-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
809 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
810 // CHECK8-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
811 // CHECK8-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
812 // CHECK8-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
813 // CHECK8-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
814 // CHECK8-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
815 // CHECK8-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
816 // CHECK8-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
817 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
818 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
819 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
820 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
821 // CHECK8-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
822 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
823 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
824 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
825 // CHECK8-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
826 // CHECK8-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
827 // CHECK8-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
828 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
829 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
830 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
831 // CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
832 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
833 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
834 // CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
835 // CHECK8-NEXT: store i8* null, i8** [[TMP13]], align 8
836 // CHECK8-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
837 // CHECK8-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
838 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
839 // CHECK8-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
840 // CHECK8-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
841 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8
842 // CHECK8-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
843 // CHECK8-NEXT: store i8* null, i8** [[TMP18]], align 8
844 // CHECK8-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
845 // CHECK8-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
846 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
847 // CHECK8-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
848 // CHECK8-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
849 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8
850 // CHECK8-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
851 // CHECK8-NEXT: store i8* null, i8** [[TMP23]], align 8
852 // CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
853 // CHECK8-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
854 // CHECK8-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8
855 // CHECK8-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
856 // CHECK8-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
857 // CHECK8-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8
858 // CHECK8-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
859 // CHECK8-NEXT: store i8* null, i8** [[TMP28]], align 8
860 // CHECK8-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
861 // CHECK8-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
862 // CHECK8-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8
863 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
864 // CHECK8-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
865 // CHECK8-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8
866 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
867 // CHECK8-NEXT: store i8* null, i8** [[TMP33]], align 8
868 // CHECK8-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
869 // CHECK8-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
870 // CHECK8-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
871 // CHECK8-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
872 // CHECK8-NEXT: store i32 1, i32* [[TMP36]], align 4
873 // CHECK8-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
874 // CHECK8-NEXT: store i32 5, i32* [[TMP37]], align 4
875 // CHECK8-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
876 // CHECK8-NEXT: store i8** [[TMP34]], i8*** [[TMP38]], align 8
877 // CHECK8-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
878 // CHECK8-NEXT: store i8** [[TMP35]], i8*** [[TMP39]], align 8
879 // CHECK8-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
880 // CHECK8-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP40]], align 8
881 // CHECK8-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
882 // CHECK8-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP41]], align 8
883 // CHECK8-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
884 // CHECK8-NEXT: store i8** null, i8*** [[TMP42]], align 8
885 // CHECK8-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
886 // CHECK8-NEXT: store i8** null, i8*** [[TMP43]], align 8
887 // CHECK8-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
888 // CHECK8-NEXT: store i64 2, i64* [[TMP44]], align 8
889 // CHECK8-NEXT: [[TMP45:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
890 // CHECK8-NEXT: [[TMP46:%.*]] = icmp ne i32 [[TMP45]], 0
891 // CHECK8-NEXT: br i1 [[TMP46]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
892 // CHECK8: omp_offload.failed:
893 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
894 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]]
895 // CHECK8: omp_offload.cont:
896 // CHECK8-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
897 // CHECK8-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
898 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
899 // CHECK8-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
900 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
901 // CHECK8: arraydestroy.body:
902 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP47]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
903 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
904 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
905 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
906 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
907 // CHECK8: arraydestroy.done3:
908 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
909 // CHECK8-NEXT: [[TMP48:%.*]] = load i32, i32* [[RETVAL]], align 4
910 // CHECK8-NEXT: ret i32 [[TMP48]]
911 //
912 //
913 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
914 // CHECK8-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
915 // CHECK8-NEXT: entry:
916 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
917 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
918 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
919 // CHECK8-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
920 // CHECK8-NEXT: ret void
921 //
922 //
923 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
924 // CHECK8-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
925 // CHECK8-NEXT: entry:
926 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
927 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
928 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
929 // CHECK8-NEXT: store float [[A]], float* [[A_ADDR]], align 4
930 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
931 // CHECK8-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
932 // CHECK8-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
933 // CHECK8-NEXT: ret void
934 //
935 //
936 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
937 // CHECK8-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
938 // CHECK8-NEXT: entry:
939 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
940 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
941 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
942 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
943 // CHECK8-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
944 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
945 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
946 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
947 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
948 // CHECK8-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
949 // CHECK8-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
950 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
951 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
952 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
953 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
954 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
955 // CHECK8-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
956 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
957 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]])
958 // CHECK8-NEXT: ret void
959 //
960 //
961 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined.
962 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
963 // CHECK8-NEXT: entry:
964 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
965 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
966 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
967 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
968 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
969 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
970 // CHECK8-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
971 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
972 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
973 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
974 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
975 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
976 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
977 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
978 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
979 // CHECK8-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
980 // CHECK8-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
981 // CHECK8-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
982 // CHECK8-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4
983 // CHECK8-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 8
984 // CHECK8-NEXT: [[SVAR9:%.*]] = alloca i32, align 4
985 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
986 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
987 // CHECK8-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
988 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
989 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
990 // CHECK8-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
991 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
992 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
993 // CHECK8-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
994 // CHECK8-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
995 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
996 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
997 // CHECK8-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
998 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
999 // CHECK8-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
1000 // CHECK8-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
1001 // CHECK8-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1002 // CHECK8-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8
1003 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1004 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1005 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1006 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1007 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
1008 // CHECK8-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4
1009 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1010 // CHECK8-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1011 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 8, i1 false)
1012 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1013 // CHECK8-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S*
1014 // CHECK8-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1015 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]]
1016 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1017 // CHECK8: omp.arraycpy.body:
1018 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1019 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1020 // CHECK8-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1021 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1022 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 4, i1 false)
1023 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1024 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1025 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]]
1026 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
1027 // CHECK8: omp.arraycpy.done6:
1028 // CHECK8-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
1029 // CHECK8-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8*
1030 // CHECK8-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
1031 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false)
1032 // CHECK8-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8
1033 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4
1034 // CHECK8-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4
1035 // CHECK8-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1036 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
1037 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1038 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1039 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1
1040 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1041 // CHECK8: cond.true:
1042 // CHECK8-NEXT: br label [[COND_END:%.*]]
1043 // CHECK8: cond.false:
1044 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1045 // CHECK8-NEXT: br label [[COND_END]]
1046 // CHECK8: cond.end:
1047 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]
1048 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1049 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1050 // CHECK8-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4
1051 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1052 // CHECK8: omp.inner.for.cond:
1053 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1054 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1055 // CHECK8-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]]
1056 // CHECK8-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1057 // CHECK8: omp.inner.for.cond.cleanup:
1058 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1059 // CHECK8: omp.inner.for.body:
1060 // CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1061 // CHECK8-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64
1062 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1063 // CHECK8-NEXT: [[TMP27:%.*]] = zext i32 [[TMP26]] to i64
1064 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[T_VAR3]], align 4
1065 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1066 // CHECK8-NEXT: store i32 [[TMP28]], i32* [[CONV]], align 4
1067 // CHECK8-NEXT: [[TMP29:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1068 // CHECK8-NEXT: [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8
1069 // CHECK8-NEXT: [[TMP31:%.*]] = load i32, i32* [[SVAR9]], align 4
1070 // CHECK8-NEXT: [[CONV11:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
1071 // CHECK8-NEXT: store i32 [[TMP31]], i32* [[CONV11]], align 4
1072 // CHECK8-NEXT: [[TMP32:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
1073 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP25]], i64 [[TMP27]], [2 x i32]* [[VEC4]], i64 [[TMP29]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP30]], i64 [[TMP32]])
1074 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1075 // CHECK8: omp.inner.for.inc:
1076 // CHECK8-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1077 // CHECK8-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1078 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
1079 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1080 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
1081 // CHECK8: omp.inner.for.end:
1082 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1083 // CHECK8: omp.loop.exit:
1084 // CHECK8-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1085 // CHECK8-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
1086 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]])
1087 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
1088 // CHECK8-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1089 // CHECK8-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2
1090 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1091 // CHECK8: arraydestroy.body:
1092 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP37]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1093 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1094 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1095 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
1096 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
1097 // CHECK8: arraydestroy.done13:
1098 // CHECK8-NEXT: ret void
1099 //
1100 //
1101 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..1
1102 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] {
1103 // CHECK8-NEXT: entry:
1104 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1105 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1106 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1107 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1108 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1109 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1110 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1111 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1112 // CHECK8-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
1113 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1114 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1115 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1116 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1117 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1118 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1119 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1120 // CHECK8-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 4
1121 // CHECK8-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4
1122 // CHECK8-NEXT: [[VAR8:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1123 // CHECK8-NEXT: [[_TMP9:%.*]] = alloca %struct.S*, align 8
1124 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
1125 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1126 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1127 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1128 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1129 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1130 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1131 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1132 // CHECK8-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1133 // CHECK8-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
1134 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1135 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1136 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1137 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1138 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
1139 // CHECK8-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
1140 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1141 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1142 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1143 // CHECK8-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP3]] to i32
1144 // CHECK8-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1145 // CHECK8-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP4]] to i32
1146 // CHECK8-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
1147 // CHECK8-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
1148 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1149 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1150 // CHECK8-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8*
1151 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
1152 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i64 8, i1 false)
1153 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0
1154 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S*
1155 // CHECK8-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1156 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP8]]
1157 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1158 // CHECK8: omp.arraycpy.body:
1159 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1160 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1161 // CHECK8-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1162 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1163 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false)
1164 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1165 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1166 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]]
1167 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]]
1168 // CHECK8: omp.arraycpy.done7:
1169 // CHECK8-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1170 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR8]] to i8*
1171 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP11]] to i8*
1172 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false)
1173 // CHECK8-NEXT: store %struct.S* [[VAR8]], %struct.S** [[_TMP9]], align 8
1174 // CHECK8-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1175 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
1176 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1177 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1178 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1
1179 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1180 // CHECK8: cond.true:
1181 // CHECK8-NEXT: br label [[COND_END:%.*]]
1182 // CHECK8: cond.false:
1183 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1184 // CHECK8-NEXT: br label [[COND_END]]
1185 // CHECK8: cond.end:
1186 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
1187 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1188 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1189 // CHECK8-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
1190 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1191 // CHECK8: omp.inner.for.cond:
1192 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1193 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1194 // CHECK8-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
1195 // CHECK8-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1196 // CHECK8: omp.inner.for.cond.cleanup:
1197 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1198 // CHECK8: omp.inner.for.body:
1199 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1200 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
1201 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1202 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1203 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV]], align 4
1204 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4
1205 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
1206 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i64 0, i64 [[IDXPROM]]
1207 // CHECK8-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4
1208 // CHECK8-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP9]], align 8
1209 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4
1210 // CHECK8-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP25]] to i64
1211 // CHECK8-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i64 0, i64 [[IDXPROM11]]
1212 // CHECK8-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[ARRAYIDX12]] to i8*
1213 // CHECK8-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[TMP24]] to i8*
1214 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false)
1215 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1216 // CHECK8: omp.body.continue:
1217 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1218 // CHECK8: omp.inner.for.inc:
1219 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1220 // CHECK8-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP28]], 1
1221 // CHECK8-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
1222 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
1223 // CHECK8: omp.inner.for.end:
1224 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1225 // CHECK8: omp.loop.exit:
1226 // CHECK8-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1227 // CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
1228 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
1229 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR8]]) #[[ATTR4]]
1230 // CHECK8-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0
1231 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2
1232 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1233 // CHECK8: arraydestroy.body:
1234 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1235 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1236 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1237 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
1238 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
1239 // CHECK8: arraydestroy.done15:
1240 // CHECK8-NEXT: ret void
1241 //
1242 //
1243 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1244 // CHECK8-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1245 // CHECK8-NEXT: entry:
1246 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1247 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1248 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1249 // CHECK8-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1250 // CHECK8-NEXT: ret void
1251 //
1252 //
1253 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1254 // CHECK8-SAME: () #[[ATTR5:[0-9]+]] comdat {
1255 // CHECK8-NEXT: entry:
1256 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1257 // CHECK8-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1258 // CHECK8-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1259 // CHECK8-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1260 // CHECK8-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1261 // CHECK8-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8
1262 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1263 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1264 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
1265 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
1266 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
1267 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1268 // CHECK8-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
1269 // CHECK8-NEXT: store i32 0, i32* [[T_VAR]], align 4
1270 // CHECK8-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1271 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1272 // CHECK8-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1273 // CHECK8-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
1274 // CHECK8-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1275 // CHECK8-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
1276 // CHECK8-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1277 // CHECK8-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
1278 // CHECK8-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
1279 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1280 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1281 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
1282 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1283 // CHECK8-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1284 // CHECK8-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1285 // CHECK8-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1286 // CHECK8-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1287 // CHECK8-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1288 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8
1289 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1290 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1291 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
1292 // CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1293 // CHECK8-NEXT: store i8* null, i8** [[TMP11]], align 8
1294 // CHECK8-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1295 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
1296 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8
1297 // CHECK8-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1298 // CHECK8-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1299 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1300 // CHECK8-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1301 // CHECK8-NEXT: store i8* null, i8** [[TMP16]], align 8
1302 // CHECK8-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1303 // CHECK8-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
1304 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
1305 // CHECK8-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1306 // CHECK8-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
1307 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8
1308 // CHECK8-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1309 // CHECK8-NEXT: store i8* null, i8** [[TMP21]], align 8
1310 // CHECK8-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1311 // CHECK8-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
1312 // CHECK8-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8
1313 // CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1314 // CHECK8-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
1315 // CHECK8-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8
1316 // CHECK8-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1317 // CHECK8-NEXT: store i8* null, i8** [[TMP26]], align 8
1318 // CHECK8-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1319 // CHECK8-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1320 // CHECK8-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1321 // CHECK8-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1322 // CHECK8-NEXT: store i32 1, i32* [[TMP29]], align 4
1323 // CHECK8-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1324 // CHECK8-NEXT: store i32 4, i32* [[TMP30]], align 4
1325 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1326 // CHECK8-NEXT: store i8** [[TMP27]], i8*** [[TMP31]], align 8
1327 // CHECK8-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1328 // CHECK8-NEXT: store i8** [[TMP28]], i8*** [[TMP32]], align 8
1329 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1330 // CHECK8-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP33]], align 8
1331 // CHECK8-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1332 // CHECK8-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP34]], align 8
1333 // CHECK8-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1334 // CHECK8-NEXT: store i8** null, i8*** [[TMP35]], align 8
1335 // CHECK8-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1336 // CHECK8-NEXT: store i8** null, i8*** [[TMP36]], align 8
1337 // CHECK8-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1338 // CHECK8-NEXT: store i64 2, i64* [[TMP37]], align 8
1339 // CHECK8-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1340 // CHECK8-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
1341 // CHECK8-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1342 // CHECK8: omp_offload.failed:
1343 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
1344 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]]
1345 // CHECK8: omp_offload.cont:
1346 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4
1347 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1348 // CHECK8-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1349 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1350 // CHECK8: arraydestroy.body:
1351 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1352 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1353 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1354 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1355 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1356 // CHECK8: arraydestroy.done2:
1357 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1358 // CHECK8-NEXT: [[TMP41:%.*]] = load i32, i32* [[RETVAL]], align 4
1359 // CHECK8-NEXT: ret i32 [[TMP41]]
1360 //
1361 //
1362 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1363 // CHECK8-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1364 // CHECK8-NEXT: entry:
1365 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1366 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1367 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1368 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1369 // CHECK8-NEXT: store float 0.000000e+00, float* [[F]], align 4
1370 // CHECK8-NEXT: ret void
1371 //
1372 //
1373 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1374 // CHECK8-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1375 // CHECK8-NEXT: entry:
1376 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1377 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1378 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1379 // CHECK8-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1380 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1381 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1382 // CHECK8-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1383 // CHECK8-NEXT: store float [[TMP0]], float* [[F]], align 4
1384 // CHECK8-NEXT: ret void
1385 //
1386 //
1387 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1388 // CHECK8-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1389 // CHECK8-NEXT: entry:
1390 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1391 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1392 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1393 // CHECK8-NEXT: ret void
1394 //
1395 //
1396 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1397 // CHECK8-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1398 // CHECK8-NEXT: entry:
1399 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1400 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1401 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1402 // CHECK8-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1403 // CHECK8-NEXT: ret void
1404 //
1405 //
1406 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1407 // CHECK8-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1408 // CHECK8-NEXT: entry:
1409 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1410 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1411 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1412 // CHECK8-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1413 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1414 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1415 // CHECK8-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
1416 // CHECK8-NEXT: ret void
1417 //
1418 //
1419 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48
1420 // CHECK8-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1421 // CHECK8-NEXT: entry:
1422 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1423 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1424 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1425 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1426 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1427 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1428 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1429 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1430 // CHECK8-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1431 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1432 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1433 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1434 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1435 // CHECK8-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
1436 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1437 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
1438 // CHECK8-NEXT: ret void
1439 //
1440 //
1441 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..2
1442 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1443 // CHECK8-NEXT: entry:
1444 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1445 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1446 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1447 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1448 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1449 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1450 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1451 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1452 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1453 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1454 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1455 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1456 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1457 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1458 // CHECK8-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1459 // CHECK8-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1460 // CHECK8-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1461 // CHECK8-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1462 // CHECK8-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8
1463 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
1464 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1465 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1466 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1467 // CHECK8-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1468 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1469 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1470 // CHECK8-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1471 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1472 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1473 // CHECK8-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1474 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1475 // CHECK8-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
1476 // CHECK8-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1477 // CHECK8-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
1478 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1479 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1480 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1481 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1482 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
1483 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4
1484 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1485 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1486 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 8, i1 false)
1487 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1488 // CHECK8-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0*
1489 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1490 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]]
1491 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1492 // CHECK8: omp.arraycpy.body:
1493 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1494 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1495 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1496 // CHECK8-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1497 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false)
1498 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1499 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1500 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
1501 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
1502 // CHECK8: omp.arraycpy.done6:
1503 // CHECK8-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
1504 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
1505 // CHECK8-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
1506 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false)
1507 // CHECK8-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8
1508 // CHECK8-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1509 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
1510 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1511 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1512 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1
1513 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1514 // CHECK8: cond.true:
1515 // CHECK8-NEXT: br label [[COND_END:%.*]]
1516 // CHECK8: cond.false:
1517 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1518 // CHECK8-NEXT: br label [[COND_END]]
1519 // CHECK8: cond.end:
1520 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
1521 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1522 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1523 // CHECK8-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
1524 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1525 // CHECK8: omp.inner.for.cond:
1526 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1527 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1528 // CHECK8-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
1529 // CHECK8-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1530 // CHECK8: omp.inner.for.cond.cleanup:
1531 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1532 // CHECK8: omp.inner.for.body:
1533 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1534 // CHECK8-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
1535 // CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1536 // CHECK8-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64
1537 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4
1538 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1539 // CHECK8-NEXT: store i32 [[TMP26]], i32* [[CONV]], align 4
1540 // CHECK8-NEXT: [[TMP27:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1541 // CHECK8-NEXT: [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8
1542 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP23]], i64 [[TMP25]], [2 x i32]* [[VEC4]], i64 [[TMP27]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP28]])
1543 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1544 // CHECK8: omp.inner.for.inc:
1545 // CHECK8-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1546 // CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1547 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
1548 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1549 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
1550 // CHECK8: omp.inner.for.end:
1551 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1552 // CHECK8: omp.loop.exit:
1553 // CHECK8-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1554 // CHECK8-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
1555 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]])
1556 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
1557 // CHECK8-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1558 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2
1559 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1560 // CHECK8: arraydestroy.body:
1561 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1562 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1563 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1564 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
1565 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
1566 // CHECK8: arraydestroy.done11:
1567 // CHECK8-NEXT: ret void
1568 //
1569 //
1570 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..3
1571 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1572 // CHECK8-NEXT: entry:
1573 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1574 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1575 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1576 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1577 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1578 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1579 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1580 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1581 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1582 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1583 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1584 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1585 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1586 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1587 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1588 // CHECK8-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1589 // CHECK8-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1590 // CHECK8-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1591 // CHECK8-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8
1592 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
1593 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1594 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1595 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1596 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1597 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1598 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1599 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1600 // CHECK8-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1601 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1602 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1603 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1604 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1605 // CHECK8-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
1606 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1607 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1608 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1609 // CHECK8-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP3]] to i32
1610 // CHECK8-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1611 // CHECK8-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP4]] to i32
1612 // CHECK8-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
1613 // CHECK8-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
1614 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1615 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1616 // CHECK8-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1617 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
1618 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i64 8, i1 false)
1619 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1620 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP1]] to %struct.S.0*
1621 // CHECK8-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1622 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]]
1623 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1624 // CHECK8: omp.arraycpy.body:
1625 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1626 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1627 // CHECK8-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1628 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1629 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false)
1630 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1631 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1632 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]]
1633 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
1634 // CHECK8: omp.arraycpy.done6:
1635 // CHECK8-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1636 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
1637 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8*
1638 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false)
1639 // CHECK8-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8
1640 // CHECK8-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1641 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
1642 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1643 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1644 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1
1645 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1646 // CHECK8: cond.true:
1647 // CHECK8-NEXT: br label [[COND_END:%.*]]
1648 // CHECK8: cond.false:
1649 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1650 // CHECK8-NEXT: br label [[COND_END]]
1651 // CHECK8: cond.end:
1652 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
1653 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1654 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1655 // CHECK8-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
1656 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1657 // CHECK8: omp.inner.for.cond:
1658 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1659 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1660 // CHECK8-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
1661 // CHECK8-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1662 // CHECK8: omp.inner.for.cond.cleanup:
1663 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1664 // CHECK8: omp.inner.for.body:
1665 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1666 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
1667 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1668 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1669 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV]], align 4
1670 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4
1671 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
1672 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
1673 // CHECK8-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4
1674 // CHECK8-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8
1675 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4
1676 // CHECK8-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP25]] to i64
1677 // CHECK8-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
1678 // CHECK8-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8*
1679 // CHECK8-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8*
1680 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false)
1681 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1682 // CHECK8: omp.body.continue:
1683 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1684 // CHECK8: omp.inner.for.inc:
1685 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1686 // CHECK8-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1
1687 // CHECK8-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
1688 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
1689 // CHECK8: omp.inner.for.end:
1690 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1691 // CHECK8: omp.loop.exit:
1692 // CHECK8-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1693 // CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
1694 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
1695 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
1696 // CHECK8-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1697 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2
1698 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1699 // CHECK8: arraydestroy.body:
1700 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1701 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1702 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1703 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
1704 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
1705 // CHECK8: arraydestroy.done14:
1706 // CHECK8-NEXT: ret void
1707 //
1708 //
1709 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1710 // CHECK8-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1711 // CHECK8-NEXT: entry:
1712 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1713 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1714 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1715 // CHECK8-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1716 // CHECK8-NEXT: ret void
1717 //
1718 //
1719 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1720 // CHECK8-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1721 // CHECK8-NEXT: entry:
1722 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1723 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1724 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1725 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1726 // CHECK8-NEXT: store i32 0, i32* [[F]], align 4
1727 // CHECK8-NEXT: ret void
1728 //
1729 //
1730 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1731 // CHECK8-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1732 // CHECK8-NEXT: entry:
1733 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1734 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1735 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1736 // CHECK8-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1737 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1738 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1739 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1740 // CHECK8-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
1741 // CHECK8-NEXT: ret void
1742 //
1743 //
1744 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1745 // CHECK8-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1746 // CHECK8-NEXT: entry:
1747 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1748 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1749 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1750 // CHECK8-NEXT: ret void
1751 //
1752 //
1753 // CHECK8-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1754 // CHECK8-SAME: () #[[ATTR6:[0-9]+]] {
1755 // CHECK8-NEXT: entry:
1756 // CHECK8-NEXT: call void @__tgt_register_requires(i64 1)
1757 // CHECK8-NEXT: ret void
1758 //
1759 //
1760 // CHECK10-LABEL: define {{[^@]+}}@main
1761 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
1762 // CHECK10-NEXT: entry:
1763 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1764 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8
1765 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 4
1766 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1767 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1768 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1769 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1770 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4
1771 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
1772 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1773 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
1774 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
1775 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
1776 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
1777 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1778 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
1779 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 4
1780 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
1781 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4
1782 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1783 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
1784 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1785 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
1786 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
1787 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
1788 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
1789 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
1790 // CHECK10-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
1791 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1792 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
1793 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
1794 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
1795 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
1796 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
1797 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
1798 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
1799 // CHECK10-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
1800 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1801 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
1802 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
1803 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1804 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
1805 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
1806 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1807 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 4
1808 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1809 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1810 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
1811 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1812 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
1813 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4
1814 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1815 // CHECK10-NEXT: store i8* null, i8** [[TMP18]], align 4
1816 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1817 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
1818 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
1819 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1820 // CHECK10-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
1821 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4
1822 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1823 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 4
1824 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1825 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
1826 // CHECK10-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4
1827 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1828 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
1829 // CHECK10-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4
1830 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1831 // CHECK10-NEXT: store i8* null, i8** [[TMP28]], align 4
1832 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1833 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
1834 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4
1835 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1836 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
1837 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4
1838 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1839 // CHECK10-NEXT: store i8* null, i8** [[TMP33]], align 4
1840 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1841 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1842 // CHECK10-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1843 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1844 // CHECK10-NEXT: store i32 1, i32* [[TMP36]], align 4
1845 // CHECK10-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1846 // CHECK10-NEXT: store i32 5, i32* [[TMP37]], align 4
1847 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1848 // CHECK10-NEXT: store i8** [[TMP34]], i8*** [[TMP38]], align 4
1849 // CHECK10-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1850 // CHECK10-NEXT: store i8** [[TMP35]], i8*** [[TMP39]], align 4
1851 // CHECK10-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1852 // CHECK10-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP40]], align 4
1853 // CHECK10-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1854 // CHECK10-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP41]], align 4
1855 // CHECK10-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1856 // CHECK10-NEXT: store i8** null, i8*** [[TMP42]], align 4
1857 // CHECK10-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1858 // CHECK10-NEXT: store i8** null, i8*** [[TMP43]], align 4
1859 // CHECK10-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1860 // CHECK10-NEXT: store i64 2, i64* [[TMP44]], align 8
1861 // CHECK10-NEXT: [[TMP45:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1862 // CHECK10-NEXT: [[TMP46:%.*]] = icmp ne i32 [[TMP45]], 0
1863 // CHECK10-NEXT: br i1 [[TMP46]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1864 // CHECK10: omp_offload.failed:
1865 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
1866 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
1867 // CHECK10: omp_offload.cont:
1868 // CHECK10-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
1869 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1870 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1871 // CHECK10-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
1872 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1873 // CHECK10: arraydestroy.body:
1874 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP47]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1875 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1876 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1877 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1878 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1879 // CHECK10: arraydestroy.done2:
1880 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1881 // CHECK10-NEXT: [[TMP48:%.*]] = load i32, i32* [[RETVAL]], align 4
1882 // CHECK10-NEXT: ret i32 [[TMP48]]
1883 //
1884 //
1885 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1886 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1887 // CHECK10-NEXT: entry:
1888 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1889 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1890 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1891 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1892 // CHECK10-NEXT: ret void
1893 //
1894 //
1895 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1896 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1897 // CHECK10-NEXT: entry:
1898 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1899 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1900 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1901 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1902 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1903 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1904 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
1905 // CHECK10-NEXT: ret void
1906 //
1907 //
1908 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
1909 // CHECK10-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1910 // CHECK10-NEXT: entry:
1911 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1912 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
1913 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
1914 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
1915 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
1916 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
1917 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
1918 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
1919 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
1920 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
1921 // CHECK10-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
1922 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
1923 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
1924 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
1925 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
1926 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
1927 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]])
1928 // CHECK10-NEXT: ret void
1929 //
1930 //
1931 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
1932 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1933 // CHECK10-NEXT: entry:
1934 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1935 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1936 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
1937 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
1938 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
1939 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
1940 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
1941 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
1942 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
1943 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1944 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1945 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1946 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1947 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1948 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1949 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1950 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1951 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1952 // CHECK10-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1953 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 4
1954 // CHECK10-NEXT: [[SVAR9:%.*]] = alloca i32, align 4
1955 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
1956 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1957 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
1958 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1959 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1960 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
1961 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
1962 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
1963 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
1964 // CHECK10-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
1965 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
1966 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
1967 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
1968 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
1969 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
1970 // CHECK10-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
1971 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
1972 // CHECK10-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4
1973 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1974 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1975 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1976 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1977 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
1978 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4
1979 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1980 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1981 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 8, i1 false)
1982 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1983 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S*
1984 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
1985 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]]
1986 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1987 // CHECK10: omp.arraycpy.body:
1988 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1989 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1990 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1991 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1992 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 4, i1 false)
1993 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1994 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1995 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]]
1996 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
1997 // CHECK10: omp.arraycpy.done6:
1998 // CHECK10-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
1999 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8*
2000 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
2001 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false)
2002 // CHECK10-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4
2003 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4
2004 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4
2005 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2006 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
2007 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2008 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2009 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1
2010 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2011 // CHECK10: cond.true:
2012 // CHECK10-NEXT: br label [[COND_END:%.*]]
2013 // CHECK10: cond.false:
2014 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2015 // CHECK10-NEXT: br label [[COND_END]]
2016 // CHECK10: cond.end:
2017 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]
2018 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2019 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2020 // CHECK10-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4
2021 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2022 // CHECK10: omp.inner.for.cond:
2023 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2024 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2025 // CHECK10-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]]
2026 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2027 // CHECK10: omp.inner.for.cond.cleanup:
2028 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2029 // CHECK10: omp.inner.for.body:
2030 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2031 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2032 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4
2033 // CHECK10-NEXT: store i32 [[TMP26]], i32* [[T_VAR_CASTED]], align 4
2034 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2035 // CHECK10-NEXT: [[TMP28:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4
2036 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[SVAR9]], align 4
2037 // CHECK10-NEXT: store i32 [[TMP29]], i32* [[SVAR_CASTED]], align 4
2038 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
2039 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP24]], i32 [[TMP25]], [2 x i32]* [[VEC4]], i32 [[TMP27]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP28]], i32 [[TMP30]])
2040 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2041 // CHECK10: omp.inner.for.inc:
2042 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2043 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2044 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
2045 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2046 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2047 // CHECK10: omp.inner.for.end:
2048 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2049 // CHECK10: omp.loop.exit:
2050 // CHECK10-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2051 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
2052 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
2053 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
2054 // CHECK10-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
2055 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2
2056 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2057 // CHECK10: arraydestroy.body:
2058 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP35]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2059 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2060 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2061 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
2062 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
2063 // CHECK10: arraydestroy.done12:
2064 // CHECK10-NEXT: ret void
2065 //
2066 //
2067 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
2068 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] {
2069 // CHECK10-NEXT: entry:
2070 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2071 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2072 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2073 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2074 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2075 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2076 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
2077 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
2078 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
2079 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
2080 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2081 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2082 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2083 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2084 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2085 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2086 // CHECK10-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4
2087 // CHECK10-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4
2088 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2089 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4
2090 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2091 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2092 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2093 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2094 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2095 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2096 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2097 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2098 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
2099 // CHECK10-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
2100 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2101 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2102 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
2103 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
2104 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2105 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2106 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2107 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2108 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4
2109 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
2110 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2111 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2112 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
2113 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
2114 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 8, i1 false)
2115 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
2116 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S*
2117 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2118 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP8]]
2119 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2120 // CHECK10: omp.arraycpy.body:
2121 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2122 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2123 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2124 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2125 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false)
2126 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2127 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2128 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]]
2129 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
2130 // CHECK10: omp.arraycpy.done4:
2131 // CHECK10-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2132 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR5]] to i8*
2133 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP11]] to i8*
2134 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false)
2135 // CHECK10-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4
2136 // CHECK10-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2137 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
2138 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2139 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2140 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1
2141 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2142 // CHECK10: cond.true:
2143 // CHECK10-NEXT: br label [[COND_END:%.*]]
2144 // CHECK10: cond.false:
2145 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2146 // CHECK10-NEXT: br label [[COND_END]]
2147 // CHECK10: cond.end:
2148 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
2149 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2150 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2151 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
2152 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2153 // CHECK10: omp.inner.for.cond:
2154 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2155 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2156 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
2157 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2158 // CHECK10: omp.inner.for.cond.cleanup:
2159 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2160 // CHECK10: omp.inner.for.body:
2161 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2162 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
2163 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2164 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2165 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4
2166 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4
2167 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP23]]
2168 // CHECK10-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4
2169 // CHECK10-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4
2170 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4
2171 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 [[TMP25]]
2172 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8*
2173 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[TMP24]] to i8*
2174 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false)
2175 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2176 // CHECK10: omp.body.continue:
2177 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2178 // CHECK10: omp.inner.for.inc:
2179 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2180 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1
2181 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
2182 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2183 // CHECK10: omp.inner.for.end:
2184 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2185 // CHECK10: omp.loop.exit:
2186 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2187 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
2188 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
2189 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2190 // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
2191 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i32 2
2192 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2193 // CHECK10: arraydestroy.body:
2194 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2195 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2196 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2197 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
2198 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
2199 // CHECK10: arraydestroy.done11:
2200 // CHECK10-NEXT: ret void
2201 //
2202 //
2203 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2204 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2205 // CHECK10-NEXT: entry:
2206 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2207 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2208 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2209 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2210 // CHECK10-NEXT: ret void
2211 //
2212 //
2213 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2214 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat {
2215 // CHECK10-NEXT: entry:
2216 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2217 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2218 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2219 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2220 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2221 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4
2222 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
2223 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2224 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
2225 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
2226 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
2227 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2228 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
2229 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4
2230 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2231 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
2232 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2233 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
2234 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
2235 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
2236 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
2237 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
2238 // CHECK10-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
2239 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2240 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
2241 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2242 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2243 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2244 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2245 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2246 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
2247 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
2248 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2249 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
2250 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
2251 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2252 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 4
2253 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2254 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
2255 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4
2256 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2257 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2258 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
2259 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2260 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 4
2261 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2262 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
2263 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
2264 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2265 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
2266 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4
2267 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2268 // CHECK10-NEXT: store i8* null, i8** [[TMP21]], align 4
2269 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2270 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
2271 // CHECK10-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4
2272 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2273 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
2274 // CHECK10-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4
2275 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2276 // CHECK10-NEXT: store i8* null, i8** [[TMP26]], align 4
2277 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2278 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2279 // CHECK10-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2280 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2281 // CHECK10-NEXT: store i32 1, i32* [[TMP29]], align 4
2282 // CHECK10-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2283 // CHECK10-NEXT: store i32 4, i32* [[TMP30]], align 4
2284 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2285 // CHECK10-NEXT: store i8** [[TMP27]], i8*** [[TMP31]], align 4
2286 // CHECK10-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2287 // CHECK10-NEXT: store i8** [[TMP28]], i8*** [[TMP32]], align 4
2288 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2289 // CHECK10-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP33]], align 4
2290 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2291 // CHECK10-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP34]], align 4
2292 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2293 // CHECK10-NEXT: store i8** null, i8*** [[TMP35]], align 4
2294 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2295 // CHECK10-NEXT: store i8** null, i8*** [[TMP36]], align 4
2296 // CHECK10-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2297 // CHECK10-NEXT: store i64 2, i64* [[TMP37]], align 8
2298 // CHECK10-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2299 // CHECK10-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
2300 // CHECK10-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2301 // CHECK10: omp_offload.failed:
2302 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
2303 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
2304 // CHECK10: omp_offload.cont:
2305 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
2306 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2307 // CHECK10-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2308 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2309 // CHECK10: arraydestroy.body:
2310 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2311 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2312 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2313 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2314 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2315 // CHECK10: arraydestroy.done2:
2316 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2317 // CHECK10-NEXT: [[TMP41:%.*]] = load i32, i32* [[RETVAL]], align 4
2318 // CHECK10-NEXT: ret i32 [[TMP41]]
2319 //
2320 //
2321 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2322 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2323 // CHECK10-NEXT: entry:
2324 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2325 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2326 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2327 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2328 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4
2329 // CHECK10-NEXT: ret void
2330 //
2331 //
2332 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2333 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2334 // CHECK10-NEXT: entry:
2335 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2336 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2337 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2338 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2339 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2340 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2341 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2342 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4
2343 // CHECK10-NEXT: ret void
2344 //
2345 //
2346 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2347 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2348 // CHECK10-NEXT: entry:
2349 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2350 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2351 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2352 // CHECK10-NEXT: ret void
2353 //
2354 //
2355 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2356 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2357 // CHECK10-NEXT: entry:
2358 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2359 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2360 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2361 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2362 // CHECK10-NEXT: ret void
2363 //
2364 //
2365 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2366 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2367 // CHECK10-NEXT: entry:
2368 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2369 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2370 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2371 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2372 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2373 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2374 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
2375 // CHECK10-NEXT: ret void
2376 //
2377 //
2378 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48
2379 // CHECK10-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2380 // CHECK10-NEXT: entry:
2381 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2382 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2383 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
2384 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
2385 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
2386 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2387 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2388 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2389 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
2390 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2391 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2392 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
2393 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
2394 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2395 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
2396 // CHECK10-NEXT: ret void
2397 //
2398 //
2399 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2
2400 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2401 // CHECK10-NEXT: entry:
2402 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2403 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2404 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
2405 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2406 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
2407 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
2408 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
2409 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
2410 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2411 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2412 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2413 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2414 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2415 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2416 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
2417 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
2418 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
2419 // CHECK10-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2420 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 4
2421 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2422 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2423 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2424 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2425 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
2426 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2427 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2428 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
2429 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
2430 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2431 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2432 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
2433 // CHECK10-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
2434 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2435 // CHECK10-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4
2436 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2437 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2438 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2439 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2440 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
2441 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4
2442 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2443 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2444 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 8, i1 false)
2445 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2446 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0*
2447 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2448 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]]
2449 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2450 // CHECK10: omp.arraycpy.body:
2451 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2452 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2453 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2454 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2455 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false)
2456 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2457 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2458 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
2459 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
2460 // CHECK10: omp.arraycpy.done6:
2461 // CHECK10-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
2462 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
2463 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
2464 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false)
2465 // CHECK10-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4
2466 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2467 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
2468 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2469 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2470 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1
2471 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2472 // CHECK10: cond.true:
2473 // CHECK10-NEXT: br label [[COND_END:%.*]]
2474 // CHECK10: cond.false:
2475 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2476 // CHECK10-NEXT: br label [[COND_END]]
2477 // CHECK10: cond.end:
2478 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
2479 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2480 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2481 // CHECK10-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
2482 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2483 // CHECK10: omp.inner.for.cond:
2484 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2485 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2486 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
2487 // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2488 // CHECK10: omp.inner.for.cond.cleanup:
2489 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2490 // CHECK10: omp.inner.for.body:
2491 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2492 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2493 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR3]], align 4
2494 // CHECK10-NEXT: store i32 [[TMP24]], i32* [[T_VAR_CASTED]], align 4
2495 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2496 // CHECK10-NEXT: [[TMP26:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4
2497 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP23]], [2 x i32]* [[VEC4]], i32 [[TMP25]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP26]])
2498 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2499 // CHECK10: omp.inner.for.inc:
2500 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2501 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2502 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
2503 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2504 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2505 // CHECK10: omp.inner.for.end:
2506 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2507 // CHECK10: omp.loop.exit:
2508 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2509 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
2510 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
2511 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
2512 // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2513 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
2514 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2515 // CHECK10: arraydestroy.body:
2516 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2517 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2518 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2519 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
2520 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
2521 // CHECK10: arraydestroy.done11:
2522 // CHECK10-NEXT: ret void
2523 //
2524 //
2525 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
2526 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2527 // CHECK10-NEXT: entry:
2528 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2529 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2530 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2531 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2532 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2533 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2534 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
2535 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
2536 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
2537 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2538 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2539 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2540 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2541 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2542 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2543 // CHECK10-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4
2544 // CHECK10-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4
2545 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2546 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
2547 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2548 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2549 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2550 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2551 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2552 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2553 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2554 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2555 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
2556 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2557 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2558 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
2559 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
2560 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2561 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2562 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2563 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2564 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4
2565 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
2566 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2567 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2568 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
2569 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
2570 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 8, i1 false)
2571 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0
2572 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP1]] to %struct.S.0*
2573 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2574 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]]
2575 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2576 // CHECK10: omp.arraycpy.body:
2577 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2578 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2579 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2580 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2581 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false)
2582 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2583 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2584 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]]
2585 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
2586 // CHECK10: omp.arraycpy.done4:
2587 // CHECK10-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2588 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR5]] to i8*
2589 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8*
2590 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false)
2591 // CHECK10-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
2592 // CHECK10-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2593 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
2594 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2595 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2596 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1
2597 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2598 // CHECK10: cond.true:
2599 // CHECK10-NEXT: br label [[COND_END:%.*]]
2600 // CHECK10: cond.false:
2601 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2602 // CHECK10-NEXT: br label [[COND_END]]
2603 // CHECK10: cond.end:
2604 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
2605 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2606 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2607 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
2608 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2609 // CHECK10: omp.inner.for.cond:
2610 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2611 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2612 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
2613 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2614 // CHECK10: omp.inner.for.cond.cleanup:
2615 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2616 // CHECK10: omp.inner.for.body:
2617 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2618 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
2619 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2620 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2621 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4
2622 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4
2623 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP23]]
2624 // CHECK10-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4
2625 // CHECK10-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4
2626 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4
2627 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 [[TMP25]]
2628 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
2629 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8*
2630 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false)
2631 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2632 // CHECK10: omp.body.continue:
2633 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2634 // CHECK10: omp.inner.for.inc:
2635 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2636 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1
2637 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
2638 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2639 // CHECK10: omp.inner.for.end:
2640 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2641 // CHECK10: omp.loop.exit:
2642 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2643 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
2644 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
2645 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2646 // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0
2647 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
2648 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2649 // CHECK10: arraydestroy.body:
2650 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2651 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2652 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2653 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
2654 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
2655 // CHECK10: arraydestroy.done11:
2656 // CHECK10-NEXT: ret void
2657 //
2658 //
2659 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2660 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2661 // CHECK10-NEXT: entry:
2662 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2663 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2664 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2665 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2666 // CHECK10-NEXT: ret void
2667 //
2668 //
2669 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2670 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2671 // CHECK10-NEXT: entry:
2672 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2673 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2674 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2675 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2676 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4
2677 // CHECK10-NEXT: ret void
2678 //
2679 //
2680 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2681 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2682 // CHECK10-NEXT: entry:
2683 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2684 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2685 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2686 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2687 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2688 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2689 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2690 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
2691 // CHECK10-NEXT: ret void
2692 //
2693 //
2694 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2695 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2696 // CHECK10-NEXT: entry:
2697 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2698 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2699 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2700 // CHECK10-NEXT: ret void
2701 //
2702 //
2703 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2704 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] {
2705 // CHECK10-NEXT: entry:
2706 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
2707 // CHECK10-NEXT: ret void
2708 //
2709