1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK8 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK12 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK14 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK16 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams 51 #pragma omp distribute firstprivate(t_var, vec, s_arr, s_arr, var, var) 52 for (int i = 0; i < 2; ++i) { 53 vec[i] = t_var; 54 s_arr[i] = var; 55 } 56 return T(); 57 } 58 59 int main() { 60 static int svar; 61 volatile double g; 62 volatile double &g1 = g; 63 64 #ifdef LAMBDA 65 [&]() { 66 static float sfvar; 67 68 #pragma omp target 69 #pragma omp teams 70 #pragma omp distribute firstprivate(g, g1, svar, sfvar) 71 for (int i = 0; i < 2; ++i) { 72 // Private alloca's for conversion 73 74 // Actual private variables to be used in the body (tmp is used for the reference type) 75 76 // Store input parameter addresses into private alloca's for conversion 77 78 g += 1; 79 g1 += 1; 80 svar += 3; 81 sfvar += 4.0; 82 83 // call inner lambda (use refs to private alloca's) 84 [&]() { 85 g += 2; 86 g1 += 2; 87 svar += 4; 88 sfvar += 8.0; 89 90 91 92 }(); 93 } 94 }(); 95 return 0; 96 #else 97 S<float> test; 98 int t_var = 0; 99 int vec[] = {1, 2}; 100 S<float> s_arr[] = {1, 2}; 101 S<float> &var = test; 102 103 #pragma omp target 104 #pragma omp teams 105 #pragma omp distribute firstprivate(t_var, vec, s_arr, s_arr, var, var, svar) 106 for (int i = 0; i < 2; ++i) { 107 vec[i] = t_var; 108 s_arr[i] = var; 109 } 110 return tmain<int>(); 111 #endif 112 } 113 114 115 116 117 // discard omp loop variables 118 119 120 121 // init t_var 122 123 // init vec 124 125 // init s_arr 126 127 128 // init var 129 130 // init svar 131 132 133 134 // Template 135 136 137 138 // discard omp loop variables 139 140 141 142 // init t_var 143 144 // init vec 145 146 // init s_arr 147 148 149 // init var 150 151 152 #endif 153 // CHECK1-LABEL: define {{[^@]+}}@main 154 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 155 // CHECK1-NEXT: entry: 156 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 157 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 158 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 159 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 160 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 161 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 162 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 163 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8 164 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 165 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 166 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 167 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 168 // CHECK1-NEXT: ret i32 0 169 // 170 // 171 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 172 // CHECK1-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 173 // CHECK1-NEXT: entry: 174 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 175 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 176 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 177 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 178 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 179 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 180 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 181 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 182 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 183 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 184 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 185 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 186 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 187 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 188 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 189 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]]) 190 // CHECK1-NEXT: ret void 191 // 192 // 193 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 194 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 195 // CHECK1-NEXT: entry: 196 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 197 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 198 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 199 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 200 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 201 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 202 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 203 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 204 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 205 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 206 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 207 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 208 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 209 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 210 // CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8 211 // CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8 212 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca double*, align 8 213 // CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 214 // CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 215 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 216 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 217 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 218 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 219 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 220 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 221 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 222 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 223 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 224 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 225 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 226 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 227 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 228 // CHECK1-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8 229 // CHECK1-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8 230 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 231 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 232 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 233 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 234 // CHECK1-NEXT: [[TMP5:%.*]] = load volatile double, double* [[TMP0]], align 8 235 // CHECK1-NEXT: store double [[TMP5]], double* [[G3]], align 8 236 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 8 237 // CHECK1-NEXT: [[TMP7:%.*]] = load volatile double, double* [[TMP6]], align 8 238 // CHECK1-NEXT: store double [[TMP7]], double* [[G14]], align 8 239 // CHECK1-NEXT: store double* [[G14]], double** [[_TMP5]], align 8 240 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 241 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 242 // CHECK1-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 243 // CHECK1-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 244 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 245 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 246 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 247 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 248 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 249 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 250 // CHECK1: cond.true: 251 // CHECK1-NEXT: br label [[COND_END:%.*]] 252 // CHECK1: cond.false: 253 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 254 // CHECK1-NEXT: br label [[COND_END]] 255 // CHECK1: cond.end: 256 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 257 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 258 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 259 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 260 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 261 // CHECK1: omp.inner.for.cond: 262 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 263 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 264 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 265 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 266 // CHECK1: omp.inner.for.body: 267 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 268 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 269 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 270 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 271 // CHECK1-NEXT: [[TMP18:%.*]] = load double, double* [[G3]], align 8 272 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00 273 // CHECK1-NEXT: store double [[ADD9]], double* [[G3]], align 8 274 // CHECK1-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 8 275 // CHECK1-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 8 276 // CHECK1-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00 277 // CHECK1-NEXT: store volatile double [[ADD10]], double* [[TMP19]], align 8 278 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR6]], align 4 279 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3 280 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[SVAR6]], align 4 281 // CHECK1-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR7]], align 4 282 // CHECK1-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double 283 // CHECK1-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00 284 // CHECK1-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 285 // CHECK1-NEXT: store float [[CONV13]], float* [[SFVAR7]], align 4 286 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 287 // CHECK1-NEXT: store double* [[G3]], double** [[TMP23]], align 8 288 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 289 // CHECK1-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 8 290 // CHECK1-NEXT: store double* [[TMP25]], double** [[TMP24]], align 8 291 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 292 // CHECK1-NEXT: store i32* [[SVAR6]], i32** [[TMP26]], align 8 293 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 294 // CHECK1-NEXT: store float* [[SFVAR7]], float** [[TMP27]], align 8 295 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 296 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 297 // CHECK1: omp.body.continue: 298 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 299 // CHECK1: omp.inner.for.inc: 300 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 301 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1 302 // CHECK1-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4 303 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 304 // CHECK1: omp.inner.for.end: 305 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 306 // CHECK1: omp.loop.exit: 307 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 308 // CHECK1-NEXT: ret void 309 // 310 // 311 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 312 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 313 // CHECK1-NEXT: entry: 314 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 315 // CHECK1-NEXT: ret void 316 // 317 // 318 // CHECK2-LABEL: define {{[^@]+}}@main 319 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 320 // CHECK2-NEXT: entry: 321 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 322 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 323 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8 324 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 325 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 326 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8 327 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 328 // CHECK2-NEXT: store double* [[G]], double** [[TMP0]], align 8 329 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 330 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 331 // CHECK2-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 332 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 333 // CHECK2-NEXT: ret i32 0 334 // 335 // 336 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 337 // CHECK2-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 338 // CHECK2-NEXT: entry: 339 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 340 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 341 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 342 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 343 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 344 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 345 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 346 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 347 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 348 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 349 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 350 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 351 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 352 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 353 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 354 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]]) 355 // CHECK2-NEXT: ret void 356 // 357 // 358 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 359 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 360 // CHECK2-NEXT: entry: 361 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 362 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 363 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 364 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 365 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 366 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 367 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 368 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 369 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 370 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 371 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 372 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 373 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 374 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 375 // CHECK2-NEXT: [[G3:%.*]] = alloca double, align 8 376 // CHECK2-NEXT: [[G14:%.*]] = alloca double, align 8 377 // CHECK2-NEXT: [[_TMP5:%.*]] = alloca double*, align 8 378 // CHECK2-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 379 // CHECK2-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 380 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 381 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 382 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 383 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 384 // CHECK2-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 385 // CHECK2-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 386 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 387 // CHECK2-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 388 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 389 // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 390 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 391 // CHECK2-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 392 // CHECK2-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 393 // CHECK2-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8 394 // CHECK2-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8 395 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 396 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 397 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 398 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 399 // CHECK2-NEXT: [[TMP5:%.*]] = load volatile double, double* [[TMP0]], align 8 400 // CHECK2-NEXT: store double [[TMP5]], double* [[G3]], align 8 401 // CHECK2-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 8 402 // CHECK2-NEXT: [[TMP7:%.*]] = load volatile double, double* [[TMP6]], align 8 403 // CHECK2-NEXT: store double [[TMP7]], double* [[G14]], align 8 404 // CHECK2-NEXT: store double* [[G14]], double** [[_TMP5]], align 8 405 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 406 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 407 // CHECK2-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 408 // CHECK2-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 409 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 410 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 411 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 412 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 413 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 414 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 415 // CHECK2: cond.true: 416 // CHECK2-NEXT: br label [[COND_END:%.*]] 417 // CHECK2: cond.false: 418 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 419 // CHECK2-NEXT: br label [[COND_END]] 420 // CHECK2: cond.end: 421 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 422 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 423 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 424 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 425 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 426 // CHECK2: omp.inner.for.cond: 427 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 428 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 429 // CHECK2-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 430 // CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 431 // CHECK2: omp.inner.for.body: 432 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 433 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 434 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 435 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 436 // CHECK2-NEXT: [[TMP18:%.*]] = load double, double* [[G3]], align 8 437 // CHECK2-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00 438 // CHECK2-NEXT: store double [[ADD9]], double* [[G3]], align 8 439 // CHECK2-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 8 440 // CHECK2-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 8 441 // CHECK2-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00 442 // CHECK2-NEXT: store volatile double [[ADD10]], double* [[TMP19]], align 8 443 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR6]], align 4 444 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3 445 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[SVAR6]], align 4 446 // CHECK2-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR7]], align 4 447 // CHECK2-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double 448 // CHECK2-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00 449 // CHECK2-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 450 // CHECK2-NEXT: store float [[CONV13]], float* [[SFVAR7]], align 4 451 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 452 // CHECK2-NEXT: store double* [[G3]], double** [[TMP23]], align 8 453 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 454 // CHECK2-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 8 455 // CHECK2-NEXT: store double* [[TMP25]], double** [[TMP24]], align 8 456 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 457 // CHECK2-NEXT: store i32* [[SVAR6]], i32** [[TMP26]], align 8 458 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 459 // CHECK2-NEXT: store float* [[SFVAR7]], float** [[TMP27]], align 8 460 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 461 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 462 // CHECK2: omp.body.continue: 463 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 464 // CHECK2: omp.inner.for.inc: 465 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 466 // CHECK2-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1 467 // CHECK2-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4 468 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 469 // CHECK2: omp.inner.for.end: 470 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 471 // CHECK2: omp.loop.exit: 472 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 473 // CHECK2-NEXT: ret void 474 // 475 // 476 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 477 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 478 // CHECK2-NEXT: entry: 479 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 480 // CHECK2-NEXT: ret void 481 // 482 // 483 // CHECK3-LABEL: define {{[^@]+}}@main 484 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 485 // CHECK3-NEXT: entry: 486 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 487 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 488 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 489 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 490 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 491 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 492 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 493 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4 494 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 495 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 496 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 497 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 498 // CHECK3-NEXT: ret i32 0 499 // 500 // 501 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 502 // CHECK3-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 503 // CHECK3-NEXT: entry: 504 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 505 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 506 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 507 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 508 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 509 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 510 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 511 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 512 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 513 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 514 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 515 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 516 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 517 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 518 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 519 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 520 // CHECK3-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8 521 // CHECK3-NEXT: store double [[TMP2]], double* [[G2]], align 8 522 // CHECK3-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4 523 // CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4 524 // CHECK3-NEXT: store double [[TMP4]], double* [[G13]], align 8 525 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 526 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4 527 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]]) 528 // CHECK3-NEXT: ret void 529 // 530 // 531 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 532 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 533 // CHECK3-NEXT: entry: 534 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 535 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 536 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 537 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 538 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 539 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 540 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 541 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 542 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 543 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 544 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 545 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 546 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 547 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 548 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8 549 // CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8 550 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca double*, align 4 551 // CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 552 // CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 553 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 554 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 555 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 556 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 557 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 558 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 559 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 560 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 561 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 562 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 563 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 564 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 565 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 566 // CHECK3-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4 567 // CHECK3-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4 568 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 569 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 570 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 571 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 572 // CHECK3-NEXT: [[TMP5:%.*]] = load volatile double, double* [[TMP0]], align 8 573 // CHECK3-NEXT: store double [[TMP5]], double* [[G3]], align 8 574 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 4 575 // CHECK3-NEXT: [[TMP7:%.*]] = load volatile double, double* [[TMP6]], align 4 576 // CHECK3-NEXT: store double [[TMP7]], double* [[G14]], align 8 577 // CHECK3-NEXT: store double* [[G14]], double** [[_TMP5]], align 4 578 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 579 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 580 // CHECK3-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 581 // CHECK3-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 582 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 583 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 584 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 585 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 586 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 587 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 588 // CHECK3: cond.true: 589 // CHECK3-NEXT: br label [[COND_END:%.*]] 590 // CHECK3: cond.false: 591 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 592 // CHECK3-NEXT: br label [[COND_END]] 593 // CHECK3: cond.end: 594 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 595 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 596 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 597 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 598 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 599 // CHECK3: omp.inner.for.cond: 600 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 601 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 602 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 603 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 604 // CHECK3: omp.inner.for.body: 605 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 606 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 607 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 608 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 609 // CHECK3-NEXT: [[TMP18:%.*]] = load double, double* [[G3]], align 8 610 // CHECK3-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00 611 // CHECK3-NEXT: store double [[ADD9]], double* [[G3]], align 8 612 // CHECK3-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 4 613 // CHECK3-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 4 614 // CHECK3-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00 615 // CHECK3-NEXT: store volatile double [[ADD10]], double* [[TMP19]], align 4 616 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR6]], align 4 617 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3 618 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[SVAR6]], align 4 619 // CHECK3-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR7]], align 4 620 // CHECK3-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double 621 // CHECK3-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00 622 // CHECK3-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 623 // CHECK3-NEXT: store float [[CONV13]], float* [[SFVAR7]], align 4 624 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 625 // CHECK3-NEXT: store double* [[G3]], double** [[TMP23]], align 4 626 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 627 // CHECK3-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 4 628 // CHECK3-NEXT: store double* [[TMP25]], double** [[TMP24]], align 4 629 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 630 // CHECK3-NEXT: store i32* [[SVAR6]], i32** [[TMP26]], align 4 631 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 632 // CHECK3-NEXT: store float* [[SFVAR7]], float** [[TMP27]], align 4 633 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 634 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 635 // CHECK3: omp.body.continue: 636 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 637 // CHECK3: omp.inner.for.inc: 638 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 639 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1 640 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4 641 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 642 // CHECK3: omp.inner.for.end: 643 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 644 // CHECK3: omp.loop.exit: 645 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 646 // CHECK3-NEXT: ret void 647 // 648 // 649 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 650 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 651 // CHECK3-NEXT: entry: 652 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 653 // CHECK3-NEXT: ret void 654 // 655 // 656 // CHECK4-LABEL: define {{[^@]+}}@main 657 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 658 // CHECK4-NEXT: entry: 659 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 660 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 661 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4 662 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 663 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 664 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4 665 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 666 // CHECK4-NEXT: store double* [[G]], double** [[TMP0]], align 4 667 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 668 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 669 // CHECK4-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 670 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 671 // CHECK4-NEXT: ret i32 0 672 // 673 // 674 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 675 // CHECK4-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 676 // CHECK4-NEXT: entry: 677 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 678 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 679 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 680 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 681 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 682 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8 683 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8 684 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 685 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 686 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 687 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 688 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 689 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 690 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 691 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 692 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 693 // CHECK4-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8 694 // CHECK4-NEXT: store double [[TMP2]], double* [[G2]], align 8 695 // CHECK4-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4 696 // CHECK4-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4 697 // CHECK4-NEXT: store double [[TMP4]], double* [[G13]], align 8 698 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 699 // CHECK4-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4 700 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]]) 701 // CHECK4-NEXT: ret void 702 // 703 // 704 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 705 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 706 // CHECK4-NEXT: entry: 707 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 708 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 709 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 710 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 711 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 712 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 713 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 714 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 715 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 716 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 717 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 718 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 719 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 720 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 721 // CHECK4-NEXT: [[G3:%.*]] = alloca double, align 8 722 // CHECK4-NEXT: [[G14:%.*]] = alloca double, align 8 723 // CHECK4-NEXT: [[_TMP5:%.*]] = alloca double*, align 4 724 // CHECK4-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 725 // CHECK4-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 726 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 727 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 728 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 729 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 730 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 731 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 732 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 733 // CHECK4-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 734 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 735 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 736 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 737 // CHECK4-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 738 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 739 // CHECK4-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4 740 // CHECK4-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4 741 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 742 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 743 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 744 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 745 // CHECK4-NEXT: [[TMP5:%.*]] = load volatile double, double* [[TMP0]], align 8 746 // CHECK4-NEXT: store double [[TMP5]], double* [[G3]], align 8 747 // CHECK4-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 4 748 // CHECK4-NEXT: [[TMP7:%.*]] = load volatile double, double* [[TMP6]], align 4 749 // CHECK4-NEXT: store double [[TMP7]], double* [[G14]], align 8 750 // CHECK4-NEXT: store double* [[G14]], double** [[_TMP5]], align 4 751 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 752 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 753 // CHECK4-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 754 // CHECK4-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 755 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 756 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 757 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 758 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 759 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 760 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 761 // CHECK4: cond.true: 762 // CHECK4-NEXT: br label [[COND_END:%.*]] 763 // CHECK4: cond.false: 764 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 765 // CHECK4-NEXT: br label [[COND_END]] 766 // CHECK4: cond.end: 767 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 768 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 769 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 770 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 771 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 772 // CHECK4: omp.inner.for.cond: 773 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 774 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 775 // CHECK4-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 776 // CHECK4-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 777 // CHECK4: omp.inner.for.body: 778 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 779 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 780 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 781 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 782 // CHECK4-NEXT: [[TMP18:%.*]] = load double, double* [[G3]], align 8 783 // CHECK4-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00 784 // CHECK4-NEXT: store double [[ADD9]], double* [[G3]], align 8 785 // CHECK4-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 4 786 // CHECK4-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 4 787 // CHECK4-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00 788 // CHECK4-NEXT: store volatile double [[ADD10]], double* [[TMP19]], align 4 789 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR6]], align 4 790 // CHECK4-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3 791 // CHECK4-NEXT: store i32 [[ADD11]], i32* [[SVAR6]], align 4 792 // CHECK4-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR7]], align 4 793 // CHECK4-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double 794 // CHECK4-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00 795 // CHECK4-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 796 // CHECK4-NEXT: store float [[CONV13]], float* [[SFVAR7]], align 4 797 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 798 // CHECK4-NEXT: store double* [[G3]], double** [[TMP23]], align 4 799 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 800 // CHECK4-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 4 801 // CHECK4-NEXT: store double* [[TMP25]], double** [[TMP24]], align 4 802 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 803 // CHECK4-NEXT: store i32* [[SVAR6]], i32** [[TMP26]], align 4 804 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 805 // CHECK4-NEXT: store float* [[SFVAR7]], float** [[TMP27]], align 4 806 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 807 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 808 // CHECK4: omp.body.continue: 809 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 810 // CHECK4: omp.inner.for.inc: 811 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 812 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1 813 // CHECK4-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4 814 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 815 // CHECK4: omp.inner.for.end: 816 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 817 // CHECK4: omp.loop.exit: 818 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 819 // CHECK4-NEXT: ret void 820 // 821 // 822 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 823 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 824 // CHECK4-NEXT: entry: 825 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 826 // CHECK4-NEXT: ret void 827 // 828 // 829 // CHECK5-LABEL: define {{[^@]+}}@main 830 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 831 // CHECK5-NEXT: entry: 832 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 833 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 834 // CHECK5-NEXT: [[G1:%.*]] = alloca double*, align 8 835 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 836 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 837 // CHECK5-NEXT: store double* [[G]], double** [[G1]], align 8 838 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 839 // CHECK5-NEXT: store double* [[G]], double** [[TMP0]], align 8 840 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 841 // CHECK5-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 842 // CHECK5-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 843 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 844 // CHECK5-NEXT: ret i32 0 845 // 846 // 847 // CHECK6-LABEL: define {{[^@]+}}@main 848 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 849 // CHECK6-NEXT: entry: 850 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 851 // CHECK6-NEXT: [[G:%.*]] = alloca double, align 8 852 // CHECK6-NEXT: [[G1:%.*]] = alloca double*, align 8 853 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 854 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 855 // CHECK6-NEXT: store double* [[G]], double** [[G1]], align 8 856 // CHECK6-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 857 // CHECK6-NEXT: store double* [[G]], double** [[TMP0]], align 8 858 // CHECK6-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 859 // CHECK6-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 860 // CHECK6-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 861 // CHECK6-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 862 // CHECK6-NEXT: ret i32 0 863 // 864 // 865 // CHECK7-LABEL: define {{[^@]+}}@main 866 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 867 // CHECK7-NEXT: entry: 868 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 869 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 870 // CHECK7-NEXT: [[G1:%.*]] = alloca double*, align 4 871 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 872 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 873 // CHECK7-NEXT: store double* [[G]], double** [[G1]], align 4 874 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 875 // CHECK7-NEXT: store double* [[G]], double** [[TMP0]], align 4 876 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 877 // CHECK7-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 878 // CHECK7-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 879 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 880 // CHECK7-NEXT: ret i32 0 881 // 882 // 883 // CHECK8-LABEL: define {{[^@]+}}@main 884 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 885 // CHECK8-NEXT: entry: 886 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 887 // CHECK8-NEXT: [[G:%.*]] = alloca double, align 8 888 // CHECK8-NEXT: [[G1:%.*]] = alloca double*, align 4 889 // CHECK8-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 890 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 891 // CHECK8-NEXT: store double* [[G]], double** [[G1]], align 4 892 // CHECK8-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 893 // CHECK8-NEXT: store double* [[G]], double** [[TMP0]], align 4 894 // CHECK8-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 895 // CHECK8-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 896 // CHECK8-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 897 // CHECK8-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 898 // CHECK8-NEXT: ret i32 0 899 // 900 // 901 // CHECK9-LABEL: define {{[^@]+}}@main 902 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 903 // CHECK9-NEXT: entry: 904 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 905 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 906 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 907 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 908 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 909 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 910 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 911 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 912 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 913 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 914 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 915 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 916 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 917 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 918 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 919 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 920 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 921 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 922 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 923 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 924 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 925 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 926 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 927 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 928 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 929 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 930 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 931 // CHECK9-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 932 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 933 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 934 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 935 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 936 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 937 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 938 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 939 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 940 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 941 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 942 // CHECK9-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 943 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 944 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 945 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 946 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 947 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 948 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 949 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 950 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 951 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 952 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 953 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 954 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 955 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 956 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8 957 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 958 // CHECK9-NEXT: store i8* null, i8** [[TMP18]], align 8 959 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 960 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 961 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 962 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 963 // CHECK9-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 964 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8 965 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 966 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8 967 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 968 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 969 // CHECK9-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8 970 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 971 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 972 // CHECK9-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8 973 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 974 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8 975 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 976 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 977 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 978 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 979 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 980 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8 981 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 982 // CHECK9-NEXT: store i8* null, i8** [[TMP33]], align 8 983 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 984 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 985 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 986 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 987 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 988 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 989 // CHECK9: omp_offload.failed: 990 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 991 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 992 // CHECK9: omp_offload.cont: 993 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 994 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 995 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 996 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 997 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 998 // CHECK9: arraydestroy.body: 999 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1000 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1001 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1002 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1003 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1004 // CHECK9: arraydestroy.done3: 1005 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1006 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 1007 // CHECK9-NEXT: ret i32 [[TMP39]] 1008 // 1009 // 1010 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1011 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1012 // CHECK9-NEXT: entry: 1013 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1014 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1015 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1016 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 1017 // CHECK9-NEXT: ret void 1018 // 1019 // 1020 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1021 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1022 // CHECK9-NEXT: entry: 1023 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1024 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1025 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1026 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1027 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1028 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1029 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 1030 // CHECK9-NEXT: ret void 1031 // 1032 // 1033 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 1034 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1035 // CHECK9-NEXT: entry: 1036 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1037 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1038 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1039 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1040 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1041 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1042 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1043 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1044 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1045 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1046 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1047 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1048 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1049 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1050 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1051 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1052 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1053 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1054 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]]) 1055 // CHECK9-NEXT: ret void 1056 // 1057 // 1058 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1059 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 1060 // CHECK9-NEXT: entry: 1061 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1062 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1063 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1064 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1065 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1066 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1067 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 1068 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1069 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1070 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1071 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1072 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1073 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1074 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1075 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1076 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1077 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1078 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 1079 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1080 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 8 1081 // CHECK9-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 1082 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1083 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1084 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1085 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1086 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1087 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1088 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1089 // CHECK9-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 1090 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1091 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1092 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1093 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1094 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 1095 // CHECK9-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 1096 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1097 // CHECK9-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8 1098 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1099 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1100 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1101 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1102 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 1103 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 1104 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 1105 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 1106 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 8, i1 false) 1107 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1108 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 1109 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1110 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 1111 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1112 // CHECK9: omp.arraycpy.body: 1113 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1114 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1115 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1116 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1117 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 4, i1 false) 1118 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1119 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1120 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 1121 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 1122 // CHECK9: omp.arraycpy.done6: 1123 // CHECK9-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 1124 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 1125 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 1126 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 1127 // CHECK9-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8 1128 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 1129 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 1130 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1131 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1132 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1133 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1134 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 1135 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1136 // CHECK9: cond.true: 1137 // CHECK9-NEXT: br label [[COND_END:%.*]] 1138 // CHECK9: cond.false: 1139 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1140 // CHECK9-NEXT: br label [[COND_END]] 1141 // CHECK9: cond.end: 1142 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 1143 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1144 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1145 // CHECK9-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 1146 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1147 // CHECK9: omp.inner.for.cond: 1148 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1149 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1150 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 1151 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1152 // CHECK9: omp.inner.for.cond.cleanup: 1153 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1154 // CHECK9: omp.inner.for.body: 1155 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1156 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP24]], 1 1157 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1158 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1159 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4 1160 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4 1161 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP26]] to i64 1162 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 1163 // CHECK9-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX]], align 4 1164 // CHECK9-NEXT: [[TMP27:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8 1165 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4 1166 // CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP28]] to i64 1167 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM11]] 1168 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[ARRAYIDX12]] to i8* 1169 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP27]] to i8* 1170 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false) 1171 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1172 // CHECK9: omp.body.continue: 1173 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1174 // CHECK9: omp.inner.for.inc: 1175 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1176 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP31]], 1 1177 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4 1178 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1179 // CHECK9: omp.inner.for.end: 1180 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1181 // CHECK9: omp.loop.exit: 1182 // CHECK9-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1183 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 1184 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 1185 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 1186 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1187 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2 1188 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1189 // CHECK9: arraydestroy.body: 1190 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1191 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1192 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1193 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 1194 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 1195 // CHECK9: arraydestroy.done15: 1196 // CHECK9-NEXT: ret void 1197 // 1198 // 1199 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1200 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1201 // CHECK9-NEXT: entry: 1202 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1203 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1204 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1205 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1206 // CHECK9-NEXT: ret void 1207 // 1208 // 1209 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1210 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 1211 // CHECK9-NEXT: entry: 1212 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1213 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1214 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1215 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1216 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1217 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1218 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1219 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1220 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1221 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1222 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1223 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1224 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1225 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 1226 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1227 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1228 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1229 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 1230 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1231 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 1232 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1233 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 1234 // CHECK9-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 1235 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1236 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1237 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1238 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1239 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1240 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1241 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1242 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1243 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1244 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8 1245 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1246 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1247 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1248 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1249 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 1250 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1251 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 1252 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 1253 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1254 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1255 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1256 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1257 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 1258 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1259 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 1260 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 1261 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1262 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 1263 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8 1264 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1265 // CHECK9-NEXT: store i8* null, i8** [[TMP21]], align 8 1266 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1267 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 1268 // CHECK9-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8 1269 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1270 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 1271 // CHECK9-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8 1272 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1273 // CHECK9-NEXT: store i8* null, i8** [[TMP26]], align 8 1274 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1275 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1276 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1277 // CHECK9-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1278 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1279 // CHECK9-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1280 // CHECK9: omp_offload.failed: 1281 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 1282 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1283 // CHECK9: omp_offload.cont: 1284 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1285 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1286 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1287 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1288 // CHECK9: arraydestroy.body: 1289 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1290 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1291 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1292 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1293 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1294 // CHECK9: arraydestroy.done2: 1295 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1296 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 1297 // CHECK9-NEXT: ret i32 [[TMP32]] 1298 // 1299 // 1300 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1301 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1302 // CHECK9-NEXT: entry: 1303 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1304 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1305 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1306 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1307 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 1308 // CHECK9-NEXT: ret void 1309 // 1310 // 1311 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1312 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1313 // CHECK9-NEXT: entry: 1314 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1315 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1316 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1317 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1318 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1319 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1320 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1321 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 1322 // CHECK9-NEXT: ret void 1323 // 1324 // 1325 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1326 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1327 // CHECK9-NEXT: entry: 1328 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1329 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1330 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1331 // CHECK9-NEXT: ret void 1332 // 1333 // 1334 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1335 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1336 // CHECK9-NEXT: entry: 1337 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1338 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1339 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1340 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 1341 // CHECK9-NEXT: ret void 1342 // 1343 // 1344 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1345 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1346 // CHECK9-NEXT: entry: 1347 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1348 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1349 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1350 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1351 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1352 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1353 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 1354 // CHECK9-NEXT: ret void 1355 // 1356 // 1357 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1358 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1359 // CHECK9-NEXT: entry: 1360 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1361 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1362 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1363 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1364 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1365 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1366 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1367 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1368 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1369 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1370 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1371 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1372 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1373 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 1374 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1375 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 1376 // CHECK9-NEXT: ret void 1377 // 1378 // 1379 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1380 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1381 // CHECK9-NEXT: entry: 1382 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1383 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1384 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1385 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1386 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1387 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1388 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1389 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1390 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1391 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1392 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1393 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1394 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1395 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1396 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1397 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1398 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 1399 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1400 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8 1401 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1402 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1403 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1404 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1405 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1406 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1407 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1408 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1409 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1410 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1411 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1412 // CHECK9-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 1413 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1414 // CHECK9-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8 1415 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1416 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1417 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1418 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1419 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1420 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 1421 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 1422 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 1423 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 8, i1 false) 1424 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 1425 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 1426 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1427 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 1428 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1429 // CHECK9: omp.arraycpy.body: 1430 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1431 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1432 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1433 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1434 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 1435 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1436 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1437 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 1438 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 1439 // CHECK9: omp.arraycpy.done6: 1440 // CHECK9-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 1441 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 1442 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 1443 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false) 1444 // CHECK9-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8 1445 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1446 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1447 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1448 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1449 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 1450 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1451 // CHECK9: cond.true: 1452 // CHECK9-NEXT: br label [[COND_END:%.*]] 1453 // CHECK9: cond.false: 1454 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1455 // CHECK9-NEXT: br label [[COND_END]] 1456 // CHECK9: cond.end: 1457 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 1458 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1459 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1460 // CHECK9-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 1461 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1462 // CHECK9: omp.inner.for.cond: 1463 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1464 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1465 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 1466 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1467 // CHECK9: omp.inner.for.cond.cleanup: 1468 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1469 // CHECK9: omp.inner.for.body: 1470 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1471 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 1472 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1473 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1474 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4 1475 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4 1476 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 1477 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 1478 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[ARRAYIDX]], align 4 1479 // CHECK9-NEXT: [[TMP25:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8 1480 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4 1481 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP26]] to i64 1482 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 1483 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8* 1484 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[TMP25]] to i8* 1485 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 4, i1 false) 1486 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1487 // CHECK9: omp.body.continue: 1488 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1489 // CHECK9: omp.inner.for.inc: 1490 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1491 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP29]], 1 1492 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 1493 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1494 // CHECK9: omp.inner.for.end: 1495 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1496 // CHECK9: omp.loop.exit: 1497 // CHECK9-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1498 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 1499 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP31]]) 1500 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 1501 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 1502 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 1503 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1504 // CHECK9: arraydestroy.body: 1505 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP32]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1506 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1507 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1508 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 1509 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 1510 // CHECK9: arraydestroy.done14: 1511 // CHECK9-NEXT: ret void 1512 // 1513 // 1514 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1515 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1516 // CHECK9-NEXT: entry: 1517 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1518 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1519 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1520 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1521 // CHECK9-NEXT: ret void 1522 // 1523 // 1524 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1525 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1526 // CHECK9-NEXT: entry: 1527 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1528 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1529 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1530 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1531 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 1532 // CHECK9-NEXT: ret void 1533 // 1534 // 1535 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1536 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1537 // CHECK9-NEXT: entry: 1538 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1539 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1540 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1541 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1542 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1543 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1544 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1545 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1546 // CHECK9-NEXT: ret void 1547 // 1548 // 1549 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1550 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1551 // CHECK9-NEXT: entry: 1552 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1553 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1554 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1555 // CHECK9-NEXT: ret void 1556 // 1557 // 1558 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1559 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1560 // CHECK9-NEXT: entry: 1561 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1562 // CHECK9-NEXT: ret void 1563 // 1564 // 1565 // CHECK10-LABEL: define {{[^@]+}}@main 1566 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 1567 // CHECK10-NEXT: entry: 1568 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1569 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8 1570 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8 1571 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1572 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1573 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1574 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1575 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1576 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1577 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1578 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 1579 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1580 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1581 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1582 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1583 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1584 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8 1585 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 1586 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1587 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1588 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1589 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1590 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1591 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1592 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1593 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1594 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 1595 // CHECK10-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 1596 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1597 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1598 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1599 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1600 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1601 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 1602 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 1603 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 1604 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 1605 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1606 // CHECK10-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1607 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1608 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1609 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1610 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1611 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 1612 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 1613 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1614 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 8 1615 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1616 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1617 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1618 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1619 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 1620 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8 1621 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1622 // CHECK10-NEXT: store i8* null, i8** [[TMP18]], align 8 1623 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1624 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 1625 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 1626 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1627 // CHECK10-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 1628 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8 1629 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1630 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8 1631 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1632 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 1633 // CHECK10-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8 1634 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1635 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 1636 // CHECK10-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8 1637 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1638 // CHECK10-NEXT: store i8* null, i8** [[TMP28]], align 8 1639 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1640 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 1641 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 1642 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1643 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 1644 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8 1645 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1646 // CHECK10-NEXT: store i8* null, i8** [[TMP33]], align 8 1647 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1648 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1649 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 1650 // CHECK10-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1651 // CHECK10-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 1652 // CHECK10-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1653 // CHECK10: omp_offload.failed: 1654 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 1655 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1656 // CHECK10: omp_offload.cont: 1657 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 1658 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1659 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1660 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1661 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1662 // CHECK10: arraydestroy.body: 1663 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1664 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1665 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1666 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1667 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1668 // CHECK10: arraydestroy.done3: 1669 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1670 // CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 1671 // CHECK10-NEXT: ret i32 [[TMP39]] 1672 // 1673 // 1674 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1675 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1676 // CHECK10-NEXT: entry: 1677 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1678 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1679 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1680 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 1681 // CHECK10-NEXT: ret void 1682 // 1683 // 1684 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1685 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1686 // CHECK10-NEXT: entry: 1687 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1688 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1689 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1690 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1691 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1692 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1693 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 1694 // CHECK10-NEXT: ret void 1695 // 1696 // 1697 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 1698 // CHECK10-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1699 // CHECK10-NEXT: entry: 1700 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1701 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1702 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1703 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1704 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1705 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1706 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1707 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1708 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1709 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1710 // CHECK10-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1711 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1712 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1713 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1714 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1715 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1716 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1717 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1718 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]]) 1719 // CHECK10-NEXT: ret void 1720 // 1721 // 1722 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1723 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 1724 // CHECK10-NEXT: entry: 1725 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1726 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1727 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1728 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1729 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1730 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1731 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 1732 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1733 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1734 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1735 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1736 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1737 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1738 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1739 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1740 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1741 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1742 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 1743 // CHECK10-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1744 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 8 1745 // CHECK10-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 1746 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1747 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1748 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1749 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1750 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1751 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1752 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1753 // CHECK10-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 1754 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1755 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1756 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1757 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1758 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 1759 // CHECK10-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 1760 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1761 // CHECK10-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8 1762 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1763 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1764 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1765 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1766 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 1767 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 1768 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 1769 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 1770 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 8, i1 false) 1771 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1772 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 1773 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1774 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 1775 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1776 // CHECK10: omp.arraycpy.body: 1777 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1778 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1779 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1780 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1781 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 4, i1 false) 1782 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1783 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1784 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 1785 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 1786 // CHECK10: omp.arraycpy.done6: 1787 // CHECK10-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 1788 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 1789 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 1790 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 1791 // CHECK10-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8 1792 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 1793 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 1794 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1795 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1796 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1797 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1798 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 1799 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1800 // CHECK10: cond.true: 1801 // CHECK10-NEXT: br label [[COND_END:%.*]] 1802 // CHECK10: cond.false: 1803 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1804 // CHECK10-NEXT: br label [[COND_END]] 1805 // CHECK10: cond.end: 1806 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 1807 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1808 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1809 // CHECK10-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 1810 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1811 // CHECK10: omp.inner.for.cond: 1812 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1813 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1814 // CHECK10-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 1815 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1816 // CHECK10: omp.inner.for.cond.cleanup: 1817 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1818 // CHECK10: omp.inner.for.body: 1819 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1820 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP24]], 1 1821 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1822 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1823 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4 1824 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4 1825 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP26]] to i64 1826 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 1827 // CHECK10-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX]], align 4 1828 // CHECK10-NEXT: [[TMP27:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8 1829 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4 1830 // CHECK10-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP28]] to i64 1831 // CHECK10-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM11]] 1832 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[ARRAYIDX12]] to i8* 1833 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP27]] to i8* 1834 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false) 1835 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1836 // CHECK10: omp.body.continue: 1837 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1838 // CHECK10: omp.inner.for.inc: 1839 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1840 // CHECK10-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP31]], 1 1841 // CHECK10-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4 1842 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1843 // CHECK10: omp.inner.for.end: 1844 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1845 // CHECK10: omp.loop.exit: 1846 // CHECK10-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1847 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 1848 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 1849 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 1850 // CHECK10-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1851 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2 1852 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1853 // CHECK10: arraydestroy.body: 1854 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1855 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1856 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1857 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 1858 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 1859 // CHECK10: arraydestroy.done15: 1860 // CHECK10-NEXT: ret void 1861 // 1862 // 1863 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1864 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1865 // CHECK10-NEXT: entry: 1866 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1867 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1868 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1869 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1870 // CHECK10-NEXT: ret void 1871 // 1872 // 1873 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1874 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 1875 // CHECK10-NEXT: entry: 1876 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1877 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1878 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1879 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1880 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1881 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1882 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1883 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1884 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1885 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1886 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1887 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1888 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1889 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1890 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1891 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1892 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1893 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 1894 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1895 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 1896 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1897 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 1898 // CHECK10-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 1899 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1900 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1901 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1902 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1903 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1904 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1905 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1906 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1907 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1908 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8 1909 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1910 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1911 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1912 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1913 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 1914 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1915 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 1916 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 1917 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1918 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1919 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1920 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1921 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 8 1922 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1923 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 1924 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 1925 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1926 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 1927 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8 1928 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1929 // CHECK10-NEXT: store i8* null, i8** [[TMP21]], align 8 1930 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1931 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 1932 // CHECK10-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8 1933 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1934 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 1935 // CHECK10-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8 1936 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1937 // CHECK10-NEXT: store i8* null, i8** [[TMP26]], align 8 1938 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1939 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1940 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1941 // CHECK10-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1942 // CHECK10-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1943 // CHECK10-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1944 // CHECK10: omp_offload.failed: 1945 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 1946 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1947 // CHECK10: omp_offload.cont: 1948 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1949 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1950 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1951 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1952 // CHECK10: arraydestroy.body: 1953 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1954 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1955 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1956 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1957 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1958 // CHECK10: arraydestroy.done2: 1959 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1960 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 1961 // CHECK10-NEXT: ret i32 [[TMP32]] 1962 // 1963 // 1964 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1965 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1966 // CHECK10-NEXT: entry: 1967 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1968 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1969 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1970 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1971 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 1972 // CHECK10-NEXT: ret void 1973 // 1974 // 1975 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1976 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1977 // CHECK10-NEXT: entry: 1978 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1979 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1980 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1981 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1982 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1983 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1984 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1985 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 1986 // CHECK10-NEXT: ret void 1987 // 1988 // 1989 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1990 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1991 // CHECK10-NEXT: entry: 1992 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1993 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1994 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1995 // CHECK10-NEXT: ret void 1996 // 1997 // 1998 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1999 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2000 // CHECK10-NEXT: entry: 2001 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2002 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2003 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2004 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 2005 // CHECK10-NEXT: ret void 2006 // 2007 // 2008 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2009 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2010 // CHECK10-NEXT: entry: 2011 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2012 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2013 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2014 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2015 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2016 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2017 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 2018 // CHECK10-NEXT: ret void 2019 // 2020 // 2021 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2022 // CHECK10-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2023 // CHECK10-NEXT: entry: 2024 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2025 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2026 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2027 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2028 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2029 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2030 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2031 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2032 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2033 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2034 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2035 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2036 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2037 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 2038 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2039 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 2040 // CHECK10-NEXT: ret void 2041 // 2042 // 2043 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 2044 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2045 // CHECK10-NEXT: entry: 2046 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2047 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2048 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 2049 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2050 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2051 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2052 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2053 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 2054 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2055 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2056 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2057 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2058 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2059 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2060 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2061 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2062 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 2063 // CHECK10-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2064 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8 2065 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2066 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2067 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2068 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 2069 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2070 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2071 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2072 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 2073 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2074 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2075 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2076 // CHECK10-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 2077 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2078 // CHECK10-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8 2079 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2080 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2081 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2082 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2083 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2084 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 2085 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2086 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 2087 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 8, i1 false) 2088 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2089 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 2090 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2091 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 2092 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2093 // CHECK10: omp.arraycpy.body: 2094 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2095 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2096 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2097 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2098 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 2099 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2100 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2101 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 2102 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2103 // CHECK10: omp.arraycpy.done6: 2104 // CHECK10-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 2105 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 2106 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 2107 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false) 2108 // CHECK10-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8 2109 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2110 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2111 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2112 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2113 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 2114 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2115 // CHECK10: cond.true: 2116 // CHECK10-NEXT: br label [[COND_END:%.*]] 2117 // CHECK10: cond.false: 2118 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2119 // CHECK10-NEXT: br label [[COND_END]] 2120 // CHECK10: cond.end: 2121 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 2122 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2123 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2124 // CHECK10-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 2125 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2126 // CHECK10: omp.inner.for.cond: 2127 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2128 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2129 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2130 // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2131 // CHECK10: omp.inner.for.cond.cleanup: 2132 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2133 // CHECK10: omp.inner.for.body: 2134 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2135 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 2136 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2137 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2138 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4 2139 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4 2140 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 2141 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 2142 // CHECK10-NEXT: store i32 [[TMP23]], i32* [[ARRAYIDX]], align 4 2143 // CHECK10-NEXT: [[TMP25:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8 2144 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4 2145 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP26]] to i64 2146 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 2147 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8* 2148 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[TMP25]] to i8* 2149 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 4, i1 false) 2150 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2151 // CHECK10: omp.body.continue: 2152 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2153 // CHECK10: omp.inner.for.inc: 2154 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2155 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP29]], 1 2156 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 2157 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2158 // CHECK10: omp.inner.for.end: 2159 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2160 // CHECK10: omp.loop.exit: 2161 // CHECK10-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2162 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 2163 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP31]]) 2164 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 2165 // CHECK10-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2166 // CHECK10-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 2167 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2168 // CHECK10: arraydestroy.body: 2169 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP32]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2170 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2171 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2172 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2173 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2174 // CHECK10: arraydestroy.done14: 2175 // CHECK10-NEXT: ret void 2176 // 2177 // 2178 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2179 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2180 // CHECK10-NEXT: entry: 2181 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2182 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2183 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2184 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2185 // CHECK10-NEXT: ret void 2186 // 2187 // 2188 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2189 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2190 // CHECK10-NEXT: entry: 2191 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2192 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2193 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2194 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2195 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 2196 // CHECK10-NEXT: ret void 2197 // 2198 // 2199 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2200 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2201 // CHECK10-NEXT: entry: 2202 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2203 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2204 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2205 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2206 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2207 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2208 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2209 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2210 // CHECK10-NEXT: ret void 2211 // 2212 // 2213 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2214 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2215 // CHECK10-NEXT: entry: 2216 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2217 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2218 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2219 // CHECK10-NEXT: ret void 2220 // 2221 // 2222 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2223 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 2224 // CHECK10-NEXT: entry: 2225 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 2226 // CHECK10-NEXT: ret void 2227 // 2228 // 2229 // CHECK11-LABEL: define {{[^@]+}}@main 2230 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2231 // CHECK11-NEXT: entry: 2232 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2233 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 2234 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 2235 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2236 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2237 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2238 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2239 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2240 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2241 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2242 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 2243 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 2244 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 2245 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 2246 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2247 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2248 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 2249 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 2250 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2251 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2252 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2253 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2254 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 2255 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2256 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 2257 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2258 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 2259 // CHECK11-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 2260 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2261 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2262 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2263 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2264 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 2265 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 2266 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 2267 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2268 // CHECK11-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2269 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2270 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2271 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2272 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2273 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 2274 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 2275 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2276 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 2277 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2278 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2279 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 2280 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2281 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 2282 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4 2283 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2284 // CHECK11-NEXT: store i8* null, i8** [[TMP18]], align 4 2285 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2286 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 2287 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 2288 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2289 // CHECK11-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 2290 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4 2291 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2292 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4 2293 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2294 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 2295 // CHECK11-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4 2296 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2297 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 2298 // CHECK11-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4 2299 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2300 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4 2301 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2302 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 2303 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 2304 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2305 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 2306 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4 2307 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 2308 // CHECK11-NEXT: store i8* null, i8** [[TMP33]], align 4 2309 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2310 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2311 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 2312 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2313 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 2314 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2315 // CHECK11: omp_offload.failed: 2316 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 2317 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2318 // CHECK11: omp_offload.cont: 2319 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 2320 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2321 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2322 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2323 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2324 // CHECK11: arraydestroy.body: 2325 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2326 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2327 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2328 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2329 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2330 // CHECK11: arraydestroy.done2: 2331 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2332 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 2333 // CHECK11-NEXT: ret i32 [[TMP39]] 2334 // 2335 // 2336 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2337 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2338 // CHECK11-NEXT: entry: 2339 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2340 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2341 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2342 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 2343 // CHECK11-NEXT: ret void 2344 // 2345 // 2346 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2347 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2348 // CHECK11-NEXT: entry: 2349 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2350 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2351 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2352 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2353 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2354 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2355 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 2356 // CHECK11-NEXT: ret void 2357 // 2358 // 2359 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 2360 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 2361 // CHECK11-NEXT: entry: 2362 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2363 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2364 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 2365 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 2366 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 2367 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2368 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2369 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2370 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2371 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 2372 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 2373 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2374 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2375 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 2376 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 2377 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2378 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]]) 2379 // CHECK11-NEXT: ret void 2380 // 2381 // 2382 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2383 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 2384 // CHECK11-NEXT: entry: 2385 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2386 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2387 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 2388 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2389 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 2390 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 2391 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 2392 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2393 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2394 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2395 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2396 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2397 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2398 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2399 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2400 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2401 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2402 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 2403 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2404 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 4 2405 // CHECK11-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 2406 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2407 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2408 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2409 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 2410 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2411 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2412 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 2413 // CHECK11-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 2414 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 2415 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2416 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2417 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 2418 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 2419 // CHECK11-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 2420 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2421 // CHECK11-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4 2422 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2423 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2424 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2425 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2426 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 2427 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 2428 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2429 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 2430 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 8, i1 false) 2431 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 2432 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 2433 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2434 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 2435 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2436 // CHECK11: omp.arraycpy.body: 2437 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2438 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2439 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2440 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2441 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 4, i1 false) 2442 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2443 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2444 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 2445 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2446 // CHECK11: omp.arraycpy.done6: 2447 // CHECK11-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 2448 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 2449 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 2450 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false) 2451 // CHECK11-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4 2452 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 2453 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 2454 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2455 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 2456 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2457 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2458 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 2459 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2460 // CHECK11: cond.true: 2461 // CHECK11-NEXT: br label [[COND_END:%.*]] 2462 // CHECK11: cond.false: 2463 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2464 // CHECK11-NEXT: br label [[COND_END]] 2465 // CHECK11: cond.end: 2466 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 2467 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2468 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2469 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 2470 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2471 // CHECK11: omp.inner.for.cond: 2472 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2473 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2474 // CHECK11-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 2475 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2476 // CHECK11: omp.inner.for.cond.cleanup: 2477 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2478 // CHECK11: omp.inner.for.body: 2479 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2480 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP24]], 1 2481 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2482 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2483 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4 2484 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4 2485 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP26]] 2486 // CHECK11-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX]], align 4 2487 // CHECK11-NEXT: [[TMP27:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4 2488 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4 2489 // CHECK11-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 [[TMP28]] 2490 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8* 2491 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP27]] to i8* 2492 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 4, i1 false) 2493 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2494 // CHECK11: omp.body.continue: 2495 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2496 // CHECK11: omp.inner.for.inc: 2497 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2498 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP31]], 1 2499 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 2500 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2501 // CHECK11: omp.inner.for.end: 2502 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2503 // CHECK11: omp.loop.exit: 2504 // CHECK11-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2505 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 2506 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 2507 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 2508 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 2509 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 2510 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2511 // CHECK11: arraydestroy.body: 2512 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2513 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2514 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2515 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2516 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2517 // CHECK11: arraydestroy.done14: 2518 // CHECK11-NEXT: ret void 2519 // 2520 // 2521 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2522 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2523 // CHECK11-NEXT: entry: 2524 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2525 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2526 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2527 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2528 // CHECK11-NEXT: ret void 2529 // 2530 // 2531 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2532 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 2533 // CHECK11-NEXT: entry: 2534 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2535 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2536 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2537 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2538 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2539 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 2540 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2541 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2542 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 2543 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 2544 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 2545 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2546 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 2547 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2548 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2549 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2550 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2551 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 2552 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 2553 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 2554 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 2555 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 2556 // CHECK11-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 2557 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2558 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2559 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2560 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2561 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2562 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2563 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2564 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 2565 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 2566 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2567 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2568 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2569 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2570 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 2571 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2572 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 2573 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 2574 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2575 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2576 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 2577 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2578 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 2579 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2580 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 2581 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 2582 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2583 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 2584 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4 2585 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2586 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4 2587 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2588 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 2589 // CHECK11-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4 2590 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2591 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 2592 // CHECK11-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4 2593 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2594 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4 2595 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2596 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2597 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 2598 // CHECK11-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2599 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 2600 // CHECK11-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2601 // CHECK11: omp_offload.failed: 2602 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 2603 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2604 // CHECK11: omp_offload.cont: 2605 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2606 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2607 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2608 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2609 // CHECK11: arraydestroy.body: 2610 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2611 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2612 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2613 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2614 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2615 // CHECK11: arraydestroy.done2: 2616 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2617 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 2618 // CHECK11-NEXT: ret i32 [[TMP32]] 2619 // 2620 // 2621 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2622 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2623 // CHECK11-NEXT: entry: 2624 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2625 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2626 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2627 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2628 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 2629 // CHECK11-NEXT: ret void 2630 // 2631 // 2632 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2633 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2634 // CHECK11-NEXT: entry: 2635 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2636 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2637 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2638 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2639 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2640 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2641 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2642 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 2643 // CHECK11-NEXT: ret void 2644 // 2645 // 2646 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2647 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2648 // CHECK11-NEXT: entry: 2649 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2650 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2651 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2652 // CHECK11-NEXT: ret void 2653 // 2654 // 2655 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2656 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2657 // CHECK11-NEXT: entry: 2658 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2659 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2660 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2661 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 2662 // CHECK11-NEXT: ret void 2663 // 2664 // 2665 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2666 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2667 // CHECK11-NEXT: entry: 2668 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2669 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2670 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2671 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2672 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2673 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2674 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 2675 // CHECK11-NEXT: ret void 2676 // 2677 // 2678 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2679 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2680 // CHECK11-NEXT: entry: 2681 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2682 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2683 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 2684 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 2685 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2686 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2687 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2688 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2689 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 2690 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2691 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2692 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 2693 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 2694 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2695 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 2696 // CHECK11-NEXT: ret void 2697 // 2698 // 2699 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2700 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2701 // CHECK11-NEXT: entry: 2702 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2703 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2704 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 2705 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2706 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 2707 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 2708 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2709 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2710 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2711 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2712 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2713 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2714 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2715 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2716 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2717 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2718 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 2719 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2720 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 4 2721 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2722 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2723 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2724 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 2725 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2726 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2727 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 2728 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 2729 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2730 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2731 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 2732 // CHECK11-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 2733 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2734 // CHECK11-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4 2735 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2736 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2737 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2738 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2739 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2740 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 2741 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2742 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 2743 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 8, i1 false) 2744 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2745 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 2746 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2747 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 2748 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2749 // CHECK11: omp.arraycpy.body: 2750 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2751 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2752 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2753 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2754 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 2755 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2756 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2757 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 2758 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2759 // CHECK11: omp.arraycpy.done6: 2760 // CHECK11-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 2761 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 2762 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 2763 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false) 2764 // CHECK11-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4 2765 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2766 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2767 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2768 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2769 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 2770 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2771 // CHECK11: cond.true: 2772 // CHECK11-NEXT: br label [[COND_END:%.*]] 2773 // CHECK11: cond.false: 2774 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2775 // CHECK11-NEXT: br label [[COND_END]] 2776 // CHECK11: cond.end: 2777 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 2778 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2779 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2780 // CHECK11-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 2781 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2782 // CHECK11: omp.inner.for.cond: 2783 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2784 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2785 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2786 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2787 // CHECK11: omp.inner.for.cond.cleanup: 2788 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2789 // CHECK11: omp.inner.for.body: 2790 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2791 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 2792 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2793 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2794 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4 2795 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4 2796 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP24]] 2797 // CHECK11-NEXT: store i32 [[TMP23]], i32* [[ARRAYIDX]], align 4 2798 // CHECK11-NEXT: [[TMP25:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4 2799 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4 2800 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 [[TMP26]] 2801 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8* 2802 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[TMP25]] to i8* 2803 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 4, i1 false) 2804 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2805 // CHECK11: omp.body.continue: 2806 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2807 // CHECK11: omp.inner.for.inc: 2808 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2809 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1 2810 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 2811 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2812 // CHECK11: omp.inner.for.end: 2813 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2814 // CHECK11: omp.loop.exit: 2815 // CHECK11-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2816 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 2817 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP31]]) 2818 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 2819 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2820 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 2821 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2822 // CHECK11: arraydestroy.body: 2823 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP32]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2824 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2825 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2826 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 2827 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 2828 // CHECK11: arraydestroy.done13: 2829 // CHECK11-NEXT: ret void 2830 // 2831 // 2832 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2833 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2834 // CHECK11-NEXT: entry: 2835 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2836 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2837 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2838 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2839 // CHECK11-NEXT: ret void 2840 // 2841 // 2842 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2843 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2844 // CHECK11-NEXT: entry: 2845 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2846 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2847 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2848 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2849 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 2850 // CHECK11-NEXT: ret void 2851 // 2852 // 2853 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2854 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2855 // CHECK11-NEXT: entry: 2856 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2857 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2858 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2859 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2860 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2861 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2862 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2863 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2864 // CHECK11-NEXT: ret void 2865 // 2866 // 2867 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2868 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2869 // CHECK11-NEXT: entry: 2870 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2871 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2872 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2873 // CHECK11-NEXT: ret void 2874 // 2875 // 2876 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2877 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 2878 // CHECK11-NEXT: entry: 2879 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2880 // CHECK11-NEXT: ret void 2881 // 2882 // 2883 // CHECK12-LABEL: define {{[^@]+}}@main 2884 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 2885 // CHECK12-NEXT: entry: 2886 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2887 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8 2888 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4 2889 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2890 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2891 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2892 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2893 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2894 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2895 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2896 // CHECK12-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 2897 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 2898 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 2899 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 2900 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2901 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2902 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4 2903 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 2904 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 2905 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2906 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2907 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2908 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 2909 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2910 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 2911 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2912 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 2913 // CHECK12-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 2914 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2915 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2916 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2917 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2918 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 2919 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 2920 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 2921 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2922 // CHECK12-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2923 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2924 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2925 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2926 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2927 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 2928 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 2929 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2930 // CHECK12-NEXT: store i8* null, i8** [[TMP13]], align 4 2931 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2932 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2933 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 2934 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2935 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 2936 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4 2937 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2938 // CHECK12-NEXT: store i8* null, i8** [[TMP18]], align 4 2939 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2940 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 2941 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 2942 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2943 // CHECK12-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 2944 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4 2945 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2946 // CHECK12-NEXT: store i8* null, i8** [[TMP23]], align 4 2947 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2948 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 2949 // CHECK12-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4 2950 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2951 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 2952 // CHECK12-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4 2953 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2954 // CHECK12-NEXT: store i8* null, i8** [[TMP28]], align 4 2955 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2956 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 2957 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 2958 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2959 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 2960 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4 2961 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 2962 // CHECK12-NEXT: store i8* null, i8** [[TMP33]], align 4 2963 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2964 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2965 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 2966 // CHECK12-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2967 // CHECK12-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 2968 // CHECK12-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2969 // CHECK12: omp_offload.failed: 2970 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 2971 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2972 // CHECK12: omp_offload.cont: 2973 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 2974 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2975 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2976 // CHECK12-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2977 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2978 // CHECK12: arraydestroy.body: 2979 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2980 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2981 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2982 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2983 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2984 // CHECK12: arraydestroy.done2: 2985 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2986 // CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 2987 // CHECK12-NEXT: ret i32 [[TMP39]] 2988 // 2989 // 2990 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2991 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2992 // CHECK12-NEXT: entry: 2993 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2994 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2995 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2996 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 2997 // CHECK12-NEXT: ret void 2998 // 2999 // 3000 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3001 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3002 // CHECK12-NEXT: entry: 3003 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3004 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3005 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3006 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3007 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3008 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3009 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3010 // CHECK12-NEXT: ret void 3011 // 3012 // 3013 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 3014 // CHECK12-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 3015 // CHECK12-NEXT: entry: 3016 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3017 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3018 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3019 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3020 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 3021 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3022 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3023 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3024 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3025 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3026 // CHECK12-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 3027 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3028 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3029 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3030 // CHECK12-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 3031 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3032 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]]) 3033 // CHECK12-NEXT: ret void 3034 // 3035 // 3036 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 3037 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 3038 // CHECK12-NEXT: entry: 3039 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3040 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3041 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3042 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3043 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3044 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3045 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 3046 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3047 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 3048 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3049 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3050 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3051 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3052 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3053 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3054 // CHECK12-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 3055 // CHECK12-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 3056 // CHECK12-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 3057 // CHECK12-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3058 // CHECK12-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 4 3059 // CHECK12-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 3060 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3061 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3062 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3063 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3064 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3065 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3066 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3067 // CHECK12-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 3068 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3069 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3070 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3071 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3072 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 3073 // CHECK12-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 3074 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3075 // CHECK12-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4 3076 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3077 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3078 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3079 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3080 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 3081 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 3082 // CHECK12-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 3083 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 3084 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 8, i1 false) 3085 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 3086 // CHECK12-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 3087 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3088 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 3089 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3090 // CHECK12: omp.arraycpy.body: 3091 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3092 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3093 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3094 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3095 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 4, i1 false) 3096 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3097 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3098 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 3099 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 3100 // CHECK12: omp.arraycpy.done6: 3101 // CHECK12-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 3102 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 3103 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 3104 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false) 3105 // CHECK12-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4 3106 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 3107 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 3108 // CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3109 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 3110 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3111 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3112 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 3113 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3114 // CHECK12: cond.true: 3115 // CHECK12-NEXT: br label [[COND_END:%.*]] 3116 // CHECK12: cond.false: 3117 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3118 // CHECK12-NEXT: br label [[COND_END]] 3119 // CHECK12: cond.end: 3120 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 3121 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3122 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3123 // CHECK12-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 3124 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3125 // CHECK12: omp.inner.for.cond: 3126 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3127 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3128 // CHECK12-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 3129 // CHECK12-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3130 // CHECK12: omp.inner.for.cond.cleanup: 3131 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3132 // CHECK12: omp.inner.for.body: 3133 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3134 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP24]], 1 3135 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3136 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3137 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4 3138 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4 3139 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP26]] 3140 // CHECK12-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX]], align 4 3141 // CHECK12-NEXT: [[TMP27:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4 3142 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4 3143 // CHECK12-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 [[TMP28]] 3144 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8* 3145 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP27]] to i8* 3146 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 4, i1 false) 3147 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3148 // CHECK12: omp.body.continue: 3149 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3150 // CHECK12: omp.inner.for.inc: 3151 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3152 // CHECK12-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP31]], 1 3153 // CHECK12-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 3154 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3155 // CHECK12: omp.inner.for.end: 3156 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3157 // CHECK12: omp.loop.exit: 3158 // CHECK12-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3159 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 3160 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 3161 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 3162 // CHECK12-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 3163 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 3164 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3165 // CHECK12: arraydestroy.body: 3166 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3167 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3168 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3169 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 3170 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 3171 // CHECK12: arraydestroy.done14: 3172 // CHECK12-NEXT: ret void 3173 // 3174 // 3175 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3176 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3177 // CHECK12-NEXT: entry: 3178 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3179 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3180 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3181 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3182 // CHECK12-NEXT: ret void 3183 // 3184 // 3185 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3186 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat { 3187 // CHECK12-NEXT: entry: 3188 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3189 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3190 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3191 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3192 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3193 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 3194 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3195 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3196 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 3197 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 3198 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 3199 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3200 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 3201 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 3202 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3203 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 3204 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3205 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 3206 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 3207 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 3208 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 3209 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 3210 // CHECK12-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 3211 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 3212 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 3213 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3214 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3215 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3216 // CHECK12-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3217 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3218 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 3219 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 3220 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3221 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3222 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 3223 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3224 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4 3225 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3226 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 3227 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 3228 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3229 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 3230 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 3231 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3232 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4 3233 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3234 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 3235 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 3236 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3237 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 3238 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4 3239 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3240 // CHECK12-NEXT: store i8* null, i8** [[TMP21]], align 4 3241 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3242 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 3243 // CHECK12-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4 3244 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3245 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 3246 // CHECK12-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4 3247 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3248 // CHECK12-NEXT: store i8* null, i8** [[TMP26]], align 4 3249 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3250 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3251 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 3252 // CHECK12-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3253 // CHECK12-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 3254 // CHECK12-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3255 // CHECK12: omp_offload.failed: 3256 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 3257 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3258 // CHECK12: omp_offload.cont: 3259 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 3260 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3261 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3262 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3263 // CHECK12: arraydestroy.body: 3264 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3265 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3266 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3267 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3268 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3269 // CHECK12: arraydestroy.done2: 3270 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3271 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 3272 // CHECK12-NEXT: ret i32 [[TMP32]] 3273 // 3274 // 3275 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3276 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3277 // CHECK12-NEXT: entry: 3278 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3279 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3280 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3281 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3282 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 3283 // CHECK12-NEXT: ret void 3284 // 3285 // 3286 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3287 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3288 // CHECK12-NEXT: entry: 3289 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3290 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3291 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3292 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3293 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3294 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3295 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3296 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 3297 // CHECK12-NEXT: ret void 3298 // 3299 // 3300 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3301 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3302 // CHECK12-NEXT: entry: 3303 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3304 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3305 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3306 // CHECK12-NEXT: ret void 3307 // 3308 // 3309 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3310 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3311 // CHECK12-NEXT: entry: 3312 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3313 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3314 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3315 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 3316 // CHECK12-NEXT: ret void 3317 // 3318 // 3319 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3320 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3321 // CHECK12-NEXT: entry: 3322 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3323 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3324 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3325 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3326 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3327 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3328 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 3329 // CHECK12-NEXT: ret void 3330 // 3331 // 3332 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 3333 // CHECK12-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3334 // CHECK12-NEXT: entry: 3335 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3336 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3337 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3338 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3339 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3340 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3341 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3342 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3343 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3344 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3345 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3346 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3347 // CHECK12-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 3348 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3349 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 3350 // CHECK12-NEXT: ret void 3351 // 3352 // 3353 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 3354 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3355 // CHECK12-NEXT: entry: 3356 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3357 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3358 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3359 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3360 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3361 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3362 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3363 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 3364 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3365 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3366 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3367 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3368 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3369 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3370 // CHECK12-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 3371 // CHECK12-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 3372 // CHECK12-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 3373 // CHECK12-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3374 // CHECK12-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 4 3375 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3376 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3377 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3378 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3379 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3380 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3381 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3382 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3383 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3384 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3385 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3386 // CHECK12-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 3387 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3388 // CHECK12-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4 3389 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3390 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3391 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3392 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3393 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3394 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 3395 // CHECK12-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 3396 // CHECK12-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 3397 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 8, i1 false) 3398 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3399 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 3400 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3401 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 3402 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3403 // CHECK12: omp.arraycpy.body: 3404 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3405 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3406 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3407 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3408 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 3409 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3410 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3411 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 3412 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 3413 // CHECK12: omp.arraycpy.done6: 3414 // CHECK12-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 3415 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 3416 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 3417 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false) 3418 // CHECK12-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4 3419 // CHECK12-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3420 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 3421 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3422 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3423 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 3424 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3425 // CHECK12: cond.true: 3426 // CHECK12-NEXT: br label [[COND_END:%.*]] 3427 // CHECK12: cond.false: 3428 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3429 // CHECK12-NEXT: br label [[COND_END]] 3430 // CHECK12: cond.end: 3431 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 3432 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3433 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3434 // CHECK12-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 3435 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3436 // CHECK12: omp.inner.for.cond: 3437 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3438 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3439 // CHECK12-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 3440 // CHECK12-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3441 // CHECK12: omp.inner.for.cond.cleanup: 3442 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3443 // CHECK12: omp.inner.for.body: 3444 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3445 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 3446 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3447 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3448 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4 3449 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4 3450 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP24]] 3451 // CHECK12-NEXT: store i32 [[TMP23]], i32* [[ARRAYIDX]], align 4 3452 // CHECK12-NEXT: [[TMP25:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4 3453 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4 3454 // CHECK12-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 [[TMP26]] 3455 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8* 3456 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[TMP25]] to i8* 3457 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 4, i1 false) 3458 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3459 // CHECK12: omp.body.continue: 3460 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3461 // CHECK12: omp.inner.for.inc: 3462 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3463 // CHECK12-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1 3464 // CHECK12-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 3465 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3466 // CHECK12: omp.inner.for.end: 3467 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3468 // CHECK12: omp.loop.exit: 3469 // CHECK12-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3470 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 3471 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP31]]) 3472 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 3473 // CHECK12-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3474 // CHECK12-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 3475 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3476 // CHECK12: arraydestroy.body: 3477 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP32]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3478 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3479 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3480 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 3481 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 3482 // CHECK12: arraydestroy.done13: 3483 // CHECK12-NEXT: ret void 3484 // 3485 // 3486 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3487 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3488 // CHECK12-NEXT: entry: 3489 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3490 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3491 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3492 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3493 // CHECK12-NEXT: ret void 3494 // 3495 // 3496 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3497 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3498 // CHECK12-NEXT: entry: 3499 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3500 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3501 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3502 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3503 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 3504 // CHECK12-NEXT: ret void 3505 // 3506 // 3507 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3508 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3509 // CHECK12-NEXT: entry: 3510 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3511 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3512 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3513 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3514 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3515 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3516 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3517 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3518 // CHECK12-NEXT: ret void 3519 // 3520 // 3521 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3522 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3523 // CHECK12-NEXT: entry: 3524 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3525 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3526 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3527 // CHECK12-NEXT: ret void 3528 // 3529 // 3530 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3531 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 3532 // CHECK12-NEXT: entry: 3533 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 3534 // CHECK12-NEXT: ret void 3535 // 3536 // 3537 // CHECK13-LABEL: define {{[^@]+}}@main 3538 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 3539 // CHECK13-NEXT: entry: 3540 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3541 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 3542 // CHECK13-NEXT: [[G1:%.*]] = alloca double*, align 8 3543 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3544 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3545 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3546 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3547 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 3548 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 3549 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 3550 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 3551 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3552 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3553 // CHECK13-NEXT: store double* [[G]], double** [[G1]], align 8 3554 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 3555 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3556 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3557 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3558 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3559 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3560 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3561 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3562 // CHECK13-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 3563 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3564 // CHECK13-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 3565 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3566 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 3567 // CHECK13-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8 3568 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 3569 // CHECK13-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 8 3570 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 3571 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 3572 // CHECK13: for.cond: 3573 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3574 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 3575 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3576 // CHECK13: for.body: 3577 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 3578 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 3579 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64 3580 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 3581 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 3582 // CHECK13-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8 3583 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3584 // CHECK13-NEXT: [[IDXPROM3:%.*]] = sext i32 [[TMP9]] to i64 3585 // CHECK13-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM3]] 3586 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 3587 // CHECK13-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 3588 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 3589 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 3590 // CHECK13: for.inc: 3591 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 3592 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 3593 // CHECK13-NEXT: store i32 [[INC]], i32* [[I]], align 4 3594 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3595 // CHECK13: for.end: 3596 // CHECK13-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 3597 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3598 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3599 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3600 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3601 // CHECK13: arraydestroy.body: 3602 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3603 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3604 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 3605 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3606 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 3607 // CHECK13: arraydestroy.done5: 3608 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3609 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 3610 // CHECK13-NEXT: ret i32 [[TMP14]] 3611 // 3612 // 3613 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3614 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3615 // CHECK13-NEXT: entry: 3616 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3617 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3618 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3619 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 3620 // CHECK13-NEXT: ret void 3621 // 3622 // 3623 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3624 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3625 // CHECK13-NEXT: entry: 3626 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3627 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3628 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3629 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3630 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3631 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3632 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3633 // CHECK13-NEXT: ret void 3634 // 3635 // 3636 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3637 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { 3638 // CHECK13-NEXT: entry: 3639 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3640 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3641 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3642 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3643 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3644 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 3645 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 3646 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 3647 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 3648 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3649 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 3650 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3651 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3652 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 3653 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 3654 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 3655 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 3656 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 3657 // CHECK13-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 3658 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 3659 // CHECK13-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 3660 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 3661 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 3662 // CHECK13-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8 3663 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 3664 // CHECK13-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 8 3665 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 3666 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 3667 // CHECK13: for.cond: 3668 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3669 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 3670 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3671 // CHECK13: for.body: 3672 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 3673 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 3674 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64 3675 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 3676 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 3677 // CHECK13-NEXT: [[TMP8:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8 3678 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3679 // CHECK13-NEXT: [[IDXPROM3:%.*]] = sext i32 [[TMP9]] to i64 3680 // CHECK13-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM3]] 3681 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 3682 // CHECK13-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[TMP8]] to i8* 3683 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 3684 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 3685 // CHECK13: for.inc: 3686 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 3687 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 3688 // CHECK13-NEXT: store i32 [[INC]], i32* [[I]], align 4 3689 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 3690 // CHECK13: for.end: 3691 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3692 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3693 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3694 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3695 // CHECK13: arraydestroy.body: 3696 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3697 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3698 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3699 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3700 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 3701 // CHECK13: arraydestroy.done5: 3702 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3703 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 3704 // CHECK13-NEXT: ret i32 [[TMP14]] 3705 // 3706 // 3707 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3708 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3709 // CHECK13-NEXT: entry: 3710 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3711 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3712 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3713 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3714 // CHECK13-NEXT: ret void 3715 // 3716 // 3717 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3718 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3719 // CHECK13-NEXT: entry: 3720 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3721 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3722 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3723 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3724 // CHECK13-NEXT: store float 0.000000e+00, float* [[F]], align 4 3725 // CHECK13-NEXT: ret void 3726 // 3727 // 3728 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3729 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3730 // CHECK13-NEXT: entry: 3731 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3732 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3733 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3734 // CHECK13-NEXT: ret void 3735 // 3736 // 3737 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3738 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3739 // CHECK13-NEXT: entry: 3740 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3741 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3742 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3743 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3744 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3745 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3746 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3747 // CHECK13-NEXT: store float [[TMP0]], float* [[F]], align 4 3748 // CHECK13-NEXT: ret void 3749 // 3750 // 3751 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3752 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3753 // CHECK13-NEXT: entry: 3754 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3755 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3756 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3757 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 3758 // CHECK13-NEXT: ret void 3759 // 3760 // 3761 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3762 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3763 // CHECK13-NEXT: entry: 3764 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3765 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3766 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3767 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3768 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3769 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3770 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 3771 // CHECK13-NEXT: ret void 3772 // 3773 // 3774 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3775 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3776 // CHECK13-NEXT: entry: 3777 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3778 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3779 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3780 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3781 // CHECK13-NEXT: ret void 3782 // 3783 // 3784 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3785 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3786 // CHECK13-NEXT: entry: 3787 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3788 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3789 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3790 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3791 // CHECK13-NEXT: store i32 0, i32* [[F]], align 4 3792 // CHECK13-NEXT: ret void 3793 // 3794 // 3795 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3796 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3797 // CHECK13-NEXT: entry: 3798 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3799 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3800 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3801 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3802 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3803 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3804 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3805 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3806 // CHECK13-NEXT: ret void 3807 // 3808 // 3809 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3810 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3811 // CHECK13-NEXT: entry: 3812 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3813 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3814 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3815 // CHECK13-NEXT: ret void 3816 // 3817 // 3818 // CHECK14-LABEL: define {{[^@]+}}@main 3819 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 3820 // CHECK14-NEXT: entry: 3821 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3822 // CHECK14-NEXT: [[G:%.*]] = alloca double, align 8 3823 // CHECK14-NEXT: [[G1:%.*]] = alloca double*, align 8 3824 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3825 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3826 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3827 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3828 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 3829 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 3830 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 3831 // CHECK14-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 3832 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 3833 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 3834 // CHECK14-NEXT: store double* [[G]], double** [[G1]], align 8 3835 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 3836 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 3837 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3838 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3839 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3840 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3841 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3842 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3843 // CHECK14-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 3844 // CHECK14-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3845 // CHECK14-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 3846 // CHECK14-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3847 // CHECK14-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 3848 // CHECK14-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8 3849 // CHECK14-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 3850 // CHECK14-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 8 3851 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 3852 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 3853 // CHECK14: for.cond: 3854 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3855 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 3856 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3857 // CHECK14: for.body: 3858 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 3859 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 3860 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64 3861 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 3862 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 3863 // CHECK14-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8 3864 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3865 // CHECK14-NEXT: [[IDXPROM3:%.*]] = sext i32 [[TMP9]] to i64 3866 // CHECK14-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM3]] 3867 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 3868 // CHECK14-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 3869 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 3870 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 3871 // CHECK14: for.inc: 3872 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 3873 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 3874 // CHECK14-NEXT: store i32 [[INC]], i32* [[I]], align 4 3875 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3876 // CHECK14: for.end: 3877 // CHECK14-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 3878 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3879 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3880 // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3881 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3882 // CHECK14: arraydestroy.body: 3883 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3884 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3885 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 3886 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3887 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 3888 // CHECK14: arraydestroy.done5: 3889 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3890 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 3891 // CHECK14-NEXT: ret i32 [[TMP14]] 3892 // 3893 // 3894 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3895 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3896 // CHECK14-NEXT: entry: 3897 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3898 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3899 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3900 // CHECK14-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 3901 // CHECK14-NEXT: ret void 3902 // 3903 // 3904 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3905 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3906 // CHECK14-NEXT: entry: 3907 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3908 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3909 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3910 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3911 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3912 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3913 // CHECK14-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3914 // CHECK14-NEXT: ret void 3915 // 3916 // 3917 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3918 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat { 3919 // CHECK14-NEXT: entry: 3920 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3921 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3922 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3923 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3924 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3925 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 3926 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 3927 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 3928 // CHECK14-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 3929 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 3930 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 3931 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 3932 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3933 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 3934 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 3935 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 3936 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 3937 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 3938 // CHECK14-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 3939 // CHECK14-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 3940 // CHECK14-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 3941 // CHECK14-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 3942 // CHECK14-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 3943 // CHECK14-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8 3944 // CHECK14-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 3945 // CHECK14-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 8 3946 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 3947 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 3948 // CHECK14: for.cond: 3949 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3950 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 3951 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3952 // CHECK14: for.body: 3953 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 3954 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 3955 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64 3956 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 3957 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 3958 // CHECK14-NEXT: [[TMP8:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8 3959 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3960 // CHECK14-NEXT: [[IDXPROM3:%.*]] = sext i32 [[TMP9]] to i64 3961 // CHECK14-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM3]] 3962 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 3963 // CHECK14-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[TMP8]] to i8* 3964 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 3965 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 3966 // CHECK14: for.inc: 3967 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 3968 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 3969 // CHECK14-NEXT: store i32 [[INC]], i32* [[I]], align 4 3970 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 3971 // CHECK14: for.end: 3972 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 3973 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3974 // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3975 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3976 // CHECK14: arraydestroy.body: 3977 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3978 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3979 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3980 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3981 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 3982 // CHECK14: arraydestroy.done5: 3983 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3984 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 3985 // CHECK14-NEXT: ret i32 [[TMP14]] 3986 // 3987 // 3988 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3989 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3990 // CHECK14-NEXT: entry: 3991 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3992 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3993 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3994 // CHECK14-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3995 // CHECK14-NEXT: ret void 3996 // 3997 // 3998 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3999 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4000 // CHECK14-NEXT: entry: 4001 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4002 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4003 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4004 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4005 // CHECK14-NEXT: store float 0.000000e+00, float* [[F]], align 4 4006 // CHECK14-NEXT: ret void 4007 // 4008 // 4009 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4010 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4011 // CHECK14-NEXT: entry: 4012 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4013 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4014 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4015 // CHECK14-NEXT: ret void 4016 // 4017 // 4018 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4019 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4020 // CHECK14-NEXT: entry: 4021 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4022 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4023 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4024 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4025 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4026 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4027 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4028 // CHECK14-NEXT: store float [[TMP0]], float* [[F]], align 4 4029 // CHECK14-NEXT: ret void 4030 // 4031 // 4032 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4033 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4034 // CHECK14-NEXT: entry: 4035 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4036 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4037 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4038 // CHECK14-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 4039 // CHECK14-NEXT: ret void 4040 // 4041 // 4042 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4043 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4044 // CHECK14-NEXT: entry: 4045 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4046 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4047 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4048 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4049 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4050 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4051 // CHECK14-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 4052 // CHECK14-NEXT: ret void 4053 // 4054 // 4055 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4056 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4057 // CHECK14-NEXT: entry: 4058 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4059 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4060 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4061 // CHECK14-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4062 // CHECK14-NEXT: ret void 4063 // 4064 // 4065 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4066 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4067 // CHECK14-NEXT: entry: 4068 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4069 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4070 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4071 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4072 // CHECK14-NEXT: store i32 0, i32* [[F]], align 4 4073 // CHECK14-NEXT: ret void 4074 // 4075 // 4076 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4077 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4078 // CHECK14-NEXT: entry: 4079 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4080 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4081 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4082 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4083 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4084 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4085 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4086 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4087 // CHECK14-NEXT: ret void 4088 // 4089 // 4090 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4091 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4092 // CHECK14-NEXT: entry: 4093 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4094 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4095 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4096 // CHECK14-NEXT: ret void 4097 // 4098 // 4099 // CHECK15-LABEL: define {{[^@]+}}@main 4100 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 4101 // CHECK15-NEXT: entry: 4102 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4103 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 4104 // CHECK15-NEXT: [[G1:%.*]] = alloca double*, align 4 4105 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4106 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4107 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4108 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4109 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4110 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4111 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 4112 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 4113 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 4114 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 4115 // CHECK15-NEXT: store double* [[G]], double** [[G1]], align 4 4116 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 4117 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 4118 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4119 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4120 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4121 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 4122 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4123 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 4124 // CHECK15-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4125 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4126 // CHECK15-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 4127 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4128 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4129 // CHECK15-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4 4130 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 4131 // CHECK15-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 4 4132 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 4133 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 4134 // CHECK15: for.cond: 4135 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 4136 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 4137 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4138 // CHECK15: for.body: 4139 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 4140 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 4141 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP7]] 4142 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 4143 // CHECK15-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4 4144 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 4145 // CHECK15-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP9]] 4146 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[ARRAYIDX3]] to i8* 4147 // CHECK15-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 4148 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 4149 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 4150 // CHECK15: for.inc: 4151 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 4152 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 4153 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 4154 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4155 // CHECK15: for.end: 4156 // CHECK15-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 4157 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4158 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4159 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4160 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4161 // CHECK15: arraydestroy.body: 4162 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4163 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4164 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 4165 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4166 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 4167 // CHECK15: arraydestroy.done4: 4168 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4169 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 4170 // CHECK15-NEXT: ret i32 [[TMP14]] 4171 // 4172 // 4173 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4174 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4175 // CHECK15-NEXT: entry: 4176 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4177 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4178 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4179 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 4180 // CHECK15-NEXT: ret void 4181 // 4182 // 4183 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4184 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4185 // CHECK15-NEXT: entry: 4186 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4187 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4188 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4189 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4190 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4191 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4192 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 4193 // CHECK15-NEXT: ret void 4194 // 4195 // 4196 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4197 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { 4198 // CHECK15-NEXT: entry: 4199 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4200 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4201 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4202 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4203 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4204 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4205 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4206 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 4207 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 4208 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 4209 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 4210 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 4211 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4212 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4213 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4214 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 4215 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4216 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 4217 // CHECK15-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 4218 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4219 // CHECK15-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 4220 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4221 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4222 // CHECK15-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4 4223 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 4224 // CHECK15-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 4 4225 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 4226 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 4227 // CHECK15: for.cond: 4228 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 4229 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 4230 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4231 // CHECK15: for.body: 4232 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 4233 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 4234 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP7]] 4235 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 4236 // CHECK15-NEXT: [[TMP8:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4 4237 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 4238 // CHECK15-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP9]] 4239 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[ARRAYIDX3]] to i8* 4240 // CHECK15-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[TMP8]] to i8* 4241 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 4242 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 4243 // CHECK15: for.inc: 4244 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 4245 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 4246 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 4247 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 4248 // CHECK15: for.end: 4249 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 4250 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4251 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4252 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4253 // CHECK15: arraydestroy.body: 4254 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4255 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4256 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4257 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4258 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 4259 // CHECK15: arraydestroy.done4: 4260 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4261 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 4262 // CHECK15-NEXT: ret i32 [[TMP14]] 4263 // 4264 // 4265 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4266 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4267 // CHECK15-NEXT: entry: 4268 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4269 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4270 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4271 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4272 // CHECK15-NEXT: ret void 4273 // 4274 // 4275 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4276 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4277 // CHECK15-NEXT: entry: 4278 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4279 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4280 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4281 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4282 // CHECK15-NEXT: store float 0.000000e+00, float* [[F]], align 4 4283 // CHECK15-NEXT: ret void 4284 // 4285 // 4286 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4287 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4288 // CHECK15-NEXT: entry: 4289 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4290 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4291 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4292 // CHECK15-NEXT: ret void 4293 // 4294 // 4295 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4296 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4297 // CHECK15-NEXT: entry: 4298 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4299 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4300 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4301 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4302 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4303 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4304 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4305 // CHECK15-NEXT: store float [[TMP0]], float* [[F]], align 4 4306 // CHECK15-NEXT: ret void 4307 // 4308 // 4309 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4310 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4311 // CHECK15-NEXT: entry: 4312 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4313 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4314 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4315 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 4316 // CHECK15-NEXT: ret void 4317 // 4318 // 4319 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4320 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4321 // CHECK15-NEXT: entry: 4322 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4323 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4324 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4325 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4326 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4327 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4328 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 4329 // CHECK15-NEXT: ret void 4330 // 4331 // 4332 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4333 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4334 // CHECK15-NEXT: entry: 4335 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4336 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4337 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4338 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4339 // CHECK15-NEXT: ret void 4340 // 4341 // 4342 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4343 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4344 // CHECK15-NEXT: entry: 4345 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4346 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4347 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4348 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4349 // CHECK15-NEXT: store i32 0, i32* [[F]], align 4 4350 // CHECK15-NEXT: ret void 4351 // 4352 // 4353 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4354 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4355 // CHECK15-NEXT: entry: 4356 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4357 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4358 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4359 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4360 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4361 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4362 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4363 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4364 // CHECK15-NEXT: ret void 4365 // 4366 // 4367 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4368 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4369 // CHECK15-NEXT: entry: 4370 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4371 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4372 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4373 // CHECK15-NEXT: ret void 4374 // 4375 // 4376 // CHECK16-LABEL: define {{[^@]+}}@main 4377 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] { 4378 // CHECK16-NEXT: entry: 4379 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4380 // CHECK16-NEXT: [[G:%.*]] = alloca double, align 8 4381 // CHECK16-NEXT: [[G1:%.*]] = alloca double*, align 4 4382 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4383 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4384 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4385 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4386 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4387 // CHECK16-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4388 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 4389 // CHECK16-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 4390 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 4391 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 4392 // CHECK16-NEXT: store double* [[G]], double** [[G1]], align 4 4393 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 4394 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 4395 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4396 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4397 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4398 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 4399 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4400 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 4401 // CHECK16-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4402 // CHECK16-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4403 // CHECK16-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 4404 // CHECK16-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4405 // CHECK16-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4406 // CHECK16-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4 4407 // CHECK16-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 4408 // CHECK16-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 4 4409 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 4410 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 4411 // CHECK16: for.cond: 4412 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 4413 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 4414 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4415 // CHECK16: for.body: 4416 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 4417 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 4418 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP7]] 4419 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 4420 // CHECK16-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4 4421 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 4422 // CHECK16-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP9]] 4423 // CHECK16-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[ARRAYIDX3]] to i8* 4424 // CHECK16-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 4425 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 4426 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 4427 // CHECK16: for.inc: 4428 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 4429 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 4430 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 4431 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4432 // CHECK16: for.end: 4433 // CHECK16-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 4434 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4435 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4436 // CHECK16-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4437 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4438 // CHECK16: arraydestroy.body: 4439 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4440 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4441 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 4442 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4443 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 4444 // CHECK16: arraydestroy.done4: 4445 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4446 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 4447 // CHECK16-NEXT: ret i32 [[TMP14]] 4448 // 4449 // 4450 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4451 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4452 // CHECK16-NEXT: entry: 4453 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4454 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4455 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4456 // CHECK16-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 4457 // CHECK16-NEXT: ret void 4458 // 4459 // 4460 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4461 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4462 // CHECK16-NEXT: entry: 4463 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4464 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4465 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4466 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4467 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4468 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4469 // CHECK16-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 4470 // CHECK16-NEXT: ret void 4471 // 4472 // 4473 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4474 // CHECK16-SAME: () #[[ATTR3:[0-9]+]] comdat { 4475 // CHECK16-NEXT: entry: 4476 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4477 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4478 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4479 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4480 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4481 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4482 // CHECK16-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4483 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 4484 // CHECK16-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 4485 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 4486 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 4487 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 4488 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4489 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4490 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4491 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 4492 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4493 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 4494 // CHECK16-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 4495 // CHECK16-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4496 // CHECK16-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 4497 // CHECK16-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4498 // CHECK16-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4499 // CHECK16-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4 4500 // CHECK16-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 4501 // CHECK16-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 4 4502 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 4503 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 4504 // CHECK16: for.cond: 4505 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 4506 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], 2 4507 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4508 // CHECK16: for.body: 4509 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR]], align 4 4510 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4 4511 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP7]] 4512 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 4513 // CHECK16-NEXT: [[TMP8:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4 4514 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 4515 // CHECK16-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP9]] 4516 // CHECK16-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[ARRAYIDX3]] to i8* 4517 // CHECK16-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[TMP8]] to i8* 4518 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 4519 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 4520 // CHECK16: for.inc: 4521 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 4522 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 4523 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 4524 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 4525 // CHECK16: for.end: 4526 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 4527 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4528 // CHECK16-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4529 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4530 // CHECK16: arraydestroy.body: 4531 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4532 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4533 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4534 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4535 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 4536 // CHECK16: arraydestroy.done4: 4537 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4538 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 4539 // CHECK16-NEXT: ret i32 [[TMP14]] 4540 // 4541 // 4542 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4543 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4544 // CHECK16-NEXT: entry: 4545 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4546 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4547 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4548 // CHECK16-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4549 // CHECK16-NEXT: ret void 4550 // 4551 // 4552 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4553 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4554 // CHECK16-NEXT: entry: 4555 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4556 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4557 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4558 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4559 // CHECK16-NEXT: store float 0.000000e+00, float* [[F]], align 4 4560 // CHECK16-NEXT: ret void 4561 // 4562 // 4563 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4564 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4565 // CHECK16-NEXT: entry: 4566 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4567 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4568 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4569 // CHECK16-NEXT: ret void 4570 // 4571 // 4572 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4573 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4574 // CHECK16-NEXT: entry: 4575 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4576 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4577 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4578 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4579 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4580 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4581 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4582 // CHECK16-NEXT: store float [[TMP0]], float* [[F]], align 4 4583 // CHECK16-NEXT: ret void 4584 // 4585 // 4586 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4587 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4588 // CHECK16-NEXT: entry: 4589 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4590 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4591 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4592 // CHECK16-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 4593 // CHECK16-NEXT: ret void 4594 // 4595 // 4596 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4597 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4598 // CHECK16-NEXT: entry: 4599 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4600 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4601 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4602 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4603 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4604 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4605 // CHECK16-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 4606 // CHECK16-NEXT: ret void 4607 // 4608 // 4609 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4610 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4611 // CHECK16-NEXT: entry: 4612 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4613 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4614 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4615 // CHECK16-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4616 // CHECK16-NEXT: ret void 4617 // 4618 // 4619 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4620 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4621 // CHECK16-NEXT: entry: 4622 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4623 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4624 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4625 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4626 // CHECK16-NEXT: store i32 0, i32* [[F]], align 4 4627 // CHECK16-NEXT: ret void 4628 // 4629 // 4630 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4631 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4632 // CHECK16-NEXT: entry: 4633 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4634 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4635 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4636 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4637 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4638 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4639 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4640 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4641 // CHECK16-NEXT: ret void 4642 // 4643 // 4644 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4645 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4646 // CHECK16-NEXT: entry: 4647 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4648 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4649 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4650 // CHECK16-NEXT: ret void 4651 // 4652