1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
8
9 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
10 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15
16 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9
19 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
21 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11
22
23 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
25 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
29 // expected-no-diagnostics
30 #ifndef HEADER
31 #define HEADER
32
33 template <class T>
34 struct S {
35 T f;
SS36 S(T a) : f(a) {}
SS37 S() : f() {}
operator TS38 operator T() { return T(); }
~SS39 ~S() {}
40 };
41
42 template <typename T>
tmain()43 T tmain() {
44 S<T> test;
45 T t_var = T();
46 T vec[] = {1, 2};
47 S<T> s_arr[] = {1, 2};
48 S<T> &var = test;
49 #pragma omp target
50 #pragma omp teams
51 #pragma omp distribute firstprivate(t_var, vec, s_arr, s_arr, var, var)
52 for (int i = 0; i < 2; ++i) {
53 vec[i] = t_var;
54 s_arr[i] = var;
55 }
56 return T();
57 }
58
main()59 int main() {
60 static int svar;
61 volatile double g;
62 volatile double &g1 = g;
63
64 #ifdef LAMBDA
65 [&]() {
66 static float sfvar;
67
68 #pragma omp target
69 #pragma omp teams
70 #pragma omp distribute firstprivate(g, g1, svar, sfvar)
71 for (int i = 0; i < 2; ++i) {
72 // Private alloca's for conversion
73
74 // Actual private variables to be used in the body (tmp is used for the reference type)
75
76 // Store input parameter addresses into private alloca's for conversion
77
78 g += 1;
79 g1 += 1;
80 svar += 3;
81 sfvar += 4.0;
82
83 // call inner lambda (use refs to private alloca's)
84 [&]() {
85 g += 2;
86 g1 += 2;
87 svar += 4;
88 sfvar += 8.0;
89
90
91
92 }();
93 }
94 }();
95 return 0;
96 #else
97 S<float> test;
98 int t_var = 0;
99 int vec[] = {1, 2};
100 S<float> s_arr[] = {1, 2};
101 S<float> &var = test;
102
103 #pragma omp target
104 #pragma omp teams
105 #pragma omp distribute firstprivate(t_var, vec, s_arr, s_arr, var, var, svar)
106 for (int i = 0; i < 2; ++i) {
107 vec[i] = t_var;
108 s_arr[i] = var;
109 }
110 return tmain<int>();
111 #endif
112 }
113
114
115
116
117 // discard omp loop variables
118
119
120
121 // init t_var
122
123 // init vec
124
125 // init s_arr
126
127
128 // init var
129
130 // init svar
131
132
133
134 // Template
135
136
137
138 // discard omp loop variables
139
140
141
142 // init t_var
143
144 // init vec
145
146 // init s_arr
147
148
149 // init var
150
151
152 #endif
153 // CHECK1-LABEL: define {{[^@]+}}@main
154 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
155 // CHECK1-NEXT: entry:
156 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
157 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8
158 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8
159 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
160 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
161 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8
162 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
163 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8
164 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
165 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8
166 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8
167 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
168 // CHECK1-NEXT: ret i32 0
169 //
170 //
171 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
172 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
173 // CHECK1-NEXT: entry:
174 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
175 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
176 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
177 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
178 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
179 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
180 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
181 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
182 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
183 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
184 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
185 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
186 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
187 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8
188 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
189 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]])
190 // CHECK1-NEXT: ret void
191 //
192 //
193 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
194 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
195 // CHECK1-NEXT: entry:
196 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
197 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
198 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8
199 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8
200 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
201 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8
202 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
203 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8
204 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
205 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
206 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
207 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
208 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
209 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
210 // CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8
211 // CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8
212 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca double*, align 8
213 // CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
214 // CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
215 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
216 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
217 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
218 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
219 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8
220 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8
221 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
222 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
223 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
224 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
225 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
226 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
227 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8
228 // CHECK1-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8
229 // CHECK1-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8
230 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
231 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
232 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
233 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
234 // CHECK1-NEXT: [[TMP5:%.*]] = load volatile double, double* [[TMP0]], align 8
235 // CHECK1-NEXT: store double [[TMP5]], double* [[G3]], align 8
236 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 8
237 // CHECK1-NEXT: [[TMP7:%.*]] = load volatile double, double* [[TMP6]], align 8
238 // CHECK1-NEXT: store double [[TMP7]], double* [[G14]], align 8
239 // CHECK1-NEXT: store double* [[G14]], double** [[_TMP5]], align 8
240 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4
241 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4
242 // CHECK1-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4
243 // CHECK1-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4
244 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
245 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
246 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
247 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
248 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
249 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
250 // CHECK1: cond.true:
251 // CHECK1-NEXT: br label [[COND_END:%.*]]
252 // CHECK1: cond.false:
253 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
254 // CHECK1-NEXT: br label [[COND_END]]
255 // CHECK1: cond.end:
256 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
257 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
258 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
259 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
260 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
261 // CHECK1: omp.inner.for.cond:
262 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
263 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
264 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
265 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
266 // CHECK1: omp.inner.for.body:
267 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
268 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
269 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
270 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
271 // CHECK1-NEXT: [[TMP18:%.*]] = load double, double* [[G3]], align 8
272 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00
273 // CHECK1-NEXT: store double [[ADD9]], double* [[G3]], align 8
274 // CHECK1-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 8
275 // CHECK1-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 8
276 // CHECK1-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00
277 // CHECK1-NEXT: store volatile double [[ADD10]], double* [[TMP19]], align 8
278 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR6]], align 4
279 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3
280 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[SVAR6]], align 4
281 // CHECK1-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR7]], align 4
282 // CHECK1-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double
283 // CHECK1-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00
284 // CHECK1-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
285 // CHECK1-NEXT: store float [[CONV13]], float* [[SFVAR7]], align 4
286 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
287 // CHECK1-NEXT: store double* [[G3]], double** [[TMP23]], align 8
288 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
289 // CHECK1-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 8
290 // CHECK1-NEXT: store double* [[TMP25]], double** [[TMP24]], align 8
291 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
292 // CHECK1-NEXT: store i32* [[SVAR6]], i32** [[TMP26]], align 8
293 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
294 // CHECK1-NEXT: store float* [[SFVAR7]], float** [[TMP27]], align 8
295 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])
296 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
297 // CHECK1: omp.body.continue:
298 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
299 // CHECK1: omp.inner.for.inc:
300 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
301 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1
302 // CHECK1-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
303 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
304 // CHECK1: omp.inner.for.end:
305 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
306 // CHECK1: omp.loop.exit:
307 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]])
308 // CHECK1-NEXT: ret void
309 //
310 //
311 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
312 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
313 // CHECK1-NEXT: entry:
314 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
315 // CHECK1-NEXT: ret void
316 //
317 //
318 // CHECK3-LABEL: define {{[^@]+}}@main
319 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
320 // CHECK3-NEXT: entry:
321 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
322 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8
323 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4
324 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
325 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
326 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4
327 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
328 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4
329 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
330 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4
331 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4
332 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
333 // CHECK3-NEXT: ret i32 0
334 //
335 //
336 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
337 // CHECK3-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
338 // CHECK3-NEXT: entry:
339 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
340 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
341 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
342 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
343 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
344 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8
345 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8
346 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4
347 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
348 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
349 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
350 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
351 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
352 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
353 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
354 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
355 // CHECK3-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8
356 // CHECK3-NEXT: store double [[TMP2]], double* [[G2]], align 8
357 // CHECK3-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4
358 // CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4
359 // CHECK3-NEXT: store double [[TMP4]], double* [[G13]], align 8
360 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4
361 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4
362 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]])
363 // CHECK3-NEXT: ret void
364 //
365 //
366 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
367 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
368 // CHECK3-NEXT: entry:
369 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
370 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
371 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
372 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
373 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
374 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4
375 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
376 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4
377 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
378 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
379 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
380 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
381 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
382 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
383 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8
384 // CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8
385 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca double*, align 4
386 // CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
387 // CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
388 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
389 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
390 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
391 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
392 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
393 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
394 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
395 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
396 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
397 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
398 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
399 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
400 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
401 // CHECK3-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
402 // CHECK3-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4
403 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
404 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
405 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
406 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
407 // CHECK3-NEXT: [[TMP5:%.*]] = load volatile double, double* [[TMP0]], align 8
408 // CHECK3-NEXT: store double [[TMP5]], double* [[G3]], align 8
409 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 4
410 // CHECK3-NEXT: [[TMP7:%.*]] = load volatile double, double* [[TMP6]], align 4
411 // CHECK3-NEXT: store double [[TMP7]], double* [[G14]], align 8
412 // CHECK3-NEXT: store double* [[G14]], double** [[_TMP5]], align 4
413 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4
414 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4
415 // CHECK3-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4
416 // CHECK3-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4
417 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
418 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
419 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
420 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
421 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
422 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
423 // CHECK3: cond.true:
424 // CHECK3-NEXT: br label [[COND_END:%.*]]
425 // CHECK3: cond.false:
426 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
427 // CHECK3-NEXT: br label [[COND_END]]
428 // CHECK3: cond.end:
429 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
430 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
431 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
432 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
433 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
434 // CHECK3: omp.inner.for.cond:
435 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
436 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
437 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
438 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
439 // CHECK3: omp.inner.for.body:
440 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
441 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
442 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
443 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
444 // CHECK3-NEXT: [[TMP18:%.*]] = load double, double* [[G3]], align 8
445 // CHECK3-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00
446 // CHECK3-NEXT: store double [[ADD9]], double* [[G3]], align 8
447 // CHECK3-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 4
448 // CHECK3-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 4
449 // CHECK3-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00
450 // CHECK3-NEXT: store volatile double [[ADD10]], double* [[TMP19]], align 4
451 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR6]], align 4
452 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3
453 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[SVAR6]], align 4
454 // CHECK3-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR7]], align 4
455 // CHECK3-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double
456 // CHECK3-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00
457 // CHECK3-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
458 // CHECK3-NEXT: store float [[CONV13]], float* [[SFVAR7]], align 4
459 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
460 // CHECK3-NEXT: store double* [[G3]], double** [[TMP23]], align 4
461 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
462 // CHECK3-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 4
463 // CHECK3-NEXT: store double* [[TMP25]], double** [[TMP24]], align 4
464 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
465 // CHECK3-NEXT: store i32* [[SVAR6]], i32** [[TMP26]], align 4
466 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
467 // CHECK3-NEXT: store float* [[SFVAR7]], float** [[TMP27]], align 4
468 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]])
469 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
470 // CHECK3: omp.body.continue:
471 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
472 // CHECK3: omp.inner.for.inc:
473 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
474 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1
475 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
476 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
477 // CHECK3: omp.inner.for.end:
478 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
479 // CHECK3: omp.loop.exit:
480 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]])
481 // CHECK3-NEXT: ret void
482 //
483 //
484 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
485 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
486 // CHECK3-NEXT: entry:
487 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
488 // CHECK3-NEXT: ret void
489 //
490 //
491 // CHECK9-LABEL: define {{[^@]+}}@main
492 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
493 // CHECK9-NEXT: entry:
494 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
495 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8
496 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8
497 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
498 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
499 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
500 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
501 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8
502 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
503 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
504 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
505 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
506 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
507 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
508 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
509 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
510 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8
511 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
512 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4
513 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
514 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
515 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
516 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
517 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
518 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
519 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
520 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
521 // CHECK9-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
522 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
523 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
524 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
525 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
526 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
527 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
528 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
529 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
530 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
531 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
532 // CHECK9-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
533 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
534 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
535 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
536 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
537 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
538 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
539 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
540 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8
541 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
542 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
543 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
544 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
545 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
546 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8
547 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
548 // CHECK9-NEXT: store i8* null, i8** [[TMP18]], align 8
549 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
550 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
551 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
552 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
553 // CHECK9-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
554 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8
555 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
556 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8
557 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
558 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
559 // CHECK9-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8
560 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
561 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
562 // CHECK9-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8
563 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
564 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8
565 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
566 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
567 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8
568 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
569 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
570 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8
571 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
572 // CHECK9-NEXT: store i8* null, i8** [[TMP33]], align 8
573 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
574 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
575 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
576 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
577 // CHECK9-NEXT: store i32 1, i32* [[TMP36]], align 4
578 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
579 // CHECK9-NEXT: store i32 5, i32* [[TMP37]], align 4
580 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
581 // CHECK9-NEXT: store i8** [[TMP34]], i8*** [[TMP38]], align 8
582 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
583 // CHECK9-NEXT: store i8** [[TMP35]], i8*** [[TMP39]], align 8
584 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
585 // CHECK9-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP40]], align 8
586 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
587 // CHECK9-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP41]], align 8
588 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
589 // CHECK9-NEXT: store i8** null, i8*** [[TMP42]], align 8
590 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
591 // CHECK9-NEXT: store i8** null, i8*** [[TMP43]], align 8
592 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
593 // CHECK9-NEXT: store i64 2, i64* [[TMP44]], align 8
594 // CHECK9-NEXT: [[TMP45:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
595 // CHECK9-NEXT: [[TMP46:%.*]] = icmp ne i32 [[TMP45]], 0
596 // CHECK9-NEXT: br i1 [[TMP46]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
597 // CHECK9: omp_offload.failed:
598 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
599 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
600 // CHECK9: omp_offload.cont:
601 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
602 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
603 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
604 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
605 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
606 // CHECK9: arraydestroy.body:
607 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP47]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
608 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
609 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
610 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
611 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
612 // CHECK9: arraydestroy.done3:
613 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
614 // CHECK9-NEXT: [[TMP48:%.*]] = load i32, i32* [[RETVAL]], align 4
615 // CHECK9-NEXT: ret i32 [[TMP48]]
616 //
617 //
618 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
619 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
620 // CHECK9-NEXT: entry:
621 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
622 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
623 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
624 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
625 // CHECK9-NEXT: ret void
626 //
627 //
628 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
629 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
630 // CHECK9-NEXT: entry:
631 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
632 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
633 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
634 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4
635 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
636 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
637 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
638 // CHECK9-NEXT: ret void
639 //
640 //
641 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103
642 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
643 // CHECK9-NEXT: entry:
644 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
645 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
646 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
647 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
648 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
649 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
650 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
651 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
652 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
653 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
654 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
655 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
656 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
657 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
658 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
659 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
660 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
661 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
662 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]])
663 // CHECK9-NEXT: ret void
664 //
665 //
666 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
667 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
668 // CHECK9-NEXT: entry:
669 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
670 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
671 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
672 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
673 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
674 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
675 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
676 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
677 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
678 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
679 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
680 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
681 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
682 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
683 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
684 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
685 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
686 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
687 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4
688 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 8
689 // CHECK9-NEXT: [[SVAR9:%.*]] = alloca i32, align 4
690 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
691 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
692 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
693 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
694 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
695 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
696 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
697 // CHECK9-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
698 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
699 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
700 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
701 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
702 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
703 // CHECK9-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
704 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
705 // CHECK9-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8
706 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
707 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
708 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
709 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
710 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
711 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4
712 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
713 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
714 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 8, i1 false)
715 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
716 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S*
717 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
718 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]]
719 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
720 // CHECK9: omp.arraycpy.body:
721 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
722 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
723 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
724 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
725 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 4, i1 false)
726 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
727 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
728 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]]
729 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
730 // CHECK9: omp.arraycpy.done6:
731 // CHECK9-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
732 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8*
733 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
734 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false)
735 // CHECK9-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8
736 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4
737 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4
738 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
739 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
740 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
741 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
742 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1
743 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
744 // CHECK9: cond.true:
745 // CHECK9-NEXT: br label [[COND_END:%.*]]
746 // CHECK9: cond.false:
747 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
748 // CHECK9-NEXT: br label [[COND_END]]
749 // CHECK9: cond.end:
750 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]
751 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
752 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
753 // CHECK9-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4
754 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
755 // CHECK9: omp.inner.for.cond:
756 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
757 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
758 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]]
759 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
760 // CHECK9: omp.inner.for.cond.cleanup:
761 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
762 // CHECK9: omp.inner.for.body:
763 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
764 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP24]], 1
765 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
766 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
767 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4
768 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4
769 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP26]] to i64
770 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
771 // CHECK9-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX]], align 4
772 // CHECK9-NEXT: [[TMP27:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8
773 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4
774 // CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP28]] to i64
775 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM11]]
776 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[ARRAYIDX12]] to i8*
777 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP27]] to i8*
778 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false)
779 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
780 // CHECK9: omp.body.continue:
781 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
782 // CHECK9: omp.inner.for.inc:
783 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
784 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP31]], 1
785 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
786 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
787 // CHECK9: omp.inner.for.end:
788 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
789 // CHECK9: omp.loop.exit:
790 // CHECK9-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
791 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
792 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
793 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
794 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
795 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2
796 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
797 // CHECK9: arraydestroy.body:
798 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
799 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
800 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
801 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
802 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
803 // CHECK9: arraydestroy.done15:
804 // CHECK9-NEXT: ret void
805 //
806 //
807 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
808 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
809 // CHECK9-NEXT: entry:
810 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
811 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
812 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
813 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
814 // CHECK9-NEXT: ret void
815 //
816 //
817 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
818 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
819 // CHECK9-NEXT: entry:
820 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
821 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
822 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
823 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
824 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
825 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8
826 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
827 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
828 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
829 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
830 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
831 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
832 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
833 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4
834 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
835 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
836 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
837 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
838 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
839 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
840 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
841 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
842 // CHECK9-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
843 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
844 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
845 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
846 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
847 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
848 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
849 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
850 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
851 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
852 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8
853 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
854 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
855 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
856 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
857 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8
858 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
859 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
860 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8
861 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
862 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
863 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
864 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
865 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8
866 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
867 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
868 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
869 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
870 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
871 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8
872 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
873 // CHECK9-NEXT: store i8* null, i8** [[TMP21]], align 8
874 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
875 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
876 // CHECK9-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8
877 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
878 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
879 // CHECK9-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8
880 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
881 // CHECK9-NEXT: store i8* null, i8** [[TMP26]], align 8
882 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
883 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
884 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
885 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
886 // CHECK9-NEXT: store i32 1, i32* [[TMP29]], align 4
887 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
888 // CHECK9-NEXT: store i32 4, i32* [[TMP30]], align 4
889 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
890 // CHECK9-NEXT: store i8** [[TMP27]], i8*** [[TMP31]], align 8
891 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
892 // CHECK9-NEXT: store i8** [[TMP28]], i8*** [[TMP32]], align 8
893 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
894 // CHECK9-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP33]], align 8
895 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
896 // CHECK9-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP34]], align 8
897 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
898 // CHECK9-NEXT: store i8** null, i8*** [[TMP35]], align 8
899 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
900 // CHECK9-NEXT: store i8** null, i8*** [[TMP36]], align 8
901 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
902 // CHECK9-NEXT: store i64 2, i64* [[TMP37]], align 8
903 // CHECK9-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
904 // CHECK9-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
905 // CHECK9-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
906 // CHECK9: omp_offload.failed:
907 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
908 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
909 // CHECK9: omp_offload.cont:
910 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
911 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
912 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
913 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
914 // CHECK9: arraydestroy.body:
915 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
916 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
917 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
918 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
919 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
920 // CHECK9: arraydestroy.done2:
921 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
922 // CHECK9-NEXT: [[TMP41:%.*]] = load i32, i32* [[RETVAL]], align 4
923 // CHECK9-NEXT: ret i32 [[TMP41]]
924 //
925 //
926 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
927 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
928 // CHECK9-NEXT: entry:
929 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
930 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
931 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
932 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
933 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4
934 // CHECK9-NEXT: ret void
935 //
936 //
937 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
938 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
939 // CHECK9-NEXT: entry:
940 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
941 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
942 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
943 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4
944 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
945 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
946 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
947 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4
948 // CHECK9-NEXT: ret void
949 //
950 //
951 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
952 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
953 // CHECK9-NEXT: entry:
954 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
955 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
956 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
957 // CHECK9-NEXT: ret void
958 //
959 //
960 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
961 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
962 // CHECK9-NEXT: entry:
963 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
964 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
965 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
966 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
967 // CHECK9-NEXT: ret void
968 //
969 //
970 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
971 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
972 // CHECK9-NEXT: entry:
973 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
974 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
975 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
976 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
977 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
978 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
979 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
980 // CHECK9-NEXT: ret void
981 //
982 //
983 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
984 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
985 // CHECK9-NEXT: entry:
986 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
987 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
988 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
989 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
990 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
991 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
992 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
993 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
994 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
995 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
996 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
997 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
998 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
999 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
1000 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1001 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
1002 // CHECK9-NEXT: ret void
1003 //
1004 //
1005 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1006 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1007 // CHECK9-NEXT: entry:
1008 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1009 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1010 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1011 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1012 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1013 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1014 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1015 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1016 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1017 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1018 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1019 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1020 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1021 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1022 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1023 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1024 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1025 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1026 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8
1027 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1028 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1029 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1030 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1031 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1032 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1033 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1034 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1035 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1036 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1037 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1038 // CHECK9-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
1039 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1040 // CHECK9-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
1041 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1042 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1043 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1044 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1045 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
1046 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4
1047 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1048 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1049 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 8, i1 false)
1050 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1051 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0*
1052 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1053 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]]
1054 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1055 // CHECK9: omp.arraycpy.body:
1056 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1057 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1058 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1059 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1060 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false)
1061 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1062 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1063 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
1064 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
1065 // CHECK9: omp.arraycpy.done6:
1066 // CHECK9-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
1067 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
1068 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
1069 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false)
1070 // CHECK9-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8
1071 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1072 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
1073 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1074 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1075 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1
1076 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1077 // CHECK9: cond.true:
1078 // CHECK9-NEXT: br label [[COND_END:%.*]]
1079 // CHECK9: cond.false:
1080 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1081 // CHECK9-NEXT: br label [[COND_END]]
1082 // CHECK9: cond.end:
1083 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
1084 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1085 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1086 // CHECK9-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
1087 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1088 // CHECK9: omp.inner.for.cond:
1089 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1090 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1091 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
1092 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1093 // CHECK9: omp.inner.for.cond.cleanup:
1094 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1095 // CHECK9: omp.inner.for.body:
1096 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1097 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1
1098 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1099 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1100 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4
1101 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4
1102 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64
1103 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
1104 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[ARRAYIDX]], align 4
1105 // CHECK9-NEXT: [[TMP25:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8
1106 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4
1107 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP26]] to i64
1108 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
1109 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8*
1110 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[TMP25]] to i8*
1111 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 4, i1 false)
1112 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1113 // CHECK9: omp.body.continue:
1114 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1115 // CHECK9: omp.inner.for.inc:
1116 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1117 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP29]], 1
1118 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
1119 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1120 // CHECK9: omp.inner.for.end:
1121 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1122 // CHECK9: omp.loop.exit:
1123 // CHECK9-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1124 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
1125 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP31]])
1126 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
1127 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1128 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2
1129 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1130 // CHECK9: arraydestroy.body:
1131 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP32]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1132 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1133 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1134 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
1135 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
1136 // CHECK9: arraydestroy.done14:
1137 // CHECK9-NEXT: ret void
1138 //
1139 //
1140 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1141 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1142 // CHECK9-NEXT: entry:
1143 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1144 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1145 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1146 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1147 // CHECK9-NEXT: ret void
1148 //
1149 //
1150 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1151 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1152 // CHECK9-NEXT: entry:
1153 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1154 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1155 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1156 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1157 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4
1158 // CHECK9-NEXT: ret void
1159 //
1160 //
1161 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1162 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1163 // CHECK9-NEXT: entry:
1164 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1165 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1166 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1167 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1168 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1169 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1170 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1171 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
1172 // CHECK9-NEXT: ret void
1173 //
1174 //
1175 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1176 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1177 // CHECK9-NEXT: entry:
1178 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1179 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1180 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1181 // CHECK9-NEXT: ret void
1182 //
1183 //
1184 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1185 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1186 // CHECK9-NEXT: entry:
1187 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1188 // CHECK9-NEXT: ret void
1189 //
1190 //
1191 // CHECK11-LABEL: define {{[^@]+}}@main
1192 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
1193 // CHECK11-NEXT: entry:
1194 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1195 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8
1196 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4
1197 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1198 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1199 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1200 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1201 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4
1202 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
1203 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1204 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
1205 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
1206 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
1207 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
1208 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1209 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
1210 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4
1211 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
1212 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4
1213 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1214 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
1215 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1216 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
1217 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
1218 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
1219 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
1220 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
1221 // CHECK11-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
1222 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1223 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
1224 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
1225 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
1226 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
1227 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
1228 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
1229 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
1230 // CHECK11-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
1231 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1232 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
1233 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
1234 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1235 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
1236 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
1237 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1238 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4
1239 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1240 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1241 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
1242 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1243 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
1244 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4
1245 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1246 // CHECK11-NEXT: store i8* null, i8** [[TMP18]], align 4
1247 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1248 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
1249 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
1250 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1251 // CHECK11-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
1252 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4
1253 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1254 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4
1255 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1256 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
1257 // CHECK11-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4
1258 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1259 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
1260 // CHECK11-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4
1261 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1262 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4
1263 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1264 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
1265 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4
1266 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1267 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
1268 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4
1269 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1270 // CHECK11-NEXT: store i8* null, i8** [[TMP33]], align 4
1271 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1272 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1273 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1274 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1275 // CHECK11-NEXT: store i32 1, i32* [[TMP36]], align 4
1276 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1277 // CHECK11-NEXT: store i32 5, i32* [[TMP37]], align 4
1278 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1279 // CHECK11-NEXT: store i8** [[TMP34]], i8*** [[TMP38]], align 4
1280 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1281 // CHECK11-NEXT: store i8** [[TMP35]], i8*** [[TMP39]], align 4
1282 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1283 // CHECK11-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP40]], align 4
1284 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1285 // CHECK11-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP41]], align 4
1286 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1287 // CHECK11-NEXT: store i8** null, i8*** [[TMP42]], align 4
1288 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1289 // CHECK11-NEXT: store i8** null, i8*** [[TMP43]], align 4
1290 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1291 // CHECK11-NEXT: store i64 2, i64* [[TMP44]], align 8
1292 // CHECK11-NEXT: [[TMP45:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1293 // CHECK11-NEXT: [[TMP46:%.*]] = icmp ne i32 [[TMP45]], 0
1294 // CHECK11-NEXT: br i1 [[TMP46]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1295 // CHECK11: omp_offload.failed:
1296 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
1297 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1298 // CHECK11: omp_offload.cont:
1299 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
1300 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1301 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1302 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
1303 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1304 // CHECK11: arraydestroy.body:
1305 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP47]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1306 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1307 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1308 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1309 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1310 // CHECK11: arraydestroy.done2:
1311 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1312 // CHECK11-NEXT: [[TMP48:%.*]] = load i32, i32* [[RETVAL]], align 4
1313 // CHECK11-NEXT: ret i32 [[TMP48]]
1314 //
1315 //
1316 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1317 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1318 // CHECK11-NEXT: entry:
1319 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1320 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1321 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1322 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1323 // CHECK11-NEXT: ret void
1324 //
1325 //
1326 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1327 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1328 // CHECK11-NEXT: entry:
1329 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1330 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1331 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1332 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1333 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1334 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1335 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
1336 // CHECK11-NEXT: ret void
1337 //
1338 //
1339 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103
1340 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1341 // CHECK11-NEXT: entry:
1342 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1343 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
1344 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
1345 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
1346 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
1347 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
1348 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
1349 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
1350 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
1351 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
1352 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
1353 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
1354 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
1355 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
1356 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
1357 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
1358 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]])
1359 // CHECK11-NEXT: ret void
1360 //
1361 //
1362 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
1363 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1364 // CHECK11-NEXT: entry:
1365 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1366 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1367 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
1368 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
1369 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
1370 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
1371 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
1372 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
1373 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
1374 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1375 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1376 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1377 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1378 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1379 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1380 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1381 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1382 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1383 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1384 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 4
1385 // CHECK11-NEXT: [[SVAR9:%.*]] = alloca i32, align 4
1386 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1387 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1388 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1389 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
1390 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
1391 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
1392 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
1393 // CHECK11-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
1394 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
1395 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
1396 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
1397 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
1398 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
1399 // CHECK11-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
1400 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
1401 // CHECK11-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4
1402 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1403 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1404 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1405 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1406 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
1407 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4
1408 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1409 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1410 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 8, i1 false)
1411 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1412 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S*
1413 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
1414 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]]
1415 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1416 // CHECK11: omp.arraycpy.body:
1417 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1418 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1419 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1420 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1421 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 4, i1 false)
1422 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1423 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1424 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]]
1425 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
1426 // CHECK11: omp.arraycpy.done6:
1427 // CHECK11-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
1428 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8*
1429 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
1430 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false)
1431 // CHECK11-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4
1432 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4
1433 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4
1434 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1435 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
1436 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1437 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1438 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1
1439 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1440 // CHECK11: cond.true:
1441 // CHECK11-NEXT: br label [[COND_END:%.*]]
1442 // CHECK11: cond.false:
1443 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1444 // CHECK11-NEXT: br label [[COND_END]]
1445 // CHECK11: cond.end:
1446 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]
1447 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1448 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1449 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4
1450 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1451 // CHECK11: omp.inner.for.cond:
1452 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1453 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1454 // CHECK11-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]]
1455 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1456 // CHECK11: omp.inner.for.cond.cleanup:
1457 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1458 // CHECK11: omp.inner.for.body:
1459 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1460 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP24]], 1
1461 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1462 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1463 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4
1464 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4
1465 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP26]]
1466 // CHECK11-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX]], align 4
1467 // CHECK11-NEXT: [[TMP27:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4
1468 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4
1469 // CHECK11-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 [[TMP28]]
1470 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8*
1471 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP27]] to i8*
1472 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 4, i1 false)
1473 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1474 // CHECK11: omp.body.continue:
1475 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1476 // CHECK11: omp.inner.for.inc:
1477 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1478 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP31]], 1
1479 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
1480 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
1481 // CHECK11: omp.inner.for.end:
1482 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1483 // CHECK11: omp.loop.exit:
1484 // CHECK11-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1485 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
1486 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
1487 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
1488 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1489 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2
1490 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1491 // CHECK11: arraydestroy.body:
1492 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1493 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1494 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1495 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
1496 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
1497 // CHECK11: arraydestroy.done14:
1498 // CHECK11-NEXT: ret void
1499 //
1500 //
1501 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1502 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1503 // CHECK11-NEXT: entry:
1504 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1505 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1506 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1507 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1508 // CHECK11-NEXT: ret void
1509 //
1510 //
1511 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1512 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat {
1513 // CHECK11-NEXT: entry:
1514 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1515 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1516 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1517 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1518 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1519 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4
1520 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
1521 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1522 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
1523 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
1524 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
1525 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1526 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
1527 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4
1528 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1529 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
1530 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1531 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
1532 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
1533 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
1534 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
1535 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
1536 // CHECK11-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
1537 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1538 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
1539 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
1540 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
1541 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
1542 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
1543 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1544 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
1545 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
1546 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1547 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
1548 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
1549 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1550 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4
1551 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1552 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
1553 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4
1554 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1555 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1556 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
1557 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1558 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4
1559 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1560 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
1561 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
1562 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1563 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
1564 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4
1565 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1566 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4
1567 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1568 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
1569 // CHECK11-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4
1570 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1571 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
1572 // CHECK11-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4
1573 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1574 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4
1575 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1576 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1577 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1578 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1579 // CHECK11-NEXT: store i32 1, i32* [[TMP29]], align 4
1580 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1581 // CHECK11-NEXT: store i32 4, i32* [[TMP30]], align 4
1582 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1583 // CHECK11-NEXT: store i8** [[TMP27]], i8*** [[TMP31]], align 4
1584 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1585 // CHECK11-NEXT: store i8** [[TMP28]], i8*** [[TMP32]], align 4
1586 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1587 // CHECK11-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP33]], align 4
1588 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1589 // CHECK11-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP34]], align 4
1590 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1591 // CHECK11-NEXT: store i8** null, i8*** [[TMP35]], align 4
1592 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1593 // CHECK11-NEXT: store i8** null, i8*** [[TMP36]], align 4
1594 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1595 // CHECK11-NEXT: store i64 2, i64* [[TMP37]], align 8
1596 // CHECK11-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1597 // CHECK11-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
1598 // CHECK11-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1599 // CHECK11: omp_offload.failed:
1600 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
1601 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1602 // CHECK11: omp_offload.cont:
1603 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
1604 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1605 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
1606 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1607 // CHECK11: arraydestroy.body:
1608 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1609 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1610 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1611 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1612 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1613 // CHECK11: arraydestroy.done2:
1614 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1615 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[RETVAL]], align 4
1616 // CHECK11-NEXT: ret i32 [[TMP41]]
1617 //
1618 //
1619 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1620 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1621 // CHECK11-NEXT: entry:
1622 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1623 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1624 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1625 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1626 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4
1627 // CHECK11-NEXT: ret void
1628 //
1629 //
1630 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1631 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1632 // CHECK11-NEXT: entry:
1633 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1634 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1635 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1636 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1637 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1638 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1639 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1640 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4
1641 // CHECK11-NEXT: ret void
1642 //
1643 //
1644 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1645 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1646 // CHECK11-NEXT: entry:
1647 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1648 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1649 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1650 // CHECK11-NEXT: ret void
1651 //
1652 //
1653 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1654 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1655 // CHECK11-NEXT: entry:
1656 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1657 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1658 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1659 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1660 // CHECK11-NEXT: ret void
1661 //
1662 //
1663 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1664 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1665 // CHECK11-NEXT: entry:
1666 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1667 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1668 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1669 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1670 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1671 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1672 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
1673 // CHECK11-NEXT: ret void
1674 //
1675 //
1676 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1677 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1678 // CHECK11-NEXT: entry:
1679 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1680 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
1681 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
1682 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
1683 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
1684 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
1685 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
1686 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
1687 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
1688 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
1689 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
1690 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
1691 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
1692 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
1693 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
1694 // CHECK11-NEXT: ret void
1695 //
1696 //
1697 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
1698 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1699 // CHECK11-NEXT: entry:
1700 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1701 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1702 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
1703 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
1704 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
1705 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
1706 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
1707 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
1708 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1709 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1710 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1711 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1712 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1713 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1714 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1715 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1716 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1717 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1718 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 4
1719 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1720 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1721 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1722 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
1723 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
1724 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
1725 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
1726 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
1727 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
1728 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
1729 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
1730 // CHECK11-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
1731 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
1732 // CHECK11-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4
1733 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1734 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1735 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1736 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1737 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
1738 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4
1739 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1740 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1741 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 8, i1 false)
1742 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1743 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0*
1744 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
1745 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]]
1746 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1747 // CHECK11: omp.arraycpy.body:
1748 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1749 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1750 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1751 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1752 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false)
1753 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1754 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1755 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
1756 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
1757 // CHECK11: omp.arraycpy.done6:
1758 // CHECK11-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
1759 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
1760 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
1761 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false)
1762 // CHECK11-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4
1763 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1764 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
1765 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1766 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1767 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1
1768 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1769 // CHECK11: cond.true:
1770 // CHECK11-NEXT: br label [[COND_END:%.*]]
1771 // CHECK11: cond.false:
1772 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1773 // CHECK11-NEXT: br label [[COND_END]]
1774 // CHECK11: cond.end:
1775 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
1776 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1777 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1778 // CHECK11-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
1779 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1780 // CHECK11: omp.inner.for.cond:
1781 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1782 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1783 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
1784 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1785 // CHECK11: omp.inner.for.cond.cleanup:
1786 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1787 // CHECK11: omp.inner.for.body:
1788 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1789 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1
1790 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1791 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1792 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4
1793 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4
1794 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP24]]
1795 // CHECK11-NEXT: store i32 [[TMP23]], i32* [[ARRAYIDX]], align 4
1796 // CHECK11-NEXT: [[TMP25:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4
1797 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4
1798 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 [[TMP26]]
1799 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8*
1800 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[TMP25]] to i8*
1801 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 4, i1 false)
1802 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1803 // CHECK11: omp.body.continue:
1804 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1805 // CHECK11: omp.inner.for.inc:
1806 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1807 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1
1808 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
1809 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
1810 // CHECK11: omp.inner.for.end:
1811 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1812 // CHECK11: omp.loop.exit:
1813 // CHECK11-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1814 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
1815 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP31]])
1816 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
1817 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1818 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2
1819 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1820 // CHECK11: arraydestroy.body:
1821 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP32]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1822 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1823 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1824 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
1825 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
1826 // CHECK11: arraydestroy.done13:
1827 // CHECK11-NEXT: ret void
1828 //
1829 //
1830 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1831 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1832 // CHECK11-NEXT: entry:
1833 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1834 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1835 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1836 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1837 // CHECK11-NEXT: ret void
1838 //
1839 //
1840 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1841 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1842 // CHECK11-NEXT: entry:
1843 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1844 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1845 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1846 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1847 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4
1848 // CHECK11-NEXT: ret void
1849 //
1850 //
1851 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1852 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1853 // CHECK11-NEXT: entry:
1854 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1855 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1856 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1857 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1858 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1859 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1860 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1861 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
1862 // CHECK11-NEXT: ret void
1863 //
1864 //
1865 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1866 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1867 // CHECK11-NEXT: entry:
1868 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1869 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1870 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1871 // CHECK11-NEXT: ret void
1872 //
1873 //
1874 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1875 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
1876 // CHECK11-NEXT: entry:
1877 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
1878 // CHECK11-NEXT: ret void
1879 //
1880