1 2 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s 3 // RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s 5 6 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s 7 // RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s 8 // RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s 9 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} 10 // expected-no-diagnostics 11 #ifndef HEADER 12 #define HEADER 13 14 _Bool bv, bx; 15 char cv, cx; 16 unsigned char ucv, ucx; 17 short sv, sx; 18 unsigned short usv, usx; 19 int iv, ix; 20 unsigned int uiv, uix; 21 long lv, lx; 22 unsigned long ulv, ulx; 23 long long llv, llx; 24 unsigned long long ullv, ullx; 25 float fv, fx; 26 double dv, dx; 27 long double ldv, ldx; 28 _Complex int civ, cix; 29 _Complex float cfv, cfx; 30 _Complex double cdv, cdx; 31 32 typedef int int4 __attribute__((__vector_size__(16))); 33 int4 int4x; 34 35 struct BitFields { 36 int : 32; 37 int a : 31; 38 } bfx; 39 40 struct BitFields_packed { 41 int : 32; 42 int a : 31; 43 } __attribute__ ((__packed__)) bfx_packed; 44 45 struct BitFields2 { 46 int : 31; 47 int a : 1; 48 } bfx2; 49 50 struct BitFields2_packed { 51 int : 31; 52 int a : 1; 53 } __attribute__ ((__packed__)) bfx2_packed; 54 55 struct BitFields3 { 56 int : 11; 57 int a : 14; 58 } bfx3; 59 60 struct BitFields3_packed { 61 int : 11; 62 int a : 14; 63 } __attribute__ ((__packed__)) bfx3_packed; 64 65 struct BitFields4 { 66 short : 16; 67 int a: 1; 68 long b : 7; 69 } bfx4; 70 71 struct BitFields4_packed { 72 short : 16; 73 int a: 1; 74 long b : 7; 75 } __attribute__ ((__packed__)) bfx4_packed; 76 77 typedef float float2 __attribute__((ext_vector_type(2))); 78 float2 float2x; 79 80 // Register "0" is currently an invalid register for global register variables. 81 // Use "esp" instead of "0". 82 // register int rix __asm__("0"); 83 register int rix __asm__("esp"); 84 85 int main() { 86 // CHECK: [[PREV:%.+]] = atomicrmw add i8* @{{.+}}, i8 1 monotonic, align 1 87 // CHECK: store i8 [[PREV]], i8* @{{.+}}, 88 #pragma omp atomic capture 89 bv = bx++; 90 // CHECK: atomicrmw add i8* @{{.+}}, i8 1 monotonic, align 1 91 // CHECK: add nsw i32 %{{.+}}, 1 92 // CHECK: store i8 %{{.+}}, i8* @{{.+}}, 93 #pragma omp atomic capture 94 cv = ++cx; 95 // CHECK: [[PREV:%.+]] = atomicrmw sub i8* @{{.+}}, i8 1 monotonic, align 1 96 // CHECK: store i8 [[PREV]], i8* @{{.+}}, 97 #pragma omp atomic capture 98 ucv = ucx--; 99 // CHECK: atomicrmw sub i16* @{{.+}}, i16 1 monotonic, align 2 100 // CHECK: sub nsw i32 %{{.+}}, 1 101 // CHECK: store i16 %{{.+}}, i16* @{{.+}}, 102 #pragma omp atomic capture 103 sv = --sx; 104 // CHECK: [[USV:%.+]] = load i16, i16* @{{.+}}, 105 // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i32 106 // CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic, align 2 107 // CHECK: br label %[[CONT:.+]] 108 // CHECK: [[CONT]] 109 // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 110 // CHECK: [[CONV:%.+]] = zext i16 [[EXPECTED]] to i32 111 // CHECK: [[ADD:%.+]] = add nsw i32 [[CONV]], [[EXPR]] 112 // CHECK: [[DESIRED_CALC:%.+]] = trunc i32 [[ADD]] to i16 113 // CHECK: store i16 [[DESIRED_CALC]], i16* [[TEMP:%.+]], 114 // CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]], 115 // CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2 116 // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0 117 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1 118 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 119 // CHECK: [[EXIT]] 120 // CHECK: store i16 [[DESIRED_CALC]], i16* @{{.+}}, 121 #pragma omp atomic capture 122 sv = usx += usv; 123 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, 124 // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4 125 // CHECK: br label %[[CONT:.+]] 126 // CHECK: [[CONT]] 127 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 128 // CHECK: [[DESIRED_CALC:%.+]] = mul nsw i32 [[EXPECTED]], [[EXPR]] 129 // CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]], 130 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], 131 // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 132 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 133 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 134 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 135 // CHECK: [[EXIT]] 136 // CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}}, 137 #pragma omp atomic capture 138 uiv = ix *= iv; 139 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, 140 // CHECK: [[PREV:%.+]] = atomicrmw sub i32* @{{.+}}, i32 [[EXPR]] monotonic, align 4 141 // CHECK: store i32 [[PREV]], i32* @{{.+}}, 142 #pragma omp atomic capture 143 {iv = uix; uix -= uiv;} 144 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, 145 // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4 146 // CHECK: br label %[[CONT:.+]] 147 // CHECK: [[CONT]] 148 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 149 // CHECK: [[DESIRED_CALC:%.+]] = shl i32 [[EXPECTED]], [[EXPR]] 150 // CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]], 151 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], 152 // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 153 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 154 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 155 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 156 // CHECK: [[EXIT]] 157 // CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}}, 158 #pragma omp atomic capture 159 {ix <<= iv; uiv = ix;} 160 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, 161 // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4 162 // CHECK: br label %[[CONT:.+]] 163 // CHECK: [[CONT]] 164 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 165 // CHECK: [[DESIRED_CALC:%.+]] = lshr i32 [[EXPECTED]], [[EXPR]] 166 // CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]], 167 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], 168 // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 169 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 170 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 171 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 172 // CHECK: [[EXIT]] 173 // CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}}, 174 #pragma omp atomic capture 175 iv = uix >>= uiv; 176 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, 177 // CHECK: [[X:%.+]] = load atomic i64, i64* [[X_ADDR:@.+]] monotonic, align 8 178 // CHECK: br label %[[CONT:.+]] 179 // CHECK: [[CONT]] 180 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 181 // CHECK: [[DESIRED:%.+]] = sdiv i64 [[EXPECTED]], [[EXPR]] 182 // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], 183 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], 184 // CHECK: [[RES:%.+]] = cmpxchg i64* [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 185 // CHECK: [[OLD_X]] = extractvalue { i64, i1 } [[RES]], 0 186 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 187 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 188 // CHECK: [[EXIT]] 189 // CHECK: store i64 [[EXPECTED]], i64* @{{.+}}, 190 #pragma omp atomic capture 191 {ulv = lx; lx /= lv;} 192 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, 193 // CHECK: [[OLD:%.+]] = atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 194 // CHECK: [[DESIRED:%.+]] = and i64 [[OLD]], [[EXPR]] 195 // CHECK: store i64 [[DESIRED]], i64* @{{.+}}, 196 #pragma omp atomic capture 197 {ulx &= ulv; lv = ulx;} 198 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, 199 // CHECK: [[OLD:%.+]] = atomicrmw xor i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 200 // CHECK: [[DESIRED:%.+]] = xor i64 [[OLD]], [[EXPR]] 201 // CHECK: store i64 [[DESIRED]], i64* @{{.+}}, 202 #pragma omp atomic capture 203 ullv = llx ^= llv; 204 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, 205 // CHECK: [[OLD:%.+]] = atomicrmw or i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 206 // CHECK: [[DESIRED:%.+]] = or i64 [[OLD]], [[EXPR]] 207 // CHECK: store i64 [[DESIRED]], i64* @{{.+}}, 208 #pragma omp atomic capture 209 llv = ullx |= ullv; 210 // CHECK: [[EXPR:%.+]] = load float, float* @{{.+}}, 211 // CHECK: [[X:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic, align 4 212 // CHECK: br label %[[CONT:.+]] 213 // CHECK: [[CONT]] 214 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 215 // CHECK: [[TEMP_I:%.+]] = bitcast float* [[TEMP:%.+]] to i32* 216 // CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float 217 // CHECK: [[ADD:%.+]] = fadd float [[OLD]], [[EXPR]] 218 // CHECK: store float [[ADD]], float* [[TEMP]], 219 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP_I]], 220 // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 221 // CHECK: [[OLD_X:%.+]] = extractvalue { i32, i1 } [[RES]], 0 222 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 223 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 224 // CHECK: [[EXIT]] 225 // CHECK: [[CAST:%.+]] = fpext float [[ADD]] to double 226 // CHECK: store double [[CAST]], double* @{{.+}}, 227 #pragma omp atomic capture 228 dv = fx = fx + fv; 229 // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, 230 // CHECK: [[X:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic, align 8 231 // CHECK: br label %[[CONT:.+]] 232 // CHECK: [[CONT]] 233 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 234 // CHECK: [[TEMP_I:%.+]] = bitcast double* [[TEMP:%.+]] to i64* 235 // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double 236 // CHECK: [[SUB:%.+]] = fsub double [[EXPR]], [[OLD]] 237 // CHECK: store double [[SUB]], double* [[TEMP]], 238 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP_I]], 239 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 240 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 241 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 242 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 243 // CHECK: [[EXIT]] 244 // CHECK: [[CAST:%.+]] = fptrunc double [[OLD]] to float 245 // CHECK: store float [[CAST]], float* @{{.+}}, 246 #pragma omp atomic capture 247 {fv = dx; dx = dv - dx;} 248 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}, 249 // CHECK: [[X:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic, align 16 250 // CHECK: br label %[[CONT:.+]] 251 // CHECK: [[CONT]] 252 // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 253 // CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128* 254 // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]] 255 // CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128* 256 // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST1]] 257 // CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP1]] 258 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[OLD]], [[EXPR]] 259 // CHECK: store x86_fp80 [[MUL]], x86_fp80* [[TEMP]] 260 // CHECK: [[DESIRED:%.+]] = load i128, i128* [[BITCAST]] 261 // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16 262 // CHECK: [[OLD_X:%.+]] = extractvalue { i128, i1 } [[RES]], 0 263 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1 264 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 265 // CHECK: [[EXIT]] 266 // CHECK: [[CAST:%.+]] = fptrunc x86_fp80 [[MUL]] to double 267 // CHECK: store double [[CAST]], double* @{{.+}}, 268 #pragma omp atomic capture 269 {ldx = ldx * ldv; dv = ldx;} 270 // CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0) 271 // CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1) 272 // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* 273 // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) 274 // CHECK: br label %[[CONT:.+]] 275 // CHECK: [[CONT]] 276 // CHECK: [[LD_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 277 // CHECK: [[LD_RE:%.+]] = load i32, i32* [[LD_RE_ADDR]] 278 // CHECK: [[LD_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 279 // CHECK: [[LD_IM:%.+]] = load i32, i32* [[LD_IM_ADDR]] 280 // <Skip checks for complex calculations> 281 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 282 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 283 // CHECK: store i32 [[NEW_RE:%.+]], i32* [[X_RE_ADDR]] 284 // CHECK: store i32 [[NEW_IM:%.+]], i32* [[X_IM_ADDR]] 285 // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* 286 // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* 287 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) 288 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 289 // CHECK: [[EXIT]] 290 // CHECK: [[RE_CAST:%.+]] = sitofp i32 [[NEW_RE]] to float 291 // CHECK: [[IM_CAST:%.+]] = sitofp i32 [[NEW_IM]] to float 292 // CHECK: store float [[RE_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0), 293 // CHECK: store float [[IM_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1), 294 #pragma omp atomic capture 295 cfv = cix = civ / cix; 296 // CHECK: [[EXPR_RE:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0) 297 // CHECK: [[EXPR_IM:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1) 298 // CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR:%.+]] to i8* 299 // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ float, float }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) 300 // CHECK: br label %[[CONT:.+]] 301 // CHECK: [[CONT]] 302 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 0 303 // CHECK: [[X_RE_OLD:%.+]] = load float, float* [[X_RE_ADDR]] 304 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 1 305 // CHECK: [[X_IM_OLD:%.+]] = load float, float* [[X_IM_ADDR]] 306 // <Skip checks for complex calculations> 307 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 308 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR]], i32 0, i32 1 309 // CHECK: store float [[NEW_RE:%.+]], float* [[X_RE_ADDR]] 310 // CHECK: store float [[NEW_IM:%.+]], float* [[X_IM_ADDR]] 311 // CHECK: [[EXPECTED:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR]] to i8* 312 // CHECK: [[DESIRED:%.+]] = bitcast { float, float }* [[DESIRED_ADDR]] to i8* 313 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ float, float }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) 314 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 315 // CHECK: [[EXIT]] 316 // CHECK: [[RE_CAST:%.+]] = fptosi float [[X_RE_OLD]] to i32 317 // CHECK: [[IM_CAST:%.+]] = fptosi float [[X_IM_OLD]] to i32 318 // CHECK: store i32 [[RE_CAST]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0), 319 // CHECK: store i32 [[IM_CAST]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1), 320 #pragma omp atomic capture 321 {civ = cfx; cfx = cfv + cfx;} 322 // CHECK: [[EXPR_RE:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0) 323 // CHECK: [[EXPR_IM:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 1) 324 // CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR:%.+]] to i8* 325 // CHECK: call void @__atomic_load(i64 16, i8* bitcast ({ double, double }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 5) 326 // CHECK: br label %[[CONT:.+]] 327 // CHECK: [[CONT]] 328 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 0 329 // CHECK: [[X_RE:%.+]] = load double, double* [[X_RE_ADDR]] 330 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 1 331 // CHECK: [[X_IM:%.+]] = load double, double* [[X_IM_ADDR]] 332 // <Skip checks for complex calculations> 333 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 334 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR]], i32 0, i32 1 335 // CHECK: store double [[NEW_RE:%.+]], double* [[X_RE_ADDR]] 336 // CHECK: store double [[NEW_IM:%.+]], double* [[X_IM_ADDR]] 337 // CHECK: [[EXPECTED:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR]] to i8* 338 // CHECK: [[DESIRED:%.+]] = bitcast { double, double }* [[DESIRED_ADDR]] to i8* 339 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 16, i8* bitcast ({ double, double }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 5, i32 5) 340 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 341 // CHECK: [[EXIT]] 342 // CHECK: [[RE_CAST:%.+]] = fptrunc double [[NEW_RE]] to float 343 // CHECK: [[IM_CAST:%.+]] = fptrunc double [[NEW_IM]] to float 344 // CHECK: store float [[RE_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0), 345 // CHECK: store float [[IM_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1), 346 // CHECK: call{{.*}} @__kmpc_flush( 347 #pragma omp atomic capture seq_cst 348 {cdx = cdx - cdv; cfv = cdx;} 349 // CHECK: [[BV:%.+]] = load i8, i8* @{{.+}} 350 // CHECK: [[BOOL:%.+]] = trunc i8 [[BV]] to i1 351 // CHECK: [[EXPR:%.+]] = zext i1 [[BOOL]] to i64 352 // CHECK: [[OLD:%.+]] = atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 353 // CHECK: [[DESIRED:%.+]] = and i64 [[OLD]], [[EXPR]] 354 // CHECK: store i64 [[DESIRED]], i64* @{{.+}}, 355 #pragma omp atomic capture 356 ulv = ulx = ulx & bv; 357 // CHECK: [[CV:%.+]] = load i8, i8* @{{.+}}, align 1 358 // CHECK: [[EXPR:%.+]] = sext i8 [[CV]] to i32 359 // CHECK: [[X:%.+]] = load atomic i8, i8* [[BX_ADDR:@.+]] monotonic, align 1 360 // CHECK: br label %[[CONT:.+]] 361 // CHECK: [[CONT]] 362 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 363 // CHECK: [[OLD_BOOL:%.+]] = trunc i8 [[EXPECTED]] to i1 364 // CHECK: [[X_RVAL:%.+]] = zext i1 [[OLD_BOOL]] to i32 365 // CHECK: [[AND:%.+]] = and i32 [[EXPR]], [[X_RVAL]] 366 // CHECK: [[CAST:%.+]] = icmp ne i32 [[AND]], 0 367 // CHECK: [[NEW:%.+]] = zext i1 [[CAST]] to i8 368 // CHECK: store i8 [[NEW]], i8* [[TEMP:%.+]], 369 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], 370 // CHECK: [[RES:%.+]] = cmpxchg i8* [[BX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 371 // CHECK: [[OLD:%.+]] = extractvalue { i8, i1 } [[RES]], 0 372 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 373 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 374 // CHECK: [[EXIT]] 375 // CHECK: [[OLD_I8:%.+]] = zext i1 [[OLD_BOOL]] to i8 376 // CHECK: store i8 [[OLD_I8]], i8* @{{.+}}, 377 #pragma omp atomic capture 378 {bv = bx; bx = cv & bx;} 379 // CHECK: [[UCV:%.+]] = load i8, i8* @{{.+}}, 380 // CHECK: [[EXPR:%.+]] = zext i8 [[UCV]] to i32 381 // CHECK: [[X:%.+]] = load atomic i8, i8* [[CX_ADDR:@.+]] seq_cst, align 1 382 // CHECK: br label %[[CONT:.+]] 383 // CHECK: [[CONT]] 384 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 385 // CHECK: [[X_RVAL:%.+]] = sext i8 [[EXPECTED]] to i32 386 // CHECK: [[ASHR:%.+]] = ashr i32 [[X_RVAL]], [[EXPR]] 387 // CHECK: [[NEW:%.+]] = trunc i32 [[ASHR]] to i8 388 // CHECK: store i8 [[NEW]], i8* [[TEMP:%.+]], 389 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], 390 // CHECK: [[RES:%.+]] = cmpxchg i8* [[CX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] seq_cst seq_cst, align 1 391 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 392 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 393 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 394 // CHECK: [[EXIT]] 395 // CHECK: store i8 [[NEW]], i8* @{{.+}}, 396 // CHECK: call{{.*}} @__kmpc_flush( 397 #pragma omp atomic capture, seq_cst 398 {cx = cx >> ucv; cv = cx;} 399 // CHECK: [[SV:%.+]] = load i16, i16* @{{.+}}, 400 // CHECK: [[EXPR:%.+]] = sext i16 [[SV]] to i32 401 // CHECK: [[X:%.+]] = load atomic i64, i64* [[ULX_ADDR:@.+]] monotonic, align 8 402 // CHECK: br label %[[CONT:.+]] 403 // CHECK: [[CONT]] 404 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 405 // CHECK: [[X_RVAL:%.+]] = trunc i64 [[EXPECTED]] to i32 406 // CHECK: [[SHL:%.+]] = shl i32 [[EXPR]], [[X_RVAL]] 407 // CHECK: [[NEW:%.+]] = sext i32 [[SHL]] to i64 408 // CHECK: store i64 [[NEW]], i64* [[TEMP:%.+]], 409 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], 410 // CHECK: [[RES:%.+]] = cmpxchg i64* [[ULX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 411 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 412 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 413 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 414 // CHECK: [[EXIT]] 415 // CHECK: store i64 [[NEW]], i64* @{{.+}}, 416 #pragma omp atomic capture 417 ulv = ulx = sv << ulx; 418 // CHECK: [[USV:%.+]] = load i16, i16* @{{.+}}, 419 // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i64 420 // CHECK: [[X:%.+]] = load atomic i64, i64* [[LX_ADDR:@.+]] monotonic, align 8 421 // CHECK: br label %[[CONT:.+]] 422 // CHECK: [[CONT]] 423 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 424 // CHECK: [[DESIRED:%.+]] = srem i64 [[EXPECTED]], [[EXPR]] 425 // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], 426 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], 427 // CHECK: [[RES:%.+]] = cmpxchg i64* [[LX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 428 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 429 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 430 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 431 // CHECK: [[EXIT]] 432 // CHECK: store i64 [[EXPECTED]], i64* @{{.+}}, 433 #pragma omp atomic capture 434 {lv = lx; lx = lx % usv;} 435 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}} 436 // CHECK: [[OLD:%.+]] = atomicrmw or i32* @{{.+}}, i32 [[EXPR]] seq_cst, align 4 437 // CHECK: [[DESIRED:%.+]] = or i32 [[EXPR]], [[OLD]] 438 // CHECK: store i32 [[DESIRED]], i32* @{{.+}}, 439 // CHECK: call{{.*}} @__kmpc_flush( 440 #pragma omp atomic seq_cst, capture 441 {uix = iv | uix; uiv = uix;} 442 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}} 443 // CHECK: [[OLD:%.+]] = atomicrmw and i32* @{{.+}}, i32 [[EXPR]] monotonic, align 4 444 // CHECK: [[DESIRED:%.+]] = and i32 [[OLD]], [[EXPR]] 445 // CHECK: store i32 [[DESIRED]], i32* @{{.+}}, 446 #pragma omp atomic capture 447 iv = ix = ix & uiv; 448 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, 449 // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* 450 // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) 451 // CHECK: br label %[[CONT:.+]] 452 // CHECK: [[CONT]] 453 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 454 // CHECK: [[OLD_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] 455 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 456 // CHECK: [[OLD_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] 457 // <Skip checks for complex calculations> 458 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 459 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 460 // CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]] 461 // CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] 462 // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* 463 // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* 464 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) 465 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 466 // CHECK: [[EXIT]] 467 // CHECK: store i32 [[OLD_RE]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0), 468 // CHECK: store i32 [[OLD_IM]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1), 469 #pragma omp atomic capture 470 {civ = cix; cix = lv + cix;} 471 // CHECK: [[ULV:%.+]] = load i64, i64* @{{.+}}, 472 // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULV]] to float 473 // CHECK: [[X:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic, align 4 474 // CHECK: br label %[[CONT:.+]] 475 // CHECK: [[CONT]] 476 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 477 // CHECK: [[TEMP_I:%.+]] = bitcast float* [[TEMP:%.+]] to i32* 478 // CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float 479 // CHECK: [[MUL:%.+]] = fmul float [[OLD]], [[EXPR]] 480 // CHECK: store float [[MUL]], float* [[TEMP]], 481 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP_I]], 482 // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 483 // CHECK: [[OLD_X:%.+]] = extractvalue { i32, i1 } [[RES]], 0 484 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 485 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 486 // CHECK: [[EXIT]] 487 // CHECK: store float [[MUL]], float* @{{.+}}, 488 #pragma omp atomic capture 489 {fx = fx * ulv; fv = fx;} 490 // CHECK: [[LLV:%.+]] = load i64, i64* @{{.+}}, 491 // CHECK: [[EXPR:%.+]] = sitofp i64 [[LLV]] to double 492 // CHECK: [[X:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic, align 8 493 // CHECK: br label %[[CONT:.+]] 494 // CHECK: [[CONT]] 495 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 496 // CHECK: [[TEMP_I:%.+]] = bitcast double* [[TEMP:%.+]] to i64* 497 // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double 498 // CHECK: [[DIV:%.+]] = fdiv double [[OLD]], [[EXPR]] 499 // CHECK: store double [[DIV]], double* [[TEMP]], 500 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP_I]], 501 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 502 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 503 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 504 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 505 // CHECK: [[EXIT]] 506 // CHECK: store double [[DIV]], double* @{{.+}}, 507 #pragma omp atomic capture 508 dv = dx /= llv; 509 // CHECK: [[ULLV:%.+]] = load i64, i64* @{{.+}}, 510 // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULLV]] to x86_fp80 511 // CHECK: [[X:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic, align 16 512 // CHECK: br label %[[CONT:.+]] 513 // CHECK: [[CONT]] 514 // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 515 // CHECK: [[TEMP_I1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128* 516 // CHECK: store i128 [[EXPECTED]], i128* [[TEMP_I1]], 517 // CHECK: [[TEMP_I:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128* 518 // CHECK: store i128 [[EXPECTED]], i128* [[TEMP_I]], 519 // CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP]], 520 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[OLD]], [[EXPR]] 521 // CHECK: store x86_fp80 [[SUB]], x86_fp80* [[TEMP1]] 522 // CHECK: [[DESIRED:%.+]] = load i128, i128* [[TEMP_I1]] 523 // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16 524 // CHECK: [[OLD_X:%.+]] = extractvalue { i128, i1 } [[RES]], 0 525 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1 526 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 527 // CHECK: [[EXIT]] 528 // CHECK: store x86_fp80 [[OLD]], x86_fp80* @{{.+}}, 529 #pragma omp atomic capture 530 {ldv = ldx; ldx -= ullv;} 531 // CHECK: [[EXPR:%.+]] = load float, float* @{{.+}}, 532 // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* 533 // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) 534 // CHECK: br label %[[CONT:.+]] 535 // CHECK: [[CONT]] 536 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 537 // CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] 538 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 539 // CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] 540 // <Skip checks for complex calculations> 541 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 542 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 543 // CHECK: store i32 [[NEW_RE:%.+]], i32* [[X_RE_ADDR]] 544 // CHECK: store i32 [[NEW_IM:%.+]], i32* [[X_IM_ADDR]] 545 // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* 546 // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* 547 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) 548 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 549 // CHECK: [[EXIT]] 550 // CHECK: store i32 [[NEW_RE]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0), 551 // CHECK: store i32 [[NEW_IM]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1), 552 #pragma omp atomic capture 553 {cix = fv / cix; civ = cix;} 554 // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, 555 // CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic, align 2 556 // CHECK: br label %[[CONT:.+]] 557 // CHECK: [[CONT]] 558 // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 559 // CHECK: [[CONV:%.+]] = sext i16 [[EXPECTED]] to i32 560 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to double 561 // CHECK: [[ADD:%.+]] = fadd double [[X_RVAL]], [[EXPR]] 562 // CHECK: [[NEW:%.+]] = fptosi double [[ADD]] to i16 563 // CHECK: store i16 [[NEW]], i16* [[TEMP:%.+]], 564 // CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]], 565 // CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2 566 // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0 567 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1 568 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 569 // CHECK: [[EXIT]] 570 // CHECK: store i16 [[NEW]], i16* @{{.+}}, 571 #pragma omp atomic capture 572 sv = sx = sx + dv; 573 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}, 574 // CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic, align 1 575 // CHECK: br label %[[CONT:.+]] 576 // CHECK: [[CONT]] 577 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 578 // CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1 579 // CHECK: [[CONV:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32 580 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to x86_fp80 581 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[EXPR]], [[X_RVAL]] 582 // CHECK: [[BOOL_DESIRED:%.+]] = fcmp une x86_fp80 [[MUL]], 0xK00000000000000000000 583 // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 584 // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]], 585 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], 586 // CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 587 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 588 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 589 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 590 // CHECK: [[EXIT]] 591 // CHECK: [[EXPECTED_I8:%.+]] = zext i1 [[BOOL_EXPECTED]] to i8 592 // CHECK: store i8 [[EXPECTED_I8]], i8* @{{.+}}, 593 #pragma omp atomic capture 594 {bv = bx; bx = ldv * bx;} 595 // CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR:@.+]], i32 0, i32 0), 596 // CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR]], i32 0, i32 1), 597 // CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic, align 1 598 // CHECK: br label %[[CONT:.+]] 599 // CHECK: [[CONT]] 600 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 601 // CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1 602 // CHECK: [[X_RVAL:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32 603 // CHECK: [[SUB_RE:%.+]] = sub i32 [[EXPR_RE:%.+]], [[X_RVAL]] 604 // CHECK: [[SUB_IM:%.+]] = sub i32 [[EXPR_IM:%.+]], 0 605 // CHECK: icmp ne i32 [[SUB_RE]], 0 606 // CHECK: icmp ne i32 [[SUB_IM]], 0 607 // CHECK: [[BOOL_DESIRED:%.+]] = or i1 608 // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 609 // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]], 610 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], 611 // CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 612 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 613 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 614 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 615 // CHECK: [[EXIT]] 616 // CHECK: [[DESIRED_I8:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 617 // CHECK: store i8 [[DESIRED_I8]], i8* @{{.+}}, 618 #pragma omp atomic capture 619 {bx = civ - bx; bv = bx;} 620 // CHECK: [[IDX:%.+]] = load i16, i16* @{{.+}} 621 // CHECK: load i8, i8* 622 // CHECK: [[VEC_ITEM_VAL:%.+]] = zext i1 %{{.+}} to i32 623 // CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* [[DEST:@.+]] to i128*) monotonic, align 16 624 // CHECK: br label %[[CONT:.+]] 625 // CHECK: [[CONT]] 626 // CHECK: [[OLD_I128:%.+]] = phi i128 [ [[I128VAL]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 627 // CHECK: [[TEMP_I:%.+]] = bitcast <4 x i32>* [[TEMP:%.+]] to i128* 628 // CHECK: store i128 [[OLD_I128]], i128* [[TEMP_I]], 629 // CHECK: [[LD:%.+]] = bitcast i128 [[OLD_I128]] to <4 x i32> 630 // CHECK: store <4 x i32> [[LD]], <4 x i32>* [[TEMP1:%.+]], 631 // CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP1]] 632 // CHECK: [[ITEM:%.+]] = extractelement <4 x i32> [[VEC_VAL]], i16 [[IDX]] 633 // CHECK: [[OR:%.+]] = or i32 [[ITEM]], [[VEC_ITEM_VAL]] 634 // CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP]] 635 // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <4 x i32> [[VEC_VAL]], i32 [[OR]], i16 [[IDX]] 636 // CHECK: store <4 x i32> [[NEW_VEC_VAL]], <4 x i32>* [[TEMP]] 637 // CHECK: [[NEW_I128:%.+]] = load i128, i128* [[TEMP_I]], 638 // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (<4 x i32>* [[DEST]] to i128*), i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic, align 16 639 // CHECK: [[FAILED_OLD_VAL:%.+]] = extractvalue { i128, i1 } [[RES]], 0 640 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i128, i1 } [[RES]], 1 641 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 642 // CHECK: [[EXIT]] 643 // CHECK: store i32 [[OR]], i32* @{{.+}}, 644 #pragma omp atomic capture 645 {int4x[sv] |= bv; iv = int4x[sv];} 646 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 647 // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*) monotonic, align 4 648 // CHECK: br label %[[CONT:.+]] 649 // CHECK: [[CONT]] 650 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 651 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], 652 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], 653 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], 654 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1 655 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1 656 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 657 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]] 658 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32 659 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], 660 // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647 661 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648 662 // CHECK: [[BF_SET:%.+]] = or i32 [[BF_CLEAR]], [[BF_VALUE]] 663 // CHECK: store i32 [[BF_SET]], i32* [[TEMP1]], 664 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]], 665 // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 666 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 667 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 668 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 669 // CHECK: [[EXIT]] 670 // CHECK: store i32 [[CONV]], i32* @{{.+}}, 671 #pragma omp atomic capture 672 iv = bfx.a = bfx.a - ldv; 673 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 674 // CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8* 675 // CHECK: call void @__atomic_load(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST]], i32 0) 676 // CHECK: br label %[[CONT:.+]] 677 // CHECK: [[CONT]] 678 // CHECK: [[OLD:%.+]] = load i32, i32* [[LDTEMP]], 679 // CHECK: store i32 [[OLD]], i32* [[TEMP1:%.+]], 680 // CHECK: [[OLD:%.+]] = load i32, i32* [[LDTEMP]], 681 // CHECK: store i32 [[OLD]], i32* [[TEMP:%.+]], 682 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], 683 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1 684 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1 685 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 686 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]] 687 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[MUL]] to i32 688 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], 689 // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647 690 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648 691 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] 692 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] 693 // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8* 694 // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[TEMP1]] to i8* 695 // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0) 696 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 697 // CHECK: [[EXIT]] 698 // CHECK: store i32 [[A_ASHR]], i32* @{{.+}}, 699 #pragma omp atomic capture 700 {iv = bfx_packed.a; bfx_packed.a *= ldv;} 701 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 702 // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0) monotonic, align 4 703 // CHECK: br label %[[CONT:.+]] 704 // CHECK: [[CONT]] 705 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 706 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], 707 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], 708 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], 709 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_LD]], 31 710 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 711 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]] 712 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32 713 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], 714 // CHECK: [[BF_AND:%.+]] = and i32 [[CONV]], 1 715 // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 31 716 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], 2147483647 717 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] 718 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] 719 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] 720 // CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 721 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 722 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 723 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 724 // CHECK: [[EXIT]] 725 // CHECK: store i32 [[CONV]], i32* @{{.+}}, 726 #pragma omp atomic capture 727 {bfx2.a -= ldv; iv = bfx2.a;} 728 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 729 // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3) monotonic, align 1 730 // CHECK: br label %[[CONT:.+]] 731 // CHECK: [[CONT]] 732 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 733 // CHECK: [[BITCAST_NEW:%.+]] = bitcast i32* %{{.+}} to i8* 734 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST_NEW]], 735 // CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8* 736 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], 737 // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], 738 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 7 739 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i32 740 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80 741 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[EXPR]], [[X_RVAL]] 742 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32 743 // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i8 744 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST_NEW]], 745 // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 1 746 // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 7 747 // CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, 127 748 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] 749 // CHECK: store i8 %{{.+}}, i8* [[BITCAST_NEW]] 750 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST_NEW]] 751 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 752 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 753 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 754 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 755 // CHECK: [[EXIT]] 756 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, 757 #pragma omp atomic capture 758 iv = bfx2_packed.a = ldv / bfx2_packed.a; 759 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 760 // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0) monotonic, align 4 761 // CHECK: br label %[[CONT:.+]] 762 // CHECK: [[CONT]] 763 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 764 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], 765 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], 766 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], 767 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 7 768 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 18 769 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 770 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[X_RVAL]], [[EXPR]] 771 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32 772 // CHECK: [[BF_LD:%.+]] = load i32, i32* [[TEMP1]], 773 // CHECK: [[BF_AND:%.+]] = and i32 [[NEW_VAL]], 16383 774 // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 11 775 // CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, -33552385 776 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] 777 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] 778 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] 779 // CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 780 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 781 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 782 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 783 // CHECK: [[EXIT]] 784 // CHECK: store i32 [[A_ASHR]], i32* @{{.+}}, 785 #pragma omp atomic capture 786 {iv = bfx3.a; bfx3.a /= ldv;} 787 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 788 // CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24* 789 // CHECK: [[BITCAST:%.+]] = bitcast i24* [[LDTEMP]] to i8* 790 // CHECK: call void @__atomic_load(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST]], i32 0) 791 // CHECK: br label %[[CONT:.+]] 792 // CHECK: [[CONT]] 793 // CHECK: [[OLD:%.+]] = load i24, i24* [[LDTEMP]], 794 // CHECK: store i24 [[OLD]], i24* [[BITCAST2:%.+]], 795 // CHECK: [[OLD:%.+]] = load i24, i24* [[LDTEMP]], 796 // CHECK: store i24 [[OLD]], i24* [[BITCAST1:%.+]], 797 // CHECK: [[A_LD:%.+]] = load i24, i24* [[BITCAST1]], 798 // CHECK: [[A_SHL:%.+]] = shl i24 [[A_LD]], 7 799 // CHECK: [[A_ASHR:%.+]] = ashr i24 [[A_SHL]], 10 800 // CHECK: [[CAST:%.+]] = sext i24 [[A_ASHR]] to i32 801 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80 802 // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[X_RVAL]], [[EXPR]] 803 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i32 804 // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i24 805 // CHECK: [[BF_LD:%.+]] = load i24, i24* [[BITCAST2]], 806 // CHECK: [[BF_AND:%.+]] = and i24 [[TRUNC]], 16383 807 // CHECK: [[BF_VALUE:%.+]] = shl i24 [[BF_AND]], 3 808 // CHECK: [[BF_CLEAR:%.+]] = and i24 [[BF_LD]], -131065 809 // CHECK: or i24 [[BF_CLEAR]], [[BF_VALUE]] 810 // CHECK: store i24 %{{.+}}, i24* [[BITCAST2]] 811 // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8* 812 // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[BITCAST2]] to i8* 813 // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0) 814 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 815 // CHECK: [[EXIT]] 816 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, 817 #pragma omp atomic capture 818 {bfx3_packed.a += ldv; iv = bfx3_packed.a;} 819 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 820 // CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8 821 // CHECK: br label %[[CONT:.+]] 822 // CHECK: [[CONT]] 823 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 824 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]], 825 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]], 826 // CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]], 827 // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 47 828 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 63 829 // CHECK: [[A_CAST:%.+]] = trunc i64 [[A_ASHR:%.+]] to i32 830 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST:%.+]] to x86_fp80 831 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]] 832 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[MUL]] to i32 833 // CHECK: [[ZEXT:%.+]] = zext i32 [[NEW_VAL]] to i64 834 // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]], 835 // CHECK: [[BF_AND:%.+]] = and i64 [[ZEXT]], 1 836 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 16 837 // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -65537 838 // CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]] 839 // CHECK: store i64 %{{.+}}, i64* [[TEMP1]] 840 // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]] 841 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8 842 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0 843 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 844 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 845 // CHECK: [[EXIT]] 846 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, 847 #pragma omp atomic relaxed capture 848 iv = bfx4.a = bfx4.a * ldv; 849 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 850 // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic, align 1 851 // CHECK: br label %[[CONT:.+]] 852 // CHECK: [[CONT]] 853 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 854 // CHECK: [[BITCAST1:%.+]] = bitcast i32* %{{.+}} to i8* 855 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], 856 // CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8* 857 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], 858 // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], 859 // CHECK: [[A_SHL:%.+]] = shl i8 [[A_LD]], 7 860 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_SHL:%.+]], 7 861 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR:%.+]] to i32 862 // CHECK: [[CONV:%.+]] = sitofp i32 [[CAST]] to x86_fp80 863 // CHECK: [[SUB: %.+]] = fsub x86_fp80 [[CONV]], [[EXPR]] 864 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB:%.+]] to i32 865 // CHECK: [[NEW_VAL:%.+]] = trunc i32 [[CONV]] to i8 866 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], 867 // CHECK: [[BF_VALUE:%.+]] = and i8 [[NEW_VAL]], 1 868 // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], -2 869 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] 870 // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] 871 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] 872 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 873 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 874 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 875 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 876 // CHECK: [[EXIT]] 877 // CHECK: store i32 [[CAST]], i32* @{{.+}}, 878 #pragma omp atomic capture relaxed 879 {iv = bfx4_packed.a; bfx4_packed.a -= ldv;} 880 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 881 // CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8 882 // CHECK: br label %[[CONT:.+]] 883 // CHECK: [[CONT]] 884 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 885 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]], 886 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]], 887 // CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]], 888 // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 40 889 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 57 890 // CHECK: [[CONV:%.+]] = sitofp i64 [[A_ASHR]] to x86_fp80 891 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[CONV]], [[EXPR]] 892 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[DIV]] to i64 893 // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]], 894 // CHECK: [[BF_AND:%.+]] = and i64 [[CONV]], 127 895 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND:%.+]], 17 896 // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -16646145 897 // CHECK: [[VAL:%.+]] = or i64 [[BF_CLEAR]], [[BF_VALUE]] 898 // CHECK: store i64 [[VAL]], i64* [[TEMP1]] 899 // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]] 900 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] release monotonic, align 8 901 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0 902 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 903 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 904 // CHECK: [[EXIT]] 905 // CHECK: [[NEW_VAL:%.+]] = trunc i64 [[CONV]] to i32 906 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, 907 // CHECK: call{{.*}} @__kmpc_flush( 908 #pragma omp atomic capture release 909 {bfx4.b /= ldv; iv = bfx4.b;} 910 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 911 // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) acquire, align 1 912 // CHECK: br label %[[CONT:.+]] 913 // CHECK: [[CONT]] 914 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 915 // CHECK: [[BITCAST1:%.+]] = bitcast i64* %{{.+}} to i8* 916 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], 917 // CHECK: [[BITCAST:%.+]] = bitcast i64* %{{.+}} to i8* 918 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], 919 // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], 920 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 1 921 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i64 922 // CHECK: [[CONV:%.+]] = sitofp i64 [[CAST]] to x86_fp80 923 // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[CONV]], [[EXPR]] 924 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i64 925 // CHECK: [[TRUNC:%.+]] = trunc i64 [[NEW_VAL]] to i8 926 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], 927 // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 127 928 // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 1 929 // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], 1 930 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] 931 // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] 932 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] 933 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] acquire acquire, align 1 934 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 935 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 936 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 937 // CHECK: [[EXIT]] 938 // CHECK: [[NEW_VAL_I32:%.+]] = trunc i64 [[NEW_VAL]] to i32 939 // CHECK: store i32 [[NEW_VAL_I32]], i32* @{{.+}}, 940 // CHECK: call{{.*}} @__kmpc_flush( 941 #pragma omp atomic capture acquire 942 iv = bfx4_packed.b += ldv; 943 // CHECK: load i64, i64* 944 // CHECK: [[EXPR:%.+]] = uitofp i64 %{{.+}} to float 945 // CHECK: [[I64VAL:%.+]] = load atomic i64, i64* bitcast (<2 x float>* [[DEST:@.+]] to i64*) acquire, align 8 946 // CHECK: br label %[[CONT:.+]] 947 // CHECK: [[CONT]] 948 // CHECK: [[OLD_I64:%.+]] = phi i64 [ [[I64VAL]], %{{.+}} ], [ [[FAILED_I64_OLD_VAL:%.+]], %[[CONT]] ] 949 // CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[LDTEMP1:%.+]] to i64* 950 // CHECK: store i64 [[OLD_I64]], i64* [[BITCAST]], 951 // CHECK: [[OLD_VEC_VAL:%.+]] = bitcast i64 [[OLD_I64]] to <2 x float> 952 // CHECK: store <2 x float> [[OLD_VEC_VAL]], <2 x float>* [[LDTEMP:%.+]], 953 // CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]] 954 // CHECK: [[X:%.+]] = extractelement <2 x float> [[VEC_VAL]], i64 0 955 // CHECK: [[VEC_ITEM_VAL:%.+]] = fsub float [[EXPR]], [[X]] 956 // CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP1]], 957 // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <2 x float> [[VEC_VAL]], float [[VEC_ITEM_VAL]], i64 0 958 // CHECK: store <2 x float> [[NEW_VEC_VAL]], <2 x float>* [[LDTEMP1]] 959 // CHECK: [[NEW_I64:%.+]] = load i64, i64* [[BITCAST]] 960 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (<2 x float>* [[DEST]] to i64*), i64 [[OLD_I64]], i64 [[NEW_I64]] acq_rel acquire, align 8 961 // CHECK: [[FAILED_I64_OLD_VAL:%.+]] = extractvalue { i64, i1 } [[RES]], 0 962 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 963 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 964 // CHECK: [[EXIT]] 965 // CHECK: store float [[X]], float* @{{.+}}, 966 // CHECK: call{{.*}} @__kmpc_flush( 967 #pragma omp atomic capture acq_rel 968 {fv = float2x.x; float2x.x = ulv - float2x.x;} 969 // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, 970 // CHECK: [[OLD_VAL:%.+]] = call i32 @llvm.read_register.i32([[REG:metadata ![0-9]+]]) 971 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[OLD_VAL]] to double 972 // CHECK: [[DIV:%.+]] = fdiv double [[EXPR]], [[X_RVAL]] 973 // CHECK: [[NEW_VAL:%.+]] = fptosi double [[DIV]] to i32 974 // CHECK: call void @llvm.write_register.i32([[REG]], i32 [[NEW_VAL]]) 975 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, 976 // CHECK: call{{.*}} @__kmpc_flush( 977 #pragma omp atomic capture seq_cst 978 {rix = dv / rix; iv = rix;} 979 // CHECK: [[OLD_VAL:%.+]] = atomicrmw xchg i32* @{{.+}}, i32 5 monotonic, align 4 980 // CHECK: call void @llvm.write_register.i32([[REG]], i32 [[OLD_VAL]]) 981 #pragma omp atomic capture 982 {rix = ix; ix = 5;} 983 return 0; 984 } 985 #endif 986