1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -no-opaque-pointers -triple i386-unknown-unknown -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -no-opaque-pointers -triple i386-unknown-unknown -emit-llvm -fcxx-exceptions -fexceptions -disable-llvm-passes -std=c++03 -o - %s | FileCheck --check-prefixes=CHECK-EH-03 %s
4 // RUN: %clang_cc1 -no-opaque-pointers -triple i386-unknown-unknown -emit-llvm -fcxx-exceptions -fexceptions -disable-llvm-passes -std=c++11 -DCXX11 -o - %s | FileCheck --check-prefixes=CHECK-EH-11 %s
5
6 // Test code generation for the named return value optimization.
7 class X {
8 public:
9 X();
10 X(const X&);
11 X(const volatile X &);
12 ~X();
13 };
14
15 template<typename T> struct Y {
16 Y();
fY17 static Y f() {
18 Y y;
19 return y;
20 }
21 };
22
23 void ConsumeX(X x);
24 extern X OuterX;
25
26 // CHECK-LABEL: @_Z5test0v(
27 // CHECK-NEXT: entry:
28 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
29 // CHECK-NEXT: [[NRVO:%.*]] = alloca i1, align 1
30 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
31 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
32 // CHECK-NEXT: store i1 false, i1* [[NRVO]], align 1
33 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
34 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
35 // CHECK-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
36 // CHECK-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
37 // CHECK: nrvo.unused:
38 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4:[0-9]+]]
39 // CHECK-NEXT: br label [[NRVO_SKIPDTOR]]
40 // CHECK: nrvo.skipdtor:
41 // CHECK-NEXT: ret void
42 //
43 // CHECK-EH-03-LABEL: @_Z5test0v(
44 // CHECK-EH-03-NEXT: entry:
45 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
46 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
47 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
48 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
49 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
50 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
51 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
52 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
53 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
54 // CHECK-EH-03: nrvo.unused:
55 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
56 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
57 // CHECK-EH-03: nrvo.skipdtor:
58 // CHECK-EH-03-NEXT: ret void
59 //
60 // CHECK-EH-11-LABEL: @_Z5test0v(
61 // CHECK-EH-11-NEXT: entry:
62 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
63 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
64 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
65 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
66 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
67 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
68 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
69 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
70 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
71 // CHECK-EH-11: nrvo.unused:
72 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6:[0-9]+]]
73 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
74 // CHECK-EH-11: nrvo.skipdtor:
75 // CHECK-EH-11-NEXT: ret void
76 //
test0()77 X test0() { // http://wg21.link/p2025r2#ex-2
78 X x;
79 return x; // NRVO happens
80 }
81
82 // CHECK-LABEL: @_Z5test1b(
83 // CHECK-NEXT: entry:
84 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
85 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
86 // CHECK-NEXT: [[NRVO:%.*]] = alloca i1, align 1
87 // CHECK-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
88 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
89 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
90 // CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
91 // CHECK-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
92 // CHECK-NEXT: store i1 false, i1* [[NRVO]], align 1
93 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
94 // CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
95 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
96 // CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
97 // CHECK: if.then:
98 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
99 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
100 // CHECK-NEXT: br label [[CLEANUP:%.*]]
101 // CHECK: if.end:
102 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
103 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
104 // CHECK-NEXT: br label [[CLEANUP]]
105 // CHECK: cleanup:
106 // CHECK-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
107 // CHECK-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
108 // CHECK: nrvo.unused:
109 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
110 // CHECK-NEXT: br label [[NRVO_SKIPDTOR]]
111 // CHECK: nrvo.skipdtor:
112 // CHECK-NEXT: ret void
113 //
114 // CHECK-EH-03-LABEL: @_Z5test1b(
115 // CHECK-EH-03-NEXT: entry:
116 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
117 // CHECK-EH-03-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
118 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
119 // CHECK-EH-03-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
120 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
121 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
122 // CHECK-EH-03-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
123 // CHECK-EH-03-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
124 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
125 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
126 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
127 // CHECK-EH-03-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
128 // CHECK-EH-03-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
129 // CHECK-EH-03: if.then:
130 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
131 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
132 // CHECK-EH-03-NEXT: br label [[CLEANUP:%.*]]
133 // CHECK-EH-03: if.end:
134 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
135 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
136 // CHECK-EH-03-NEXT: br label [[CLEANUP]]
137 // CHECK-EH-03: cleanup:
138 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
139 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
140 // CHECK-EH-03: nrvo.unused:
141 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
142 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
143 // CHECK-EH-03: nrvo.skipdtor:
144 // CHECK-EH-03-NEXT: ret void
145 //
146 // CHECK-EH-11-LABEL: @_Z5test1b(
147 // CHECK-EH-11-NEXT: entry:
148 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
149 // CHECK-EH-11-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
150 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
151 // CHECK-EH-11-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
152 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
153 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
154 // CHECK-EH-11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
155 // CHECK-EH-11-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
156 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
157 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
158 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
159 // CHECK-EH-11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
160 // CHECK-EH-11-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
161 // CHECK-EH-11: if.then:
162 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
163 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
164 // CHECK-EH-11-NEXT: br label [[CLEANUP:%.*]]
165 // CHECK-EH-11: if.end:
166 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
167 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
168 // CHECK-EH-11-NEXT: br label [[CLEANUP]]
169 // CHECK-EH-11: cleanup:
170 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
171 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
172 // CHECK-EH-11: nrvo.unused:
173 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
174 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
175 // CHECK-EH-11: nrvo.skipdtor:
176 // CHECK-EH-11-NEXT: ret void
177 //
test1(bool B)178 X test1(bool B) {
179 X x;
180 if (B)
181 return (x); // NRVO happens
182 return x; // NRVO happens
183 }
184
185 // CHECK-LABEL: @_Z5test2b(
186 // CHECK-NEXT: entry:
187 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
188 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
189 // CHECK-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
190 // CHECK-NEXT: [[Y:%.*]] = alloca [[CLASS_X]], align 1
191 // CHECK-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
192 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
193 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
194 // CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
195 // CHECK-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
196 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
197 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
198 // CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
199 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
200 // CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
201 // CHECK: if.then:
202 // CHECK-NEXT: call void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
203 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
204 // CHECK-NEXT: br label [[CLEANUP:%.*]]
205 // CHECK: if.end:
206 // CHECK-NEXT: call void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
207 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
208 // CHECK-NEXT: br label [[CLEANUP]]
209 // CHECK: cleanup:
210 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]]) #[[ATTR4]]
211 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR4]]
212 // CHECK-NEXT: ret void
213 //
214 // CHECK-EH-03-LABEL: @_Z5test2b(
215 // CHECK-EH-03-NEXT: entry:
216 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
217 // CHECK-EH-03-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
218 // CHECK-EH-03-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
219 // CHECK-EH-03-NEXT: [[Y:%.*]] = alloca [[CLASS_X]], align 1
220 // CHECK-EH-03-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
221 // CHECK-EH-03-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
222 // CHECK-EH-03-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
223 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
224 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
225 // CHECK-EH-03-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
226 // CHECK-EH-03-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
227 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
228 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
229 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
230 // CHECK-EH-03: invoke.cont:
231 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
232 // CHECK-EH-03-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
233 // CHECK-EH-03-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
234 // CHECK-EH-03: if.then:
235 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
236 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD1:%.*]]
237 // CHECK-EH-03: invoke.cont2:
238 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
239 // CHECK-EH-03-NEXT: br label [[CLEANUP:%.*]]
240 // CHECK-EH-03: lpad:
241 // CHECK-EH-03-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 }
242 // CHECK-EH-03-NEXT: cleanup
243 // CHECK-EH-03-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
244 // CHECK-EH-03-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 4
245 // CHECK-EH-03-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
246 // CHECK-EH-03-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
247 // CHECK-EH-03-NEXT: br label [[EHCLEANUP:%.*]]
248 // CHECK-EH-03: lpad1:
249 // CHECK-EH-03-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 }
250 // CHECK-EH-03-NEXT: cleanup
251 // CHECK-EH-03-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
252 // CHECK-EH-03-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 4
253 // CHECK-EH-03-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1
254 // CHECK-EH-03-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4
255 // CHECK-EH-03-NEXT: invoke void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
256 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
257 // CHECK-EH-03: if.end:
258 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
259 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD1]]
260 // CHECK-EH-03: invoke.cont3:
261 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
262 // CHECK-EH-03-NEXT: br label [[CLEANUP]]
263 // CHECK-EH-03: cleanup:
264 // CHECK-EH-03-NEXT: invoke void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
265 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT4:%.*]] unwind label [[LPAD]]
266 // CHECK-EH-03: invoke.cont4:
267 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
268 // CHECK-EH-03-NEXT: ret void
269 // CHECK-EH-03: invoke.cont5:
270 // CHECK-EH-03-NEXT: br label [[EHCLEANUP]]
271 // CHECK-EH-03: ehcleanup:
272 // CHECK-EH-03-NEXT: invoke void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
273 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[TERMINATE_LPAD]]
274 // CHECK-EH-03: invoke.cont7:
275 // CHECK-EH-03-NEXT: br label [[EH_RESUME:%.*]]
276 // CHECK-EH-03: eh.resume:
277 // CHECK-EH-03-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
278 // CHECK-EH-03-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
279 // CHECK-EH-03-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
280 // CHECK-EH-03-NEXT: [[LPAD_VAL8:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
281 // CHECK-EH-03-NEXT: resume { i8*, i32 } [[LPAD_VAL8]]
282 // CHECK-EH-03: terminate.lpad:
283 // CHECK-EH-03-NEXT: [[TMP8:%.*]] = landingpad { i8*, i32 }
284 // CHECK-EH-03-NEXT: catch i8* null
285 // CHECK-EH-03-NEXT: [[TMP9:%.*]] = extractvalue { i8*, i32 } [[TMP8]], 0
286 // CHECK-EH-03-NEXT: call void @__clang_call_terminate(i8* [[TMP9]]) #[[ATTR6:[0-9]+]]
287 // CHECK-EH-03-NEXT: unreachable
288 //
289 // CHECK-EH-11-LABEL: @_Z5test2b(
290 // CHECK-EH-11-NEXT: entry:
291 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
292 // CHECK-EH-11-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
293 // CHECK-EH-11-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
294 // CHECK-EH-11-NEXT: [[Y:%.*]] = alloca [[CLASS_X]], align 1
295 // CHECK-EH-11-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
296 // CHECK-EH-11-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
297 // CHECK-EH-11-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
298 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
299 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
300 // CHECK-EH-11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
301 // CHECK-EH-11-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
302 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
303 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
304 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
305 // CHECK-EH-11: invoke.cont:
306 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
307 // CHECK-EH-11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
308 // CHECK-EH-11-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
309 // CHECK-EH-11: if.then:
310 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
311 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD1:%.*]]
312 // CHECK-EH-11: invoke.cont2:
313 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
314 // CHECK-EH-11-NEXT: br label [[CLEANUP:%.*]]
315 // CHECK-EH-11: lpad:
316 // CHECK-EH-11-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 }
317 // CHECK-EH-11-NEXT: cleanup
318 // CHECK-EH-11-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
319 // CHECK-EH-11-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 4
320 // CHECK-EH-11-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
321 // CHECK-EH-11-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
322 // CHECK-EH-11-NEXT: br label [[EHCLEANUP:%.*]]
323 // CHECK-EH-11: lpad1:
324 // CHECK-EH-11-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 }
325 // CHECK-EH-11-NEXT: cleanup
326 // CHECK-EH-11-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
327 // CHECK-EH-11-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 4
328 // CHECK-EH-11-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1
329 // CHECK-EH-11-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4
330 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]]) #[[ATTR6]]
331 // CHECK-EH-11-NEXT: br label [[EHCLEANUP]]
332 // CHECK-EH-11: if.end:
333 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
334 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD1]]
335 // CHECK-EH-11: invoke.cont3:
336 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
337 // CHECK-EH-11-NEXT: br label [[CLEANUP]]
338 // CHECK-EH-11: cleanup:
339 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]]) #[[ATTR6]]
340 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
341 // CHECK-EH-11-NEXT: ret void
342 // CHECK-EH-11: ehcleanup:
343 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
344 // CHECK-EH-11-NEXT: br label [[EH_RESUME:%.*]]
345 // CHECK-EH-11: eh.resume:
346 // CHECK-EH-11-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
347 // CHECK-EH-11-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
348 // CHECK-EH-11-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
349 // CHECK-EH-11-NEXT: [[LPAD_VAL5:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
350 // CHECK-EH-11-NEXT: resume { i8*, i32 } [[LPAD_VAL5]]
351 //
test2(bool B)352 X test2(bool B) {
353 X x;
354 X y;
355 if (B)
356 return y; // NRVO is impossible
357 return x; // NRVO is impossible
358 }
359
360 // CHECK-LABEL: @_Z5test3b(
361 // CHECK-NEXT: entry:
362 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
363 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
364 // CHECK-NEXT: [[NRVO:%.*]] = alloca i1, align 1
365 // CHECK-NEXT: [[NRVO1:%.*]] = alloca i1, align 1
366 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
367 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
368 // CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
369 // CHECK-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
370 // CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
371 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
372 // CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
373 // CHECK: if.then:
374 // CHECK-NEXT: store i1 false, i1* [[NRVO]], align 1
375 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
376 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
377 // CHECK-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
378 // CHECK-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
379 // CHECK: nrvo.unused:
380 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
381 // CHECK-NEXT: br label [[NRVO_SKIPDTOR]]
382 // CHECK: nrvo.skipdtor:
383 // CHECK-NEXT: br label [[RETURN:%.*]]
384 // CHECK: if.end:
385 // CHECK-NEXT: store i1 false, i1* [[NRVO1]], align 1
386 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
387 // CHECK-NEXT: store i1 true, i1* [[NRVO1]], align 1
388 // CHECK-NEXT: [[NRVO_VAL2:%.*]] = load i1, i1* [[NRVO1]], align 1
389 // CHECK-NEXT: br i1 [[NRVO_VAL2]], label [[NRVO_SKIPDTOR4:%.*]], label [[NRVO_UNUSED3:%.*]]
390 // CHECK: nrvo.unused3:
391 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
392 // CHECK-NEXT: br label [[NRVO_SKIPDTOR4]]
393 // CHECK: nrvo.skipdtor4:
394 // CHECK-NEXT: br label [[RETURN]]
395 // CHECK: return:
396 // CHECK-NEXT: ret void
397 //
398 // CHECK-EH-03-LABEL: @_Z5test3b(
399 // CHECK-EH-03-NEXT: entry:
400 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
401 // CHECK-EH-03-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
402 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
403 // CHECK-EH-03-NEXT: [[NRVO1:%.*]] = alloca i1, align 1
404 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
405 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
406 // CHECK-EH-03-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
407 // CHECK-EH-03-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
408 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
409 // CHECK-EH-03-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
410 // CHECK-EH-03-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
411 // CHECK-EH-03: if.then:
412 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
413 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
414 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
415 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
416 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
417 // CHECK-EH-03: nrvo.unused:
418 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
419 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
420 // CHECK-EH-03: nrvo.skipdtor:
421 // CHECK-EH-03-NEXT: br label [[RETURN:%.*]]
422 // CHECK-EH-03: if.end:
423 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO1]], align 1
424 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
425 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO1]], align 1
426 // CHECK-EH-03-NEXT: [[NRVO_VAL2:%.*]] = load i1, i1* [[NRVO1]], align 1
427 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL2]], label [[NRVO_SKIPDTOR4:%.*]], label [[NRVO_UNUSED3:%.*]]
428 // CHECK-EH-03: nrvo.unused3:
429 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
430 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR4]]
431 // CHECK-EH-03: nrvo.skipdtor4:
432 // CHECK-EH-03-NEXT: br label [[RETURN]]
433 // CHECK-EH-03: return:
434 // CHECK-EH-03-NEXT: ret void
435 //
436 // CHECK-EH-11-LABEL: @_Z5test3b(
437 // CHECK-EH-11-NEXT: entry:
438 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
439 // CHECK-EH-11-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
440 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
441 // CHECK-EH-11-NEXT: [[NRVO1:%.*]] = alloca i1, align 1
442 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
443 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
444 // CHECK-EH-11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
445 // CHECK-EH-11-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
446 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
447 // CHECK-EH-11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
448 // CHECK-EH-11-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
449 // CHECK-EH-11: if.then:
450 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
451 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
452 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
453 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
454 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
455 // CHECK-EH-11: nrvo.unused:
456 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
457 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
458 // CHECK-EH-11: nrvo.skipdtor:
459 // CHECK-EH-11-NEXT: br label [[RETURN:%.*]]
460 // CHECK-EH-11: if.end:
461 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO1]], align 1
462 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
463 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO1]], align 1
464 // CHECK-EH-11-NEXT: [[NRVO_VAL2:%.*]] = load i1, i1* [[NRVO1]], align 1
465 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL2]], label [[NRVO_SKIPDTOR4:%.*]], label [[NRVO_UNUSED3:%.*]]
466 // CHECK-EH-11: nrvo.unused3:
467 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
468 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR4]]
469 // CHECK-EH-11: nrvo.skipdtor4:
470 // CHECK-EH-11-NEXT: br label [[RETURN]]
471 // CHECK-EH-11: return:
472 // CHECK-EH-11-NEXT: ret void
473 //
test3(bool B)474 X test3(bool B) { // http://wg21.link/p2025r2#ex-4
475 if (B) {
476 X y;
477 return y; // NRVO happens
478 }
479 X x;
480 return x; // FIXME: NRVO could happen, but doesn't
481 }
482
483 extern "C" void exit(int) throw();
484
485 // CHECK-LABEL: @_Z5test4b(
486 // CHECK-NEXT: entry:
487 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
488 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
489 // CHECK-NEXT: [[NRVO:%.*]] = alloca i1, align 1
490 // CHECK-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
491 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
492 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
493 // CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
494 // CHECK-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
495 // CHECK-NEXT: store i1 false, i1* [[NRVO]], align 1
496 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
497 // CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
498 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
499 // CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
500 // CHECK: if.then:
501 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
502 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
503 // CHECK-NEXT: br label [[CLEANUP:%.*]]
504 // CHECK: if.end:
505 // CHECK-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT]], align 4
506 // CHECK-NEXT: br label [[CLEANUP]]
507 // CHECK: cleanup:
508 // CHECK-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
509 // CHECK-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
510 // CHECK: nrvo.unused:
511 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
512 // CHECK-NEXT: br label [[NRVO_SKIPDTOR]]
513 // CHECK: nrvo.skipdtor:
514 // CHECK-NEXT: [[CLEANUP_DEST:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
515 // CHECK-NEXT: switch i32 [[CLEANUP_DEST]], label [[UNREACHABLE:%.*]] [
516 // CHECK-NEXT: i32 0, label [[CLEANUP_CONT:%.*]]
517 // CHECK-NEXT: i32 1, label [[RETURN:%.*]]
518 // CHECK-NEXT: ]
519 // CHECK: cleanup.cont:
520 // CHECK-NEXT: call void @exit(i32 noundef 1) #[[ATTR4]]
521 // CHECK-NEXT: call void @llvm.trap()
522 // CHECK-NEXT: unreachable
523 // CHECK: return:
524 // CHECK-NEXT: ret void
525 // CHECK: unreachable:
526 // CHECK-NEXT: unreachable
527 //
528 // CHECK-EH-03-LABEL: @_Z5test4b(
529 // CHECK-EH-03-NEXT: entry:
530 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
531 // CHECK-EH-03-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
532 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
533 // CHECK-EH-03-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
534 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
535 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
536 // CHECK-EH-03-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
537 // CHECK-EH-03-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
538 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
539 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
540 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
541 // CHECK-EH-03-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
542 // CHECK-EH-03-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
543 // CHECK-EH-03: if.then:
544 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
545 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
546 // CHECK-EH-03-NEXT: br label [[CLEANUP:%.*]]
547 // CHECK-EH-03: if.end:
548 // CHECK-EH-03-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT]], align 4
549 // CHECK-EH-03-NEXT: br label [[CLEANUP]]
550 // CHECK-EH-03: cleanup:
551 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
552 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
553 // CHECK-EH-03: nrvo.unused:
554 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
555 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
556 // CHECK-EH-03: nrvo.skipdtor:
557 // CHECK-EH-03-NEXT: [[CLEANUP_DEST:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
558 // CHECK-EH-03-NEXT: switch i32 [[CLEANUP_DEST]], label [[UNREACHABLE:%.*]] [
559 // CHECK-EH-03-NEXT: i32 0, label [[CLEANUP_CONT:%.*]]
560 // CHECK-EH-03-NEXT: i32 1, label [[RETURN:%.*]]
561 // CHECK-EH-03-NEXT: ]
562 // CHECK-EH-03: cleanup.cont:
563 // CHECK-EH-03-NEXT: call void @exit(i32 noundef 1) #[[ATTR7:[0-9]+]]
564 // CHECK-EH-03-NEXT: call void @llvm.trap()
565 // CHECK-EH-03-NEXT: unreachable
566 // CHECK-EH-03: return:
567 // CHECK-EH-03-NEXT: ret void
568 // CHECK-EH-03: unreachable:
569 // CHECK-EH-03-NEXT: unreachable
570 //
571 // CHECK-EH-11-LABEL: @_Z5test4b(
572 // CHECK-EH-11-NEXT: entry:
573 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
574 // CHECK-EH-11-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
575 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
576 // CHECK-EH-11-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
577 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
578 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
579 // CHECK-EH-11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
580 // CHECK-EH-11-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
581 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
582 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
583 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
584 // CHECK-EH-11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
585 // CHECK-EH-11-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
586 // CHECK-EH-11: if.then:
587 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
588 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
589 // CHECK-EH-11-NEXT: br label [[CLEANUP:%.*]]
590 // CHECK-EH-11: if.end:
591 // CHECK-EH-11-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT]], align 4
592 // CHECK-EH-11-NEXT: br label [[CLEANUP]]
593 // CHECK-EH-11: cleanup:
594 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
595 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
596 // CHECK-EH-11: nrvo.unused:
597 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
598 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
599 // CHECK-EH-11: nrvo.skipdtor:
600 // CHECK-EH-11-NEXT: [[CLEANUP_DEST:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
601 // CHECK-EH-11-NEXT: switch i32 [[CLEANUP_DEST]], label [[UNREACHABLE:%.*]] [
602 // CHECK-EH-11-NEXT: i32 0, label [[CLEANUP_CONT:%.*]]
603 // CHECK-EH-11-NEXT: i32 1, label [[RETURN:%.*]]
604 // CHECK-EH-11-NEXT: ]
605 // CHECK-EH-11: cleanup.cont:
606 // CHECK-EH-11-NEXT: call void @exit(i32 noundef 1) #[[ATTR6]]
607 // CHECK-EH-11-NEXT: call void @llvm.trap()
608 // CHECK-EH-11-NEXT: unreachable
609 // CHECK-EH-11: return:
610 // CHECK-EH-11-NEXT: ret void
611 // CHECK-EH-11: unreachable:
612 // CHECK-EH-11-NEXT: unreachable
613 //
test4(bool B)614 X test4(bool B) {
615 {
616 X x;
617 if (B)
618 return x; // NRVO happens
619 }
620 exit(1);
621 }
622
623 #ifdef __EXCEPTIONS
624 void may_throw();
625 // CHECK-EH-03-LABEL: @_Z5test5v(
626 // CHECK-EH-03-NEXT: entry:
627 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
628 // CHECK-EH-03-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
629 // CHECK-EH-03-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
630 // CHECK-EH-03-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
631 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
632 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
633 // CHECK-EH-03-NEXT: invoke void @_Z9may_throwv()
634 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
635 // CHECK-EH-03: invoke.cont:
636 // CHECK-EH-03-NEXT: br label [[TRY_CONT:%.*]]
637 // CHECK-EH-03: lpad:
638 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 }
639 // CHECK-EH-03-NEXT: catch i8* bitcast ({ i8*, i8* }* @_ZTI1X to i8*)
640 // CHECK-EH-03-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0
641 // CHECK-EH-03-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 4
642 // CHECK-EH-03-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1
643 // CHECK-EH-03-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4
644 // CHECK-EH-03-NEXT: br label [[CATCH_DISPATCH:%.*]]
645 // CHECK-EH-03: catch.dispatch:
646 // CHECK-EH-03-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
647 // CHECK-EH-03-NEXT: [[TMP4:%.*]] = call i32 @llvm.eh.typeid.for(i8* bitcast ({ i8*, i8* }* @_ZTI1X to i8*)) #[[ATTR7]]
648 // CHECK-EH-03-NEXT: [[MATCHES:%.*]] = icmp eq i32 [[SEL]], [[TMP4]]
649 // CHECK-EH-03-NEXT: br i1 [[MATCHES]], label [[CATCH:%.*]], label [[EH_RESUME:%.*]]
650 // CHECK-EH-03: catch:
651 // CHECK-EH-03-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
652 // CHECK-EH-03-NEXT: [[TMP5:%.*]] = call i8* @__cxa_get_exception_ptr(i8* [[EXN]]) #[[ATTR7]]
653 // CHECK-EH-03-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %class.X*
654 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]], %class.X* noundef nonnull align 1 dereferenceable(1) [[TMP6]])
655 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
656 // CHECK-EH-03: invoke.cont1:
657 // CHECK-EH-03-NEXT: [[TMP7:%.*]] = call i8* @__cxa_begin_catch(i8* [[EXN]]) #[[ATTR7]]
658 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
659 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD2:%.*]]
660 // CHECK-EH-03: invoke.cont3:
661 // CHECK-EH-03-NEXT: invoke void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
662 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD4:%.*]]
663 // CHECK-EH-03: lpad2:
664 // CHECK-EH-03-NEXT: [[TMP8:%.*]] = landingpad { i8*, i32 }
665 // CHECK-EH-03-NEXT: cleanup
666 // CHECK-EH-03-NEXT: [[TMP9:%.*]] = extractvalue { i8*, i32 } [[TMP8]], 0
667 // CHECK-EH-03-NEXT: store i8* [[TMP9]], i8** [[EXN_SLOT]], align 4
668 // CHECK-EH-03-NEXT: [[TMP10:%.*]] = extractvalue { i8*, i32 } [[TMP8]], 1
669 // CHECK-EH-03-NEXT: store i32 [[TMP10]], i32* [[EHSELECTOR_SLOT]], align 4
670 // CHECK-EH-03-NEXT: invoke void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
671 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[TERMINATE_LPAD]]
672 // CHECK-EH-03: invoke.cont5:
673 // CHECK-EH-03-NEXT: call void @__cxa_end_catch()
674 // CHECK-EH-03-NEXT: ret void
675 // CHECK-EH-03: lpad4:
676 // CHECK-EH-03-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
677 // CHECK-EH-03-NEXT: cleanup
678 // CHECK-EH-03-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
679 // CHECK-EH-03-NEXT: store i8* [[TMP12]], i8** [[EXN_SLOT]], align 4
680 // CHECK-EH-03-NEXT: [[TMP13:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 1
681 // CHECK-EH-03-NEXT: store i32 [[TMP13]], i32* [[EHSELECTOR_SLOT]], align 4
682 // CHECK-EH-03-NEXT: br label [[EHCLEANUP:%.*]]
683 // CHECK-EH-03: invoke.cont6:
684 // CHECK-EH-03-NEXT: br label [[EHCLEANUP]]
685 // CHECK-EH-03: ehcleanup:
686 // CHECK-EH-03-NEXT: invoke void @__cxa_end_catch()
687 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[TERMINATE_LPAD]]
688 // CHECK-EH-03: invoke.cont7:
689 // CHECK-EH-03-NEXT: br label [[EH_RESUME]]
690 // CHECK-EH-03: try.cont:
691 // CHECK-EH-03-NEXT: call void @llvm.trap()
692 // CHECK-EH-03-NEXT: unreachable
693 // CHECK-EH-03: eh.resume:
694 // CHECK-EH-03-NEXT: [[EXN8:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
695 // CHECK-EH-03-NEXT: [[SEL9:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
696 // CHECK-EH-03-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN8]], 0
697 // CHECK-EH-03-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL9]], 1
698 // CHECK-EH-03-NEXT: resume { i8*, i32 } [[LPAD_VAL10]]
699 // CHECK-EH-03: terminate.lpad:
700 // CHECK-EH-03-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 }
701 // CHECK-EH-03-NEXT: catch i8* null
702 // CHECK-EH-03-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0
703 // CHECK-EH-03-NEXT: call void @__clang_call_terminate(i8* [[TMP15]]) #[[ATTR6]]
704 // CHECK-EH-03-NEXT: unreachable
705 //
706 // CHECK-EH-11-LABEL: @_Z5test5v(
707 // CHECK-EH-11-NEXT: entry:
708 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
709 // CHECK-EH-11-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
710 // CHECK-EH-11-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
711 // CHECK-EH-11-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
712 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
713 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
714 // CHECK-EH-11-NEXT: invoke void @_Z9may_throwv()
715 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
716 // CHECK-EH-11: invoke.cont:
717 // CHECK-EH-11-NEXT: br label [[TRY_CONT:%.*]]
718 // CHECK-EH-11: lpad:
719 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 }
720 // CHECK-EH-11-NEXT: catch i8* bitcast ({ i8*, i8* }* @_ZTI1X to i8*)
721 // CHECK-EH-11-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0
722 // CHECK-EH-11-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 4
723 // CHECK-EH-11-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1
724 // CHECK-EH-11-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4
725 // CHECK-EH-11-NEXT: br label [[CATCH_DISPATCH:%.*]]
726 // CHECK-EH-11: catch.dispatch:
727 // CHECK-EH-11-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
728 // CHECK-EH-11-NEXT: [[TMP4:%.*]] = call i32 @llvm.eh.typeid.for(i8* bitcast ({ i8*, i8* }* @_ZTI1X to i8*)) #[[ATTR6]]
729 // CHECK-EH-11-NEXT: [[MATCHES:%.*]] = icmp eq i32 [[SEL]], [[TMP4]]
730 // CHECK-EH-11-NEXT: br i1 [[MATCHES]], label [[CATCH:%.*]], label [[EH_RESUME:%.*]]
731 // CHECK-EH-11: catch:
732 // CHECK-EH-11-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
733 // CHECK-EH-11-NEXT: [[TMP5:%.*]] = call i8* @__cxa_get_exception_ptr(i8* [[EXN]]) #[[ATTR6]]
734 // CHECK-EH-11-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %class.X*
735 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]], %class.X* noundef nonnull align 1 dereferenceable(1) [[TMP6]])
736 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
737 // CHECK-EH-11: invoke.cont1:
738 // CHECK-EH-11-NEXT: [[TMP7:%.*]] = call i8* @__cxa_begin_catch(i8* [[EXN]]) #[[ATTR6]]
739 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
740 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[LPAD2:%.*]]
741 // CHECK-EH-11: invoke.cont3:
742 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
743 // CHECK-EH-11-NEXT: call void @__cxa_end_catch()
744 // CHECK-EH-11-NEXT: ret void
745 // CHECK-EH-11: lpad2:
746 // CHECK-EH-11-NEXT: [[TMP8:%.*]] = landingpad { i8*, i32 }
747 // CHECK-EH-11-NEXT: cleanup
748 // CHECK-EH-11-NEXT: [[TMP9:%.*]] = extractvalue { i8*, i32 } [[TMP8]], 0
749 // CHECK-EH-11-NEXT: store i8* [[TMP9]], i8** [[EXN_SLOT]], align 4
750 // CHECK-EH-11-NEXT: [[TMP10:%.*]] = extractvalue { i8*, i32 } [[TMP8]], 1
751 // CHECK-EH-11-NEXT: store i32 [[TMP10]], i32* [[EHSELECTOR_SLOT]], align 4
752 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
753 // CHECK-EH-11-NEXT: invoke void @__cxa_end_catch()
754 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT4:%.*]] unwind label [[TERMINATE_LPAD]]
755 // CHECK-EH-11: invoke.cont4:
756 // CHECK-EH-11-NEXT: br label [[EH_RESUME]]
757 // CHECK-EH-11: try.cont:
758 // CHECK-EH-11-NEXT: call void @llvm.trap()
759 // CHECK-EH-11-NEXT: unreachable
760 // CHECK-EH-11: eh.resume:
761 // CHECK-EH-11-NEXT: [[EXN5:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
762 // CHECK-EH-11-NEXT: [[SEL6:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
763 // CHECK-EH-11-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN5]], 0
764 // CHECK-EH-11-NEXT: [[LPAD_VAL7:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL6]], 1
765 // CHECK-EH-11-NEXT: resume { i8*, i32 } [[LPAD_VAL7]]
766 // CHECK-EH-11: terminate.lpad:
767 // CHECK-EH-11-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
768 // CHECK-EH-11-NEXT: catch i8* null
769 // CHECK-EH-11-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
770 // CHECK-EH-11-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR7:[0-9]+]]
771 // CHECK-EH-11-NEXT: unreachable
772 //
test5()773 X test5() { // http://wg21.link/p2025r2#ex-14
774 try {
775 may_throw();
776 } catch (X x) {
777 return x; // FIXME: NRVO could happen, but doesn't
778 }
779 }
780 #endif
781
782 // rdar://problem/10430868
783 // CHECK-LABEL: @_Z5test6v(
784 // CHECK-NEXT: entry:
785 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
786 // CHECK-NEXT: [[A:%.*]] = alloca [[CLASS_X:%.*]], align 8
787 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
788 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
789 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[A]])
790 // CHECK-NEXT: call void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[A]])
791 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[A]]) #[[ATTR4]]
792 // CHECK-NEXT: ret void
793 //
794 // CHECK-EH-03-LABEL: @_Z5test6v(
795 // CHECK-EH-03-NEXT: entry:
796 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
797 // CHECK-EH-03-NEXT: [[A:%.*]] = alloca [[CLASS_X:%.*]], align 8
798 // CHECK-EH-03-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
799 // CHECK-EH-03-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
800 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
801 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
802 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[A]])
803 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[A]])
804 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
805 // CHECK-EH-03: invoke.cont:
806 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[A]])
807 // CHECK-EH-03-NEXT: ret void
808 // CHECK-EH-03: lpad:
809 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 }
810 // CHECK-EH-03-NEXT: cleanup
811 // CHECK-EH-03-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0
812 // CHECK-EH-03-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 4
813 // CHECK-EH-03-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1
814 // CHECK-EH-03-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4
815 // CHECK-EH-03-NEXT: invoke void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[A]])
816 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
817 // CHECK-EH-03: invoke.cont1:
818 // CHECK-EH-03-NEXT: br label [[EH_RESUME:%.*]]
819 // CHECK-EH-03: eh.resume:
820 // CHECK-EH-03-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
821 // CHECK-EH-03-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
822 // CHECK-EH-03-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
823 // CHECK-EH-03-NEXT: [[LPAD_VAL2:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
824 // CHECK-EH-03-NEXT: resume { i8*, i32 } [[LPAD_VAL2]]
825 // CHECK-EH-03: terminate.lpad:
826 // CHECK-EH-03-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 }
827 // CHECK-EH-03-NEXT: catch i8* null
828 // CHECK-EH-03-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0
829 // CHECK-EH-03-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR6]]
830 // CHECK-EH-03-NEXT: unreachable
831 //
832 // CHECK-EH-11-LABEL: @_Z5test6v(
833 // CHECK-EH-11-NEXT: entry:
834 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
835 // CHECK-EH-11-NEXT: [[A:%.*]] = alloca [[CLASS_X:%.*]], align 8
836 // CHECK-EH-11-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
837 // CHECK-EH-11-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
838 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
839 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
840 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[A]])
841 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[A]])
842 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
843 // CHECK-EH-11: invoke.cont:
844 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[A]]) #[[ATTR6]]
845 // CHECK-EH-11-NEXT: ret void
846 // CHECK-EH-11: lpad:
847 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 }
848 // CHECK-EH-11-NEXT: cleanup
849 // CHECK-EH-11-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0
850 // CHECK-EH-11-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 4
851 // CHECK-EH-11-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1
852 // CHECK-EH-11-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4
853 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[A]]) #[[ATTR6]]
854 // CHECK-EH-11-NEXT: br label [[EH_RESUME:%.*]]
855 // CHECK-EH-11: eh.resume:
856 // CHECK-EH-11-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
857 // CHECK-EH-11-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
858 // CHECK-EH-11-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
859 // CHECK-EH-11-NEXT: [[LPAD_VAL1:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
860 // CHECK-EH-11-NEXT: resume { i8*, i32 } [[LPAD_VAL1]]
861 //
test6()862 X test6() {
863 X a __attribute__((aligned(8)));
864 return a; // NRVO is impossible
865 }
866
867 // CHECK-LABEL: @_Z5test7b(
868 // CHECK-NEXT: entry:
869 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
870 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
871 // CHECK-NEXT: [[NRVO:%.*]] = alloca i1, align 1
872 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
873 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
874 // CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
875 // CHECK-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
876 // CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
877 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
878 // CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
879 // CHECK: if.then:
880 // CHECK-NEXT: store i1 false, i1* [[NRVO]], align 1
881 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
882 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
883 // CHECK-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
884 // CHECK-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
885 // CHECK: nrvo.unused:
886 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
887 // CHECK-NEXT: br label [[NRVO_SKIPDTOR]]
888 // CHECK: nrvo.skipdtor:
889 // CHECK-NEXT: br label [[RETURN:%.*]]
890 // CHECK: if.end:
891 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
892 // CHECK-NEXT: br label [[RETURN]]
893 // CHECK: return:
894 // CHECK-NEXT: ret void
895 //
896 // CHECK-EH-03-LABEL: @_Z5test7b(
897 // CHECK-EH-03-NEXT: entry:
898 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
899 // CHECK-EH-03-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
900 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
901 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
902 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
903 // CHECK-EH-03-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
904 // CHECK-EH-03-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
905 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
906 // CHECK-EH-03-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
907 // CHECK-EH-03-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
908 // CHECK-EH-03: if.then:
909 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
910 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
911 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
912 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
913 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
914 // CHECK-EH-03: nrvo.unused:
915 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
916 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
917 // CHECK-EH-03: nrvo.skipdtor:
918 // CHECK-EH-03-NEXT: br label [[RETURN:%.*]]
919 // CHECK-EH-03: if.end:
920 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
921 // CHECK-EH-03-NEXT: br label [[RETURN]]
922 // CHECK-EH-03: return:
923 // CHECK-EH-03-NEXT: ret void
924 //
925 // CHECK-EH-11-LABEL: @_Z5test7b(
926 // CHECK-EH-11-NEXT: entry:
927 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
928 // CHECK-EH-11-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
929 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
930 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
931 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
932 // CHECK-EH-11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
933 // CHECK-EH-11-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
934 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
935 // CHECK-EH-11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
936 // CHECK-EH-11-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
937 // CHECK-EH-11: if.then:
938 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
939 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
940 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
941 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
942 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
943 // CHECK-EH-11: nrvo.unused:
944 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
945 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
946 // CHECK-EH-11: nrvo.skipdtor:
947 // CHECK-EH-11-NEXT: br label [[RETURN:%.*]]
948 // CHECK-EH-11: if.end:
949 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
950 // CHECK-EH-11-NEXT: br label [[RETURN]]
951 // CHECK-EH-11: return:
952 // CHECK-EH-11-NEXT: ret void
953 //
test7(bool b)954 X test7(bool b) {
955 if (b) {
956 X x;
957 return x; // NRVO happens
958 }
959 return X();
960 }
961
962 // CHECK-LABEL: @_Z5test8b(
963 // CHECK-NEXT: entry:
964 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
965 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
966 // CHECK-NEXT: [[NRVO:%.*]] = alloca i1, align 1
967 // CHECK-NEXT: [[NRVO1:%.*]] = alloca i1, align 1
968 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
969 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
970 // CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
971 // CHECK-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
972 // CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
973 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
974 // CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
975 // CHECK: if.then:
976 // CHECK-NEXT: store i1 false, i1* [[NRVO]], align 1
977 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
978 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
979 // CHECK-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
980 // CHECK-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
981 // CHECK: nrvo.unused:
982 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
983 // CHECK-NEXT: br label [[NRVO_SKIPDTOR]]
984 // CHECK: nrvo.skipdtor:
985 // CHECK-NEXT: br label [[RETURN:%.*]]
986 // CHECK: if.else:
987 // CHECK-NEXT: store i1 false, i1* [[NRVO1]], align 1
988 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
989 // CHECK-NEXT: store i1 true, i1* [[NRVO1]], align 1
990 // CHECK-NEXT: [[NRVO_VAL2:%.*]] = load i1, i1* [[NRVO1]], align 1
991 // CHECK-NEXT: br i1 [[NRVO_VAL2]], label [[NRVO_SKIPDTOR4:%.*]], label [[NRVO_UNUSED3:%.*]]
992 // CHECK: nrvo.unused3:
993 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
994 // CHECK-NEXT: br label [[NRVO_SKIPDTOR4]]
995 // CHECK: nrvo.skipdtor4:
996 // CHECK-NEXT: br label [[RETURN]]
997 // CHECK: return:
998 // CHECK-NEXT: ret void
999 //
1000 // CHECK-EH-03-LABEL: @_Z5test8b(
1001 // CHECK-EH-03-NEXT: entry:
1002 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1003 // CHECK-EH-03-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1004 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
1005 // CHECK-EH-03-NEXT: [[NRVO1:%.*]] = alloca i1, align 1
1006 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1007 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1008 // CHECK-EH-03-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1009 // CHECK-EH-03-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1010 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1011 // CHECK-EH-03-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1012 // CHECK-EH-03-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
1013 // CHECK-EH-03: if.then:
1014 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
1015 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1016 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
1017 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
1018 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
1019 // CHECK-EH-03: nrvo.unused:
1020 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1021 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
1022 // CHECK-EH-03: nrvo.skipdtor:
1023 // CHECK-EH-03-NEXT: br label [[RETURN:%.*]]
1024 // CHECK-EH-03: if.else:
1025 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO1]], align 1
1026 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1027 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO1]], align 1
1028 // CHECK-EH-03-NEXT: [[NRVO_VAL2:%.*]] = load i1, i1* [[NRVO1]], align 1
1029 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL2]], label [[NRVO_SKIPDTOR4:%.*]], label [[NRVO_UNUSED3:%.*]]
1030 // CHECK-EH-03: nrvo.unused3:
1031 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1032 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR4]]
1033 // CHECK-EH-03: nrvo.skipdtor4:
1034 // CHECK-EH-03-NEXT: br label [[RETURN]]
1035 // CHECK-EH-03: return:
1036 // CHECK-EH-03-NEXT: ret void
1037 //
1038 // CHECK-EH-11-LABEL: @_Z5test8b(
1039 // CHECK-EH-11-NEXT: entry:
1040 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1041 // CHECK-EH-11-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1042 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
1043 // CHECK-EH-11-NEXT: [[NRVO1:%.*]] = alloca i1, align 1
1044 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1045 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1046 // CHECK-EH-11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1047 // CHECK-EH-11-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1048 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1049 // CHECK-EH-11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1050 // CHECK-EH-11-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
1051 // CHECK-EH-11: if.then:
1052 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
1053 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1054 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
1055 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
1056 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
1057 // CHECK-EH-11: nrvo.unused:
1058 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
1059 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
1060 // CHECK-EH-11: nrvo.skipdtor:
1061 // CHECK-EH-11-NEXT: br label [[RETURN:%.*]]
1062 // CHECK-EH-11: if.else:
1063 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO1]], align 1
1064 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1065 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO1]], align 1
1066 // CHECK-EH-11-NEXT: [[NRVO_VAL2:%.*]] = load i1, i1* [[NRVO1]], align 1
1067 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL2]], label [[NRVO_SKIPDTOR4:%.*]], label [[NRVO_UNUSED3:%.*]]
1068 // CHECK-EH-11: nrvo.unused3:
1069 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
1070 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR4]]
1071 // CHECK-EH-11: nrvo.skipdtor4:
1072 // CHECK-EH-11-NEXT: br label [[RETURN]]
1073 // CHECK-EH-11: return:
1074 // CHECK-EH-11-NEXT: ret void
1075 //
test8(bool b)1076 X test8(bool b) {
1077 if (b) {
1078 X x;
1079 return x; // NRVO happens
1080 } else {
1081 X y;
1082 return y; // NRVO happens
1083 }
1084 }
1085
1086 // CHECK-LABEL: @_Z5test9v(
1087 // CHECK-NEXT: entry:
1088 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1089 // CHECK-NEXT: [[TMP:%.*]] = alloca [[STRUCT_Y:%.*]], align 1
1090 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %struct.Y* [[AGG_RESULT:%.*]] to i8*
1091 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1092 // CHECK-NEXT: call void @_ZN1YIiE1fEv(%struct.Y* sret([[STRUCT_Y]]) align 1 [[TMP]])
1093 // CHECK-NEXT: call void @llvm.trap()
1094 // CHECK-NEXT: unreachable
1095 //
1096 // CHECK-EH-03-LABEL: @_Z5test9v(
1097 // CHECK-EH-03-NEXT: entry:
1098 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1099 // CHECK-EH-03-NEXT: [[TMP:%.*]] = alloca [[STRUCT_Y:%.*]], align 1
1100 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %struct.Y* [[AGG_RESULT:%.*]] to i8*
1101 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1102 // CHECK-EH-03-NEXT: call void @_ZN1YIiE1fEv(%struct.Y* sret([[STRUCT_Y]]) align 1 [[TMP]])
1103 // CHECK-EH-03-NEXT: call void @llvm.trap()
1104 // CHECK-EH-03-NEXT: unreachable
1105 //
1106 // CHECK-EH-11-LABEL: @_Z5test9v(
1107 // CHECK-EH-11-NEXT: entry:
1108 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1109 // CHECK-EH-11-NEXT: [[TMP:%.*]] = alloca [[STRUCT_Y:%.*]], align 1
1110 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %struct.Y* [[AGG_RESULT:%.*]] to i8*
1111 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1112 // CHECK-EH-11-NEXT: call void @_ZN1YIiE1fEv(%struct.Y* sret([[STRUCT_Y]]) align 1 [[TMP]])
1113 // CHECK-EH-11-NEXT: call void @llvm.trap()
1114 // CHECK-EH-11-NEXT: unreachable
1115 //
test9()1116 Y<int> test9() {
1117 Y<int>::f();
1118 }
1119
1120 // CHECK-LABEL: @_Z6test10b(
1121 // CHECK-NEXT: entry:
1122 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1123 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1124 // CHECK-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
1125 // CHECK-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1126 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1127 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1128 // CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1129 // CHECK-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1130 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1131 // CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1132 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1133 // CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
1134 // CHECK: if.then:
1135 // CHECK-NEXT: call void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1136 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1137 // CHECK-NEXT: br label [[CLEANUP:%.*]]
1138 // CHECK: if.else:
1139 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1140 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1141 // CHECK-NEXT: br label [[CLEANUP]]
1142 // CHECK: cleanup:
1143 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR4]]
1144 // CHECK-NEXT: ret void
1145 //
1146 // CHECK-EH-03-LABEL: @_Z6test10b(
1147 // CHECK-EH-03-NEXT: entry:
1148 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1149 // CHECK-EH-03-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1150 // CHECK-EH-03-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
1151 // CHECK-EH-03-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
1152 // CHECK-EH-03-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1153 // CHECK-EH-03-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1154 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1155 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1156 // CHECK-EH-03-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1157 // CHECK-EH-03-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1158 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1159 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1160 // CHECK-EH-03-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1161 // CHECK-EH-03-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
1162 // CHECK-EH-03: if.then:
1163 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1164 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1165 // CHECK-EH-03: invoke.cont:
1166 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1167 // CHECK-EH-03-NEXT: br label [[CLEANUP:%.*]]
1168 // CHECK-EH-03: lpad:
1169 // CHECK-EH-03-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 }
1170 // CHECK-EH-03-NEXT: cleanup
1171 // CHECK-EH-03-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
1172 // CHECK-EH-03-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 4
1173 // CHECK-EH-03-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
1174 // CHECK-EH-03-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
1175 // CHECK-EH-03-NEXT: invoke void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1176 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1177 // CHECK-EH-03: if.else:
1178 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1179 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[LPAD]]
1180 // CHECK-EH-03: invoke.cont1:
1181 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1182 // CHECK-EH-03-NEXT: br label [[CLEANUP]]
1183 // CHECK-EH-03: cleanup:
1184 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1185 // CHECK-EH-03-NEXT: ret void
1186 // CHECK-EH-03: invoke.cont2:
1187 // CHECK-EH-03-NEXT: br label [[EH_RESUME:%.*]]
1188 // CHECK-EH-03: eh.resume:
1189 // CHECK-EH-03-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
1190 // CHECK-EH-03-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
1191 // CHECK-EH-03-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
1192 // CHECK-EH-03-NEXT: [[LPAD_VAL3:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
1193 // CHECK-EH-03-NEXT: resume { i8*, i32 } [[LPAD_VAL3]]
1194 // CHECK-EH-03: terminate.lpad:
1195 // CHECK-EH-03-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 }
1196 // CHECK-EH-03-NEXT: catch i8* null
1197 // CHECK-EH-03-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
1198 // CHECK-EH-03-NEXT: call void @__clang_call_terminate(i8* [[TMP6]]) #[[ATTR6]]
1199 // CHECK-EH-03-NEXT: unreachable
1200 //
1201 // CHECK-EH-11-LABEL: @_Z6test10b(
1202 // CHECK-EH-11-NEXT: entry:
1203 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1204 // CHECK-EH-11-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1205 // CHECK-EH-11-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
1206 // CHECK-EH-11-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
1207 // CHECK-EH-11-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1208 // CHECK-EH-11-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1209 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1210 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1211 // CHECK-EH-11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1212 // CHECK-EH-11-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1213 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1214 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1215 // CHECK-EH-11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1216 // CHECK-EH-11-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
1217 // CHECK-EH-11: if.then:
1218 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1219 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1220 // CHECK-EH-11: invoke.cont:
1221 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1222 // CHECK-EH-11-NEXT: br label [[CLEANUP:%.*]]
1223 // CHECK-EH-11: lpad:
1224 // CHECK-EH-11-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 }
1225 // CHECK-EH-11-NEXT: cleanup
1226 // CHECK-EH-11-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
1227 // CHECK-EH-11-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 4
1228 // CHECK-EH-11-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
1229 // CHECK-EH-11-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
1230 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
1231 // CHECK-EH-11-NEXT: br label [[EH_RESUME:%.*]]
1232 // CHECK-EH-11: if.else:
1233 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1234 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[LPAD]]
1235 // CHECK-EH-11: invoke.cont1:
1236 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1237 // CHECK-EH-11-NEXT: br label [[CLEANUP]]
1238 // CHECK-EH-11: cleanup:
1239 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
1240 // CHECK-EH-11-NEXT: ret void
1241 // CHECK-EH-11: eh.resume:
1242 // CHECK-EH-11-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
1243 // CHECK-EH-11-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
1244 // CHECK-EH-11-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
1245 // CHECK-EH-11-NEXT: [[LPAD_VAL2:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
1246 // CHECK-EH-11-NEXT: resume { i8*, i32 } [[LPAD_VAL2]]
1247 //
test10(bool b)1248 X test10(bool b) { // http://wg21.link/p2025r2#ex-3
1249 X x;
1250 if (b)
1251 return x; // NRVO is impossible
1252 else
1253 return X();
1254 }
1255
1256 // CHECK-LABEL: @_Z6test11b(
1257 // CHECK-NEXT: entry:
1258 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1259 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1260 // CHECK-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
1261 // CHECK-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1262 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1263 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1264 // CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1265 // CHECK-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1266 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1267 // CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1268 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1269 // CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1270 // CHECK: if.then:
1271 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1272 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1273 // CHECK-NEXT: br label [[CLEANUP:%.*]]
1274 // CHECK: if.end:
1275 // CHECK-NEXT: call void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1276 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1277 // CHECK-NEXT: br label [[CLEANUP]]
1278 // CHECK: cleanup:
1279 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR4]]
1280 // CHECK-NEXT: ret void
1281 //
1282 // CHECK-EH-03-LABEL: @_Z6test11b(
1283 // CHECK-EH-03-NEXT: entry:
1284 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1285 // CHECK-EH-03-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1286 // CHECK-EH-03-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
1287 // CHECK-EH-03-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
1288 // CHECK-EH-03-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1289 // CHECK-EH-03-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1290 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1291 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1292 // CHECK-EH-03-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1293 // CHECK-EH-03-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1294 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1295 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1296 // CHECK-EH-03-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1297 // CHECK-EH-03-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1298 // CHECK-EH-03: if.then:
1299 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1300 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1301 // CHECK-EH-03: invoke.cont:
1302 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1303 // CHECK-EH-03-NEXT: br label [[CLEANUP:%.*]]
1304 // CHECK-EH-03: lpad:
1305 // CHECK-EH-03-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 }
1306 // CHECK-EH-03-NEXT: cleanup
1307 // CHECK-EH-03-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
1308 // CHECK-EH-03-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 4
1309 // CHECK-EH-03-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
1310 // CHECK-EH-03-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
1311 // CHECK-EH-03-NEXT: invoke void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1312 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1313 // CHECK-EH-03: if.end:
1314 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1315 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[LPAD]]
1316 // CHECK-EH-03: invoke.cont1:
1317 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1318 // CHECK-EH-03-NEXT: br label [[CLEANUP]]
1319 // CHECK-EH-03: cleanup:
1320 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1321 // CHECK-EH-03-NEXT: ret void
1322 // CHECK-EH-03: invoke.cont2:
1323 // CHECK-EH-03-NEXT: br label [[EH_RESUME:%.*]]
1324 // CHECK-EH-03: eh.resume:
1325 // CHECK-EH-03-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
1326 // CHECK-EH-03-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
1327 // CHECK-EH-03-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
1328 // CHECK-EH-03-NEXT: [[LPAD_VAL3:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
1329 // CHECK-EH-03-NEXT: resume { i8*, i32 } [[LPAD_VAL3]]
1330 // CHECK-EH-03: terminate.lpad:
1331 // CHECK-EH-03-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 }
1332 // CHECK-EH-03-NEXT: catch i8* null
1333 // CHECK-EH-03-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
1334 // CHECK-EH-03-NEXT: call void @__clang_call_terminate(i8* [[TMP6]]) #[[ATTR6]]
1335 // CHECK-EH-03-NEXT: unreachable
1336 //
1337 // CHECK-EH-11-LABEL: @_Z6test11b(
1338 // CHECK-EH-11-NEXT: entry:
1339 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1340 // CHECK-EH-11-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1341 // CHECK-EH-11-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
1342 // CHECK-EH-11-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
1343 // CHECK-EH-11-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1344 // CHECK-EH-11-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1345 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1346 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1347 // CHECK-EH-11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1348 // CHECK-EH-11-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1349 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1350 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1351 // CHECK-EH-11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1352 // CHECK-EH-11-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1353 // CHECK-EH-11: if.then:
1354 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1355 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1356 // CHECK-EH-11: invoke.cont:
1357 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1358 // CHECK-EH-11-NEXT: br label [[CLEANUP:%.*]]
1359 // CHECK-EH-11: lpad:
1360 // CHECK-EH-11-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 }
1361 // CHECK-EH-11-NEXT: cleanup
1362 // CHECK-EH-11-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
1363 // CHECK-EH-11-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 4
1364 // CHECK-EH-11-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
1365 // CHECK-EH-11-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
1366 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
1367 // CHECK-EH-11-NEXT: br label [[EH_RESUME:%.*]]
1368 // CHECK-EH-11: if.end:
1369 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1370 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[LPAD]]
1371 // CHECK-EH-11: invoke.cont1:
1372 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1373 // CHECK-EH-11-NEXT: br label [[CLEANUP]]
1374 // CHECK-EH-11: cleanup:
1375 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
1376 // CHECK-EH-11-NEXT: ret void
1377 // CHECK-EH-11: eh.resume:
1378 // CHECK-EH-11-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
1379 // CHECK-EH-11-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
1380 // CHECK-EH-11-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
1381 // CHECK-EH-11-NEXT: [[LPAD_VAL2:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
1382 // CHECK-EH-11-NEXT: resume { i8*, i32 } [[LPAD_VAL2]]
1383 //
test11(bool b)1384 X test11(bool b) { // http://wg21.link/p2025r2#ex-5
1385 X x;
1386 if (b)
1387 return X();
1388 return x; // NRVO is impossible
1389 }
1390
1391 // CHECK-LABEL: @_Z6test12b(
1392 // CHECK-NEXT: entry:
1393 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1394 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1395 // CHECK-NEXT: [[NRVO:%.*]] = alloca i1, align 1
1396 // CHECK-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1397 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1398 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1399 // CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1400 // CHECK-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1401 // CHECK-NEXT: br label [[DO_BODY:%.*]]
1402 // CHECK: do.body:
1403 // CHECK-NEXT: store i1 false, i1* [[NRVO]], align 1
1404 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1405 // CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1406 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1407 // CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1408 // CHECK: if.then:
1409 // CHECK-NEXT: store i32 2, i32* [[CLEANUP_DEST_SLOT]], align 4
1410 // CHECK-NEXT: br label [[CLEANUP:%.*]]
1411 // CHECK: if.end:
1412 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
1413 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1414 // CHECK-NEXT: br label [[CLEANUP]]
1415 // CHECK: cleanup:
1416 // CHECK-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
1417 // CHECK-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
1418 // CHECK: nrvo.unused:
1419 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
1420 // CHECK-NEXT: br label [[NRVO_SKIPDTOR]]
1421 // CHECK: nrvo.skipdtor:
1422 // CHECK-NEXT: [[CLEANUP_DEST:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
1423 // CHECK-NEXT: switch i32 [[CLEANUP_DEST]], label [[UNREACHABLE:%.*]] [
1424 // CHECK-NEXT: i32 2, label [[DO_END:%.*]]
1425 // CHECK-NEXT: i32 1, label [[RETURN:%.*]]
1426 // CHECK-NEXT: ]
1427 // CHECK: do.end:
1428 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1429 // CHECK-NEXT: br label [[RETURN]]
1430 // CHECK: return:
1431 // CHECK-NEXT: ret void
1432 // CHECK: unreachable:
1433 // CHECK-NEXT: unreachable
1434 //
1435 // CHECK-EH-03-LABEL: @_Z6test12b(
1436 // CHECK-EH-03-NEXT: entry:
1437 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1438 // CHECK-EH-03-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1439 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
1440 // CHECK-EH-03-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1441 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1442 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1443 // CHECK-EH-03-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1444 // CHECK-EH-03-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1445 // CHECK-EH-03-NEXT: br label [[DO_BODY:%.*]]
1446 // CHECK-EH-03: do.body:
1447 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
1448 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1449 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1450 // CHECK-EH-03-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1451 // CHECK-EH-03-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1452 // CHECK-EH-03: if.then:
1453 // CHECK-EH-03-NEXT: store i32 2, i32* [[CLEANUP_DEST_SLOT]], align 4
1454 // CHECK-EH-03-NEXT: br label [[CLEANUP:%.*]]
1455 // CHECK-EH-03: if.end:
1456 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
1457 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1458 // CHECK-EH-03-NEXT: br label [[CLEANUP]]
1459 // CHECK-EH-03: cleanup:
1460 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
1461 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
1462 // CHECK-EH-03: nrvo.unused:
1463 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1464 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
1465 // CHECK-EH-03: nrvo.skipdtor:
1466 // CHECK-EH-03-NEXT: [[CLEANUP_DEST:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
1467 // CHECK-EH-03-NEXT: switch i32 [[CLEANUP_DEST]], label [[UNREACHABLE:%.*]] [
1468 // CHECK-EH-03-NEXT: i32 2, label [[DO_END:%.*]]
1469 // CHECK-EH-03-NEXT: i32 1, label [[RETURN:%.*]]
1470 // CHECK-EH-03-NEXT: ]
1471 // CHECK-EH-03: do.end:
1472 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1473 // CHECK-EH-03-NEXT: br label [[RETURN]]
1474 // CHECK-EH-03: return:
1475 // CHECK-EH-03-NEXT: ret void
1476 // CHECK-EH-03: unreachable:
1477 // CHECK-EH-03-NEXT: unreachable
1478 //
1479 // CHECK-EH-11-LABEL: @_Z6test12b(
1480 // CHECK-EH-11-NEXT: entry:
1481 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1482 // CHECK-EH-11-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1483 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
1484 // CHECK-EH-11-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1485 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1486 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1487 // CHECK-EH-11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1488 // CHECK-EH-11-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1489 // CHECK-EH-11-NEXT: br label [[DO_BODY:%.*]]
1490 // CHECK-EH-11: do.body:
1491 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
1492 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1493 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1494 // CHECK-EH-11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1495 // CHECK-EH-11-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1496 // CHECK-EH-11: if.then:
1497 // CHECK-EH-11-NEXT: store i32 2, i32* [[CLEANUP_DEST_SLOT]], align 4
1498 // CHECK-EH-11-NEXT: br label [[CLEANUP:%.*]]
1499 // CHECK-EH-11: if.end:
1500 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
1501 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1502 // CHECK-EH-11-NEXT: br label [[CLEANUP]]
1503 // CHECK-EH-11: cleanup:
1504 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
1505 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
1506 // CHECK-EH-11: nrvo.unused:
1507 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
1508 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
1509 // CHECK-EH-11: nrvo.skipdtor:
1510 // CHECK-EH-11-NEXT: [[CLEANUP_DEST:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
1511 // CHECK-EH-11-NEXT: switch i32 [[CLEANUP_DEST]], label [[UNREACHABLE:%.*]] [
1512 // CHECK-EH-11-NEXT: i32 2, label [[DO_END:%.*]]
1513 // CHECK-EH-11-NEXT: i32 1, label [[RETURN:%.*]]
1514 // CHECK-EH-11-NEXT: ]
1515 // CHECK-EH-11: do.end:
1516 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1517 // CHECK-EH-11-NEXT: br label [[RETURN]]
1518 // CHECK-EH-11: return:
1519 // CHECK-EH-11-NEXT: ret void
1520 // CHECK-EH-11: unreachable:
1521 // CHECK-EH-11-NEXT: unreachable
1522 //
test12(bool b)1523 X test12(bool b) { // http://wg21.link/p2025r2#ex-6
1524 do {
1525 X x;
1526 if (b)
1527 break;
1528 return x; // NRVO happens
1529 } while (false);
1530 return X();
1531 }
1532
1533 // CHECK-LABEL: @_Z6test13b(
1534 // CHECK-NEXT: entry:
1535 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1536 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1537 // CHECK-NEXT: [[NRVO:%.*]] = alloca i1, align 1
1538 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1539 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1540 // CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1541 // CHECK-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1542 // CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1543 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1544 // CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1545 // CHECK: if.then:
1546 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1547 // CHECK-NEXT: br label [[RETURN:%.*]]
1548 // CHECK: if.end:
1549 // CHECK-NEXT: store i1 false, i1* [[NRVO]], align 1
1550 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1551 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
1552 // CHECK-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
1553 // CHECK-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
1554 // CHECK: nrvo.unused:
1555 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
1556 // CHECK-NEXT: br label [[NRVO_SKIPDTOR]]
1557 // CHECK: nrvo.skipdtor:
1558 // CHECK-NEXT: br label [[RETURN]]
1559 // CHECK: return:
1560 // CHECK-NEXT: ret void
1561 //
1562 // CHECK-EH-03-LABEL: @_Z6test13b(
1563 // CHECK-EH-03-NEXT: entry:
1564 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1565 // CHECK-EH-03-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1566 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
1567 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1568 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1569 // CHECK-EH-03-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1570 // CHECK-EH-03-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1571 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1572 // CHECK-EH-03-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1573 // CHECK-EH-03-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1574 // CHECK-EH-03: if.then:
1575 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1576 // CHECK-EH-03-NEXT: br label [[RETURN:%.*]]
1577 // CHECK-EH-03: if.end:
1578 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
1579 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1580 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
1581 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
1582 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
1583 // CHECK-EH-03: nrvo.unused:
1584 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1585 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
1586 // CHECK-EH-03: nrvo.skipdtor:
1587 // CHECK-EH-03-NEXT: br label [[RETURN]]
1588 // CHECK-EH-03: return:
1589 // CHECK-EH-03-NEXT: ret void
1590 //
1591 // CHECK-EH-11-LABEL: @_Z6test13b(
1592 // CHECK-EH-11-NEXT: entry:
1593 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1594 // CHECK-EH-11-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1595 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
1596 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1597 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1598 // CHECK-EH-11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1599 // CHECK-EH-11-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1600 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1601 // CHECK-EH-11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1602 // CHECK-EH-11-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1603 // CHECK-EH-11: if.then:
1604 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1605 // CHECK-EH-11-NEXT: br label [[RETURN:%.*]]
1606 // CHECK-EH-11: if.end:
1607 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
1608 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1609 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
1610 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
1611 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
1612 // CHECK-EH-11: nrvo.unused:
1613 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
1614 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
1615 // CHECK-EH-11: nrvo.skipdtor:
1616 // CHECK-EH-11-NEXT: br label [[RETURN]]
1617 // CHECK-EH-11: return:
1618 // CHECK-EH-11-NEXT: ret void
1619 //
test13(bool b)1620 X test13(bool b) { // http://wg21.link/p2025r2#ex-7
1621 if (b)
1622 return X();
1623 X x;
1624 return x; // FIXME: NRVO could happen, but doesn't
1625 }
1626
1627 // CHECK-LABEL: @_Z6test14b(
1628 // CHECK-NEXT: entry:
1629 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1630 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1631 // CHECK-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
1632 // CHECK-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1633 // CHECK-NEXT: [[NRVO:%.*]] = alloca i1, align 1
1634 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1635 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1636 // CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1637 // CHECK-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1638 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1639 // CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1640 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1641 // CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1642 // CHECK: if.then:
1643 // CHECK-NEXT: call void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1644 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1645 // CHECK-NEXT: br label [[CLEANUP:%.*]]
1646 // CHECK: if.end:
1647 // CHECK-NEXT: store i1 false, i1* [[NRVO]], align 1
1648 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1649 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
1650 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1651 // CHECK-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
1652 // CHECK-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
1653 // CHECK: nrvo.unused:
1654 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
1655 // CHECK-NEXT: br label [[NRVO_SKIPDTOR]]
1656 // CHECK: nrvo.skipdtor:
1657 // CHECK-NEXT: br label [[CLEANUP]]
1658 // CHECK: cleanup:
1659 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR4]]
1660 // CHECK-NEXT: ret void
1661 //
1662 // CHECK-EH-03-LABEL: @_Z6test14b(
1663 // CHECK-EH-03-NEXT: entry:
1664 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1665 // CHECK-EH-03-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1666 // CHECK-EH-03-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
1667 // CHECK-EH-03-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
1668 // CHECK-EH-03-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1669 // CHECK-EH-03-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1670 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
1671 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1672 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1673 // CHECK-EH-03-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1674 // CHECK-EH-03-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1675 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1676 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1677 // CHECK-EH-03-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1678 // CHECK-EH-03-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1679 // CHECK-EH-03: if.then:
1680 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1681 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1682 // CHECK-EH-03: invoke.cont:
1683 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1684 // CHECK-EH-03-NEXT: br label [[CLEANUP:%.*]]
1685 // CHECK-EH-03: lpad:
1686 // CHECK-EH-03-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 }
1687 // CHECK-EH-03-NEXT: cleanup
1688 // CHECK-EH-03-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
1689 // CHECK-EH-03-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 4
1690 // CHECK-EH-03-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
1691 // CHECK-EH-03-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
1692 // CHECK-EH-03-NEXT: invoke void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1693 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1694 // CHECK-EH-03: if.end:
1695 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
1696 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1697 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[LPAD]]
1698 // CHECK-EH-03: invoke.cont1:
1699 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
1700 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1701 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
1702 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
1703 // CHECK-EH-03: nrvo.unused:
1704 // CHECK-EH-03-NEXT: invoke void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1705 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD]]
1706 // CHECK-EH-03: invoke.cont2:
1707 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
1708 // CHECK-EH-03: nrvo.skipdtor:
1709 // CHECK-EH-03-NEXT: br label [[CLEANUP]]
1710 // CHECK-EH-03: cleanup:
1711 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1712 // CHECK-EH-03-NEXT: ret void
1713 // CHECK-EH-03: invoke.cont3:
1714 // CHECK-EH-03-NEXT: br label [[EH_RESUME:%.*]]
1715 // CHECK-EH-03: eh.resume:
1716 // CHECK-EH-03-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
1717 // CHECK-EH-03-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
1718 // CHECK-EH-03-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
1719 // CHECK-EH-03-NEXT: [[LPAD_VAL4:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
1720 // CHECK-EH-03-NEXT: resume { i8*, i32 } [[LPAD_VAL4]]
1721 // CHECK-EH-03: terminate.lpad:
1722 // CHECK-EH-03-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 }
1723 // CHECK-EH-03-NEXT: catch i8* null
1724 // CHECK-EH-03-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
1725 // CHECK-EH-03-NEXT: call void @__clang_call_terminate(i8* [[TMP6]]) #[[ATTR6]]
1726 // CHECK-EH-03-NEXT: unreachable
1727 //
1728 // CHECK-EH-11-LABEL: @_Z6test14b(
1729 // CHECK-EH-11-NEXT: entry:
1730 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1731 // CHECK-EH-11-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1732 // CHECK-EH-11-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
1733 // CHECK-EH-11-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
1734 // CHECK-EH-11-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1735 // CHECK-EH-11-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1736 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
1737 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1738 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1739 // CHECK-EH-11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1740 // CHECK-EH-11-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1741 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1742 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1743 // CHECK-EH-11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1744 // CHECK-EH-11-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1745 // CHECK-EH-11: if.then:
1746 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1747 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1748 // CHECK-EH-11: invoke.cont:
1749 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1750 // CHECK-EH-11-NEXT: br label [[CLEANUP:%.*]]
1751 // CHECK-EH-11: lpad:
1752 // CHECK-EH-11-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 }
1753 // CHECK-EH-11-NEXT: cleanup
1754 // CHECK-EH-11-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
1755 // CHECK-EH-11-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 4
1756 // CHECK-EH-11-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
1757 // CHECK-EH-11-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
1758 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
1759 // CHECK-EH-11-NEXT: br label [[EH_RESUME:%.*]]
1760 // CHECK-EH-11: if.end:
1761 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
1762 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1763 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[LPAD]]
1764 // CHECK-EH-11: invoke.cont1:
1765 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
1766 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1767 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
1768 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
1769 // CHECK-EH-11: nrvo.unused:
1770 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
1771 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
1772 // CHECK-EH-11: nrvo.skipdtor:
1773 // CHECK-EH-11-NEXT: br label [[CLEANUP]]
1774 // CHECK-EH-11: cleanup:
1775 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
1776 // CHECK-EH-11-NEXT: ret void
1777 // CHECK-EH-11: eh.resume:
1778 // CHECK-EH-11-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
1779 // CHECK-EH-11-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
1780 // CHECK-EH-11-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
1781 // CHECK-EH-11-NEXT: [[LPAD_VAL2:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
1782 // CHECK-EH-11-NEXT: resume { i8*, i32 } [[LPAD_VAL2]]
1783 //
test14(bool b)1784 X test14(bool b) { // http://wg21.link/p2025r2#ex-8
1785 X x;
1786 if (b)
1787 return x;
1788 X y;
1789 return y; // FIXME: NRVO could happen, but doesn't
1790 }
1791
1792 // CHECK-LABEL: @_Z6test15b(
1793 // CHECK-NEXT: entry:
1794 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1795 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1796 // CHECK-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
1797 // CHECK-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1798 // CHECK-NEXT: [[NRVO:%.*]] = alloca i1, align 1
1799 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1800 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1801 // CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1802 // CHECK-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1803 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1804 // CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1805 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1806 // CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1807 // CHECK: if.then:
1808 // CHECK-NEXT: call void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1809 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1810 // CHECK-NEXT: br label [[CLEANUP:%.*]]
1811 // CHECK: if.end:
1812 // CHECK-NEXT: store i1 false, i1* [[NRVO]], align 1
1813 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1814 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
1815 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1816 // CHECK-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
1817 // CHECK-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
1818 // CHECK: nrvo.unused:
1819 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
1820 // CHECK-NEXT: br label [[NRVO_SKIPDTOR]]
1821 // CHECK: nrvo.skipdtor:
1822 // CHECK-NEXT: br label [[CLEANUP]]
1823 // CHECK: cleanup:
1824 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR4]]
1825 // CHECK-NEXT: ret void
1826 //
1827 // CHECK-EH-03-LABEL: @_Z6test15b(
1828 // CHECK-EH-03-NEXT: entry:
1829 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1830 // CHECK-EH-03-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1831 // CHECK-EH-03-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
1832 // CHECK-EH-03-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
1833 // CHECK-EH-03-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1834 // CHECK-EH-03-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1835 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
1836 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1837 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1838 // CHECK-EH-03-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1839 // CHECK-EH-03-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1840 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1841 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1842 // CHECK-EH-03-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1843 // CHECK-EH-03-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1844 // CHECK-EH-03: if.then:
1845 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1846 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1847 // CHECK-EH-03: invoke.cont:
1848 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1849 // CHECK-EH-03-NEXT: br label [[CLEANUP:%.*]]
1850 // CHECK-EH-03: lpad:
1851 // CHECK-EH-03-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 }
1852 // CHECK-EH-03-NEXT: cleanup
1853 // CHECK-EH-03-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
1854 // CHECK-EH-03-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 4
1855 // CHECK-EH-03-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
1856 // CHECK-EH-03-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
1857 // CHECK-EH-03-NEXT: invoke void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1858 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT3:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1859 // CHECK-EH-03: if.end:
1860 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
1861 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1862 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[LPAD]]
1863 // CHECK-EH-03: invoke.cont1:
1864 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
1865 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1866 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
1867 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
1868 // CHECK-EH-03: nrvo.unused:
1869 // CHECK-EH-03-NEXT: invoke void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1870 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD]]
1871 // CHECK-EH-03: invoke.cont2:
1872 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
1873 // CHECK-EH-03: nrvo.skipdtor:
1874 // CHECK-EH-03-NEXT: br label [[CLEANUP]]
1875 // CHECK-EH-03: cleanup:
1876 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1877 // CHECK-EH-03-NEXT: ret void
1878 // CHECK-EH-03: invoke.cont3:
1879 // CHECK-EH-03-NEXT: br label [[EH_RESUME:%.*]]
1880 // CHECK-EH-03: eh.resume:
1881 // CHECK-EH-03-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
1882 // CHECK-EH-03-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
1883 // CHECK-EH-03-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
1884 // CHECK-EH-03-NEXT: [[LPAD_VAL4:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
1885 // CHECK-EH-03-NEXT: resume { i8*, i32 } [[LPAD_VAL4]]
1886 // CHECK-EH-03: terminate.lpad:
1887 // CHECK-EH-03-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 }
1888 // CHECK-EH-03-NEXT: catch i8* null
1889 // CHECK-EH-03-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
1890 // CHECK-EH-03-NEXT: call void @__clang_call_terminate(i8* [[TMP6]]) #[[ATTR6]]
1891 // CHECK-EH-03-NEXT: unreachable
1892 //
1893 // CHECK-EH-11-LABEL: @_Z6test15b(
1894 // CHECK-EH-11-NEXT: entry:
1895 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
1896 // CHECK-EH-11-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
1897 // CHECK-EH-11-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
1898 // CHECK-EH-11-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
1899 // CHECK-EH-11-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1900 // CHECK-EH-11-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
1901 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
1902 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
1903 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
1904 // CHECK-EH-11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
1905 // CHECK-EH-11-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
1906 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1907 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
1908 // CHECK-EH-11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1909 // CHECK-EH-11-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1910 // CHECK-EH-11: if.then:
1911 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1912 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1913 // CHECK-EH-11: invoke.cont:
1914 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1915 // CHECK-EH-11-NEXT: br label [[CLEANUP:%.*]]
1916 // CHECK-EH-11: lpad:
1917 // CHECK-EH-11-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 }
1918 // CHECK-EH-11-NEXT: cleanup
1919 // CHECK-EH-11-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
1920 // CHECK-EH-11-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 4
1921 // CHECK-EH-11-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
1922 // CHECK-EH-11-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
1923 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
1924 // CHECK-EH-11-NEXT: br label [[EH_RESUME:%.*]]
1925 // CHECK-EH-11: if.end:
1926 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
1927 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
1928 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[LPAD]]
1929 // CHECK-EH-11: invoke.cont1:
1930 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
1931 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
1932 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
1933 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
1934 // CHECK-EH-11: nrvo.unused:
1935 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
1936 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
1937 // CHECK-EH-11: nrvo.skipdtor:
1938 // CHECK-EH-11-NEXT: br label [[CLEANUP]]
1939 // CHECK-EH-11: cleanup:
1940 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
1941 // CHECK-EH-11-NEXT: ret void
1942 // CHECK-EH-11: eh.resume:
1943 // CHECK-EH-11-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
1944 // CHECK-EH-11-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
1945 // CHECK-EH-11-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
1946 // CHECK-EH-11-NEXT: [[LPAD_VAL2:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
1947 // CHECK-EH-11-NEXT: resume { i8*, i32 } [[LPAD_VAL2]]
1948 //
test15(bool b)1949 X test15(bool b) { // http://wg21.link/p2025r2#ex-15
1950 X x;
1951 if (b)
1952 return (x);
1953 X y;
1954 return ((y)); // FIXME: NRVO could happen, but doesn't
1955 }
1956
1957 #ifdef CXX11
1958 // CHECK-EH-11-LABEL: @_Z6test16v(
1959 // CHECK-EH-11-NEXT: entry:
1960 // CHECK-EH-11-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
1961 // CHECK-EH-11-NEXT: [[AGG_TMP:%.*]] = alloca [[CLASS_X]], align 1
1962 // CHECK-EH-11-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
1963 // CHECK-EH-11-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
1964 // CHECK-EH-11-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1965 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
1966 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
1967 // CHECK-EH-11-NEXT: store %class.X* [[X]], %class.X** [[TMP0]], align 4
1968 // CHECK-EH-11-NEXT: invoke void @"_ZZ6test16vENK3$_0clEv"(%class.X* sret([[CLASS_X]]) align 1 [[AGG_TMP]], %class.anon* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]])
1969 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1970 // CHECK-EH-11: invoke.cont:
1971 // CHECK-EH-11-NEXT: invoke void @_Z8ConsumeX1X(%class.X* noundef [[AGG_TMP]])
1972 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD1:%.*]]
1973 // CHECK-EH-11: invoke.cont2:
1974 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_TMP]]) #[[ATTR6]]
1975 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
1976 // CHECK-EH-11-NEXT: ret void
1977 // CHECK-EH-11: lpad:
1978 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 }
1979 // CHECK-EH-11-NEXT: cleanup
1980 // CHECK-EH-11-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0
1981 // CHECK-EH-11-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 4
1982 // CHECK-EH-11-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1
1983 // CHECK-EH-11-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4
1984 // CHECK-EH-11-NEXT: br label [[EHCLEANUP:%.*]]
1985 // CHECK-EH-11: lpad1:
1986 // CHECK-EH-11-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 }
1987 // CHECK-EH-11-NEXT: cleanup
1988 // CHECK-EH-11-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0
1989 // CHECK-EH-11-NEXT: store i8* [[TMP5]], i8** [[EXN_SLOT]], align 4
1990 // CHECK-EH-11-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 1
1991 // CHECK-EH-11-NEXT: store i32 [[TMP6]], i32* [[EHSELECTOR_SLOT]], align 4
1992 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_TMP]]) #[[ATTR6]]
1993 // CHECK-EH-11-NEXT: br label [[EHCLEANUP]]
1994 // CHECK-EH-11: ehcleanup:
1995 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
1996 // CHECK-EH-11-NEXT: br label [[EH_RESUME:%.*]]
1997 // CHECK-EH-11: eh.resume:
1998 // CHECK-EH-11-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
1999 // CHECK-EH-11-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
2000 // CHECK-EH-11-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
2001 // CHECK-EH-11-NEXT: [[LPAD_VAL3:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
2002 // CHECK-EH-11-NEXT: resume { i8*, i32 } [[LPAD_VAL3]]
2003 //
test16()2004 void test16() { // http://wg21.link/p2025r2#ex-9
2005 X x;
2006 ConsumeX([&] {
2007 X y(x);
2008 return y; // NRVO happens
2009 }());
2010 }
2011 #endif
2012
2013 // CHECK-LABEL: @_Z6test17i(
2014 // CHECK-NEXT: entry:
2015 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2016 // CHECK-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
2017 // CHECK-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2018 // CHECK-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
2019 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2020 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2021 // CHECK-NEXT: store i32 [[I:%.*]], i32* [[I_ADDR]], align 4
2022 // CHECK-NEXT: br i1 false, label [[IF_THEN:%.*]], label [[IF_END2:%.*]]
2023 // CHECK: if.then:
2024 // CHECK-NEXT: br label [[IMPOSSIBLE:%.*]]
2025 // CHECK: impossible:
2026 // CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I_ADDR]], align 4
2027 // CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 3
2028 // CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN1:%.*]], label [[IF_END:%.*]]
2029 // CHECK: if.then1:
2030 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2031 // CHECK-NEXT: br label [[RETURN:%.*]]
2032 // CHECK: if.end:
2033 // CHECK-NEXT: br label [[IF_END2]]
2034 // CHECK: if.end2:
2035 // CHECK-NEXT: br label [[WHILE_BODY:%.*]]
2036 // CHECK: while.body:
2037 // CHECK-NEXT: store i1 false, i1* [[NRVO]], align 1
2038 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2039 // CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[I_ADDR]], align 4
2040 // CHECK-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP2]], 0
2041 // CHECK-NEXT: br i1 [[CMP3]], label [[IF_THEN4:%.*]], label [[IF_END5:%.*]]
2042 // CHECK: if.then4:
2043 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
2044 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2045 // CHECK-NEXT: br label [[CLEANUP:%.*]]
2046 // CHECK: if.end5:
2047 // CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[I_ADDR]], align 4
2048 // CHECK-NEXT: [[CMP6:%.*]] = icmp eq i32 [[TMP3]], 1
2049 // CHECK-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_END8:%.*]]
2050 // CHECK: if.then7:
2051 // CHECK-NEXT: store i32 4, i32* [[CLEANUP_DEST_SLOT]], align 4
2052 // CHECK-NEXT: br label [[CLEANUP]]
2053 // CHECK: if.end8:
2054 // CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
2055 // CHECK-NEXT: [[CMP9:%.*]] = icmp eq i32 [[TMP4]], 2
2056 // CHECK-NEXT: br i1 [[CMP9]], label [[IF_THEN10:%.*]], label [[IF_END11:%.*]]
2057 // CHECK: if.then10:
2058 // CHECK-NEXT: store i32 3, i32* [[CLEANUP_DEST_SLOT]], align 4
2059 // CHECK-NEXT: br label [[CLEANUP]], !llvm.loop [[LOOP3:![0-9]+]]
2060 // CHECK: if.end11:
2061 // CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[I_ADDR]], align 4
2062 // CHECK-NEXT: [[CMP12:%.*]] = icmp eq i32 [[TMP5]], 3
2063 // CHECK-NEXT: br i1 [[CMP12]], label [[IF_THEN13:%.*]], label [[IF_END14:%.*]]
2064 // CHECK: if.then13:
2065 // CHECK-NEXT: store i32 2, i32* [[CLEANUP_DEST_SLOT]], align 4
2066 // CHECK-NEXT: br label [[CLEANUP]]
2067 // CHECK: if.end14:
2068 // CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I_ADDR]], align 4
2069 // CHECK-NEXT: [[CMP15:%.*]] = icmp eq i32 [[TMP6]], 4
2070 // CHECK-NEXT: br i1 [[CMP15]], label [[IF_THEN16:%.*]], label [[IF_END17:%.*]]
2071 // CHECK: if.then16:
2072 // CHECK-NEXT: call void @exit(i32 noundef 1) #[[ATTR4]]
2073 // CHECK-NEXT: br label [[IF_END17]]
2074 // CHECK: if.end17:
2075 // CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I_ADDR]], align 4
2076 // CHECK-NEXT: [[CMP18:%.*]] = icmp eq i32 [[TMP7]], 5
2077 // CHECK-NEXT: br i1 [[CMP18]], label [[IF_THEN19:%.*]], label [[IF_END20:%.*]]
2078 // CHECK: if.then19:
2079 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
2080 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2081 // CHECK-NEXT: br label [[CLEANUP]]
2082 // CHECK: if.end20:
2083 // CHECK-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT]], align 4
2084 // CHECK-NEXT: br label [[CLEANUP]]
2085 // CHECK: cleanup:
2086 // CHECK-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2087 // CHECK-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2088 // CHECK: nrvo.unused:
2089 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
2090 // CHECK-NEXT: br label [[NRVO_SKIPDTOR]]
2091 // CHECK: nrvo.skipdtor:
2092 // CHECK-NEXT: [[CLEANUP_DEST:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
2093 // CHECK-NEXT: switch i32 [[CLEANUP_DEST]], label [[UNREACHABLE:%.*]] [
2094 // CHECK-NEXT: i32 0, label [[CLEANUP_CONT:%.*]]
2095 // CHECK-NEXT: i32 1, label [[RETURN]]
2096 // CHECK-NEXT: i32 4, label [[WHILE_END:%.*]]
2097 // CHECK-NEXT: i32 3, label [[WHILE_BODY]]
2098 // CHECK-NEXT: i32 2, label [[IMPOSSIBLE]]
2099 // CHECK-NEXT: ]
2100 // CHECK: cleanup.cont:
2101 // CHECK-NEXT: br label [[WHILE_BODY]], !llvm.loop [[LOOP3]]
2102 // CHECK: while.end:
2103 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2104 // CHECK-NEXT: br label [[RETURN]]
2105 // CHECK: return:
2106 // CHECK-NEXT: ret void
2107 // CHECK: unreachable:
2108 // CHECK-NEXT: unreachable
2109 //
2110 // CHECK-EH-03-LABEL: @_Z6test17i(
2111 // CHECK-EH-03-NEXT: entry:
2112 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2113 // CHECK-EH-03-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
2114 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2115 // CHECK-EH-03-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
2116 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2117 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2118 // CHECK-EH-03-NEXT: store i32 [[I:%.*]], i32* [[I_ADDR]], align 4
2119 // CHECK-EH-03-NEXT: br i1 false, label [[IF_THEN:%.*]], label [[IF_END2:%.*]]
2120 // CHECK-EH-03: if.then:
2121 // CHECK-EH-03-NEXT: br label [[IMPOSSIBLE:%.*]]
2122 // CHECK-EH-03: impossible:
2123 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i32, i32* [[I_ADDR]], align 4
2124 // CHECK-EH-03-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 3
2125 // CHECK-EH-03-NEXT: br i1 [[CMP]], label [[IF_THEN1:%.*]], label [[IF_END:%.*]]
2126 // CHECK-EH-03: if.then1:
2127 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2128 // CHECK-EH-03-NEXT: br label [[RETURN:%.*]]
2129 // CHECK-EH-03: if.end:
2130 // CHECK-EH-03-NEXT: br label [[IF_END2]]
2131 // CHECK-EH-03: if.end2:
2132 // CHECK-EH-03-NEXT: br label [[WHILE_BODY:%.*]]
2133 // CHECK-EH-03: while.body:
2134 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
2135 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2136 // CHECK-EH-03-NEXT: [[TMP2:%.*]] = load i32, i32* [[I_ADDR]], align 4
2137 // CHECK-EH-03-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP2]], 0
2138 // CHECK-EH-03-NEXT: br i1 [[CMP3]], label [[IF_THEN4:%.*]], label [[IF_END5:%.*]]
2139 // CHECK-EH-03: if.then4:
2140 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
2141 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2142 // CHECK-EH-03-NEXT: br label [[CLEANUP:%.*]]
2143 // CHECK-EH-03: if.end5:
2144 // CHECK-EH-03-NEXT: [[TMP3:%.*]] = load i32, i32* [[I_ADDR]], align 4
2145 // CHECK-EH-03-NEXT: [[CMP6:%.*]] = icmp eq i32 [[TMP3]], 1
2146 // CHECK-EH-03-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_END8:%.*]]
2147 // CHECK-EH-03: if.then7:
2148 // CHECK-EH-03-NEXT: store i32 4, i32* [[CLEANUP_DEST_SLOT]], align 4
2149 // CHECK-EH-03-NEXT: br label [[CLEANUP]]
2150 // CHECK-EH-03: if.end8:
2151 // CHECK-EH-03-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
2152 // CHECK-EH-03-NEXT: [[CMP9:%.*]] = icmp eq i32 [[TMP4]], 2
2153 // CHECK-EH-03-NEXT: br i1 [[CMP9]], label [[IF_THEN10:%.*]], label [[IF_END11:%.*]]
2154 // CHECK-EH-03: if.then10:
2155 // CHECK-EH-03-NEXT: store i32 3, i32* [[CLEANUP_DEST_SLOT]], align 4
2156 // CHECK-EH-03-NEXT: br label [[CLEANUP]]
2157 // CHECK-EH-03: if.end11:
2158 // CHECK-EH-03-NEXT: [[TMP5:%.*]] = load i32, i32* [[I_ADDR]], align 4
2159 // CHECK-EH-03-NEXT: [[CMP12:%.*]] = icmp eq i32 [[TMP5]], 3
2160 // CHECK-EH-03-NEXT: br i1 [[CMP12]], label [[IF_THEN13:%.*]], label [[IF_END14:%.*]]
2161 // CHECK-EH-03: if.then13:
2162 // CHECK-EH-03-NEXT: store i32 2, i32* [[CLEANUP_DEST_SLOT]], align 4
2163 // CHECK-EH-03-NEXT: br label [[CLEANUP]]
2164 // CHECK-EH-03: if.end14:
2165 // CHECK-EH-03-NEXT: [[TMP6:%.*]] = load i32, i32* [[I_ADDR]], align 4
2166 // CHECK-EH-03-NEXT: [[CMP15:%.*]] = icmp eq i32 [[TMP6]], 4
2167 // CHECK-EH-03-NEXT: br i1 [[CMP15]], label [[IF_THEN16:%.*]], label [[IF_END17:%.*]]
2168 // CHECK-EH-03: if.then16:
2169 // CHECK-EH-03-NEXT: call void @exit(i32 noundef 1) #[[ATTR7]]
2170 // CHECK-EH-03-NEXT: br label [[IF_END17]]
2171 // CHECK-EH-03: if.end17:
2172 // CHECK-EH-03-NEXT: [[TMP7:%.*]] = load i32, i32* [[I_ADDR]], align 4
2173 // CHECK-EH-03-NEXT: [[CMP18:%.*]] = icmp eq i32 [[TMP7]], 5
2174 // CHECK-EH-03-NEXT: br i1 [[CMP18]], label [[IF_THEN19:%.*]], label [[IF_END20:%.*]]
2175 // CHECK-EH-03: if.then19:
2176 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
2177 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2178 // CHECK-EH-03-NEXT: br label [[CLEANUP]]
2179 // CHECK-EH-03: if.end20:
2180 // CHECK-EH-03-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT]], align 4
2181 // CHECK-EH-03-NEXT: br label [[CLEANUP]]
2182 // CHECK-EH-03: cleanup:
2183 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2184 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2185 // CHECK-EH-03: nrvo.unused:
2186 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2187 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
2188 // CHECK-EH-03: nrvo.skipdtor:
2189 // CHECK-EH-03-NEXT: [[CLEANUP_DEST:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
2190 // CHECK-EH-03-NEXT: switch i32 [[CLEANUP_DEST]], label [[UNREACHABLE:%.*]] [
2191 // CHECK-EH-03-NEXT: i32 0, label [[CLEANUP_CONT:%.*]]
2192 // CHECK-EH-03-NEXT: i32 1, label [[RETURN]]
2193 // CHECK-EH-03-NEXT: i32 4, label [[WHILE_END:%.*]]
2194 // CHECK-EH-03-NEXT: i32 3, label [[WHILE_BODY]]
2195 // CHECK-EH-03-NEXT: i32 2, label [[IMPOSSIBLE]]
2196 // CHECK-EH-03-NEXT: ]
2197 // CHECK-EH-03: cleanup.cont:
2198 // CHECK-EH-03-NEXT: br label [[WHILE_BODY]]
2199 // CHECK-EH-03: while.end:
2200 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2201 // CHECK-EH-03-NEXT: br label [[RETURN]]
2202 // CHECK-EH-03: return:
2203 // CHECK-EH-03-NEXT: ret void
2204 // CHECK-EH-03: unreachable:
2205 // CHECK-EH-03-NEXT: unreachable
2206 //
2207 // CHECK-EH-11-LABEL: @_Z6test17i(
2208 // CHECK-EH-11-NEXT: entry:
2209 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2210 // CHECK-EH-11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
2211 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2212 // CHECK-EH-11-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
2213 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2214 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2215 // CHECK-EH-11-NEXT: store i32 [[I:%.*]], i32* [[I_ADDR]], align 4
2216 // CHECK-EH-11-NEXT: br i1 false, label [[IF_THEN:%.*]], label [[IF_END2:%.*]]
2217 // CHECK-EH-11: if.then:
2218 // CHECK-EH-11-NEXT: br label [[IMPOSSIBLE:%.*]]
2219 // CHECK-EH-11: impossible:
2220 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i32, i32* [[I_ADDR]], align 4
2221 // CHECK-EH-11-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 3
2222 // CHECK-EH-11-NEXT: br i1 [[CMP]], label [[IF_THEN1:%.*]], label [[IF_END:%.*]]
2223 // CHECK-EH-11: if.then1:
2224 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2225 // CHECK-EH-11-NEXT: br label [[RETURN:%.*]]
2226 // CHECK-EH-11: if.end:
2227 // CHECK-EH-11-NEXT: br label [[IF_END2]]
2228 // CHECK-EH-11: if.end2:
2229 // CHECK-EH-11-NEXT: br label [[WHILE_BODY:%.*]]
2230 // CHECK-EH-11: while.body:
2231 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
2232 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2233 // CHECK-EH-11-NEXT: [[TMP2:%.*]] = load i32, i32* [[I_ADDR]], align 4
2234 // CHECK-EH-11-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP2]], 0
2235 // CHECK-EH-11-NEXT: br i1 [[CMP3]], label [[IF_THEN4:%.*]], label [[IF_END5:%.*]]
2236 // CHECK-EH-11: if.then4:
2237 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
2238 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2239 // CHECK-EH-11-NEXT: br label [[CLEANUP:%.*]]
2240 // CHECK-EH-11: if.end5:
2241 // CHECK-EH-11-NEXT: [[TMP3:%.*]] = load i32, i32* [[I_ADDR]], align 4
2242 // CHECK-EH-11-NEXT: [[CMP6:%.*]] = icmp eq i32 [[TMP3]], 1
2243 // CHECK-EH-11-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_END8:%.*]]
2244 // CHECK-EH-11: if.then7:
2245 // CHECK-EH-11-NEXT: store i32 4, i32* [[CLEANUP_DEST_SLOT]], align 4
2246 // CHECK-EH-11-NEXT: br label [[CLEANUP]]
2247 // CHECK-EH-11: if.end8:
2248 // CHECK-EH-11-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
2249 // CHECK-EH-11-NEXT: [[CMP9:%.*]] = icmp eq i32 [[TMP4]], 2
2250 // CHECK-EH-11-NEXT: br i1 [[CMP9]], label [[IF_THEN10:%.*]], label [[IF_END11:%.*]]
2251 // CHECK-EH-11: if.then10:
2252 // CHECK-EH-11-NEXT: store i32 3, i32* [[CLEANUP_DEST_SLOT]], align 4
2253 // CHECK-EH-11-NEXT: br label [[CLEANUP]], !llvm.loop [[LOOP3:![0-9]+]]
2254 // CHECK-EH-11: if.end11:
2255 // CHECK-EH-11-NEXT: [[TMP5:%.*]] = load i32, i32* [[I_ADDR]], align 4
2256 // CHECK-EH-11-NEXT: [[CMP12:%.*]] = icmp eq i32 [[TMP5]], 3
2257 // CHECK-EH-11-NEXT: br i1 [[CMP12]], label [[IF_THEN13:%.*]], label [[IF_END14:%.*]]
2258 // CHECK-EH-11: if.then13:
2259 // CHECK-EH-11-NEXT: store i32 2, i32* [[CLEANUP_DEST_SLOT]], align 4
2260 // CHECK-EH-11-NEXT: br label [[CLEANUP]]
2261 // CHECK-EH-11: if.end14:
2262 // CHECK-EH-11-NEXT: [[TMP6:%.*]] = load i32, i32* [[I_ADDR]], align 4
2263 // CHECK-EH-11-NEXT: [[CMP15:%.*]] = icmp eq i32 [[TMP6]], 4
2264 // CHECK-EH-11-NEXT: br i1 [[CMP15]], label [[IF_THEN16:%.*]], label [[IF_END17:%.*]]
2265 // CHECK-EH-11: if.then16:
2266 // CHECK-EH-11-NEXT: call void @exit(i32 noundef 1) #[[ATTR6]]
2267 // CHECK-EH-11-NEXT: br label [[IF_END17]]
2268 // CHECK-EH-11: if.end17:
2269 // CHECK-EH-11-NEXT: [[TMP7:%.*]] = load i32, i32* [[I_ADDR]], align 4
2270 // CHECK-EH-11-NEXT: [[CMP18:%.*]] = icmp eq i32 [[TMP7]], 5
2271 // CHECK-EH-11-NEXT: br i1 [[CMP18]], label [[IF_THEN19:%.*]], label [[IF_END20:%.*]]
2272 // CHECK-EH-11: if.then19:
2273 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
2274 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2275 // CHECK-EH-11-NEXT: br label [[CLEANUP]]
2276 // CHECK-EH-11: if.end20:
2277 // CHECK-EH-11-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT]], align 4
2278 // CHECK-EH-11-NEXT: br label [[CLEANUP]]
2279 // CHECK-EH-11: cleanup:
2280 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2281 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2282 // CHECK-EH-11: nrvo.unused:
2283 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
2284 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
2285 // CHECK-EH-11: nrvo.skipdtor:
2286 // CHECK-EH-11-NEXT: [[CLEANUP_DEST:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
2287 // CHECK-EH-11-NEXT: switch i32 [[CLEANUP_DEST]], label [[UNREACHABLE:%.*]] [
2288 // CHECK-EH-11-NEXT: i32 0, label [[CLEANUP_CONT:%.*]]
2289 // CHECK-EH-11-NEXT: i32 1, label [[RETURN]]
2290 // CHECK-EH-11-NEXT: i32 4, label [[WHILE_END:%.*]]
2291 // CHECK-EH-11-NEXT: i32 3, label [[WHILE_BODY]]
2292 // CHECK-EH-11-NEXT: i32 2, label [[IMPOSSIBLE]]
2293 // CHECK-EH-11-NEXT: ]
2294 // CHECK-EH-11: cleanup.cont:
2295 // CHECK-EH-11-NEXT: br label [[WHILE_BODY]], !llvm.loop [[LOOP3]]
2296 // CHECK-EH-11: while.end:
2297 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2298 // CHECK-EH-11-NEXT: br label [[RETURN]]
2299 // CHECK-EH-11: return:
2300 // CHECK-EH-11-NEXT: ret void
2301 // CHECK-EH-11: unreachable:
2302 // CHECK-EH-11-NEXT: unreachable
2303 //
test17(int i)2304 X test17(int i) { // http://wg21.link/p2025r2#ex-10
2305 if (false) {
2306 impossible:
2307 if (i == 3)
2308 return X();
2309 }
2310
2311 while (true) {
2312 X x;
2313 if (i == 0)
2314 return x; // NRVO happens
2315 if (i == 1)
2316 break;
2317 if (i == 2)
2318 continue;
2319 if (i == 3)
2320 goto impossible;
2321 if (i == 4)
2322 exit(1);
2323 if (i == 5)
2324 return x; // NRVO happens
2325 }
2326 return X();
2327 }
2328
2329 // CHECK-LABEL: @_Z6test18i(
2330 // CHECK-NEXT: entry:
2331 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2332 // CHECK-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
2333 // CHECK-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2334 // CHECK-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
2335 // CHECK-NEXT: [[NRVO1:%.*]] = alloca i1, align 1
2336 // CHECK-NEXT: [[NRVO11:%.*]] = alloca i1, align 1
2337 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2338 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2339 // CHECK-NEXT: store i32 [[I:%.*]], i32* [[I_ADDR]], align 4
2340 // CHECK-NEXT: store i1 false, i1* [[NRVO]], align 1
2341 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2342 // CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I_ADDR]], align 4
2343 // CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 0
2344 // CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
2345 // CHECK: if.then:
2346 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
2347 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2348 // CHECK-NEXT: br label [[CLEANUP:%.*]]
2349 // CHECK: if.end:
2350 // CHECK-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT]], align 4
2351 // CHECK-NEXT: br label [[CLEANUP]]
2352 // CHECK: cleanup:
2353 // CHECK-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2354 // CHECK-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2355 // CHECK: nrvo.unused:
2356 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
2357 // CHECK-NEXT: br label [[NRVO_SKIPDTOR]]
2358 // CHECK: nrvo.skipdtor:
2359 // CHECK-NEXT: [[CLEANUP_DEST:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
2360 // CHECK-NEXT: switch i32 [[CLEANUP_DEST]], label [[UNREACHABLE:%.*]] [
2361 // CHECK-NEXT: i32 0, label [[CLEANUP_CONT:%.*]]
2362 // CHECK-NEXT: i32 1, label [[RETURN:%.*]]
2363 // CHECK-NEXT: ]
2364 // CHECK: cleanup.cont:
2365 // CHECK-NEXT: store i1 false, i1* [[NRVO1]], align 1
2366 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2367 // CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[I_ADDR]], align 4
2368 // CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[TMP2]], 1
2369 // CHECK-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END4:%.*]]
2370 // CHECK: if.then3:
2371 // CHECK-NEXT: store i1 true, i1* [[NRVO1]], align 1
2372 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2373 // CHECK-NEXT: br label [[CLEANUP5:%.*]]
2374 // CHECK: if.end4:
2375 // CHECK-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT]], align 4
2376 // CHECK-NEXT: br label [[CLEANUP5]]
2377 // CHECK: cleanup5:
2378 // CHECK-NEXT: [[NRVO_VAL6:%.*]] = load i1, i1* [[NRVO1]], align 1
2379 // CHECK-NEXT: br i1 [[NRVO_VAL6]], label [[NRVO_SKIPDTOR8:%.*]], label [[NRVO_UNUSED7:%.*]]
2380 // CHECK: nrvo.unused7:
2381 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
2382 // CHECK-NEXT: br label [[NRVO_SKIPDTOR8]]
2383 // CHECK: nrvo.skipdtor8:
2384 // CHECK-NEXT: [[CLEANUP_DEST9:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
2385 // CHECK-NEXT: switch i32 [[CLEANUP_DEST9]], label [[UNREACHABLE]] [
2386 // CHECK-NEXT: i32 0, label [[CLEANUP_CONT10:%.*]]
2387 // CHECK-NEXT: i32 1, label [[RETURN]]
2388 // CHECK-NEXT: ]
2389 // CHECK: cleanup.cont10:
2390 // CHECK-NEXT: store i1 false, i1* [[NRVO11]], align 1
2391 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2392 // CHECK-NEXT: store i1 true, i1* [[NRVO11]], align 1
2393 // CHECK-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2394 // CHECK-NEXT: [[NRVO_VAL13:%.*]] = load i1, i1* [[NRVO11]], align 1
2395 // CHECK-NEXT: br i1 [[NRVO_VAL13]], label [[NRVO_SKIPDTOR15:%.*]], label [[NRVO_UNUSED14:%.*]]
2396 // CHECK: nrvo.unused14:
2397 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
2398 // CHECK-NEXT: br label [[NRVO_SKIPDTOR15]]
2399 // CHECK: nrvo.skipdtor15:
2400 // CHECK-NEXT: br label [[RETURN]]
2401 // CHECK: return:
2402 // CHECK-NEXT: ret void
2403 // CHECK: unreachable:
2404 // CHECK-NEXT: unreachable
2405 //
2406 // CHECK-EH-03-LABEL: @_Z6test18i(
2407 // CHECK-EH-03-NEXT: entry:
2408 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2409 // CHECK-EH-03-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
2410 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2411 // CHECK-EH-03-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
2412 // CHECK-EH-03-NEXT: [[NRVO1:%.*]] = alloca i1, align 1
2413 // CHECK-EH-03-NEXT: [[NRVO11:%.*]] = alloca i1, align 1
2414 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2415 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2416 // CHECK-EH-03-NEXT: store i32 [[I:%.*]], i32* [[I_ADDR]], align 4
2417 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
2418 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2419 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i32, i32* [[I_ADDR]], align 4
2420 // CHECK-EH-03-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 0
2421 // CHECK-EH-03-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
2422 // CHECK-EH-03: if.then:
2423 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
2424 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2425 // CHECK-EH-03-NEXT: br label [[CLEANUP:%.*]]
2426 // CHECK-EH-03: if.end:
2427 // CHECK-EH-03-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT]], align 4
2428 // CHECK-EH-03-NEXT: br label [[CLEANUP]]
2429 // CHECK-EH-03: cleanup:
2430 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2431 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2432 // CHECK-EH-03: nrvo.unused:
2433 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2434 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
2435 // CHECK-EH-03: nrvo.skipdtor:
2436 // CHECK-EH-03-NEXT: [[CLEANUP_DEST:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
2437 // CHECK-EH-03-NEXT: switch i32 [[CLEANUP_DEST]], label [[UNREACHABLE:%.*]] [
2438 // CHECK-EH-03-NEXT: i32 0, label [[CLEANUP_CONT:%.*]]
2439 // CHECK-EH-03-NEXT: i32 1, label [[RETURN:%.*]]
2440 // CHECK-EH-03-NEXT: ]
2441 // CHECK-EH-03: cleanup.cont:
2442 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO1]], align 1
2443 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2444 // CHECK-EH-03-NEXT: [[TMP2:%.*]] = load i32, i32* [[I_ADDR]], align 4
2445 // CHECK-EH-03-NEXT: [[CMP2:%.*]] = icmp eq i32 [[TMP2]], 1
2446 // CHECK-EH-03-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END4:%.*]]
2447 // CHECK-EH-03: if.then3:
2448 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO1]], align 1
2449 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2450 // CHECK-EH-03-NEXT: br label [[CLEANUP5:%.*]]
2451 // CHECK-EH-03: if.end4:
2452 // CHECK-EH-03-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT]], align 4
2453 // CHECK-EH-03-NEXT: br label [[CLEANUP5]]
2454 // CHECK-EH-03: cleanup5:
2455 // CHECK-EH-03-NEXT: [[NRVO_VAL6:%.*]] = load i1, i1* [[NRVO1]], align 1
2456 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL6]], label [[NRVO_SKIPDTOR8:%.*]], label [[NRVO_UNUSED7:%.*]]
2457 // CHECK-EH-03: nrvo.unused7:
2458 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2459 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR8]]
2460 // CHECK-EH-03: nrvo.skipdtor8:
2461 // CHECK-EH-03-NEXT: [[CLEANUP_DEST9:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
2462 // CHECK-EH-03-NEXT: switch i32 [[CLEANUP_DEST9]], label [[UNREACHABLE]] [
2463 // CHECK-EH-03-NEXT: i32 0, label [[CLEANUP_CONT10:%.*]]
2464 // CHECK-EH-03-NEXT: i32 1, label [[RETURN]]
2465 // CHECK-EH-03-NEXT: ]
2466 // CHECK-EH-03: cleanup.cont10:
2467 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO11]], align 1
2468 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2469 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO11]], align 1
2470 // CHECK-EH-03-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2471 // CHECK-EH-03-NEXT: [[NRVO_VAL13:%.*]] = load i1, i1* [[NRVO11]], align 1
2472 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL13]], label [[NRVO_SKIPDTOR15:%.*]], label [[NRVO_UNUSED14:%.*]]
2473 // CHECK-EH-03: nrvo.unused14:
2474 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2475 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR15]]
2476 // CHECK-EH-03: nrvo.skipdtor15:
2477 // CHECK-EH-03-NEXT: br label [[RETURN]]
2478 // CHECK-EH-03: return:
2479 // CHECK-EH-03-NEXT: ret void
2480 // CHECK-EH-03: unreachable:
2481 // CHECK-EH-03-NEXT: unreachable
2482 //
2483 // CHECK-EH-11-LABEL: @_Z6test18i(
2484 // CHECK-EH-11-NEXT: entry:
2485 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2486 // CHECK-EH-11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
2487 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2488 // CHECK-EH-11-NEXT: [[CLEANUP_DEST_SLOT:%.*]] = alloca i32, align 4
2489 // CHECK-EH-11-NEXT: [[NRVO1:%.*]] = alloca i1, align 1
2490 // CHECK-EH-11-NEXT: [[NRVO11:%.*]] = alloca i1, align 1
2491 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2492 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2493 // CHECK-EH-11-NEXT: store i32 [[I:%.*]], i32* [[I_ADDR]], align 4
2494 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
2495 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2496 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i32, i32* [[I_ADDR]], align 4
2497 // CHECK-EH-11-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 0
2498 // CHECK-EH-11-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
2499 // CHECK-EH-11: if.then:
2500 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
2501 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2502 // CHECK-EH-11-NEXT: br label [[CLEANUP:%.*]]
2503 // CHECK-EH-11: if.end:
2504 // CHECK-EH-11-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT]], align 4
2505 // CHECK-EH-11-NEXT: br label [[CLEANUP]]
2506 // CHECK-EH-11: cleanup:
2507 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2508 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2509 // CHECK-EH-11: nrvo.unused:
2510 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
2511 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
2512 // CHECK-EH-11: nrvo.skipdtor:
2513 // CHECK-EH-11-NEXT: [[CLEANUP_DEST:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
2514 // CHECK-EH-11-NEXT: switch i32 [[CLEANUP_DEST]], label [[UNREACHABLE:%.*]] [
2515 // CHECK-EH-11-NEXT: i32 0, label [[CLEANUP_CONT:%.*]]
2516 // CHECK-EH-11-NEXT: i32 1, label [[RETURN:%.*]]
2517 // CHECK-EH-11-NEXT: ]
2518 // CHECK-EH-11: cleanup.cont:
2519 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO1]], align 1
2520 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2521 // CHECK-EH-11-NEXT: [[TMP2:%.*]] = load i32, i32* [[I_ADDR]], align 4
2522 // CHECK-EH-11-NEXT: [[CMP2:%.*]] = icmp eq i32 [[TMP2]], 1
2523 // CHECK-EH-11-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END4:%.*]]
2524 // CHECK-EH-11: if.then3:
2525 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO1]], align 1
2526 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2527 // CHECK-EH-11-NEXT: br label [[CLEANUP5:%.*]]
2528 // CHECK-EH-11: if.end4:
2529 // CHECK-EH-11-NEXT: store i32 0, i32* [[CLEANUP_DEST_SLOT]], align 4
2530 // CHECK-EH-11-NEXT: br label [[CLEANUP5]]
2531 // CHECK-EH-11: cleanup5:
2532 // CHECK-EH-11-NEXT: [[NRVO_VAL6:%.*]] = load i1, i1* [[NRVO1]], align 1
2533 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL6]], label [[NRVO_SKIPDTOR8:%.*]], label [[NRVO_UNUSED7:%.*]]
2534 // CHECK-EH-11: nrvo.unused7:
2535 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
2536 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR8]]
2537 // CHECK-EH-11: nrvo.skipdtor8:
2538 // CHECK-EH-11-NEXT: [[CLEANUP_DEST9:%.*]] = load i32, i32* [[CLEANUP_DEST_SLOT]], align 4
2539 // CHECK-EH-11-NEXT: switch i32 [[CLEANUP_DEST9]], label [[UNREACHABLE]] [
2540 // CHECK-EH-11-NEXT: i32 0, label [[CLEANUP_CONT10:%.*]]
2541 // CHECK-EH-11-NEXT: i32 1, label [[RETURN]]
2542 // CHECK-EH-11-NEXT: ]
2543 // CHECK-EH-11: cleanup.cont10:
2544 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO11]], align 1
2545 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2546 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO11]], align 1
2547 // CHECK-EH-11-NEXT: store i32 1, i32* [[CLEANUP_DEST_SLOT]], align 4
2548 // CHECK-EH-11-NEXT: [[NRVO_VAL13:%.*]] = load i1, i1* [[NRVO11]], align 1
2549 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL13]], label [[NRVO_SKIPDTOR15:%.*]], label [[NRVO_UNUSED14:%.*]]
2550 // CHECK-EH-11: nrvo.unused14:
2551 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
2552 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR15]]
2553 // CHECK-EH-11: nrvo.skipdtor15:
2554 // CHECK-EH-11-NEXT: br label [[RETURN]]
2555 // CHECK-EH-11: return:
2556 // CHECK-EH-11-NEXT: ret void
2557 // CHECK-EH-11: unreachable:
2558 // CHECK-EH-11-NEXT: unreachable
2559 //
test18(int i)2560 X test18(int i) { // http://wg21.link/p2025r2#ex-11
2561 {
2562 {
2563 X x;
2564 if (i == 0)
2565 return x; // NRVO happens
2566 }
2567 X y;
2568 if (i == 1)
2569 return y; // FIXME: NRVO could happen, but doesn't
2570 }
2571 X z;
2572 return z; // FIXME: NRVO could happen, but doesn't
2573 }
2574
2575 #ifdef CXX11
2576 // CHECK-EH-11-LABEL: @_Z6test19v(
2577 // CHECK-EH-11-NEXT: entry:
2578 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2579 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2580 // CHECK-EH-11-NEXT: [[L:%.*]] = alloca [[CLASS_X:%.*]], align 1
2581 // CHECK-EH-11-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
2582 // CHECK-EH-11-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
2583 // CHECK-EH-11-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
2584 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2585 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2586 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
2587 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2588 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
2589 // CHECK-EH-11-NEXT: store %class.X* [[AGG_RESULT]], %class.X** [[TMP1]], align 4
2590 // CHECK-EH-11-NEXT: invoke void @"_ZZ6test19vENK3$_1clEv"(%class.X* sret([[CLASS_X]]) align 1 [[L]], %class.anon.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]])
2591 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
2592 // CHECK-EH-11: invoke.cont:
2593 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
2594 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[L]]) #[[ATTR6]]
2595 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2596 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2597 // CHECK-EH-11: lpad:
2598 // CHECK-EH-11-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 }
2599 // CHECK-EH-11-NEXT: cleanup
2600 // CHECK-EH-11-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
2601 // CHECK-EH-11-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 4
2602 // CHECK-EH-11-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
2603 // CHECK-EH-11-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
2604 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
2605 // CHECK-EH-11-NEXT: br label [[EH_RESUME:%.*]]
2606 // CHECK-EH-11: nrvo.unused:
2607 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
2608 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
2609 // CHECK-EH-11: nrvo.skipdtor:
2610 // CHECK-EH-11-NEXT: ret void
2611 // CHECK-EH-11: eh.resume:
2612 // CHECK-EH-11-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
2613 // CHECK-EH-11-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
2614 // CHECK-EH-11-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
2615 // CHECK-EH-11-NEXT: [[LPAD_VAL1:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
2616 // CHECK-EH-11-NEXT: resume { i8*, i32 } [[LPAD_VAL1]]
2617 //
test19()2618 X test19() { // http://wg21.link/p2025r2#ex-12
2619 X x;
2620 struct S {
2621 X f() { return X(); }
2622 };
2623 auto L = [&x]() { return X(); }();
2624 if constexpr (false) {
2625 return X();
2626 }
2627 return x; // NRVO happens
2628 }
2629
2630 template <bool B>
test20()2631 X test20() { // http://wg21.link/p2025r2#ex-18
2632 X x;
2633 if constexpr (B) {
2634 if (false)
2635 return X();
2636 }
2637 return x; // FIXME: NRVO could happen when B == false, but doesn't
2638 }
2639
2640 // CHECK-EH-11-LABEL: @_Z17test20instantiatev(
2641 // CHECK-EH-11-NEXT: entry:
2642 // CHECK-EH-11-NEXT: [[AGG_TMP_ENSURED:%.*]] = alloca [[CLASS_X:%.*]], align 1
2643 // CHECK-EH-11-NEXT: [[AGG_TMP_ENSURED1:%.*]] = alloca [[CLASS_X]], align 1
2644 // CHECK-EH-11-NEXT: call void @_Z6test20ILb1EE1Xv(%class.X* sret([[CLASS_X]]) align 1 [[AGG_TMP_ENSURED]])
2645 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_TMP_ENSURED]]) #[[ATTR6]]
2646 // CHECK-EH-11-NEXT: call void @_Z6test20ILb0EE1Xv(%class.X* sret([[CLASS_X]]) align 1 [[AGG_TMP_ENSURED1]])
2647 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_TMP_ENSURED1]]) #[[ATTR6]]
2648 // CHECK-EH-11-NEXT: ret void
2649 //
test20instantiate()2650 void test20instantiate() {
2651 test20<true>();
2652 test20<false>();
2653 }
2654 #endif
2655
2656 // CHECK-LABEL: @_Z6test21v(
2657 // CHECK-NEXT: entry:
2658 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2659 // CHECK-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2660 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2661 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2662 // CHECK-NEXT: store i1 false, i1* [[NRVO]], align 1
2663 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2664 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
2665 // CHECK-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2666 // CHECK-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2667 // CHECK: nrvo.unused:
2668 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
2669 // CHECK-NEXT: br label [[NRVO_SKIPDTOR]]
2670 // CHECK: nrvo.skipdtor:
2671 // CHECK-NEXT: ret void
2672 //
2673 // CHECK-EH-03-LABEL: @_Z6test21v(
2674 // CHECK-EH-03-NEXT: entry:
2675 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2676 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2677 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2678 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2679 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
2680 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2681 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
2682 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2683 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2684 // CHECK-EH-03: nrvo.unused:
2685 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2686 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
2687 // CHECK-EH-03: nrvo.skipdtor:
2688 // CHECK-EH-03-NEXT: ret void
2689 //
2690 // CHECK-EH-11-LABEL: @_Z6test21v(
2691 // CHECK-EH-11-NEXT: entry:
2692 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2693 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2694 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2695 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2696 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
2697 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2698 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
2699 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2700 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2701 // CHECK-EH-11: nrvo.unused:
2702 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
2703 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
2704 // CHECK-EH-11: nrvo.skipdtor:
2705 // CHECK-EH-11-NEXT: ret void
2706 //
test21()2707 const volatile X test21() { // http://wg21.link/p2025r2#ex-19
2708 X x;
2709 return x; // NRVO happens
2710 }
2711
2712 // CHECK-LABEL: @_Z6test22v(
2713 // CHECK-NEXT: entry:
2714 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2715 // CHECK-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
2716 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2717 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2718 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
2719 // CHECK-NEXT: call void @_ZN1XC1ERVKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
2720 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR4]]
2721 // CHECK-NEXT: ret void
2722 //
2723 // CHECK-EH-03-LABEL: @_Z6test22v(
2724 // CHECK-EH-03-NEXT: entry:
2725 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2726 // CHECK-EH-03-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
2727 // CHECK-EH-03-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
2728 // CHECK-EH-03-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
2729 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2730 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2731 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
2732 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERVKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
2733 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
2734 // CHECK-EH-03: invoke.cont:
2735 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
2736 // CHECK-EH-03-NEXT: ret void
2737 // CHECK-EH-03: lpad:
2738 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 }
2739 // CHECK-EH-03-NEXT: cleanup
2740 // CHECK-EH-03-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0
2741 // CHECK-EH-03-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 4
2742 // CHECK-EH-03-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1
2743 // CHECK-EH-03-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4
2744 // CHECK-EH-03-NEXT: invoke void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
2745 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2746 // CHECK-EH-03: invoke.cont1:
2747 // CHECK-EH-03-NEXT: br label [[EH_RESUME:%.*]]
2748 // CHECK-EH-03: eh.resume:
2749 // CHECK-EH-03-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
2750 // CHECK-EH-03-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
2751 // CHECK-EH-03-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
2752 // CHECK-EH-03-NEXT: [[LPAD_VAL2:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
2753 // CHECK-EH-03-NEXT: resume { i8*, i32 } [[LPAD_VAL2]]
2754 // CHECK-EH-03: terminate.lpad:
2755 // CHECK-EH-03-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 }
2756 // CHECK-EH-03-NEXT: catch i8* null
2757 // CHECK-EH-03-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0
2758 // CHECK-EH-03-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR6]]
2759 // CHECK-EH-03-NEXT: unreachable
2760 //
2761 // CHECK-EH-11-LABEL: @_Z6test22v(
2762 // CHECK-EH-11-NEXT: entry:
2763 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2764 // CHECK-EH-11-NEXT: [[X:%.*]] = alloca [[CLASS_X:%.*]], align 1
2765 // CHECK-EH-11-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
2766 // CHECK-EH-11-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
2767 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2768 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2769 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
2770 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERVKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[X]])
2771 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
2772 // CHECK-EH-11: invoke.cont:
2773 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
2774 // CHECK-EH-11-NEXT: ret void
2775 // CHECK-EH-11: lpad:
2776 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = landingpad { i8*, i32 }
2777 // CHECK-EH-11-NEXT: cleanup
2778 // CHECK-EH-11-NEXT: [[TMP2:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 0
2779 // CHECK-EH-11-NEXT: store i8* [[TMP2]], i8** [[EXN_SLOT]], align 4
2780 // CHECK-EH-11-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP1]], 1
2781 // CHECK-EH-11-NEXT: store i32 [[TMP3]], i32* [[EHSELECTOR_SLOT]], align 4
2782 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[X]]) #[[ATTR6]]
2783 // CHECK-EH-11-NEXT: br label [[EH_RESUME:%.*]]
2784 // CHECK-EH-11: eh.resume:
2785 // CHECK-EH-11-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
2786 // CHECK-EH-11-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
2787 // CHECK-EH-11-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
2788 // CHECK-EH-11-NEXT: [[LPAD_VAL1:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
2789 // CHECK-EH-11-NEXT: resume { i8*, i32 } [[LPAD_VAL1]]
2790 //
test22()2791 X test22() { // http://wg21.link/p2025r2#ex-19
2792 volatile X x;
2793 return x; // NRVO is impossible
2794 }
2795
2796 // CHECK-LABEL: @_Z6test23b(
2797 // CHECK-NEXT: entry:
2798 // CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2799 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
2800 // CHECK-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2801 // CHECK-NEXT: [[Y:%.*]] = alloca [[CLASS_X:%.*]], align 1
2802 // CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2803 // CHECK-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2804 // CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
2805 // CHECK-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
2806 // CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
2807 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
2808 // CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
2809 // CHECK: if.then:
2810 // CHECK-NEXT: store i1 false, i1* [[NRVO]], align 1
2811 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2812 // CHECK-NEXT: store i1 true, i1* [[NRVO]], align 1
2813 // CHECK-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2814 // CHECK-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2815 // CHECK: nrvo.unused:
2816 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR4]]
2817 // CHECK-NEXT: br label [[NRVO_SKIPDTOR]]
2818 // CHECK: nrvo.skipdtor:
2819 // CHECK-NEXT: br label [[RETURN:%.*]]
2820 // CHECK: if.end:
2821 // CHECK-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
2822 // CHECK-NEXT: call void @_ZN1XC1ERVKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
2823 // CHECK-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]]) #[[ATTR4]]
2824 // CHECK-NEXT: br label [[RETURN]]
2825 // CHECK: return:
2826 // CHECK-NEXT: ret void
2827 //
2828 // CHECK-EH-03-LABEL: @_Z6test23b(
2829 // CHECK-EH-03-NEXT: entry:
2830 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2831 // CHECK-EH-03-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
2832 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2833 // CHECK-EH-03-NEXT: [[Y:%.*]] = alloca [[CLASS_X:%.*]], align 1
2834 // CHECK-EH-03-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
2835 // CHECK-EH-03-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
2836 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2837 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2838 // CHECK-EH-03-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
2839 // CHECK-EH-03-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
2840 // CHECK-EH-03-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
2841 // CHECK-EH-03-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
2842 // CHECK-EH-03-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
2843 // CHECK-EH-03: if.then:
2844 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
2845 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2846 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
2847 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2848 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2849 // CHECK-EH-03: nrvo.unused:
2850 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2851 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
2852 // CHECK-EH-03: nrvo.skipdtor:
2853 // CHECK-EH-03-NEXT: br label [[RETURN:%.*]]
2854 // CHECK-EH-03: if.end:
2855 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
2856 // CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERVKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
2857 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
2858 // CHECK-EH-03: invoke.cont:
2859 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
2860 // CHECK-EH-03-NEXT: br label [[RETURN]]
2861 // CHECK-EH-03: lpad:
2862 // CHECK-EH-03-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 }
2863 // CHECK-EH-03-NEXT: cleanup
2864 // CHECK-EH-03-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
2865 // CHECK-EH-03-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 4
2866 // CHECK-EH-03-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
2867 // CHECK-EH-03-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
2868 // CHECK-EH-03-NEXT: invoke void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
2869 // CHECK-EH-03-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2870 // CHECK-EH-03: invoke.cont1:
2871 // CHECK-EH-03-NEXT: br label [[EH_RESUME:%.*]]
2872 // CHECK-EH-03: return:
2873 // CHECK-EH-03-NEXT: ret void
2874 // CHECK-EH-03: eh.resume:
2875 // CHECK-EH-03-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
2876 // CHECK-EH-03-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
2877 // CHECK-EH-03-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
2878 // CHECK-EH-03-NEXT: [[LPAD_VAL2:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
2879 // CHECK-EH-03-NEXT: resume { i8*, i32 } [[LPAD_VAL2]]
2880 // CHECK-EH-03: terminate.lpad:
2881 // CHECK-EH-03-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 }
2882 // CHECK-EH-03-NEXT: catch i8* null
2883 // CHECK-EH-03-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
2884 // CHECK-EH-03-NEXT: call void @__clang_call_terminate(i8* [[TMP6]]) #[[ATTR6]]
2885 // CHECK-EH-03-NEXT: unreachable
2886 //
2887 // CHECK-EH-11-LABEL: @_Z6test23b(
2888 // CHECK-EH-11-NEXT: entry:
2889 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2890 // CHECK-EH-11-NEXT: [[B_ADDR:%.*]] = alloca i8, align 1
2891 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2892 // CHECK-EH-11-NEXT: [[Y:%.*]] = alloca [[CLASS_X:%.*]], align 1
2893 // CHECK-EH-11-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 4
2894 // CHECK-EH-11-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
2895 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2896 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2897 // CHECK-EH-11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[B:%.*]] to i8
2898 // CHECK-EH-11-NEXT: store i8 [[FROMBOOL]], i8* [[B_ADDR]], align 1
2899 // CHECK-EH-11-NEXT: [[TMP1:%.*]] = load i8, i8* [[B_ADDR]], align 1
2900 // CHECK-EH-11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
2901 // CHECK-EH-11-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
2902 // CHECK-EH-11: if.then:
2903 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
2904 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2905 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
2906 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2907 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2908 // CHECK-EH-11: nrvo.unused:
2909 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
2910 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
2911 // CHECK-EH-11: nrvo.skipdtor:
2912 // CHECK-EH-11-NEXT: br label [[RETURN:%.*]]
2913 // CHECK-EH-11: if.end:
2914 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
2915 // CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERVKS_(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], %class.X* noundef nonnull align 1 dereferenceable(1) [[Y]])
2916 // CHECK-EH-11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
2917 // CHECK-EH-11: invoke.cont:
2918 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]]) #[[ATTR6]]
2919 // CHECK-EH-11-NEXT: br label [[RETURN]]
2920 // CHECK-EH-11: lpad:
2921 // CHECK-EH-11-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 }
2922 // CHECK-EH-11-NEXT: cleanup
2923 // CHECK-EH-11-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
2924 // CHECK-EH-11-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 4
2925 // CHECK-EH-11-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
2926 // CHECK-EH-11-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
2927 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[Y]]) #[[ATTR6]]
2928 // CHECK-EH-11-NEXT: br label [[EH_RESUME:%.*]]
2929 // CHECK-EH-11: return:
2930 // CHECK-EH-11-NEXT: ret void
2931 // CHECK-EH-11: eh.resume:
2932 // CHECK-EH-11-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 4
2933 // CHECK-EH-11-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
2934 // CHECK-EH-11-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
2935 // CHECK-EH-11-NEXT: [[LPAD_VAL1:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
2936 // CHECK-EH-11-NEXT: resume { i8*, i32 } [[LPAD_VAL1]]
2937 //
test23(bool b)2938 X test23(bool b) { // http://wg21.link/p2025r2#ex-19
2939 if (b) {
2940 const X x;
2941 return x; // NRVO happens
2942 }
2943 volatile X y;
2944 return y; // NRVO is impossible
2945 }
2946
2947 #ifdef __EXCEPTIONS
2948 // CHECK-EH-03-LABEL: @_Z6test24v(
2949 // CHECK-EH-03-NEXT: entry:
2950 // CHECK-EH-03-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2951 // CHECK-EH-03-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2952 // CHECK-EH-03-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2953 // CHECK-EH-03-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2954 // CHECK-EH-03-NEXT: store i1 false, i1* [[NRVO]], align 1
2955 // CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2956 // CHECK-EH-03-NEXT: store i1 true, i1* [[NRVO]], align 1
2957 // CHECK-EH-03-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2958 // CHECK-EH-03-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2959 // CHECK-EH-03: nrvo.unused:
2960 // CHECK-EH-03-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2961 // CHECK-EH-03-NEXT: br label [[NRVO_SKIPDTOR]]
2962 // CHECK-EH-03: nrvo.skipdtor:
2963 // CHECK-EH-03-NEXT: ret void
2964 //
2965 // CHECK-EH-11-LABEL: @_Z6test24v(
2966 // CHECK-EH-11-NEXT: entry:
2967 // CHECK-EH-11-NEXT: [[RESULT_PTR:%.*]] = alloca i8*, align 4
2968 // CHECK-EH-11-NEXT: [[NRVO:%.*]] = alloca i1, align 1
2969 // CHECK-EH-11-NEXT: [[TMP0:%.*]] = bitcast %class.X* [[AGG_RESULT:%.*]] to i8*
2970 // CHECK-EH-11-NEXT: store i8* [[TMP0]], i8** [[RESULT_PTR]], align 4
2971 // CHECK-EH-11-NEXT: store i1 false, i1* [[NRVO]], align 1
2972 // CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
2973 // CHECK-EH-11-NEXT: store i1 true, i1* [[NRVO]], align 1
2974 // CHECK-EH-11-NEXT: [[NRVO_VAL:%.*]] = load i1, i1* [[NRVO]], align 1
2975 // CHECK-EH-11-NEXT: br i1 [[NRVO_VAL]], label [[NRVO_SKIPDTOR:%.*]], label [[NRVO_UNUSED:%.*]]
2976 // CHECK-EH-11: nrvo.unused:
2977 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]]) #[[ATTR6]]
2978 // CHECK-EH-11-NEXT: br label [[NRVO_SKIPDTOR]]
2979 // CHECK-EH-11: nrvo.skipdtor:
2980 // CHECK-EH-11-NEXT: ret void
2981 //
test24()2982 X test24() { // http://wg21.link/p2025r2#ex-20
2983 X x;
2984 if (&x == &OuterX)
2985 throw 0;
2986 return x; // NRVO happens
2987 }
2988 #endif
2989
2990 #ifdef CXX11
2991 template <bool B>
test25()2992 X test25() {
2993 X x;
2994 if constexpr (B) {
2995 return x; // FIXME: NRVO could happen when B == true, but doesn't
2996 } else {
2997 return X();
2998 }
2999 }
3000
3001 // CHECK-EH-11-LABEL: @_Z17test25instantiatev(
3002 // CHECK-EH-11-NEXT: entry:
3003 // CHECK-EH-11-NEXT: [[AGG_TMP_ENSURED:%.*]] = alloca [[CLASS_X:%.*]], align 1
3004 // CHECK-EH-11-NEXT: [[AGG_TMP_ENSURED1:%.*]] = alloca [[CLASS_X]], align 1
3005 // CHECK-EH-11-NEXT: call void @_Z6test25ILb1EE1Xv(%class.X* sret([[CLASS_X]]) align 1 [[AGG_TMP_ENSURED]])
3006 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_TMP_ENSURED]]) #[[ATTR6]]
3007 // CHECK-EH-11-NEXT: call void @_Z6test25ILb0EE1Xv(%class.X* sret([[CLASS_X]]) align 1 [[AGG_TMP_ENSURED1]])
3008 // CHECK-EH-11-NEXT: call void @_ZN1XD1Ev(%class.X* noundef nonnull align 1 dereferenceable(1) [[AGG_TMP_ENSURED1]]) #[[ATTR6]]
3009 // CHECK-EH-11-NEXT: ret void
3010 //
test25instantiate()3011 void test25instantiate() {
3012 test25<true>();
3013 test25<false>();
3014 }
3015 #endif
3016