1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals --global-value-regex ".omp_offloading.entry.*"
2 // RUN: %clang_cc1 -std=c++11 -triple x86_64-unknown-linux-gnu -fgpu-rdc \
3 // RUN: --offload-new-driver -emit-llvm -o - -x cuda %s | FileCheck \
4 // RUN: --check-prefix=CUDA %s
5 // RUN: %clang_cc1 -std=c++11 -triple x86_64-unknown-linux-gnu -fgpu-rdc \
6 // RUN: --offload-new-driver -emit-llvm -o - -x hip %s | FileCheck \
7 // RUN: --check-prefix=HIP %s
8
9 #include "Inputs/cuda.h"
10
11 //.
12 // CUDA: @.omp_offloading.entry_name = internal unnamed_addr constant [8 x i8] c"_Z3foov\00"
13 // CUDA: @.omp_offloading.entry._Z3foov = weak constant %struct.__tgt_offload_entry { ptr @_Z18__device_stub__foov, ptr @.omp_offloading.entry_name, i64 0, i32 0, i32 0 }, section "cuda_offloading_entries", align 1
14 // CUDA: @.omp_offloading.entry_name.1 = internal unnamed_addr constant [8 x i8] c"_Z3barv\00"
15 // CUDA: @.omp_offloading.entry._Z3barv = weak constant %struct.__tgt_offload_entry { ptr @_Z18__device_stub__barv, ptr @.omp_offloading.entry_name.1, i64 0, i32 0, i32 0 }, section "cuda_offloading_entries", align 1
16 // CUDA: @.omp_offloading.entry_name.2 = internal unnamed_addr constant [2 x i8] c"x\00"
17 // CUDA: @.omp_offloading.entry.x = weak constant %struct.__tgt_offload_entry { ptr @x, ptr @.omp_offloading.entry_name.2, i64 4, i32 0, i32 0 }, section "cuda_offloading_entries", align 1
18 //.
19 // HIP: @.omp_offloading.entry_name = internal unnamed_addr constant [8 x i8] c"_Z3foov\00"
20 // HIP: @.omp_offloading.entry._Z3foov = weak constant %struct.__tgt_offload_entry { ptr @_Z3foov, ptr @.omp_offloading.entry_name, i64 0, i32 0, i32 0 }, section "hip_offloading_entries", align 1
21 // HIP: @.omp_offloading.entry_name.1 = internal unnamed_addr constant [8 x i8] c"_Z3barv\00"
22 // HIP: @.omp_offloading.entry._Z3barv = weak constant %struct.__tgt_offload_entry { ptr @_Z3barv, ptr @.omp_offloading.entry_name.1, i64 0, i32 0, i32 0 }, section "hip_offloading_entries", align 1
23 // HIP: @.omp_offloading.entry_name.2 = internal unnamed_addr constant [2 x i8] c"x\00"
24 // HIP: @.omp_offloading.entry.x = weak constant %struct.__tgt_offload_entry { ptr @x, ptr @.omp_offloading.entry_name.2, i64 4, i32 0, i32 0 }, section "hip_offloading_entries", align 1
25 //.
26 // CUDA-LABEL: @_Z18__device_stub__foov(
27 // CUDA-NEXT: entry:
28 // CUDA-NEXT: [[TMP0:%.*]] = call i32 @cudaLaunch(ptr @_Z18__device_stub__foov)
29 // CUDA-NEXT: br label [[SETUP_END:%.*]]
30 // CUDA: setup.end:
31 // CUDA-NEXT: ret void
32 //
33 // HIP-LABEL: @_Z18__device_stub__foov(
34 // HIP-NEXT: entry:
35 // HIP-NEXT: [[TMP0:%.*]] = call i32 @hipLaunchByPtr(ptr @_Z3foov)
36 // HIP-NEXT: br label [[SETUP_END:%.*]]
37 // HIP: setup.end:
38 // HIP-NEXT: ret void
39 //
foo()40 __global__ void foo() {}
41
42 // CUDA-LABEL: @_Z18__device_stub__barv(
43 // CUDA-NEXT: entry:
44 // CUDA-NEXT: [[TMP0:%.*]] = call i32 @cudaLaunch(ptr @_Z18__device_stub__barv)
45 // CUDA-NEXT: br label [[SETUP_END:%.*]]
46 // CUDA: setup.end:
47 // CUDA-NEXT: ret void
48 //
49 // HIP-LABEL: @_Z18__device_stub__barv(
50 // HIP-NEXT: entry:
51 // HIP-NEXT: [[TMP0:%.*]] = call i32 @hipLaunchByPtr(ptr @_Z3barv)
52 // HIP-NEXT: br label [[SETUP_END:%.*]]
53 // HIP: setup.end:
54 // HIP-NEXT: ret void
55 //
bar()56 __global__ void bar() {}
57 __device__ int x = 1;
58