1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-pc-linux -emit-llvm -o - %s | FileCheck %s
3
4 __INT32_TYPE__*m1(__INT32_TYPE__ i) __attribute__((alloc_align(1)));
5
6 // Condition where parameter to m1 is not size_t.
7 // CHECK-LABEL: @test1(
8 // CHECK-NEXT: entry:
9 // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
10 // CHECK-NEXT: store i32 [[A:%.*]], i32* [[A_ADDR]], align 4
11 // CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
12 // CHECK-NEXT: [[CALL:%.*]] = call i32* @m1(i32 noundef [[TMP0]])
13 // CHECK-NEXT: [[CASTED_ALIGN:%.*]] = zext i32 [[TMP0]] to i64
14 // CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[CALL]], i64 [[CASTED_ALIGN]]) ]
15 // CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[CALL]], align 4
16 // CHECK-NEXT: ret i32 [[TMP1]]
17 //
test1(__INT32_TYPE__ a)18 __INT32_TYPE__ test1(__INT32_TYPE__ a) {
19 return *m1(a);
20 }
21 // Condition where test2 param needs casting.
22 // CHECK-LABEL: @test2(
23 // CHECK-NEXT: entry:
24 // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
25 // CHECK-NEXT: store i64 [[A:%.*]], i64* [[A_ADDR]], align 8
26 // CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
27 // CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
28 // CHECK-NEXT: [[CALL:%.*]] = call i32* @m1(i32 noundef [[CONV]])
29 // CHECK-NEXT: [[CASTED_ALIGN:%.*]] = zext i32 [[CONV]] to i64
30 // CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[CALL]], i64 [[CASTED_ALIGN]]) ]
31 // CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[CALL]], align 4
32 // CHECK-NEXT: ret i32 [[TMP1]]
33 //
test2(__SIZE_TYPE__ a)34 __INT32_TYPE__ test2(__SIZE_TYPE__ a) {
35 return *m1(a);
36 }
37 __INT32_TYPE__ *m2(__SIZE_TYPE__ i) __attribute__((alloc_align(1)));
38
39 // test3 param needs casting, but 'm2' is correct.
40 // CHECK-LABEL: @test3(
41 // CHECK-NEXT: entry:
42 // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
43 // CHECK-NEXT: store i32 [[A:%.*]], i32* [[A_ADDR]], align 4
44 // CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
45 // CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP0]] to i64
46 // CHECK-NEXT: [[CALL:%.*]] = call i32* @m2(i64 noundef [[CONV]])
47 // CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[CALL]], i64 [[CONV]]) ]
48 // CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[CALL]], align 4
49 // CHECK-NEXT: ret i32 [[TMP1]]
50 //
test3(__INT32_TYPE__ a)51 __INT32_TYPE__ test3(__INT32_TYPE__ a) {
52 return *m2(a);
53 }
54
55 // Every type matches, canonical example.
56 // CHECK-LABEL: @test4(
57 // CHECK-NEXT: entry:
58 // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
59 // CHECK-NEXT: store i64 [[A:%.*]], i64* [[A_ADDR]], align 8
60 // CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
61 // CHECK-NEXT: [[CALL:%.*]] = call i32* @m2(i64 noundef [[TMP0]])
62 // CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[CALL]], i64 [[TMP0]]) ]
63 // CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[CALL]], align 4
64 // CHECK-NEXT: ret i32 [[TMP1]]
65 //
test4(__SIZE_TYPE__ a)66 __INT32_TYPE__ test4(__SIZE_TYPE__ a) {
67 return *m2(a);
68 }
69
70
71 struct Empty {};
72 struct MultiArgs { __INT64_TYPE__ a, b;};
73 // Struct parameter doesn't take up an IR parameter, 'i' takes up 2.
74 // Truncation to i64 is permissible, since alignments of greater than 2^64 are insane.
75 __INT32_TYPE__ *m3(struct Empty s, __int128_t i) __attribute__((alloc_align(2)));
76 // CHECK-LABEL: @test5(
77 // CHECK-NEXT: entry:
78 // CHECK-NEXT: [[A:%.*]] = alloca i128, align 16
79 // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i128, align 16
80 // CHECK-NEXT: [[E:%.*]] = alloca [[STRUCT_EMPTY:%.*]], align 1
81 // CHECK-NEXT: [[COERCE:%.*]] = alloca i128, align 16
82 // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128* [[A]] to { i64, i64 }*
83 // CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[TMP0]], i32 0, i32 0
84 // CHECK-NEXT: store i64 [[A_COERCE0:%.*]], i64* [[TMP1]], align 16
85 // CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[TMP0]], i32 0, i32 1
86 // CHECK-NEXT: store i64 [[A_COERCE1:%.*]], i64* [[TMP2]], align 8
87 // CHECK-NEXT: [[A1:%.*]] = load i128, i128* [[A]], align 16
88 // CHECK-NEXT: store i128 [[A1]], i128* [[A_ADDR]], align 16
89 // CHECK-NEXT: [[TMP3:%.*]] = load i128, i128* [[A_ADDR]], align 16
90 // CHECK-NEXT: store i128 [[TMP3]], i128* [[COERCE]], align 16
91 // CHECK-NEXT: [[TMP4:%.*]] = bitcast i128* [[COERCE]] to { i64, i64 }*
92 // CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[TMP4]], i32 0, i32 0
93 // CHECK-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 16
94 // CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[TMP4]], i32 0, i32 1
95 // CHECK-NEXT: [[TMP8:%.*]] = load i64, i64* [[TMP7]], align 8
96 // CHECK-NEXT: [[CALL:%.*]] = call i32* @m3(i64 noundef [[TMP6]], i64 noundef [[TMP8]])
97 // CHECK-NEXT: [[CASTED_ALIGN:%.*]] = trunc i128 [[TMP3]] to i64
98 // CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[CALL]], i64 [[CASTED_ALIGN]]) ]
99 // CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[CALL]], align 4
100 // CHECK-NEXT: ret i32 [[TMP9]]
101 //
test5(__int128_t a)102 __INT32_TYPE__ test5(__int128_t a) {
103 struct Empty e;
104 return *m3(e, a);
105 }
106 // Struct parameter takes up 2 parameters, 'i' takes up 2.
107 __INT32_TYPE__ *m4(struct MultiArgs s, __int128_t i) __attribute__((alloc_align(2)));
108 // CHECK-LABEL: @test6(
109 // CHECK-NEXT: entry:
110 // CHECK-NEXT: [[A:%.*]] = alloca i128, align 16
111 // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i128, align 16
112 // CHECK-NEXT: [[E:%.*]] = alloca [[STRUCT_MULTIARGS:%.*]], align 8
113 // CHECK-NEXT: [[COERCE:%.*]] = alloca i128, align 16
114 // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128* [[A]] to { i64, i64 }*
115 // CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[TMP0]], i32 0, i32 0
116 // CHECK-NEXT: store i64 [[A_COERCE0:%.*]], i64* [[TMP1]], align 16
117 // CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[TMP0]], i32 0, i32 1
118 // CHECK-NEXT: store i64 [[A_COERCE1:%.*]], i64* [[TMP2]], align 8
119 // CHECK-NEXT: [[A1:%.*]] = load i128, i128* [[A]], align 16
120 // CHECK-NEXT: store i128 [[A1]], i128* [[A_ADDR]], align 16
121 // CHECK-NEXT: [[TMP3:%.*]] = load i128, i128* [[A_ADDR]], align 16
122 // CHECK-NEXT: [[TMP4:%.*]] = bitcast %struct.MultiArgs* [[E]] to { i64, i64 }*
123 // CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[TMP4]], i32 0, i32 0
124 // CHECK-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8
125 // CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[TMP4]], i32 0, i32 1
126 // CHECK-NEXT: [[TMP8:%.*]] = load i64, i64* [[TMP7]], align 8
127 // CHECK-NEXT: store i128 [[TMP3]], i128* [[COERCE]], align 16
128 // CHECK-NEXT: [[TMP9:%.*]] = bitcast i128* [[COERCE]] to { i64, i64 }*
129 // CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[TMP9]], i32 0, i32 0
130 // CHECK-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 16
131 // CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[TMP9]], i32 0, i32 1
132 // CHECK-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8
133 // CHECK-NEXT: [[CALL:%.*]] = call i32* @m4(i64 [[TMP6]], i64 [[TMP8]], i64 noundef [[TMP11]], i64 noundef [[TMP13]])
134 // CHECK-NEXT: [[CASTED_ALIGN:%.*]] = trunc i128 [[TMP3]] to i64
135 // CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[CALL]], i64 [[CASTED_ALIGN]]) ]
136 // CHECK-NEXT: [[TMP14:%.*]] = load i32, i32* [[CALL]], align 4
137 // CHECK-NEXT: ret i32 [[TMP14]]
138 //
test6(__int128_t a)139 __INT32_TYPE__ test6(__int128_t a) {
140 struct MultiArgs e;
141 return *m4(e, a);
142 }
143
144