1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve \
3 // RUN: -fallow-half-arguments-and-returns -disable-O0-optnone \
4 // RUN: -emit-llvm -o - %s | opt -S -sroa | FileCheck %s
5
6 // REQUIRES: aarch64-registered-target
7
8 #include <arm_sve.h>
9 #include <stddef.h>
10
11 // CHECK-LABEL: @subscript_int16(
12 // CHECK-NEXT: entry:
13 // CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 8 x i16> [[A:%.*]], i64 [[B:%.*]]
14 // CHECK-NEXT: ret i16 [[VECEXT]]
15 //
subscript_int16(svint16_t a,size_t b)16 int16_t subscript_int16(svint16_t a, size_t b) {
17 return a[b];
18 }
19
20 // CHECK-LABEL: @subscript_uint16(
21 // CHECK-NEXT: entry:
22 // CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 8 x i16> [[A:%.*]], i64 [[B:%.*]]
23 // CHECK-NEXT: ret i16 [[VECEXT]]
24 //
subscript_uint16(svuint16_t a,size_t b)25 uint16_t subscript_uint16(svuint16_t a, size_t b) {
26 return a[b];
27 }
28
29 // CHECK-LABEL: @subscript_int32(
30 // CHECK-NEXT: entry:
31 // CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 4 x i32> [[A:%.*]], i64 [[B:%.*]]
32 // CHECK-NEXT: ret i32 [[VECEXT]]
33 //
subscript_int32(svint32_t a,size_t b)34 int32_t subscript_int32(svint32_t a, size_t b) {
35 return a[b];
36 }
37
38 // CHECK-LABEL: @subscript_uint32(
39 // CHECK-NEXT: entry:
40 // CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 4 x i32> [[A:%.*]], i64 [[B:%.*]]
41 // CHECK-NEXT: ret i32 [[VECEXT]]
42 //
subscript_uint32(svuint32_t a,size_t b)43 uint32_t subscript_uint32(svuint32_t a, size_t b) {
44 return a[b];
45 }
46
47 // CHECK-LABEL: @subscript_int64(
48 // CHECK-NEXT: entry:
49 // CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 2 x i64> [[A:%.*]], i64 [[B:%.*]]
50 // CHECK-NEXT: ret i64 [[VECEXT]]
51 //
subscript_int64(svint64_t a,size_t b)52 int64_t subscript_int64(svint64_t a, size_t b) {
53 return a[b];
54 }
55
56 // CHECK-LABEL: @subscript_uint64(
57 // CHECK-NEXT: entry:
58 // CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 2 x i64> [[A:%.*]], i64 [[B:%.*]]
59 // CHECK-NEXT: ret i64 [[VECEXT]]
60 //
subscript_uint64(svuint64_t a,size_t b)61 uint64_t subscript_uint64(svuint64_t a, size_t b) {
62 return a[b];
63 }
64
65 // CHECK-LABEL: @subscript_float16(
66 // CHECK-NEXT: entry:
67 // CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 8 x half> [[A:%.*]], i64 [[B:%.*]]
68 // CHECK-NEXT: ret half [[VECEXT]]
69 //
subscript_float16(svfloat16_t a,size_t b)70 __fp16 subscript_float16(svfloat16_t a, size_t b) {
71 return a[b];
72 }
73
74 // CHECK-LABEL: @subscript_float32(
75 // CHECK-NEXT: entry:
76 // CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 4 x float> [[A:%.*]], i64 [[B:%.*]]
77 // CHECK-NEXT: ret float [[VECEXT]]
78 //
subscript_float32(svfloat32_t a,size_t b)79 float subscript_float32(svfloat32_t a, size_t b) {
80 return a[b];
81 }
82
83 // CHECK-LABEL: @subscript_float64(
84 // CHECK-NEXT: entry:
85 // CHECK-NEXT: [[VECEXT:%.*]] = extractelement <vscale x 2 x double> [[A:%.*]], i64 [[B:%.*]]
86 // CHECK-NEXT: ret double [[VECEXT]]
87 //
subscript_float64(svfloat64_t a,size_t b)88 double subscript_float64(svfloat64_t a, size_t b) {
89 return a[b];
90 }
91