1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This contains code to emit Builtin calls as LLVM code. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "CGCXXABI.h" 15 #include "CGObjCRuntime.h" 16 #include "CGOpenCLRuntime.h" 17 #include "CodeGenFunction.h" 18 #include "CodeGenModule.h" 19 #include "ConstantEmitter.h" 20 #include "TargetInfo.h" 21 #include "clang/AST/ASTContext.h" 22 #include "clang/AST/Decl.h" 23 #include "clang/Analysis/Analyses/OSLog.h" 24 #include "clang/Basic/TargetBuiltins.h" 25 #include "clang/Basic/TargetInfo.h" 26 #include "clang/CodeGen/CGFunctionInfo.h" 27 #include "llvm/ADT/StringExtras.h" 28 #include "llvm/IR/CallSite.h" 29 #include "llvm/IR/DataLayout.h" 30 #include "llvm/IR/InlineAsm.h" 31 #include "llvm/IR/Intrinsics.h" 32 #include "llvm/IR/MDBuilder.h" 33 #include "llvm/Support/ConvertUTF.h" 34 #include "llvm/Support/ScopedPrinter.h" 35 #include "llvm/Support/TargetParser.h" 36 #include <sstream> 37 38 using namespace clang; 39 using namespace CodeGen; 40 using namespace llvm; 41 42 static 43 int64_t clamp(int64_t Value, int64_t Low, int64_t High) { 44 return std::min(High, std::max(Low, Value)); 45 } 46 47 /// getBuiltinLibFunction - Given a builtin id for a function like 48 /// "__builtin_fabsf", return a Function* for "fabsf". 49 llvm::Constant *CodeGenModule::getBuiltinLibFunction(const FunctionDecl *FD, 50 unsigned BuiltinID) { 51 assert(Context.BuiltinInfo.isLibFunction(BuiltinID)); 52 53 // Get the name, skip over the __builtin_ prefix (if necessary). 54 StringRef Name; 55 GlobalDecl D(FD); 56 57 // If the builtin has been declared explicitly with an assembler label, 58 // use the mangled name. This differs from the plain label on platforms 59 // that prefix labels. 60 if (FD->hasAttr<AsmLabelAttr>()) 61 Name = getMangledName(D); 62 else 63 Name = Context.BuiltinInfo.getName(BuiltinID) + 10; 64 65 llvm::FunctionType *Ty = 66 cast<llvm::FunctionType>(getTypes().ConvertType(FD->getType())); 67 68 return GetOrCreateLLVMFunction(Name, Ty, D, /*ForVTable=*/false); 69 } 70 71 /// Emit the conversions required to turn the given value into an 72 /// integer of the given size. 73 static Value *EmitToInt(CodeGenFunction &CGF, llvm::Value *V, 74 QualType T, llvm::IntegerType *IntType) { 75 V = CGF.EmitToMemory(V, T); 76 77 if (V->getType()->isPointerTy()) 78 return CGF.Builder.CreatePtrToInt(V, IntType); 79 80 assert(V->getType() == IntType); 81 return V; 82 } 83 84 static Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V, 85 QualType T, llvm::Type *ResultType) { 86 V = CGF.EmitFromMemory(V, T); 87 88 if (ResultType->isPointerTy()) 89 return CGF.Builder.CreateIntToPtr(V, ResultType); 90 91 assert(V->getType() == ResultType); 92 return V; 93 } 94 95 /// Utility to insert an atomic instruction based on Instrinsic::ID 96 /// and the expression node. 97 static Value *MakeBinaryAtomicValue(CodeGenFunction &CGF, 98 llvm::AtomicRMWInst::BinOp Kind, 99 const CallExpr *E) { 100 QualType T = E->getType(); 101 assert(E->getArg(0)->getType()->isPointerType()); 102 assert(CGF.getContext().hasSameUnqualifiedType(T, 103 E->getArg(0)->getType()->getPointeeType())); 104 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 105 106 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 107 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 108 109 llvm::IntegerType *IntType = 110 llvm::IntegerType::get(CGF.getLLVMContext(), 111 CGF.getContext().getTypeSize(T)); 112 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 113 114 llvm::Value *Args[2]; 115 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 116 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 117 llvm::Type *ValueType = Args[1]->getType(); 118 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 119 120 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 121 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 122 return EmitFromInt(CGF, Result, T, ValueType); 123 } 124 125 static Value *EmitNontemporalStore(CodeGenFunction &CGF, const CallExpr *E) { 126 Value *Val = CGF.EmitScalarExpr(E->getArg(0)); 127 Value *Address = CGF.EmitScalarExpr(E->getArg(1)); 128 129 // Convert the type of the pointer to a pointer to the stored type. 130 Val = CGF.EmitToMemory(Val, E->getArg(0)->getType()); 131 Value *BC = CGF.Builder.CreateBitCast( 132 Address, llvm::PointerType::getUnqual(Val->getType()), "cast"); 133 LValue LV = CGF.MakeNaturalAlignAddrLValue(BC, E->getArg(0)->getType()); 134 LV.setNontemporal(true); 135 CGF.EmitStoreOfScalar(Val, LV, false); 136 return nullptr; 137 } 138 139 static Value *EmitNontemporalLoad(CodeGenFunction &CGF, const CallExpr *E) { 140 Value *Address = CGF.EmitScalarExpr(E->getArg(0)); 141 142 LValue LV = CGF.MakeNaturalAlignAddrLValue(Address, E->getType()); 143 LV.setNontemporal(true); 144 return CGF.EmitLoadOfScalar(LV, E->getExprLoc()); 145 } 146 147 static RValue EmitBinaryAtomic(CodeGenFunction &CGF, 148 llvm::AtomicRMWInst::BinOp Kind, 149 const CallExpr *E) { 150 return RValue::get(MakeBinaryAtomicValue(CGF, Kind, E)); 151 } 152 153 /// Utility to insert an atomic instruction based Instrinsic::ID and 154 /// the expression node, where the return value is the result of the 155 /// operation. 156 static RValue EmitBinaryAtomicPost(CodeGenFunction &CGF, 157 llvm::AtomicRMWInst::BinOp Kind, 158 const CallExpr *E, 159 Instruction::BinaryOps Op, 160 bool Invert = false) { 161 QualType T = E->getType(); 162 assert(E->getArg(0)->getType()->isPointerType()); 163 assert(CGF.getContext().hasSameUnqualifiedType(T, 164 E->getArg(0)->getType()->getPointeeType())); 165 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 166 167 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 168 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 169 170 llvm::IntegerType *IntType = 171 llvm::IntegerType::get(CGF.getLLVMContext(), 172 CGF.getContext().getTypeSize(T)); 173 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 174 175 llvm::Value *Args[2]; 176 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 177 llvm::Type *ValueType = Args[1]->getType(); 178 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 179 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 180 181 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 182 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 183 Result = CGF.Builder.CreateBinOp(Op, Result, Args[1]); 184 if (Invert) 185 Result = CGF.Builder.CreateBinOp(llvm::Instruction::Xor, Result, 186 llvm::ConstantInt::get(IntType, -1)); 187 Result = EmitFromInt(CGF, Result, T, ValueType); 188 return RValue::get(Result); 189 } 190 191 /// @brief Utility to insert an atomic cmpxchg instruction. 192 /// 193 /// @param CGF The current codegen function. 194 /// @param E Builtin call expression to convert to cmpxchg. 195 /// arg0 - address to operate on 196 /// arg1 - value to compare with 197 /// arg2 - new value 198 /// @param ReturnBool Specifies whether to return success flag of 199 /// cmpxchg result or the old value. 200 /// 201 /// @returns result of cmpxchg, according to ReturnBool 202 static Value *MakeAtomicCmpXchgValue(CodeGenFunction &CGF, const CallExpr *E, 203 bool ReturnBool) { 204 QualType T = ReturnBool ? E->getArg(1)->getType() : E->getType(); 205 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 206 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 207 208 llvm::IntegerType *IntType = llvm::IntegerType::get( 209 CGF.getLLVMContext(), CGF.getContext().getTypeSize(T)); 210 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 211 212 Value *Args[3]; 213 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 214 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 215 llvm::Type *ValueType = Args[1]->getType(); 216 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 217 Args[2] = EmitToInt(CGF, CGF.EmitScalarExpr(E->getArg(2)), T, IntType); 218 219 Value *Pair = CGF.Builder.CreateAtomicCmpXchg( 220 Args[0], Args[1], Args[2], llvm::AtomicOrdering::SequentiallyConsistent, 221 llvm::AtomicOrdering::SequentiallyConsistent); 222 if (ReturnBool) 223 // Extract boolean success flag and zext it to int. 224 return CGF.Builder.CreateZExt(CGF.Builder.CreateExtractValue(Pair, 1), 225 CGF.ConvertType(E->getType())); 226 else 227 // Extract old value and emit it using the same type as compare value. 228 return EmitFromInt(CGF, CGF.Builder.CreateExtractValue(Pair, 0), T, 229 ValueType); 230 } 231 232 // Emit a simple mangled intrinsic that has 1 argument and a return type 233 // matching the argument type. 234 static Value *emitUnaryBuiltin(CodeGenFunction &CGF, 235 const CallExpr *E, 236 unsigned IntrinsicID) { 237 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 238 239 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 240 return CGF.Builder.CreateCall(F, Src0); 241 } 242 243 // Emit an intrinsic that has 2 operands of the same type as its result. 244 static Value *emitBinaryBuiltin(CodeGenFunction &CGF, 245 const CallExpr *E, 246 unsigned IntrinsicID) { 247 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 248 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 249 250 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 251 return CGF.Builder.CreateCall(F, { Src0, Src1 }); 252 } 253 254 // Emit an intrinsic that has 3 operands of the same type as its result. 255 static Value *emitTernaryBuiltin(CodeGenFunction &CGF, 256 const CallExpr *E, 257 unsigned IntrinsicID) { 258 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 259 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 260 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); 261 262 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 263 return CGF.Builder.CreateCall(F, { Src0, Src1, Src2 }); 264 } 265 266 // Emit an intrinsic that has 1 float or double operand, and 1 integer. 267 static Value *emitFPIntBuiltin(CodeGenFunction &CGF, 268 const CallExpr *E, 269 unsigned IntrinsicID) { 270 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 271 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 272 273 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 274 return CGF.Builder.CreateCall(F, {Src0, Src1}); 275 } 276 277 /// EmitFAbs - Emit a call to @llvm.fabs(). 278 static Value *EmitFAbs(CodeGenFunction &CGF, Value *V) { 279 Value *F = CGF.CGM.getIntrinsic(Intrinsic::fabs, V->getType()); 280 llvm::CallInst *Call = CGF.Builder.CreateCall(F, V); 281 Call->setDoesNotAccessMemory(); 282 return Call; 283 } 284 285 /// Emit the computation of the sign bit for a floating point value. Returns 286 /// the i1 sign bit value. 287 static Value *EmitSignBit(CodeGenFunction &CGF, Value *V) { 288 LLVMContext &C = CGF.CGM.getLLVMContext(); 289 290 llvm::Type *Ty = V->getType(); 291 int Width = Ty->getPrimitiveSizeInBits(); 292 llvm::Type *IntTy = llvm::IntegerType::get(C, Width); 293 V = CGF.Builder.CreateBitCast(V, IntTy); 294 if (Ty->isPPC_FP128Ty()) { 295 // We want the sign bit of the higher-order double. The bitcast we just 296 // did works as if the double-double was stored to memory and then 297 // read as an i128. The "store" will put the higher-order double in the 298 // lower address in both little- and big-Endian modes, but the "load" 299 // will treat those bits as a different part of the i128: the low bits in 300 // little-Endian, the high bits in big-Endian. Therefore, on big-Endian 301 // we need to shift the high bits down to the low before truncating. 302 Width >>= 1; 303 if (CGF.getTarget().isBigEndian()) { 304 Value *ShiftCst = llvm::ConstantInt::get(IntTy, Width); 305 V = CGF.Builder.CreateLShr(V, ShiftCst); 306 } 307 // We are truncating value in order to extract the higher-order 308 // double, which we will be using to extract the sign from. 309 IntTy = llvm::IntegerType::get(C, Width); 310 V = CGF.Builder.CreateTrunc(V, IntTy); 311 } 312 Value *Zero = llvm::Constant::getNullValue(IntTy); 313 return CGF.Builder.CreateICmpSLT(V, Zero); 314 } 315 316 static RValue emitLibraryCall(CodeGenFunction &CGF, const FunctionDecl *FD, 317 const CallExpr *E, llvm::Constant *calleeValue) { 318 CGCallee callee = CGCallee::forDirect(calleeValue, FD); 319 return CGF.EmitCall(E->getCallee()->getType(), callee, E, ReturnValueSlot()); 320 } 321 322 /// \brief Emit a call to llvm.{sadd,uadd,ssub,usub,smul,umul}.with.overflow.* 323 /// depending on IntrinsicID. 324 /// 325 /// \arg CGF The current codegen function. 326 /// \arg IntrinsicID The ID for the Intrinsic we wish to generate. 327 /// \arg X The first argument to the llvm.*.with.overflow.*. 328 /// \arg Y The second argument to the llvm.*.with.overflow.*. 329 /// \arg Carry The carry returned by the llvm.*.with.overflow.*. 330 /// \returns The result (i.e. sum/product) returned by the intrinsic. 331 static llvm::Value *EmitOverflowIntrinsic(CodeGenFunction &CGF, 332 const llvm::Intrinsic::ID IntrinsicID, 333 llvm::Value *X, llvm::Value *Y, 334 llvm::Value *&Carry) { 335 // Make sure we have integers of the same width. 336 assert(X->getType() == Y->getType() && 337 "Arguments must be the same type. (Did you forget to make sure both " 338 "arguments have the same integer width?)"); 339 340 llvm::Value *Callee = CGF.CGM.getIntrinsic(IntrinsicID, X->getType()); 341 llvm::Value *Tmp = CGF.Builder.CreateCall(Callee, {X, Y}); 342 Carry = CGF.Builder.CreateExtractValue(Tmp, 1); 343 return CGF.Builder.CreateExtractValue(Tmp, 0); 344 } 345 346 static Value *emitRangedBuiltin(CodeGenFunction &CGF, 347 unsigned IntrinsicID, 348 int low, int high) { 349 llvm::MDBuilder MDHelper(CGF.getLLVMContext()); 350 llvm::MDNode *RNode = MDHelper.createRange(APInt(32, low), APInt(32, high)); 351 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, {}); 352 llvm::Instruction *Call = CGF.Builder.CreateCall(F); 353 Call->setMetadata(llvm::LLVMContext::MD_range, RNode); 354 return Call; 355 } 356 357 namespace { 358 struct WidthAndSignedness { 359 unsigned Width; 360 bool Signed; 361 }; 362 } 363 364 static WidthAndSignedness 365 getIntegerWidthAndSignedness(const clang::ASTContext &context, 366 const clang::QualType Type) { 367 assert(Type->isIntegerType() && "Given type is not an integer."); 368 unsigned Width = Type->isBooleanType() ? 1 : context.getTypeInfo(Type).Width; 369 bool Signed = Type->isSignedIntegerType(); 370 return {Width, Signed}; 371 } 372 373 // Given one or more integer types, this function produces an integer type that 374 // encompasses them: any value in one of the given types could be expressed in 375 // the encompassing type. 376 static struct WidthAndSignedness 377 EncompassingIntegerType(ArrayRef<struct WidthAndSignedness> Types) { 378 assert(Types.size() > 0 && "Empty list of types."); 379 380 // If any of the given types is signed, we must return a signed type. 381 bool Signed = false; 382 for (const auto &Type : Types) { 383 Signed |= Type.Signed; 384 } 385 386 // The encompassing type must have a width greater than or equal to the width 387 // of the specified types. Aditionally, if the encompassing type is signed, 388 // its width must be strictly greater than the width of any unsigned types 389 // given. 390 unsigned Width = 0; 391 for (const auto &Type : Types) { 392 unsigned MinWidth = Type.Width + (Signed && !Type.Signed); 393 if (Width < MinWidth) { 394 Width = MinWidth; 395 } 396 } 397 398 return {Width, Signed}; 399 } 400 401 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) { 402 llvm::Type *DestType = Int8PtrTy; 403 if (ArgValue->getType() != DestType) 404 ArgValue = 405 Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data()); 406 407 Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend; 408 return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue); 409 } 410 411 /// Checks if using the result of __builtin_object_size(p, @p From) in place of 412 /// __builtin_object_size(p, @p To) is correct 413 static bool areBOSTypesCompatible(int From, int To) { 414 // Note: Our __builtin_object_size implementation currently treats Type=0 and 415 // Type=2 identically. Encoding this implementation detail here may make 416 // improving __builtin_object_size difficult in the future, so it's omitted. 417 return From == To || (From == 0 && To == 1) || (From == 3 && To == 2); 418 } 419 420 static llvm::Value * 421 getDefaultBuiltinObjectSizeResult(unsigned Type, llvm::IntegerType *ResType) { 422 return ConstantInt::get(ResType, (Type & 2) ? 0 : -1, /*isSigned=*/true); 423 } 424 425 llvm::Value * 426 CodeGenFunction::evaluateOrEmitBuiltinObjectSize(const Expr *E, unsigned Type, 427 llvm::IntegerType *ResType, 428 llvm::Value *EmittedE) { 429 uint64_t ObjectSize; 430 if (!E->tryEvaluateObjectSize(ObjectSize, getContext(), Type)) 431 return emitBuiltinObjectSize(E, Type, ResType, EmittedE); 432 return ConstantInt::get(ResType, ObjectSize, /*isSigned=*/true); 433 } 434 435 /// Returns a Value corresponding to the size of the given expression. 436 /// This Value may be either of the following: 437 /// - A llvm::Argument (if E is a param with the pass_object_size attribute on 438 /// it) 439 /// - A call to the @llvm.objectsize intrinsic 440 /// 441 /// EmittedE is the result of emitting `E` as a scalar expr. If it's non-null 442 /// and we wouldn't otherwise try to reference a pass_object_size parameter, 443 /// we'll call @llvm.objectsize on EmittedE, rather than emitting E. 444 llvm::Value * 445 CodeGenFunction::emitBuiltinObjectSize(const Expr *E, unsigned Type, 446 llvm::IntegerType *ResType, 447 llvm::Value *EmittedE) { 448 // We need to reference an argument if the pointer is a parameter with the 449 // pass_object_size attribute. 450 if (auto *D = dyn_cast<DeclRefExpr>(E->IgnoreParenImpCasts())) { 451 auto *Param = dyn_cast<ParmVarDecl>(D->getDecl()); 452 auto *PS = D->getDecl()->getAttr<PassObjectSizeAttr>(); 453 if (Param != nullptr && PS != nullptr && 454 areBOSTypesCompatible(PS->getType(), Type)) { 455 auto Iter = SizeArguments.find(Param); 456 assert(Iter != SizeArguments.end()); 457 458 const ImplicitParamDecl *D = Iter->second; 459 auto DIter = LocalDeclMap.find(D); 460 assert(DIter != LocalDeclMap.end()); 461 462 return EmitLoadOfScalar(DIter->second, /*volatile=*/false, 463 getContext().getSizeType(), E->getLocStart()); 464 } 465 } 466 467 // LLVM can't handle Type=3 appropriately, and __builtin_object_size shouldn't 468 // evaluate E for side-effects. In either case, we shouldn't lower to 469 // @llvm.objectsize. 470 if (Type == 3 || (!EmittedE && E->HasSideEffects(getContext()))) 471 return getDefaultBuiltinObjectSizeResult(Type, ResType); 472 473 Value *Ptr = EmittedE ? EmittedE : EmitScalarExpr(E); 474 assert(Ptr->getType()->isPointerTy() && 475 "Non-pointer passed to __builtin_object_size?"); 476 477 Value *F = CGM.getIntrinsic(Intrinsic::objectsize, {ResType, Ptr->getType()}); 478 479 // LLVM only supports 0 and 2, make sure that we pass along that as a boolean. 480 Value *Min = Builder.getInt1((Type & 2) != 0); 481 // For GCC compatability, __builtin_object_size treat NULL as unknown size. 482 Value *NullIsUnknown = Builder.getTrue(); 483 return Builder.CreateCall(F, {Ptr, Min, NullIsUnknown}); 484 } 485 486 // Many of MSVC builtins are on both x64 and ARM; to avoid repeating code, we 487 // handle them here. 488 enum class CodeGenFunction::MSVCIntrin { 489 _BitScanForward, 490 _BitScanReverse, 491 _InterlockedAnd, 492 _InterlockedDecrement, 493 _InterlockedExchange, 494 _InterlockedExchangeAdd, 495 _InterlockedExchangeSub, 496 _InterlockedIncrement, 497 _InterlockedOr, 498 _InterlockedXor, 499 _interlockedbittestandset, 500 __fastfail, 501 }; 502 503 Value *CodeGenFunction::EmitMSVCBuiltinExpr(MSVCIntrin BuiltinID, 504 const CallExpr *E) { 505 switch (BuiltinID) { 506 case MSVCIntrin::_BitScanForward: 507 case MSVCIntrin::_BitScanReverse: { 508 Value *ArgValue = EmitScalarExpr(E->getArg(1)); 509 510 llvm::Type *ArgType = ArgValue->getType(); 511 llvm::Type *IndexType = 512 EmitScalarExpr(E->getArg(0))->getType()->getPointerElementType(); 513 llvm::Type *ResultType = ConvertType(E->getType()); 514 515 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 516 Value *ResZero = llvm::Constant::getNullValue(ResultType); 517 Value *ResOne = llvm::ConstantInt::get(ResultType, 1); 518 519 BasicBlock *Begin = Builder.GetInsertBlock(); 520 BasicBlock *End = createBasicBlock("bitscan_end", this->CurFn); 521 Builder.SetInsertPoint(End); 522 PHINode *Result = Builder.CreatePHI(ResultType, 2, "bitscan_result"); 523 524 Builder.SetInsertPoint(Begin); 525 Value *IsZero = Builder.CreateICmpEQ(ArgValue, ArgZero); 526 BasicBlock *NotZero = createBasicBlock("bitscan_not_zero", this->CurFn); 527 Builder.CreateCondBr(IsZero, End, NotZero); 528 Result->addIncoming(ResZero, Begin); 529 530 Builder.SetInsertPoint(NotZero); 531 Address IndexAddress = EmitPointerWithAlignment(E->getArg(0)); 532 533 if (BuiltinID == MSVCIntrin::_BitScanForward) { 534 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 535 Value *ZeroCount = Builder.CreateCall(F, {ArgValue, Builder.getTrue()}); 536 ZeroCount = Builder.CreateIntCast(ZeroCount, IndexType, false); 537 Builder.CreateStore(ZeroCount, IndexAddress, false); 538 } else { 539 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 540 Value *ArgTypeLastIndex = llvm::ConstantInt::get(IndexType, ArgWidth - 1); 541 542 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 543 Value *ZeroCount = Builder.CreateCall(F, {ArgValue, Builder.getTrue()}); 544 ZeroCount = Builder.CreateIntCast(ZeroCount, IndexType, false); 545 Value *Index = Builder.CreateNSWSub(ArgTypeLastIndex, ZeroCount); 546 Builder.CreateStore(Index, IndexAddress, false); 547 } 548 Builder.CreateBr(End); 549 Result->addIncoming(ResOne, NotZero); 550 551 Builder.SetInsertPoint(End); 552 return Result; 553 } 554 case MSVCIntrin::_InterlockedAnd: 555 return MakeBinaryAtomicValue(*this, AtomicRMWInst::And, E); 556 case MSVCIntrin::_InterlockedExchange: 557 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xchg, E); 558 case MSVCIntrin::_InterlockedExchangeAdd: 559 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Add, E); 560 case MSVCIntrin::_InterlockedExchangeSub: 561 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Sub, E); 562 case MSVCIntrin::_InterlockedOr: 563 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Or, E); 564 case MSVCIntrin::_InterlockedXor: 565 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xor, E); 566 567 case MSVCIntrin::_interlockedbittestandset: { 568 llvm::Value *Addr = EmitScalarExpr(E->getArg(0)); 569 llvm::Value *Bit = EmitScalarExpr(E->getArg(1)); 570 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 571 AtomicRMWInst::Or, Addr, 572 Builder.CreateShl(ConstantInt::get(Bit->getType(), 1), Bit), 573 llvm::AtomicOrdering::SequentiallyConsistent); 574 // Shift the relevant bit to the least significant position, truncate to 575 // the result type, and test the low bit. 576 llvm::Value *Shifted = Builder.CreateLShr(RMWI, Bit); 577 llvm::Value *Truncated = 578 Builder.CreateTrunc(Shifted, ConvertType(E->getType())); 579 return Builder.CreateAnd(Truncated, 580 ConstantInt::get(Truncated->getType(), 1)); 581 } 582 583 case MSVCIntrin::_InterlockedDecrement: { 584 llvm::Type *IntTy = ConvertType(E->getType()); 585 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 586 AtomicRMWInst::Sub, 587 EmitScalarExpr(E->getArg(0)), 588 ConstantInt::get(IntTy, 1), 589 llvm::AtomicOrdering::SequentiallyConsistent); 590 return Builder.CreateSub(RMWI, ConstantInt::get(IntTy, 1)); 591 } 592 case MSVCIntrin::_InterlockedIncrement: { 593 llvm::Type *IntTy = ConvertType(E->getType()); 594 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 595 AtomicRMWInst::Add, 596 EmitScalarExpr(E->getArg(0)), 597 ConstantInt::get(IntTy, 1), 598 llvm::AtomicOrdering::SequentiallyConsistent); 599 return Builder.CreateAdd(RMWI, ConstantInt::get(IntTy, 1)); 600 } 601 602 case MSVCIntrin::__fastfail: { 603 // Request immediate process termination from the kernel. The instruction 604 // sequences to do this are documented on MSDN: 605 // https://msdn.microsoft.com/en-us/library/dn774154.aspx 606 llvm::Triple::ArchType ISA = getTarget().getTriple().getArch(); 607 StringRef Asm, Constraints; 608 switch (ISA) { 609 default: 610 ErrorUnsupported(E, "__fastfail call for this architecture"); 611 break; 612 case llvm::Triple::x86: 613 case llvm::Triple::x86_64: 614 Asm = "int $$0x29"; 615 Constraints = "{cx}"; 616 break; 617 case llvm::Triple::thumb: 618 Asm = "udf #251"; 619 Constraints = "{r0}"; 620 break; 621 } 622 llvm::FunctionType *FTy = llvm::FunctionType::get(VoidTy, {Int32Ty}, false); 623 llvm::InlineAsm *IA = 624 llvm::InlineAsm::get(FTy, Asm, Constraints, /*SideEffects=*/true); 625 llvm::AttributeList NoReturnAttr = llvm::AttributeList::get( 626 getLLVMContext(), llvm::AttributeList::FunctionIndex, 627 llvm::Attribute::NoReturn); 628 CallSite CS = Builder.CreateCall(IA, EmitScalarExpr(E->getArg(0))); 629 CS.setAttributes(NoReturnAttr); 630 return CS.getInstruction(); 631 } 632 } 633 llvm_unreachable("Incorrect MSVC intrinsic!"); 634 } 635 636 namespace { 637 // ARC cleanup for __builtin_os_log_format 638 struct CallObjCArcUse final : EHScopeStack::Cleanup { 639 CallObjCArcUse(llvm::Value *object) : object(object) {} 640 llvm::Value *object; 641 642 void Emit(CodeGenFunction &CGF, Flags flags) override { 643 CGF.EmitARCIntrinsicUse(object); 644 } 645 }; 646 } 647 648 Value *CodeGenFunction::EmitCheckedArgForBuiltin(const Expr *E, 649 BuiltinCheckKind Kind) { 650 assert((Kind == BCK_CLZPassedZero || Kind == BCK_CTZPassedZero) 651 && "Unsupported builtin check kind"); 652 653 Value *ArgValue = EmitScalarExpr(E); 654 if (!SanOpts.has(SanitizerKind::Builtin) || !getTarget().isCLZForZeroUndef()) 655 return ArgValue; 656 657 SanitizerScope SanScope(this); 658 Value *Cond = Builder.CreateICmpNE( 659 ArgValue, llvm::Constant::getNullValue(ArgValue->getType())); 660 EmitCheck(std::make_pair(Cond, SanitizerKind::Builtin), 661 SanitizerHandler::InvalidBuiltin, 662 {EmitCheckSourceLocation(E->getExprLoc()), 663 llvm::ConstantInt::get(Builder.getInt8Ty(), Kind)}, 664 None); 665 return ArgValue; 666 } 667 668 /// Get the argument type for arguments to os_log_helper. 669 static CanQualType getOSLogArgType(ASTContext &C, int Size) { 670 QualType UnsignedTy = C.getIntTypeForBitwidth(Size * 8, /*Signed=*/false); 671 return C.getCanonicalType(UnsignedTy); 672 } 673 674 llvm::Function *CodeGenFunction::generateBuiltinOSLogHelperFunction( 675 const analyze_os_log::OSLogBufferLayout &Layout, 676 CharUnits BufferAlignment) { 677 ASTContext &Ctx = getContext(); 678 679 llvm::SmallString<64> Name; 680 { 681 raw_svector_ostream OS(Name); 682 OS << "__os_log_helper"; 683 OS << "_" << BufferAlignment.getQuantity(); 684 OS << "_" << int(Layout.getSummaryByte()); 685 OS << "_" << int(Layout.getNumArgsByte()); 686 for (const auto &Item : Layout.Items) 687 OS << "_" << int(Item.getSizeByte()) << "_" 688 << int(Item.getDescriptorByte()); 689 } 690 691 if (llvm::Function *F = CGM.getModule().getFunction(Name)) 692 return F; 693 694 llvm::SmallVector<ImplicitParamDecl, 4> Params; 695 Params.emplace_back(Ctx, nullptr, SourceLocation(), &Ctx.Idents.get("buffer"), 696 Ctx.VoidPtrTy, ImplicitParamDecl::Other); 697 698 for (unsigned int I = 0, E = Layout.Items.size(); I < E; ++I) { 699 char Size = Layout.Items[I].getSizeByte(); 700 if (!Size) 701 continue; 702 703 Params.emplace_back( 704 Ctx, nullptr, SourceLocation(), 705 &Ctx.Idents.get(std::string("arg") + llvm::to_string(I)), 706 getOSLogArgType(Ctx, Size), ImplicitParamDecl::Other); 707 } 708 709 FunctionArgList Args; 710 for (auto &P : Params) 711 Args.push_back(&P); 712 713 // The helper function has linkonce_odr linkage to enable the linker to merge 714 // identical functions. To ensure the merging always happens, 'noinline' is 715 // attached to the function when compiling with -Oz. 716 const CGFunctionInfo &FI = 717 CGM.getTypes().arrangeBuiltinFunctionDeclaration(Ctx.VoidTy, Args); 718 llvm::FunctionType *FuncTy = CGM.getTypes().GetFunctionType(FI); 719 llvm::Function *Fn = llvm::Function::Create( 720 FuncTy, llvm::GlobalValue::LinkOnceODRLinkage, Name, &CGM.getModule()); 721 Fn->setVisibility(llvm::GlobalValue::HiddenVisibility); 722 CGM.SetLLVMFunctionAttributes(nullptr, FI, Fn); 723 CGM.SetLLVMFunctionAttributesForDefinition(nullptr, Fn); 724 725 // Attach 'noinline' at -Oz. 726 if (CGM.getCodeGenOpts().OptimizeSize == 2) 727 Fn->addFnAttr(llvm::Attribute::NoInline); 728 729 auto NL = ApplyDebugLocation::CreateEmpty(*this); 730 IdentifierInfo *II = &Ctx.Idents.get(Name); 731 FunctionDecl *FD = FunctionDecl::Create( 732 Ctx, Ctx.getTranslationUnitDecl(), SourceLocation(), SourceLocation(), II, 733 Ctx.VoidTy, nullptr, SC_PrivateExtern, false, false); 734 735 StartFunction(FD, Ctx.VoidTy, Fn, FI, Args); 736 737 // Create a scope with an artificial location for the body of this function. 738 auto AL = ApplyDebugLocation::CreateArtificial(*this); 739 740 CharUnits Offset; 741 Address BufAddr(Builder.CreateLoad(GetAddrOfLocalVar(&Params[0]), "buf"), 742 BufferAlignment); 743 Builder.CreateStore(Builder.getInt8(Layout.getSummaryByte()), 744 Builder.CreateConstByteGEP(BufAddr, Offset++, "summary")); 745 Builder.CreateStore(Builder.getInt8(Layout.getNumArgsByte()), 746 Builder.CreateConstByteGEP(BufAddr, Offset++, "numArgs")); 747 748 unsigned I = 1; 749 for (const auto &Item : Layout.Items) { 750 Builder.CreateStore( 751 Builder.getInt8(Item.getDescriptorByte()), 752 Builder.CreateConstByteGEP(BufAddr, Offset++, "argDescriptor")); 753 Builder.CreateStore( 754 Builder.getInt8(Item.getSizeByte()), 755 Builder.CreateConstByteGEP(BufAddr, Offset++, "argSize")); 756 757 CharUnits Size = Item.size(); 758 if (!Size.getQuantity()) 759 continue; 760 761 Address Arg = GetAddrOfLocalVar(&Params[I]); 762 Address Addr = Builder.CreateConstByteGEP(BufAddr, Offset, "argData"); 763 Addr = Builder.CreateBitCast(Addr, Arg.getPointer()->getType(), 764 "argDataCast"); 765 Builder.CreateStore(Builder.CreateLoad(Arg), Addr); 766 Offset += Size; 767 ++I; 768 } 769 770 FinishFunction(); 771 772 return Fn; 773 } 774 775 RValue CodeGenFunction::emitBuiltinOSLogFormat(const CallExpr &E) { 776 assert(E.getNumArgs() >= 2 && 777 "__builtin_os_log_format takes at least 2 arguments"); 778 ASTContext &Ctx = getContext(); 779 analyze_os_log::OSLogBufferLayout Layout; 780 analyze_os_log::computeOSLogBufferLayout(Ctx, &E, Layout); 781 Address BufAddr = EmitPointerWithAlignment(E.getArg(0)); 782 llvm::SmallVector<llvm::Value *, 4> RetainableOperands; 783 784 // Ignore argument 1, the format string. It is not currently used. 785 CallArgList Args; 786 Args.add(RValue::get(BufAddr.getPointer()), Ctx.VoidPtrTy); 787 788 for (const auto &Item : Layout.Items) { 789 int Size = Item.getSizeByte(); 790 if (!Size) 791 continue; 792 793 llvm::Value *ArgVal; 794 795 if (const Expr *TheExpr = Item.getExpr()) { 796 ArgVal = EmitScalarExpr(TheExpr, /*Ignore*/ false); 797 798 // Check if this is a retainable type. 799 if (TheExpr->getType()->isObjCRetainableType()) { 800 assert(getEvaluationKind(TheExpr->getType()) == TEK_Scalar && 801 "Only scalar can be a ObjC retainable type"); 802 // Check if the object is constant, if not, save it in 803 // RetainableOperands. 804 if (!isa<Constant>(ArgVal)) 805 RetainableOperands.push_back(ArgVal); 806 } 807 } else { 808 ArgVal = Builder.getInt32(Item.getConstValue().getQuantity()); 809 } 810 811 unsigned ArgValSize = 812 CGM.getDataLayout().getTypeSizeInBits(ArgVal->getType()); 813 llvm::IntegerType *IntTy = llvm::Type::getIntNTy(getLLVMContext(), 814 ArgValSize); 815 ArgVal = Builder.CreateBitOrPointerCast(ArgVal, IntTy); 816 CanQualType ArgTy = getOSLogArgType(Ctx, Size); 817 // If ArgVal has type x86_fp80, zero-extend ArgVal. 818 ArgVal = Builder.CreateZExtOrBitCast(ArgVal, ConvertType(ArgTy)); 819 Args.add(RValue::get(ArgVal), ArgTy); 820 } 821 822 const CGFunctionInfo &FI = 823 CGM.getTypes().arrangeBuiltinFunctionCall(Ctx.VoidTy, Args); 824 llvm::Function *F = CodeGenFunction(CGM).generateBuiltinOSLogHelperFunction( 825 Layout, BufAddr.getAlignment()); 826 EmitCall(FI, CGCallee::forDirect(F), ReturnValueSlot(), Args); 827 828 // Push a clang.arc.use cleanup for each object in RetainableOperands. The 829 // cleanup will cause the use to appear after the final log call, keeping 830 // the object valid while it’s held in the log buffer. Note that if there’s 831 // a release cleanup on the object, it will already be active; since 832 // cleanups are emitted in reverse order, the use will occur before the 833 // object is released. 834 if (!RetainableOperands.empty() && getLangOpts().ObjCAutoRefCount && 835 CGM.getCodeGenOpts().OptimizationLevel != 0) 836 for (llvm::Value *Object : RetainableOperands) 837 pushFullExprCleanup<CallObjCArcUse>(getARCCleanupKind(), Object); 838 839 return RValue::get(BufAddr.getPointer()); 840 } 841 842 /// Determine if a binop is a checked mixed-sign multiply we can specialize. 843 static bool isSpecialMixedSignMultiply(unsigned BuiltinID, 844 WidthAndSignedness Op1Info, 845 WidthAndSignedness Op2Info, 846 WidthAndSignedness ResultInfo) { 847 return BuiltinID == Builtin::BI__builtin_mul_overflow && 848 Op1Info.Width == Op2Info.Width && Op1Info.Width >= ResultInfo.Width && 849 Op1Info.Signed != Op2Info.Signed; 850 } 851 852 /// Emit a checked mixed-sign multiply. This is a cheaper specialization of 853 /// the generic checked-binop irgen. 854 static RValue 855 EmitCheckedMixedSignMultiply(CodeGenFunction &CGF, const clang::Expr *Op1, 856 WidthAndSignedness Op1Info, const clang::Expr *Op2, 857 WidthAndSignedness Op2Info, 858 const clang::Expr *ResultArg, QualType ResultQTy, 859 WidthAndSignedness ResultInfo) { 860 assert(isSpecialMixedSignMultiply(Builtin::BI__builtin_mul_overflow, Op1Info, 861 Op2Info, ResultInfo) && 862 "Not a mixed-sign multipliction we can specialize"); 863 864 // Emit the signed and unsigned operands. 865 const clang::Expr *SignedOp = Op1Info.Signed ? Op1 : Op2; 866 const clang::Expr *UnsignedOp = Op1Info.Signed ? Op2 : Op1; 867 llvm::Value *Signed = CGF.EmitScalarExpr(SignedOp); 868 llvm::Value *Unsigned = CGF.EmitScalarExpr(UnsignedOp); 869 870 llvm::Type *OpTy = Signed->getType(); 871 llvm::Value *Zero = llvm::Constant::getNullValue(OpTy); 872 Address ResultPtr = CGF.EmitPointerWithAlignment(ResultArg); 873 llvm::Type *ResTy = ResultPtr.getElementType(); 874 875 // Take the absolute value of the signed operand. 876 llvm::Value *IsNegative = CGF.Builder.CreateICmpSLT(Signed, Zero); 877 llvm::Value *AbsOfNegative = CGF.Builder.CreateSub(Zero, Signed); 878 llvm::Value *AbsSigned = 879 CGF.Builder.CreateSelect(IsNegative, AbsOfNegative, Signed); 880 881 // Perform a checked unsigned multiplication. 882 llvm::Value *UnsignedOverflow; 883 llvm::Value *UnsignedResult = 884 EmitOverflowIntrinsic(CGF, llvm::Intrinsic::umul_with_overflow, AbsSigned, 885 Unsigned, UnsignedOverflow); 886 887 llvm::Value *Overflow, *Result; 888 if (ResultInfo.Signed) { 889 // Signed overflow occurs if the result is greater than INT_MAX or lesser 890 // than INT_MIN, i.e when |Result| > (INT_MAX + IsNegative). 891 auto IntMax = llvm::APInt::getSignedMaxValue(ResultInfo.Width) 892 .zextOrSelf(Op1Info.Width); 893 llvm::Value *MaxResult = 894 CGF.Builder.CreateAdd(llvm::ConstantInt::get(OpTy, IntMax), 895 CGF.Builder.CreateZExt(IsNegative, OpTy)); 896 llvm::Value *SignedOverflow = 897 CGF.Builder.CreateICmpUGT(UnsignedResult, MaxResult); 898 Overflow = CGF.Builder.CreateOr(UnsignedOverflow, SignedOverflow); 899 900 // Prepare the signed result (possibly by negating it). 901 llvm::Value *NegativeResult = CGF.Builder.CreateNeg(UnsignedResult); 902 llvm::Value *SignedResult = 903 CGF.Builder.CreateSelect(IsNegative, NegativeResult, UnsignedResult); 904 Result = CGF.Builder.CreateTrunc(SignedResult, ResTy); 905 } else { 906 // Unsigned overflow occurs if the result is < 0 or greater than UINT_MAX. 907 llvm::Value *Underflow = CGF.Builder.CreateAnd( 908 IsNegative, CGF.Builder.CreateIsNotNull(UnsignedResult)); 909 Overflow = CGF.Builder.CreateOr(UnsignedOverflow, Underflow); 910 if (ResultInfo.Width < Op1Info.Width) { 911 auto IntMax = 912 llvm::APInt::getMaxValue(ResultInfo.Width).zext(Op1Info.Width); 913 llvm::Value *TruncOverflow = CGF.Builder.CreateICmpUGT( 914 UnsignedResult, llvm::ConstantInt::get(OpTy, IntMax)); 915 Overflow = CGF.Builder.CreateOr(Overflow, TruncOverflow); 916 } 917 918 // Negate the product if it would be negative in infinite precision. 919 Result = CGF.Builder.CreateSelect( 920 IsNegative, CGF.Builder.CreateNeg(UnsignedResult), UnsignedResult); 921 922 Result = CGF.Builder.CreateTrunc(Result, ResTy); 923 } 924 assert(Overflow && Result && "Missing overflow or result"); 925 926 bool isVolatile = 927 ResultArg->getType()->getPointeeType().isVolatileQualified(); 928 CGF.Builder.CreateStore(CGF.EmitToMemory(Result, ResultQTy), ResultPtr, 929 isVolatile); 930 return RValue::get(Overflow); 931 } 932 933 RValue CodeGenFunction::EmitBuiltinExpr(const FunctionDecl *FD, 934 unsigned BuiltinID, const CallExpr *E, 935 ReturnValueSlot ReturnValue) { 936 // See if we can constant fold this builtin. If so, don't emit it at all. 937 Expr::EvalResult Result; 938 if (E->EvaluateAsRValue(Result, CGM.getContext()) && 939 !Result.hasSideEffects()) { 940 if (Result.Val.isInt()) 941 return RValue::get(llvm::ConstantInt::get(getLLVMContext(), 942 Result.Val.getInt())); 943 if (Result.Val.isFloat()) 944 return RValue::get(llvm::ConstantFP::get(getLLVMContext(), 945 Result.Val.getFloat())); 946 } 947 948 // There are LLVM math intrinsics/instructions corresponding to math library 949 // functions except the LLVM op will never set errno while the math library 950 // might. Also, math builtins have the same semantics as their math library 951 // twins. Thus, we can transform math library and builtin calls to their 952 // LLVM counterparts if the call is marked 'const' (known to never set errno). 953 if (FD->hasAttr<ConstAttr>()) { 954 switch (BuiltinID) { 955 case Builtin::BIceil: 956 case Builtin::BIceilf: 957 case Builtin::BIceill: 958 case Builtin::BI__builtin_ceil: 959 case Builtin::BI__builtin_ceilf: 960 case Builtin::BI__builtin_ceill: 961 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::ceil)); 962 963 case Builtin::BIcopysign: 964 case Builtin::BIcopysignf: 965 case Builtin::BIcopysignl: 966 case Builtin::BI__builtin_copysign: 967 case Builtin::BI__builtin_copysignf: 968 case Builtin::BI__builtin_copysignl: 969 case Builtin::BI__builtin_copysignf128: 970 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::copysign)); 971 972 case Builtin::BIcos: 973 case Builtin::BIcosf: 974 case Builtin::BIcosl: 975 case Builtin::BI__builtin_cos: 976 case Builtin::BI__builtin_cosf: 977 case Builtin::BI__builtin_cosl: 978 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::cos)); 979 980 case Builtin::BIexp: 981 case Builtin::BIexpf: 982 case Builtin::BIexpl: 983 case Builtin::BI__builtin_exp: 984 case Builtin::BI__builtin_expf: 985 case Builtin::BI__builtin_expl: 986 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::exp)); 987 988 case Builtin::BIexp2: 989 case Builtin::BIexp2f: 990 case Builtin::BIexp2l: 991 case Builtin::BI__builtin_exp2: 992 case Builtin::BI__builtin_exp2f: 993 case Builtin::BI__builtin_exp2l: 994 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::exp2)); 995 996 case Builtin::BIfabs: 997 case Builtin::BIfabsf: 998 case Builtin::BIfabsl: 999 case Builtin::BI__builtin_fabs: 1000 case Builtin::BI__builtin_fabsf: 1001 case Builtin::BI__builtin_fabsl: 1002 case Builtin::BI__builtin_fabsf128: 1003 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::fabs)); 1004 1005 case Builtin::BIfloor: 1006 case Builtin::BIfloorf: 1007 case Builtin::BIfloorl: 1008 case Builtin::BI__builtin_floor: 1009 case Builtin::BI__builtin_floorf: 1010 case Builtin::BI__builtin_floorl: 1011 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::floor)); 1012 1013 case Builtin::BIfma: 1014 case Builtin::BIfmaf: 1015 case Builtin::BIfmal: 1016 case Builtin::BI__builtin_fma: 1017 case Builtin::BI__builtin_fmaf: 1018 case Builtin::BI__builtin_fmal: 1019 return RValue::get(emitTernaryBuiltin(*this, E, Intrinsic::fma)); 1020 1021 case Builtin::BIfmax: 1022 case Builtin::BIfmaxf: 1023 case Builtin::BIfmaxl: 1024 case Builtin::BI__builtin_fmax: 1025 case Builtin::BI__builtin_fmaxf: 1026 case Builtin::BI__builtin_fmaxl: 1027 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::maxnum)); 1028 1029 case Builtin::BIfmin: 1030 case Builtin::BIfminf: 1031 case Builtin::BIfminl: 1032 case Builtin::BI__builtin_fmin: 1033 case Builtin::BI__builtin_fminf: 1034 case Builtin::BI__builtin_fminl: 1035 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::minnum)); 1036 1037 // fmod() is a special-case. It maps to the frem instruction rather than an 1038 // LLVM intrinsic. 1039 case Builtin::BIfmod: 1040 case Builtin::BIfmodf: 1041 case Builtin::BIfmodl: 1042 case Builtin::BI__builtin_fmod: 1043 case Builtin::BI__builtin_fmodf: 1044 case Builtin::BI__builtin_fmodl: { 1045 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 1046 Value *Arg2 = EmitScalarExpr(E->getArg(1)); 1047 return RValue::get(Builder.CreateFRem(Arg1, Arg2, "fmod")); 1048 } 1049 1050 case Builtin::BIlog: 1051 case Builtin::BIlogf: 1052 case Builtin::BIlogl: 1053 case Builtin::BI__builtin_log: 1054 case Builtin::BI__builtin_logf: 1055 case Builtin::BI__builtin_logl: 1056 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::log)); 1057 1058 case Builtin::BIlog10: 1059 case Builtin::BIlog10f: 1060 case Builtin::BIlog10l: 1061 case Builtin::BI__builtin_log10: 1062 case Builtin::BI__builtin_log10f: 1063 case Builtin::BI__builtin_log10l: 1064 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::log10)); 1065 1066 case Builtin::BIlog2: 1067 case Builtin::BIlog2f: 1068 case Builtin::BIlog2l: 1069 case Builtin::BI__builtin_log2: 1070 case Builtin::BI__builtin_log2f: 1071 case Builtin::BI__builtin_log2l: 1072 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::log2)); 1073 1074 case Builtin::BInearbyint: 1075 case Builtin::BInearbyintf: 1076 case Builtin::BInearbyintl: 1077 case Builtin::BI__builtin_nearbyint: 1078 case Builtin::BI__builtin_nearbyintf: 1079 case Builtin::BI__builtin_nearbyintl: 1080 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::nearbyint)); 1081 1082 case Builtin::BIpow: 1083 case Builtin::BIpowf: 1084 case Builtin::BIpowl: 1085 case Builtin::BI__builtin_pow: 1086 case Builtin::BI__builtin_powf: 1087 case Builtin::BI__builtin_powl: 1088 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::pow)); 1089 1090 case Builtin::BIrint: 1091 case Builtin::BIrintf: 1092 case Builtin::BIrintl: 1093 case Builtin::BI__builtin_rint: 1094 case Builtin::BI__builtin_rintf: 1095 case Builtin::BI__builtin_rintl: 1096 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::rint)); 1097 1098 case Builtin::BIround: 1099 case Builtin::BIroundf: 1100 case Builtin::BIroundl: 1101 case Builtin::BI__builtin_round: 1102 case Builtin::BI__builtin_roundf: 1103 case Builtin::BI__builtin_roundl: 1104 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::round)); 1105 1106 case Builtin::BIsin: 1107 case Builtin::BIsinf: 1108 case Builtin::BIsinl: 1109 case Builtin::BI__builtin_sin: 1110 case Builtin::BI__builtin_sinf: 1111 case Builtin::BI__builtin_sinl: 1112 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::sin)); 1113 1114 case Builtin::BIsqrt: 1115 case Builtin::BIsqrtf: 1116 case Builtin::BIsqrtl: 1117 case Builtin::BI__builtin_sqrt: 1118 case Builtin::BI__builtin_sqrtf: 1119 case Builtin::BI__builtin_sqrtl: 1120 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::sqrt)); 1121 1122 case Builtin::BItrunc: 1123 case Builtin::BItruncf: 1124 case Builtin::BItruncl: 1125 case Builtin::BI__builtin_trunc: 1126 case Builtin::BI__builtin_truncf: 1127 case Builtin::BI__builtin_truncl: 1128 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::trunc)); 1129 1130 default: 1131 break; 1132 } 1133 } 1134 1135 switch (BuiltinID) { 1136 default: break; 1137 case Builtin::BI__builtin___CFStringMakeConstantString: 1138 case Builtin::BI__builtin___NSStringMakeConstantString: 1139 return RValue::get(ConstantEmitter(*this).emitAbstract(E, E->getType())); 1140 case Builtin::BI__builtin_stdarg_start: 1141 case Builtin::BI__builtin_va_start: 1142 case Builtin::BI__va_start: 1143 case Builtin::BI__builtin_va_end: 1144 return RValue::get( 1145 EmitVAStartEnd(BuiltinID == Builtin::BI__va_start 1146 ? EmitScalarExpr(E->getArg(0)) 1147 : EmitVAListRef(E->getArg(0)).getPointer(), 1148 BuiltinID != Builtin::BI__builtin_va_end)); 1149 case Builtin::BI__builtin_va_copy: { 1150 Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer(); 1151 Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer(); 1152 1153 llvm::Type *Type = Int8PtrTy; 1154 1155 DstPtr = Builder.CreateBitCast(DstPtr, Type); 1156 SrcPtr = Builder.CreateBitCast(SrcPtr, Type); 1157 return RValue::get(Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), 1158 {DstPtr, SrcPtr})); 1159 } 1160 case Builtin::BI__builtin_abs: 1161 case Builtin::BI__builtin_labs: 1162 case Builtin::BI__builtin_llabs: { 1163 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1164 1165 Value *NegOp = Builder.CreateNeg(ArgValue, "neg"); 1166 Value *CmpResult = 1167 Builder.CreateICmpSGE(ArgValue, 1168 llvm::Constant::getNullValue(ArgValue->getType()), 1169 "abscond"); 1170 Value *Result = 1171 Builder.CreateSelect(CmpResult, ArgValue, NegOp, "abs"); 1172 1173 return RValue::get(Result); 1174 } 1175 case Builtin::BI__builtin_conj: 1176 case Builtin::BI__builtin_conjf: 1177 case Builtin::BI__builtin_conjl: { 1178 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 1179 Value *Real = ComplexVal.first; 1180 Value *Imag = ComplexVal.second; 1181 Value *Zero = 1182 Imag->getType()->isFPOrFPVectorTy() 1183 ? llvm::ConstantFP::getZeroValueForNegation(Imag->getType()) 1184 : llvm::Constant::getNullValue(Imag->getType()); 1185 1186 Imag = Builder.CreateFSub(Zero, Imag, "sub"); 1187 return RValue::getComplex(std::make_pair(Real, Imag)); 1188 } 1189 case Builtin::BI__builtin_creal: 1190 case Builtin::BI__builtin_crealf: 1191 case Builtin::BI__builtin_creall: 1192 case Builtin::BIcreal: 1193 case Builtin::BIcrealf: 1194 case Builtin::BIcreall: { 1195 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 1196 return RValue::get(ComplexVal.first); 1197 } 1198 1199 case Builtin::BI__builtin_cimag: 1200 case Builtin::BI__builtin_cimagf: 1201 case Builtin::BI__builtin_cimagl: 1202 case Builtin::BIcimag: 1203 case Builtin::BIcimagf: 1204 case Builtin::BIcimagl: { 1205 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 1206 return RValue::get(ComplexVal.second); 1207 } 1208 1209 case Builtin::BI__builtin_ctzs: 1210 case Builtin::BI__builtin_ctz: 1211 case Builtin::BI__builtin_ctzl: 1212 case Builtin::BI__builtin_ctzll: { 1213 Value *ArgValue = EmitCheckedArgForBuiltin(E->getArg(0), BCK_CTZPassedZero); 1214 1215 llvm::Type *ArgType = ArgValue->getType(); 1216 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 1217 1218 llvm::Type *ResultType = ConvertType(E->getType()); 1219 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 1220 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 1221 if (Result->getType() != ResultType) 1222 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1223 "cast"); 1224 return RValue::get(Result); 1225 } 1226 case Builtin::BI__builtin_clzs: 1227 case Builtin::BI__builtin_clz: 1228 case Builtin::BI__builtin_clzl: 1229 case Builtin::BI__builtin_clzll: { 1230 Value *ArgValue = EmitCheckedArgForBuiltin(E->getArg(0), BCK_CLZPassedZero); 1231 1232 llvm::Type *ArgType = ArgValue->getType(); 1233 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 1234 1235 llvm::Type *ResultType = ConvertType(E->getType()); 1236 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 1237 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 1238 if (Result->getType() != ResultType) 1239 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1240 "cast"); 1241 return RValue::get(Result); 1242 } 1243 case Builtin::BI__builtin_ffs: 1244 case Builtin::BI__builtin_ffsl: 1245 case Builtin::BI__builtin_ffsll: { 1246 // ffs(x) -> x ? cttz(x) + 1 : 0 1247 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1248 1249 llvm::Type *ArgType = ArgValue->getType(); 1250 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 1251 1252 llvm::Type *ResultType = ConvertType(E->getType()); 1253 Value *Tmp = 1254 Builder.CreateAdd(Builder.CreateCall(F, {ArgValue, Builder.getTrue()}), 1255 llvm::ConstantInt::get(ArgType, 1)); 1256 Value *Zero = llvm::Constant::getNullValue(ArgType); 1257 Value *IsZero = Builder.CreateICmpEQ(ArgValue, Zero, "iszero"); 1258 Value *Result = Builder.CreateSelect(IsZero, Zero, Tmp, "ffs"); 1259 if (Result->getType() != ResultType) 1260 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1261 "cast"); 1262 return RValue::get(Result); 1263 } 1264 case Builtin::BI__builtin_parity: 1265 case Builtin::BI__builtin_parityl: 1266 case Builtin::BI__builtin_parityll: { 1267 // parity(x) -> ctpop(x) & 1 1268 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1269 1270 llvm::Type *ArgType = ArgValue->getType(); 1271 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 1272 1273 llvm::Type *ResultType = ConvertType(E->getType()); 1274 Value *Tmp = Builder.CreateCall(F, ArgValue); 1275 Value *Result = Builder.CreateAnd(Tmp, llvm::ConstantInt::get(ArgType, 1)); 1276 if (Result->getType() != ResultType) 1277 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1278 "cast"); 1279 return RValue::get(Result); 1280 } 1281 case Builtin::BI__popcnt16: 1282 case Builtin::BI__popcnt: 1283 case Builtin::BI__popcnt64: 1284 case Builtin::BI__builtin_popcount: 1285 case Builtin::BI__builtin_popcountl: 1286 case Builtin::BI__builtin_popcountll: { 1287 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1288 1289 llvm::Type *ArgType = ArgValue->getType(); 1290 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 1291 1292 llvm::Type *ResultType = ConvertType(E->getType()); 1293 Value *Result = Builder.CreateCall(F, ArgValue); 1294 if (Result->getType() != ResultType) 1295 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1296 "cast"); 1297 return RValue::get(Result); 1298 } 1299 case Builtin::BI_rotr8: 1300 case Builtin::BI_rotr16: 1301 case Builtin::BI_rotr: 1302 case Builtin::BI_lrotr: 1303 case Builtin::BI_rotr64: { 1304 Value *Val = EmitScalarExpr(E->getArg(0)); 1305 Value *Shift = EmitScalarExpr(E->getArg(1)); 1306 1307 llvm::Type *ArgType = Val->getType(); 1308 Shift = Builder.CreateIntCast(Shift, ArgType, false); 1309 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 1310 Value *ArgTypeSize = llvm::ConstantInt::get(ArgType, ArgWidth); 1311 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 1312 1313 Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1); 1314 Shift = Builder.CreateAnd(Shift, Mask); 1315 Value *LeftShift = Builder.CreateSub(ArgTypeSize, Shift); 1316 1317 Value *RightShifted = Builder.CreateLShr(Val, Shift); 1318 Value *LeftShifted = Builder.CreateShl(Val, LeftShift); 1319 Value *Rotated = Builder.CreateOr(LeftShifted, RightShifted); 1320 1321 Value *ShiftIsZero = Builder.CreateICmpEQ(Shift, ArgZero); 1322 Value *Result = Builder.CreateSelect(ShiftIsZero, Val, Rotated); 1323 return RValue::get(Result); 1324 } 1325 case Builtin::BI_rotl8: 1326 case Builtin::BI_rotl16: 1327 case Builtin::BI_rotl: 1328 case Builtin::BI_lrotl: 1329 case Builtin::BI_rotl64: { 1330 Value *Val = EmitScalarExpr(E->getArg(0)); 1331 Value *Shift = EmitScalarExpr(E->getArg(1)); 1332 1333 llvm::Type *ArgType = Val->getType(); 1334 Shift = Builder.CreateIntCast(Shift, ArgType, false); 1335 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 1336 Value *ArgTypeSize = llvm::ConstantInt::get(ArgType, ArgWidth); 1337 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 1338 1339 Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1); 1340 Shift = Builder.CreateAnd(Shift, Mask); 1341 Value *RightShift = Builder.CreateSub(ArgTypeSize, Shift); 1342 1343 Value *LeftShifted = Builder.CreateShl(Val, Shift); 1344 Value *RightShifted = Builder.CreateLShr(Val, RightShift); 1345 Value *Rotated = Builder.CreateOr(LeftShifted, RightShifted); 1346 1347 Value *ShiftIsZero = Builder.CreateICmpEQ(Shift, ArgZero); 1348 Value *Result = Builder.CreateSelect(ShiftIsZero, Val, Rotated); 1349 return RValue::get(Result); 1350 } 1351 case Builtin::BI__builtin_unpredictable: { 1352 // Always return the argument of __builtin_unpredictable. LLVM does not 1353 // handle this builtin. Metadata for this builtin should be added directly 1354 // to instructions such as branches or switches that use it. 1355 return RValue::get(EmitScalarExpr(E->getArg(0))); 1356 } 1357 case Builtin::BI__builtin_expect: { 1358 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1359 llvm::Type *ArgType = ArgValue->getType(); 1360 1361 Value *ExpectedValue = EmitScalarExpr(E->getArg(1)); 1362 // Don't generate llvm.expect on -O0 as the backend won't use it for 1363 // anything. 1364 // Note, we still IRGen ExpectedValue because it could have side-effects. 1365 if (CGM.getCodeGenOpts().OptimizationLevel == 0) 1366 return RValue::get(ArgValue); 1367 1368 Value *FnExpect = CGM.getIntrinsic(Intrinsic::expect, ArgType); 1369 Value *Result = 1370 Builder.CreateCall(FnExpect, {ArgValue, ExpectedValue}, "expval"); 1371 return RValue::get(Result); 1372 } 1373 case Builtin::BI__builtin_assume_aligned: { 1374 Value *PtrValue = EmitScalarExpr(E->getArg(0)); 1375 Value *OffsetValue = 1376 (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : nullptr; 1377 1378 Value *AlignmentValue = EmitScalarExpr(E->getArg(1)); 1379 ConstantInt *AlignmentCI = cast<ConstantInt>(AlignmentValue); 1380 unsigned Alignment = (unsigned) AlignmentCI->getZExtValue(); 1381 1382 EmitAlignmentAssumption(PtrValue, Alignment, OffsetValue); 1383 return RValue::get(PtrValue); 1384 } 1385 case Builtin::BI__assume: 1386 case Builtin::BI__builtin_assume: { 1387 if (E->getArg(0)->HasSideEffects(getContext())) 1388 return RValue::get(nullptr); 1389 1390 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1391 Value *FnAssume = CGM.getIntrinsic(Intrinsic::assume); 1392 return RValue::get(Builder.CreateCall(FnAssume, ArgValue)); 1393 } 1394 case Builtin::BI__builtin_bswap16: 1395 case Builtin::BI__builtin_bswap32: 1396 case Builtin::BI__builtin_bswap64: { 1397 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bswap)); 1398 } 1399 case Builtin::BI__builtin_bitreverse8: 1400 case Builtin::BI__builtin_bitreverse16: 1401 case Builtin::BI__builtin_bitreverse32: 1402 case Builtin::BI__builtin_bitreverse64: { 1403 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bitreverse)); 1404 } 1405 case Builtin::BI__builtin_object_size: { 1406 unsigned Type = 1407 E->getArg(1)->EvaluateKnownConstInt(getContext()).getZExtValue(); 1408 auto *ResType = cast<llvm::IntegerType>(ConvertType(E->getType())); 1409 1410 // We pass this builtin onto the optimizer so that it can figure out the 1411 // object size in more complex cases. 1412 return RValue::get(emitBuiltinObjectSize(E->getArg(0), Type, ResType, 1413 /*EmittedE=*/nullptr)); 1414 } 1415 case Builtin::BI__builtin_prefetch: { 1416 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); 1417 // FIXME: Technically these constants should of type 'int', yes? 1418 RW = (E->getNumArgs() > 1) ? EmitScalarExpr(E->getArg(1)) : 1419 llvm::ConstantInt::get(Int32Ty, 0); 1420 Locality = (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : 1421 llvm::ConstantInt::get(Int32Ty, 3); 1422 Value *Data = llvm::ConstantInt::get(Int32Ty, 1); 1423 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 1424 return RValue::get(Builder.CreateCall(F, {Address, RW, Locality, Data})); 1425 } 1426 case Builtin::BI__builtin_readcyclecounter: { 1427 Value *F = CGM.getIntrinsic(Intrinsic::readcyclecounter); 1428 return RValue::get(Builder.CreateCall(F)); 1429 } 1430 case Builtin::BI__builtin___clear_cache: { 1431 Value *Begin = EmitScalarExpr(E->getArg(0)); 1432 Value *End = EmitScalarExpr(E->getArg(1)); 1433 Value *F = CGM.getIntrinsic(Intrinsic::clear_cache); 1434 return RValue::get(Builder.CreateCall(F, {Begin, End})); 1435 } 1436 case Builtin::BI__builtin_trap: 1437 return RValue::get(EmitTrapCall(Intrinsic::trap)); 1438 case Builtin::BI__debugbreak: 1439 return RValue::get(EmitTrapCall(Intrinsic::debugtrap)); 1440 case Builtin::BI__builtin_unreachable: { 1441 EmitUnreachable(E->getExprLoc()); 1442 1443 // We do need to preserve an insertion point. 1444 EmitBlock(createBasicBlock("unreachable.cont")); 1445 1446 return RValue::get(nullptr); 1447 } 1448 1449 case Builtin::BI__builtin_powi: 1450 case Builtin::BI__builtin_powif: 1451 case Builtin::BI__builtin_powil: { 1452 Value *Base = EmitScalarExpr(E->getArg(0)); 1453 Value *Exponent = EmitScalarExpr(E->getArg(1)); 1454 llvm::Type *ArgType = Base->getType(); 1455 Value *F = CGM.getIntrinsic(Intrinsic::powi, ArgType); 1456 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 1457 } 1458 1459 case Builtin::BI__builtin_isgreater: 1460 case Builtin::BI__builtin_isgreaterequal: 1461 case Builtin::BI__builtin_isless: 1462 case Builtin::BI__builtin_islessequal: 1463 case Builtin::BI__builtin_islessgreater: 1464 case Builtin::BI__builtin_isunordered: { 1465 // Ordered comparisons: we know the arguments to these are matching scalar 1466 // floating point values. 1467 Value *LHS = EmitScalarExpr(E->getArg(0)); 1468 Value *RHS = EmitScalarExpr(E->getArg(1)); 1469 1470 switch (BuiltinID) { 1471 default: llvm_unreachable("Unknown ordered comparison"); 1472 case Builtin::BI__builtin_isgreater: 1473 LHS = Builder.CreateFCmpOGT(LHS, RHS, "cmp"); 1474 break; 1475 case Builtin::BI__builtin_isgreaterequal: 1476 LHS = Builder.CreateFCmpOGE(LHS, RHS, "cmp"); 1477 break; 1478 case Builtin::BI__builtin_isless: 1479 LHS = Builder.CreateFCmpOLT(LHS, RHS, "cmp"); 1480 break; 1481 case Builtin::BI__builtin_islessequal: 1482 LHS = Builder.CreateFCmpOLE(LHS, RHS, "cmp"); 1483 break; 1484 case Builtin::BI__builtin_islessgreater: 1485 LHS = Builder.CreateFCmpONE(LHS, RHS, "cmp"); 1486 break; 1487 case Builtin::BI__builtin_isunordered: 1488 LHS = Builder.CreateFCmpUNO(LHS, RHS, "cmp"); 1489 break; 1490 } 1491 // ZExt bool to int type. 1492 return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType()))); 1493 } 1494 case Builtin::BI__builtin_isnan: { 1495 Value *V = EmitScalarExpr(E->getArg(0)); 1496 V = Builder.CreateFCmpUNO(V, V, "cmp"); 1497 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 1498 } 1499 1500 case Builtin::BIfinite: 1501 case Builtin::BI__finite: 1502 case Builtin::BIfinitef: 1503 case Builtin::BI__finitef: 1504 case Builtin::BIfinitel: 1505 case Builtin::BI__finitel: 1506 case Builtin::BI__builtin_isinf: 1507 case Builtin::BI__builtin_isfinite: { 1508 // isinf(x) --> fabs(x) == infinity 1509 // isfinite(x) --> fabs(x) != infinity 1510 // x != NaN via the ordered compare in either case. 1511 Value *V = EmitScalarExpr(E->getArg(0)); 1512 Value *Fabs = EmitFAbs(*this, V); 1513 Constant *Infinity = ConstantFP::getInfinity(V->getType()); 1514 CmpInst::Predicate Pred = (BuiltinID == Builtin::BI__builtin_isinf) 1515 ? CmpInst::FCMP_OEQ 1516 : CmpInst::FCMP_ONE; 1517 Value *FCmp = Builder.CreateFCmp(Pred, Fabs, Infinity, "cmpinf"); 1518 return RValue::get(Builder.CreateZExt(FCmp, ConvertType(E->getType()))); 1519 } 1520 1521 case Builtin::BI__builtin_isinf_sign: { 1522 // isinf_sign(x) -> fabs(x) == infinity ? (signbit(x) ? -1 : 1) : 0 1523 Value *Arg = EmitScalarExpr(E->getArg(0)); 1524 Value *AbsArg = EmitFAbs(*this, Arg); 1525 Value *IsInf = Builder.CreateFCmpOEQ( 1526 AbsArg, ConstantFP::getInfinity(Arg->getType()), "isinf"); 1527 Value *IsNeg = EmitSignBit(*this, Arg); 1528 1529 llvm::Type *IntTy = ConvertType(E->getType()); 1530 Value *Zero = Constant::getNullValue(IntTy); 1531 Value *One = ConstantInt::get(IntTy, 1); 1532 Value *NegativeOne = ConstantInt::get(IntTy, -1); 1533 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); 1534 Value *Result = Builder.CreateSelect(IsInf, SignResult, Zero); 1535 return RValue::get(Result); 1536 } 1537 1538 case Builtin::BI__builtin_isnormal: { 1539 // isnormal(x) --> x == x && fabsf(x) < infinity && fabsf(x) >= float_min 1540 Value *V = EmitScalarExpr(E->getArg(0)); 1541 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 1542 1543 Value *Abs = EmitFAbs(*this, V); 1544 Value *IsLessThanInf = 1545 Builder.CreateFCmpULT(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 1546 APFloat Smallest = APFloat::getSmallestNormalized( 1547 getContext().getFloatTypeSemantics(E->getArg(0)->getType())); 1548 Value *IsNormal = 1549 Builder.CreateFCmpUGE(Abs, ConstantFP::get(V->getContext(), Smallest), 1550 "isnormal"); 1551 V = Builder.CreateAnd(Eq, IsLessThanInf, "and"); 1552 V = Builder.CreateAnd(V, IsNormal, "and"); 1553 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 1554 } 1555 1556 case Builtin::BI__builtin_fpclassify: { 1557 Value *V = EmitScalarExpr(E->getArg(5)); 1558 llvm::Type *Ty = ConvertType(E->getArg(5)->getType()); 1559 1560 // Create Result 1561 BasicBlock *Begin = Builder.GetInsertBlock(); 1562 BasicBlock *End = createBasicBlock("fpclassify_end", this->CurFn); 1563 Builder.SetInsertPoint(End); 1564 PHINode *Result = 1565 Builder.CreatePHI(ConvertType(E->getArg(0)->getType()), 4, 1566 "fpclassify_result"); 1567 1568 // if (V==0) return FP_ZERO 1569 Builder.SetInsertPoint(Begin); 1570 Value *IsZero = Builder.CreateFCmpOEQ(V, Constant::getNullValue(Ty), 1571 "iszero"); 1572 Value *ZeroLiteral = EmitScalarExpr(E->getArg(4)); 1573 BasicBlock *NotZero = createBasicBlock("fpclassify_not_zero", this->CurFn); 1574 Builder.CreateCondBr(IsZero, End, NotZero); 1575 Result->addIncoming(ZeroLiteral, Begin); 1576 1577 // if (V != V) return FP_NAN 1578 Builder.SetInsertPoint(NotZero); 1579 Value *IsNan = Builder.CreateFCmpUNO(V, V, "cmp"); 1580 Value *NanLiteral = EmitScalarExpr(E->getArg(0)); 1581 BasicBlock *NotNan = createBasicBlock("fpclassify_not_nan", this->CurFn); 1582 Builder.CreateCondBr(IsNan, End, NotNan); 1583 Result->addIncoming(NanLiteral, NotZero); 1584 1585 // if (fabs(V) == infinity) return FP_INFINITY 1586 Builder.SetInsertPoint(NotNan); 1587 Value *VAbs = EmitFAbs(*this, V); 1588 Value *IsInf = 1589 Builder.CreateFCmpOEQ(VAbs, ConstantFP::getInfinity(V->getType()), 1590 "isinf"); 1591 Value *InfLiteral = EmitScalarExpr(E->getArg(1)); 1592 BasicBlock *NotInf = createBasicBlock("fpclassify_not_inf", this->CurFn); 1593 Builder.CreateCondBr(IsInf, End, NotInf); 1594 Result->addIncoming(InfLiteral, NotNan); 1595 1596 // if (fabs(V) >= MIN_NORMAL) return FP_NORMAL else FP_SUBNORMAL 1597 Builder.SetInsertPoint(NotInf); 1598 APFloat Smallest = APFloat::getSmallestNormalized( 1599 getContext().getFloatTypeSemantics(E->getArg(5)->getType())); 1600 Value *IsNormal = 1601 Builder.CreateFCmpUGE(VAbs, ConstantFP::get(V->getContext(), Smallest), 1602 "isnormal"); 1603 Value *NormalResult = 1604 Builder.CreateSelect(IsNormal, EmitScalarExpr(E->getArg(2)), 1605 EmitScalarExpr(E->getArg(3))); 1606 Builder.CreateBr(End); 1607 Result->addIncoming(NormalResult, NotInf); 1608 1609 // return Result 1610 Builder.SetInsertPoint(End); 1611 return RValue::get(Result); 1612 } 1613 1614 case Builtin::BIalloca: 1615 case Builtin::BI_alloca: 1616 case Builtin::BI__builtin_alloca: { 1617 Value *Size = EmitScalarExpr(E->getArg(0)); 1618 const TargetInfo &TI = getContext().getTargetInfo(); 1619 // The alignment of the alloca should correspond to __BIGGEST_ALIGNMENT__. 1620 unsigned SuitableAlignmentInBytes = 1621 CGM.getContext() 1622 .toCharUnitsFromBits(TI.getSuitableAlign()) 1623 .getQuantity(); 1624 AllocaInst *AI = Builder.CreateAlloca(Builder.getInt8Ty(), Size); 1625 AI->setAlignment(SuitableAlignmentInBytes); 1626 return RValue::get(AI); 1627 } 1628 1629 case Builtin::BI__builtin_alloca_with_align: { 1630 Value *Size = EmitScalarExpr(E->getArg(0)); 1631 Value *AlignmentInBitsValue = EmitScalarExpr(E->getArg(1)); 1632 auto *AlignmentInBitsCI = cast<ConstantInt>(AlignmentInBitsValue); 1633 unsigned AlignmentInBits = AlignmentInBitsCI->getZExtValue(); 1634 unsigned AlignmentInBytes = 1635 CGM.getContext().toCharUnitsFromBits(AlignmentInBits).getQuantity(); 1636 AllocaInst *AI = Builder.CreateAlloca(Builder.getInt8Ty(), Size); 1637 AI->setAlignment(AlignmentInBytes); 1638 return RValue::get(AI); 1639 } 1640 1641 case Builtin::BIbzero: 1642 case Builtin::BI__builtin_bzero: { 1643 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1644 Value *SizeVal = EmitScalarExpr(E->getArg(1)); 1645 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1646 E->getArg(0)->getExprLoc(), FD, 0); 1647 Builder.CreateMemSet(Dest, Builder.getInt8(0), SizeVal, false); 1648 return RValue::get(nullptr); 1649 } 1650 case Builtin::BImemcpy: 1651 case Builtin::BI__builtin_memcpy: { 1652 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1653 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1654 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1655 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1656 E->getArg(0)->getExprLoc(), FD, 0); 1657 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 1658 E->getArg(1)->getExprLoc(), FD, 1); 1659 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 1660 return RValue::get(Dest.getPointer()); 1661 } 1662 1663 case Builtin::BI__builtin_char_memchr: 1664 BuiltinID = Builtin::BI__builtin_memchr; 1665 break; 1666 1667 case Builtin::BI__builtin___memcpy_chk: { 1668 // fold __builtin_memcpy_chk(x, y, cst1, cst2) to memcpy iff cst1<=cst2. 1669 llvm::APSInt Size, DstSize; 1670 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1671 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1672 break; 1673 if (Size.ugt(DstSize)) 1674 break; 1675 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1676 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1677 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1678 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 1679 return RValue::get(Dest.getPointer()); 1680 } 1681 1682 case Builtin::BI__builtin_objc_memmove_collectable: { 1683 Address DestAddr = EmitPointerWithAlignment(E->getArg(0)); 1684 Address SrcAddr = EmitPointerWithAlignment(E->getArg(1)); 1685 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1686 CGM.getObjCRuntime().EmitGCMemmoveCollectable(*this, 1687 DestAddr, SrcAddr, SizeVal); 1688 return RValue::get(DestAddr.getPointer()); 1689 } 1690 1691 case Builtin::BI__builtin___memmove_chk: { 1692 // fold __builtin_memmove_chk(x, y, cst1, cst2) to memmove iff cst1<=cst2. 1693 llvm::APSInt Size, DstSize; 1694 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1695 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1696 break; 1697 if (Size.ugt(DstSize)) 1698 break; 1699 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1700 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1701 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1702 Builder.CreateMemMove(Dest, Src, SizeVal, false); 1703 return RValue::get(Dest.getPointer()); 1704 } 1705 1706 case Builtin::BImemmove: 1707 case Builtin::BI__builtin_memmove: { 1708 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1709 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1710 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1711 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1712 E->getArg(0)->getExprLoc(), FD, 0); 1713 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 1714 E->getArg(1)->getExprLoc(), FD, 1); 1715 Builder.CreateMemMove(Dest, Src, SizeVal, false); 1716 return RValue::get(Dest.getPointer()); 1717 } 1718 case Builtin::BImemset: 1719 case Builtin::BI__builtin_memset: { 1720 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1721 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 1722 Builder.getInt8Ty()); 1723 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1724 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1725 E->getArg(0)->getExprLoc(), FD, 0); 1726 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 1727 return RValue::get(Dest.getPointer()); 1728 } 1729 case Builtin::BI__builtin___memset_chk: { 1730 // fold __builtin_memset_chk(x, y, cst1, cst2) to memset iff cst1<=cst2. 1731 llvm::APSInt Size, DstSize; 1732 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1733 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1734 break; 1735 if (Size.ugt(DstSize)) 1736 break; 1737 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1738 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 1739 Builder.getInt8Ty()); 1740 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1741 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 1742 return RValue::get(Dest.getPointer()); 1743 } 1744 case Builtin::BI__builtin_dwarf_cfa: { 1745 // The offset in bytes from the first argument to the CFA. 1746 // 1747 // Why on earth is this in the frontend? Is there any reason at 1748 // all that the backend can't reasonably determine this while 1749 // lowering llvm.eh.dwarf.cfa()? 1750 // 1751 // TODO: If there's a satisfactory reason, add a target hook for 1752 // this instead of hard-coding 0, which is correct for most targets. 1753 int32_t Offset = 0; 1754 1755 Value *F = CGM.getIntrinsic(Intrinsic::eh_dwarf_cfa); 1756 return RValue::get(Builder.CreateCall(F, 1757 llvm::ConstantInt::get(Int32Ty, Offset))); 1758 } 1759 case Builtin::BI__builtin_return_address: { 1760 Value *Depth = ConstantEmitter(*this).emitAbstract(E->getArg(0), 1761 getContext().UnsignedIntTy); 1762 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 1763 return RValue::get(Builder.CreateCall(F, Depth)); 1764 } 1765 case Builtin::BI_ReturnAddress: { 1766 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 1767 return RValue::get(Builder.CreateCall(F, Builder.getInt32(0))); 1768 } 1769 case Builtin::BI__builtin_frame_address: { 1770 Value *Depth = ConstantEmitter(*this).emitAbstract(E->getArg(0), 1771 getContext().UnsignedIntTy); 1772 Value *F = CGM.getIntrinsic(Intrinsic::frameaddress); 1773 return RValue::get(Builder.CreateCall(F, Depth)); 1774 } 1775 case Builtin::BI__builtin_extract_return_addr: { 1776 Value *Address = EmitScalarExpr(E->getArg(0)); 1777 Value *Result = getTargetHooks().decodeReturnAddress(*this, Address); 1778 return RValue::get(Result); 1779 } 1780 case Builtin::BI__builtin_frob_return_addr: { 1781 Value *Address = EmitScalarExpr(E->getArg(0)); 1782 Value *Result = getTargetHooks().encodeReturnAddress(*this, Address); 1783 return RValue::get(Result); 1784 } 1785 case Builtin::BI__builtin_dwarf_sp_column: { 1786 llvm::IntegerType *Ty 1787 = cast<llvm::IntegerType>(ConvertType(E->getType())); 1788 int Column = getTargetHooks().getDwarfEHStackPointer(CGM); 1789 if (Column == -1) { 1790 CGM.ErrorUnsupported(E, "__builtin_dwarf_sp_column"); 1791 return RValue::get(llvm::UndefValue::get(Ty)); 1792 } 1793 return RValue::get(llvm::ConstantInt::get(Ty, Column, true)); 1794 } 1795 case Builtin::BI__builtin_init_dwarf_reg_size_table: { 1796 Value *Address = EmitScalarExpr(E->getArg(0)); 1797 if (getTargetHooks().initDwarfEHRegSizeTable(*this, Address)) 1798 CGM.ErrorUnsupported(E, "__builtin_init_dwarf_reg_size_table"); 1799 return RValue::get(llvm::UndefValue::get(ConvertType(E->getType()))); 1800 } 1801 case Builtin::BI__builtin_eh_return: { 1802 Value *Int = EmitScalarExpr(E->getArg(0)); 1803 Value *Ptr = EmitScalarExpr(E->getArg(1)); 1804 1805 llvm::IntegerType *IntTy = cast<llvm::IntegerType>(Int->getType()); 1806 assert((IntTy->getBitWidth() == 32 || IntTy->getBitWidth() == 64) && 1807 "LLVM's __builtin_eh_return only supports 32- and 64-bit variants"); 1808 Value *F = CGM.getIntrinsic(IntTy->getBitWidth() == 32 1809 ? Intrinsic::eh_return_i32 1810 : Intrinsic::eh_return_i64); 1811 Builder.CreateCall(F, {Int, Ptr}); 1812 Builder.CreateUnreachable(); 1813 1814 // We do need to preserve an insertion point. 1815 EmitBlock(createBasicBlock("builtin_eh_return.cont")); 1816 1817 return RValue::get(nullptr); 1818 } 1819 case Builtin::BI__builtin_unwind_init: { 1820 Value *F = CGM.getIntrinsic(Intrinsic::eh_unwind_init); 1821 return RValue::get(Builder.CreateCall(F)); 1822 } 1823 case Builtin::BI__builtin_extend_pointer: { 1824 // Extends a pointer to the size of an _Unwind_Word, which is 1825 // uint64_t on all platforms. Generally this gets poked into a 1826 // register and eventually used as an address, so if the 1827 // addressing registers are wider than pointers and the platform 1828 // doesn't implicitly ignore high-order bits when doing 1829 // addressing, we need to make sure we zext / sext based on 1830 // the platform's expectations. 1831 // 1832 // See: http://gcc.gnu.org/ml/gcc-bugs/2002-02/msg00237.html 1833 1834 // Cast the pointer to intptr_t. 1835 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1836 Value *Result = Builder.CreatePtrToInt(Ptr, IntPtrTy, "extend.cast"); 1837 1838 // If that's 64 bits, we're done. 1839 if (IntPtrTy->getBitWidth() == 64) 1840 return RValue::get(Result); 1841 1842 // Otherwise, ask the codegen data what to do. 1843 if (getTargetHooks().extendPointerWithSExt()) 1844 return RValue::get(Builder.CreateSExt(Result, Int64Ty, "extend.sext")); 1845 else 1846 return RValue::get(Builder.CreateZExt(Result, Int64Ty, "extend.zext")); 1847 } 1848 case Builtin::BI__builtin_setjmp: { 1849 // Buffer is a void**. 1850 Address Buf = EmitPointerWithAlignment(E->getArg(0)); 1851 1852 // Store the frame pointer to the setjmp buffer. 1853 Value *FrameAddr = 1854 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1855 ConstantInt::get(Int32Ty, 0)); 1856 Builder.CreateStore(FrameAddr, Buf); 1857 1858 // Store the stack pointer to the setjmp buffer. 1859 Value *StackAddr = 1860 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::stacksave)); 1861 Address StackSaveSlot = 1862 Builder.CreateConstInBoundsGEP(Buf, 2, getPointerSize()); 1863 Builder.CreateStore(StackAddr, StackSaveSlot); 1864 1865 // Call LLVM's EH setjmp, which is lightweight. 1866 Value *F = CGM.getIntrinsic(Intrinsic::eh_sjlj_setjmp); 1867 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1868 return RValue::get(Builder.CreateCall(F, Buf.getPointer())); 1869 } 1870 case Builtin::BI__builtin_longjmp: { 1871 Value *Buf = EmitScalarExpr(E->getArg(0)); 1872 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1873 1874 // Call LLVM's EH longjmp, which is lightweight. 1875 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::eh_sjlj_longjmp), Buf); 1876 1877 // longjmp doesn't return; mark this as unreachable. 1878 Builder.CreateUnreachable(); 1879 1880 // We do need to preserve an insertion point. 1881 EmitBlock(createBasicBlock("longjmp.cont")); 1882 1883 return RValue::get(nullptr); 1884 } 1885 case Builtin::BI__sync_fetch_and_add: 1886 case Builtin::BI__sync_fetch_and_sub: 1887 case Builtin::BI__sync_fetch_and_or: 1888 case Builtin::BI__sync_fetch_and_and: 1889 case Builtin::BI__sync_fetch_and_xor: 1890 case Builtin::BI__sync_fetch_and_nand: 1891 case Builtin::BI__sync_add_and_fetch: 1892 case Builtin::BI__sync_sub_and_fetch: 1893 case Builtin::BI__sync_and_and_fetch: 1894 case Builtin::BI__sync_or_and_fetch: 1895 case Builtin::BI__sync_xor_and_fetch: 1896 case Builtin::BI__sync_nand_and_fetch: 1897 case Builtin::BI__sync_val_compare_and_swap: 1898 case Builtin::BI__sync_bool_compare_and_swap: 1899 case Builtin::BI__sync_lock_test_and_set: 1900 case Builtin::BI__sync_lock_release: 1901 case Builtin::BI__sync_swap: 1902 llvm_unreachable("Shouldn't make it through sema"); 1903 case Builtin::BI__sync_fetch_and_add_1: 1904 case Builtin::BI__sync_fetch_and_add_2: 1905 case Builtin::BI__sync_fetch_and_add_4: 1906 case Builtin::BI__sync_fetch_and_add_8: 1907 case Builtin::BI__sync_fetch_and_add_16: 1908 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E); 1909 case Builtin::BI__sync_fetch_and_sub_1: 1910 case Builtin::BI__sync_fetch_and_sub_2: 1911 case Builtin::BI__sync_fetch_and_sub_4: 1912 case Builtin::BI__sync_fetch_and_sub_8: 1913 case Builtin::BI__sync_fetch_and_sub_16: 1914 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E); 1915 case Builtin::BI__sync_fetch_and_or_1: 1916 case Builtin::BI__sync_fetch_and_or_2: 1917 case Builtin::BI__sync_fetch_and_or_4: 1918 case Builtin::BI__sync_fetch_and_or_8: 1919 case Builtin::BI__sync_fetch_and_or_16: 1920 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E); 1921 case Builtin::BI__sync_fetch_and_and_1: 1922 case Builtin::BI__sync_fetch_and_and_2: 1923 case Builtin::BI__sync_fetch_and_and_4: 1924 case Builtin::BI__sync_fetch_and_and_8: 1925 case Builtin::BI__sync_fetch_and_and_16: 1926 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E); 1927 case Builtin::BI__sync_fetch_and_xor_1: 1928 case Builtin::BI__sync_fetch_and_xor_2: 1929 case Builtin::BI__sync_fetch_and_xor_4: 1930 case Builtin::BI__sync_fetch_and_xor_8: 1931 case Builtin::BI__sync_fetch_and_xor_16: 1932 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E); 1933 case Builtin::BI__sync_fetch_and_nand_1: 1934 case Builtin::BI__sync_fetch_and_nand_2: 1935 case Builtin::BI__sync_fetch_and_nand_4: 1936 case Builtin::BI__sync_fetch_and_nand_8: 1937 case Builtin::BI__sync_fetch_and_nand_16: 1938 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Nand, E); 1939 1940 // Clang extensions: not overloaded yet. 1941 case Builtin::BI__sync_fetch_and_min: 1942 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E); 1943 case Builtin::BI__sync_fetch_and_max: 1944 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Max, E); 1945 case Builtin::BI__sync_fetch_and_umin: 1946 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMin, E); 1947 case Builtin::BI__sync_fetch_and_umax: 1948 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMax, E); 1949 1950 case Builtin::BI__sync_add_and_fetch_1: 1951 case Builtin::BI__sync_add_and_fetch_2: 1952 case Builtin::BI__sync_add_and_fetch_4: 1953 case Builtin::BI__sync_add_and_fetch_8: 1954 case Builtin::BI__sync_add_and_fetch_16: 1955 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Add, E, 1956 llvm::Instruction::Add); 1957 case Builtin::BI__sync_sub_and_fetch_1: 1958 case Builtin::BI__sync_sub_and_fetch_2: 1959 case Builtin::BI__sync_sub_and_fetch_4: 1960 case Builtin::BI__sync_sub_and_fetch_8: 1961 case Builtin::BI__sync_sub_and_fetch_16: 1962 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Sub, E, 1963 llvm::Instruction::Sub); 1964 case Builtin::BI__sync_and_and_fetch_1: 1965 case Builtin::BI__sync_and_and_fetch_2: 1966 case Builtin::BI__sync_and_and_fetch_4: 1967 case Builtin::BI__sync_and_and_fetch_8: 1968 case Builtin::BI__sync_and_and_fetch_16: 1969 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::And, E, 1970 llvm::Instruction::And); 1971 case Builtin::BI__sync_or_and_fetch_1: 1972 case Builtin::BI__sync_or_and_fetch_2: 1973 case Builtin::BI__sync_or_and_fetch_4: 1974 case Builtin::BI__sync_or_and_fetch_8: 1975 case Builtin::BI__sync_or_and_fetch_16: 1976 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Or, E, 1977 llvm::Instruction::Or); 1978 case Builtin::BI__sync_xor_and_fetch_1: 1979 case Builtin::BI__sync_xor_and_fetch_2: 1980 case Builtin::BI__sync_xor_and_fetch_4: 1981 case Builtin::BI__sync_xor_and_fetch_8: 1982 case Builtin::BI__sync_xor_and_fetch_16: 1983 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Xor, E, 1984 llvm::Instruction::Xor); 1985 case Builtin::BI__sync_nand_and_fetch_1: 1986 case Builtin::BI__sync_nand_and_fetch_2: 1987 case Builtin::BI__sync_nand_and_fetch_4: 1988 case Builtin::BI__sync_nand_and_fetch_8: 1989 case Builtin::BI__sync_nand_and_fetch_16: 1990 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Nand, E, 1991 llvm::Instruction::And, true); 1992 1993 case Builtin::BI__sync_val_compare_and_swap_1: 1994 case Builtin::BI__sync_val_compare_and_swap_2: 1995 case Builtin::BI__sync_val_compare_and_swap_4: 1996 case Builtin::BI__sync_val_compare_and_swap_8: 1997 case Builtin::BI__sync_val_compare_and_swap_16: 1998 return RValue::get(MakeAtomicCmpXchgValue(*this, E, false)); 1999 2000 case Builtin::BI__sync_bool_compare_and_swap_1: 2001 case Builtin::BI__sync_bool_compare_and_swap_2: 2002 case Builtin::BI__sync_bool_compare_and_swap_4: 2003 case Builtin::BI__sync_bool_compare_and_swap_8: 2004 case Builtin::BI__sync_bool_compare_and_swap_16: 2005 return RValue::get(MakeAtomicCmpXchgValue(*this, E, true)); 2006 2007 case Builtin::BI__sync_swap_1: 2008 case Builtin::BI__sync_swap_2: 2009 case Builtin::BI__sync_swap_4: 2010 case Builtin::BI__sync_swap_8: 2011 case Builtin::BI__sync_swap_16: 2012 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 2013 2014 case Builtin::BI__sync_lock_test_and_set_1: 2015 case Builtin::BI__sync_lock_test_and_set_2: 2016 case Builtin::BI__sync_lock_test_and_set_4: 2017 case Builtin::BI__sync_lock_test_and_set_8: 2018 case Builtin::BI__sync_lock_test_and_set_16: 2019 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 2020 2021 case Builtin::BI__sync_lock_release_1: 2022 case Builtin::BI__sync_lock_release_2: 2023 case Builtin::BI__sync_lock_release_4: 2024 case Builtin::BI__sync_lock_release_8: 2025 case Builtin::BI__sync_lock_release_16: { 2026 Value *Ptr = EmitScalarExpr(E->getArg(0)); 2027 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 2028 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 2029 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 2030 StoreSize.getQuantity() * 8); 2031 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 2032 llvm::StoreInst *Store = 2033 Builder.CreateAlignedStore(llvm::Constant::getNullValue(ITy), Ptr, 2034 StoreSize); 2035 Store->setAtomic(llvm::AtomicOrdering::Release); 2036 return RValue::get(nullptr); 2037 } 2038 2039 case Builtin::BI__sync_synchronize: { 2040 // We assume this is supposed to correspond to a C++0x-style 2041 // sequentially-consistent fence (i.e. this is only usable for 2042 // synchonization, not device I/O or anything like that). This intrinsic 2043 // is really badly designed in the sense that in theory, there isn't 2044 // any way to safely use it... but in practice, it mostly works 2045 // to use it with non-atomic loads and stores to get acquire/release 2046 // semantics. 2047 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent); 2048 return RValue::get(nullptr); 2049 } 2050 2051 case Builtin::BI__builtin_nontemporal_load: 2052 return RValue::get(EmitNontemporalLoad(*this, E)); 2053 case Builtin::BI__builtin_nontemporal_store: 2054 return RValue::get(EmitNontemporalStore(*this, E)); 2055 case Builtin::BI__c11_atomic_is_lock_free: 2056 case Builtin::BI__atomic_is_lock_free: { 2057 // Call "bool __atomic_is_lock_free(size_t size, void *ptr)". For the 2058 // __c11 builtin, ptr is 0 (indicating a properly-aligned object), since 2059 // _Atomic(T) is always properly-aligned. 2060 const char *LibCallName = "__atomic_is_lock_free"; 2061 CallArgList Args; 2062 Args.add(RValue::get(EmitScalarExpr(E->getArg(0))), 2063 getContext().getSizeType()); 2064 if (BuiltinID == Builtin::BI__atomic_is_lock_free) 2065 Args.add(RValue::get(EmitScalarExpr(E->getArg(1))), 2066 getContext().VoidPtrTy); 2067 else 2068 Args.add(RValue::get(llvm::Constant::getNullValue(VoidPtrTy)), 2069 getContext().VoidPtrTy); 2070 const CGFunctionInfo &FuncInfo = 2071 CGM.getTypes().arrangeBuiltinFunctionCall(E->getType(), Args); 2072 llvm::FunctionType *FTy = CGM.getTypes().GetFunctionType(FuncInfo); 2073 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, LibCallName); 2074 return EmitCall(FuncInfo, CGCallee::forDirect(Func), 2075 ReturnValueSlot(), Args); 2076 } 2077 2078 case Builtin::BI__atomic_test_and_set: { 2079 // Look at the argument type to determine whether this is a volatile 2080 // operation. The parameter type is always volatile. 2081 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 2082 bool Volatile = 2083 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 2084 2085 Value *Ptr = EmitScalarExpr(E->getArg(0)); 2086 unsigned AddrSpace = Ptr->getType()->getPointerAddressSpace(); 2087 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 2088 Value *NewVal = Builder.getInt8(1); 2089 Value *Order = EmitScalarExpr(E->getArg(1)); 2090 if (isa<llvm::ConstantInt>(Order)) { 2091 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 2092 AtomicRMWInst *Result = nullptr; 2093 switch (ord) { 2094 case 0: // memory_order_relaxed 2095 default: // invalid order 2096 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2097 llvm::AtomicOrdering::Monotonic); 2098 break; 2099 case 1: // memory_order_consume 2100 case 2: // memory_order_acquire 2101 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2102 llvm::AtomicOrdering::Acquire); 2103 break; 2104 case 3: // memory_order_release 2105 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2106 llvm::AtomicOrdering::Release); 2107 break; 2108 case 4: // memory_order_acq_rel 2109 2110 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2111 llvm::AtomicOrdering::AcquireRelease); 2112 break; 2113 case 5: // memory_order_seq_cst 2114 Result = Builder.CreateAtomicRMW( 2115 llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2116 llvm::AtomicOrdering::SequentiallyConsistent); 2117 break; 2118 } 2119 Result->setVolatile(Volatile); 2120 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 2121 } 2122 2123 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 2124 2125 llvm::BasicBlock *BBs[5] = { 2126 createBasicBlock("monotonic", CurFn), 2127 createBasicBlock("acquire", CurFn), 2128 createBasicBlock("release", CurFn), 2129 createBasicBlock("acqrel", CurFn), 2130 createBasicBlock("seqcst", CurFn) 2131 }; 2132 llvm::AtomicOrdering Orders[5] = { 2133 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Acquire, 2134 llvm::AtomicOrdering::Release, llvm::AtomicOrdering::AcquireRelease, 2135 llvm::AtomicOrdering::SequentiallyConsistent}; 2136 2137 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 2138 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 2139 2140 Builder.SetInsertPoint(ContBB); 2141 PHINode *Result = Builder.CreatePHI(Int8Ty, 5, "was_set"); 2142 2143 for (unsigned i = 0; i < 5; ++i) { 2144 Builder.SetInsertPoint(BBs[i]); 2145 AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 2146 Ptr, NewVal, Orders[i]); 2147 RMW->setVolatile(Volatile); 2148 Result->addIncoming(RMW, BBs[i]); 2149 Builder.CreateBr(ContBB); 2150 } 2151 2152 SI->addCase(Builder.getInt32(0), BBs[0]); 2153 SI->addCase(Builder.getInt32(1), BBs[1]); 2154 SI->addCase(Builder.getInt32(2), BBs[1]); 2155 SI->addCase(Builder.getInt32(3), BBs[2]); 2156 SI->addCase(Builder.getInt32(4), BBs[3]); 2157 SI->addCase(Builder.getInt32(5), BBs[4]); 2158 2159 Builder.SetInsertPoint(ContBB); 2160 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 2161 } 2162 2163 case Builtin::BI__atomic_clear: { 2164 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 2165 bool Volatile = 2166 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 2167 2168 Address Ptr = EmitPointerWithAlignment(E->getArg(0)); 2169 unsigned AddrSpace = Ptr.getPointer()->getType()->getPointerAddressSpace(); 2170 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 2171 Value *NewVal = Builder.getInt8(0); 2172 Value *Order = EmitScalarExpr(E->getArg(1)); 2173 if (isa<llvm::ConstantInt>(Order)) { 2174 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 2175 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 2176 switch (ord) { 2177 case 0: // memory_order_relaxed 2178 default: // invalid order 2179 Store->setOrdering(llvm::AtomicOrdering::Monotonic); 2180 break; 2181 case 3: // memory_order_release 2182 Store->setOrdering(llvm::AtomicOrdering::Release); 2183 break; 2184 case 5: // memory_order_seq_cst 2185 Store->setOrdering(llvm::AtomicOrdering::SequentiallyConsistent); 2186 break; 2187 } 2188 return RValue::get(nullptr); 2189 } 2190 2191 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 2192 2193 llvm::BasicBlock *BBs[3] = { 2194 createBasicBlock("monotonic", CurFn), 2195 createBasicBlock("release", CurFn), 2196 createBasicBlock("seqcst", CurFn) 2197 }; 2198 llvm::AtomicOrdering Orders[3] = { 2199 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Release, 2200 llvm::AtomicOrdering::SequentiallyConsistent}; 2201 2202 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 2203 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 2204 2205 for (unsigned i = 0; i < 3; ++i) { 2206 Builder.SetInsertPoint(BBs[i]); 2207 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 2208 Store->setOrdering(Orders[i]); 2209 Builder.CreateBr(ContBB); 2210 } 2211 2212 SI->addCase(Builder.getInt32(0), BBs[0]); 2213 SI->addCase(Builder.getInt32(3), BBs[1]); 2214 SI->addCase(Builder.getInt32(5), BBs[2]); 2215 2216 Builder.SetInsertPoint(ContBB); 2217 return RValue::get(nullptr); 2218 } 2219 2220 case Builtin::BI__atomic_thread_fence: 2221 case Builtin::BI__atomic_signal_fence: 2222 case Builtin::BI__c11_atomic_thread_fence: 2223 case Builtin::BI__c11_atomic_signal_fence: { 2224 llvm::SyncScope::ID SSID; 2225 if (BuiltinID == Builtin::BI__atomic_signal_fence || 2226 BuiltinID == Builtin::BI__c11_atomic_signal_fence) 2227 SSID = llvm::SyncScope::SingleThread; 2228 else 2229 SSID = llvm::SyncScope::System; 2230 Value *Order = EmitScalarExpr(E->getArg(0)); 2231 if (isa<llvm::ConstantInt>(Order)) { 2232 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 2233 switch (ord) { 2234 case 0: // memory_order_relaxed 2235 default: // invalid order 2236 break; 2237 case 1: // memory_order_consume 2238 case 2: // memory_order_acquire 2239 Builder.CreateFence(llvm::AtomicOrdering::Acquire, SSID); 2240 break; 2241 case 3: // memory_order_release 2242 Builder.CreateFence(llvm::AtomicOrdering::Release, SSID); 2243 break; 2244 case 4: // memory_order_acq_rel 2245 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, SSID); 2246 break; 2247 case 5: // memory_order_seq_cst 2248 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, SSID); 2249 break; 2250 } 2251 return RValue::get(nullptr); 2252 } 2253 2254 llvm::BasicBlock *AcquireBB, *ReleaseBB, *AcqRelBB, *SeqCstBB; 2255 AcquireBB = createBasicBlock("acquire", CurFn); 2256 ReleaseBB = createBasicBlock("release", CurFn); 2257 AcqRelBB = createBasicBlock("acqrel", CurFn); 2258 SeqCstBB = createBasicBlock("seqcst", CurFn); 2259 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 2260 2261 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 2262 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, ContBB); 2263 2264 Builder.SetInsertPoint(AcquireBB); 2265 Builder.CreateFence(llvm::AtomicOrdering::Acquire, SSID); 2266 Builder.CreateBr(ContBB); 2267 SI->addCase(Builder.getInt32(1), AcquireBB); 2268 SI->addCase(Builder.getInt32(2), AcquireBB); 2269 2270 Builder.SetInsertPoint(ReleaseBB); 2271 Builder.CreateFence(llvm::AtomicOrdering::Release, SSID); 2272 Builder.CreateBr(ContBB); 2273 SI->addCase(Builder.getInt32(3), ReleaseBB); 2274 2275 Builder.SetInsertPoint(AcqRelBB); 2276 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, SSID); 2277 Builder.CreateBr(ContBB); 2278 SI->addCase(Builder.getInt32(4), AcqRelBB); 2279 2280 Builder.SetInsertPoint(SeqCstBB); 2281 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, SSID); 2282 Builder.CreateBr(ContBB); 2283 SI->addCase(Builder.getInt32(5), SeqCstBB); 2284 2285 Builder.SetInsertPoint(ContBB); 2286 return RValue::get(nullptr); 2287 } 2288 2289 case Builtin::BI__builtin_signbit: 2290 case Builtin::BI__builtin_signbitf: 2291 case Builtin::BI__builtin_signbitl: { 2292 return RValue::get( 2293 Builder.CreateZExt(EmitSignBit(*this, EmitScalarExpr(E->getArg(0))), 2294 ConvertType(E->getType()))); 2295 } 2296 case Builtin::BI__annotation: { 2297 // Re-encode each wide string to UTF8 and make an MDString. 2298 SmallVector<Metadata *, 1> Strings; 2299 for (const Expr *Arg : E->arguments()) { 2300 const auto *Str = cast<StringLiteral>(Arg->IgnoreParenCasts()); 2301 assert(Str->getCharByteWidth() == 2); 2302 StringRef WideBytes = Str->getBytes(); 2303 std::string StrUtf8; 2304 if (!convertUTF16ToUTF8String( 2305 makeArrayRef(WideBytes.data(), WideBytes.size()), StrUtf8)) { 2306 CGM.ErrorUnsupported(E, "non-UTF16 __annotation argument"); 2307 continue; 2308 } 2309 Strings.push_back(llvm::MDString::get(getLLVMContext(), StrUtf8)); 2310 } 2311 2312 // Build and MDTuple of MDStrings and emit the intrinsic call. 2313 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::codeview_annotation, {}); 2314 MDTuple *StrTuple = MDTuple::get(getLLVMContext(), Strings); 2315 Builder.CreateCall(F, MetadataAsValue::get(getLLVMContext(), StrTuple)); 2316 return RValue::getIgnored(); 2317 } 2318 case Builtin::BI__builtin_annotation: { 2319 llvm::Value *AnnVal = EmitScalarExpr(E->getArg(0)); 2320 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::annotation, 2321 AnnVal->getType()); 2322 2323 // Get the annotation string, go through casts. Sema requires this to be a 2324 // non-wide string literal, potentially casted, so the cast<> is safe. 2325 const Expr *AnnotationStrExpr = E->getArg(1)->IgnoreParenCasts(); 2326 StringRef Str = cast<StringLiteral>(AnnotationStrExpr)->getString(); 2327 return RValue::get(EmitAnnotationCall(F, AnnVal, Str, E->getExprLoc())); 2328 } 2329 case Builtin::BI__builtin_addcb: 2330 case Builtin::BI__builtin_addcs: 2331 case Builtin::BI__builtin_addc: 2332 case Builtin::BI__builtin_addcl: 2333 case Builtin::BI__builtin_addcll: 2334 case Builtin::BI__builtin_subcb: 2335 case Builtin::BI__builtin_subcs: 2336 case Builtin::BI__builtin_subc: 2337 case Builtin::BI__builtin_subcl: 2338 case Builtin::BI__builtin_subcll: { 2339 2340 // We translate all of these builtins from expressions of the form: 2341 // int x = ..., y = ..., carryin = ..., carryout, result; 2342 // result = __builtin_addc(x, y, carryin, &carryout); 2343 // 2344 // to LLVM IR of the form: 2345 // 2346 // %tmp1 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y) 2347 // %tmpsum1 = extractvalue {i32, i1} %tmp1, 0 2348 // %carry1 = extractvalue {i32, i1} %tmp1, 1 2349 // %tmp2 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %tmpsum1, 2350 // i32 %carryin) 2351 // %result = extractvalue {i32, i1} %tmp2, 0 2352 // %carry2 = extractvalue {i32, i1} %tmp2, 1 2353 // %tmp3 = or i1 %carry1, %carry2 2354 // %tmp4 = zext i1 %tmp3 to i32 2355 // store i32 %tmp4, i32* %carryout 2356 2357 // Scalarize our inputs. 2358 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 2359 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 2360 llvm::Value *Carryin = EmitScalarExpr(E->getArg(2)); 2361 Address CarryOutPtr = EmitPointerWithAlignment(E->getArg(3)); 2362 2363 // Decide if we are lowering to a uadd.with.overflow or usub.with.overflow. 2364 llvm::Intrinsic::ID IntrinsicId; 2365 switch (BuiltinID) { 2366 default: llvm_unreachable("Unknown multiprecision builtin id."); 2367 case Builtin::BI__builtin_addcb: 2368 case Builtin::BI__builtin_addcs: 2369 case Builtin::BI__builtin_addc: 2370 case Builtin::BI__builtin_addcl: 2371 case Builtin::BI__builtin_addcll: 2372 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 2373 break; 2374 case Builtin::BI__builtin_subcb: 2375 case Builtin::BI__builtin_subcs: 2376 case Builtin::BI__builtin_subc: 2377 case Builtin::BI__builtin_subcl: 2378 case Builtin::BI__builtin_subcll: 2379 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 2380 break; 2381 } 2382 2383 // Construct our resulting LLVM IR expression. 2384 llvm::Value *Carry1; 2385 llvm::Value *Sum1 = EmitOverflowIntrinsic(*this, IntrinsicId, 2386 X, Y, Carry1); 2387 llvm::Value *Carry2; 2388 llvm::Value *Sum2 = EmitOverflowIntrinsic(*this, IntrinsicId, 2389 Sum1, Carryin, Carry2); 2390 llvm::Value *CarryOut = Builder.CreateZExt(Builder.CreateOr(Carry1, Carry2), 2391 X->getType()); 2392 Builder.CreateStore(CarryOut, CarryOutPtr); 2393 return RValue::get(Sum2); 2394 } 2395 2396 case Builtin::BI__builtin_add_overflow: 2397 case Builtin::BI__builtin_sub_overflow: 2398 case Builtin::BI__builtin_mul_overflow: { 2399 const clang::Expr *LeftArg = E->getArg(0); 2400 const clang::Expr *RightArg = E->getArg(1); 2401 const clang::Expr *ResultArg = E->getArg(2); 2402 2403 clang::QualType ResultQTy = 2404 ResultArg->getType()->castAs<PointerType>()->getPointeeType(); 2405 2406 WidthAndSignedness LeftInfo = 2407 getIntegerWidthAndSignedness(CGM.getContext(), LeftArg->getType()); 2408 WidthAndSignedness RightInfo = 2409 getIntegerWidthAndSignedness(CGM.getContext(), RightArg->getType()); 2410 WidthAndSignedness ResultInfo = 2411 getIntegerWidthAndSignedness(CGM.getContext(), ResultQTy); 2412 2413 // Handle mixed-sign multiplication as a special case, because adding 2414 // runtime or backend support for our generic irgen would be too expensive. 2415 if (isSpecialMixedSignMultiply(BuiltinID, LeftInfo, RightInfo, ResultInfo)) 2416 return EmitCheckedMixedSignMultiply(*this, LeftArg, LeftInfo, RightArg, 2417 RightInfo, ResultArg, ResultQTy, 2418 ResultInfo); 2419 2420 WidthAndSignedness EncompassingInfo = 2421 EncompassingIntegerType({LeftInfo, RightInfo, ResultInfo}); 2422 2423 llvm::Type *EncompassingLLVMTy = 2424 llvm::IntegerType::get(CGM.getLLVMContext(), EncompassingInfo.Width); 2425 2426 llvm::Type *ResultLLVMTy = CGM.getTypes().ConvertType(ResultQTy); 2427 2428 llvm::Intrinsic::ID IntrinsicId; 2429 switch (BuiltinID) { 2430 default: 2431 llvm_unreachable("Unknown overflow builtin id."); 2432 case Builtin::BI__builtin_add_overflow: 2433 IntrinsicId = EncompassingInfo.Signed 2434 ? llvm::Intrinsic::sadd_with_overflow 2435 : llvm::Intrinsic::uadd_with_overflow; 2436 break; 2437 case Builtin::BI__builtin_sub_overflow: 2438 IntrinsicId = EncompassingInfo.Signed 2439 ? llvm::Intrinsic::ssub_with_overflow 2440 : llvm::Intrinsic::usub_with_overflow; 2441 break; 2442 case Builtin::BI__builtin_mul_overflow: 2443 IntrinsicId = EncompassingInfo.Signed 2444 ? llvm::Intrinsic::smul_with_overflow 2445 : llvm::Intrinsic::umul_with_overflow; 2446 break; 2447 } 2448 2449 llvm::Value *Left = EmitScalarExpr(LeftArg); 2450 llvm::Value *Right = EmitScalarExpr(RightArg); 2451 Address ResultPtr = EmitPointerWithAlignment(ResultArg); 2452 2453 // Extend each operand to the encompassing type. 2454 Left = Builder.CreateIntCast(Left, EncompassingLLVMTy, LeftInfo.Signed); 2455 Right = Builder.CreateIntCast(Right, EncompassingLLVMTy, RightInfo.Signed); 2456 2457 // Perform the operation on the extended values. 2458 llvm::Value *Overflow, *Result; 2459 Result = EmitOverflowIntrinsic(*this, IntrinsicId, Left, Right, Overflow); 2460 2461 if (EncompassingInfo.Width > ResultInfo.Width) { 2462 // The encompassing type is wider than the result type, so we need to 2463 // truncate it. 2464 llvm::Value *ResultTrunc = Builder.CreateTrunc(Result, ResultLLVMTy); 2465 2466 // To see if the truncation caused an overflow, we will extend 2467 // the result and then compare it to the original result. 2468 llvm::Value *ResultTruncExt = Builder.CreateIntCast( 2469 ResultTrunc, EncompassingLLVMTy, ResultInfo.Signed); 2470 llvm::Value *TruncationOverflow = 2471 Builder.CreateICmpNE(Result, ResultTruncExt); 2472 2473 Overflow = Builder.CreateOr(Overflow, TruncationOverflow); 2474 Result = ResultTrunc; 2475 } 2476 2477 // Finally, store the result using the pointer. 2478 bool isVolatile = 2479 ResultArg->getType()->getPointeeType().isVolatileQualified(); 2480 Builder.CreateStore(EmitToMemory(Result, ResultQTy), ResultPtr, isVolatile); 2481 2482 return RValue::get(Overflow); 2483 } 2484 2485 case Builtin::BI__builtin_uadd_overflow: 2486 case Builtin::BI__builtin_uaddl_overflow: 2487 case Builtin::BI__builtin_uaddll_overflow: 2488 case Builtin::BI__builtin_usub_overflow: 2489 case Builtin::BI__builtin_usubl_overflow: 2490 case Builtin::BI__builtin_usubll_overflow: 2491 case Builtin::BI__builtin_umul_overflow: 2492 case Builtin::BI__builtin_umull_overflow: 2493 case Builtin::BI__builtin_umulll_overflow: 2494 case Builtin::BI__builtin_sadd_overflow: 2495 case Builtin::BI__builtin_saddl_overflow: 2496 case Builtin::BI__builtin_saddll_overflow: 2497 case Builtin::BI__builtin_ssub_overflow: 2498 case Builtin::BI__builtin_ssubl_overflow: 2499 case Builtin::BI__builtin_ssubll_overflow: 2500 case Builtin::BI__builtin_smul_overflow: 2501 case Builtin::BI__builtin_smull_overflow: 2502 case Builtin::BI__builtin_smulll_overflow: { 2503 2504 // We translate all of these builtins directly to the relevant llvm IR node. 2505 2506 // Scalarize our inputs. 2507 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 2508 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 2509 Address SumOutPtr = EmitPointerWithAlignment(E->getArg(2)); 2510 2511 // Decide which of the overflow intrinsics we are lowering to: 2512 llvm::Intrinsic::ID IntrinsicId; 2513 switch (BuiltinID) { 2514 default: llvm_unreachable("Unknown overflow builtin id."); 2515 case Builtin::BI__builtin_uadd_overflow: 2516 case Builtin::BI__builtin_uaddl_overflow: 2517 case Builtin::BI__builtin_uaddll_overflow: 2518 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 2519 break; 2520 case Builtin::BI__builtin_usub_overflow: 2521 case Builtin::BI__builtin_usubl_overflow: 2522 case Builtin::BI__builtin_usubll_overflow: 2523 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 2524 break; 2525 case Builtin::BI__builtin_umul_overflow: 2526 case Builtin::BI__builtin_umull_overflow: 2527 case Builtin::BI__builtin_umulll_overflow: 2528 IntrinsicId = llvm::Intrinsic::umul_with_overflow; 2529 break; 2530 case Builtin::BI__builtin_sadd_overflow: 2531 case Builtin::BI__builtin_saddl_overflow: 2532 case Builtin::BI__builtin_saddll_overflow: 2533 IntrinsicId = llvm::Intrinsic::sadd_with_overflow; 2534 break; 2535 case Builtin::BI__builtin_ssub_overflow: 2536 case Builtin::BI__builtin_ssubl_overflow: 2537 case Builtin::BI__builtin_ssubll_overflow: 2538 IntrinsicId = llvm::Intrinsic::ssub_with_overflow; 2539 break; 2540 case Builtin::BI__builtin_smul_overflow: 2541 case Builtin::BI__builtin_smull_overflow: 2542 case Builtin::BI__builtin_smulll_overflow: 2543 IntrinsicId = llvm::Intrinsic::smul_with_overflow; 2544 break; 2545 } 2546 2547 2548 llvm::Value *Carry; 2549 llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry); 2550 Builder.CreateStore(Sum, SumOutPtr); 2551 2552 return RValue::get(Carry); 2553 } 2554 case Builtin::BI__builtin_addressof: 2555 return RValue::get(EmitLValue(E->getArg(0)).getPointer()); 2556 case Builtin::BI__builtin_operator_new: 2557 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 2558 E->getArg(0), false); 2559 case Builtin::BI__builtin_operator_delete: 2560 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 2561 E->getArg(0), true); 2562 case Builtin::BI__noop: 2563 // __noop always evaluates to an integer literal zero. 2564 return RValue::get(ConstantInt::get(IntTy, 0)); 2565 case Builtin::BI__builtin_call_with_static_chain: { 2566 const CallExpr *Call = cast<CallExpr>(E->getArg(0)); 2567 const Expr *Chain = E->getArg(1); 2568 return EmitCall(Call->getCallee()->getType(), 2569 EmitCallee(Call->getCallee()), Call, ReturnValue, 2570 EmitScalarExpr(Chain)); 2571 } 2572 case Builtin::BI_InterlockedExchange8: 2573 case Builtin::BI_InterlockedExchange16: 2574 case Builtin::BI_InterlockedExchange: 2575 case Builtin::BI_InterlockedExchangePointer: 2576 return RValue::get( 2577 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E)); 2578 case Builtin::BI_InterlockedCompareExchangePointer: { 2579 llvm::Type *RTy; 2580 llvm::IntegerType *IntType = 2581 IntegerType::get(getLLVMContext(), 2582 getContext().getTypeSize(E->getType())); 2583 llvm::Type *IntPtrType = IntType->getPointerTo(); 2584 2585 llvm::Value *Destination = 2586 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), IntPtrType); 2587 2588 llvm::Value *Exchange = EmitScalarExpr(E->getArg(1)); 2589 RTy = Exchange->getType(); 2590 Exchange = Builder.CreatePtrToInt(Exchange, IntType); 2591 2592 llvm::Value *Comparand = 2593 Builder.CreatePtrToInt(EmitScalarExpr(E->getArg(2)), IntType); 2594 2595 auto Result = 2596 Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 2597 AtomicOrdering::SequentiallyConsistent, 2598 AtomicOrdering::SequentiallyConsistent); 2599 Result->setVolatile(true); 2600 2601 return RValue::get(Builder.CreateIntToPtr(Builder.CreateExtractValue(Result, 2602 0), 2603 RTy)); 2604 } 2605 case Builtin::BI_InterlockedCompareExchange8: 2606 case Builtin::BI_InterlockedCompareExchange16: 2607 case Builtin::BI_InterlockedCompareExchange: 2608 case Builtin::BI_InterlockedCompareExchange64: { 2609 AtomicCmpXchgInst *CXI = Builder.CreateAtomicCmpXchg( 2610 EmitScalarExpr(E->getArg(0)), 2611 EmitScalarExpr(E->getArg(2)), 2612 EmitScalarExpr(E->getArg(1)), 2613 AtomicOrdering::SequentiallyConsistent, 2614 AtomicOrdering::SequentiallyConsistent); 2615 CXI->setVolatile(true); 2616 return RValue::get(Builder.CreateExtractValue(CXI, 0)); 2617 } 2618 case Builtin::BI_InterlockedIncrement16: 2619 case Builtin::BI_InterlockedIncrement: 2620 return RValue::get( 2621 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E)); 2622 case Builtin::BI_InterlockedDecrement16: 2623 case Builtin::BI_InterlockedDecrement: 2624 return RValue::get( 2625 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E)); 2626 case Builtin::BI_InterlockedAnd8: 2627 case Builtin::BI_InterlockedAnd16: 2628 case Builtin::BI_InterlockedAnd: 2629 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E)); 2630 case Builtin::BI_InterlockedExchangeAdd8: 2631 case Builtin::BI_InterlockedExchangeAdd16: 2632 case Builtin::BI_InterlockedExchangeAdd: 2633 return RValue::get( 2634 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E)); 2635 case Builtin::BI_InterlockedExchangeSub8: 2636 case Builtin::BI_InterlockedExchangeSub16: 2637 case Builtin::BI_InterlockedExchangeSub: 2638 return RValue::get( 2639 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E)); 2640 case Builtin::BI_InterlockedOr8: 2641 case Builtin::BI_InterlockedOr16: 2642 case Builtin::BI_InterlockedOr: 2643 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E)); 2644 case Builtin::BI_InterlockedXor8: 2645 case Builtin::BI_InterlockedXor16: 2646 case Builtin::BI_InterlockedXor: 2647 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E)); 2648 case Builtin::BI_interlockedbittestandset: 2649 return RValue::get( 2650 EmitMSVCBuiltinExpr(MSVCIntrin::_interlockedbittestandset, E)); 2651 2652 case Builtin::BI__exception_code: 2653 case Builtin::BI_exception_code: 2654 return RValue::get(EmitSEHExceptionCode()); 2655 case Builtin::BI__exception_info: 2656 case Builtin::BI_exception_info: 2657 return RValue::get(EmitSEHExceptionInfo()); 2658 case Builtin::BI__abnormal_termination: 2659 case Builtin::BI_abnormal_termination: 2660 return RValue::get(EmitSEHAbnormalTermination()); 2661 case Builtin::BI_setjmpex: { 2662 if (getTarget().getTriple().isOSMSVCRT()) { 2663 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 2664 llvm::AttributeList ReturnsTwiceAttr = llvm::AttributeList::get( 2665 getLLVMContext(), llvm::AttributeList::FunctionIndex, 2666 llvm::Attribute::ReturnsTwice); 2667 llvm::Constant *SetJmpEx = CGM.CreateRuntimeFunction( 2668 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 2669 "_setjmpex", ReturnsTwiceAttr, /*Local=*/true); 2670 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 2671 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 2672 llvm::Value *FrameAddr = 2673 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2674 ConstantInt::get(Int32Ty, 0)); 2675 llvm::Value *Args[] = {Buf, FrameAddr}; 2676 llvm::CallSite CS = EmitRuntimeCallOrInvoke(SetJmpEx, Args); 2677 CS.setAttributes(ReturnsTwiceAttr); 2678 return RValue::get(CS.getInstruction()); 2679 } 2680 break; 2681 } 2682 case Builtin::BI_setjmp: { 2683 if (getTarget().getTriple().isOSMSVCRT()) { 2684 llvm::AttributeList ReturnsTwiceAttr = llvm::AttributeList::get( 2685 getLLVMContext(), llvm::AttributeList::FunctionIndex, 2686 llvm::Attribute::ReturnsTwice); 2687 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 2688 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 2689 llvm::CallSite CS; 2690 if (getTarget().getTriple().getArch() == llvm::Triple::x86) { 2691 llvm::Type *ArgTypes[] = {Int8PtrTy, IntTy}; 2692 llvm::Constant *SetJmp3 = CGM.CreateRuntimeFunction( 2693 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/true), 2694 "_setjmp3", ReturnsTwiceAttr, /*Local=*/true); 2695 llvm::Value *Count = ConstantInt::get(IntTy, 0); 2696 llvm::Value *Args[] = {Buf, Count}; 2697 CS = EmitRuntimeCallOrInvoke(SetJmp3, Args); 2698 } else { 2699 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 2700 llvm::Constant *SetJmp = CGM.CreateRuntimeFunction( 2701 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 2702 "_setjmp", ReturnsTwiceAttr, /*Local=*/true); 2703 llvm::Value *FrameAddr = 2704 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2705 ConstantInt::get(Int32Ty, 0)); 2706 llvm::Value *Args[] = {Buf, FrameAddr}; 2707 CS = EmitRuntimeCallOrInvoke(SetJmp, Args); 2708 } 2709 CS.setAttributes(ReturnsTwiceAttr); 2710 return RValue::get(CS.getInstruction()); 2711 } 2712 break; 2713 } 2714 2715 case Builtin::BI__GetExceptionInfo: { 2716 if (llvm::GlobalVariable *GV = 2717 CGM.getCXXABI().getThrowInfo(FD->getParamDecl(0)->getType())) 2718 return RValue::get(llvm::ConstantExpr::getBitCast(GV, CGM.Int8PtrTy)); 2719 break; 2720 } 2721 2722 case Builtin::BI__fastfail: 2723 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::__fastfail, E)); 2724 2725 case Builtin::BI__builtin_coro_size: { 2726 auto & Context = getContext(); 2727 auto SizeTy = Context.getSizeType(); 2728 auto T = Builder.getIntNTy(Context.getTypeSize(SizeTy)); 2729 Value *F = CGM.getIntrinsic(Intrinsic::coro_size, T); 2730 return RValue::get(Builder.CreateCall(F)); 2731 } 2732 2733 case Builtin::BI__builtin_coro_id: 2734 return EmitCoroutineIntrinsic(E, Intrinsic::coro_id); 2735 case Builtin::BI__builtin_coro_promise: 2736 return EmitCoroutineIntrinsic(E, Intrinsic::coro_promise); 2737 case Builtin::BI__builtin_coro_resume: 2738 return EmitCoroutineIntrinsic(E, Intrinsic::coro_resume); 2739 case Builtin::BI__builtin_coro_frame: 2740 return EmitCoroutineIntrinsic(E, Intrinsic::coro_frame); 2741 case Builtin::BI__builtin_coro_free: 2742 return EmitCoroutineIntrinsic(E, Intrinsic::coro_free); 2743 case Builtin::BI__builtin_coro_destroy: 2744 return EmitCoroutineIntrinsic(E, Intrinsic::coro_destroy); 2745 case Builtin::BI__builtin_coro_done: 2746 return EmitCoroutineIntrinsic(E, Intrinsic::coro_done); 2747 case Builtin::BI__builtin_coro_alloc: 2748 return EmitCoroutineIntrinsic(E, Intrinsic::coro_alloc); 2749 case Builtin::BI__builtin_coro_begin: 2750 return EmitCoroutineIntrinsic(E, Intrinsic::coro_begin); 2751 case Builtin::BI__builtin_coro_end: 2752 return EmitCoroutineIntrinsic(E, Intrinsic::coro_end); 2753 case Builtin::BI__builtin_coro_suspend: 2754 return EmitCoroutineIntrinsic(E, Intrinsic::coro_suspend); 2755 case Builtin::BI__builtin_coro_param: 2756 return EmitCoroutineIntrinsic(E, Intrinsic::coro_param); 2757 2758 // OpenCL v2.0 s6.13.16.2, Built-in pipe read and write functions 2759 case Builtin::BIread_pipe: 2760 case Builtin::BIwrite_pipe: { 2761 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2762 *Arg1 = EmitScalarExpr(E->getArg(1)); 2763 CGOpenCLRuntime OpenCLRT(CGM); 2764 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2765 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2766 2767 // Type of the generic packet parameter. 2768 unsigned GenericAS = 2769 getContext().getTargetAddressSpace(LangAS::opencl_generic); 2770 llvm::Type *I8PTy = llvm::PointerType::get( 2771 llvm::Type::getInt8Ty(getLLVMContext()), GenericAS); 2772 2773 // Testing which overloaded version we should generate the call for. 2774 if (2U == E->getNumArgs()) { 2775 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_2" 2776 : "__write_pipe_2"; 2777 // Creating a generic function type to be able to call with any builtin or 2778 // user defined type. 2779 llvm::Type *ArgTys[] = {Arg0->getType(), I8PTy, Int32Ty, Int32Ty}; 2780 llvm::FunctionType *FTy = llvm::FunctionType::get( 2781 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2782 Value *BCast = Builder.CreatePointerCast(Arg1, I8PTy); 2783 return RValue::get( 2784 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2785 {Arg0, BCast, PacketSize, PacketAlign})); 2786 } else { 2787 assert(4 == E->getNumArgs() && 2788 "Illegal number of parameters to pipe function"); 2789 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_4" 2790 : "__write_pipe_4"; 2791 2792 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, I8PTy, 2793 Int32Ty, Int32Ty}; 2794 Value *Arg2 = EmitScalarExpr(E->getArg(2)), 2795 *Arg3 = EmitScalarExpr(E->getArg(3)); 2796 llvm::FunctionType *FTy = llvm::FunctionType::get( 2797 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2798 Value *BCast = Builder.CreatePointerCast(Arg3, I8PTy); 2799 // We know the third argument is an integer type, but we may need to cast 2800 // it to i32. 2801 if (Arg2->getType() != Int32Ty) 2802 Arg2 = Builder.CreateZExtOrTrunc(Arg2, Int32Ty); 2803 return RValue::get(Builder.CreateCall( 2804 CGM.CreateRuntimeFunction(FTy, Name), 2805 {Arg0, Arg1, Arg2, BCast, PacketSize, PacketAlign})); 2806 } 2807 } 2808 // OpenCL v2.0 s6.13.16 ,s9.17.3.5 - Built-in pipe reserve read and write 2809 // functions 2810 case Builtin::BIreserve_read_pipe: 2811 case Builtin::BIreserve_write_pipe: 2812 case Builtin::BIwork_group_reserve_read_pipe: 2813 case Builtin::BIwork_group_reserve_write_pipe: 2814 case Builtin::BIsub_group_reserve_read_pipe: 2815 case Builtin::BIsub_group_reserve_write_pipe: { 2816 // Composing the mangled name for the function. 2817 const char *Name; 2818 if (BuiltinID == Builtin::BIreserve_read_pipe) 2819 Name = "__reserve_read_pipe"; 2820 else if (BuiltinID == Builtin::BIreserve_write_pipe) 2821 Name = "__reserve_write_pipe"; 2822 else if (BuiltinID == Builtin::BIwork_group_reserve_read_pipe) 2823 Name = "__work_group_reserve_read_pipe"; 2824 else if (BuiltinID == Builtin::BIwork_group_reserve_write_pipe) 2825 Name = "__work_group_reserve_write_pipe"; 2826 else if (BuiltinID == Builtin::BIsub_group_reserve_read_pipe) 2827 Name = "__sub_group_reserve_read_pipe"; 2828 else 2829 Name = "__sub_group_reserve_write_pipe"; 2830 2831 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2832 *Arg1 = EmitScalarExpr(E->getArg(1)); 2833 llvm::Type *ReservedIDTy = ConvertType(getContext().OCLReserveIDTy); 2834 CGOpenCLRuntime OpenCLRT(CGM); 2835 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2836 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2837 2838 // Building the generic function prototype. 2839 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty, Int32Ty}; 2840 llvm::FunctionType *FTy = llvm::FunctionType::get( 2841 ReservedIDTy, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2842 // We know the second argument is an integer type, but we may need to cast 2843 // it to i32. 2844 if (Arg1->getType() != Int32Ty) 2845 Arg1 = Builder.CreateZExtOrTrunc(Arg1, Int32Ty); 2846 return RValue::get( 2847 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2848 {Arg0, Arg1, PacketSize, PacketAlign})); 2849 } 2850 // OpenCL v2.0 s6.13.16, s9.17.3.5 - Built-in pipe commit read and write 2851 // functions 2852 case Builtin::BIcommit_read_pipe: 2853 case Builtin::BIcommit_write_pipe: 2854 case Builtin::BIwork_group_commit_read_pipe: 2855 case Builtin::BIwork_group_commit_write_pipe: 2856 case Builtin::BIsub_group_commit_read_pipe: 2857 case Builtin::BIsub_group_commit_write_pipe: { 2858 const char *Name; 2859 if (BuiltinID == Builtin::BIcommit_read_pipe) 2860 Name = "__commit_read_pipe"; 2861 else if (BuiltinID == Builtin::BIcommit_write_pipe) 2862 Name = "__commit_write_pipe"; 2863 else if (BuiltinID == Builtin::BIwork_group_commit_read_pipe) 2864 Name = "__work_group_commit_read_pipe"; 2865 else if (BuiltinID == Builtin::BIwork_group_commit_write_pipe) 2866 Name = "__work_group_commit_write_pipe"; 2867 else if (BuiltinID == Builtin::BIsub_group_commit_read_pipe) 2868 Name = "__sub_group_commit_read_pipe"; 2869 else 2870 Name = "__sub_group_commit_write_pipe"; 2871 2872 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2873 *Arg1 = EmitScalarExpr(E->getArg(1)); 2874 CGOpenCLRuntime OpenCLRT(CGM); 2875 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2876 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2877 2878 // Building the generic function prototype. 2879 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, Int32Ty}; 2880 llvm::FunctionType *FTy = 2881 llvm::FunctionType::get(llvm::Type::getVoidTy(getLLVMContext()), 2882 llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2883 2884 return RValue::get( 2885 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2886 {Arg0, Arg1, PacketSize, PacketAlign})); 2887 } 2888 // OpenCL v2.0 s6.13.16.4 Built-in pipe query functions 2889 case Builtin::BIget_pipe_num_packets: 2890 case Builtin::BIget_pipe_max_packets: { 2891 const char *Name; 2892 if (BuiltinID == Builtin::BIget_pipe_num_packets) 2893 Name = "__get_pipe_num_packets"; 2894 else 2895 Name = "__get_pipe_max_packets"; 2896 2897 // Building the generic function prototype. 2898 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 2899 CGOpenCLRuntime OpenCLRT(CGM); 2900 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2901 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2902 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty}; 2903 llvm::FunctionType *FTy = llvm::FunctionType::get( 2904 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2905 2906 return RValue::get(Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2907 {Arg0, PacketSize, PacketAlign})); 2908 } 2909 2910 // OpenCL v2.0 s6.13.9 - Address space qualifier functions. 2911 case Builtin::BIto_global: 2912 case Builtin::BIto_local: 2913 case Builtin::BIto_private: { 2914 auto Arg0 = EmitScalarExpr(E->getArg(0)); 2915 auto NewArgT = llvm::PointerType::get(Int8Ty, 2916 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2917 auto NewRetT = llvm::PointerType::get(Int8Ty, 2918 CGM.getContext().getTargetAddressSpace( 2919 E->getType()->getPointeeType().getAddressSpace())); 2920 auto FTy = llvm::FunctionType::get(NewRetT, {NewArgT}, false); 2921 llvm::Value *NewArg; 2922 if (Arg0->getType()->getPointerAddressSpace() != 2923 NewArgT->getPointerAddressSpace()) 2924 NewArg = Builder.CreateAddrSpaceCast(Arg0, NewArgT); 2925 else 2926 NewArg = Builder.CreateBitOrPointerCast(Arg0, NewArgT); 2927 auto NewName = std::string("__") + E->getDirectCallee()->getName().str(); 2928 auto NewCall = 2929 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, NewName), {NewArg}); 2930 return RValue::get(Builder.CreateBitOrPointerCast(NewCall, 2931 ConvertType(E->getType()))); 2932 } 2933 2934 // OpenCL v2.0, s6.13.17 - Enqueue kernel function. 2935 // It contains four different overload formats specified in Table 6.13.17.1. 2936 case Builtin::BIenqueue_kernel: { 2937 StringRef Name; // Generated function call name 2938 unsigned NumArgs = E->getNumArgs(); 2939 2940 llvm::Type *QueueTy = ConvertType(getContext().OCLQueueTy); 2941 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 2942 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2943 2944 llvm::Value *Queue = EmitScalarExpr(E->getArg(0)); 2945 llvm::Value *Flags = EmitScalarExpr(E->getArg(1)); 2946 LValue NDRangeL = EmitAggExprToLValue(E->getArg(2)); 2947 llvm::Value *Range = NDRangeL.getAddress().getPointer(); 2948 llvm::Type *RangeTy = NDRangeL.getAddress().getType(); 2949 2950 if (NumArgs == 4) { 2951 // The most basic form of the call with parameters: 2952 // queue_t, kernel_enqueue_flags_t, ndrange_t, block(void) 2953 Name = "__enqueue_kernel_basic"; 2954 llvm::Type *ArgTys[] = {QueueTy, Int32Ty, RangeTy, GenericVoidPtrTy, 2955 GenericVoidPtrTy}; 2956 llvm::FunctionType *FTy = llvm::FunctionType::get( 2957 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2958 2959 auto Info = 2960 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(3)); 2961 llvm::Value *Kernel = 2962 Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 2963 llvm::Value *Block = 2964 Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 2965 2966 AttrBuilder B; 2967 B.addAttribute(Attribute::ByVal); 2968 llvm::AttributeList ByValAttrSet = 2969 llvm::AttributeList::get(CGM.getModule().getContext(), 3U, B); 2970 2971 auto RTCall = 2972 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name, ByValAttrSet), 2973 {Queue, Flags, Range, Kernel, Block}); 2974 RTCall->setAttributes(ByValAttrSet); 2975 return RValue::get(RTCall); 2976 } 2977 assert(NumArgs >= 5 && "Invalid enqueue_kernel signature"); 2978 2979 // Create a temporary array to hold the sizes of local pointer arguments 2980 // for the block. \p First is the position of the first size argument. 2981 auto CreateArrayForSizeVar = [=](unsigned First) { 2982 auto *AT = llvm::ArrayType::get(SizeTy, NumArgs - First); 2983 auto *Arr = Builder.CreateAlloca(AT); 2984 llvm::Value *Ptr; 2985 // Each of the following arguments specifies the size of the corresponding 2986 // argument passed to the enqueued block. 2987 auto *Zero = llvm::ConstantInt::get(IntTy, 0); 2988 for (unsigned I = First; I < NumArgs; ++I) { 2989 auto *Index = llvm::ConstantInt::get(IntTy, I - First); 2990 auto *GEP = Builder.CreateGEP(Arr, {Zero, Index}); 2991 if (I == First) 2992 Ptr = GEP; 2993 auto *V = 2994 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(I)), SizeTy); 2995 Builder.CreateAlignedStore( 2996 V, GEP, CGM.getDataLayout().getPrefTypeAlignment(SizeTy)); 2997 } 2998 return Ptr; 2999 }; 3000 3001 // Could have events and/or vaargs. 3002 if (E->getArg(3)->getType()->isBlockPointerType()) { 3003 // No events passed, but has variadic arguments. 3004 Name = "__enqueue_kernel_vaargs"; 3005 auto Info = 3006 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(3)); 3007 llvm::Value *Kernel = 3008 Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3009 auto *Block = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3010 auto *PtrToSizeArray = CreateArrayForSizeVar(4); 3011 3012 // Create a vector of the arguments, as well as a constant value to 3013 // express to the runtime the number of variadic arguments. 3014 std::vector<llvm::Value *> Args = { 3015 Queue, Flags, Range, 3016 Kernel, Block, ConstantInt::get(IntTy, NumArgs - 4), 3017 PtrToSizeArray}; 3018 std::vector<llvm::Type *> ArgTys = { 3019 QueueTy, IntTy, RangeTy, 3020 GenericVoidPtrTy, GenericVoidPtrTy, IntTy, 3021 PtrToSizeArray->getType()}; 3022 3023 llvm::FunctionType *FTy = llvm::FunctionType::get( 3024 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3025 return RValue::get( 3026 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3027 llvm::ArrayRef<llvm::Value *>(Args))); 3028 } 3029 // Any calls now have event arguments passed. 3030 if (NumArgs >= 7) { 3031 llvm::Type *EventTy = ConvertType(getContext().OCLClkEventTy); 3032 llvm::Type *EventPtrTy = EventTy->getPointerTo( 3033 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3034 3035 llvm::Value *NumEvents = 3036 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(3)), Int32Ty); 3037 llvm::Value *EventList = 3038 E->getArg(4)->getType()->isArrayType() 3039 ? EmitArrayToPointerDecay(E->getArg(4)).getPointer() 3040 : EmitScalarExpr(E->getArg(4)); 3041 llvm::Value *ClkEvent = EmitScalarExpr(E->getArg(5)); 3042 // Convert to generic address space. 3043 EventList = Builder.CreatePointerCast(EventList, EventPtrTy); 3044 ClkEvent = Builder.CreatePointerCast(ClkEvent, EventPtrTy); 3045 auto Info = 3046 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(6)); 3047 llvm::Value *Kernel = 3048 Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3049 llvm::Value *Block = 3050 Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3051 3052 std::vector<llvm::Type *> ArgTys = { 3053 QueueTy, Int32Ty, RangeTy, Int32Ty, 3054 EventPtrTy, EventPtrTy, GenericVoidPtrTy, GenericVoidPtrTy}; 3055 3056 std::vector<llvm::Value *> Args = {Queue, Flags, Range, NumEvents, 3057 EventList, ClkEvent, Kernel, Block}; 3058 3059 if (NumArgs == 7) { 3060 // Has events but no variadics. 3061 Name = "__enqueue_kernel_basic_events"; 3062 llvm::FunctionType *FTy = llvm::FunctionType::get( 3063 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3064 return RValue::get( 3065 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3066 llvm::ArrayRef<llvm::Value *>(Args))); 3067 } 3068 // Has event info and variadics 3069 // Pass the number of variadics to the runtime function too. 3070 Args.push_back(ConstantInt::get(Int32Ty, NumArgs - 7)); 3071 ArgTys.push_back(Int32Ty); 3072 Name = "__enqueue_kernel_events_vaargs"; 3073 3074 auto *PtrToSizeArray = CreateArrayForSizeVar(7); 3075 Args.push_back(PtrToSizeArray); 3076 ArgTys.push_back(PtrToSizeArray->getType()); 3077 3078 llvm::FunctionType *FTy = llvm::FunctionType::get( 3079 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3080 return RValue::get( 3081 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3082 llvm::ArrayRef<llvm::Value *>(Args))); 3083 } 3084 LLVM_FALLTHROUGH; 3085 } 3086 // OpenCL v2.0 s6.13.17.6 - Kernel query functions need bitcast of block 3087 // parameter. 3088 case Builtin::BIget_kernel_work_group_size: { 3089 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3090 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3091 auto Info = 3092 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(0)); 3093 Value *Kernel = Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3094 Value *Arg = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3095 return RValue::get(Builder.CreateCall( 3096 CGM.CreateRuntimeFunction( 3097 llvm::FunctionType::get(IntTy, {GenericVoidPtrTy, GenericVoidPtrTy}, 3098 false), 3099 "__get_kernel_work_group_size_impl"), 3100 {Kernel, Arg})); 3101 } 3102 case Builtin::BIget_kernel_preferred_work_group_size_multiple: { 3103 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3104 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3105 auto Info = 3106 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(0)); 3107 Value *Kernel = Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3108 Value *Arg = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3109 return RValue::get(Builder.CreateCall( 3110 CGM.CreateRuntimeFunction( 3111 llvm::FunctionType::get(IntTy, {GenericVoidPtrTy, GenericVoidPtrTy}, 3112 false), 3113 "__get_kernel_preferred_work_group_multiple_impl"), 3114 {Kernel, Arg})); 3115 } 3116 case Builtin::BIget_kernel_max_sub_group_size_for_ndrange: 3117 case Builtin::BIget_kernel_sub_group_count_for_ndrange: { 3118 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3119 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3120 LValue NDRangeL = EmitAggExprToLValue(E->getArg(0)); 3121 llvm::Value *NDRange = NDRangeL.getAddress().getPointer(); 3122 auto Info = 3123 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(1)); 3124 Value *Kernel = Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3125 Value *Block = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3126 const char *Name = 3127 BuiltinID == Builtin::BIget_kernel_max_sub_group_size_for_ndrange 3128 ? "__get_kernel_max_sub_group_size_for_ndrange_impl" 3129 : "__get_kernel_sub_group_count_for_ndrange_impl"; 3130 return RValue::get(Builder.CreateCall( 3131 CGM.CreateRuntimeFunction( 3132 llvm::FunctionType::get( 3133 IntTy, {NDRange->getType(), GenericVoidPtrTy, GenericVoidPtrTy}, 3134 false), 3135 Name), 3136 {NDRange, Kernel, Block})); 3137 } 3138 3139 case Builtin::BI__builtin_store_half: 3140 case Builtin::BI__builtin_store_halff: { 3141 Value *Val = EmitScalarExpr(E->getArg(0)); 3142 Address Address = EmitPointerWithAlignment(E->getArg(1)); 3143 Value *HalfVal = Builder.CreateFPTrunc(Val, Builder.getHalfTy()); 3144 return RValue::get(Builder.CreateStore(HalfVal, Address)); 3145 } 3146 case Builtin::BI__builtin_load_half: { 3147 Address Address = EmitPointerWithAlignment(E->getArg(0)); 3148 Value *HalfVal = Builder.CreateLoad(Address); 3149 return RValue::get(Builder.CreateFPExt(HalfVal, Builder.getDoubleTy())); 3150 } 3151 case Builtin::BI__builtin_load_halff: { 3152 Address Address = EmitPointerWithAlignment(E->getArg(0)); 3153 Value *HalfVal = Builder.CreateLoad(Address); 3154 return RValue::get(Builder.CreateFPExt(HalfVal, Builder.getFloatTy())); 3155 } 3156 case Builtin::BIprintf: 3157 if (getTarget().getTriple().isNVPTX()) 3158 return EmitNVPTXDevicePrintfCallExpr(E, ReturnValue); 3159 break; 3160 case Builtin::BI__builtin_canonicalize: 3161 case Builtin::BI__builtin_canonicalizef: 3162 case Builtin::BI__builtin_canonicalizel: 3163 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::canonicalize)); 3164 3165 case Builtin::BI__builtin_thread_pointer: { 3166 if (!getContext().getTargetInfo().isTLSSupported()) 3167 CGM.ErrorUnsupported(E, "__builtin_thread_pointer"); 3168 // Fall through - it's already mapped to the intrinsic by GCCBuiltin. 3169 break; 3170 } 3171 case Builtin::BI__builtin_os_log_format: 3172 return emitBuiltinOSLogFormat(*E); 3173 3174 case Builtin::BI__builtin_os_log_format_buffer_size: { 3175 analyze_os_log::OSLogBufferLayout Layout; 3176 analyze_os_log::computeOSLogBufferLayout(CGM.getContext(), E, Layout); 3177 return RValue::get(ConstantInt::get(ConvertType(E->getType()), 3178 Layout.size().getQuantity())); 3179 } 3180 3181 case Builtin::BI__xray_customevent: { 3182 if (!ShouldXRayInstrumentFunction()) 3183 return RValue::getIgnored(); 3184 if (const auto *XRayAttr = CurFuncDecl->getAttr<XRayInstrumentAttr>()) 3185 if (XRayAttr->neverXRayInstrument() && !AlwaysEmitXRayCustomEvents()) 3186 return RValue::getIgnored(); 3187 3188 Function *F = CGM.getIntrinsic(Intrinsic::xray_customevent); 3189 auto FTy = F->getFunctionType(); 3190 auto Arg0 = E->getArg(0); 3191 auto Arg0Val = EmitScalarExpr(Arg0); 3192 auto Arg0Ty = Arg0->getType(); 3193 auto PTy0 = FTy->getParamType(0); 3194 if (PTy0 != Arg0Val->getType()) { 3195 if (Arg0Ty->isArrayType()) 3196 Arg0Val = EmitArrayToPointerDecay(Arg0).getPointer(); 3197 else 3198 Arg0Val = Builder.CreatePointerCast(Arg0Val, PTy0); 3199 } 3200 auto Arg1 = EmitScalarExpr(E->getArg(1)); 3201 auto PTy1 = FTy->getParamType(1); 3202 if (PTy1 != Arg1->getType()) 3203 Arg1 = Builder.CreateTruncOrBitCast(Arg1, PTy1); 3204 return RValue::get(Builder.CreateCall(F, {Arg0Val, Arg1})); 3205 } 3206 3207 case Builtin::BI__builtin_ms_va_start: 3208 case Builtin::BI__builtin_ms_va_end: 3209 return RValue::get( 3210 EmitVAStartEnd(EmitMSVAListRef(E->getArg(0)).getPointer(), 3211 BuiltinID == Builtin::BI__builtin_ms_va_start)); 3212 3213 case Builtin::BI__builtin_ms_va_copy: { 3214 // Lower this manually. We can't reliably determine whether or not any 3215 // given va_copy() is for a Win64 va_list from the calling convention 3216 // alone, because it's legal to do this from a System V ABI function. 3217 // With opaque pointer types, we won't have enough information in LLVM 3218 // IR to determine this from the argument types, either. Best to do it 3219 // now, while we have enough information. 3220 Address DestAddr = EmitMSVAListRef(E->getArg(0)); 3221 Address SrcAddr = EmitMSVAListRef(E->getArg(1)); 3222 3223 llvm::Type *BPP = Int8PtrPtrTy; 3224 3225 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), BPP, "cp"), 3226 DestAddr.getAlignment()); 3227 SrcAddr = Address(Builder.CreateBitCast(SrcAddr.getPointer(), BPP, "ap"), 3228 SrcAddr.getAlignment()); 3229 3230 Value *ArgPtr = Builder.CreateLoad(SrcAddr, "ap.val"); 3231 return RValue::get(Builder.CreateStore(ArgPtr, DestAddr)); 3232 } 3233 } 3234 3235 // If this is an alias for a lib function (e.g. __builtin_sin), emit 3236 // the call using the normal call path, but using the unmangled 3237 // version of the function name. 3238 if (getContext().BuiltinInfo.isLibFunction(BuiltinID)) 3239 return emitLibraryCall(*this, FD, E, 3240 CGM.getBuiltinLibFunction(FD, BuiltinID)); 3241 3242 // If this is a predefined lib function (e.g. malloc), emit the call 3243 // using exactly the normal call path. 3244 if (getContext().BuiltinInfo.isPredefinedLibFunction(BuiltinID)) 3245 return emitLibraryCall(*this, FD, E, 3246 cast<llvm::Constant>(EmitScalarExpr(E->getCallee()))); 3247 3248 // Check that a call to a target specific builtin has the correct target 3249 // features. 3250 // This is down here to avoid non-target specific builtins, however, if 3251 // generic builtins start to require generic target features then we 3252 // can move this up to the beginning of the function. 3253 checkTargetFeatures(E, FD); 3254 3255 // See if we have a target specific intrinsic. 3256 const char *Name = getContext().BuiltinInfo.getName(BuiltinID); 3257 Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; 3258 StringRef Prefix = 3259 llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch()); 3260 if (!Prefix.empty()) { 3261 IntrinsicID = Intrinsic::getIntrinsicForGCCBuiltin(Prefix.data(), Name); 3262 // NOTE we dont need to perform a compatibility flag check here since the 3263 // intrinsics are declared in Builtins*.def via LANGBUILTIN which filter the 3264 // MS builtins via ALL_MS_LANGUAGES and are filtered earlier. 3265 if (IntrinsicID == Intrinsic::not_intrinsic) 3266 IntrinsicID = Intrinsic::getIntrinsicForMSBuiltin(Prefix.data(), Name); 3267 } 3268 3269 if (IntrinsicID != Intrinsic::not_intrinsic) { 3270 SmallVector<Value*, 16> Args; 3271 3272 // Find out if any arguments are required to be integer constant 3273 // expressions. 3274 unsigned ICEArguments = 0; 3275 ASTContext::GetBuiltinTypeError Error; 3276 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 3277 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 3278 3279 Function *F = CGM.getIntrinsic(IntrinsicID); 3280 llvm::FunctionType *FTy = F->getFunctionType(); 3281 3282 for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) { 3283 Value *ArgValue; 3284 // If this is a normal argument, just emit it as a scalar. 3285 if ((ICEArguments & (1 << i)) == 0) { 3286 ArgValue = EmitScalarExpr(E->getArg(i)); 3287 } else { 3288 // If this is required to be a constant, constant fold it so that we 3289 // know that the generated intrinsic gets a ConstantInt. 3290 llvm::APSInt Result; 3291 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result,getContext()); 3292 assert(IsConst && "Constant arg isn't actually constant?"); 3293 (void)IsConst; 3294 ArgValue = llvm::ConstantInt::get(getLLVMContext(), Result); 3295 } 3296 3297 // If the intrinsic arg type is different from the builtin arg type 3298 // we need to do a bit cast. 3299 llvm::Type *PTy = FTy->getParamType(i); 3300 if (PTy != ArgValue->getType()) { 3301 assert(PTy->canLosslesslyBitCastTo(FTy->getParamType(i)) && 3302 "Must be able to losslessly bit cast to param"); 3303 ArgValue = Builder.CreateBitCast(ArgValue, PTy); 3304 } 3305 3306 Args.push_back(ArgValue); 3307 } 3308 3309 Value *V = Builder.CreateCall(F, Args); 3310 QualType BuiltinRetType = E->getType(); 3311 3312 llvm::Type *RetTy = VoidTy; 3313 if (!BuiltinRetType->isVoidType()) 3314 RetTy = ConvertType(BuiltinRetType); 3315 3316 if (RetTy != V->getType()) { 3317 assert(V->getType()->canLosslesslyBitCastTo(RetTy) && 3318 "Must be able to losslessly bit cast result type"); 3319 V = Builder.CreateBitCast(V, RetTy); 3320 } 3321 3322 return RValue::get(V); 3323 } 3324 3325 // See if we have a target specific builtin that needs to be lowered. 3326 if (Value *V = EmitTargetBuiltinExpr(BuiltinID, E)) 3327 return RValue::get(V); 3328 3329 ErrorUnsupported(E, "builtin function"); 3330 3331 // Unknown builtin, for now just dump it out and return undef. 3332 return GetUndefRValue(E->getType()); 3333 } 3334 3335 static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF, 3336 unsigned BuiltinID, const CallExpr *E, 3337 llvm::Triple::ArchType Arch) { 3338 switch (Arch) { 3339 case llvm::Triple::arm: 3340 case llvm::Triple::armeb: 3341 case llvm::Triple::thumb: 3342 case llvm::Triple::thumbeb: 3343 return CGF->EmitARMBuiltinExpr(BuiltinID, E, Arch); 3344 case llvm::Triple::aarch64: 3345 case llvm::Triple::aarch64_be: 3346 return CGF->EmitAArch64BuiltinExpr(BuiltinID, E, Arch); 3347 case llvm::Triple::x86: 3348 case llvm::Triple::x86_64: 3349 return CGF->EmitX86BuiltinExpr(BuiltinID, E); 3350 case llvm::Triple::ppc: 3351 case llvm::Triple::ppc64: 3352 case llvm::Triple::ppc64le: 3353 return CGF->EmitPPCBuiltinExpr(BuiltinID, E); 3354 case llvm::Triple::r600: 3355 case llvm::Triple::amdgcn: 3356 return CGF->EmitAMDGPUBuiltinExpr(BuiltinID, E); 3357 case llvm::Triple::systemz: 3358 return CGF->EmitSystemZBuiltinExpr(BuiltinID, E); 3359 case llvm::Triple::nvptx: 3360 case llvm::Triple::nvptx64: 3361 return CGF->EmitNVPTXBuiltinExpr(BuiltinID, E); 3362 case llvm::Triple::wasm32: 3363 case llvm::Triple::wasm64: 3364 return CGF->EmitWebAssemblyBuiltinExpr(BuiltinID, E); 3365 case llvm::Triple::hexagon: 3366 return CGF->EmitHexagonBuiltinExpr(BuiltinID, E); 3367 default: 3368 return nullptr; 3369 } 3370 } 3371 3372 Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID, 3373 const CallExpr *E) { 3374 if (getContext().BuiltinInfo.isAuxBuiltinID(BuiltinID)) { 3375 assert(getContext().getAuxTargetInfo() && "Missing aux target info"); 3376 return EmitTargetArchBuiltinExpr( 3377 this, getContext().BuiltinInfo.getAuxBuiltinID(BuiltinID), E, 3378 getContext().getAuxTargetInfo()->getTriple().getArch()); 3379 } 3380 3381 return EmitTargetArchBuiltinExpr(this, BuiltinID, E, 3382 getTarget().getTriple().getArch()); 3383 } 3384 3385 static llvm::VectorType *GetNeonType(CodeGenFunction *CGF, 3386 NeonTypeFlags TypeFlags, 3387 llvm::Triple::ArchType Arch, 3388 bool V1Ty=false) { 3389 int IsQuad = TypeFlags.isQuad(); 3390 switch (TypeFlags.getEltType()) { 3391 case NeonTypeFlags::Int8: 3392 case NeonTypeFlags::Poly8: 3393 return llvm::VectorType::get(CGF->Int8Ty, V1Ty ? 1 : (8 << IsQuad)); 3394 case NeonTypeFlags::Int16: 3395 case NeonTypeFlags::Poly16: 3396 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 3397 case NeonTypeFlags::Float16: 3398 // FIXME: Only AArch64 backend can so far properly handle half types. 3399 // Remove else part once ARM backend support for half is complete. 3400 if (Arch == llvm::Triple::aarch64) 3401 return llvm::VectorType::get(CGF->HalfTy, V1Ty ? 1 : (4 << IsQuad)); 3402 else 3403 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 3404 case NeonTypeFlags::Int32: 3405 return llvm::VectorType::get(CGF->Int32Ty, V1Ty ? 1 : (2 << IsQuad)); 3406 case NeonTypeFlags::Int64: 3407 case NeonTypeFlags::Poly64: 3408 return llvm::VectorType::get(CGF->Int64Ty, V1Ty ? 1 : (1 << IsQuad)); 3409 case NeonTypeFlags::Poly128: 3410 // FIXME: i128 and f128 doesn't get fully support in Clang and llvm. 3411 // There is a lot of i128 and f128 API missing. 3412 // so we use v16i8 to represent poly128 and get pattern matched. 3413 return llvm::VectorType::get(CGF->Int8Ty, 16); 3414 case NeonTypeFlags::Float32: 3415 return llvm::VectorType::get(CGF->FloatTy, V1Ty ? 1 : (2 << IsQuad)); 3416 case NeonTypeFlags::Float64: 3417 return llvm::VectorType::get(CGF->DoubleTy, V1Ty ? 1 : (1 << IsQuad)); 3418 } 3419 llvm_unreachable("Unknown vector element type!"); 3420 } 3421 3422 static llvm::VectorType *GetFloatNeonType(CodeGenFunction *CGF, 3423 NeonTypeFlags IntTypeFlags) { 3424 int IsQuad = IntTypeFlags.isQuad(); 3425 switch (IntTypeFlags.getEltType()) { 3426 case NeonTypeFlags::Int16: 3427 return llvm::VectorType::get(CGF->HalfTy, (4 << IsQuad)); 3428 case NeonTypeFlags::Int32: 3429 return llvm::VectorType::get(CGF->FloatTy, (2 << IsQuad)); 3430 case NeonTypeFlags::Int64: 3431 return llvm::VectorType::get(CGF->DoubleTy, (1 << IsQuad)); 3432 default: 3433 llvm_unreachable("Type can't be converted to floating-point!"); 3434 } 3435 } 3436 3437 Value *CodeGenFunction::EmitNeonSplat(Value *V, Constant *C) { 3438 unsigned nElts = V->getType()->getVectorNumElements(); 3439 Value* SV = llvm::ConstantVector::getSplat(nElts, C); 3440 return Builder.CreateShuffleVector(V, V, SV, "lane"); 3441 } 3442 3443 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, 3444 const char *name, 3445 unsigned shift, bool rightshift) { 3446 unsigned j = 0; 3447 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 3448 ai != ae; ++ai, ++j) 3449 if (shift > 0 && shift == j) 3450 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); 3451 else 3452 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); 3453 3454 return Builder.CreateCall(F, Ops, name); 3455 } 3456 3457 Value *CodeGenFunction::EmitNeonShiftVector(Value *V, llvm::Type *Ty, 3458 bool neg) { 3459 int SV = cast<ConstantInt>(V)->getSExtValue(); 3460 return ConstantInt::get(Ty, neg ? -SV : SV); 3461 } 3462 3463 // \brief Right-shift a vector by a constant. 3464 Value *CodeGenFunction::EmitNeonRShiftImm(Value *Vec, Value *Shift, 3465 llvm::Type *Ty, bool usgn, 3466 const char *name) { 3467 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 3468 3469 int ShiftAmt = cast<ConstantInt>(Shift)->getSExtValue(); 3470 int EltSize = VTy->getScalarSizeInBits(); 3471 3472 Vec = Builder.CreateBitCast(Vec, Ty); 3473 3474 // lshr/ashr are undefined when the shift amount is equal to the vector 3475 // element size. 3476 if (ShiftAmt == EltSize) { 3477 if (usgn) { 3478 // Right-shifting an unsigned value by its size yields 0. 3479 return llvm::ConstantAggregateZero::get(VTy); 3480 } else { 3481 // Right-shifting a signed value by its size is equivalent 3482 // to a shift of size-1. 3483 --ShiftAmt; 3484 Shift = ConstantInt::get(VTy->getElementType(), ShiftAmt); 3485 } 3486 } 3487 3488 Shift = EmitNeonShiftVector(Shift, Ty, false); 3489 if (usgn) 3490 return Builder.CreateLShr(Vec, Shift, name); 3491 else 3492 return Builder.CreateAShr(Vec, Shift, name); 3493 } 3494 3495 enum { 3496 AddRetType = (1 << 0), 3497 Add1ArgType = (1 << 1), 3498 Add2ArgTypes = (1 << 2), 3499 3500 VectorizeRetType = (1 << 3), 3501 VectorizeArgTypes = (1 << 4), 3502 3503 InventFloatType = (1 << 5), 3504 UnsignedAlts = (1 << 6), 3505 3506 Use64BitVectors = (1 << 7), 3507 Use128BitVectors = (1 << 8), 3508 3509 Vectorize1ArgType = Add1ArgType | VectorizeArgTypes, 3510 VectorRet = AddRetType | VectorizeRetType, 3511 VectorRetGetArgs01 = 3512 AddRetType | Add2ArgTypes | VectorizeRetType | VectorizeArgTypes, 3513 FpCmpzModifiers = 3514 AddRetType | VectorizeRetType | Add1ArgType | InventFloatType 3515 }; 3516 3517 namespace { 3518 struct NeonIntrinsicInfo { 3519 const char *NameHint; 3520 unsigned BuiltinID; 3521 unsigned LLVMIntrinsic; 3522 unsigned AltLLVMIntrinsic; 3523 unsigned TypeModifier; 3524 3525 bool operator<(unsigned RHSBuiltinID) const { 3526 return BuiltinID < RHSBuiltinID; 3527 } 3528 bool operator<(const NeonIntrinsicInfo &TE) const { 3529 return BuiltinID < TE.BuiltinID; 3530 } 3531 }; 3532 } // end anonymous namespace 3533 3534 #define NEONMAP0(NameBase) \ 3535 { #NameBase, NEON::BI__builtin_neon_ ## NameBase, 0, 0, 0 } 3536 3537 #define NEONMAP1(NameBase, LLVMIntrinsic, TypeModifier) \ 3538 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 3539 Intrinsic::LLVMIntrinsic, 0, TypeModifier } 3540 3541 #define NEONMAP2(NameBase, LLVMIntrinsic, AltLLVMIntrinsic, TypeModifier) \ 3542 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 3543 Intrinsic::LLVMIntrinsic, Intrinsic::AltLLVMIntrinsic, \ 3544 TypeModifier } 3545 3546 static const NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = { 3547 NEONMAP2(vabd_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 3548 NEONMAP2(vabdq_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 3549 NEONMAP1(vabs_v, arm_neon_vabs, 0), 3550 NEONMAP1(vabsq_v, arm_neon_vabs, 0), 3551 NEONMAP0(vaddhn_v), 3552 NEONMAP1(vaesdq_v, arm_neon_aesd, 0), 3553 NEONMAP1(vaeseq_v, arm_neon_aese, 0), 3554 NEONMAP1(vaesimcq_v, arm_neon_aesimc, 0), 3555 NEONMAP1(vaesmcq_v, arm_neon_aesmc, 0), 3556 NEONMAP1(vbsl_v, arm_neon_vbsl, AddRetType), 3557 NEONMAP1(vbslq_v, arm_neon_vbsl, AddRetType), 3558 NEONMAP1(vcage_v, arm_neon_vacge, 0), 3559 NEONMAP1(vcageq_v, arm_neon_vacge, 0), 3560 NEONMAP1(vcagt_v, arm_neon_vacgt, 0), 3561 NEONMAP1(vcagtq_v, arm_neon_vacgt, 0), 3562 NEONMAP1(vcale_v, arm_neon_vacge, 0), 3563 NEONMAP1(vcaleq_v, arm_neon_vacge, 0), 3564 NEONMAP1(vcalt_v, arm_neon_vacgt, 0), 3565 NEONMAP1(vcaltq_v, arm_neon_vacgt, 0), 3566 NEONMAP1(vcls_v, arm_neon_vcls, Add1ArgType), 3567 NEONMAP1(vclsq_v, arm_neon_vcls, Add1ArgType), 3568 NEONMAP1(vclz_v, ctlz, Add1ArgType), 3569 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 3570 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 3571 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 3572 NEONMAP1(vcvt_f16_f32, arm_neon_vcvtfp2hf, 0), 3573 NEONMAP1(vcvt_f32_f16, arm_neon_vcvthf2fp, 0), 3574 NEONMAP0(vcvt_f32_v), 3575 NEONMAP2(vcvt_n_f16_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3576 NEONMAP2(vcvt_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3577 NEONMAP1(vcvt_n_s16_v, arm_neon_vcvtfp2fxs, 0), 3578 NEONMAP1(vcvt_n_s32_v, arm_neon_vcvtfp2fxs, 0), 3579 NEONMAP1(vcvt_n_s64_v, arm_neon_vcvtfp2fxs, 0), 3580 NEONMAP1(vcvt_n_u16_v, arm_neon_vcvtfp2fxu, 0), 3581 NEONMAP1(vcvt_n_u32_v, arm_neon_vcvtfp2fxu, 0), 3582 NEONMAP1(vcvt_n_u64_v, arm_neon_vcvtfp2fxu, 0), 3583 NEONMAP0(vcvt_s16_v), 3584 NEONMAP0(vcvt_s32_v), 3585 NEONMAP0(vcvt_s64_v), 3586 NEONMAP0(vcvt_u16_v), 3587 NEONMAP0(vcvt_u32_v), 3588 NEONMAP0(vcvt_u64_v), 3589 NEONMAP1(vcvta_s16_v, arm_neon_vcvtas, 0), 3590 NEONMAP1(vcvta_s32_v, arm_neon_vcvtas, 0), 3591 NEONMAP1(vcvta_s64_v, arm_neon_vcvtas, 0), 3592 NEONMAP1(vcvta_u32_v, arm_neon_vcvtau, 0), 3593 NEONMAP1(vcvta_u64_v, arm_neon_vcvtau, 0), 3594 NEONMAP1(vcvtaq_s16_v, arm_neon_vcvtas, 0), 3595 NEONMAP1(vcvtaq_s32_v, arm_neon_vcvtas, 0), 3596 NEONMAP1(vcvtaq_s64_v, arm_neon_vcvtas, 0), 3597 NEONMAP1(vcvtaq_u16_v, arm_neon_vcvtau, 0), 3598 NEONMAP1(vcvtaq_u32_v, arm_neon_vcvtau, 0), 3599 NEONMAP1(vcvtaq_u64_v, arm_neon_vcvtau, 0), 3600 NEONMAP1(vcvtm_s16_v, arm_neon_vcvtms, 0), 3601 NEONMAP1(vcvtm_s32_v, arm_neon_vcvtms, 0), 3602 NEONMAP1(vcvtm_s64_v, arm_neon_vcvtms, 0), 3603 NEONMAP1(vcvtm_u16_v, arm_neon_vcvtmu, 0), 3604 NEONMAP1(vcvtm_u32_v, arm_neon_vcvtmu, 0), 3605 NEONMAP1(vcvtm_u64_v, arm_neon_vcvtmu, 0), 3606 NEONMAP1(vcvtmq_s16_v, arm_neon_vcvtms, 0), 3607 NEONMAP1(vcvtmq_s32_v, arm_neon_vcvtms, 0), 3608 NEONMAP1(vcvtmq_s64_v, arm_neon_vcvtms, 0), 3609 NEONMAP1(vcvtmq_u16_v, arm_neon_vcvtmu, 0), 3610 NEONMAP1(vcvtmq_u32_v, arm_neon_vcvtmu, 0), 3611 NEONMAP1(vcvtmq_u64_v, arm_neon_vcvtmu, 0), 3612 NEONMAP1(vcvtn_s16_v, arm_neon_vcvtns, 0), 3613 NEONMAP1(vcvtn_s32_v, arm_neon_vcvtns, 0), 3614 NEONMAP1(vcvtn_s64_v, arm_neon_vcvtns, 0), 3615 NEONMAP1(vcvtn_u16_v, arm_neon_vcvtnu, 0), 3616 NEONMAP1(vcvtn_u32_v, arm_neon_vcvtnu, 0), 3617 NEONMAP1(vcvtn_u64_v, arm_neon_vcvtnu, 0), 3618 NEONMAP1(vcvtnq_s16_v, arm_neon_vcvtns, 0), 3619 NEONMAP1(vcvtnq_s32_v, arm_neon_vcvtns, 0), 3620 NEONMAP1(vcvtnq_s64_v, arm_neon_vcvtns, 0), 3621 NEONMAP1(vcvtnq_u16_v, arm_neon_vcvtnu, 0), 3622 NEONMAP1(vcvtnq_u32_v, arm_neon_vcvtnu, 0), 3623 NEONMAP1(vcvtnq_u64_v, arm_neon_vcvtnu, 0), 3624 NEONMAP1(vcvtp_s16_v, arm_neon_vcvtps, 0), 3625 NEONMAP1(vcvtp_s32_v, arm_neon_vcvtps, 0), 3626 NEONMAP1(vcvtp_s64_v, arm_neon_vcvtps, 0), 3627 NEONMAP1(vcvtp_u16_v, arm_neon_vcvtpu, 0), 3628 NEONMAP1(vcvtp_u32_v, arm_neon_vcvtpu, 0), 3629 NEONMAP1(vcvtp_u64_v, arm_neon_vcvtpu, 0), 3630 NEONMAP1(vcvtpq_s16_v, arm_neon_vcvtps, 0), 3631 NEONMAP1(vcvtpq_s32_v, arm_neon_vcvtps, 0), 3632 NEONMAP1(vcvtpq_s64_v, arm_neon_vcvtps, 0), 3633 NEONMAP1(vcvtpq_u16_v, arm_neon_vcvtpu, 0), 3634 NEONMAP1(vcvtpq_u32_v, arm_neon_vcvtpu, 0), 3635 NEONMAP1(vcvtpq_u64_v, arm_neon_vcvtpu, 0), 3636 NEONMAP0(vcvtq_f32_v), 3637 NEONMAP2(vcvtq_n_f16_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3638 NEONMAP2(vcvtq_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3639 NEONMAP1(vcvtq_n_s16_v, arm_neon_vcvtfp2fxs, 0), 3640 NEONMAP1(vcvtq_n_s32_v, arm_neon_vcvtfp2fxs, 0), 3641 NEONMAP1(vcvtq_n_s64_v, arm_neon_vcvtfp2fxs, 0), 3642 NEONMAP1(vcvtq_n_u16_v, arm_neon_vcvtfp2fxu, 0), 3643 NEONMAP1(vcvtq_n_u32_v, arm_neon_vcvtfp2fxu, 0), 3644 NEONMAP1(vcvtq_n_u64_v, arm_neon_vcvtfp2fxu, 0), 3645 NEONMAP0(vcvtq_s16_v), 3646 NEONMAP0(vcvtq_s32_v), 3647 NEONMAP0(vcvtq_s64_v), 3648 NEONMAP0(vcvtq_u16_v), 3649 NEONMAP0(vcvtq_u32_v), 3650 NEONMAP0(vcvtq_u64_v), 3651 NEONMAP0(vext_v), 3652 NEONMAP0(vextq_v), 3653 NEONMAP0(vfma_v), 3654 NEONMAP0(vfmaq_v), 3655 NEONMAP2(vhadd_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 3656 NEONMAP2(vhaddq_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 3657 NEONMAP2(vhsub_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 3658 NEONMAP2(vhsubq_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 3659 NEONMAP0(vld1_dup_v), 3660 NEONMAP1(vld1_v, arm_neon_vld1, 0), 3661 NEONMAP0(vld1q_dup_v), 3662 NEONMAP1(vld1q_v, arm_neon_vld1, 0), 3663 NEONMAP1(vld2_lane_v, arm_neon_vld2lane, 0), 3664 NEONMAP1(vld2_v, arm_neon_vld2, 0), 3665 NEONMAP1(vld2q_lane_v, arm_neon_vld2lane, 0), 3666 NEONMAP1(vld2q_v, arm_neon_vld2, 0), 3667 NEONMAP1(vld3_lane_v, arm_neon_vld3lane, 0), 3668 NEONMAP1(vld3_v, arm_neon_vld3, 0), 3669 NEONMAP1(vld3q_lane_v, arm_neon_vld3lane, 0), 3670 NEONMAP1(vld3q_v, arm_neon_vld3, 0), 3671 NEONMAP1(vld4_lane_v, arm_neon_vld4lane, 0), 3672 NEONMAP1(vld4_v, arm_neon_vld4, 0), 3673 NEONMAP1(vld4q_lane_v, arm_neon_vld4lane, 0), 3674 NEONMAP1(vld4q_v, arm_neon_vld4, 0), 3675 NEONMAP2(vmax_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 3676 NEONMAP1(vmaxnm_v, arm_neon_vmaxnm, Add1ArgType), 3677 NEONMAP1(vmaxnmq_v, arm_neon_vmaxnm, Add1ArgType), 3678 NEONMAP2(vmaxq_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 3679 NEONMAP2(vmin_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 3680 NEONMAP1(vminnm_v, arm_neon_vminnm, Add1ArgType), 3681 NEONMAP1(vminnmq_v, arm_neon_vminnm, Add1ArgType), 3682 NEONMAP2(vminq_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 3683 NEONMAP0(vmovl_v), 3684 NEONMAP0(vmovn_v), 3685 NEONMAP1(vmul_v, arm_neon_vmulp, Add1ArgType), 3686 NEONMAP0(vmull_v), 3687 NEONMAP1(vmulq_v, arm_neon_vmulp, Add1ArgType), 3688 NEONMAP2(vpadal_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 3689 NEONMAP2(vpadalq_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 3690 NEONMAP1(vpadd_v, arm_neon_vpadd, Add1ArgType), 3691 NEONMAP2(vpaddl_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 3692 NEONMAP2(vpaddlq_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 3693 NEONMAP1(vpaddq_v, arm_neon_vpadd, Add1ArgType), 3694 NEONMAP2(vpmax_v, arm_neon_vpmaxu, arm_neon_vpmaxs, Add1ArgType | UnsignedAlts), 3695 NEONMAP2(vpmin_v, arm_neon_vpminu, arm_neon_vpmins, Add1ArgType | UnsignedAlts), 3696 NEONMAP1(vqabs_v, arm_neon_vqabs, Add1ArgType), 3697 NEONMAP1(vqabsq_v, arm_neon_vqabs, Add1ArgType), 3698 NEONMAP2(vqadd_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 3699 NEONMAP2(vqaddq_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 3700 NEONMAP2(vqdmlal_v, arm_neon_vqdmull, arm_neon_vqadds, 0), 3701 NEONMAP2(vqdmlsl_v, arm_neon_vqdmull, arm_neon_vqsubs, 0), 3702 NEONMAP1(vqdmulh_v, arm_neon_vqdmulh, Add1ArgType), 3703 NEONMAP1(vqdmulhq_v, arm_neon_vqdmulh, Add1ArgType), 3704 NEONMAP1(vqdmull_v, arm_neon_vqdmull, Add1ArgType), 3705 NEONMAP2(vqmovn_v, arm_neon_vqmovnu, arm_neon_vqmovns, Add1ArgType | UnsignedAlts), 3706 NEONMAP1(vqmovun_v, arm_neon_vqmovnsu, Add1ArgType), 3707 NEONMAP1(vqneg_v, arm_neon_vqneg, Add1ArgType), 3708 NEONMAP1(vqnegq_v, arm_neon_vqneg, Add1ArgType), 3709 NEONMAP1(vqrdmulh_v, arm_neon_vqrdmulh, Add1ArgType), 3710 NEONMAP1(vqrdmulhq_v, arm_neon_vqrdmulh, Add1ArgType), 3711 NEONMAP2(vqrshl_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 3712 NEONMAP2(vqrshlq_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 3713 NEONMAP2(vqshl_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 3714 NEONMAP2(vqshl_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 3715 NEONMAP2(vqshlq_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 3716 NEONMAP2(vqshlq_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 3717 NEONMAP1(vqshlu_n_v, arm_neon_vqshiftsu, 0), 3718 NEONMAP1(vqshluq_n_v, arm_neon_vqshiftsu, 0), 3719 NEONMAP2(vqsub_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 3720 NEONMAP2(vqsubq_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 3721 NEONMAP1(vraddhn_v, arm_neon_vraddhn, Add1ArgType), 3722 NEONMAP2(vrecpe_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 3723 NEONMAP2(vrecpeq_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 3724 NEONMAP1(vrecps_v, arm_neon_vrecps, Add1ArgType), 3725 NEONMAP1(vrecpsq_v, arm_neon_vrecps, Add1ArgType), 3726 NEONMAP2(vrhadd_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 3727 NEONMAP2(vrhaddq_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 3728 NEONMAP1(vrnd_v, arm_neon_vrintz, Add1ArgType), 3729 NEONMAP1(vrnda_v, arm_neon_vrinta, Add1ArgType), 3730 NEONMAP1(vrndaq_v, arm_neon_vrinta, Add1ArgType), 3731 NEONMAP1(vrndm_v, arm_neon_vrintm, Add1ArgType), 3732 NEONMAP1(vrndmq_v, arm_neon_vrintm, Add1ArgType), 3733 NEONMAP1(vrndn_v, arm_neon_vrintn, Add1ArgType), 3734 NEONMAP1(vrndnq_v, arm_neon_vrintn, Add1ArgType), 3735 NEONMAP1(vrndp_v, arm_neon_vrintp, Add1ArgType), 3736 NEONMAP1(vrndpq_v, arm_neon_vrintp, Add1ArgType), 3737 NEONMAP1(vrndq_v, arm_neon_vrintz, Add1ArgType), 3738 NEONMAP1(vrndx_v, arm_neon_vrintx, Add1ArgType), 3739 NEONMAP1(vrndxq_v, arm_neon_vrintx, Add1ArgType), 3740 NEONMAP2(vrshl_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 3741 NEONMAP2(vrshlq_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 3742 NEONMAP2(vrshr_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 3743 NEONMAP2(vrshrq_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 3744 NEONMAP2(vrsqrte_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 3745 NEONMAP2(vrsqrteq_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 3746 NEONMAP1(vrsqrts_v, arm_neon_vrsqrts, Add1ArgType), 3747 NEONMAP1(vrsqrtsq_v, arm_neon_vrsqrts, Add1ArgType), 3748 NEONMAP1(vrsubhn_v, arm_neon_vrsubhn, Add1ArgType), 3749 NEONMAP1(vsha1su0q_v, arm_neon_sha1su0, 0), 3750 NEONMAP1(vsha1su1q_v, arm_neon_sha1su1, 0), 3751 NEONMAP1(vsha256h2q_v, arm_neon_sha256h2, 0), 3752 NEONMAP1(vsha256hq_v, arm_neon_sha256h, 0), 3753 NEONMAP1(vsha256su0q_v, arm_neon_sha256su0, 0), 3754 NEONMAP1(vsha256su1q_v, arm_neon_sha256su1, 0), 3755 NEONMAP0(vshl_n_v), 3756 NEONMAP2(vshl_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 3757 NEONMAP0(vshll_n_v), 3758 NEONMAP0(vshlq_n_v), 3759 NEONMAP2(vshlq_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 3760 NEONMAP0(vshr_n_v), 3761 NEONMAP0(vshrn_n_v), 3762 NEONMAP0(vshrq_n_v), 3763 NEONMAP1(vst1_v, arm_neon_vst1, 0), 3764 NEONMAP1(vst1q_v, arm_neon_vst1, 0), 3765 NEONMAP1(vst2_lane_v, arm_neon_vst2lane, 0), 3766 NEONMAP1(vst2_v, arm_neon_vst2, 0), 3767 NEONMAP1(vst2q_lane_v, arm_neon_vst2lane, 0), 3768 NEONMAP1(vst2q_v, arm_neon_vst2, 0), 3769 NEONMAP1(vst3_lane_v, arm_neon_vst3lane, 0), 3770 NEONMAP1(vst3_v, arm_neon_vst3, 0), 3771 NEONMAP1(vst3q_lane_v, arm_neon_vst3lane, 0), 3772 NEONMAP1(vst3q_v, arm_neon_vst3, 0), 3773 NEONMAP1(vst4_lane_v, arm_neon_vst4lane, 0), 3774 NEONMAP1(vst4_v, arm_neon_vst4, 0), 3775 NEONMAP1(vst4q_lane_v, arm_neon_vst4lane, 0), 3776 NEONMAP1(vst4q_v, arm_neon_vst4, 0), 3777 NEONMAP0(vsubhn_v), 3778 NEONMAP0(vtrn_v), 3779 NEONMAP0(vtrnq_v), 3780 NEONMAP0(vtst_v), 3781 NEONMAP0(vtstq_v), 3782 NEONMAP0(vuzp_v), 3783 NEONMAP0(vuzpq_v), 3784 NEONMAP0(vzip_v), 3785 NEONMAP0(vzipq_v) 3786 }; 3787 3788 static const NeonIntrinsicInfo AArch64SIMDIntrinsicMap[] = { 3789 NEONMAP1(vabs_v, aarch64_neon_abs, 0), 3790 NEONMAP1(vabsq_v, aarch64_neon_abs, 0), 3791 NEONMAP0(vaddhn_v), 3792 NEONMAP1(vaesdq_v, aarch64_crypto_aesd, 0), 3793 NEONMAP1(vaeseq_v, aarch64_crypto_aese, 0), 3794 NEONMAP1(vaesimcq_v, aarch64_crypto_aesimc, 0), 3795 NEONMAP1(vaesmcq_v, aarch64_crypto_aesmc, 0), 3796 NEONMAP1(vcage_v, aarch64_neon_facge, 0), 3797 NEONMAP1(vcageq_v, aarch64_neon_facge, 0), 3798 NEONMAP1(vcagt_v, aarch64_neon_facgt, 0), 3799 NEONMAP1(vcagtq_v, aarch64_neon_facgt, 0), 3800 NEONMAP1(vcale_v, aarch64_neon_facge, 0), 3801 NEONMAP1(vcaleq_v, aarch64_neon_facge, 0), 3802 NEONMAP1(vcalt_v, aarch64_neon_facgt, 0), 3803 NEONMAP1(vcaltq_v, aarch64_neon_facgt, 0), 3804 NEONMAP1(vcls_v, aarch64_neon_cls, Add1ArgType), 3805 NEONMAP1(vclsq_v, aarch64_neon_cls, Add1ArgType), 3806 NEONMAP1(vclz_v, ctlz, Add1ArgType), 3807 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 3808 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 3809 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 3810 NEONMAP1(vcvt_f16_f32, aarch64_neon_vcvtfp2hf, 0), 3811 NEONMAP0(vcvt_f16_v), 3812 NEONMAP1(vcvt_f32_f16, aarch64_neon_vcvthf2fp, 0), 3813 NEONMAP0(vcvt_f32_v), 3814 NEONMAP2(vcvt_n_f16_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3815 NEONMAP2(vcvt_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3816 NEONMAP2(vcvt_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3817 NEONMAP1(vcvt_n_s16_v, aarch64_neon_vcvtfp2fxs, 0), 3818 NEONMAP1(vcvt_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 3819 NEONMAP1(vcvt_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 3820 NEONMAP1(vcvt_n_u16_v, aarch64_neon_vcvtfp2fxu, 0), 3821 NEONMAP1(vcvt_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 3822 NEONMAP1(vcvt_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 3823 NEONMAP0(vcvtq_f16_v), 3824 NEONMAP0(vcvtq_f32_v), 3825 NEONMAP2(vcvtq_n_f16_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3826 NEONMAP2(vcvtq_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3827 NEONMAP2(vcvtq_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3828 NEONMAP1(vcvtq_n_s16_v, aarch64_neon_vcvtfp2fxs, 0), 3829 NEONMAP1(vcvtq_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 3830 NEONMAP1(vcvtq_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 3831 NEONMAP1(vcvtq_n_u16_v, aarch64_neon_vcvtfp2fxu, 0), 3832 NEONMAP1(vcvtq_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 3833 NEONMAP1(vcvtq_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 3834 NEONMAP1(vcvtx_f32_v, aarch64_neon_fcvtxn, AddRetType | Add1ArgType), 3835 NEONMAP0(vext_v), 3836 NEONMAP0(vextq_v), 3837 NEONMAP0(vfma_v), 3838 NEONMAP0(vfmaq_v), 3839 NEONMAP2(vhadd_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 3840 NEONMAP2(vhaddq_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 3841 NEONMAP2(vhsub_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 3842 NEONMAP2(vhsubq_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 3843 NEONMAP0(vmovl_v), 3844 NEONMAP0(vmovn_v), 3845 NEONMAP1(vmul_v, aarch64_neon_pmul, Add1ArgType), 3846 NEONMAP1(vmulq_v, aarch64_neon_pmul, Add1ArgType), 3847 NEONMAP1(vpadd_v, aarch64_neon_addp, Add1ArgType), 3848 NEONMAP2(vpaddl_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 3849 NEONMAP2(vpaddlq_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 3850 NEONMAP1(vpaddq_v, aarch64_neon_addp, Add1ArgType), 3851 NEONMAP1(vqabs_v, aarch64_neon_sqabs, Add1ArgType), 3852 NEONMAP1(vqabsq_v, aarch64_neon_sqabs, Add1ArgType), 3853 NEONMAP2(vqadd_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 3854 NEONMAP2(vqaddq_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 3855 NEONMAP2(vqdmlal_v, aarch64_neon_sqdmull, aarch64_neon_sqadd, 0), 3856 NEONMAP2(vqdmlsl_v, aarch64_neon_sqdmull, aarch64_neon_sqsub, 0), 3857 NEONMAP1(vqdmulh_v, aarch64_neon_sqdmulh, Add1ArgType), 3858 NEONMAP1(vqdmulhq_v, aarch64_neon_sqdmulh, Add1ArgType), 3859 NEONMAP1(vqdmull_v, aarch64_neon_sqdmull, Add1ArgType), 3860 NEONMAP2(vqmovn_v, aarch64_neon_uqxtn, aarch64_neon_sqxtn, Add1ArgType | UnsignedAlts), 3861 NEONMAP1(vqmovun_v, aarch64_neon_sqxtun, Add1ArgType), 3862 NEONMAP1(vqneg_v, aarch64_neon_sqneg, Add1ArgType), 3863 NEONMAP1(vqnegq_v, aarch64_neon_sqneg, Add1ArgType), 3864 NEONMAP1(vqrdmulh_v, aarch64_neon_sqrdmulh, Add1ArgType), 3865 NEONMAP1(vqrdmulhq_v, aarch64_neon_sqrdmulh, Add1ArgType), 3866 NEONMAP2(vqrshl_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 3867 NEONMAP2(vqrshlq_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 3868 NEONMAP2(vqshl_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl, UnsignedAlts), 3869 NEONMAP2(vqshl_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 3870 NEONMAP2(vqshlq_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl,UnsignedAlts), 3871 NEONMAP2(vqshlq_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 3872 NEONMAP1(vqshlu_n_v, aarch64_neon_sqshlu, 0), 3873 NEONMAP1(vqshluq_n_v, aarch64_neon_sqshlu, 0), 3874 NEONMAP2(vqsub_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 3875 NEONMAP2(vqsubq_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 3876 NEONMAP1(vraddhn_v, aarch64_neon_raddhn, Add1ArgType), 3877 NEONMAP2(vrecpe_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 3878 NEONMAP2(vrecpeq_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 3879 NEONMAP1(vrecps_v, aarch64_neon_frecps, Add1ArgType), 3880 NEONMAP1(vrecpsq_v, aarch64_neon_frecps, Add1ArgType), 3881 NEONMAP2(vrhadd_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 3882 NEONMAP2(vrhaddq_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 3883 NEONMAP2(vrshl_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 3884 NEONMAP2(vrshlq_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 3885 NEONMAP2(vrshr_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 3886 NEONMAP2(vrshrq_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 3887 NEONMAP2(vrsqrte_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 3888 NEONMAP2(vrsqrteq_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 3889 NEONMAP1(vrsqrts_v, aarch64_neon_frsqrts, Add1ArgType), 3890 NEONMAP1(vrsqrtsq_v, aarch64_neon_frsqrts, Add1ArgType), 3891 NEONMAP1(vrsubhn_v, aarch64_neon_rsubhn, Add1ArgType), 3892 NEONMAP1(vsha1su0q_v, aarch64_crypto_sha1su0, 0), 3893 NEONMAP1(vsha1su1q_v, aarch64_crypto_sha1su1, 0), 3894 NEONMAP1(vsha256h2q_v, aarch64_crypto_sha256h2, 0), 3895 NEONMAP1(vsha256hq_v, aarch64_crypto_sha256h, 0), 3896 NEONMAP1(vsha256su0q_v, aarch64_crypto_sha256su0, 0), 3897 NEONMAP1(vsha256su1q_v, aarch64_crypto_sha256su1, 0), 3898 NEONMAP0(vshl_n_v), 3899 NEONMAP2(vshl_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 3900 NEONMAP0(vshll_n_v), 3901 NEONMAP0(vshlq_n_v), 3902 NEONMAP2(vshlq_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 3903 NEONMAP0(vshr_n_v), 3904 NEONMAP0(vshrn_n_v), 3905 NEONMAP0(vshrq_n_v), 3906 NEONMAP0(vsubhn_v), 3907 NEONMAP0(vtst_v), 3908 NEONMAP0(vtstq_v), 3909 }; 3910 3911 static const NeonIntrinsicInfo AArch64SISDIntrinsicMap[] = { 3912 NEONMAP1(vabdd_f64, aarch64_sisd_fabd, Add1ArgType), 3913 NEONMAP1(vabds_f32, aarch64_sisd_fabd, Add1ArgType), 3914 NEONMAP1(vabsd_s64, aarch64_neon_abs, Add1ArgType), 3915 NEONMAP1(vaddlv_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 3916 NEONMAP1(vaddlv_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 3917 NEONMAP1(vaddlvq_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 3918 NEONMAP1(vaddlvq_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 3919 NEONMAP1(vaddv_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 3920 NEONMAP1(vaddv_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 3921 NEONMAP1(vaddv_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3922 NEONMAP1(vaddvq_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 3923 NEONMAP1(vaddvq_f64, aarch64_neon_faddv, AddRetType | Add1ArgType), 3924 NEONMAP1(vaddvq_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 3925 NEONMAP1(vaddvq_s64, aarch64_neon_saddv, AddRetType | Add1ArgType), 3926 NEONMAP1(vaddvq_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3927 NEONMAP1(vaddvq_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3928 NEONMAP1(vcaged_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 3929 NEONMAP1(vcages_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 3930 NEONMAP1(vcagtd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 3931 NEONMAP1(vcagts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 3932 NEONMAP1(vcaled_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 3933 NEONMAP1(vcales_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 3934 NEONMAP1(vcaltd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 3935 NEONMAP1(vcalts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 3936 NEONMAP1(vcvtad_s64_f64, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 3937 NEONMAP1(vcvtad_u64_f64, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 3938 NEONMAP1(vcvtas_s32_f32, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 3939 NEONMAP1(vcvtas_u32_f32, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 3940 NEONMAP1(vcvtd_n_f64_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 3941 NEONMAP1(vcvtd_n_f64_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 3942 NEONMAP1(vcvtd_n_s64_f64, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 3943 NEONMAP1(vcvtd_n_u64_f64, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 3944 NEONMAP1(vcvtmd_s64_f64, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 3945 NEONMAP1(vcvtmd_u64_f64, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 3946 NEONMAP1(vcvtms_s32_f32, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 3947 NEONMAP1(vcvtms_u32_f32, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 3948 NEONMAP1(vcvtnd_s64_f64, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 3949 NEONMAP1(vcvtnd_u64_f64, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 3950 NEONMAP1(vcvtns_s32_f32, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 3951 NEONMAP1(vcvtns_u32_f32, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 3952 NEONMAP1(vcvtpd_s64_f64, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 3953 NEONMAP1(vcvtpd_u64_f64, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 3954 NEONMAP1(vcvtps_s32_f32, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 3955 NEONMAP1(vcvtps_u32_f32, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 3956 NEONMAP1(vcvts_n_f32_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 3957 NEONMAP1(vcvts_n_f32_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 3958 NEONMAP1(vcvts_n_s32_f32, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 3959 NEONMAP1(vcvts_n_u32_f32, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 3960 NEONMAP1(vcvtxd_f32_f64, aarch64_sisd_fcvtxn, 0), 3961 NEONMAP1(vmaxnmv_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3962 NEONMAP1(vmaxnmvq_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3963 NEONMAP1(vmaxnmvq_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3964 NEONMAP1(vmaxv_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3965 NEONMAP1(vmaxv_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 3966 NEONMAP1(vmaxv_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 3967 NEONMAP1(vmaxvq_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3968 NEONMAP1(vmaxvq_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3969 NEONMAP1(vmaxvq_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 3970 NEONMAP1(vmaxvq_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 3971 NEONMAP1(vminnmv_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3972 NEONMAP1(vminnmvq_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3973 NEONMAP1(vminnmvq_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3974 NEONMAP1(vminv_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3975 NEONMAP1(vminv_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 3976 NEONMAP1(vminv_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 3977 NEONMAP1(vminvq_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3978 NEONMAP1(vminvq_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 3979 NEONMAP1(vminvq_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 3980 NEONMAP1(vminvq_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 3981 NEONMAP1(vmull_p64, aarch64_neon_pmull64, 0), 3982 NEONMAP1(vmulxd_f64, aarch64_neon_fmulx, Add1ArgType), 3983 NEONMAP1(vmulxs_f32, aarch64_neon_fmulx, Add1ArgType), 3984 NEONMAP1(vpaddd_s64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3985 NEONMAP1(vpaddd_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3986 NEONMAP1(vpmaxnmqd_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3987 NEONMAP1(vpmaxnms_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3988 NEONMAP1(vpmaxqd_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3989 NEONMAP1(vpmaxs_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3990 NEONMAP1(vpminnmqd_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3991 NEONMAP1(vpminnms_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3992 NEONMAP1(vpminqd_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 3993 NEONMAP1(vpmins_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3994 NEONMAP1(vqabsb_s8, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 3995 NEONMAP1(vqabsd_s64, aarch64_neon_sqabs, Add1ArgType), 3996 NEONMAP1(vqabsh_s16, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 3997 NEONMAP1(vqabss_s32, aarch64_neon_sqabs, Add1ArgType), 3998 NEONMAP1(vqaddb_s8, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 3999 NEONMAP1(vqaddb_u8, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 4000 NEONMAP1(vqaddd_s64, aarch64_neon_sqadd, Add1ArgType), 4001 NEONMAP1(vqaddd_u64, aarch64_neon_uqadd, Add1ArgType), 4002 NEONMAP1(vqaddh_s16, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 4003 NEONMAP1(vqaddh_u16, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 4004 NEONMAP1(vqadds_s32, aarch64_neon_sqadd, Add1ArgType), 4005 NEONMAP1(vqadds_u32, aarch64_neon_uqadd, Add1ArgType), 4006 NEONMAP1(vqdmulhh_s16, aarch64_neon_sqdmulh, Vectorize1ArgType | Use64BitVectors), 4007 NEONMAP1(vqdmulhs_s32, aarch64_neon_sqdmulh, Add1ArgType), 4008 NEONMAP1(vqdmullh_s16, aarch64_neon_sqdmull, VectorRet | Use128BitVectors), 4009 NEONMAP1(vqdmulls_s32, aarch64_neon_sqdmulls_scalar, 0), 4010 NEONMAP1(vqmovnd_s64, aarch64_neon_scalar_sqxtn, AddRetType | Add1ArgType), 4011 NEONMAP1(vqmovnd_u64, aarch64_neon_scalar_uqxtn, AddRetType | Add1ArgType), 4012 NEONMAP1(vqmovnh_s16, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 4013 NEONMAP1(vqmovnh_u16, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 4014 NEONMAP1(vqmovns_s32, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 4015 NEONMAP1(vqmovns_u32, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 4016 NEONMAP1(vqmovund_s64, aarch64_neon_scalar_sqxtun, AddRetType | Add1ArgType), 4017 NEONMAP1(vqmovunh_s16, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 4018 NEONMAP1(vqmovuns_s32, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 4019 NEONMAP1(vqnegb_s8, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 4020 NEONMAP1(vqnegd_s64, aarch64_neon_sqneg, Add1ArgType), 4021 NEONMAP1(vqnegh_s16, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 4022 NEONMAP1(vqnegs_s32, aarch64_neon_sqneg, Add1ArgType), 4023 NEONMAP1(vqrdmulhh_s16, aarch64_neon_sqrdmulh, Vectorize1ArgType | Use64BitVectors), 4024 NEONMAP1(vqrdmulhs_s32, aarch64_neon_sqrdmulh, Add1ArgType), 4025 NEONMAP1(vqrshlb_s8, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 4026 NEONMAP1(vqrshlb_u8, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 4027 NEONMAP1(vqrshld_s64, aarch64_neon_sqrshl, Add1ArgType), 4028 NEONMAP1(vqrshld_u64, aarch64_neon_uqrshl, Add1ArgType), 4029 NEONMAP1(vqrshlh_s16, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 4030 NEONMAP1(vqrshlh_u16, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 4031 NEONMAP1(vqrshls_s32, aarch64_neon_sqrshl, Add1ArgType), 4032 NEONMAP1(vqrshls_u32, aarch64_neon_uqrshl, Add1ArgType), 4033 NEONMAP1(vqrshrnd_n_s64, aarch64_neon_sqrshrn, AddRetType), 4034 NEONMAP1(vqrshrnd_n_u64, aarch64_neon_uqrshrn, AddRetType), 4035 NEONMAP1(vqrshrnh_n_s16, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 4036 NEONMAP1(vqrshrnh_n_u16, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 4037 NEONMAP1(vqrshrns_n_s32, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 4038 NEONMAP1(vqrshrns_n_u32, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 4039 NEONMAP1(vqrshrund_n_s64, aarch64_neon_sqrshrun, AddRetType), 4040 NEONMAP1(vqrshrunh_n_s16, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 4041 NEONMAP1(vqrshruns_n_s32, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 4042 NEONMAP1(vqshlb_n_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4043 NEONMAP1(vqshlb_n_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4044 NEONMAP1(vqshlb_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4045 NEONMAP1(vqshlb_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4046 NEONMAP1(vqshld_s64, aarch64_neon_sqshl, Add1ArgType), 4047 NEONMAP1(vqshld_u64, aarch64_neon_uqshl, Add1ArgType), 4048 NEONMAP1(vqshlh_n_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4049 NEONMAP1(vqshlh_n_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4050 NEONMAP1(vqshlh_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4051 NEONMAP1(vqshlh_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4052 NEONMAP1(vqshls_n_s32, aarch64_neon_sqshl, Add1ArgType), 4053 NEONMAP1(vqshls_n_u32, aarch64_neon_uqshl, Add1ArgType), 4054 NEONMAP1(vqshls_s32, aarch64_neon_sqshl, Add1ArgType), 4055 NEONMAP1(vqshls_u32, aarch64_neon_uqshl, Add1ArgType), 4056 NEONMAP1(vqshlub_n_s8, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 4057 NEONMAP1(vqshluh_n_s16, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 4058 NEONMAP1(vqshlus_n_s32, aarch64_neon_sqshlu, Add1ArgType), 4059 NEONMAP1(vqshrnd_n_s64, aarch64_neon_sqshrn, AddRetType), 4060 NEONMAP1(vqshrnd_n_u64, aarch64_neon_uqshrn, AddRetType), 4061 NEONMAP1(vqshrnh_n_s16, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 4062 NEONMAP1(vqshrnh_n_u16, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 4063 NEONMAP1(vqshrns_n_s32, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 4064 NEONMAP1(vqshrns_n_u32, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 4065 NEONMAP1(vqshrund_n_s64, aarch64_neon_sqshrun, AddRetType), 4066 NEONMAP1(vqshrunh_n_s16, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 4067 NEONMAP1(vqshruns_n_s32, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 4068 NEONMAP1(vqsubb_s8, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 4069 NEONMAP1(vqsubb_u8, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 4070 NEONMAP1(vqsubd_s64, aarch64_neon_sqsub, Add1ArgType), 4071 NEONMAP1(vqsubd_u64, aarch64_neon_uqsub, Add1ArgType), 4072 NEONMAP1(vqsubh_s16, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 4073 NEONMAP1(vqsubh_u16, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 4074 NEONMAP1(vqsubs_s32, aarch64_neon_sqsub, Add1ArgType), 4075 NEONMAP1(vqsubs_u32, aarch64_neon_uqsub, Add1ArgType), 4076 NEONMAP1(vrecped_f64, aarch64_neon_frecpe, Add1ArgType), 4077 NEONMAP1(vrecpes_f32, aarch64_neon_frecpe, Add1ArgType), 4078 NEONMAP1(vrecpxd_f64, aarch64_neon_frecpx, Add1ArgType), 4079 NEONMAP1(vrecpxs_f32, aarch64_neon_frecpx, Add1ArgType), 4080 NEONMAP1(vrshld_s64, aarch64_neon_srshl, Add1ArgType), 4081 NEONMAP1(vrshld_u64, aarch64_neon_urshl, Add1ArgType), 4082 NEONMAP1(vrsqrted_f64, aarch64_neon_frsqrte, Add1ArgType), 4083 NEONMAP1(vrsqrtes_f32, aarch64_neon_frsqrte, Add1ArgType), 4084 NEONMAP1(vrsqrtsd_f64, aarch64_neon_frsqrts, Add1ArgType), 4085 NEONMAP1(vrsqrtss_f32, aarch64_neon_frsqrts, Add1ArgType), 4086 NEONMAP1(vsha1cq_u32, aarch64_crypto_sha1c, 0), 4087 NEONMAP1(vsha1h_u32, aarch64_crypto_sha1h, 0), 4088 NEONMAP1(vsha1mq_u32, aarch64_crypto_sha1m, 0), 4089 NEONMAP1(vsha1pq_u32, aarch64_crypto_sha1p, 0), 4090 NEONMAP1(vshld_s64, aarch64_neon_sshl, Add1ArgType), 4091 NEONMAP1(vshld_u64, aarch64_neon_ushl, Add1ArgType), 4092 NEONMAP1(vslid_n_s64, aarch64_neon_vsli, Vectorize1ArgType), 4093 NEONMAP1(vslid_n_u64, aarch64_neon_vsli, Vectorize1ArgType), 4094 NEONMAP1(vsqaddb_u8, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 4095 NEONMAP1(vsqaddd_u64, aarch64_neon_usqadd, Add1ArgType), 4096 NEONMAP1(vsqaddh_u16, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 4097 NEONMAP1(vsqadds_u32, aarch64_neon_usqadd, Add1ArgType), 4098 NEONMAP1(vsrid_n_s64, aarch64_neon_vsri, Vectorize1ArgType), 4099 NEONMAP1(vsrid_n_u64, aarch64_neon_vsri, Vectorize1ArgType), 4100 NEONMAP1(vuqaddb_s8, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 4101 NEONMAP1(vuqaddd_s64, aarch64_neon_suqadd, Add1ArgType), 4102 NEONMAP1(vuqaddh_s16, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 4103 NEONMAP1(vuqadds_s32, aarch64_neon_suqadd, Add1ArgType), 4104 }; 4105 4106 #undef NEONMAP0 4107 #undef NEONMAP1 4108 #undef NEONMAP2 4109 4110 static bool NEONSIMDIntrinsicsProvenSorted = false; 4111 4112 static bool AArch64SIMDIntrinsicsProvenSorted = false; 4113 static bool AArch64SISDIntrinsicsProvenSorted = false; 4114 4115 4116 static const NeonIntrinsicInfo * 4117 findNeonIntrinsicInMap(ArrayRef<NeonIntrinsicInfo> IntrinsicMap, 4118 unsigned BuiltinID, bool &MapProvenSorted) { 4119 4120 #ifndef NDEBUG 4121 if (!MapProvenSorted) { 4122 assert(std::is_sorted(std::begin(IntrinsicMap), std::end(IntrinsicMap))); 4123 MapProvenSorted = true; 4124 } 4125 #endif 4126 4127 const NeonIntrinsicInfo *Builtin = 4128 std::lower_bound(IntrinsicMap.begin(), IntrinsicMap.end(), BuiltinID); 4129 4130 if (Builtin != IntrinsicMap.end() && Builtin->BuiltinID == BuiltinID) 4131 return Builtin; 4132 4133 return nullptr; 4134 } 4135 4136 Function *CodeGenFunction::LookupNeonLLVMIntrinsic(unsigned IntrinsicID, 4137 unsigned Modifier, 4138 llvm::Type *ArgType, 4139 const CallExpr *E) { 4140 int VectorSize = 0; 4141 if (Modifier & Use64BitVectors) 4142 VectorSize = 64; 4143 else if (Modifier & Use128BitVectors) 4144 VectorSize = 128; 4145 4146 // Return type. 4147 SmallVector<llvm::Type *, 3> Tys; 4148 if (Modifier & AddRetType) { 4149 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 4150 if (Modifier & VectorizeRetType) 4151 Ty = llvm::VectorType::get( 4152 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); 4153 4154 Tys.push_back(Ty); 4155 } 4156 4157 // Arguments. 4158 if (Modifier & VectorizeArgTypes) { 4159 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; 4160 ArgType = llvm::VectorType::get(ArgType, Elts); 4161 } 4162 4163 if (Modifier & (Add1ArgType | Add2ArgTypes)) 4164 Tys.push_back(ArgType); 4165 4166 if (Modifier & Add2ArgTypes) 4167 Tys.push_back(ArgType); 4168 4169 if (Modifier & InventFloatType) 4170 Tys.push_back(FloatTy); 4171 4172 return CGM.getIntrinsic(IntrinsicID, Tys); 4173 } 4174 4175 static Value *EmitCommonNeonSISDBuiltinExpr(CodeGenFunction &CGF, 4176 const NeonIntrinsicInfo &SISDInfo, 4177 SmallVectorImpl<Value *> &Ops, 4178 const CallExpr *E) { 4179 unsigned BuiltinID = SISDInfo.BuiltinID; 4180 unsigned int Int = SISDInfo.LLVMIntrinsic; 4181 unsigned Modifier = SISDInfo.TypeModifier; 4182 const char *s = SISDInfo.NameHint; 4183 4184 switch (BuiltinID) { 4185 case NEON::BI__builtin_neon_vcled_s64: 4186 case NEON::BI__builtin_neon_vcled_u64: 4187 case NEON::BI__builtin_neon_vcles_f32: 4188 case NEON::BI__builtin_neon_vcled_f64: 4189 case NEON::BI__builtin_neon_vcltd_s64: 4190 case NEON::BI__builtin_neon_vcltd_u64: 4191 case NEON::BI__builtin_neon_vclts_f32: 4192 case NEON::BI__builtin_neon_vcltd_f64: 4193 case NEON::BI__builtin_neon_vcales_f32: 4194 case NEON::BI__builtin_neon_vcaled_f64: 4195 case NEON::BI__builtin_neon_vcalts_f32: 4196 case NEON::BI__builtin_neon_vcaltd_f64: 4197 // Only one direction of comparisons actually exist, cmle is actually a cmge 4198 // with swapped operands. The table gives us the right intrinsic but we 4199 // still need to do the swap. 4200 std::swap(Ops[0], Ops[1]); 4201 break; 4202 } 4203 4204 assert(Int && "Generic code assumes a valid intrinsic"); 4205 4206 // Determine the type(s) of this overloaded AArch64 intrinsic. 4207 const Expr *Arg = E->getArg(0); 4208 llvm::Type *ArgTy = CGF.ConvertType(Arg->getType()); 4209 Function *F = CGF.LookupNeonLLVMIntrinsic(Int, Modifier, ArgTy, E); 4210 4211 int j = 0; 4212 ConstantInt *C0 = ConstantInt::get(CGF.SizeTy, 0); 4213 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 4214 ai != ae; ++ai, ++j) { 4215 llvm::Type *ArgTy = ai->getType(); 4216 if (Ops[j]->getType()->getPrimitiveSizeInBits() == 4217 ArgTy->getPrimitiveSizeInBits()) 4218 continue; 4219 4220 assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy()); 4221 // The constant argument to an _n_ intrinsic always has Int32Ty, so truncate 4222 // it before inserting. 4223 Ops[j] = 4224 CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType()); 4225 Ops[j] = 4226 CGF.Builder.CreateInsertElement(UndefValue::get(ArgTy), Ops[j], C0); 4227 } 4228 4229 Value *Result = CGF.EmitNeonCall(F, Ops, s); 4230 llvm::Type *ResultType = CGF.ConvertType(E->getType()); 4231 if (ResultType->getPrimitiveSizeInBits() < 4232 Result->getType()->getPrimitiveSizeInBits()) 4233 return CGF.Builder.CreateExtractElement(Result, C0); 4234 4235 return CGF.Builder.CreateBitCast(Result, ResultType, s); 4236 } 4237 4238 Value *CodeGenFunction::EmitCommonNeonBuiltinExpr( 4239 unsigned BuiltinID, unsigned LLVMIntrinsic, unsigned AltLLVMIntrinsic, 4240 const char *NameHint, unsigned Modifier, const CallExpr *E, 4241 SmallVectorImpl<llvm::Value *> &Ops, Address PtrOp0, Address PtrOp1, 4242 llvm::Triple::ArchType Arch) { 4243 // Get the last argument, which specifies the vector type. 4244 llvm::APSInt NeonTypeConst; 4245 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 4246 if (!Arg->isIntegerConstantExpr(NeonTypeConst, getContext())) 4247 return nullptr; 4248 4249 // Determine the type of this overloaded NEON intrinsic. 4250 NeonTypeFlags Type(NeonTypeConst.getZExtValue()); 4251 bool Usgn = Type.isUnsigned(); 4252 bool Quad = Type.isQuad(); 4253 4254 llvm::VectorType *VTy = GetNeonType(this, Type, Arch); 4255 llvm::Type *Ty = VTy; 4256 if (!Ty) 4257 return nullptr; 4258 4259 auto getAlignmentValue32 = [&](Address addr) -> Value* { 4260 return Builder.getInt32(addr.getAlignment().getQuantity()); 4261 }; 4262 4263 unsigned Int = LLVMIntrinsic; 4264 if ((Modifier & UnsignedAlts) && !Usgn) 4265 Int = AltLLVMIntrinsic; 4266 4267 switch (BuiltinID) { 4268 default: break; 4269 case NEON::BI__builtin_neon_vabs_v: 4270 case NEON::BI__builtin_neon_vabsq_v: 4271 if (VTy->getElementType()->isFloatingPointTy()) 4272 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, Ty), Ops, "vabs"); 4273 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), Ops, "vabs"); 4274 case NEON::BI__builtin_neon_vaddhn_v: { 4275 llvm::VectorType *SrcTy = 4276 llvm::VectorType::getExtendedElementVectorType(VTy); 4277 4278 // %sum = add <4 x i32> %lhs, %rhs 4279 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4280 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 4281 Ops[0] = Builder.CreateAdd(Ops[0], Ops[1], "vaddhn"); 4282 4283 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 4284 Constant *ShiftAmt = 4285 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 4286 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vaddhn"); 4287 4288 // %res = trunc <4 x i32> %high to <4 x i16> 4289 return Builder.CreateTrunc(Ops[0], VTy, "vaddhn"); 4290 } 4291 case NEON::BI__builtin_neon_vcale_v: 4292 case NEON::BI__builtin_neon_vcaleq_v: 4293 case NEON::BI__builtin_neon_vcalt_v: 4294 case NEON::BI__builtin_neon_vcaltq_v: 4295 std::swap(Ops[0], Ops[1]); 4296 LLVM_FALLTHROUGH; 4297 case NEON::BI__builtin_neon_vcage_v: 4298 case NEON::BI__builtin_neon_vcageq_v: 4299 case NEON::BI__builtin_neon_vcagt_v: 4300 case NEON::BI__builtin_neon_vcagtq_v: { 4301 llvm::Type *Ty; 4302 switch (VTy->getScalarSizeInBits()) { 4303 default: llvm_unreachable("unexpected type"); 4304 case 32: 4305 Ty = FloatTy; 4306 break; 4307 case 64: 4308 Ty = DoubleTy; 4309 break; 4310 case 16: 4311 Ty = HalfTy; 4312 break; 4313 } 4314 llvm::Type *VecFlt = llvm::VectorType::get(Ty, VTy->getNumElements()); 4315 llvm::Type *Tys[] = { VTy, VecFlt }; 4316 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 4317 return EmitNeonCall(F, Ops, NameHint); 4318 } 4319 case NEON::BI__builtin_neon_vclz_v: 4320 case NEON::BI__builtin_neon_vclzq_v: 4321 // We generate target-independent intrinsic, which needs a second argument 4322 // for whether or not clz of zero is undefined; on ARM it isn't. 4323 Ops.push_back(Builder.getInt1(getTarget().isCLZForZeroUndef())); 4324 break; 4325 case NEON::BI__builtin_neon_vcvt_f32_v: 4326 case NEON::BI__builtin_neon_vcvtq_f32_v: 4327 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4328 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, Quad), Arch); 4329 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 4330 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 4331 case NEON::BI__builtin_neon_vcvt_f16_v: 4332 case NEON::BI__builtin_neon_vcvtq_f16_v: 4333 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4334 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float16, false, Quad), Arch); 4335 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 4336 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 4337 case NEON::BI__builtin_neon_vcvt_n_f16_v: 4338 case NEON::BI__builtin_neon_vcvt_n_f32_v: 4339 case NEON::BI__builtin_neon_vcvt_n_f64_v: 4340 case NEON::BI__builtin_neon_vcvtq_n_f16_v: 4341 case NEON::BI__builtin_neon_vcvtq_n_f32_v: 4342 case NEON::BI__builtin_neon_vcvtq_n_f64_v: { 4343 llvm::Type *Tys[2] = { GetFloatNeonType(this, Type), Ty }; 4344 Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic; 4345 Function *F = CGM.getIntrinsic(Int, Tys); 4346 return EmitNeonCall(F, Ops, "vcvt_n"); 4347 } 4348 case NEON::BI__builtin_neon_vcvt_n_s16_v: 4349 case NEON::BI__builtin_neon_vcvt_n_s32_v: 4350 case NEON::BI__builtin_neon_vcvt_n_u16_v: 4351 case NEON::BI__builtin_neon_vcvt_n_u32_v: 4352 case NEON::BI__builtin_neon_vcvt_n_s64_v: 4353 case NEON::BI__builtin_neon_vcvt_n_u64_v: 4354 case NEON::BI__builtin_neon_vcvtq_n_s16_v: 4355 case NEON::BI__builtin_neon_vcvtq_n_s32_v: 4356 case NEON::BI__builtin_neon_vcvtq_n_u16_v: 4357 case NEON::BI__builtin_neon_vcvtq_n_u32_v: 4358 case NEON::BI__builtin_neon_vcvtq_n_s64_v: 4359 case NEON::BI__builtin_neon_vcvtq_n_u64_v: { 4360 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 4361 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 4362 return EmitNeonCall(F, Ops, "vcvt_n"); 4363 } 4364 case NEON::BI__builtin_neon_vcvt_s32_v: 4365 case NEON::BI__builtin_neon_vcvt_u32_v: 4366 case NEON::BI__builtin_neon_vcvt_s64_v: 4367 case NEON::BI__builtin_neon_vcvt_u64_v: 4368 case NEON::BI__builtin_neon_vcvt_s16_v: 4369 case NEON::BI__builtin_neon_vcvt_u16_v: 4370 case NEON::BI__builtin_neon_vcvtq_s32_v: 4371 case NEON::BI__builtin_neon_vcvtq_u32_v: 4372 case NEON::BI__builtin_neon_vcvtq_s64_v: 4373 case NEON::BI__builtin_neon_vcvtq_u64_v: 4374 case NEON::BI__builtin_neon_vcvtq_s16_v: 4375 case NEON::BI__builtin_neon_vcvtq_u16_v: { 4376 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 4377 return Usgn ? Builder.CreateFPToUI(Ops[0], Ty, "vcvt") 4378 : Builder.CreateFPToSI(Ops[0], Ty, "vcvt"); 4379 } 4380 case NEON::BI__builtin_neon_vcvta_s16_v: 4381 case NEON::BI__builtin_neon_vcvta_s32_v: 4382 case NEON::BI__builtin_neon_vcvta_s64_v: 4383 case NEON::BI__builtin_neon_vcvta_u32_v: 4384 case NEON::BI__builtin_neon_vcvta_u64_v: 4385 case NEON::BI__builtin_neon_vcvtaq_s16_v: 4386 case NEON::BI__builtin_neon_vcvtaq_s32_v: 4387 case NEON::BI__builtin_neon_vcvtaq_s64_v: 4388 case NEON::BI__builtin_neon_vcvtaq_u16_v: 4389 case NEON::BI__builtin_neon_vcvtaq_u32_v: 4390 case NEON::BI__builtin_neon_vcvtaq_u64_v: 4391 case NEON::BI__builtin_neon_vcvtn_s16_v: 4392 case NEON::BI__builtin_neon_vcvtn_s32_v: 4393 case NEON::BI__builtin_neon_vcvtn_s64_v: 4394 case NEON::BI__builtin_neon_vcvtn_u16_v: 4395 case NEON::BI__builtin_neon_vcvtn_u32_v: 4396 case NEON::BI__builtin_neon_vcvtn_u64_v: 4397 case NEON::BI__builtin_neon_vcvtnq_s16_v: 4398 case NEON::BI__builtin_neon_vcvtnq_s32_v: 4399 case NEON::BI__builtin_neon_vcvtnq_s64_v: 4400 case NEON::BI__builtin_neon_vcvtnq_u16_v: 4401 case NEON::BI__builtin_neon_vcvtnq_u32_v: 4402 case NEON::BI__builtin_neon_vcvtnq_u64_v: 4403 case NEON::BI__builtin_neon_vcvtp_s16_v: 4404 case NEON::BI__builtin_neon_vcvtp_s32_v: 4405 case NEON::BI__builtin_neon_vcvtp_s64_v: 4406 case NEON::BI__builtin_neon_vcvtp_u16_v: 4407 case NEON::BI__builtin_neon_vcvtp_u32_v: 4408 case NEON::BI__builtin_neon_vcvtp_u64_v: 4409 case NEON::BI__builtin_neon_vcvtpq_s16_v: 4410 case NEON::BI__builtin_neon_vcvtpq_s32_v: 4411 case NEON::BI__builtin_neon_vcvtpq_s64_v: 4412 case NEON::BI__builtin_neon_vcvtpq_u16_v: 4413 case NEON::BI__builtin_neon_vcvtpq_u32_v: 4414 case NEON::BI__builtin_neon_vcvtpq_u64_v: 4415 case NEON::BI__builtin_neon_vcvtm_s16_v: 4416 case NEON::BI__builtin_neon_vcvtm_s32_v: 4417 case NEON::BI__builtin_neon_vcvtm_s64_v: 4418 case NEON::BI__builtin_neon_vcvtm_u16_v: 4419 case NEON::BI__builtin_neon_vcvtm_u32_v: 4420 case NEON::BI__builtin_neon_vcvtm_u64_v: 4421 case NEON::BI__builtin_neon_vcvtmq_s16_v: 4422 case NEON::BI__builtin_neon_vcvtmq_s32_v: 4423 case NEON::BI__builtin_neon_vcvtmq_s64_v: 4424 case NEON::BI__builtin_neon_vcvtmq_u16_v: 4425 case NEON::BI__builtin_neon_vcvtmq_u32_v: 4426 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 4427 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 4428 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, NameHint); 4429 } 4430 case NEON::BI__builtin_neon_vext_v: 4431 case NEON::BI__builtin_neon_vextq_v: { 4432 int CV = cast<ConstantInt>(Ops[2])->getSExtValue(); 4433 SmallVector<uint32_t, 16> Indices; 4434 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 4435 Indices.push_back(i+CV); 4436 4437 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4438 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4439 return Builder.CreateShuffleVector(Ops[0], Ops[1], Indices, "vext"); 4440 } 4441 case NEON::BI__builtin_neon_vfma_v: 4442 case NEON::BI__builtin_neon_vfmaq_v: { 4443 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 4444 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4445 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4446 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4447 4448 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 4449 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 4450 } 4451 case NEON::BI__builtin_neon_vld1_v: 4452 case NEON::BI__builtin_neon_vld1q_v: { 4453 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4454 Ops.push_back(getAlignmentValue32(PtrOp0)); 4455 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, "vld1"); 4456 } 4457 case NEON::BI__builtin_neon_vld2_v: 4458 case NEON::BI__builtin_neon_vld2q_v: 4459 case NEON::BI__builtin_neon_vld3_v: 4460 case NEON::BI__builtin_neon_vld3q_v: 4461 case NEON::BI__builtin_neon_vld4_v: 4462 case NEON::BI__builtin_neon_vld4q_v: { 4463 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4464 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 4465 Value *Align = getAlignmentValue32(PtrOp1); 4466 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint); 4467 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4468 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4469 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4470 } 4471 case NEON::BI__builtin_neon_vld1_dup_v: 4472 case NEON::BI__builtin_neon_vld1q_dup_v: { 4473 Value *V = UndefValue::get(Ty); 4474 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 4475 PtrOp0 = Builder.CreateBitCast(PtrOp0, Ty); 4476 LoadInst *Ld = Builder.CreateLoad(PtrOp0); 4477 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 4478 Ops[0] = Builder.CreateInsertElement(V, Ld, CI); 4479 return EmitNeonSplat(Ops[0], CI); 4480 } 4481 case NEON::BI__builtin_neon_vld2_lane_v: 4482 case NEON::BI__builtin_neon_vld2q_lane_v: 4483 case NEON::BI__builtin_neon_vld3_lane_v: 4484 case NEON::BI__builtin_neon_vld3q_lane_v: 4485 case NEON::BI__builtin_neon_vld4_lane_v: 4486 case NEON::BI__builtin_neon_vld4q_lane_v: { 4487 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4488 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 4489 for (unsigned I = 2; I < Ops.size() - 1; ++I) 4490 Ops[I] = Builder.CreateBitCast(Ops[I], Ty); 4491 Ops.push_back(getAlignmentValue32(PtrOp1)); 4492 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), NameHint); 4493 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4494 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4495 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4496 } 4497 case NEON::BI__builtin_neon_vmovl_v: { 4498 llvm::Type *DTy =llvm::VectorType::getTruncatedElementVectorType(VTy); 4499 Ops[0] = Builder.CreateBitCast(Ops[0], DTy); 4500 if (Usgn) 4501 return Builder.CreateZExt(Ops[0], Ty, "vmovl"); 4502 return Builder.CreateSExt(Ops[0], Ty, "vmovl"); 4503 } 4504 case NEON::BI__builtin_neon_vmovn_v: { 4505 llvm::Type *QTy = llvm::VectorType::getExtendedElementVectorType(VTy); 4506 Ops[0] = Builder.CreateBitCast(Ops[0], QTy); 4507 return Builder.CreateTrunc(Ops[0], Ty, "vmovn"); 4508 } 4509 case NEON::BI__builtin_neon_vmull_v: 4510 // FIXME: the integer vmull operations could be emitted in terms of pure 4511 // LLVM IR (2 exts followed by a mul). Unfortunately LLVM has a habit of 4512 // hoisting the exts outside loops. Until global ISel comes along that can 4513 // see through such movement this leads to bad CodeGen. So we need an 4514 // intrinsic for now. 4515 Int = Usgn ? Intrinsic::arm_neon_vmullu : Intrinsic::arm_neon_vmulls; 4516 Int = Type.isPoly() ? (unsigned)Intrinsic::arm_neon_vmullp : Int; 4517 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 4518 case NEON::BI__builtin_neon_vpadal_v: 4519 case NEON::BI__builtin_neon_vpadalq_v: { 4520 // The source operand type has twice as many elements of half the size. 4521 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 4522 llvm::Type *EltTy = 4523 llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 4524 llvm::Type *NarrowTy = 4525 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 4526 llvm::Type *Tys[2] = { Ty, NarrowTy }; 4527 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, NameHint); 4528 } 4529 case NEON::BI__builtin_neon_vpaddl_v: 4530 case NEON::BI__builtin_neon_vpaddlq_v: { 4531 // The source operand type has twice as many elements of half the size. 4532 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 4533 llvm::Type *EltTy = llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 4534 llvm::Type *NarrowTy = 4535 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 4536 llvm::Type *Tys[2] = { Ty, NarrowTy }; 4537 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vpaddl"); 4538 } 4539 case NEON::BI__builtin_neon_vqdmlal_v: 4540 case NEON::BI__builtin_neon_vqdmlsl_v: { 4541 SmallVector<Value *, 2> MulOps(Ops.begin() + 1, Ops.end()); 4542 Ops[1] = 4543 EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), MulOps, "vqdmlal"); 4544 Ops.resize(2); 4545 return EmitNeonCall(CGM.getIntrinsic(AltLLVMIntrinsic, Ty), Ops, NameHint); 4546 } 4547 case NEON::BI__builtin_neon_vqshl_n_v: 4548 case NEON::BI__builtin_neon_vqshlq_n_v: 4549 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshl_n", 4550 1, false); 4551 case NEON::BI__builtin_neon_vqshlu_n_v: 4552 case NEON::BI__builtin_neon_vqshluq_n_v: 4553 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshlu_n", 4554 1, false); 4555 case NEON::BI__builtin_neon_vrecpe_v: 4556 case NEON::BI__builtin_neon_vrecpeq_v: 4557 case NEON::BI__builtin_neon_vrsqrte_v: 4558 case NEON::BI__builtin_neon_vrsqrteq_v: 4559 Int = Ty->isFPOrFPVectorTy() ? LLVMIntrinsic : AltLLVMIntrinsic; 4560 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint); 4561 4562 case NEON::BI__builtin_neon_vrshr_n_v: 4563 case NEON::BI__builtin_neon_vrshrq_n_v: 4564 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n", 4565 1, true); 4566 case NEON::BI__builtin_neon_vshl_n_v: 4567 case NEON::BI__builtin_neon_vshlq_n_v: 4568 Ops[1] = EmitNeonShiftVector(Ops[1], Ty, false); 4569 return Builder.CreateShl(Builder.CreateBitCast(Ops[0],Ty), Ops[1], 4570 "vshl_n"); 4571 case NEON::BI__builtin_neon_vshll_n_v: { 4572 llvm::Type *SrcTy = llvm::VectorType::getTruncatedElementVectorType(VTy); 4573 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4574 if (Usgn) 4575 Ops[0] = Builder.CreateZExt(Ops[0], VTy); 4576 else 4577 Ops[0] = Builder.CreateSExt(Ops[0], VTy); 4578 Ops[1] = EmitNeonShiftVector(Ops[1], VTy, false); 4579 return Builder.CreateShl(Ops[0], Ops[1], "vshll_n"); 4580 } 4581 case NEON::BI__builtin_neon_vshrn_n_v: { 4582 llvm::Type *SrcTy = llvm::VectorType::getExtendedElementVectorType(VTy); 4583 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4584 Ops[1] = EmitNeonShiftVector(Ops[1], SrcTy, false); 4585 if (Usgn) 4586 Ops[0] = Builder.CreateLShr(Ops[0], Ops[1]); 4587 else 4588 Ops[0] = Builder.CreateAShr(Ops[0], Ops[1]); 4589 return Builder.CreateTrunc(Ops[0], Ty, "vshrn_n"); 4590 } 4591 case NEON::BI__builtin_neon_vshr_n_v: 4592 case NEON::BI__builtin_neon_vshrq_n_v: 4593 return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, Usgn, "vshr_n"); 4594 case NEON::BI__builtin_neon_vst1_v: 4595 case NEON::BI__builtin_neon_vst1q_v: 4596 case NEON::BI__builtin_neon_vst2_v: 4597 case NEON::BI__builtin_neon_vst2q_v: 4598 case NEON::BI__builtin_neon_vst3_v: 4599 case NEON::BI__builtin_neon_vst3q_v: 4600 case NEON::BI__builtin_neon_vst4_v: 4601 case NEON::BI__builtin_neon_vst4q_v: 4602 case NEON::BI__builtin_neon_vst2_lane_v: 4603 case NEON::BI__builtin_neon_vst2q_lane_v: 4604 case NEON::BI__builtin_neon_vst3_lane_v: 4605 case NEON::BI__builtin_neon_vst3q_lane_v: 4606 case NEON::BI__builtin_neon_vst4_lane_v: 4607 case NEON::BI__builtin_neon_vst4q_lane_v: { 4608 llvm::Type *Tys[] = {Int8PtrTy, Ty}; 4609 Ops.push_back(getAlignmentValue32(PtrOp0)); 4610 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 4611 } 4612 case NEON::BI__builtin_neon_vsubhn_v: { 4613 llvm::VectorType *SrcTy = 4614 llvm::VectorType::getExtendedElementVectorType(VTy); 4615 4616 // %sum = add <4 x i32> %lhs, %rhs 4617 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4618 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 4619 Ops[0] = Builder.CreateSub(Ops[0], Ops[1], "vsubhn"); 4620 4621 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 4622 Constant *ShiftAmt = 4623 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 4624 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vsubhn"); 4625 4626 // %res = trunc <4 x i32> %high to <4 x i16> 4627 return Builder.CreateTrunc(Ops[0], VTy, "vsubhn"); 4628 } 4629 case NEON::BI__builtin_neon_vtrn_v: 4630 case NEON::BI__builtin_neon_vtrnq_v: { 4631 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4632 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4633 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4634 Value *SV = nullptr; 4635 4636 for (unsigned vi = 0; vi != 2; ++vi) { 4637 SmallVector<uint32_t, 16> Indices; 4638 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 4639 Indices.push_back(i+vi); 4640 Indices.push_back(i+e+vi); 4641 } 4642 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4643 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 4644 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4645 } 4646 return SV; 4647 } 4648 case NEON::BI__builtin_neon_vtst_v: 4649 case NEON::BI__builtin_neon_vtstq_v: { 4650 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4651 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4652 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 4653 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 4654 ConstantAggregateZero::get(Ty)); 4655 return Builder.CreateSExt(Ops[0], Ty, "vtst"); 4656 } 4657 case NEON::BI__builtin_neon_vuzp_v: 4658 case NEON::BI__builtin_neon_vuzpq_v: { 4659 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4660 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4661 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4662 Value *SV = nullptr; 4663 4664 for (unsigned vi = 0; vi != 2; ++vi) { 4665 SmallVector<uint32_t, 16> Indices; 4666 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 4667 Indices.push_back(2*i+vi); 4668 4669 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4670 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 4671 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4672 } 4673 return SV; 4674 } 4675 case NEON::BI__builtin_neon_vzip_v: 4676 case NEON::BI__builtin_neon_vzipq_v: { 4677 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4678 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4679 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4680 Value *SV = nullptr; 4681 4682 for (unsigned vi = 0; vi != 2; ++vi) { 4683 SmallVector<uint32_t, 16> Indices; 4684 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 4685 Indices.push_back((i + vi*e) >> 1); 4686 Indices.push_back(((i + vi*e) >> 1)+e); 4687 } 4688 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4689 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 4690 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4691 } 4692 return SV; 4693 } 4694 } 4695 4696 assert(Int && "Expected valid intrinsic number"); 4697 4698 // Determine the type(s) of this overloaded AArch64 intrinsic. 4699 Function *F = LookupNeonLLVMIntrinsic(Int, Modifier, Ty, E); 4700 4701 Value *Result = EmitNeonCall(F, Ops, NameHint); 4702 llvm::Type *ResultType = ConvertType(E->getType()); 4703 // AArch64 intrinsic one-element vector type cast to 4704 // scalar type expected by the builtin 4705 return Builder.CreateBitCast(Result, ResultType, NameHint); 4706 } 4707 4708 Value *CodeGenFunction::EmitAArch64CompareBuiltinExpr( 4709 Value *Op, llvm::Type *Ty, const CmpInst::Predicate Fp, 4710 const CmpInst::Predicate Ip, const Twine &Name) { 4711 llvm::Type *OTy = Op->getType(); 4712 4713 // FIXME: this is utterly horrific. We should not be looking at previous 4714 // codegen context to find out what needs doing. Unfortunately TableGen 4715 // currently gives us exactly the same calls for vceqz_f32 and vceqz_s32 4716 // (etc). 4717 if (BitCastInst *BI = dyn_cast<BitCastInst>(Op)) 4718 OTy = BI->getOperand(0)->getType(); 4719 4720 Op = Builder.CreateBitCast(Op, OTy); 4721 if (OTy->getScalarType()->isFloatingPointTy()) { 4722 Op = Builder.CreateFCmp(Fp, Op, Constant::getNullValue(OTy)); 4723 } else { 4724 Op = Builder.CreateICmp(Ip, Op, Constant::getNullValue(OTy)); 4725 } 4726 return Builder.CreateSExt(Op, Ty, Name); 4727 } 4728 4729 static Value *packTBLDVectorList(CodeGenFunction &CGF, ArrayRef<Value *> Ops, 4730 Value *ExtOp, Value *IndexOp, 4731 llvm::Type *ResTy, unsigned IntID, 4732 const char *Name) { 4733 SmallVector<Value *, 2> TblOps; 4734 if (ExtOp) 4735 TblOps.push_back(ExtOp); 4736 4737 // Build a vector containing sequential number like (0, 1, 2, ..., 15) 4738 SmallVector<uint32_t, 16> Indices; 4739 llvm::VectorType *TblTy = cast<llvm::VectorType>(Ops[0]->getType()); 4740 for (unsigned i = 0, e = TblTy->getNumElements(); i != e; ++i) { 4741 Indices.push_back(2*i); 4742 Indices.push_back(2*i+1); 4743 } 4744 4745 int PairPos = 0, End = Ops.size() - 1; 4746 while (PairPos < End) { 4747 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 4748 Ops[PairPos+1], Indices, 4749 Name)); 4750 PairPos += 2; 4751 } 4752 4753 // If there's an odd number of 64-bit lookup table, fill the high 64-bit 4754 // of the 128-bit lookup table with zero. 4755 if (PairPos == End) { 4756 Value *ZeroTbl = ConstantAggregateZero::get(TblTy); 4757 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 4758 ZeroTbl, Indices, Name)); 4759 } 4760 4761 Function *TblF; 4762 TblOps.push_back(IndexOp); 4763 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); 4764 4765 return CGF.EmitNeonCall(TblF, TblOps, Name); 4766 } 4767 4768 Value *CodeGenFunction::GetValueForARMHint(unsigned BuiltinID) { 4769 unsigned Value; 4770 switch (BuiltinID) { 4771 default: 4772 return nullptr; 4773 case ARM::BI__builtin_arm_nop: 4774 Value = 0; 4775 break; 4776 case ARM::BI__builtin_arm_yield: 4777 case ARM::BI__yield: 4778 Value = 1; 4779 break; 4780 case ARM::BI__builtin_arm_wfe: 4781 case ARM::BI__wfe: 4782 Value = 2; 4783 break; 4784 case ARM::BI__builtin_arm_wfi: 4785 case ARM::BI__wfi: 4786 Value = 3; 4787 break; 4788 case ARM::BI__builtin_arm_sev: 4789 case ARM::BI__sev: 4790 Value = 4; 4791 break; 4792 case ARM::BI__builtin_arm_sevl: 4793 case ARM::BI__sevl: 4794 Value = 5; 4795 break; 4796 } 4797 4798 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_hint), 4799 llvm::ConstantInt::get(Int32Ty, Value)); 4800 } 4801 4802 // Generates the IR for the read/write special register builtin, 4803 // ValueType is the type of the value that is to be written or read, 4804 // RegisterType is the type of the register being written to or read from. 4805 static Value *EmitSpecialRegisterBuiltin(CodeGenFunction &CGF, 4806 const CallExpr *E, 4807 llvm::Type *RegisterType, 4808 llvm::Type *ValueType, 4809 bool IsRead, 4810 StringRef SysReg = "") { 4811 // write and register intrinsics only support 32 and 64 bit operations. 4812 assert((RegisterType->isIntegerTy(32) || RegisterType->isIntegerTy(64)) 4813 && "Unsupported size for register."); 4814 4815 CodeGen::CGBuilderTy &Builder = CGF.Builder; 4816 CodeGen::CodeGenModule &CGM = CGF.CGM; 4817 LLVMContext &Context = CGM.getLLVMContext(); 4818 4819 if (SysReg.empty()) { 4820 const Expr *SysRegStrExpr = E->getArg(0)->IgnoreParenCasts(); 4821 SysReg = cast<clang::StringLiteral>(SysRegStrExpr)->getString(); 4822 } 4823 4824 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysReg) }; 4825 llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); 4826 llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); 4827 4828 llvm::Type *Types[] = { RegisterType }; 4829 4830 bool MixedTypes = RegisterType->isIntegerTy(64) && ValueType->isIntegerTy(32); 4831 assert(!(RegisterType->isIntegerTy(32) && ValueType->isIntegerTy(64)) 4832 && "Can't fit 64-bit value in 32-bit register"); 4833 4834 if (IsRead) { 4835 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::read_register, Types); 4836 llvm::Value *Call = Builder.CreateCall(F, Metadata); 4837 4838 if (MixedTypes) 4839 // Read into 64 bit register and then truncate result to 32 bit. 4840 return Builder.CreateTrunc(Call, ValueType); 4841 4842 if (ValueType->isPointerTy()) 4843 // Have i32/i64 result (Call) but want to return a VoidPtrTy (i8*). 4844 return Builder.CreateIntToPtr(Call, ValueType); 4845 4846 return Call; 4847 } 4848 4849 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types); 4850 llvm::Value *ArgValue = CGF.EmitScalarExpr(E->getArg(1)); 4851 if (MixedTypes) { 4852 // Extend 32 bit write value to 64 bit to pass to write. 4853 ArgValue = Builder.CreateZExt(ArgValue, RegisterType); 4854 return Builder.CreateCall(F, { Metadata, ArgValue }); 4855 } 4856 4857 if (ValueType->isPointerTy()) { 4858 // Have VoidPtrTy ArgValue but want to return an i32/i64. 4859 ArgValue = Builder.CreatePtrToInt(ArgValue, RegisterType); 4860 return Builder.CreateCall(F, { Metadata, ArgValue }); 4861 } 4862 4863 return Builder.CreateCall(F, { Metadata, ArgValue }); 4864 } 4865 4866 /// Return true if BuiltinID is an overloaded Neon intrinsic with an extra 4867 /// argument that specifies the vector type. 4868 static bool HasExtraNeonArgument(unsigned BuiltinID) { 4869 switch (BuiltinID) { 4870 default: break; 4871 case NEON::BI__builtin_neon_vget_lane_i8: 4872 case NEON::BI__builtin_neon_vget_lane_i16: 4873 case NEON::BI__builtin_neon_vget_lane_i32: 4874 case NEON::BI__builtin_neon_vget_lane_i64: 4875 case NEON::BI__builtin_neon_vget_lane_f32: 4876 case NEON::BI__builtin_neon_vgetq_lane_i8: 4877 case NEON::BI__builtin_neon_vgetq_lane_i16: 4878 case NEON::BI__builtin_neon_vgetq_lane_i32: 4879 case NEON::BI__builtin_neon_vgetq_lane_i64: 4880 case NEON::BI__builtin_neon_vgetq_lane_f32: 4881 case NEON::BI__builtin_neon_vset_lane_i8: 4882 case NEON::BI__builtin_neon_vset_lane_i16: 4883 case NEON::BI__builtin_neon_vset_lane_i32: 4884 case NEON::BI__builtin_neon_vset_lane_i64: 4885 case NEON::BI__builtin_neon_vset_lane_f32: 4886 case NEON::BI__builtin_neon_vsetq_lane_i8: 4887 case NEON::BI__builtin_neon_vsetq_lane_i16: 4888 case NEON::BI__builtin_neon_vsetq_lane_i32: 4889 case NEON::BI__builtin_neon_vsetq_lane_i64: 4890 case NEON::BI__builtin_neon_vsetq_lane_f32: 4891 case NEON::BI__builtin_neon_vsha1h_u32: 4892 case NEON::BI__builtin_neon_vsha1cq_u32: 4893 case NEON::BI__builtin_neon_vsha1pq_u32: 4894 case NEON::BI__builtin_neon_vsha1mq_u32: 4895 case clang::ARM::BI_MoveToCoprocessor: 4896 case clang::ARM::BI_MoveToCoprocessor2: 4897 return false; 4898 } 4899 return true; 4900 } 4901 4902 Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, 4903 const CallExpr *E, 4904 llvm::Triple::ArchType Arch) { 4905 if (auto Hint = GetValueForARMHint(BuiltinID)) 4906 return Hint; 4907 4908 if (BuiltinID == ARM::BI__emit) { 4909 bool IsThumb = getTarget().getTriple().getArch() == llvm::Triple::thumb; 4910 llvm::FunctionType *FTy = 4911 llvm::FunctionType::get(VoidTy, /*Variadic=*/false); 4912 4913 APSInt Value; 4914 if (!E->getArg(0)->EvaluateAsInt(Value, CGM.getContext())) 4915 llvm_unreachable("Sema will ensure that the parameter is constant"); 4916 4917 uint64_t ZExtValue = Value.zextOrTrunc(IsThumb ? 16 : 32).getZExtValue(); 4918 4919 llvm::InlineAsm *Emit = 4920 IsThumb ? InlineAsm::get(FTy, ".inst.n 0x" + utohexstr(ZExtValue), "", 4921 /*SideEffects=*/true) 4922 : InlineAsm::get(FTy, ".inst 0x" + utohexstr(ZExtValue), "", 4923 /*SideEffects=*/true); 4924 4925 return Builder.CreateCall(Emit); 4926 } 4927 4928 if (BuiltinID == ARM::BI__builtin_arm_dbg) { 4929 Value *Option = EmitScalarExpr(E->getArg(0)); 4930 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_dbg), Option); 4931 } 4932 4933 if (BuiltinID == ARM::BI__builtin_arm_prefetch) { 4934 Value *Address = EmitScalarExpr(E->getArg(0)); 4935 Value *RW = EmitScalarExpr(E->getArg(1)); 4936 Value *IsData = EmitScalarExpr(E->getArg(2)); 4937 4938 // Locality is not supported on ARM target 4939 Value *Locality = llvm::ConstantInt::get(Int32Ty, 3); 4940 4941 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 4942 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 4943 } 4944 4945 if (BuiltinID == ARM::BI__builtin_arm_rbit) { 4946 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 4947 return Builder.CreateCall( 4948 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 4949 } 4950 4951 if (BuiltinID == ARM::BI__clear_cache) { 4952 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 4953 const FunctionDecl *FD = E->getDirectCallee(); 4954 Value *Ops[2]; 4955 for (unsigned i = 0; i < 2; i++) 4956 Ops[i] = EmitScalarExpr(E->getArg(i)); 4957 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 4958 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 4959 StringRef Name = FD->getName(); 4960 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 4961 } 4962 4963 if (BuiltinID == ARM::BI__builtin_arm_mcrr || 4964 BuiltinID == ARM::BI__builtin_arm_mcrr2) { 4965 Function *F; 4966 4967 switch (BuiltinID) { 4968 default: llvm_unreachable("unexpected builtin"); 4969 case ARM::BI__builtin_arm_mcrr: 4970 F = CGM.getIntrinsic(Intrinsic::arm_mcrr); 4971 break; 4972 case ARM::BI__builtin_arm_mcrr2: 4973 F = CGM.getIntrinsic(Intrinsic::arm_mcrr2); 4974 break; 4975 } 4976 4977 // MCRR{2} instruction has 5 operands but 4978 // the intrinsic has 4 because Rt and Rt2 4979 // are represented as a single unsigned 64 4980 // bit integer in the intrinsic definition 4981 // but internally it's represented as 2 32 4982 // bit integers. 4983 4984 Value *Coproc = EmitScalarExpr(E->getArg(0)); 4985 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 4986 Value *RtAndRt2 = EmitScalarExpr(E->getArg(2)); 4987 Value *CRm = EmitScalarExpr(E->getArg(3)); 4988 4989 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 4990 Value *Rt = Builder.CreateTruncOrBitCast(RtAndRt2, Int32Ty); 4991 Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); 4992 Rt2 = Builder.CreateTruncOrBitCast(Rt2, Int32Ty); 4993 4994 return Builder.CreateCall(F, {Coproc, Opc1, Rt, Rt2, CRm}); 4995 } 4996 4997 if (BuiltinID == ARM::BI__builtin_arm_mrrc || 4998 BuiltinID == ARM::BI__builtin_arm_mrrc2) { 4999 Function *F; 5000 5001 switch (BuiltinID) { 5002 default: llvm_unreachable("unexpected builtin"); 5003 case ARM::BI__builtin_arm_mrrc: 5004 F = CGM.getIntrinsic(Intrinsic::arm_mrrc); 5005 break; 5006 case ARM::BI__builtin_arm_mrrc2: 5007 F = CGM.getIntrinsic(Intrinsic::arm_mrrc2); 5008 break; 5009 } 5010 5011 Value *Coproc = EmitScalarExpr(E->getArg(0)); 5012 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 5013 Value *CRm = EmitScalarExpr(E->getArg(2)); 5014 Value *RtAndRt2 = Builder.CreateCall(F, {Coproc, Opc1, CRm}); 5015 5016 // Returns an unsigned 64 bit integer, represented 5017 // as two 32 bit integers. 5018 5019 Value *Rt = Builder.CreateExtractValue(RtAndRt2, 1); 5020 Value *Rt1 = Builder.CreateExtractValue(RtAndRt2, 0); 5021 Rt = Builder.CreateZExt(Rt, Int64Ty); 5022 Rt1 = Builder.CreateZExt(Rt1, Int64Ty); 5023 5024 Value *ShiftCast = llvm::ConstantInt::get(Int64Ty, 32); 5025 RtAndRt2 = Builder.CreateShl(Rt, ShiftCast, "shl", true); 5026 RtAndRt2 = Builder.CreateOr(RtAndRt2, Rt1); 5027 5028 return Builder.CreateBitCast(RtAndRt2, ConvertType(E->getType())); 5029 } 5030 5031 if (BuiltinID == ARM::BI__builtin_arm_ldrexd || 5032 ((BuiltinID == ARM::BI__builtin_arm_ldrex || 5033 BuiltinID == ARM::BI__builtin_arm_ldaex) && 5034 getContext().getTypeSize(E->getType()) == 64) || 5035 BuiltinID == ARM::BI__ldrexd) { 5036 Function *F; 5037 5038 switch (BuiltinID) { 5039 default: llvm_unreachable("unexpected builtin"); 5040 case ARM::BI__builtin_arm_ldaex: 5041 F = CGM.getIntrinsic(Intrinsic::arm_ldaexd); 5042 break; 5043 case ARM::BI__builtin_arm_ldrexd: 5044 case ARM::BI__builtin_arm_ldrex: 5045 case ARM::BI__ldrexd: 5046 F = CGM.getIntrinsic(Intrinsic::arm_ldrexd); 5047 break; 5048 } 5049 5050 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 5051 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 5052 "ldrexd"); 5053 5054 Value *Val0 = Builder.CreateExtractValue(Val, 1); 5055 Value *Val1 = Builder.CreateExtractValue(Val, 0); 5056 Val0 = Builder.CreateZExt(Val0, Int64Ty); 5057 Val1 = Builder.CreateZExt(Val1, Int64Ty); 5058 5059 Value *ShiftCst = llvm::ConstantInt::get(Int64Ty, 32); 5060 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 5061 Val = Builder.CreateOr(Val, Val1); 5062 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 5063 } 5064 5065 if (BuiltinID == ARM::BI__builtin_arm_ldrex || 5066 BuiltinID == ARM::BI__builtin_arm_ldaex) { 5067 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 5068 5069 QualType Ty = E->getType(); 5070 llvm::Type *RealResTy = ConvertType(Ty); 5071 llvm::Type *PtrTy = llvm::IntegerType::get( 5072 getLLVMContext(), getContext().getTypeSize(Ty))->getPointerTo(); 5073 LoadAddr = Builder.CreateBitCast(LoadAddr, PtrTy); 5074 5075 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_ldaex 5076 ? Intrinsic::arm_ldaex 5077 : Intrinsic::arm_ldrex, 5078 PtrTy); 5079 Value *Val = Builder.CreateCall(F, LoadAddr, "ldrex"); 5080 5081 if (RealResTy->isPointerTy()) 5082 return Builder.CreateIntToPtr(Val, RealResTy); 5083 else { 5084 llvm::Type *IntResTy = llvm::IntegerType::get( 5085 getLLVMContext(), CGM.getDataLayout().getTypeSizeInBits(RealResTy)); 5086 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 5087 return Builder.CreateBitCast(Val, RealResTy); 5088 } 5089 } 5090 5091 if (BuiltinID == ARM::BI__builtin_arm_strexd || 5092 ((BuiltinID == ARM::BI__builtin_arm_stlex || 5093 BuiltinID == ARM::BI__builtin_arm_strex) && 5094 getContext().getTypeSize(E->getArg(0)->getType()) == 64)) { 5095 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 5096 ? Intrinsic::arm_stlexd 5097 : Intrinsic::arm_strexd); 5098 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty); 5099 5100 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 5101 Value *Val = EmitScalarExpr(E->getArg(0)); 5102 Builder.CreateStore(Val, Tmp); 5103 5104 Address LdPtr = Builder.CreateBitCast(Tmp,llvm::PointerType::getUnqual(STy)); 5105 Val = Builder.CreateLoad(LdPtr); 5106 5107 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 5108 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 5109 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), Int8PtrTy); 5110 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "strexd"); 5111 } 5112 5113 if (BuiltinID == ARM::BI__builtin_arm_strex || 5114 BuiltinID == ARM::BI__builtin_arm_stlex) { 5115 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 5116 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 5117 5118 QualType Ty = E->getArg(0)->getType(); 5119 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 5120 getContext().getTypeSize(Ty)); 5121 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 5122 5123 if (StoreVal->getType()->isPointerTy()) 5124 StoreVal = Builder.CreatePtrToInt(StoreVal, Int32Ty); 5125 else { 5126 llvm::Type *IntTy = llvm::IntegerType::get( 5127 getLLVMContext(), 5128 CGM.getDataLayout().getTypeSizeInBits(StoreVal->getType())); 5129 StoreVal = Builder.CreateBitCast(StoreVal, IntTy); 5130 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int32Ty); 5131 } 5132 5133 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 5134 ? Intrinsic::arm_stlex 5135 : Intrinsic::arm_strex, 5136 StoreAddr->getType()); 5137 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "strex"); 5138 } 5139 5140 switch (BuiltinID) { 5141 case ARM::BI__iso_volatile_load8: 5142 case ARM::BI__iso_volatile_load16: 5143 case ARM::BI__iso_volatile_load32: 5144 case ARM::BI__iso_volatile_load64: { 5145 Value *Ptr = EmitScalarExpr(E->getArg(0)); 5146 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 5147 CharUnits LoadSize = getContext().getTypeSizeInChars(ElTy); 5148 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 5149 LoadSize.getQuantity() * 8); 5150 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 5151 llvm::LoadInst *Load = 5152 Builder.CreateAlignedLoad(Ptr, LoadSize); 5153 Load->setVolatile(true); 5154 return Load; 5155 } 5156 case ARM::BI__iso_volatile_store8: 5157 case ARM::BI__iso_volatile_store16: 5158 case ARM::BI__iso_volatile_store32: 5159 case ARM::BI__iso_volatile_store64: { 5160 Value *Ptr = EmitScalarExpr(E->getArg(0)); 5161 Value *Value = EmitScalarExpr(E->getArg(1)); 5162 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 5163 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 5164 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 5165 StoreSize.getQuantity() * 8); 5166 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 5167 llvm::StoreInst *Store = 5168 Builder.CreateAlignedStore(Value, Ptr, 5169 StoreSize); 5170 Store->setVolatile(true); 5171 return Store; 5172 } 5173 } 5174 5175 if (BuiltinID == ARM::BI__builtin_arm_clrex) { 5176 Function *F = CGM.getIntrinsic(Intrinsic::arm_clrex); 5177 return Builder.CreateCall(F); 5178 } 5179 5180 // CRC32 5181 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 5182 switch (BuiltinID) { 5183 case ARM::BI__builtin_arm_crc32b: 5184 CRCIntrinsicID = Intrinsic::arm_crc32b; break; 5185 case ARM::BI__builtin_arm_crc32cb: 5186 CRCIntrinsicID = Intrinsic::arm_crc32cb; break; 5187 case ARM::BI__builtin_arm_crc32h: 5188 CRCIntrinsicID = Intrinsic::arm_crc32h; break; 5189 case ARM::BI__builtin_arm_crc32ch: 5190 CRCIntrinsicID = Intrinsic::arm_crc32ch; break; 5191 case ARM::BI__builtin_arm_crc32w: 5192 case ARM::BI__builtin_arm_crc32d: 5193 CRCIntrinsicID = Intrinsic::arm_crc32w; break; 5194 case ARM::BI__builtin_arm_crc32cw: 5195 case ARM::BI__builtin_arm_crc32cd: 5196 CRCIntrinsicID = Intrinsic::arm_crc32cw; break; 5197 } 5198 5199 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 5200 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 5201 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 5202 5203 // crc32{c,}d intrinsics are implemnted as two calls to crc32{c,}w 5204 // intrinsics, hence we need different codegen for these cases. 5205 if (BuiltinID == ARM::BI__builtin_arm_crc32d || 5206 BuiltinID == ARM::BI__builtin_arm_crc32cd) { 5207 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 5208 Value *Arg1a = Builder.CreateTruncOrBitCast(Arg1, Int32Ty); 5209 Value *Arg1b = Builder.CreateLShr(Arg1, C1); 5210 Arg1b = Builder.CreateTruncOrBitCast(Arg1b, Int32Ty); 5211 5212 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 5213 Value *Res = Builder.CreateCall(F, {Arg0, Arg1a}); 5214 return Builder.CreateCall(F, {Res, Arg1b}); 5215 } else { 5216 Arg1 = Builder.CreateZExtOrBitCast(Arg1, Int32Ty); 5217 5218 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 5219 return Builder.CreateCall(F, {Arg0, Arg1}); 5220 } 5221 } 5222 5223 if (BuiltinID == ARM::BI__builtin_arm_rsr || 5224 BuiltinID == ARM::BI__builtin_arm_rsr64 || 5225 BuiltinID == ARM::BI__builtin_arm_rsrp || 5226 BuiltinID == ARM::BI__builtin_arm_wsr || 5227 BuiltinID == ARM::BI__builtin_arm_wsr64 || 5228 BuiltinID == ARM::BI__builtin_arm_wsrp) { 5229 5230 bool IsRead = BuiltinID == ARM::BI__builtin_arm_rsr || 5231 BuiltinID == ARM::BI__builtin_arm_rsr64 || 5232 BuiltinID == ARM::BI__builtin_arm_rsrp; 5233 5234 bool IsPointerBuiltin = BuiltinID == ARM::BI__builtin_arm_rsrp || 5235 BuiltinID == ARM::BI__builtin_arm_wsrp; 5236 5237 bool Is64Bit = BuiltinID == ARM::BI__builtin_arm_rsr64 || 5238 BuiltinID == ARM::BI__builtin_arm_wsr64; 5239 5240 llvm::Type *ValueType; 5241 llvm::Type *RegisterType; 5242 if (IsPointerBuiltin) { 5243 ValueType = VoidPtrTy; 5244 RegisterType = Int32Ty; 5245 } else if (Is64Bit) { 5246 ValueType = RegisterType = Int64Ty; 5247 } else { 5248 ValueType = RegisterType = Int32Ty; 5249 } 5250 5251 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 5252 } 5253 5254 // Find out if any arguments are required to be integer constant 5255 // expressions. 5256 unsigned ICEArguments = 0; 5257 ASTContext::GetBuiltinTypeError Error; 5258 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 5259 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 5260 5261 auto getAlignmentValue32 = [&](Address addr) -> Value* { 5262 return Builder.getInt32(addr.getAlignment().getQuantity()); 5263 }; 5264 5265 Address PtrOp0 = Address::invalid(); 5266 Address PtrOp1 = Address::invalid(); 5267 SmallVector<Value*, 4> Ops; 5268 bool HasExtraArg = HasExtraNeonArgument(BuiltinID); 5269 unsigned NumArgs = E->getNumArgs() - (HasExtraArg ? 1 : 0); 5270 for (unsigned i = 0, e = NumArgs; i != e; i++) { 5271 if (i == 0) { 5272 switch (BuiltinID) { 5273 case NEON::BI__builtin_neon_vld1_v: 5274 case NEON::BI__builtin_neon_vld1q_v: 5275 case NEON::BI__builtin_neon_vld1q_lane_v: 5276 case NEON::BI__builtin_neon_vld1_lane_v: 5277 case NEON::BI__builtin_neon_vld1_dup_v: 5278 case NEON::BI__builtin_neon_vld1q_dup_v: 5279 case NEON::BI__builtin_neon_vst1_v: 5280 case NEON::BI__builtin_neon_vst1q_v: 5281 case NEON::BI__builtin_neon_vst1q_lane_v: 5282 case NEON::BI__builtin_neon_vst1_lane_v: 5283 case NEON::BI__builtin_neon_vst2_v: 5284 case NEON::BI__builtin_neon_vst2q_v: 5285 case NEON::BI__builtin_neon_vst2_lane_v: 5286 case NEON::BI__builtin_neon_vst2q_lane_v: 5287 case NEON::BI__builtin_neon_vst3_v: 5288 case NEON::BI__builtin_neon_vst3q_v: 5289 case NEON::BI__builtin_neon_vst3_lane_v: 5290 case NEON::BI__builtin_neon_vst3q_lane_v: 5291 case NEON::BI__builtin_neon_vst4_v: 5292 case NEON::BI__builtin_neon_vst4q_v: 5293 case NEON::BI__builtin_neon_vst4_lane_v: 5294 case NEON::BI__builtin_neon_vst4q_lane_v: 5295 // Get the alignment for the argument in addition to the value; 5296 // we'll use it later. 5297 PtrOp0 = EmitPointerWithAlignment(E->getArg(0)); 5298 Ops.push_back(PtrOp0.getPointer()); 5299 continue; 5300 } 5301 } 5302 if (i == 1) { 5303 switch (BuiltinID) { 5304 case NEON::BI__builtin_neon_vld2_v: 5305 case NEON::BI__builtin_neon_vld2q_v: 5306 case NEON::BI__builtin_neon_vld3_v: 5307 case NEON::BI__builtin_neon_vld3q_v: 5308 case NEON::BI__builtin_neon_vld4_v: 5309 case NEON::BI__builtin_neon_vld4q_v: 5310 case NEON::BI__builtin_neon_vld2_lane_v: 5311 case NEON::BI__builtin_neon_vld2q_lane_v: 5312 case NEON::BI__builtin_neon_vld3_lane_v: 5313 case NEON::BI__builtin_neon_vld3q_lane_v: 5314 case NEON::BI__builtin_neon_vld4_lane_v: 5315 case NEON::BI__builtin_neon_vld4q_lane_v: 5316 case NEON::BI__builtin_neon_vld2_dup_v: 5317 case NEON::BI__builtin_neon_vld3_dup_v: 5318 case NEON::BI__builtin_neon_vld4_dup_v: 5319 // Get the alignment for the argument in addition to the value; 5320 // we'll use it later. 5321 PtrOp1 = EmitPointerWithAlignment(E->getArg(1)); 5322 Ops.push_back(PtrOp1.getPointer()); 5323 continue; 5324 } 5325 } 5326 5327 if ((ICEArguments & (1 << i)) == 0) { 5328 Ops.push_back(EmitScalarExpr(E->getArg(i))); 5329 } else { 5330 // If this is required to be a constant, constant fold it so that we know 5331 // that the generated intrinsic gets a ConstantInt. 5332 llvm::APSInt Result; 5333 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 5334 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 5335 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 5336 } 5337 } 5338 5339 switch (BuiltinID) { 5340 default: break; 5341 5342 case NEON::BI__builtin_neon_vget_lane_i8: 5343 case NEON::BI__builtin_neon_vget_lane_i16: 5344 case NEON::BI__builtin_neon_vget_lane_i32: 5345 case NEON::BI__builtin_neon_vget_lane_i64: 5346 case NEON::BI__builtin_neon_vget_lane_f32: 5347 case NEON::BI__builtin_neon_vgetq_lane_i8: 5348 case NEON::BI__builtin_neon_vgetq_lane_i16: 5349 case NEON::BI__builtin_neon_vgetq_lane_i32: 5350 case NEON::BI__builtin_neon_vgetq_lane_i64: 5351 case NEON::BI__builtin_neon_vgetq_lane_f32: 5352 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane"); 5353 5354 case NEON::BI__builtin_neon_vset_lane_i8: 5355 case NEON::BI__builtin_neon_vset_lane_i16: 5356 case NEON::BI__builtin_neon_vset_lane_i32: 5357 case NEON::BI__builtin_neon_vset_lane_i64: 5358 case NEON::BI__builtin_neon_vset_lane_f32: 5359 case NEON::BI__builtin_neon_vsetq_lane_i8: 5360 case NEON::BI__builtin_neon_vsetq_lane_i16: 5361 case NEON::BI__builtin_neon_vsetq_lane_i32: 5362 case NEON::BI__builtin_neon_vsetq_lane_i64: 5363 case NEON::BI__builtin_neon_vsetq_lane_f32: 5364 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5365 5366 case NEON::BI__builtin_neon_vsha1h_u32: 5367 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1h), Ops, 5368 "vsha1h"); 5369 case NEON::BI__builtin_neon_vsha1cq_u32: 5370 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1c), Ops, 5371 "vsha1h"); 5372 case NEON::BI__builtin_neon_vsha1pq_u32: 5373 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1p), Ops, 5374 "vsha1h"); 5375 case NEON::BI__builtin_neon_vsha1mq_u32: 5376 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1m), Ops, 5377 "vsha1h"); 5378 5379 // The ARM _MoveToCoprocessor builtins put the input register value as 5380 // the first argument, but the LLVM intrinsic expects it as the third one. 5381 case ARM::BI_MoveToCoprocessor: 5382 case ARM::BI_MoveToCoprocessor2: { 5383 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI_MoveToCoprocessor ? 5384 Intrinsic::arm_mcr : Intrinsic::arm_mcr2); 5385 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0], 5386 Ops[3], Ops[4], Ops[5]}); 5387 } 5388 case ARM::BI_BitScanForward: 5389 case ARM::BI_BitScanForward64: 5390 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 5391 case ARM::BI_BitScanReverse: 5392 case ARM::BI_BitScanReverse64: 5393 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 5394 5395 case ARM::BI_InterlockedAnd64: 5396 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 5397 case ARM::BI_InterlockedExchange64: 5398 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 5399 case ARM::BI_InterlockedExchangeAdd64: 5400 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 5401 case ARM::BI_InterlockedExchangeSub64: 5402 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 5403 case ARM::BI_InterlockedOr64: 5404 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 5405 case ARM::BI_InterlockedXor64: 5406 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 5407 case ARM::BI_InterlockedDecrement64: 5408 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 5409 case ARM::BI_InterlockedIncrement64: 5410 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 5411 } 5412 5413 // Get the last argument, which specifies the vector type. 5414 assert(HasExtraArg); 5415 llvm::APSInt Result; 5416 const Expr *Arg = E->getArg(E->getNumArgs()-1); 5417 if (!Arg->isIntegerConstantExpr(Result, getContext())) 5418 return nullptr; 5419 5420 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f || 5421 BuiltinID == ARM::BI__builtin_arm_vcvtr_d) { 5422 // Determine the overloaded type of this builtin. 5423 llvm::Type *Ty; 5424 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f) 5425 Ty = FloatTy; 5426 else 5427 Ty = DoubleTy; 5428 5429 // Determine whether this is an unsigned conversion or not. 5430 bool usgn = Result.getZExtValue() == 1; 5431 unsigned Int = usgn ? Intrinsic::arm_vcvtru : Intrinsic::arm_vcvtr; 5432 5433 // Call the appropriate intrinsic. 5434 Function *F = CGM.getIntrinsic(Int, Ty); 5435 return Builder.CreateCall(F, Ops, "vcvtr"); 5436 } 5437 5438 // Determine the type of this overloaded NEON intrinsic. 5439 NeonTypeFlags Type(Result.getZExtValue()); 5440 bool usgn = Type.isUnsigned(); 5441 bool rightShift = false; 5442 5443 llvm::VectorType *VTy = GetNeonType(this, Type, Arch); 5444 llvm::Type *Ty = VTy; 5445 if (!Ty) 5446 return nullptr; 5447 5448 // Many NEON builtins have identical semantics and uses in ARM and 5449 // AArch64. Emit these in a single function. 5450 auto IntrinsicMap = makeArrayRef(ARMSIMDIntrinsicMap); 5451 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 5452 IntrinsicMap, BuiltinID, NEONSIMDIntrinsicsProvenSorted); 5453 if (Builtin) 5454 return EmitCommonNeonBuiltinExpr( 5455 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 5456 Builtin->NameHint, Builtin->TypeModifier, E, Ops, PtrOp0, PtrOp1, Arch); 5457 5458 unsigned Int; 5459 switch (BuiltinID) { 5460 default: return nullptr; 5461 case NEON::BI__builtin_neon_vld1q_lane_v: 5462 // Handle 64-bit integer elements as a special case. Use shuffles of 5463 // one-element vectors to avoid poor code for i64 in the backend. 5464 if (VTy->getElementType()->isIntegerTy(64)) { 5465 // Extract the other lane. 5466 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5467 uint32_t Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); 5468 Value *SV = llvm::ConstantVector::get(ConstantInt::get(Int32Ty, 1-Lane)); 5469 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 5470 // Load the value as a one-element vector. 5471 Ty = llvm::VectorType::get(VTy->getElementType(), 1); 5472 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 5473 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Tys); 5474 Value *Align = getAlignmentValue32(PtrOp0); 5475 Value *Ld = Builder.CreateCall(F, {Ops[0], Align}); 5476 // Combine them. 5477 uint32_t Indices[] = {1 - Lane, Lane}; 5478 SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 5479 return Builder.CreateShuffleVector(Ops[1], Ld, SV, "vld1q_lane"); 5480 } 5481 LLVM_FALLTHROUGH; 5482 case NEON::BI__builtin_neon_vld1_lane_v: { 5483 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5484 PtrOp0 = Builder.CreateElementBitCast(PtrOp0, VTy->getElementType()); 5485 Value *Ld = Builder.CreateLoad(PtrOp0); 5486 return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); 5487 } 5488 case NEON::BI__builtin_neon_vld2_dup_v: 5489 case NEON::BI__builtin_neon_vld3_dup_v: 5490 case NEON::BI__builtin_neon_vld4_dup_v: { 5491 // Handle 64-bit elements as a special-case. There is no "dup" needed. 5492 if (VTy->getElementType()->getPrimitiveSizeInBits() == 64) { 5493 switch (BuiltinID) { 5494 case NEON::BI__builtin_neon_vld2_dup_v: 5495 Int = Intrinsic::arm_neon_vld2; 5496 break; 5497 case NEON::BI__builtin_neon_vld3_dup_v: 5498 Int = Intrinsic::arm_neon_vld3; 5499 break; 5500 case NEON::BI__builtin_neon_vld4_dup_v: 5501 Int = Intrinsic::arm_neon_vld4; 5502 break; 5503 default: llvm_unreachable("unknown vld_dup intrinsic?"); 5504 } 5505 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 5506 Function *F = CGM.getIntrinsic(Int, Tys); 5507 llvm::Value *Align = getAlignmentValue32(PtrOp1); 5508 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, "vld_dup"); 5509 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5510 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5511 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5512 } 5513 switch (BuiltinID) { 5514 case NEON::BI__builtin_neon_vld2_dup_v: 5515 Int = Intrinsic::arm_neon_vld2lane; 5516 break; 5517 case NEON::BI__builtin_neon_vld3_dup_v: 5518 Int = Intrinsic::arm_neon_vld3lane; 5519 break; 5520 case NEON::BI__builtin_neon_vld4_dup_v: 5521 Int = Intrinsic::arm_neon_vld4lane; 5522 break; 5523 default: llvm_unreachable("unknown vld_dup intrinsic?"); 5524 } 5525 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 5526 Function *F = CGM.getIntrinsic(Int, Tys); 5527 llvm::StructType *STy = cast<llvm::StructType>(F->getReturnType()); 5528 5529 SmallVector<Value*, 6> Args; 5530 Args.push_back(Ops[1]); 5531 Args.append(STy->getNumElements(), UndefValue::get(Ty)); 5532 5533 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 5534 Args.push_back(CI); 5535 Args.push_back(getAlignmentValue32(PtrOp1)); 5536 5537 Ops[1] = Builder.CreateCall(F, Args, "vld_dup"); 5538 // splat lane 0 to all elts in each vector of the result. 5539 for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { 5540 Value *Val = Builder.CreateExtractValue(Ops[1], i); 5541 Value *Elt = Builder.CreateBitCast(Val, Ty); 5542 Elt = EmitNeonSplat(Elt, CI); 5543 Elt = Builder.CreateBitCast(Elt, Val->getType()); 5544 Ops[1] = Builder.CreateInsertValue(Ops[1], Elt, i); 5545 } 5546 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5547 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5548 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5549 } 5550 case NEON::BI__builtin_neon_vqrshrn_n_v: 5551 Int = 5552 usgn ? Intrinsic::arm_neon_vqrshiftnu : Intrinsic::arm_neon_vqrshiftns; 5553 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n", 5554 1, true); 5555 case NEON::BI__builtin_neon_vqrshrun_n_v: 5556 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqrshiftnsu, Ty), 5557 Ops, "vqrshrun_n", 1, true); 5558 case NEON::BI__builtin_neon_vqshrn_n_v: 5559 Int = usgn ? Intrinsic::arm_neon_vqshiftnu : Intrinsic::arm_neon_vqshiftns; 5560 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n", 5561 1, true); 5562 case NEON::BI__builtin_neon_vqshrun_n_v: 5563 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqshiftnsu, Ty), 5564 Ops, "vqshrun_n", 1, true); 5565 case NEON::BI__builtin_neon_vrecpe_v: 5566 case NEON::BI__builtin_neon_vrecpeq_v: 5567 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecpe, Ty), 5568 Ops, "vrecpe"); 5569 case NEON::BI__builtin_neon_vrshrn_n_v: 5570 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrshiftn, Ty), 5571 Ops, "vrshrn_n", 1, true); 5572 case NEON::BI__builtin_neon_vrsra_n_v: 5573 case NEON::BI__builtin_neon_vrsraq_n_v: 5574 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5575 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5576 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, true); 5577 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 5578 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Ty), {Ops[1], Ops[2]}); 5579 return Builder.CreateAdd(Ops[0], Ops[1], "vrsra_n"); 5580 case NEON::BI__builtin_neon_vsri_n_v: 5581 case NEON::BI__builtin_neon_vsriq_n_v: 5582 rightShift = true; 5583 LLVM_FALLTHROUGH; 5584 case NEON::BI__builtin_neon_vsli_n_v: 5585 case NEON::BI__builtin_neon_vsliq_n_v: 5586 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, rightShift); 5587 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vshiftins, Ty), 5588 Ops, "vsli_n"); 5589 case NEON::BI__builtin_neon_vsra_n_v: 5590 case NEON::BI__builtin_neon_vsraq_n_v: 5591 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5592 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 5593 return Builder.CreateAdd(Ops[0], Ops[1]); 5594 case NEON::BI__builtin_neon_vst1q_lane_v: 5595 // Handle 64-bit integer elements as a special case. Use a shuffle to get 5596 // a one-element vector and avoid poor code for i64 in the backend. 5597 if (VTy->getElementType()->isIntegerTy(64)) { 5598 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5599 Value *SV = llvm::ConstantVector::get(cast<llvm::Constant>(Ops[2])); 5600 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 5601 Ops[2] = getAlignmentValue32(PtrOp0); 5602 llvm::Type *Tys[] = {Int8PtrTy, Ops[1]->getType()}; 5603 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, 5604 Tys), Ops); 5605 } 5606 LLVM_FALLTHROUGH; 5607 case NEON::BI__builtin_neon_vst1_lane_v: { 5608 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5609 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 5610 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5611 auto St = Builder.CreateStore(Ops[1], Builder.CreateBitCast(PtrOp0, Ty)); 5612 return St; 5613 } 5614 case NEON::BI__builtin_neon_vtbl1_v: 5615 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl1), 5616 Ops, "vtbl1"); 5617 case NEON::BI__builtin_neon_vtbl2_v: 5618 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl2), 5619 Ops, "vtbl2"); 5620 case NEON::BI__builtin_neon_vtbl3_v: 5621 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl3), 5622 Ops, "vtbl3"); 5623 case NEON::BI__builtin_neon_vtbl4_v: 5624 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl4), 5625 Ops, "vtbl4"); 5626 case NEON::BI__builtin_neon_vtbx1_v: 5627 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx1), 5628 Ops, "vtbx1"); 5629 case NEON::BI__builtin_neon_vtbx2_v: 5630 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx2), 5631 Ops, "vtbx2"); 5632 case NEON::BI__builtin_neon_vtbx3_v: 5633 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx3), 5634 Ops, "vtbx3"); 5635 case NEON::BI__builtin_neon_vtbx4_v: 5636 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx4), 5637 Ops, "vtbx4"); 5638 } 5639 } 5640 5641 static Value *EmitAArch64TblBuiltinExpr(CodeGenFunction &CGF, unsigned BuiltinID, 5642 const CallExpr *E, 5643 SmallVectorImpl<Value *> &Ops, 5644 llvm::Triple::ArchType Arch) { 5645 unsigned int Int = 0; 5646 const char *s = nullptr; 5647 5648 switch (BuiltinID) { 5649 default: 5650 return nullptr; 5651 case NEON::BI__builtin_neon_vtbl1_v: 5652 case NEON::BI__builtin_neon_vqtbl1_v: 5653 case NEON::BI__builtin_neon_vqtbl1q_v: 5654 case NEON::BI__builtin_neon_vtbl2_v: 5655 case NEON::BI__builtin_neon_vqtbl2_v: 5656 case NEON::BI__builtin_neon_vqtbl2q_v: 5657 case NEON::BI__builtin_neon_vtbl3_v: 5658 case NEON::BI__builtin_neon_vqtbl3_v: 5659 case NEON::BI__builtin_neon_vqtbl3q_v: 5660 case NEON::BI__builtin_neon_vtbl4_v: 5661 case NEON::BI__builtin_neon_vqtbl4_v: 5662 case NEON::BI__builtin_neon_vqtbl4q_v: 5663 break; 5664 case NEON::BI__builtin_neon_vtbx1_v: 5665 case NEON::BI__builtin_neon_vqtbx1_v: 5666 case NEON::BI__builtin_neon_vqtbx1q_v: 5667 case NEON::BI__builtin_neon_vtbx2_v: 5668 case NEON::BI__builtin_neon_vqtbx2_v: 5669 case NEON::BI__builtin_neon_vqtbx2q_v: 5670 case NEON::BI__builtin_neon_vtbx3_v: 5671 case NEON::BI__builtin_neon_vqtbx3_v: 5672 case NEON::BI__builtin_neon_vqtbx3q_v: 5673 case NEON::BI__builtin_neon_vtbx4_v: 5674 case NEON::BI__builtin_neon_vqtbx4_v: 5675 case NEON::BI__builtin_neon_vqtbx4q_v: 5676 break; 5677 } 5678 5679 assert(E->getNumArgs() >= 3); 5680 5681 // Get the last argument, which specifies the vector type. 5682 llvm::APSInt Result; 5683 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 5684 if (!Arg->isIntegerConstantExpr(Result, CGF.getContext())) 5685 return nullptr; 5686 5687 // Determine the type of this overloaded NEON intrinsic. 5688 NeonTypeFlags Type(Result.getZExtValue()); 5689 llvm::VectorType *Ty = GetNeonType(&CGF, Type, Arch); 5690 if (!Ty) 5691 return nullptr; 5692 5693 CodeGen::CGBuilderTy &Builder = CGF.Builder; 5694 5695 // AArch64 scalar builtins are not overloaded, they do not have an extra 5696 // argument that specifies the vector type, need to handle each case. 5697 switch (BuiltinID) { 5698 case NEON::BI__builtin_neon_vtbl1_v: { 5699 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 1), nullptr, 5700 Ops[1], Ty, Intrinsic::aarch64_neon_tbl1, 5701 "vtbl1"); 5702 } 5703 case NEON::BI__builtin_neon_vtbl2_v: { 5704 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 2), nullptr, 5705 Ops[2], Ty, Intrinsic::aarch64_neon_tbl1, 5706 "vtbl1"); 5707 } 5708 case NEON::BI__builtin_neon_vtbl3_v: { 5709 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 3), nullptr, 5710 Ops[3], Ty, Intrinsic::aarch64_neon_tbl2, 5711 "vtbl2"); 5712 } 5713 case NEON::BI__builtin_neon_vtbl4_v: { 5714 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 4), nullptr, 5715 Ops[4], Ty, Intrinsic::aarch64_neon_tbl2, 5716 "vtbl2"); 5717 } 5718 case NEON::BI__builtin_neon_vtbx1_v: { 5719 Value *TblRes = 5720 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 1), nullptr, Ops[2], 5721 Ty, Intrinsic::aarch64_neon_tbl1, "vtbl1"); 5722 5723 llvm::Constant *EightV = ConstantInt::get(Ty, 8); 5724 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[2], EightV); 5725 CmpRes = Builder.CreateSExt(CmpRes, Ty); 5726 5727 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 5728 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 5729 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 5730 } 5731 case NEON::BI__builtin_neon_vtbx2_v: { 5732 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 2), Ops[0], 5733 Ops[3], Ty, Intrinsic::aarch64_neon_tbx1, 5734 "vtbx1"); 5735 } 5736 case NEON::BI__builtin_neon_vtbx3_v: { 5737 Value *TblRes = 5738 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 3), nullptr, Ops[4], 5739 Ty, Intrinsic::aarch64_neon_tbl2, "vtbl2"); 5740 5741 llvm::Constant *TwentyFourV = ConstantInt::get(Ty, 24); 5742 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[4], 5743 TwentyFourV); 5744 CmpRes = Builder.CreateSExt(CmpRes, Ty); 5745 5746 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 5747 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 5748 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 5749 } 5750 case NEON::BI__builtin_neon_vtbx4_v: { 5751 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 4), Ops[0], 5752 Ops[5], Ty, Intrinsic::aarch64_neon_tbx2, 5753 "vtbx2"); 5754 } 5755 case NEON::BI__builtin_neon_vqtbl1_v: 5756 case NEON::BI__builtin_neon_vqtbl1q_v: 5757 Int = Intrinsic::aarch64_neon_tbl1; s = "vtbl1"; break; 5758 case NEON::BI__builtin_neon_vqtbl2_v: 5759 case NEON::BI__builtin_neon_vqtbl2q_v: { 5760 Int = Intrinsic::aarch64_neon_tbl2; s = "vtbl2"; break; 5761 case NEON::BI__builtin_neon_vqtbl3_v: 5762 case NEON::BI__builtin_neon_vqtbl3q_v: 5763 Int = Intrinsic::aarch64_neon_tbl3; s = "vtbl3"; break; 5764 case NEON::BI__builtin_neon_vqtbl4_v: 5765 case NEON::BI__builtin_neon_vqtbl4q_v: 5766 Int = Intrinsic::aarch64_neon_tbl4; s = "vtbl4"; break; 5767 case NEON::BI__builtin_neon_vqtbx1_v: 5768 case NEON::BI__builtin_neon_vqtbx1q_v: 5769 Int = Intrinsic::aarch64_neon_tbx1; s = "vtbx1"; break; 5770 case NEON::BI__builtin_neon_vqtbx2_v: 5771 case NEON::BI__builtin_neon_vqtbx2q_v: 5772 Int = Intrinsic::aarch64_neon_tbx2; s = "vtbx2"; break; 5773 case NEON::BI__builtin_neon_vqtbx3_v: 5774 case NEON::BI__builtin_neon_vqtbx3q_v: 5775 Int = Intrinsic::aarch64_neon_tbx3; s = "vtbx3"; break; 5776 case NEON::BI__builtin_neon_vqtbx4_v: 5777 case NEON::BI__builtin_neon_vqtbx4q_v: 5778 Int = Intrinsic::aarch64_neon_tbx4; s = "vtbx4"; break; 5779 } 5780 } 5781 5782 if (!Int) 5783 return nullptr; 5784 5785 Function *F = CGF.CGM.getIntrinsic(Int, Ty); 5786 return CGF.EmitNeonCall(F, Ops, s); 5787 } 5788 5789 Value *CodeGenFunction::vectorWrapScalar16(Value *Op) { 5790 llvm::Type *VTy = llvm::VectorType::get(Int16Ty, 4); 5791 Op = Builder.CreateBitCast(Op, Int16Ty); 5792 Value *V = UndefValue::get(VTy); 5793 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 5794 Op = Builder.CreateInsertElement(V, Op, CI); 5795 return Op; 5796 } 5797 5798 Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, 5799 const CallExpr *E, 5800 llvm::Triple::ArchType Arch) { 5801 unsigned HintID = static_cast<unsigned>(-1); 5802 switch (BuiltinID) { 5803 default: break; 5804 case AArch64::BI__builtin_arm_nop: 5805 HintID = 0; 5806 break; 5807 case AArch64::BI__builtin_arm_yield: 5808 HintID = 1; 5809 break; 5810 case AArch64::BI__builtin_arm_wfe: 5811 HintID = 2; 5812 break; 5813 case AArch64::BI__builtin_arm_wfi: 5814 HintID = 3; 5815 break; 5816 case AArch64::BI__builtin_arm_sev: 5817 HintID = 4; 5818 break; 5819 case AArch64::BI__builtin_arm_sevl: 5820 HintID = 5; 5821 break; 5822 } 5823 5824 if (HintID != static_cast<unsigned>(-1)) { 5825 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_hint); 5826 return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID)); 5827 } 5828 5829 if (BuiltinID == AArch64::BI__builtin_arm_prefetch) { 5830 Value *Address = EmitScalarExpr(E->getArg(0)); 5831 Value *RW = EmitScalarExpr(E->getArg(1)); 5832 Value *CacheLevel = EmitScalarExpr(E->getArg(2)); 5833 Value *RetentionPolicy = EmitScalarExpr(E->getArg(3)); 5834 Value *IsData = EmitScalarExpr(E->getArg(4)); 5835 5836 Value *Locality = nullptr; 5837 if (cast<llvm::ConstantInt>(RetentionPolicy)->isZero()) { 5838 // Temporal fetch, needs to convert cache level to locality. 5839 Locality = llvm::ConstantInt::get(Int32Ty, 5840 -cast<llvm::ConstantInt>(CacheLevel)->getValue() + 3); 5841 } else { 5842 // Streaming fetch. 5843 Locality = llvm::ConstantInt::get(Int32Ty, 0); 5844 } 5845 5846 // FIXME: We need AArch64 specific LLVM intrinsic if we want to specify 5847 // PLDL3STRM or PLDL2STRM. 5848 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 5849 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 5850 } 5851 5852 if (BuiltinID == AArch64::BI__builtin_arm_rbit) { 5853 assert((getContext().getTypeSize(E->getType()) == 32) && 5854 "rbit of unusual size!"); 5855 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 5856 return Builder.CreateCall( 5857 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 5858 } 5859 if (BuiltinID == AArch64::BI__builtin_arm_rbit64) { 5860 assert((getContext().getTypeSize(E->getType()) == 64) && 5861 "rbit of unusual size!"); 5862 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 5863 return Builder.CreateCall( 5864 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 5865 } 5866 5867 if (BuiltinID == AArch64::BI__clear_cache) { 5868 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 5869 const FunctionDecl *FD = E->getDirectCallee(); 5870 Value *Ops[2]; 5871 for (unsigned i = 0; i < 2; i++) 5872 Ops[i] = EmitScalarExpr(E->getArg(i)); 5873 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 5874 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 5875 StringRef Name = FD->getName(); 5876 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 5877 } 5878 5879 if ((BuiltinID == AArch64::BI__builtin_arm_ldrex || 5880 BuiltinID == AArch64::BI__builtin_arm_ldaex) && 5881 getContext().getTypeSize(E->getType()) == 128) { 5882 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 5883 ? Intrinsic::aarch64_ldaxp 5884 : Intrinsic::aarch64_ldxp); 5885 5886 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 5887 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 5888 "ldxp"); 5889 5890 Value *Val0 = Builder.CreateExtractValue(Val, 1); 5891 Value *Val1 = Builder.CreateExtractValue(Val, 0); 5892 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 5893 Val0 = Builder.CreateZExt(Val0, Int128Ty); 5894 Val1 = Builder.CreateZExt(Val1, Int128Ty); 5895 5896 Value *ShiftCst = llvm::ConstantInt::get(Int128Ty, 64); 5897 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 5898 Val = Builder.CreateOr(Val, Val1); 5899 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 5900 } else if (BuiltinID == AArch64::BI__builtin_arm_ldrex || 5901 BuiltinID == AArch64::BI__builtin_arm_ldaex) { 5902 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 5903 5904 QualType Ty = E->getType(); 5905 llvm::Type *RealResTy = ConvertType(Ty); 5906 llvm::Type *PtrTy = llvm::IntegerType::get( 5907 getLLVMContext(), getContext().getTypeSize(Ty))->getPointerTo(); 5908 LoadAddr = Builder.CreateBitCast(LoadAddr, PtrTy); 5909 5910 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 5911 ? Intrinsic::aarch64_ldaxr 5912 : Intrinsic::aarch64_ldxr, 5913 PtrTy); 5914 Value *Val = Builder.CreateCall(F, LoadAddr, "ldxr"); 5915 5916 if (RealResTy->isPointerTy()) 5917 return Builder.CreateIntToPtr(Val, RealResTy); 5918 5919 llvm::Type *IntResTy = llvm::IntegerType::get( 5920 getLLVMContext(), CGM.getDataLayout().getTypeSizeInBits(RealResTy)); 5921 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 5922 return Builder.CreateBitCast(Val, RealResTy); 5923 } 5924 5925 if ((BuiltinID == AArch64::BI__builtin_arm_strex || 5926 BuiltinID == AArch64::BI__builtin_arm_stlex) && 5927 getContext().getTypeSize(E->getArg(0)->getType()) == 128) { 5928 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 5929 ? Intrinsic::aarch64_stlxp 5930 : Intrinsic::aarch64_stxp); 5931 llvm::Type *STy = llvm::StructType::get(Int64Ty, Int64Ty); 5932 5933 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 5934 EmitAnyExprToMem(E->getArg(0), Tmp, Qualifiers(), /*init*/ true); 5935 5936 Tmp = Builder.CreateBitCast(Tmp, llvm::PointerType::getUnqual(STy)); 5937 llvm::Value *Val = Builder.CreateLoad(Tmp); 5938 5939 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 5940 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 5941 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), 5942 Int8PtrTy); 5943 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "stxp"); 5944 } 5945 5946 if (BuiltinID == AArch64::BI__builtin_arm_strex || 5947 BuiltinID == AArch64::BI__builtin_arm_stlex) { 5948 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 5949 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 5950 5951 QualType Ty = E->getArg(0)->getType(); 5952 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 5953 getContext().getTypeSize(Ty)); 5954 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 5955 5956 if (StoreVal->getType()->isPointerTy()) 5957 StoreVal = Builder.CreatePtrToInt(StoreVal, Int64Ty); 5958 else { 5959 llvm::Type *IntTy = llvm::IntegerType::get( 5960 getLLVMContext(), 5961 CGM.getDataLayout().getTypeSizeInBits(StoreVal->getType())); 5962 StoreVal = Builder.CreateBitCast(StoreVal, IntTy); 5963 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int64Ty); 5964 } 5965 5966 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 5967 ? Intrinsic::aarch64_stlxr 5968 : Intrinsic::aarch64_stxr, 5969 StoreAddr->getType()); 5970 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "stxr"); 5971 } 5972 5973 if (BuiltinID == AArch64::BI__builtin_arm_clrex) { 5974 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_clrex); 5975 return Builder.CreateCall(F); 5976 } 5977 5978 // CRC32 5979 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 5980 switch (BuiltinID) { 5981 case AArch64::BI__builtin_arm_crc32b: 5982 CRCIntrinsicID = Intrinsic::aarch64_crc32b; break; 5983 case AArch64::BI__builtin_arm_crc32cb: 5984 CRCIntrinsicID = Intrinsic::aarch64_crc32cb; break; 5985 case AArch64::BI__builtin_arm_crc32h: 5986 CRCIntrinsicID = Intrinsic::aarch64_crc32h; break; 5987 case AArch64::BI__builtin_arm_crc32ch: 5988 CRCIntrinsicID = Intrinsic::aarch64_crc32ch; break; 5989 case AArch64::BI__builtin_arm_crc32w: 5990 CRCIntrinsicID = Intrinsic::aarch64_crc32w; break; 5991 case AArch64::BI__builtin_arm_crc32cw: 5992 CRCIntrinsicID = Intrinsic::aarch64_crc32cw; break; 5993 case AArch64::BI__builtin_arm_crc32d: 5994 CRCIntrinsicID = Intrinsic::aarch64_crc32x; break; 5995 case AArch64::BI__builtin_arm_crc32cd: 5996 CRCIntrinsicID = Intrinsic::aarch64_crc32cx; break; 5997 } 5998 5999 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 6000 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 6001 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 6002 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 6003 6004 llvm::Type *DataTy = F->getFunctionType()->getParamType(1); 6005 Arg1 = Builder.CreateZExtOrBitCast(Arg1, DataTy); 6006 6007 return Builder.CreateCall(F, {Arg0, Arg1}); 6008 } 6009 6010 if (BuiltinID == AArch64::BI__builtin_arm_rsr || 6011 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 6012 BuiltinID == AArch64::BI__builtin_arm_rsrp || 6013 BuiltinID == AArch64::BI__builtin_arm_wsr || 6014 BuiltinID == AArch64::BI__builtin_arm_wsr64 || 6015 BuiltinID == AArch64::BI__builtin_arm_wsrp) { 6016 6017 bool IsRead = BuiltinID == AArch64::BI__builtin_arm_rsr || 6018 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 6019 BuiltinID == AArch64::BI__builtin_arm_rsrp; 6020 6021 bool IsPointerBuiltin = BuiltinID == AArch64::BI__builtin_arm_rsrp || 6022 BuiltinID == AArch64::BI__builtin_arm_wsrp; 6023 6024 bool Is64Bit = BuiltinID != AArch64::BI__builtin_arm_rsr && 6025 BuiltinID != AArch64::BI__builtin_arm_wsr; 6026 6027 llvm::Type *ValueType; 6028 llvm::Type *RegisterType = Int64Ty; 6029 if (IsPointerBuiltin) { 6030 ValueType = VoidPtrTy; 6031 } else if (Is64Bit) { 6032 ValueType = Int64Ty; 6033 } else { 6034 ValueType = Int32Ty; 6035 } 6036 6037 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 6038 } 6039 6040 // Find out if any arguments are required to be integer constant 6041 // expressions. 6042 unsigned ICEArguments = 0; 6043 ASTContext::GetBuiltinTypeError Error; 6044 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 6045 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 6046 6047 llvm::SmallVector<Value*, 4> Ops; 6048 for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; i++) { 6049 if ((ICEArguments & (1 << i)) == 0) { 6050 Ops.push_back(EmitScalarExpr(E->getArg(i))); 6051 } else { 6052 // If this is required to be a constant, constant fold it so that we know 6053 // that the generated intrinsic gets a ConstantInt. 6054 llvm::APSInt Result; 6055 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 6056 assert(IsConst && "Constant arg isn't actually constant?"); 6057 (void)IsConst; 6058 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 6059 } 6060 } 6061 6062 auto SISDMap = makeArrayRef(AArch64SISDIntrinsicMap); 6063 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 6064 SISDMap, BuiltinID, AArch64SISDIntrinsicsProvenSorted); 6065 6066 if (Builtin) { 6067 Ops.push_back(EmitScalarExpr(E->getArg(E->getNumArgs() - 1))); 6068 Value *Result = EmitCommonNeonSISDBuiltinExpr(*this, *Builtin, Ops, E); 6069 assert(Result && "SISD intrinsic should have been handled"); 6070 return Result; 6071 } 6072 6073 llvm::APSInt Result; 6074 const Expr *Arg = E->getArg(E->getNumArgs()-1); 6075 NeonTypeFlags Type(0); 6076 if (Arg->isIntegerConstantExpr(Result, getContext())) 6077 // Determine the type of this overloaded NEON intrinsic. 6078 Type = NeonTypeFlags(Result.getZExtValue()); 6079 6080 bool usgn = Type.isUnsigned(); 6081 bool quad = Type.isQuad(); 6082 6083 // Handle non-overloaded intrinsics first. 6084 switch (BuiltinID) { 6085 default: break; 6086 case NEON::BI__builtin_neon_vldrq_p128: { 6087 llvm::Type *Int128Ty = llvm::Type::getIntNTy(getLLVMContext(), 128); 6088 llvm::Type *Int128PTy = llvm::PointerType::get(Int128Ty, 0); 6089 Value *Ptr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PTy); 6090 return Builder.CreateAlignedLoad(Int128Ty, Ptr, 6091 CharUnits::fromQuantity(16)); 6092 } 6093 case NEON::BI__builtin_neon_vstrq_p128: { 6094 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 6095 Value *Ptr = Builder.CreateBitCast(Ops[0], Int128PTy); 6096 return Builder.CreateDefaultAlignedStore(EmitScalarExpr(E->getArg(1)), Ptr); 6097 } 6098 case NEON::BI__builtin_neon_vcvts_u32_f32: 6099 case NEON::BI__builtin_neon_vcvtd_u64_f64: 6100 usgn = true; 6101 LLVM_FALLTHROUGH; 6102 case NEON::BI__builtin_neon_vcvts_s32_f32: 6103 case NEON::BI__builtin_neon_vcvtd_s64_f64: { 6104 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6105 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 6106 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 6107 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 6108 Ops[0] = Builder.CreateBitCast(Ops[0], FTy); 6109 if (usgn) 6110 return Builder.CreateFPToUI(Ops[0], InTy); 6111 return Builder.CreateFPToSI(Ops[0], InTy); 6112 } 6113 case NEON::BI__builtin_neon_vcvts_f32_u32: 6114 case NEON::BI__builtin_neon_vcvtd_f64_u64: 6115 usgn = true; 6116 LLVM_FALLTHROUGH; 6117 case NEON::BI__builtin_neon_vcvts_f32_s32: 6118 case NEON::BI__builtin_neon_vcvtd_f64_s64: { 6119 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6120 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 6121 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 6122 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 6123 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 6124 if (usgn) 6125 return Builder.CreateUIToFP(Ops[0], FTy); 6126 return Builder.CreateSIToFP(Ops[0], FTy); 6127 } 6128 case NEON::BI__builtin_neon_vpaddd_s64: { 6129 llvm::Type *Ty = llvm::VectorType::get(Int64Ty, 2); 6130 Value *Vec = EmitScalarExpr(E->getArg(0)); 6131 // The vector is v2f64, so make sure it's bitcast to that. 6132 Vec = Builder.CreateBitCast(Vec, Ty, "v2i64"); 6133 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 6134 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 6135 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 6136 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 6137 // Pairwise addition of a v2f64 into a scalar f64. 6138 return Builder.CreateAdd(Op0, Op1, "vpaddd"); 6139 } 6140 case NEON::BI__builtin_neon_vpaddd_f64: { 6141 llvm::Type *Ty = 6142 llvm::VectorType::get(DoubleTy, 2); 6143 Value *Vec = EmitScalarExpr(E->getArg(0)); 6144 // The vector is v2f64, so make sure it's bitcast to that. 6145 Vec = Builder.CreateBitCast(Vec, Ty, "v2f64"); 6146 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 6147 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 6148 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 6149 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 6150 // Pairwise addition of a v2f64 into a scalar f64. 6151 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 6152 } 6153 case NEON::BI__builtin_neon_vpadds_f32: { 6154 llvm::Type *Ty = 6155 llvm::VectorType::get(FloatTy, 2); 6156 Value *Vec = EmitScalarExpr(E->getArg(0)); 6157 // The vector is v2f32, so make sure it's bitcast to that. 6158 Vec = Builder.CreateBitCast(Vec, Ty, "v2f32"); 6159 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 6160 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 6161 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 6162 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 6163 // Pairwise addition of a v2f32 into a scalar f32. 6164 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 6165 } 6166 case NEON::BI__builtin_neon_vceqzd_s64: 6167 case NEON::BI__builtin_neon_vceqzd_f64: 6168 case NEON::BI__builtin_neon_vceqzs_f32: 6169 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6170 return EmitAArch64CompareBuiltinExpr( 6171 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6172 ICmpInst::FCMP_OEQ, ICmpInst::ICMP_EQ, "vceqz"); 6173 case NEON::BI__builtin_neon_vcgezd_s64: 6174 case NEON::BI__builtin_neon_vcgezd_f64: 6175 case NEON::BI__builtin_neon_vcgezs_f32: 6176 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6177 return EmitAArch64CompareBuiltinExpr( 6178 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6179 ICmpInst::FCMP_OGE, ICmpInst::ICMP_SGE, "vcgez"); 6180 case NEON::BI__builtin_neon_vclezd_s64: 6181 case NEON::BI__builtin_neon_vclezd_f64: 6182 case NEON::BI__builtin_neon_vclezs_f32: 6183 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6184 return EmitAArch64CompareBuiltinExpr( 6185 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6186 ICmpInst::FCMP_OLE, ICmpInst::ICMP_SLE, "vclez"); 6187 case NEON::BI__builtin_neon_vcgtzd_s64: 6188 case NEON::BI__builtin_neon_vcgtzd_f64: 6189 case NEON::BI__builtin_neon_vcgtzs_f32: 6190 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6191 return EmitAArch64CompareBuiltinExpr( 6192 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6193 ICmpInst::FCMP_OGT, ICmpInst::ICMP_SGT, "vcgtz"); 6194 case NEON::BI__builtin_neon_vcltzd_s64: 6195 case NEON::BI__builtin_neon_vcltzd_f64: 6196 case NEON::BI__builtin_neon_vcltzs_f32: 6197 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6198 return EmitAArch64CompareBuiltinExpr( 6199 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6200 ICmpInst::FCMP_OLT, ICmpInst::ICMP_SLT, "vcltz"); 6201 6202 case NEON::BI__builtin_neon_vceqzd_u64: { 6203 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6204 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 6205 Ops[0] = 6206 Builder.CreateICmpEQ(Ops[0], llvm::Constant::getNullValue(Int64Ty)); 6207 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqzd"); 6208 } 6209 case NEON::BI__builtin_neon_vceqd_f64: 6210 case NEON::BI__builtin_neon_vcled_f64: 6211 case NEON::BI__builtin_neon_vcltd_f64: 6212 case NEON::BI__builtin_neon_vcged_f64: 6213 case NEON::BI__builtin_neon_vcgtd_f64: { 6214 llvm::CmpInst::Predicate P; 6215 switch (BuiltinID) { 6216 default: llvm_unreachable("missing builtin ID in switch!"); 6217 case NEON::BI__builtin_neon_vceqd_f64: P = llvm::FCmpInst::FCMP_OEQ; break; 6218 case NEON::BI__builtin_neon_vcled_f64: P = llvm::FCmpInst::FCMP_OLE; break; 6219 case NEON::BI__builtin_neon_vcltd_f64: P = llvm::FCmpInst::FCMP_OLT; break; 6220 case NEON::BI__builtin_neon_vcged_f64: P = llvm::FCmpInst::FCMP_OGE; break; 6221 case NEON::BI__builtin_neon_vcgtd_f64: P = llvm::FCmpInst::FCMP_OGT; break; 6222 } 6223 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6224 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 6225 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 6226 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 6227 return Builder.CreateSExt(Ops[0], Int64Ty, "vcmpd"); 6228 } 6229 case NEON::BI__builtin_neon_vceqs_f32: 6230 case NEON::BI__builtin_neon_vcles_f32: 6231 case NEON::BI__builtin_neon_vclts_f32: 6232 case NEON::BI__builtin_neon_vcges_f32: 6233 case NEON::BI__builtin_neon_vcgts_f32: { 6234 llvm::CmpInst::Predicate P; 6235 switch (BuiltinID) { 6236 default: llvm_unreachable("missing builtin ID in switch!"); 6237 case NEON::BI__builtin_neon_vceqs_f32: P = llvm::FCmpInst::FCMP_OEQ; break; 6238 case NEON::BI__builtin_neon_vcles_f32: P = llvm::FCmpInst::FCMP_OLE; break; 6239 case NEON::BI__builtin_neon_vclts_f32: P = llvm::FCmpInst::FCMP_OLT; break; 6240 case NEON::BI__builtin_neon_vcges_f32: P = llvm::FCmpInst::FCMP_OGE; break; 6241 case NEON::BI__builtin_neon_vcgts_f32: P = llvm::FCmpInst::FCMP_OGT; break; 6242 } 6243 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6244 Ops[0] = Builder.CreateBitCast(Ops[0], FloatTy); 6245 Ops[1] = Builder.CreateBitCast(Ops[1], FloatTy); 6246 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 6247 return Builder.CreateSExt(Ops[0], Int32Ty, "vcmpd"); 6248 } 6249 case NEON::BI__builtin_neon_vceqd_s64: 6250 case NEON::BI__builtin_neon_vceqd_u64: 6251 case NEON::BI__builtin_neon_vcgtd_s64: 6252 case NEON::BI__builtin_neon_vcgtd_u64: 6253 case NEON::BI__builtin_neon_vcltd_s64: 6254 case NEON::BI__builtin_neon_vcltd_u64: 6255 case NEON::BI__builtin_neon_vcged_u64: 6256 case NEON::BI__builtin_neon_vcged_s64: 6257 case NEON::BI__builtin_neon_vcled_u64: 6258 case NEON::BI__builtin_neon_vcled_s64: { 6259 llvm::CmpInst::Predicate P; 6260 switch (BuiltinID) { 6261 default: llvm_unreachable("missing builtin ID in switch!"); 6262 case NEON::BI__builtin_neon_vceqd_s64: 6263 case NEON::BI__builtin_neon_vceqd_u64:P = llvm::ICmpInst::ICMP_EQ;break; 6264 case NEON::BI__builtin_neon_vcgtd_s64:P = llvm::ICmpInst::ICMP_SGT;break; 6265 case NEON::BI__builtin_neon_vcgtd_u64:P = llvm::ICmpInst::ICMP_UGT;break; 6266 case NEON::BI__builtin_neon_vcltd_s64:P = llvm::ICmpInst::ICMP_SLT;break; 6267 case NEON::BI__builtin_neon_vcltd_u64:P = llvm::ICmpInst::ICMP_ULT;break; 6268 case NEON::BI__builtin_neon_vcged_u64:P = llvm::ICmpInst::ICMP_UGE;break; 6269 case NEON::BI__builtin_neon_vcged_s64:P = llvm::ICmpInst::ICMP_SGE;break; 6270 case NEON::BI__builtin_neon_vcled_u64:P = llvm::ICmpInst::ICMP_ULE;break; 6271 case NEON::BI__builtin_neon_vcled_s64:P = llvm::ICmpInst::ICMP_SLE;break; 6272 } 6273 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6274 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 6275 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 6276 Ops[0] = Builder.CreateICmp(P, Ops[0], Ops[1]); 6277 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqd"); 6278 } 6279 case NEON::BI__builtin_neon_vtstd_s64: 6280 case NEON::BI__builtin_neon_vtstd_u64: { 6281 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6282 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 6283 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 6284 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 6285 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 6286 llvm::Constant::getNullValue(Int64Ty)); 6287 return Builder.CreateSExt(Ops[0], Int64Ty, "vtstd"); 6288 } 6289 case NEON::BI__builtin_neon_vset_lane_i8: 6290 case NEON::BI__builtin_neon_vset_lane_i16: 6291 case NEON::BI__builtin_neon_vset_lane_i32: 6292 case NEON::BI__builtin_neon_vset_lane_i64: 6293 case NEON::BI__builtin_neon_vset_lane_f32: 6294 case NEON::BI__builtin_neon_vsetq_lane_i8: 6295 case NEON::BI__builtin_neon_vsetq_lane_i16: 6296 case NEON::BI__builtin_neon_vsetq_lane_i32: 6297 case NEON::BI__builtin_neon_vsetq_lane_i64: 6298 case NEON::BI__builtin_neon_vsetq_lane_f32: 6299 Ops.push_back(EmitScalarExpr(E->getArg(2))); 6300 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 6301 case NEON::BI__builtin_neon_vset_lane_f64: 6302 // The vector type needs a cast for the v1f64 variant. 6303 Ops[1] = Builder.CreateBitCast(Ops[1], 6304 llvm::VectorType::get(DoubleTy, 1)); 6305 Ops.push_back(EmitScalarExpr(E->getArg(2))); 6306 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 6307 case NEON::BI__builtin_neon_vsetq_lane_f64: 6308 // The vector type needs a cast for the v2f64 variant. 6309 Ops[1] = Builder.CreateBitCast(Ops[1], 6310 llvm::VectorType::get(DoubleTy, 2)); 6311 Ops.push_back(EmitScalarExpr(E->getArg(2))); 6312 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 6313 6314 case NEON::BI__builtin_neon_vget_lane_i8: 6315 case NEON::BI__builtin_neon_vdupb_lane_i8: 6316 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 8)); 6317 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6318 "vget_lane"); 6319 case NEON::BI__builtin_neon_vgetq_lane_i8: 6320 case NEON::BI__builtin_neon_vdupb_laneq_i8: 6321 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 16)); 6322 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6323 "vgetq_lane"); 6324 case NEON::BI__builtin_neon_vget_lane_i16: 6325 case NEON::BI__builtin_neon_vduph_lane_i16: 6326 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 4)); 6327 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6328 "vget_lane"); 6329 case NEON::BI__builtin_neon_vgetq_lane_i16: 6330 case NEON::BI__builtin_neon_vduph_laneq_i16: 6331 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 8)); 6332 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6333 "vgetq_lane"); 6334 case NEON::BI__builtin_neon_vget_lane_i32: 6335 case NEON::BI__builtin_neon_vdups_lane_i32: 6336 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 2)); 6337 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6338 "vget_lane"); 6339 case NEON::BI__builtin_neon_vdups_lane_f32: 6340 Ops[0] = Builder.CreateBitCast(Ops[0], 6341 llvm::VectorType::get(FloatTy, 2)); 6342 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6343 "vdups_lane"); 6344 case NEON::BI__builtin_neon_vgetq_lane_i32: 6345 case NEON::BI__builtin_neon_vdups_laneq_i32: 6346 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 6347 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6348 "vgetq_lane"); 6349 case NEON::BI__builtin_neon_vget_lane_i64: 6350 case NEON::BI__builtin_neon_vdupd_lane_i64: 6351 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 1)); 6352 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6353 "vget_lane"); 6354 case NEON::BI__builtin_neon_vdupd_lane_f64: 6355 Ops[0] = Builder.CreateBitCast(Ops[0], 6356 llvm::VectorType::get(DoubleTy, 1)); 6357 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6358 "vdupd_lane"); 6359 case NEON::BI__builtin_neon_vgetq_lane_i64: 6360 case NEON::BI__builtin_neon_vdupd_laneq_i64: 6361 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 6362 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6363 "vgetq_lane"); 6364 case NEON::BI__builtin_neon_vget_lane_f32: 6365 Ops[0] = Builder.CreateBitCast(Ops[0], 6366 llvm::VectorType::get(FloatTy, 2)); 6367 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6368 "vget_lane"); 6369 case NEON::BI__builtin_neon_vget_lane_f64: 6370 Ops[0] = Builder.CreateBitCast(Ops[0], 6371 llvm::VectorType::get(DoubleTy, 1)); 6372 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6373 "vget_lane"); 6374 case NEON::BI__builtin_neon_vgetq_lane_f32: 6375 case NEON::BI__builtin_neon_vdups_laneq_f32: 6376 Ops[0] = Builder.CreateBitCast(Ops[0], 6377 llvm::VectorType::get(FloatTy, 4)); 6378 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6379 "vgetq_lane"); 6380 case NEON::BI__builtin_neon_vgetq_lane_f64: 6381 case NEON::BI__builtin_neon_vdupd_laneq_f64: 6382 Ops[0] = Builder.CreateBitCast(Ops[0], 6383 llvm::VectorType::get(DoubleTy, 2)); 6384 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6385 "vgetq_lane"); 6386 case NEON::BI__builtin_neon_vaddd_s64: 6387 case NEON::BI__builtin_neon_vaddd_u64: 6388 return Builder.CreateAdd(Ops[0], EmitScalarExpr(E->getArg(1)), "vaddd"); 6389 case NEON::BI__builtin_neon_vsubd_s64: 6390 case NEON::BI__builtin_neon_vsubd_u64: 6391 return Builder.CreateSub(Ops[0], EmitScalarExpr(E->getArg(1)), "vsubd"); 6392 case NEON::BI__builtin_neon_vqdmlalh_s16: 6393 case NEON::BI__builtin_neon_vqdmlslh_s16: { 6394 SmallVector<Value *, 2> ProductOps; 6395 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 6396 ProductOps.push_back(vectorWrapScalar16(EmitScalarExpr(E->getArg(2)))); 6397 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 6398 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 6399 ProductOps, "vqdmlXl"); 6400 Constant *CI = ConstantInt::get(SizeTy, 0); 6401 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 6402 6403 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlalh_s16 6404 ? Intrinsic::aarch64_neon_sqadd 6405 : Intrinsic::aarch64_neon_sqsub; 6406 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int32Ty), Ops, "vqdmlXl"); 6407 } 6408 case NEON::BI__builtin_neon_vqshlud_n_s64: { 6409 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6410 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 6411 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqshlu, Int64Ty), 6412 Ops, "vqshlu_n"); 6413 } 6414 case NEON::BI__builtin_neon_vqshld_n_u64: 6415 case NEON::BI__builtin_neon_vqshld_n_s64: { 6416 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vqshld_n_u64 6417 ? Intrinsic::aarch64_neon_uqshl 6418 : Intrinsic::aarch64_neon_sqshl; 6419 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6420 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 6421 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vqshl_n"); 6422 } 6423 case NEON::BI__builtin_neon_vrshrd_n_u64: 6424 case NEON::BI__builtin_neon_vrshrd_n_s64: { 6425 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrshrd_n_u64 6426 ? Intrinsic::aarch64_neon_urshl 6427 : Intrinsic::aarch64_neon_srshl; 6428 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6429 int SV = cast<ConstantInt>(Ops[1])->getSExtValue(); 6430 Ops[1] = ConstantInt::get(Int64Ty, -SV); 6431 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vrshr_n"); 6432 } 6433 case NEON::BI__builtin_neon_vrsrad_n_u64: 6434 case NEON::BI__builtin_neon_vrsrad_n_s64: { 6435 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrsrad_n_u64 6436 ? Intrinsic::aarch64_neon_urshl 6437 : Intrinsic::aarch64_neon_srshl; 6438 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 6439 Ops.push_back(Builder.CreateNeg(EmitScalarExpr(E->getArg(2)))); 6440 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Int64Ty), 6441 {Ops[1], Builder.CreateSExt(Ops[2], Int64Ty)}); 6442 return Builder.CreateAdd(Ops[0], Builder.CreateBitCast(Ops[1], Int64Ty)); 6443 } 6444 case NEON::BI__builtin_neon_vshld_n_s64: 6445 case NEON::BI__builtin_neon_vshld_n_u64: { 6446 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 6447 return Builder.CreateShl( 6448 Ops[0], ConstantInt::get(Int64Ty, Amt->getZExtValue()), "shld_n"); 6449 } 6450 case NEON::BI__builtin_neon_vshrd_n_s64: { 6451 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 6452 return Builder.CreateAShr( 6453 Ops[0], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 6454 Amt->getZExtValue())), 6455 "shrd_n"); 6456 } 6457 case NEON::BI__builtin_neon_vshrd_n_u64: { 6458 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 6459 uint64_t ShiftAmt = Amt->getZExtValue(); 6460 // Right-shifting an unsigned value by its size yields 0. 6461 if (ShiftAmt == 64) 6462 return ConstantInt::get(Int64Ty, 0); 6463 return Builder.CreateLShr(Ops[0], ConstantInt::get(Int64Ty, ShiftAmt), 6464 "shrd_n"); 6465 } 6466 case NEON::BI__builtin_neon_vsrad_n_s64: { 6467 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 6468 Ops[1] = Builder.CreateAShr( 6469 Ops[1], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 6470 Amt->getZExtValue())), 6471 "shrd_n"); 6472 return Builder.CreateAdd(Ops[0], Ops[1]); 6473 } 6474 case NEON::BI__builtin_neon_vsrad_n_u64: { 6475 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 6476 uint64_t ShiftAmt = Amt->getZExtValue(); 6477 // Right-shifting an unsigned value by its size yields 0. 6478 // As Op + 0 = Op, return Ops[0] directly. 6479 if (ShiftAmt == 64) 6480 return Ops[0]; 6481 Ops[1] = Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, ShiftAmt), 6482 "shrd_n"); 6483 return Builder.CreateAdd(Ops[0], Ops[1]); 6484 } 6485 case NEON::BI__builtin_neon_vqdmlalh_lane_s16: 6486 case NEON::BI__builtin_neon_vqdmlalh_laneq_s16: 6487 case NEON::BI__builtin_neon_vqdmlslh_lane_s16: 6488 case NEON::BI__builtin_neon_vqdmlslh_laneq_s16: { 6489 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 6490 "lane"); 6491 SmallVector<Value *, 2> ProductOps; 6492 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 6493 ProductOps.push_back(vectorWrapScalar16(Ops[2])); 6494 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 6495 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 6496 ProductOps, "vqdmlXl"); 6497 Constant *CI = ConstantInt::get(SizeTy, 0); 6498 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 6499 Ops.pop_back(); 6500 6501 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlalh_lane_s16 || 6502 BuiltinID == NEON::BI__builtin_neon_vqdmlalh_laneq_s16) 6503 ? Intrinsic::aarch64_neon_sqadd 6504 : Intrinsic::aarch64_neon_sqsub; 6505 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int32Ty), Ops, "vqdmlXl"); 6506 } 6507 case NEON::BI__builtin_neon_vqdmlals_s32: 6508 case NEON::BI__builtin_neon_vqdmlsls_s32: { 6509 SmallVector<Value *, 2> ProductOps; 6510 ProductOps.push_back(Ops[1]); 6511 ProductOps.push_back(EmitScalarExpr(E->getArg(2))); 6512 Ops[1] = 6513 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 6514 ProductOps, "vqdmlXl"); 6515 6516 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlals_s32 6517 ? Intrinsic::aarch64_neon_sqadd 6518 : Intrinsic::aarch64_neon_sqsub; 6519 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int64Ty), Ops, "vqdmlXl"); 6520 } 6521 case NEON::BI__builtin_neon_vqdmlals_lane_s32: 6522 case NEON::BI__builtin_neon_vqdmlals_laneq_s32: 6523 case NEON::BI__builtin_neon_vqdmlsls_lane_s32: 6524 case NEON::BI__builtin_neon_vqdmlsls_laneq_s32: { 6525 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 6526 "lane"); 6527 SmallVector<Value *, 2> ProductOps; 6528 ProductOps.push_back(Ops[1]); 6529 ProductOps.push_back(Ops[2]); 6530 Ops[1] = 6531 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 6532 ProductOps, "vqdmlXl"); 6533 Ops.pop_back(); 6534 6535 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlals_lane_s32 || 6536 BuiltinID == NEON::BI__builtin_neon_vqdmlals_laneq_s32) 6537 ? Intrinsic::aarch64_neon_sqadd 6538 : Intrinsic::aarch64_neon_sqsub; 6539 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl"); 6540 } 6541 } 6542 6543 llvm::VectorType *VTy = GetNeonType(this, Type, Arch); 6544 llvm::Type *Ty = VTy; 6545 if (!Ty) 6546 return nullptr; 6547 6548 // Not all intrinsics handled by the common case work for AArch64 yet, so only 6549 // defer to common code if it's been added to our special map. 6550 Builtin = findNeonIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID, 6551 AArch64SIMDIntrinsicsProvenSorted); 6552 6553 if (Builtin) 6554 return EmitCommonNeonBuiltinExpr( 6555 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 6556 Builtin->NameHint, Builtin->TypeModifier, E, Ops, 6557 /*never use addresses*/ Address::invalid(), Address::invalid(), Arch); 6558 6559 if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops, Arch)) 6560 return V; 6561 6562 unsigned Int; 6563 switch (BuiltinID) { 6564 default: return nullptr; 6565 case NEON::BI__builtin_neon_vbsl_v: 6566 case NEON::BI__builtin_neon_vbslq_v: { 6567 llvm::Type *BitTy = llvm::VectorType::getInteger(VTy); 6568 Ops[0] = Builder.CreateBitCast(Ops[0], BitTy, "vbsl"); 6569 Ops[1] = Builder.CreateBitCast(Ops[1], BitTy, "vbsl"); 6570 Ops[2] = Builder.CreateBitCast(Ops[2], BitTy, "vbsl"); 6571 6572 Ops[1] = Builder.CreateAnd(Ops[0], Ops[1], "vbsl"); 6573 Ops[2] = Builder.CreateAnd(Builder.CreateNot(Ops[0]), Ops[2], "vbsl"); 6574 Ops[0] = Builder.CreateOr(Ops[1], Ops[2], "vbsl"); 6575 return Builder.CreateBitCast(Ops[0], Ty); 6576 } 6577 case NEON::BI__builtin_neon_vfma_lane_v: 6578 case NEON::BI__builtin_neon_vfmaq_lane_v: { // Only used for FP types 6579 // The ARM builtins (and instructions) have the addend as the first 6580 // operand, but the 'fma' intrinsics have it last. Swap it around here. 6581 Value *Addend = Ops[0]; 6582 Value *Multiplicand = Ops[1]; 6583 Value *LaneSource = Ops[2]; 6584 Ops[0] = Multiplicand; 6585 Ops[1] = LaneSource; 6586 Ops[2] = Addend; 6587 6588 // Now adjust things to handle the lane access. 6589 llvm::Type *SourceTy = BuiltinID == NEON::BI__builtin_neon_vfmaq_lane_v ? 6590 llvm::VectorType::get(VTy->getElementType(), VTy->getNumElements() / 2) : 6591 VTy; 6592 llvm::Constant *cst = cast<Constant>(Ops[3]); 6593 Value *SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), cst); 6594 Ops[1] = Builder.CreateBitCast(Ops[1], SourceTy); 6595 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV, "lane"); 6596 6597 Ops.pop_back(); 6598 Int = Intrinsic::fma; 6599 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmla"); 6600 } 6601 case NEON::BI__builtin_neon_vfma_laneq_v: { 6602 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 6603 // v1f64 fma should be mapped to Neon scalar f64 fma 6604 if (VTy && VTy->getElementType() == DoubleTy) { 6605 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 6606 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 6607 llvm::Type *VTy = GetNeonType(this, 6608 NeonTypeFlags(NeonTypeFlags::Float64, false, true), Arch); 6609 Ops[2] = Builder.CreateBitCast(Ops[2], VTy); 6610 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 6611 Value *F = CGM.getIntrinsic(Intrinsic::fma, DoubleTy); 6612 Value *Result = Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 6613 return Builder.CreateBitCast(Result, Ty); 6614 } 6615 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 6616 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6617 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6618 6619 llvm::Type *STy = llvm::VectorType::get(VTy->getElementType(), 6620 VTy->getNumElements() * 2); 6621 Ops[2] = Builder.CreateBitCast(Ops[2], STy); 6622 Value* SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), 6623 cast<ConstantInt>(Ops[3])); 6624 Ops[2] = Builder.CreateShuffleVector(Ops[2], Ops[2], SV, "lane"); 6625 6626 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 6627 } 6628 case NEON::BI__builtin_neon_vfmaq_laneq_v: { 6629 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 6630 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6631 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6632 6633 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6634 Ops[2] = EmitNeonSplat(Ops[2], cast<ConstantInt>(Ops[3])); 6635 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 6636 } 6637 case NEON::BI__builtin_neon_vfmah_lane_f16: 6638 case NEON::BI__builtin_neon_vfmas_lane_f32: 6639 case NEON::BI__builtin_neon_vfmah_laneq_f16: 6640 case NEON::BI__builtin_neon_vfmas_laneq_f32: 6641 case NEON::BI__builtin_neon_vfmad_lane_f64: 6642 case NEON::BI__builtin_neon_vfmad_laneq_f64: { 6643 Ops.push_back(EmitScalarExpr(E->getArg(3))); 6644 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 6645 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 6646 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 6647 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 6648 } 6649 case NEON::BI__builtin_neon_vmull_v: 6650 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6651 Int = usgn ? Intrinsic::aarch64_neon_umull : Intrinsic::aarch64_neon_smull; 6652 if (Type.isPoly()) Int = Intrinsic::aarch64_neon_pmull; 6653 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 6654 case NEON::BI__builtin_neon_vmax_v: 6655 case NEON::BI__builtin_neon_vmaxq_v: 6656 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6657 Int = usgn ? Intrinsic::aarch64_neon_umax : Intrinsic::aarch64_neon_smax; 6658 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmax; 6659 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmax"); 6660 case NEON::BI__builtin_neon_vmin_v: 6661 case NEON::BI__builtin_neon_vminq_v: 6662 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6663 Int = usgn ? Intrinsic::aarch64_neon_umin : Intrinsic::aarch64_neon_smin; 6664 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmin; 6665 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmin"); 6666 case NEON::BI__builtin_neon_vabd_v: 6667 case NEON::BI__builtin_neon_vabdq_v: 6668 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6669 Int = usgn ? Intrinsic::aarch64_neon_uabd : Intrinsic::aarch64_neon_sabd; 6670 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fabd; 6671 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vabd"); 6672 case NEON::BI__builtin_neon_vpadal_v: 6673 case NEON::BI__builtin_neon_vpadalq_v: { 6674 unsigned ArgElts = VTy->getNumElements(); 6675 llvm::IntegerType *EltTy = cast<IntegerType>(VTy->getElementType()); 6676 unsigned BitWidth = EltTy->getBitWidth(); 6677 llvm::Type *ArgTy = llvm::VectorType::get( 6678 llvm::IntegerType::get(getLLVMContext(), BitWidth/2), 2*ArgElts); 6679 llvm::Type* Tys[2] = { VTy, ArgTy }; 6680 Int = usgn ? Intrinsic::aarch64_neon_uaddlp : Intrinsic::aarch64_neon_saddlp; 6681 SmallVector<llvm::Value*, 1> TmpOps; 6682 TmpOps.push_back(Ops[1]); 6683 Function *F = CGM.getIntrinsic(Int, Tys); 6684 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vpadal"); 6685 llvm::Value *addend = Builder.CreateBitCast(Ops[0], tmp->getType()); 6686 return Builder.CreateAdd(tmp, addend); 6687 } 6688 case NEON::BI__builtin_neon_vpmin_v: 6689 case NEON::BI__builtin_neon_vpminq_v: 6690 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6691 Int = usgn ? Intrinsic::aarch64_neon_uminp : Intrinsic::aarch64_neon_sminp; 6692 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fminp; 6693 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmin"); 6694 case NEON::BI__builtin_neon_vpmax_v: 6695 case NEON::BI__builtin_neon_vpmaxq_v: 6696 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6697 Int = usgn ? Intrinsic::aarch64_neon_umaxp : Intrinsic::aarch64_neon_smaxp; 6698 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmaxp; 6699 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmax"); 6700 case NEON::BI__builtin_neon_vminnm_v: 6701 case NEON::BI__builtin_neon_vminnmq_v: 6702 Int = Intrinsic::aarch64_neon_fminnm; 6703 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vminnm"); 6704 case NEON::BI__builtin_neon_vmaxnm_v: 6705 case NEON::BI__builtin_neon_vmaxnmq_v: 6706 Int = Intrinsic::aarch64_neon_fmaxnm; 6707 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmaxnm"); 6708 case NEON::BI__builtin_neon_vrecpss_f32: { 6709 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6710 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, FloatTy), 6711 Ops, "vrecps"); 6712 } 6713 case NEON::BI__builtin_neon_vrecpsd_f64: { 6714 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6715 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, DoubleTy), 6716 Ops, "vrecps"); 6717 } 6718 case NEON::BI__builtin_neon_vqshrun_n_v: 6719 Int = Intrinsic::aarch64_neon_sqshrun; 6720 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrun_n"); 6721 case NEON::BI__builtin_neon_vqrshrun_n_v: 6722 Int = Intrinsic::aarch64_neon_sqrshrun; 6723 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrun_n"); 6724 case NEON::BI__builtin_neon_vqshrn_n_v: 6725 Int = usgn ? Intrinsic::aarch64_neon_uqshrn : Intrinsic::aarch64_neon_sqshrn; 6726 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n"); 6727 case NEON::BI__builtin_neon_vrshrn_n_v: 6728 Int = Intrinsic::aarch64_neon_rshrn; 6729 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshrn_n"); 6730 case NEON::BI__builtin_neon_vqrshrn_n_v: 6731 Int = usgn ? Intrinsic::aarch64_neon_uqrshrn : Intrinsic::aarch64_neon_sqrshrn; 6732 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n"); 6733 case NEON::BI__builtin_neon_vrnda_v: 6734 case NEON::BI__builtin_neon_vrndaq_v: { 6735 Int = Intrinsic::round; 6736 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrnda"); 6737 } 6738 case NEON::BI__builtin_neon_vrndi_v: 6739 case NEON::BI__builtin_neon_vrndiq_v: { 6740 Int = Intrinsic::nearbyint; 6741 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndi"); 6742 } 6743 case NEON::BI__builtin_neon_vrndm_v: 6744 case NEON::BI__builtin_neon_vrndmq_v: { 6745 Int = Intrinsic::floor; 6746 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndm"); 6747 } 6748 case NEON::BI__builtin_neon_vrndn_v: 6749 case NEON::BI__builtin_neon_vrndnq_v: { 6750 Int = Intrinsic::aarch64_neon_frintn; 6751 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndn"); 6752 } 6753 case NEON::BI__builtin_neon_vrndp_v: 6754 case NEON::BI__builtin_neon_vrndpq_v: { 6755 Int = Intrinsic::ceil; 6756 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndp"); 6757 } 6758 case NEON::BI__builtin_neon_vrndx_v: 6759 case NEON::BI__builtin_neon_vrndxq_v: { 6760 Int = Intrinsic::rint; 6761 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndx"); 6762 } 6763 case NEON::BI__builtin_neon_vrnd_v: 6764 case NEON::BI__builtin_neon_vrndq_v: { 6765 Int = Intrinsic::trunc; 6766 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndz"); 6767 } 6768 case NEON::BI__builtin_neon_vceqz_v: 6769 case NEON::BI__builtin_neon_vceqzq_v: 6770 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OEQ, 6771 ICmpInst::ICMP_EQ, "vceqz"); 6772 case NEON::BI__builtin_neon_vcgez_v: 6773 case NEON::BI__builtin_neon_vcgezq_v: 6774 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGE, 6775 ICmpInst::ICMP_SGE, "vcgez"); 6776 case NEON::BI__builtin_neon_vclez_v: 6777 case NEON::BI__builtin_neon_vclezq_v: 6778 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLE, 6779 ICmpInst::ICMP_SLE, "vclez"); 6780 case NEON::BI__builtin_neon_vcgtz_v: 6781 case NEON::BI__builtin_neon_vcgtzq_v: 6782 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGT, 6783 ICmpInst::ICMP_SGT, "vcgtz"); 6784 case NEON::BI__builtin_neon_vcltz_v: 6785 case NEON::BI__builtin_neon_vcltzq_v: 6786 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLT, 6787 ICmpInst::ICMP_SLT, "vcltz"); 6788 case NEON::BI__builtin_neon_vcvt_f64_v: 6789 case NEON::BI__builtin_neon_vcvtq_f64_v: 6790 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6791 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad), Arch); 6792 return usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 6793 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 6794 case NEON::BI__builtin_neon_vcvt_f64_f32: { 6795 assert(Type.getEltType() == NeonTypeFlags::Float64 && quad && 6796 "unexpected vcvt_f64_f32 builtin"); 6797 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float32, false, false); 6798 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag, Arch)); 6799 6800 return Builder.CreateFPExt(Ops[0], Ty, "vcvt"); 6801 } 6802 case NEON::BI__builtin_neon_vcvt_f32_f64: { 6803 assert(Type.getEltType() == NeonTypeFlags::Float32 && 6804 "unexpected vcvt_f32_f64 builtin"); 6805 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float64, false, true); 6806 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag, Arch)); 6807 6808 return Builder.CreateFPTrunc(Ops[0], Ty, "vcvt"); 6809 } 6810 case NEON::BI__builtin_neon_vcvt_s32_v: 6811 case NEON::BI__builtin_neon_vcvt_u32_v: 6812 case NEON::BI__builtin_neon_vcvt_s64_v: 6813 case NEON::BI__builtin_neon_vcvt_u64_v: 6814 case NEON::BI__builtin_neon_vcvt_s16_v: 6815 case NEON::BI__builtin_neon_vcvt_u16_v: 6816 case NEON::BI__builtin_neon_vcvtq_s32_v: 6817 case NEON::BI__builtin_neon_vcvtq_u32_v: 6818 case NEON::BI__builtin_neon_vcvtq_s64_v: 6819 case NEON::BI__builtin_neon_vcvtq_u64_v: 6820 case NEON::BI__builtin_neon_vcvtq_s16_v: 6821 case NEON::BI__builtin_neon_vcvtq_u16_v: { 6822 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 6823 if (usgn) 6824 return Builder.CreateFPToUI(Ops[0], Ty); 6825 return Builder.CreateFPToSI(Ops[0], Ty); 6826 } 6827 case NEON::BI__builtin_neon_vcvta_s16_v: 6828 case NEON::BI__builtin_neon_vcvta_s32_v: 6829 case NEON::BI__builtin_neon_vcvtaq_s16_v: 6830 case NEON::BI__builtin_neon_vcvtaq_s32_v: 6831 case NEON::BI__builtin_neon_vcvta_u32_v: 6832 case NEON::BI__builtin_neon_vcvtaq_u16_v: 6833 case NEON::BI__builtin_neon_vcvtaq_u32_v: 6834 case NEON::BI__builtin_neon_vcvta_s64_v: 6835 case NEON::BI__builtin_neon_vcvtaq_s64_v: 6836 case NEON::BI__builtin_neon_vcvta_u64_v: 6837 case NEON::BI__builtin_neon_vcvtaq_u64_v: { 6838 Int = usgn ? Intrinsic::aarch64_neon_fcvtau : Intrinsic::aarch64_neon_fcvtas; 6839 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6840 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvta"); 6841 } 6842 case NEON::BI__builtin_neon_vcvtm_s16_v: 6843 case NEON::BI__builtin_neon_vcvtm_s32_v: 6844 case NEON::BI__builtin_neon_vcvtmq_s16_v: 6845 case NEON::BI__builtin_neon_vcvtmq_s32_v: 6846 case NEON::BI__builtin_neon_vcvtm_u16_v: 6847 case NEON::BI__builtin_neon_vcvtm_u32_v: 6848 case NEON::BI__builtin_neon_vcvtmq_u16_v: 6849 case NEON::BI__builtin_neon_vcvtmq_u32_v: 6850 case NEON::BI__builtin_neon_vcvtm_s64_v: 6851 case NEON::BI__builtin_neon_vcvtmq_s64_v: 6852 case NEON::BI__builtin_neon_vcvtm_u64_v: 6853 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 6854 Int = usgn ? Intrinsic::aarch64_neon_fcvtmu : Intrinsic::aarch64_neon_fcvtms; 6855 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6856 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtm"); 6857 } 6858 case NEON::BI__builtin_neon_vcvtn_s16_v: 6859 case NEON::BI__builtin_neon_vcvtn_s32_v: 6860 case NEON::BI__builtin_neon_vcvtnq_s16_v: 6861 case NEON::BI__builtin_neon_vcvtnq_s32_v: 6862 case NEON::BI__builtin_neon_vcvtn_u16_v: 6863 case NEON::BI__builtin_neon_vcvtn_u32_v: 6864 case NEON::BI__builtin_neon_vcvtnq_u16_v: 6865 case NEON::BI__builtin_neon_vcvtnq_u32_v: 6866 case NEON::BI__builtin_neon_vcvtn_s64_v: 6867 case NEON::BI__builtin_neon_vcvtnq_s64_v: 6868 case NEON::BI__builtin_neon_vcvtn_u64_v: 6869 case NEON::BI__builtin_neon_vcvtnq_u64_v: { 6870 Int = usgn ? Intrinsic::aarch64_neon_fcvtnu : Intrinsic::aarch64_neon_fcvtns; 6871 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6872 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtn"); 6873 } 6874 case NEON::BI__builtin_neon_vcvtp_s16_v: 6875 case NEON::BI__builtin_neon_vcvtp_s32_v: 6876 case NEON::BI__builtin_neon_vcvtpq_s16_v: 6877 case NEON::BI__builtin_neon_vcvtpq_s32_v: 6878 case NEON::BI__builtin_neon_vcvtp_u16_v: 6879 case NEON::BI__builtin_neon_vcvtp_u32_v: 6880 case NEON::BI__builtin_neon_vcvtpq_u16_v: 6881 case NEON::BI__builtin_neon_vcvtpq_u32_v: 6882 case NEON::BI__builtin_neon_vcvtp_s64_v: 6883 case NEON::BI__builtin_neon_vcvtpq_s64_v: 6884 case NEON::BI__builtin_neon_vcvtp_u64_v: 6885 case NEON::BI__builtin_neon_vcvtpq_u64_v: { 6886 Int = usgn ? Intrinsic::aarch64_neon_fcvtpu : Intrinsic::aarch64_neon_fcvtps; 6887 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6888 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtp"); 6889 } 6890 case NEON::BI__builtin_neon_vmulx_v: 6891 case NEON::BI__builtin_neon_vmulxq_v: { 6892 Int = Intrinsic::aarch64_neon_fmulx; 6893 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmulx"); 6894 } 6895 case NEON::BI__builtin_neon_vmul_lane_v: 6896 case NEON::BI__builtin_neon_vmul_laneq_v: { 6897 // v1f64 vmul_lane should be mapped to Neon scalar mul lane 6898 bool Quad = false; 6899 if (BuiltinID == NEON::BI__builtin_neon_vmul_laneq_v) 6900 Quad = true; 6901 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 6902 llvm::Type *VTy = GetNeonType(this, 6903 NeonTypeFlags(NeonTypeFlags::Float64, false, Quad), Arch); 6904 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 6905 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 6906 Value *Result = Builder.CreateFMul(Ops[0], Ops[1]); 6907 return Builder.CreateBitCast(Result, Ty); 6908 } 6909 case NEON::BI__builtin_neon_vnegd_s64: 6910 return Builder.CreateNeg(EmitScalarExpr(E->getArg(0)), "vnegd"); 6911 case NEON::BI__builtin_neon_vpmaxnm_v: 6912 case NEON::BI__builtin_neon_vpmaxnmq_v: { 6913 Int = Intrinsic::aarch64_neon_fmaxnmp; 6914 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmaxnm"); 6915 } 6916 case NEON::BI__builtin_neon_vpminnm_v: 6917 case NEON::BI__builtin_neon_vpminnmq_v: { 6918 Int = Intrinsic::aarch64_neon_fminnmp; 6919 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpminnm"); 6920 } 6921 case NEON::BI__builtin_neon_vsqrt_v: 6922 case NEON::BI__builtin_neon_vsqrtq_v: { 6923 Int = Intrinsic::sqrt; 6924 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6925 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqrt"); 6926 } 6927 case NEON::BI__builtin_neon_vrbit_v: 6928 case NEON::BI__builtin_neon_vrbitq_v: { 6929 Int = Intrinsic::aarch64_neon_rbit; 6930 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrbit"); 6931 } 6932 case NEON::BI__builtin_neon_vaddv_u8: 6933 // FIXME: These are handled by the AArch64 scalar code. 6934 usgn = true; 6935 LLVM_FALLTHROUGH; 6936 case NEON::BI__builtin_neon_vaddv_s8: { 6937 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6938 Ty = Int32Ty; 6939 VTy = llvm::VectorType::get(Int8Ty, 8); 6940 llvm::Type *Tys[2] = { Ty, VTy }; 6941 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6942 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6943 return Builder.CreateTrunc(Ops[0], Int8Ty); 6944 } 6945 case NEON::BI__builtin_neon_vaddv_u16: 6946 usgn = true; 6947 LLVM_FALLTHROUGH; 6948 case NEON::BI__builtin_neon_vaddv_s16: { 6949 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6950 Ty = Int32Ty; 6951 VTy = llvm::VectorType::get(Int16Ty, 4); 6952 llvm::Type *Tys[2] = { Ty, VTy }; 6953 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6954 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6955 return Builder.CreateTrunc(Ops[0], Int16Ty); 6956 } 6957 case NEON::BI__builtin_neon_vaddvq_u8: 6958 usgn = true; 6959 LLVM_FALLTHROUGH; 6960 case NEON::BI__builtin_neon_vaddvq_s8: { 6961 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6962 Ty = Int32Ty; 6963 VTy = llvm::VectorType::get(Int8Ty, 16); 6964 llvm::Type *Tys[2] = { Ty, VTy }; 6965 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6966 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6967 return Builder.CreateTrunc(Ops[0], Int8Ty); 6968 } 6969 case NEON::BI__builtin_neon_vaddvq_u16: 6970 usgn = true; 6971 LLVM_FALLTHROUGH; 6972 case NEON::BI__builtin_neon_vaddvq_s16: { 6973 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6974 Ty = Int32Ty; 6975 VTy = llvm::VectorType::get(Int16Ty, 8); 6976 llvm::Type *Tys[2] = { Ty, VTy }; 6977 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6978 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6979 return Builder.CreateTrunc(Ops[0], Int16Ty); 6980 } 6981 case NEON::BI__builtin_neon_vmaxv_u8: { 6982 Int = Intrinsic::aarch64_neon_umaxv; 6983 Ty = Int32Ty; 6984 VTy = llvm::VectorType::get(Int8Ty, 8); 6985 llvm::Type *Tys[2] = { Ty, VTy }; 6986 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6987 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6988 return Builder.CreateTrunc(Ops[0], Int8Ty); 6989 } 6990 case NEON::BI__builtin_neon_vmaxv_u16: { 6991 Int = Intrinsic::aarch64_neon_umaxv; 6992 Ty = Int32Ty; 6993 VTy = llvm::VectorType::get(Int16Ty, 4); 6994 llvm::Type *Tys[2] = { Ty, VTy }; 6995 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6996 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6997 return Builder.CreateTrunc(Ops[0], Int16Ty); 6998 } 6999 case NEON::BI__builtin_neon_vmaxvq_u8: { 7000 Int = Intrinsic::aarch64_neon_umaxv; 7001 Ty = Int32Ty; 7002 VTy = llvm::VectorType::get(Int8Ty, 16); 7003 llvm::Type *Tys[2] = { Ty, VTy }; 7004 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7005 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7006 return Builder.CreateTrunc(Ops[0], Int8Ty); 7007 } 7008 case NEON::BI__builtin_neon_vmaxvq_u16: { 7009 Int = Intrinsic::aarch64_neon_umaxv; 7010 Ty = Int32Ty; 7011 VTy = llvm::VectorType::get(Int16Ty, 8); 7012 llvm::Type *Tys[2] = { Ty, VTy }; 7013 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7014 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7015 return Builder.CreateTrunc(Ops[0], Int16Ty); 7016 } 7017 case NEON::BI__builtin_neon_vmaxv_s8: { 7018 Int = Intrinsic::aarch64_neon_smaxv; 7019 Ty = Int32Ty; 7020 VTy = llvm::VectorType::get(Int8Ty, 8); 7021 llvm::Type *Tys[2] = { Ty, VTy }; 7022 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7023 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7024 return Builder.CreateTrunc(Ops[0], Int8Ty); 7025 } 7026 case NEON::BI__builtin_neon_vmaxv_s16: { 7027 Int = Intrinsic::aarch64_neon_smaxv; 7028 Ty = Int32Ty; 7029 VTy = llvm::VectorType::get(Int16Ty, 4); 7030 llvm::Type *Tys[2] = { Ty, VTy }; 7031 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7032 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7033 return Builder.CreateTrunc(Ops[0], Int16Ty); 7034 } 7035 case NEON::BI__builtin_neon_vmaxvq_s8: { 7036 Int = Intrinsic::aarch64_neon_smaxv; 7037 Ty = Int32Ty; 7038 VTy = llvm::VectorType::get(Int8Ty, 16); 7039 llvm::Type *Tys[2] = { Ty, VTy }; 7040 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7041 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7042 return Builder.CreateTrunc(Ops[0], Int8Ty); 7043 } 7044 case NEON::BI__builtin_neon_vmaxvq_s16: { 7045 Int = Intrinsic::aarch64_neon_smaxv; 7046 Ty = Int32Ty; 7047 VTy = llvm::VectorType::get(Int16Ty, 8); 7048 llvm::Type *Tys[2] = { Ty, VTy }; 7049 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7050 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7051 return Builder.CreateTrunc(Ops[0], Int16Ty); 7052 } 7053 case NEON::BI__builtin_neon_vmaxv_f16: { 7054 Int = Intrinsic::aarch64_neon_fmaxv; 7055 Ty = HalfTy; 7056 VTy = llvm::VectorType::get(HalfTy, 4); 7057 llvm::Type *Tys[2] = { Ty, VTy }; 7058 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7059 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7060 return Builder.CreateTrunc(Ops[0], HalfTy); 7061 } 7062 case NEON::BI__builtin_neon_vmaxvq_f16: { 7063 Int = Intrinsic::aarch64_neon_fmaxv; 7064 Ty = HalfTy; 7065 VTy = llvm::VectorType::get(HalfTy, 8); 7066 llvm::Type *Tys[2] = { Ty, VTy }; 7067 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7068 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7069 return Builder.CreateTrunc(Ops[0], HalfTy); 7070 } 7071 case NEON::BI__builtin_neon_vminv_u8: { 7072 Int = Intrinsic::aarch64_neon_uminv; 7073 Ty = Int32Ty; 7074 VTy = llvm::VectorType::get(Int8Ty, 8); 7075 llvm::Type *Tys[2] = { Ty, VTy }; 7076 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7077 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7078 return Builder.CreateTrunc(Ops[0], Int8Ty); 7079 } 7080 case NEON::BI__builtin_neon_vminv_u16: { 7081 Int = Intrinsic::aarch64_neon_uminv; 7082 Ty = Int32Ty; 7083 VTy = llvm::VectorType::get(Int16Ty, 4); 7084 llvm::Type *Tys[2] = { Ty, VTy }; 7085 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7086 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7087 return Builder.CreateTrunc(Ops[0], Int16Ty); 7088 } 7089 case NEON::BI__builtin_neon_vminvq_u8: { 7090 Int = Intrinsic::aarch64_neon_uminv; 7091 Ty = Int32Ty; 7092 VTy = llvm::VectorType::get(Int8Ty, 16); 7093 llvm::Type *Tys[2] = { Ty, VTy }; 7094 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7095 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7096 return Builder.CreateTrunc(Ops[0], Int8Ty); 7097 } 7098 case NEON::BI__builtin_neon_vminvq_u16: { 7099 Int = Intrinsic::aarch64_neon_uminv; 7100 Ty = Int32Ty; 7101 VTy = llvm::VectorType::get(Int16Ty, 8); 7102 llvm::Type *Tys[2] = { Ty, VTy }; 7103 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7104 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7105 return Builder.CreateTrunc(Ops[0], Int16Ty); 7106 } 7107 case NEON::BI__builtin_neon_vminv_s8: { 7108 Int = Intrinsic::aarch64_neon_sminv; 7109 Ty = Int32Ty; 7110 VTy = llvm::VectorType::get(Int8Ty, 8); 7111 llvm::Type *Tys[2] = { Ty, VTy }; 7112 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7113 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7114 return Builder.CreateTrunc(Ops[0], Int8Ty); 7115 } 7116 case NEON::BI__builtin_neon_vminv_s16: { 7117 Int = Intrinsic::aarch64_neon_sminv; 7118 Ty = Int32Ty; 7119 VTy = llvm::VectorType::get(Int16Ty, 4); 7120 llvm::Type *Tys[2] = { Ty, VTy }; 7121 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7122 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7123 return Builder.CreateTrunc(Ops[0], Int16Ty); 7124 } 7125 case NEON::BI__builtin_neon_vminvq_s8: { 7126 Int = Intrinsic::aarch64_neon_sminv; 7127 Ty = Int32Ty; 7128 VTy = llvm::VectorType::get(Int8Ty, 16); 7129 llvm::Type *Tys[2] = { Ty, VTy }; 7130 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7131 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7132 return Builder.CreateTrunc(Ops[0], Int8Ty); 7133 } 7134 case NEON::BI__builtin_neon_vminvq_s16: { 7135 Int = Intrinsic::aarch64_neon_sminv; 7136 Ty = Int32Ty; 7137 VTy = llvm::VectorType::get(Int16Ty, 8); 7138 llvm::Type *Tys[2] = { Ty, VTy }; 7139 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7140 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7141 return Builder.CreateTrunc(Ops[0], Int16Ty); 7142 } 7143 case NEON::BI__builtin_neon_vminv_f16: { 7144 Int = Intrinsic::aarch64_neon_fminv; 7145 Ty = HalfTy; 7146 VTy = llvm::VectorType::get(HalfTy, 4); 7147 llvm::Type *Tys[2] = { Ty, VTy }; 7148 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7149 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7150 return Builder.CreateTrunc(Ops[0], HalfTy); 7151 } 7152 case NEON::BI__builtin_neon_vminvq_f16: { 7153 Int = Intrinsic::aarch64_neon_fminv; 7154 Ty = HalfTy; 7155 VTy = llvm::VectorType::get(HalfTy, 8); 7156 llvm::Type *Tys[2] = { Ty, VTy }; 7157 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7158 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7159 return Builder.CreateTrunc(Ops[0], HalfTy); 7160 } 7161 case NEON::BI__builtin_neon_vmaxnmv_f16: { 7162 Int = Intrinsic::aarch64_neon_fmaxnmv; 7163 Ty = HalfTy; 7164 VTy = llvm::VectorType::get(HalfTy, 4); 7165 llvm::Type *Tys[2] = { Ty, VTy }; 7166 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7167 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxnmv"); 7168 return Builder.CreateTrunc(Ops[0], HalfTy); 7169 } 7170 case NEON::BI__builtin_neon_vmaxnmvq_f16: { 7171 Int = Intrinsic::aarch64_neon_fmaxnmv; 7172 Ty = HalfTy; 7173 VTy = llvm::VectorType::get(HalfTy, 8); 7174 llvm::Type *Tys[2] = { Ty, VTy }; 7175 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7176 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxnmv"); 7177 return Builder.CreateTrunc(Ops[0], HalfTy); 7178 } 7179 case NEON::BI__builtin_neon_vminnmv_f16: { 7180 Int = Intrinsic::aarch64_neon_fminnmv; 7181 Ty = HalfTy; 7182 VTy = llvm::VectorType::get(HalfTy, 4); 7183 llvm::Type *Tys[2] = { Ty, VTy }; 7184 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7185 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminnmv"); 7186 return Builder.CreateTrunc(Ops[0], HalfTy); 7187 } 7188 case NEON::BI__builtin_neon_vminnmvq_f16: { 7189 Int = Intrinsic::aarch64_neon_fminnmv; 7190 Ty = HalfTy; 7191 VTy = llvm::VectorType::get(HalfTy, 8); 7192 llvm::Type *Tys[2] = { Ty, VTy }; 7193 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7194 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminnmv"); 7195 return Builder.CreateTrunc(Ops[0], HalfTy); 7196 } 7197 case NEON::BI__builtin_neon_vmul_n_f64: { 7198 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 7199 Value *RHS = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), DoubleTy); 7200 return Builder.CreateFMul(Ops[0], RHS); 7201 } 7202 case NEON::BI__builtin_neon_vaddlv_u8: { 7203 Int = Intrinsic::aarch64_neon_uaddlv; 7204 Ty = Int32Ty; 7205 VTy = llvm::VectorType::get(Int8Ty, 8); 7206 llvm::Type *Tys[2] = { Ty, VTy }; 7207 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7208 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7209 return Builder.CreateTrunc(Ops[0], Int16Ty); 7210 } 7211 case NEON::BI__builtin_neon_vaddlv_u16: { 7212 Int = Intrinsic::aarch64_neon_uaddlv; 7213 Ty = Int32Ty; 7214 VTy = llvm::VectorType::get(Int16Ty, 4); 7215 llvm::Type *Tys[2] = { Ty, VTy }; 7216 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7217 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7218 } 7219 case NEON::BI__builtin_neon_vaddlvq_u8: { 7220 Int = Intrinsic::aarch64_neon_uaddlv; 7221 Ty = Int32Ty; 7222 VTy = llvm::VectorType::get(Int8Ty, 16); 7223 llvm::Type *Tys[2] = { Ty, VTy }; 7224 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7225 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7226 return Builder.CreateTrunc(Ops[0], Int16Ty); 7227 } 7228 case NEON::BI__builtin_neon_vaddlvq_u16: { 7229 Int = Intrinsic::aarch64_neon_uaddlv; 7230 Ty = Int32Ty; 7231 VTy = llvm::VectorType::get(Int16Ty, 8); 7232 llvm::Type *Tys[2] = { Ty, VTy }; 7233 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7234 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7235 } 7236 case NEON::BI__builtin_neon_vaddlv_s8: { 7237 Int = Intrinsic::aarch64_neon_saddlv; 7238 Ty = Int32Ty; 7239 VTy = llvm::VectorType::get(Int8Ty, 8); 7240 llvm::Type *Tys[2] = { Ty, VTy }; 7241 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7242 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7243 return Builder.CreateTrunc(Ops[0], Int16Ty); 7244 } 7245 case NEON::BI__builtin_neon_vaddlv_s16: { 7246 Int = Intrinsic::aarch64_neon_saddlv; 7247 Ty = Int32Ty; 7248 VTy = llvm::VectorType::get(Int16Ty, 4); 7249 llvm::Type *Tys[2] = { Ty, VTy }; 7250 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7251 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7252 } 7253 case NEON::BI__builtin_neon_vaddlvq_s8: { 7254 Int = Intrinsic::aarch64_neon_saddlv; 7255 Ty = Int32Ty; 7256 VTy = llvm::VectorType::get(Int8Ty, 16); 7257 llvm::Type *Tys[2] = { Ty, VTy }; 7258 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7259 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7260 return Builder.CreateTrunc(Ops[0], Int16Ty); 7261 } 7262 case NEON::BI__builtin_neon_vaddlvq_s16: { 7263 Int = Intrinsic::aarch64_neon_saddlv; 7264 Ty = Int32Ty; 7265 VTy = llvm::VectorType::get(Int16Ty, 8); 7266 llvm::Type *Tys[2] = { Ty, VTy }; 7267 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7268 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7269 } 7270 case NEON::BI__builtin_neon_vsri_n_v: 7271 case NEON::BI__builtin_neon_vsriq_n_v: { 7272 Int = Intrinsic::aarch64_neon_vsri; 7273 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 7274 return EmitNeonCall(Intrin, Ops, "vsri_n"); 7275 } 7276 case NEON::BI__builtin_neon_vsli_n_v: 7277 case NEON::BI__builtin_neon_vsliq_n_v: { 7278 Int = Intrinsic::aarch64_neon_vsli; 7279 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 7280 return EmitNeonCall(Intrin, Ops, "vsli_n"); 7281 } 7282 case NEON::BI__builtin_neon_vsra_n_v: 7283 case NEON::BI__builtin_neon_vsraq_n_v: 7284 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7285 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 7286 return Builder.CreateAdd(Ops[0], Ops[1]); 7287 case NEON::BI__builtin_neon_vrsra_n_v: 7288 case NEON::BI__builtin_neon_vrsraq_n_v: { 7289 Int = usgn ? Intrinsic::aarch64_neon_urshl : Intrinsic::aarch64_neon_srshl; 7290 SmallVector<llvm::Value*,2> TmpOps; 7291 TmpOps.push_back(Ops[1]); 7292 TmpOps.push_back(Ops[2]); 7293 Function* F = CGM.getIntrinsic(Int, Ty); 7294 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vrshr_n", 1, true); 7295 Ops[0] = Builder.CreateBitCast(Ops[0], VTy); 7296 return Builder.CreateAdd(Ops[0], tmp); 7297 } 7298 // FIXME: Sharing loads & stores with 32-bit is complicated by the absence 7299 // of an Align parameter here. 7300 case NEON::BI__builtin_neon_vld1_x2_v: 7301 case NEON::BI__builtin_neon_vld1q_x2_v: 7302 case NEON::BI__builtin_neon_vld1_x3_v: 7303 case NEON::BI__builtin_neon_vld1q_x3_v: 7304 case NEON::BI__builtin_neon_vld1_x4_v: 7305 case NEON::BI__builtin_neon_vld1q_x4_v: { 7306 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 7307 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7308 llvm::Type *Tys[2] = { VTy, PTy }; 7309 unsigned Int; 7310 switch (BuiltinID) { 7311 case NEON::BI__builtin_neon_vld1_x2_v: 7312 case NEON::BI__builtin_neon_vld1q_x2_v: 7313 Int = Intrinsic::aarch64_neon_ld1x2; 7314 break; 7315 case NEON::BI__builtin_neon_vld1_x3_v: 7316 case NEON::BI__builtin_neon_vld1q_x3_v: 7317 Int = Intrinsic::aarch64_neon_ld1x3; 7318 break; 7319 case NEON::BI__builtin_neon_vld1_x4_v: 7320 case NEON::BI__builtin_neon_vld1q_x4_v: 7321 Int = Intrinsic::aarch64_neon_ld1x4; 7322 break; 7323 } 7324 Function *F = CGM.getIntrinsic(Int, Tys); 7325 Ops[1] = Builder.CreateCall(F, Ops[1], "vld1xN"); 7326 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 7327 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7328 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7329 } 7330 case NEON::BI__builtin_neon_vst1_x2_v: 7331 case NEON::BI__builtin_neon_vst1q_x2_v: 7332 case NEON::BI__builtin_neon_vst1_x3_v: 7333 case NEON::BI__builtin_neon_vst1q_x3_v: 7334 case NEON::BI__builtin_neon_vst1_x4_v: 7335 case NEON::BI__builtin_neon_vst1q_x4_v: { 7336 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 7337 llvm::Type *Tys[2] = { VTy, PTy }; 7338 unsigned Int; 7339 switch (BuiltinID) { 7340 case NEON::BI__builtin_neon_vst1_x2_v: 7341 case NEON::BI__builtin_neon_vst1q_x2_v: 7342 Int = Intrinsic::aarch64_neon_st1x2; 7343 break; 7344 case NEON::BI__builtin_neon_vst1_x3_v: 7345 case NEON::BI__builtin_neon_vst1q_x3_v: 7346 Int = Intrinsic::aarch64_neon_st1x3; 7347 break; 7348 case NEON::BI__builtin_neon_vst1_x4_v: 7349 case NEON::BI__builtin_neon_vst1q_x4_v: 7350 Int = Intrinsic::aarch64_neon_st1x4; 7351 break; 7352 } 7353 std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end()); 7354 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 7355 } 7356 case NEON::BI__builtin_neon_vld1_v: 7357 case NEON::BI__builtin_neon_vld1q_v: { 7358 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 7359 auto Alignment = CharUnits::fromQuantity( 7360 BuiltinID == NEON::BI__builtin_neon_vld1_v ? 8 : 16); 7361 return Builder.CreateAlignedLoad(VTy, Ops[0], Alignment); 7362 } 7363 case NEON::BI__builtin_neon_vst1_v: 7364 case NEON::BI__builtin_neon_vst1q_v: 7365 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 7366 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 7367 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7368 case NEON::BI__builtin_neon_vld1_lane_v: 7369 case NEON::BI__builtin_neon_vld1q_lane_v: { 7370 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7371 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 7372 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7373 auto Alignment = CharUnits::fromQuantity( 7374 BuiltinID == NEON::BI__builtin_neon_vld1_lane_v ? 8 : 16); 7375 Ops[0] = 7376 Builder.CreateAlignedLoad(VTy->getElementType(), Ops[0], Alignment); 7377 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vld1_lane"); 7378 } 7379 case NEON::BI__builtin_neon_vld1_dup_v: 7380 case NEON::BI__builtin_neon_vld1q_dup_v: { 7381 Value *V = UndefValue::get(Ty); 7382 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 7383 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7384 auto Alignment = CharUnits::fromQuantity( 7385 BuiltinID == NEON::BI__builtin_neon_vld1_dup_v ? 8 : 16); 7386 Ops[0] = 7387 Builder.CreateAlignedLoad(VTy->getElementType(), Ops[0], Alignment); 7388 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 7389 Ops[0] = Builder.CreateInsertElement(V, Ops[0], CI); 7390 return EmitNeonSplat(Ops[0], CI); 7391 } 7392 case NEON::BI__builtin_neon_vst1_lane_v: 7393 case NEON::BI__builtin_neon_vst1q_lane_v: 7394 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7395 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 7396 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 7397 return Builder.CreateDefaultAlignedStore(Ops[1], 7398 Builder.CreateBitCast(Ops[0], Ty)); 7399 case NEON::BI__builtin_neon_vld2_v: 7400 case NEON::BI__builtin_neon_vld2q_v: { 7401 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 7402 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7403 llvm::Type *Tys[2] = { VTy, PTy }; 7404 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2, Tys); 7405 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 7406 Ops[0] = Builder.CreateBitCast(Ops[0], 7407 llvm::PointerType::getUnqual(Ops[1]->getType())); 7408 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7409 } 7410 case NEON::BI__builtin_neon_vld3_v: 7411 case NEON::BI__builtin_neon_vld3q_v: { 7412 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 7413 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7414 llvm::Type *Tys[2] = { VTy, PTy }; 7415 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3, Tys); 7416 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 7417 Ops[0] = Builder.CreateBitCast(Ops[0], 7418 llvm::PointerType::getUnqual(Ops[1]->getType())); 7419 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7420 } 7421 case NEON::BI__builtin_neon_vld4_v: 7422 case NEON::BI__builtin_neon_vld4q_v: { 7423 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 7424 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7425 llvm::Type *Tys[2] = { VTy, PTy }; 7426 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4, Tys); 7427 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 7428 Ops[0] = Builder.CreateBitCast(Ops[0], 7429 llvm::PointerType::getUnqual(Ops[1]->getType())); 7430 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7431 } 7432 case NEON::BI__builtin_neon_vld2_dup_v: 7433 case NEON::BI__builtin_neon_vld2q_dup_v: { 7434 llvm::Type *PTy = 7435 llvm::PointerType::getUnqual(VTy->getElementType()); 7436 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7437 llvm::Type *Tys[2] = { VTy, PTy }; 7438 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2r, Tys); 7439 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 7440 Ops[0] = Builder.CreateBitCast(Ops[0], 7441 llvm::PointerType::getUnqual(Ops[1]->getType())); 7442 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7443 } 7444 case NEON::BI__builtin_neon_vld3_dup_v: 7445 case NEON::BI__builtin_neon_vld3q_dup_v: { 7446 llvm::Type *PTy = 7447 llvm::PointerType::getUnqual(VTy->getElementType()); 7448 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7449 llvm::Type *Tys[2] = { VTy, PTy }; 7450 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3r, Tys); 7451 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 7452 Ops[0] = Builder.CreateBitCast(Ops[0], 7453 llvm::PointerType::getUnqual(Ops[1]->getType())); 7454 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7455 } 7456 case NEON::BI__builtin_neon_vld4_dup_v: 7457 case NEON::BI__builtin_neon_vld4q_dup_v: { 7458 llvm::Type *PTy = 7459 llvm::PointerType::getUnqual(VTy->getElementType()); 7460 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7461 llvm::Type *Tys[2] = { VTy, PTy }; 7462 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4r, Tys); 7463 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 7464 Ops[0] = Builder.CreateBitCast(Ops[0], 7465 llvm::PointerType::getUnqual(Ops[1]->getType())); 7466 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7467 } 7468 case NEON::BI__builtin_neon_vld2_lane_v: 7469 case NEON::BI__builtin_neon_vld2q_lane_v: { 7470 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 7471 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2lane, Tys); 7472 Ops.push_back(Ops[1]); 7473 Ops.erase(Ops.begin()+1); 7474 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7475 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 7476 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 7477 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld2_lane"); 7478 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 7479 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7480 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7481 } 7482 case NEON::BI__builtin_neon_vld3_lane_v: 7483 case NEON::BI__builtin_neon_vld3q_lane_v: { 7484 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 7485 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3lane, Tys); 7486 Ops.push_back(Ops[1]); 7487 Ops.erase(Ops.begin()+1); 7488 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7489 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 7490 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 7491 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 7492 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld3_lane"); 7493 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 7494 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7495 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7496 } 7497 case NEON::BI__builtin_neon_vld4_lane_v: 7498 case NEON::BI__builtin_neon_vld4q_lane_v: { 7499 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 7500 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4lane, Tys); 7501 Ops.push_back(Ops[1]); 7502 Ops.erase(Ops.begin()+1); 7503 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7504 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 7505 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 7506 Ops[4] = Builder.CreateBitCast(Ops[4], Ty); 7507 Ops[5] = Builder.CreateZExt(Ops[5], Int64Ty); 7508 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld4_lane"); 7509 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 7510 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7511 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7512 } 7513 case NEON::BI__builtin_neon_vst2_v: 7514 case NEON::BI__builtin_neon_vst2q_v: { 7515 Ops.push_back(Ops[0]); 7516 Ops.erase(Ops.begin()); 7517 llvm::Type *Tys[2] = { VTy, Ops[2]->getType() }; 7518 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2, Tys), 7519 Ops, ""); 7520 } 7521 case NEON::BI__builtin_neon_vst2_lane_v: 7522 case NEON::BI__builtin_neon_vst2q_lane_v: { 7523 Ops.push_back(Ops[0]); 7524 Ops.erase(Ops.begin()); 7525 Ops[2] = Builder.CreateZExt(Ops[2], Int64Ty); 7526 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 7527 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2lane, Tys), 7528 Ops, ""); 7529 } 7530 case NEON::BI__builtin_neon_vst3_v: 7531 case NEON::BI__builtin_neon_vst3q_v: { 7532 Ops.push_back(Ops[0]); 7533 Ops.erase(Ops.begin()); 7534 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 7535 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3, Tys), 7536 Ops, ""); 7537 } 7538 case NEON::BI__builtin_neon_vst3_lane_v: 7539 case NEON::BI__builtin_neon_vst3q_lane_v: { 7540 Ops.push_back(Ops[0]); 7541 Ops.erase(Ops.begin()); 7542 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 7543 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 7544 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3lane, Tys), 7545 Ops, ""); 7546 } 7547 case NEON::BI__builtin_neon_vst4_v: 7548 case NEON::BI__builtin_neon_vst4q_v: { 7549 Ops.push_back(Ops[0]); 7550 Ops.erase(Ops.begin()); 7551 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 7552 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4, Tys), 7553 Ops, ""); 7554 } 7555 case NEON::BI__builtin_neon_vst4_lane_v: 7556 case NEON::BI__builtin_neon_vst4q_lane_v: { 7557 Ops.push_back(Ops[0]); 7558 Ops.erase(Ops.begin()); 7559 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 7560 llvm::Type *Tys[2] = { VTy, Ops[5]->getType() }; 7561 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4lane, Tys), 7562 Ops, ""); 7563 } 7564 case NEON::BI__builtin_neon_vtrn_v: 7565 case NEON::BI__builtin_neon_vtrnq_v: { 7566 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 7567 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7568 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 7569 Value *SV = nullptr; 7570 7571 for (unsigned vi = 0; vi != 2; ++vi) { 7572 SmallVector<uint32_t, 16> Indices; 7573 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 7574 Indices.push_back(i+vi); 7575 Indices.push_back(i+e+vi); 7576 } 7577 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 7578 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 7579 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 7580 } 7581 return SV; 7582 } 7583 case NEON::BI__builtin_neon_vuzp_v: 7584 case NEON::BI__builtin_neon_vuzpq_v: { 7585 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 7586 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7587 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 7588 Value *SV = nullptr; 7589 7590 for (unsigned vi = 0; vi != 2; ++vi) { 7591 SmallVector<uint32_t, 16> Indices; 7592 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 7593 Indices.push_back(2*i+vi); 7594 7595 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 7596 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 7597 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 7598 } 7599 return SV; 7600 } 7601 case NEON::BI__builtin_neon_vzip_v: 7602 case NEON::BI__builtin_neon_vzipq_v: { 7603 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 7604 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7605 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 7606 Value *SV = nullptr; 7607 7608 for (unsigned vi = 0; vi != 2; ++vi) { 7609 SmallVector<uint32_t, 16> Indices; 7610 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 7611 Indices.push_back((i + vi*e) >> 1); 7612 Indices.push_back(((i + vi*e) >> 1)+e); 7613 } 7614 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 7615 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 7616 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 7617 } 7618 return SV; 7619 } 7620 case NEON::BI__builtin_neon_vqtbl1q_v: { 7621 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl1, Ty), 7622 Ops, "vtbl1"); 7623 } 7624 case NEON::BI__builtin_neon_vqtbl2q_v: { 7625 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl2, Ty), 7626 Ops, "vtbl2"); 7627 } 7628 case NEON::BI__builtin_neon_vqtbl3q_v: { 7629 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl3, Ty), 7630 Ops, "vtbl3"); 7631 } 7632 case NEON::BI__builtin_neon_vqtbl4q_v: { 7633 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl4, Ty), 7634 Ops, "vtbl4"); 7635 } 7636 case NEON::BI__builtin_neon_vqtbx1q_v: { 7637 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx1, Ty), 7638 Ops, "vtbx1"); 7639 } 7640 case NEON::BI__builtin_neon_vqtbx2q_v: { 7641 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx2, Ty), 7642 Ops, "vtbx2"); 7643 } 7644 case NEON::BI__builtin_neon_vqtbx3q_v: { 7645 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx3, Ty), 7646 Ops, "vtbx3"); 7647 } 7648 case NEON::BI__builtin_neon_vqtbx4q_v: { 7649 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx4, Ty), 7650 Ops, "vtbx4"); 7651 } 7652 case NEON::BI__builtin_neon_vsqadd_v: 7653 case NEON::BI__builtin_neon_vsqaddq_v: { 7654 Int = Intrinsic::aarch64_neon_usqadd; 7655 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqadd"); 7656 } 7657 case NEON::BI__builtin_neon_vuqadd_v: 7658 case NEON::BI__builtin_neon_vuqaddq_v: { 7659 Int = Intrinsic::aarch64_neon_suqadd; 7660 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vuqadd"); 7661 } 7662 } 7663 } 7664 7665 llvm::Value *CodeGenFunction:: 7666 BuildVector(ArrayRef<llvm::Value*> Ops) { 7667 assert((Ops.size() & (Ops.size() - 1)) == 0 && 7668 "Not a power-of-two sized vector!"); 7669 bool AllConstants = true; 7670 for (unsigned i = 0, e = Ops.size(); i != e && AllConstants; ++i) 7671 AllConstants &= isa<Constant>(Ops[i]); 7672 7673 // If this is a constant vector, create a ConstantVector. 7674 if (AllConstants) { 7675 SmallVector<llvm::Constant*, 16> CstOps; 7676 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 7677 CstOps.push_back(cast<Constant>(Ops[i])); 7678 return llvm::ConstantVector::get(CstOps); 7679 } 7680 7681 // Otherwise, insertelement the values to build the vector. 7682 Value *Result = 7683 llvm::UndefValue::get(llvm::VectorType::get(Ops[0]->getType(), Ops.size())); 7684 7685 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 7686 Result = Builder.CreateInsertElement(Result, Ops[i], Builder.getInt32(i)); 7687 7688 return Result; 7689 } 7690 7691 // Convert the mask from an integer type to a vector of i1. 7692 static Value *getMaskVecValue(CodeGenFunction &CGF, Value *Mask, 7693 unsigned NumElts) { 7694 7695 llvm::VectorType *MaskTy = llvm::VectorType::get(CGF.Builder.getInt1Ty(), 7696 cast<IntegerType>(Mask->getType())->getBitWidth()); 7697 Value *MaskVec = CGF.Builder.CreateBitCast(Mask, MaskTy); 7698 7699 // If we have less than 8 elements, then the starting mask was an i8 and 7700 // we need to extract down to the right number of elements. 7701 if (NumElts < 8) { 7702 uint32_t Indices[4]; 7703 for (unsigned i = 0; i != NumElts; ++i) 7704 Indices[i] = i; 7705 MaskVec = CGF.Builder.CreateShuffleVector(MaskVec, MaskVec, 7706 makeArrayRef(Indices, NumElts), 7707 "extract"); 7708 } 7709 return MaskVec; 7710 } 7711 7712 static Value *EmitX86MaskedStore(CodeGenFunction &CGF, 7713 SmallVectorImpl<Value *> &Ops, 7714 unsigned Align) { 7715 // Cast the pointer to right type. 7716 Ops[0] = CGF.Builder.CreateBitCast(Ops[0], 7717 llvm::PointerType::getUnqual(Ops[1]->getType())); 7718 7719 // If the mask is all ones just emit a regular store. 7720 if (const auto *C = dyn_cast<Constant>(Ops[2])) 7721 if (C->isAllOnesValue()) 7722 return CGF.Builder.CreateAlignedStore(Ops[1], Ops[0], Align); 7723 7724 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 7725 Ops[1]->getType()->getVectorNumElements()); 7726 7727 return CGF.Builder.CreateMaskedStore(Ops[1], Ops[0], Align, MaskVec); 7728 } 7729 7730 static Value *EmitX86MaskedLoad(CodeGenFunction &CGF, 7731 SmallVectorImpl<Value *> &Ops, unsigned Align) { 7732 // Cast the pointer to right type. 7733 Ops[0] = CGF.Builder.CreateBitCast(Ops[0], 7734 llvm::PointerType::getUnqual(Ops[1]->getType())); 7735 7736 // If the mask is all ones just emit a regular store. 7737 if (const auto *C = dyn_cast<Constant>(Ops[2])) 7738 if (C->isAllOnesValue()) 7739 return CGF.Builder.CreateAlignedLoad(Ops[0], Align); 7740 7741 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 7742 Ops[1]->getType()->getVectorNumElements()); 7743 7744 return CGF.Builder.CreateMaskedLoad(Ops[0], Align, MaskVec, Ops[1]); 7745 } 7746 7747 static Value *EmitX86MaskLogic(CodeGenFunction &CGF, Instruction::BinaryOps Opc, 7748 unsigned NumElts, SmallVectorImpl<Value *> &Ops, 7749 bool InvertLHS = false) { 7750 Value *LHS = getMaskVecValue(CGF, Ops[0], NumElts); 7751 Value *RHS = getMaskVecValue(CGF, Ops[1], NumElts); 7752 7753 if (InvertLHS) 7754 LHS = CGF.Builder.CreateNot(LHS); 7755 7756 return CGF.Builder.CreateBitCast(CGF.Builder.CreateBinOp(Opc, LHS, RHS), 7757 CGF.Builder.getIntNTy(std::max(NumElts, 8U))); 7758 } 7759 7760 static Value *EmitX86SubVectorBroadcast(CodeGenFunction &CGF, 7761 SmallVectorImpl<Value *> &Ops, 7762 llvm::Type *DstTy, 7763 unsigned SrcSizeInBits, 7764 unsigned Align) { 7765 // Load the subvector. 7766 Ops[0] = CGF.Builder.CreateAlignedLoad(Ops[0], Align); 7767 7768 // Create broadcast mask. 7769 unsigned NumDstElts = DstTy->getVectorNumElements(); 7770 unsigned NumSrcElts = SrcSizeInBits / DstTy->getScalarSizeInBits(); 7771 7772 SmallVector<uint32_t, 8> Mask; 7773 for (unsigned i = 0; i != NumDstElts; i += NumSrcElts) 7774 for (unsigned j = 0; j != NumSrcElts; ++j) 7775 Mask.push_back(j); 7776 7777 return CGF.Builder.CreateShuffleVector(Ops[0], Ops[0], Mask, "subvecbcst"); 7778 } 7779 7780 static Value *EmitX86Select(CodeGenFunction &CGF, 7781 Value *Mask, Value *Op0, Value *Op1) { 7782 7783 // If the mask is all ones just return first argument. 7784 if (const auto *C = dyn_cast<Constant>(Mask)) 7785 if (C->isAllOnesValue()) 7786 return Op0; 7787 7788 Mask = getMaskVecValue(CGF, Mask, Op0->getType()->getVectorNumElements()); 7789 7790 return CGF.Builder.CreateSelect(Mask, Op0, Op1); 7791 } 7792 7793 static Value *EmitX86MaskedCompare(CodeGenFunction &CGF, unsigned CC, 7794 bool Signed, ArrayRef<Value *> Ops) { 7795 assert((Ops.size() == 2 || Ops.size() == 4) && 7796 "Unexpected number of arguments"); 7797 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 7798 Value *Cmp; 7799 7800 if (CC == 3) { 7801 Cmp = Constant::getNullValue( 7802 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 7803 } else if (CC == 7) { 7804 Cmp = Constant::getAllOnesValue( 7805 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 7806 } else { 7807 ICmpInst::Predicate Pred; 7808 switch (CC) { 7809 default: llvm_unreachable("Unknown condition code"); 7810 case 0: Pred = ICmpInst::ICMP_EQ; break; 7811 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 7812 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 7813 case 4: Pred = ICmpInst::ICMP_NE; break; 7814 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 7815 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 7816 } 7817 Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 7818 } 7819 7820 if (Ops.size() == 4) { 7821 const auto *C = dyn_cast<Constant>(Ops[3]); 7822 if (!C || !C->isAllOnesValue()) 7823 Cmp = CGF.Builder.CreateAnd(Cmp, getMaskVecValue(CGF, Ops[3], NumElts)); 7824 } 7825 7826 if (NumElts < 8) { 7827 uint32_t Indices[8]; 7828 for (unsigned i = 0; i != NumElts; ++i) 7829 Indices[i] = i; 7830 for (unsigned i = NumElts; i != 8; ++i) 7831 Indices[i] = i % NumElts + NumElts; 7832 Cmp = CGF.Builder.CreateShuffleVector( 7833 Cmp, llvm::Constant::getNullValue(Cmp->getType()), Indices); 7834 } 7835 return CGF.Builder.CreateBitCast(Cmp, 7836 IntegerType::get(CGF.getLLVMContext(), 7837 std::max(NumElts, 8U))); 7838 } 7839 7840 static Value *EmitX86ConvertToMask(CodeGenFunction &CGF, Value *In) { 7841 Value *Zero = Constant::getNullValue(In->getType()); 7842 return EmitX86MaskedCompare(CGF, 1, true, { In, Zero }); 7843 } 7844 7845 static Value *EmitX86Abs(CodeGenFunction &CGF, ArrayRef<Value *> Ops) { 7846 7847 llvm::Type *Ty = Ops[0]->getType(); 7848 Value *Zero = llvm::Constant::getNullValue(Ty); 7849 Value *Sub = CGF.Builder.CreateSub(Zero, Ops[0]); 7850 Value *Cmp = CGF.Builder.CreateICmp(ICmpInst::ICMP_SGT, Ops[0], Zero); 7851 Value *Res = CGF.Builder.CreateSelect(Cmp, Ops[0], Sub); 7852 if (Ops.size() == 1) 7853 return Res; 7854 return EmitX86Select(CGF, Ops[2], Res, Ops[1]); 7855 } 7856 7857 static Value *EmitX86MinMax(CodeGenFunction &CGF, ICmpInst::Predicate Pred, 7858 ArrayRef<Value *> Ops) { 7859 Value *Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 7860 Value *Res = CGF.Builder.CreateSelect(Cmp, Ops[0], Ops[1]); 7861 7862 if (Ops.size() == 2) 7863 return Res; 7864 7865 assert(Ops.size() == 4); 7866 return EmitX86Select(CGF, Ops[3], Res, Ops[2]); 7867 } 7868 7869 static Value *EmitX86SExtMask(CodeGenFunction &CGF, Value *Op, 7870 llvm::Type *DstTy) { 7871 unsigned NumberOfElements = DstTy->getVectorNumElements(); 7872 Value *Mask = getMaskVecValue(CGF, Op, NumberOfElements); 7873 return CGF.Builder.CreateSExt(Mask, DstTy, "vpmovm2"); 7874 } 7875 7876 Value *CodeGenFunction::EmitX86CpuIs(const CallExpr *E) { 7877 const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts(); 7878 StringRef CPUStr = cast<clang::StringLiteral>(CPUExpr)->getString(); 7879 return EmitX86CpuIs(CPUStr); 7880 } 7881 7882 Value *CodeGenFunction::EmitX86CpuIs(StringRef CPUStr) { 7883 7884 llvm::Type *Int32Ty = Builder.getInt32Ty(); 7885 7886 // Matching the struct layout from the compiler-rt/libgcc structure that is 7887 // filled in: 7888 // unsigned int __cpu_vendor; 7889 // unsigned int __cpu_type; 7890 // unsigned int __cpu_subtype; 7891 // unsigned int __cpu_features[1]; 7892 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, Int32Ty, 7893 llvm::ArrayType::get(Int32Ty, 1)); 7894 7895 // Grab the global __cpu_model. 7896 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 7897 7898 // Calculate the index needed to access the correct field based on the 7899 // range. Also adjust the expected value. 7900 unsigned Index; 7901 unsigned Value; 7902 std::tie(Index, Value) = StringSwitch<std::pair<unsigned, unsigned>>(CPUStr) 7903 #define X86_VENDOR(ENUM, STRING) \ 7904 .Case(STRING, {0u, static_cast<unsigned>(llvm::X86::ENUM)}) 7905 #define X86_CPU_TYPE_COMPAT_WITH_ALIAS(ARCHNAME, ENUM, STR, ALIAS) \ 7906 .Cases(STR, ALIAS, {1u, static_cast<unsigned>(llvm::X86::ENUM)}) 7907 #define X86_CPU_TYPE_COMPAT(ARCHNAME, ENUM, STR) \ 7908 .Case(STR, {1u, static_cast<unsigned>(llvm::X86::ENUM)}) 7909 #define X86_CPU_SUBTYPE_COMPAT(ARCHNAME, ENUM, STR) \ 7910 .Case(STR, {2u, static_cast<unsigned>(llvm::X86::ENUM)}) 7911 #include "llvm/Support/X86TargetParser.def" 7912 .Default({0, 0}); 7913 assert(Value != 0 && "Invalid CPUStr passed to CpuIs"); 7914 7915 // Grab the appropriate field from __cpu_model. 7916 llvm::Value *Idxs[] = {ConstantInt::get(Int32Ty, 0), 7917 ConstantInt::get(Int32Ty, Index)}; 7918 llvm::Value *CpuValue = Builder.CreateGEP(STy, CpuModel, Idxs); 7919 CpuValue = Builder.CreateAlignedLoad(CpuValue, CharUnits::fromQuantity(4)); 7920 7921 // Check the value of the field against the requested value. 7922 return Builder.CreateICmpEQ(CpuValue, 7923 llvm::ConstantInt::get(Int32Ty, Value)); 7924 } 7925 7926 Value *CodeGenFunction::EmitX86CpuSupports(const CallExpr *E) { 7927 const Expr *FeatureExpr = E->getArg(0)->IgnoreParenCasts(); 7928 StringRef FeatureStr = cast<StringLiteral>(FeatureExpr)->getString(); 7929 return EmitX86CpuSupports(FeatureStr); 7930 } 7931 7932 Value *CodeGenFunction::EmitX86CpuSupports(ArrayRef<StringRef> FeatureStrs) { 7933 // Processor features and mapping to processor feature value. 7934 7935 uint32_t FeaturesMask = 0; 7936 7937 for (const StringRef &FeatureStr : FeatureStrs) { 7938 unsigned Feature = 7939 StringSwitch<unsigned>(FeatureStr) 7940 #define X86_FEATURE_COMPAT(VAL, ENUM, STR) .Case(STR, VAL) 7941 #include "llvm/Support/X86TargetParser.def" 7942 ; 7943 FeaturesMask |= (1U << Feature); 7944 } 7945 7946 // Matching the struct layout from the compiler-rt/libgcc structure that is 7947 // filled in: 7948 // unsigned int __cpu_vendor; 7949 // unsigned int __cpu_type; 7950 // unsigned int __cpu_subtype; 7951 // unsigned int __cpu_features[1]; 7952 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, Int32Ty, 7953 llvm::ArrayType::get(Int32Ty, 1)); 7954 7955 // Grab the global __cpu_model. 7956 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 7957 7958 // Grab the first (0th) element from the field __cpu_features off of the 7959 // global in the struct STy. 7960 Value *Idxs[] = {ConstantInt::get(Int32Ty, 0), ConstantInt::get(Int32Ty, 3), 7961 ConstantInt::get(Int32Ty, 0)}; 7962 Value *CpuFeatures = Builder.CreateGEP(STy, CpuModel, Idxs); 7963 Value *Features = 7964 Builder.CreateAlignedLoad(CpuFeatures, CharUnits::fromQuantity(4)); 7965 7966 // Check the value of the bit corresponding to the feature requested. 7967 Value *Bitset = Builder.CreateAnd( 7968 Features, llvm::ConstantInt::get(Int32Ty, FeaturesMask)); 7969 return Builder.CreateICmpNE(Bitset, llvm::ConstantInt::get(Int32Ty, 0)); 7970 } 7971 7972 Value *CodeGenFunction::EmitX86CpuInit() { 7973 llvm::FunctionType *FTy = llvm::FunctionType::get(VoidTy, 7974 /*Variadic*/ false); 7975 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, "__cpu_indicator_init"); 7976 return Builder.CreateCall(Func); 7977 } 7978 7979 Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, 7980 const CallExpr *E) { 7981 if (BuiltinID == X86::BI__builtin_cpu_is) 7982 return EmitX86CpuIs(E); 7983 if (BuiltinID == X86::BI__builtin_cpu_supports) 7984 return EmitX86CpuSupports(E); 7985 if (BuiltinID == X86::BI__builtin_cpu_init) 7986 return EmitX86CpuInit(); 7987 7988 SmallVector<Value*, 4> Ops; 7989 7990 // Find out if any arguments are required to be integer constant expressions. 7991 unsigned ICEArguments = 0; 7992 ASTContext::GetBuiltinTypeError Error; 7993 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 7994 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 7995 7996 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) { 7997 // If this is a normal argument, just emit it as a scalar. 7998 if ((ICEArguments & (1 << i)) == 0) { 7999 Ops.push_back(EmitScalarExpr(E->getArg(i))); 8000 continue; 8001 } 8002 8003 // If this is required to be a constant, constant fold it so that we know 8004 // that the generated intrinsic gets a ConstantInt. 8005 llvm::APSInt Result; 8006 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 8007 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 8008 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 8009 } 8010 8011 // These exist so that the builtin that takes an immediate can be bounds 8012 // checked by clang to avoid passing bad immediates to the backend. Since 8013 // AVX has a larger immediate than SSE we would need separate builtins to 8014 // do the different bounds checking. Rather than create a clang specific 8015 // SSE only builtin, this implements eight separate builtins to match gcc 8016 // implementation. 8017 auto getCmpIntrinsicCall = [this, &Ops](Intrinsic::ID ID, unsigned Imm) { 8018 Ops.push_back(llvm::ConstantInt::get(Int8Ty, Imm)); 8019 llvm::Function *F = CGM.getIntrinsic(ID); 8020 return Builder.CreateCall(F, Ops); 8021 }; 8022 8023 // For the vector forms of FP comparisons, translate the builtins directly to 8024 // IR. 8025 // TODO: The builtins could be removed if the SSE header files used vector 8026 // extension comparisons directly (vector ordered/unordered may need 8027 // additional support via __builtin_isnan()). 8028 auto getVectorFCmpIR = [this, &Ops](CmpInst::Predicate Pred) { 8029 Value *Cmp = Builder.CreateFCmp(Pred, Ops[0], Ops[1]); 8030 llvm::VectorType *FPVecTy = cast<llvm::VectorType>(Ops[0]->getType()); 8031 llvm::VectorType *IntVecTy = llvm::VectorType::getInteger(FPVecTy); 8032 Value *Sext = Builder.CreateSExt(Cmp, IntVecTy); 8033 return Builder.CreateBitCast(Sext, FPVecTy); 8034 }; 8035 8036 switch (BuiltinID) { 8037 default: return nullptr; 8038 case X86::BI_mm_prefetch: { 8039 Value *Address = Ops[0]; 8040 ConstantInt *C = cast<ConstantInt>(Ops[1]); 8041 Value *RW = ConstantInt::get(Int32Ty, (C->getZExtValue() >> 2) & 0x1); 8042 Value *Locality = ConstantInt::get(Int32Ty, C->getZExtValue() & 0x3); 8043 Value *Data = ConstantInt::get(Int32Ty, 1); 8044 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 8045 return Builder.CreateCall(F, {Address, RW, Locality, Data}); 8046 } 8047 case X86::BI_mm_clflush: { 8048 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_clflush), 8049 Ops[0]); 8050 } 8051 case X86::BI_mm_lfence: { 8052 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_lfence)); 8053 } 8054 case X86::BI_mm_mfence: { 8055 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_mfence)); 8056 } 8057 case X86::BI_mm_sfence: { 8058 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_sfence)); 8059 } 8060 case X86::BI_mm_pause: { 8061 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_pause)); 8062 } 8063 case X86::BI__rdtsc: { 8064 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_rdtsc)); 8065 } 8066 case X86::BI__builtin_ia32_undef128: 8067 case X86::BI__builtin_ia32_undef256: 8068 case X86::BI__builtin_ia32_undef512: 8069 // The x86 definition of "undef" is not the same as the LLVM definition 8070 // (PR32176). We leave optimizing away an unnecessary zero constant to the 8071 // IR optimizer and backend. 8072 // TODO: If we had a "freeze" IR instruction to generate a fixed undef 8073 // value, we should use that here instead of a zero. 8074 return llvm::Constant::getNullValue(ConvertType(E->getType())); 8075 case X86::BI__builtin_ia32_vec_init_v8qi: 8076 case X86::BI__builtin_ia32_vec_init_v4hi: 8077 case X86::BI__builtin_ia32_vec_init_v2si: 8078 return Builder.CreateBitCast(BuildVector(Ops), 8079 llvm::Type::getX86_MMXTy(getLLVMContext())); 8080 case X86::BI__builtin_ia32_vec_ext_v2si: 8081 return Builder.CreateExtractElement(Ops[0], 8082 llvm::ConstantInt::get(Ops[1]->getType(), 0)); 8083 case X86::BI_mm_setcsr: 8084 case X86::BI__builtin_ia32_ldmxcsr: { 8085 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 8086 Builder.CreateStore(Ops[0], Tmp); 8087 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_ldmxcsr), 8088 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 8089 } 8090 case X86::BI_mm_getcsr: 8091 case X86::BI__builtin_ia32_stmxcsr: { 8092 Address Tmp = CreateMemTemp(E->getType()); 8093 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_stmxcsr), 8094 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 8095 return Builder.CreateLoad(Tmp, "stmxcsr"); 8096 } 8097 case X86::BI__builtin_ia32_xsave: 8098 case X86::BI__builtin_ia32_xsave64: 8099 case X86::BI__builtin_ia32_xrstor: 8100 case X86::BI__builtin_ia32_xrstor64: 8101 case X86::BI__builtin_ia32_xsaveopt: 8102 case X86::BI__builtin_ia32_xsaveopt64: 8103 case X86::BI__builtin_ia32_xrstors: 8104 case X86::BI__builtin_ia32_xrstors64: 8105 case X86::BI__builtin_ia32_xsavec: 8106 case X86::BI__builtin_ia32_xsavec64: 8107 case X86::BI__builtin_ia32_xsaves: 8108 case X86::BI__builtin_ia32_xsaves64: { 8109 Intrinsic::ID ID; 8110 #define INTRINSIC_X86_XSAVE_ID(NAME) \ 8111 case X86::BI__builtin_ia32_##NAME: \ 8112 ID = Intrinsic::x86_##NAME; \ 8113 break 8114 switch (BuiltinID) { 8115 default: llvm_unreachable("Unsupported intrinsic!"); 8116 INTRINSIC_X86_XSAVE_ID(xsave); 8117 INTRINSIC_X86_XSAVE_ID(xsave64); 8118 INTRINSIC_X86_XSAVE_ID(xrstor); 8119 INTRINSIC_X86_XSAVE_ID(xrstor64); 8120 INTRINSIC_X86_XSAVE_ID(xsaveopt); 8121 INTRINSIC_X86_XSAVE_ID(xsaveopt64); 8122 INTRINSIC_X86_XSAVE_ID(xrstors); 8123 INTRINSIC_X86_XSAVE_ID(xrstors64); 8124 INTRINSIC_X86_XSAVE_ID(xsavec); 8125 INTRINSIC_X86_XSAVE_ID(xsavec64); 8126 INTRINSIC_X86_XSAVE_ID(xsaves); 8127 INTRINSIC_X86_XSAVE_ID(xsaves64); 8128 } 8129 #undef INTRINSIC_X86_XSAVE_ID 8130 Value *Mhi = Builder.CreateTrunc( 8131 Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, 32)), Int32Ty); 8132 Value *Mlo = Builder.CreateTrunc(Ops[1], Int32Ty); 8133 Ops[1] = Mhi; 8134 Ops.push_back(Mlo); 8135 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 8136 } 8137 case X86::BI__builtin_ia32_storedqudi128_mask: 8138 case X86::BI__builtin_ia32_storedqusi128_mask: 8139 case X86::BI__builtin_ia32_storedquhi128_mask: 8140 case X86::BI__builtin_ia32_storedquqi128_mask: 8141 case X86::BI__builtin_ia32_storeupd128_mask: 8142 case X86::BI__builtin_ia32_storeups128_mask: 8143 case X86::BI__builtin_ia32_storedqudi256_mask: 8144 case X86::BI__builtin_ia32_storedqusi256_mask: 8145 case X86::BI__builtin_ia32_storedquhi256_mask: 8146 case X86::BI__builtin_ia32_storedquqi256_mask: 8147 case X86::BI__builtin_ia32_storeupd256_mask: 8148 case X86::BI__builtin_ia32_storeups256_mask: 8149 case X86::BI__builtin_ia32_storedqudi512_mask: 8150 case X86::BI__builtin_ia32_storedqusi512_mask: 8151 case X86::BI__builtin_ia32_storedquhi512_mask: 8152 case X86::BI__builtin_ia32_storedquqi512_mask: 8153 case X86::BI__builtin_ia32_storeupd512_mask: 8154 case X86::BI__builtin_ia32_storeups512_mask: 8155 return EmitX86MaskedStore(*this, Ops, 1); 8156 8157 case X86::BI__builtin_ia32_storess128_mask: 8158 case X86::BI__builtin_ia32_storesd128_mask: { 8159 return EmitX86MaskedStore(*this, Ops, 16); 8160 } 8161 case X86::BI__builtin_ia32_vpopcntb_128: 8162 case X86::BI__builtin_ia32_vpopcntd_128: 8163 case X86::BI__builtin_ia32_vpopcntq_128: 8164 case X86::BI__builtin_ia32_vpopcntw_128: 8165 case X86::BI__builtin_ia32_vpopcntb_256: 8166 case X86::BI__builtin_ia32_vpopcntd_256: 8167 case X86::BI__builtin_ia32_vpopcntq_256: 8168 case X86::BI__builtin_ia32_vpopcntw_256: 8169 case X86::BI__builtin_ia32_vpopcntb_512: 8170 case X86::BI__builtin_ia32_vpopcntd_512: 8171 case X86::BI__builtin_ia32_vpopcntq_512: 8172 case X86::BI__builtin_ia32_vpopcntw_512: { 8173 llvm::Type *ResultType = ConvertType(E->getType()); 8174 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 8175 return Builder.CreateCall(F, Ops); 8176 } 8177 case X86::BI__builtin_ia32_cvtmask2b128: 8178 case X86::BI__builtin_ia32_cvtmask2b256: 8179 case X86::BI__builtin_ia32_cvtmask2b512: 8180 case X86::BI__builtin_ia32_cvtmask2w128: 8181 case X86::BI__builtin_ia32_cvtmask2w256: 8182 case X86::BI__builtin_ia32_cvtmask2w512: 8183 case X86::BI__builtin_ia32_cvtmask2d128: 8184 case X86::BI__builtin_ia32_cvtmask2d256: 8185 case X86::BI__builtin_ia32_cvtmask2d512: 8186 case X86::BI__builtin_ia32_cvtmask2q128: 8187 case X86::BI__builtin_ia32_cvtmask2q256: 8188 case X86::BI__builtin_ia32_cvtmask2q512: 8189 return EmitX86SExtMask(*this, Ops[0], ConvertType(E->getType())); 8190 8191 case X86::BI__builtin_ia32_cvtb2mask128: 8192 case X86::BI__builtin_ia32_cvtb2mask256: 8193 case X86::BI__builtin_ia32_cvtb2mask512: 8194 case X86::BI__builtin_ia32_cvtw2mask128: 8195 case X86::BI__builtin_ia32_cvtw2mask256: 8196 case X86::BI__builtin_ia32_cvtw2mask512: 8197 case X86::BI__builtin_ia32_cvtd2mask128: 8198 case X86::BI__builtin_ia32_cvtd2mask256: 8199 case X86::BI__builtin_ia32_cvtd2mask512: 8200 case X86::BI__builtin_ia32_cvtq2mask128: 8201 case X86::BI__builtin_ia32_cvtq2mask256: 8202 case X86::BI__builtin_ia32_cvtq2mask512: 8203 return EmitX86ConvertToMask(*this, Ops[0]); 8204 8205 case X86::BI__builtin_ia32_movdqa32store128_mask: 8206 case X86::BI__builtin_ia32_movdqa64store128_mask: 8207 case X86::BI__builtin_ia32_storeaps128_mask: 8208 case X86::BI__builtin_ia32_storeapd128_mask: 8209 case X86::BI__builtin_ia32_movdqa32store256_mask: 8210 case X86::BI__builtin_ia32_movdqa64store256_mask: 8211 case X86::BI__builtin_ia32_storeaps256_mask: 8212 case X86::BI__builtin_ia32_storeapd256_mask: 8213 case X86::BI__builtin_ia32_movdqa32store512_mask: 8214 case X86::BI__builtin_ia32_movdqa64store512_mask: 8215 case X86::BI__builtin_ia32_storeaps512_mask: 8216 case X86::BI__builtin_ia32_storeapd512_mask: { 8217 unsigned Align = 8218 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 8219 return EmitX86MaskedStore(*this, Ops, Align); 8220 } 8221 case X86::BI__builtin_ia32_loadups128_mask: 8222 case X86::BI__builtin_ia32_loadups256_mask: 8223 case X86::BI__builtin_ia32_loadups512_mask: 8224 case X86::BI__builtin_ia32_loadupd128_mask: 8225 case X86::BI__builtin_ia32_loadupd256_mask: 8226 case X86::BI__builtin_ia32_loadupd512_mask: 8227 case X86::BI__builtin_ia32_loaddquqi128_mask: 8228 case X86::BI__builtin_ia32_loaddquqi256_mask: 8229 case X86::BI__builtin_ia32_loaddquqi512_mask: 8230 case X86::BI__builtin_ia32_loaddquhi128_mask: 8231 case X86::BI__builtin_ia32_loaddquhi256_mask: 8232 case X86::BI__builtin_ia32_loaddquhi512_mask: 8233 case X86::BI__builtin_ia32_loaddqusi128_mask: 8234 case X86::BI__builtin_ia32_loaddqusi256_mask: 8235 case X86::BI__builtin_ia32_loaddqusi512_mask: 8236 case X86::BI__builtin_ia32_loaddqudi128_mask: 8237 case X86::BI__builtin_ia32_loaddqudi256_mask: 8238 case X86::BI__builtin_ia32_loaddqudi512_mask: 8239 return EmitX86MaskedLoad(*this, Ops, 1); 8240 8241 case X86::BI__builtin_ia32_loadss128_mask: 8242 case X86::BI__builtin_ia32_loadsd128_mask: 8243 return EmitX86MaskedLoad(*this, Ops, 16); 8244 8245 case X86::BI__builtin_ia32_loadaps128_mask: 8246 case X86::BI__builtin_ia32_loadaps256_mask: 8247 case X86::BI__builtin_ia32_loadaps512_mask: 8248 case X86::BI__builtin_ia32_loadapd128_mask: 8249 case X86::BI__builtin_ia32_loadapd256_mask: 8250 case X86::BI__builtin_ia32_loadapd512_mask: 8251 case X86::BI__builtin_ia32_movdqa32load128_mask: 8252 case X86::BI__builtin_ia32_movdqa32load256_mask: 8253 case X86::BI__builtin_ia32_movdqa32load512_mask: 8254 case X86::BI__builtin_ia32_movdqa64load128_mask: 8255 case X86::BI__builtin_ia32_movdqa64load256_mask: 8256 case X86::BI__builtin_ia32_movdqa64load512_mask: { 8257 unsigned Align = 8258 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 8259 return EmitX86MaskedLoad(*this, Ops, Align); 8260 } 8261 8262 case X86::BI__builtin_ia32_vbroadcastf128_pd256: 8263 case X86::BI__builtin_ia32_vbroadcastf128_ps256: { 8264 llvm::Type *DstTy = ConvertType(E->getType()); 8265 return EmitX86SubVectorBroadcast(*this, Ops, DstTy, 128, 1); 8266 } 8267 8268 case X86::BI__builtin_ia32_storehps: 8269 case X86::BI__builtin_ia32_storelps: { 8270 llvm::Type *PtrTy = llvm::PointerType::getUnqual(Int64Ty); 8271 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 2); 8272 8273 // cast val v2i64 8274 Ops[1] = Builder.CreateBitCast(Ops[1], VecTy, "cast"); 8275 8276 // extract (0, 1) 8277 unsigned Index = BuiltinID == X86::BI__builtin_ia32_storelps ? 0 : 1; 8278 llvm::Value *Idx = llvm::ConstantInt::get(SizeTy, Index); 8279 Ops[1] = Builder.CreateExtractElement(Ops[1], Idx, "extract"); 8280 8281 // cast pointer to i64 & store 8282 Ops[0] = Builder.CreateBitCast(Ops[0], PtrTy); 8283 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8284 } 8285 case X86::BI__builtin_ia32_palignr128: 8286 case X86::BI__builtin_ia32_palignr256: 8287 case X86::BI__builtin_ia32_palignr512_mask: { 8288 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 8289 8290 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 8291 assert(NumElts % 16 == 0); 8292 8293 // If palignr is shifting the pair of vectors more than the size of two 8294 // lanes, emit zero. 8295 if (ShiftVal >= 32) 8296 return llvm::Constant::getNullValue(ConvertType(E->getType())); 8297 8298 // If palignr is shifting the pair of input vectors more than one lane, 8299 // but less than two lanes, convert to shifting in zeroes. 8300 if (ShiftVal > 16) { 8301 ShiftVal -= 16; 8302 Ops[1] = Ops[0]; 8303 Ops[0] = llvm::Constant::getNullValue(Ops[0]->getType()); 8304 } 8305 8306 uint32_t Indices[64]; 8307 // 256-bit palignr operates on 128-bit lanes so we need to handle that 8308 for (unsigned l = 0; l != NumElts; l += 16) { 8309 for (unsigned i = 0; i != 16; ++i) { 8310 unsigned Idx = ShiftVal + i; 8311 if (Idx >= 16) 8312 Idx += NumElts - 16; // End of lane, switch operand. 8313 Indices[l + i] = Idx + l; 8314 } 8315 } 8316 8317 Value *Align = Builder.CreateShuffleVector(Ops[1], Ops[0], 8318 makeArrayRef(Indices, NumElts), 8319 "palignr"); 8320 8321 // If this isn't a masked builtin, just return the align operation. 8322 if (Ops.size() == 3) 8323 return Align; 8324 8325 return EmitX86Select(*this, Ops[4], Align, Ops[3]); 8326 } 8327 8328 case X86::BI__builtin_ia32_vperm2f128_pd256: 8329 case X86::BI__builtin_ia32_vperm2f128_ps256: 8330 case X86::BI__builtin_ia32_vperm2f128_si256: 8331 case X86::BI__builtin_ia32_permti256: { 8332 unsigned Imm = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 8333 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 8334 8335 // This takes a very simple approach since there are two lanes and a 8336 // shuffle can have 2 inputs. So we reserve the first input for the first 8337 // lane and the second input for the second lane. This may result in 8338 // duplicate sources, but this can be dealt with in the backend. 8339 8340 Value *OutOps[2]; 8341 uint32_t Indices[8]; 8342 for (unsigned l = 0; l != 2; ++l) { 8343 // Determine the source for this lane. 8344 if (Imm & (1 << ((l * 4) + 3))) 8345 OutOps[l] = llvm::ConstantAggregateZero::get(Ops[0]->getType()); 8346 else if (Imm & (1 << ((l * 4) + 1))) 8347 OutOps[l] = Ops[1]; 8348 else 8349 OutOps[l] = Ops[0]; 8350 8351 for (unsigned i = 0; i != NumElts/2; ++i) { 8352 // Start with ith element of the source for this lane. 8353 unsigned Idx = (l * NumElts) + i; 8354 // If bit 0 of the immediate half is set, switch to the high half of 8355 // the source. 8356 if (Imm & (1 << (l * 4))) 8357 Idx += NumElts/2; 8358 Indices[(l * (NumElts/2)) + i] = Idx; 8359 } 8360 } 8361 8362 return Builder.CreateShuffleVector(OutOps[0], OutOps[1], 8363 makeArrayRef(Indices, NumElts), 8364 "vperm"); 8365 } 8366 8367 case X86::BI__builtin_ia32_movnti: 8368 case X86::BI__builtin_ia32_movnti64: 8369 case X86::BI__builtin_ia32_movntsd: 8370 case X86::BI__builtin_ia32_movntss: { 8371 llvm::MDNode *Node = llvm::MDNode::get( 8372 getLLVMContext(), llvm::ConstantAsMetadata::get(Builder.getInt32(1))); 8373 8374 Value *Ptr = Ops[0]; 8375 Value *Src = Ops[1]; 8376 8377 // Extract the 0'th element of the source vector. 8378 if (BuiltinID == X86::BI__builtin_ia32_movntsd || 8379 BuiltinID == X86::BI__builtin_ia32_movntss) 8380 Src = Builder.CreateExtractElement(Src, (uint64_t)0, "extract"); 8381 8382 // Convert the type of the pointer to a pointer to the stored type. 8383 Value *BC = Builder.CreateBitCast( 8384 Ptr, llvm::PointerType::getUnqual(Src->getType()), "cast"); 8385 8386 // Unaligned nontemporal store of the scalar value. 8387 StoreInst *SI = Builder.CreateDefaultAlignedStore(Src, BC); 8388 SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); 8389 SI->setAlignment(1); 8390 return SI; 8391 } 8392 8393 case X86::BI__builtin_ia32_selectb_128: 8394 case X86::BI__builtin_ia32_selectb_256: 8395 case X86::BI__builtin_ia32_selectb_512: 8396 case X86::BI__builtin_ia32_selectw_128: 8397 case X86::BI__builtin_ia32_selectw_256: 8398 case X86::BI__builtin_ia32_selectw_512: 8399 case X86::BI__builtin_ia32_selectd_128: 8400 case X86::BI__builtin_ia32_selectd_256: 8401 case X86::BI__builtin_ia32_selectd_512: 8402 case X86::BI__builtin_ia32_selectq_128: 8403 case X86::BI__builtin_ia32_selectq_256: 8404 case X86::BI__builtin_ia32_selectq_512: 8405 case X86::BI__builtin_ia32_selectps_128: 8406 case X86::BI__builtin_ia32_selectps_256: 8407 case X86::BI__builtin_ia32_selectps_512: 8408 case X86::BI__builtin_ia32_selectpd_128: 8409 case X86::BI__builtin_ia32_selectpd_256: 8410 case X86::BI__builtin_ia32_selectpd_512: 8411 return EmitX86Select(*this, Ops[0], Ops[1], Ops[2]); 8412 case X86::BI__builtin_ia32_cmpb128_mask: 8413 case X86::BI__builtin_ia32_cmpb256_mask: 8414 case X86::BI__builtin_ia32_cmpb512_mask: 8415 case X86::BI__builtin_ia32_cmpw128_mask: 8416 case X86::BI__builtin_ia32_cmpw256_mask: 8417 case X86::BI__builtin_ia32_cmpw512_mask: 8418 case X86::BI__builtin_ia32_cmpd128_mask: 8419 case X86::BI__builtin_ia32_cmpd256_mask: 8420 case X86::BI__builtin_ia32_cmpd512_mask: 8421 case X86::BI__builtin_ia32_cmpq128_mask: 8422 case X86::BI__builtin_ia32_cmpq256_mask: 8423 case X86::BI__builtin_ia32_cmpq512_mask: { 8424 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 8425 return EmitX86MaskedCompare(*this, CC, true, Ops); 8426 } 8427 case X86::BI__builtin_ia32_ucmpb128_mask: 8428 case X86::BI__builtin_ia32_ucmpb256_mask: 8429 case X86::BI__builtin_ia32_ucmpb512_mask: 8430 case X86::BI__builtin_ia32_ucmpw128_mask: 8431 case X86::BI__builtin_ia32_ucmpw256_mask: 8432 case X86::BI__builtin_ia32_ucmpw512_mask: 8433 case X86::BI__builtin_ia32_ucmpd128_mask: 8434 case X86::BI__builtin_ia32_ucmpd256_mask: 8435 case X86::BI__builtin_ia32_ucmpd512_mask: 8436 case X86::BI__builtin_ia32_ucmpq128_mask: 8437 case X86::BI__builtin_ia32_ucmpq256_mask: 8438 case X86::BI__builtin_ia32_ucmpq512_mask: { 8439 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 8440 return EmitX86MaskedCompare(*this, CC, false, Ops); 8441 } 8442 8443 case X86::BI__builtin_ia32_kandhi: 8444 return EmitX86MaskLogic(*this, Instruction::And, 16, Ops); 8445 case X86::BI__builtin_ia32_kandnhi: 8446 return EmitX86MaskLogic(*this, Instruction::And, 16, Ops, true); 8447 case X86::BI__builtin_ia32_korhi: 8448 return EmitX86MaskLogic(*this, Instruction::Or, 16, Ops); 8449 case X86::BI__builtin_ia32_kxnorhi: 8450 return EmitX86MaskLogic(*this, Instruction::Xor, 16, Ops, true); 8451 case X86::BI__builtin_ia32_kxorhi: 8452 return EmitX86MaskLogic(*this, Instruction::Xor, 16, Ops); 8453 case X86::BI__builtin_ia32_knothi: { 8454 Ops[0] = getMaskVecValue(*this, Ops[0], 16); 8455 return Builder.CreateBitCast(Builder.CreateNot(Ops[0]), 8456 Builder.getInt16Ty()); 8457 } 8458 8459 case X86::BI__builtin_ia32_kunpckdi: 8460 case X86::BI__builtin_ia32_kunpcksi: 8461 case X86::BI__builtin_ia32_kunpckhi: { 8462 unsigned NumElts = Ops[0]->getType()->getScalarSizeInBits(); 8463 Value *LHS = getMaskVecValue(*this, Ops[0], NumElts); 8464 Value *RHS = getMaskVecValue(*this, Ops[1], NumElts); 8465 uint32_t Indices[64]; 8466 for (unsigned i = 0; i != NumElts; ++i) 8467 Indices[i] = i; 8468 8469 // First extract half of each vector. This gives better codegen than 8470 // doing it in a single shuffle. 8471 LHS = Builder.CreateShuffleVector(LHS, LHS, 8472 makeArrayRef(Indices, NumElts / 2)); 8473 RHS = Builder.CreateShuffleVector(RHS, RHS, 8474 makeArrayRef(Indices, NumElts / 2)); 8475 // Concat the vectors. 8476 Value *Res = Builder.CreateShuffleVector(LHS, RHS, 8477 makeArrayRef(Indices, NumElts)); 8478 return Builder.CreateBitCast(Res, Ops[0]->getType()); 8479 } 8480 8481 case X86::BI__builtin_ia32_vplzcntd_128_mask: 8482 case X86::BI__builtin_ia32_vplzcntd_256_mask: 8483 case X86::BI__builtin_ia32_vplzcntd_512_mask: 8484 case X86::BI__builtin_ia32_vplzcntq_128_mask: 8485 case X86::BI__builtin_ia32_vplzcntq_256_mask: 8486 case X86::BI__builtin_ia32_vplzcntq_512_mask: { 8487 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, Ops[0]->getType()); 8488 return EmitX86Select(*this, Ops[2], 8489 Builder.CreateCall(F, {Ops[0],Builder.getInt1(false)}), 8490 Ops[1]); 8491 } 8492 8493 case X86::BI__builtin_ia32_pabsb128: 8494 case X86::BI__builtin_ia32_pabsw128: 8495 case X86::BI__builtin_ia32_pabsd128: 8496 case X86::BI__builtin_ia32_pabsb256: 8497 case X86::BI__builtin_ia32_pabsw256: 8498 case X86::BI__builtin_ia32_pabsd256: 8499 case X86::BI__builtin_ia32_pabsq128_mask: 8500 case X86::BI__builtin_ia32_pabsq256_mask: 8501 case X86::BI__builtin_ia32_pabsb512_mask: 8502 case X86::BI__builtin_ia32_pabsw512_mask: 8503 case X86::BI__builtin_ia32_pabsd512_mask: 8504 case X86::BI__builtin_ia32_pabsq512_mask: 8505 return EmitX86Abs(*this, Ops); 8506 8507 case X86::BI__builtin_ia32_pmaxsb128: 8508 case X86::BI__builtin_ia32_pmaxsw128: 8509 case X86::BI__builtin_ia32_pmaxsd128: 8510 case X86::BI__builtin_ia32_pmaxsq128_mask: 8511 case X86::BI__builtin_ia32_pmaxsb256: 8512 case X86::BI__builtin_ia32_pmaxsw256: 8513 case X86::BI__builtin_ia32_pmaxsd256: 8514 case X86::BI__builtin_ia32_pmaxsq256_mask: 8515 case X86::BI__builtin_ia32_pmaxsb512_mask: 8516 case X86::BI__builtin_ia32_pmaxsw512_mask: 8517 case X86::BI__builtin_ia32_pmaxsd512_mask: 8518 case X86::BI__builtin_ia32_pmaxsq512_mask: 8519 return EmitX86MinMax(*this, ICmpInst::ICMP_SGT, Ops); 8520 case X86::BI__builtin_ia32_pmaxub128: 8521 case X86::BI__builtin_ia32_pmaxuw128: 8522 case X86::BI__builtin_ia32_pmaxud128: 8523 case X86::BI__builtin_ia32_pmaxuq128_mask: 8524 case X86::BI__builtin_ia32_pmaxub256: 8525 case X86::BI__builtin_ia32_pmaxuw256: 8526 case X86::BI__builtin_ia32_pmaxud256: 8527 case X86::BI__builtin_ia32_pmaxuq256_mask: 8528 case X86::BI__builtin_ia32_pmaxub512_mask: 8529 case X86::BI__builtin_ia32_pmaxuw512_mask: 8530 case X86::BI__builtin_ia32_pmaxud512_mask: 8531 case X86::BI__builtin_ia32_pmaxuq512_mask: 8532 return EmitX86MinMax(*this, ICmpInst::ICMP_UGT, Ops); 8533 case X86::BI__builtin_ia32_pminsb128: 8534 case X86::BI__builtin_ia32_pminsw128: 8535 case X86::BI__builtin_ia32_pminsd128: 8536 case X86::BI__builtin_ia32_pminsq128_mask: 8537 case X86::BI__builtin_ia32_pminsb256: 8538 case X86::BI__builtin_ia32_pminsw256: 8539 case X86::BI__builtin_ia32_pminsd256: 8540 case X86::BI__builtin_ia32_pminsq256_mask: 8541 case X86::BI__builtin_ia32_pminsb512_mask: 8542 case X86::BI__builtin_ia32_pminsw512_mask: 8543 case X86::BI__builtin_ia32_pminsd512_mask: 8544 case X86::BI__builtin_ia32_pminsq512_mask: 8545 return EmitX86MinMax(*this, ICmpInst::ICMP_SLT, Ops); 8546 case X86::BI__builtin_ia32_pminub128: 8547 case X86::BI__builtin_ia32_pminuw128: 8548 case X86::BI__builtin_ia32_pminud128: 8549 case X86::BI__builtin_ia32_pminuq128_mask: 8550 case X86::BI__builtin_ia32_pminub256: 8551 case X86::BI__builtin_ia32_pminuw256: 8552 case X86::BI__builtin_ia32_pminud256: 8553 case X86::BI__builtin_ia32_pminuq256_mask: 8554 case X86::BI__builtin_ia32_pminub512_mask: 8555 case X86::BI__builtin_ia32_pminuw512_mask: 8556 case X86::BI__builtin_ia32_pminud512_mask: 8557 case X86::BI__builtin_ia32_pminuq512_mask: 8558 return EmitX86MinMax(*this, ICmpInst::ICMP_ULT, Ops); 8559 8560 // 3DNow! 8561 case X86::BI__builtin_ia32_pswapdsf: 8562 case X86::BI__builtin_ia32_pswapdsi: { 8563 llvm::Type *MMXTy = llvm::Type::getX86_MMXTy(getLLVMContext()); 8564 Ops[0] = Builder.CreateBitCast(Ops[0], MMXTy, "cast"); 8565 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_3dnowa_pswapd); 8566 return Builder.CreateCall(F, Ops, "pswapd"); 8567 } 8568 case X86::BI__builtin_ia32_rdrand16_step: 8569 case X86::BI__builtin_ia32_rdrand32_step: 8570 case X86::BI__builtin_ia32_rdrand64_step: 8571 case X86::BI__builtin_ia32_rdseed16_step: 8572 case X86::BI__builtin_ia32_rdseed32_step: 8573 case X86::BI__builtin_ia32_rdseed64_step: { 8574 Intrinsic::ID ID; 8575 switch (BuiltinID) { 8576 default: llvm_unreachable("Unsupported intrinsic!"); 8577 case X86::BI__builtin_ia32_rdrand16_step: 8578 ID = Intrinsic::x86_rdrand_16; 8579 break; 8580 case X86::BI__builtin_ia32_rdrand32_step: 8581 ID = Intrinsic::x86_rdrand_32; 8582 break; 8583 case X86::BI__builtin_ia32_rdrand64_step: 8584 ID = Intrinsic::x86_rdrand_64; 8585 break; 8586 case X86::BI__builtin_ia32_rdseed16_step: 8587 ID = Intrinsic::x86_rdseed_16; 8588 break; 8589 case X86::BI__builtin_ia32_rdseed32_step: 8590 ID = Intrinsic::x86_rdseed_32; 8591 break; 8592 case X86::BI__builtin_ia32_rdseed64_step: 8593 ID = Intrinsic::x86_rdseed_64; 8594 break; 8595 } 8596 8597 Value *Call = Builder.CreateCall(CGM.getIntrinsic(ID)); 8598 Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 0), 8599 Ops[0]); 8600 return Builder.CreateExtractValue(Call, 1); 8601 } 8602 8603 // SSE packed comparison intrinsics 8604 case X86::BI__builtin_ia32_cmpeqps: 8605 case X86::BI__builtin_ia32_cmpeqpd: 8606 return getVectorFCmpIR(CmpInst::FCMP_OEQ); 8607 case X86::BI__builtin_ia32_cmpltps: 8608 case X86::BI__builtin_ia32_cmpltpd: 8609 return getVectorFCmpIR(CmpInst::FCMP_OLT); 8610 case X86::BI__builtin_ia32_cmpleps: 8611 case X86::BI__builtin_ia32_cmplepd: 8612 return getVectorFCmpIR(CmpInst::FCMP_OLE); 8613 case X86::BI__builtin_ia32_cmpunordps: 8614 case X86::BI__builtin_ia32_cmpunordpd: 8615 return getVectorFCmpIR(CmpInst::FCMP_UNO); 8616 case X86::BI__builtin_ia32_cmpneqps: 8617 case X86::BI__builtin_ia32_cmpneqpd: 8618 return getVectorFCmpIR(CmpInst::FCMP_UNE); 8619 case X86::BI__builtin_ia32_cmpnltps: 8620 case X86::BI__builtin_ia32_cmpnltpd: 8621 return getVectorFCmpIR(CmpInst::FCMP_UGE); 8622 case X86::BI__builtin_ia32_cmpnleps: 8623 case X86::BI__builtin_ia32_cmpnlepd: 8624 return getVectorFCmpIR(CmpInst::FCMP_UGT); 8625 case X86::BI__builtin_ia32_cmpordps: 8626 case X86::BI__builtin_ia32_cmpordpd: 8627 return getVectorFCmpIR(CmpInst::FCMP_ORD); 8628 case X86::BI__builtin_ia32_cmpps: 8629 case X86::BI__builtin_ia32_cmpps256: 8630 case X86::BI__builtin_ia32_cmppd: 8631 case X86::BI__builtin_ia32_cmppd256: { 8632 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 8633 // If this one of the SSE immediates, we can use native IR. 8634 if (CC < 8) { 8635 FCmpInst::Predicate Pred; 8636 switch (CC) { 8637 case 0: Pred = FCmpInst::FCMP_OEQ; break; 8638 case 1: Pred = FCmpInst::FCMP_OLT; break; 8639 case 2: Pred = FCmpInst::FCMP_OLE; break; 8640 case 3: Pred = FCmpInst::FCMP_UNO; break; 8641 case 4: Pred = FCmpInst::FCMP_UNE; break; 8642 case 5: Pred = FCmpInst::FCMP_UGE; break; 8643 case 6: Pred = FCmpInst::FCMP_UGT; break; 8644 case 7: Pred = FCmpInst::FCMP_ORD; break; 8645 } 8646 return getVectorFCmpIR(Pred); 8647 } 8648 8649 // We can't handle 8-31 immediates with native IR, use the intrinsic. 8650 // Except for predicates that create constants. 8651 Intrinsic::ID ID; 8652 switch (BuiltinID) { 8653 default: llvm_unreachable("Unsupported intrinsic!"); 8654 case X86::BI__builtin_ia32_cmpps: 8655 ID = Intrinsic::x86_sse_cmp_ps; 8656 break; 8657 case X86::BI__builtin_ia32_cmpps256: 8658 // _CMP_TRUE_UQ, _CMP_TRUE_US produce -1,-1... vector 8659 // on any input and _CMP_FALSE_OQ, _CMP_FALSE_OS produce 0, 0... 8660 if (CC == 0xf || CC == 0xb || CC == 0x1b || CC == 0x1f) { 8661 Value *Constant = (CC == 0xf || CC == 0x1f) ? 8662 llvm::Constant::getAllOnesValue(Builder.getInt32Ty()) : 8663 llvm::Constant::getNullValue(Builder.getInt32Ty()); 8664 Value *Vec = Builder.CreateVectorSplat( 8665 Ops[0]->getType()->getVectorNumElements(), Constant); 8666 return Builder.CreateBitCast(Vec, Ops[0]->getType()); 8667 } 8668 ID = Intrinsic::x86_avx_cmp_ps_256; 8669 break; 8670 case X86::BI__builtin_ia32_cmppd: 8671 ID = Intrinsic::x86_sse2_cmp_pd; 8672 break; 8673 case X86::BI__builtin_ia32_cmppd256: 8674 // _CMP_TRUE_UQ, _CMP_TRUE_US produce -1,-1... vector 8675 // on any input and _CMP_FALSE_OQ, _CMP_FALSE_OS produce 0, 0... 8676 if (CC == 0xf || CC == 0xb || CC == 0x1b || CC == 0x1f) { 8677 Value *Constant = (CC == 0xf || CC == 0x1f) ? 8678 llvm::Constant::getAllOnesValue(Builder.getInt64Ty()) : 8679 llvm::Constant::getNullValue(Builder.getInt64Ty()); 8680 Value *Vec = Builder.CreateVectorSplat( 8681 Ops[0]->getType()->getVectorNumElements(), Constant); 8682 return Builder.CreateBitCast(Vec, Ops[0]->getType()); 8683 } 8684 ID = Intrinsic::x86_avx_cmp_pd_256; 8685 break; 8686 } 8687 8688 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 8689 } 8690 8691 // SSE scalar comparison intrinsics 8692 case X86::BI__builtin_ia32_cmpeqss: 8693 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 0); 8694 case X86::BI__builtin_ia32_cmpltss: 8695 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 1); 8696 case X86::BI__builtin_ia32_cmpless: 8697 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 2); 8698 case X86::BI__builtin_ia32_cmpunordss: 8699 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 3); 8700 case X86::BI__builtin_ia32_cmpneqss: 8701 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 4); 8702 case X86::BI__builtin_ia32_cmpnltss: 8703 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 5); 8704 case X86::BI__builtin_ia32_cmpnless: 8705 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 6); 8706 case X86::BI__builtin_ia32_cmpordss: 8707 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 7); 8708 case X86::BI__builtin_ia32_cmpeqsd: 8709 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 0); 8710 case X86::BI__builtin_ia32_cmpltsd: 8711 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 1); 8712 case X86::BI__builtin_ia32_cmplesd: 8713 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 2); 8714 case X86::BI__builtin_ia32_cmpunordsd: 8715 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 3); 8716 case X86::BI__builtin_ia32_cmpneqsd: 8717 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 4); 8718 case X86::BI__builtin_ia32_cmpnltsd: 8719 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 5); 8720 case X86::BI__builtin_ia32_cmpnlesd: 8721 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 6); 8722 case X86::BI__builtin_ia32_cmpordsd: 8723 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 7); 8724 8725 case X86::BI__emul: 8726 case X86::BI__emulu: { 8727 llvm::Type *Int64Ty = llvm::IntegerType::get(getLLVMContext(), 64); 8728 bool isSigned = (BuiltinID == X86::BI__emul); 8729 Value *LHS = Builder.CreateIntCast(Ops[0], Int64Ty, isSigned); 8730 Value *RHS = Builder.CreateIntCast(Ops[1], Int64Ty, isSigned); 8731 return Builder.CreateMul(LHS, RHS, "", !isSigned, isSigned); 8732 } 8733 case X86::BI__mulh: 8734 case X86::BI__umulh: 8735 case X86::BI_mul128: 8736 case X86::BI_umul128: { 8737 llvm::Type *ResType = ConvertType(E->getType()); 8738 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 8739 8740 bool IsSigned = (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI_mul128); 8741 Value *LHS = Builder.CreateIntCast(Ops[0], Int128Ty, IsSigned); 8742 Value *RHS = Builder.CreateIntCast(Ops[1], Int128Ty, IsSigned); 8743 8744 Value *MulResult, *HigherBits; 8745 if (IsSigned) { 8746 MulResult = Builder.CreateNSWMul(LHS, RHS); 8747 HigherBits = Builder.CreateAShr(MulResult, 64); 8748 } else { 8749 MulResult = Builder.CreateNUWMul(LHS, RHS); 8750 HigherBits = Builder.CreateLShr(MulResult, 64); 8751 } 8752 HigherBits = Builder.CreateIntCast(HigherBits, ResType, IsSigned); 8753 8754 if (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI__umulh) 8755 return HigherBits; 8756 8757 Address HighBitsAddress = EmitPointerWithAlignment(E->getArg(2)); 8758 Builder.CreateStore(HigherBits, HighBitsAddress); 8759 return Builder.CreateIntCast(MulResult, ResType, IsSigned); 8760 } 8761 8762 case X86::BI__faststorefence: { 8763 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 8764 llvm::SyncScope::System); 8765 } 8766 case X86::BI_ReadWriteBarrier: 8767 case X86::BI_ReadBarrier: 8768 case X86::BI_WriteBarrier: { 8769 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 8770 llvm::SyncScope::SingleThread); 8771 } 8772 case X86::BI_BitScanForward: 8773 case X86::BI_BitScanForward64: 8774 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 8775 case X86::BI_BitScanReverse: 8776 case X86::BI_BitScanReverse64: 8777 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 8778 8779 case X86::BI_InterlockedAnd64: 8780 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 8781 case X86::BI_InterlockedExchange64: 8782 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 8783 case X86::BI_InterlockedExchangeAdd64: 8784 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 8785 case X86::BI_InterlockedExchangeSub64: 8786 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 8787 case X86::BI_InterlockedOr64: 8788 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 8789 case X86::BI_InterlockedXor64: 8790 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 8791 case X86::BI_InterlockedDecrement64: 8792 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 8793 case X86::BI_InterlockedIncrement64: 8794 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 8795 case X86::BI_InterlockedCompareExchange128: { 8796 // InterlockedCompareExchange128 doesn't directly refer to 128bit ints, 8797 // instead it takes pointers to 64bit ints for Destination and 8798 // ComparandResult, and exchange is taken as two 64bit ints (high & low). 8799 // The previous value is written to ComparandResult, and success is 8800 // returned. 8801 8802 llvm::Type *Int128Ty = Builder.getInt128Ty(); 8803 llvm::Type *Int128PtrTy = Int128Ty->getPointerTo(); 8804 8805 Value *Destination = 8806 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PtrTy); 8807 Value *ExchangeHigh128 = 8808 Builder.CreateZExt(EmitScalarExpr(E->getArg(1)), Int128Ty); 8809 Value *ExchangeLow128 = 8810 Builder.CreateZExt(EmitScalarExpr(E->getArg(2)), Int128Ty); 8811 Address ComparandResult( 8812 Builder.CreateBitCast(EmitScalarExpr(E->getArg(3)), Int128PtrTy), 8813 getContext().toCharUnitsFromBits(128)); 8814 8815 Value *Exchange = Builder.CreateOr( 8816 Builder.CreateShl(ExchangeHigh128, 64, "", false, false), 8817 ExchangeLow128); 8818 8819 Value *Comparand = Builder.CreateLoad(ComparandResult); 8820 8821 AtomicCmpXchgInst *CXI = 8822 Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 8823 AtomicOrdering::SequentiallyConsistent, 8824 AtomicOrdering::SequentiallyConsistent); 8825 CXI->setVolatile(true); 8826 8827 // Write the result back to the inout pointer. 8828 Builder.CreateStore(Builder.CreateExtractValue(CXI, 0), ComparandResult); 8829 8830 // Get the success boolean and zero extend it to i8. 8831 Value *Success = Builder.CreateExtractValue(CXI, 1); 8832 return Builder.CreateZExt(Success, ConvertType(E->getType())); 8833 } 8834 8835 case X86::BI_AddressOfReturnAddress: { 8836 Value *F = CGM.getIntrinsic(Intrinsic::addressofreturnaddress); 8837 return Builder.CreateCall(F); 8838 } 8839 case X86::BI__stosb: { 8840 // We treat __stosb as a volatile memset - it may not generate "rep stosb" 8841 // instruction, but it will create a memset that won't be optimized away. 8842 return Builder.CreateMemSet(Ops[0], Ops[1], Ops[2], 1, true); 8843 } 8844 case X86::BI__ud2: 8845 // llvm.trap makes a ud2a instruction on x86. 8846 return EmitTrapCall(Intrinsic::trap); 8847 case X86::BI__int2c: { 8848 // This syscall signals a driver assertion failure in x86 NT kernels. 8849 llvm::FunctionType *FTy = llvm::FunctionType::get(VoidTy, false); 8850 llvm::InlineAsm *IA = 8851 llvm::InlineAsm::get(FTy, "int $$0x2c", "", /*SideEffects=*/true); 8852 llvm::AttributeList NoReturnAttr = llvm::AttributeList::get( 8853 getLLVMContext(), llvm::AttributeList::FunctionIndex, 8854 llvm::Attribute::NoReturn); 8855 CallSite CS = Builder.CreateCall(IA); 8856 CS.setAttributes(NoReturnAttr); 8857 return CS.getInstruction(); 8858 } 8859 case X86::BI__readfsbyte: 8860 case X86::BI__readfsword: 8861 case X86::BI__readfsdword: 8862 case X86::BI__readfsqword: { 8863 llvm::Type *IntTy = ConvertType(E->getType()); 8864 Value *Ptr = Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)), 8865 llvm::PointerType::get(IntTy, 257)); 8866 LoadInst *Load = Builder.CreateAlignedLoad( 8867 IntTy, Ptr, getContext().getTypeAlignInChars(E->getType())); 8868 Load->setVolatile(true); 8869 return Load; 8870 } 8871 case X86::BI__readgsbyte: 8872 case X86::BI__readgsword: 8873 case X86::BI__readgsdword: 8874 case X86::BI__readgsqword: { 8875 llvm::Type *IntTy = ConvertType(E->getType()); 8876 Value *Ptr = Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)), 8877 llvm::PointerType::get(IntTy, 256)); 8878 LoadInst *Load = Builder.CreateAlignedLoad( 8879 IntTy, Ptr, getContext().getTypeAlignInChars(E->getType())); 8880 Load->setVolatile(true); 8881 return Load; 8882 } 8883 } 8884 } 8885 8886 8887 Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, 8888 const CallExpr *E) { 8889 SmallVector<Value*, 4> Ops; 8890 8891 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) 8892 Ops.push_back(EmitScalarExpr(E->getArg(i))); 8893 8894 Intrinsic::ID ID = Intrinsic::not_intrinsic; 8895 8896 switch (BuiltinID) { 8897 default: return nullptr; 8898 8899 // __builtin_ppc_get_timebase is GCC 4.8+'s PowerPC-specific name for what we 8900 // call __builtin_readcyclecounter. 8901 case PPC::BI__builtin_ppc_get_timebase: 8902 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::readcyclecounter)); 8903 8904 // vec_ld, vec_xl_be, vec_lvsl, vec_lvsr 8905 case PPC::BI__builtin_altivec_lvx: 8906 case PPC::BI__builtin_altivec_lvxl: 8907 case PPC::BI__builtin_altivec_lvebx: 8908 case PPC::BI__builtin_altivec_lvehx: 8909 case PPC::BI__builtin_altivec_lvewx: 8910 case PPC::BI__builtin_altivec_lvsl: 8911 case PPC::BI__builtin_altivec_lvsr: 8912 case PPC::BI__builtin_vsx_lxvd2x: 8913 case PPC::BI__builtin_vsx_lxvw4x: 8914 case PPC::BI__builtin_vsx_lxvd2x_be: 8915 case PPC::BI__builtin_vsx_lxvw4x_be: 8916 case PPC::BI__builtin_vsx_lxvl: 8917 case PPC::BI__builtin_vsx_lxvll: 8918 { 8919 if(BuiltinID == PPC::BI__builtin_vsx_lxvl || 8920 BuiltinID == PPC::BI__builtin_vsx_lxvll){ 8921 Ops[0] = Builder.CreateBitCast(Ops[0], Int8PtrTy); 8922 }else { 8923 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 8924 Ops[0] = Builder.CreateGEP(Ops[1], Ops[0]); 8925 Ops.pop_back(); 8926 } 8927 8928 switch (BuiltinID) { 8929 default: llvm_unreachable("Unsupported ld/lvsl/lvsr intrinsic!"); 8930 case PPC::BI__builtin_altivec_lvx: 8931 ID = Intrinsic::ppc_altivec_lvx; 8932 break; 8933 case PPC::BI__builtin_altivec_lvxl: 8934 ID = Intrinsic::ppc_altivec_lvxl; 8935 break; 8936 case PPC::BI__builtin_altivec_lvebx: 8937 ID = Intrinsic::ppc_altivec_lvebx; 8938 break; 8939 case PPC::BI__builtin_altivec_lvehx: 8940 ID = Intrinsic::ppc_altivec_lvehx; 8941 break; 8942 case PPC::BI__builtin_altivec_lvewx: 8943 ID = Intrinsic::ppc_altivec_lvewx; 8944 break; 8945 case PPC::BI__builtin_altivec_lvsl: 8946 ID = Intrinsic::ppc_altivec_lvsl; 8947 break; 8948 case PPC::BI__builtin_altivec_lvsr: 8949 ID = Intrinsic::ppc_altivec_lvsr; 8950 break; 8951 case PPC::BI__builtin_vsx_lxvd2x: 8952 ID = Intrinsic::ppc_vsx_lxvd2x; 8953 break; 8954 case PPC::BI__builtin_vsx_lxvw4x: 8955 ID = Intrinsic::ppc_vsx_lxvw4x; 8956 break; 8957 case PPC::BI__builtin_vsx_lxvd2x_be: 8958 ID = Intrinsic::ppc_vsx_lxvd2x_be; 8959 break; 8960 case PPC::BI__builtin_vsx_lxvw4x_be: 8961 ID = Intrinsic::ppc_vsx_lxvw4x_be; 8962 break; 8963 case PPC::BI__builtin_vsx_lxvl: 8964 ID = Intrinsic::ppc_vsx_lxvl; 8965 break; 8966 case PPC::BI__builtin_vsx_lxvll: 8967 ID = Intrinsic::ppc_vsx_lxvll; 8968 break; 8969 } 8970 llvm::Function *F = CGM.getIntrinsic(ID); 8971 return Builder.CreateCall(F, Ops, ""); 8972 } 8973 8974 // vec_st, vec_xst_be 8975 case PPC::BI__builtin_altivec_stvx: 8976 case PPC::BI__builtin_altivec_stvxl: 8977 case PPC::BI__builtin_altivec_stvebx: 8978 case PPC::BI__builtin_altivec_stvehx: 8979 case PPC::BI__builtin_altivec_stvewx: 8980 case PPC::BI__builtin_vsx_stxvd2x: 8981 case PPC::BI__builtin_vsx_stxvw4x: 8982 case PPC::BI__builtin_vsx_stxvd2x_be: 8983 case PPC::BI__builtin_vsx_stxvw4x_be: 8984 case PPC::BI__builtin_vsx_stxvl: 8985 case PPC::BI__builtin_vsx_stxvll: 8986 { 8987 if(BuiltinID == PPC::BI__builtin_vsx_stxvl || 8988 BuiltinID == PPC::BI__builtin_vsx_stxvll ){ 8989 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 8990 }else { 8991 Ops[2] = Builder.CreateBitCast(Ops[2], Int8PtrTy); 8992 Ops[1] = Builder.CreateGEP(Ops[2], Ops[1]); 8993 Ops.pop_back(); 8994 } 8995 8996 switch (BuiltinID) { 8997 default: llvm_unreachable("Unsupported st intrinsic!"); 8998 case PPC::BI__builtin_altivec_stvx: 8999 ID = Intrinsic::ppc_altivec_stvx; 9000 break; 9001 case PPC::BI__builtin_altivec_stvxl: 9002 ID = Intrinsic::ppc_altivec_stvxl; 9003 break; 9004 case PPC::BI__builtin_altivec_stvebx: 9005 ID = Intrinsic::ppc_altivec_stvebx; 9006 break; 9007 case PPC::BI__builtin_altivec_stvehx: 9008 ID = Intrinsic::ppc_altivec_stvehx; 9009 break; 9010 case PPC::BI__builtin_altivec_stvewx: 9011 ID = Intrinsic::ppc_altivec_stvewx; 9012 break; 9013 case PPC::BI__builtin_vsx_stxvd2x: 9014 ID = Intrinsic::ppc_vsx_stxvd2x; 9015 break; 9016 case PPC::BI__builtin_vsx_stxvw4x: 9017 ID = Intrinsic::ppc_vsx_stxvw4x; 9018 break; 9019 case PPC::BI__builtin_vsx_stxvd2x_be: 9020 ID = Intrinsic::ppc_vsx_stxvd2x_be; 9021 break; 9022 case PPC::BI__builtin_vsx_stxvw4x_be: 9023 ID = Intrinsic::ppc_vsx_stxvw4x_be; 9024 break; 9025 case PPC::BI__builtin_vsx_stxvl: 9026 ID = Intrinsic::ppc_vsx_stxvl; 9027 break; 9028 case PPC::BI__builtin_vsx_stxvll: 9029 ID = Intrinsic::ppc_vsx_stxvll; 9030 break; 9031 } 9032 llvm::Function *F = CGM.getIntrinsic(ID); 9033 return Builder.CreateCall(F, Ops, ""); 9034 } 9035 // Square root 9036 case PPC::BI__builtin_vsx_xvsqrtsp: 9037 case PPC::BI__builtin_vsx_xvsqrtdp: { 9038 llvm::Type *ResultType = ConvertType(E->getType()); 9039 Value *X = EmitScalarExpr(E->getArg(0)); 9040 ID = Intrinsic::sqrt; 9041 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 9042 return Builder.CreateCall(F, X); 9043 } 9044 // Count leading zeros 9045 case PPC::BI__builtin_altivec_vclzb: 9046 case PPC::BI__builtin_altivec_vclzh: 9047 case PPC::BI__builtin_altivec_vclzw: 9048 case PPC::BI__builtin_altivec_vclzd: { 9049 llvm::Type *ResultType = ConvertType(E->getType()); 9050 Value *X = EmitScalarExpr(E->getArg(0)); 9051 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 9052 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 9053 return Builder.CreateCall(F, {X, Undef}); 9054 } 9055 case PPC::BI__builtin_altivec_vctzb: 9056 case PPC::BI__builtin_altivec_vctzh: 9057 case PPC::BI__builtin_altivec_vctzw: 9058 case PPC::BI__builtin_altivec_vctzd: { 9059 llvm::Type *ResultType = ConvertType(E->getType()); 9060 Value *X = EmitScalarExpr(E->getArg(0)); 9061 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 9062 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 9063 return Builder.CreateCall(F, {X, Undef}); 9064 } 9065 case PPC::BI__builtin_altivec_vpopcntb: 9066 case PPC::BI__builtin_altivec_vpopcnth: 9067 case PPC::BI__builtin_altivec_vpopcntw: 9068 case PPC::BI__builtin_altivec_vpopcntd: { 9069 llvm::Type *ResultType = ConvertType(E->getType()); 9070 Value *X = EmitScalarExpr(E->getArg(0)); 9071 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 9072 return Builder.CreateCall(F, X); 9073 } 9074 // Copy sign 9075 case PPC::BI__builtin_vsx_xvcpsgnsp: 9076 case PPC::BI__builtin_vsx_xvcpsgndp: { 9077 llvm::Type *ResultType = ConvertType(E->getType()); 9078 Value *X = EmitScalarExpr(E->getArg(0)); 9079 Value *Y = EmitScalarExpr(E->getArg(1)); 9080 ID = Intrinsic::copysign; 9081 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 9082 return Builder.CreateCall(F, {X, Y}); 9083 } 9084 // Rounding/truncation 9085 case PPC::BI__builtin_vsx_xvrspip: 9086 case PPC::BI__builtin_vsx_xvrdpip: 9087 case PPC::BI__builtin_vsx_xvrdpim: 9088 case PPC::BI__builtin_vsx_xvrspim: 9089 case PPC::BI__builtin_vsx_xvrdpi: 9090 case PPC::BI__builtin_vsx_xvrspi: 9091 case PPC::BI__builtin_vsx_xvrdpic: 9092 case PPC::BI__builtin_vsx_xvrspic: 9093 case PPC::BI__builtin_vsx_xvrdpiz: 9094 case PPC::BI__builtin_vsx_xvrspiz: { 9095 llvm::Type *ResultType = ConvertType(E->getType()); 9096 Value *X = EmitScalarExpr(E->getArg(0)); 9097 if (BuiltinID == PPC::BI__builtin_vsx_xvrdpim || 9098 BuiltinID == PPC::BI__builtin_vsx_xvrspim) 9099 ID = Intrinsic::floor; 9100 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpi || 9101 BuiltinID == PPC::BI__builtin_vsx_xvrspi) 9102 ID = Intrinsic::round; 9103 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpic || 9104 BuiltinID == PPC::BI__builtin_vsx_xvrspic) 9105 ID = Intrinsic::nearbyint; 9106 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpip || 9107 BuiltinID == PPC::BI__builtin_vsx_xvrspip) 9108 ID = Intrinsic::ceil; 9109 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpiz || 9110 BuiltinID == PPC::BI__builtin_vsx_xvrspiz) 9111 ID = Intrinsic::trunc; 9112 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 9113 return Builder.CreateCall(F, X); 9114 } 9115 9116 // Absolute value 9117 case PPC::BI__builtin_vsx_xvabsdp: 9118 case PPC::BI__builtin_vsx_xvabssp: { 9119 llvm::Type *ResultType = ConvertType(E->getType()); 9120 Value *X = EmitScalarExpr(E->getArg(0)); 9121 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 9122 return Builder.CreateCall(F, X); 9123 } 9124 9125 // FMA variations 9126 case PPC::BI__builtin_vsx_xvmaddadp: 9127 case PPC::BI__builtin_vsx_xvmaddasp: 9128 case PPC::BI__builtin_vsx_xvnmaddadp: 9129 case PPC::BI__builtin_vsx_xvnmaddasp: 9130 case PPC::BI__builtin_vsx_xvmsubadp: 9131 case PPC::BI__builtin_vsx_xvmsubasp: 9132 case PPC::BI__builtin_vsx_xvnmsubadp: 9133 case PPC::BI__builtin_vsx_xvnmsubasp: { 9134 llvm::Type *ResultType = ConvertType(E->getType()); 9135 Value *X = EmitScalarExpr(E->getArg(0)); 9136 Value *Y = EmitScalarExpr(E->getArg(1)); 9137 Value *Z = EmitScalarExpr(E->getArg(2)); 9138 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 9139 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 9140 switch (BuiltinID) { 9141 case PPC::BI__builtin_vsx_xvmaddadp: 9142 case PPC::BI__builtin_vsx_xvmaddasp: 9143 return Builder.CreateCall(F, {X, Y, Z}); 9144 case PPC::BI__builtin_vsx_xvnmaddadp: 9145 case PPC::BI__builtin_vsx_xvnmaddasp: 9146 return Builder.CreateFSub(Zero, 9147 Builder.CreateCall(F, {X, Y, Z}), "sub"); 9148 case PPC::BI__builtin_vsx_xvmsubadp: 9149 case PPC::BI__builtin_vsx_xvmsubasp: 9150 return Builder.CreateCall(F, 9151 {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 9152 case PPC::BI__builtin_vsx_xvnmsubadp: 9153 case PPC::BI__builtin_vsx_xvnmsubasp: 9154 Value *FsubRes = 9155 Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 9156 return Builder.CreateFSub(Zero, FsubRes, "sub"); 9157 } 9158 llvm_unreachable("Unknown FMA operation"); 9159 return nullptr; // Suppress no-return warning 9160 } 9161 9162 case PPC::BI__builtin_vsx_insertword: { 9163 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_vsx_xxinsertw); 9164 9165 // Third argument is a compile time constant int. It must be clamped to 9166 // to the range [0, 12]. 9167 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[2]); 9168 assert(ArgCI && 9169 "Third arg to xxinsertw intrinsic must be constant integer"); 9170 const int64_t MaxIndex = 12; 9171 int64_t Index = clamp(ArgCI->getSExtValue(), 0, MaxIndex); 9172 9173 // The builtin semantics don't exactly match the xxinsertw instructions 9174 // semantics (which ppc_vsx_xxinsertw follows). The builtin extracts the 9175 // word from the first argument, and inserts it in the second argument. The 9176 // instruction extracts the word from its second input register and inserts 9177 // it into its first input register, so swap the first and second arguments. 9178 std::swap(Ops[0], Ops[1]); 9179 9180 // Need to cast the second argument from a vector of unsigned int to a 9181 // vector of long long. 9182 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int64Ty, 2)); 9183 9184 if (getTarget().isLittleEndian()) { 9185 // Create a shuffle mask of (1, 0) 9186 Constant *ShuffleElts[2] = { ConstantInt::get(Int32Ty, 1), 9187 ConstantInt::get(Int32Ty, 0) 9188 }; 9189 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 9190 9191 // Reverse the double words in the vector we will extract from. 9192 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 9193 Ops[0] = Builder.CreateShuffleVector(Ops[0], Ops[0], ShuffleMask); 9194 9195 // Reverse the index. 9196 Index = MaxIndex - Index; 9197 } 9198 9199 // Intrinsic expects the first arg to be a vector of int. 9200 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 9201 Ops[2] = ConstantInt::getSigned(Int32Ty, Index); 9202 return Builder.CreateCall(F, Ops); 9203 } 9204 9205 case PPC::BI__builtin_vsx_extractuword: { 9206 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_vsx_xxextractuw); 9207 9208 // Intrinsic expects the first argument to be a vector of doublewords. 9209 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 9210 9211 // The second argument is a compile time constant int that needs to 9212 // be clamped to the range [0, 12]. 9213 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[1]); 9214 assert(ArgCI && 9215 "Second Arg to xxextractuw intrinsic must be a constant integer!"); 9216 const int64_t MaxIndex = 12; 9217 int64_t Index = clamp(ArgCI->getSExtValue(), 0, MaxIndex); 9218 9219 if (getTarget().isLittleEndian()) { 9220 // Reverse the index. 9221 Index = MaxIndex - Index; 9222 Ops[1] = ConstantInt::getSigned(Int32Ty, Index); 9223 9224 // Emit the call, then reverse the double words of the results vector. 9225 Value *Call = Builder.CreateCall(F, Ops); 9226 9227 // Create a shuffle mask of (1, 0) 9228 Constant *ShuffleElts[2] = { ConstantInt::get(Int32Ty, 1), 9229 ConstantInt::get(Int32Ty, 0) 9230 }; 9231 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 9232 9233 Value *ShuffleCall = Builder.CreateShuffleVector(Call, Call, ShuffleMask); 9234 return ShuffleCall; 9235 } else { 9236 Ops[1] = ConstantInt::getSigned(Int32Ty, Index); 9237 return Builder.CreateCall(F, Ops); 9238 } 9239 } 9240 9241 case PPC::BI__builtin_vsx_xxpermdi: { 9242 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[2]); 9243 assert(ArgCI && "Third arg must be constant integer!"); 9244 9245 unsigned Index = ArgCI->getZExtValue(); 9246 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 9247 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int64Ty, 2)); 9248 9249 // Element zero comes from the first input vector and element one comes from 9250 // the second. The element indices within each vector are numbered in big 9251 // endian order so the shuffle mask must be adjusted for this on little 9252 // endian platforms (i.e. index is complemented and source vector reversed). 9253 unsigned ElemIdx0; 9254 unsigned ElemIdx1; 9255 if (getTarget().isLittleEndian()) { 9256 ElemIdx0 = (~Index & 1) + 2; 9257 ElemIdx1 = (~Index & 2) >> 1; 9258 } else { // BigEndian 9259 ElemIdx0 = (Index & 2) >> 1; 9260 ElemIdx1 = 2 + (Index & 1); 9261 } 9262 9263 Constant *ShuffleElts[2] = {ConstantInt::get(Int32Ty, ElemIdx0), 9264 ConstantInt::get(Int32Ty, ElemIdx1)}; 9265 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 9266 9267 Value *ShuffleCall = 9268 Builder.CreateShuffleVector(Ops[0], Ops[1], ShuffleMask); 9269 QualType BIRetType = E->getType(); 9270 auto RetTy = ConvertType(BIRetType); 9271 return Builder.CreateBitCast(ShuffleCall, RetTy); 9272 } 9273 9274 case PPC::BI__builtin_vsx_xxsldwi: { 9275 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[2]); 9276 assert(ArgCI && "Third argument must be a compile time constant"); 9277 unsigned Index = ArgCI->getZExtValue() & 0x3; 9278 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 9279 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int32Ty, 4)); 9280 9281 // Create a shuffle mask 9282 unsigned ElemIdx0; 9283 unsigned ElemIdx1; 9284 unsigned ElemIdx2; 9285 unsigned ElemIdx3; 9286 if (getTarget().isLittleEndian()) { 9287 // Little endian element N comes from element 8+N-Index of the 9288 // concatenated wide vector (of course, using modulo arithmetic on 9289 // the total number of elements). 9290 ElemIdx0 = (8 - Index) % 8; 9291 ElemIdx1 = (9 - Index) % 8; 9292 ElemIdx2 = (10 - Index) % 8; 9293 ElemIdx3 = (11 - Index) % 8; 9294 } else { 9295 // Big endian ElemIdx<N> = Index + N 9296 ElemIdx0 = Index; 9297 ElemIdx1 = Index + 1; 9298 ElemIdx2 = Index + 2; 9299 ElemIdx3 = Index + 3; 9300 } 9301 9302 Constant *ShuffleElts[4] = {ConstantInt::get(Int32Ty, ElemIdx0), 9303 ConstantInt::get(Int32Ty, ElemIdx1), 9304 ConstantInt::get(Int32Ty, ElemIdx2), 9305 ConstantInt::get(Int32Ty, ElemIdx3)}; 9306 9307 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 9308 Value *ShuffleCall = 9309 Builder.CreateShuffleVector(Ops[0], Ops[1], ShuffleMask); 9310 QualType BIRetType = E->getType(); 9311 auto RetTy = ConvertType(BIRetType); 9312 return Builder.CreateBitCast(ShuffleCall, RetTy); 9313 } 9314 } 9315 } 9316 9317 Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID, 9318 const CallExpr *E) { 9319 switch (BuiltinID) { 9320 case AMDGPU::BI__builtin_amdgcn_div_scale: 9321 case AMDGPU::BI__builtin_amdgcn_div_scalef: { 9322 // Translate from the intrinsics's struct return to the builtin's out 9323 // argument. 9324 9325 Address FlagOutPtr = EmitPointerWithAlignment(E->getArg(3)); 9326 9327 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 9328 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 9329 llvm::Value *Z = EmitScalarExpr(E->getArg(2)); 9330 9331 llvm::Value *Callee = CGM.getIntrinsic(Intrinsic::amdgcn_div_scale, 9332 X->getType()); 9333 9334 llvm::Value *Tmp = Builder.CreateCall(Callee, {X, Y, Z}); 9335 9336 llvm::Value *Result = Builder.CreateExtractValue(Tmp, 0); 9337 llvm::Value *Flag = Builder.CreateExtractValue(Tmp, 1); 9338 9339 llvm::Type *RealFlagType 9340 = FlagOutPtr.getPointer()->getType()->getPointerElementType(); 9341 9342 llvm::Value *FlagExt = Builder.CreateZExt(Flag, RealFlagType); 9343 Builder.CreateStore(FlagExt, FlagOutPtr); 9344 return Result; 9345 } 9346 case AMDGPU::BI__builtin_amdgcn_div_fmas: 9347 case AMDGPU::BI__builtin_amdgcn_div_fmasf: { 9348 llvm::Value *Src0 = EmitScalarExpr(E->getArg(0)); 9349 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); 9350 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); 9351 llvm::Value *Src3 = EmitScalarExpr(E->getArg(3)); 9352 9353 llvm::Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_div_fmas, 9354 Src0->getType()); 9355 llvm::Value *Src3ToBool = Builder.CreateIsNotNull(Src3); 9356 return Builder.CreateCall(F, {Src0, Src1, Src2, Src3ToBool}); 9357 } 9358 9359 case AMDGPU::BI__builtin_amdgcn_ds_swizzle: 9360 return emitBinaryBuiltin(*this, E, Intrinsic::amdgcn_ds_swizzle); 9361 case AMDGPU::BI__builtin_amdgcn_mov_dpp: { 9362 llvm::SmallVector<llvm::Value *, 5> Args; 9363 for (unsigned I = 0; I != 5; ++I) 9364 Args.push_back(EmitScalarExpr(E->getArg(I))); 9365 Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_mov_dpp, 9366 Args[0]->getType()); 9367 return Builder.CreateCall(F, Args); 9368 } 9369 case AMDGPU::BI__builtin_amdgcn_div_fixup: 9370 case AMDGPU::BI__builtin_amdgcn_div_fixupf: 9371 case AMDGPU::BI__builtin_amdgcn_div_fixuph: 9372 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_div_fixup); 9373 case AMDGPU::BI__builtin_amdgcn_trig_preop: 9374 case AMDGPU::BI__builtin_amdgcn_trig_preopf: 9375 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_trig_preop); 9376 case AMDGPU::BI__builtin_amdgcn_rcp: 9377 case AMDGPU::BI__builtin_amdgcn_rcpf: 9378 case AMDGPU::BI__builtin_amdgcn_rcph: 9379 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rcp); 9380 case AMDGPU::BI__builtin_amdgcn_rsq: 9381 case AMDGPU::BI__builtin_amdgcn_rsqf: 9382 case AMDGPU::BI__builtin_amdgcn_rsqh: 9383 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq); 9384 case AMDGPU::BI__builtin_amdgcn_rsq_clamp: 9385 case AMDGPU::BI__builtin_amdgcn_rsq_clampf: 9386 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq_clamp); 9387 case AMDGPU::BI__builtin_amdgcn_sinf: 9388 case AMDGPU::BI__builtin_amdgcn_sinh: 9389 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_sin); 9390 case AMDGPU::BI__builtin_amdgcn_cosf: 9391 case AMDGPU::BI__builtin_amdgcn_cosh: 9392 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_cos); 9393 case AMDGPU::BI__builtin_amdgcn_log_clampf: 9394 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_log_clamp); 9395 case AMDGPU::BI__builtin_amdgcn_ldexp: 9396 case AMDGPU::BI__builtin_amdgcn_ldexpf: 9397 case AMDGPU::BI__builtin_amdgcn_ldexph: 9398 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_ldexp); 9399 case AMDGPU::BI__builtin_amdgcn_frexp_mant: 9400 case AMDGPU::BI__builtin_amdgcn_frexp_mantf: 9401 case AMDGPU::BI__builtin_amdgcn_frexp_manth: 9402 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_frexp_mant); 9403 case AMDGPU::BI__builtin_amdgcn_frexp_exp: 9404 case AMDGPU::BI__builtin_amdgcn_frexp_expf: { 9405 Value *Src0 = EmitScalarExpr(E->getArg(0)); 9406 Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_frexp_exp, 9407 { Builder.getInt32Ty(), Src0->getType() }); 9408 return Builder.CreateCall(F, Src0); 9409 } 9410 case AMDGPU::BI__builtin_amdgcn_frexp_exph: { 9411 Value *Src0 = EmitScalarExpr(E->getArg(0)); 9412 Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_frexp_exp, 9413 { Builder.getInt16Ty(), Src0->getType() }); 9414 return Builder.CreateCall(F, Src0); 9415 } 9416 case AMDGPU::BI__builtin_amdgcn_fract: 9417 case AMDGPU::BI__builtin_amdgcn_fractf: 9418 case AMDGPU::BI__builtin_amdgcn_fracth: 9419 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_fract); 9420 case AMDGPU::BI__builtin_amdgcn_lerp: 9421 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_lerp); 9422 case AMDGPU::BI__builtin_amdgcn_uicmp: 9423 case AMDGPU::BI__builtin_amdgcn_uicmpl: 9424 case AMDGPU::BI__builtin_amdgcn_sicmp: 9425 case AMDGPU::BI__builtin_amdgcn_sicmpl: 9426 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_icmp); 9427 case AMDGPU::BI__builtin_amdgcn_fcmp: 9428 case AMDGPU::BI__builtin_amdgcn_fcmpf: 9429 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_fcmp); 9430 case AMDGPU::BI__builtin_amdgcn_class: 9431 case AMDGPU::BI__builtin_amdgcn_classf: 9432 case AMDGPU::BI__builtin_amdgcn_classh: 9433 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_class); 9434 case AMDGPU::BI__builtin_amdgcn_fmed3f: 9435 case AMDGPU::BI__builtin_amdgcn_fmed3h: 9436 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_fmed3); 9437 case AMDGPU::BI__builtin_amdgcn_read_exec: { 9438 CallInst *CI = cast<CallInst>( 9439 EmitSpecialRegisterBuiltin(*this, E, Int64Ty, Int64Ty, true, "exec")); 9440 CI->setConvergent(); 9441 return CI; 9442 } 9443 case AMDGPU::BI__builtin_amdgcn_read_exec_lo: 9444 case AMDGPU::BI__builtin_amdgcn_read_exec_hi: { 9445 StringRef RegName = BuiltinID == AMDGPU::BI__builtin_amdgcn_read_exec_lo ? 9446 "exec_lo" : "exec_hi"; 9447 CallInst *CI = cast<CallInst>( 9448 EmitSpecialRegisterBuiltin(*this, E, Int32Ty, Int32Ty, true, RegName)); 9449 CI->setConvergent(); 9450 return CI; 9451 } 9452 9453 // amdgcn workitem 9454 case AMDGPU::BI__builtin_amdgcn_workitem_id_x: 9455 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_x, 0, 1024); 9456 case AMDGPU::BI__builtin_amdgcn_workitem_id_y: 9457 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_y, 0, 1024); 9458 case AMDGPU::BI__builtin_amdgcn_workitem_id_z: 9459 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_z, 0, 1024); 9460 9461 // r600 intrinsics 9462 case AMDGPU::BI__builtin_r600_recipsqrt_ieee: 9463 case AMDGPU::BI__builtin_r600_recipsqrt_ieeef: 9464 return emitUnaryBuiltin(*this, E, Intrinsic::r600_recipsqrt_ieee); 9465 case AMDGPU::BI__builtin_r600_read_tidig_x: 9466 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_x, 0, 1024); 9467 case AMDGPU::BI__builtin_r600_read_tidig_y: 9468 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_y, 0, 1024); 9469 case AMDGPU::BI__builtin_r600_read_tidig_z: 9470 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_z, 0, 1024); 9471 default: 9472 return nullptr; 9473 } 9474 } 9475 9476 /// Handle a SystemZ function in which the final argument is a pointer 9477 /// to an int that receives the post-instruction CC value. At the LLVM level 9478 /// this is represented as a function that returns a {result, cc} pair. 9479 static Value *EmitSystemZIntrinsicWithCC(CodeGenFunction &CGF, 9480 unsigned IntrinsicID, 9481 const CallExpr *E) { 9482 unsigned NumArgs = E->getNumArgs() - 1; 9483 SmallVector<Value *, 8> Args(NumArgs); 9484 for (unsigned I = 0; I < NumArgs; ++I) 9485 Args[I] = CGF.EmitScalarExpr(E->getArg(I)); 9486 Address CCPtr = CGF.EmitPointerWithAlignment(E->getArg(NumArgs)); 9487 Value *F = CGF.CGM.getIntrinsic(IntrinsicID); 9488 Value *Call = CGF.Builder.CreateCall(F, Args); 9489 Value *CC = CGF.Builder.CreateExtractValue(Call, 1); 9490 CGF.Builder.CreateStore(CC, CCPtr); 9491 return CGF.Builder.CreateExtractValue(Call, 0); 9492 } 9493 9494 Value *CodeGenFunction::EmitSystemZBuiltinExpr(unsigned BuiltinID, 9495 const CallExpr *E) { 9496 switch (BuiltinID) { 9497 case SystemZ::BI__builtin_tbegin: { 9498 Value *TDB = EmitScalarExpr(E->getArg(0)); 9499 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 9500 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin); 9501 return Builder.CreateCall(F, {TDB, Control}); 9502 } 9503 case SystemZ::BI__builtin_tbegin_nofloat: { 9504 Value *TDB = EmitScalarExpr(E->getArg(0)); 9505 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 9506 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin_nofloat); 9507 return Builder.CreateCall(F, {TDB, Control}); 9508 } 9509 case SystemZ::BI__builtin_tbeginc: { 9510 Value *TDB = llvm::ConstantPointerNull::get(Int8PtrTy); 9511 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff08); 9512 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbeginc); 9513 return Builder.CreateCall(F, {TDB, Control}); 9514 } 9515 case SystemZ::BI__builtin_tabort: { 9516 Value *Data = EmitScalarExpr(E->getArg(0)); 9517 Value *F = CGM.getIntrinsic(Intrinsic::s390_tabort); 9518 return Builder.CreateCall(F, Builder.CreateSExt(Data, Int64Ty, "tabort")); 9519 } 9520 case SystemZ::BI__builtin_non_tx_store: { 9521 Value *Address = EmitScalarExpr(E->getArg(0)); 9522 Value *Data = EmitScalarExpr(E->getArg(1)); 9523 Value *F = CGM.getIntrinsic(Intrinsic::s390_ntstg); 9524 return Builder.CreateCall(F, {Data, Address}); 9525 } 9526 9527 // Vector builtins. Note that most vector builtins are mapped automatically 9528 // to target-specific LLVM intrinsics. The ones handled specially here can 9529 // be represented via standard LLVM IR, which is preferable to enable common 9530 // LLVM optimizations. 9531 9532 case SystemZ::BI__builtin_s390_vpopctb: 9533 case SystemZ::BI__builtin_s390_vpopcth: 9534 case SystemZ::BI__builtin_s390_vpopctf: 9535 case SystemZ::BI__builtin_s390_vpopctg: { 9536 llvm::Type *ResultType = ConvertType(E->getType()); 9537 Value *X = EmitScalarExpr(E->getArg(0)); 9538 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 9539 return Builder.CreateCall(F, X); 9540 } 9541 9542 case SystemZ::BI__builtin_s390_vclzb: 9543 case SystemZ::BI__builtin_s390_vclzh: 9544 case SystemZ::BI__builtin_s390_vclzf: 9545 case SystemZ::BI__builtin_s390_vclzg: { 9546 llvm::Type *ResultType = ConvertType(E->getType()); 9547 Value *X = EmitScalarExpr(E->getArg(0)); 9548 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 9549 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 9550 return Builder.CreateCall(F, {X, Undef}); 9551 } 9552 9553 case SystemZ::BI__builtin_s390_vctzb: 9554 case SystemZ::BI__builtin_s390_vctzh: 9555 case SystemZ::BI__builtin_s390_vctzf: 9556 case SystemZ::BI__builtin_s390_vctzg: { 9557 llvm::Type *ResultType = ConvertType(E->getType()); 9558 Value *X = EmitScalarExpr(E->getArg(0)); 9559 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 9560 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 9561 return Builder.CreateCall(F, {X, Undef}); 9562 } 9563 9564 case SystemZ::BI__builtin_s390_vfsqsb: 9565 case SystemZ::BI__builtin_s390_vfsqdb: { 9566 llvm::Type *ResultType = ConvertType(E->getType()); 9567 Value *X = EmitScalarExpr(E->getArg(0)); 9568 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, ResultType); 9569 return Builder.CreateCall(F, X); 9570 } 9571 case SystemZ::BI__builtin_s390_vfmasb: 9572 case SystemZ::BI__builtin_s390_vfmadb: { 9573 llvm::Type *ResultType = ConvertType(E->getType()); 9574 Value *X = EmitScalarExpr(E->getArg(0)); 9575 Value *Y = EmitScalarExpr(E->getArg(1)); 9576 Value *Z = EmitScalarExpr(E->getArg(2)); 9577 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 9578 return Builder.CreateCall(F, {X, Y, Z}); 9579 } 9580 case SystemZ::BI__builtin_s390_vfmssb: 9581 case SystemZ::BI__builtin_s390_vfmsdb: { 9582 llvm::Type *ResultType = ConvertType(E->getType()); 9583 Value *X = EmitScalarExpr(E->getArg(0)); 9584 Value *Y = EmitScalarExpr(E->getArg(1)); 9585 Value *Z = EmitScalarExpr(E->getArg(2)); 9586 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 9587 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 9588 return Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 9589 } 9590 case SystemZ::BI__builtin_s390_vfnmasb: 9591 case SystemZ::BI__builtin_s390_vfnmadb: { 9592 llvm::Type *ResultType = ConvertType(E->getType()); 9593 Value *X = EmitScalarExpr(E->getArg(0)); 9594 Value *Y = EmitScalarExpr(E->getArg(1)); 9595 Value *Z = EmitScalarExpr(E->getArg(2)); 9596 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 9597 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 9598 return Builder.CreateFSub(Zero, Builder.CreateCall(F, {X, Y, Z}), "sub"); 9599 } 9600 case SystemZ::BI__builtin_s390_vfnmssb: 9601 case SystemZ::BI__builtin_s390_vfnmsdb: { 9602 llvm::Type *ResultType = ConvertType(E->getType()); 9603 Value *X = EmitScalarExpr(E->getArg(0)); 9604 Value *Y = EmitScalarExpr(E->getArg(1)); 9605 Value *Z = EmitScalarExpr(E->getArg(2)); 9606 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 9607 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 9608 Value *NegZ = Builder.CreateFSub(Zero, Z, "sub"); 9609 return Builder.CreateFSub(Zero, Builder.CreateCall(F, {X, Y, NegZ})); 9610 } 9611 case SystemZ::BI__builtin_s390_vflpsb: 9612 case SystemZ::BI__builtin_s390_vflpdb: { 9613 llvm::Type *ResultType = ConvertType(E->getType()); 9614 Value *X = EmitScalarExpr(E->getArg(0)); 9615 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 9616 return Builder.CreateCall(F, X); 9617 } 9618 case SystemZ::BI__builtin_s390_vflnsb: 9619 case SystemZ::BI__builtin_s390_vflndb: { 9620 llvm::Type *ResultType = ConvertType(E->getType()); 9621 Value *X = EmitScalarExpr(E->getArg(0)); 9622 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 9623 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 9624 return Builder.CreateFSub(Zero, Builder.CreateCall(F, X), "sub"); 9625 } 9626 case SystemZ::BI__builtin_s390_vfisb: 9627 case SystemZ::BI__builtin_s390_vfidb: { 9628 llvm::Type *ResultType = ConvertType(E->getType()); 9629 Value *X = EmitScalarExpr(E->getArg(0)); 9630 // Constant-fold the M4 and M5 mask arguments. 9631 llvm::APSInt M4, M5; 9632 bool IsConstM4 = E->getArg(1)->isIntegerConstantExpr(M4, getContext()); 9633 bool IsConstM5 = E->getArg(2)->isIntegerConstantExpr(M5, getContext()); 9634 assert(IsConstM4 && IsConstM5 && "Constant arg isn't actually constant?"); 9635 (void)IsConstM4; (void)IsConstM5; 9636 // Check whether this instance can be represented via a LLVM standard 9637 // intrinsic. We only support some combinations of M4 and M5. 9638 Intrinsic::ID ID = Intrinsic::not_intrinsic; 9639 switch (M4.getZExtValue()) { 9640 default: break; 9641 case 0: // IEEE-inexact exception allowed 9642 switch (M5.getZExtValue()) { 9643 default: break; 9644 case 0: ID = Intrinsic::rint; break; 9645 } 9646 break; 9647 case 4: // IEEE-inexact exception suppressed 9648 switch (M5.getZExtValue()) { 9649 default: break; 9650 case 0: ID = Intrinsic::nearbyint; break; 9651 case 1: ID = Intrinsic::round; break; 9652 case 5: ID = Intrinsic::trunc; break; 9653 case 6: ID = Intrinsic::ceil; break; 9654 case 7: ID = Intrinsic::floor; break; 9655 } 9656 break; 9657 } 9658 if (ID != Intrinsic::not_intrinsic) { 9659 Function *F = CGM.getIntrinsic(ID, ResultType); 9660 return Builder.CreateCall(F, X); 9661 } 9662 switch (BuiltinID) { 9663 case SystemZ::BI__builtin_s390_vfisb: ID = Intrinsic::s390_vfisb; break; 9664 case SystemZ::BI__builtin_s390_vfidb: ID = Intrinsic::s390_vfidb; break; 9665 default: llvm_unreachable("Unknown BuiltinID"); 9666 } 9667 Function *F = CGM.getIntrinsic(ID); 9668 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 9669 Value *M5Value = llvm::ConstantInt::get(getLLVMContext(), M5); 9670 return Builder.CreateCall(F, {X, M4Value, M5Value}); 9671 } 9672 case SystemZ::BI__builtin_s390_vfmaxsb: 9673 case SystemZ::BI__builtin_s390_vfmaxdb: { 9674 llvm::Type *ResultType = ConvertType(E->getType()); 9675 Value *X = EmitScalarExpr(E->getArg(0)); 9676 Value *Y = EmitScalarExpr(E->getArg(1)); 9677 // Constant-fold the M4 mask argument. 9678 llvm::APSInt M4; 9679 bool IsConstM4 = E->getArg(2)->isIntegerConstantExpr(M4, getContext()); 9680 assert(IsConstM4 && "Constant arg isn't actually constant?"); 9681 (void)IsConstM4; 9682 // Check whether this instance can be represented via a LLVM standard 9683 // intrinsic. We only support some values of M4. 9684 Intrinsic::ID ID = Intrinsic::not_intrinsic; 9685 switch (M4.getZExtValue()) { 9686 default: break; 9687 case 4: ID = Intrinsic::maxnum; break; 9688 } 9689 if (ID != Intrinsic::not_intrinsic) { 9690 Function *F = CGM.getIntrinsic(ID, ResultType); 9691 return Builder.CreateCall(F, {X, Y}); 9692 } 9693 switch (BuiltinID) { 9694 case SystemZ::BI__builtin_s390_vfmaxsb: ID = Intrinsic::s390_vfmaxsb; break; 9695 case SystemZ::BI__builtin_s390_vfmaxdb: ID = Intrinsic::s390_vfmaxdb; break; 9696 default: llvm_unreachable("Unknown BuiltinID"); 9697 } 9698 Function *F = CGM.getIntrinsic(ID); 9699 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 9700 return Builder.CreateCall(F, {X, Y, M4Value}); 9701 } 9702 case SystemZ::BI__builtin_s390_vfminsb: 9703 case SystemZ::BI__builtin_s390_vfmindb: { 9704 llvm::Type *ResultType = ConvertType(E->getType()); 9705 Value *X = EmitScalarExpr(E->getArg(0)); 9706 Value *Y = EmitScalarExpr(E->getArg(1)); 9707 // Constant-fold the M4 mask argument. 9708 llvm::APSInt M4; 9709 bool IsConstM4 = E->getArg(2)->isIntegerConstantExpr(M4, getContext()); 9710 assert(IsConstM4 && "Constant arg isn't actually constant?"); 9711 (void)IsConstM4; 9712 // Check whether this instance can be represented via a LLVM standard 9713 // intrinsic. We only support some values of M4. 9714 Intrinsic::ID ID = Intrinsic::not_intrinsic; 9715 switch (M4.getZExtValue()) { 9716 default: break; 9717 case 4: ID = Intrinsic::minnum; break; 9718 } 9719 if (ID != Intrinsic::not_intrinsic) { 9720 Function *F = CGM.getIntrinsic(ID, ResultType); 9721 return Builder.CreateCall(F, {X, Y}); 9722 } 9723 switch (BuiltinID) { 9724 case SystemZ::BI__builtin_s390_vfminsb: ID = Intrinsic::s390_vfminsb; break; 9725 case SystemZ::BI__builtin_s390_vfmindb: ID = Intrinsic::s390_vfmindb; break; 9726 default: llvm_unreachable("Unknown BuiltinID"); 9727 } 9728 Function *F = CGM.getIntrinsic(ID); 9729 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 9730 return Builder.CreateCall(F, {X, Y, M4Value}); 9731 } 9732 9733 // Vector intrisincs that output the post-instruction CC value. 9734 9735 #define INTRINSIC_WITH_CC(NAME) \ 9736 case SystemZ::BI__builtin_##NAME: \ 9737 return EmitSystemZIntrinsicWithCC(*this, Intrinsic::NAME, E) 9738 9739 INTRINSIC_WITH_CC(s390_vpkshs); 9740 INTRINSIC_WITH_CC(s390_vpksfs); 9741 INTRINSIC_WITH_CC(s390_vpksgs); 9742 9743 INTRINSIC_WITH_CC(s390_vpklshs); 9744 INTRINSIC_WITH_CC(s390_vpklsfs); 9745 INTRINSIC_WITH_CC(s390_vpklsgs); 9746 9747 INTRINSIC_WITH_CC(s390_vceqbs); 9748 INTRINSIC_WITH_CC(s390_vceqhs); 9749 INTRINSIC_WITH_CC(s390_vceqfs); 9750 INTRINSIC_WITH_CC(s390_vceqgs); 9751 9752 INTRINSIC_WITH_CC(s390_vchbs); 9753 INTRINSIC_WITH_CC(s390_vchhs); 9754 INTRINSIC_WITH_CC(s390_vchfs); 9755 INTRINSIC_WITH_CC(s390_vchgs); 9756 9757 INTRINSIC_WITH_CC(s390_vchlbs); 9758 INTRINSIC_WITH_CC(s390_vchlhs); 9759 INTRINSIC_WITH_CC(s390_vchlfs); 9760 INTRINSIC_WITH_CC(s390_vchlgs); 9761 9762 INTRINSIC_WITH_CC(s390_vfaebs); 9763 INTRINSIC_WITH_CC(s390_vfaehs); 9764 INTRINSIC_WITH_CC(s390_vfaefs); 9765 9766 INTRINSIC_WITH_CC(s390_vfaezbs); 9767 INTRINSIC_WITH_CC(s390_vfaezhs); 9768 INTRINSIC_WITH_CC(s390_vfaezfs); 9769 9770 INTRINSIC_WITH_CC(s390_vfeebs); 9771 INTRINSIC_WITH_CC(s390_vfeehs); 9772 INTRINSIC_WITH_CC(s390_vfeefs); 9773 9774 INTRINSIC_WITH_CC(s390_vfeezbs); 9775 INTRINSIC_WITH_CC(s390_vfeezhs); 9776 INTRINSIC_WITH_CC(s390_vfeezfs); 9777 9778 INTRINSIC_WITH_CC(s390_vfenebs); 9779 INTRINSIC_WITH_CC(s390_vfenehs); 9780 INTRINSIC_WITH_CC(s390_vfenefs); 9781 9782 INTRINSIC_WITH_CC(s390_vfenezbs); 9783 INTRINSIC_WITH_CC(s390_vfenezhs); 9784 INTRINSIC_WITH_CC(s390_vfenezfs); 9785 9786 INTRINSIC_WITH_CC(s390_vistrbs); 9787 INTRINSIC_WITH_CC(s390_vistrhs); 9788 INTRINSIC_WITH_CC(s390_vistrfs); 9789 9790 INTRINSIC_WITH_CC(s390_vstrcbs); 9791 INTRINSIC_WITH_CC(s390_vstrchs); 9792 INTRINSIC_WITH_CC(s390_vstrcfs); 9793 9794 INTRINSIC_WITH_CC(s390_vstrczbs); 9795 INTRINSIC_WITH_CC(s390_vstrczhs); 9796 INTRINSIC_WITH_CC(s390_vstrczfs); 9797 9798 INTRINSIC_WITH_CC(s390_vfcesbs); 9799 INTRINSIC_WITH_CC(s390_vfcedbs); 9800 INTRINSIC_WITH_CC(s390_vfchsbs); 9801 INTRINSIC_WITH_CC(s390_vfchdbs); 9802 INTRINSIC_WITH_CC(s390_vfchesbs); 9803 INTRINSIC_WITH_CC(s390_vfchedbs); 9804 9805 INTRINSIC_WITH_CC(s390_vftcisb); 9806 INTRINSIC_WITH_CC(s390_vftcidb); 9807 9808 #undef INTRINSIC_WITH_CC 9809 9810 default: 9811 return nullptr; 9812 } 9813 } 9814 9815 Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, 9816 const CallExpr *E) { 9817 auto MakeLdg = [&](unsigned IntrinsicID) { 9818 Value *Ptr = EmitScalarExpr(E->getArg(0)); 9819 clang::CharUnits Align = 9820 getNaturalPointeeTypeAlignment(E->getArg(0)->getType()); 9821 return Builder.CreateCall( 9822 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 9823 Ptr->getType()}), 9824 {Ptr, ConstantInt::get(Builder.getInt32Ty(), Align.getQuantity())}); 9825 }; 9826 auto MakeScopedAtomic = [&](unsigned IntrinsicID) { 9827 Value *Ptr = EmitScalarExpr(E->getArg(0)); 9828 return Builder.CreateCall( 9829 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 9830 Ptr->getType()}), 9831 {Ptr, EmitScalarExpr(E->getArg(1))}); 9832 }; 9833 switch (BuiltinID) { 9834 case NVPTX::BI__nvvm_atom_add_gen_i: 9835 case NVPTX::BI__nvvm_atom_add_gen_l: 9836 case NVPTX::BI__nvvm_atom_add_gen_ll: 9837 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Add, E); 9838 9839 case NVPTX::BI__nvvm_atom_sub_gen_i: 9840 case NVPTX::BI__nvvm_atom_sub_gen_l: 9841 case NVPTX::BI__nvvm_atom_sub_gen_ll: 9842 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Sub, E); 9843 9844 case NVPTX::BI__nvvm_atom_and_gen_i: 9845 case NVPTX::BI__nvvm_atom_and_gen_l: 9846 case NVPTX::BI__nvvm_atom_and_gen_ll: 9847 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::And, E); 9848 9849 case NVPTX::BI__nvvm_atom_or_gen_i: 9850 case NVPTX::BI__nvvm_atom_or_gen_l: 9851 case NVPTX::BI__nvvm_atom_or_gen_ll: 9852 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Or, E); 9853 9854 case NVPTX::BI__nvvm_atom_xor_gen_i: 9855 case NVPTX::BI__nvvm_atom_xor_gen_l: 9856 case NVPTX::BI__nvvm_atom_xor_gen_ll: 9857 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xor, E); 9858 9859 case NVPTX::BI__nvvm_atom_xchg_gen_i: 9860 case NVPTX::BI__nvvm_atom_xchg_gen_l: 9861 case NVPTX::BI__nvvm_atom_xchg_gen_ll: 9862 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xchg, E); 9863 9864 case NVPTX::BI__nvvm_atom_max_gen_i: 9865 case NVPTX::BI__nvvm_atom_max_gen_l: 9866 case NVPTX::BI__nvvm_atom_max_gen_ll: 9867 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Max, E); 9868 9869 case NVPTX::BI__nvvm_atom_max_gen_ui: 9870 case NVPTX::BI__nvvm_atom_max_gen_ul: 9871 case NVPTX::BI__nvvm_atom_max_gen_ull: 9872 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMax, E); 9873 9874 case NVPTX::BI__nvvm_atom_min_gen_i: 9875 case NVPTX::BI__nvvm_atom_min_gen_l: 9876 case NVPTX::BI__nvvm_atom_min_gen_ll: 9877 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Min, E); 9878 9879 case NVPTX::BI__nvvm_atom_min_gen_ui: 9880 case NVPTX::BI__nvvm_atom_min_gen_ul: 9881 case NVPTX::BI__nvvm_atom_min_gen_ull: 9882 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMin, E); 9883 9884 case NVPTX::BI__nvvm_atom_cas_gen_i: 9885 case NVPTX::BI__nvvm_atom_cas_gen_l: 9886 case NVPTX::BI__nvvm_atom_cas_gen_ll: 9887 // __nvvm_atom_cas_gen_* should return the old value rather than the 9888 // success flag. 9889 return MakeAtomicCmpXchgValue(*this, E, /*ReturnBool=*/false); 9890 9891 case NVPTX::BI__nvvm_atom_add_gen_f: { 9892 Value *Ptr = EmitScalarExpr(E->getArg(0)); 9893 Value *Val = EmitScalarExpr(E->getArg(1)); 9894 // atomicrmw only deals with integer arguments so we need to use 9895 // LLVM's nvvm_atomic_load_add_f32 intrinsic for that. 9896 Value *FnALAF32 = 9897 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f32, Ptr->getType()); 9898 return Builder.CreateCall(FnALAF32, {Ptr, Val}); 9899 } 9900 9901 case NVPTX::BI__nvvm_atom_add_gen_d: { 9902 Value *Ptr = EmitScalarExpr(E->getArg(0)); 9903 Value *Val = EmitScalarExpr(E->getArg(1)); 9904 // atomicrmw only deals with integer arguments, so we need to use 9905 // LLVM's nvvm_atomic_load_add_f64 intrinsic. 9906 Value *FnALAF64 = 9907 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f64, Ptr->getType()); 9908 return Builder.CreateCall(FnALAF64, {Ptr, Val}); 9909 } 9910 9911 case NVPTX::BI__nvvm_atom_inc_gen_ui: { 9912 Value *Ptr = EmitScalarExpr(E->getArg(0)); 9913 Value *Val = EmitScalarExpr(E->getArg(1)); 9914 Value *FnALI32 = 9915 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_inc_32, Ptr->getType()); 9916 return Builder.CreateCall(FnALI32, {Ptr, Val}); 9917 } 9918 9919 case NVPTX::BI__nvvm_atom_dec_gen_ui: { 9920 Value *Ptr = EmitScalarExpr(E->getArg(0)); 9921 Value *Val = EmitScalarExpr(E->getArg(1)); 9922 Value *FnALD32 = 9923 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_dec_32, Ptr->getType()); 9924 return Builder.CreateCall(FnALD32, {Ptr, Val}); 9925 } 9926 9927 case NVPTX::BI__nvvm_ldg_c: 9928 case NVPTX::BI__nvvm_ldg_c2: 9929 case NVPTX::BI__nvvm_ldg_c4: 9930 case NVPTX::BI__nvvm_ldg_s: 9931 case NVPTX::BI__nvvm_ldg_s2: 9932 case NVPTX::BI__nvvm_ldg_s4: 9933 case NVPTX::BI__nvvm_ldg_i: 9934 case NVPTX::BI__nvvm_ldg_i2: 9935 case NVPTX::BI__nvvm_ldg_i4: 9936 case NVPTX::BI__nvvm_ldg_l: 9937 case NVPTX::BI__nvvm_ldg_ll: 9938 case NVPTX::BI__nvvm_ldg_ll2: 9939 case NVPTX::BI__nvvm_ldg_uc: 9940 case NVPTX::BI__nvvm_ldg_uc2: 9941 case NVPTX::BI__nvvm_ldg_uc4: 9942 case NVPTX::BI__nvvm_ldg_us: 9943 case NVPTX::BI__nvvm_ldg_us2: 9944 case NVPTX::BI__nvvm_ldg_us4: 9945 case NVPTX::BI__nvvm_ldg_ui: 9946 case NVPTX::BI__nvvm_ldg_ui2: 9947 case NVPTX::BI__nvvm_ldg_ui4: 9948 case NVPTX::BI__nvvm_ldg_ul: 9949 case NVPTX::BI__nvvm_ldg_ull: 9950 case NVPTX::BI__nvvm_ldg_ull2: 9951 // PTX Interoperability section 2.2: "For a vector with an even number of 9952 // elements, its alignment is set to number of elements times the alignment 9953 // of its member: n*alignof(t)." 9954 return MakeLdg(Intrinsic::nvvm_ldg_global_i); 9955 case NVPTX::BI__nvvm_ldg_f: 9956 case NVPTX::BI__nvvm_ldg_f2: 9957 case NVPTX::BI__nvvm_ldg_f4: 9958 case NVPTX::BI__nvvm_ldg_d: 9959 case NVPTX::BI__nvvm_ldg_d2: 9960 return MakeLdg(Intrinsic::nvvm_ldg_global_f); 9961 9962 case NVPTX::BI__nvvm_atom_cta_add_gen_i: 9963 case NVPTX::BI__nvvm_atom_cta_add_gen_l: 9964 case NVPTX::BI__nvvm_atom_cta_add_gen_ll: 9965 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_cta); 9966 case NVPTX::BI__nvvm_atom_sys_add_gen_i: 9967 case NVPTX::BI__nvvm_atom_sys_add_gen_l: 9968 case NVPTX::BI__nvvm_atom_sys_add_gen_ll: 9969 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_sys); 9970 case NVPTX::BI__nvvm_atom_cta_add_gen_f: 9971 case NVPTX::BI__nvvm_atom_cta_add_gen_d: 9972 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_cta); 9973 case NVPTX::BI__nvvm_atom_sys_add_gen_f: 9974 case NVPTX::BI__nvvm_atom_sys_add_gen_d: 9975 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_sys); 9976 case NVPTX::BI__nvvm_atom_cta_xchg_gen_i: 9977 case NVPTX::BI__nvvm_atom_cta_xchg_gen_l: 9978 case NVPTX::BI__nvvm_atom_cta_xchg_gen_ll: 9979 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_cta); 9980 case NVPTX::BI__nvvm_atom_sys_xchg_gen_i: 9981 case NVPTX::BI__nvvm_atom_sys_xchg_gen_l: 9982 case NVPTX::BI__nvvm_atom_sys_xchg_gen_ll: 9983 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_sys); 9984 case NVPTX::BI__nvvm_atom_cta_max_gen_i: 9985 case NVPTX::BI__nvvm_atom_cta_max_gen_ui: 9986 case NVPTX::BI__nvvm_atom_cta_max_gen_l: 9987 case NVPTX::BI__nvvm_atom_cta_max_gen_ul: 9988 case NVPTX::BI__nvvm_atom_cta_max_gen_ll: 9989 case NVPTX::BI__nvvm_atom_cta_max_gen_ull: 9990 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_cta); 9991 case NVPTX::BI__nvvm_atom_sys_max_gen_i: 9992 case NVPTX::BI__nvvm_atom_sys_max_gen_ui: 9993 case NVPTX::BI__nvvm_atom_sys_max_gen_l: 9994 case NVPTX::BI__nvvm_atom_sys_max_gen_ul: 9995 case NVPTX::BI__nvvm_atom_sys_max_gen_ll: 9996 case NVPTX::BI__nvvm_atom_sys_max_gen_ull: 9997 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_sys); 9998 case NVPTX::BI__nvvm_atom_cta_min_gen_i: 9999 case NVPTX::BI__nvvm_atom_cta_min_gen_ui: 10000 case NVPTX::BI__nvvm_atom_cta_min_gen_l: 10001 case NVPTX::BI__nvvm_atom_cta_min_gen_ul: 10002 case NVPTX::BI__nvvm_atom_cta_min_gen_ll: 10003 case NVPTX::BI__nvvm_atom_cta_min_gen_ull: 10004 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_cta); 10005 case NVPTX::BI__nvvm_atom_sys_min_gen_i: 10006 case NVPTX::BI__nvvm_atom_sys_min_gen_ui: 10007 case NVPTX::BI__nvvm_atom_sys_min_gen_l: 10008 case NVPTX::BI__nvvm_atom_sys_min_gen_ul: 10009 case NVPTX::BI__nvvm_atom_sys_min_gen_ll: 10010 case NVPTX::BI__nvvm_atom_sys_min_gen_ull: 10011 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_sys); 10012 case NVPTX::BI__nvvm_atom_cta_inc_gen_ui: 10013 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_cta); 10014 case NVPTX::BI__nvvm_atom_cta_dec_gen_ui: 10015 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_cta); 10016 case NVPTX::BI__nvvm_atom_sys_inc_gen_ui: 10017 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_sys); 10018 case NVPTX::BI__nvvm_atom_sys_dec_gen_ui: 10019 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_sys); 10020 case NVPTX::BI__nvvm_atom_cta_and_gen_i: 10021 case NVPTX::BI__nvvm_atom_cta_and_gen_l: 10022 case NVPTX::BI__nvvm_atom_cta_and_gen_ll: 10023 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_cta); 10024 case NVPTX::BI__nvvm_atom_sys_and_gen_i: 10025 case NVPTX::BI__nvvm_atom_sys_and_gen_l: 10026 case NVPTX::BI__nvvm_atom_sys_and_gen_ll: 10027 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_sys); 10028 case NVPTX::BI__nvvm_atom_cta_or_gen_i: 10029 case NVPTX::BI__nvvm_atom_cta_or_gen_l: 10030 case NVPTX::BI__nvvm_atom_cta_or_gen_ll: 10031 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_cta); 10032 case NVPTX::BI__nvvm_atom_sys_or_gen_i: 10033 case NVPTX::BI__nvvm_atom_sys_or_gen_l: 10034 case NVPTX::BI__nvvm_atom_sys_or_gen_ll: 10035 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_sys); 10036 case NVPTX::BI__nvvm_atom_cta_xor_gen_i: 10037 case NVPTX::BI__nvvm_atom_cta_xor_gen_l: 10038 case NVPTX::BI__nvvm_atom_cta_xor_gen_ll: 10039 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_cta); 10040 case NVPTX::BI__nvvm_atom_sys_xor_gen_i: 10041 case NVPTX::BI__nvvm_atom_sys_xor_gen_l: 10042 case NVPTX::BI__nvvm_atom_sys_xor_gen_ll: 10043 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_sys); 10044 case NVPTX::BI__nvvm_atom_cta_cas_gen_i: 10045 case NVPTX::BI__nvvm_atom_cta_cas_gen_l: 10046 case NVPTX::BI__nvvm_atom_cta_cas_gen_ll: { 10047 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10048 return Builder.CreateCall( 10049 CGM.getIntrinsic( 10050 Intrinsic::nvvm_atomic_cas_gen_i_cta, 10051 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 10052 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 10053 } 10054 case NVPTX::BI__nvvm_atom_sys_cas_gen_i: 10055 case NVPTX::BI__nvvm_atom_sys_cas_gen_l: 10056 case NVPTX::BI__nvvm_atom_sys_cas_gen_ll: { 10057 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10058 return Builder.CreateCall( 10059 CGM.getIntrinsic( 10060 Intrinsic::nvvm_atomic_cas_gen_i_sys, 10061 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 10062 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 10063 } 10064 case NVPTX::BI__nvvm_match_all_sync_i32p: 10065 case NVPTX::BI__nvvm_match_all_sync_i64p: { 10066 Value *Mask = EmitScalarExpr(E->getArg(0)); 10067 Value *Val = EmitScalarExpr(E->getArg(1)); 10068 Address PredOutPtr = EmitPointerWithAlignment(E->getArg(2)); 10069 Value *ResultPair = Builder.CreateCall( 10070 CGM.getIntrinsic(BuiltinID == NVPTX::BI__nvvm_match_all_sync_i32p 10071 ? Intrinsic::nvvm_match_all_sync_i32p 10072 : Intrinsic::nvvm_match_all_sync_i64p), 10073 {Mask, Val}); 10074 Value *Pred = Builder.CreateZExt(Builder.CreateExtractValue(ResultPair, 1), 10075 PredOutPtr.getElementType()); 10076 Builder.CreateStore(Pred, PredOutPtr); 10077 return Builder.CreateExtractValue(ResultPair, 0); 10078 } 10079 case NVPTX::BI__hmma_m16n16k16_ld_a: 10080 case NVPTX::BI__hmma_m16n16k16_ld_b: 10081 case NVPTX::BI__hmma_m16n16k16_ld_c_f16: 10082 case NVPTX::BI__hmma_m16n16k16_ld_c_f32: { 10083 Address Dst = EmitPointerWithAlignment(E->getArg(0)); 10084 Value *Src = EmitScalarExpr(E->getArg(1)); 10085 Value *Ldm = EmitScalarExpr(E->getArg(2)); 10086 llvm::APSInt isColMajorArg; 10087 if (!E->getArg(3)->isIntegerConstantExpr(isColMajorArg, getContext())) 10088 return nullptr; 10089 bool isColMajor = isColMajorArg.getSExtValue(); 10090 unsigned IID; 10091 unsigned NumResults; 10092 switch (BuiltinID) { 10093 case NVPTX::BI__hmma_m16n16k16_ld_a: 10094 IID = isColMajor ? Intrinsic::nvvm_wmma_load_a_f16_col_stride 10095 : Intrinsic::nvvm_wmma_load_a_f16_row_stride; 10096 NumResults = 8; 10097 break; 10098 case NVPTX::BI__hmma_m16n16k16_ld_b: 10099 IID = isColMajor ? Intrinsic::nvvm_wmma_load_b_f16_col_stride 10100 : Intrinsic::nvvm_wmma_load_b_f16_row_stride; 10101 NumResults = 8; 10102 break; 10103 case NVPTX::BI__hmma_m16n16k16_ld_c_f16: 10104 IID = isColMajor ? Intrinsic::nvvm_wmma_load_c_f16_col_stride 10105 : Intrinsic::nvvm_wmma_load_c_f16_row_stride; 10106 NumResults = 4; 10107 break; 10108 case NVPTX::BI__hmma_m16n16k16_ld_c_f32: 10109 IID = isColMajor ? Intrinsic::nvvm_wmma_load_c_f32_col_stride 10110 : Intrinsic::nvvm_wmma_load_c_f32_row_stride; 10111 NumResults = 8; 10112 break; 10113 default: 10114 llvm_unreachable("Unexpected builtin ID."); 10115 } 10116 Value *Result = 10117 Builder.CreateCall(CGM.getIntrinsic(IID), 10118 {Builder.CreatePointerCast(Src, VoidPtrTy), Ldm}); 10119 10120 // Save returned values. 10121 for (unsigned i = 0; i < NumResults; ++i) { 10122 Builder.CreateAlignedStore( 10123 Builder.CreateBitCast(Builder.CreateExtractValue(Result, i), 10124 Dst.getElementType()), 10125 Builder.CreateGEP(Dst.getPointer(), llvm::ConstantInt::get(IntTy, i)), 10126 CharUnits::fromQuantity(4)); 10127 } 10128 return Result; 10129 } 10130 10131 case NVPTX::BI__hmma_m16n16k16_st_c_f16: 10132 case NVPTX::BI__hmma_m16n16k16_st_c_f32: { 10133 Value *Dst = EmitScalarExpr(E->getArg(0)); 10134 Address Src = EmitPointerWithAlignment(E->getArg(1)); 10135 Value *Ldm = EmitScalarExpr(E->getArg(2)); 10136 llvm::APSInt isColMajorArg; 10137 if (!E->getArg(3)->isIntegerConstantExpr(isColMajorArg, getContext())) 10138 return nullptr; 10139 bool isColMajor = isColMajorArg.getSExtValue(); 10140 unsigned IID; 10141 unsigned NumResults = 8; 10142 // PTX Instructions (and LLVM instrinsics) are defined for slice _d_, yet 10143 // for some reason nvcc builtins use _c_. 10144 switch (BuiltinID) { 10145 case NVPTX::BI__hmma_m16n16k16_st_c_f16: 10146 IID = isColMajor ? Intrinsic::nvvm_wmma_store_d_f16_col_stride 10147 : Intrinsic::nvvm_wmma_store_d_f16_row_stride; 10148 NumResults = 4; 10149 break; 10150 case NVPTX::BI__hmma_m16n16k16_st_c_f32: 10151 IID = isColMajor ? Intrinsic::nvvm_wmma_store_d_f32_col_stride 10152 : Intrinsic::nvvm_wmma_store_d_f32_row_stride; 10153 break; 10154 default: 10155 llvm_unreachable("Unexpected builtin ID."); 10156 } 10157 Function *Intrinsic = CGM.getIntrinsic(IID); 10158 llvm::Type *ParamType = Intrinsic->getFunctionType()->getParamType(1); 10159 SmallVector<Value *, 10> Values; 10160 Values.push_back(Builder.CreatePointerCast(Dst, VoidPtrTy)); 10161 for (unsigned i = 0; i < NumResults; ++i) { 10162 Value *V = Builder.CreateAlignedLoad( 10163 Builder.CreateGEP(Src.getPointer(), llvm::ConstantInt::get(IntTy, i)), 10164 CharUnits::fromQuantity(4)); 10165 Values.push_back(Builder.CreateBitCast(V, ParamType)); 10166 } 10167 Values.push_back(Ldm); 10168 Value *Result = Builder.CreateCall(Intrinsic, Values); 10169 return Result; 10170 } 10171 10172 // BI__hmma_m16n16k16_mma_<Dtype><CType>(d, a, b, c, layout, satf) 10173 // --> Intrinsic::nvvm_wmma_mma_sync<layout A,B><DType><CType><Satf> 10174 case NVPTX::BI__hmma_m16n16k16_mma_f16f16: 10175 case NVPTX::BI__hmma_m16n16k16_mma_f32f16: 10176 case NVPTX::BI__hmma_m16n16k16_mma_f32f32: 10177 case NVPTX::BI__hmma_m16n16k16_mma_f16f32: { 10178 Address Dst = EmitPointerWithAlignment(E->getArg(0)); 10179 Address SrcA = EmitPointerWithAlignment(E->getArg(1)); 10180 Address SrcB = EmitPointerWithAlignment(E->getArg(2)); 10181 Address SrcC = EmitPointerWithAlignment(E->getArg(3)); 10182 llvm::APSInt LayoutArg; 10183 if (!E->getArg(4)->isIntegerConstantExpr(LayoutArg, getContext())) 10184 return nullptr; 10185 int Layout = LayoutArg.getSExtValue(); 10186 if (Layout < 0 || Layout > 3) 10187 return nullptr; 10188 llvm::APSInt SatfArg; 10189 if (!E->getArg(5)->isIntegerConstantExpr(SatfArg, getContext())) 10190 return nullptr; 10191 bool Satf = SatfArg.getSExtValue(); 10192 10193 // clang-format off 10194 #define MMA_VARIANTS(type) {{ \ 10195 Intrinsic::nvvm_wmma_mma_sync_row_row_##type, \ 10196 Intrinsic::nvvm_wmma_mma_sync_row_row_##type##_satfinite, \ 10197 Intrinsic::nvvm_wmma_mma_sync_row_col_##type, \ 10198 Intrinsic::nvvm_wmma_mma_sync_row_col_##type##_satfinite, \ 10199 Intrinsic::nvvm_wmma_mma_sync_col_row_##type, \ 10200 Intrinsic::nvvm_wmma_mma_sync_col_row_##type##_satfinite, \ 10201 Intrinsic::nvvm_wmma_mma_sync_col_col_##type, \ 10202 Intrinsic::nvvm_wmma_mma_sync_col_col_##type##_satfinite \ 10203 }} 10204 // clang-format on 10205 10206 auto getMMAIntrinsic = [Layout, Satf](std::array<unsigned, 8> Variants) { 10207 unsigned Index = Layout * 2 + Satf; 10208 assert(Index < 8); 10209 return Variants[Index]; 10210 }; 10211 unsigned IID; 10212 unsigned NumEltsC; 10213 unsigned NumEltsD; 10214 switch (BuiltinID) { 10215 case NVPTX::BI__hmma_m16n16k16_mma_f16f16: 10216 IID = getMMAIntrinsic(MMA_VARIANTS(f16_f16)); 10217 NumEltsC = 4; 10218 NumEltsD = 4; 10219 break; 10220 case NVPTX::BI__hmma_m16n16k16_mma_f32f16: 10221 IID = getMMAIntrinsic(MMA_VARIANTS(f32_f16)); 10222 NumEltsC = 4; 10223 NumEltsD = 8; 10224 break; 10225 case NVPTX::BI__hmma_m16n16k16_mma_f16f32: 10226 IID = getMMAIntrinsic(MMA_VARIANTS(f16_f32)); 10227 NumEltsC = 8; 10228 NumEltsD = 4; 10229 break; 10230 case NVPTX::BI__hmma_m16n16k16_mma_f32f32: 10231 IID = getMMAIntrinsic(MMA_VARIANTS(f32_f32)); 10232 NumEltsC = 8; 10233 NumEltsD = 8; 10234 break; 10235 default: 10236 llvm_unreachable("Unexpected builtin ID."); 10237 } 10238 #undef MMA_VARIANTS 10239 10240 SmallVector<Value *, 24> Values; 10241 Function *Intrinsic = CGM.getIntrinsic(IID); 10242 llvm::Type *ABType = Intrinsic->getFunctionType()->getParamType(0); 10243 // Load A 10244 for (unsigned i = 0; i < 8; ++i) { 10245 Value *V = Builder.CreateAlignedLoad( 10246 Builder.CreateGEP(SrcA.getPointer(), 10247 llvm::ConstantInt::get(IntTy, i)), 10248 CharUnits::fromQuantity(4)); 10249 Values.push_back(Builder.CreateBitCast(V, ABType)); 10250 } 10251 // Load B 10252 for (unsigned i = 0; i < 8; ++i) { 10253 Value *V = Builder.CreateAlignedLoad( 10254 Builder.CreateGEP(SrcB.getPointer(), 10255 llvm::ConstantInt::get(IntTy, i)), 10256 CharUnits::fromQuantity(4)); 10257 Values.push_back(Builder.CreateBitCast(V, ABType)); 10258 } 10259 // Load C 10260 llvm::Type *CType = Intrinsic->getFunctionType()->getParamType(16); 10261 for (unsigned i = 0; i < NumEltsC; ++i) { 10262 Value *V = Builder.CreateAlignedLoad( 10263 Builder.CreateGEP(SrcC.getPointer(), 10264 llvm::ConstantInt::get(IntTy, i)), 10265 CharUnits::fromQuantity(4)); 10266 Values.push_back(Builder.CreateBitCast(V, CType)); 10267 } 10268 Value *Result = Builder.CreateCall(Intrinsic, Values); 10269 llvm::Type *DType = Dst.getElementType(); 10270 for (unsigned i = 0; i < NumEltsD; ++i) 10271 Builder.CreateAlignedStore( 10272 Builder.CreateBitCast(Builder.CreateExtractValue(Result, i), DType), 10273 Builder.CreateGEP(Dst.getPointer(), llvm::ConstantInt::get(IntTy, i)), 10274 CharUnits::fromQuantity(4)); 10275 return Result; 10276 } 10277 default: 10278 return nullptr; 10279 } 10280 } 10281 10282 Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, 10283 const CallExpr *E) { 10284 switch (BuiltinID) { 10285 case WebAssembly::BI__builtin_wasm_current_memory: { 10286 llvm::Type *ResultType = ConvertType(E->getType()); 10287 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_current_memory, ResultType); 10288 return Builder.CreateCall(Callee); 10289 } 10290 case WebAssembly::BI__builtin_wasm_grow_memory: { 10291 Value *X = EmitScalarExpr(E->getArg(0)); 10292 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_grow_memory, X->getType()); 10293 return Builder.CreateCall(Callee, X); 10294 } 10295 case WebAssembly::BI__builtin_wasm_throw: { 10296 Value *Tag = EmitScalarExpr(E->getArg(0)); 10297 Value *Obj = EmitScalarExpr(E->getArg(1)); 10298 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_throw); 10299 return Builder.CreateCall(Callee, {Tag, Obj}); 10300 } 10301 case WebAssembly::BI__builtin_wasm_rethrow: { 10302 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_rethrow); 10303 return Builder.CreateCall(Callee); 10304 } 10305 10306 default: 10307 return nullptr; 10308 } 10309 } 10310 10311 Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, 10312 const CallExpr *E) { 10313 SmallVector<llvm::Value *, 4> Ops; 10314 Intrinsic::ID ID = Intrinsic::not_intrinsic; 10315 10316 switch (BuiltinID) { 10317 case Hexagon::BI__builtin_HEXAGON_V6_vaddcarry: 10318 case Hexagon::BI__builtin_HEXAGON_V6_vaddcarry_128B: { 10319 Address Dest = EmitPointerWithAlignment(E->getArg(2)); 10320 unsigned Size; 10321 if (BuiltinID == Hexagon::BI__builtin_HEXAGON_V6_vaddcarry) { 10322 Size = 512; 10323 ID = Intrinsic::hexagon_V6_vaddcarry; 10324 } else { 10325 Size = 1024; 10326 ID = Intrinsic::hexagon_V6_vaddcarry_128B; 10327 } 10328 Dest = Builder.CreateBitCast(Dest, 10329 llvm::VectorType::get(Builder.getInt1Ty(), Size)->getPointerTo(0)); 10330 LoadInst *QLd = Builder.CreateLoad(Dest); 10331 Ops = { EmitScalarExpr(E->getArg(0)), EmitScalarExpr(E->getArg(1)), QLd }; 10332 llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 10333 llvm::Value *Vprd = Builder.CreateExtractValue(Result, 1); 10334 llvm::Value *Base = Builder.CreateBitCast(EmitScalarExpr(E->getArg(2)), 10335 Vprd->getType()->getPointerTo(0)); 10336 Builder.CreateAlignedStore(Vprd, Base, Dest.getAlignment()); 10337 return Builder.CreateExtractValue(Result, 0); 10338 } 10339 case Hexagon::BI__builtin_HEXAGON_V6_vsubcarry: 10340 case Hexagon::BI__builtin_HEXAGON_V6_vsubcarry_128B: { 10341 Address Dest = EmitPointerWithAlignment(E->getArg(2)); 10342 unsigned Size; 10343 if (BuiltinID == Hexagon::BI__builtin_HEXAGON_V6_vsubcarry) { 10344 Size = 512; 10345 ID = Intrinsic::hexagon_V6_vsubcarry; 10346 } else { 10347 Size = 1024; 10348 ID = Intrinsic::hexagon_V6_vsubcarry_128B; 10349 } 10350 Dest = Builder.CreateBitCast(Dest, 10351 llvm::VectorType::get(Builder.getInt1Ty(), Size)->getPointerTo(0)); 10352 LoadInst *QLd = Builder.CreateLoad(Dest); 10353 Ops = { EmitScalarExpr(E->getArg(0)), EmitScalarExpr(E->getArg(1)), QLd }; 10354 llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 10355 llvm::Value *Vprd = Builder.CreateExtractValue(Result, 1); 10356 llvm::Value *Base = Builder.CreateBitCast(EmitScalarExpr(E->getArg(2)), 10357 Vprd->getType()->getPointerTo(0)); 10358 Builder.CreateAlignedStore(Vprd, Base, Dest.getAlignment()); 10359 return Builder.CreateExtractValue(Result, 0); 10360 } 10361 } // switch 10362 10363 return nullptr; 10364 } 10365