1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This contains code to emit Builtin calls as LLVM code. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "CGCXXABI.h" 15 #include "CGObjCRuntime.h" 16 #include "CGOpenCLRuntime.h" 17 #include "CodeGenFunction.h" 18 #include "CodeGenModule.h" 19 #include "TargetInfo.h" 20 #include "clang/AST/ASTContext.h" 21 #include "clang/AST/Decl.h" 22 #include "clang/Analysis/Analyses/OSLog.h" 23 #include "clang/Basic/TargetBuiltins.h" 24 #include "clang/Basic/TargetInfo.h" 25 #include "clang/CodeGen/CGFunctionInfo.h" 26 #include "llvm/ADT/StringExtras.h" 27 #include "llvm/IR/CallSite.h" 28 #include "llvm/IR/DataLayout.h" 29 #include "llvm/IR/InlineAsm.h" 30 #include "llvm/IR/Intrinsics.h" 31 #include "llvm/IR/MDBuilder.h" 32 #include <sstream> 33 34 using namespace clang; 35 using namespace CodeGen; 36 using namespace llvm; 37 38 /// getBuiltinLibFunction - Given a builtin id for a function like 39 /// "__builtin_fabsf", return a Function* for "fabsf". 40 llvm::Constant *CodeGenModule::getBuiltinLibFunction(const FunctionDecl *FD, 41 unsigned BuiltinID) { 42 assert(Context.BuiltinInfo.isLibFunction(BuiltinID)); 43 44 // Get the name, skip over the __builtin_ prefix (if necessary). 45 StringRef Name; 46 GlobalDecl D(FD); 47 48 // If the builtin has been declared explicitly with an assembler label, 49 // use the mangled name. This differs from the plain label on platforms 50 // that prefix labels. 51 if (FD->hasAttr<AsmLabelAttr>()) 52 Name = getMangledName(D); 53 else 54 Name = Context.BuiltinInfo.getName(BuiltinID) + 10; 55 56 llvm::FunctionType *Ty = 57 cast<llvm::FunctionType>(getTypes().ConvertType(FD->getType())); 58 59 return GetOrCreateLLVMFunction(Name, Ty, D, /*ForVTable=*/false); 60 } 61 62 /// Emit the conversions required to turn the given value into an 63 /// integer of the given size. 64 static Value *EmitToInt(CodeGenFunction &CGF, llvm::Value *V, 65 QualType T, llvm::IntegerType *IntType) { 66 V = CGF.EmitToMemory(V, T); 67 68 if (V->getType()->isPointerTy()) 69 return CGF.Builder.CreatePtrToInt(V, IntType); 70 71 assert(V->getType() == IntType); 72 return V; 73 } 74 75 static Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V, 76 QualType T, llvm::Type *ResultType) { 77 V = CGF.EmitFromMemory(V, T); 78 79 if (ResultType->isPointerTy()) 80 return CGF.Builder.CreateIntToPtr(V, ResultType); 81 82 assert(V->getType() == ResultType); 83 return V; 84 } 85 86 /// Utility to insert an atomic instruction based on Instrinsic::ID 87 /// and the expression node. 88 static Value *MakeBinaryAtomicValue(CodeGenFunction &CGF, 89 llvm::AtomicRMWInst::BinOp Kind, 90 const CallExpr *E) { 91 QualType T = E->getType(); 92 assert(E->getArg(0)->getType()->isPointerType()); 93 assert(CGF.getContext().hasSameUnqualifiedType(T, 94 E->getArg(0)->getType()->getPointeeType())); 95 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 96 97 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 98 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 99 100 llvm::IntegerType *IntType = 101 llvm::IntegerType::get(CGF.getLLVMContext(), 102 CGF.getContext().getTypeSize(T)); 103 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 104 105 llvm::Value *Args[2]; 106 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 107 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 108 llvm::Type *ValueType = Args[1]->getType(); 109 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 110 111 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 112 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 113 return EmitFromInt(CGF, Result, T, ValueType); 114 } 115 116 static Value *EmitNontemporalStore(CodeGenFunction &CGF, const CallExpr *E) { 117 Value *Val = CGF.EmitScalarExpr(E->getArg(0)); 118 Value *Address = CGF.EmitScalarExpr(E->getArg(1)); 119 120 // Convert the type of the pointer to a pointer to the stored type. 121 Val = CGF.EmitToMemory(Val, E->getArg(0)->getType()); 122 Value *BC = CGF.Builder.CreateBitCast( 123 Address, llvm::PointerType::getUnqual(Val->getType()), "cast"); 124 LValue LV = CGF.MakeNaturalAlignAddrLValue(BC, E->getArg(0)->getType()); 125 LV.setNontemporal(true); 126 CGF.EmitStoreOfScalar(Val, LV, false); 127 return nullptr; 128 } 129 130 static Value *EmitNontemporalLoad(CodeGenFunction &CGF, const CallExpr *E) { 131 Value *Address = CGF.EmitScalarExpr(E->getArg(0)); 132 133 LValue LV = CGF.MakeNaturalAlignAddrLValue(Address, E->getType()); 134 LV.setNontemporal(true); 135 return CGF.EmitLoadOfScalar(LV, E->getExprLoc()); 136 } 137 138 static RValue EmitBinaryAtomic(CodeGenFunction &CGF, 139 llvm::AtomicRMWInst::BinOp Kind, 140 const CallExpr *E) { 141 return RValue::get(MakeBinaryAtomicValue(CGF, Kind, E)); 142 } 143 144 /// Utility to insert an atomic instruction based Instrinsic::ID and 145 /// the expression node, where the return value is the result of the 146 /// operation. 147 static RValue EmitBinaryAtomicPost(CodeGenFunction &CGF, 148 llvm::AtomicRMWInst::BinOp Kind, 149 const CallExpr *E, 150 Instruction::BinaryOps Op, 151 bool Invert = false) { 152 QualType T = E->getType(); 153 assert(E->getArg(0)->getType()->isPointerType()); 154 assert(CGF.getContext().hasSameUnqualifiedType(T, 155 E->getArg(0)->getType()->getPointeeType())); 156 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 157 158 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 159 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 160 161 llvm::IntegerType *IntType = 162 llvm::IntegerType::get(CGF.getLLVMContext(), 163 CGF.getContext().getTypeSize(T)); 164 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 165 166 llvm::Value *Args[2]; 167 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 168 llvm::Type *ValueType = Args[1]->getType(); 169 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 170 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 171 172 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 173 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 174 Result = CGF.Builder.CreateBinOp(Op, Result, Args[1]); 175 if (Invert) 176 Result = CGF.Builder.CreateBinOp(llvm::Instruction::Xor, Result, 177 llvm::ConstantInt::get(IntType, -1)); 178 Result = EmitFromInt(CGF, Result, T, ValueType); 179 return RValue::get(Result); 180 } 181 182 /// @brief Utility to insert an atomic cmpxchg instruction. 183 /// 184 /// @param CGF The current codegen function. 185 /// @param E Builtin call expression to convert to cmpxchg. 186 /// arg0 - address to operate on 187 /// arg1 - value to compare with 188 /// arg2 - new value 189 /// @param ReturnBool Specifies whether to return success flag of 190 /// cmpxchg result or the old value. 191 /// 192 /// @returns result of cmpxchg, according to ReturnBool 193 static Value *MakeAtomicCmpXchgValue(CodeGenFunction &CGF, const CallExpr *E, 194 bool ReturnBool) { 195 QualType T = ReturnBool ? E->getArg(1)->getType() : E->getType(); 196 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 197 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 198 199 llvm::IntegerType *IntType = llvm::IntegerType::get( 200 CGF.getLLVMContext(), CGF.getContext().getTypeSize(T)); 201 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 202 203 Value *Args[3]; 204 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 205 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 206 llvm::Type *ValueType = Args[1]->getType(); 207 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 208 Args[2] = EmitToInt(CGF, CGF.EmitScalarExpr(E->getArg(2)), T, IntType); 209 210 Value *Pair = CGF.Builder.CreateAtomicCmpXchg( 211 Args[0], Args[1], Args[2], llvm::AtomicOrdering::SequentiallyConsistent, 212 llvm::AtomicOrdering::SequentiallyConsistent); 213 if (ReturnBool) 214 // Extract boolean success flag and zext it to int. 215 return CGF.Builder.CreateZExt(CGF.Builder.CreateExtractValue(Pair, 1), 216 CGF.ConvertType(E->getType())); 217 else 218 // Extract old value and emit it using the same type as compare value. 219 return EmitFromInt(CGF, CGF.Builder.CreateExtractValue(Pair, 0), T, 220 ValueType); 221 } 222 223 // Emit a simple mangled intrinsic that has 1 argument and a return type 224 // matching the argument type. 225 static Value *emitUnaryBuiltin(CodeGenFunction &CGF, 226 const CallExpr *E, 227 unsigned IntrinsicID) { 228 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 229 230 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 231 return CGF.Builder.CreateCall(F, Src0); 232 } 233 234 // Emit an intrinsic that has 2 operands of the same type as its result. 235 static Value *emitBinaryBuiltin(CodeGenFunction &CGF, 236 const CallExpr *E, 237 unsigned IntrinsicID) { 238 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 239 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 240 241 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 242 return CGF.Builder.CreateCall(F, { Src0, Src1 }); 243 } 244 245 // Emit an intrinsic that has 3 operands of the same type as its result. 246 static Value *emitTernaryBuiltin(CodeGenFunction &CGF, 247 const CallExpr *E, 248 unsigned IntrinsicID) { 249 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 250 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 251 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); 252 253 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 254 return CGF.Builder.CreateCall(F, { Src0, Src1, Src2 }); 255 } 256 257 // Emit an intrinsic that has 1 float or double operand, and 1 integer. 258 static Value *emitFPIntBuiltin(CodeGenFunction &CGF, 259 const CallExpr *E, 260 unsigned IntrinsicID) { 261 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 262 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 263 264 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 265 return CGF.Builder.CreateCall(F, {Src0, Src1}); 266 } 267 268 /// EmitFAbs - Emit a call to @llvm.fabs(). 269 static Value *EmitFAbs(CodeGenFunction &CGF, Value *V) { 270 Value *F = CGF.CGM.getIntrinsic(Intrinsic::fabs, V->getType()); 271 llvm::CallInst *Call = CGF.Builder.CreateCall(F, V); 272 Call->setDoesNotAccessMemory(); 273 return Call; 274 } 275 276 /// Emit the computation of the sign bit for a floating point value. Returns 277 /// the i1 sign bit value. 278 static Value *EmitSignBit(CodeGenFunction &CGF, Value *V) { 279 LLVMContext &C = CGF.CGM.getLLVMContext(); 280 281 llvm::Type *Ty = V->getType(); 282 int Width = Ty->getPrimitiveSizeInBits(); 283 llvm::Type *IntTy = llvm::IntegerType::get(C, Width); 284 V = CGF.Builder.CreateBitCast(V, IntTy); 285 if (Ty->isPPC_FP128Ty()) { 286 // We want the sign bit of the higher-order double. The bitcast we just 287 // did works as if the double-double was stored to memory and then 288 // read as an i128. The "store" will put the higher-order double in the 289 // lower address in both little- and big-Endian modes, but the "load" 290 // will treat those bits as a different part of the i128: the low bits in 291 // little-Endian, the high bits in big-Endian. Therefore, on big-Endian 292 // we need to shift the high bits down to the low before truncating. 293 Width >>= 1; 294 if (CGF.getTarget().isBigEndian()) { 295 Value *ShiftCst = llvm::ConstantInt::get(IntTy, Width); 296 V = CGF.Builder.CreateLShr(V, ShiftCst); 297 } 298 // We are truncating value in order to extract the higher-order 299 // double, which we will be using to extract the sign from. 300 IntTy = llvm::IntegerType::get(C, Width); 301 V = CGF.Builder.CreateTrunc(V, IntTy); 302 } 303 Value *Zero = llvm::Constant::getNullValue(IntTy); 304 return CGF.Builder.CreateICmpSLT(V, Zero); 305 } 306 307 static RValue emitLibraryCall(CodeGenFunction &CGF, const FunctionDecl *FD, 308 const CallExpr *E, llvm::Constant *calleeValue) { 309 CGCallee callee = CGCallee::forDirect(calleeValue, FD); 310 return CGF.EmitCall(E->getCallee()->getType(), callee, E, ReturnValueSlot()); 311 } 312 313 /// \brief Emit a call to llvm.{sadd,uadd,ssub,usub,smul,umul}.with.overflow.* 314 /// depending on IntrinsicID. 315 /// 316 /// \arg CGF The current codegen function. 317 /// \arg IntrinsicID The ID for the Intrinsic we wish to generate. 318 /// \arg X The first argument to the llvm.*.with.overflow.*. 319 /// \arg Y The second argument to the llvm.*.with.overflow.*. 320 /// \arg Carry The carry returned by the llvm.*.with.overflow.*. 321 /// \returns The result (i.e. sum/product) returned by the intrinsic. 322 static llvm::Value *EmitOverflowIntrinsic(CodeGenFunction &CGF, 323 const llvm::Intrinsic::ID IntrinsicID, 324 llvm::Value *X, llvm::Value *Y, 325 llvm::Value *&Carry) { 326 // Make sure we have integers of the same width. 327 assert(X->getType() == Y->getType() && 328 "Arguments must be the same type. (Did you forget to make sure both " 329 "arguments have the same integer width?)"); 330 331 llvm::Value *Callee = CGF.CGM.getIntrinsic(IntrinsicID, X->getType()); 332 llvm::Value *Tmp = CGF.Builder.CreateCall(Callee, {X, Y}); 333 Carry = CGF.Builder.CreateExtractValue(Tmp, 1); 334 return CGF.Builder.CreateExtractValue(Tmp, 0); 335 } 336 337 static Value *emitRangedBuiltin(CodeGenFunction &CGF, 338 unsigned IntrinsicID, 339 int low, int high) { 340 llvm::MDBuilder MDHelper(CGF.getLLVMContext()); 341 llvm::MDNode *RNode = MDHelper.createRange(APInt(32, low), APInt(32, high)); 342 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, {}); 343 llvm::Instruction *Call = CGF.Builder.CreateCall(F); 344 Call->setMetadata(llvm::LLVMContext::MD_range, RNode); 345 return Call; 346 } 347 348 namespace { 349 struct WidthAndSignedness { 350 unsigned Width; 351 bool Signed; 352 }; 353 } 354 355 static WidthAndSignedness 356 getIntegerWidthAndSignedness(const clang::ASTContext &context, 357 const clang::QualType Type) { 358 assert(Type->isIntegerType() && "Given type is not an integer."); 359 unsigned Width = Type->isBooleanType() ? 1 : context.getTypeInfo(Type).Width; 360 bool Signed = Type->isSignedIntegerType(); 361 return {Width, Signed}; 362 } 363 364 // Given one or more integer types, this function produces an integer type that 365 // encompasses them: any value in one of the given types could be expressed in 366 // the encompassing type. 367 static struct WidthAndSignedness 368 EncompassingIntegerType(ArrayRef<struct WidthAndSignedness> Types) { 369 assert(Types.size() > 0 && "Empty list of types."); 370 371 // If any of the given types is signed, we must return a signed type. 372 bool Signed = false; 373 for (const auto &Type : Types) { 374 Signed |= Type.Signed; 375 } 376 377 // The encompassing type must have a width greater than or equal to the width 378 // of the specified types. Aditionally, if the encompassing type is signed, 379 // its width must be strictly greater than the width of any unsigned types 380 // given. 381 unsigned Width = 0; 382 for (const auto &Type : Types) { 383 unsigned MinWidth = Type.Width + (Signed && !Type.Signed); 384 if (Width < MinWidth) { 385 Width = MinWidth; 386 } 387 } 388 389 return {Width, Signed}; 390 } 391 392 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) { 393 llvm::Type *DestType = Int8PtrTy; 394 if (ArgValue->getType() != DestType) 395 ArgValue = 396 Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data()); 397 398 Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend; 399 return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue); 400 } 401 402 /// Checks if using the result of __builtin_object_size(p, @p From) in place of 403 /// __builtin_object_size(p, @p To) is correct 404 static bool areBOSTypesCompatible(int From, int To) { 405 // Note: Our __builtin_object_size implementation currently treats Type=0 and 406 // Type=2 identically. Encoding this implementation detail here may make 407 // improving __builtin_object_size difficult in the future, so it's omitted. 408 return From == To || (From == 0 && To == 1) || (From == 3 && To == 2); 409 } 410 411 static llvm::Value * 412 getDefaultBuiltinObjectSizeResult(unsigned Type, llvm::IntegerType *ResType) { 413 return ConstantInt::get(ResType, (Type & 2) ? 0 : -1, /*isSigned=*/true); 414 } 415 416 llvm::Value * 417 CodeGenFunction::evaluateOrEmitBuiltinObjectSize(const Expr *E, unsigned Type, 418 llvm::IntegerType *ResType) { 419 uint64_t ObjectSize; 420 if (!E->tryEvaluateObjectSize(ObjectSize, getContext(), Type)) 421 return emitBuiltinObjectSize(E, Type, ResType); 422 return ConstantInt::get(ResType, ObjectSize, /*isSigned=*/true); 423 } 424 425 /// Returns a Value corresponding to the size of the given expression. 426 /// This Value may be either of the following: 427 /// - A llvm::Argument (if E is a param with the pass_object_size attribute on 428 /// it) 429 /// - A call to the @llvm.objectsize intrinsic 430 llvm::Value * 431 CodeGenFunction::emitBuiltinObjectSize(const Expr *E, unsigned Type, 432 llvm::IntegerType *ResType) { 433 // We need to reference an argument if the pointer is a parameter with the 434 // pass_object_size attribute. 435 if (auto *D = dyn_cast<DeclRefExpr>(E->IgnoreParenImpCasts())) { 436 auto *Param = dyn_cast<ParmVarDecl>(D->getDecl()); 437 auto *PS = D->getDecl()->getAttr<PassObjectSizeAttr>(); 438 if (Param != nullptr && PS != nullptr && 439 areBOSTypesCompatible(PS->getType(), Type)) { 440 auto Iter = SizeArguments.find(Param); 441 assert(Iter != SizeArguments.end()); 442 443 const ImplicitParamDecl *D = Iter->second; 444 auto DIter = LocalDeclMap.find(D); 445 assert(DIter != LocalDeclMap.end()); 446 447 return EmitLoadOfScalar(DIter->second, /*volatile=*/false, 448 getContext().getSizeType(), E->getLocStart()); 449 } 450 } 451 452 // LLVM can't handle Type=3 appropriately, and __builtin_object_size shouldn't 453 // evaluate E for side-effects. In either case, we shouldn't lower to 454 // @llvm.objectsize. 455 if (Type == 3 || E->HasSideEffects(getContext())) 456 return getDefaultBuiltinObjectSizeResult(Type, ResType); 457 458 // LLVM only supports 0 and 2, make sure that we pass along that 459 // as a boolean. 460 auto *CI = ConstantInt::get(Builder.getInt1Ty(), (Type & 2) >> 1); 461 // FIXME: Get right address space. 462 llvm::Type *Tys[] = {ResType, Builder.getInt8PtrTy(0)}; 463 Value *F = CGM.getIntrinsic(Intrinsic::objectsize, Tys); 464 return Builder.CreateCall(F, {EmitScalarExpr(E), CI}); 465 } 466 467 // Many of MSVC builtins are on both x64 and ARM; to avoid repeating code, we 468 // handle them here. 469 enum class CodeGenFunction::MSVCIntrin { 470 _BitScanForward, 471 _BitScanReverse, 472 _InterlockedAnd, 473 _InterlockedDecrement, 474 _InterlockedExchange, 475 _InterlockedExchangeAdd, 476 _InterlockedExchangeSub, 477 _InterlockedIncrement, 478 _InterlockedOr, 479 _InterlockedXor, 480 }; 481 482 Value *CodeGenFunction::EmitMSVCBuiltinExpr(MSVCIntrin BuiltinID, 483 const CallExpr *E) { 484 switch (BuiltinID) { 485 case MSVCIntrin::_BitScanForward: 486 case MSVCIntrin::_BitScanReverse: { 487 Value *ArgValue = EmitScalarExpr(E->getArg(1)); 488 489 llvm::Type *ArgType = ArgValue->getType(); 490 llvm::Type *IndexType = 491 EmitScalarExpr(E->getArg(0))->getType()->getPointerElementType(); 492 llvm::Type *ResultType = ConvertType(E->getType()); 493 494 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 495 Value *ResZero = llvm::Constant::getNullValue(ResultType); 496 Value *ResOne = llvm::ConstantInt::get(ResultType, 1); 497 498 BasicBlock *Begin = Builder.GetInsertBlock(); 499 BasicBlock *End = createBasicBlock("bitscan_end", this->CurFn); 500 Builder.SetInsertPoint(End); 501 PHINode *Result = Builder.CreatePHI(ResultType, 2, "bitscan_result"); 502 503 Builder.SetInsertPoint(Begin); 504 Value *IsZero = Builder.CreateICmpEQ(ArgValue, ArgZero); 505 BasicBlock *NotZero = createBasicBlock("bitscan_not_zero", this->CurFn); 506 Builder.CreateCondBr(IsZero, End, NotZero); 507 Result->addIncoming(ResZero, Begin); 508 509 Builder.SetInsertPoint(NotZero); 510 Address IndexAddress = EmitPointerWithAlignment(E->getArg(0)); 511 512 if (BuiltinID == MSVCIntrin::_BitScanForward) { 513 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 514 Value *ZeroCount = Builder.CreateCall(F, {ArgValue, Builder.getTrue()}); 515 ZeroCount = Builder.CreateIntCast(ZeroCount, IndexType, false); 516 Builder.CreateStore(ZeroCount, IndexAddress, false); 517 } else { 518 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 519 Value *ArgTypeLastIndex = llvm::ConstantInt::get(IndexType, ArgWidth - 1); 520 521 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 522 Value *ZeroCount = Builder.CreateCall(F, {ArgValue, Builder.getTrue()}); 523 ZeroCount = Builder.CreateIntCast(ZeroCount, IndexType, false); 524 Value *Index = Builder.CreateNSWSub(ArgTypeLastIndex, ZeroCount); 525 Builder.CreateStore(Index, IndexAddress, false); 526 } 527 Builder.CreateBr(End); 528 Result->addIncoming(ResOne, NotZero); 529 530 Builder.SetInsertPoint(End); 531 return Result; 532 } 533 case MSVCIntrin::_InterlockedAnd: 534 return MakeBinaryAtomicValue(*this, AtomicRMWInst::And, E); 535 case MSVCIntrin::_InterlockedExchange: 536 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xchg, E); 537 case MSVCIntrin::_InterlockedExchangeAdd: 538 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Add, E); 539 case MSVCIntrin::_InterlockedExchangeSub: 540 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Sub, E); 541 case MSVCIntrin::_InterlockedOr: 542 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Or, E); 543 case MSVCIntrin::_InterlockedXor: 544 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xor, E); 545 546 case MSVCIntrin::_InterlockedDecrement: { 547 llvm::Type *IntTy = ConvertType(E->getType()); 548 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 549 AtomicRMWInst::Sub, 550 EmitScalarExpr(E->getArg(0)), 551 ConstantInt::get(IntTy, 1), 552 llvm::AtomicOrdering::SequentiallyConsistent); 553 return Builder.CreateSub(RMWI, ConstantInt::get(IntTy, 1)); 554 } 555 case MSVCIntrin::_InterlockedIncrement: { 556 llvm::Type *IntTy = ConvertType(E->getType()); 557 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 558 AtomicRMWInst::Add, 559 EmitScalarExpr(E->getArg(0)), 560 ConstantInt::get(IntTy, 1), 561 llvm::AtomicOrdering::SequentiallyConsistent); 562 return Builder.CreateAdd(RMWI, ConstantInt::get(IntTy, 1)); 563 } 564 } 565 llvm_unreachable("Incorrect MSVC intrinsic!"); 566 } 567 568 namespace { 569 // ARC cleanup for __builtin_os_log_format 570 struct CallObjCArcUse final : EHScopeStack::Cleanup { 571 CallObjCArcUse(llvm::Value *object) : object(object) {} 572 llvm::Value *object; 573 574 void Emit(CodeGenFunction &CGF, Flags flags) override { 575 CGF.EmitARCIntrinsicUse(object); 576 } 577 }; 578 } 579 580 RValue CodeGenFunction::EmitBuiltinExpr(const FunctionDecl *FD, 581 unsigned BuiltinID, const CallExpr *E, 582 ReturnValueSlot ReturnValue) { 583 // See if we can constant fold this builtin. If so, don't emit it at all. 584 Expr::EvalResult Result; 585 if (E->EvaluateAsRValue(Result, CGM.getContext()) && 586 !Result.hasSideEffects()) { 587 if (Result.Val.isInt()) 588 return RValue::get(llvm::ConstantInt::get(getLLVMContext(), 589 Result.Val.getInt())); 590 if (Result.Val.isFloat()) 591 return RValue::get(llvm::ConstantFP::get(getLLVMContext(), 592 Result.Val.getFloat())); 593 } 594 595 switch (BuiltinID) { 596 default: break; // Handle intrinsics and libm functions below. 597 case Builtin::BI__builtin___CFStringMakeConstantString: 598 case Builtin::BI__builtin___NSStringMakeConstantString: 599 return RValue::get(CGM.EmitConstantExpr(E, E->getType(), nullptr)); 600 case Builtin::BI__builtin_stdarg_start: 601 case Builtin::BI__builtin_va_start: 602 case Builtin::BI__va_start: 603 case Builtin::BI__builtin_va_end: 604 return RValue::get( 605 EmitVAStartEnd(BuiltinID == Builtin::BI__va_start 606 ? EmitScalarExpr(E->getArg(0)) 607 : EmitVAListRef(E->getArg(0)).getPointer(), 608 BuiltinID != Builtin::BI__builtin_va_end)); 609 case Builtin::BI__builtin_va_copy: { 610 Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer(); 611 Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer(); 612 613 llvm::Type *Type = Int8PtrTy; 614 615 DstPtr = Builder.CreateBitCast(DstPtr, Type); 616 SrcPtr = Builder.CreateBitCast(SrcPtr, Type); 617 return RValue::get(Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), 618 {DstPtr, SrcPtr})); 619 } 620 case Builtin::BI__builtin_abs: 621 case Builtin::BI__builtin_labs: 622 case Builtin::BI__builtin_llabs: { 623 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 624 625 Value *NegOp = Builder.CreateNeg(ArgValue, "neg"); 626 Value *CmpResult = 627 Builder.CreateICmpSGE(ArgValue, 628 llvm::Constant::getNullValue(ArgValue->getType()), 629 "abscond"); 630 Value *Result = 631 Builder.CreateSelect(CmpResult, ArgValue, NegOp, "abs"); 632 633 return RValue::get(Result); 634 } 635 case Builtin::BI__builtin_fabs: 636 case Builtin::BI__builtin_fabsf: 637 case Builtin::BI__builtin_fabsl: { 638 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::fabs)); 639 } 640 case Builtin::BI__builtin_fmod: 641 case Builtin::BI__builtin_fmodf: 642 case Builtin::BI__builtin_fmodl: { 643 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 644 Value *Arg2 = EmitScalarExpr(E->getArg(1)); 645 Value *Result = Builder.CreateFRem(Arg1, Arg2, "fmod"); 646 return RValue::get(Result); 647 } 648 case Builtin::BI__builtin_copysign: 649 case Builtin::BI__builtin_copysignf: 650 case Builtin::BI__builtin_copysignl: { 651 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::copysign)); 652 } 653 case Builtin::BI__builtin_ceil: 654 case Builtin::BI__builtin_ceilf: 655 case Builtin::BI__builtin_ceill: { 656 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::ceil)); 657 } 658 case Builtin::BI__builtin_floor: 659 case Builtin::BI__builtin_floorf: 660 case Builtin::BI__builtin_floorl: { 661 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::floor)); 662 } 663 case Builtin::BI__builtin_trunc: 664 case Builtin::BI__builtin_truncf: 665 case Builtin::BI__builtin_truncl: { 666 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::trunc)); 667 } 668 case Builtin::BI__builtin_rint: 669 case Builtin::BI__builtin_rintf: 670 case Builtin::BI__builtin_rintl: { 671 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::rint)); 672 } 673 case Builtin::BI__builtin_nearbyint: 674 case Builtin::BI__builtin_nearbyintf: 675 case Builtin::BI__builtin_nearbyintl: { 676 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::nearbyint)); 677 } 678 case Builtin::BI__builtin_round: 679 case Builtin::BI__builtin_roundf: 680 case Builtin::BI__builtin_roundl: { 681 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::round)); 682 } 683 case Builtin::BI__builtin_fmin: 684 case Builtin::BI__builtin_fminf: 685 case Builtin::BI__builtin_fminl: { 686 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::minnum)); 687 } 688 case Builtin::BI__builtin_fmax: 689 case Builtin::BI__builtin_fmaxf: 690 case Builtin::BI__builtin_fmaxl: { 691 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::maxnum)); 692 } 693 case Builtin::BI__builtin_conj: 694 case Builtin::BI__builtin_conjf: 695 case Builtin::BI__builtin_conjl: { 696 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 697 Value *Real = ComplexVal.first; 698 Value *Imag = ComplexVal.second; 699 Value *Zero = 700 Imag->getType()->isFPOrFPVectorTy() 701 ? llvm::ConstantFP::getZeroValueForNegation(Imag->getType()) 702 : llvm::Constant::getNullValue(Imag->getType()); 703 704 Imag = Builder.CreateFSub(Zero, Imag, "sub"); 705 return RValue::getComplex(std::make_pair(Real, Imag)); 706 } 707 case Builtin::BI__builtin_creal: 708 case Builtin::BI__builtin_crealf: 709 case Builtin::BI__builtin_creall: 710 case Builtin::BIcreal: 711 case Builtin::BIcrealf: 712 case Builtin::BIcreall: { 713 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 714 return RValue::get(ComplexVal.first); 715 } 716 717 case Builtin::BI__builtin_cimag: 718 case Builtin::BI__builtin_cimagf: 719 case Builtin::BI__builtin_cimagl: 720 case Builtin::BIcimag: 721 case Builtin::BIcimagf: 722 case Builtin::BIcimagl: { 723 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 724 return RValue::get(ComplexVal.second); 725 } 726 727 case Builtin::BI__builtin_ctzs: 728 case Builtin::BI__builtin_ctz: 729 case Builtin::BI__builtin_ctzl: 730 case Builtin::BI__builtin_ctzll: { 731 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 732 733 llvm::Type *ArgType = ArgValue->getType(); 734 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 735 736 llvm::Type *ResultType = ConvertType(E->getType()); 737 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 738 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 739 if (Result->getType() != ResultType) 740 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 741 "cast"); 742 return RValue::get(Result); 743 } 744 case Builtin::BI__builtin_clzs: 745 case Builtin::BI__builtin_clz: 746 case Builtin::BI__builtin_clzl: 747 case Builtin::BI__builtin_clzll: { 748 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 749 750 llvm::Type *ArgType = ArgValue->getType(); 751 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 752 753 llvm::Type *ResultType = ConvertType(E->getType()); 754 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 755 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 756 if (Result->getType() != ResultType) 757 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 758 "cast"); 759 return RValue::get(Result); 760 } 761 case Builtin::BI__builtin_ffs: 762 case Builtin::BI__builtin_ffsl: 763 case Builtin::BI__builtin_ffsll: { 764 // ffs(x) -> x ? cttz(x) + 1 : 0 765 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 766 767 llvm::Type *ArgType = ArgValue->getType(); 768 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 769 770 llvm::Type *ResultType = ConvertType(E->getType()); 771 Value *Tmp = 772 Builder.CreateAdd(Builder.CreateCall(F, {ArgValue, Builder.getTrue()}), 773 llvm::ConstantInt::get(ArgType, 1)); 774 Value *Zero = llvm::Constant::getNullValue(ArgType); 775 Value *IsZero = Builder.CreateICmpEQ(ArgValue, Zero, "iszero"); 776 Value *Result = Builder.CreateSelect(IsZero, Zero, Tmp, "ffs"); 777 if (Result->getType() != ResultType) 778 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 779 "cast"); 780 return RValue::get(Result); 781 } 782 case Builtin::BI__builtin_parity: 783 case Builtin::BI__builtin_parityl: 784 case Builtin::BI__builtin_parityll: { 785 // parity(x) -> ctpop(x) & 1 786 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 787 788 llvm::Type *ArgType = ArgValue->getType(); 789 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 790 791 llvm::Type *ResultType = ConvertType(E->getType()); 792 Value *Tmp = Builder.CreateCall(F, ArgValue); 793 Value *Result = Builder.CreateAnd(Tmp, llvm::ConstantInt::get(ArgType, 1)); 794 if (Result->getType() != ResultType) 795 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 796 "cast"); 797 return RValue::get(Result); 798 } 799 case Builtin::BI__popcnt16: 800 case Builtin::BI__popcnt: 801 case Builtin::BI__popcnt64: 802 case Builtin::BI__builtin_popcount: 803 case Builtin::BI__builtin_popcountl: 804 case Builtin::BI__builtin_popcountll: { 805 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 806 807 llvm::Type *ArgType = ArgValue->getType(); 808 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 809 810 llvm::Type *ResultType = ConvertType(E->getType()); 811 Value *Result = Builder.CreateCall(F, ArgValue); 812 if (Result->getType() != ResultType) 813 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 814 "cast"); 815 return RValue::get(Result); 816 } 817 case Builtin::BI_rotr8: 818 case Builtin::BI_rotr16: 819 case Builtin::BI_rotr: 820 case Builtin::BI_lrotr: 821 case Builtin::BI_rotr64: { 822 Value *Val = EmitScalarExpr(E->getArg(0)); 823 Value *Shift = EmitScalarExpr(E->getArg(1)); 824 825 llvm::Type *ArgType = Val->getType(); 826 Shift = Builder.CreateIntCast(Shift, ArgType, false); 827 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 828 Value *ArgTypeSize = llvm::ConstantInt::get(ArgType, ArgWidth); 829 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 830 831 Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1); 832 Shift = Builder.CreateAnd(Shift, Mask); 833 Value *LeftShift = Builder.CreateSub(ArgTypeSize, Shift); 834 835 Value *RightShifted = Builder.CreateLShr(Val, Shift); 836 Value *LeftShifted = Builder.CreateShl(Val, LeftShift); 837 Value *Rotated = Builder.CreateOr(LeftShifted, RightShifted); 838 839 Value *ShiftIsZero = Builder.CreateICmpEQ(Shift, ArgZero); 840 Value *Result = Builder.CreateSelect(ShiftIsZero, Val, Rotated); 841 return RValue::get(Result); 842 } 843 case Builtin::BI_rotl8: 844 case Builtin::BI_rotl16: 845 case Builtin::BI_rotl: 846 case Builtin::BI_lrotl: 847 case Builtin::BI_rotl64: { 848 Value *Val = EmitScalarExpr(E->getArg(0)); 849 Value *Shift = EmitScalarExpr(E->getArg(1)); 850 851 llvm::Type *ArgType = Val->getType(); 852 Shift = Builder.CreateIntCast(Shift, ArgType, false); 853 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 854 Value *ArgTypeSize = llvm::ConstantInt::get(ArgType, ArgWidth); 855 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 856 857 Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1); 858 Shift = Builder.CreateAnd(Shift, Mask); 859 Value *RightShift = Builder.CreateSub(ArgTypeSize, Shift); 860 861 Value *LeftShifted = Builder.CreateShl(Val, Shift); 862 Value *RightShifted = Builder.CreateLShr(Val, RightShift); 863 Value *Rotated = Builder.CreateOr(LeftShifted, RightShifted); 864 865 Value *ShiftIsZero = Builder.CreateICmpEQ(Shift, ArgZero); 866 Value *Result = Builder.CreateSelect(ShiftIsZero, Val, Rotated); 867 return RValue::get(Result); 868 } 869 case Builtin::BI__builtin_unpredictable: { 870 // Always return the argument of __builtin_unpredictable. LLVM does not 871 // handle this builtin. Metadata for this builtin should be added directly 872 // to instructions such as branches or switches that use it. 873 return RValue::get(EmitScalarExpr(E->getArg(0))); 874 } 875 case Builtin::BI__builtin_expect: { 876 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 877 llvm::Type *ArgType = ArgValue->getType(); 878 879 Value *ExpectedValue = EmitScalarExpr(E->getArg(1)); 880 // Don't generate llvm.expect on -O0 as the backend won't use it for 881 // anything. 882 // Note, we still IRGen ExpectedValue because it could have side-effects. 883 if (CGM.getCodeGenOpts().OptimizationLevel == 0) 884 return RValue::get(ArgValue); 885 886 Value *FnExpect = CGM.getIntrinsic(Intrinsic::expect, ArgType); 887 Value *Result = 888 Builder.CreateCall(FnExpect, {ArgValue, ExpectedValue}, "expval"); 889 return RValue::get(Result); 890 } 891 case Builtin::BI__builtin_assume_aligned: { 892 Value *PtrValue = EmitScalarExpr(E->getArg(0)); 893 Value *OffsetValue = 894 (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : nullptr; 895 896 Value *AlignmentValue = EmitScalarExpr(E->getArg(1)); 897 ConstantInt *AlignmentCI = cast<ConstantInt>(AlignmentValue); 898 unsigned Alignment = (unsigned) AlignmentCI->getZExtValue(); 899 900 EmitAlignmentAssumption(PtrValue, Alignment, OffsetValue); 901 return RValue::get(PtrValue); 902 } 903 case Builtin::BI__assume: 904 case Builtin::BI__builtin_assume: { 905 if (E->getArg(0)->HasSideEffects(getContext())) 906 return RValue::get(nullptr); 907 908 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 909 Value *FnAssume = CGM.getIntrinsic(Intrinsic::assume); 910 return RValue::get(Builder.CreateCall(FnAssume, ArgValue)); 911 } 912 case Builtin::BI__builtin_bswap16: 913 case Builtin::BI__builtin_bswap32: 914 case Builtin::BI__builtin_bswap64: { 915 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bswap)); 916 } 917 case Builtin::BI__builtin_bitreverse8: 918 case Builtin::BI__builtin_bitreverse16: 919 case Builtin::BI__builtin_bitreverse32: 920 case Builtin::BI__builtin_bitreverse64: { 921 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bitreverse)); 922 } 923 case Builtin::BI__builtin_object_size: { 924 unsigned Type = 925 E->getArg(1)->EvaluateKnownConstInt(getContext()).getZExtValue(); 926 auto *ResType = cast<llvm::IntegerType>(ConvertType(E->getType())); 927 928 // We pass this builtin onto the optimizer so that it can figure out the 929 // object size in more complex cases. 930 return RValue::get(emitBuiltinObjectSize(E->getArg(0), Type, ResType)); 931 } 932 case Builtin::BI__builtin_prefetch: { 933 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); 934 // FIXME: Technically these constants should of type 'int', yes? 935 RW = (E->getNumArgs() > 1) ? EmitScalarExpr(E->getArg(1)) : 936 llvm::ConstantInt::get(Int32Ty, 0); 937 Locality = (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : 938 llvm::ConstantInt::get(Int32Ty, 3); 939 Value *Data = llvm::ConstantInt::get(Int32Ty, 1); 940 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 941 return RValue::get(Builder.CreateCall(F, {Address, RW, Locality, Data})); 942 } 943 case Builtin::BI__builtin_readcyclecounter: { 944 Value *F = CGM.getIntrinsic(Intrinsic::readcyclecounter); 945 return RValue::get(Builder.CreateCall(F)); 946 } 947 case Builtin::BI__builtin___clear_cache: { 948 Value *Begin = EmitScalarExpr(E->getArg(0)); 949 Value *End = EmitScalarExpr(E->getArg(1)); 950 Value *F = CGM.getIntrinsic(Intrinsic::clear_cache); 951 return RValue::get(Builder.CreateCall(F, {Begin, End})); 952 } 953 case Builtin::BI__builtin_trap: 954 return RValue::get(EmitTrapCall(Intrinsic::trap)); 955 case Builtin::BI__debugbreak: 956 return RValue::get(EmitTrapCall(Intrinsic::debugtrap)); 957 case Builtin::BI__builtin_unreachable: { 958 if (SanOpts.has(SanitizerKind::Unreachable)) { 959 SanitizerScope SanScope(this); 960 EmitCheck(std::make_pair(static_cast<llvm::Value *>(Builder.getFalse()), 961 SanitizerKind::Unreachable), 962 "builtin_unreachable", EmitCheckSourceLocation(E->getExprLoc()), 963 None); 964 } else 965 Builder.CreateUnreachable(); 966 967 // We do need to preserve an insertion point. 968 EmitBlock(createBasicBlock("unreachable.cont")); 969 970 return RValue::get(nullptr); 971 } 972 973 case Builtin::BI__builtin_powi: 974 case Builtin::BI__builtin_powif: 975 case Builtin::BI__builtin_powil: { 976 Value *Base = EmitScalarExpr(E->getArg(0)); 977 Value *Exponent = EmitScalarExpr(E->getArg(1)); 978 llvm::Type *ArgType = Base->getType(); 979 Value *F = CGM.getIntrinsic(Intrinsic::powi, ArgType); 980 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 981 } 982 983 case Builtin::BI__builtin_isgreater: 984 case Builtin::BI__builtin_isgreaterequal: 985 case Builtin::BI__builtin_isless: 986 case Builtin::BI__builtin_islessequal: 987 case Builtin::BI__builtin_islessgreater: 988 case Builtin::BI__builtin_isunordered: { 989 // Ordered comparisons: we know the arguments to these are matching scalar 990 // floating point values. 991 Value *LHS = EmitScalarExpr(E->getArg(0)); 992 Value *RHS = EmitScalarExpr(E->getArg(1)); 993 994 switch (BuiltinID) { 995 default: llvm_unreachable("Unknown ordered comparison"); 996 case Builtin::BI__builtin_isgreater: 997 LHS = Builder.CreateFCmpOGT(LHS, RHS, "cmp"); 998 break; 999 case Builtin::BI__builtin_isgreaterequal: 1000 LHS = Builder.CreateFCmpOGE(LHS, RHS, "cmp"); 1001 break; 1002 case Builtin::BI__builtin_isless: 1003 LHS = Builder.CreateFCmpOLT(LHS, RHS, "cmp"); 1004 break; 1005 case Builtin::BI__builtin_islessequal: 1006 LHS = Builder.CreateFCmpOLE(LHS, RHS, "cmp"); 1007 break; 1008 case Builtin::BI__builtin_islessgreater: 1009 LHS = Builder.CreateFCmpONE(LHS, RHS, "cmp"); 1010 break; 1011 case Builtin::BI__builtin_isunordered: 1012 LHS = Builder.CreateFCmpUNO(LHS, RHS, "cmp"); 1013 break; 1014 } 1015 // ZExt bool to int type. 1016 return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType()))); 1017 } 1018 case Builtin::BI__builtin_isnan: { 1019 Value *V = EmitScalarExpr(E->getArg(0)); 1020 V = Builder.CreateFCmpUNO(V, V, "cmp"); 1021 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 1022 } 1023 1024 case Builtin::BIfinite: 1025 case Builtin::BI__finite: 1026 case Builtin::BIfinitef: 1027 case Builtin::BI__finitef: 1028 case Builtin::BIfinitel: 1029 case Builtin::BI__finitel: 1030 case Builtin::BI__builtin_isinf: 1031 case Builtin::BI__builtin_isfinite: { 1032 // isinf(x) --> fabs(x) == infinity 1033 // isfinite(x) --> fabs(x) != infinity 1034 // x != NaN via the ordered compare in either case. 1035 Value *V = EmitScalarExpr(E->getArg(0)); 1036 Value *Fabs = EmitFAbs(*this, V); 1037 Constant *Infinity = ConstantFP::getInfinity(V->getType()); 1038 CmpInst::Predicate Pred = (BuiltinID == Builtin::BI__builtin_isinf) 1039 ? CmpInst::FCMP_OEQ 1040 : CmpInst::FCMP_ONE; 1041 Value *FCmp = Builder.CreateFCmp(Pred, Fabs, Infinity, "cmpinf"); 1042 return RValue::get(Builder.CreateZExt(FCmp, ConvertType(E->getType()))); 1043 } 1044 1045 case Builtin::BI__builtin_isinf_sign: { 1046 // isinf_sign(x) -> fabs(x) == infinity ? (signbit(x) ? -1 : 1) : 0 1047 Value *Arg = EmitScalarExpr(E->getArg(0)); 1048 Value *AbsArg = EmitFAbs(*this, Arg); 1049 Value *IsInf = Builder.CreateFCmpOEQ( 1050 AbsArg, ConstantFP::getInfinity(Arg->getType()), "isinf"); 1051 Value *IsNeg = EmitSignBit(*this, Arg); 1052 1053 llvm::Type *IntTy = ConvertType(E->getType()); 1054 Value *Zero = Constant::getNullValue(IntTy); 1055 Value *One = ConstantInt::get(IntTy, 1); 1056 Value *NegativeOne = ConstantInt::get(IntTy, -1); 1057 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); 1058 Value *Result = Builder.CreateSelect(IsInf, SignResult, Zero); 1059 return RValue::get(Result); 1060 } 1061 1062 case Builtin::BI__builtin_isnormal: { 1063 // isnormal(x) --> x == x && fabsf(x) < infinity && fabsf(x) >= float_min 1064 Value *V = EmitScalarExpr(E->getArg(0)); 1065 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 1066 1067 Value *Abs = EmitFAbs(*this, V); 1068 Value *IsLessThanInf = 1069 Builder.CreateFCmpULT(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 1070 APFloat Smallest = APFloat::getSmallestNormalized( 1071 getContext().getFloatTypeSemantics(E->getArg(0)->getType())); 1072 Value *IsNormal = 1073 Builder.CreateFCmpUGE(Abs, ConstantFP::get(V->getContext(), Smallest), 1074 "isnormal"); 1075 V = Builder.CreateAnd(Eq, IsLessThanInf, "and"); 1076 V = Builder.CreateAnd(V, IsNormal, "and"); 1077 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 1078 } 1079 1080 case Builtin::BI__builtin_fpclassify: { 1081 Value *V = EmitScalarExpr(E->getArg(5)); 1082 llvm::Type *Ty = ConvertType(E->getArg(5)->getType()); 1083 1084 // Create Result 1085 BasicBlock *Begin = Builder.GetInsertBlock(); 1086 BasicBlock *End = createBasicBlock("fpclassify_end", this->CurFn); 1087 Builder.SetInsertPoint(End); 1088 PHINode *Result = 1089 Builder.CreatePHI(ConvertType(E->getArg(0)->getType()), 4, 1090 "fpclassify_result"); 1091 1092 // if (V==0) return FP_ZERO 1093 Builder.SetInsertPoint(Begin); 1094 Value *IsZero = Builder.CreateFCmpOEQ(V, Constant::getNullValue(Ty), 1095 "iszero"); 1096 Value *ZeroLiteral = EmitScalarExpr(E->getArg(4)); 1097 BasicBlock *NotZero = createBasicBlock("fpclassify_not_zero", this->CurFn); 1098 Builder.CreateCondBr(IsZero, End, NotZero); 1099 Result->addIncoming(ZeroLiteral, Begin); 1100 1101 // if (V != V) return FP_NAN 1102 Builder.SetInsertPoint(NotZero); 1103 Value *IsNan = Builder.CreateFCmpUNO(V, V, "cmp"); 1104 Value *NanLiteral = EmitScalarExpr(E->getArg(0)); 1105 BasicBlock *NotNan = createBasicBlock("fpclassify_not_nan", this->CurFn); 1106 Builder.CreateCondBr(IsNan, End, NotNan); 1107 Result->addIncoming(NanLiteral, NotZero); 1108 1109 // if (fabs(V) == infinity) return FP_INFINITY 1110 Builder.SetInsertPoint(NotNan); 1111 Value *VAbs = EmitFAbs(*this, V); 1112 Value *IsInf = 1113 Builder.CreateFCmpOEQ(VAbs, ConstantFP::getInfinity(V->getType()), 1114 "isinf"); 1115 Value *InfLiteral = EmitScalarExpr(E->getArg(1)); 1116 BasicBlock *NotInf = createBasicBlock("fpclassify_not_inf", this->CurFn); 1117 Builder.CreateCondBr(IsInf, End, NotInf); 1118 Result->addIncoming(InfLiteral, NotNan); 1119 1120 // if (fabs(V) >= MIN_NORMAL) return FP_NORMAL else FP_SUBNORMAL 1121 Builder.SetInsertPoint(NotInf); 1122 APFloat Smallest = APFloat::getSmallestNormalized( 1123 getContext().getFloatTypeSemantics(E->getArg(5)->getType())); 1124 Value *IsNormal = 1125 Builder.CreateFCmpUGE(VAbs, ConstantFP::get(V->getContext(), Smallest), 1126 "isnormal"); 1127 Value *NormalResult = 1128 Builder.CreateSelect(IsNormal, EmitScalarExpr(E->getArg(2)), 1129 EmitScalarExpr(E->getArg(3))); 1130 Builder.CreateBr(End); 1131 Result->addIncoming(NormalResult, NotInf); 1132 1133 // return Result 1134 Builder.SetInsertPoint(End); 1135 return RValue::get(Result); 1136 } 1137 1138 case Builtin::BIalloca: 1139 case Builtin::BI_alloca: 1140 case Builtin::BI__builtin_alloca: { 1141 Value *Size = EmitScalarExpr(E->getArg(0)); 1142 const TargetInfo &TI = getContext().getTargetInfo(); 1143 // The alignment of the alloca should correspond to __BIGGEST_ALIGNMENT__. 1144 unsigned SuitableAlignmentInBytes = 1145 CGM.getContext() 1146 .toCharUnitsFromBits(TI.getSuitableAlign()) 1147 .getQuantity(); 1148 AllocaInst *AI = Builder.CreateAlloca(Builder.getInt8Ty(), Size); 1149 AI->setAlignment(SuitableAlignmentInBytes); 1150 return RValue::get(AI); 1151 } 1152 1153 case Builtin::BI__builtin_alloca_with_align: { 1154 Value *Size = EmitScalarExpr(E->getArg(0)); 1155 Value *AlignmentInBitsValue = EmitScalarExpr(E->getArg(1)); 1156 auto *AlignmentInBitsCI = cast<ConstantInt>(AlignmentInBitsValue); 1157 unsigned AlignmentInBits = AlignmentInBitsCI->getZExtValue(); 1158 unsigned AlignmentInBytes = 1159 CGM.getContext().toCharUnitsFromBits(AlignmentInBits).getQuantity(); 1160 AllocaInst *AI = Builder.CreateAlloca(Builder.getInt8Ty(), Size); 1161 AI->setAlignment(AlignmentInBytes); 1162 return RValue::get(AI); 1163 } 1164 1165 case Builtin::BIbzero: 1166 case Builtin::BI__builtin_bzero: { 1167 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1168 Value *SizeVal = EmitScalarExpr(E->getArg(1)); 1169 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1170 E->getArg(0)->getExprLoc(), FD, 0); 1171 Builder.CreateMemSet(Dest, Builder.getInt8(0), SizeVal, false); 1172 return RValue::get(Dest.getPointer()); 1173 } 1174 case Builtin::BImemcpy: 1175 case Builtin::BI__builtin_memcpy: { 1176 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1177 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1178 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1179 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1180 E->getArg(0)->getExprLoc(), FD, 0); 1181 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 1182 E->getArg(1)->getExprLoc(), FD, 1); 1183 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 1184 return RValue::get(Dest.getPointer()); 1185 } 1186 1187 case Builtin::BI__builtin___memcpy_chk: { 1188 // fold __builtin_memcpy_chk(x, y, cst1, cst2) to memcpy iff cst1<=cst2. 1189 llvm::APSInt Size, DstSize; 1190 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1191 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1192 break; 1193 if (Size.ugt(DstSize)) 1194 break; 1195 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1196 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1197 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1198 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 1199 return RValue::get(Dest.getPointer()); 1200 } 1201 1202 case Builtin::BI__builtin_objc_memmove_collectable: { 1203 Address DestAddr = EmitPointerWithAlignment(E->getArg(0)); 1204 Address SrcAddr = EmitPointerWithAlignment(E->getArg(1)); 1205 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1206 CGM.getObjCRuntime().EmitGCMemmoveCollectable(*this, 1207 DestAddr, SrcAddr, SizeVal); 1208 return RValue::get(DestAddr.getPointer()); 1209 } 1210 1211 case Builtin::BI__builtin___memmove_chk: { 1212 // fold __builtin_memmove_chk(x, y, cst1, cst2) to memmove iff cst1<=cst2. 1213 llvm::APSInt Size, DstSize; 1214 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1215 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1216 break; 1217 if (Size.ugt(DstSize)) 1218 break; 1219 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1220 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1221 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1222 Builder.CreateMemMove(Dest, Src, SizeVal, false); 1223 return RValue::get(Dest.getPointer()); 1224 } 1225 1226 case Builtin::BImemmove: 1227 case Builtin::BI__builtin_memmove: { 1228 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1229 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1230 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1231 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1232 E->getArg(0)->getExprLoc(), FD, 0); 1233 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 1234 E->getArg(1)->getExprLoc(), FD, 1); 1235 Builder.CreateMemMove(Dest, Src, SizeVal, false); 1236 return RValue::get(Dest.getPointer()); 1237 } 1238 case Builtin::BImemset: 1239 case Builtin::BI__builtin_memset: { 1240 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1241 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 1242 Builder.getInt8Ty()); 1243 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1244 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1245 E->getArg(0)->getExprLoc(), FD, 0); 1246 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 1247 return RValue::get(Dest.getPointer()); 1248 } 1249 case Builtin::BI__builtin___memset_chk: { 1250 // fold __builtin_memset_chk(x, y, cst1, cst2) to memset iff cst1<=cst2. 1251 llvm::APSInt Size, DstSize; 1252 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1253 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1254 break; 1255 if (Size.ugt(DstSize)) 1256 break; 1257 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1258 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 1259 Builder.getInt8Ty()); 1260 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1261 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 1262 return RValue::get(Dest.getPointer()); 1263 } 1264 case Builtin::BI__builtin_dwarf_cfa: { 1265 // The offset in bytes from the first argument to the CFA. 1266 // 1267 // Why on earth is this in the frontend? Is there any reason at 1268 // all that the backend can't reasonably determine this while 1269 // lowering llvm.eh.dwarf.cfa()? 1270 // 1271 // TODO: If there's a satisfactory reason, add a target hook for 1272 // this instead of hard-coding 0, which is correct for most targets. 1273 int32_t Offset = 0; 1274 1275 Value *F = CGM.getIntrinsic(Intrinsic::eh_dwarf_cfa); 1276 return RValue::get(Builder.CreateCall(F, 1277 llvm::ConstantInt::get(Int32Ty, Offset))); 1278 } 1279 case Builtin::BI__builtin_return_address: { 1280 Value *Depth = 1281 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 1282 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 1283 return RValue::get(Builder.CreateCall(F, Depth)); 1284 } 1285 case Builtin::BI_ReturnAddress: { 1286 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 1287 return RValue::get(Builder.CreateCall(F, Builder.getInt32(0))); 1288 } 1289 case Builtin::BI__builtin_frame_address: { 1290 Value *Depth = 1291 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 1292 Value *F = CGM.getIntrinsic(Intrinsic::frameaddress); 1293 return RValue::get(Builder.CreateCall(F, Depth)); 1294 } 1295 case Builtin::BI__builtin_extract_return_addr: { 1296 Value *Address = EmitScalarExpr(E->getArg(0)); 1297 Value *Result = getTargetHooks().decodeReturnAddress(*this, Address); 1298 return RValue::get(Result); 1299 } 1300 case Builtin::BI__builtin_frob_return_addr: { 1301 Value *Address = EmitScalarExpr(E->getArg(0)); 1302 Value *Result = getTargetHooks().encodeReturnAddress(*this, Address); 1303 return RValue::get(Result); 1304 } 1305 case Builtin::BI__builtin_dwarf_sp_column: { 1306 llvm::IntegerType *Ty 1307 = cast<llvm::IntegerType>(ConvertType(E->getType())); 1308 int Column = getTargetHooks().getDwarfEHStackPointer(CGM); 1309 if (Column == -1) { 1310 CGM.ErrorUnsupported(E, "__builtin_dwarf_sp_column"); 1311 return RValue::get(llvm::UndefValue::get(Ty)); 1312 } 1313 return RValue::get(llvm::ConstantInt::get(Ty, Column, true)); 1314 } 1315 case Builtin::BI__builtin_init_dwarf_reg_size_table: { 1316 Value *Address = EmitScalarExpr(E->getArg(0)); 1317 if (getTargetHooks().initDwarfEHRegSizeTable(*this, Address)) 1318 CGM.ErrorUnsupported(E, "__builtin_init_dwarf_reg_size_table"); 1319 return RValue::get(llvm::UndefValue::get(ConvertType(E->getType()))); 1320 } 1321 case Builtin::BI__builtin_eh_return: { 1322 Value *Int = EmitScalarExpr(E->getArg(0)); 1323 Value *Ptr = EmitScalarExpr(E->getArg(1)); 1324 1325 llvm::IntegerType *IntTy = cast<llvm::IntegerType>(Int->getType()); 1326 assert((IntTy->getBitWidth() == 32 || IntTy->getBitWidth() == 64) && 1327 "LLVM's __builtin_eh_return only supports 32- and 64-bit variants"); 1328 Value *F = CGM.getIntrinsic(IntTy->getBitWidth() == 32 1329 ? Intrinsic::eh_return_i32 1330 : Intrinsic::eh_return_i64); 1331 Builder.CreateCall(F, {Int, Ptr}); 1332 Builder.CreateUnreachable(); 1333 1334 // We do need to preserve an insertion point. 1335 EmitBlock(createBasicBlock("builtin_eh_return.cont")); 1336 1337 return RValue::get(nullptr); 1338 } 1339 case Builtin::BI__builtin_unwind_init: { 1340 Value *F = CGM.getIntrinsic(Intrinsic::eh_unwind_init); 1341 return RValue::get(Builder.CreateCall(F)); 1342 } 1343 case Builtin::BI__builtin_extend_pointer: { 1344 // Extends a pointer to the size of an _Unwind_Word, which is 1345 // uint64_t on all platforms. Generally this gets poked into a 1346 // register and eventually used as an address, so if the 1347 // addressing registers are wider than pointers and the platform 1348 // doesn't implicitly ignore high-order bits when doing 1349 // addressing, we need to make sure we zext / sext based on 1350 // the platform's expectations. 1351 // 1352 // See: http://gcc.gnu.org/ml/gcc-bugs/2002-02/msg00237.html 1353 1354 // Cast the pointer to intptr_t. 1355 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1356 Value *Result = Builder.CreatePtrToInt(Ptr, IntPtrTy, "extend.cast"); 1357 1358 // If that's 64 bits, we're done. 1359 if (IntPtrTy->getBitWidth() == 64) 1360 return RValue::get(Result); 1361 1362 // Otherwise, ask the codegen data what to do. 1363 if (getTargetHooks().extendPointerWithSExt()) 1364 return RValue::get(Builder.CreateSExt(Result, Int64Ty, "extend.sext")); 1365 else 1366 return RValue::get(Builder.CreateZExt(Result, Int64Ty, "extend.zext")); 1367 } 1368 case Builtin::BI__builtin_setjmp: { 1369 // Buffer is a void**. 1370 Address Buf = EmitPointerWithAlignment(E->getArg(0)); 1371 1372 // Store the frame pointer to the setjmp buffer. 1373 Value *FrameAddr = 1374 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1375 ConstantInt::get(Int32Ty, 0)); 1376 Builder.CreateStore(FrameAddr, Buf); 1377 1378 // Store the stack pointer to the setjmp buffer. 1379 Value *StackAddr = 1380 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::stacksave)); 1381 Address StackSaveSlot = 1382 Builder.CreateConstInBoundsGEP(Buf, 2, getPointerSize()); 1383 Builder.CreateStore(StackAddr, StackSaveSlot); 1384 1385 // Call LLVM's EH setjmp, which is lightweight. 1386 Value *F = CGM.getIntrinsic(Intrinsic::eh_sjlj_setjmp); 1387 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1388 return RValue::get(Builder.CreateCall(F, Buf.getPointer())); 1389 } 1390 case Builtin::BI__builtin_longjmp: { 1391 Value *Buf = EmitScalarExpr(E->getArg(0)); 1392 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1393 1394 // Call LLVM's EH longjmp, which is lightweight. 1395 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::eh_sjlj_longjmp), Buf); 1396 1397 // longjmp doesn't return; mark this as unreachable. 1398 Builder.CreateUnreachable(); 1399 1400 // We do need to preserve an insertion point. 1401 EmitBlock(createBasicBlock("longjmp.cont")); 1402 1403 return RValue::get(nullptr); 1404 } 1405 case Builtin::BI__sync_fetch_and_add: 1406 case Builtin::BI__sync_fetch_and_sub: 1407 case Builtin::BI__sync_fetch_and_or: 1408 case Builtin::BI__sync_fetch_and_and: 1409 case Builtin::BI__sync_fetch_and_xor: 1410 case Builtin::BI__sync_fetch_and_nand: 1411 case Builtin::BI__sync_add_and_fetch: 1412 case Builtin::BI__sync_sub_and_fetch: 1413 case Builtin::BI__sync_and_and_fetch: 1414 case Builtin::BI__sync_or_and_fetch: 1415 case Builtin::BI__sync_xor_and_fetch: 1416 case Builtin::BI__sync_nand_and_fetch: 1417 case Builtin::BI__sync_val_compare_and_swap: 1418 case Builtin::BI__sync_bool_compare_and_swap: 1419 case Builtin::BI__sync_lock_test_and_set: 1420 case Builtin::BI__sync_lock_release: 1421 case Builtin::BI__sync_swap: 1422 llvm_unreachable("Shouldn't make it through sema"); 1423 case Builtin::BI__sync_fetch_and_add_1: 1424 case Builtin::BI__sync_fetch_and_add_2: 1425 case Builtin::BI__sync_fetch_and_add_4: 1426 case Builtin::BI__sync_fetch_and_add_8: 1427 case Builtin::BI__sync_fetch_and_add_16: 1428 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E); 1429 case Builtin::BI__sync_fetch_and_sub_1: 1430 case Builtin::BI__sync_fetch_and_sub_2: 1431 case Builtin::BI__sync_fetch_and_sub_4: 1432 case Builtin::BI__sync_fetch_and_sub_8: 1433 case Builtin::BI__sync_fetch_and_sub_16: 1434 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E); 1435 case Builtin::BI__sync_fetch_and_or_1: 1436 case Builtin::BI__sync_fetch_and_or_2: 1437 case Builtin::BI__sync_fetch_and_or_4: 1438 case Builtin::BI__sync_fetch_and_or_8: 1439 case Builtin::BI__sync_fetch_and_or_16: 1440 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E); 1441 case Builtin::BI__sync_fetch_and_and_1: 1442 case Builtin::BI__sync_fetch_and_and_2: 1443 case Builtin::BI__sync_fetch_and_and_4: 1444 case Builtin::BI__sync_fetch_and_and_8: 1445 case Builtin::BI__sync_fetch_and_and_16: 1446 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E); 1447 case Builtin::BI__sync_fetch_and_xor_1: 1448 case Builtin::BI__sync_fetch_and_xor_2: 1449 case Builtin::BI__sync_fetch_and_xor_4: 1450 case Builtin::BI__sync_fetch_and_xor_8: 1451 case Builtin::BI__sync_fetch_and_xor_16: 1452 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E); 1453 case Builtin::BI__sync_fetch_and_nand_1: 1454 case Builtin::BI__sync_fetch_and_nand_2: 1455 case Builtin::BI__sync_fetch_and_nand_4: 1456 case Builtin::BI__sync_fetch_and_nand_8: 1457 case Builtin::BI__sync_fetch_and_nand_16: 1458 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Nand, E); 1459 1460 // Clang extensions: not overloaded yet. 1461 case Builtin::BI__sync_fetch_and_min: 1462 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E); 1463 case Builtin::BI__sync_fetch_and_max: 1464 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Max, E); 1465 case Builtin::BI__sync_fetch_and_umin: 1466 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMin, E); 1467 case Builtin::BI__sync_fetch_and_umax: 1468 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMax, E); 1469 1470 case Builtin::BI__sync_add_and_fetch_1: 1471 case Builtin::BI__sync_add_and_fetch_2: 1472 case Builtin::BI__sync_add_and_fetch_4: 1473 case Builtin::BI__sync_add_and_fetch_8: 1474 case Builtin::BI__sync_add_and_fetch_16: 1475 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Add, E, 1476 llvm::Instruction::Add); 1477 case Builtin::BI__sync_sub_and_fetch_1: 1478 case Builtin::BI__sync_sub_and_fetch_2: 1479 case Builtin::BI__sync_sub_and_fetch_4: 1480 case Builtin::BI__sync_sub_and_fetch_8: 1481 case Builtin::BI__sync_sub_and_fetch_16: 1482 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Sub, E, 1483 llvm::Instruction::Sub); 1484 case Builtin::BI__sync_and_and_fetch_1: 1485 case Builtin::BI__sync_and_and_fetch_2: 1486 case Builtin::BI__sync_and_and_fetch_4: 1487 case Builtin::BI__sync_and_and_fetch_8: 1488 case Builtin::BI__sync_and_and_fetch_16: 1489 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::And, E, 1490 llvm::Instruction::And); 1491 case Builtin::BI__sync_or_and_fetch_1: 1492 case Builtin::BI__sync_or_and_fetch_2: 1493 case Builtin::BI__sync_or_and_fetch_4: 1494 case Builtin::BI__sync_or_and_fetch_8: 1495 case Builtin::BI__sync_or_and_fetch_16: 1496 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Or, E, 1497 llvm::Instruction::Or); 1498 case Builtin::BI__sync_xor_and_fetch_1: 1499 case Builtin::BI__sync_xor_and_fetch_2: 1500 case Builtin::BI__sync_xor_and_fetch_4: 1501 case Builtin::BI__sync_xor_and_fetch_8: 1502 case Builtin::BI__sync_xor_and_fetch_16: 1503 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Xor, E, 1504 llvm::Instruction::Xor); 1505 case Builtin::BI__sync_nand_and_fetch_1: 1506 case Builtin::BI__sync_nand_and_fetch_2: 1507 case Builtin::BI__sync_nand_and_fetch_4: 1508 case Builtin::BI__sync_nand_and_fetch_8: 1509 case Builtin::BI__sync_nand_and_fetch_16: 1510 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Nand, E, 1511 llvm::Instruction::And, true); 1512 1513 case Builtin::BI__sync_val_compare_and_swap_1: 1514 case Builtin::BI__sync_val_compare_and_swap_2: 1515 case Builtin::BI__sync_val_compare_and_swap_4: 1516 case Builtin::BI__sync_val_compare_and_swap_8: 1517 case Builtin::BI__sync_val_compare_and_swap_16: 1518 return RValue::get(MakeAtomicCmpXchgValue(*this, E, false)); 1519 1520 case Builtin::BI__sync_bool_compare_and_swap_1: 1521 case Builtin::BI__sync_bool_compare_and_swap_2: 1522 case Builtin::BI__sync_bool_compare_and_swap_4: 1523 case Builtin::BI__sync_bool_compare_and_swap_8: 1524 case Builtin::BI__sync_bool_compare_and_swap_16: 1525 return RValue::get(MakeAtomicCmpXchgValue(*this, E, true)); 1526 1527 case Builtin::BI__sync_swap_1: 1528 case Builtin::BI__sync_swap_2: 1529 case Builtin::BI__sync_swap_4: 1530 case Builtin::BI__sync_swap_8: 1531 case Builtin::BI__sync_swap_16: 1532 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1533 1534 case Builtin::BI__sync_lock_test_and_set_1: 1535 case Builtin::BI__sync_lock_test_and_set_2: 1536 case Builtin::BI__sync_lock_test_and_set_4: 1537 case Builtin::BI__sync_lock_test_and_set_8: 1538 case Builtin::BI__sync_lock_test_and_set_16: 1539 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1540 1541 case Builtin::BI__sync_lock_release_1: 1542 case Builtin::BI__sync_lock_release_2: 1543 case Builtin::BI__sync_lock_release_4: 1544 case Builtin::BI__sync_lock_release_8: 1545 case Builtin::BI__sync_lock_release_16: { 1546 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1547 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 1548 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 1549 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 1550 StoreSize.getQuantity() * 8); 1551 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 1552 llvm::StoreInst *Store = 1553 Builder.CreateAlignedStore(llvm::Constant::getNullValue(ITy), Ptr, 1554 StoreSize); 1555 Store->setAtomic(llvm::AtomicOrdering::Release); 1556 return RValue::get(nullptr); 1557 } 1558 1559 case Builtin::BI__sync_synchronize: { 1560 // We assume this is supposed to correspond to a C++0x-style 1561 // sequentially-consistent fence (i.e. this is only usable for 1562 // synchonization, not device I/O or anything like that). This intrinsic 1563 // is really badly designed in the sense that in theory, there isn't 1564 // any way to safely use it... but in practice, it mostly works 1565 // to use it with non-atomic loads and stores to get acquire/release 1566 // semantics. 1567 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent); 1568 return RValue::get(nullptr); 1569 } 1570 1571 case Builtin::BI__builtin_nontemporal_load: 1572 return RValue::get(EmitNontemporalLoad(*this, E)); 1573 case Builtin::BI__builtin_nontemporal_store: 1574 return RValue::get(EmitNontemporalStore(*this, E)); 1575 case Builtin::BI__c11_atomic_is_lock_free: 1576 case Builtin::BI__atomic_is_lock_free: { 1577 // Call "bool __atomic_is_lock_free(size_t size, void *ptr)". For the 1578 // __c11 builtin, ptr is 0 (indicating a properly-aligned object), since 1579 // _Atomic(T) is always properly-aligned. 1580 const char *LibCallName = "__atomic_is_lock_free"; 1581 CallArgList Args; 1582 Args.add(RValue::get(EmitScalarExpr(E->getArg(0))), 1583 getContext().getSizeType()); 1584 if (BuiltinID == Builtin::BI__atomic_is_lock_free) 1585 Args.add(RValue::get(EmitScalarExpr(E->getArg(1))), 1586 getContext().VoidPtrTy); 1587 else 1588 Args.add(RValue::get(llvm::Constant::getNullValue(VoidPtrTy)), 1589 getContext().VoidPtrTy); 1590 const CGFunctionInfo &FuncInfo = 1591 CGM.getTypes().arrangeBuiltinFunctionCall(E->getType(), Args); 1592 llvm::FunctionType *FTy = CGM.getTypes().GetFunctionType(FuncInfo); 1593 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, LibCallName); 1594 return EmitCall(FuncInfo, CGCallee::forDirect(Func), 1595 ReturnValueSlot(), Args); 1596 } 1597 1598 case Builtin::BI__atomic_test_and_set: { 1599 // Look at the argument type to determine whether this is a volatile 1600 // operation. The parameter type is always volatile. 1601 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1602 bool Volatile = 1603 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1604 1605 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1606 unsigned AddrSpace = Ptr->getType()->getPointerAddressSpace(); 1607 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1608 Value *NewVal = Builder.getInt8(1); 1609 Value *Order = EmitScalarExpr(E->getArg(1)); 1610 if (isa<llvm::ConstantInt>(Order)) { 1611 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1612 AtomicRMWInst *Result = nullptr; 1613 switch (ord) { 1614 case 0: // memory_order_relaxed 1615 default: // invalid order 1616 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1617 llvm::AtomicOrdering::Monotonic); 1618 break; 1619 case 1: // memory_order_consume 1620 case 2: // memory_order_acquire 1621 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1622 llvm::AtomicOrdering::Acquire); 1623 break; 1624 case 3: // memory_order_release 1625 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1626 llvm::AtomicOrdering::Release); 1627 break; 1628 case 4: // memory_order_acq_rel 1629 1630 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1631 llvm::AtomicOrdering::AcquireRelease); 1632 break; 1633 case 5: // memory_order_seq_cst 1634 Result = Builder.CreateAtomicRMW( 1635 llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1636 llvm::AtomicOrdering::SequentiallyConsistent); 1637 break; 1638 } 1639 Result->setVolatile(Volatile); 1640 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1641 } 1642 1643 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1644 1645 llvm::BasicBlock *BBs[5] = { 1646 createBasicBlock("monotonic", CurFn), 1647 createBasicBlock("acquire", CurFn), 1648 createBasicBlock("release", CurFn), 1649 createBasicBlock("acqrel", CurFn), 1650 createBasicBlock("seqcst", CurFn) 1651 }; 1652 llvm::AtomicOrdering Orders[5] = { 1653 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Acquire, 1654 llvm::AtomicOrdering::Release, llvm::AtomicOrdering::AcquireRelease, 1655 llvm::AtomicOrdering::SequentiallyConsistent}; 1656 1657 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1658 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1659 1660 Builder.SetInsertPoint(ContBB); 1661 PHINode *Result = Builder.CreatePHI(Int8Ty, 5, "was_set"); 1662 1663 for (unsigned i = 0; i < 5; ++i) { 1664 Builder.SetInsertPoint(BBs[i]); 1665 AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1666 Ptr, NewVal, Orders[i]); 1667 RMW->setVolatile(Volatile); 1668 Result->addIncoming(RMW, BBs[i]); 1669 Builder.CreateBr(ContBB); 1670 } 1671 1672 SI->addCase(Builder.getInt32(0), BBs[0]); 1673 SI->addCase(Builder.getInt32(1), BBs[1]); 1674 SI->addCase(Builder.getInt32(2), BBs[1]); 1675 SI->addCase(Builder.getInt32(3), BBs[2]); 1676 SI->addCase(Builder.getInt32(4), BBs[3]); 1677 SI->addCase(Builder.getInt32(5), BBs[4]); 1678 1679 Builder.SetInsertPoint(ContBB); 1680 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1681 } 1682 1683 case Builtin::BI__atomic_clear: { 1684 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1685 bool Volatile = 1686 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1687 1688 Address Ptr = EmitPointerWithAlignment(E->getArg(0)); 1689 unsigned AddrSpace = Ptr.getPointer()->getType()->getPointerAddressSpace(); 1690 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1691 Value *NewVal = Builder.getInt8(0); 1692 Value *Order = EmitScalarExpr(E->getArg(1)); 1693 if (isa<llvm::ConstantInt>(Order)) { 1694 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1695 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1696 switch (ord) { 1697 case 0: // memory_order_relaxed 1698 default: // invalid order 1699 Store->setOrdering(llvm::AtomicOrdering::Monotonic); 1700 break; 1701 case 3: // memory_order_release 1702 Store->setOrdering(llvm::AtomicOrdering::Release); 1703 break; 1704 case 5: // memory_order_seq_cst 1705 Store->setOrdering(llvm::AtomicOrdering::SequentiallyConsistent); 1706 break; 1707 } 1708 return RValue::get(nullptr); 1709 } 1710 1711 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1712 1713 llvm::BasicBlock *BBs[3] = { 1714 createBasicBlock("monotonic", CurFn), 1715 createBasicBlock("release", CurFn), 1716 createBasicBlock("seqcst", CurFn) 1717 }; 1718 llvm::AtomicOrdering Orders[3] = { 1719 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Release, 1720 llvm::AtomicOrdering::SequentiallyConsistent}; 1721 1722 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1723 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1724 1725 for (unsigned i = 0; i < 3; ++i) { 1726 Builder.SetInsertPoint(BBs[i]); 1727 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1728 Store->setOrdering(Orders[i]); 1729 Builder.CreateBr(ContBB); 1730 } 1731 1732 SI->addCase(Builder.getInt32(0), BBs[0]); 1733 SI->addCase(Builder.getInt32(3), BBs[1]); 1734 SI->addCase(Builder.getInt32(5), BBs[2]); 1735 1736 Builder.SetInsertPoint(ContBB); 1737 return RValue::get(nullptr); 1738 } 1739 1740 case Builtin::BI__atomic_thread_fence: 1741 case Builtin::BI__atomic_signal_fence: 1742 case Builtin::BI__c11_atomic_thread_fence: 1743 case Builtin::BI__c11_atomic_signal_fence: { 1744 llvm::SynchronizationScope Scope; 1745 if (BuiltinID == Builtin::BI__atomic_signal_fence || 1746 BuiltinID == Builtin::BI__c11_atomic_signal_fence) 1747 Scope = llvm::SingleThread; 1748 else 1749 Scope = llvm::CrossThread; 1750 Value *Order = EmitScalarExpr(E->getArg(0)); 1751 if (isa<llvm::ConstantInt>(Order)) { 1752 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1753 switch (ord) { 1754 case 0: // memory_order_relaxed 1755 default: // invalid order 1756 break; 1757 case 1: // memory_order_consume 1758 case 2: // memory_order_acquire 1759 Builder.CreateFence(llvm::AtomicOrdering::Acquire, Scope); 1760 break; 1761 case 3: // memory_order_release 1762 Builder.CreateFence(llvm::AtomicOrdering::Release, Scope); 1763 break; 1764 case 4: // memory_order_acq_rel 1765 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, Scope); 1766 break; 1767 case 5: // memory_order_seq_cst 1768 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 1769 Scope); 1770 break; 1771 } 1772 return RValue::get(nullptr); 1773 } 1774 1775 llvm::BasicBlock *AcquireBB, *ReleaseBB, *AcqRelBB, *SeqCstBB; 1776 AcquireBB = createBasicBlock("acquire", CurFn); 1777 ReleaseBB = createBasicBlock("release", CurFn); 1778 AcqRelBB = createBasicBlock("acqrel", CurFn); 1779 SeqCstBB = createBasicBlock("seqcst", CurFn); 1780 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1781 1782 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1783 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, ContBB); 1784 1785 Builder.SetInsertPoint(AcquireBB); 1786 Builder.CreateFence(llvm::AtomicOrdering::Acquire, Scope); 1787 Builder.CreateBr(ContBB); 1788 SI->addCase(Builder.getInt32(1), AcquireBB); 1789 SI->addCase(Builder.getInt32(2), AcquireBB); 1790 1791 Builder.SetInsertPoint(ReleaseBB); 1792 Builder.CreateFence(llvm::AtomicOrdering::Release, Scope); 1793 Builder.CreateBr(ContBB); 1794 SI->addCase(Builder.getInt32(3), ReleaseBB); 1795 1796 Builder.SetInsertPoint(AcqRelBB); 1797 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, Scope); 1798 Builder.CreateBr(ContBB); 1799 SI->addCase(Builder.getInt32(4), AcqRelBB); 1800 1801 Builder.SetInsertPoint(SeqCstBB); 1802 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, Scope); 1803 Builder.CreateBr(ContBB); 1804 SI->addCase(Builder.getInt32(5), SeqCstBB); 1805 1806 Builder.SetInsertPoint(ContBB); 1807 return RValue::get(nullptr); 1808 } 1809 1810 // Library functions with special handling. 1811 case Builtin::BIsqrt: 1812 case Builtin::BIsqrtf: 1813 case Builtin::BIsqrtl: { 1814 // Transform a call to sqrt* into a @llvm.sqrt.* intrinsic call, but only 1815 // in finite- or unsafe-math mode (the intrinsic has different semantics 1816 // for handling negative numbers compared to the library function, so 1817 // -fmath-errno=0 is not enough). 1818 if (!FD->hasAttr<ConstAttr>()) 1819 break; 1820 if (!(CGM.getCodeGenOpts().UnsafeFPMath || 1821 CGM.getCodeGenOpts().NoNaNsFPMath)) 1822 break; 1823 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 1824 llvm::Type *ArgType = Arg0->getType(); 1825 Value *F = CGM.getIntrinsic(Intrinsic::sqrt, ArgType); 1826 return RValue::get(Builder.CreateCall(F, Arg0)); 1827 } 1828 1829 case Builtin::BI__builtin_pow: 1830 case Builtin::BI__builtin_powf: 1831 case Builtin::BI__builtin_powl: 1832 case Builtin::BIpow: 1833 case Builtin::BIpowf: 1834 case Builtin::BIpowl: { 1835 // Transform a call to pow* into a @llvm.pow.* intrinsic call. 1836 if (!FD->hasAttr<ConstAttr>()) 1837 break; 1838 Value *Base = EmitScalarExpr(E->getArg(0)); 1839 Value *Exponent = EmitScalarExpr(E->getArg(1)); 1840 llvm::Type *ArgType = Base->getType(); 1841 Value *F = CGM.getIntrinsic(Intrinsic::pow, ArgType); 1842 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 1843 } 1844 1845 case Builtin::BIfma: 1846 case Builtin::BIfmaf: 1847 case Builtin::BIfmal: 1848 case Builtin::BI__builtin_fma: 1849 case Builtin::BI__builtin_fmaf: 1850 case Builtin::BI__builtin_fmal: { 1851 // Rewrite fma to intrinsic. 1852 Value *FirstArg = EmitScalarExpr(E->getArg(0)); 1853 llvm::Type *ArgType = FirstArg->getType(); 1854 Value *F = CGM.getIntrinsic(Intrinsic::fma, ArgType); 1855 return RValue::get( 1856 Builder.CreateCall(F, {FirstArg, EmitScalarExpr(E->getArg(1)), 1857 EmitScalarExpr(E->getArg(2))})); 1858 } 1859 1860 case Builtin::BI__builtin_signbit: 1861 case Builtin::BI__builtin_signbitf: 1862 case Builtin::BI__builtin_signbitl: { 1863 return RValue::get( 1864 Builder.CreateZExt(EmitSignBit(*this, EmitScalarExpr(E->getArg(0))), 1865 ConvertType(E->getType()))); 1866 } 1867 case Builtin::BI__builtin_annotation: { 1868 llvm::Value *AnnVal = EmitScalarExpr(E->getArg(0)); 1869 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::annotation, 1870 AnnVal->getType()); 1871 1872 // Get the annotation string, go through casts. Sema requires this to be a 1873 // non-wide string literal, potentially casted, so the cast<> is safe. 1874 const Expr *AnnotationStrExpr = E->getArg(1)->IgnoreParenCasts(); 1875 StringRef Str = cast<StringLiteral>(AnnotationStrExpr)->getString(); 1876 return RValue::get(EmitAnnotationCall(F, AnnVal, Str, E->getExprLoc())); 1877 } 1878 case Builtin::BI__builtin_addcb: 1879 case Builtin::BI__builtin_addcs: 1880 case Builtin::BI__builtin_addc: 1881 case Builtin::BI__builtin_addcl: 1882 case Builtin::BI__builtin_addcll: 1883 case Builtin::BI__builtin_subcb: 1884 case Builtin::BI__builtin_subcs: 1885 case Builtin::BI__builtin_subc: 1886 case Builtin::BI__builtin_subcl: 1887 case Builtin::BI__builtin_subcll: { 1888 1889 // We translate all of these builtins from expressions of the form: 1890 // int x = ..., y = ..., carryin = ..., carryout, result; 1891 // result = __builtin_addc(x, y, carryin, &carryout); 1892 // 1893 // to LLVM IR of the form: 1894 // 1895 // %tmp1 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y) 1896 // %tmpsum1 = extractvalue {i32, i1} %tmp1, 0 1897 // %carry1 = extractvalue {i32, i1} %tmp1, 1 1898 // %tmp2 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %tmpsum1, 1899 // i32 %carryin) 1900 // %result = extractvalue {i32, i1} %tmp2, 0 1901 // %carry2 = extractvalue {i32, i1} %tmp2, 1 1902 // %tmp3 = or i1 %carry1, %carry2 1903 // %tmp4 = zext i1 %tmp3 to i32 1904 // store i32 %tmp4, i32* %carryout 1905 1906 // Scalarize our inputs. 1907 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1908 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1909 llvm::Value *Carryin = EmitScalarExpr(E->getArg(2)); 1910 Address CarryOutPtr = EmitPointerWithAlignment(E->getArg(3)); 1911 1912 // Decide if we are lowering to a uadd.with.overflow or usub.with.overflow. 1913 llvm::Intrinsic::ID IntrinsicId; 1914 switch (BuiltinID) { 1915 default: llvm_unreachable("Unknown multiprecision builtin id."); 1916 case Builtin::BI__builtin_addcb: 1917 case Builtin::BI__builtin_addcs: 1918 case Builtin::BI__builtin_addc: 1919 case Builtin::BI__builtin_addcl: 1920 case Builtin::BI__builtin_addcll: 1921 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1922 break; 1923 case Builtin::BI__builtin_subcb: 1924 case Builtin::BI__builtin_subcs: 1925 case Builtin::BI__builtin_subc: 1926 case Builtin::BI__builtin_subcl: 1927 case Builtin::BI__builtin_subcll: 1928 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1929 break; 1930 } 1931 1932 // Construct our resulting LLVM IR expression. 1933 llvm::Value *Carry1; 1934 llvm::Value *Sum1 = EmitOverflowIntrinsic(*this, IntrinsicId, 1935 X, Y, Carry1); 1936 llvm::Value *Carry2; 1937 llvm::Value *Sum2 = EmitOverflowIntrinsic(*this, IntrinsicId, 1938 Sum1, Carryin, Carry2); 1939 llvm::Value *CarryOut = Builder.CreateZExt(Builder.CreateOr(Carry1, Carry2), 1940 X->getType()); 1941 Builder.CreateStore(CarryOut, CarryOutPtr); 1942 return RValue::get(Sum2); 1943 } 1944 1945 case Builtin::BI__builtin_add_overflow: 1946 case Builtin::BI__builtin_sub_overflow: 1947 case Builtin::BI__builtin_mul_overflow: { 1948 const clang::Expr *LeftArg = E->getArg(0); 1949 const clang::Expr *RightArg = E->getArg(1); 1950 const clang::Expr *ResultArg = E->getArg(2); 1951 1952 clang::QualType ResultQTy = 1953 ResultArg->getType()->castAs<PointerType>()->getPointeeType(); 1954 1955 WidthAndSignedness LeftInfo = 1956 getIntegerWidthAndSignedness(CGM.getContext(), LeftArg->getType()); 1957 WidthAndSignedness RightInfo = 1958 getIntegerWidthAndSignedness(CGM.getContext(), RightArg->getType()); 1959 WidthAndSignedness ResultInfo = 1960 getIntegerWidthAndSignedness(CGM.getContext(), ResultQTy); 1961 WidthAndSignedness EncompassingInfo = 1962 EncompassingIntegerType({LeftInfo, RightInfo, ResultInfo}); 1963 1964 llvm::Type *EncompassingLLVMTy = 1965 llvm::IntegerType::get(CGM.getLLVMContext(), EncompassingInfo.Width); 1966 1967 llvm::Type *ResultLLVMTy = CGM.getTypes().ConvertType(ResultQTy); 1968 1969 llvm::Intrinsic::ID IntrinsicId; 1970 switch (BuiltinID) { 1971 default: 1972 llvm_unreachable("Unknown overflow builtin id."); 1973 case Builtin::BI__builtin_add_overflow: 1974 IntrinsicId = EncompassingInfo.Signed 1975 ? llvm::Intrinsic::sadd_with_overflow 1976 : llvm::Intrinsic::uadd_with_overflow; 1977 break; 1978 case Builtin::BI__builtin_sub_overflow: 1979 IntrinsicId = EncompassingInfo.Signed 1980 ? llvm::Intrinsic::ssub_with_overflow 1981 : llvm::Intrinsic::usub_with_overflow; 1982 break; 1983 case Builtin::BI__builtin_mul_overflow: 1984 IntrinsicId = EncompassingInfo.Signed 1985 ? llvm::Intrinsic::smul_with_overflow 1986 : llvm::Intrinsic::umul_with_overflow; 1987 break; 1988 } 1989 1990 llvm::Value *Left = EmitScalarExpr(LeftArg); 1991 llvm::Value *Right = EmitScalarExpr(RightArg); 1992 Address ResultPtr = EmitPointerWithAlignment(ResultArg); 1993 1994 // Extend each operand to the encompassing type. 1995 Left = Builder.CreateIntCast(Left, EncompassingLLVMTy, LeftInfo.Signed); 1996 Right = Builder.CreateIntCast(Right, EncompassingLLVMTy, RightInfo.Signed); 1997 1998 // Perform the operation on the extended values. 1999 llvm::Value *Overflow, *Result; 2000 Result = EmitOverflowIntrinsic(*this, IntrinsicId, Left, Right, Overflow); 2001 2002 if (EncompassingInfo.Width > ResultInfo.Width) { 2003 // The encompassing type is wider than the result type, so we need to 2004 // truncate it. 2005 llvm::Value *ResultTrunc = Builder.CreateTrunc(Result, ResultLLVMTy); 2006 2007 // To see if the truncation caused an overflow, we will extend 2008 // the result and then compare it to the original result. 2009 llvm::Value *ResultTruncExt = Builder.CreateIntCast( 2010 ResultTrunc, EncompassingLLVMTy, ResultInfo.Signed); 2011 llvm::Value *TruncationOverflow = 2012 Builder.CreateICmpNE(Result, ResultTruncExt); 2013 2014 Overflow = Builder.CreateOr(Overflow, TruncationOverflow); 2015 Result = ResultTrunc; 2016 } 2017 2018 // Finally, store the result using the pointer. 2019 bool isVolatile = 2020 ResultArg->getType()->getPointeeType().isVolatileQualified(); 2021 Builder.CreateStore(EmitToMemory(Result, ResultQTy), ResultPtr, isVolatile); 2022 2023 return RValue::get(Overflow); 2024 } 2025 2026 case Builtin::BI__builtin_uadd_overflow: 2027 case Builtin::BI__builtin_uaddl_overflow: 2028 case Builtin::BI__builtin_uaddll_overflow: 2029 case Builtin::BI__builtin_usub_overflow: 2030 case Builtin::BI__builtin_usubl_overflow: 2031 case Builtin::BI__builtin_usubll_overflow: 2032 case Builtin::BI__builtin_umul_overflow: 2033 case Builtin::BI__builtin_umull_overflow: 2034 case Builtin::BI__builtin_umulll_overflow: 2035 case Builtin::BI__builtin_sadd_overflow: 2036 case Builtin::BI__builtin_saddl_overflow: 2037 case Builtin::BI__builtin_saddll_overflow: 2038 case Builtin::BI__builtin_ssub_overflow: 2039 case Builtin::BI__builtin_ssubl_overflow: 2040 case Builtin::BI__builtin_ssubll_overflow: 2041 case Builtin::BI__builtin_smul_overflow: 2042 case Builtin::BI__builtin_smull_overflow: 2043 case Builtin::BI__builtin_smulll_overflow: { 2044 2045 // We translate all of these builtins directly to the relevant llvm IR node. 2046 2047 // Scalarize our inputs. 2048 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 2049 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 2050 Address SumOutPtr = EmitPointerWithAlignment(E->getArg(2)); 2051 2052 // Decide which of the overflow intrinsics we are lowering to: 2053 llvm::Intrinsic::ID IntrinsicId; 2054 switch (BuiltinID) { 2055 default: llvm_unreachable("Unknown overflow builtin id."); 2056 case Builtin::BI__builtin_uadd_overflow: 2057 case Builtin::BI__builtin_uaddl_overflow: 2058 case Builtin::BI__builtin_uaddll_overflow: 2059 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 2060 break; 2061 case Builtin::BI__builtin_usub_overflow: 2062 case Builtin::BI__builtin_usubl_overflow: 2063 case Builtin::BI__builtin_usubll_overflow: 2064 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 2065 break; 2066 case Builtin::BI__builtin_umul_overflow: 2067 case Builtin::BI__builtin_umull_overflow: 2068 case Builtin::BI__builtin_umulll_overflow: 2069 IntrinsicId = llvm::Intrinsic::umul_with_overflow; 2070 break; 2071 case Builtin::BI__builtin_sadd_overflow: 2072 case Builtin::BI__builtin_saddl_overflow: 2073 case Builtin::BI__builtin_saddll_overflow: 2074 IntrinsicId = llvm::Intrinsic::sadd_with_overflow; 2075 break; 2076 case Builtin::BI__builtin_ssub_overflow: 2077 case Builtin::BI__builtin_ssubl_overflow: 2078 case Builtin::BI__builtin_ssubll_overflow: 2079 IntrinsicId = llvm::Intrinsic::ssub_with_overflow; 2080 break; 2081 case Builtin::BI__builtin_smul_overflow: 2082 case Builtin::BI__builtin_smull_overflow: 2083 case Builtin::BI__builtin_smulll_overflow: 2084 IntrinsicId = llvm::Intrinsic::smul_with_overflow; 2085 break; 2086 } 2087 2088 2089 llvm::Value *Carry; 2090 llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry); 2091 Builder.CreateStore(Sum, SumOutPtr); 2092 2093 return RValue::get(Carry); 2094 } 2095 case Builtin::BI__builtin_addressof: 2096 return RValue::get(EmitLValue(E->getArg(0)).getPointer()); 2097 case Builtin::BI__builtin_operator_new: 2098 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 2099 E->getArg(0), false); 2100 case Builtin::BI__builtin_operator_delete: 2101 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 2102 E->getArg(0), true); 2103 case Builtin::BI__noop: 2104 // __noop always evaluates to an integer literal zero. 2105 return RValue::get(ConstantInt::get(IntTy, 0)); 2106 case Builtin::BI__builtin_call_with_static_chain: { 2107 const CallExpr *Call = cast<CallExpr>(E->getArg(0)); 2108 const Expr *Chain = E->getArg(1); 2109 return EmitCall(Call->getCallee()->getType(), 2110 EmitCallee(Call->getCallee()), Call, ReturnValue, 2111 EmitScalarExpr(Chain)); 2112 } 2113 case Builtin::BI_InterlockedExchange8: 2114 case Builtin::BI_InterlockedExchange16: 2115 case Builtin::BI_InterlockedExchange: 2116 case Builtin::BI_InterlockedExchangePointer: 2117 return RValue::get( 2118 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E)); 2119 case Builtin::BI_InterlockedCompareExchangePointer: { 2120 llvm::Type *RTy; 2121 llvm::IntegerType *IntType = 2122 IntegerType::get(getLLVMContext(), 2123 getContext().getTypeSize(E->getType())); 2124 llvm::Type *IntPtrType = IntType->getPointerTo(); 2125 2126 llvm::Value *Destination = 2127 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), IntPtrType); 2128 2129 llvm::Value *Exchange = EmitScalarExpr(E->getArg(1)); 2130 RTy = Exchange->getType(); 2131 Exchange = Builder.CreatePtrToInt(Exchange, IntType); 2132 2133 llvm::Value *Comparand = 2134 Builder.CreatePtrToInt(EmitScalarExpr(E->getArg(2)), IntType); 2135 2136 auto Result = 2137 Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 2138 AtomicOrdering::SequentiallyConsistent, 2139 AtomicOrdering::SequentiallyConsistent); 2140 Result->setVolatile(true); 2141 2142 return RValue::get(Builder.CreateIntToPtr(Builder.CreateExtractValue(Result, 2143 0), 2144 RTy)); 2145 } 2146 case Builtin::BI_InterlockedCompareExchange8: 2147 case Builtin::BI_InterlockedCompareExchange16: 2148 case Builtin::BI_InterlockedCompareExchange: 2149 case Builtin::BI_InterlockedCompareExchange64: { 2150 AtomicCmpXchgInst *CXI = Builder.CreateAtomicCmpXchg( 2151 EmitScalarExpr(E->getArg(0)), 2152 EmitScalarExpr(E->getArg(2)), 2153 EmitScalarExpr(E->getArg(1)), 2154 AtomicOrdering::SequentiallyConsistent, 2155 AtomicOrdering::SequentiallyConsistent); 2156 CXI->setVolatile(true); 2157 return RValue::get(Builder.CreateExtractValue(CXI, 0)); 2158 } 2159 case Builtin::BI_InterlockedIncrement16: 2160 case Builtin::BI_InterlockedIncrement: 2161 return RValue::get( 2162 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E)); 2163 case Builtin::BI_InterlockedDecrement16: 2164 case Builtin::BI_InterlockedDecrement: 2165 return RValue::get( 2166 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E)); 2167 case Builtin::BI_InterlockedAnd8: 2168 case Builtin::BI_InterlockedAnd16: 2169 case Builtin::BI_InterlockedAnd: 2170 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E)); 2171 case Builtin::BI_InterlockedExchangeAdd8: 2172 case Builtin::BI_InterlockedExchangeAdd16: 2173 case Builtin::BI_InterlockedExchangeAdd: 2174 return RValue::get( 2175 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E)); 2176 case Builtin::BI_InterlockedExchangeSub8: 2177 case Builtin::BI_InterlockedExchangeSub16: 2178 case Builtin::BI_InterlockedExchangeSub: 2179 return RValue::get( 2180 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E)); 2181 case Builtin::BI_InterlockedOr8: 2182 case Builtin::BI_InterlockedOr16: 2183 case Builtin::BI_InterlockedOr: 2184 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E)); 2185 case Builtin::BI_InterlockedXor8: 2186 case Builtin::BI_InterlockedXor16: 2187 case Builtin::BI_InterlockedXor: 2188 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E)); 2189 case Builtin::BI__readfsdword: { 2190 llvm::Type *IntTy = ConvertType(E->getType()); 2191 Value *IntToPtr = 2192 Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)), 2193 llvm::PointerType::get(IntTy, 257)); 2194 LoadInst *Load = 2195 Builder.CreateDefaultAlignedLoad(IntToPtr, /*isVolatile=*/true); 2196 return RValue::get(Load); 2197 } 2198 2199 case Builtin::BI__exception_code: 2200 case Builtin::BI_exception_code: 2201 return RValue::get(EmitSEHExceptionCode()); 2202 case Builtin::BI__exception_info: 2203 case Builtin::BI_exception_info: 2204 return RValue::get(EmitSEHExceptionInfo()); 2205 case Builtin::BI__abnormal_termination: 2206 case Builtin::BI_abnormal_termination: 2207 return RValue::get(EmitSEHAbnormalTermination()); 2208 case Builtin::BI_setjmpex: { 2209 if (getTarget().getTriple().isOSMSVCRT()) { 2210 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 2211 llvm::AttributeSet ReturnsTwiceAttr = 2212 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 2213 llvm::Attribute::ReturnsTwice); 2214 llvm::Constant *SetJmpEx = CGM.CreateRuntimeFunction( 2215 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 2216 "_setjmpex", ReturnsTwiceAttr); 2217 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 2218 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 2219 llvm::Value *FrameAddr = 2220 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2221 ConstantInt::get(Int32Ty, 0)); 2222 llvm::Value *Args[] = {Buf, FrameAddr}; 2223 llvm::CallSite CS = EmitRuntimeCallOrInvoke(SetJmpEx, Args); 2224 CS.setAttributes(ReturnsTwiceAttr); 2225 return RValue::get(CS.getInstruction()); 2226 } 2227 break; 2228 } 2229 case Builtin::BI_setjmp: { 2230 if (getTarget().getTriple().isOSMSVCRT()) { 2231 llvm::AttributeSet ReturnsTwiceAttr = 2232 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 2233 llvm::Attribute::ReturnsTwice); 2234 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 2235 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 2236 llvm::CallSite CS; 2237 if (getTarget().getTriple().getArch() == llvm::Triple::x86) { 2238 llvm::Type *ArgTypes[] = {Int8PtrTy, IntTy}; 2239 llvm::Constant *SetJmp3 = CGM.CreateRuntimeFunction( 2240 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/true), 2241 "_setjmp3", ReturnsTwiceAttr); 2242 llvm::Value *Count = ConstantInt::get(IntTy, 0); 2243 llvm::Value *Args[] = {Buf, Count}; 2244 CS = EmitRuntimeCallOrInvoke(SetJmp3, Args); 2245 } else { 2246 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 2247 llvm::Constant *SetJmp = CGM.CreateRuntimeFunction( 2248 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 2249 "_setjmp", ReturnsTwiceAttr); 2250 llvm::Value *FrameAddr = 2251 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2252 ConstantInt::get(Int32Ty, 0)); 2253 llvm::Value *Args[] = {Buf, FrameAddr}; 2254 CS = EmitRuntimeCallOrInvoke(SetJmp, Args); 2255 } 2256 CS.setAttributes(ReturnsTwiceAttr); 2257 return RValue::get(CS.getInstruction()); 2258 } 2259 break; 2260 } 2261 2262 case Builtin::BI__GetExceptionInfo: { 2263 if (llvm::GlobalVariable *GV = 2264 CGM.getCXXABI().getThrowInfo(FD->getParamDecl(0)->getType())) 2265 return RValue::get(llvm::ConstantExpr::getBitCast(GV, CGM.Int8PtrTy)); 2266 break; 2267 } 2268 2269 case Builtin::BI__builtin_coro_size: { 2270 auto & Context = getContext(); 2271 auto SizeTy = Context.getSizeType(); 2272 auto T = Builder.getIntNTy(Context.getTypeSize(SizeTy)); 2273 Value *F = CGM.getIntrinsic(Intrinsic::coro_size, T); 2274 return RValue::get(Builder.CreateCall(F)); 2275 } 2276 2277 case Builtin::BI__builtin_coro_id: 2278 return EmitCoroutineIntrinsic(E, Intrinsic::coro_id); 2279 case Builtin::BI__builtin_coro_promise: 2280 return EmitCoroutineIntrinsic(E, Intrinsic::coro_promise); 2281 case Builtin::BI__builtin_coro_resume: 2282 return EmitCoroutineIntrinsic(E, Intrinsic::coro_resume); 2283 case Builtin::BI__builtin_coro_frame: 2284 return EmitCoroutineIntrinsic(E, Intrinsic::coro_frame); 2285 case Builtin::BI__builtin_coro_free: 2286 return EmitCoroutineIntrinsic(E, Intrinsic::coro_free); 2287 case Builtin::BI__builtin_coro_destroy: 2288 return EmitCoroutineIntrinsic(E, Intrinsic::coro_destroy); 2289 case Builtin::BI__builtin_coro_done: 2290 return EmitCoroutineIntrinsic(E, Intrinsic::coro_done); 2291 case Builtin::BI__builtin_coro_alloc: 2292 return EmitCoroutineIntrinsic(E, Intrinsic::coro_alloc); 2293 case Builtin::BI__builtin_coro_begin: 2294 return EmitCoroutineIntrinsic(E, Intrinsic::coro_begin); 2295 case Builtin::BI__builtin_coro_end: 2296 return EmitCoroutineIntrinsic(E, Intrinsic::coro_end); 2297 case Builtin::BI__builtin_coro_suspend: 2298 return EmitCoroutineIntrinsic(E, Intrinsic::coro_suspend); 2299 case Builtin::BI__builtin_coro_param: 2300 return EmitCoroutineIntrinsic(E, Intrinsic::coro_param); 2301 2302 // OpenCL v2.0 s6.13.16.2, Built-in pipe read and write functions 2303 case Builtin::BIread_pipe: 2304 case Builtin::BIwrite_pipe: { 2305 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2306 *Arg1 = EmitScalarExpr(E->getArg(1)); 2307 CGOpenCLRuntime OpenCLRT(CGM); 2308 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2309 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2310 2311 // Type of the generic packet parameter. 2312 unsigned GenericAS = 2313 getContext().getTargetAddressSpace(LangAS::opencl_generic); 2314 llvm::Type *I8PTy = llvm::PointerType::get( 2315 llvm::Type::getInt8Ty(getLLVMContext()), GenericAS); 2316 2317 // Testing which overloaded version we should generate the call for. 2318 if (2U == E->getNumArgs()) { 2319 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_2" 2320 : "__write_pipe_2"; 2321 // Creating a generic function type to be able to call with any builtin or 2322 // user defined type. 2323 llvm::Type *ArgTys[] = {Arg0->getType(), I8PTy, Int32Ty, Int32Ty}; 2324 llvm::FunctionType *FTy = llvm::FunctionType::get( 2325 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2326 Value *BCast = Builder.CreatePointerCast(Arg1, I8PTy); 2327 return RValue::get( 2328 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2329 {Arg0, BCast, PacketSize, PacketAlign})); 2330 } else { 2331 assert(4 == E->getNumArgs() && 2332 "Illegal number of parameters to pipe function"); 2333 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_4" 2334 : "__write_pipe_4"; 2335 2336 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, I8PTy, 2337 Int32Ty, Int32Ty}; 2338 Value *Arg2 = EmitScalarExpr(E->getArg(2)), 2339 *Arg3 = EmitScalarExpr(E->getArg(3)); 2340 llvm::FunctionType *FTy = llvm::FunctionType::get( 2341 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2342 Value *BCast = Builder.CreatePointerCast(Arg3, I8PTy); 2343 // We know the third argument is an integer type, but we may need to cast 2344 // it to i32. 2345 if (Arg2->getType() != Int32Ty) 2346 Arg2 = Builder.CreateZExtOrTrunc(Arg2, Int32Ty); 2347 return RValue::get(Builder.CreateCall( 2348 CGM.CreateRuntimeFunction(FTy, Name), 2349 {Arg0, Arg1, Arg2, BCast, PacketSize, PacketAlign})); 2350 } 2351 } 2352 // OpenCL v2.0 s6.13.16 ,s9.17.3.5 - Built-in pipe reserve read and write 2353 // functions 2354 case Builtin::BIreserve_read_pipe: 2355 case Builtin::BIreserve_write_pipe: 2356 case Builtin::BIwork_group_reserve_read_pipe: 2357 case Builtin::BIwork_group_reserve_write_pipe: 2358 case Builtin::BIsub_group_reserve_read_pipe: 2359 case Builtin::BIsub_group_reserve_write_pipe: { 2360 // Composing the mangled name for the function. 2361 const char *Name; 2362 if (BuiltinID == Builtin::BIreserve_read_pipe) 2363 Name = "__reserve_read_pipe"; 2364 else if (BuiltinID == Builtin::BIreserve_write_pipe) 2365 Name = "__reserve_write_pipe"; 2366 else if (BuiltinID == Builtin::BIwork_group_reserve_read_pipe) 2367 Name = "__work_group_reserve_read_pipe"; 2368 else if (BuiltinID == Builtin::BIwork_group_reserve_write_pipe) 2369 Name = "__work_group_reserve_write_pipe"; 2370 else if (BuiltinID == Builtin::BIsub_group_reserve_read_pipe) 2371 Name = "__sub_group_reserve_read_pipe"; 2372 else 2373 Name = "__sub_group_reserve_write_pipe"; 2374 2375 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2376 *Arg1 = EmitScalarExpr(E->getArg(1)); 2377 llvm::Type *ReservedIDTy = ConvertType(getContext().OCLReserveIDTy); 2378 CGOpenCLRuntime OpenCLRT(CGM); 2379 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2380 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2381 2382 // Building the generic function prototype. 2383 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty, Int32Ty}; 2384 llvm::FunctionType *FTy = llvm::FunctionType::get( 2385 ReservedIDTy, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2386 // We know the second argument is an integer type, but we may need to cast 2387 // it to i32. 2388 if (Arg1->getType() != Int32Ty) 2389 Arg1 = Builder.CreateZExtOrTrunc(Arg1, Int32Ty); 2390 return RValue::get( 2391 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2392 {Arg0, Arg1, PacketSize, PacketAlign})); 2393 } 2394 // OpenCL v2.0 s6.13.16, s9.17.3.5 - Built-in pipe commit read and write 2395 // functions 2396 case Builtin::BIcommit_read_pipe: 2397 case Builtin::BIcommit_write_pipe: 2398 case Builtin::BIwork_group_commit_read_pipe: 2399 case Builtin::BIwork_group_commit_write_pipe: 2400 case Builtin::BIsub_group_commit_read_pipe: 2401 case Builtin::BIsub_group_commit_write_pipe: { 2402 const char *Name; 2403 if (BuiltinID == Builtin::BIcommit_read_pipe) 2404 Name = "__commit_read_pipe"; 2405 else if (BuiltinID == Builtin::BIcommit_write_pipe) 2406 Name = "__commit_write_pipe"; 2407 else if (BuiltinID == Builtin::BIwork_group_commit_read_pipe) 2408 Name = "__work_group_commit_read_pipe"; 2409 else if (BuiltinID == Builtin::BIwork_group_commit_write_pipe) 2410 Name = "__work_group_commit_write_pipe"; 2411 else if (BuiltinID == Builtin::BIsub_group_commit_read_pipe) 2412 Name = "__sub_group_commit_read_pipe"; 2413 else 2414 Name = "__sub_group_commit_write_pipe"; 2415 2416 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2417 *Arg1 = EmitScalarExpr(E->getArg(1)); 2418 CGOpenCLRuntime OpenCLRT(CGM); 2419 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2420 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2421 2422 // Building the generic function prototype. 2423 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, Int32Ty}; 2424 llvm::FunctionType *FTy = 2425 llvm::FunctionType::get(llvm::Type::getVoidTy(getLLVMContext()), 2426 llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2427 2428 return RValue::get( 2429 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2430 {Arg0, Arg1, PacketSize, PacketAlign})); 2431 } 2432 // OpenCL v2.0 s6.13.16.4 Built-in pipe query functions 2433 case Builtin::BIget_pipe_num_packets: 2434 case Builtin::BIget_pipe_max_packets: { 2435 const char *Name; 2436 if (BuiltinID == Builtin::BIget_pipe_num_packets) 2437 Name = "__get_pipe_num_packets"; 2438 else 2439 Name = "__get_pipe_max_packets"; 2440 2441 // Building the generic function prototype. 2442 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 2443 CGOpenCLRuntime OpenCLRT(CGM); 2444 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2445 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2446 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty}; 2447 llvm::FunctionType *FTy = llvm::FunctionType::get( 2448 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2449 2450 return RValue::get(Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2451 {Arg0, PacketSize, PacketAlign})); 2452 } 2453 2454 // OpenCL v2.0 s6.13.9 - Address space qualifier functions. 2455 case Builtin::BIto_global: 2456 case Builtin::BIto_local: 2457 case Builtin::BIto_private: { 2458 auto Arg0 = EmitScalarExpr(E->getArg(0)); 2459 auto NewArgT = llvm::PointerType::get(Int8Ty, 2460 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2461 auto NewRetT = llvm::PointerType::get(Int8Ty, 2462 CGM.getContext().getTargetAddressSpace( 2463 E->getType()->getPointeeType().getAddressSpace())); 2464 auto FTy = llvm::FunctionType::get(NewRetT, {NewArgT}, false); 2465 llvm::Value *NewArg; 2466 if (Arg0->getType()->getPointerAddressSpace() != 2467 NewArgT->getPointerAddressSpace()) 2468 NewArg = Builder.CreateAddrSpaceCast(Arg0, NewArgT); 2469 else 2470 NewArg = Builder.CreateBitOrPointerCast(Arg0, NewArgT); 2471 auto NewName = std::string("__") + E->getDirectCallee()->getName().str(); 2472 auto NewCall = 2473 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, NewName), {NewArg}); 2474 return RValue::get(Builder.CreateBitOrPointerCast(NewCall, 2475 ConvertType(E->getType()))); 2476 } 2477 2478 // OpenCL v2.0, s6.13.17 - Enqueue kernel function. 2479 // It contains four different overload formats specified in Table 6.13.17.1. 2480 case Builtin::BIenqueue_kernel: { 2481 StringRef Name; // Generated function call name 2482 unsigned NumArgs = E->getNumArgs(); 2483 2484 llvm::Type *QueueTy = ConvertType(getContext().OCLQueueTy); 2485 llvm::Type *RangeTy = ConvertType(getContext().OCLNDRangeTy); 2486 2487 llvm::Value *Queue = EmitScalarExpr(E->getArg(0)); 2488 llvm::Value *Flags = EmitScalarExpr(E->getArg(1)); 2489 llvm::Value *Range = EmitScalarExpr(E->getArg(2)); 2490 2491 if (NumArgs == 4) { 2492 // The most basic form of the call with parameters: 2493 // queue_t, kernel_enqueue_flags_t, ndrange_t, block(void) 2494 Name = "__enqueue_kernel_basic"; 2495 llvm::Type *ArgTys[] = {QueueTy, Int32Ty, RangeTy, Int8PtrTy}; 2496 llvm::FunctionType *FTy = llvm::FunctionType::get( 2497 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys, 4), false); 2498 2499 llvm::Value *Block = 2500 Builder.CreateBitCast(EmitScalarExpr(E->getArg(3)), Int8PtrTy); 2501 2502 return RValue::get(Builder.CreateCall( 2503 CGM.CreateRuntimeFunction(FTy, Name), {Queue, Flags, Range, Block})); 2504 } 2505 assert(NumArgs >= 5 && "Invalid enqueue_kernel signature"); 2506 2507 // Could have events and/or vaargs. 2508 if (E->getArg(3)->getType()->isBlockPointerType()) { 2509 // No events passed, but has variadic arguments. 2510 Name = "__enqueue_kernel_vaargs"; 2511 llvm::Value *Block = 2512 Builder.CreateBitCast(EmitScalarExpr(E->getArg(3)), Int8PtrTy); 2513 // Create a vector of the arguments, as well as a constant value to 2514 // express to the runtime the number of variadic arguments. 2515 std::vector<llvm::Value *> Args = {Queue, Flags, Range, Block, 2516 ConstantInt::get(IntTy, NumArgs - 4)}; 2517 std::vector<llvm::Type *> ArgTys = {QueueTy, IntTy, RangeTy, Int8PtrTy, 2518 IntTy}; 2519 2520 // Each of the following arguments specifies the size of the corresponding 2521 // argument passed to the enqueued block. 2522 for (unsigned I = 4/*Position of the first size arg*/; I < NumArgs; ++I) 2523 Args.push_back( 2524 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(I)), SizeTy)); 2525 2526 llvm::FunctionType *FTy = llvm::FunctionType::get( 2527 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), true); 2528 return RValue::get( 2529 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2530 llvm::ArrayRef<llvm::Value *>(Args))); 2531 } 2532 // Any calls now have event arguments passed. 2533 if (NumArgs >= 7) { 2534 llvm::Type *EventTy = ConvertType(getContext().OCLClkEventTy); 2535 llvm::Type *EventPtrTy = EventTy->getPointerTo( 2536 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2537 2538 llvm::Value *NumEvents = 2539 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(3)), Int32Ty); 2540 llvm::Value *EventList = 2541 E->getArg(4)->getType()->isArrayType() 2542 ? EmitArrayToPointerDecay(E->getArg(4)).getPointer() 2543 : EmitScalarExpr(E->getArg(4)); 2544 llvm::Value *ClkEvent = EmitScalarExpr(E->getArg(5)); 2545 // Convert to generic address space. 2546 EventList = Builder.CreatePointerCast(EventList, EventPtrTy); 2547 ClkEvent = Builder.CreatePointerCast(ClkEvent, EventPtrTy); 2548 llvm::Value *Block = 2549 Builder.CreateBitCast(EmitScalarExpr(E->getArg(6)), Int8PtrTy); 2550 2551 std::vector<llvm::Type *> ArgTys = {QueueTy, Int32Ty, RangeTy, 2552 Int32Ty, EventPtrTy, EventPtrTy, 2553 Int8PtrTy}; 2554 2555 std::vector<llvm::Value *> Args = {Queue, Flags, Range, NumEvents, 2556 EventList, ClkEvent, Block}; 2557 2558 if (NumArgs == 7) { 2559 // Has events but no variadics. 2560 Name = "__enqueue_kernel_basic_events"; 2561 llvm::FunctionType *FTy = llvm::FunctionType::get( 2562 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2563 return RValue::get( 2564 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2565 llvm::ArrayRef<llvm::Value *>(Args))); 2566 } 2567 // Has event info and variadics 2568 // Pass the number of variadics to the runtime function too. 2569 Args.push_back(ConstantInt::get(Int32Ty, NumArgs - 7)); 2570 ArgTys.push_back(Int32Ty); 2571 Name = "__enqueue_kernel_events_vaargs"; 2572 2573 // Each of the following arguments specifies the size of the corresponding 2574 // argument passed to the enqueued block. 2575 for (unsigned I = 7/*Position of the first size arg*/; I < NumArgs; ++I) 2576 Args.push_back( 2577 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(I)), SizeTy)); 2578 2579 llvm::FunctionType *FTy = llvm::FunctionType::get( 2580 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), true); 2581 return RValue::get( 2582 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2583 llvm::ArrayRef<llvm::Value *>(Args))); 2584 } 2585 } 2586 // OpenCL v2.0 s6.13.17.6 - Kernel query functions need bitcast of block 2587 // parameter. 2588 case Builtin::BIget_kernel_work_group_size: { 2589 Value *Arg = EmitScalarExpr(E->getArg(0)); 2590 Arg = Builder.CreateBitCast(Arg, Int8PtrTy); 2591 return RValue::get( 2592 Builder.CreateCall(CGM.CreateRuntimeFunction( 2593 llvm::FunctionType::get(IntTy, Int8PtrTy, false), 2594 "__get_kernel_work_group_size_impl"), 2595 Arg)); 2596 } 2597 case Builtin::BIget_kernel_preferred_work_group_size_multiple: { 2598 Value *Arg = EmitScalarExpr(E->getArg(0)); 2599 Arg = Builder.CreateBitCast(Arg, Int8PtrTy); 2600 return RValue::get(Builder.CreateCall( 2601 CGM.CreateRuntimeFunction( 2602 llvm::FunctionType::get(IntTy, Int8PtrTy, false), 2603 "__get_kernel_preferred_work_group_multiple_impl"), 2604 Arg)); 2605 } 2606 case Builtin::BIprintf: 2607 if (getLangOpts().CUDA && getLangOpts().CUDAIsDevice) 2608 return EmitCUDADevicePrintfCallExpr(E, ReturnValue); 2609 break; 2610 case Builtin::BI__builtin_canonicalize: 2611 case Builtin::BI__builtin_canonicalizef: 2612 case Builtin::BI__builtin_canonicalizel: 2613 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::canonicalize)); 2614 2615 case Builtin::BI__builtin_thread_pointer: { 2616 if (!getContext().getTargetInfo().isTLSSupported()) 2617 CGM.ErrorUnsupported(E, "__builtin_thread_pointer"); 2618 // Fall through - it's already mapped to the intrinsic by GCCBuiltin. 2619 break; 2620 } 2621 case Builtin::BI__builtin_os_log_format: { 2622 assert(E->getNumArgs() >= 2 && 2623 "__builtin_os_log_format takes at least 2 arguments"); 2624 analyze_os_log::OSLogBufferLayout Layout; 2625 analyze_os_log::computeOSLogBufferLayout(CGM.getContext(), E, Layout); 2626 Address BufAddr = EmitPointerWithAlignment(E->getArg(0)); 2627 // Ignore argument 1, the format string. It is not currently used. 2628 CharUnits Offset; 2629 Builder.CreateStore( 2630 Builder.getInt8(Layout.getSummaryByte()), 2631 Builder.CreateConstByteGEP(BufAddr, Offset++, "summary")); 2632 Builder.CreateStore( 2633 Builder.getInt8(Layout.getNumArgsByte()), 2634 Builder.CreateConstByteGEP(BufAddr, Offset++, "numArgs")); 2635 2636 llvm::SmallVector<llvm::Value *, 4> RetainableOperands; 2637 for (const auto &Item : Layout.Items) { 2638 Builder.CreateStore( 2639 Builder.getInt8(Item.getDescriptorByte()), 2640 Builder.CreateConstByteGEP(BufAddr, Offset++, "argDescriptor")); 2641 Builder.CreateStore( 2642 Builder.getInt8(Item.getSizeByte()), 2643 Builder.CreateConstByteGEP(BufAddr, Offset++, "argSize")); 2644 Address Addr = Builder.CreateConstByteGEP(BufAddr, Offset); 2645 if (const Expr *TheExpr = Item.getExpr()) { 2646 Addr = Builder.CreateElementBitCast( 2647 Addr, ConvertTypeForMem(TheExpr->getType())); 2648 // Check if this is a retainable type. 2649 if (TheExpr->getType()->isObjCRetainableType()) { 2650 assert(getEvaluationKind(TheExpr->getType()) == TEK_Scalar && 2651 "Only scalar can be a ObjC retainable type"); 2652 llvm::Value *SV = EmitScalarExpr(TheExpr, /*Ignore*/ false); 2653 RValue RV = RValue::get(SV); 2654 LValue LV = MakeAddrLValue(Addr, TheExpr->getType()); 2655 EmitStoreThroughLValue(RV, LV); 2656 // Check if the object is constant, if not, save it in 2657 // RetainableOperands. 2658 if (!isa<Constant>(SV)) 2659 RetainableOperands.push_back(SV); 2660 } else { 2661 EmitAnyExprToMem(TheExpr, Addr, Qualifiers(), /*isInit*/ true); 2662 } 2663 } else { 2664 Addr = Builder.CreateElementBitCast(Addr, Int32Ty); 2665 Builder.CreateStore( 2666 Builder.getInt32(Item.getConstValue().getQuantity()), Addr); 2667 } 2668 Offset += Item.size(); 2669 } 2670 2671 // Push a clang.arc.use cleanup for each object in RetainableOperands. The 2672 // cleanup will cause the use to appear after the final log call, keeping 2673 // the object valid while it’s held in the log buffer. Note that if there’s 2674 // a release cleanup on the object, it will already be active; since 2675 // cleanups are emitted in reverse order, the use will occur before the 2676 // object is released. 2677 if (!RetainableOperands.empty() && getLangOpts().ObjCAutoRefCount && 2678 CGM.getCodeGenOpts().OptimizationLevel != 0) 2679 for (llvm::Value *object : RetainableOperands) 2680 pushFullExprCleanup<CallObjCArcUse>(getARCCleanupKind(), object); 2681 2682 return RValue::get(BufAddr.getPointer()); 2683 } 2684 2685 case Builtin::BI__builtin_os_log_format_buffer_size: { 2686 analyze_os_log::OSLogBufferLayout Layout; 2687 analyze_os_log::computeOSLogBufferLayout(CGM.getContext(), E, Layout); 2688 return RValue::get(ConstantInt::get(ConvertType(E->getType()), 2689 Layout.size().getQuantity())); 2690 } 2691 } 2692 2693 // If this is an alias for a lib function (e.g. __builtin_sin), emit 2694 // the call using the normal call path, but using the unmangled 2695 // version of the function name. 2696 if (getContext().BuiltinInfo.isLibFunction(BuiltinID)) 2697 return emitLibraryCall(*this, FD, E, 2698 CGM.getBuiltinLibFunction(FD, BuiltinID)); 2699 2700 // If this is a predefined lib function (e.g. malloc), emit the call 2701 // using exactly the normal call path. 2702 if (getContext().BuiltinInfo.isPredefinedLibFunction(BuiltinID)) 2703 return emitLibraryCall(*this, FD, E, 2704 cast<llvm::Constant>(EmitScalarExpr(E->getCallee()))); 2705 2706 // Check that a call to a target specific builtin has the correct target 2707 // features. 2708 // This is down here to avoid non-target specific builtins, however, if 2709 // generic builtins start to require generic target features then we 2710 // can move this up to the beginning of the function. 2711 checkTargetFeatures(E, FD); 2712 2713 // See if we have a target specific intrinsic. 2714 const char *Name = getContext().BuiltinInfo.getName(BuiltinID); 2715 Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; 2716 StringRef Prefix = 2717 llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch()); 2718 if (!Prefix.empty()) { 2719 IntrinsicID = Intrinsic::getIntrinsicForGCCBuiltin(Prefix.data(), Name); 2720 // NOTE we dont need to perform a compatibility flag check here since the 2721 // intrinsics are declared in Builtins*.def via LANGBUILTIN which filter the 2722 // MS builtins via ALL_MS_LANGUAGES and are filtered earlier. 2723 if (IntrinsicID == Intrinsic::not_intrinsic) 2724 IntrinsicID = Intrinsic::getIntrinsicForMSBuiltin(Prefix.data(), Name); 2725 } 2726 2727 if (IntrinsicID != Intrinsic::not_intrinsic) { 2728 SmallVector<Value*, 16> Args; 2729 2730 // Find out if any arguments are required to be integer constant 2731 // expressions. 2732 unsigned ICEArguments = 0; 2733 ASTContext::GetBuiltinTypeError Error; 2734 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 2735 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 2736 2737 Function *F = CGM.getIntrinsic(IntrinsicID); 2738 llvm::FunctionType *FTy = F->getFunctionType(); 2739 2740 for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) { 2741 Value *ArgValue; 2742 // If this is a normal argument, just emit it as a scalar. 2743 if ((ICEArguments & (1 << i)) == 0) { 2744 ArgValue = EmitScalarExpr(E->getArg(i)); 2745 } else { 2746 // If this is required to be a constant, constant fold it so that we 2747 // know that the generated intrinsic gets a ConstantInt. 2748 llvm::APSInt Result; 2749 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result,getContext()); 2750 assert(IsConst && "Constant arg isn't actually constant?"); 2751 (void)IsConst; 2752 ArgValue = llvm::ConstantInt::get(getLLVMContext(), Result); 2753 } 2754 2755 // If the intrinsic arg type is different from the builtin arg type 2756 // we need to do a bit cast. 2757 llvm::Type *PTy = FTy->getParamType(i); 2758 if (PTy != ArgValue->getType()) { 2759 assert(PTy->canLosslesslyBitCastTo(FTy->getParamType(i)) && 2760 "Must be able to losslessly bit cast to param"); 2761 ArgValue = Builder.CreateBitCast(ArgValue, PTy); 2762 } 2763 2764 Args.push_back(ArgValue); 2765 } 2766 2767 Value *V = Builder.CreateCall(F, Args); 2768 QualType BuiltinRetType = E->getType(); 2769 2770 llvm::Type *RetTy = VoidTy; 2771 if (!BuiltinRetType->isVoidType()) 2772 RetTy = ConvertType(BuiltinRetType); 2773 2774 if (RetTy != V->getType()) { 2775 assert(V->getType()->canLosslesslyBitCastTo(RetTy) && 2776 "Must be able to losslessly bit cast result type"); 2777 V = Builder.CreateBitCast(V, RetTy); 2778 } 2779 2780 return RValue::get(V); 2781 } 2782 2783 // See if we have a target specific builtin that needs to be lowered. 2784 if (Value *V = EmitTargetBuiltinExpr(BuiltinID, E)) 2785 return RValue::get(V); 2786 2787 ErrorUnsupported(E, "builtin function"); 2788 2789 // Unknown builtin, for now just dump it out and return undef. 2790 return GetUndefRValue(E->getType()); 2791 } 2792 2793 static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF, 2794 unsigned BuiltinID, const CallExpr *E, 2795 llvm::Triple::ArchType Arch) { 2796 switch (Arch) { 2797 case llvm::Triple::arm: 2798 case llvm::Triple::armeb: 2799 case llvm::Triple::thumb: 2800 case llvm::Triple::thumbeb: 2801 return CGF->EmitARMBuiltinExpr(BuiltinID, E); 2802 case llvm::Triple::aarch64: 2803 case llvm::Triple::aarch64_be: 2804 return CGF->EmitAArch64BuiltinExpr(BuiltinID, E); 2805 case llvm::Triple::x86: 2806 case llvm::Triple::x86_64: 2807 return CGF->EmitX86BuiltinExpr(BuiltinID, E); 2808 case llvm::Triple::ppc: 2809 case llvm::Triple::ppc64: 2810 case llvm::Triple::ppc64le: 2811 return CGF->EmitPPCBuiltinExpr(BuiltinID, E); 2812 case llvm::Triple::r600: 2813 case llvm::Triple::amdgcn: 2814 return CGF->EmitAMDGPUBuiltinExpr(BuiltinID, E); 2815 case llvm::Triple::systemz: 2816 return CGF->EmitSystemZBuiltinExpr(BuiltinID, E); 2817 case llvm::Triple::nvptx: 2818 case llvm::Triple::nvptx64: 2819 return CGF->EmitNVPTXBuiltinExpr(BuiltinID, E); 2820 case llvm::Triple::wasm32: 2821 case llvm::Triple::wasm64: 2822 return CGF->EmitWebAssemblyBuiltinExpr(BuiltinID, E); 2823 default: 2824 return nullptr; 2825 } 2826 } 2827 2828 Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID, 2829 const CallExpr *E) { 2830 if (getContext().BuiltinInfo.isAuxBuiltinID(BuiltinID)) { 2831 assert(getContext().getAuxTargetInfo() && "Missing aux target info"); 2832 return EmitTargetArchBuiltinExpr( 2833 this, getContext().BuiltinInfo.getAuxBuiltinID(BuiltinID), E, 2834 getContext().getAuxTargetInfo()->getTriple().getArch()); 2835 } 2836 2837 return EmitTargetArchBuiltinExpr(this, BuiltinID, E, 2838 getTarget().getTriple().getArch()); 2839 } 2840 2841 static llvm::VectorType *GetNeonType(CodeGenFunction *CGF, 2842 NeonTypeFlags TypeFlags, 2843 bool V1Ty=false) { 2844 int IsQuad = TypeFlags.isQuad(); 2845 switch (TypeFlags.getEltType()) { 2846 case NeonTypeFlags::Int8: 2847 case NeonTypeFlags::Poly8: 2848 return llvm::VectorType::get(CGF->Int8Ty, V1Ty ? 1 : (8 << IsQuad)); 2849 case NeonTypeFlags::Int16: 2850 case NeonTypeFlags::Poly16: 2851 case NeonTypeFlags::Float16: 2852 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 2853 case NeonTypeFlags::Int32: 2854 return llvm::VectorType::get(CGF->Int32Ty, V1Ty ? 1 : (2 << IsQuad)); 2855 case NeonTypeFlags::Int64: 2856 case NeonTypeFlags::Poly64: 2857 return llvm::VectorType::get(CGF->Int64Ty, V1Ty ? 1 : (1 << IsQuad)); 2858 case NeonTypeFlags::Poly128: 2859 // FIXME: i128 and f128 doesn't get fully support in Clang and llvm. 2860 // There is a lot of i128 and f128 API missing. 2861 // so we use v16i8 to represent poly128 and get pattern matched. 2862 return llvm::VectorType::get(CGF->Int8Ty, 16); 2863 case NeonTypeFlags::Float32: 2864 return llvm::VectorType::get(CGF->FloatTy, V1Ty ? 1 : (2 << IsQuad)); 2865 case NeonTypeFlags::Float64: 2866 return llvm::VectorType::get(CGF->DoubleTy, V1Ty ? 1 : (1 << IsQuad)); 2867 } 2868 llvm_unreachable("Unknown vector element type!"); 2869 } 2870 2871 static llvm::VectorType *GetFloatNeonType(CodeGenFunction *CGF, 2872 NeonTypeFlags IntTypeFlags) { 2873 int IsQuad = IntTypeFlags.isQuad(); 2874 switch (IntTypeFlags.getEltType()) { 2875 case NeonTypeFlags::Int32: 2876 return llvm::VectorType::get(CGF->FloatTy, (2 << IsQuad)); 2877 case NeonTypeFlags::Int64: 2878 return llvm::VectorType::get(CGF->DoubleTy, (1 << IsQuad)); 2879 default: 2880 llvm_unreachable("Type can't be converted to floating-point!"); 2881 } 2882 } 2883 2884 Value *CodeGenFunction::EmitNeonSplat(Value *V, Constant *C) { 2885 unsigned nElts = V->getType()->getVectorNumElements(); 2886 Value* SV = llvm::ConstantVector::getSplat(nElts, C); 2887 return Builder.CreateShuffleVector(V, V, SV, "lane"); 2888 } 2889 2890 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, 2891 const char *name, 2892 unsigned shift, bool rightshift) { 2893 unsigned j = 0; 2894 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 2895 ai != ae; ++ai, ++j) 2896 if (shift > 0 && shift == j) 2897 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); 2898 else 2899 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); 2900 2901 return Builder.CreateCall(F, Ops, name); 2902 } 2903 2904 Value *CodeGenFunction::EmitNeonShiftVector(Value *V, llvm::Type *Ty, 2905 bool neg) { 2906 int SV = cast<ConstantInt>(V)->getSExtValue(); 2907 return ConstantInt::get(Ty, neg ? -SV : SV); 2908 } 2909 2910 // \brief Right-shift a vector by a constant. 2911 Value *CodeGenFunction::EmitNeonRShiftImm(Value *Vec, Value *Shift, 2912 llvm::Type *Ty, bool usgn, 2913 const char *name) { 2914 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 2915 2916 int ShiftAmt = cast<ConstantInt>(Shift)->getSExtValue(); 2917 int EltSize = VTy->getScalarSizeInBits(); 2918 2919 Vec = Builder.CreateBitCast(Vec, Ty); 2920 2921 // lshr/ashr are undefined when the shift amount is equal to the vector 2922 // element size. 2923 if (ShiftAmt == EltSize) { 2924 if (usgn) { 2925 // Right-shifting an unsigned value by its size yields 0. 2926 return llvm::ConstantAggregateZero::get(VTy); 2927 } else { 2928 // Right-shifting a signed value by its size is equivalent 2929 // to a shift of size-1. 2930 --ShiftAmt; 2931 Shift = ConstantInt::get(VTy->getElementType(), ShiftAmt); 2932 } 2933 } 2934 2935 Shift = EmitNeonShiftVector(Shift, Ty, false); 2936 if (usgn) 2937 return Builder.CreateLShr(Vec, Shift, name); 2938 else 2939 return Builder.CreateAShr(Vec, Shift, name); 2940 } 2941 2942 enum { 2943 AddRetType = (1 << 0), 2944 Add1ArgType = (1 << 1), 2945 Add2ArgTypes = (1 << 2), 2946 2947 VectorizeRetType = (1 << 3), 2948 VectorizeArgTypes = (1 << 4), 2949 2950 InventFloatType = (1 << 5), 2951 UnsignedAlts = (1 << 6), 2952 2953 Use64BitVectors = (1 << 7), 2954 Use128BitVectors = (1 << 8), 2955 2956 Vectorize1ArgType = Add1ArgType | VectorizeArgTypes, 2957 VectorRet = AddRetType | VectorizeRetType, 2958 VectorRetGetArgs01 = 2959 AddRetType | Add2ArgTypes | VectorizeRetType | VectorizeArgTypes, 2960 FpCmpzModifiers = 2961 AddRetType | VectorizeRetType | Add1ArgType | InventFloatType 2962 }; 2963 2964 namespace { 2965 struct NeonIntrinsicInfo { 2966 const char *NameHint; 2967 unsigned BuiltinID; 2968 unsigned LLVMIntrinsic; 2969 unsigned AltLLVMIntrinsic; 2970 unsigned TypeModifier; 2971 2972 bool operator<(unsigned RHSBuiltinID) const { 2973 return BuiltinID < RHSBuiltinID; 2974 } 2975 bool operator<(const NeonIntrinsicInfo &TE) const { 2976 return BuiltinID < TE.BuiltinID; 2977 } 2978 }; 2979 } // end anonymous namespace 2980 2981 #define NEONMAP0(NameBase) \ 2982 { #NameBase, NEON::BI__builtin_neon_ ## NameBase, 0, 0, 0 } 2983 2984 #define NEONMAP1(NameBase, LLVMIntrinsic, TypeModifier) \ 2985 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 2986 Intrinsic::LLVMIntrinsic, 0, TypeModifier } 2987 2988 #define NEONMAP2(NameBase, LLVMIntrinsic, AltLLVMIntrinsic, TypeModifier) \ 2989 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 2990 Intrinsic::LLVMIntrinsic, Intrinsic::AltLLVMIntrinsic, \ 2991 TypeModifier } 2992 2993 static const NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = { 2994 NEONMAP2(vabd_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 2995 NEONMAP2(vabdq_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 2996 NEONMAP1(vabs_v, arm_neon_vabs, 0), 2997 NEONMAP1(vabsq_v, arm_neon_vabs, 0), 2998 NEONMAP0(vaddhn_v), 2999 NEONMAP1(vaesdq_v, arm_neon_aesd, 0), 3000 NEONMAP1(vaeseq_v, arm_neon_aese, 0), 3001 NEONMAP1(vaesimcq_v, arm_neon_aesimc, 0), 3002 NEONMAP1(vaesmcq_v, arm_neon_aesmc, 0), 3003 NEONMAP1(vbsl_v, arm_neon_vbsl, AddRetType), 3004 NEONMAP1(vbslq_v, arm_neon_vbsl, AddRetType), 3005 NEONMAP1(vcage_v, arm_neon_vacge, 0), 3006 NEONMAP1(vcageq_v, arm_neon_vacge, 0), 3007 NEONMAP1(vcagt_v, arm_neon_vacgt, 0), 3008 NEONMAP1(vcagtq_v, arm_neon_vacgt, 0), 3009 NEONMAP1(vcale_v, arm_neon_vacge, 0), 3010 NEONMAP1(vcaleq_v, arm_neon_vacge, 0), 3011 NEONMAP1(vcalt_v, arm_neon_vacgt, 0), 3012 NEONMAP1(vcaltq_v, arm_neon_vacgt, 0), 3013 NEONMAP1(vcls_v, arm_neon_vcls, Add1ArgType), 3014 NEONMAP1(vclsq_v, arm_neon_vcls, Add1ArgType), 3015 NEONMAP1(vclz_v, ctlz, Add1ArgType), 3016 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 3017 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 3018 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 3019 NEONMAP1(vcvt_f16_f32, arm_neon_vcvtfp2hf, 0), 3020 NEONMAP1(vcvt_f32_f16, arm_neon_vcvthf2fp, 0), 3021 NEONMAP0(vcvt_f32_v), 3022 NEONMAP2(vcvt_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3023 NEONMAP1(vcvt_n_s32_v, arm_neon_vcvtfp2fxs, 0), 3024 NEONMAP1(vcvt_n_s64_v, arm_neon_vcvtfp2fxs, 0), 3025 NEONMAP1(vcvt_n_u32_v, arm_neon_vcvtfp2fxu, 0), 3026 NEONMAP1(vcvt_n_u64_v, arm_neon_vcvtfp2fxu, 0), 3027 NEONMAP0(vcvt_s32_v), 3028 NEONMAP0(vcvt_s64_v), 3029 NEONMAP0(vcvt_u32_v), 3030 NEONMAP0(vcvt_u64_v), 3031 NEONMAP1(vcvta_s32_v, arm_neon_vcvtas, 0), 3032 NEONMAP1(vcvta_s64_v, arm_neon_vcvtas, 0), 3033 NEONMAP1(vcvta_u32_v, arm_neon_vcvtau, 0), 3034 NEONMAP1(vcvta_u64_v, arm_neon_vcvtau, 0), 3035 NEONMAP1(vcvtaq_s32_v, arm_neon_vcvtas, 0), 3036 NEONMAP1(vcvtaq_s64_v, arm_neon_vcvtas, 0), 3037 NEONMAP1(vcvtaq_u32_v, arm_neon_vcvtau, 0), 3038 NEONMAP1(vcvtaq_u64_v, arm_neon_vcvtau, 0), 3039 NEONMAP1(vcvtm_s32_v, arm_neon_vcvtms, 0), 3040 NEONMAP1(vcvtm_s64_v, arm_neon_vcvtms, 0), 3041 NEONMAP1(vcvtm_u32_v, arm_neon_vcvtmu, 0), 3042 NEONMAP1(vcvtm_u64_v, arm_neon_vcvtmu, 0), 3043 NEONMAP1(vcvtmq_s32_v, arm_neon_vcvtms, 0), 3044 NEONMAP1(vcvtmq_s64_v, arm_neon_vcvtms, 0), 3045 NEONMAP1(vcvtmq_u32_v, arm_neon_vcvtmu, 0), 3046 NEONMAP1(vcvtmq_u64_v, arm_neon_vcvtmu, 0), 3047 NEONMAP1(vcvtn_s32_v, arm_neon_vcvtns, 0), 3048 NEONMAP1(vcvtn_s64_v, arm_neon_vcvtns, 0), 3049 NEONMAP1(vcvtn_u32_v, arm_neon_vcvtnu, 0), 3050 NEONMAP1(vcvtn_u64_v, arm_neon_vcvtnu, 0), 3051 NEONMAP1(vcvtnq_s32_v, arm_neon_vcvtns, 0), 3052 NEONMAP1(vcvtnq_s64_v, arm_neon_vcvtns, 0), 3053 NEONMAP1(vcvtnq_u32_v, arm_neon_vcvtnu, 0), 3054 NEONMAP1(vcvtnq_u64_v, arm_neon_vcvtnu, 0), 3055 NEONMAP1(vcvtp_s32_v, arm_neon_vcvtps, 0), 3056 NEONMAP1(vcvtp_s64_v, arm_neon_vcvtps, 0), 3057 NEONMAP1(vcvtp_u32_v, arm_neon_vcvtpu, 0), 3058 NEONMAP1(vcvtp_u64_v, arm_neon_vcvtpu, 0), 3059 NEONMAP1(vcvtpq_s32_v, arm_neon_vcvtps, 0), 3060 NEONMAP1(vcvtpq_s64_v, arm_neon_vcvtps, 0), 3061 NEONMAP1(vcvtpq_u32_v, arm_neon_vcvtpu, 0), 3062 NEONMAP1(vcvtpq_u64_v, arm_neon_vcvtpu, 0), 3063 NEONMAP0(vcvtq_f32_v), 3064 NEONMAP2(vcvtq_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3065 NEONMAP1(vcvtq_n_s32_v, arm_neon_vcvtfp2fxs, 0), 3066 NEONMAP1(vcvtq_n_s64_v, arm_neon_vcvtfp2fxs, 0), 3067 NEONMAP1(vcvtq_n_u32_v, arm_neon_vcvtfp2fxu, 0), 3068 NEONMAP1(vcvtq_n_u64_v, arm_neon_vcvtfp2fxu, 0), 3069 NEONMAP0(vcvtq_s32_v), 3070 NEONMAP0(vcvtq_s64_v), 3071 NEONMAP0(vcvtq_u32_v), 3072 NEONMAP0(vcvtq_u64_v), 3073 NEONMAP0(vext_v), 3074 NEONMAP0(vextq_v), 3075 NEONMAP0(vfma_v), 3076 NEONMAP0(vfmaq_v), 3077 NEONMAP2(vhadd_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 3078 NEONMAP2(vhaddq_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 3079 NEONMAP2(vhsub_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 3080 NEONMAP2(vhsubq_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 3081 NEONMAP0(vld1_dup_v), 3082 NEONMAP1(vld1_v, arm_neon_vld1, 0), 3083 NEONMAP0(vld1q_dup_v), 3084 NEONMAP1(vld1q_v, arm_neon_vld1, 0), 3085 NEONMAP1(vld2_lane_v, arm_neon_vld2lane, 0), 3086 NEONMAP1(vld2_v, arm_neon_vld2, 0), 3087 NEONMAP1(vld2q_lane_v, arm_neon_vld2lane, 0), 3088 NEONMAP1(vld2q_v, arm_neon_vld2, 0), 3089 NEONMAP1(vld3_lane_v, arm_neon_vld3lane, 0), 3090 NEONMAP1(vld3_v, arm_neon_vld3, 0), 3091 NEONMAP1(vld3q_lane_v, arm_neon_vld3lane, 0), 3092 NEONMAP1(vld3q_v, arm_neon_vld3, 0), 3093 NEONMAP1(vld4_lane_v, arm_neon_vld4lane, 0), 3094 NEONMAP1(vld4_v, arm_neon_vld4, 0), 3095 NEONMAP1(vld4q_lane_v, arm_neon_vld4lane, 0), 3096 NEONMAP1(vld4q_v, arm_neon_vld4, 0), 3097 NEONMAP2(vmax_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 3098 NEONMAP1(vmaxnm_v, arm_neon_vmaxnm, Add1ArgType), 3099 NEONMAP1(vmaxnmq_v, arm_neon_vmaxnm, Add1ArgType), 3100 NEONMAP2(vmaxq_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 3101 NEONMAP2(vmin_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 3102 NEONMAP1(vminnm_v, arm_neon_vminnm, Add1ArgType), 3103 NEONMAP1(vminnmq_v, arm_neon_vminnm, Add1ArgType), 3104 NEONMAP2(vminq_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 3105 NEONMAP0(vmovl_v), 3106 NEONMAP0(vmovn_v), 3107 NEONMAP1(vmul_v, arm_neon_vmulp, Add1ArgType), 3108 NEONMAP0(vmull_v), 3109 NEONMAP1(vmulq_v, arm_neon_vmulp, Add1ArgType), 3110 NEONMAP2(vpadal_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 3111 NEONMAP2(vpadalq_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 3112 NEONMAP1(vpadd_v, arm_neon_vpadd, Add1ArgType), 3113 NEONMAP2(vpaddl_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 3114 NEONMAP2(vpaddlq_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 3115 NEONMAP1(vpaddq_v, arm_neon_vpadd, Add1ArgType), 3116 NEONMAP2(vpmax_v, arm_neon_vpmaxu, arm_neon_vpmaxs, Add1ArgType | UnsignedAlts), 3117 NEONMAP2(vpmin_v, arm_neon_vpminu, arm_neon_vpmins, Add1ArgType | UnsignedAlts), 3118 NEONMAP1(vqabs_v, arm_neon_vqabs, Add1ArgType), 3119 NEONMAP1(vqabsq_v, arm_neon_vqabs, Add1ArgType), 3120 NEONMAP2(vqadd_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 3121 NEONMAP2(vqaddq_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 3122 NEONMAP2(vqdmlal_v, arm_neon_vqdmull, arm_neon_vqadds, 0), 3123 NEONMAP2(vqdmlsl_v, arm_neon_vqdmull, arm_neon_vqsubs, 0), 3124 NEONMAP1(vqdmulh_v, arm_neon_vqdmulh, Add1ArgType), 3125 NEONMAP1(vqdmulhq_v, arm_neon_vqdmulh, Add1ArgType), 3126 NEONMAP1(vqdmull_v, arm_neon_vqdmull, Add1ArgType), 3127 NEONMAP2(vqmovn_v, arm_neon_vqmovnu, arm_neon_vqmovns, Add1ArgType | UnsignedAlts), 3128 NEONMAP1(vqmovun_v, arm_neon_vqmovnsu, Add1ArgType), 3129 NEONMAP1(vqneg_v, arm_neon_vqneg, Add1ArgType), 3130 NEONMAP1(vqnegq_v, arm_neon_vqneg, Add1ArgType), 3131 NEONMAP1(vqrdmulh_v, arm_neon_vqrdmulh, Add1ArgType), 3132 NEONMAP1(vqrdmulhq_v, arm_neon_vqrdmulh, Add1ArgType), 3133 NEONMAP2(vqrshl_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 3134 NEONMAP2(vqrshlq_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 3135 NEONMAP2(vqshl_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 3136 NEONMAP2(vqshl_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 3137 NEONMAP2(vqshlq_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 3138 NEONMAP2(vqshlq_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 3139 NEONMAP1(vqshlu_n_v, arm_neon_vqshiftsu, 0), 3140 NEONMAP1(vqshluq_n_v, arm_neon_vqshiftsu, 0), 3141 NEONMAP2(vqsub_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 3142 NEONMAP2(vqsubq_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 3143 NEONMAP1(vraddhn_v, arm_neon_vraddhn, Add1ArgType), 3144 NEONMAP2(vrecpe_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 3145 NEONMAP2(vrecpeq_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 3146 NEONMAP1(vrecps_v, arm_neon_vrecps, Add1ArgType), 3147 NEONMAP1(vrecpsq_v, arm_neon_vrecps, Add1ArgType), 3148 NEONMAP2(vrhadd_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 3149 NEONMAP2(vrhaddq_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 3150 NEONMAP1(vrnd_v, arm_neon_vrintz, Add1ArgType), 3151 NEONMAP1(vrnda_v, arm_neon_vrinta, Add1ArgType), 3152 NEONMAP1(vrndaq_v, arm_neon_vrinta, Add1ArgType), 3153 NEONMAP1(vrndm_v, arm_neon_vrintm, Add1ArgType), 3154 NEONMAP1(vrndmq_v, arm_neon_vrintm, Add1ArgType), 3155 NEONMAP1(vrndn_v, arm_neon_vrintn, Add1ArgType), 3156 NEONMAP1(vrndnq_v, arm_neon_vrintn, Add1ArgType), 3157 NEONMAP1(vrndp_v, arm_neon_vrintp, Add1ArgType), 3158 NEONMAP1(vrndpq_v, arm_neon_vrintp, Add1ArgType), 3159 NEONMAP1(vrndq_v, arm_neon_vrintz, Add1ArgType), 3160 NEONMAP1(vrndx_v, arm_neon_vrintx, Add1ArgType), 3161 NEONMAP1(vrndxq_v, arm_neon_vrintx, Add1ArgType), 3162 NEONMAP2(vrshl_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 3163 NEONMAP2(vrshlq_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 3164 NEONMAP2(vrshr_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 3165 NEONMAP2(vrshrq_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 3166 NEONMAP2(vrsqrte_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 3167 NEONMAP2(vrsqrteq_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 3168 NEONMAP1(vrsqrts_v, arm_neon_vrsqrts, Add1ArgType), 3169 NEONMAP1(vrsqrtsq_v, arm_neon_vrsqrts, Add1ArgType), 3170 NEONMAP1(vrsubhn_v, arm_neon_vrsubhn, Add1ArgType), 3171 NEONMAP1(vsha1su0q_v, arm_neon_sha1su0, 0), 3172 NEONMAP1(vsha1su1q_v, arm_neon_sha1su1, 0), 3173 NEONMAP1(vsha256h2q_v, arm_neon_sha256h2, 0), 3174 NEONMAP1(vsha256hq_v, arm_neon_sha256h, 0), 3175 NEONMAP1(vsha256su0q_v, arm_neon_sha256su0, 0), 3176 NEONMAP1(vsha256su1q_v, arm_neon_sha256su1, 0), 3177 NEONMAP0(vshl_n_v), 3178 NEONMAP2(vshl_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 3179 NEONMAP0(vshll_n_v), 3180 NEONMAP0(vshlq_n_v), 3181 NEONMAP2(vshlq_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 3182 NEONMAP0(vshr_n_v), 3183 NEONMAP0(vshrn_n_v), 3184 NEONMAP0(vshrq_n_v), 3185 NEONMAP1(vst1_v, arm_neon_vst1, 0), 3186 NEONMAP1(vst1q_v, arm_neon_vst1, 0), 3187 NEONMAP1(vst2_lane_v, arm_neon_vst2lane, 0), 3188 NEONMAP1(vst2_v, arm_neon_vst2, 0), 3189 NEONMAP1(vst2q_lane_v, arm_neon_vst2lane, 0), 3190 NEONMAP1(vst2q_v, arm_neon_vst2, 0), 3191 NEONMAP1(vst3_lane_v, arm_neon_vst3lane, 0), 3192 NEONMAP1(vst3_v, arm_neon_vst3, 0), 3193 NEONMAP1(vst3q_lane_v, arm_neon_vst3lane, 0), 3194 NEONMAP1(vst3q_v, arm_neon_vst3, 0), 3195 NEONMAP1(vst4_lane_v, arm_neon_vst4lane, 0), 3196 NEONMAP1(vst4_v, arm_neon_vst4, 0), 3197 NEONMAP1(vst4q_lane_v, arm_neon_vst4lane, 0), 3198 NEONMAP1(vst4q_v, arm_neon_vst4, 0), 3199 NEONMAP0(vsubhn_v), 3200 NEONMAP0(vtrn_v), 3201 NEONMAP0(vtrnq_v), 3202 NEONMAP0(vtst_v), 3203 NEONMAP0(vtstq_v), 3204 NEONMAP0(vuzp_v), 3205 NEONMAP0(vuzpq_v), 3206 NEONMAP0(vzip_v), 3207 NEONMAP0(vzipq_v) 3208 }; 3209 3210 static const NeonIntrinsicInfo AArch64SIMDIntrinsicMap[] = { 3211 NEONMAP1(vabs_v, aarch64_neon_abs, 0), 3212 NEONMAP1(vabsq_v, aarch64_neon_abs, 0), 3213 NEONMAP0(vaddhn_v), 3214 NEONMAP1(vaesdq_v, aarch64_crypto_aesd, 0), 3215 NEONMAP1(vaeseq_v, aarch64_crypto_aese, 0), 3216 NEONMAP1(vaesimcq_v, aarch64_crypto_aesimc, 0), 3217 NEONMAP1(vaesmcq_v, aarch64_crypto_aesmc, 0), 3218 NEONMAP1(vcage_v, aarch64_neon_facge, 0), 3219 NEONMAP1(vcageq_v, aarch64_neon_facge, 0), 3220 NEONMAP1(vcagt_v, aarch64_neon_facgt, 0), 3221 NEONMAP1(vcagtq_v, aarch64_neon_facgt, 0), 3222 NEONMAP1(vcale_v, aarch64_neon_facge, 0), 3223 NEONMAP1(vcaleq_v, aarch64_neon_facge, 0), 3224 NEONMAP1(vcalt_v, aarch64_neon_facgt, 0), 3225 NEONMAP1(vcaltq_v, aarch64_neon_facgt, 0), 3226 NEONMAP1(vcls_v, aarch64_neon_cls, Add1ArgType), 3227 NEONMAP1(vclsq_v, aarch64_neon_cls, Add1ArgType), 3228 NEONMAP1(vclz_v, ctlz, Add1ArgType), 3229 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 3230 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 3231 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 3232 NEONMAP1(vcvt_f16_f32, aarch64_neon_vcvtfp2hf, 0), 3233 NEONMAP1(vcvt_f32_f16, aarch64_neon_vcvthf2fp, 0), 3234 NEONMAP0(vcvt_f32_v), 3235 NEONMAP2(vcvt_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3236 NEONMAP2(vcvt_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3237 NEONMAP1(vcvt_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 3238 NEONMAP1(vcvt_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 3239 NEONMAP1(vcvt_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 3240 NEONMAP1(vcvt_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 3241 NEONMAP0(vcvtq_f32_v), 3242 NEONMAP2(vcvtq_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3243 NEONMAP2(vcvtq_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3244 NEONMAP1(vcvtq_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 3245 NEONMAP1(vcvtq_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 3246 NEONMAP1(vcvtq_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 3247 NEONMAP1(vcvtq_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 3248 NEONMAP1(vcvtx_f32_v, aarch64_neon_fcvtxn, AddRetType | Add1ArgType), 3249 NEONMAP0(vext_v), 3250 NEONMAP0(vextq_v), 3251 NEONMAP0(vfma_v), 3252 NEONMAP0(vfmaq_v), 3253 NEONMAP2(vhadd_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 3254 NEONMAP2(vhaddq_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 3255 NEONMAP2(vhsub_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 3256 NEONMAP2(vhsubq_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 3257 NEONMAP0(vmovl_v), 3258 NEONMAP0(vmovn_v), 3259 NEONMAP1(vmul_v, aarch64_neon_pmul, Add1ArgType), 3260 NEONMAP1(vmulq_v, aarch64_neon_pmul, Add1ArgType), 3261 NEONMAP1(vpadd_v, aarch64_neon_addp, Add1ArgType), 3262 NEONMAP2(vpaddl_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 3263 NEONMAP2(vpaddlq_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 3264 NEONMAP1(vpaddq_v, aarch64_neon_addp, Add1ArgType), 3265 NEONMAP1(vqabs_v, aarch64_neon_sqabs, Add1ArgType), 3266 NEONMAP1(vqabsq_v, aarch64_neon_sqabs, Add1ArgType), 3267 NEONMAP2(vqadd_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 3268 NEONMAP2(vqaddq_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 3269 NEONMAP2(vqdmlal_v, aarch64_neon_sqdmull, aarch64_neon_sqadd, 0), 3270 NEONMAP2(vqdmlsl_v, aarch64_neon_sqdmull, aarch64_neon_sqsub, 0), 3271 NEONMAP1(vqdmulh_v, aarch64_neon_sqdmulh, Add1ArgType), 3272 NEONMAP1(vqdmulhq_v, aarch64_neon_sqdmulh, Add1ArgType), 3273 NEONMAP1(vqdmull_v, aarch64_neon_sqdmull, Add1ArgType), 3274 NEONMAP2(vqmovn_v, aarch64_neon_uqxtn, aarch64_neon_sqxtn, Add1ArgType | UnsignedAlts), 3275 NEONMAP1(vqmovun_v, aarch64_neon_sqxtun, Add1ArgType), 3276 NEONMAP1(vqneg_v, aarch64_neon_sqneg, Add1ArgType), 3277 NEONMAP1(vqnegq_v, aarch64_neon_sqneg, Add1ArgType), 3278 NEONMAP1(vqrdmulh_v, aarch64_neon_sqrdmulh, Add1ArgType), 3279 NEONMAP1(vqrdmulhq_v, aarch64_neon_sqrdmulh, Add1ArgType), 3280 NEONMAP2(vqrshl_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 3281 NEONMAP2(vqrshlq_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 3282 NEONMAP2(vqshl_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl, UnsignedAlts), 3283 NEONMAP2(vqshl_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 3284 NEONMAP2(vqshlq_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl,UnsignedAlts), 3285 NEONMAP2(vqshlq_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 3286 NEONMAP1(vqshlu_n_v, aarch64_neon_sqshlu, 0), 3287 NEONMAP1(vqshluq_n_v, aarch64_neon_sqshlu, 0), 3288 NEONMAP2(vqsub_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 3289 NEONMAP2(vqsubq_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 3290 NEONMAP1(vraddhn_v, aarch64_neon_raddhn, Add1ArgType), 3291 NEONMAP2(vrecpe_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 3292 NEONMAP2(vrecpeq_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 3293 NEONMAP1(vrecps_v, aarch64_neon_frecps, Add1ArgType), 3294 NEONMAP1(vrecpsq_v, aarch64_neon_frecps, Add1ArgType), 3295 NEONMAP2(vrhadd_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 3296 NEONMAP2(vrhaddq_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 3297 NEONMAP2(vrshl_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 3298 NEONMAP2(vrshlq_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 3299 NEONMAP2(vrshr_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 3300 NEONMAP2(vrshrq_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 3301 NEONMAP2(vrsqrte_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 3302 NEONMAP2(vrsqrteq_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 3303 NEONMAP1(vrsqrts_v, aarch64_neon_frsqrts, Add1ArgType), 3304 NEONMAP1(vrsqrtsq_v, aarch64_neon_frsqrts, Add1ArgType), 3305 NEONMAP1(vrsubhn_v, aarch64_neon_rsubhn, Add1ArgType), 3306 NEONMAP1(vsha1su0q_v, aarch64_crypto_sha1su0, 0), 3307 NEONMAP1(vsha1su1q_v, aarch64_crypto_sha1su1, 0), 3308 NEONMAP1(vsha256h2q_v, aarch64_crypto_sha256h2, 0), 3309 NEONMAP1(vsha256hq_v, aarch64_crypto_sha256h, 0), 3310 NEONMAP1(vsha256su0q_v, aarch64_crypto_sha256su0, 0), 3311 NEONMAP1(vsha256su1q_v, aarch64_crypto_sha256su1, 0), 3312 NEONMAP0(vshl_n_v), 3313 NEONMAP2(vshl_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 3314 NEONMAP0(vshll_n_v), 3315 NEONMAP0(vshlq_n_v), 3316 NEONMAP2(vshlq_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 3317 NEONMAP0(vshr_n_v), 3318 NEONMAP0(vshrn_n_v), 3319 NEONMAP0(vshrq_n_v), 3320 NEONMAP0(vsubhn_v), 3321 NEONMAP0(vtst_v), 3322 NEONMAP0(vtstq_v), 3323 }; 3324 3325 static const NeonIntrinsicInfo AArch64SISDIntrinsicMap[] = { 3326 NEONMAP1(vabdd_f64, aarch64_sisd_fabd, Add1ArgType), 3327 NEONMAP1(vabds_f32, aarch64_sisd_fabd, Add1ArgType), 3328 NEONMAP1(vabsd_s64, aarch64_neon_abs, Add1ArgType), 3329 NEONMAP1(vaddlv_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 3330 NEONMAP1(vaddlv_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 3331 NEONMAP1(vaddlvq_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 3332 NEONMAP1(vaddlvq_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 3333 NEONMAP1(vaddv_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 3334 NEONMAP1(vaddv_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 3335 NEONMAP1(vaddv_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3336 NEONMAP1(vaddvq_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 3337 NEONMAP1(vaddvq_f64, aarch64_neon_faddv, AddRetType | Add1ArgType), 3338 NEONMAP1(vaddvq_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 3339 NEONMAP1(vaddvq_s64, aarch64_neon_saddv, AddRetType | Add1ArgType), 3340 NEONMAP1(vaddvq_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3341 NEONMAP1(vaddvq_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3342 NEONMAP1(vcaged_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 3343 NEONMAP1(vcages_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 3344 NEONMAP1(vcagtd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 3345 NEONMAP1(vcagts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 3346 NEONMAP1(vcaled_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 3347 NEONMAP1(vcales_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 3348 NEONMAP1(vcaltd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 3349 NEONMAP1(vcalts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 3350 NEONMAP1(vcvtad_s64_f64, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 3351 NEONMAP1(vcvtad_u64_f64, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 3352 NEONMAP1(vcvtas_s32_f32, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 3353 NEONMAP1(vcvtas_u32_f32, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 3354 NEONMAP1(vcvtd_n_f64_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 3355 NEONMAP1(vcvtd_n_f64_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 3356 NEONMAP1(vcvtd_n_s64_f64, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 3357 NEONMAP1(vcvtd_n_u64_f64, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 3358 NEONMAP1(vcvtmd_s64_f64, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 3359 NEONMAP1(vcvtmd_u64_f64, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 3360 NEONMAP1(vcvtms_s32_f32, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 3361 NEONMAP1(vcvtms_u32_f32, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 3362 NEONMAP1(vcvtnd_s64_f64, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 3363 NEONMAP1(vcvtnd_u64_f64, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 3364 NEONMAP1(vcvtns_s32_f32, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 3365 NEONMAP1(vcvtns_u32_f32, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 3366 NEONMAP1(vcvtpd_s64_f64, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 3367 NEONMAP1(vcvtpd_u64_f64, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 3368 NEONMAP1(vcvtps_s32_f32, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 3369 NEONMAP1(vcvtps_u32_f32, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 3370 NEONMAP1(vcvts_n_f32_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 3371 NEONMAP1(vcvts_n_f32_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 3372 NEONMAP1(vcvts_n_s32_f32, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 3373 NEONMAP1(vcvts_n_u32_f32, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 3374 NEONMAP1(vcvtxd_f32_f64, aarch64_sisd_fcvtxn, 0), 3375 NEONMAP1(vmaxnmv_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3376 NEONMAP1(vmaxnmvq_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3377 NEONMAP1(vmaxnmvq_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3378 NEONMAP1(vmaxv_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3379 NEONMAP1(vmaxv_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 3380 NEONMAP1(vmaxv_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 3381 NEONMAP1(vmaxvq_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3382 NEONMAP1(vmaxvq_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3383 NEONMAP1(vmaxvq_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 3384 NEONMAP1(vmaxvq_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 3385 NEONMAP1(vminnmv_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3386 NEONMAP1(vminnmvq_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3387 NEONMAP1(vminnmvq_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3388 NEONMAP1(vminv_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3389 NEONMAP1(vminv_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 3390 NEONMAP1(vminv_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 3391 NEONMAP1(vminvq_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3392 NEONMAP1(vminvq_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 3393 NEONMAP1(vminvq_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 3394 NEONMAP1(vminvq_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 3395 NEONMAP1(vmull_p64, aarch64_neon_pmull64, 0), 3396 NEONMAP1(vmulxd_f64, aarch64_neon_fmulx, Add1ArgType), 3397 NEONMAP1(vmulxs_f32, aarch64_neon_fmulx, Add1ArgType), 3398 NEONMAP1(vpaddd_s64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3399 NEONMAP1(vpaddd_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3400 NEONMAP1(vpmaxnmqd_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3401 NEONMAP1(vpmaxnms_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3402 NEONMAP1(vpmaxqd_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3403 NEONMAP1(vpmaxs_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3404 NEONMAP1(vpminnmqd_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3405 NEONMAP1(vpminnms_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3406 NEONMAP1(vpminqd_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 3407 NEONMAP1(vpmins_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3408 NEONMAP1(vqabsb_s8, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 3409 NEONMAP1(vqabsd_s64, aarch64_neon_sqabs, Add1ArgType), 3410 NEONMAP1(vqabsh_s16, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 3411 NEONMAP1(vqabss_s32, aarch64_neon_sqabs, Add1ArgType), 3412 NEONMAP1(vqaddb_s8, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 3413 NEONMAP1(vqaddb_u8, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 3414 NEONMAP1(vqaddd_s64, aarch64_neon_sqadd, Add1ArgType), 3415 NEONMAP1(vqaddd_u64, aarch64_neon_uqadd, Add1ArgType), 3416 NEONMAP1(vqaddh_s16, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 3417 NEONMAP1(vqaddh_u16, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 3418 NEONMAP1(vqadds_s32, aarch64_neon_sqadd, Add1ArgType), 3419 NEONMAP1(vqadds_u32, aarch64_neon_uqadd, Add1ArgType), 3420 NEONMAP1(vqdmulhh_s16, aarch64_neon_sqdmulh, Vectorize1ArgType | Use64BitVectors), 3421 NEONMAP1(vqdmulhs_s32, aarch64_neon_sqdmulh, Add1ArgType), 3422 NEONMAP1(vqdmullh_s16, aarch64_neon_sqdmull, VectorRet | Use128BitVectors), 3423 NEONMAP1(vqdmulls_s32, aarch64_neon_sqdmulls_scalar, 0), 3424 NEONMAP1(vqmovnd_s64, aarch64_neon_scalar_sqxtn, AddRetType | Add1ArgType), 3425 NEONMAP1(vqmovnd_u64, aarch64_neon_scalar_uqxtn, AddRetType | Add1ArgType), 3426 NEONMAP1(vqmovnh_s16, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 3427 NEONMAP1(vqmovnh_u16, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 3428 NEONMAP1(vqmovns_s32, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 3429 NEONMAP1(vqmovns_u32, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 3430 NEONMAP1(vqmovund_s64, aarch64_neon_scalar_sqxtun, AddRetType | Add1ArgType), 3431 NEONMAP1(vqmovunh_s16, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 3432 NEONMAP1(vqmovuns_s32, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 3433 NEONMAP1(vqnegb_s8, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 3434 NEONMAP1(vqnegd_s64, aarch64_neon_sqneg, Add1ArgType), 3435 NEONMAP1(vqnegh_s16, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 3436 NEONMAP1(vqnegs_s32, aarch64_neon_sqneg, Add1ArgType), 3437 NEONMAP1(vqrdmulhh_s16, aarch64_neon_sqrdmulh, Vectorize1ArgType | Use64BitVectors), 3438 NEONMAP1(vqrdmulhs_s32, aarch64_neon_sqrdmulh, Add1ArgType), 3439 NEONMAP1(vqrshlb_s8, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 3440 NEONMAP1(vqrshlb_u8, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 3441 NEONMAP1(vqrshld_s64, aarch64_neon_sqrshl, Add1ArgType), 3442 NEONMAP1(vqrshld_u64, aarch64_neon_uqrshl, Add1ArgType), 3443 NEONMAP1(vqrshlh_s16, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 3444 NEONMAP1(vqrshlh_u16, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 3445 NEONMAP1(vqrshls_s32, aarch64_neon_sqrshl, Add1ArgType), 3446 NEONMAP1(vqrshls_u32, aarch64_neon_uqrshl, Add1ArgType), 3447 NEONMAP1(vqrshrnd_n_s64, aarch64_neon_sqrshrn, AddRetType), 3448 NEONMAP1(vqrshrnd_n_u64, aarch64_neon_uqrshrn, AddRetType), 3449 NEONMAP1(vqrshrnh_n_s16, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 3450 NEONMAP1(vqrshrnh_n_u16, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 3451 NEONMAP1(vqrshrns_n_s32, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 3452 NEONMAP1(vqrshrns_n_u32, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 3453 NEONMAP1(vqrshrund_n_s64, aarch64_neon_sqrshrun, AddRetType), 3454 NEONMAP1(vqrshrunh_n_s16, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 3455 NEONMAP1(vqrshruns_n_s32, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 3456 NEONMAP1(vqshlb_n_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3457 NEONMAP1(vqshlb_n_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3458 NEONMAP1(vqshlb_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3459 NEONMAP1(vqshlb_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3460 NEONMAP1(vqshld_s64, aarch64_neon_sqshl, Add1ArgType), 3461 NEONMAP1(vqshld_u64, aarch64_neon_uqshl, Add1ArgType), 3462 NEONMAP1(vqshlh_n_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3463 NEONMAP1(vqshlh_n_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3464 NEONMAP1(vqshlh_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3465 NEONMAP1(vqshlh_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3466 NEONMAP1(vqshls_n_s32, aarch64_neon_sqshl, Add1ArgType), 3467 NEONMAP1(vqshls_n_u32, aarch64_neon_uqshl, Add1ArgType), 3468 NEONMAP1(vqshls_s32, aarch64_neon_sqshl, Add1ArgType), 3469 NEONMAP1(vqshls_u32, aarch64_neon_uqshl, Add1ArgType), 3470 NEONMAP1(vqshlub_n_s8, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 3471 NEONMAP1(vqshluh_n_s16, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 3472 NEONMAP1(vqshlus_n_s32, aarch64_neon_sqshlu, Add1ArgType), 3473 NEONMAP1(vqshrnd_n_s64, aarch64_neon_sqshrn, AddRetType), 3474 NEONMAP1(vqshrnd_n_u64, aarch64_neon_uqshrn, AddRetType), 3475 NEONMAP1(vqshrnh_n_s16, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 3476 NEONMAP1(vqshrnh_n_u16, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 3477 NEONMAP1(vqshrns_n_s32, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 3478 NEONMAP1(vqshrns_n_u32, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 3479 NEONMAP1(vqshrund_n_s64, aarch64_neon_sqshrun, AddRetType), 3480 NEONMAP1(vqshrunh_n_s16, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 3481 NEONMAP1(vqshruns_n_s32, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 3482 NEONMAP1(vqsubb_s8, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 3483 NEONMAP1(vqsubb_u8, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 3484 NEONMAP1(vqsubd_s64, aarch64_neon_sqsub, Add1ArgType), 3485 NEONMAP1(vqsubd_u64, aarch64_neon_uqsub, Add1ArgType), 3486 NEONMAP1(vqsubh_s16, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 3487 NEONMAP1(vqsubh_u16, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 3488 NEONMAP1(vqsubs_s32, aarch64_neon_sqsub, Add1ArgType), 3489 NEONMAP1(vqsubs_u32, aarch64_neon_uqsub, Add1ArgType), 3490 NEONMAP1(vrecped_f64, aarch64_neon_frecpe, Add1ArgType), 3491 NEONMAP1(vrecpes_f32, aarch64_neon_frecpe, Add1ArgType), 3492 NEONMAP1(vrecpxd_f64, aarch64_neon_frecpx, Add1ArgType), 3493 NEONMAP1(vrecpxs_f32, aarch64_neon_frecpx, Add1ArgType), 3494 NEONMAP1(vrshld_s64, aarch64_neon_srshl, Add1ArgType), 3495 NEONMAP1(vrshld_u64, aarch64_neon_urshl, Add1ArgType), 3496 NEONMAP1(vrsqrted_f64, aarch64_neon_frsqrte, Add1ArgType), 3497 NEONMAP1(vrsqrtes_f32, aarch64_neon_frsqrte, Add1ArgType), 3498 NEONMAP1(vrsqrtsd_f64, aarch64_neon_frsqrts, Add1ArgType), 3499 NEONMAP1(vrsqrtss_f32, aarch64_neon_frsqrts, Add1ArgType), 3500 NEONMAP1(vsha1cq_u32, aarch64_crypto_sha1c, 0), 3501 NEONMAP1(vsha1h_u32, aarch64_crypto_sha1h, 0), 3502 NEONMAP1(vsha1mq_u32, aarch64_crypto_sha1m, 0), 3503 NEONMAP1(vsha1pq_u32, aarch64_crypto_sha1p, 0), 3504 NEONMAP1(vshld_s64, aarch64_neon_sshl, Add1ArgType), 3505 NEONMAP1(vshld_u64, aarch64_neon_ushl, Add1ArgType), 3506 NEONMAP1(vslid_n_s64, aarch64_neon_vsli, Vectorize1ArgType), 3507 NEONMAP1(vslid_n_u64, aarch64_neon_vsli, Vectorize1ArgType), 3508 NEONMAP1(vsqaddb_u8, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 3509 NEONMAP1(vsqaddd_u64, aarch64_neon_usqadd, Add1ArgType), 3510 NEONMAP1(vsqaddh_u16, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 3511 NEONMAP1(vsqadds_u32, aarch64_neon_usqadd, Add1ArgType), 3512 NEONMAP1(vsrid_n_s64, aarch64_neon_vsri, Vectorize1ArgType), 3513 NEONMAP1(vsrid_n_u64, aarch64_neon_vsri, Vectorize1ArgType), 3514 NEONMAP1(vuqaddb_s8, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 3515 NEONMAP1(vuqaddd_s64, aarch64_neon_suqadd, Add1ArgType), 3516 NEONMAP1(vuqaddh_s16, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 3517 NEONMAP1(vuqadds_s32, aarch64_neon_suqadd, Add1ArgType), 3518 }; 3519 3520 #undef NEONMAP0 3521 #undef NEONMAP1 3522 #undef NEONMAP2 3523 3524 static bool NEONSIMDIntrinsicsProvenSorted = false; 3525 3526 static bool AArch64SIMDIntrinsicsProvenSorted = false; 3527 static bool AArch64SISDIntrinsicsProvenSorted = false; 3528 3529 3530 static const NeonIntrinsicInfo * 3531 findNeonIntrinsicInMap(ArrayRef<NeonIntrinsicInfo> IntrinsicMap, 3532 unsigned BuiltinID, bool &MapProvenSorted) { 3533 3534 #ifndef NDEBUG 3535 if (!MapProvenSorted) { 3536 assert(std::is_sorted(std::begin(IntrinsicMap), std::end(IntrinsicMap))); 3537 MapProvenSorted = true; 3538 } 3539 #endif 3540 3541 const NeonIntrinsicInfo *Builtin = 3542 std::lower_bound(IntrinsicMap.begin(), IntrinsicMap.end(), BuiltinID); 3543 3544 if (Builtin != IntrinsicMap.end() && Builtin->BuiltinID == BuiltinID) 3545 return Builtin; 3546 3547 return nullptr; 3548 } 3549 3550 Function *CodeGenFunction::LookupNeonLLVMIntrinsic(unsigned IntrinsicID, 3551 unsigned Modifier, 3552 llvm::Type *ArgType, 3553 const CallExpr *E) { 3554 int VectorSize = 0; 3555 if (Modifier & Use64BitVectors) 3556 VectorSize = 64; 3557 else if (Modifier & Use128BitVectors) 3558 VectorSize = 128; 3559 3560 // Return type. 3561 SmallVector<llvm::Type *, 3> Tys; 3562 if (Modifier & AddRetType) { 3563 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 3564 if (Modifier & VectorizeRetType) 3565 Ty = llvm::VectorType::get( 3566 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); 3567 3568 Tys.push_back(Ty); 3569 } 3570 3571 // Arguments. 3572 if (Modifier & VectorizeArgTypes) { 3573 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; 3574 ArgType = llvm::VectorType::get(ArgType, Elts); 3575 } 3576 3577 if (Modifier & (Add1ArgType | Add2ArgTypes)) 3578 Tys.push_back(ArgType); 3579 3580 if (Modifier & Add2ArgTypes) 3581 Tys.push_back(ArgType); 3582 3583 if (Modifier & InventFloatType) 3584 Tys.push_back(FloatTy); 3585 3586 return CGM.getIntrinsic(IntrinsicID, Tys); 3587 } 3588 3589 static Value *EmitCommonNeonSISDBuiltinExpr(CodeGenFunction &CGF, 3590 const NeonIntrinsicInfo &SISDInfo, 3591 SmallVectorImpl<Value *> &Ops, 3592 const CallExpr *E) { 3593 unsigned BuiltinID = SISDInfo.BuiltinID; 3594 unsigned int Int = SISDInfo.LLVMIntrinsic; 3595 unsigned Modifier = SISDInfo.TypeModifier; 3596 const char *s = SISDInfo.NameHint; 3597 3598 switch (BuiltinID) { 3599 case NEON::BI__builtin_neon_vcled_s64: 3600 case NEON::BI__builtin_neon_vcled_u64: 3601 case NEON::BI__builtin_neon_vcles_f32: 3602 case NEON::BI__builtin_neon_vcled_f64: 3603 case NEON::BI__builtin_neon_vcltd_s64: 3604 case NEON::BI__builtin_neon_vcltd_u64: 3605 case NEON::BI__builtin_neon_vclts_f32: 3606 case NEON::BI__builtin_neon_vcltd_f64: 3607 case NEON::BI__builtin_neon_vcales_f32: 3608 case NEON::BI__builtin_neon_vcaled_f64: 3609 case NEON::BI__builtin_neon_vcalts_f32: 3610 case NEON::BI__builtin_neon_vcaltd_f64: 3611 // Only one direction of comparisons actually exist, cmle is actually a cmge 3612 // with swapped operands. The table gives us the right intrinsic but we 3613 // still need to do the swap. 3614 std::swap(Ops[0], Ops[1]); 3615 break; 3616 } 3617 3618 assert(Int && "Generic code assumes a valid intrinsic"); 3619 3620 // Determine the type(s) of this overloaded AArch64 intrinsic. 3621 const Expr *Arg = E->getArg(0); 3622 llvm::Type *ArgTy = CGF.ConvertType(Arg->getType()); 3623 Function *F = CGF.LookupNeonLLVMIntrinsic(Int, Modifier, ArgTy, E); 3624 3625 int j = 0; 3626 ConstantInt *C0 = ConstantInt::get(CGF.SizeTy, 0); 3627 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 3628 ai != ae; ++ai, ++j) { 3629 llvm::Type *ArgTy = ai->getType(); 3630 if (Ops[j]->getType()->getPrimitiveSizeInBits() == 3631 ArgTy->getPrimitiveSizeInBits()) 3632 continue; 3633 3634 assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy()); 3635 // The constant argument to an _n_ intrinsic always has Int32Ty, so truncate 3636 // it before inserting. 3637 Ops[j] = 3638 CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType()); 3639 Ops[j] = 3640 CGF.Builder.CreateInsertElement(UndefValue::get(ArgTy), Ops[j], C0); 3641 } 3642 3643 Value *Result = CGF.EmitNeonCall(F, Ops, s); 3644 llvm::Type *ResultType = CGF.ConvertType(E->getType()); 3645 if (ResultType->getPrimitiveSizeInBits() < 3646 Result->getType()->getPrimitiveSizeInBits()) 3647 return CGF.Builder.CreateExtractElement(Result, C0); 3648 3649 return CGF.Builder.CreateBitCast(Result, ResultType, s); 3650 } 3651 3652 Value *CodeGenFunction::EmitCommonNeonBuiltinExpr( 3653 unsigned BuiltinID, unsigned LLVMIntrinsic, unsigned AltLLVMIntrinsic, 3654 const char *NameHint, unsigned Modifier, const CallExpr *E, 3655 SmallVectorImpl<llvm::Value *> &Ops, Address PtrOp0, Address PtrOp1) { 3656 // Get the last argument, which specifies the vector type. 3657 llvm::APSInt NeonTypeConst; 3658 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 3659 if (!Arg->isIntegerConstantExpr(NeonTypeConst, getContext())) 3660 return nullptr; 3661 3662 // Determine the type of this overloaded NEON intrinsic. 3663 NeonTypeFlags Type(NeonTypeConst.getZExtValue()); 3664 bool Usgn = Type.isUnsigned(); 3665 bool Quad = Type.isQuad(); 3666 3667 llvm::VectorType *VTy = GetNeonType(this, Type); 3668 llvm::Type *Ty = VTy; 3669 if (!Ty) 3670 return nullptr; 3671 3672 auto getAlignmentValue32 = [&](Address addr) -> Value* { 3673 return Builder.getInt32(addr.getAlignment().getQuantity()); 3674 }; 3675 3676 unsigned Int = LLVMIntrinsic; 3677 if ((Modifier & UnsignedAlts) && !Usgn) 3678 Int = AltLLVMIntrinsic; 3679 3680 switch (BuiltinID) { 3681 default: break; 3682 case NEON::BI__builtin_neon_vabs_v: 3683 case NEON::BI__builtin_neon_vabsq_v: 3684 if (VTy->getElementType()->isFloatingPointTy()) 3685 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, Ty), Ops, "vabs"); 3686 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), Ops, "vabs"); 3687 case NEON::BI__builtin_neon_vaddhn_v: { 3688 llvm::VectorType *SrcTy = 3689 llvm::VectorType::getExtendedElementVectorType(VTy); 3690 3691 // %sum = add <4 x i32> %lhs, %rhs 3692 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3693 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 3694 Ops[0] = Builder.CreateAdd(Ops[0], Ops[1], "vaddhn"); 3695 3696 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 3697 Constant *ShiftAmt = 3698 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 3699 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vaddhn"); 3700 3701 // %res = trunc <4 x i32> %high to <4 x i16> 3702 return Builder.CreateTrunc(Ops[0], VTy, "vaddhn"); 3703 } 3704 case NEON::BI__builtin_neon_vcale_v: 3705 case NEON::BI__builtin_neon_vcaleq_v: 3706 case NEON::BI__builtin_neon_vcalt_v: 3707 case NEON::BI__builtin_neon_vcaltq_v: 3708 std::swap(Ops[0], Ops[1]); 3709 case NEON::BI__builtin_neon_vcage_v: 3710 case NEON::BI__builtin_neon_vcageq_v: 3711 case NEON::BI__builtin_neon_vcagt_v: 3712 case NEON::BI__builtin_neon_vcagtq_v: { 3713 llvm::Type *VecFlt = llvm::VectorType::get( 3714 VTy->getScalarSizeInBits() == 32 ? FloatTy : DoubleTy, 3715 VTy->getNumElements()); 3716 llvm::Type *Tys[] = { VTy, VecFlt }; 3717 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3718 return EmitNeonCall(F, Ops, NameHint); 3719 } 3720 case NEON::BI__builtin_neon_vclz_v: 3721 case NEON::BI__builtin_neon_vclzq_v: 3722 // We generate target-independent intrinsic, which needs a second argument 3723 // for whether or not clz of zero is undefined; on ARM it isn't. 3724 Ops.push_back(Builder.getInt1(getTarget().isCLZForZeroUndef())); 3725 break; 3726 case NEON::BI__builtin_neon_vcvt_f32_v: 3727 case NEON::BI__builtin_neon_vcvtq_f32_v: 3728 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3729 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, Quad)); 3730 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 3731 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 3732 case NEON::BI__builtin_neon_vcvt_n_f32_v: 3733 case NEON::BI__builtin_neon_vcvt_n_f64_v: 3734 case NEON::BI__builtin_neon_vcvtq_n_f32_v: 3735 case NEON::BI__builtin_neon_vcvtq_n_f64_v: { 3736 llvm::Type *Tys[2] = { GetFloatNeonType(this, Type), Ty }; 3737 Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic; 3738 Function *F = CGM.getIntrinsic(Int, Tys); 3739 return EmitNeonCall(F, Ops, "vcvt_n"); 3740 } 3741 case NEON::BI__builtin_neon_vcvt_n_s32_v: 3742 case NEON::BI__builtin_neon_vcvt_n_u32_v: 3743 case NEON::BI__builtin_neon_vcvt_n_s64_v: 3744 case NEON::BI__builtin_neon_vcvt_n_u64_v: 3745 case NEON::BI__builtin_neon_vcvtq_n_s32_v: 3746 case NEON::BI__builtin_neon_vcvtq_n_u32_v: 3747 case NEON::BI__builtin_neon_vcvtq_n_s64_v: 3748 case NEON::BI__builtin_neon_vcvtq_n_u64_v: { 3749 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 3750 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3751 return EmitNeonCall(F, Ops, "vcvt_n"); 3752 } 3753 case NEON::BI__builtin_neon_vcvt_s32_v: 3754 case NEON::BI__builtin_neon_vcvt_u32_v: 3755 case NEON::BI__builtin_neon_vcvt_s64_v: 3756 case NEON::BI__builtin_neon_vcvt_u64_v: 3757 case NEON::BI__builtin_neon_vcvtq_s32_v: 3758 case NEON::BI__builtin_neon_vcvtq_u32_v: 3759 case NEON::BI__builtin_neon_vcvtq_s64_v: 3760 case NEON::BI__builtin_neon_vcvtq_u64_v: { 3761 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 3762 return Usgn ? Builder.CreateFPToUI(Ops[0], Ty, "vcvt") 3763 : Builder.CreateFPToSI(Ops[0], Ty, "vcvt"); 3764 } 3765 case NEON::BI__builtin_neon_vcvta_s32_v: 3766 case NEON::BI__builtin_neon_vcvta_s64_v: 3767 case NEON::BI__builtin_neon_vcvta_u32_v: 3768 case NEON::BI__builtin_neon_vcvta_u64_v: 3769 case NEON::BI__builtin_neon_vcvtaq_s32_v: 3770 case NEON::BI__builtin_neon_vcvtaq_s64_v: 3771 case NEON::BI__builtin_neon_vcvtaq_u32_v: 3772 case NEON::BI__builtin_neon_vcvtaq_u64_v: 3773 case NEON::BI__builtin_neon_vcvtn_s32_v: 3774 case NEON::BI__builtin_neon_vcvtn_s64_v: 3775 case NEON::BI__builtin_neon_vcvtn_u32_v: 3776 case NEON::BI__builtin_neon_vcvtn_u64_v: 3777 case NEON::BI__builtin_neon_vcvtnq_s32_v: 3778 case NEON::BI__builtin_neon_vcvtnq_s64_v: 3779 case NEON::BI__builtin_neon_vcvtnq_u32_v: 3780 case NEON::BI__builtin_neon_vcvtnq_u64_v: 3781 case NEON::BI__builtin_neon_vcvtp_s32_v: 3782 case NEON::BI__builtin_neon_vcvtp_s64_v: 3783 case NEON::BI__builtin_neon_vcvtp_u32_v: 3784 case NEON::BI__builtin_neon_vcvtp_u64_v: 3785 case NEON::BI__builtin_neon_vcvtpq_s32_v: 3786 case NEON::BI__builtin_neon_vcvtpq_s64_v: 3787 case NEON::BI__builtin_neon_vcvtpq_u32_v: 3788 case NEON::BI__builtin_neon_vcvtpq_u64_v: 3789 case NEON::BI__builtin_neon_vcvtm_s32_v: 3790 case NEON::BI__builtin_neon_vcvtm_s64_v: 3791 case NEON::BI__builtin_neon_vcvtm_u32_v: 3792 case NEON::BI__builtin_neon_vcvtm_u64_v: 3793 case NEON::BI__builtin_neon_vcvtmq_s32_v: 3794 case NEON::BI__builtin_neon_vcvtmq_s64_v: 3795 case NEON::BI__builtin_neon_vcvtmq_u32_v: 3796 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 3797 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 3798 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, NameHint); 3799 } 3800 case NEON::BI__builtin_neon_vext_v: 3801 case NEON::BI__builtin_neon_vextq_v: { 3802 int CV = cast<ConstantInt>(Ops[2])->getSExtValue(); 3803 SmallVector<uint32_t, 16> Indices; 3804 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 3805 Indices.push_back(i+CV); 3806 3807 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3808 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3809 return Builder.CreateShuffleVector(Ops[0], Ops[1], Indices, "vext"); 3810 } 3811 case NEON::BI__builtin_neon_vfma_v: 3812 case NEON::BI__builtin_neon_vfmaq_v: { 3813 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 3814 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3815 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3816 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3817 3818 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 3819 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 3820 } 3821 case NEON::BI__builtin_neon_vld1_v: 3822 case NEON::BI__builtin_neon_vld1q_v: { 3823 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3824 Ops.push_back(getAlignmentValue32(PtrOp0)); 3825 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, "vld1"); 3826 } 3827 case NEON::BI__builtin_neon_vld2_v: 3828 case NEON::BI__builtin_neon_vld2q_v: 3829 case NEON::BI__builtin_neon_vld3_v: 3830 case NEON::BI__builtin_neon_vld3q_v: 3831 case NEON::BI__builtin_neon_vld4_v: 3832 case NEON::BI__builtin_neon_vld4q_v: { 3833 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3834 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3835 Value *Align = getAlignmentValue32(PtrOp1); 3836 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint); 3837 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3838 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3839 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3840 } 3841 case NEON::BI__builtin_neon_vld1_dup_v: 3842 case NEON::BI__builtin_neon_vld1q_dup_v: { 3843 Value *V = UndefValue::get(Ty); 3844 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 3845 PtrOp0 = Builder.CreateBitCast(PtrOp0, Ty); 3846 LoadInst *Ld = Builder.CreateLoad(PtrOp0); 3847 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 3848 Ops[0] = Builder.CreateInsertElement(V, Ld, CI); 3849 return EmitNeonSplat(Ops[0], CI); 3850 } 3851 case NEON::BI__builtin_neon_vld2_lane_v: 3852 case NEON::BI__builtin_neon_vld2q_lane_v: 3853 case NEON::BI__builtin_neon_vld3_lane_v: 3854 case NEON::BI__builtin_neon_vld3q_lane_v: 3855 case NEON::BI__builtin_neon_vld4_lane_v: 3856 case NEON::BI__builtin_neon_vld4q_lane_v: { 3857 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3858 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3859 for (unsigned I = 2; I < Ops.size() - 1; ++I) 3860 Ops[I] = Builder.CreateBitCast(Ops[I], Ty); 3861 Ops.push_back(getAlignmentValue32(PtrOp1)); 3862 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), NameHint); 3863 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3864 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3865 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3866 } 3867 case NEON::BI__builtin_neon_vmovl_v: { 3868 llvm::Type *DTy =llvm::VectorType::getTruncatedElementVectorType(VTy); 3869 Ops[0] = Builder.CreateBitCast(Ops[0], DTy); 3870 if (Usgn) 3871 return Builder.CreateZExt(Ops[0], Ty, "vmovl"); 3872 return Builder.CreateSExt(Ops[0], Ty, "vmovl"); 3873 } 3874 case NEON::BI__builtin_neon_vmovn_v: { 3875 llvm::Type *QTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3876 Ops[0] = Builder.CreateBitCast(Ops[0], QTy); 3877 return Builder.CreateTrunc(Ops[0], Ty, "vmovn"); 3878 } 3879 case NEON::BI__builtin_neon_vmull_v: 3880 // FIXME: the integer vmull operations could be emitted in terms of pure 3881 // LLVM IR (2 exts followed by a mul). Unfortunately LLVM has a habit of 3882 // hoisting the exts outside loops. Until global ISel comes along that can 3883 // see through such movement this leads to bad CodeGen. So we need an 3884 // intrinsic for now. 3885 Int = Usgn ? Intrinsic::arm_neon_vmullu : Intrinsic::arm_neon_vmulls; 3886 Int = Type.isPoly() ? (unsigned)Intrinsic::arm_neon_vmullp : Int; 3887 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 3888 case NEON::BI__builtin_neon_vpadal_v: 3889 case NEON::BI__builtin_neon_vpadalq_v: { 3890 // The source operand type has twice as many elements of half the size. 3891 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3892 llvm::Type *EltTy = 3893 llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3894 llvm::Type *NarrowTy = 3895 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3896 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3897 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, NameHint); 3898 } 3899 case NEON::BI__builtin_neon_vpaddl_v: 3900 case NEON::BI__builtin_neon_vpaddlq_v: { 3901 // The source operand type has twice as many elements of half the size. 3902 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3903 llvm::Type *EltTy = llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3904 llvm::Type *NarrowTy = 3905 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3906 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3907 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vpaddl"); 3908 } 3909 case NEON::BI__builtin_neon_vqdmlal_v: 3910 case NEON::BI__builtin_neon_vqdmlsl_v: { 3911 SmallVector<Value *, 2> MulOps(Ops.begin() + 1, Ops.end()); 3912 Ops[1] = 3913 EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), MulOps, "vqdmlal"); 3914 Ops.resize(2); 3915 return EmitNeonCall(CGM.getIntrinsic(AltLLVMIntrinsic, Ty), Ops, NameHint); 3916 } 3917 case NEON::BI__builtin_neon_vqshl_n_v: 3918 case NEON::BI__builtin_neon_vqshlq_n_v: 3919 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshl_n", 3920 1, false); 3921 case NEON::BI__builtin_neon_vqshlu_n_v: 3922 case NEON::BI__builtin_neon_vqshluq_n_v: 3923 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshlu_n", 3924 1, false); 3925 case NEON::BI__builtin_neon_vrecpe_v: 3926 case NEON::BI__builtin_neon_vrecpeq_v: 3927 case NEON::BI__builtin_neon_vrsqrte_v: 3928 case NEON::BI__builtin_neon_vrsqrteq_v: 3929 Int = Ty->isFPOrFPVectorTy() ? LLVMIntrinsic : AltLLVMIntrinsic; 3930 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint); 3931 3932 case NEON::BI__builtin_neon_vrshr_n_v: 3933 case NEON::BI__builtin_neon_vrshrq_n_v: 3934 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n", 3935 1, true); 3936 case NEON::BI__builtin_neon_vshl_n_v: 3937 case NEON::BI__builtin_neon_vshlq_n_v: 3938 Ops[1] = EmitNeonShiftVector(Ops[1], Ty, false); 3939 return Builder.CreateShl(Builder.CreateBitCast(Ops[0],Ty), Ops[1], 3940 "vshl_n"); 3941 case NEON::BI__builtin_neon_vshll_n_v: { 3942 llvm::Type *SrcTy = llvm::VectorType::getTruncatedElementVectorType(VTy); 3943 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3944 if (Usgn) 3945 Ops[0] = Builder.CreateZExt(Ops[0], VTy); 3946 else 3947 Ops[0] = Builder.CreateSExt(Ops[0], VTy); 3948 Ops[1] = EmitNeonShiftVector(Ops[1], VTy, false); 3949 return Builder.CreateShl(Ops[0], Ops[1], "vshll_n"); 3950 } 3951 case NEON::BI__builtin_neon_vshrn_n_v: { 3952 llvm::Type *SrcTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3953 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3954 Ops[1] = EmitNeonShiftVector(Ops[1], SrcTy, false); 3955 if (Usgn) 3956 Ops[0] = Builder.CreateLShr(Ops[0], Ops[1]); 3957 else 3958 Ops[0] = Builder.CreateAShr(Ops[0], Ops[1]); 3959 return Builder.CreateTrunc(Ops[0], Ty, "vshrn_n"); 3960 } 3961 case NEON::BI__builtin_neon_vshr_n_v: 3962 case NEON::BI__builtin_neon_vshrq_n_v: 3963 return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, Usgn, "vshr_n"); 3964 case NEON::BI__builtin_neon_vst1_v: 3965 case NEON::BI__builtin_neon_vst1q_v: 3966 case NEON::BI__builtin_neon_vst2_v: 3967 case NEON::BI__builtin_neon_vst2q_v: 3968 case NEON::BI__builtin_neon_vst3_v: 3969 case NEON::BI__builtin_neon_vst3q_v: 3970 case NEON::BI__builtin_neon_vst4_v: 3971 case NEON::BI__builtin_neon_vst4q_v: 3972 case NEON::BI__builtin_neon_vst2_lane_v: 3973 case NEON::BI__builtin_neon_vst2q_lane_v: 3974 case NEON::BI__builtin_neon_vst3_lane_v: 3975 case NEON::BI__builtin_neon_vst3q_lane_v: 3976 case NEON::BI__builtin_neon_vst4_lane_v: 3977 case NEON::BI__builtin_neon_vst4q_lane_v: { 3978 llvm::Type *Tys[] = {Int8PtrTy, Ty}; 3979 Ops.push_back(getAlignmentValue32(PtrOp0)); 3980 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 3981 } 3982 case NEON::BI__builtin_neon_vsubhn_v: { 3983 llvm::VectorType *SrcTy = 3984 llvm::VectorType::getExtendedElementVectorType(VTy); 3985 3986 // %sum = add <4 x i32> %lhs, %rhs 3987 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3988 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 3989 Ops[0] = Builder.CreateSub(Ops[0], Ops[1], "vsubhn"); 3990 3991 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 3992 Constant *ShiftAmt = 3993 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 3994 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vsubhn"); 3995 3996 // %res = trunc <4 x i32> %high to <4 x i16> 3997 return Builder.CreateTrunc(Ops[0], VTy, "vsubhn"); 3998 } 3999 case NEON::BI__builtin_neon_vtrn_v: 4000 case NEON::BI__builtin_neon_vtrnq_v: { 4001 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4002 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4003 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4004 Value *SV = nullptr; 4005 4006 for (unsigned vi = 0; vi != 2; ++vi) { 4007 SmallVector<uint32_t, 16> Indices; 4008 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 4009 Indices.push_back(i+vi); 4010 Indices.push_back(i+e+vi); 4011 } 4012 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4013 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 4014 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4015 } 4016 return SV; 4017 } 4018 case NEON::BI__builtin_neon_vtst_v: 4019 case NEON::BI__builtin_neon_vtstq_v: { 4020 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4021 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4022 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 4023 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 4024 ConstantAggregateZero::get(Ty)); 4025 return Builder.CreateSExt(Ops[0], Ty, "vtst"); 4026 } 4027 case NEON::BI__builtin_neon_vuzp_v: 4028 case NEON::BI__builtin_neon_vuzpq_v: { 4029 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4030 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4031 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4032 Value *SV = nullptr; 4033 4034 for (unsigned vi = 0; vi != 2; ++vi) { 4035 SmallVector<uint32_t, 16> Indices; 4036 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 4037 Indices.push_back(2*i+vi); 4038 4039 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4040 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 4041 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4042 } 4043 return SV; 4044 } 4045 case NEON::BI__builtin_neon_vzip_v: 4046 case NEON::BI__builtin_neon_vzipq_v: { 4047 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4048 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4049 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4050 Value *SV = nullptr; 4051 4052 for (unsigned vi = 0; vi != 2; ++vi) { 4053 SmallVector<uint32_t, 16> Indices; 4054 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 4055 Indices.push_back((i + vi*e) >> 1); 4056 Indices.push_back(((i + vi*e) >> 1)+e); 4057 } 4058 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4059 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 4060 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4061 } 4062 return SV; 4063 } 4064 } 4065 4066 assert(Int && "Expected valid intrinsic number"); 4067 4068 // Determine the type(s) of this overloaded AArch64 intrinsic. 4069 Function *F = LookupNeonLLVMIntrinsic(Int, Modifier, Ty, E); 4070 4071 Value *Result = EmitNeonCall(F, Ops, NameHint); 4072 llvm::Type *ResultType = ConvertType(E->getType()); 4073 // AArch64 intrinsic one-element vector type cast to 4074 // scalar type expected by the builtin 4075 return Builder.CreateBitCast(Result, ResultType, NameHint); 4076 } 4077 4078 Value *CodeGenFunction::EmitAArch64CompareBuiltinExpr( 4079 Value *Op, llvm::Type *Ty, const CmpInst::Predicate Fp, 4080 const CmpInst::Predicate Ip, const Twine &Name) { 4081 llvm::Type *OTy = Op->getType(); 4082 4083 // FIXME: this is utterly horrific. We should not be looking at previous 4084 // codegen context to find out what needs doing. Unfortunately TableGen 4085 // currently gives us exactly the same calls for vceqz_f32 and vceqz_s32 4086 // (etc). 4087 if (BitCastInst *BI = dyn_cast<BitCastInst>(Op)) 4088 OTy = BI->getOperand(0)->getType(); 4089 4090 Op = Builder.CreateBitCast(Op, OTy); 4091 if (OTy->getScalarType()->isFloatingPointTy()) { 4092 Op = Builder.CreateFCmp(Fp, Op, Constant::getNullValue(OTy)); 4093 } else { 4094 Op = Builder.CreateICmp(Ip, Op, Constant::getNullValue(OTy)); 4095 } 4096 return Builder.CreateSExt(Op, Ty, Name); 4097 } 4098 4099 static Value *packTBLDVectorList(CodeGenFunction &CGF, ArrayRef<Value *> Ops, 4100 Value *ExtOp, Value *IndexOp, 4101 llvm::Type *ResTy, unsigned IntID, 4102 const char *Name) { 4103 SmallVector<Value *, 2> TblOps; 4104 if (ExtOp) 4105 TblOps.push_back(ExtOp); 4106 4107 // Build a vector containing sequential number like (0, 1, 2, ..., 15) 4108 SmallVector<uint32_t, 16> Indices; 4109 llvm::VectorType *TblTy = cast<llvm::VectorType>(Ops[0]->getType()); 4110 for (unsigned i = 0, e = TblTy->getNumElements(); i != e; ++i) { 4111 Indices.push_back(2*i); 4112 Indices.push_back(2*i+1); 4113 } 4114 4115 int PairPos = 0, End = Ops.size() - 1; 4116 while (PairPos < End) { 4117 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 4118 Ops[PairPos+1], Indices, 4119 Name)); 4120 PairPos += 2; 4121 } 4122 4123 // If there's an odd number of 64-bit lookup table, fill the high 64-bit 4124 // of the 128-bit lookup table with zero. 4125 if (PairPos == End) { 4126 Value *ZeroTbl = ConstantAggregateZero::get(TblTy); 4127 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 4128 ZeroTbl, Indices, Name)); 4129 } 4130 4131 Function *TblF; 4132 TblOps.push_back(IndexOp); 4133 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); 4134 4135 return CGF.EmitNeonCall(TblF, TblOps, Name); 4136 } 4137 4138 Value *CodeGenFunction::GetValueForARMHint(unsigned BuiltinID) { 4139 unsigned Value; 4140 switch (BuiltinID) { 4141 default: 4142 return nullptr; 4143 case ARM::BI__builtin_arm_nop: 4144 Value = 0; 4145 break; 4146 case ARM::BI__builtin_arm_yield: 4147 case ARM::BI__yield: 4148 Value = 1; 4149 break; 4150 case ARM::BI__builtin_arm_wfe: 4151 case ARM::BI__wfe: 4152 Value = 2; 4153 break; 4154 case ARM::BI__builtin_arm_wfi: 4155 case ARM::BI__wfi: 4156 Value = 3; 4157 break; 4158 case ARM::BI__builtin_arm_sev: 4159 case ARM::BI__sev: 4160 Value = 4; 4161 break; 4162 case ARM::BI__builtin_arm_sevl: 4163 case ARM::BI__sevl: 4164 Value = 5; 4165 break; 4166 } 4167 4168 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_hint), 4169 llvm::ConstantInt::get(Int32Ty, Value)); 4170 } 4171 4172 // Generates the IR for the read/write special register builtin, 4173 // ValueType is the type of the value that is to be written or read, 4174 // RegisterType is the type of the register being written to or read from. 4175 static Value *EmitSpecialRegisterBuiltin(CodeGenFunction &CGF, 4176 const CallExpr *E, 4177 llvm::Type *RegisterType, 4178 llvm::Type *ValueType, 4179 bool IsRead, 4180 StringRef SysReg = "") { 4181 // write and register intrinsics only support 32 and 64 bit operations. 4182 assert((RegisterType->isIntegerTy(32) || RegisterType->isIntegerTy(64)) 4183 && "Unsupported size for register."); 4184 4185 CodeGen::CGBuilderTy &Builder = CGF.Builder; 4186 CodeGen::CodeGenModule &CGM = CGF.CGM; 4187 LLVMContext &Context = CGM.getLLVMContext(); 4188 4189 if (SysReg.empty()) { 4190 const Expr *SysRegStrExpr = E->getArg(0)->IgnoreParenCasts(); 4191 SysReg = cast<StringLiteral>(SysRegStrExpr)->getString(); 4192 } 4193 4194 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysReg) }; 4195 llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); 4196 llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); 4197 4198 llvm::Type *Types[] = { RegisterType }; 4199 4200 bool MixedTypes = RegisterType->isIntegerTy(64) && ValueType->isIntegerTy(32); 4201 assert(!(RegisterType->isIntegerTy(32) && ValueType->isIntegerTy(64)) 4202 && "Can't fit 64-bit value in 32-bit register"); 4203 4204 if (IsRead) { 4205 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::read_register, Types); 4206 llvm::Value *Call = Builder.CreateCall(F, Metadata); 4207 4208 if (MixedTypes) 4209 // Read into 64 bit register and then truncate result to 32 bit. 4210 return Builder.CreateTrunc(Call, ValueType); 4211 4212 if (ValueType->isPointerTy()) 4213 // Have i32/i64 result (Call) but want to return a VoidPtrTy (i8*). 4214 return Builder.CreateIntToPtr(Call, ValueType); 4215 4216 return Call; 4217 } 4218 4219 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types); 4220 llvm::Value *ArgValue = CGF.EmitScalarExpr(E->getArg(1)); 4221 if (MixedTypes) { 4222 // Extend 32 bit write value to 64 bit to pass to write. 4223 ArgValue = Builder.CreateZExt(ArgValue, RegisterType); 4224 return Builder.CreateCall(F, { Metadata, ArgValue }); 4225 } 4226 4227 if (ValueType->isPointerTy()) { 4228 // Have VoidPtrTy ArgValue but want to return an i32/i64. 4229 ArgValue = Builder.CreatePtrToInt(ArgValue, RegisterType); 4230 return Builder.CreateCall(F, { Metadata, ArgValue }); 4231 } 4232 4233 return Builder.CreateCall(F, { Metadata, ArgValue }); 4234 } 4235 4236 /// Return true if BuiltinID is an overloaded Neon intrinsic with an extra 4237 /// argument that specifies the vector type. 4238 static bool HasExtraNeonArgument(unsigned BuiltinID) { 4239 switch (BuiltinID) { 4240 default: break; 4241 case NEON::BI__builtin_neon_vget_lane_i8: 4242 case NEON::BI__builtin_neon_vget_lane_i16: 4243 case NEON::BI__builtin_neon_vget_lane_i32: 4244 case NEON::BI__builtin_neon_vget_lane_i64: 4245 case NEON::BI__builtin_neon_vget_lane_f32: 4246 case NEON::BI__builtin_neon_vgetq_lane_i8: 4247 case NEON::BI__builtin_neon_vgetq_lane_i16: 4248 case NEON::BI__builtin_neon_vgetq_lane_i32: 4249 case NEON::BI__builtin_neon_vgetq_lane_i64: 4250 case NEON::BI__builtin_neon_vgetq_lane_f32: 4251 case NEON::BI__builtin_neon_vset_lane_i8: 4252 case NEON::BI__builtin_neon_vset_lane_i16: 4253 case NEON::BI__builtin_neon_vset_lane_i32: 4254 case NEON::BI__builtin_neon_vset_lane_i64: 4255 case NEON::BI__builtin_neon_vset_lane_f32: 4256 case NEON::BI__builtin_neon_vsetq_lane_i8: 4257 case NEON::BI__builtin_neon_vsetq_lane_i16: 4258 case NEON::BI__builtin_neon_vsetq_lane_i32: 4259 case NEON::BI__builtin_neon_vsetq_lane_i64: 4260 case NEON::BI__builtin_neon_vsetq_lane_f32: 4261 case NEON::BI__builtin_neon_vsha1h_u32: 4262 case NEON::BI__builtin_neon_vsha1cq_u32: 4263 case NEON::BI__builtin_neon_vsha1pq_u32: 4264 case NEON::BI__builtin_neon_vsha1mq_u32: 4265 case ARM::BI_MoveToCoprocessor: 4266 case ARM::BI_MoveToCoprocessor2: 4267 return false; 4268 } 4269 return true; 4270 } 4271 4272 Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, 4273 const CallExpr *E) { 4274 if (auto Hint = GetValueForARMHint(BuiltinID)) 4275 return Hint; 4276 4277 if (BuiltinID == ARM::BI__emit) { 4278 bool IsThumb = getTarget().getTriple().getArch() == llvm::Triple::thumb; 4279 llvm::FunctionType *FTy = 4280 llvm::FunctionType::get(VoidTy, /*Variadic=*/false); 4281 4282 APSInt Value; 4283 if (!E->getArg(0)->EvaluateAsInt(Value, CGM.getContext())) 4284 llvm_unreachable("Sema will ensure that the parameter is constant"); 4285 4286 uint64_t ZExtValue = Value.zextOrTrunc(IsThumb ? 16 : 32).getZExtValue(); 4287 4288 llvm::InlineAsm *Emit = 4289 IsThumb ? InlineAsm::get(FTy, ".inst.n 0x" + utohexstr(ZExtValue), "", 4290 /*SideEffects=*/true) 4291 : InlineAsm::get(FTy, ".inst 0x" + utohexstr(ZExtValue), "", 4292 /*SideEffects=*/true); 4293 4294 return Builder.CreateCall(Emit); 4295 } 4296 4297 if (BuiltinID == ARM::BI__builtin_arm_dbg) { 4298 Value *Option = EmitScalarExpr(E->getArg(0)); 4299 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_dbg), Option); 4300 } 4301 4302 if (BuiltinID == ARM::BI__builtin_arm_prefetch) { 4303 Value *Address = EmitScalarExpr(E->getArg(0)); 4304 Value *RW = EmitScalarExpr(E->getArg(1)); 4305 Value *IsData = EmitScalarExpr(E->getArg(2)); 4306 4307 // Locality is not supported on ARM target 4308 Value *Locality = llvm::ConstantInt::get(Int32Ty, 3); 4309 4310 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 4311 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 4312 } 4313 4314 if (BuiltinID == ARM::BI__builtin_arm_rbit) { 4315 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_rbit), 4316 EmitScalarExpr(E->getArg(0)), 4317 "rbit"); 4318 } 4319 4320 if (BuiltinID == ARM::BI__clear_cache) { 4321 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 4322 const FunctionDecl *FD = E->getDirectCallee(); 4323 Value *Ops[2]; 4324 for (unsigned i = 0; i < 2; i++) 4325 Ops[i] = EmitScalarExpr(E->getArg(i)); 4326 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 4327 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 4328 StringRef Name = FD->getName(); 4329 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 4330 } 4331 4332 if (BuiltinID == ARM::BI__builtin_arm_mcrr || 4333 BuiltinID == ARM::BI__builtin_arm_mcrr2) { 4334 Function *F; 4335 4336 switch (BuiltinID) { 4337 default: llvm_unreachable("unexpected builtin"); 4338 case ARM::BI__builtin_arm_mcrr: 4339 F = CGM.getIntrinsic(Intrinsic::arm_mcrr); 4340 break; 4341 case ARM::BI__builtin_arm_mcrr2: 4342 F = CGM.getIntrinsic(Intrinsic::arm_mcrr2); 4343 break; 4344 } 4345 4346 // MCRR{2} instruction has 5 operands but 4347 // the intrinsic has 4 because Rt and Rt2 4348 // are represented as a single unsigned 64 4349 // bit integer in the intrinsic definition 4350 // but internally it's represented as 2 32 4351 // bit integers. 4352 4353 Value *Coproc = EmitScalarExpr(E->getArg(0)); 4354 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 4355 Value *RtAndRt2 = EmitScalarExpr(E->getArg(2)); 4356 Value *CRm = EmitScalarExpr(E->getArg(3)); 4357 4358 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 4359 Value *Rt = Builder.CreateTruncOrBitCast(RtAndRt2, Int32Ty); 4360 Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); 4361 Rt2 = Builder.CreateTruncOrBitCast(Rt2, Int32Ty); 4362 4363 return Builder.CreateCall(F, {Coproc, Opc1, Rt, Rt2, CRm}); 4364 } 4365 4366 if (BuiltinID == ARM::BI__builtin_arm_mrrc || 4367 BuiltinID == ARM::BI__builtin_arm_mrrc2) { 4368 Function *F; 4369 4370 switch (BuiltinID) { 4371 default: llvm_unreachable("unexpected builtin"); 4372 case ARM::BI__builtin_arm_mrrc: 4373 F = CGM.getIntrinsic(Intrinsic::arm_mrrc); 4374 break; 4375 case ARM::BI__builtin_arm_mrrc2: 4376 F = CGM.getIntrinsic(Intrinsic::arm_mrrc2); 4377 break; 4378 } 4379 4380 Value *Coproc = EmitScalarExpr(E->getArg(0)); 4381 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 4382 Value *CRm = EmitScalarExpr(E->getArg(2)); 4383 Value *RtAndRt2 = Builder.CreateCall(F, {Coproc, Opc1, CRm}); 4384 4385 // Returns an unsigned 64 bit integer, represented 4386 // as two 32 bit integers. 4387 4388 Value *Rt = Builder.CreateExtractValue(RtAndRt2, 1); 4389 Value *Rt1 = Builder.CreateExtractValue(RtAndRt2, 0); 4390 Rt = Builder.CreateZExt(Rt, Int64Ty); 4391 Rt1 = Builder.CreateZExt(Rt1, Int64Ty); 4392 4393 Value *ShiftCast = llvm::ConstantInt::get(Int64Ty, 32); 4394 RtAndRt2 = Builder.CreateShl(Rt, ShiftCast, "shl", true); 4395 RtAndRt2 = Builder.CreateOr(RtAndRt2, Rt1); 4396 4397 return Builder.CreateBitCast(RtAndRt2, ConvertType(E->getType())); 4398 } 4399 4400 if (BuiltinID == ARM::BI__builtin_arm_ldrexd || 4401 ((BuiltinID == ARM::BI__builtin_arm_ldrex || 4402 BuiltinID == ARM::BI__builtin_arm_ldaex) && 4403 getContext().getTypeSize(E->getType()) == 64) || 4404 BuiltinID == ARM::BI__ldrexd) { 4405 Function *F; 4406 4407 switch (BuiltinID) { 4408 default: llvm_unreachable("unexpected builtin"); 4409 case ARM::BI__builtin_arm_ldaex: 4410 F = CGM.getIntrinsic(Intrinsic::arm_ldaexd); 4411 break; 4412 case ARM::BI__builtin_arm_ldrexd: 4413 case ARM::BI__builtin_arm_ldrex: 4414 case ARM::BI__ldrexd: 4415 F = CGM.getIntrinsic(Intrinsic::arm_ldrexd); 4416 break; 4417 } 4418 4419 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 4420 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 4421 "ldrexd"); 4422 4423 Value *Val0 = Builder.CreateExtractValue(Val, 1); 4424 Value *Val1 = Builder.CreateExtractValue(Val, 0); 4425 Val0 = Builder.CreateZExt(Val0, Int64Ty); 4426 Val1 = Builder.CreateZExt(Val1, Int64Ty); 4427 4428 Value *ShiftCst = llvm::ConstantInt::get(Int64Ty, 32); 4429 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 4430 Val = Builder.CreateOr(Val, Val1); 4431 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 4432 } 4433 4434 if (BuiltinID == ARM::BI__builtin_arm_ldrex || 4435 BuiltinID == ARM::BI__builtin_arm_ldaex) { 4436 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 4437 4438 QualType Ty = E->getType(); 4439 llvm::Type *RealResTy = ConvertType(Ty); 4440 llvm::Type *IntResTy = llvm::IntegerType::get(getLLVMContext(), 4441 getContext().getTypeSize(Ty)); 4442 LoadAddr = Builder.CreateBitCast(LoadAddr, IntResTy->getPointerTo()); 4443 4444 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_ldaex 4445 ? Intrinsic::arm_ldaex 4446 : Intrinsic::arm_ldrex, 4447 LoadAddr->getType()); 4448 Value *Val = Builder.CreateCall(F, LoadAddr, "ldrex"); 4449 4450 if (RealResTy->isPointerTy()) 4451 return Builder.CreateIntToPtr(Val, RealResTy); 4452 else { 4453 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 4454 return Builder.CreateBitCast(Val, RealResTy); 4455 } 4456 } 4457 4458 if (BuiltinID == ARM::BI__builtin_arm_strexd || 4459 ((BuiltinID == ARM::BI__builtin_arm_stlex || 4460 BuiltinID == ARM::BI__builtin_arm_strex) && 4461 getContext().getTypeSize(E->getArg(0)->getType()) == 64)) { 4462 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 4463 ? Intrinsic::arm_stlexd 4464 : Intrinsic::arm_strexd); 4465 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, nullptr); 4466 4467 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 4468 Value *Val = EmitScalarExpr(E->getArg(0)); 4469 Builder.CreateStore(Val, Tmp); 4470 4471 Address LdPtr = Builder.CreateBitCast(Tmp,llvm::PointerType::getUnqual(STy)); 4472 Val = Builder.CreateLoad(LdPtr); 4473 4474 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 4475 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 4476 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), Int8PtrTy); 4477 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "strexd"); 4478 } 4479 4480 if (BuiltinID == ARM::BI__builtin_arm_strex || 4481 BuiltinID == ARM::BI__builtin_arm_stlex) { 4482 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 4483 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 4484 4485 QualType Ty = E->getArg(0)->getType(); 4486 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 4487 getContext().getTypeSize(Ty)); 4488 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 4489 4490 if (StoreVal->getType()->isPointerTy()) 4491 StoreVal = Builder.CreatePtrToInt(StoreVal, Int32Ty); 4492 else { 4493 StoreVal = Builder.CreateBitCast(StoreVal, StoreTy); 4494 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int32Ty); 4495 } 4496 4497 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 4498 ? Intrinsic::arm_stlex 4499 : Intrinsic::arm_strex, 4500 StoreAddr->getType()); 4501 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "strex"); 4502 } 4503 4504 switch (BuiltinID) { 4505 case ARM::BI__iso_volatile_load8: 4506 case ARM::BI__iso_volatile_load16: 4507 case ARM::BI__iso_volatile_load32: 4508 case ARM::BI__iso_volatile_load64: { 4509 Value *Ptr = EmitScalarExpr(E->getArg(0)); 4510 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 4511 CharUnits LoadSize = getContext().getTypeSizeInChars(ElTy); 4512 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 4513 LoadSize.getQuantity() * 8); 4514 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 4515 llvm::LoadInst *Load = 4516 Builder.CreateAlignedLoad(Ptr, LoadSize); 4517 Load->setVolatile(true); 4518 return Load; 4519 } 4520 case ARM::BI__iso_volatile_store8: 4521 case ARM::BI__iso_volatile_store16: 4522 case ARM::BI__iso_volatile_store32: 4523 case ARM::BI__iso_volatile_store64: { 4524 Value *Ptr = EmitScalarExpr(E->getArg(0)); 4525 Value *Value = EmitScalarExpr(E->getArg(1)); 4526 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 4527 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 4528 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 4529 StoreSize.getQuantity() * 8); 4530 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 4531 llvm::StoreInst *Store = 4532 Builder.CreateAlignedStore(Value, Ptr, 4533 StoreSize); 4534 Store->setVolatile(true); 4535 return Store; 4536 } 4537 } 4538 4539 if (BuiltinID == ARM::BI__builtin_arm_clrex) { 4540 Function *F = CGM.getIntrinsic(Intrinsic::arm_clrex); 4541 return Builder.CreateCall(F); 4542 } 4543 4544 // CRC32 4545 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 4546 switch (BuiltinID) { 4547 case ARM::BI__builtin_arm_crc32b: 4548 CRCIntrinsicID = Intrinsic::arm_crc32b; break; 4549 case ARM::BI__builtin_arm_crc32cb: 4550 CRCIntrinsicID = Intrinsic::arm_crc32cb; break; 4551 case ARM::BI__builtin_arm_crc32h: 4552 CRCIntrinsicID = Intrinsic::arm_crc32h; break; 4553 case ARM::BI__builtin_arm_crc32ch: 4554 CRCIntrinsicID = Intrinsic::arm_crc32ch; break; 4555 case ARM::BI__builtin_arm_crc32w: 4556 case ARM::BI__builtin_arm_crc32d: 4557 CRCIntrinsicID = Intrinsic::arm_crc32w; break; 4558 case ARM::BI__builtin_arm_crc32cw: 4559 case ARM::BI__builtin_arm_crc32cd: 4560 CRCIntrinsicID = Intrinsic::arm_crc32cw; break; 4561 } 4562 4563 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 4564 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 4565 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 4566 4567 // crc32{c,}d intrinsics are implemnted as two calls to crc32{c,}w 4568 // intrinsics, hence we need different codegen for these cases. 4569 if (BuiltinID == ARM::BI__builtin_arm_crc32d || 4570 BuiltinID == ARM::BI__builtin_arm_crc32cd) { 4571 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 4572 Value *Arg1a = Builder.CreateTruncOrBitCast(Arg1, Int32Ty); 4573 Value *Arg1b = Builder.CreateLShr(Arg1, C1); 4574 Arg1b = Builder.CreateTruncOrBitCast(Arg1b, Int32Ty); 4575 4576 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 4577 Value *Res = Builder.CreateCall(F, {Arg0, Arg1a}); 4578 return Builder.CreateCall(F, {Res, Arg1b}); 4579 } else { 4580 Arg1 = Builder.CreateZExtOrBitCast(Arg1, Int32Ty); 4581 4582 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 4583 return Builder.CreateCall(F, {Arg0, Arg1}); 4584 } 4585 } 4586 4587 if (BuiltinID == ARM::BI__builtin_arm_rsr || 4588 BuiltinID == ARM::BI__builtin_arm_rsr64 || 4589 BuiltinID == ARM::BI__builtin_arm_rsrp || 4590 BuiltinID == ARM::BI__builtin_arm_wsr || 4591 BuiltinID == ARM::BI__builtin_arm_wsr64 || 4592 BuiltinID == ARM::BI__builtin_arm_wsrp) { 4593 4594 bool IsRead = BuiltinID == ARM::BI__builtin_arm_rsr || 4595 BuiltinID == ARM::BI__builtin_arm_rsr64 || 4596 BuiltinID == ARM::BI__builtin_arm_rsrp; 4597 4598 bool IsPointerBuiltin = BuiltinID == ARM::BI__builtin_arm_rsrp || 4599 BuiltinID == ARM::BI__builtin_arm_wsrp; 4600 4601 bool Is64Bit = BuiltinID == ARM::BI__builtin_arm_rsr64 || 4602 BuiltinID == ARM::BI__builtin_arm_wsr64; 4603 4604 llvm::Type *ValueType; 4605 llvm::Type *RegisterType; 4606 if (IsPointerBuiltin) { 4607 ValueType = VoidPtrTy; 4608 RegisterType = Int32Ty; 4609 } else if (Is64Bit) { 4610 ValueType = RegisterType = Int64Ty; 4611 } else { 4612 ValueType = RegisterType = Int32Ty; 4613 } 4614 4615 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 4616 } 4617 4618 // Find out if any arguments are required to be integer constant 4619 // expressions. 4620 unsigned ICEArguments = 0; 4621 ASTContext::GetBuiltinTypeError Error; 4622 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 4623 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 4624 4625 auto getAlignmentValue32 = [&](Address addr) -> Value* { 4626 return Builder.getInt32(addr.getAlignment().getQuantity()); 4627 }; 4628 4629 Address PtrOp0 = Address::invalid(); 4630 Address PtrOp1 = Address::invalid(); 4631 SmallVector<Value*, 4> Ops; 4632 bool HasExtraArg = HasExtraNeonArgument(BuiltinID); 4633 unsigned NumArgs = E->getNumArgs() - (HasExtraArg ? 1 : 0); 4634 for (unsigned i = 0, e = NumArgs; i != e; i++) { 4635 if (i == 0) { 4636 switch (BuiltinID) { 4637 case NEON::BI__builtin_neon_vld1_v: 4638 case NEON::BI__builtin_neon_vld1q_v: 4639 case NEON::BI__builtin_neon_vld1q_lane_v: 4640 case NEON::BI__builtin_neon_vld1_lane_v: 4641 case NEON::BI__builtin_neon_vld1_dup_v: 4642 case NEON::BI__builtin_neon_vld1q_dup_v: 4643 case NEON::BI__builtin_neon_vst1_v: 4644 case NEON::BI__builtin_neon_vst1q_v: 4645 case NEON::BI__builtin_neon_vst1q_lane_v: 4646 case NEON::BI__builtin_neon_vst1_lane_v: 4647 case NEON::BI__builtin_neon_vst2_v: 4648 case NEON::BI__builtin_neon_vst2q_v: 4649 case NEON::BI__builtin_neon_vst2_lane_v: 4650 case NEON::BI__builtin_neon_vst2q_lane_v: 4651 case NEON::BI__builtin_neon_vst3_v: 4652 case NEON::BI__builtin_neon_vst3q_v: 4653 case NEON::BI__builtin_neon_vst3_lane_v: 4654 case NEON::BI__builtin_neon_vst3q_lane_v: 4655 case NEON::BI__builtin_neon_vst4_v: 4656 case NEON::BI__builtin_neon_vst4q_v: 4657 case NEON::BI__builtin_neon_vst4_lane_v: 4658 case NEON::BI__builtin_neon_vst4q_lane_v: 4659 // Get the alignment for the argument in addition to the value; 4660 // we'll use it later. 4661 PtrOp0 = EmitPointerWithAlignment(E->getArg(0)); 4662 Ops.push_back(PtrOp0.getPointer()); 4663 continue; 4664 } 4665 } 4666 if (i == 1) { 4667 switch (BuiltinID) { 4668 case NEON::BI__builtin_neon_vld2_v: 4669 case NEON::BI__builtin_neon_vld2q_v: 4670 case NEON::BI__builtin_neon_vld3_v: 4671 case NEON::BI__builtin_neon_vld3q_v: 4672 case NEON::BI__builtin_neon_vld4_v: 4673 case NEON::BI__builtin_neon_vld4q_v: 4674 case NEON::BI__builtin_neon_vld2_lane_v: 4675 case NEON::BI__builtin_neon_vld2q_lane_v: 4676 case NEON::BI__builtin_neon_vld3_lane_v: 4677 case NEON::BI__builtin_neon_vld3q_lane_v: 4678 case NEON::BI__builtin_neon_vld4_lane_v: 4679 case NEON::BI__builtin_neon_vld4q_lane_v: 4680 case NEON::BI__builtin_neon_vld2_dup_v: 4681 case NEON::BI__builtin_neon_vld3_dup_v: 4682 case NEON::BI__builtin_neon_vld4_dup_v: 4683 // Get the alignment for the argument in addition to the value; 4684 // we'll use it later. 4685 PtrOp1 = EmitPointerWithAlignment(E->getArg(1)); 4686 Ops.push_back(PtrOp1.getPointer()); 4687 continue; 4688 } 4689 } 4690 4691 if ((ICEArguments & (1 << i)) == 0) { 4692 Ops.push_back(EmitScalarExpr(E->getArg(i))); 4693 } else { 4694 // If this is required to be a constant, constant fold it so that we know 4695 // that the generated intrinsic gets a ConstantInt. 4696 llvm::APSInt Result; 4697 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 4698 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 4699 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 4700 } 4701 } 4702 4703 switch (BuiltinID) { 4704 default: break; 4705 4706 case NEON::BI__builtin_neon_vget_lane_i8: 4707 case NEON::BI__builtin_neon_vget_lane_i16: 4708 case NEON::BI__builtin_neon_vget_lane_i32: 4709 case NEON::BI__builtin_neon_vget_lane_i64: 4710 case NEON::BI__builtin_neon_vget_lane_f32: 4711 case NEON::BI__builtin_neon_vgetq_lane_i8: 4712 case NEON::BI__builtin_neon_vgetq_lane_i16: 4713 case NEON::BI__builtin_neon_vgetq_lane_i32: 4714 case NEON::BI__builtin_neon_vgetq_lane_i64: 4715 case NEON::BI__builtin_neon_vgetq_lane_f32: 4716 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane"); 4717 4718 case NEON::BI__builtin_neon_vset_lane_i8: 4719 case NEON::BI__builtin_neon_vset_lane_i16: 4720 case NEON::BI__builtin_neon_vset_lane_i32: 4721 case NEON::BI__builtin_neon_vset_lane_i64: 4722 case NEON::BI__builtin_neon_vset_lane_f32: 4723 case NEON::BI__builtin_neon_vsetq_lane_i8: 4724 case NEON::BI__builtin_neon_vsetq_lane_i16: 4725 case NEON::BI__builtin_neon_vsetq_lane_i32: 4726 case NEON::BI__builtin_neon_vsetq_lane_i64: 4727 case NEON::BI__builtin_neon_vsetq_lane_f32: 4728 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4729 4730 case NEON::BI__builtin_neon_vsha1h_u32: 4731 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1h), Ops, 4732 "vsha1h"); 4733 case NEON::BI__builtin_neon_vsha1cq_u32: 4734 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1c), Ops, 4735 "vsha1h"); 4736 case NEON::BI__builtin_neon_vsha1pq_u32: 4737 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1p), Ops, 4738 "vsha1h"); 4739 case NEON::BI__builtin_neon_vsha1mq_u32: 4740 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1m), Ops, 4741 "vsha1h"); 4742 4743 // The ARM _MoveToCoprocessor builtins put the input register value as 4744 // the first argument, but the LLVM intrinsic expects it as the third one. 4745 case ARM::BI_MoveToCoprocessor: 4746 case ARM::BI_MoveToCoprocessor2: { 4747 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI_MoveToCoprocessor ? 4748 Intrinsic::arm_mcr : Intrinsic::arm_mcr2); 4749 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0], 4750 Ops[3], Ops[4], Ops[5]}); 4751 } 4752 case ARM::BI_BitScanForward: 4753 case ARM::BI_BitScanForward64: 4754 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 4755 case ARM::BI_BitScanReverse: 4756 case ARM::BI_BitScanReverse64: 4757 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 4758 4759 case ARM::BI_InterlockedAnd64: 4760 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 4761 case ARM::BI_InterlockedExchange64: 4762 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 4763 case ARM::BI_InterlockedExchangeAdd64: 4764 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 4765 case ARM::BI_InterlockedExchangeSub64: 4766 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 4767 case ARM::BI_InterlockedOr64: 4768 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 4769 case ARM::BI_InterlockedXor64: 4770 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 4771 case ARM::BI_InterlockedDecrement64: 4772 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 4773 case ARM::BI_InterlockedIncrement64: 4774 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 4775 } 4776 4777 // Get the last argument, which specifies the vector type. 4778 assert(HasExtraArg); 4779 llvm::APSInt Result; 4780 const Expr *Arg = E->getArg(E->getNumArgs()-1); 4781 if (!Arg->isIntegerConstantExpr(Result, getContext())) 4782 return nullptr; 4783 4784 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f || 4785 BuiltinID == ARM::BI__builtin_arm_vcvtr_d) { 4786 // Determine the overloaded type of this builtin. 4787 llvm::Type *Ty; 4788 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f) 4789 Ty = FloatTy; 4790 else 4791 Ty = DoubleTy; 4792 4793 // Determine whether this is an unsigned conversion or not. 4794 bool usgn = Result.getZExtValue() == 1; 4795 unsigned Int = usgn ? Intrinsic::arm_vcvtru : Intrinsic::arm_vcvtr; 4796 4797 // Call the appropriate intrinsic. 4798 Function *F = CGM.getIntrinsic(Int, Ty); 4799 return Builder.CreateCall(F, Ops, "vcvtr"); 4800 } 4801 4802 // Determine the type of this overloaded NEON intrinsic. 4803 NeonTypeFlags Type(Result.getZExtValue()); 4804 bool usgn = Type.isUnsigned(); 4805 bool rightShift = false; 4806 4807 llvm::VectorType *VTy = GetNeonType(this, Type); 4808 llvm::Type *Ty = VTy; 4809 if (!Ty) 4810 return nullptr; 4811 4812 // Many NEON builtins have identical semantics and uses in ARM and 4813 // AArch64. Emit these in a single function. 4814 auto IntrinsicMap = makeArrayRef(ARMSIMDIntrinsicMap); 4815 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 4816 IntrinsicMap, BuiltinID, NEONSIMDIntrinsicsProvenSorted); 4817 if (Builtin) 4818 return EmitCommonNeonBuiltinExpr( 4819 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 4820 Builtin->NameHint, Builtin->TypeModifier, E, Ops, PtrOp0, PtrOp1); 4821 4822 unsigned Int; 4823 switch (BuiltinID) { 4824 default: return nullptr; 4825 case NEON::BI__builtin_neon_vld1q_lane_v: 4826 // Handle 64-bit integer elements as a special case. Use shuffles of 4827 // one-element vectors to avoid poor code for i64 in the backend. 4828 if (VTy->getElementType()->isIntegerTy(64)) { 4829 // Extract the other lane. 4830 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4831 uint32_t Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); 4832 Value *SV = llvm::ConstantVector::get(ConstantInt::get(Int32Ty, 1-Lane)); 4833 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 4834 // Load the value as a one-element vector. 4835 Ty = llvm::VectorType::get(VTy->getElementType(), 1); 4836 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4837 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Tys); 4838 Value *Align = getAlignmentValue32(PtrOp0); 4839 Value *Ld = Builder.CreateCall(F, {Ops[0], Align}); 4840 // Combine them. 4841 uint32_t Indices[] = {1 - Lane, Lane}; 4842 SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 4843 return Builder.CreateShuffleVector(Ops[1], Ld, SV, "vld1q_lane"); 4844 } 4845 // fall through 4846 case NEON::BI__builtin_neon_vld1_lane_v: { 4847 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4848 PtrOp0 = Builder.CreateElementBitCast(PtrOp0, VTy->getElementType()); 4849 Value *Ld = Builder.CreateLoad(PtrOp0); 4850 return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); 4851 } 4852 case NEON::BI__builtin_neon_vld2_dup_v: 4853 case NEON::BI__builtin_neon_vld3_dup_v: 4854 case NEON::BI__builtin_neon_vld4_dup_v: { 4855 // Handle 64-bit elements as a special-case. There is no "dup" needed. 4856 if (VTy->getElementType()->getPrimitiveSizeInBits() == 64) { 4857 switch (BuiltinID) { 4858 case NEON::BI__builtin_neon_vld2_dup_v: 4859 Int = Intrinsic::arm_neon_vld2; 4860 break; 4861 case NEON::BI__builtin_neon_vld3_dup_v: 4862 Int = Intrinsic::arm_neon_vld3; 4863 break; 4864 case NEON::BI__builtin_neon_vld4_dup_v: 4865 Int = Intrinsic::arm_neon_vld4; 4866 break; 4867 default: llvm_unreachable("unknown vld_dup intrinsic?"); 4868 } 4869 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4870 Function *F = CGM.getIntrinsic(Int, Tys); 4871 llvm::Value *Align = getAlignmentValue32(PtrOp1); 4872 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, "vld_dup"); 4873 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4874 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4875 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4876 } 4877 switch (BuiltinID) { 4878 case NEON::BI__builtin_neon_vld2_dup_v: 4879 Int = Intrinsic::arm_neon_vld2lane; 4880 break; 4881 case NEON::BI__builtin_neon_vld3_dup_v: 4882 Int = Intrinsic::arm_neon_vld3lane; 4883 break; 4884 case NEON::BI__builtin_neon_vld4_dup_v: 4885 Int = Intrinsic::arm_neon_vld4lane; 4886 break; 4887 default: llvm_unreachable("unknown vld_dup intrinsic?"); 4888 } 4889 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4890 Function *F = CGM.getIntrinsic(Int, Tys); 4891 llvm::StructType *STy = cast<llvm::StructType>(F->getReturnType()); 4892 4893 SmallVector<Value*, 6> Args; 4894 Args.push_back(Ops[1]); 4895 Args.append(STy->getNumElements(), UndefValue::get(Ty)); 4896 4897 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 4898 Args.push_back(CI); 4899 Args.push_back(getAlignmentValue32(PtrOp1)); 4900 4901 Ops[1] = Builder.CreateCall(F, Args, "vld_dup"); 4902 // splat lane 0 to all elts in each vector of the result. 4903 for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { 4904 Value *Val = Builder.CreateExtractValue(Ops[1], i); 4905 Value *Elt = Builder.CreateBitCast(Val, Ty); 4906 Elt = EmitNeonSplat(Elt, CI); 4907 Elt = Builder.CreateBitCast(Elt, Val->getType()); 4908 Ops[1] = Builder.CreateInsertValue(Ops[1], Elt, i); 4909 } 4910 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4911 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4912 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4913 } 4914 case NEON::BI__builtin_neon_vqrshrn_n_v: 4915 Int = 4916 usgn ? Intrinsic::arm_neon_vqrshiftnu : Intrinsic::arm_neon_vqrshiftns; 4917 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n", 4918 1, true); 4919 case NEON::BI__builtin_neon_vqrshrun_n_v: 4920 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqrshiftnsu, Ty), 4921 Ops, "vqrshrun_n", 1, true); 4922 case NEON::BI__builtin_neon_vqshrn_n_v: 4923 Int = usgn ? Intrinsic::arm_neon_vqshiftnu : Intrinsic::arm_neon_vqshiftns; 4924 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n", 4925 1, true); 4926 case NEON::BI__builtin_neon_vqshrun_n_v: 4927 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqshiftnsu, Ty), 4928 Ops, "vqshrun_n", 1, true); 4929 case NEON::BI__builtin_neon_vrecpe_v: 4930 case NEON::BI__builtin_neon_vrecpeq_v: 4931 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecpe, Ty), 4932 Ops, "vrecpe"); 4933 case NEON::BI__builtin_neon_vrshrn_n_v: 4934 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrshiftn, Ty), 4935 Ops, "vrshrn_n", 1, true); 4936 case NEON::BI__builtin_neon_vrsra_n_v: 4937 case NEON::BI__builtin_neon_vrsraq_n_v: 4938 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4939 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4940 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, true); 4941 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 4942 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Ty), {Ops[1], Ops[2]}); 4943 return Builder.CreateAdd(Ops[0], Ops[1], "vrsra_n"); 4944 case NEON::BI__builtin_neon_vsri_n_v: 4945 case NEON::BI__builtin_neon_vsriq_n_v: 4946 rightShift = true; 4947 case NEON::BI__builtin_neon_vsli_n_v: 4948 case NEON::BI__builtin_neon_vsliq_n_v: 4949 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, rightShift); 4950 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vshiftins, Ty), 4951 Ops, "vsli_n"); 4952 case NEON::BI__builtin_neon_vsra_n_v: 4953 case NEON::BI__builtin_neon_vsraq_n_v: 4954 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4955 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 4956 return Builder.CreateAdd(Ops[0], Ops[1]); 4957 case NEON::BI__builtin_neon_vst1q_lane_v: 4958 // Handle 64-bit integer elements as a special case. Use a shuffle to get 4959 // a one-element vector and avoid poor code for i64 in the backend. 4960 if (VTy->getElementType()->isIntegerTy(64)) { 4961 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4962 Value *SV = llvm::ConstantVector::get(cast<llvm::Constant>(Ops[2])); 4963 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 4964 Ops[2] = getAlignmentValue32(PtrOp0); 4965 llvm::Type *Tys[] = {Int8PtrTy, Ops[1]->getType()}; 4966 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, 4967 Tys), Ops); 4968 } 4969 // fall through 4970 case NEON::BI__builtin_neon_vst1_lane_v: { 4971 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4972 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 4973 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4974 auto St = Builder.CreateStore(Ops[1], Builder.CreateBitCast(PtrOp0, Ty)); 4975 return St; 4976 } 4977 case NEON::BI__builtin_neon_vtbl1_v: 4978 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl1), 4979 Ops, "vtbl1"); 4980 case NEON::BI__builtin_neon_vtbl2_v: 4981 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl2), 4982 Ops, "vtbl2"); 4983 case NEON::BI__builtin_neon_vtbl3_v: 4984 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl3), 4985 Ops, "vtbl3"); 4986 case NEON::BI__builtin_neon_vtbl4_v: 4987 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl4), 4988 Ops, "vtbl4"); 4989 case NEON::BI__builtin_neon_vtbx1_v: 4990 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx1), 4991 Ops, "vtbx1"); 4992 case NEON::BI__builtin_neon_vtbx2_v: 4993 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx2), 4994 Ops, "vtbx2"); 4995 case NEON::BI__builtin_neon_vtbx3_v: 4996 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx3), 4997 Ops, "vtbx3"); 4998 case NEON::BI__builtin_neon_vtbx4_v: 4999 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx4), 5000 Ops, "vtbx4"); 5001 } 5002 } 5003 5004 static Value *EmitAArch64TblBuiltinExpr(CodeGenFunction &CGF, unsigned BuiltinID, 5005 const CallExpr *E, 5006 SmallVectorImpl<Value *> &Ops) { 5007 unsigned int Int = 0; 5008 const char *s = nullptr; 5009 5010 switch (BuiltinID) { 5011 default: 5012 return nullptr; 5013 case NEON::BI__builtin_neon_vtbl1_v: 5014 case NEON::BI__builtin_neon_vqtbl1_v: 5015 case NEON::BI__builtin_neon_vqtbl1q_v: 5016 case NEON::BI__builtin_neon_vtbl2_v: 5017 case NEON::BI__builtin_neon_vqtbl2_v: 5018 case NEON::BI__builtin_neon_vqtbl2q_v: 5019 case NEON::BI__builtin_neon_vtbl3_v: 5020 case NEON::BI__builtin_neon_vqtbl3_v: 5021 case NEON::BI__builtin_neon_vqtbl3q_v: 5022 case NEON::BI__builtin_neon_vtbl4_v: 5023 case NEON::BI__builtin_neon_vqtbl4_v: 5024 case NEON::BI__builtin_neon_vqtbl4q_v: 5025 break; 5026 case NEON::BI__builtin_neon_vtbx1_v: 5027 case NEON::BI__builtin_neon_vqtbx1_v: 5028 case NEON::BI__builtin_neon_vqtbx1q_v: 5029 case NEON::BI__builtin_neon_vtbx2_v: 5030 case NEON::BI__builtin_neon_vqtbx2_v: 5031 case NEON::BI__builtin_neon_vqtbx2q_v: 5032 case NEON::BI__builtin_neon_vtbx3_v: 5033 case NEON::BI__builtin_neon_vqtbx3_v: 5034 case NEON::BI__builtin_neon_vqtbx3q_v: 5035 case NEON::BI__builtin_neon_vtbx4_v: 5036 case NEON::BI__builtin_neon_vqtbx4_v: 5037 case NEON::BI__builtin_neon_vqtbx4q_v: 5038 break; 5039 } 5040 5041 assert(E->getNumArgs() >= 3); 5042 5043 // Get the last argument, which specifies the vector type. 5044 llvm::APSInt Result; 5045 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 5046 if (!Arg->isIntegerConstantExpr(Result, CGF.getContext())) 5047 return nullptr; 5048 5049 // Determine the type of this overloaded NEON intrinsic. 5050 NeonTypeFlags Type(Result.getZExtValue()); 5051 llvm::VectorType *Ty = GetNeonType(&CGF, Type); 5052 if (!Ty) 5053 return nullptr; 5054 5055 CodeGen::CGBuilderTy &Builder = CGF.Builder; 5056 5057 // AArch64 scalar builtins are not overloaded, they do not have an extra 5058 // argument that specifies the vector type, need to handle each case. 5059 switch (BuiltinID) { 5060 case NEON::BI__builtin_neon_vtbl1_v: { 5061 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 1), nullptr, 5062 Ops[1], Ty, Intrinsic::aarch64_neon_tbl1, 5063 "vtbl1"); 5064 } 5065 case NEON::BI__builtin_neon_vtbl2_v: { 5066 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 2), nullptr, 5067 Ops[2], Ty, Intrinsic::aarch64_neon_tbl1, 5068 "vtbl1"); 5069 } 5070 case NEON::BI__builtin_neon_vtbl3_v: { 5071 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 3), nullptr, 5072 Ops[3], Ty, Intrinsic::aarch64_neon_tbl2, 5073 "vtbl2"); 5074 } 5075 case NEON::BI__builtin_neon_vtbl4_v: { 5076 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 4), nullptr, 5077 Ops[4], Ty, Intrinsic::aarch64_neon_tbl2, 5078 "vtbl2"); 5079 } 5080 case NEON::BI__builtin_neon_vtbx1_v: { 5081 Value *TblRes = 5082 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 1), nullptr, Ops[2], 5083 Ty, Intrinsic::aarch64_neon_tbl1, "vtbl1"); 5084 5085 llvm::Constant *EightV = ConstantInt::get(Ty, 8); 5086 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[2], EightV); 5087 CmpRes = Builder.CreateSExt(CmpRes, Ty); 5088 5089 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 5090 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 5091 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 5092 } 5093 case NEON::BI__builtin_neon_vtbx2_v: { 5094 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 2), Ops[0], 5095 Ops[3], Ty, Intrinsic::aarch64_neon_tbx1, 5096 "vtbx1"); 5097 } 5098 case NEON::BI__builtin_neon_vtbx3_v: { 5099 Value *TblRes = 5100 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 3), nullptr, Ops[4], 5101 Ty, Intrinsic::aarch64_neon_tbl2, "vtbl2"); 5102 5103 llvm::Constant *TwentyFourV = ConstantInt::get(Ty, 24); 5104 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[4], 5105 TwentyFourV); 5106 CmpRes = Builder.CreateSExt(CmpRes, Ty); 5107 5108 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 5109 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 5110 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 5111 } 5112 case NEON::BI__builtin_neon_vtbx4_v: { 5113 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 4), Ops[0], 5114 Ops[5], Ty, Intrinsic::aarch64_neon_tbx2, 5115 "vtbx2"); 5116 } 5117 case NEON::BI__builtin_neon_vqtbl1_v: 5118 case NEON::BI__builtin_neon_vqtbl1q_v: 5119 Int = Intrinsic::aarch64_neon_tbl1; s = "vtbl1"; break; 5120 case NEON::BI__builtin_neon_vqtbl2_v: 5121 case NEON::BI__builtin_neon_vqtbl2q_v: { 5122 Int = Intrinsic::aarch64_neon_tbl2; s = "vtbl2"; break; 5123 case NEON::BI__builtin_neon_vqtbl3_v: 5124 case NEON::BI__builtin_neon_vqtbl3q_v: 5125 Int = Intrinsic::aarch64_neon_tbl3; s = "vtbl3"; break; 5126 case NEON::BI__builtin_neon_vqtbl4_v: 5127 case NEON::BI__builtin_neon_vqtbl4q_v: 5128 Int = Intrinsic::aarch64_neon_tbl4; s = "vtbl4"; break; 5129 case NEON::BI__builtin_neon_vqtbx1_v: 5130 case NEON::BI__builtin_neon_vqtbx1q_v: 5131 Int = Intrinsic::aarch64_neon_tbx1; s = "vtbx1"; break; 5132 case NEON::BI__builtin_neon_vqtbx2_v: 5133 case NEON::BI__builtin_neon_vqtbx2q_v: 5134 Int = Intrinsic::aarch64_neon_tbx2; s = "vtbx2"; break; 5135 case NEON::BI__builtin_neon_vqtbx3_v: 5136 case NEON::BI__builtin_neon_vqtbx3q_v: 5137 Int = Intrinsic::aarch64_neon_tbx3; s = "vtbx3"; break; 5138 case NEON::BI__builtin_neon_vqtbx4_v: 5139 case NEON::BI__builtin_neon_vqtbx4q_v: 5140 Int = Intrinsic::aarch64_neon_tbx4; s = "vtbx4"; break; 5141 } 5142 } 5143 5144 if (!Int) 5145 return nullptr; 5146 5147 Function *F = CGF.CGM.getIntrinsic(Int, Ty); 5148 return CGF.EmitNeonCall(F, Ops, s); 5149 } 5150 5151 Value *CodeGenFunction::vectorWrapScalar16(Value *Op) { 5152 llvm::Type *VTy = llvm::VectorType::get(Int16Ty, 4); 5153 Op = Builder.CreateBitCast(Op, Int16Ty); 5154 Value *V = UndefValue::get(VTy); 5155 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 5156 Op = Builder.CreateInsertElement(V, Op, CI); 5157 return Op; 5158 } 5159 5160 Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, 5161 const CallExpr *E) { 5162 unsigned HintID = static_cast<unsigned>(-1); 5163 switch (BuiltinID) { 5164 default: break; 5165 case AArch64::BI__builtin_arm_nop: 5166 HintID = 0; 5167 break; 5168 case AArch64::BI__builtin_arm_yield: 5169 HintID = 1; 5170 break; 5171 case AArch64::BI__builtin_arm_wfe: 5172 HintID = 2; 5173 break; 5174 case AArch64::BI__builtin_arm_wfi: 5175 HintID = 3; 5176 break; 5177 case AArch64::BI__builtin_arm_sev: 5178 HintID = 4; 5179 break; 5180 case AArch64::BI__builtin_arm_sevl: 5181 HintID = 5; 5182 break; 5183 } 5184 5185 if (HintID != static_cast<unsigned>(-1)) { 5186 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_hint); 5187 return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID)); 5188 } 5189 5190 if (BuiltinID == AArch64::BI__builtin_arm_prefetch) { 5191 Value *Address = EmitScalarExpr(E->getArg(0)); 5192 Value *RW = EmitScalarExpr(E->getArg(1)); 5193 Value *CacheLevel = EmitScalarExpr(E->getArg(2)); 5194 Value *RetentionPolicy = EmitScalarExpr(E->getArg(3)); 5195 Value *IsData = EmitScalarExpr(E->getArg(4)); 5196 5197 Value *Locality = nullptr; 5198 if (cast<llvm::ConstantInt>(RetentionPolicy)->isZero()) { 5199 // Temporal fetch, needs to convert cache level to locality. 5200 Locality = llvm::ConstantInt::get(Int32Ty, 5201 -cast<llvm::ConstantInt>(CacheLevel)->getValue() + 3); 5202 } else { 5203 // Streaming fetch. 5204 Locality = llvm::ConstantInt::get(Int32Ty, 0); 5205 } 5206 5207 // FIXME: We need AArch64 specific LLVM intrinsic if we want to specify 5208 // PLDL3STRM or PLDL2STRM. 5209 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 5210 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 5211 } 5212 5213 if (BuiltinID == AArch64::BI__builtin_arm_rbit) { 5214 assert((getContext().getTypeSize(E->getType()) == 32) && 5215 "rbit of unusual size!"); 5216 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 5217 return Builder.CreateCall( 5218 CGM.getIntrinsic(Intrinsic::aarch64_rbit, Arg->getType()), Arg, "rbit"); 5219 } 5220 if (BuiltinID == AArch64::BI__builtin_arm_rbit64) { 5221 assert((getContext().getTypeSize(E->getType()) == 64) && 5222 "rbit of unusual size!"); 5223 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 5224 return Builder.CreateCall( 5225 CGM.getIntrinsic(Intrinsic::aarch64_rbit, Arg->getType()), Arg, "rbit"); 5226 } 5227 5228 if (BuiltinID == AArch64::BI__clear_cache) { 5229 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 5230 const FunctionDecl *FD = E->getDirectCallee(); 5231 Value *Ops[2]; 5232 for (unsigned i = 0; i < 2; i++) 5233 Ops[i] = EmitScalarExpr(E->getArg(i)); 5234 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 5235 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 5236 StringRef Name = FD->getName(); 5237 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 5238 } 5239 5240 if ((BuiltinID == AArch64::BI__builtin_arm_ldrex || 5241 BuiltinID == AArch64::BI__builtin_arm_ldaex) && 5242 getContext().getTypeSize(E->getType()) == 128) { 5243 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 5244 ? Intrinsic::aarch64_ldaxp 5245 : Intrinsic::aarch64_ldxp); 5246 5247 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 5248 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 5249 "ldxp"); 5250 5251 Value *Val0 = Builder.CreateExtractValue(Val, 1); 5252 Value *Val1 = Builder.CreateExtractValue(Val, 0); 5253 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 5254 Val0 = Builder.CreateZExt(Val0, Int128Ty); 5255 Val1 = Builder.CreateZExt(Val1, Int128Ty); 5256 5257 Value *ShiftCst = llvm::ConstantInt::get(Int128Ty, 64); 5258 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 5259 Val = Builder.CreateOr(Val, Val1); 5260 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 5261 } else if (BuiltinID == AArch64::BI__builtin_arm_ldrex || 5262 BuiltinID == AArch64::BI__builtin_arm_ldaex) { 5263 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 5264 5265 QualType Ty = E->getType(); 5266 llvm::Type *RealResTy = ConvertType(Ty); 5267 llvm::Type *IntResTy = llvm::IntegerType::get(getLLVMContext(), 5268 getContext().getTypeSize(Ty)); 5269 LoadAddr = Builder.CreateBitCast(LoadAddr, IntResTy->getPointerTo()); 5270 5271 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 5272 ? Intrinsic::aarch64_ldaxr 5273 : Intrinsic::aarch64_ldxr, 5274 LoadAddr->getType()); 5275 Value *Val = Builder.CreateCall(F, LoadAddr, "ldxr"); 5276 5277 if (RealResTy->isPointerTy()) 5278 return Builder.CreateIntToPtr(Val, RealResTy); 5279 5280 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 5281 return Builder.CreateBitCast(Val, RealResTy); 5282 } 5283 5284 if ((BuiltinID == AArch64::BI__builtin_arm_strex || 5285 BuiltinID == AArch64::BI__builtin_arm_stlex) && 5286 getContext().getTypeSize(E->getArg(0)->getType()) == 128) { 5287 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 5288 ? Intrinsic::aarch64_stlxp 5289 : Intrinsic::aarch64_stxp); 5290 llvm::Type *STy = llvm::StructType::get(Int64Ty, Int64Ty, nullptr); 5291 5292 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 5293 EmitAnyExprToMem(E->getArg(0), Tmp, Qualifiers(), /*init*/ true); 5294 5295 Tmp = Builder.CreateBitCast(Tmp, llvm::PointerType::getUnqual(STy)); 5296 llvm::Value *Val = Builder.CreateLoad(Tmp); 5297 5298 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 5299 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 5300 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), 5301 Int8PtrTy); 5302 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "stxp"); 5303 } 5304 5305 if (BuiltinID == AArch64::BI__builtin_arm_strex || 5306 BuiltinID == AArch64::BI__builtin_arm_stlex) { 5307 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 5308 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 5309 5310 QualType Ty = E->getArg(0)->getType(); 5311 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 5312 getContext().getTypeSize(Ty)); 5313 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 5314 5315 if (StoreVal->getType()->isPointerTy()) 5316 StoreVal = Builder.CreatePtrToInt(StoreVal, Int64Ty); 5317 else { 5318 StoreVal = Builder.CreateBitCast(StoreVal, StoreTy); 5319 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int64Ty); 5320 } 5321 5322 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 5323 ? Intrinsic::aarch64_stlxr 5324 : Intrinsic::aarch64_stxr, 5325 StoreAddr->getType()); 5326 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "stxr"); 5327 } 5328 5329 if (BuiltinID == AArch64::BI__builtin_arm_clrex) { 5330 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_clrex); 5331 return Builder.CreateCall(F); 5332 } 5333 5334 // CRC32 5335 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 5336 switch (BuiltinID) { 5337 case AArch64::BI__builtin_arm_crc32b: 5338 CRCIntrinsicID = Intrinsic::aarch64_crc32b; break; 5339 case AArch64::BI__builtin_arm_crc32cb: 5340 CRCIntrinsicID = Intrinsic::aarch64_crc32cb; break; 5341 case AArch64::BI__builtin_arm_crc32h: 5342 CRCIntrinsicID = Intrinsic::aarch64_crc32h; break; 5343 case AArch64::BI__builtin_arm_crc32ch: 5344 CRCIntrinsicID = Intrinsic::aarch64_crc32ch; break; 5345 case AArch64::BI__builtin_arm_crc32w: 5346 CRCIntrinsicID = Intrinsic::aarch64_crc32w; break; 5347 case AArch64::BI__builtin_arm_crc32cw: 5348 CRCIntrinsicID = Intrinsic::aarch64_crc32cw; break; 5349 case AArch64::BI__builtin_arm_crc32d: 5350 CRCIntrinsicID = Intrinsic::aarch64_crc32x; break; 5351 case AArch64::BI__builtin_arm_crc32cd: 5352 CRCIntrinsicID = Intrinsic::aarch64_crc32cx; break; 5353 } 5354 5355 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 5356 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 5357 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 5358 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 5359 5360 llvm::Type *DataTy = F->getFunctionType()->getParamType(1); 5361 Arg1 = Builder.CreateZExtOrBitCast(Arg1, DataTy); 5362 5363 return Builder.CreateCall(F, {Arg0, Arg1}); 5364 } 5365 5366 if (BuiltinID == AArch64::BI__builtin_arm_rsr || 5367 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 5368 BuiltinID == AArch64::BI__builtin_arm_rsrp || 5369 BuiltinID == AArch64::BI__builtin_arm_wsr || 5370 BuiltinID == AArch64::BI__builtin_arm_wsr64 || 5371 BuiltinID == AArch64::BI__builtin_arm_wsrp) { 5372 5373 bool IsRead = BuiltinID == AArch64::BI__builtin_arm_rsr || 5374 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 5375 BuiltinID == AArch64::BI__builtin_arm_rsrp; 5376 5377 bool IsPointerBuiltin = BuiltinID == AArch64::BI__builtin_arm_rsrp || 5378 BuiltinID == AArch64::BI__builtin_arm_wsrp; 5379 5380 bool Is64Bit = BuiltinID != AArch64::BI__builtin_arm_rsr && 5381 BuiltinID != AArch64::BI__builtin_arm_wsr; 5382 5383 llvm::Type *ValueType; 5384 llvm::Type *RegisterType = Int64Ty; 5385 if (IsPointerBuiltin) { 5386 ValueType = VoidPtrTy; 5387 } else if (Is64Bit) { 5388 ValueType = Int64Ty; 5389 } else { 5390 ValueType = Int32Ty; 5391 } 5392 5393 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 5394 } 5395 5396 // Find out if any arguments are required to be integer constant 5397 // expressions. 5398 unsigned ICEArguments = 0; 5399 ASTContext::GetBuiltinTypeError Error; 5400 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 5401 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 5402 5403 llvm::SmallVector<Value*, 4> Ops; 5404 for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; i++) { 5405 if ((ICEArguments & (1 << i)) == 0) { 5406 Ops.push_back(EmitScalarExpr(E->getArg(i))); 5407 } else { 5408 // If this is required to be a constant, constant fold it so that we know 5409 // that the generated intrinsic gets a ConstantInt. 5410 llvm::APSInt Result; 5411 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 5412 assert(IsConst && "Constant arg isn't actually constant?"); 5413 (void)IsConst; 5414 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 5415 } 5416 } 5417 5418 auto SISDMap = makeArrayRef(AArch64SISDIntrinsicMap); 5419 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 5420 SISDMap, BuiltinID, AArch64SISDIntrinsicsProvenSorted); 5421 5422 if (Builtin) { 5423 Ops.push_back(EmitScalarExpr(E->getArg(E->getNumArgs() - 1))); 5424 Value *Result = EmitCommonNeonSISDBuiltinExpr(*this, *Builtin, Ops, E); 5425 assert(Result && "SISD intrinsic should have been handled"); 5426 return Result; 5427 } 5428 5429 llvm::APSInt Result; 5430 const Expr *Arg = E->getArg(E->getNumArgs()-1); 5431 NeonTypeFlags Type(0); 5432 if (Arg->isIntegerConstantExpr(Result, getContext())) 5433 // Determine the type of this overloaded NEON intrinsic. 5434 Type = NeonTypeFlags(Result.getZExtValue()); 5435 5436 bool usgn = Type.isUnsigned(); 5437 bool quad = Type.isQuad(); 5438 5439 // Handle non-overloaded intrinsics first. 5440 switch (BuiltinID) { 5441 default: break; 5442 case NEON::BI__builtin_neon_vldrq_p128: { 5443 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 5444 Value *Ptr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PTy); 5445 return Builder.CreateDefaultAlignedLoad(Ptr); 5446 } 5447 case NEON::BI__builtin_neon_vstrq_p128: { 5448 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 5449 Value *Ptr = Builder.CreateBitCast(Ops[0], Int128PTy); 5450 return Builder.CreateDefaultAlignedStore(EmitScalarExpr(E->getArg(1)), Ptr); 5451 } 5452 case NEON::BI__builtin_neon_vcvts_u32_f32: 5453 case NEON::BI__builtin_neon_vcvtd_u64_f64: 5454 usgn = true; 5455 // FALL THROUGH 5456 case NEON::BI__builtin_neon_vcvts_s32_f32: 5457 case NEON::BI__builtin_neon_vcvtd_s64_f64: { 5458 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5459 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 5460 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 5461 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 5462 Ops[0] = Builder.CreateBitCast(Ops[0], FTy); 5463 if (usgn) 5464 return Builder.CreateFPToUI(Ops[0], InTy); 5465 return Builder.CreateFPToSI(Ops[0], InTy); 5466 } 5467 case NEON::BI__builtin_neon_vcvts_f32_u32: 5468 case NEON::BI__builtin_neon_vcvtd_f64_u64: 5469 usgn = true; 5470 // FALL THROUGH 5471 case NEON::BI__builtin_neon_vcvts_f32_s32: 5472 case NEON::BI__builtin_neon_vcvtd_f64_s64: { 5473 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5474 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 5475 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 5476 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 5477 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 5478 if (usgn) 5479 return Builder.CreateUIToFP(Ops[0], FTy); 5480 return Builder.CreateSIToFP(Ops[0], FTy); 5481 } 5482 case NEON::BI__builtin_neon_vpaddd_s64: { 5483 llvm::Type *Ty = llvm::VectorType::get(Int64Ty, 2); 5484 Value *Vec = EmitScalarExpr(E->getArg(0)); 5485 // The vector is v2f64, so make sure it's bitcast to that. 5486 Vec = Builder.CreateBitCast(Vec, Ty, "v2i64"); 5487 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 5488 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 5489 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 5490 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 5491 // Pairwise addition of a v2f64 into a scalar f64. 5492 return Builder.CreateAdd(Op0, Op1, "vpaddd"); 5493 } 5494 case NEON::BI__builtin_neon_vpaddd_f64: { 5495 llvm::Type *Ty = 5496 llvm::VectorType::get(DoubleTy, 2); 5497 Value *Vec = EmitScalarExpr(E->getArg(0)); 5498 // The vector is v2f64, so make sure it's bitcast to that. 5499 Vec = Builder.CreateBitCast(Vec, Ty, "v2f64"); 5500 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 5501 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 5502 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 5503 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 5504 // Pairwise addition of a v2f64 into a scalar f64. 5505 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 5506 } 5507 case NEON::BI__builtin_neon_vpadds_f32: { 5508 llvm::Type *Ty = 5509 llvm::VectorType::get(FloatTy, 2); 5510 Value *Vec = EmitScalarExpr(E->getArg(0)); 5511 // The vector is v2f32, so make sure it's bitcast to that. 5512 Vec = Builder.CreateBitCast(Vec, Ty, "v2f32"); 5513 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 5514 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 5515 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 5516 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 5517 // Pairwise addition of a v2f32 into a scalar f32. 5518 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 5519 } 5520 case NEON::BI__builtin_neon_vceqzd_s64: 5521 case NEON::BI__builtin_neon_vceqzd_f64: 5522 case NEON::BI__builtin_neon_vceqzs_f32: 5523 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5524 return EmitAArch64CompareBuiltinExpr( 5525 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5526 ICmpInst::FCMP_OEQ, ICmpInst::ICMP_EQ, "vceqz"); 5527 case NEON::BI__builtin_neon_vcgezd_s64: 5528 case NEON::BI__builtin_neon_vcgezd_f64: 5529 case NEON::BI__builtin_neon_vcgezs_f32: 5530 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5531 return EmitAArch64CompareBuiltinExpr( 5532 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5533 ICmpInst::FCMP_OGE, ICmpInst::ICMP_SGE, "vcgez"); 5534 case NEON::BI__builtin_neon_vclezd_s64: 5535 case NEON::BI__builtin_neon_vclezd_f64: 5536 case NEON::BI__builtin_neon_vclezs_f32: 5537 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5538 return EmitAArch64CompareBuiltinExpr( 5539 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5540 ICmpInst::FCMP_OLE, ICmpInst::ICMP_SLE, "vclez"); 5541 case NEON::BI__builtin_neon_vcgtzd_s64: 5542 case NEON::BI__builtin_neon_vcgtzd_f64: 5543 case NEON::BI__builtin_neon_vcgtzs_f32: 5544 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5545 return EmitAArch64CompareBuiltinExpr( 5546 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5547 ICmpInst::FCMP_OGT, ICmpInst::ICMP_SGT, "vcgtz"); 5548 case NEON::BI__builtin_neon_vcltzd_s64: 5549 case NEON::BI__builtin_neon_vcltzd_f64: 5550 case NEON::BI__builtin_neon_vcltzs_f32: 5551 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5552 return EmitAArch64CompareBuiltinExpr( 5553 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5554 ICmpInst::FCMP_OLT, ICmpInst::ICMP_SLT, "vcltz"); 5555 5556 case NEON::BI__builtin_neon_vceqzd_u64: { 5557 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5558 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 5559 Ops[0] = 5560 Builder.CreateICmpEQ(Ops[0], llvm::Constant::getNullValue(Int64Ty)); 5561 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqzd"); 5562 } 5563 case NEON::BI__builtin_neon_vceqd_f64: 5564 case NEON::BI__builtin_neon_vcled_f64: 5565 case NEON::BI__builtin_neon_vcltd_f64: 5566 case NEON::BI__builtin_neon_vcged_f64: 5567 case NEON::BI__builtin_neon_vcgtd_f64: { 5568 llvm::CmpInst::Predicate P; 5569 switch (BuiltinID) { 5570 default: llvm_unreachable("missing builtin ID in switch!"); 5571 case NEON::BI__builtin_neon_vceqd_f64: P = llvm::FCmpInst::FCMP_OEQ; break; 5572 case NEON::BI__builtin_neon_vcled_f64: P = llvm::FCmpInst::FCMP_OLE; break; 5573 case NEON::BI__builtin_neon_vcltd_f64: P = llvm::FCmpInst::FCMP_OLT; break; 5574 case NEON::BI__builtin_neon_vcged_f64: P = llvm::FCmpInst::FCMP_OGE; break; 5575 case NEON::BI__builtin_neon_vcgtd_f64: P = llvm::FCmpInst::FCMP_OGT; break; 5576 } 5577 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5578 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5579 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 5580 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 5581 return Builder.CreateSExt(Ops[0], Int64Ty, "vcmpd"); 5582 } 5583 case NEON::BI__builtin_neon_vceqs_f32: 5584 case NEON::BI__builtin_neon_vcles_f32: 5585 case NEON::BI__builtin_neon_vclts_f32: 5586 case NEON::BI__builtin_neon_vcges_f32: 5587 case NEON::BI__builtin_neon_vcgts_f32: { 5588 llvm::CmpInst::Predicate P; 5589 switch (BuiltinID) { 5590 default: llvm_unreachable("missing builtin ID in switch!"); 5591 case NEON::BI__builtin_neon_vceqs_f32: P = llvm::FCmpInst::FCMP_OEQ; break; 5592 case NEON::BI__builtin_neon_vcles_f32: P = llvm::FCmpInst::FCMP_OLE; break; 5593 case NEON::BI__builtin_neon_vclts_f32: P = llvm::FCmpInst::FCMP_OLT; break; 5594 case NEON::BI__builtin_neon_vcges_f32: P = llvm::FCmpInst::FCMP_OGE; break; 5595 case NEON::BI__builtin_neon_vcgts_f32: P = llvm::FCmpInst::FCMP_OGT; break; 5596 } 5597 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5598 Ops[0] = Builder.CreateBitCast(Ops[0], FloatTy); 5599 Ops[1] = Builder.CreateBitCast(Ops[1], FloatTy); 5600 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 5601 return Builder.CreateSExt(Ops[0], Int32Ty, "vcmpd"); 5602 } 5603 case NEON::BI__builtin_neon_vceqd_s64: 5604 case NEON::BI__builtin_neon_vceqd_u64: 5605 case NEON::BI__builtin_neon_vcgtd_s64: 5606 case NEON::BI__builtin_neon_vcgtd_u64: 5607 case NEON::BI__builtin_neon_vcltd_s64: 5608 case NEON::BI__builtin_neon_vcltd_u64: 5609 case NEON::BI__builtin_neon_vcged_u64: 5610 case NEON::BI__builtin_neon_vcged_s64: 5611 case NEON::BI__builtin_neon_vcled_u64: 5612 case NEON::BI__builtin_neon_vcled_s64: { 5613 llvm::CmpInst::Predicate P; 5614 switch (BuiltinID) { 5615 default: llvm_unreachable("missing builtin ID in switch!"); 5616 case NEON::BI__builtin_neon_vceqd_s64: 5617 case NEON::BI__builtin_neon_vceqd_u64:P = llvm::ICmpInst::ICMP_EQ;break; 5618 case NEON::BI__builtin_neon_vcgtd_s64:P = llvm::ICmpInst::ICMP_SGT;break; 5619 case NEON::BI__builtin_neon_vcgtd_u64:P = llvm::ICmpInst::ICMP_UGT;break; 5620 case NEON::BI__builtin_neon_vcltd_s64:P = llvm::ICmpInst::ICMP_SLT;break; 5621 case NEON::BI__builtin_neon_vcltd_u64:P = llvm::ICmpInst::ICMP_ULT;break; 5622 case NEON::BI__builtin_neon_vcged_u64:P = llvm::ICmpInst::ICMP_UGE;break; 5623 case NEON::BI__builtin_neon_vcged_s64:P = llvm::ICmpInst::ICMP_SGE;break; 5624 case NEON::BI__builtin_neon_vcled_u64:P = llvm::ICmpInst::ICMP_ULE;break; 5625 case NEON::BI__builtin_neon_vcled_s64:P = llvm::ICmpInst::ICMP_SLE;break; 5626 } 5627 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5628 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 5629 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 5630 Ops[0] = Builder.CreateICmp(P, Ops[0], Ops[1]); 5631 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqd"); 5632 } 5633 case NEON::BI__builtin_neon_vtstd_s64: 5634 case NEON::BI__builtin_neon_vtstd_u64: { 5635 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5636 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 5637 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 5638 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 5639 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 5640 llvm::Constant::getNullValue(Int64Ty)); 5641 return Builder.CreateSExt(Ops[0], Int64Ty, "vtstd"); 5642 } 5643 case NEON::BI__builtin_neon_vset_lane_i8: 5644 case NEON::BI__builtin_neon_vset_lane_i16: 5645 case NEON::BI__builtin_neon_vset_lane_i32: 5646 case NEON::BI__builtin_neon_vset_lane_i64: 5647 case NEON::BI__builtin_neon_vset_lane_f32: 5648 case NEON::BI__builtin_neon_vsetq_lane_i8: 5649 case NEON::BI__builtin_neon_vsetq_lane_i16: 5650 case NEON::BI__builtin_neon_vsetq_lane_i32: 5651 case NEON::BI__builtin_neon_vsetq_lane_i64: 5652 case NEON::BI__builtin_neon_vsetq_lane_f32: 5653 Ops.push_back(EmitScalarExpr(E->getArg(2))); 5654 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5655 case NEON::BI__builtin_neon_vset_lane_f64: 5656 // The vector type needs a cast for the v1f64 variant. 5657 Ops[1] = Builder.CreateBitCast(Ops[1], 5658 llvm::VectorType::get(DoubleTy, 1)); 5659 Ops.push_back(EmitScalarExpr(E->getArg(2))); 5660 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5661 case NEON::BI__builtin_neon_vsetq_lane_f64: 5662 // The vector type needs a cast for the v2f64 variant. 5663 Ops[1] = Builder.CreateBitCast(Ops[1], 5664 llvm::VectorType::get(DoubleTy, 2)); 5665 Ops.push_back(EmitScalarExpr(E->getArg(2))); 5666 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5667 5668 case NEON::BI__builtin_neon_vget_lane_i8: 5669 case NEON::BI__builtin_neon_vdupb_lane_i8: 5670 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 8)); 5671 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5672 "vget_lane"); 5673 case NEON::BI__builtin_neon_vgetq_lane_i8: 5674 case NEON::BI__builtin_neon_vdupb_laneq_i8: 5675 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 16)); 5676 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5677 "vgetq_lane"); 5678 case NEON::BI__builtin_neon_vget_lane_i16: 5679 case NEON::BI__builtin_neon_vduph_lane_i16: 5680 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 4)); 5681 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5682 "vget_lane"); 5683 case NEON::BI__builtin_neon_vgetq_lane_i16: 5684 case NEON::BI__builtin_neon_vduph_laneq_i16: 5685 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 8)); 5686 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5687 "vgetq_lane"); 5688 case NEON::BI__builtin_neon_vget_lane_i32: 5689 case NEON::BI__builtin_neon_vdups_lane_i32: 5690 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 2)); 5691 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5692 "vget_lane"); 5693 case NEON::BI__builtin_neon_vdups_lane_f32: 5694 Ops[0] = Builder.CreateBitCast(Ops[0], 5695 llvm::VectorType::get(FloatTy, 2)); 5696 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5697 "vdups_lane"); 5698 case NEON::BI__builtin_neon_vgetq_lane_i32: 5699 case NEON::BI__builtin_neon_vdups_laneq_i32: 5700 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 5701 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5702 "vgetq_lane"); 5703 case NEON::BI__builtin_neon_vget_lane_i64: 5704 case NEON::BI__builtin_neon_vdupd_lane_i64: 5705 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 1)); 5706 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5707 "vget_lane"); 5708 case NEON::BI__builtin_neon_vdupd_lane_f64: 5709 Ops[0] = Builder.CreateBitCast(Ops[0], 5710 llvm::VectorType::get(DoubleTy, 1)); 5711 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5712 "vdupd_lane"); 5713 case NEON::BI__builtin_neon_vgetq_lane_i64: 5714 case NEON::BI__builtin_neon_vdupd_laneq_i64: 5715 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 5716 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5717 "vgetq_lane"); 5718 case NEON::BI__builtin_neon_vget_lane_f32: 5719 Ops[0] = Builder.CreateBitCast(Ops[0], 5720 llvm::VectorType::get(FloatTy, 2)); 5721 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5722 "vget_lane"); 5723 case NEON::BI__builtin_neon_vget_lane_f64: 5724 Ops[0] = Builder.CreateBitCast(Ops[0], 5725 llvm::VectorType::get(DoubleTy, 1)); 5726 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5727 "vget_lane"); 5728 case NEON::BI__builtin_neon_vgetq_lane_f32: 5729 case NEON::BI__builtin_neon_vdups_laneq_f32: 5730 Ops[0] = Builder.CreateBitCast(Ops[0], 5731 llvm::VectorType::get(FloatTy, 4)); 5732 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5733 "vgetq_lane"); 5734 case NEON::BI__builtin_neon_vgetq_lane_f64: 5735 case NEON::BI__builtin_neon_vdupd_laneq_f64: 5736 Ops[0] = Builder.CreateBitCast(Ops[0], 5737 llvm::VectorType::get(DoubleTy, 2)); 5738 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5739 "vgetq_lane"); 5740 case NEON::BI__builtin_neon_vaddd_s64: 5741 case NEON::BI__builtin_neon_vaddd_u64: 5742 return Builder.CreateAdd(Ops[0], EmitScalarExpr(E->getArg(1)), "vaddd"); 5743 case NEON::BI__builtin_neon_vsubd_s64: 5744 case NEON::BI__builtin_neon_vsubd_u64: 5745 return Builder.CreateSub(Ops[0], EmitScalarExpr(E->getArg(1)), "vsubd"); 5746 case NEON::BI__builtin_neon_vqdmlalh_s16: 5747 case NEON::BI__builtin_neon_vqdmlslh_s16: { 5748 SmallVector<Value *, 2> ProductOps; 5749 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 5750 ProductOps.push_back(vectorWrapScalar16(EmitScalarExpr(E->getArg(2)))); 5751 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 5752 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 5753 ProductOps, "vqdmlXl"); 5754 Constant *CI = ConstantInt::get(SizeTy, 0); 5755 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 5756 5757 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlalh_s16 5758 ? Intrinsic::aarch64_neon_sqadd 5759 : Intrinsic::aarch64_neon_sqsub; 5760 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int32Ty), Ops, "vqdmlXl"); 5761 } 5762 case NEON::BI__builtin_neon_vqshlud_n_s64: { 5763 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5764 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 5765 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqshlu, Int64Ty), 5766 Ops, "vqshlu_n"); 5767 } 5768 case NEON::BI__builtin_neon_vqshld_n_u64: 5769 case NEON::BI__builtin_neon_vqshld_n_s64: { 5770 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vqshld_n_u64 5771 ? Intrinsic::aarch64_neon_uqshl 5772 : Intrinsic::aarch64_neon_sqshl; 5773 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5774 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 5775 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vqshl_n"); 5776 } 5777 case NEON::BI__builtin_neon_vrshrd_n_u64: 5778 case NEON::BI__builtin_neon_vrshrd_n_s64: { 5779 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrshrd_n_u64 5780 ? Intrinsic::aarch64_neon_urshl 5781 : Intrinsic::aarch64_neon_srshl; 5782 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5783 int SV = cast<ConstantInt>(Ops[1])->getSExtValue(); 5784 Ops[1] = ConstantInt::get(Int64Ty, -SV); 5785 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vrshr_n"); 5786 } 5787 case NEON::BI__builtin_neon_vrsrad_n_u64: 5788 case NEON::BI__builtin_neon_vrsrad_n_s64: { 5789 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrsrad_n_u64 5790 ? Intrinsic::aarch64_neon_urshl 5791 : Intrinsic::aarch64_neon_srshl; 5792 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 5793 Ops.push_back(Builder.CreateNeg(EmitScalarExpr(E->getArg(2)))); 5794 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Int64Ty), 5795 {Ops[1], Builder.CreateSExt(Ops[2], Int64Ty)}); 5796 return Builder.CreateAdd(Ops[0], Builder.CreateBitCast(Ops[1], Int64Ty)); 5797 } 5798 case NEON::BI__builtin_neon_vshld_n_s64: 5799 case NEON::BI__builtin_neon_vshld_n_u64: { 5800 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 5801 return Builder.CreateShl( 5802 Ops[0], ConstantInt::get(Int64Ty, Amt->getZExtValue()), "shld_n"); 5803 } 5804 case NEON::BI__builtin_neon_vshrd_n_s64: { 5805 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 5806 return Builder.CreateAShr( 5807 Ops[0], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 5808 Amt->getZExtValue())), 5809 "shrd_n"); 5810 } 5811 case NEON::BI__builtin_neon_vshrd_n_u64: { 5812 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 5813 uint64_t ShiftAmt = Amt->getZExtValue(); 5814 // Right-shifting an unsigned value by its size yields 0. 5815 if (ShiftAmt == 64) 5816 return ConstantInt::get(Int64Ty, 0); 5817 return Builder.CreateLShr(Ops[0], ConstantInt::get(Int64Ty, ShiftAmt), 5818 "shrd_n"); 5819 } 5820 case NEON::BI__builtin_neon_vsrad_n_s64: { 5821 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 5822 Ops[1] = Builder.CreateAShr( 5823 Ops[1], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 5824 Amt->getZExtValue())), 5825 "shrd_n"); 5826 return Builder.CreateAdd(Ops[0], Ops[1]); 5827 } 5828 case NEON::BI__builtin_neon_vsrad_n_u64: { 5829 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 5830 uint64_t ShiftAmt = Amt->getZExtValue(); 5831 // Right-shifting an unsigned value by its size yields 0. 5832 // As Op + 0 = Op, return Ops[0] directly. 5833 if (ShiftAmt == 64) 5834 return Ops[0]; 5835 Ops[1] = Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, ShiftAmt), 5836 "shrd_n"); 5837 return Builder.CreateAdd(Ops[0], Ops[1]); 5838 } 5839 case NEON::BI__builtin_neon_vqdmlalh_lane_s16: 5840 case NEON::BI__builtin_neon_vqdmlalh_laneq_s16: 5841 case NEON::BI__builtin_neon_vqdmlslh_lane_s16: 5842 case NEON::BI__builtin_neon_vqdmlslh_laneq_s16: { 5843 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 5844 "lane"); 5845 SmallVector<Value *, 2> ProductOps; 5846 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 5847 ProductOps.push_back(vectorWrapScalar16(Ops[2])); 5848 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 5849 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 5850 ProductOps, "vqdmlXl"); 5851 Constant *CI = ConstantInt::get(SizeTy, 0); 5852 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 5853 Ops.pop_back(); 5854 5855 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlalh_lane_s16 || 5856 BuiltinID == NEON::BI__builtin_neon_vqdmlalh_laneq_s16) 5857 ? Intrinsic::aarch64_neon_sqadd 5858 : Intrinsic::aarch64_neon_sqsub; 5859 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int32Ty), Ops, "vqdmlXl"); 5860 } 5861 case NEON::BI__builtin_neon_vqdmlals_s32: 5862 case NEON::BI__builtin_neon_vqdmlsls_s32: { 5863 SmallVector<Value *, 2> ProductOps; 5864 ProductOps.push_back(Ops[1]); 5865 ProductOps.push_back(EmitScalarExpr(E->getArg(2))); 5866 Ops[1] = 5867 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 5868 ProductOps, "vqdmlXl"); 5869 5870 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlals_s32 5871 ? Intrinsic::aarch64_neon_sqadd 5872 : Intrinsic::aarch64_neon_sqsub; 5873 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int64Ty), Ops, "vqdmlXl"); 5874 } 5875 case NEON::BI__builtin_neon_vqdmlals_lane_s32: 5876 case NEON::BI__builtin_neon_vqdmlals_laneq_s32: 5877 case NEON::BI__builtin_neon_vqdmlsls_lane_s32: 5878 case NEON::BI__builtin_neon_vqdmlsls_laneq_s32: { 5879 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 5880 "lane"); 5881 SmallVector<Value *, 2> ProductOps; 5882 ProductOps.push_back(Ops[1]); 5883 ProductOps.push_back(Ops[2]); 5884 Ops[1] = 5885 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 5886 ProductOps, "vqdmlXl"); 5887 Ops.pop_back(); 5888 5889 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlals_lane_s32 || 5890 BuiltinID == NEON::BI__builtin_neon_vqdmlals_laneq_s32) 5891 ? Intrinsic::aarch64_neon_sqadd 5892 : Intrinsic::aarch64_neon_sqsub; 5893 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl"); 5894 } 5895 } 5896 5897 llvm::VectorType *VTy = GetNeonType(this, Type); 5898 llvm::Type *Ty = VTy; 5899 if (!Ty) 5900 return nullptr; 5901 5902 // Not all intrinsics handled by the common case work for AArch64 yet, so only 5903 // defer to common code if it's been added to our special map. 5904 Builtin = findNeonIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID, 5905 AArch64SIMDIntrinsicsProvenSorted); 5906 5907 if (Builtin) 5908 return EmitCommonNeonBuiltinExpr( 5909 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 5910 Builtin->NameHint, Builtin->TypeModifier, E, Ops, 5911 /*never use addresses*/ Address::invalid(), Address::invalid()); 5912 5913 if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops)) 5914 return V; 5915 5916 unsigned Int; 5917 switch (BuiltinID) { 5918 default: return nullptr; 5919 case NEON::BI__builtin_neon_vbsl_v: 5920 case NEON::BI__builtin_neon_vbslq_v: { 5921 llvm::Type *BitTy = llvm::VectorType::getInteger(VTy); 5922 Ops[0] = Builder.CreateBitCast(Ops[0], BitTy, "vbsl"); 5923 Ops[1] = Builder.CreateBitCast(Ops[1], BitTy, "vbsl"); 5924 Ops[2] = Builder.CreateBitCast(Ops[2], BitTy, "vbsl"); 5925 5926 Ops[1] = Builder.CreateAnd(Ops[0], Ops[1], "vbsl"); 5927 Ops[2] = Builder.CreateAnd(Builder.CreateNot(Ops[0]), Ops[2], "vbsl"); 5928 Ops[0] = Builder.CreateOr(Ops[1], Ops[2], "vbsl"); 5929 return Builder.CreateBitCast(Ops[0], Ty); 5930 } 5931 case NEON::BI__builtin_neon_vfma_lane_v: 5932 case NEON::BI__builtin_neon_vfmaq_lane_v: { // Only used for FP types 5933 // The ARM builtins (and instructions) have the addend as the first 5934 // operand, but the 'fma' intrinsics have it last. Swap it around here. 5935 Value *Addend = Ops[0]; 5936 Value *Multiplicand = Ops[1]; 5937 Value *LaneSource = Ops[2]; 5938 Ops[0] = Multiplicand; 5939 Ops[1] = LaneSource; 5940 Ops[2] = Addend; 5941 5942 // Now adjust things to handle the lane access. 5943 llvm::Type *SourceTy = BuiltinID == NEON::BI__builtin_neon_vfmaq_lane_v ? 5944 llvm::VectorType::get(VTy->getElementType(), VTy->getNumElements() / 2) : 5945 VTy; 5946 llvm::Constant *cst = cast<Constant>(Ops[3]); 5947 Value *SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), cst); 5948 Ops[1] = Builder.CreateBitCast(Ops[1], SourceTy); 5949 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV, "lane"); 5950 5951 Ops.pop_back(); 5952 Int = Intrinsic::fma; 5953 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmla"); 5954 } 5955 case NEON::BI__builtin_neon_vfma_laneq_v: { 5956 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 5957 // v1f64 fma should be mapped to Neon scalar f64 fma 5958 if (VTy && VTy->getElementType() == DoubleTy) { 5959 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5960 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 5961 llvm::Type *VTy = GetNeonType(this, 5962 NeonTypeFlags(NeonTypeFlags::Float64, false, true)); 5963 Ops[2] = Builder.CreateBitCast(Ops[2], VTy); 5964 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 5965 Value *F = CGM.getIntrinsic(Intrinsic::fma, DoubleTy); 5966 Value *Result = Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 5967 return Builder.CreateBitCast(Result, Ty); 5968 } 5969 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5970 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5971 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5972 5973 llvm::Type *STy = llvm::VectorType::get(VTy->getElementType(), 5974 VTy->getNumElements() * 2); 5975 Ops[2] = Builder.CreateBitCast(Ops[2], STy); 5976 Value* SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), 5977 cast<ConstantInt>(Ops[3])); 5978 Ops[2] = Builder.CreateShuffleVector(Ops[2], Ops[2], SV, "lane"); 5979 5980 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 5981 } 5982 case NEON::BI__builtin_neon_vfmaq_laneq_v: { 5983 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5984 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5985 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5986 5987 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5988 Ops[2] = EmitNeonSplat(Ops[2], cast<ConstantInt>(Ops[3])); 5989 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 5990 } 5991 case NEON::BI__builtin_neon_vfmas_lane_f32: 5992 case NEON::BI__builtin_neon_vfmas_laneq_f32: 5993 case NEON::BI__builtin_neon_vfmad_lane_f64: 5994 case NEON::BI__builtin_neon_vfmad_laneq_f64: { 5995 Ops.push_back(EmitScalarExpr(E->getArg(3))); 5996 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 5997 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5998 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 5999 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 6000 } 6001 case NEON::BI__builtin_neon_vmull_v: 6002 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6003 Int = usgn ? Intrinsic::aarch64_neon_umull : Intrinsic::aarch64_neon_smull; 6004 if (Type.isPoly()) Int = Intrinsic::aarch64_neon_pmull; 6005 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 6006 case NEON::BI__builtin_neon_vmax_v: 6007 case NEON::BI__builtin_neon_vmaxq_v: 6008 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6009 Int = usgn ? Intrinsic::aarch64_neon_umax : Intrinsic::aarch64_neon_smax; 6010 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmax; 6011 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmax"); 6012 case NEON::BI__builtin_neon_vmin_v: 6013 case NEON::BI__builtin_neon_vminq_v: 6014 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6015 Int = usgn ? Intrinsic::aarch64_neon_umin : Intrinsic::aarch64_neon_smin; 6016 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmin; 6017 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmin"); 6018 case NEON::BI__builtin_neon_vabd_v: 6019 case NEON::BI__builtin_neon_vabdq_v: 6020 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6021 Int = usgn ? Intrinsic::aarch64_neon_uabd : Intrinsic::aarch64_neon_sabd; 6022 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fabd; 6023 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vabd"); 6024 case NEON::BI__builtin_neon_vpadal_v: 6025 case NEON::BI__builtin_neon_vpadalq_v: { 6026 unsigned ArgElts = VTy->getNumElements(); 6027 llvm::IntegerType *EltTy = cast<IntegerType>(VTy->getElementType()); 6028 unsigned BitWidth = EltTy->getBitWidth(); 6029 llvm::Type *ArgTy = llvm::VectorType::get( 6030 llvm::IntegerType::get(getLLVMContext(), BitWidth/2), 2*ArgElts); 6031 llvm::Type* Tys[2] = { VTy, ArgTy }; 6032 Int = usgn ? Intrinsic::aarch64_neon_uaddlp : Intrinsic::aarch64_neon_saddlp; 6033 SmallVector<llvm::Value*, 1> TmpOps; 6034 TmpOps.push_back(Ops[1]); 6035 Function *F = CGM.getIntrinsic(Int, Tys); 6036 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vpadal"); 6037 llvm::Value *addend = Builder.CreateBitCast(Ops[0], tmp->getType()); 6038 return Builder.CreateAdd(tmp, addend); 6039 } 6040 case NEON::BI__builtin_neon_vpmin_v: 6041 case NEON::BI__builtin_neon_vpminq_v: 6042 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6043 Int = usgn ? Intrinsic::aarch64_neon_uminp : Intrinsic::aarch64_neon_sminp; 6044 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fminp; 6045 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmin"); 6046 case NEON::BI__builtin_neon_vpmax_v: 6047 case NEON::BI__builtin_neon_vpmaxq_v: 6048 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6049 Int = usgn ? Intrinsic::aarch64_neon_umaxp : Intrinsic::aarch64_neon_smaxp; 6050 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmaxp; 6051 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmax"); 6052 case NEON::BI__builtin_neon_vminnm_v: 6053 case NEON::BI__builtin_neon_vminnmq_v: 6054 Int = Intrinsic::aarch64_neon_fminnm; 6055 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vminnm"); 6056 case NEON::BI__builtin_neon_vmaxnm_v: 6057 case NEON::BI__builtin_neon_vmaxnmq_v: 6058 Int = Intrinsic::aarch64_neon_fmaxnm; 6059 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmaxnm"); 6060 case NEON::BI__builtin_neon_vrecpss_f32: { 6061 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6062 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, FloatTy), 6063 Ops, "vrecps"); 6064 } 6065 case NEON::BI__builtin_neon_vrecpsd_f64: { 6066 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6067 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, DoubleTy), 6068 Ops, "vrecps"); 6069 } 6070 case NEON::BI__builtin_neon_vqshrun_n_v: 6071 Int = Intrinsic::aarch64_neon_sqshrun; 6072 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrun_n"); 6073 case NEON::BI__builtin_neon_vqrshrun_n_v: 6074 Int = Intrinsic::aarch64_neon_sqrshrun; 6075 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrun_n"); 6076 case NEON::BI__builtin_neon_vqshrn_n_v: 6077 Int = usgn ? Intrinsic::aarch64_neon_uqshrn : Intrinsic::aarch64_neon_sqshrn; 6078 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n"); 6079 case NEON::BI__builtin_neon_vrshrn_n_v: 6080 Int = Intrinsic::aarch64_neon_rshrn; 6081 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshrn_n"); 6082 case NEON::BI__builtin_neon_vqrshrn_n_v: 6083 Int = usgn ? Intrinsic::aarch64_neon_uqrshrn : Intrinsic::aarch64_neon_sqrshrn; 6084 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n"); 6085 case NEON::BI__builtin_neon_vrnda_v: 6086 case NEON::BI__builtin_neon_vrndaq_v: { 6087 Int = Intrinsic::round; 6088 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrnda"); 6089 } 6090 case NEON::BI__builtin_neon_vrndi_v: 6091 case NEON::BI__builtin_neon_vrndiq_v: { 6092 Int = Intrinsic::nearbyint; 6093 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndi"); 6094 } 6095 case NEON::BI__builtin_neon_vrndm_v: 6096 case NEON::BI__builtin_neon_vrndmq_v: { 6097 Int = Intrinsic::floor; 6098 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndm"); 6099 } 6100 case NEON::BI__builtin_neon_vrndn_v: 6101 case NEON::BI__builtin_neon_vrndnq_v: { 6102 Int = Intrinsic::aarch64_neon_frintn; 6103 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndn"); 6104 } 6105 case NEON::BI__builtin_neon_vrndp_v: 6106 case NEON::BI__builtin_neon_vrndpq_v: { 6107 Int = Intrinsic::ceil; 6108 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndp"); 6109 } 6110 case NEON::BI__builtin_neon_vrndx_v: 6111 case NEON::BI__builtin_neon_vrndxq_v: { 6112 Int = Intrinsic::rint; 6113 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndx"); 6114 } 6115 case NEON::BI__builtin_neon_vrnd_v: 6116 case NEON::BI__builtin_neon_vrndq_v: { 6117 Int = Intrinsic::trunc; 6118 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndz"); 6119 } 6120 case NEON::BI__builtin_neon_vceqz_v: 6121 case NEON::BI__builtin_neon_vceqzq_v: 6122 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OEQ, 6123 ICmpInst::ICMP_EQ, "vceqz"); 6124 case NEON::BI__builtin_neon_vcgez_v: 6125 case NEON::BI__builtin_neon_vcgezq_v: 6126 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGE, 6127 ICmpInst::ICMP_SGE, "vcgez"); 6128 case NEON::BI__builtin_neon_vclez_v: 6129 case NEON::BI__builtin_neon_vclezq_v: 6130 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLE, 6131 ICmpInst::ICMP_SLE, "vclez"); 6132 case NEON::BI__builtin_neon_vcgtz_v: 6133 case NEON::BI__builtin_neon_vcgtzq_v: 6134 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGT, 6135 ICmpInst::ICMP_SGT, "vcgtz"); 6136 case NEON::BI__builtin_neon_vcltz_v: 6137 case NEON::BI__builtin_neon_vcltzq_v: 6138 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLT, 6139 ICmpInst::ICMP_SLT, "vcltz"); 6140 case NEON::BI__builtin_neon_vcvt_f64_v: 6141 case NEON::BI__builtin_neon_vcvtq_f64_v: 6142 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6143 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad)); 6144 return usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 6145 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 6146 case NEON::BI__builtin_neon_vcvt_f64_f32: { 6147 assert(Type.getEltType() == NeonTypeFlags::Float64 && quad && 6148 "unexpected vcvt_f64_f32 builtin"); 6149 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float32, false, false); 6150 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 6151 6152 return Builder.CreateFPExt(Ops[0], Ty, "vcvt"); 6153 } 6154 case NEON::BI__builtin_neon_vcvt_f32_f64: { 6155 assert(Type.getEltType() == NeonTypeFlags::Float32 && 6156 "unexpected vcvt_f32_f64 builtin"); 6157 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float64, false, true); 6158 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 6159 6160 return Builder.CreateFPTrunc(Ops[0], Ty, "vcvt"); 6161 } 6162 case NEON::BI__builtin_neon_vcvt_s32_v: 6163 case NEON::BI__builtin_neon_vcvt_u32_v: 6164 case NEON::BI__builtin_neon_vcvt_s64_v: 6165 case NEON::BI__builtin_neon_vcvt_u64_v: 6166 case NEON::BI__builtin_neon_vcvtq_s32_v: 6167 case NEON::BI__builtin_neon_vcvtq_u32_v: 6168 case NEON::BI__builtin_neon_vcvtq_s64_v: 6169 case NEON::BI__builtin_neon_vcvtq_u64_v: { 6170 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 6171 if (usgn) 6172 return Builder.CreateFPToUI(Ops[0], Ty); 6173 return Builder.CreateFPToSI(Ops[0], Ty); 6174 } 6175 case NEON::BI__builtin_neon_vcvta_s32_v: 6176 case NEON::BI__builtin_neon_vcvtaq_s32_v: 6177 case NEON::BI__builtin_neon_vcvta_u32_v: 6178 case NEON::BI__builtin_neon_vcvtaq_u32_v: 6179 case NEON::BI__builtin_neon_vcvta_s64_v: 6180 case NEON::BI__builtin_neon_vcvtaq_s64_v: 6181 case NEON::BI__builtin_neon_vcvta_u64_v: 6182 case NEON::BI__builtin_neon_vcvtaq_u64_v: { 6183 Int = usgn ? Intrinsic::aarch64_neon_fcvtau : Intrinsic::aarch64_neon_fcvtas; 6184 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6185 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvta"); 6186 } 6187 case NEON::BI__builtin_neon_vcvtm_s32_v: 6188 case NEON::BI__builtin_neon_vcvtmq_s32_v: 6189 case NEON::BI__builtin_neon_vcvtm_u32_v: 6190 case NEON::BI__builtin_neon_vcvtmq_u32_v: 6191 case NEON::BI__builtin_neon_vcvtm_s64_v: 6192 case NEON::BI__builtin_neon_vcvtmq_s64_v: 6193 case NEON::BI__builtin_neon_vcvtm_u64_v: 6194 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 6195 Int = usgn ? Intrinsic::aarch64_neon_fcvtmu : Intrinsic::aarch64_neon_fcvtms; 6196 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6197 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtm"); 6198 } 6199 case NEON::BI__builtin_neon_vcvtn_s32_v: 6200 case NEON::BI__builtin_neon_vcvtnq_s32_v: 6201 case NEON::BI__builtin_neon_vcvtn_u32_v: 6202 case NEON::BI__builtin_neon_vcvtnq_u32_v: 6203 case NEON::BI__builtin_neon_vcvtn_s64_v: 6204 case NEON::BI__builtin_neon_vcvtnq_s64_v: 6205 case NEON::BI__builtin_neon_vcvtn_u64_v: 6206 case NEON::BI__builtin_neon_vcvtnq_u64_v: { 6207 Int = usgn ? Intrinsic::aarch64_neon_fcvtnu : Intrinsic::aarch64_neon_fcvtns; 6208 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6209 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtn"); 6210 } 6211 case NEON::BI__builtin_neon_vcvtp_s32_v: 6212 case NEON::BI__builtin_neon_vcvtpq_s32_v: 6213 case NEON::BI__builtin_neon_vcvtp_u32_v: 6214 case NEON::BI__builtin_neon_vcvtpq_u32_v: 6215 case NEON::BI__builtin_neon_vcvtp_s64_v: 6216 case NEON::BI__builtin_neon_vcvtpq_s64_v: 6217 case NEON::BI__builtin_neon_vcvtp_u64_v: 6218 case NEON::BI__builtin_neon_vcvtpq_u64_v: { 6219 Int = usgn ? Intrinsic::aarch64_neon_fcvtpu : Intrinsic::aarch64_neon_fcvtps; 6220 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6221 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtp"); 6222 } 6223 case NEON::BI__builtin_neon_vmulx_v: 6224 case NEON::BI__builtin_neon_vmulxq_v: { 6225 Int = Intrinsic::aarch64_neon_fmulx; 6226 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmulx"); 6227 } 6228 case NEON::BI__builtin_neon_vmul_lane_v: 6229 case NEON::BI__builtin_neon_vmul_laneq_v: { 6230 // v1f64 vmul_lane should be mapped to Neon scalar mul lane 6231 bool Quad = false; 6232 if (BuiltinID == NEON::BI__builtin_neon_vmul_laneq_v) 6233 Quad = true; 6234 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 6235 llvm::Type *VTy = GetNeonType(this, 6236 NeonTypeFlags(NeonTypeFlags::Float64, false, Quad)); 6237 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 6238 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 6239 Value *Result = Builder.CreateFMul(Ops[0], Ops[1]); 6240 return Builder.CreateBitCast(Result, Ty); 6241 } 6242 case NEON::BI__builtin_neon_vnegd_s64: 6243 return Builder.CreateNeg(EmitScalarExpr(E->getArg(0)), "vnegd"); 6244 case NEON::BI__builtin_neon_vpmaxnm_v: 6245 case NEON::BI__builtin_neon_vpmaxnmq_v: { 6246 Int = Intrinsic::aarch64_neon_fmaxnmp; 6247 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmaxnm"); 6248 } 6249 case NEON::BI__builtin_neon_vpminnm_v: 6250 case NEON::BI__builtin_neon_vpminnmq_v: { 6251 Int = Intrinsic::aarch64_neon_fminnmp; 6252 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpminnm"); 6253 } 6254 case NEON::BI__builtin_neon_vsqrt_v: 6255 case NEON::BI__builtin_neon_vsqrtq_v: { 6256 Int = Intrinsic::sqrt; 6257 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6258 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqrt"); 6259 } 6260 case NEON::BI__builtin_neon_vrbit_v: 6261 case NEON::BI__builtin_neon_vrbitq_v: { 6262 Int = Intrinsic::aarch64_neon_rbit; 6263 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrbit"); 6264 } 6265 case NEON::BI__builtin_neon_vaddv_u8: 6266 // FIXME: These are handled by the AArch64 scalar code. 6267 usgn = true; 6268 // FALLTHROUGH 6269 case NEON::BI__builtin_neon_vaddv_s8: { 6270 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6271 Ty = Int32Ty; 6272 VTy = llvm::VectorType::get(Int8Ty, 8); 6273 llvm::Type *Tys[2] = { Ty, VTy }; 6274 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6275 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6276 return Builder.CreateTrunc(Ops[0], Int8Ty); 6277 } 6278 case NEON::BI__builtin_neon_vaddv_u16: 6279 usgn = true; 6280 // FALLTHROUGH 6281 case NEON::BI__builtin_neon_vaddv_s16: { 6282 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6283 Ty = Int32Ty; 6284 VTy = llvm::VectorType::get(Int16Ty, 4); 6285 llvm::Type *Tys[2] = { Ty, VTy }; 6286 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6287 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6288 return Builder.CreateTrunc(Ops[0], Int16Ty); 6289 } 6290 case NEON::BI__builtin_neon_vaddvq_u8: 6291 usgn = true; 6292 // FALLTHROUGH 6293 case NEON::BI__builtin_neon_vaddvq_s8: { 6294 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6295 Ty = Int32Ty; 6296 VTy = llvm::VectorType::get(Int8Ty, 16); 6297 llvm::Type *Tys[2] = { Ty, VTy }; 6298 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6299 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6300 return Builder.CreateTrunc(Ops[0], Int8Ty); 6301 } 6302 case NEON::BI__builtin_neon_vaddvq_u16: 6303 usgn = true; 6304 // FALLTHROUGH 6305 case NEON::BI__builtin_neon_vaddvq_s16: { 6306 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6307 Ty = Int32Ty; 6308 VTy = llvm::VectorType::get(Int16Ty, 8); 6309 llvm::Type *Tys[2] = { Ty, VTy }; 6310 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6311 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6312 return Builder.CreateTrunc(Ops[0], Int16Ty); 6313 } 6314 case NEON::BI__builtin_neon_vmaxv_u8: { 6315 Int = Intrinsic::aarch64_neon_umaxv; 6316 Ty = Int32Ty; 6317 VTy = llvm::VectorType::get(Int8Ty, 8); 6318 llvm::Type *Tys[2] = { Ty, VTy }; 6319 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6320 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6321 return Builder.CreateTrunc(Ops[0], Int8Ty); 6322 } 6323 case NEON::BI__builtin_neon_vmaxv_u16: { 6324 Int = Intrinsic::aarch64_neon_umaxv; 6325 Ty = Int32Ty; 6326 VTy = llvm::VectorType::get(Int16Ty, 4); 6327 llvm::Type *Tys[2] = { Ty, VTy }; 6328 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6329 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6330 return Builder.CreateTrunc(Ops[0], Int16Ty); 6331 } 6332 case NEON::BI__builtin_neon_vmaxvq_u8: { 6333 Int = Intrinsic::aarch64_neon_umaxv; 6334 Ty = Int32Ty; 6335 VTy = llvm::VectorType::get(Int8Ty, 16); 6336 llvm::Type *Tys[2] = { Ty, VTy }; 6337 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6338 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6339 return Builder.CreateTrunc(Ops[0], Int8Ty); 6340 } 6341 case NEON::BI__builtin_neon_vmaxvq_u16: { 6342 Int = Intrinsic::aarch64_neon_umaxv; 6343 Ty = Int32Ty; 6344 VTy = llvm::VectorType::get(Int16Ty, 8); 6345 llvm::Type *Tys[2] = { Ty, VTy }; 6346 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6347 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6348 return Builder.CreateTrunc(Ops[0], Int16Ty); 6349 } 6350 case NEON::BI__builtin_neon_vmaxv_s8: { 6351 Int = Intrinsic::aarch64_neon_smaxv; 6352 Ty = Int32Ty; 6353 VTy = llvm::VectorType::get(Int8Ty, 8); 6354 llvm::Type *Tys[2] = { Ty, VTy }; 6355 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6356 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6357 return Builder.CreateTrunc(Ops[0], Int8Ty); 6358 } 6359 case NEON::BI__builtin_neon_vmaxv_s16: { 6360 Int = Intrinsic::aarch64_neon_smaxv; 6361 Ty = Int32Ty; 6362 VTy = llvm::VectorType::get(Int16Ty, 4); 6363 llvm::Type *Tys[2] = { Ty, VTy }; 6364 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6365 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6366 return Builder.CreateTrunc(Ops[0], Int16Ty); 6367 } 6368 case NEON::BI__builtin_neon_vmaxvq_s8: { 6369 Int = Intrinsic::aarch64_neon_smaxv; 6370 Ty = Int32Ty; 6371 VTy = llvm::VectorType::get(Int8Ty, 16); 6372 llvm::Type *Tys[2] = { Ty, VTy }; 6373 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6374 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6375 return Builder.CreateTrunc(Ops[0], Int8Ty); 6376 } 6377 case NEON::BI__builtin_neon_vmaxvq_s16: { 6378 Int = Intrinsic::aarch64_neon_smaxv; 6379 Ty = Int32Ty; 6380 VTy = llvm::VectorType::get(Int16Ty, 8); 6381 llvm::Type *Tys[2] = { Ty, VTy }; 6382 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6383 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6384 return Builder.CreateTrunc(Ops[0], Int16Ty); 6385 } 6386 case NEON::BI__builtin_neon_vminv_u8: { 6387 Int = Intrinsic::aarch64_neon_uminv; 6388 Ty = Int32Ty; 6389 VTy = llvm::VectorType::get(Int8Ty, 8); 6390 llvm::Type *Tys[2] = { Ty, VTy }; 6391 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6392 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6393 return Builder.CreateTrunc(Ops[0], Int8Ty); 6394 } 6395 case NEON::BI__builtin_neon_vminv_u16: { 6396 Int = Intrinsic::aarch64_neon_uminv; 6397 Ty = Int32Ty; 6398 VTy = llvm::VectorType::get(Int16Ty, 4); 6399 llvm::Type *Tys[2] = { Ty, VTy }; 6400 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6401 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6402 return Builder.CreateTrunc(Ops[0], Int16Ty); 6403 } 6404 case NEON::BI__builtin_neon_vminvq_u8: { 6405 Int = Intrinsic::aarch64_neon_uminv; 6406 Ty = Int32Ty; 6407 VTy = llvm::VectorType::get(Int8Ty, 16); 6408 llvm::Type *Tys[2] = { Ty, VTy }; 6409 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6410 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6411 return Builder.CreateTrunc(Ops[0], Int8Ty); 6412 } 6413 case NEON::BI__builtin_neon_vminvq_u16: { 6414 Int = Intrinsic::aarch64_neon_uminv; 6415 Ty = Int32Ty; 6416 VTy = llvm::VectorType::get(Int16Ty, 8); 6417 llvm::Type *Tys[2] = { Ty, VTy }; 6418 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6419 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6420 return Builder.CreateTrunc(Ops[0], Int16Ty); 6421 } 6422 case NEON::BI__builtin_neon_vminv_s8: { 6423 Int = Intrinsic::aarch64_neon_sminv; 6424 Ty = Int32Ty; 6425 VTy = llvm::VectorType::get(Int8Ty, 8); 6426 llvm::Type *Tys[2] = { Ty, VTy }; 6427 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6428 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6429 return Builder.CreateTrunc(Ops[0], Int8Ty); 6430 } 6431 case NEON::BI__builtin_neon_vminv_s16: { 6432 Int = Intrinsic::aarch64_neon_sminv; 6433 Ty = Int32Ty; 6434 VTy = llvm::VectorType::get(Int16Ty, 4); 6435 llvm::Type *Tys[2] = { Ty, VTy }; 6436 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6437 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6438 return Builder.CreateTrunc(Ops[0], Int16Ty); 6439 } 6440 case NEON::BI__builtin_neon_vminvq_s8: { 6441 Int = Intrinsic::aarch64_neon_sminv; 6442 Ty = Int32Ty; 6443 VTy = llvm::VectorType::get(Int8Ty, 16); 6444 llvm::Type *Tys[2] = { Ty, VTy }; 6445 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6446 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6447 return Builder.CreateTrunc(Ops[0], Int8Ty); 6448 } 6449 case NEON::BI__builtin_neon_vminvq_s16: { 6450 Int = Intrinsic::aarch64_neon_sminv; 6451 Ty = Int32Ty; 6452 VTy = llvm::VectorType::get(Int16Ty, 8); 6453 llvm::Type *Tys[2] = { Ty, VTy }; 6454 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6455 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6456 return Builder.CreateTrunc(Ops[0], Int16Ty); 6457 } 6458 case NEON::BI__builtin_neon_vmul_n_f64: { 6459 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 6460 Value *RHS = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), DoubleTy); 6461 return Builder.CreateFMul(Ops[0], RHS); 6462 } 6463 case NEON::BI__builtin_neon_vaddlv_u8: { 6464 Int = Intrinsic::aarch64_neon_uaddlv; 6465 Ty = Int32Ty; 6466 VTy = llvm::VectorType::get(Int8Ty, 8); 6467 llvm::Type *Tys[2] = { Ty, VTy }; 6468 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6469 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6470 return Builder.CreateTrunc(Ops[0], Int16Ty); 6471 } 6472 case NEON::BI__builtin_neon_vaddlv_u16: { 6473 Int = Intrinsic::aarch64_neon_uaddlv; 6474 Ty = Int32Ty; 6475 VTy = llvm::VectorType::get(Int16Ty, 4); 6476 llvm::Type *Tys[2] = { Ty, VTy }; 6477 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6478 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6479 } 6480 case NEON::BI__builtin_neon_vaddlvq_u8: { 6481 Int = Intrinsic::aarch64_neon_uaddlv; 6482 Ty = Int32Ty; 6483 VTy = llvm::VectorType::get(Int8Ty, 16); 6484 llvm::Type *Tys[2] = { Ty, VTy }; 6485 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6486 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6487 return Builder.CreateTrunc(Ops[0], Int16Ty); 6488 } 6489 case NEON::BI__builtin_neon_vaddlvq_u16: { 6490 Int = Intrinsic::aarch64_neon_uaddlv; 6491 Ty = Int32Ty; 6492 VTy = llvm::VectorType::get(Int16Ty, 8); 6493 llvm::Type *Tys[2] = { Ty, VTy }; 6494 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6495 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6496 } 6497 case NEON::BI__builtin_neon_vaddlv_s8: { 6498 Int = Intrinsic::aarch64_neon_saddlv; 6499 Ty = Int32Ty; 6500 VTy = llvm::VectorType::get(Int8Ty, 8); 6501 llvm::Type *Tys[2] = { Ty, VTy }; 6502 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6503 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6504 return Builder.CreateTrunc(Ops[0], Int16Ty); 6505 } 6506 case NEON::BI__builtin_neon_vaddlv_s16: { 6507 Int = Intrinsic::aarch64_neon_saddlv; 6508 Ty = Int32Ty; 6509 VTy = llvm::VectorType::get(Int16Ty, 4); 6510 llvm::Type *Tys[2] = { Ty, VTy }; 6511 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6512 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6513 } 6514 case NEON::BI__builtin_neon_vaddlvq_s8: { 6515 Int = Intrinsic::aarch64_neon_saddlv; 6516 Ty = Int32Ty; 6517 VTy = llvm::VectorType::get(Int8Ty, 16); 6518 llvm::Type *Tys[2] = { Ty, VTy }; 6519 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6520 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6521 return Builder.CreateTrunc(Ops[0], Int16Ty); 6522 } 6523 case NEON::BI__builtin_neon_vaddlvq_s16: { 6524 Int = Intrinsic::aarch64_neon_saddlv; 6525 Ty = Int32Ty; 6526 VTy = llvm::VectorType::get(Int16Ty, 8); 6527 llvm::Type *Tys[2] = { Ty, VTy }; 6528 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6529 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6530 } 6531 case NEON::BI__builtin_neon_vsri_n_v: 6532 case NEON::BI__builtin_neon_vsriq_n_v: { 6533 Int = Intrinsic::aarch64_neon_vsri; 6534 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 6535 return EmitNeonCall(Intrin, Ops, "vsri_n"); 6536 } 6537 case NEON::BI__builtin_neon_vsli_n_v: 6538 case NEON::BI__builtin_neon_vsliq_n_v: { 6539 Int = Intrinsic::aarch64_neon_vsli; 6540 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 6541 return EmitNeonCall(Intrin, Ops, "vsli_n"); 6542 } 6543 case NEON::BI__builtin_neon_vsra_n_v: 6544 case NEON::BI__builtin_neon_vsraq_n_v: 6545 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6546 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 6547 return Builder.CreateAdd(Ops[0], Ops[1]); 6548 case NEON::BI__builtin_neon_vrsra_n_v: 6549 case NEON::BI__builtin_neon_vrsraq_n_v: { 6550 Int = usgn ? Intrinsic::aarch64_neon_urshl : Intrinsic::aarch64_neon_srshl; 6551 SmallVector<llvm::Value*,2> TmpOps; 6552 TmpOps.push_back(Ops[1]); 6553 TmpOps.push_back(Ops[2]); 6554 Function* F = CGM.getIntrinsic(Int, Ty); 6555 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vrshr_n", 1, true); 6556 Ops[0] = Builder.CreateBitCast(Ops[0], VTy); 6557 return Builder.CreateAdd(Ops[0], tmp); 6558 } 6559 // FIXME: Sharing loads & stores with 32-bit is complicated by the absence 6560 // of an Align parameter here. 6561 case NEON::BI__builtin_neon_vld1_x2_v: 6562 case NEON::BI__builtin_neon_vld1q_x2_v: 6563 case NEON::BI__builtin_neon_vld1_x3_v: 6564 case NEON::BI__builtin_neon_vld1q_x3_v: 6565 case NEON::BI__builtin_neon_vld1_x4_v: 6566 case NEON::BI__builtin_neon_vld1q_x4_v: { 6567 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 6568 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6569 llvm::Type *Tys[2] = { VTy, PTy }; 6570 unsigned Int; 6571 switch (BuiltinID) { 6572 case NEON::BI__builtin_neon_vld1_x2_v: 6573 case NEON::BI__builtin_neon_vld1q_x2_v: 6574 Int = Intrinsic::aarch64_neon_ld1x2; 6575 break; 6576 case NEON::BI__builtin_neon_vld1_x3_v: 6577 case NEON::BI__builtin_neon_vld1q_x3_v: 6578 Int = Intrinsic::aarch64_neon_ld1x3; 6579 break; 6580 case NEON::BI__builtin_neon_vld1_x4_v: 6581 case NEON::BI__builtin_neon_vld1q_x4_v: 6582 Int = Intrinsic::aarch64_neon_ld1x4; 6583 break; 6584 } 6585 Function *F = CGM.getIntrinsic(Int, Tys); 6586 Ops[1] = Builder.CreateCall(F, Ops[1], "vld1xN"); 6587 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6588 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6589 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6590 } 6591 case NEON::BI__builtin_neon_vst1_x2_v: 6592 case NEON::BI__builtin_neon_vst1q_x2_v: 6593 case NEON::BI__builtin_neon_vst1_x3_v: 6594 case NEON::BI__builtin_neon_vst1q_x3_v: 6595 case NEON::BI__builtin_neon_vst1_x4_v: 6596 case NEON::BI__builtin_neon_vst1q_x4_v: { 6597 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 6598 llvm::Type *Tys[2] = { VTy, PTy }; 6599 unsigned Int; 6600 switch (BuiltinID) { 6601 case NEON::BI__builtin_neon_vst1_x2_v: 6602 case NEON::BI__builtin_neon_vst1q_x2_v: 6603 Int = Intrinsic::aarch64_neon_st1x2; 6604 break; 6605 case NEON::BI__builtin_neon_vst1_x3_v: 6606 case NEON::BI__builtin_neon_vst1q_x3_v: 6607 Int = Intrinsic::aarch64_neon_st1x3; 6608 break; 6609 case NEON::BI__builtin_neon_vst1_x4_v: 6610 case NEON::BI__builtin_neon_vst1q_x4_v: 6611 Int = Intrinsic::aarch64_neon_st1x4; 6612 break; 6613 } 6614 std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end()); 6615 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 6616 } 6617 case NEON::BI__builtin_neon_vld1_v: 6618 case NEON::BI__builtin_neon_vld1q_v: 6619 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 6620 return Builder.CreateDefaultAlignedLoad(Ops[0]); 6621 case NEON::BI__builtin_neon_vst1_v: 6622 case NEON::BI__builtin_neon_vst1q_v: 6623 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 6624 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 6625 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6626 case NEON::BI__builtin_neon_vld1_lane_v: 6627 case NEON::BI__builtin_neon_vld1q_lane_v: 6628 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6629 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 6630 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6631 Ops[0] = Builder.CreateDefaultAlignedLoad(Ops[0]); 6632 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vld1_lane"); 6633 case NEON::BI__builtin_neon_vld1_dup_v: 6634 case NEON::BI__builtin_neon_vld1q_dup_v: { 6635 Value *V = UndefValue::get(Ty); 6636 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 6637 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6638 Ops[0] = Builder.CreateDefaultAlignedLoad(Ops[0]); 6639 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 6640 Ops[0] = Builder.CreateInsertElement(V, Ops[0], CI); 6641 return EmitNeonSplat(Ops[0], CI); 6642 } 6643 case NEON::BI__builtin_neon_vst1_lane_v: 6644 case NEON::BI__builtin_neon_vst1q_lane_v: 6645 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6646 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 6647 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6648 return Builder.CreateDefaultAlignedStore(Ops[1], 6649 Builder.CreateBitCast(Ops[0], Ty)); 6650 case NEON::BI__builtin_neon_vld2_v: 6651 case NEON::BI__builtin_neon_vld2q_v: { 6652 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 6653 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6654 llvm::Type *Tys[2] = { VTy, PTy }; 6655 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2, Tys); 6656 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 6657 Ops[0] = Builder.CreateBitCast(Ops[0], 6658 llvm::PointerType::getUnqual(Ops[1]->getType())); 6659 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6660 } 6661 case NEON::BI__builtin_neon_vld3_v: 6662 case NEON::BI__builtin_neon_vld3q_v: { 6663 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 6664 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6665 llvm::Type *Tys[2] = { VTy, PTy }; 6666 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3, Tys); 6667 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 6668 Ops[0] = Builder.CreateBitCast(Ops[0], 6669 llvm::PointerType::getUnqual(Ops[1]->getType())); 6670 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6671 } 6672 case NEON::BI__builtin_neon_vld4_v: 6673 case NEON::BI__builtin_neon_vld4q_v: { 6674 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 6675 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6676 llvm::Type *Tys[2] = { VTy, PTy }; 6677 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4, Tys); 6678 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 6679 Ops[0] = Builder.CreateBitCast(Ops[0], 6680 llvm::PointerType::getUnqual(Ops[1]->getType())); 6681 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6682 } 6683 case NEON::BI__builtin_neon_vld2_dup_v: 6684 case NEON::BI__builtin_neon_vld2q_dup_v: { 6685 llvm::Type *PTy = 6686 llvm::PointerType::getUnqual(VTy->getElementType()); 6687 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6688 llvm::Type *Tys[2] = { VTy, PTy }; 6689 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2r, Tys); 6690 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 6691 Ops[0] = Builder.CreateBitCast(Ops[0], 6692 llvm::PointerType::getUnqual(Ops[1]->getType())); 6693 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6694 } 6695 case NEON::BI__builtin_neon_vld3_dup_v: 6696 case NEON::BI__builtin_neon_vld3q_dup_v: { 6697 llvm::Type *PTy = 6698 llvm::PointerType::getUnqual(VTy->getElementType()); 6699 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6700 llvm::Type *Tys[2] = { VTy, PTy }; 6701 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3r, Tys); 6702 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 6703 Ops[0] = Builder.CreateBitCast(Ops[0], 6704 llvm::PointerType::getUnqual(Ops[1]->getType())); 6705 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6706 } 6707 case NEON::BI__builtin_neon_vld4_dup_v: 6708 case NEON::BI__builtin_neon_vld4q_dup_v: { 6709 llvm::Type *PTy = 6710 llvm::PointerType::getUnqual(VTy->getElementType()); 6711 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6712 llvm::Type *Tys[2] = { VTy, PTy }; 6713 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4r, Tys); 6714 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 6715 Ops[0] = Builder.CreateBitCast(Ops[0], 6716 llvm::PointerType::getUnqual(Ops[1]->getType())); 6717 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6718 } 6719 case NEON::BI__builtin_neon_vld2_lane_v: 6720 case NEON::BI__builtin_neon_vld2q_lane_v: { 6721 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 6722 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2lane, Tys); 6723 Ops.push_back(Ops[1]); 6724 Ops.erase(Ops.begin()+1); 6725 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6726 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6727 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 6728 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld2_lane"); 6729 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6730 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6731 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6732 } 6733 case NEON::BI__builtin_neon_vld3_lane_v: 6734 case NEON::BI__builtin_neon_vld3q_lane_v: { 6735 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 6736 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3lane, Tys); 6737 Ops.push_back(Ops[1]); 6738 Ops.erase(Ops.begin()+1); 6739 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6740 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6741 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 6742 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 6743 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld3_lane"); 6744 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6745 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6746 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6747 } 6748 case NEON::BI__builtin_neon_vld4_lane_v: 6749 case NEON::BI__builtin_neon_vld4q_lane_v: { 6750 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 6751 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4lane, Tys); 6752 Ops.push_back(Ops[1]); 6753 Ops.erase(Ops.begin()+1); 6754 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6755 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6756 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 6757 Ops[4] = Builder.CreateBitCast(Ops[4], Ty); 6758 Ops[5] = Builder.CreateZExt(Ops[5], Int64Ty); 6759 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld4_lane"); 6760 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6761 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6762 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6763 } 6764 case NEON::BI__builtin_neon_vst2_v: 6765 case NEON::BI__builtin_neon_vst2q_v: { 6766 Ops.push_back(Ops[0]); 6767 Ops.erase(Ops.begin()); 6768 llvm::Type *Tys[2] = { VTy, Ops[2]->getType() }; 6769 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2, Tys), 6770 Ops, ""); 6771 } 6772 case NEON::BI__builtin_neon_vst2_lane_v: 6773 case NEON::BI__builtin_neon_vst2q_lane_v: { 6774 Ops.push_back(Ops[0]); 6775 Ops.erase(Ops.begin()); 6776 Ops[2] = Builder.CreateZExt(Ops[2], Int64Ty); 6777 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 6778 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2lane, Tys), 6779 Ops, ""); 6780 } 6781 case NEON::BI__builtin_neon_vst3_v: 6782 case NEON::BI__builtin_neon_vst3q_v: { 6783 Ops.push_back(Ops[0]); 6784 Ops.erase(Ops.begin()); 6785 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 6786 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3, Tys), 6787 Ops, ""); 6788 } 6789 case NEON::BI__builtin_neon_vst3_lane_v: 6790 case NEON::BI__builtin_neon_vst3q_lane_v: { 6791 Ops.push_back(Ops[0]); 6792 Ops.erase(Ops.begin()); 6793 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 6794 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 6795 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3lane, Tys), 6796 Ops, ""); 6797 } 6798 case NEON::BI__builtin_neon_vst4_v: 6799 case NEON::BI__builtin_neon_vst4q_v: { 6800 Ops.push_back(Ops[0]); 6801 Ops.erase(Ops.begin()); 6802 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 6803 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4, Tys), 6804 Ops, ""); 6805 } 6806 case NEON::BI__builtin_neon_vst4_lane_v: 6807 case NEON::BI__builtin_neon_vst4q_lane_v: { 6808 Ops.push_back(Ops[0]); 6809 Ops.erase(Ops.begin()); 6810 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 6811 llvm::Type *Tys[2] = { VTy, Ops[5]->getType() }; 6812 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4lane, Tys), 6813 Ops, ""); 6814 } 6815 case NEON::BI__builtin_neon_vtrn_v: 6816 case NEON::BI__builtin_neon_vtrnq_v: { 6817 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 6818 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6819 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6820 Value *SV = nullptr; 6821 6822 for (unsigned vi = 0; vi != 2; ++vi) { 6823 SmallVector<uint32_t, 16> Indices; 6824 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 6825 Indices.push_back(i+vi); 6826 Indices.push_back(i+e+vi); 6827 } 6828 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6829 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 6830 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6831 } 6832 return SV; 6833 } 6834 case NEON::BI__builtin_neon_vuzp_v: 6835 case NEON::BI__builtin_neon_vuzpq_v: { 6836 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 6837 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6838 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6839 Value *SV = nullptr; 6840 6841 for (unsigned vi = 0; vi != 2; ++vi) { 6842 SmallVector<uint32_t, 16> Indices; 6843 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 6844 Indices.push_back(2*i+vi); 6845 6846 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6847 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 6848 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6849 } 6850 return SV; 6851 } 6852 case NEON::BI__builtin_neon_vzip_v: 6853 case NEON::BI__builtin_neon_vzipq_v: { 6854 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 6855 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6856 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6857 Value *SV = nullptr; 6858 6859 for (unsigned vi = 0; vi != 2; ++vi) { 6860 SmallVector<uint32_t, 16> Indices; 6861 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 6862 Indices.push_back((i + vi*e) >> 1); 6863 Indices.push_back(((i + vi*e) >> 1)+e); 6864 } 6865 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6866 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 6867 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6868 } 6869 return SV; 6870 } 6871 case NEON::BI__builtin_neon_vqtbl1q_v: { 6872 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl1, Ty), 6873 Ops, "vtbl1"); 6874 } 6875 case NEON::BI__builtin_neon_vqtbl2q_v: { 6876 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl2, Ty), 6877 Ops, "vtbl2"); 6878 } 6879 case NEON::BI__builtin_neon_vqtbl3q_v: { 6880 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl3, Ty), 6881 Ops, "vtbl3"); 6882 } 6883 case NEON::BI__builtin_neon_vqtbl4q_v: { 6884 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl4, Ty), 6885 Ops, "vtbl4"); 6886 } 6887 case NEON::BI__builtin_neon_vqtbx1q_v: { 6888 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx1, Ty), 6889 Ops, "vtbx1"); 6890 } 6891 case NEON::BI__builtin_neon_vqtbx2q_v: { 6892 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx2, Ty), 6893 Ops, "vtbx2"); 6894 } 6895 case NEON::BI__builtin_neon_vqtbx3q_v: { 6896 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx3, Ty), 6897 Ops, "vtbx3"); 6898 } 6899 case NEON::BI__builtin_neon_vqtbx4q_v: { 6900 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx4, Ty), 6901 Ops, "vtbx4"); 6902 } 6903 case NEON::BI__builtin_neon_vsqadd_v: 6904 case NEON::BI__builtin_neon_vsqaddq_v: { 6905 Int = Intrinsic::aarch64_neon_usqadd; 6906 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqadd"); 6907 } 6908 case NEON::BI__builtin_neon_vuqadd_v: 6909 case NEON::BI__builtin_neon_vuqaddq_v: { 6910 Int = Intrinsic::aarch64_neon_suqadd; 6911 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vuqadd"); 6912 } 6913 } 6914 } 6915 6916 llvm::Value *CodeGenFunction:: 6917 BuildVector(ArrayRef<llvm::Value*> Ops) { 6918 assert((Ops.size() & (Ops.size() - 1)) == 0 && 6919 "Not a power-of-two sized vector!"); 6920 bool AllConstants = true; 6921 for (unsigned i = 0, e = Ops.size(); i != e && AllConstants; ++i) 6922 AllConstants &= isa<Constant>(Ops[i]); 6923 6924 // If this is a constant vector, create a ConstantVector. 6925 if (AllConstants) { 6926 SmallVector<llvm::Constant*, 16> CstOps; 6927 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 6928 CstOps.push_back(cast<Constant>(Ops[i])); 6929 return llvm::ConstantVector::get(CstOps); 6930 } 6931 6932 // Otherwise, insertelement the values to build the vector. 6933 Value *Result = 6934 llvm::UndefValue::get(llvm::VectorType::get(Ops[0]->getType(), Ops.size())); 6935 6936 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 6937 Result = Builder.CreateInsertElement(Result, Ops[i], Builder.getInt32(i)); 6938 6939 return Result; 6940 } 6941 6942 // Convert the mask from an integer type to a vector of i1. 6943 static Value *getMaskVecValue(CodeGenFunction &CGF, Value *Mask, 6944 unsigned NumElts) { 6945 6946 llvm::VectorType *MaskTy = llvm::VectorType::get(CGF.Builder.getInt1Ty(), 6947 cast<IntegerType>(Mask->getType())->getBitWidth()); 6948 Value *MaskVec = CGF.Builder.CreateBitCast(Mask, MaskTy); 6949 6950 // If we have less than 8 elements, then the starting mask was an i8 and 6951 // we need to extract down to the right number of elements. 6952 if (NumElts < 8) { 6953 uint32_t Indices[4]; 6954 for (unsigned i = 0; i != NumElts; ++i) 6955 Indices[i] = i; 6956 MaskVec = CGF.Builder.CreateShuffleVector(MaskVec, MaskVec, 6957 makeArrayRef(Indices, NumElts), 6958 "extract"); 6959 } 6960 return MaskVec; 6961 } 6962 6963 static Value *EmitX86MaskedStore(CodeGenFunction &CGF, 6964 SmallVectorImpl<Value *> &Ops, 6965 unsigned Align) { 6966 // Cast the pointer to right type. 6967 Ops[0] = CGF.Builder.CreateBitCast(Ops[0], 6968 llvm::PointerType::getUnqual(Ops[1]->getType())); 6969 6970 // If the mask is all ones just emit a regular store. 6971 if (const auto *C = dyn_cast<Constant>(Ops[2])) 6972 if (C->isAllOnesValue()) 6973 return CGF.Builder.CreateAlignedStore(Ops[1], Ops[0], Align); 6974 6975 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 6976 Ops[1]->getType()->getVectorNumElements()); 6977 6978 return CGF.Builder.CreateMaskedStore(Ops[1], Ops[0], Align, MaskVec); 6979 } 6980 6981 static Value *EmitX86MaskedLoad(CodeGenFunction &CGF, 6982 SmallVectorImpl<Value *> &Ops, unsigned Align) { 6983 // Cast the pointer to right type. 6984 Ops[0] = CGF.Builder.CreateBitCast(Ops[0], 6985 llvm::PointerType::getUnqual(Ops[1]->getType())); 6986 6987 // If the mask is all ones just emit a regular store. 6988 if (const auto *C = dyn_cast<Constant>(Ops[2])) 6989 if (C->isAllOnesValue()) 6990 return CGF.Builder.CreateAlignedLoad(Ops[0], Align); 6991 6992 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 6993 Ops[1]->getType()->getVectorNumElements()); 6994 6995 return CGF.Builder.CreateMaskedLoad(Ops[0], Align, MaskVec, Ops[1]); 6996 } 6997 6998 static Value *EmitX86SubVectorBroadcast(CodeGenFunction &CGF, 6999 SmallVectorImpl<Value *> &Ops, 7000 llvm::Type *DstTy, 7001 unsigned SrcSizeInBits, 7002 unsigned Align) { 7003 // Load the subvector. 7004 Ops[0] = CGF.Builder.CreateAlignedLoad(Ops[0], Align); 7005 7006 // Create broadcast mask. 7007 unsigned NumDstElts = DstTy->getVectorNumElements(); 7008 unsigned NumSrcElts = SrcSizeInBits / DstTy->getScalarSizeInBits(); 7009 7010 SmallVector<uint32_t, 8> Mask; 7011 for (unsigned i = 0; i != NumDstElts; i += NumSrcElts) 7012 for (unsigned j = 0; j != NumSrcElts; ++j) 7013 Mask.push_back(j); 7014 7015 return CGF.Builder.CreateShuffleVector(Ops[0], Ops[0], Mask, "subvecbcst"); 7016 } 7017 7018 static Value *EmitX86Select(CodeGenFunction &CGF, 7019 Value *Mask, Value *Op0, Value *Op1) { 7020 7021 // If the mask is all ones just return first argument. 7022 if (const auto *C = dyn_cast<Constant>(Mask)) 7023 if (C->isAllOnesValue()) 7024 return Op0; 7025 7026 Mask = getMaskVecValue(CGF, Mask, Op0->getType()->getVectorNumElements()); 7027 7028 return CGF.Builder.CreateSelect(Mask, Op0, Op1); 7029 } 7030 7031 static Value *EmitX86MaskedCompare(CodeGenFunction &CGF, unsigned CC, 7032 bool Signed, SmallVectorImpl<Value *> &Ops) { 7033 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 7034 Value *Cmp; 7035 7036 if (CC == 3) { 7037 Cmp = Constant::getNullValue( 7038 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 7039 } else if (CC == 7) { 7040 Cmp = Constant::getAllOnesValue( 7041 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 7042 } else { 7043 ICmpInst::Predicate Pred; 7044 switch (CC) { 7045 default: llvm_unreachable("Unknown condition code"); 7046 case 0: Pred = ICmpInst::ICMP_EQ; break; 7047 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 7048 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 7049 case 4: Pred = ICmpInst::ICMP_NE; break; 7050 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 7051 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 7052 } 7053 Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 7054 } 7055 7056 const auto *C = dyn_cast<Constant>(Ops.back()); 7057 if (!C || !C->isAllOnesValue()) 7058 Cmp = CGF.Builder.CreateAnd(Cmp, getMaskVecValue(CGF, Ops.back(), NumElts)); 7059 7060 if (NumElts < 8) { 7061 uint32_t Indices[8]; 7062 for (unsigned i = 0; i != NumElts; ++i) 7063 Indices[i] = i; 7064 for (unsigned i = NumElts; i != 8; ++i) 7065 Indices[i] = i % NumElts + NumElts; 7066 Cmp = CGF.Builder.CreateShuffleVector( 7067 Cmp, llvm::Constant::getNullValue(Cmp->getType()), Indices); 7068 } 7069 return CGF.Builder.CreateBitCast(Cmp, 7070 IntegerType::get(CGF.getLLVMContext(), 7071 std::max(NumElts, 8U))); 7072 } 7073 7074 static Value *EmitX86MinMax(CodeGenFunction &CGF, ICmpInst::Predicate Pred, 7075 ArrayRef<Value *> Ops) { 7076 Value *Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 7077 Value *Res = CGF.Builder.CreateSelect(Cmp, Ops[0], Ops[1]); 7078 7079 if (Ops.size() == 2) 7080 return Res; 7081 7082 assert(Ops.size() == 4); 7083 return EmitX86Select(CGF, Ops[3], Res, Ops[2]); 7084 } 7085 7086 Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, 7087 const CallExpr *E) { 7088 if (BuiltinID == X86::BI__builtin_ms_va_start || 7089 BuiltinID == X86::BI__builtin_ms_va_end) 7090 return EmitVAStartEnd(EmitMSVAListRef(E->getArg(0)).getPointer(), 7091 BuiltinID == X86::BI__builtin_ms_va_start); 7092 if (BuiltinID == X86::BI__builtin_ms_va_copy) { 7093 // Lower this manually. We can't reliably determine whether or not any 7094 // given va_copy() is for a Win64 va_list from the calling convention 7095 // alone, because it's legal to do this from a System V ABI function. 7096 // With opaque pointer types, we won't have enough information in LLVM 7097 // IR to determine this from the argument types, either. Best to do it 7098 // now, while we have enough information. 7099 Address DestAddr = EmitMSVAListRef(E->getArg(0)); 7100 Address SrcAddr = EmitMSVAListRef(E->getArg(1)); 7101 7102 llvm::Type *BPP = Int8PtrPtrTy; 7103 7104 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), BPP, "cp"), 7105 DestAddr.getAlignment()); 7106 SrcAddr = Address(Builder.CreateBitCast(SrcAddr.getPointer(), BPP, "ap"), 7107 SrcAddr.getAlignment()); 7108 7109 Value *ArgPtr = Builder.CreateLoad(SrcAddr, "ap.val"); 7110 return Builder.CreateStore(ArgPtr, DestAddr); 7111 } 7112 7113 SmallVector<Value*, 4> Ops; 7114 7115 // Find out if any arguments are required to be integer constant expressions. 7116 unsigned ICEArguments = 0; 7117 ASTContext::GetBuiltinTypeError Error; 7118 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 7119 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 7120 7121 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) { 7122 // If this is a normal argument, just emit it as a scalar. 7123 if ((ICEArguments & (1 << i)) == 0) { 7124 Ops.push_back(EmitScalarExpr(E->getArg(i))); 7125 continue; 7126 } 7127 7128 // If this is required to be a constant, constant fold it so that we know 7129 // that the generated intrinsic gets a ConstantInt. 7130 llvm::APSInt Result; 7131 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 7132 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 7133 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 7134 } 7135 7136 // These exist so that the builtin that takes an immediate can be bounds 7137 // checked by clang to avoid passing bad immediates to the backend. Since 7138 // AVX has a larger immediate than SSE we would need separate builtins to 7139 // do the different bounds checking. Rather than create a clang specific 7140 // SSE only builtin, this implements eight separate builtins to match gcc 7141 // implementation. 7142 auto getCmpIntrinsicCall = [this, &Ops](Intrinsic::ID ID, unsigned Imm) { 7143 Ops.push_back(llvm::ConstantInt::get(Int8Ty, Imm)); 7144 llvm::Function *F = CGM.getIntrinsic(ID); 7145 return Builder.CreateCall(F, Ops); 7146 }; 7147 7148 // For the vector forms of FP comparisons, translate the builtins directly to 7149 // IR. 7150 // TODO: The builtins could be removed if the SSE header files used vector 7151 // extension comparisons directly (vector ordered/unordered may need 7152 // additional support via __builtin_isnan()). 7153 auto getVectorFCmpIR = [this, &Ops](CmpInst::Predicate Pred) { 7154 Value *Cmp = Builder.CreateFCmp(Pred, Ops[0], Ops[1]); 7155 llvm::VectorType *FPVecTy = cast<llvm::VectorType>(Ops[0]->getType()); 7156 llvm::VectorType *IntVecTy = llvm::VectorType::getInteger(FPVecTy); 7157 Value *Sext = Builder.CreateSExt(Cmp, IntVecTy); 7158 return Builder.CreateBitCast(Sext, FPVecTy); 7159 }; 7160 7161 switch (BuiltinID) { 7162 default: return nullptr; 7163 case X86::BI__builtin_cpu_supports: { 7164 const Expr *FeatureExpr = E->getArg(0)->IgnoreParenCasts(); 7165 StringRef FeatureStr = cast<StringLiteral>(FeatureExpr)->getString(); 7166 7167 // TODO: When/if this becomes more than x86 specific then use a TargetInfo 7168 // based mapping. 7169 // Processor features and mapping to processor feature value. 7170 enum X86Features { 7171 CMOV = 0, 7172 MMX, 7173 POPCNT, 7174 SSE, 7175 SSE2, 7176 SSE3, 7177 SSSE3, 7178 SSE4_1, 7179 SSE4_2, 7180 AVX, 7181 AVX2, 7182 SSE4_A, 7183 FMA4, 7184 XOP, 7185 FMA, 7186 AVX512F, 7187 BMI, 7188 BMI2, 7189 AES, 7190 PCLMUL, 7191 AVX512VL, 7192 AVX512BW, 7193 AVX512DQ, 7194 AVX512CD, 7195 AVX512ER, 7196 AVX512PF, 7197 AVX512VBMI, 7198 AVX512IFMA, 7199 MAX 7200 }; 7201 7202 X86Features Feature = StringSwitch<X86Features>(FeatureStr) 7203 .Case("cmov", X86Features::CMOV) 7204 .Case("mmx", X86Features::MMX) 7205 .Case("popcnt", X86Features::POPCNT) 7206 .Case("sse", X86Features::SSE) 7207 .Case("sse2", X86Features::SSE2) 7208 .Case("sse3", X86Features::SSE3) 7209 .Case("ssse3", X86Features::SSSE3) 7210 .Case("sse4.1", X86Features::SSE4_1) 7211 .Case("sse4.2", X86Features::SSE4_2) 7212 .Case("avx", X86Features::AVX) 7213 .Case("avx2", X86Features::AVX2) 7214 .Case("sse4a", X86Features::SSE4_A) 7215 .Case("fma4", X86Features::FMA4) 7216 .Case("xop", X86Features::XOP) 7217 .Case("fma", X86Features::FMA) 7218 .Case("avx512f", X86Features::AVX512F) 7219 .Case("bmi", X86Features::BMI) 7220 .Case("bmi2", X86Features::BMI2) 7221 .Case("aes", X86Features::AES) 7222 .Case("pclmul", X86Features::PCLMUL) 7223 .Case("avx512vl", X86Features::AVX512VL) 7224 .Case("avx512bw", X86Features::AVX512BW) 7225 .Case("avx512dq", X86Features::AVX512DQ) 7226 .Case("avx512cd", X86Features::AVX512CD) 7227 .Case("avx512er", X86Features::AVX512ER) 7228 .Case("avx512pf", X86Features::AVX512PF) 7229 .Case("avx512vbmi", X86Features::AVX512VBMI) 7230 .Case("avx512ifma", X86Features::AVX512IFMA) 7231 .Default(X86Features::MAX); 7232 assert(Feature != X86Features::MAX && "Invalid feature!"); 7233 7234 // Matching the struct layout from the compiler-rt/libgcc structure that is 7235 // filled in: 7236 // unsigned int __cpu_vendor; 7237 // unsigned int __cpu_type; 7238 // unsigned int __cpu_subtype; 7239 // unsigned int __cpu_features[1]; 7240 llvm::Type *STy = llvm::StructType::get( 7241 Int32Ty, Int32Ty, Int32Ty, llvm::ArrayType::get(Int32Ty, 1), nullptr); 7242 7243 // Grab the global __cpu_model. 7244 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 7245 7246 // Grab the first (0th) element from the field __cpu_features off of the 7247 // global in the struct STy. 7248 Value *Idxs[] = { 7249 ConstantInt::get(Int32Ty, 0), 7250 ConstantInt::get(Int32Ty, 3), 7251 ConstantInt::get(Int32Ty, 0) 7252 }; 7253 Value *CpuFeatures = Builder.CreateGEP(STy, CpuModel, Idxs); 7254 Value *Features = Builder.CreateAlignedLoad(CpuFeatures, 7255 CharUnits::fromQuantity(4)); 7256 7257 // Check the value of the bit corresponding to the feature requested. 7258 Value *Bitset = Builder.CreateAnd( 7259 Features, llvm::ConstantInt::get(Int32Ty, 1ULL << Feature)); 7260 return Builder.CreateICmpNE(Bitset, llvm::ConstantInt::get(Int32Ty, 0)); 7261 } 7262 case X86::BI_mm_prefetch: { 7263 Value *Address = Ops[0]; 7264 Value *RW = ConstantInt::get(Int32Ty, 0); 7265 Value *Locality = Ops[1]; 7266 Value *Data = ConstantInt::get(Int32Ty, 1); 7267 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 7268 return Builder.CreateCall(F, {Address, RW, Locality, Data}); 7269 } 7270 case X86::BI_mm_clflush: { 7271 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_clflush), 7272 Ops[0]); 7273 } 7274 case X86::BI_mm_lfence: { 7275 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_lfence)); 7276 } 7277 case X86::BI_mm_mfence: { 7278 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_mfence)); 7279 } 7280 case X86::BI_mm_sfence: { 7281 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_sfence)); 7282 } 7283 case X86::BI_mm_pause: { 7284 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_pause)); 7285 } 7286 case X86::BI__rdtsc: { 7287 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_rdtsc)); 7288 } 7289 case X86::BI__builtin_ia32_undef128: 7290 case X86::BI__builtin_ia32_undef256: 7291 case X86::BI__builtin_ia32_undef512: 7292 return UndefValue::get(ConvertType(E->getType())); 7293 case X86::BI__builtin_ia32_vec_init_v8qi: 7294 case X86::BI__builtin_ia32_vec_init_v4hi: 7295 case X86::BI__builtin_ia32_vec_init_v2si: 7296 return Builder.CreateBitCast(BuildVector(Ops), 7297 llvm::Type::getX86_MMXTy(getLLVMContext())); 7298 case X86::BI__builtin_ia32_vec_ext_v2si: 7299 return Builder.CreateExtractElement(Ops[0], 7300 llvm::ConstantInt::get(Ops[1]->getType(), 0)); 7301 case X86::BI_mm_setcsr: 7302 case X86::BI__builtin_ia32_ldmxcsr: { 7303 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 7304 Builder.CreateStore(Ops[0], Tmp); 7305 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_ldmxcsr), 7306 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 7307 } 7308 case X86::BI_mm_getcsr: 7309 case X86::BI__builtin_ia32_stmxcsr: { 7310 Address Tmp = CreateMemTemp(E->getType()); 7311 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_stmxcsr), 7312 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 7313 return Builder.CreateLoad(Tmp, "stmxcsr"); 7314 } 7315 case X86::BI__builtin_ia32_xsave: 7316 case X86::BI__builtin_ia32_xsave64: 7317 case X86::BI__builtin_ia32_xrstor: 7318 case X86::BI__builtin_ia32_xrstor64: 7319 case X86::BI__builtin_ia32_xsaveopt: 7320 case X86::BI__builtin_ia32_xsaveopt64: 7321 case X86::BI__builtin_ia32_xrstors: 7322 case X86::BI__builtin_ia32_xrstors64: 7323 case X86::BI__builtin_ia32_xsavec: 7324 case X86::BI__builtin_ia32_xsavec64: 7325 case X86::BI__builtin_ia32_xsaves: 7326 case X86::BI__builtin_ia32_xsaves64: { 7327 Intrinsic::ID ID; 7328 #define INTRINSIC_X86_XSAVE_ID(NAME) \ 7329 case X86::BI__builtin_ia32_##NAME: \ 7330 ID = Intrinsic::x86_##NAME; \ 7331 break 7332 switch (BuiltinID) { 7333 default: llvm_unreachable("Unsupported intrinsic!"); 7334 INTRINSIC_X86_XSAVE_ID(xsave); 7335 INTRINSIC_X86_XSAVE_ID(xsave64); 7336 INTRINSIC_X86_XSAVE_ID(xrstor); 7337 INTRINSIC_X86_XSAVE_ID(xrstor64); 7338 INTRINSIC_X86_XSAVE_ID(xsaveopt); 7339 INTRINSIC_X86_XSAVE_ID(xsaveopt64); 7340 INTRINSIC_X86_XSAVE_ID(xrstors); 7341 INTRINSIC_X86_XSAVE_ID(xrstors64); 7342 INTRINSIC_X86_XSAVE_ID(xsavec); 7343 INTRINSIC_X86_XSAVE_ID(xsavec64); 7344 INTRINSIC_X86_XSAVE_ID(xsaves); 7345 INTRINSIC_X86_XSAVE_ID(xsaves64); 7346 } 7347 #undef INTRINSIC_X86_XSAVE_ID 7348 Value *Mhi = Builder.CreateTrunc( 7349 Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, 32)), Int32Ty); 7350 Value *Mlo = Builder.CreateTrunc(Ops[1], Int32Ty); 7351 Ops[1] = Mhi; 7352 Ops.push_back(Mlo); 7353 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 7354 } 7355 case X86::BI__builtin_ia32_storedqudi128_mask: 7356 case X86::BI__builtin_ia32_storedqusi128_mask: 7357 case X86::BI__builtin_ia32_storedquhi128_mask: 7358 case X86::BI__builtin_ia32_storedquqi128_mask: 7359 case X86::BI__builtin_ia32_storeupd128_mask: 7360 case X86::BI__builtin_ia32_storeups128_mask: 7361 case X86::BI__builtin_ia32_storedqudi256_mask: 7362 case X86::BI__builtin_ia32_storedqusi256_mask: 7363 case X86::BI__builtin_ia32_storedquhi256_mask: 7364 case X86::BI__builtin_ia32_storedquqi256_mask: 7365 case X86::BI__builtin_ia32_storeupd256_mask: 7366 case X86::BI__builtin_ia32_storeups256_mask: 7367 case X86::BI__builtin_ia32_storedqudi512_mask: 7368 case X86::BI__builtin_ia32_storedqusi512_mask: 7369 case X86::BI__builtin_ia32_storedquhi512_mask: 7370 case X86::BI__builtin_ia32_storedquqi512_mask: 7371 case X86::BI__builtin_ia32_storeupd512_mask: 7372 case X86::BI__builtin_ia32_storeups512_mask: 7373 return EmitX86MaskedStore(*this, Ops, 1); 7374 7375 case X86::BI__builtin_ia32_storess128_mask: 7376 case X86::BI__builtin_ia32_storesd128_mask: { 7377 return EmitX86MaskedStore(*this, Ops, 16); 7378 } 7379 case X86::BI__builtin_ia32_movdqa32store128_mask: 7380 case X86::BI__builtin_ia32_movdqa64store128_mask: 7381 case X86::BI__builtin_ia32_storeaps128_mask: 7382 case X86::BI__builtin_ia32_storeapd128_mask: 7383 case X86::BI__builtin_ia32_movdqa32store256_mask: 7384 case X86::BI__builtin_ia32_movdqa64store256_mask: 7385 case X86::BI__builtin_ia32_storeaps256_mask: 7386 case X86::BI__builtin_ia32_storeapd256_mask: 7387 case X86::BI__builtin_ia32_movdqa32store512_mask: 7388 case X86::BI__builtin_ia32_movdqa64store512_mask: 7389 case X86::BI__builtin_ia32_storeaps512_mask: 7390 case X86::BI__builtin_ia32_storeapd512_mask: { 7391 unsigned Align = 7392 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 7393 return EmitX86MaskedStore(*this, Ops, Align); 7394 } 7395 case X86::BI__builtin_ia32_loadups128_mask: 7396 case X86::BI__builtin_ia32_loadups256_mask: 7397 case X86::BI__builtin_ia32_loadups512_mask: 7398 case X86::BI__builtin_ia32_loadupd128_mask: 7399 case X86::BI__builtin_ia32_loadupd256_mask: 7400 case X86::BI__builtin_ia32_loadupd512_mask: 7401 case X86::BI__builtin_ia32_loaddquqi128_mask: 7402 case X86::BI__builtin_ia32_loaddquqi256_mask: 7403 case X86::BI__builtin_ia32_loaddquqi512_mask: 7404 case X86::BI__builtin_ia32_loaddquhi128_mask: 7405 case X86::BI__builtin_ia32_loaddquhi256_mask: 7406 case X86::BI__builtin_ia32_loaddquhi512_mask: 7407 case X86::BI__builtin_ia32_loaddqusi128_mask: 7408 case X86::BI__builtin_ia32_loaddqusi256_mask: 7409 case X86::BI__builtin_ia32_loaddqusi512_mask: 7410 case X86::BI__builtin_ia32_loaddqudi128_mask: 7411 case X86::BI__builtin_ia32_loaddqudi256_mask: 7412 case X86::BI__builtin_ia32_loaddqudi512_mask: 7413 return EmitX86MaskedLoad(*this, Ops, 1); 7414 7415 case X86::BI__builtin_ia32_loadss128_mask: 7416 case X86::BI__builtin_ia32_loadsd128_mask: 7417 return EmitX86MaskedLoad(*this, Ops, 16); 7418 7419 case X86::BI__builtin_ia32_loadaps128_mask: 7420 case X86::BI__builtin_ia32_loadaps256_mask: 7421 case X86::BI__builtin_ia32_loadaps512_mask: 7422 case X86::BI__builtin_ia32_loadapd128_mask: 7423 case X86::BI__builtin_ia32_loadapd256_mask: 7424 case X86::BI__builtin_ia32_loadapd512_mask: 7425 case X86::BI__builtin_ia32_movdqa32load128_mask: 7426 case X86::BI__builtin_ia32_movdqa32load256_mask: 7427 case X86::BI__builtin_ia32_movdqa32load512_mask: 7428 case X86::BI__builtin_ia32_movdqa64load128_mask: 7429 case X86::BI__builtin_ia32_movdqa64load256_mask: 7430 case X86::BI__builtin_ia32_movdqa64load512_mask: { 7431 unsigned Align = 7432 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 7433 return EmitX86MaskedLoad(*this, Ops, Align); 7434 } 7435 7436 case X86::BI__builtin_ia32_vbroadcastf128_pd256: 7437 case X86::BI__builtin_ia32_vbroadcastf128_ps256: { 7438 llvm::Type *DstTy = ConvertType(E->getType()); 7439 return EmitX86SubVectorBroadcast(*this, Ops, DstTy, 128, 1); 7440 } 7441 7442 case X86::BI__builtin_ia32_storehps: 7443 case X86::BI__builtin_ia32_storelps: { 7444 llvm::Type *PtrTy = llvm::PointerType::getUnqual(Int64Ty); 7445 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 2); 7446 7447 // cast val v2i64 7448 Ops[1] = Builder.CreateBitCast(Ops[1], VecTy, "cast"); 7449 7450 // extract (0, 1) 7451 unsigned Index = BuiltinID == X86::BI__builtin_ia32_storelps ? 0 : 1; 7452 llvm::Value *Idx = llvm::ConstantInt::get(SizeTy, Index); 7453 Ops[1] = Builder.CreateExtractElement(Ops[1], Idx, "extract"); 7454 7455 // cast pointer to i64 & store 7456 Ops[0] = Builder.CreateBitCast(Ops[0], PtrTy); 7457 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7458 } 7459 case X86::BI__builtin_ia32_palignr128: 7460 case X86::BI__builtin_ia32_palignr256: 7461 case X86::BI__builtin_ia32_palignr512_mask: { 7462 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 7463 7464 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 7465 assert(NumElts % 16 == 0); 7466 7467 // If palignr is shifting the pair of vectors more than the size of two 7468 // lanes, emit zero. 7469 if (ShiftVal >= 32) 7470 return llvm::Constant::getNullValue(ConvertType(E->getType())); 7471 7472 // If palignr is shifting the pair of input vectors more than one lane, 7473 // but less than two lanes, convert to shifting in zeroes. 7474 if (ShiftVal > 16) { 7475 ShiftVal -= 16; 7476 Ops[1] = Ops[0]; 7477 Ops[0] = llvm::Constant::getNullValue(Ops[0]->getType()); 7478 } 7479 7480 uint32_t Indices[64]; 7481 // 256-bit palignr operates on 128-bit lanes so we need to handle that 7482 for (unsigned l = 0; l != NumElts; l += 16) { 7483 for (unsigned i = 0; i != 16; ++i) { 7484 unsigned Idx = ShiftVal + i; 7485 if (Idx >= 16) 7486 Idx += NumElts - 16; // End of lane, switch operand. 7487 Indices[l + i] = Idx + l; 7488 } 7489 } 7490 7491 Value *Align = Builder.CreateShuffleVector(Ops[1], Ops[0], 7492 makeArrayRef(Indices, NumElts), 7493 "palignr"); 7494 7495 // If this isn't a masked builtin, just return the align operation. 7496 if (Ops.size() == 3) 7497 return Align; 7498 7499 return EmitX86Select(*this, Ops[4], Align, Ops[3]); 7500 } 7501 7502 case X86::BI__builtin_ia32_movnti: 7503 case X86::BI__builtin_ia32_movnti64: 7504 case X86::BI__builtin_ia32_movntsd: 7505 case X86::BI__builtin_ia32_movntss: { 7506 llvm::MDNode *Node = llvm::MDNode::get( 7507 getLLVMContext(), llvm::ConstantAsMetadata::get(Builder.getInt32(1))); 7508 7509 Value *Ptr = Ops[0]; 7510 Value *Src = Ops[1]; 7511 7512 // Extract the 0'th element of the source vector. 7513 if (BuiltinID == X86::BI__builtin_ia32_movntsd || 7514 BuiltinID == X86::BI__builtin_ia32_movntss) 7515 Src = Builder.CreateExtractElement(Src, (uint64_t)0, "extract"); 7516 7517 // Convert the type of the pointer to a pointer to the stored type. 7518 Value *BC = Builder.CreateBitCast( 7519 Ptr, llvm::PointerType::getUnqual(Src->getType()), "cast"); 7520 7521 // Unaligned nontemporal store of the scalar value. 7522 StoreInst *SI = Builder.CreateDefaultAlignedStore(Src, BC); 7523 SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); 7524 SI->setAlignment(1); 7525 return SI; 7526 } 7527 7528 case X86::BI__builtin_ia32_selectb_128: 7529 case X86::BI__builtin_ia32_selectb_256: 7530 case X86::BI__builtin_ia32_selectb_512: 7531 case X86::BI__builtin_ia32_selectw_128: 7532 case X86::BI__builtin_ia32_selectw_256: 7533 case X86::BI__builtin_ia32_selectw_512: 7534 case X86::BI__builtin_ia32_selectd_128: 7535 case X86::BI__builtin_ia32_selectd_256: 7536 case X86::BI__builtin_ia32_selectd_512: 7537 case X86::BI__builtin_ia32_selectq_128: 7538 case X86::BI__builtin_ia32_selectq_256: 7539 case X86::BI__builtin_ia32_selectq_512: 7540 case X86::BI__builtin_ia32_selectps_128: 7541 case X86::BI__builtin_ia32_selectps_256: 7542 case X86::BI__builtin_ia32_selectps_512: 7543 case X86::BI__builtin_ia32_selectpd_128: 7544 case X86::BI__builtin_ia32_selectpd_256: 7545 case X86::BI__builtin_ia32_selectpd_512: 7546 return EmitX86Select(*this, Ops[0], Ops[1], Ops[2]); 7547 case X86::BI__builtin_ia32_pcmpeqb128_mask: 7548 case X86::BI__builtin_ia32_pcmpeqb256_mask: 7549 case X86::BI__builtin_ia32_pcmpeqb512_mask: 7550 case X86::BI__builtin_ia32_pcmpeqw128_mask: 7551 case X86::BI__builtin_ia32_pcmpeqw256_mask: 7552 case X86::BI__builtin_ia32_pcmpeqw512_mask: 7553 case X86::BI__builtin_ia32_pcmpeqd128_mask: 7554 case X86::BI__builtin_ia32_pcmpeqd256_mask: 7555 case X86::BI__builtin_ia32_pcmpeqd512_mask: 7556 case X86::BI__builtin_ia32_pcmpeqq128_mask: 7557 case X86::BI__builtin_ia32_pcmpeqq256_mask: 7558 case X86::BI__builtin_ia32_pcmpeqq512_mask: 7559 return EmitX86MaskedCompare(*this, 0, false, Ops); 7560 case X86::BI__builtin_ia32_pcmpgtb128_mask: 7561 case X86::BI__builtin_ia32_pcmpgtb256_mask: 7562 case X86::BI__builtin_ia32_pcmpgtb512_mask: 7563 case X86::BI__builtin_ia32_pcmpgtw128_mask: 7564 case X86::BI__builtin_ia32_pcmpgtw256_mask: 7565 case X86::BI__builtin_ia32_pcmpgtw512_mask: 7566 case X86::BI__builtin_ia32_pcmpgtd128_mask: 7567 case X86::BI__builtin_ia32_pcmpgtd256_mask: 7568 case X86::BI__builtin_ia32_pcmpgtd512_mask: 7569 case X86::BI__builtin_ia32_pcmpgtq128_mask: 7570 case X86::BI__builtin_ia32_pcmpgtq256_mask: 7571 case X86::BI__builtin_ia32_pcmpgtq512_mask: 7572 return EmitX86MaskedCompare(*this, 6, true, Ops); 7573 case X86::BI__builtin_ia32_cmpb128_mask: 7574 case X86::BI__builtin_ia32_cmpb256_mask: 7575 case X86::BI__builtin_ia32_cmpb512_mask: 7576 case X86::BI__builtin_ia32_cmpw128_mask: 7577 case X86::BI__builtin_ia32_cmpw256_mask: 7578 case X86::BI__builtin_ia32_cmpw512_mask: 7579 case X86::BI__builtin_ia32_cmpd128_mask: 7580 case X86::BI__builtin_ia32_cmpd256_mask: 7581 case X86::BI__builtin_ia32_cmpd512_mask: 7582 case X86::BI__builtin_ia32_cmpq128_mask: 7583 case X86::BI__builtin_ia32_cmpq256_mask: 7584 case X86::BI__builtin_ia32_cmpq512_mask: { 7585 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 7586 return EmitX86MaskedCompare(*this, CC, true, Ops); 7587 } 7588 case X86::BI__builtin_ia32_ucmpb128_mask: 7589 case X86::BI__builtin_ia32_ucmpb256_mask: 7590 case X86::BI__builtin_ia32_ucmpb512_mask: 7591 case X86::BI__builtin_ia32_ucmpw128_mask: 7592 case X86::BI__builtin_ia32_ucmpw256_mask: 7593 case X86::BI__builtin_ia32_ucmpw512_mask: 7594 case X86::BI__builtin_ia32_ucmpd128_mask: 7595 case X86::BI__builtin_ia32_ucmpd256_mask: 7596 case X86::BI__builtin_ia32_ucmpd512_mask: 7597 case X86::BI__builtin_ia32_ucmpq128_mask: 7598 case X86::BI__builtin_ia32_ucmpq256_mask: 7599 case X86::BI__builtin_ia32_ucmpq512_mask: { 7600 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 7601 return EmitX86MaskedCompare(*this, CC, false, Ops); 7602 } 7603 7604 case X86::BI__builtin_ia32_vplzcntd_128_mask: 7605 case X86::BI__builtin_ia32_vplzcntd_256_mask: 7606 case X86::BI__builtin_ia32_vplzcntd_512_mask: 7607 case X86::BI__builtin_ia32_vplzcntq_128_mask: 7608 case X86::BI__builtin_ia32_vplzcntq_256_mask: 7609 case X86::BI__builtin_ia32_vplzcntq_512_mask: { 7610 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, Ops[0]->getType()); 7611 return EmitX86Select(*this, Ops[2], 7612 Builder.CreateCall(F, {Ops[0],Builder.getInt1(false)}), 7613 Ops[1]); 7614 } 7615 7616 case X86::BI__builtin_ia32_pmaxsb128: 7617 case X86::BI__builtin_ia32_pmaxsw128: 7618 case X86::BI__builtin_ia32_pmaxsd128: 7619 case X86::BI__builtin_ia32_pmaxsq128_mask: 7620 case X86::BI__builtin_ia32_pmaxsb256: 7621 case X86::BI__builtin_ia32_pmaxsw256: 7622 case X86::BI__builtin_ia32_pmaxsd256: 7623 case X86::BI__builtin_ia32_pmaxsq256_mask: 7624 case X86::BI__builtin_ia32_pmaxsb512_mask: 7625 case X86::BI__builtin_ia32_pmaxsw512_mask: 7626 case X86::BI__builtin_ia32_pmaxsd512_mask: 7627 case X86::BI__builtin_ia32_pmaxsq512_mask: 7628 return EmitX86MinMax(*this, ICmpInst::ICMP_SGT, Ops); 7629 case X86::BI__builtin_ia32_pmaxub128: 7630 case X86::BI__builtin_ia32_pmaxuw128: 7631 case X86::BI__builtin_ia32_pmaxud128: 7632 case X86::BI__builtin_ia32_pmaxuq128_mask: 7633 case X86::BI__builtin_ia32_pmaxub256: 7634 case X86::BI__builtin_ia32_pmaxuw256: 7635 case X86::BI__builtin_ia32_pmaxud256: 7636 case X86::BI__builtin_ia32_pmaxuq256_mask: 7637 case X86::BI__builtin_ia32_pmaxub512_mask: 7638 case X86::BI__builtin_ia32_pmaxuw512_mask: 7639 case X86::BI__builtin_ia32_pmaxud512_mask: 7640 case X86::BI__builtin_ia32_pmaxuq512_mask: 7641 return EmitX86MinMax(*this, ICmpInst::ICMP_UGT, Ops); 7642 case X86::BI__builtin_ia32_pminsb128: 7643 case X86::BI__builtin_ia32_pminsw128: 7644 case X86::BI__builtin_ia32_pminsd128: 7645 case X86::BI__builtin_ia32_pminsq128_mask: 7646 case X86::BI__builtin_ia32_pminsb256: 7647 case X86::BI__builtin_ia32_pminsw256: 7648 case X86::BI__builtin_ia32_pminsd256: 7649 case X86::BI__builtin_ia32_pminsq256_mask: 7650 case X86::BI__builtin_ia32_pminsb512_mask: 7651 case X86::BI__builtin_ia32_pminsw512_mask: 7652 case X86::BI__builtin_ia32_pminsd512_mask: 7653 case X86::BI__builtin_ia32_pminsq512_mask: 7654 return EmitX86MinMax(*this, ICmpInst::ICMP_SLT, Ops); 7655 case X86::BI__builtin_ia32_pminub128: 7656 case X86::BI__builtin_ia32_pminuw128: 7657 case X86::BI__builtin_ia32_pminud128: 7658 case X86::BI__builtin_ia32_pminuq128_mask: 7659 case X86::BI__builtin_ia32_pminub256: 7660 case X86::BI__builtin_ia32_pminuw256: 7661 case X86::BI__builtin_ia32_pminud256: 7662 case X86::BI__builtin_ia32_pminuq256_mask: 7663 case X86::BI__builtin_ia32_pminub512_mask: 7664 case X86::BI__builtin_ia32_pminuw512_mask: 7665 case X86::BI__builtin_ia32_pminud512_mask: 7666 case X86::BI__builtin_ia32_pminuq512_mask: 7667 return EmitX86MinMax(*this, ICmpInst::ICMP_ULT, Ops); 7668 7669 // 3DNow! 7670 case X86::BI__builtin_ia32_pswapdsf: 7671 case X86::BI__builtin_ia32_pswapdsi: { 7672 llvm::Type *MMXTy = llvm::Type::getX86_MMXTy(getLLVMContext()); 7673 Ops[0] = Builder.CreateBitCast(Ops[0], MMXTy, "cast"); 7674 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_3dnowa_pswapd); 7675 return Builder.CreateCall(F, Ops, "pswapd"); 7676 } 7677 case X86::BI__builtin_ia32_rdrand16_step: 7678 case X86::BI__builtin_ia32_rdrand32_step: 7679 case X86::BI__builtin_ia32_rdrand64_step: 7680 case X86::BI__builtin_ia32_rdseed16_step: 7681 case X86::BI__builtin_ia32_rdseed32_step: 7682 case X86::BI__builtin_ia32_rdseed64_step: { 7683 Intrinsic::ID ID; 7684 switch (BuiltinID) { 7685 default: llvm_unreachable("Unsupported intrinsic!"); 7686 case X86::BI__builtin_ia32_rdrand16_step: 7687 ID = Intrinsic::x86_rdrand_16; 7688 break; 7689 case X86::BI__builtin_ia32_rdrand32_step: 7690 ID = Intrinsic::x86_rdrand_32; 7691 break; 7692 case X86::BI__builtin_ia32_rdrand64_step: 7693 ID = Intrinsic::x86_rdrand_64; 7694 break; 7695 case X86::BI__builtin_ia32_rdseed16_step: 7696 ID = Intrinsic::x86_rdseed_16; 7697 break; 7698 case X86::BI__builtin_ia32_rdseed32_step: 7699 ID = Intrinsic::x86_rdseed_32; 7700 break; 7701 case X86::BI__builtin_ia32_rdseed64_step: 7702 ID = Intrinsic::x86_rdseed_64; 7703 break; 7704 } 7705 7706 Value *Call = Builder.CreateCall(CGM.getIntrinsic(ID)); 7707 Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 0), 7708 Ops[0]); 7709 return Builder.CreateExtractValue(Call, 1); 7710 } 7711 7712 // SSE packed comparison intrinsics 7713 case X86::BI__builtin_ia32_cmpeqps: 7714 case X86::BI__builtin_ia32_cmpeqpd: 7715 return getVectorFCmpIR(CmpInst::FCMP_OEQ); 7716 case X86::BI__builtin_ia32_cmpltps: 7717 case X86::BI__builtin_ia32_cmpltpd: 7718 return getVectorFCmpIR(CmpInst::FCMP_OLT); 7719 case X86::BI__builtin_ia32_cmpleps: 7720 case X86::BI__builtin_ia32_cmplepd: 7721 return getVectorFCmpIR(CmpInst::FCMP_OLE); 7722 case X86::BI__builtin_ia32_cmpunordps: 7723 case X86::BI__builtin_ia32_cmpunordpd: 7724 return getVectorFCmpIR(CmpInst::FCMP_UNO); 7725 case X86::BI__builtin_ia32_cmpneqps: 7726 case X86::BI__builtin_ia32_cmpneqpd: 7727 return getVectorFCmpIR(CmpInst::FCMP_UNE); 7728 case X86::BI__builtin_ia32_cmpnltps: 7729 case X86::BI__builtin_ia32_cmpnltpd: 7730 return getVectorFCmpIR(CmpInst::FCMP_UGE); 7731 case X86::BI__builtin_ia32_cmpnleps: 7732 case X86::BI__builtin_ia32_cmpnlepd: 7733 return getVectorFCmpIR(CmpInst::FCMP_UGT); 7734 case X86::BI__builtin_ia32_cmpordps: 7735 case X86::BI__builtin_ia32_cmpordpd: 7736 return getVectorFCmpIR(CmpInst::FCMP_ORD); 7737 case X86::BI__builtin_ia32_cmpps: 7738 case X86::BI__builtin_ia32_cmpps256: 7739 case X86::BI__builtin_ia32_cmppd: 7740 case X86::BI__builtin_ia32_cmppd256: { 7741 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 7742 // If this one of the SSE immediates, we can use native IR. 7743 if (CC < 8) { 7744 FCmpInst::Predicate Pred; 7745 switch (CC) { 7746 case 0: Pred = FCmpInst::FCMP_OEQ; break; 7747 case 1: Pred = FCmpInst::FCMP_OLT; break; 7748 case 2: Pred = FCmpInst::FCMP_OLE; break; 7749 case 3: Pred = FCmpInst::FCMP_UNO; break; 7750 case 4: Pred = FCmpInst::FCMP_UNE; break; 7751 case 5: Pred = FCmpInst::FCMP_UGE; break; 7752 case 6: Pred = FCmpInst::FCMP_UGT; break; 7753 case 7: Pred = FCmpInst::FCMP_ORD; break; 7754 } 7755 return getVectorFCmpIR(Pred); 7756 } 7757 7758 // We can't handle 8-31 immediates with native IR, use the intrinsic. 7759 Intrinsic::ID ID; 7760 switch (BuiltinID) { 7761 default: llvm_unreachable("Unsupported intrinsic!"); 7762 case X86::BI__builtin_ia32_cmpps: 7763 ID = Intrinsic::x86_sse_cmp_ps; 7764 break; 7765 case X86::BI__builtin_ia32_cmpps256: 7766 ID = Intrinsic::x86_avx_cmp_ps_256; 7767 break; 7768 case X86::BI__builtin_ia32_cmppd: 7769 ID = Intrinsic::x86_sse2_cmp_pd; 7770 break; 7771 case X86::BI__builtin_ia32_cmppd256: 7772 ID = Intrinsic::x86_avx_cmp_pd_256; 7773 break; 7774 } 7775 7776 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 7777 } 7778 7779 // SSE scalar comparison intrinsics 7780 case X86::BI__builtin_ia32_cmpeqss: 7781 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 0); 7782 case X86::BI__builtin_ia32_cmpltss: 7783 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 1); 7784 case X86::BI__builtin_ia32_cmpless: 7785 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 2); 7786 case X86::BI__builtin_ia32_cmpunordss: 7787 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 3); 7788 case X86::BI__builtin_ia32_cmpneqss: 7789 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 4); 7790 case X86::BI__builtin_ia32_cmpnltss: 7791 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 5); 7792 case X86::BI__builtin_ia32_cmpnless: 7793 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 6); 7794 case X86::BI__builtin_ia32_cmpordss: 7795 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 7); 7796 case X86::BI__builtin_ia32_cmpeqsd: 7797 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 0); 7798 case X86::BI__builtin_ia32_cmpltsd: 7799 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 1); 7800 case X86::BI__builtin_ia32_cmplesd: 7801 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 2); 7802 case X86::BI__builtin_ia32_cmpunordsd: 7803 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 3); 7804 case X86::BI__builtin_ia32_cmpneqsd: 7805 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 4); 7806 case X86::BI__builtin_ia32_cmpnltsd: 7807 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 5); 7808 case X86::BI__builtin_ia32_cmpnlesd: 7809 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 6); 7810 case X86::BI__builtin_ia32_cmpordsd: 7811 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 7); 7812 7813 case X86::BI__emul: 7814 case X86::BI__emulu: { 7815 llvm::Type *Int64Ty = llvm::IntegerType::get(getLLVMContext(), 64); 7816 bool isSigned = (BuiltinID == X86::BI__emul); 7817 Value *LHS = Builder.CreateIntCast(Ops[0], Int64Ty, isSigned); 7818 Value *RHS = Builder.CreateIntCast(Ops[1], Int64Ty, isSigned); 7819 return Builder.CreateMul(LHS, RHS, "", !isSigned, isSigned); 7820 } 7821 case X86::BI__mulh: 7822 case X86::BI__umulh: 7823 case X86::BI_mul128: 7824 case X86::BI_umul128: { 7825 llvm::Type *ResType = ConvertType(E->getType()); 7826 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 7827 7828 bool IsSigned = (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI_mul128); 7829 Value *LHS = Builder.CreateIntCast(Ops[0], Int128Ty, IsSigned); 7830 Value *RHS = Builder.CreateIntCast(Ops[1], Int128Ty, IsSigned); 7831 7832 Value *MulResult, *HigherBits; 7833 if (IsSigned) { 7834 MulResult = Builder.CreateNSWMul(LHS, RHS); 7835 HigherBits = Builder.CreateAShr(MulResult, 64); 7836 } else { 7837 MulResult = Builder.CreateNUWMul(LHS, RHS); 7838 HigherBits = Builder.CreateLShr(MulResult, 64); 7839 } 7840 HigherBits = Builder.CreateIntCast(HigherBits, ResType, IsSigned); 7841 7842 if (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI__umulh) 7843 return HigherBits; 7844 7845 Address HighBitsAddress = EmitPointerWithAlignment(E->getArg(2)); 7846 Builder.CreateStore(HigherBits, HighBitsAddress); 7847 return Builder.CreateIntCast(MulResult, ResType, IsSigned); 7848 } 7849 7850 case X86::BI__faststorefence: { 7851 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 7852 llvm::CrossThread); 7853 } 7854 case X86::BI_ReadWriteBarrier: 7855 case X86::BI_ReadBarrier: 7856 case X86::BI_WriteBarrier: { 7857 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 7858 llvm::SingleThread); 7859 } 7860 case X86::BI_BitScanForward: 7861 case X86::BI_BitScanForward64: 7862 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 7863 case X86::BI_BitScanReverse: 7864 case X86::BI_BitScanReverse64: 7865 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 7866 7867 case X86::BI_InterlockedAnd64: 7868 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 7869 case X86::BI_InterlockedExchange64: 7870 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 7871 case X86::BI_InterlockedExchangeAdd64: 7872 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 7873 case X86::BI_InterlockedExchangeSub64: 7874 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 7875 case X86::BI_InterlockedOr64: 7876 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 7877 case X86::BI_InterlockedXor64: 7878 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 7879 case X86::BI_InterlockedDecrement64: 7880 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 7881 case X86::BI_InterlockedIncrement64: 7882 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 7883 7884 case X86::BI_AddressOfReturnAddress: { 7885 Value *F = CGM.getIntrinsic(Intrinsic::addressofreturnaddress); 7886 return Builder.CreateCall(F); 7887 } 7888 case X86::BI__stosb: { 7889 // We treat __stosb as a volatile memset - it may not generate "rep stosb" 7890 // instruction, but it will create a memset that won't be optimized away. 7891 return Builder.CreateMemSet(Ops[0], Ops[1], Ops[2], 1, true); 7892 } 7893 } 7894 } 7895 7896 7897 Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, 7898 const CallExpr *E) { 7899 SmallVector<Value*, 4> Ops; 7900 7901 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) 7902 Ops.push_back(EmitScalarExpr(E->getArg(i))); 7903 7904 Intrinsic::ID ID = Intrinsic::not_intrinsic; 7905 7906 switch (BuiltinID) { 7907 default: return nullptr; 7908 7909 // __builtin_ppc_get_timebase is GCC 4.8+'s PowerPC-specific name for what we 7910 // call __builtin_readcyclecounter. 7911 case PPC::BI__builtin_ppc_get_timebase: 7912 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::readcyclecounter)); 7913 7914 // vec_ld, vec_xl_be, vec_lvsl, vec_lvsr 7915 case PPC::BI__builtin_altivec_lvx: 7916 case PPC::BI__builtin_altivec_lvxl: 7917 case PPC::BI__builtin_altivec_lvebx: 7918 case PPC::BI__builtin_altivec_lvehx: 7919 case PPC::BI__builtin_altivec_lvewx: 7920 case PPC::BI__builtin_altivec_lvsl: 7921 case PPC::BI__builtin_altivec_lvsr: 7922 case PPC::BI__builtin_vsx_lxvd2x: 7923 case PPC::BI__builtin_vsx_lxvw4x: 7924 case PPC::BI__builtin_vsx_lxvd2x_be: 7925 case PPC::BI__builtin_vsx_lxvw4x_be: 7926 case PPC::BI__builtin_vsx_lxvl: 7927 case PPC::BI__builtin_vsx_lxvll: 7928 { 7929 if(BuiltinID == PPC::BI__builtin_vsx_lxvl || 7930 BuiltinID == PPC::BI__builtin_vsx_lxvll){ 7931 Ops[0] = Builder.CreateBitCast(Ops[0], Int8PtrTy); 7932 }else { 7933 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 7934 Ops[0] = Builder.CreateGEP(Ops[1], Ops[0]); 7935 Ops.pop_back(); 7936 } 7937 7938 switch (BuiltinID) { 7939 default: llvm_unreachable("Unsupported ld/lvsl/lvsr intrinsic!"); 7940 case PPC::BI__builtin_altivec_lvx: 7941 ID = Intrinsic::ppc_altivec_lvx; 7942 break; 7943 case PPC::BI__builtin_altivec_lvxl: 7944 ID = Intrinsic::ppc_altivec_lvxl; 7945 break; 7946 case PPC::BI__builtin_altivec_lvebx: 7947 ID = Intrinsic::ppc_altivec_lvebx; 7948 break; 7949 case PPC::BI__builtin_altivec_lvehx: 7950 ID = Intrinsic::ppc_altivec_lvehx; 7951 break; 7952 case PPC::BI__builtin_altivec_lvewx: 7953 ID = Intrinsic::ppc_altivec_lvewx; 7954 break; 7955 case PPC::BI__builtin_altivec_lvsl: 7956 ID = Intrinsic::ppc_altivec_lvsl; 7957 break; 7958 case PPC::BI__builtin_altivec_lvsr: 7959 ID = Intrinsic::ppc_altivec_lvsr; 7960 break; 7961 case PPC::BI__builtin_vsx_lxvd2x: 7962 ID = Intrinsic::ppc_vsx_lxvd2x; 7963 break; 7964 case PPC::BI__builtin_vsx_lxvw4x: 7965 ID = Intrinsic::ppc_vsx_lxvw4x; 7966 break; 7967 case PPC::BI__builtin_vsx_lxvd2x_be: 7968 ID = Intrinsic::ppc_vsx_lxvd2x_be; 7969 break; 7970 case PPC::BI__builtin_vsx_lxvw4x_be: 7971 ID = Intrinsic::ppc_vsx_lxvw4x_be; 7972 break; 7973 case PPC::BI__builtin_vsx_lxvl: 7974 ID = Intrinsic::ppc_vsx_lxvl; 7975 break; 7976 case PPC::BI__builtin_vsx_lxvll: 7977 ID = Intrinsic::ppc_vsx_lxvll; 7978 break; 7979 } 7980 llvm::Function *F = CGM.getIntrinsic(ID); 7981 return Builder.CreateCall(F, Ops, ""); 7982 } 7983 7984 // vec_st, vec_xst_be 7985 case PPC::BI__builtin_altivec_stvx: 7986 case PPC::BI__builtin_altivec_stvxl: 7987 case PPC::BI__builtin_altivec_stvebx: 7988 case PPC::BI__builtin_altivec_stvehx: 7989 case PPC::BI__builtin_altivec_stvewx: 7990 case PPC::BI__builtin_vsx_stxvd2x: 7991 case PPC::BI__builtin_vsx_stxvw4x: 7992 case PPC::BI__builtin_vsx_stxvd2x_be: 7993 case PPC::BI__builtin_vsx_stxvw4x_be: 7994 case PPC::BI__builtin_vsx_stxvl: 7995 case PPC::BI__builtin_vsx_stxvll: 7996 { 7997 if(BuiltinID == PPC::BI__builtin_vsx_stxvl || 7998 BuiltinID == PPC::BI__builtin_vsx_stxvll ){ 7999 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 8000 }else { 8001 Ops[2] = Builder.CreateBitCast(Ops[2], Int8PtrTy); 8002 Ops[1] = Builder.CreateGEP(Ops[2], Ops[1]); 8003 Ops.pop_back(); 8004 } 8005 8006 switch (BuiltinID) { 8007 default: llvm_unreachable("Unsupported st intrinsic!"); 8008 case PPC::BI__builtin_altivec_stvx: 8009 ID = Intrinsic::ppc_altivec_stvx; 8010 break; 8011 case PPC::BI__builtin_altivec_stvxl: 8012 ID = Intrinsic::ppc_altivec_stvxl; 8013 break; 8014 case PPC::BI__builtin_altivec_stvebx: 8015 ID = Intrinsic::ppc_altivec_stvebx; 8016 break; 8017 case PPC::BI__builtin_altivec_stvehx: 8018 ID = Intrinsic::ppc_altivec_stvehx; 8019 break; 8020 case PPC::BI__builtin_altivec_stvewx: 8021 ID = Intrinsic::ppc_altivec_stvewx; 8022 break; 8023 case PPC::BI__builtin_vsx_stxvd2x: 8024 ID = Intrinsic::ppc_vsx_stxvd2x; 8025 break; 8026 case PPC::BI__builtin_vsx_stxvw4x: 8027 ID = Intrinsic::ppc_vsx_stxvw4x; 8028 break; 8029 case PPC::BI__builtin_vsx_stxvd2x_be: 8030 ID = Intrinsic::ppc_vsx_stxvd2x_be; 8031 break; 8032 case PPC::BI__builtin_vsx_stxvw4x_be: 8033 ID = Intrinsic::ppc_vsx_stxvw4x_be; 8034 break; 8035 case PPC::BI__builtin_vsx_stxvl: 8036 ID = Intrinsic::ppc_vsx_stxvl; 8037 break; 8038 case PPC::BI__builtin_vsx_stxvll: 8039 ID = Intrinsic::ppc_vsx_stxvll; 8040 break; 8041 } 8042 llvm::Function *F = CGM.getIntrinsic(ID); 8043 return Builder.CreateCall(F, Ops, ""); 8044 } 8045 // Square root 8046 case PPC::BI__builtin_vsx_xvsqrtsp: 8047 case PPC::BI__builtin_vsx_xvsqrtdp: { 8048 llvm::Type *ResultType = ConvertType(E->getType()); 8049 Value *X = EmitScalarExpr(E->getArg(0)); 8050 ID = Intrinsic::sqrt; 8051 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 8052 return Builder.CreateCall(F, X); 8053 } 8054 // Count leading zeros 8055 case PPC::BI__builtin_altivec_vclzb: 8056 case PPC::BI__builtin_altivec_vclzh: 8057 case PPC::BI__builtin_altivec_vclzw: 8058 case PPC::BI__builtin_altivec_vclzd: { 8059 llvm::Type *ResultType = ConvertType(E->getType()); 8060 Value *X = EmitScalarExpr(E->getArg(0)); 8061 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 8062 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 8063 return Builder.CreateCall(F, {X, Undef}); 8064 } 8065 case PPC::BI__builtin_altivec_vctzb: 8066 case PPC::BI__builtin_altivec_vctzh: 8067 case PPC::BI__builtin_altivec_vctzw: 8068 case PPC::BI__builtin_altivec_vctzd: { 8069 llvm::Type *ResultType = ConvertType(E->getType()); 8070 Value *X = EmitScalarExpr(E->getArg(0)); 8071 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 8072 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 8073 return Builder.CreateCall(F, {X, Undef}); 8074 } 8075 case PPC::BI__builtin_altivec_vpopcntb: 8076 case PPC::BI__builtin_altivec_vpopcnth: 8077 case PPC::BI__builtin_altivec_vpopcntw: 8078 case PPC::BI__builtin_altivec_vpopcntd: { 8079 llvm::Type *ResultType = ConvertType(E->getType()); 8080 Value *X = EmitScalarExpr(E->getArg(0)); 8081 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 8082 return Builder.CreateCall(F, X); 8083 } 8084 // Copy sign 8085 case PPC::BI__builtin_vsx_xvcpsgnsp: 8086 case PPC::BI__builtin_vsx_xvcpsgndp: { 8087 llvm::Type *ResultType = ConvertType(E->getType()); 8088 Value *X = EmitScalarExpr(E->getArg(0)); 8089 Value *Y = EmitScalarExpr(E->getArg(1)); 8090 ID = Intrinsic::copysign; 8091 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 8092 return Builder.CreateCall(F, {X, Y}); 8093 } 8094 // Rounding/truncation 8095 case PPC::BI__builtin_vsx_xvrspip: 8096 case PPC::BI__builtin_vsx_xvrdpip: 8097 case PPC::BI__builtin_vsx_xvrdpim: 8098 case PPC::BI__builtin_vsx_xvrspim: 8099 case PPC::BI__builtin_vsx_xvrdpi: 8100 case PPC::BI__builtin_vsx_xvrspi: 8101 case PPC::BI__builtin_vsx_xvrdpic: 8102 case PPC::BI__builtin_vsx_xvrspic: 8103 case PPC::BI__builtin_vsx_xvrdpiz: 8104 case PPC::BI__builtin_vsx_xvrspiz: { 8105 llvm::Type *ResultType = ConvertType(E->getType()); 8106 Value *X = EmitScalarExpr(E->getArg(0)); 8107 if (BuiltinID == PPC::BI__builtin_vsx_xvrdpim || 8108 BuiltinID == PPC::BI__builtin_vsx_xvrspim) 8109 ID = Intrinsic::floor; 8110 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpi || 8111 BuiltinID == PPC::BI__builtin_vsx_xvrspi) 8112 ID = Intrinsic::round; 8113 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpic || 8114 BuiltinID == PPC::BI__builtin_vsx_xvrspic) 8115 ID = Intrinsic::nearbyint; 8116 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpip || 8117 BuiltinID == PPC::BI__builtin_vsx_xvrspip) 8118 ID = Intrinsic::ceil; 8119 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpiz || 8120 BuiltinID == PPC::BI__builtin_vsx_xvrspiz) 8121 ID = Intrinsic::trunc; 8122 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 8123 return Builder.CreateCall(F, X); 8124 } 8125 8126 // Absolute value 8127 case PPC::BI__builtin_vsx_xvabsdp: 8128 case PPC::BI__builtin_vsx_xvabssp: { 8129 llvm::Type *ResultType = ConvertType(E->getType()); 8130 Value *X = EmitScalarExpr(E->getArg(0)); 8131 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 8132 return Builder.CreateCall(F, X); 8133 } 8134 8135 // FMA variations 8136 case PPC::BI__builtin_vsx_xvmaddadp: 8137 case PPC::BI__builtin_vsx_xvmaddasp: 8138 case PPC::BI__builtin_vsx_xvnmaddadp: 8139 case PPC::BI__builtin_vsx_xvnmaddasp: 8140 case PPC::BI__builtin_vsx_xvmsubadp: 8141 case PPC::BI__builtin_vsx_xvmsubasp: 8142 case PPC::BI__builtin_vsx_xvnmsubadp: 8143 case PPC::BI__builtin_vsx_xvnmsubasp: { 8144 llvm::Type *ResultType = ConvertType(E->getType()); 8145 Value *X = EmitScalarExpr(E->getArg(0)); 8146 Value *Y = EmitScalarExpr(E->getArg(1)); 8147 Value *Z = EmitScalarExpr(E->getArg(2)); 8148 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 8149 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 8150 switch (BuiltinID) { 8151 case PPC::BI__builtin_vsx_xvmaddadp: 8152 case PPC::BI__builtin_vsx_xvmaddasp: 8153 return Builder.CreateCall(F, {X, Y, Z}); 8154 case PPC::BI__builtin_vsx_xvnmaddadp: 8155 case PPC::BI__builtin_vsx_xvnmaddasp: 8156 return Builder.CreateFSub(Zero, 8157 Builder.CreateCall(F, {X, Y, Z}), "sub"); 8158 case PPC::BI__builtin_vsx_xvmsubadp: 8159 case PPC::BI__builtin_vsx_xvmsubasp: 8160 return Builder.CreateCall(F, 8161 {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 8162 case PPC::BI__builtin_vsx_xvnmsubadp: 8163 case PPC::BI__builtin_vsx_xvnmsubasp: 8164 Value *FsubRes = 8165 Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 8166 return Builder.CreateFSub(Zero, FsubRes, "sub"); 8167 } 8168 llvm_unreachable("Unknown FMA operation"); 8169 return nullptr; // Suppress no-return warning 8170 } 8171 } 8172 } 8173 8174 Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID, 8175 const CallExpr *E) { 8176 switch (BuiltinID) { 8177 case AMDGPU::BI__builtin_amdgcn_div_scale: 8178 case AMDGPU::BI__builtin_amdgcn_div_scalef: { 8179 // Translate from the intrinsics's struct return to the builtin's out 8180 // argument. 8181 8182 Address FlagOutPtr = EmitPointerWithAlignment(E->getArg(3)); 8183 8184 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 8185 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 8186 llvm::Value *Z = EmitScalarExpr(E->getArg(2)); 8187 8188 llvm::Value *Callee = CGM.getIntrinsic(Intrinsic::amdgcn_div_scale, 8189 X->getType()); 8190 8191 llvm::Value *Tmp = Builder.CreateCall(Callee, {X, Y, Z}); 8192 8193 llvm::Value *Result = Builder.CreateExtractValue(Tmp, 0); 8194 llvm::Value *Flag = Builder.CreateExtractValue(Tmp, 1); 8195 8196 llvm::Type *RealFlagType 8197 = FlagOutPtr.getPointer()->getType()->getPointerElementType(); 8198 8199 llvm::Value *FlagExt = Builder.CreateZExt(Flag, RealFlagType); 8200 Builder.CreateStore(FlagExt, FlagOutPtr); 8201 return Result; 8202 } 8203 case AMDGPU::BI__builtin_amdgcn_div_fmas: 8204 case AMDGPU::BI__builtin_amdgcn_div_fmasf: { 8205 llvm::Value *Src0 = EmitScalarExpr(E->getArg(0)); 8206 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); 8207 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); 8208 llvm::Value *Src3 = EmitScalarExpr(E->getArg(3)); 8209 8210 llvm::Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_div_fmas, 8211 Src0->getType()); 8212 llvm::Value *Src3ToBool = Builder.CreateIsNotNull(Src3); 8213 return Builder.CreateCall(F, {Src0, Src1, Src2, Src3ToBool}); 8214 } 8215 8216 case AMDGPU::BI__builtin_amdgcn_ds_swizzle: 8217 return emitBinaryBuiltin(*this, E, Intrinsic::amdgcn_ds_swizzle); 8218 case AMDGPU::BI__builtin_amdgcn_div_fixup: 8219 case AMDGPU::BI__builtin_amdgcn_div_fixupf: 8220 case AMDGPU::BI__builtin_amdgcn_div_fixuph: 8221 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_div_fixup); 8222 case AMDGPU::BI__builtin_amdgcn_trig_preop: 8223 case AMDGPU::BI__builtin_amdgcn_trig_preopf: 8224 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_trig_preop); 8225 case AMDGPU::BI__builtin_amdgcn_rcp: 8226 case AMDGPU::BI__builtin_amdgcn_rcpf: 8227 case AMDGPU::BI__builtin_amdgcn_rcph: 8228 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rcp); 8229 case AMDGPU::BI__builtin_amdgcn_rsq: 8230 case AMDGPU::BI__builtin_amdgcn_rsqf: 8231 case AMDGPU::BI__builtin_amdgcn_rsqh: 8232 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq); 8233 case AMDGPU::BI__builtin_amdgcn_rsq_clamp: 8234 case AMDGPU::BI__builtin_amdgcn_rsq_clampf: 8235 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq_clamp); 8236 case AMDGPU::BI__builtin_amdgcn_sinf: 8237 case AMDGPU::BI__builtin_amdgcn_sinh: 8238 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_sin); 8239 case AMDGPU::BI__builtin_amdgcn_cosf: 8240 case AMDGPU::BI__builtin_amdgcn_cosh: 8241 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_cos); 8242 case AMDGPU::BI__builtin_amdgcn_log_clampf: 8243 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_log_clamp); 8244 case AMDGPU::BI__builtin_amdgcn_ldexp: 8245 case AMDGPU::BI__builtin_amdgcn_ldexpf: 8246 case AMDGPU::BI__builtin_amdgcn_ldexph: 8247 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_ldexp); 8248 case AMDGPU::BI__builtin_amdgcn_frexp_mant: 8249 case AMDGPU::BI__builtin_amdgcn_frexp_mantf: 8250 case AMDGPU::BI__builtin_amdgcn_frexp_manth: 8251 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_frexp_mant); 8252 case AMDGPU::BI__builtin_amdgcn_frexp_exp: 8253 case AMDGPU::BI__builtin_amdgcn_frexp_expf: 8254 case AMDGPU::BI__builtin_amdgcn_frexp_exph: 8255 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_frexp_exp); 8256 case AMDGPU::BI__builtin_amdgcn_fract: 8257 case AMDGPU::BI__builtin_amdgcn_fractf: 8258 case AMDGPU::BI__builtin_amdgcn_fracth: 8259 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_fract); 8260 case AMDGPU::BI__builtin_amdgcn_lerp: 8261 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_lerp); 8262 case AMDGPU::BI__builtin_amdgcn_uicmp: 8263 case AMDGPU::BI__builtin_amdgcn_uicmpl: 8264 case AMDGPU::BI__builtin_amdgcn_sicmp: 8265 case AMDGPU::BI__builtin_amdgcn_sicmpl: 8266 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_icmp); 8267 case AMDGPU::BI__builtin_amdgcn_fcmp: 8268 case AMDGPU::BI__builtin_amdgcn_fcmpf: 8269 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_fcmp); 8270 case AMDGPU::BI__builtin_amdgcn_class: 8271 case AMDGPU::BI__builtin_amdgcn_classf: 8272 case AMDGPU::BI__builtin_amdgcn_classh: 8273 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_class); 8274 8275 case AMDGPU::BI__builtin_amdgcn_read_exec: { 8276 CallInst *CI = cast<CallInst>( 8277 EmitSpecialRegisterBuiltin(*this, E, Int64Ty, Int64Ty, true, "exec")); 8278 CI->setConvergent(); 8279 return CI; 8280 } 8281 8282 // amdgcn workitem 8283 case AMDGPU::BI__builtin_amdgcn_workitem_id_x: 8284 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_x, 0, 1024); 8285 case AMDGPU::BI__builtin_amdgcn_workitem_id_y: 8286 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_y, 0, 1024); 8287 case AMDGPU::BI__builtin_amdgcn_workitem_id_z: 8288 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_z, 0, 1024); 8289 8290 // r600 intrinsics 8291 case AMDGPU::BI__builtin_r600_recipsqrt_ieee: 8292 case AMDGPU::BI__builtin_r600_recipsqrt_ieeef: 8293 return emitUnaryBuiltin(*this, E, Intrinsic::r600_recipsqrt_ieee); 8294 case AMDGPU::BI__builtin_r600_read_tidig_x: 8295 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_x, 0, 1024); 8296 case AMDGPU::BI__builtin_r600_read_tidig_y: 8297 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_y, 0, 1024); 8298 case AMDGPU::BI__builtin_r600_read_tidig_z: 8299 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_z, 0, 1024); 8300 default: 8301 return nullptr; 8302 } 8303 } 8304 8305 /// Handle a SystemZ function in which the final argument is a pointer 8306 /// to an int that receives the post-instruction CC value. At the LLVM level 8307 /// this is represented as a function that returns a {result, cc} pair. 8308 static Value *EmitSystemZIntrinsicWithCC(CodeGenFunction &CGF, 8309 unsigned IntrinsicID, 8310 const CallExpr *E) { 8311 unsigned NumArgs = E->getNumArgs() - 1; 8312 SmallVector<Value *, 8> Args(NumArgs); 8313 for (unsigned I = 0; I < NumArgs; ++I) 8314 Args[I] = CGF.EmitScalarExpr(E->getArg(I)); 8315 Address CCPtr = CGF.EmitPointerWithAlignment(E->getArg(NumArgs)); 8316 Value *F = CGF.CGM.getIntrinsic(IntrinsicID); 8317 Value *Call = CGF.Builder.CreateCall(F, Args); 8318 Value *CC = CGF.Builder.CreateExtractValue(Call, 1); 8319 CGF.Builder.CreateStore(CC, CCPtr); 8320 return CGF.Builder.CreateExtractValue(Call, 0); 8321 } 8322 8323 Value *CodeGenFunction::EmitSystemZBuiltinExpr(unsigned BuiltinID, 8324 const CallExpr *E) { 8325 switch (BuiltinID) { 8326 case SystemZ::BI__builtin_tbegin: { 8327 Value *TDB = EmitScalarExpr(E->getArg(0)); 8328 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 8329 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin); 8330 return Builder.CreateCall(F, {TDB, Control}); 8331 } 8332 case SystemZ::BI__builtin_tbegin_nofloat: { 8333 Value *TDB = EmitScalarExpr(E->getArg(0)); 8334 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 8335 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin_nofloat); 8336 return Builder.CreateCall(F, {TDB, Control}); 8337 } 8338 case SystemZ::BI__builtin_tbeginc: { 8339 Value *TDB = llvm::ConstantPointerNull::get(Int8PtrTy); 8340 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff08); 8341 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbeginc); 8342 return Builder.CreateCall(F, {TDB, Control}); 8343 } 8344 case SystemZ::BI__builtin_tabort: { 8345 Value *Data = EmitScalarExpr(E->getArg(0)); 8346 Value *F = CGM.getIntrinsic(Intrinsic::s390_tabort); 8347 return Builder.CreateCall(F, Builder.CreateSExt(Data, Int64Ty, "tabort")); 8348 } 8349 case SystemZ::BI__builtin_non_tx_store: { 8350 Value *Address = EmitScalarExpr(E->getArg(0)); 8351 Value *Data = EmitScalarExpr(E->getArg(1)); 8352 Value *F = CGM.getIntrinsic(Intrinsic::s390_ntstg); 8353 return Builder.CreateCall(F, {Data, Address}); 8354 } 8355 8356 // Vector builtins. Note that most vector builtins are mapped automatically 8357 // to target-specific LLVM intrinsics. The ones handled specially here can 8358 // be represented via standard LLVM IR, which is preferable to enable common 8359 // LLVM optimizations. 8360 8361 case SystemZ::BI__builtin_s390_vpopctb: 8362 case SystemZ::BI__builtin_s390_vpopcth: 8363 case SystemZ::BI__builtin_s390_vpopctf: 8364 case SystemZ::BI__builtin_s390_vpopctg: { 8365 llvm::Type *ResultType = ConvertType(E->getType()); 8366 Value *X = EmitScalarExpr(E->getArg(0)); 8367 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 8368 return Builder.CreateCall(F, X); 8369 } 8370 8371 case SystemZ::BI__builtin_s390_vclzb: 8372 case SystemZ::BI__builtin_s390_vclzh: 8373 case SystemZ::BI__builtin_s390_vclzf: 8374 case SystemZ::BI__builtin_s390_vclzg: { 8375 llvm::Type *ResultType = ConvertType(E->getType()); 8376 Value *X = EmitScalarExpr(E->getArg(0)); 8377 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 8378 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 8379 return Builder.CreateCall(F, {X, Undef}); 8380 } 8381 8382 case SystemZ::BI__builtin_s390_vctzb: 8383 case SystemZ::BI__builtin_s390_vctzh: 8384 case SystemZ::BI__builtin_s390_vctzf: 8385 case SystemZ::BI__builtin_s390_vctzg: { 8386 llvm::Type *ResultType = ConvertType(E->getType()); 8387 Value *X = EmitScalarExpr(E->getArg(0)); 8388 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 8389 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 8390 return Builder.CreateCall(F, {X, Undef}); 8391 } 8392 8393 case SystemZ::BI__builtin_s390_vfsqdb: { 8394 llvm::Type *ResultType = ConvertType(E->getType()); 8395 Value *X = EmitScalarExpr(E->getArg(0)); 8396 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, ResultType); 8397 return Builder.CreateCall(F, X); 8398 } 8399 case SystemZ::BI__builtin_s390_vfmadb: { 8400 llvm::Type *ResultType = ConvertType(E->getType()); 8401 Value *X = EmitScalarExpr(E->getArg(0)); 8402 Value *Y = EmitScalarExpr(E->getArg(1)); 8403 Value *Z = EmitScalarExpr(E->getArg(2)); 8404 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 8405 return Builder.CreateCall(F, {X, Y, Z}); 8406 } 8407 case SystemZ::BI__builtin_s390_vfmsdb: { 8408 llvm::Type *ResultType = ConvertType(E->getType()); 8409 Value *X = EmitScalarExpr(E->getArg(0)); 8410 Value *Y = EmitScalarExpr(E->getArg(1)); 8411 Value *Z = EmitScalarExpr(E->getArg(2)); 8412 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 8413 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 8414 return Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 8415 } 8416 case SystemZ::BI__builtin_s390_vflpdb: { 8417 llvm::Type *ResultType = ConvertType(E->getType()); 8418 Value *X = EmitScalarExpr(E->getArg(0)); 8419 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 8420 return Builder.CreateCall(F, X); 8421 } 8422 case SystemZ::BI__builtin_s390_vflndb: { 8423 llvm::Type *ResultType = ConvertType(E->getType()); 8424 Value *X = EmitScalarExpr(E->getArg(0)); 8425 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 8426 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 8427 return Builder.CreateFSub(Zero, Builder.CreateCall(F, X), "sub"); 8428 } 8429 case SystemZ::BI__builtin_s390_vfidb: { 8430 llvm::Type *ResultType = ConvertType(E->getType()); 8431 Value *X = EmitScalarExpr(E->getArg(0)); 8432 // Constant-fold the M4 and M5 mask arguments. 8433 llvm::APSInt M4, M5; 8434 bool IsConstM4 = E->getArg(1)->isIntegerConstantExpr(M4, getContext()); 8435 bool IsConstM5 = E->getArg(2)->isIntegerConstantExpr(M5, getContext()); 8436 assert(IsConstM4 && IsConstM5 && "Constant arg isn't actually constant?"); 8437 (void)IsConstM4; (void)IsConstM5; 8438 // Check whether this instance of vfidb can be represented via a LLVM 8439 // standard intrinsic. We only support some combinations of M4 and M5. 8440 Intrinsic::ID ID = Intrinsic::not_intrinsic; 8441 switch (M4.getZExtValue()) { 8442 default: break; 8443 case 0: // IEEE-inexact exception allowed 8444 switch (M5.getZExtValue()) { 8445 default: break; 8446 case 0: ID = Intrinsic::rint; break; 8447 } 8448 break; 8449 case 4: // IEEE-inexact exception suppressed 8450 switch (M5.getZExtValue()) { 8451 default: break; 8452 case 0: ID = Intrinsic::nearbyint; break; 8453 case 1: ID = Intrinsic::round; break; 8454 case 5: ID = Intrinsic::trunc; break; 8455 case 6: ID = Intrinsic::ceil; break; 8456 case 7: ID = Intrinsic::floor; break; 8457 } 8458 break; 8459 } 8460 if (ID != Intrinsic::not_intrinsic) { 8461 Function *F = CGM.getIntrinsic(ID, ResultType); 8462 return Builder.CreateCall(F, X); 8463 } 8464 Function *F = CGM.getIntrinsic(Intrinsic::s390_vfidb); 8465 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 8466 Value *M5Value = llvm::ConstantInt::get(getLLVMContext(), M5); 8467 return Builder.CreateCall(F, {X, M4Value, M5Value}); 8468 } 8469 8470 // Vector intrisincs that output the post-instruction CC value. 8471 8472 #define INTRINSIC_WITH_CC(NAME) \ 8473 case SystemZ::BI__builtin_##NAME: \ 8474 return EmitSystemZIntrinsicWithCC(*this, Intrinsic::NAME, E) 8475 8476 INTRINSIC_WITH_CC(s390_vpkshs); 8477 INTRINSIC_WITH_CC(s390_vpksfs); 8478 INTRINSIC_WITH_CC(s390_vpksgs); 8479 8480 INTRINSIC_WITH_CC(s390_vpklshs); 8481 INTRINSIC_WITH_CC(s390_vpklsfs); 8482 INTRINSIC_WITH_CC(s390_vpklsgs); 8483 8484 INTRINSIC_WITH_CC(s390_vceqbs); 8485 INTRINSIC_WITH_CC(s390_vceqhs); 8486 INTRINSIC_WITH_CC(s390_vceqfs); 8487 INTRINSIC_WITH_CC(s390_vceqgs); 8488 8489 INTRINSIC_WITH_CC(s390_vchbs); 8490 INTRINSIC_WITH_CC(s390_vchhs); 8491 INTRINSIC_WITH_CC(s390_vchfs); 8492 INTRINSIC_WITH_CC(s390_vchgs); 8493 8494 INTRINSIC_WITH_CC(s390_vchlbs); 8495 INTRINSIC_WITH_CC(s390_vchlhs); 8496 INTRINSIC_WITH_CC(s390_vchlfs); 8497 INTRINSIC_WITH_CC(s390_vchlgs); 8498 8499 INTRINSIC_WITH_CC(s390_vfaebs); 8500 INTRINSIC_WITH_CC(s390_vfaehs); 8501 INTRINSIC_WITH_CC(s390_vfaefs); 8502 8503 INTRINSIC_WITH_CC(s390_vfaezbs); 8504 INTRINSIC_WITH_CC(s390_vfaezhs); 8505 INTRINSIC_WITH_CC(s390_vfaezfs); 8506 8507 INTRINSIC_WITH_CC(s390_vfeebs); 8508 INTRINSIC_WITH_CC(s390_vfeehs); 8509 INTRINSIC_WITH_CC(s390_vfeefs); 8510 8511 INTRINSIC_WITH_CC(s390_vfeezbs); 8512 INTRINSIC_WITH_CC(s390_vfeezhs); 8513 INTRINSIC_WITH_CC(s390_vfeezfs); 8514 8515 INTRINSIC_WITH_CC(s390_vfenebs); 8516 INTRINSIC_WITH_CC(s390_vfenehs); 8517 INTRINSIC_WITH_CC(s390_vfenefs); 8518 8519 INTRINSIC_WITH_CC(s390_vfenezbs); 8520 INTRINSIC_WITH_CC(s390_vfenezhs); 8521 INTRINSIC_WITH_CC(s390_vfenezfs); 8522 8523 INTRINSIC_WITH_CC(s390_vistrbs); 8524 INTRINSIC_WITH_CC(s390_vistrhs); 8525 INTRINSIC_WITH_CC(s390_vistrfs); 8526 8527 INTRINSIC_WITH_CC(s390_vstrcbs); 8528 INTRINSIC_WITH_CC(s390_vstrchs); 8529 INTRINSIC_WITH_CC(s390_vstrcfs); 8530 8531 INTRINSIC_WITH_CC(s390_vstrczbs); 8532 INTRINSIC_WITH_CC(s390_vstrczhs); 8533 INTRINSIC_WITH_CC(s390_vstrczfs); 8534 8535 INTRINSIC_WITH_CC(s390_vfcedbs); 8536 INTRINSIC_WITH_CC(s390_vfchdbs); 8537 INTRINSIC_WITH_CC(s390_vfchedbs); 8538 8539 INTRINSIC_WITH_CC(s390_vftcidb); 8540 8541 #undef INTRINSIC_WITH_CC 8542 8543 default: 8544 return nullptr; 8545 } 8546 } 8547 8548 Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, 8549 const CallExpr *E) { 8550 auto MakeLdg = [&](unsigned IntrinsicID) { 8551 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8552 AlignmentSource AlignSource; 8553 clang::CharUnits Align = 8554 getNaturalPointeeTypeAlignment(E->getArg(0)->getType(), &AlignSource); 8555 return Builder.CreateCall( 8556 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 8557 Ptr->getType()}), 8558 {Ptr, ConstantInt::get(Builder.getInt32Ty(), Align.getQuantity())}); 8559 }; 8560 auto MakeScopedAtomic = [&](unsigned IntrinsicID) { 8561 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8562 return Builder.CreateCall( 8563 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 8564 Ptr->getType()}), 8565 {Ptr, EmitScalarExpr(E->getArg(1))}); 8566 }; 8567 switch (BuiltinID) { 8568 case NVPTX::BI__nvvm_atom_add_gen_i: 8569 case NVPTX::BI__nvvm_atom_add_gen_l: 8570 case NVPTX::BI__nvvm_atom_add_gen_ll: 8571 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Add, E); 8572 8573 case NVPTX::BI__nvvm_atom_sub_gen_i: 8574 case NVPTX::BI__nvvm_atom_sub_gen_l: 8575 case NVPTX::BI__nvvm_atom_sub_gen_ll: 8576 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Sub, E); 8577 8578 case NVPTX::BI__nvvm_atom_and_gen_i: 8579 case NVPTX::BI__nvvm_atom_and_gen_l: 8580 case NVPTX::BI__nvvm_atom_and_gen_ll: 8581 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::And, E); 8582 8583 case NVPTX::BI__nvvm_atom_or_gen_i: 8584 case NVPTX::BI__nvvm_atom_or_gen_l: 8585 case NVPTX::BI__nvvm_atom_or_gen_ll: 8586 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Or, E); 8587 8588 case NVPTX::BI__nvvm_atom_xor_gen_i: 8589 case NVPTX::BI__nvvm_atom_xor_gen_l: 8590 case NVPTX::BI__nvvm_atom_xor_gen_ll: 8591 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xor, E); 8592 8593 case NVPTX::BI__nvvm_atom_xchg_gen_i: 8594 case NVPTX::BI__nvvm_atom_xchg_gen_l: 8595 case NVPTX::BI__nvvm_atom_xchg_gen_ll: 8596 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xchg, E); 8597 8598 case NVPTX::BI__nvvm_atom_max_gen_i: 8599 case NVPTX::BI__nvvm_atom_max_gen_l: 8600 case NVPTX::BI__nvvm_atom_max_gen_ll: 8601 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Max, E); 8602 8603 case NVPTX::BI__nvvm_atom_max_gen_ui: 8604 case NVPTX::BI__nvvm_atom_max_gen_ul: 8605 case NVPTX::BI__nvvm_atom_max_gen_ull: 8606 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMax, E); 8607 8608 case NVPTX::BI__nvvm_atom_min_gen_i: 8609 case NVPTX::BI__nvvm_atom_min_gen_l: 8610 case NVPTX::BI__nvvm_atom_min_gen_ll: 8611 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Min, E); 8612 8613 case NVPTX::BI__nvvm_atom_min_gen_ui: 8614 case NVPTX::BI__nvvm_atom_min_gen_ul: 8615 case NVPTX::BI__nvvm_atom_min_gen_ull: 8616 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMin, E); 8617 8618 case NVPTX::BI__nvvm_atom_cas_gen_i: 8619 case NVPTX::BI__nvvm_atom_cas_gen_l: 8620 case NVPTX::BI__nvvm_atom_cas_gen_ll: 8621 // __nvvm_atom_cas_gen_* should return the old value rather than the 8622 // success flag. 8623 return MakeAtomicCmpXchgValue(*this, E, /*ReturnBool=*/false); 8624 8625 case NVPTX::BI__nvvm_atom_add_gen_f: { 8626 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8627 Value *Val = EmitScalarExpr(E->getArg(1)); 8628 // atomicrmw only deals with integer arguments so we need to use 8629 // LLVM's nvvm_atomic_load_add_f32 intrinsic for that. 8630 Value *FnALAF32 = 8631 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f32, Ptr->getType()); 8632 return Builder.CreateCall(FnALAF32, {Ptr, Val}); 8633 } 8634 8635 case NVPTX::BI__nvvm_atom_inc_gen_ui: { 8636 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8637 Value *Val = EmitScalarExpr(E->getArg(1)); 8638 Value *FnALI32 = 8639 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_inc_32, Ptr->getType()); 8640 return Builder.CreateCall(FnALI32, {Ptr, Val}); 8641 } 8642 8643 case NVPTX::BI__nvvm_atom_dec_gen_ui: { 8644 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8645 Value *Val = EmitScalarExpr(E->getArg(1)); 8646 Value *FnALD32 = 8647 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_dec_32, Ptr->getType()); 8648 return Builder.CreateCall(FnALD32, {Ptr, Val}); 8649 } 8650 8651 case NVPTX::BI__nvvm_ldg_c: 8652 case NVPTX::BI__nvvm_ldg_c2: 8653 case NVPTX::BI__nvvm_ldg_c4: 8654 case NVPTX::BI__nvvm_ldg_s: 8655 case NVPTX::BI__nvvm_ldg_s2: 8656 case NVPTX::BI__nvvm_ldg_s4: 8657 case NVPTX::BI__nvvm_ldg_i: 8658 case NVPTX::BI__nvvm_ldg_i2: 8659 case NVPTX::BI__nvvm_ldg_i4: 8660 case NVPTX::BI__nvvm_ldg_l: 8661 case NVPTX::BI__nvvm_ldg_ll: 8662 case NVPTX::BI__nvvm_ldg_ll2: 8663 case NVPTX::BI__nvvm_ldg_uc: 8664 case NVPTX::BI__nvvm_ldg_uc2: 8665 case NVPTX::BI__nvvm_ldg_uc4: 8666 case NVPTX::BI__nvvm_ldg_us: 8667 case NVPTX::BI__nvvm_ldg_us2: 8668 case NVPTX::BI__nvvm_ldg_us4: 8669 case NVPTX::BI__nvvm_ldg_ui: 8670 case NVPTX::BI__nvvm_ldg_ui2: 8671 case NVPTX::BI__nvvm_ldg_ui4: 8672 case NVPTX::BI__nvvm_ldg_ul: 8673 case NVPTX::BI__nvvm_ldg_ull: 8674 case NVPTX::BI__nvvm_ldg_ull2: 8675 // PTX Interoperability section 2.2: "For a vector with an even number of 8676 // elements, its alignment is set to number of elements times the alignment 8677 // of its member: n*alignof(t)." 8678 return MakeLdg(Intrinsic::nvvm_ldg_global_i); 8679 case NVPTX::BI__nvvm_ldg_f: 8680 case NVPTX::BI__nvvm_ldg_f2: 8681 case NVPTX::BI__nvvm_ldg_f4: 8682 case NVPTX::BI__nvvm_ldg_d: 8683 case NVPTX::BI__nvvm_ldg_d2: 8684 return MakeLdg(Intrinsic::nvvm_ldg_global_f); 8685 8686 case NVPTX::BI__nvvm_atom_cta_add_gen_i: 8687 case NVPTX::BI__nvvm_atom_cta_add_gen_l: 8688 case NVPTX::BI__nvvm_atom_cta_add_gen_ll: 8689 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_cta); 8690 case NVPTX::BI__nvvm_atom_sys_add_gen_i: 8691 case NVPTX::BI__nvvm_atom_sys_add_gen_l: 8692 case NVPTX::BI__nvvm_atom_sys_add_gen_ll: 8693 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_sys); 8694 case NVPTX::BI__nvvm_atom_cta_add_gen_f: 8695 case NVPTX::BI__nvvm_atom_cta_add_gen_d: 8696 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_cta); 8697 case NVPTX::BI__nvvm_atom_sys_add_gen_f: 8698 case NVPTX::BI__nvvm_atom_sys_add_gen_d: 8699 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_sys); 8700 case NVPTX::BI__nvvm_atom_cta_xchg_gen_i: 8701 case NVPTX::BI__nvvm_atom_cta_xchg_gen_l: 8702 case NVPTX::BI__nvvm_atom_cta_xchg_gen_ll: 8703 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_cta); 8704 case NVPTX::BI__nvvm_atom_sys_xchg_gen_i: 8705 case NVPTX::BI__nvvm_atom_sys_xchg_gen_l: 8706 case NVPTX::BI__nvvm_atom_sys_xchg_gen_ll: 8707 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_sys); 8708 case NVPTX::BI__nvvm_atom_cta_max_gen_i: 8709 case NVPTX::BI__nvvm_atom_cta_max_gen_ui: 8710 case NVPTX::BI__nvvm_atom_cta_max_gen_l: 8711 case NVPTX::BI__nvvm_atom_cta_max_gen_ul: 8712 case NVPTX::BI__nvvm_atom_cta_max_gen_ll: 8713 case NVPTX::BI__nvvm_atom_cta_max_gen_ull: 8714 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_cta); 8715 case NVPTX::BI__nvvm_atom_sys_max_gen_i: 8716 case NVPTX::BI__nvvm_atom_sys_max_gen_ui: 8717 case NVPTX::BI__nvvm_atom_sys_max_gen_l: 8718 case NVPTX::BI__nvvm_atom_sys_max_gen_ul: 8719 case NVPTX::BI__nvvm_atom_sys_max_gen_ll: 8720 case NVPTX::BI__nvvm_atom_sys_max_gen_ull: 8721 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_sys); 8722 case NVPTX::BI__nvvm_atom_cta_min_gen_i: 8723 case NVPTX::BI__nvvm_atom_cta_min_gen_ui: 8724 case NVPTX::BI__nvvm_atom_cta_min_gen_l: 8725 case NVPTX::BI__nvvm_atom_cta_min_gen_ul: 8726 case NVPTX::BI__nvvm_atom_cta_min_gen_ll: 8727 case NVPTX::BI__nvvm_atom_cta_min_gen_ull: 8728 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_cta); 8729 case NVPTX::BI__nvvm_atom_sys_min_gen_i: 8730 case NVPTX::BI__nvvm_atom_sys_min_gen_ui: 8731 case NVPTX::BI__nvvm_atom_sys_min_gen_l: 8732 case NVPTX::BI__nvvm_atom_sys_min_gen_ul: 8733 case NVPTX::BI__nvvm_atom_sys_min_gen_ll: 8734 case NVPTX::BI__nvvm_atom_sys_min_gen_ull: 8735 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_sys); 8736 case NVPTX::BI__nvvm_atom_cta_inc_gen_ui: 8737 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_cta); 8738 case NVPTX::BI__nvvm_atom_cta_dec_gen_ui: 8739 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_cta); 8740 case NVPTX::BI__nvvm_atom_sys_inc_gen_ui: 8741 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_sys); 8742 case NVPTX::BI__nvvm_atom_sys_dec_gen_ui: 8743 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_sys); 8744 case NVPTX::BI__nvvm_atom_cta_and_gen_i: 8745 case NVPTX::BI__nvvm_atom_cta_and_gen_l: 8746 case NVPTX::BI__nvvm_atom_cta_and_gen_ll: 8747 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_cta); 8748 case NVPTX::BI__nvvm_atom_sys_and_gen_i: 8749 case NVPTX::BI__nvvm_atom_sys_and_gen_l: 8750 case NVPTX::BI__nvvm_atom_sys_and_gen_ll: 8751 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_sys); 8752 case NVPTX::BI__nvvm_atom_cta_or_gen_i: 8753 case NVPTX::BI__nvvm_atom_cta_or_gen_l: 8754 case NVPTX::BI__nvvm_atom_cta_or_gen_ll: 8755 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_cta); 8756 case NVPTX::BI__nvvm_atom_sys_or_gen_i: 8757 case NVPTX::BI__nvvm_atom_sys_or_gen_l: 8758 case NVPTX::BI__nvvm_atom_sys_or_gen_ll: 8759 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_sys); 8760 case NVPTX::BI__nvvm_atom_cta_xor_gen_i: 8761 case NVPTX::BI__nvvm_atom_cta_xor_gen_l: 8762 case NVPTX::BI__nvvm_atom_cta_xor_gen_ll: 8763 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_cta); 8764 case NVPTX::BI__nvvm_atom_sys_xor_gen_i: 8765 case NVPTX::BI__nvvm_atom_sys_xor_gen_l: 8766 case NVPTX::BI__nvvm_atom_sys_xor_gen_ll: 8767 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_sys); 8768 case NVPTX::BI__nvvm_atom_cta_cas_gen_i: 8769 case NVPTX::BI__nvvm_atom_cta_cas_gen_l: 8770 case NVPTX::BI__nvvm_atom_cta_cas_gen_ll: { 8771 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8772 return Builder.CreateCall( 8773 CGM.getIntrinsic( 8774 Intrinsic::nvvm_atomic_cas_gen_i_cta, 8775 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 8776 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 8777 } 8778 case NVPTX::BI__nvvm_atom_sys_cas_gen_i: 8779 case NVPTX::BI__nvvm_atom_sys_cas_gen_l: 8780 case NVPTX::BI__nvvm_atom_sys_cas_gen_ll: { 8781 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8782 return Builder.CreateCall( 8783 CGM.getIntrinsic( 8784 Intrinsic::nvvm_atomic_cas_gen_i_sys, 8785 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 8786 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 8787 } 8788 default: 8789 return nullptr; 8790 } 8791 } 8792 8793 Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, 8794 const CallExpr *E) { 8795 switch (BuiltinID) { 8796 case WebAssembly::BI__builtin_wasm_current_memory: { 8797 llvm::Type *ResultType = ConvertType(E->getType()); 8798 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_current_memory, ResultType); 8799 return Builder.CreateCall(Callee); 8800 } 8801 case WebAssembly::BI__builtin_wasm_grow_memory: { 8802 Value *X = EmitScalarExpr(E->getArg(0)); 8803 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_grow_memory, X->getType()); 8804 return Builder.CreateCall(Callee, X); 8805 } 8806 8807 default: 8808 return nullptr; 8809 } 8810 } 8811