1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This contains code to emit Builtin calls as LLVM code. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "CGCXXABI.h" 15 #include "CGObjCRuntime.h" 16 #include "CGOpenCLRuntime.h" 17 #include "CGRecordLayout.h" 18 #include "CodeGenFunction.h" 19 #include "CodeGenModule.h" 20 #include "ConstantEmitter.h" 21 #include "TargetInfo.h" 22 #include "clang/AST/ASTContext.h" 23 #include "clang/AST/Decl.h" 24 #include "clang/Analysis/Analyses/OSLog.h" 25 #include "clang/Basic/TargetBuiltins.h" 26 #include "clang/Basic/TargetInfo.h" 27 #include "clang/CodeGen/CGFunctionInfo.h" 28 #include "llvm/ADT/StringExtras.h" 29 #include "llvm/IR/CallSite.h" 30 #include "llvm/IR/DataLayout.h" 31 #include "llvm/IR/InlineAsm.h" 32 #include "llvm/IR/Intrinsics.h" 33 #include "llvm/IR/MDBuilder.h" 34 #include "llvm/Support/ConvertUTF.h" 35 #include "llvm/Support/ScopedPrinter.h" 36 #include "llvm/Support/TargetParser.h" 37 #include <sstream> 38 39 using namespace clang; 40 using namespace CodeGen; 41 using namespace llvm; 42 43 static 44 int64_t clamp(int64_t Value, int64_t Low, int64_t High) { 45 return std::min(High, std::max(Low, Value)); 46 } 47 48 /// getBuiltinLibFunction - Given a builtin id for a function like 49 /// "__builtin_fabsf", return a Function* for "fabsf". 50 llvm::Constant *CodeGenModule::getBuiltinLibFunction(const FunctionDecl *FD, 51 unsigned BuiltinID) { 52 assert(Context.BuiltinInfo.isLibFunction(BuiltinID)); 53 54 // Get the name, skip over the __builtin_ prefix (if necessary). 55 StringRef Name; 56 GlobalDecl D(FD); 57 58 // If the builtin has been declared explicitly with an assembler label, 59 // use the mangled name. This differs from the plain label on platforms 60 // that prefix labels. 61 if (FD->hasAttr<AsmLabelAttr>()) 62 Name = getMangledName(D); 63 else 64 Name = Context.BuiltinInfo.getName(BuiltinID) + 10; 65 66 llvm::FunctionType *Ty = 67 cast<llvm::FunctionType>(getTypes().ConvertType(FD->getType())); 68 69 return GetOrCreateLLVMFunction(Name, Ty, D, /*ForVTable=*/false); 70 } 71 72 /// Emit the conversions required to turn the given value into an 73 /// integer of the given size. 74 static Value *EmitToInt(CodeGenFunction &CGF, llvm::Value *V, 75 QualType T, llvm::IntegerType *IntType) { 76 V = CGF.EmitToMemory(V, T); 77 78 if (V->getType()->isPointerTy()) 79 return CGF.Builder.CreatePtrToInt(V, IntType); 80 81 assert(V->getType() == IntType); 82 return V; 83 } 84 85 static Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V, 86 QualType T, llvm::Type *ResultType) { 87 V = CGF.EmitFromMemory(V, T); 88 89 if (ResultType->isPointerTy()) 90 return CGF.Builder.CreateIntToPtr(V, ResultType); 91 92 assert(V->getType() == ResultType); 93 return V; 94 } 95 96 /// Utility to insert an atomic instruction based on Instrinsic::ID 97 /// and the expression node. 98 static Value *MakeBinaryAtomicValue(CodeGenFunction &CGF, 99 llvm::AtomicRMWInst::BinOp Kind, 100 const CallExpr *E) { 101 QualType T = E->getType(); 102 assert(E->getArg(0)->getType()->isPointerType()); 103 assert(CGF.getContext().hasSameUnqualifiedType(T, 104 E->getArg(0)->getType()->getPointeeType())); 105 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 106 107 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 108 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 109 110 llvm::IntegerType *IntType = 111 llvm::IntegerType::get(CGF.getLLVMContext(), 112 CGF.getContext().getTypeSize(T)); 113 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 114 115 llvm::Value *Args[2]; 116 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 117 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 118 llvm::Type *ValueType = Args[1]->getType(); 119 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 120 121 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 122 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 123 return EmitFromInt(CGF, Result, T, ValueType); 124 } 125 126 static Value *EmitNontemporalStore(CodeGenFunction &CGF, const CallExpr *E) { 127 Value *Val = CGF.EmitScalarExpr(E->getArg(0)); 128 Value *Address = CGF.EmitScalarExpr(E->getArg(1)); 129 130 // Convert the type of the pointer to a pointer to the stored type. 131 Val = CGF.EmitToMemory(Val, E->getArg(0)->getType()); 132 Value *BC = CGF.Builder.CreateBitCast( 133 Address, llvm::PointerType::getUnqual(Val->getType()), "cast"); 134 LValue LV = CGF.MakeNaturalAlignAddrLValue(BC, E->getArg(0)->getType()); 135 LV.setNontemporal(true); 136 CGF.EmitStoreOfScalar(Val, LV, false); 137 return nullptr; 138 } 139 140 static Value *EmitNontemporalLoad(CodeGenFunction &CGF, const CallExpr *E) { 141 Value *Address = CGF.EmitScalarExpr(E->getArg(0)); 142 143 LValue LV = CGF.MakeNaturalAlignAddrLValue(Address, E->getType()); 144 LV.setNontemporal(true); 145 return CGF.EmitLoadOfScalar(LV, E->getExprLoc()); 146 } 147 148 static RValue EmitBinaryAtomic(CodeGenFunction &CGF, 149 llvm::AtomicRMWInst::BinOp Kind, 150 const CallExpr *E) { 151 return RValue::get(MakeBinaryAtomicValue(CGF, Kind, E)); 152 } 153 154 /// Utility to insert an atomic instruction based Instrinsic::ID and 155 /// the expression node, where the return value is the result of the 156 /// operation. 157 static RValue EmitBinaryAtomicPost(CodeGenFunction &CGF, 158 llvm::AtomicRMWInst::BinOp Kind, 159 const CallExpr *E, 160 Instruction::BinaryOps Op, 161 bool Invert = false) { 162 QualType T = E->getType(); 163 assert(E->getArg(0)->getType()->isPointerType()); 164 assert(CGF.getContext().hasSameUnqualifiedType(T, 165 E->getArg(0)->getType()->getPointeeType())); 166 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 167 168 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 169 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 170 171 llvm::IntegerType *IntType = 172 llvm::IntegerType::get(CGF.getLLVMContext(), 173 CGF.getContext().getTypeSize(T)); 174 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 175 176 llvm::Value *Args[2]; 177 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 178 llvm::Type *ValueType = Args[1]->getType(); 179 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 180 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 181 182 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 183 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 184 Result = CGF.Builder.CreateBinOp(Op, Result, Args[1]); 185 if (Invert) 186 Result = CGF.Builder.CreateBinOp(llvm::Instruction::Xor, Result, 187 llvm::ConstantInt::get(IntType, -1)); 188 Result = EmitFromInt(CGF, Result, T, ValueType); 189 return RValue::get(Result); 190 } 191 192 /// @brief Utility to insert an atomic cmpxchg instruction. 193 /// 194 /// @param CGF The current codegen function. 195 /// @param E Builtin call expression to convert to cmpxchg. 196 /// arg0 - address to operate on 197 /// arg1 - value to compare with 198 /// arg2 - new value 199 /// @param ReturnBool Specifies whether to return success flag of 200 /// cmpxchg result or the old value. 201 /// 202 /// @returns result of cmpxchg, according to ReturnBool 203 static Value *MakeAtomicCmpXchgValue(CodeGenFunction &CGF, const CallExpr *E, 204 bool ReturnBool) { 205 QualType T = ReturnBool ? E->getArg(1)->getType() : E->getType(); 206 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 207 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 208 209 llvm::IntegerType *IntType = llvm::IntegerType::get( 210 CGF.getLLVMContext(), CGF.getContext().getTypeSize(T)); 211 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 212 213 Value *Args[3]; 214 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 215 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 216 llvm::Type *ValueType = Args[1]->getType(); 217 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 218 Args[2] = EmitToInt(CGF, CGF.EmitScalarExpr(E->getArg(2)), T, IntType); 219 220 Value *Pair = CGF.Builder.CreateAtomicCmpXchg( 221 Args[0], Args[1], Args[2], llvm::AtomicOrdering::SequentiallyConsistent, 222 llvm::AtomicOrdering::SequentiallyConsistent); 223 if (ReturnBool) 224 // Extract boolean success flag and zext it to int. 225 return CGF.Builder.CreateZExt(CGF.Builder.CreateExtractValue(Pair, 1), 226 CGF.ConvertType(E->getType())); 227 else 228 // Extract old value and emit it using the same type as compare value. 229 return EmitFromInt(CGF, CGF.Builder.CreateExtractValue(Pair, 0), T, 230 ValueType); 231 } 232 233 // Emit a simple mangled intrinsic that has 1 argument and a return type 234 // matching the argument type. 235 static Value *emitUnaryBuiltin(CodeGenFunction &CGF, 236 const CallExpr *E, 237 unsigned IntrinsicID) { 238 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 239 240 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 241 return CGF.Builder.CreateCall(F, Src0); 242 } 243 244 // Emit an intrinsic that has 2 operands of the same type as its result. 245 static Value *emitBinaryBuiltin(CodeGenFunction &CGF, 246 const CallExpr *E, 247 unsigned IntrinsicID) { 248 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 249 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 250 251 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 252 return CGF.Builder.CreateCall(F, { Src0, Src1 }); 253 } 254 255 // Emit an intrinsic that has 3 operands of the same type as its result. 256 static Value *emitTernaryBuiltin(CodeGenFunction &CGF, 257 const CallExpr *E, 258 unsigned IntrinsicID) { 259 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 260 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 261 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); 262 263 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 264 return CGF.Builder.CreateCall(F, { Src0, Src1, Src2 }); 265 } 266 267 // Emit an intrinsic that has 1 float or double operand, and 1 integer. 268 static Value *emitFPIntBuiltin(CodeGenFunction &CGF, 269 const CallExpr *E, 270 unsigned IntrinsicID) { 271 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 272 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 273 274 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 275 return CGF.Builder.CreateCall(F, {Src0, Src1}); 276 } 277 278 /// EmitFAbs - Emit a call to @llvm.fabs(). 279 static Value *EmitFAbs(CodeGenFunction &CGF, Value *V) { 280 Value *F = CGF.CGM.getIntrinsic(Intrinsic::fabs, V->getType()); 281 llvm::CallInst *Call = CGF.Builder.CreateCall(F, V); 282 Call->setDoesNotAccessMemory(); 283 return Call; 284 } 285 286 /// Emit the computation of the sign bit for a floating point value. Returns 287 /// the i1 sign bit value. 288 static Value *EmitSignBit(CodeGenFunction &CGF, Value *V) { 289 LLVMContext &C = CGF.CGM.getLLVMContext(); 290 291 llvm::Type *Ty = V->getType(); 292 int Width = Ty->getPrimitiveSizeInBits(); 293 llvm::Type *IntTy = llvm::IntegerType::get(C, Width); 294 V = CGF.Builder.CreateBitCast(V, IntTy); 295 if (Ty->isPPC_FP128Ty()) { 296 // We want the sign bit of the higher-order double. The bitcast we just 297 // did works as if the double-double was stored to memory and then 298 // read as an i128. The "store" will put the higher-order double in the 299 // lower address in both little- and big-Endian modes, but the "load" 300 // will treat those bits as a different part of the i128: the low bits in 301 // little-Endian, the high bits in big-Endian. Therefore, on big-Endian 302 // we need to shift the high bits down to the low before truncating. 303 Width >>= 1; 304 if (CGF.getTarget().isBigEndian()) { 305 Value *ShiftCst = llvm::ConstantInt::get(IntTy, Width); 306 V = CGF.Builder.CreateLShr(V, ShiftCst); 307 } 308 // We are truncating value in order to extract the higher-order 309 // double, which we will be using to extract the sign from. 310 IntTy = llvm::IntegerType::get(C, Width); 311 V = CGF.Builder.CreateTrunc(V, IntTy); 312 } 313 Value *Zero = llvm::Constant::getNullValue(IntTy); 314 return CGF.Builder.CreateICmpSLT(V, Zero); 315 } 316 317 static RValue emitLibraryCall(CodeGenFunction &CGF, const FunctionDecl *FD, 318 const CallExpr *E, llvm::Constant *calleeValue) { 319 CGCallee callee = CGCallee::forDirect(calleeValue, FD); 320 return CGF.EmitCall(E->getCallee()->getType(), callee, E, ReturnValueSlot()); 321 } 322 323 /// \brief Emit a call to llvm.{sadd,uadd,ssub,usub,smul,umul}.with.overflow.* 324 /// depending on IntrinsicID. 325 /// 326 /// \arg CGF The current codegen function. 327 /// \arg IntrinsicID The ID for the Intrinsic we wish to generate. 328 /// \arg X The first argument to the llvm.*.with.overflow.*. 329 /// \arg Y The second argument to the llvm.*.with.overflow.*. 330 /// \arg Carry The carry returned by the llvm.*.with.overflow.*. 331 /// \returns The result (i.e. sum/product) returned by the intrinsic. 332 static llvm::Value *EmitOverflowIntrinsic(CodeGenFunction &CGF, 333 const llvm::Intrinsic::ID IntrinsicID, 334 llvm::Value *X, llvm::Value *Y, 335 llvm::Value *&Carry) { 336 // Make sure we have integers of the same width. 337 assert(X->getType() == Y->getType() && 338 "Arguments must be the same type. (Did you forget to make sure both " 339 "arguments have the same integer width?)"); 340 341 llvm::Value *Callee = CGF.CGM.getIntrinsic(IntrinsicID, X->getType()); 342 llvm::Value *Tmp = CGF.Builder.CreateCall(Callee, {X, Y}); 343 Carry = CGF.Builder.CreateExtractValue(Tmp, 1); 344 return CGF.Builder.CreateExtractValue(Tmp, 0); 345 } 346 347 static Value *emitRangedBuiltin(CodeGenFunction &CGF, 348 unsigned IntrinsicID, 349 int low, int high) { 350 llvm::MDBuilder MDHelper(CGF.getLLVMContext()); 351 llvm::MDNode *RNode = MDHelper.createRange(APInt(32, low), APInt(32, high)); 352 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, {}); 353 llvm::Instruction *Call = CGF.Builder.CreateCall(F); 354 Call->setMetadata(llvm::LLVMContext::MD_range, RNode); 355 return Call; 356 } 357 358 namespace { 359 struct WidthAndSignedness { 360 unsigned Width; 361 bool Signed; 362 }; 363 } 364 365 static WidthAndSignedness 366 getIntegerWidthAndSignedness(const clang::ASTContext &context, 367 const clang::QualType Type) { 368 assert(Type->isIntegerType() && "Given type is not an integer."); 369 unsigned Width = Type->isBooleanType() ? 1 : context.getTypeInfo(Type).Width; 370 bool Signed = Type->isSignedIntegerType(); 371 return {Width, Signed}; 372 } 373 374 // Given one or more integer types, this function produces an integer type that 375 // encompasses them: any value in one of the given types could be expressed in 376 // the encompassing type. 377 static struct WidthAndSignedness 378 EncompassingIntegerType(ArrayRef<struct WidthAndSignedness> Types) { 379 assert(Types.size() > 0 && "Empty list of types."); 380 381 // If any of the given types is signed, we must return a signed type. 382 bool Signed = false; 383 for (const auto &Type : Types) { 384 Signed |= Type.Signed; 385 } 386 387 // The encompassing type must have a width greater than or equal to the width 388 // of the specified types. Additionally, if the encompassing type is signed, 389 // its width must be strictly greater than the width of any unsigned types 390 // given. 391 unsigned Width = 0; 392 for (const auto &Type : Types) { 393 unsigned MinWidth = Type.Width + (Signed && !Type.Signed); 394 if (Width < MinWidth) { 395 Width = MinWidth; 396 } 397 } 398 399 return {Width, Signed}; 400 } 401 402 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) { 403 llvm::Type *DestType = Int8PtrTy; 404 if (ArgValue->getType() != DestType) 405 ArgValue = 406 Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data()); 407 408 Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend; 409 return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue); 410 } 411 412 /// Checks if using the result of __builtin_object_size(p, @p From) in place of 413 /// __builtin_object_size(p, @p To) is correct 414 static bool areBOSTypesCompatible(int From, int To) { 415 // Note: Our __builtin_object_size implementation currently treats Type=0 and 416 // Type=2 identically. Encoding this implementation detail here may make 417 // improving __builtin_object_size difficult in the future, so it's omitted. 418 return From == To || (From == 0 && To == 1) || (From == 3 && To == 2); 419 } 420 421 static llvm::Value * 422 getDefaultBuiltinObjectSizeResult(unsigned Type, llvm::IntegerType *ResType) { 423 return ConstantInt::get(ResType, (Type & 2) ? 0 : -1, /*isSigned=*/true); 424 } 425 426 llvm::Value * 427 CodeGenFunction::evaluateOrEmitBuiltinObjectSize(const Expr *E, unsigned Type, 428 llvm::IntegerType *ResType, 429 llvm::Value *EmittedE) { 430 uint64_t ObjectSize; 431 if (!E->tryEvaluateObjectSize(ObjectSize, getContext(), Type)) 432 return emitBuiltinObjectSize(E, Type, ResType, EmittedE); 433 return ConstantInt::get(ResType, ObjectSize, /*isSigned=*/true); 434 } 435 436 /// Returns a Value corresponding to the size of the given expression. 437 /// This Value may be either of the following: 438 /// - A llvm::Argument (if E is a param with the pass_object_size attribute on 439 /// it) 440 /// - A call to the @llvm.objectsize intrinsic 441 /// 442 /// EmittedE is the result of emitting `E` as a scalar expr. If it's non-null 443 /// and we wouldn't otherwise try to reference a pass_object_size parameter, 444 /// we'll call @llvm.objectsize on EmittedE, rather than emitting E. 445 llvm::Value * 446 CodeGenFunction::emitBuiltinObjectSize(const Expr *E, unsigned Type, 447 llvm::IntegerType *ResType, 448 llvm::Value *EmittedE) { 449 // We need to reference an argument if the pointer is a parameter with the 450 // pass_object_size attribute. 451 if (auto *D = dyn_cast<DeclRefExpr>(E->IgnoreParenImpCasts())) { 452 auto *Param = dyn_cast<ParmVarDecl>(D->getDecl()); 453 auto *PS = D->getDecl()->getAttr<PassObjectSizeAttr>(); 454 if (Param != nullptr && PS != nullptr && 455 areBOSTypesCompatible(PS->getType(), Type)) { 456 auto Iter = SizeArguments.find(Param); 457 assert(Iter != SizeArguments.end()); 458 459 const ImplicitParamDecl *D = Iter->second; 460 auto DIter = LocalDeclMap.find(D); 461 assert(DIter != LocalDeclMap.end()); 462 463 return EmitLoadOfScalar(DIter->second, /*volatile=*/false, 464 getContext().getSizeType(), E->getLocStart()); 465 } 466 } 467 468 // LLVM can't handle Type=3 appropriately, and __builtin_object_size shouldn't 469 // evaluate E for side-effects. In either case, we shouldn't lower to 470 // @llvm.objectsize. 471 if (Type == 3 || (!EmittedE && E->HasSideEffects(getContext()))) 472 return getDefaultBuiltinObjectSizeResult(Type, ResType); 473 474 Value *Ptr = EmittedE ? EmittedE : EmitScalarExpr(E); 475 assert(Ptr->getType()->isPointerTy() && 476 "Non-pointer passed to __builtin_object_size?"); 477 478 Value *F = CGM.getIntrinsic(Intrinsic::objectsize, {ResType, Ptr->getType()}); 479 480 // LLVM only supports 0 and 2, make sure that we pass along that as a boolean. 481 Value *Min = Builder.getInt1((Type & 2) != 0); 482 // For GCC compatibility, __builtin_object_size treat NULL as unknown size. 483 Value *NullIsUnknown = Builder.getTrue(); 484 return Builder.CreateCall(F, {Ptr, Min, NullIsUnknown}); 485 } 486 487 // Many of MSVC builtins are on both x64 and ARM; to avoid repeating code, we 488 // handle them here. 489 enum class CodeGenFunction::MSVCIntrin { 490 _BitScanForward, 491 _BitScanReverse, 492 _InterlockedAnd, 493 _InterlockedDecrement, 494 _InterlockedExchange, 495 _InterlockedExchangeAdd, 496 _InterlockedExchangeSub, 497 _InterlockedIncrement, 498 _InterlockedOr, 499 _InterlockedXor, 500 _interlockedbittestandset, 501 __fastfail, 502 }; 503 504 Value *CodeGenFunction::EmitMSVCBuiltinExpr(MSVCIntrin BuiltinID, 505 const CallExpr *E) { 506 switch (BuiltinID) { 507 case MSVCIntrin::_BitScanForward: 508 case MSVCIntrin::_BitScanReverse: { 509 Value *ArgValue = EmitScalarExpr(E->getArg(1)); 510 511 llvm::Type *ArgType = ArgValue->getType(); 512 llvm::Type *IndexType = 513 EmitScalarExpr(E->getArg(0))->getType()->getPointerElementType(); 514 llvm::Type *ResultType = ConvertType(E->getType()); 515 516 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 517 Value *ResZero = llvm::Constant::getNullValue(ResultType); 518 Value *ResOne = llvm::ConstantInt::get(ResultType, 1); 519 520 BasicBlock *Begin = Builder.GetInsertBlock(); 521 BasicBlock *End = createBasicBlock("bitscan_end", this->CurFn); 522 Builder.SetInsertPoint(End); 523 PHINode *Result = Builder.CreatePHI(ResultType, 2, "bitscan_result"); 524 525 Builder.SetInsertPoint(Begin); 526 Value *IsZero = Builder.CreateICmpEQ(ArgValue, ArgZero); 527 BasicBlock *NotZero = createBasicBlock("bitscan_not_zero", this->CurFn); 528 Builder.CreateCondBr(IsZero, End, NotZero); 529 Result->addIncoming(ResZero, Begin); 530 531 Builder.SetInsertPoint(NotZero); 532 Address IndexAddress = EmitPointerWithAlignment(E->getArg(0)); 533 534 if (BuiltinID == MSVCIntrin::_BitScanForward) { 535 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 536 Value *ZeroCount = Builder.CreateCall(F, {ArgValue, Builder.getTrue()}); 537 ZeroCount = Builder.CreateIntCast(ZeroCount, IndexType, false); 538 Builder.CreateStore(ZeroCount, IndexAddress, false); 539 } else { 540 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 541 Value *ArgTypeLastIndex = llvm::ConstantInt::get(IndexType, ArgWidth - 1); 542 543 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 544 Value *ZeroCount = Builder.CreateCall(F, {ArgValue, Builder.getTrue()}); 545 ZeroCount = Builder.CreateIntCast(ZeroCount, IndexType, false); 546 Value *Index = Builder.CreateNSWSub(ArgTypeLastIndex, ZeroCount); 547 Builder.CreateStore(Index, IndexAddress, false); 548 } 549 Builder.CreateBr(End); 550 Result->addIncoming(ResOne, NotZero); 551 552 Builder.SetInsertPoint(End); 553 return Result; 554 } 555 case MSVCIntrin::_InterlockedAnd: 556 return MakeBinaryAtomicValue(*this, AtomicRMWInst::And, E); 557 case MSVCIntrin::_InterlockedExchange: 558 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xchg, E); 559 case MSVCIntrin::_InterlockedExchangeAdd: 560 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Add, E); 561 case MSVCIntrin::_InterlockedExchangeSub: 562 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Sub, E); 563 case MSVCIntrin::_InterlockedOr: 564 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Or, E); 565 case MSVCIntrin::_InterlockedXor: 566 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xor, E); 567 568 case MSVCIntrin::_interlockedbittestandset: { 569 llvm::Value *Addr = EmitScalarExpr(E->getArg(0)); 570 llvm::Value *Bit = EmitScalarExpr(E->getArg(1)); 571 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 572 AtomicRMWInst::Or, Addr, 573 Builder.CreateShl(ConstantInt::get(Bit->getType(), 1), Bit), 574 llvm::AtomicOrdering::SequentiallyConsistent); 575 // Shift the relevant bit to the least significant position, truncate to 576 // the result type, and test the low bit. 577 llvm::Value *Shifted = Builder.CreateLShr(RMWI, Bit); 578 llvm::Value *Truncated = 579 Builder.CreateTrunc(Shifted, ConvertType(E->getType())); 580 return Builder.CreateAnd(Truncated, 581 ConstantInt::get(Truncated->getType(), 1)); 582 } 583 584 case MSVCIntrin::_InterlockedDecrement: { 585 llvm::Type *IntTy = ConvertType(E->getType()); 586 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 587 AtomicRMWInst::Sub, 588 EmitScalarExpr(E->getArg(0)), 589 ConstantInt::get(IntTy, 1), 590 llvm::AtomicOrdering::SequentiallyConsistent); 591 return Builder.CreateSub(RMWI, ConstantInt::get(IntTy, 1)); 592 } 593 case MSVCIntrin::_InterlockedIncrement: { 594 llvm::Type *IntTy = ConvertType(E->getType()); 595 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 596 AtomicRMWInst::Add, 597 EmitScalarExpr(E->getArg(0)), 598 ConstantInt::get(IntTy, 1), 599 llvm::AtomicOrdering::SequentiallyConsistent); 600 return Builder.CreateAdd(RMWI, ConstantInt::get(IntTy, 1)); 601 } 602 603 case MSVCIntrin::__fastfail: { 604 // Request immediate process termination from the kernel. The instruction 605 // sequences to do this are documented on MSDN: 606 // https://msdn.microsoft.com/en-us/library/dn774154.aspx 607 llvm::Triple::ArchType ISA = getTarget().getTriple().getArch(); 608 StringRef Asm, Constraints; 609 switch (ISA) { 610 default: 611 ErrorUnsupported(E, "__fastfail call for this architecture"); 612 break; 613 case llvm::Triple::x86: 614 case llvm::Triple::x86_64: 615 Asm = "int $$0x29"; 616 Constraints = "{cx}"; 617 break; 618 case llvm::Triple::thumb: 619 Asm = "udf #251"; 620 Constraints = "{r0}"; 621 break; 622 } 623 llvm::FunctionType *FTy = llvm::FunctionType::get(VoidTy, {Int32Ty}, false); 624 llvm::InlineAsm *IA = 625 llvm::InlineAsm::get(FTy, Asm, Constraints, /*SideEffects=*/true); 626 llvm::AttributeList NoReturnAttr = llvm::AttributeList::get( 627 getLLVMContext(), llvm::AttributeList::FunctionIndex, 628 llvm::Attribute::NoReturn); 629 CallSite CS = Builder.CreateCall(IA, EmitScalarExpr(E->getArg(0))); 630 CS.setAttributes(NoReturnAttr); 631 return CS.getInstruction(); 632 } 633 } 634 llvm_unreachable("Incorrect MSVC intrinsic!"); 635 } 636 637 namespace { 638 // ARC cleanup for __builtin_os_log_format 639 struct CallObjCArcUse final : EHScopeStack::Cleanup { 640 CallObjCArcUse(llvm::Value *object) : object(object) {} 641 llvm::Value *object; 642 643 void Emit(CodeGenFunction &CGF, Flags flags) override { 644 CGF.EmitARCIntrinsicUse(object); 645 } 646 }; 647 } 648 649 Value *CodeGenFunction::EmitCheckedArgForBuiltin(const Expr *E, 650 BuiltinCheckKind Kind) { 651 assert((Kind == BCK_CLZPassedZero || Kind == BCK_CTZPassedZero) 652 && "Unsupported builtin check kind"); 653 654 Value *ArgValue = EmitScalarExpr(E); 655 if (!SanOpts.has(SanitizerKind::Builtin) || !getTarget().isCLZForZeroUndef()) 656 return ArgValue; 657 658 SanitizerScope SanScope(this); 659 Value *Cond = Builder.CreateICmpNE( 660 ArgValue, llvm::Constant::getNullValue(ArgValue->getType())); 661 EmitCheck(std::make_pair(Cond, SanitizerKind::Builtin), 662 SanitizerHandler::InvalidBuiltin, 663 {EmitCheckSourceLocation(E->getExprLoc()), 664 llvm::ConstantInt::get(Builder.getInt8Ty(), Kind)}, 665 None); 666 return ArgValue; 667 } 668 669 /// Get the argument type for arguments to os_log_helper. 670 static CanQualType getOSLogArgType(ASTContext &C, int Size) { 671 QualType UnsignedTy = C.getIntTypeForBitwidth(Size * 8, /*Signed=*/false); 672 return C.getCanonicalType(UnsignedTy); 673 } 674 675 llvm::Function *CodeGenFunction::generateBuiltinOSLogHelperFunction( 676 const analyze_os_log::OSLogBufferLayout &Layout, 677 CharUnits BufferAlignment) { 678 ASTContext &Ctx = getContext(); 679 680 llvm::SmallString<64> Name; 681 { 682 raw_svector_ostream OS(Name); 683 OS << "__os_log_helper"; 684 OS << "_" << BufferAlignment.getQuantity(); 685 OS << "_" << int(Layout.getSummaryByte()); 686 OS << "_" << int(Layout.getNumArgsByte()); 687 for (const auto &Item : Layout.Items) 688 OS << "_" << int(Item.getSizeByte()) << "_" 689 << int(Item.getDescriptorByte()); 690 } 691 692 if (llvm::Function *F = CGM.getModule().getFunction(Name)) 693 return F; 694 695 llvm::SmallVector<ImplicitParamDecl, 4> Params; 696 Params.emplace_back(Ctx, nullptr, SourceLocation(), &Ctx.Idents.get("buffer"), 697 Ctx.VoidPtrTy, ImplicitParamDecl::Other); 698 699 for (unsigned int I = 0, E = Layout.Items.size(); I < E; ++I) { 700 char Size = Layout.Items[I].getSizeByte(); 701 if (!Size) 702 continue; 703 704 Params.emplace_back( 705 Ctx, nullptr, SourceLocation(), 706 &Ctx.Idents.get(std::string("arg") + llvm::to_string(I)), 707 getOSLogArgType(Ctx, Size), ImplicitParamDecl::Other); 708 } 709 710 FunctionArgList Args; 711 for (auto &P : Params) 712 Args.push_back(&P); 713 714 // The helper function has linkonce_odr linkage to enable the linker to merge 715 // identical functions. To ensure the merging always happens, 'noinline' is 716 // attached to the function when compiling with -Oz. 717 const CGFunctionInfo &FI = 718 CGM.getTypes().arrangeBuiltinFunctionDeclaration(Ctx.VoidTy, Args); 719 llvm::FunctionType *FuncTy = CGM.getTypes().GetFunctionType(FI); 720 llvm::Function *Fn = llvm::Function::Create( 721 FuncTy, llvm::GlobalValue::LinkOnceODRLinkage, Name, &CGM.getModule()); 722 Fn->setVisibility(llvm::GlobalValue::HiddenVisibility); 723 CGM.SetLLVMFunctionAttributes(nullptr, FI, Fn); 724 CGM.SetLLVMFunctionAttributesForDefinition(nullptr, Fn); 725 726 // Attach 'noinline' at -Oz. 727 if (CGM.getCodeGenOpts().OptimizeSize == 2) 728 Fn->addFnAttr(llvm::Attribute::NoInline); 729 730 auto NL = ApplyDebugLocation::CreateEmpty(*this); 731 IdentifierInfo *II = &Ctx.Idents.get(Name); 732 FunctionDecl *FD = FunctionDecl::Create( 733 Ctx, Ctx.getTranslationUnitDecl(), SourceLocation(), SourceLocation(), II, 734 Ctx.VoidTy, nullptr, SC_PrivateExtern, false, false); 735 736 StartFunction(FD, Ctx.VoidTy, Fn, FI, Args); 737 738 // Create a scope with an artificial location for the body of this function. 739 auto AL = ApplyDebugLocation::CreateArtificial(*this); 740 741 CharUnits Offset; 742 Address BufAddr(Builder.CreateLoad(GetAddrOfLocalVar(&Params[0]), "buf"), 743 BufferAlignment); 744 Builder.CreateStore(Builder.getInt8(Layout.getSummaryByte()), 745 Builder.CreateConstByteGEP(BufAddr, Offset++, "summary")); 746 Builder.CreateStore(Builder.getInt8(Layout.getNumArgsByte()), 747 Builder.CreateConstByteGEP(BufAddr, Offset++, "numArgs")); 748 749 unsigned I = 1; 750 for (const auto &Item : Layout.Items) { 751 Builder.CreateStore( 752 Builder.getInt8(Item.getDescriptorByte()), 753 Builder.CreateConstByteGEP(BufAddr, Offset++, "argDescriptor")); 754 Builder.CreateStore( 755 Builder.getInt8(Item.getSizeByte()), 756 Builder.CreateConstByteGEP(BufAddr, Offset++, "argSize")); 757 758 CharUnits Size = Item.size(); 759 if (!Size.getQuantity()) 760 continue; 761 762 Address Arg = GetAddrOfLocalVar(&Params[I]); 763 Address Addr = Builder.CreateConstByteGEP(BufAddr, Offset, "argData"); 764 Addr = Builder.CreateBitCast(Addr, Arg.getPointer()->getType(), 765 "argDataCast"); 766 Builder.CreateStore(Builder.CreateLoad(Arg), Addr); 767 Offset += Size; 768 ++I; 769 } 770 771 FinishFunction(); 772 773 return Fn; 774 } 775 776 RValue CodeGenFunction::emitBuiltinOSLogFormat(const CallExpr &E) { 777 assert(E.getNumArgs() >= 2 && 778 "__builtin_os_log_format takes at least 2 arguments"); 779 ASTContext &Ctx = getContext(); 780 analyze_os_log::OSLogBufferLayout Layout; 781 analyze_os_log::computeOSLogBufferLayout(Ctx, &E, Layout); 782 Address BufAddr = EmitPointerWithAlignment(E.getArg(0)); 783 llvm::SmallVector<llvm::Value *, 4> RetainableOperands; 784 785 // Ignore argument 1, the format string. It is not currently used. 786 CallArgList Args; 787 Args.add(RValue::get(BufAddr.getPointer()), Ctx.VoidPtrTy); 788 789 for (const auto &Item : Layout.Items) { 790 int Size = Item.getSizeByte(); 791 if (!Size) 792 continue; 793 794 llvm::Value *ArgVal; 795 796 if (const Expr *TheExpr = Item.getExpr()) { 797 ArgVal = EmitScalarExpr(TheExpr, /*Ignore*/ false); 798 799 // Check if this is a retainable type. 800 if (TheExpr->getType()->isObjCRetainableType()) { 801 assert(getEvaluationKind(TheExpr->getType()) == TEK_Scalar && 802 "Only scalar can be a ObjC retainable type"); 803 // Check if the object is constant, if not, save it in 804 // RetainableOperands. 805 if (!isa<Constant>(ArgVal)) 806 RetainableOperands.push_back(ArgVal); 807 } 808 } else { 809 ArgVal = Builder.getInt32(Item.getConstValue().getQuantity()); 810 } 811 812 unsigned ArgValSize = 813 CGM.getDataLayout().getTypeSizeInBits(ArgVal->getType()); 814 llvm::IntegerType *IntTy = llvm::Type::getIntNTy(getLLVMContext(), 815 ArgValSize); 816 ArgVal = Builder.CreateBitOrPointerCast(ArgVal, IntTy); 817 CanQualType ArgTy = getOSLogArgType(Ctx, Size); 818 // If ArgVal has type x86_fp80, zero-extend ArgVal. 819 ArgVal = Builder.CreateZExtOrBitCast(ArgVal, ConvertType(ArgTy)); 820 Args.add(RValue::get(ArgVal), ArgTy); 821 } 822 823 const CGFunctionInfo &FI = 824 CGM.getTypes().arrangeBuiltinFunctionCall(Ctx.VoidTy, Args); 825 llvm::Function *F = CodeGenFunction(CGM).generateBuiltinOSLogHelperFunction( 826 Layout, BufAddr.getAlignment()); 827 EmitCall(FI, CGCallee::forDirect(F), ReturnValueSlot(), Args); 828 829 // Push a clang.arc.use cleanup for each object in RetainableOperands. The 830 // cleanup will cause the use to appear after the final log call, keeping 831 // the object valid while it’s held in the log buffer. Note that if there’s 832 // a release cleanup on the object, it will already be active; since 833 // cleanups are emitted in reverse order, the use will occur before the 834 // object is released. 835 if (!RetainableOperands.empty() && getLangOpts().ObjCAutoRefCount && 836 CGM.getCodeGenOpts().OptimizationLevel != 0) 837 for (llvm::Value *Object : RetainableOperands) 838 pushFullExprCleanup<CallObjCArcUse>(getARCCleanupKind(), Object); 839 840 return RValue::get(BufAddr.getPointer()); 841 } 842 843 /// Determine if a binop is a checked mixed-sign multiply we can specialize. 844 static bool isSpecialMixedSignMultiply(unsigned BuiltinID, 845 WidthAndSignedness Op1Info, 846 WidthAndSignedness Op2Info, 847 WidthAndSignedness ResultInfo) { 848 return BuiltinID == Builtin::BI__builtin_mul_overflow && 849 Op1Info.Width == Op2Info.Width && Op1Info.Width >= ResultInfo.Width && 850 Op1Info.Signed != Op2Info.Signed; 851 } 852 853 /// Emit a checked mixed-sign multiply. This is a cheaper specialization of 854 /// the generic checked-binop irgen. 855 static RValue 856 EmitCheckedMixedSignMultiply(CodeGenFunction &CGF, const clang::Expr *Op1, 857 WidthAndSignedness Op1Info, const clang::Expr *Op2, 858 WidthAndSignedness Op2Info, 859 const clang::Expr *ResultArg, QualType ResultQTy, 860 WidthAndSignedness ResultInfo) { 861 assert(isSpecialMixedSignMultiply(Builtin::BI__builtin_mul_overflow, Op1Info, 862 Op2Info, ResultInfo) && 863 "Not a mixed-sign multipliction we can specialize"); 864 865 // Emit the signed and unsigned operands. 866 const clang::Expr *SignedOp = Op1Info.Signed ? Op1 : Op2; 867 const clang::Expr *UnsignedOp = Op1Info.Signed ? Op2 : Op1; 868 llvm::Value *Signed = CGF.EmitScalarExpr(SignedOp); 869 llvm::Value *Unsigned = CGF.EmitScalarExpr(UnsignedOp); 870 871 llvm::Type *OpTy = Signed->getType(); 872 llvm::Value *Zero = llvm::Constant::getNullValue(OpTy); 873 Address ResultPtr = CGF.EmitPointerWithAlignment(ResultArg); 874 llvm::Type *ResTy = ResultPtr.getElementType(); 875 876 // Take the absolute value of the signed operand. 877 llvm::Value *IsNegative = CGF.Builder.CreateICmpSLT(Signed, Zero); 878 llvm::Value *AbsOfNegative = CGF.Builder.CreateSub(Zero, Signed); 879 llvm::Value *AbsSigned = 880 CGF.Builder.CreateSelect(IsNegative, AbsOfNegative, Signed); 881 882 // Perform a checked unsigned multiplication. 883 llvm::Value *UnsignedOverflow; 884 llvm::Value *UnsignedResult = 885 EmitOverflowIntrinsic(CGF, llvm::Intrinsic::umul_with_overflow, AbsSigned, 886 Unsigned, UnsignedOverflow); 887 888 llvm::Value *Overflow, *Result; 889 if (ResultInfo.Signed) { 890 // Signed overflow occurs if the result is greater than INT_MAX or lesser 891 // than INT_MIN, i.e when |Result| > (INT_MAX + IsNegative). 892 auto IntMax = llvm::APInt::getSignedMaxValue(ResultInfo.Width) 893 .zextOrSelf(Op1Info.Width); 894 llvm::Value *MaxResult = 895 CGF.Builder.CreateAdd(llvm::ConstantInt::get(OpTy, IntMax), 896 CGF.Builder.CreateZExt(IsNegative, OpTy)); 897 llvm::Value *SignedOverflow = 898 CGF.Builder.CreateICmpUGT(UnsignedResult, MaxResult); 899 Overflow = CGF.Builder.CreateOr(UnsignedOverflow, SignedOverflow); 900 901 // Prepare the signed result (possibly by negating it). 902 llvm::Value *NegativeResult = CGF.Builder.CreateNeg(UnsignedResult); 903 llvm::Value *SignedResult = 904 CGF.Builder.CreateSelect(IsNegative, NegativeResult, UnsignedResult); 905 Result = CGF.Builder.CreateTrunc(SignedResult, ResTy); 906 } else { 907 // Unsigned overflow occurs if the result is < 0 or greater than UINT_MAX. 908 llvm::Value *Underflow = CGF.Builder.CreateAnd( 909 IsNegative, CGF.Builder.CreateIsNotNull(UnsignedResult)); 910 Overflow = CGF.Builder.CreateOr(UnsignedOverflow, Underflow); 911 if (ResultInfo.Width < Op1Info.Width) { 912 auto IntMax = 913 llvm::APInt::getMaxValue(ResultInfo.Width).zext(Op1Info.Width); 914 llvm::Value *TruncOverflow = CGF.Builder.CreateICmpUGT( 915 UnsignedResult, llvm::ConstantInt::get(OpTy, IntMax)); 916 Overflow = CGF.Builder.CreateOr(Overflow, TruncOverflow); 917 } 918 919 // Negate the product if it would be negative in infinite precision. 920 Result = CGF.Builder.CreateSelect( 921 IsNegative, CGF.Builder.CreateNeg(UnsignedResult), UnsignedResult); 922 923 Result = CGF.Builder.CreateTrunc(Result, ResTy); 924 } 925 assert(Overflow && Result && "Missing overflow or result"); 926 927 bool isVolatile = 928 ResultArg->getType()->getPointeeType().isVolatileQualified(); 929 CGF.Builder.CreateStore(CGF.EmitToMemory(Result, ResultQTy), ResultPtr, 930 isVolatile); 931 return RValue::get(Overflow); 932 } 933 934 static llvm::Value *dumpRecord(CodeGenFunction &CGF, QualType RType, 935 Value *&RecordPtr, CharUnits Align, Value *Func, 936 int Lvl) { 937 const auto *RT = RType->getAs<RecordType>(); 938 ASTContext &Context = CGF.getContext(); 939 RecordDecl *RD = RT->getDecl()->getDefinition(); 940 ASTContext &Ctx = RD->getASTContext(); 941 const ASTRecordLayout &RL = Ctx.getASTRecordLayout(RD); 942 std::string Pad = std::string(Lvl * 4, ' '); 943 944 Value *GString = 945 CGF.Builder.CreateGlobalStringPtr(RType.getAsString() + " {\n"); 946 Value *Res = CGF.Builder.CreateCall(Func, {GString}); 947 948 static llvm::DenseMap<QualType, const char *> Types; 949 if (Types.empty()) { 950 Types[Context.CharTy] = "%c"; 951 Types[Context.BoolTy] = "%d"; 952 Types[Context.SignedCharTy] = "%hhd"; 953 Types[Context.UnsignedCharTy] = "%hhu"; 954 Types[Context.IntTy] = "%d"; 955 Types[Context.UnsignedIntTy] = "%u"; 956 Types[Context.LongTy] = "%ld"; 957 Types[Context.UnsignedLongTy] = "%lu"; 958 Types[Context.LongLongTy] = "%lld"; 959 Types[Context.UnsignedLongLongTy] = "%llu"; 960 Types[Context.ShortTy] = "%hd"; 961 Types[Context.UnsignedShortTy] = "%hu"; 962 Types[Context.VoidPtrTy] = "%p"; 963 Types[Context.FloatTy] = "%f"; 964 Types[Context.DoubleTy] = "%f"; 965 Types[Context.LongDoubleTy] = "%Lf"; 966 Types[Context.getPointerType(Context.CharTy)] = "%s"; 967 Types[Context.getPointerType(Context.getConstType(Context.CharTy))] = "%s"; 968 } 969 970 for (const auto *FD : RD->fields()) { 971 uint64_t Off = RL.getFieldOffset(FD->getFieldIndex()); 972 Off = Ctx.toCharUnitsFromBits(Off).getQuantity(); 973 974 Value *FieldPtr = RecordPtr; 975 if (RD->isUnion()) 976 FieldPtr = CGF.Builder.CreatePointerCast( 977 FieldPtr, CGF.ConvertType(Context.getPointerType(FD->getType()))); 978 else 979 FieldPtr = CGF.Builder.CreateStructGEP(CGF.ConvertType(RType), FieldPtr, 980 FD->getFieldIndex()); 981 982 GString = CGF.Builder.CreateGlobalStringPtr( 983 llvm::Twine(Pad) 984 .concat(FD->getType().getAsString()) 985 .concat(llvm::Twine(' ')) 986 .concat(FD->getNameAsString()) 987 .concat(" : ") 988 .str()); 989 Value *TmpRes = CGF.Builder.CreateCall(Func, {GString}); 990 Res = CGF.Builder.CreateAdd(Res, TmpRes); 991 992 QualType CanonicalType = 993 FD->getType().getUnqualifiedType().getCanonicalType(); 994 995 // We check whether we are in a recursive type 996 if (CanonicalType->isRecordType()) { 997 Value *TmpRes = 998 dumpRecord(CGF, CanonicalType, FieldPtr, Align, Func, Lvl + 1); 999 Res = CGF.Builder.CreateAdd(TmpRes, Res); 1000 continue; 1001 } 1002 1003 // We try to determine the best format to print the current field 1004 llvm::Twine Format = Types.find(CanonicalType) == Types.end() 1005 ? Types[Context.VoidPtrTy] 1006 : Types[CanonicalType]; 1007 1008 Address FieldAddress = Address(FieldPtr, Align); 1009 FieldPtr = CGF.Builder.CreateLoad(FieldAddress); 1010 1011 // FIXME Need to handle bitfield here 1012 GString = CGF.Builder.CreateGlobalStringPtr( 1013 Format.concat(llvm::Twine('\n')).str()); 1014 TmpRes = CGF.Builder.CreateCall(Func, {GString, FieldPtr}); 1015 Res = CGF.Builder.CreateAdd(Res, TmpRes); 1016 } 1017 1018 GString = CGF.Builder.CreateGlobalStringPtr(Pad + "}\n"); 1019 Value *TmpRes = CGF.Builder.CreateCall(Func, {GString}); 1020 Res = CGF.Builder.CreateAdd(Res, TmpRes); 1021 return Res; 1022 } 1023 1024 RValue CodeGenFunction::EmitBuiltinExpr(const FunctionDecl *FD, 1025 unsigned BuiltinID, const CallExpr *E, 1026 ReturnValueSlot ReturnValue) { 1027 // See if we can constant fold this builtin. If so, don't emit it at all. 1028 Expr::EvalResult Result; 1029 if (E->EvaluateAsRValue(Result, CGM.getContext()) && 1030 !Result.hasSideEffects()) { 1031 if (Result.Val.isInt()) 1032 return RValue::get(llvm::ConstantInt::get(getLLVMContext(), 1033 Result.Val.getInt())); 1034 if (Result.Val.isFloat()) 1035 return RValue::get(llvm::ConstantFP::get(getLLVMContext(), 1036 Result.Val.getFloat())); 1037 } 1038 1039 // There are LLVM math intrinsics/instructions corresponding to math library 1040 // functions except the LLVM op will never set errno while the math library 1041 // might. Also, math builtins have the same semantics as their math library 1042 // twins. Thus, we can transform math library and builtin calls to their 1043 // LLVM counterparts if the call is marked 'const' (known to never set errno). 1044 if (FD->hasAttr<ConstAttr>()) { 1045 switch (BuiltinID) { 1046 case Builtin::BIceil: 1047 case Builtin::BIceilf: 1048 case Builtin::BIceill: 1049 case Builtin::BI__builtin_ceil: 1050 case Builtin::BI__builtin_ceilf: 1051 case Builtin::BI__builtin_ceill: 1052 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::ceil)); 1053 1054 case Builtin::BIcopysign: 1055 case Builtin::BIcopysignf: 1056 case Builtin::BIcopysignl: 1057 case Builtin::BI__builtin_copysign: 1058 case Builtin::BI__builtin_copysignf: 1059 case Builtin::BI__builtin_copysignl: 1060 case Builtin::BI__builtin_copysignf128: 1061 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::copysign)); 1062 1063 case Builtin::BIcos: 1064 case Builtin::BIcosf: 1065 case Builtin::BIcosl: 1066 case Builtin::BI__builtin_cos: 1067 case Builtin::BI__builtin_cosf: 1068 case Builtin::BI__builtin_cosl: 1069 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::cos)); 1070 1071 case Builtin::BIexp: 1072 case Builtin::BIexpf: 1073 case Builtin::BIexpl: 1074 case Builtin::BI__builtin_exp: 1075 case Builtin::BI__builtin_expf: 1076 case Builtin::BI__builtin_expl: 1077 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::exp)); 1078 1079 case Builtin::BIexp2: 1080 case Builtin::BIexp2f: 1081 case Builtin::BIexp2l: 1082 case Builtin::BI__builtin_exp2: 1083 case Builtin::BI__builtin_exp2f: 1084 case Builtin::BI__builtin_exp2l: 1085 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::exp2)); 1086 1087 case Builtin::BIfabs: 1088 case Builtin::BIfabsf: 1089 case Builtin::BIfabsl: 1090 case Builtin::BI__builtin_fabs: 1091 case Builtin::BI__builtin_fabsf: 1092 case Builtin::BI__builtin_fabsl: 1093 case Builtin::BI__builtin_fabsf128: 1094 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::fabs)); 1095 1096 case Builtin::BIfloor: 1097 case Builtin::BIfloorf: 1098 case Builtin::BIfloorl: 1099 case Builtin::BI__builtin_floor: 1100 case Builtin::BI__builtin_floorf: 1101 case Builtin::BI__builtin_floorl: 1102 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::floor)); 1103 1104 case Builtin::BIfma: 1105 case Builtin::BIfmaf: 1106 case Builtin::BIfmal: 1107 case Builtin::BI__builtin_fma: 1108 case Builtin::BI__builtin_fmaf: 1109 case Builtin::BI__builtin_fmal: 1110 return RValue::get(emitTernaryBuiltin(*this, E, Intrinsic::fma)); 1111 1112 case Builtin::BIfmax: 1113 case Builtin::BIfmaxf: 1114 case Builtin::BIfmaxl: 1115 case Builtin::BI__builtin_fmax: 1116 case Builtin::BI__builtin_fmaxf: 1117 case Builtin::BI__builtin_fmaxl: 1118 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::maxnum)); 1119 1120 case Builtin::BIfmin: 1121 case Builtin::BIfminf: 1122 case Builtin::BIfminl: 1123 case Builtin::BI__builtin_fmin: 1124 case Builtin::BI__builtin_fminf: 1125 case Builtin::BI__builtin_fminl: 1126 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::minnum)); 1127 1128 // fmod() is a special-case. It maps to the frem instruction rather than an 1129 // LLVM intrinsic. 1130 case Builtin::BIfmod: 1131 case Builtin::BIfmodf: 1132 case Builtin::BIfmodl: 1133 case Builtin::BI__builtin_fmod: 1134 case Builtin::BI__builtin_fmodf: 1135 case Builtin::BI__builtin_fmodl: { 1136 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 1137 Value *Arg2 = EmitScalarExpr(E->getArg(1)); 1138 return RValue::get(Builder.CreateFRem(Arg1, Arg2, "fmod")); 1139 } 1140 1141 case Builtin::BIlog: 1142 case Builtin::BIlogf: 1143 case Builtin::BIlogl: 1144 case Builtin::BI__builtin_log: 1145 case Builtin::BI__builtin_logf: 1146 case Builtin::BI__builtin_logl: 1147 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::log)); 1148 1149 case Builtin::BIlog10: 1150 case Builtin::BIlog10f: 1151 case Builtin::BIlog10l: 1152 case Builtin::BI__builtin_log10: 1153 case Builtin::BI__builtin_log10f: 1154 case Builtin::BI__builtin_log10l: 1155 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::log10)); 1156 1157 case Builtin::BIlog2: 1158 case Builtin::BIlog2f: 1159 case Builtin::BIlog2l: 1160 case Builtin::BI__builtin_log2: 1161 case Builtin::BI__builtin_log2f: 1162 case Builtin::BI__builtin_log2l: 1163 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::log2)); 1164 1165 case Builtin::BInearbyint: 1166 case Builtin::BInearbyintf: 1167 case Builtin::BInearbyintl: 1168 case Builtin::BI__builtin_nearbyint: 1169 case Builtin::BI__builtin_nearbyintf: 1170 case Builtin::BI__builtin_nearbyintl: 1171 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::nearbyint)); 1172 1173 case Builtin::BIpow: 1174 case Builtin::BIpowf: 1175 case Builtin::BIpowl: 1176 case Builtin::BI__builtin_pow: 1177 case Builtin::BI__builtin_powf: 1178 case Builtin::BI__builtin_powl: 1179 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::pow)); 1180 1181 case Builtin::BIrint: 1182 case Builtin::BIrintf: 1183 case Builtin::BIrintl: 1184 case Builtin::BI__builtin_rint: 1185 case Builtin::BI__builtin_rintf: 1186 case Builtin::BI__builtin_rintl: 1187 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::rint)); 1188 1189 case Builtin::BIround: 1190 case Builtin::BIroundf: 1191 case Builtin::BIroundl: 1192 case Builtin::BI__builtin_round: 1193 case Builtin::BI__builtin_roundf: 1194 case Builtin::BI__builtin_roundl: 1195 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::round)); 1196 1197 case Builtin::BIsin: 1198 case Builtin::BIsinf: 1199 case Builtin::BIsinl: 1200 case Builtin::BI__builtin_sin: 1201 case Builtin::BI__builtin_sinf: 1202 case Builtin::BI__builtin_sinl: 1203 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::sin)); 1204 1205 case Builtin::BIsqrt: 1206 case Builtin::BIsqrtf: 1207 case Builtin::BIsqrtl: 1208 case Builtin::BI__builtin_sqrt: 1209 case Builtin::BI__builtin_sqrtf: 1210 case Builtin::BI__builtin_sqrtl: 1211 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::sqrt)); 1212 1213 case Builtin::BItrunc: 1214 case Builtin::BItruncf: 1215 case Builtin::BItruncl: 1216 case Builtin::BI__builtin_trunc: 1217 case Builtin::BI__builtin_truncf: 1218 case Builtin::BI__builtin_truncl: 1219 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::trunc)); 1220 1221 default: 1222 break; 1223 } 1224 } 1225 1226 switch (BuiltinID) { 1227 default: break; 1228 case Builtin::BI__builtin___CFStringMakeConstantString: 1229 case Builtin::BI__builtin___NSStringMakeConstantString: 1230 return RValue::get(ConstantEmitter(*this).emitAbstract(E, E->getType())); 1231 case Builtin::BI__builtin_stdarg_start: 1232 case Builtin::BI__builtin_va_start: 1233 case Builtin::BI__va_start: 1234 case Builtin::BI__builtin_va_end: 1235 return RValue::get( 1236 EmitVAStartEnd(BuiltinID == Builtin::BI__va_start 1237 ? EmitScalarExpr(E->getArg(0)) 1238 : EmitVAListRef(E->getArg(0)).getPointer(), 1239 BuiltinID != Builtin::BI__builtin_va_end)); 1240 case Builtin::BI__builtin_va_copy: { 1241 Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer(); 1242 Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer(); 1243 1244 llvm::Type *Type = Int8PtrTy; 1245 1246 DstPtr = Builder.CreateBitCast(DstPtr, Type); 1247 SrcPtr = Builder.CreateBitCast(SrcPtr, Type); 1248 return RValue::get(Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), 1249 {DstPtr, SrcPtr})); 1250 } 1251 case Builtin::BI__builtin_abs: 1252 case Builtin::BI__builtin_labs: 1253 case Builtin::BI__builtin_llabs: { 1254 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1255 1256 Value *NegOp = Builder.CreateNeg(ArgValue, "neg"); 1257 Value *CmpResult = 1258 Builder.CreateICmpSGE(ArgValue, 1259 llvm::Constant::getNullValue(ArgValue->getType()), 1260 "abscond"); 1261 Value *Result = 1262 Builder.CreateSelect(CmpResult, ArgValue, NegOp, "abs"); 1263 1264 return RValue::get(Result); 1265 } 1266 case Builtin::BI__builtin_conj: 1267 case Builtin::BI__builtin_conjf: 1268 case Builtin::BI__builtin_conjl: { 1269 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 1270 Value *Real = ComplexVal.first; 1271 Value *Imag = ComplexVal.second; 1272 Value *Zero = 1273 Imag->getType()->isFPOrFPVectorTy() 1274 ? llvm::ConstantFP::getZeroValueForNegation(Imag->getType()) 1275 : llvm::Constant::getNullValue(Imag->getType()); 1276 1277 Imag = Builder.CreateFSub(Zero, Imag, "sub"); 1278 return RValue::getComplex(std::make_pair(Real, Imag)); 1279 } 1280 case Builtin::BI__builtin_creal: 1281 case Builtin::BI__builtin_crealf: 1282 case Builtin::BI__builtin_creall: 1283 case Builtin::BIcreal: 1284 case Builtin::BIcrealf: 1285 case Builtin::BIcreall: { 1286 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 1287 return RValue::get(ComplexVal.first); 1288 } 1289 1290 case Builtin::BI__builtin_dump_struct: { 1291 Value *Func = EmitScalarExpr(E->getArg(1)->IgnoreImpCasts()); 1292 CharUnits Arg0Align = EmitPointerWithAlignment(E->getArg(0)).getAlignment(); 1293 1294 const Expr *Arg0 = E->getArg(0)->IgnoreImpCasts(); 1295 QualType Arg0Type = Arg0->getType()->getPointeeType(); 1296 1297 Value *RecordPtr = EmitScalarExpr(Arg0); 1298 Value *Res = dumpRecord(*this, Arg0Type, RecordPtr, Arg0Align, Func, 0); 1299 return RValue::get(Res); 1300 } 1301 1302 case Builtin::BI__builtin_cimag: 1303 case Builtin::BI__builtin_cimagf: 1304 case Builtin::BI__builtin_cimagl: 1305 case Builtin::BIcimag: 1306 case Builtin::BIcimagf: 1307 case Builtin::BIcimagl: { 1308 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 1309 return RValue::get(ComplexVal.second); 1310 } 1311 1312 case Builtin::BI__builtin_ctzs: 1313 case Builtin::BI__builtin_ctz: 1314 case Builtin::BI__builtin_ctzl: 1315 case Builtin::BI__builtin_ctzll: { 1316 Value *ArgValue = EmitCheckedArgForBuiltin(E->getArg(0), BCK_CTZPassedZero); 1317 1318 llvm::Type *ArgType = ArgValue->getType(); 1319 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 1320 1321 llvm::Type *ResultType = ConvertType(E->getType()); 1322 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 1323 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 1324 if (Result->getType() != ResultType) 1325 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1326 "cast"); 1327 return RValue::get(Result); 1328 } 1329 case Builtin::BI__builtin_clzs: 1330 case Builtin::BI__builtin_clz: 1331 case Builtin::BI__builtin_clzl: 1332 case Builtin::BI__builtin_clzll: { 1333 Value *ArgValue = EmitCheckedArgForBuiltin(E->getArg(0), BCK_CLZPassedZero); 1334 1335 llvm::Type *ArgType = ArgValue->getType(); 1336 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 1337 1338 llvm::Type *ResultType = ConvertType(E->getType()); 1339 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 1340 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 1341 if (Result->getType() != ResultType) 1342 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1343 "cast"); 1344 return RValue::get(Result); 1345 } 1346 case Builtin::BI__builtin_ffs: 1347 case Builtin::BI__builtin_ffsl: 1348 case Builtin::BI__builtin_ffsll: { 1349 // ffs(x) -> x ? cttz(x) + 1 : 0 1350 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1351 1352 llvm::Type *ArgType = ArgValue->getType(); 1353 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 1354 1355 llvm::Type *ResultType = ConvertType(E->getType()); 1356 Value *Tmp = 1357 Builder.CreateAdd(Builder.CreateCall(F, {ArgValue, Builder.getTrue()}), 1358 llvm::ConstantInt::get(ArgType, 1)); 1359 Value *Zero = llvm::Constant::getNullValue(ArgType); 1360 Value *IsZero = Builder.CreateICmpEQ(ArgValue, Zero, "iszero"); 1361 Value *Result = Builder.CreateSelect(IsZero, Zero, Tmp, "ffs"); 1362 if (Result->getType() != ResultType) 1363 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1364 "cast"); 1365 return RValue::get(Result); 1366 } 1367 case Builtin::BI__builtin_parity: 1368 case Builtin::BI__builtin_parityl: 1369 case Builtin::BI__builtin_parityll: { 1370 // parity(x) -> ctpop(x) & 1 1371 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1372 1373 llvm::Type *ArgType = ArgValue->getType(); 1374 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 1375 1376 llvm::Type *ResultType = ConvertType(E->getType()); 1377 Value *Tmp = Builder.CreateCall(F, ArgValue); 1378 Value *Result = Builder.CreateAnd(Tmp, llvm::ConstantInt::get(ArgType, 1)); 1379 if (Result->getType() != ResultType) 1380 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1381 "cast"); 1382 return RValue::get(Result); 1383 } 1384 case Builtin::BI__popcnt16: 1385 case Builtin::BI__popcnt: 1386 case Builtin::BI__popcnt64: 1387 case Builtin::BI__builtin_popcount: 1388 case Builtin::BI__builtin_popcountl: 1389 case Builtin::BI__builtin_popcountll: { 1390 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1391 1392 llvm::Type *ArgType = ArgValue->getType(); 1393 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 1394 1395 llvm::Type *ResultType = ConvertType(E->getType()); 1396 Value *Result = Builder.CreateCall(F, ArgValue); 1397 if (Result->getType() != ResultType) 1398 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1399 "cast"); 1400 return RValue::get(Result); 1401 } 1402 case Builtin::BI_rotr8: 1403 case Builtin::BI_rotr16: 1404 case Builtin::BI_rotr: 1405 case Builtin::BI_lrotr: 1406 case Builtin::BI_rotr64: { 1407 Value *Val = EmitScalarExpr(E->getArg(0)); 1408 Value *Shift = EmitScalarExpr(E->getArg(1)); 1409 1410 llvm::Type *ArgType = Val->getType(); 1411 Shift = Builder.CreateIntCast(Shift, ArgType, false); 1412 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 1413 Value *ArgTypeSize = llvm::ConstantInt::get(ArgType, ArgWidth); 1414 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 1415 1416 Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1); 1417 Shift = Builder.CreateAnd(Shift, Mask); 1418 Value *LeftShift = Builder.CreateSub(ArgTypeSize, Shift); 1419 1420 Value *RightShifted = Builder.CreateLShr(Val, Shift); 1421 Value *LeftShifted = Builder.CreateShl(Val, LeftShift); 1422 Value *Rotated = Builder.CreateOr(LeftShifted, RightShifted); 1423 1424 Value *ShiftIsZero = Builder.CreateICmpEQ(Shift, ArgZero); 1425 Value *Result = Builder.CreateSelect(ShiftIsZero, Val, Rotated); 1426 return RValue::get(Result); 1427 } 1428 case Builtin::BI_rotl8: 1429 case Builtin::BI_rotl16: 1430 case Builtin::BI_rotl: 1431 case Builtin::BI_lrotl: 1432 case Builtin::BI_rotl64: { 1433 Value *Val = EmitScalarExpr(E->getArg(0)); 1434 Value *Shift = EmitScalarExpr(E->getArg(1)); 1435 1436 llvm::Type *ArgType = Val->getType(); 1437 Shift = Builder.CreateIntCast(Shift, ArgType, false); 1438 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 1439 Value *ArgTypeSize = llvm::ConstantInt::get(ArgType, ArgWidth); 1440 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 1441 1442 Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1); 1443 Shift = Builder.CreateAnd(Shift, Mask); 1444 Value *RightShift = Builder.CreateSub(ArgTypeSize, Shift); 1445 1446 Value *LeftShifted = Builder.CreateShl(Val, Shift); 1447 Value *RightShifted = Builder.CreateLShr(Val, RightShift); 1448 Value *Rotated = Builder.CreateOr(LeftShifted, RightShifted); 1449 1450 Value *ShiftIsZero = Builder.CreateICmpEQ(Shift, ArgZero); 1451 Value *Result = Builder.CreateSelect(ShiftIsZero, Val, Rotated); 1452 return RValue::get(Result); 1453 } 1454 case Builtin::BI__builtin_unpredictable: { 1455 // Always return the argument of __builtin_unpredictable. LLVM does not 1456 // handle this builtin. Metadata for this builtin should be added directly 1457 // to instructions such as branches or switches that use it. 1458 return RValue::get(EmitScalarExpr(E->getArg(0))); 1459 } 1460 case Builtin::BI__builtin_expect: { 1461 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1462 llvm::Type *ArgType = ArgValue->getType(); 1463 1464 Value *ExpectedValue = EmitScalarExpr(E->getArg(1)); 1465 // Don't generate llvm.expect on -O0 as the backend won't use it for 1466 // anything. 1467 // Note, we still IRGen ExpectedValue because it could have side-effects. 1468 if (CGM.getCodeGenOpts().OptimizationLevel == 0) 1469 return RValue::get(ArgValue); 1470 1471 Value *FnExpect = CGM.getIntrinsic(Intrinsic::expect, ArgType); 1472 Value *Result = 1473 Builder.CreateCall(FnExpect, {ArgValue, ExpectedValue}, "expval"); 1474 return RValue::get(Result); 1475 } 1476 case Builtin::BI__builtin_assume_aligned: { 1477 Value *PtrValue = EmitScalarExpr(E->getArg(0)); 1478 Value *OffsetValue = 1479 (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : nullptr; 1480 1481 Value *AlignmentValue = EmitScalarExpr(E->getArg(1)); 1482 ConstantInt *AlignmentCI = cast<ConstantInt>(AlignmentValue); 1483 unsigned Alignment = (unsigned) AlignmentCI->getZExtValue(); 1484 1485 EmitAlignmentAssumption(PtrValue, Alignment, OffsetValue); 1486 return RValue::get(PtrValue); 1487 } 1488 case Builtin::BI__assume: 1489 case Builtin::BI__builtin_assume: { 1490 if (E->getArg(0)->HasSideEffects(getContext())) 1491 return RValue::get(nullptr); 1492 1493 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1494 Value *FnAssume = CGM.getIntrinsic(Intrinsic::assume); 1495 return RValue::get(Builder.CreateCall(FnAssume, ArgValue)); 1496 } 1497 case Builtin::BI__builtin_bswap16: 1498 case Builtin::BI__builtin_bswap32: 1499 case Builtin::BI__builtin_bswap64: { 1500 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bswap)); 1501 } 1502 case Builtin::BI__builtin_bitreverse8: 1503 case Builtin::BI__builtin_bitreverse16: 1504 case Builtin::BI__builtin_bitreverse32: 1505 case Builtin::BI__builtin_bitreverse64: { 1506 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bitreverse)); 1507 } 1508 case Builtin::BI__builtin_object_size: { 1509 unsigned Type = 1510 E->getArg(1)->EvaluateKnownConstInt(getContext()).getZExtValue(); 1511 auto *ResType = cast<llvm::IntegerType>(ConvertType(E->getType())); 1512 1513 // We pass this builtin onto the optimizer so that it can figure out the 1514 // object size in more complex cases. 1515 return RValue::get(emitBuiltinObjectSize(E->getArg(0), Type, ResType, 1516 /*EmittedE=*/nullptr)); 1517 } 1518 case Builtin::BI__builtin_prefetch: { 1519 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); 1520 // FIXME: Technically these constants should of type 'int', yes? 1521 RW = (E->getNumArgs() > 1) ? EmitScalarExpr(E->getArg(1)) : 1522 llvm::ConstantInt::get(Int32Ty, 0); 1523 Locality = (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : 1524 llvm::ConstantInt::get(Int32Ty, 3); 1525 Value *Data = llvm::ConstantInt::get(Int32Ty, 1); 1526 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 1527 return RValue::get(Builder.CreateCall(F, {Address, RW, Locality, Data})); 1528 } 1529 case Builtin::BI__builtin_readcyclecounter: { 1530 Value *F = CGM.getIntrinsic(Intrinsic::readcyclecounter); 1531 return RValue::get(Builder.CreateCall(F)); 1532 } 1533 case Builtin::BI__builtin___clear_cache: { 1534 Value *Begin = EmitScalarExpr(E->getArg(0)); 1535 Value *End = EmitScalarExpr(E->getArg(1)); 1536 Value *F = CGM.getIntrinsic(Intrinsic::clear_cache); 1537 return RValue::get(Builder.CreateCall(F, {Begin, End})); 1538 } 1539 case Builtin::BI__builtin_trap: 1540 return RValue::get(EmitTrapCall(Intrinsic::trap)); 1541 case Builtin::BI__debugbreak: 1542 return RValue::get(EmitTrapCall(Intrinsic::debugtrap)); 1543 case Builtin::BI__builtin_unreachable: { 1544 EmitUnreachable(E->getExprLoc()); 1545 1546 // We do need to preserve an insertion point. 1547 EmitBlock(createBasicBlock("unreachable.cont")); 1548 1549 return RValue::get(nullptr); 1550 } 1551 1552 case Builtin::BI__builtin_powi: 1553 case Builtin::BI__builtin_powif: 1554 case Builtin::BI__builtin_powil: { 1555 Value *Base = EmitScalarExpr(E->getArg(0)); 1556 Value *Exponent = EmitScalarExpr(E->getArg(1)); 1557 llvm::Type *ArgType = Base->getType(); 1558 Value *F = CGM.getIntrinsic(Intrinsic::powi, ArgType); 1559 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 1560 } 1561 1562 case Builtin::BI__builtin_isgreater: 1563 case Builtin::BI__builtin_isgreaterequal: 1564 case Builtin::BI__builtin_isless: 1565 case Builtin::BI__builtin_islessequal: 1566 case Builtin::BI__builtin_islessgreater: 1567 case Builtin::BI__builtin_isunordered: { 1568 // Ordered comparisons: we know the arguments to these are matching scalar 1569 // floating point values. 1570 Value *LHS = EmitScalarExpr(E->getArg(0)); 1571 Value *RHS = EmitScalarExpr(E->getArg(1)); 1572 1573 switch (BuiltinID) { 1574 default: llvm_unreachable("Unknown ordered comparison"); 1575 case Builtin::BI__builtin_isgreater: 1576 LHS = Builder.CreateFCmpOGT(LHS, RHS, "cmp"); 1577 break; 1578 case Builtin::BI__builtin_isgreaterequal: 1579 LHS = Builder.CreateFCmpOGE(LHS, RHS, "cmp"); 1580 break; 1581 case Builtin::BI__builtin_isless: 1582 LHS = Builder.CreateFCmpOLT(LHS, RHS, "cmp"); 1583 break; 1584 case Builtin::BI__builtin_islessequal: 1585 LHS = Builder.CreateFCmpOLE(LHS, RHS, "cmp"); 1586 break; 1587 case Builtin::BI__builtin_islessgreater: 1588 LHS = Builder.CreateFCmpONE(LHS, RHS, "cmp"); 1589 break; 1590 case Builtin::BI__builtin_isunordered: 1591 LHS = Builder.CreateFCmpUNO(LHS, RHS, "cmp"); 1592 break; 1593 } 1594 // ZExt bool to int type. 1595 return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType()))); 1596 } 1597 case Builtin::BI__builtin_isnan: { 1598 Value *V = EmitScalarExpr(E->getArg(0)); 1599 V = Builder.CreateFCmpUNO(V, V, "cmp"); 1600 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 1601 } 1602 1603 case Builtin::BIfinite: 1604 case Builtin::BI__finite: 1605 case Builtin::BIfinitef: 1606 case Builtin::BI__finitef: 1607 case Builtin::BIfinitel: 1608 case Builtin::BI__finitel: 1609 case Builtin::BI__builtin_isinf: 1610 case Builtin::BI__builtin_isfinite: { 1611 // isinf(x) --> fabs(x) == infinity 1612 // isfinite(x) --> fabs(x) != infinity 1613 // x != NaN via the ordered compare in either case. 1614 Value *V = EmitScalarExpr(E->getArg(0)); 1615 Value *Fabs = EmitFAbs(*this, V); 1616 Constant *Infinity = ConstantFP::getInfinity(V->getType()); 1617 CmpInst::Predicate Pred = (BuiltinID == Builtin::BI__builtin_isinf) 1618 ? CmpInst::FCMP_OEQ 1619 : CmpInst::FCMP_ONE; 1620 Value *FCmp = Builder.CreateFCmp(Pred, Fabs, Infinity, "cmpinf"); 1621 return RValue::get(Builder.CreateZExt(FCmp, ConvertType(E->getType()))); 1622 } 1623 1624 case Builtin::BI__builtin_isinf_sign: { 1625 // isinf_sign(x) -> fabs(x) == infinity ? (signbit(x) ? -1 : 1) : 0 1626 Value *Arg = EmitScalarExpr(E->getArg(0)); 1627 Value *AbsArg = EmitFAbs(*this, Arg); 1628 Value *IsInf = Builder.CreateFCmpOEQ( 1629 AbsArg, ConstantFP::getInfinity(Arg->getType()), "isinf"); 1630 Value *IsNeg = EmitSignBit(*this, Arg); 1631 1632 llvm::Type *IntTy = ConvertType(E->getType()); 1633 Value *Zero = Constant::getNullValue(IntTy); 1634 Value *One = ConstantInt::get(IntTy, 1); 1635 Value *NegativeOne = ConstantInt::get(IntTy, -1); 1636 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); 1637 Value *Result = Builder.CreateSelect(IsInf, SignResult, Zero); 1638 return RValue::get(Result); 1639 } 1640 1641 case Builtin::BI__builtin_isnormal: { 1642 // isnormal(x) --> x == x && fabsf(x) < infinity && fabsf(x) >= float_min 1643 Value *V = EmitScalarExpr(E->getArg(0)); 1644 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 1645 1646 Value *Abs = EmitFAbs(*this, V); 1647 Value *IsLessThanInf = 1648 Builder.CreateFCmpULT(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 1649 APFloat Smallest = APFloat::getSmallestNormalized( 1650 getContext().getFloatTypeSemantics(E->getArg(0)->getType())); 1651 Value *IsNormal = 1652 Builder.CreateFCmpUGE(Abs, ConstantFP::get(V->getContext(), Smallest), 1653 "isnormal"); 1654 V = Builder.CreateAnd(Eq, IsLessThanInf, "and"); 1655 V = Builder.CreateAnd(V, IsNormal, "and"); 1656 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 1657 } 1658 1659 case Builtin::BI__builtin_fpclassify: { 1660 Value *V = EmitScalarExpr(E->getArg(5)); 1661 llvm::Type *Ty = ConvertType(E->getArg(5)->getType()); 1662 1663 // Create Result 1664 BasicBlock *Begin = Builder.GetInsertBlock(); 1665 BasicBlock *End = createBasicBlock("fpclassify_end", this->CurFn); 1666 Builder.SetInsertPoint(End); 1667 PHINode *Result = 1668 Builder.CreatePHI(ConvertType(E->getArg(0)->getType()), 4, 1669 "fpclassify_result"); 1670 1671 // if (V==0) return FP_ZERO 1672 Builder.SetInsertPoint(Begin); 1673 Value *IsZero = Builder.CreateFCmpOEQ(V, Constant::getNullValue(Ty), 1674 "iszero"); 1675 Value *ZeroLiteral = EmitScalarExpr(E->getArg(4)); 1676 BasicBlock *NotZero = createBasicBlock("fpclassify_not_zero", this->CurFn); 1677 Builder.CreateCondBr(IsZero, End, NotZero); 1678 Result->addIncoming(ZeroLiteral, Begin); 1679 1680 // if (V != V) return FP_NAN 1681 Builder.SetInsertPoint(NotZero); 1682 Value *IsNan = Builder.CreateFCmpUNO(V, V, "cmp"); 1683 Value *NanLiteral = EmitScalarExpr(E->getArg(0)); 1684 BasicBlock *NotNan = createBasicBlock("fpclassify_not_nan", this->CurFn); 1685 Builder.CreateCondBr(IsNan, End, NotNan); 1686 Result->addIncoming(NanLiteral, NotZero); 1687 1688 // if (fabs(V) == infinity) return FP_INFINITY 1689 Builder.SetInsertPoint(NotNan); 1690 Value *VAbs = EmitFAbs(*this, V); 1691 Value *IsInf = 1692 Builder.CreateFCmpOEQ(VAbs, ConstantFP::getInfinity(V->getType()), 1693 "isinf"); 1694 Value *InfLiteral = EmitScalarExpr(E->getArg(1)); 1695 BasicBlock *NotInf = createBasicBlock("fpclassify_not_inf", this->CurFn); 1696 Builder.CreateCondBr(IsInf, End, NotInf); 1697 Result->addIncoming(InfLiteral, NotNan); 1698 1699 // if (fabs(V) >= MIN_NORMAL) return FP_NORMAL else FP_SUBNORMAL 1700 Builder.SetInsertPoint(NotInf); 1701 APFloat Smallest = APFloat::getSmallestNormalized( 1702 getContext().getFloatTypeSemantics(E->getArg(5)->getType())); 1703 Value *IsNormal = 1704 Builder.CreateFCmpUGE(VAbs, ConstantFP::get(V->getContext(), Smallest), 1705 "isnormal"); 1706 Value *NormalResult = 1707 Builder.CreateSelect(IsNormal, EmitScalarExpr(E->getArg(2)), 1708 EmitScalarExpr(E->getArg(3))); 1709 Builder.CreateBr(End); 1710 Result->addIncoming(NormalResult, NotInf); 1711 1712 // return Result 1713 Builder.SetInsertPoint(End); 1714 return RValue::get(Result); 1715 } 1716 1717 case Builtin::BIalloca: 1718 case Builtin::BI_alloca: 1719 case Builtin::BI__builtin_alloca: { 1720 Value *Size = EmitScalarExpr(E->getArg(0)); 1721 const TargetInfo &TI = getContext().getTargetInfo(); 1722 // The alignment of the alloca should correspond to __BIGGEST_ALIGNMENT__. 1723 unsigned SuitableAlignmentInBytes = 1724 CGM.getContext() 1725 .toCharUnitsFromBits(TI.getSuitableAlign()) 1726 .getQuantity(); 1727 AllocaInst *AI = Builder.CreateAlloca(Builder.getInt8Ty(), Size); 1728 AI->setAlignment(SuitableAlignmentInBytes); 1729 return RValue::get(AI); 1730 } 1731 1732 case Builtin::BI__builtin_alloca_with_align: { 1733 Value *Size = EmitScalarExpr(E->getArg(0)); 1734 Value *AlignmentInBitsValue = EmitScalarExpr(E->getArg(1)); 1735 auto *AlignmentInBitsCI = cast<ConstantInt>(AlignmentInBitsValue); 1736 unsigned AlignmentInBits = AlignmentInBitsCI->getZExtValue(); 1737 unsigned AlignmentInBytes = 1738 CGM.getContext().toCharUnitsFromBits(AlignmentInBits).getQuantity(); 1739 AllocaInst *AI = Builder.CreateAlloca(Builder.getInt8Ty(), Size); 1740 AI->setAlignment(AlignmentInBytes); 1741 return RValue::get(AI); 1742 } 1743 1744 case Builtin::BIbzero: 1745 case Builtin::BI__builtin_bzero: { 1746 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1747 Value *SizeVal = EmitScalarExpr(E->getArg(1)); 1748 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1749 E->getArg(0)->getExprLoc(), FD, 0); 1750 Builder.CreateMemSet(Dest, Builder.getInt8(0), SizeVal, false); 1751 return RValue::get(nullptr); 1752 } 1753 case Builtin::BImemcpy: 1754 case Builtin::BI__builtin_memcpy: { 1755 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1756 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1757 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1758 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1759 E->getArg(0)->getExprLoc(), FD, 0); 1760 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 1761 E->getArg(1)->getExprLoc(), FD, 1); 1762 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 1763 return RValue::get(Dest.getPointer()); 1764 } 1765 1766 case Builtin::BI__builtin_char_memchr: 1767 BuiltinID = Builtin::BI__builtin_memchr; 1768 break; 1769 1770 case Builtin::BI__builtin___memcpy_chk: { 1771 // fold __builtin_memcpy_chk(x, y, cst1, cst2) to memcpy iff cst1<=cst2. 1772 llvm::APSInt Size, DstSize; 1773 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1774 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1775 break; 1776 if (Size.ugt(DstSize)) 1777 break; 1778 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1779 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1780 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1781 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 1782 return RValue::get(Dest.getPointer()); 1783 } 1784 1785 case Builtin::BI__builtin_objc_memmove_collectable: { 1786 Address DestAddr = EmitPointerWithAlignment(E->getArg(0)); 1787 Address SrcAddr = EmitPointerWithAlignment(E->getArg(1)); 1788 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1789 CGM.getObjCRuntime().EmitGCMemmoveCollectable(*this, 1790 DestAddr, SrcAddr, SizeVal); 1791 return RValue::get(DestAddr.getPointer()); 1792 } 1793 1794 case Builtin::BI__builtin___memmove_chk: { 1795 // fold __builtin_memmove_chk(x, y, cst1, cst2) to memmove iff cst1<=cst2. 1796 llvm::APSInt Size, DstSize; 1797 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1798 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1799 break; 1800 if (Size.ugt(DstSize)) 1801 break; 1802 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1803 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1804 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1805 Builder.CreateMemMove(Dest, Src, SizeVal, false); 1806 return RValue::get(Dest.getPointer()); 1807 } 1808 1809 case Builtin::BImemmove: 1810 case Builtin::BI__builtin_memmove: { 1811 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1812 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1813 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1814 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1815 E->getArg(0)->getExprLoc(), FD, 0); 1816 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 1817 E->getArg(1)->getExprLoc(), FD, 1); 1818 Builder.CreateMemMove(Dest, Src, SizeVal, false); 1819 return RValue::get(Dest.getPointer()); 1820 } 1821 case Builtin::BImemset: 1822 case Builtin::BI__builtin_memset: { 1823 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1824 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 1825 Builder.getInt8Ty()); 1826 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1827 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1828 E->getArg(0)->getExprLoc(), FD, 0); 1829 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 1830 return RValue::get(Dest.getPointer()); 1831 } 1832 case Builtin::BI__builtin___memset_chk: { 1833 // fold __builtin_memset_chk(x, y, cst1, cst2) to memset iff cst1<=cst2. 1834 llvm::APSInt Size, DstSize; 1835 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1836 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1837 break; 1838 if (Size.ugt(DstSize)) 1839 break; 1840 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1841 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 1842 Builder.getInt8Ty()); 1843 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1844 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 1845 return RValue::get(Dest.getPointer()); 1846 } 1847 case Builtin::BI__builtin_wmemcmp: { 1848 // The MSVC runtime library does not provide a definition of wmemcmp, so we 1849 // need an inline implementation. 1850 if (!getTarget().getTriple().isOSMSVCRT()) 1851 break; 1852 1853 llvm::Type *WCharTy = ConvertType(getContext().WCharTy); 1854 1855 Value *Dst = EmitScalarExpr(E->getArg(0)); 1856 Value *Src = EmitScalarExpr(E->getArg(1)); 1857 Value *Size = EmitScalarExpr(E->getArg(2)); 1858 1859 BasicBlock *Entry = Builder.GetInsertBlock(); 1860 BasicBlock *CmpGT = createBasicBlock("wmemcmp.gt"); 1861 BasicBlock *CmpLT = createBasicBlock("wmemcmp.lt"); 1862 BasicBlock *Next = createBasicBlock("wmemcmp.next"); 1863 BasicBlock *Exit = createBasicBlock("wmemcmp.exit"); 1864 Value *SizeEq0 = Builder.CreateICmpEQ(Size, ConstantInt::get(SizeTy, 0)); 1865 Builder.CreateCondBr(SizeEq0, Exit, CmpGT); 1866 1867 EmitBlock(CmpGT); 1868 PHINode *DstPhi = Builder.CreatePHI(Dst->getType(), 2); 1869 DstPhi->addIncoming(Dst, Entry); 1870 PHINode *SrcPhi = Builder.CreatePHI(Src->getType(), 2); 1871 SrcPhi->addIncoming(Src, Entry); 1872 PHINode *SizePhi = Builder.CreatePHI(SizeTy, 2); 1873 SizePhi->addIncoming(Size, Entry); 1874 CharUnits WCharAlign = 1875 getContext().getTypeAlignInChars(getContext().WCharTy); 1876 Value *DstCh = Builder.CreateAlignedLoad(WCharTy, DstPhi, WCharAlign); 1877 Value *SrcCh = Builder.CreateAlignedLoad(WCharTy, SrcPhi, WCharAlign); 1878 Value *DstGtSrc = Builder.CreateICmpUGT(DstCh, SrcCh); 1879 Builder.CreateCondBr(DstGtSrc, Exit, CmpLT); 1880 1881 EmitBlock(CmpLT); 1882 Value *DstLtSrc = Builder.CreateICmpULT(DstCh, SrcCh); 1883 Builder.CreateCondBr(DstLtSrc, Exit, Next); 1884 1885 EmitBlock(Next); 1886 Value *NextDst = Builder.CreateConstInBoundsGEP1_32(WCharTy, DstPhi, 1); 1887 Value *NextSrc = Builder.CreateConstInBoundsGEP1_32(WCharTy, SrcPhi, 1); 1888 Value *NextSize = Builder.CreateSub(SizePhi, ConstantInt::get(SizeTy, 1)); 1889 Value *NextSizeEq0 = 1890 Builder.CreateICmpEQ(NextSize, ConstantInt::get(SizeTy, 0)); 1891 Builder.CreateCondBr(NextSizeEq0, Exit, CmpGT); 1892 DstPhi->addIncoming(NextDst, Next); 1893 SrcPhi->addIncoming(NextSrc, Next); 1894 SizePhi->addIncoming(NextSize, Next); 1895 1896 EmitBlock(Exit); 1897 PHINode *Ret = Builder.CreatePHI(IntTy, 4); 1898 Ret->addIncoming(ConstantInt::get(IntTy, 0), Entry); 1899 Ret->addIncoming(ConstantInt::get(IntTy, 1), CmpGT); 1900 Ret->addIncoming(ConstantInt::get(IntTy, -1), CmpLT); 1901 Ret->addIncoming(ConstantInt::get(IntTy, 0), Next); 1902 return RValue::get(Ret); 1903 } 1904 case Builtin::BI__builtin_dwarf_cfa: { 1905 // The offset in bytes from the first argument to the CFA. 1906 // 1907 // Why on earth is this in the frontend? Is there any reason at 1908 // all that the backend can't reasonably determine this while 1909 // lowering llvm.eh.dwarf.cfa()? 1910 // 1911 // TODO: If there's a satisfactory reason, add a target hook for 1912 // this instead of hard-coding 0, which is correct for most targets. 1913 int32_t Offset = 0; 1914 1915 Value *F = CGM.getIntrinsic(Intrinsic::eh_dwarf_cfa); 1916 return RValue::get(Builder.CreateCall(F, 1917 llvm::ConstantInt::get(Int32Ty, Offset))); 1918 } 1919 case Builtin::BI__builtin_return_address: { 1920 Value *Depth = ConstantEmitter(*this).emitAbstract(E->getArg(0), 1921 getContext().UnsignedIntTy); 1922 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 1923 return RValue::get(Builder.CreateCall(F, Depth)); 1924 } 1925 case Builtin::BI_ReturnAddress: { 1926 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 1927 return RValue::get(Builder.CreateCall(F, Builder.getInt32(0))); 1928 } 1929 case Builtin::BI__builtin_frame_address: { 1930 Value *Depth = ConstantEmitter(*this).emitAbstract(E->getArg(0), 1931 getContext().UnsignedIntTy); 1932 Value *F = CGM.getIntrinsic(Intrinsic::frameaddress); 1933 return RValue::get(Builder.CreateCall(F, Depth)); 1934 } 1935 case Builtin::BI__builtin_extract_return_addr: { 1936 Value *Address = EmitScalarExpr(E->getArg(0)); 1937 Value *Result = getTargetHooks().decodeReturnAddress(*this, Address); 1938 return RValue::get(Result); 1939 } 1940 case Builtin::BI__builtin_frob_return_addr: { 1941 Value *Address = EmitScalarExpr(E->getArg(0)); 1942 Value *Result = getTargetHooks().encodeReturnAddress(*this, Address); 1943 return RValue::get(Result); 1944 } 1945 case Builtin::BI__builtin_dwarf_sp_column: { 1946 llvm::IntegerType *Ty 1947 = cast<llvm::IntegerType>(ConvertType(E->getType())); 1948 int Column = getTargetHooks().getDwarfEHStackPointer(CGM); 1949 if (Column == -1) { 1950 CGM.ErrorUnsupported(E, "__builtin_dwarf_sp_column"); 1951 return RValue::get(llvm::UndefValue::get(Ty)); 1952 } 1953 return RValue::get(llvm::ConstantInt::get(Ty, Column, true)); 1954 } 1955 case Builtin::BI__builtin_init_dwarf_reg_size_table: { 1956 Value *Address = EmitScalarExpr(E->getArg(0)); 1957 if (getTargetHooks().initDwarfEHRegSizeTable(*this, Address)) 1958 CGM.ErrorUnsupported(E, "__builtin_init_dwarf_reg_size_table"); 1959 return RValue::get(llvm::UndefValue::get(ConvertType(E->getType()))); 1960 } 1961 case Builtin::BI__builtin_eh_return: { 1962 Value *Int = EmitScalarExpr(E->getArg(0)); 1963 Value *Ptr = EmitScalarExpr(E->getArg(1)); 1964 1965 llvm::IntegerType *IntTy = cast<llvm::IntegerType>(Int->getType()); 1966 assert((IntTy->getBitWidth() == 32 || IntTy->getBitWidth() == 64) && 1967 "LLVM's __builtin_eh_return only supports 32- and 64-bit variants"); 1968 Value *F = CGM.getIntrinsic(IntTy->getBitWidth() == 32 1969 ? Intrinsic::eh_return_i32 1970 : Intrinsic::eh_return_i64); 1971 Builder.CreateCall(F, {Int, Ptr}); 1972 Builder.CreateUnreachable(); 1973 1974 // We do need to preserve an insertion point. 1975 EmitBlock(createBasicBlock("builtin_eh_return.cont")); 1976 1977 return RValue::get(nullptr); 1978 } 1979 case Builtin::BI__builtin_unwind_init: { 1980 Value *F = CGM.getIntrinsic(Intrinsic::eh_unwind_init); 1981 return RValue::get(Builder.CreateCall(F)); 1982 } 1983 case Builtin::BI__builtin_extend_pointer: { 1984 // Extends a pointer to the size of an _Unwind_Word, which is 1985 // uint64_t on all platforms. Generally this gets poked into a 1986 // register and eventually used as an address, so if the 1987 // addressing registers are wider than pointers and the platform 1988 // doesn't implicitly ignore high-order bits when doing 1989 // addressing, we need to make sure we zext / sext based on 1990 // the platform's expectations. 1991 // 1992 // See: http://gcc.gnu.org/ml/gcc-bugs/2002-02/msg00237.html 1993 1994 // Cast the pointer to intptr_t. 1995 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1996 Value *Result = Builder.CreatePtrToInt(Ptr, IntPtrTy, "extend.cast"); 1997 1998 // If that's 64 bits, we're done. 1999 if (IntPtrTy->getBitWidth() == 64) 2000 return RValue::get(Result); 2001 2002 // Otherwise, ask the codegen data what to do. 2003 if (getTargetHooks().extendPointerWithSExt()) 2004 return RValue::get(Builder.CreateSExt(Result, Int64Ty, "extend.sext")); 2005 else 2006 return RValue::get(Builder.CreateZExt(Result, Int64Ty, "extend.zext")); 2007 } 2008 case Builtin::BI__builtin_setjmp: { 2009 // Buffer is a void**. 2010 Address Buf = EmitPointerWithAlignment(E->getArg(0)); 2011 2012 // Store the frame pointer to the setjmp buffer. 2013 Value *FrameAddr = 2014 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2015 ConstantInt::get(Int32Ty, 0)); 2016 Builder.CreateStore(FrameAddr, Buf); 2017 2018 // Store the stack pointer to the setjmp buffer. 2019 Value *StackAddr = 2020 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::stacksave)); 2021 Address StackSaveSlot = 2022 Builder.CreateConstInBoundsGEP(Buf, 2, getPointerSize()); 2023 Builder.CreateStore(StackAddr, StackSaveSlot); 2024 2025 // Call LLVM's EH setjmp, which is lightweight. 2026 Value *F = CGM.getIntrinsic(Intrinsic::eh_sjlj_setjmp); 2027 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 2028 return RValue::get(Builder.CreateCall(F, Buf.getPointer())); 2029 } 2030 case Builtin::BI__builtin_longjmp: { 2031 Value *Buf = EmitScalarExpr(E->getArg(0)); 2032 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 2033 2034 // Call LLVM's EH longjmp, which is lightweight. 2035 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::eh_sjlj_longjmp), Buf); 2036 2037 // longjmp doesn't return; mark this as unreachable. 2038 Builder.CreateUnreachable(); 2039 2040 // We do need to preserve an insertion point. 2041 EmitBlock(createBasicBlock("longjmp.cont")); 2042 2043 return RValue::get(nullptr); 2044 } 2045 case Builtin::BI__sync_fetch_and_add: 2046 case Builtin::BI__sync_fetch_and_sub: 2047 case Builtin::BI__sync_fetch_and_or: 2048 case Builtin::BI__sync_fetch_and_and: 2049 case Builtin::BI__sync_fetch_and_xor: 2050 case Builtin::BI__sync_fetch_and_nand: 2051 case Builtin::BI__sync_add_and_fetch: 2052 case Builtin::BI__sync_sub_and_fetch: 2053 case Builtin::BI__sync_and_and_fetch: 2054 case Builtin::BI__sync_or_and_fetch: 2055 case Builtin::BI__sync_xor_and_fetch: 2056 case Builtin::BI__sync_nand_and_fetch: 2057 case Builtin::BI__sync_val_compare_and_swap: 2058 case Builtin::BI__sync_bool_compare_and_swap: 2059 case Builtin::BI__sync_lock_test_and_set: 2060 case Builtin::BI__sync_lock_release: 2061 case Builtin::BI__sync_swap: 2062 llvm_unreachable("Shouldn't make it through sema"); 2063 case Builtin::BI__sync_fetch_and_add_1: 2064 case Builtin::BI__sync_fetch_and_add_2: 2065 case Builtin::BI__sync_fetch_and_add_4: 2066 case Builtin::BI__sync_fetch_and_add_8: 2067 case Builtin::BI__sync_fetch_and_add_16: 2068 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E); 2069 case Builtin::BI__sync_fetch_and_sub_1: 2070 case Builtin::BI__sync_fetch_and_sub_2: 2071 case Builtin::BI__sync_fetch_and_sub_4: 2072 case Builtin::BI__sync_fetch_and_sub_8: 2073 case Builtin::BI__sync_fetch_and_sub_16: 2074 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E); 2075 case Builtin::BI__sync_fetch_and_or_1: 2076 case Builtin::BI__sync_fetch_and_or_2: 2077 case Builtin::BI__sync_fetch_and_or_4: 2078 case Builtin::BI__sync_fetch_and_or_8: 2079 case Builtin::BI__sync_fetch_and_or_16: 2080 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E); 2081 case Builtin::BI__sync_fetch_and_and_1: 2082 case Builtin::BI__sync_fetch_and_and_2: 2083 case Builtin::BI__sync_fetch_and_and_4: 2084 case Builtin::BI__sync_fetch_and_and_8: 2085 case Builtin::BI__sync_fetch_and_and_16: 2086 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E); 2087 case Builtin::BI__sync_fetch_and_xor_1: 2088 case Builtin::BI__sync_fetch_and_xor_2: 2089 case Builtin::BI__sync_fetch_and_xor_4: 2090 case Builtin::BI__sync_fetch_and_xor_8: 2091 case Builtin::BI__sync_fetch_and_xor_16: 2092 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E); 2093 case Builtin::BI__sync_fetch_and_nand_1: 2094 case Builtin::BI__sync_fetch_and_nand_2: 2095 case Builtin::BI__sync_fetch_and_nand_4: 2096 case Builtin::BI__sync_fetch_and_nand_8: 2097 case Builtin::BI__sync_fetch_and_nand_16: 2098 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Nand, E); 2099 2100 // Clang extensions: not overloaded yet. 2101 case Builtin::BI__sync_fetch_and_min: 2102 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E); 2103 case Builtin::BI__sync_fetch_and_max: 2104 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Max, E); 2105 case Builtin::BI__sync_fetch_and_umin: 2106 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMin, E); 2107 case Builtin::BI__sync_fetch_and_umax: 2108 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMax, E); 2109 2110 case Builtin::BI__sync_add_and_fetch_1: 2111 case Builtin::BI__sync_add_and_fetch_2: 2112 case Builtin::BI__sync_add_and_fetch_4: 2113 case Builtin::BI__sync_add_and_fetch_8: 2114 case Builtin::BI__sync_add_and_fetch_16: 2115 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Add, E, 2116 llvm::Instruction::Add); 2117 case Builtin::BI__sync_sub_and_fetch_1: 2118 case Builtin::BI__sync_sub_and_fetch_2: 2119 case Builtin::BI__sync_sub_and_fetch_4: 2120 case Builtin::BI__sync_sub_and_fetch_8: 2121 case Builtin::BI__sync_sub_and_fetch_16: 2122 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Sub, E, 2123 llvm::Instruction::Sub); 2124 case Builtin::BI__sync_and_and_fetch_1: 2125 case Builtin::BI__sync_and_and_fetch_2: 2126 case Builtin::BI__sync_and_and_fetch_4: 2127 case Builtin::BI__sync_and_and_fetch_8: 2128 case Builtin::BI__sync_and_and_fetch_16: 2129 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::And, E, 2130 llvm::Instruction::And); 2131 case Builtin::BI__sync_or_and_fetch_1: 2132 case Builtin::BI__sync_or_and_fetch_2: 2133 case Builtin::BI__sync_or_and_fetch_4: 2134 case Builtin::BI__sync_or_and_fetch_8: 2135 case Builtin::BI__sync_or_and_fetch_16: 2136 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Or, E, 2137 llvm::Instruction::Or); 2138 case Builtin::BI__sync_xor_and_fetch_1: 2139 case Builtin::BI__sync_xor_and_fetch_2: 2140 case Builtin::BI__sync_xor_and_fetch_4: 2141 case Builtin::BI__sync_xor_and_fetch_8: 2142 case Builtin::BI__sync_xor_and_fetch_16: 2143 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Xor, E, 2144 llvm::Instruction::Xor); 2145 case Builtin::BI__sync_nand_and_fetch_1: 2146 case Builtin::BI__sync_nand_and_fetch_2: 2147 case Builtin::BI__sync_nand_and_fetch_4: 2148 case Builtin::BI__sync_nand_and_fetch_8: 2149 case Builtin::BI__sync_nand_and_fetch_16: 2150 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Nand, E, 2151 llvm::Instruction::And, true); 2152 2153 case Builtin::BI__sync_val_compare_and_swap_1: 2154 case Builtin::BI__sync_val_compare_and_swap_2: 2155 case Builtin::BI__sync_val_compare_and_swap_4: 2156 case Builtin::BI__sync_val_compare_and_swap_8: 2157 case Builtin::BI__sync_val_compare_and_swap_16: 2158 return RValue::get(MakeAtomicCmpXchgValue(*this, E, false)); 2159 2160 case Builtin::BI__sync_bool_compare_and_swap_1: 2161 case Builtin::BI__sync_bool_compare_and_swap_2: 2162 case Builtin::BI__sync_bool_compare_and_swap_4: 2163 case Builtin::BI__sync_bool_compare_and_swap_8: 2164 case Builtin::BI__sync_bool_compare_and_swap_16: 2165 return RValue::get(MakeAtomicCmpXchgValue(*this, E, true)); 2166 2167 case Builtin::BI__sync_swap_1: 2168 case Builtin::BI__sync_swap_2: 2169 case Builtin::BI__sync_swap_4: 2170 case Builtin::BI__sync_swap_8: 2171 case Builtin::BI__sync_swap_16: 2172 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 2173 2174 case Builtin::BI__sync_lock_test_and_set_1: 2175 case Builtin::BI__sync_lock_test_and_set_2: 2176 case Builtin::BI__sync_lock_test_and_set_4: 2177 case Builtin::BI__sync_lock_test_and_set_8: 2178 case Builtin::BI__sync_lock_test_and_set_16: 2179 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 2180 2181 case Builtin::BI__sync_lock_release_1: 2182 case Builtin::BI__sync_lock_release_2: 2183 case Builtin::BI__sync_lock_release_4: 2184 case Builtin::BI__sync_lock_release_8: 2185 case Builtin::BI__sync_lock_release_16: { 2186 Value *Ptr = EmitScalarExpr(E->getArg(0)); 2187 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 2188 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 2189 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 2190 StoreSize.getQuantity() * 8); 2191 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 2192 llvm::StoreInst *Store = 2193 Builder.CreateAlignedStore(llvm::Constant::getNullValue(ITy), Ptr, 2194 StoreSize); 2195 Store->setAtomic(llvm::AtomicOrdering::Release); 2196 return RValue::get(nullptr); 2197 } 2198 2199 case Builtin::BI__sync_synchronize: { 2200 // We assume this is supposed to correspond to a C++0x-style 2201 // sequentially-consistent fence (i.e. this is only usable for 2202 // synchronization, not device I/O or anything like that). This intrinsic 2203 // is really badly designed in the sense that in theory, there isn't 2204 // any way to safely use it... but in practice, it mostly works 2205 // to use it with non-atomic loads and stores to get acquire/release 2206 // semantics. 2207 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent); 2208 return RValue::get(nullptr); 2209 } 2210 2211 case Builtin::BI__builtin_nontemporal_load: 2212 return RValue::get(EmitNontemporalLoad(*this, E)); 2213 case Builtin::BI__builtin_nontemporal_store: 2214 return RValue::get(EmitNontemporalStore(*this, E)); 2215 case Builtin::BI__c11_atomic_is_lock_free: 2216 case Builtin::BI__atomic_is_lock_free: { 2217 // Call "bool __atomic_is_lock_free(size_t size, void *ptr)". For the 2218 // __c11 builtin, ptr is 0 (indicating a properly-aligned object), since 2219 // _Atomic(T) is always properly-aligned. 2220 const char *LibCallName = "__atomic_is_lock_free"; 2221 CallArgList Args; 2222 Args.add(RValue::get(EmitScalarExpr(E->getArg(0))), 2223 getContext().getSizeType()); 2224 if (BuiltinID == Builtin::BI__atomic_is_lock_free) 2225 Args.add(RValue::get(EmitScalarExpr(E->getArg(1))), 2226 getContext().VoidPtrTy); 2227 else 2228 Args.add(RValue::get(llvm::Constant::getNullValue(VoidPtrTy)), 2229 getContext().VoidPtrTy); 2230 const CGFunctionInfo &FuncInfo = 2231 CGM.getTypes().arrangeBuiltinFunctionCall(E->getType(), Args); 2232 llvm::FunctionType *FTy = CGM.getTypes().GetFunctionType(FuncInfo); 2233 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, LibCallName); 2234 return EmitCall(FuncInfo, CGCallee::forDirect(Func), 2235 ReturnValueSlot(), Args); 2236 } 2237 2238 case Builtin::BI__atomic_test_and_set: { 2239 // Look at the argument type to determine whether this is a volatile 2240 // operation. The parameter type is always volatile. 2241 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 2242 bool Volatile = 2243 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 2244 2245 Value *Ptr = EmitScalarExpr(E->getArg(0)); 2246 unsigned AddrSpace = Ptr->getType()->getPointerAddressSpace(); 2247 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 2248 Value *NewVal = Builder.getInt8(1); 2249 Value *Order = EmitScalarExpr(E->getArg(1)); 2250 if (isa<llvm::ConstantInt>(Order)) { 2251 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 2252 AtomicRMWInst *Result = nullptr; 2253 switch (ord) { 2254 case 0: // memory_order_relaxed 2255 default: // invalid order 2256 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2257 llvm::AtomicOrdering::Monotonic); 2258 break; 2259 case 1: // memory_order_consume 2260 case 2: // memory_order_acquire 2261 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2262 llvm::AtomicOrdering::Acquire); 2263 break; 2264 case 3: // memory_order_release 2265 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2266 llvm::AtomicOrdering::Release); 2267 break; 2268 case 4: // memory_order_acq_rel 2269 2270 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2271 llvm::AtomicOrdering::AcquireRelease); 2272 break; 2273 case 5: // memory_order_seq_cst 2274 Result = Builder.CreateAtomicRMW( 2275 llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2276 llvm::AtomicOrdering::SequentiallyConsistent); 2277 break; 2278 } 2279 Result->setVolatile(Volatile); 2280 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 2281 } 2282 2283 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 2284 2285 llvm::BasicBlock *BBs[5] = { 2286 createBasicBlock("monotonic", CurFn), 2287 createBasicBlock("acquire", CurFn), 2288 createBasicBlock("release", CurFn), 2289 createBasicBlock("acqrel", CurFn), 2290 createBasicBlock("seqcst", CurFn) 2291 }; 2292 llvm::AtomicOrdering Orders[5] = { 2293 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Acquire, 2294 llvm::AtomicOrdering::Release, llvm::AtomicOrdering::AcquireRelease, 2295 llvm::AtomicOrdering::SequentiallyConsistent}; 2296 2297 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 2298 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 2299 2300 Builder.SetInsertPoint(ContBB); 2301 PHINode *Result = Builder.CreatePHI(Int8Ty, 5, "was_set"); 2302 2303 for (unsigned i = 0; i < 5; ++i) { 2304 Builder.SetInsertPoint(BBs[i]); 2305 AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 2306 Ptr, NewVal, Orders[i]); 2307 RMW->setVolatile(Volatile); 2308 Result->addIncoming(RMW, BBs[i]); 2309 Builder.CreateBr(ContBB); 2310 } 2311 2312 SI->addCase(Builder.getInt32(0), BBs[0]); 2313 SI->addCase(Builder.getInt32(1), BBs[1]); 2314 SI->addCase(Builder.getInt32(2), BBs[1]); 2315 SI->addCase(Builder.getInt32(3), BBs[2]); 2316 SI->addCase(Builder.getInt32(4), BBs[3]); 2317 SI->addCase(Builder.getInt32(5), BBs[4]); 2318 2319 Builder.SetInsertPoint(ContBB); 2320 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 2321 } 2322 2323 case Builtin::BI__atomic_clear: { 2324 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 2325 bool Volatile = 2326 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 2327 2328 Address Ptr = EmitPointerWithAlignment(E->getArg(0)); 2329 unsigned AddrSpace = Ptr.getPointer()->getType()->getPointerAddressSpace(); 2330 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 2331 Value *NewVal = Builder.getInt8(0); 2332 Value *Order = EmitScalarExpr(E->getArg(1)); 2333 if (isa<llvm::ConstantInt>(Order)) { 2334 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 2335 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 2336 switch (ord) { 2337 case 0: // memory_order_relaxed 2338 default: // invalid order 2339 Store->setOrdering(llvm::AtomicOrdering::Monotonic); 2340 break; 2341 case 3: // memory_order_release 2342 Store->setOrdering(llvm::AtomicOrdering::Release); 2343 break; 2344 case 5: // memory_order_seq_cst 2345 Store->setOrdering(llvm::AtomicOrdering::SequentiallyConsistent); 2346 break; 2347 } 2348 return RValue::get(nullptr); 2349 } 2350 2351 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 2352 2353 llvm::BasicBlock *BBs[3] = { 2354 createBasicBlock("monotonic", CurFn), 2355 createBasicBlock("release", CurFn), 2356 createBasicBlock("seqcst", CurFn) 2357 }; 2358 llvm::AtomicOrdering Orders[3] = { 2359 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Release, 2360 llvm::AtomicOrdering::SequentiallyConsistent}; 2361 2362 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 2363 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 2364 2365 for (unsigned i = 0; i < 3; ++i) { 2366 Builder.SetInsertPoint(BBs[i]); 2367 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 2368 Store->setOrdering(Orders[i]); 2369 Builder.CreateBr(ContBB); 2370 } 2371 2372 SI->addCase(Builder.getInt32(0), BBs[0]); 2373 SI->addCase(Builder.getInt32(3), BBs[1]); 2374 SI->addCase(Builder.getInt32(5), BBs[2]); 2375 2376 Builder.SetInsertPoint(ContBB); 2377 return RValue::get(nullptr); 2378 } 2379 2380 case Builtin::BI__atomic_thread_fence: 2381 case Builtin::BI__atomic_signal_fence: 2382 case Builtin::BI__c11_atomic_thread_fence: 2383 case Builtin::BI__c11_atomic_signal_fence: { 2384 llvm::SyncScope::ID SSID; 2385 if (BuiltinID == Builtin::BI__atomic_signal_fence || 2386 BuiltinID == Builtin::BI__c11_atomic_signal_fence) 2387 SSID = llvm::SyncScope::SingleThread; 2388 else 2389 SSID = llvm::SyncScope::System; 2390 Value *Order = EmitScalarExpr(E->getArg(0)); 2391 if (isa<llvm::ConstantInt>(Order)) { 2392 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 2393 switch (ord) { 2394 case 0: // memory_order_relaxed 2395 default: // invalid order 2396 break; 2397 case 1: // memory_order_consume 2398 case 2: // memory_order_acquire 2399 Builder.CreateFence(llvm::AtomicOrdering::Acquire, SSID); 2400 break; 2401 case 3: // memory_order_release 2402 Builder.CreateFence(llvm::AtomicOrdering::Release, SSID); 2403 break; 2404 case 4: // memory_order_acq_rel 2405 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, SSID); 2406 break; 2407 case 5: // memory_order_seq_cst 2408 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, SSID); 2409 break; 2410 } 2411 return RValue::get(nullptr); 2412 } 2413 2414 llvm::BasicBlock *AcquireBB, *ReleaseBB, *AcqRelBB, *SeqCstBB; 2415 AcquireBB = createBasicBlock("acquire", CurFn); 2416 ReleaseBB = createBasicBlock("release", CurFn); 2417 AcqRelBB = createBasicBlock("acqrel", CurFn); 2418 SeqCstBB = createBasicBlock("seqcst", CurFn); 2419 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 2420 2421 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 2422 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, ContBB); 2423 2424 Builder.SetInsertPoint(AcquireBB); 2425 Builder.CreateFence(llvm::AtomicOrdering::Acquire, SSID); 2426 Builder.CreateBr(ContBB); 2427 SI->addCase(Builder.getInt32(1), AcquireBB); 2428 SI->addCase(Builder.getInt32(2), AcquireBB); 2429 2430 Builder.SetInsertPoint(ReleaseBB); 2431 Builder.CreateFence(llvm::AtomicOrdering::Release, SSID); 2432 Builder.CreateBr(ContBB); 2433 SI->addCase(Builder.getInt32(3), ReleaseBB); 2434 2435 Builder.SetInsertPoint(AcqRelBB); 2436 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, SSID); 2437 Builder.CreateBr(ContBB); 2438 SI->addCase(Builder.getInt32(4), AcqRelBB); 2439 2440 Builder.SetInsertPoint(SeqCstBB); 2441 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, SSID); 2442 Builder.CreateBr(ContBB); 2443 SI->addCase(Builder.getInt32(5), SeqCstBB); 2444 2445 Builder.SetInsertPoint(ContBB); 2446 return RValue::get(nullptr); 2447 } 2448 2449 case Builtin::BI__builtin_signbit: 2450 case Builtin::BI__builtin_signbitf: 2451 case Builtin::BI__builtin_signbitl: { 2452 return RValue::get( 2453 Builder.CreateZExt(EmitSignBit(*this, EmitScalarExpr(E->getArg(0))), 2454 ConvertType(E->getType()))); 2455 } 2456 case Builtin::BI__annotation: { 2457 // Re-encode each wide string to UTF8 and make an MDString. 2458 SmallVector<Metadata *, 1> Strings; 2459 for (const Expr *Arg : E->arguments()) { 2460 const auto *Str = cast<StringLiteral>(Arg->IgnoreParenCasts()); 2461 assert(Str->getCharByteWidth() == 2); 2462 StringRef WideBytes = Str->getBytes(); 2463 std::string StrUtf8; 2464 if (!convertUTF16ToUTF8String( 2465 makeArrayRef(WideBytes.data(), WideBytes.size()), StrUtf8)) { 2466 CGM.ErrorUnsupported(E, "non-UTF16 __annotation argument"); 2467 continue; 2468 } 2469 Strings.push_back(llvm::MDString::get(getLLVMContext(), StrUtf8)); 2470 } 2471 2472 // Build and MDTuple of MDStrings and emit the intrinsic call. 2473 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::codeview_annotation, {}); 2474 MDTuple *StrTuple = MDTuple::get(getLLVMContext(), Strings); 2475 Builder.CreateCall(F, MetadataAsValue::get(getLLVMContext(), StrTuple)); 2476 return RValue::getIgnored(); 2477 } 2478 case Builtin::BI__builtin_annotation: { 2479 llvm::Value *AnnVal = EmitScalarExpr(E->getArg(0)); 2480 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::annotation, 2481 AnnVal->getType()); 2482 2483 // Get the annotation string, go through casts. Sema requires this to be a 2484 // non-wide string literal, potentially casted, so the cast<> is safe. 2485 const Expr *AnnotationStrExpr = E->getArg(1)->IgnoreParenCasts(); 2486 StringRef Str = cast<StringLiteral>(AnnotationStrExpr)->getString(); 2487 return RValue::get(EmitAnnotationCall(F, AnnVal, Str, E->getExprLoc())); 2488 } 2489 case Builtin::BI__builtin_addcb: 2490 case Builtin::BI__builtin_addcs: 2491 case Builtin::BI__builtin_addc: 2492 case Builtin::BI__builtin_addcl: 2493 case Builtin::BI__builtin_addcll: 2494 case Builtin::BI__builtin_subcb: 2495 case Builtin::BI__builtin_subcs: 2496 case Builtin::BI__builtin_subc: 2497 case Builtin::BI__builtin_subcl: 2498 case Builtin::BI__builtin_subcll: { 2499 2500 // We translate all of these builtins from expressions of the form: 2501 // int x = ..., y = ..., carryin = ..., carryout, result; 2502 // result = __builtin_addc(x, y, carryin, &carryout); 2503 // 2504 // to LLVM IR of the form: 2505 // 2506 // %tmp1 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y) 2507 // %tmpsum1 = extractvalue {i32, i1} %tmp1, 0 2508 // %carry1 = extractvalue {i32, i1} %tmp1, 1 2509 // %tmp2 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %tmpsum1, 2510 // i32 %carryin) 2511 // %result = extractvalue {i32, i1} %tmp2, 0 2512 // %carry2 = extractvalue {i32, i1} %tmp2, 1 2513 // %tmp3 = or i1 %carry1, %carry2 2514 // %tmp4 = zext i1 %tmp3 to i32 2515 // store i32 %tmp4, i32* %carryout 2516 2517 // Scalarize our inputs. 2518 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 2519 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 2520 llvm::Value *Carryin = EmitScalarExpr(E->getArg(2)); 2521 Address CarryOutPtr = EmitPointerWithAlignment(E->getArg(3)); 2522 2523 // Decide if we are lowering to a uadd.with.overflow or usub.with.overflow. 2524 llvm::Intrinsic::ID IntrinsicId; 2525 switch (BuiltinID) { 2526 default: llvm_unreachable("Unknown multiprecision builtin id."); 2527 case Builtin::BI__builtin_addcb: 2528 case Builtin::BI__builtin_addcs: 2529 case Builtin::BI__builtin_addc: 2530 case Builtin::BI__builtin_addcl: 2531 case Builtin::BI__builtin_addcll: 2532 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 2533 break; 2534 case Builtin::BI__builtin_subcb: 2535 case Builtin::BI__builtin_subcs: 2536 case Builtin::BI__builtin_subc: 2537 case Builtin::BI__builtin_subcl: 2538 case Builtin::BI__builtin_subcll: 2539 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 2540 break; 2541 } 2542 2543 // Construct our resulting LLVM IR expression. 2544 llvm::Value *Carry1; 2545 llvm::Value *Sum1 = EmitOverflowIntrinsic(*this, IntrinsicId, 2546 X, Y, Carry1); 2547 llvm::Value *Carry2; 2548 llvm::Value *Sum2 = EmitOverflowIntrinsic(*this, IntrinsicId, 2549 Sum1, Carryin, Carry2); 2550 llvm::Value *CarryOut = Builder.CreateZExt(Builder.CreateOr(Carry1, Carry2), 2551 X->getType()); 2552 Builder.CreateStore(CarryOut, CarryOutPtr); 2553 return RValue::get(Sum2); 2554 } 2555 2556 case Builtin::BI__builtin_add_overflow: 2557 case Builtin::BI__builtin_sub_overflow: 2558 case Builtin::BI__builtin_mul_overflow: { 2559 const clang::Expr *LeftArg = E->getArg(0); 2560 const clang::Expr *RightArg = E->getArg(1); 2561 const clang::Expr *ResultArg = E->getArg(2); 2562 2563 clang::QualType ResultQTy = 2564 ResultArg->getType()->castAs<PointerType>()->getPointeeType(); 2565 2566 WidthAndSignedness LeftInfo = 2567 getIntegerWidthAndSignedness(CGM.getContext(), LeftArg->getType()); 2568 WidthAndSignedness RightInfo = 2569 getIntegerWidthAndSignedness(CGM.getContext(), RightArg->getType()); 2570 WidthAndSignedness ResultInfo = 2571 getIntegerWidthAndSignedness(CGM.getContext(), ResultQTy); 2572 2573 // Handle mixed-sign multiplication as a special case, because adding 2574 // runtime or backend support for our generic irgen would be too expensive. 2575 if (isSpecialMixedSignMultiply(BuiltinID, LeftInfo, RightInfo, ResultInfo)) 2576 return EmitCheckedMixedSignMultiply(*this, LeftArg, LeftInfo, RightArg, 2577 RightInfo, ResultArg, ResultQTy, 2578 ResultInfo); 2579 2580 WidthAndSignedness EncompassingInfo = 2581 EncompassingIntegerType({LeftInfo, RightInfo, ResultInfo}); 2582 2583 llvm::Type *EncompassingLLVMTy = 2584 llvm::IntegerType::get(CGM.getLLVMContext(), EncompassingInfo.Width); 2585 2586 llvm::Type *ResultLLVMTy = CGM.getTypes().ConvertType(ResultQTy); 2587 2588 llvm::Intrinsic::ID IntrinsicId; 2589 switch (BuiltinID) { 2590 default: 2591 llvm_unreachable("Unknown overflow builtin id."); 2592 case Builtin::BI__builtin_add_overflow: 2593 IntrinsicId = EncompassingInfo.Signed 2594 ? llvm::Intrinsic::sadd_with_overflow 2595 : llvm::Intrinsic::uadd_with_overflow; 2596 break; 2597 case Builtin::BI__builtin_sub_overflow: 2598 IntrinsicId = EncompassingInfo.Signed 2599 ? llvm::Intrinsic::ssub_with_overflow 2600 : llvm::Intrinsic::usub_with_overflow; 2601 break; 2602 case Builtin::BI__builtin_mul_overflow: 2603 IntrinsicId = EncompassingInfo.Signed 2604 ? llvm::Intrinsic::smul_with_overflow 2605 : llvm::Intrinsic::umul_with_overflow; 2606 break; 2607 } 2608 2609 llvm::Value *Left = EmitScalarExpr(LeftArg); 2610 llvm::Value *Right = EmitScalarExpr(RightArg); 2611 Address ResultPtr = EmitPointerWithAlignment(ResultArg); 2612 2613 // Extend each operand to the encompassing type. 2614 Left = Builder.CreateIntCast(Left, EncompassingLLVMTy, LeftInfo.Signed); 2615 Right = Builder.CreateIntCast(Right, EncompassingLLVMTy, RightInfo.Signed); 2616 2617 // Perform the operation on the extended values. 2618 llvm::Value *Overflow, *Result; 2619 Result = EmitOverflowIntrinsic(*this, IntrinsicId, Left, Right, Overflow); 2620 2621 if (EncompassingInfo.Width > ResultInfo.Width) { 2622 // The encompassing type is wider than the result type, so we need to 2623 // truncate it. 2624 llvm::Value *ResultTrunc = Builder.CreateTrunc(Result, ResultLLVMTy); 2625 2626 // To see if the truncation caused an overflow, we will extend 2627 // the result and then compare it to the original result. 2628 llvm::Value *ResultTruncExt = Builder.CreateIntCast( 2629 ResultTrunc, EncompassingLLVMTy, ResultInfo.Signed); 2630 llvm::Value *TruncationOverflow = 2631 Builder.CreateICmpNE(Result, ResultTruncExt); 2632 2633 Overflow = Builder.CreateOr(Overflow, TruncationOverflow); 2634 Result = ResultTrunc; 2635 } 2636 2637 // Finally, store the result using the pointer. 2638 bool isVolatile = 2639 ResultArg->getType()->getPointeeType().isVolatileQualified(); 2640 Builder.CreateStore(EmitToMemory(Result, ResultQTy), ResultPtr, isVolatile); 2641 2642 return RValue::get(Overflow); 2643 } 2644 2645 case Builtin::BI__builtin_uadd_overflow: 2646 case Builtin::BI__builtin_uaddl_overflow: 2647 case Builtin::BI__builtin_uaddll_overflow: 2648 case Builtin::BI__builtin_usub_overflow: 2649 case Builtin::BI__builtin_usubl_overflow: 2650 case Builtin::BI__builtin_usubll_overflow: 2651 case Builtin::BI__builtin_umul_overflow: 2652 case Builtin::BI__builtin_umull_overflow: 2653 case Builtin::BI__builtin_umulll_overflow: 2654 case Builtin::BI__builtin_sadd_overflow: 2655 case Builtin::BI__builtin_saddl_overflow: 2656 case Builtin::BI__builtin_saddll_overflow: 2657 case Builtin::BI__builtin_ssub_overflow: 2658 case Builtin::BI__builtin_ssubl_overflow: 2659 case Builtin::BI__builtin_ssubll_overflow: 2660 case Builtin::BI__builtin_smul_overflow: 2661 case Builtin::BI__builtin_smull_overflow: 2662 case Builtin::BI__builtin_smulll_overflow: { 2663 2664 // We translate all of these builtins directly to the relevant llvm IR node. 2665 2666 // Scalarize our inputs. 2667 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 2668 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 2669 Address SumOutPtr = EmitPointerWithAlignment(E->getArg(2)); 2670 2671 // Decide which of the overflow intrinsics we are lowering to: 2672 llvm::Intrinsic::ID IntrinsicId; 2673 switch (BuiltinID) { 2674 default: llvm_unreachable("Unknown overflow builtin id."); 2675 case Builtin::BI__builtin_uadd_overflow: 2676 case Builtin::BI__builtin_uaddl_overflow: 2677 case Builtin::BI__builtin_uaddll_overflow: 2678 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 2679 break; 2680 case Builtin::BI__builtin_usub_overflow: 2681 case Builtin::BI__builtin_usubl_overflow: 2682 case Builtin::BI__builtin_usubll_overflow: 2683 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 2684 break; 2685 case Builtin::BI__builtin_umul_overflow: 2686 case Builtin::BI__builtin_umull_overflow: 2687 case Builtin::BI__builtin_umulll_overflow: 2688 IntrinsicId = llvm::Intrinsic::umul_with_overflow; 2689 break; 2690 case Builtin::BI__builtin_sadd_overflow: 2691 case Builtin::BI__builtin_saddl_overflow: 2692 case Builtin::BI__builtin_saddll_overflow: 2693 IntrinsicId = llvm::Intrinsic::sadd_with_overflow; 2694 break; 2695 case Builtin::BI__builtin_ssub_overflow: 2696 case Builtin::BI__builtin_ssubl_overflow: 2697 case Builtin::BI__builtin_ssubll_overflow: 2698 IntrinsicId = llvm::Intrinsic::ssub_with_overflow; 2699 break; 2700 case Builtin::BI__builtin_smul_overflow: 2701 case Builtin::BI__builtin_smull_overflow: 2702 case Builtin::BI__builtin_smulll_overflow: 2703 IntrinsicId = llvm::Intrinsic::smul_with_overflow; 2704 break; 2705 } 2706 2707 2708 llvm::Value *Carry; 2709 llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry); 2710 Builder.CreateStore(Sum, SumOutPtr); 2711 2712 return RValue::get(Carry); 2713 } 2714 case Builtin::BI__builtin_addressof: 2715 return RValue::get(EmitLValue(E->getArg(0)).getPointer()); 2716 case Builtin::BI__builtin_operator_new: 2717 return EmitBuiltinNewDeleteCall( 2718 E->getCallee()->getType()->castAs<FunctionProtoType>(), E, false); 2719 case Builtin::BI__builtin_operator_delete: 2720 return EmitBuiltinNewDeleteCall( 2721 E->getCallee()->getType()->castAs<FunctionProtoType>(), E, true); 2722 2723 case Builtin::BI__noop: 2724 // __noop always evaluates to an integer literal zero. 2725 return RValue::get(ConstantInt::get(IntTy, 0)); 2726 case Builtin::BI__builtin_call_with_static_chain: { 2727 const CallExpr *Call = cast<CallExpr>(E->getArg(0)); 2728 const Expr *Chain = E->getArg(1); 2729 return EmitCall(Call->getCallee()->getType(), 2730 EmitCallee(Call->getCallee()), Call, ReturnValue, 2731 EmitScalarExpr(Chain)); 2732 } 2733 case Builtin::BI_InterlockedExchange8: 2734 case Builtin::BI_InterlockedExchange16: 2735 case Builtin::BI_InterlockedExchange: 2736 case Builtin::BI_InterlockedExchangePointer: 2737 return RValue::get( 2738 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E)); 2739 case Builtin::BI_InterlockedCompareExchangePointer: { 2740 llvm::Type *RTy; 2741 llvm::IntegerType *IntType = 2742 IntegerType::get(getLLVMContext(), 2743 getContext().getTypeSize(E->getType())); 2744 llvm::Type *IntPtrType = IntType->getPointerTo(); 2745 2746 llvm::Value *Destination = 2747 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), IntPtrType); 2748 2749 llvm::Value *Exchange = EmitScalarExpr(E->getArg(1)); 2750 RTy = Exchange->getType(); 2751 Exchange = Builder.CreatePtrToInt(Exchange, IntType); 2752 2753 llvm::Value *Comparand = 2754 Builder.CreatePtrToInt(EmitScalarExpr(E->getArg(2)), IntType); 2755 2756 auto Result = 2757 Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 2758 AtomicOrdering::SequentiallyConsistent, 2759 AtomicOrdering::SequentiallyConsistent); 2760 Result->setVolatile(true); 2761 2762 return RValue::get(Builder.CreateIntToPtr(Builder.CreateExtractValue(Result, 2763 0), 2764 RTy)); 2765 } 2766 case Builtin::BI_InterlockedCompareExchange8: 2767 case Builtin::BI_InterlockedCompareExchange16: 2768 case Builtin::BI_InterlockedCompareExchange: 2769 case Builtin::BI_InterlockedCompareExchange64: { 2770 AtomicCmpXchgInst *CXI = Builder.CreateAtomicCmpXchg( 2771 EmitScalarExpr(E->getArg(0)), 2772 EmitScalarExpr(E->getArg(2)), 2773 EmitScalarExpr(E->getArg(1)), 2774 AtomicOrdering::SequentiallyConsistent, 2775 AtomicOrdering::SequentiallyConsistent); 2776 CXI->setVolatile(true); 2777 return RValue::get(Builder.CreateExtractValue(CXI, 0)); 2778 } 2779 case Builtin::BI_InterlockedIncrement16: 2780 case Builtin::BI_InterlockedIncrement: 2781 return RValue::get( 2782 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E)); 2783 case Builtin::BI_InterlockedDecrement16: 2784 case Builtin::BI_InterlockedDecrement: 2785 return RValue::get( 2786 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E)); 2787 case Builtin::BI_InterlockedAnd8: 2788 case Builtin::BI_InterlockedAnd16: 2789 case Builtin::BI_InterlockedAnd: 2790 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E)); 2791 case Builtin::BI_InterlockedExchangeAdd8: 2792 case Builtin::BI_InterlockedExchangeAdd16: 2793 case Builtin::BI_InterlockedExchangeAdd: 2794 return RValue::get( 2795 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E)); 2796 case Builtin::BI_InterlockedExchangeSub8: 2797 case Builtin::BI_InterlockedExchangeSub16: 2798 case Builtin::BI_InterlockedExchangeSub: 2799 return RValue::get( 2800 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E)); 2801 case Builtin::BI_InterlockedOr8: 2802 case Builtin::BI_InterlockedOr16: 2803 case Builtin::BI_InterlockedOr: 2804 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E)); 2805 case Builtin::BI_InterlockedXor8: 2806 case Builtin::BI_InterlockedXor16: 2807 case Builtin::BI_InterlockedXor: 2808 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E)); 2809 case Builtin::BI_interlockedbittestandset: 2810 return RValue::get( 2811 EmitMSVCBuiltinExpr(MSVCIntrin::_interlockedbittestandset, E)); 2812 2813 case Builtin::BI__exception_code: 2814 case Builtin::BI_exception_code: 2815 return RValue::get(EmitSEHExceptionCode()); 2816 case Builtin::BI__exception_info: 2817 case Builtin::BI_exception_info: 2818 return RValue::get(EmitSEHExceptionInfo()); 2819 case Builtin::BI__abnormal_termination: 2820 case Builtin::BI_abnormal_termination: 2821 return RValue::get(EmitSEHAbnormalTermination()); 2822 case Builtin::BI_setjmpex: { 2823 if (getTarget().getTriple().isOSMSVCRT()) { 2824 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 2825 llvm::AttributeList ReturnsTwiceAttr = llvm::AttributeList::get( 2826 getLLVMContext(), llvm::AttributeList::FunctionIndex, 2827 llvm::Attribute::ReturnsTwice); 2828 llvm::Constant *SetJmpEx = CGM.CreateRuntimeFunction( 2829 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 2830 "_setjmpex", ReturnsTwiceAttr, /*Local=*/true); 2831 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 2832 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 2833 llvm::Value *FrameAddr = 2834 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2835 ConstantInt::get(Int32Ty, 0)); 2836 llvm::Value *Args[] = {Buf, FrameAddr}; 2837 llvm::CallSite CS = EmitRuntimeCallOrInvoke(SetJmpEx, Args); 2838 CS.setAttributes(ReturnsTwiceAttr); 2839 return RValue::get(CS.getInstruction()); 2840 } 2841 break; 2842 } 2843 case Builtin::BI_setjmp: { 2844 if (getTarget().getTriple().isOSMSVCRT()) { 2845 llvm::AttributeList ReturnsTwiceAttr = llvm::AttributeList::get( 2846 getLLVMContext(), llvm::AttributeList::FunctionIndex, 2847 llvm::Attribute::ReturnsTwice); 2848 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 2849 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 2850 llvm::CallSite CS; 2851 if (getTarget().getTriple().getArch() == llvm::Triple::x86) { 2852 llvm::Type *ArgTypes[] = {Int8PtrTy, IntTy}; 2853 llvm::Constant *SetJmp3 = CGM.CreateRuntimeFunction( 2854 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/true), 2855 "_setjmp3", ReturnsTwiceAttr, /*Local=*/true); 2856 llvm::Value *Count = ConstantInt::get(IntTy, 0); 2857 llvm::Value *Args[] = {Buf, Count}; 2858 CS = EmitRuntimeCallOrInvoke(SetJmp3, Args); 2859 } else { 2860 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 2861 llvm::Constant *SetJmp = CGM.CreateRuntimeFunction( 2862 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 2863 "_setjmp", ReturnsTwiceAttr, /*Local=*/true); 2864 llvm::Value *FrameAddr = 2865 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2866 ConstantInt::get(Int32Ty, 0)); 2867 llvm::Value *Args[] = {Buf, FrameAddr}; 2868 CS = EmitRuntimeCallOrInvoke(SetJmp, Args); 2869 } 2870 CS.setAttributes(ReturnsTwiceAttr); 2871 return RValue::get(CS.getInstruction()); 2872 } 2873 break; 2874 } 2875 2876 case Builtin::BI__GetExceptionInfo: { 2877 if (llvm::GlobalVariable *GV = 2878 CGM.getCXXABI().getThrowInfo(FD->getParamDecl(0)->getType())) 2879 return RValue::get(llvm::ConstantExpr::getBitCast(GV, CGM.Int8PtrTy)); 2880 break; 2881 } 2882 2883 case Builtin::BI__fastfail: 2884 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::__fastfail, E)); 2885 2886 case Builtin::BI__builtin_coro_size: { 2887 auto & Context = getContext(); 2888 auto SizeTy = Context.getSizeType(); 2889 auto T = Builder.getIntNTy(Context.getTypeSize(SizeTy)); 2890 Value *F = CGM.getIntrinsic(Intrinsic::coro_size, T); 2891 return RValue::get(Builder.CreateCall(F)); 2892 } 2893 2894 case Builtin::BI__builtin_coro_id: 2895 return EmitCoroutineIntrinsic(E, Intrinsic::coro_id); 2896 case Builtin::BI__builtin_coro_promise: 2897 return EmitCoroutineIntrinsic(E, Intrinsic::coro_promise); 2898 case Builtin::BI__builtin_coro_resume: 2899 return EmitCoroutineIntrinsic(E, Intrinsic::coro_resume); 2900 case Builtin::BI__builtin_coro_frame: 2901 return EmitCoroutineIntrinsic(E, Intrinsic::coro_frame); 2902 case Builtin::BI__builtin_coro_noop: 2903 return EmitCoroutineIntrinsic(E, Intrinsic::coro_noop); 2904 case Builtin::BI__builtin_coro_free: 2905 return EmitCoroutineIntrinsic(E, Intrinsic::coro_free); 2906 case Builtin::BI__builtin_coro_destroy: 2907 return EmitCoroutineIntrinsic(E, Intrinsic::coro_destroy); 2908 case Builtin::BI__builtin_coro_done: 2909 return EmitCoroutineIntrinsic(E, Intrinsic::coro_done); 2910 case Builtin::BI__builtin_coro_alloc: 2911 return EmitCoroutineIntrinsic(E, Intrinsic::coro_alloc); 2912 case Builtin::BI__builtin_coro_begin: 2913 return EmitCoroutineIntrinsic(E, Intrinsic::coro_begin); 2914 case Builtin::BI__builtin_coro_end: 2915 return EmitCoroutineIntrinsic(E, Intrinsic::coro_end); 2916 case Builtin::BI__builtin_coro_suspend: 2917 return EmitCoroutineIntrinsic(E, Intrinsic::coro_suspend); 2918 case Builtin::BI__builtin_coro_param: 2919 return EmitCoroutineIntrinsic(E, Intrinsic::coro_param); 2920 2921 // OpenCL v2.0 s6.13.16.2, Built-in pipe read and write functions 2922 case Builtin::BIread_pipe: 2923 case Builtin::BIwrite_pipe: { 2924 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2925 *Arg1 = EmitScalarExpr(E->getArg(1)); 2926 CGOpenCLRuntime OpenCLRT(CGM); 2927 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2928 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2929 2930 // Type of the generic packet parameter. 2931 unsigned GenericAS = 2932 getContext().getTargetAddressSpace(LangAS::opencl_generic); 2933 llvm::Type *I8PTy = llvm::PointerType::get( 2934 llvm::Type::getInt8Ty(getLLVMContext()), GenericAS); 2935 2936 // Testing which overloaded version we should generate the call for. 2937 if (2U == E->getNumArgs()) { 2938 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_2" 2939 : "__write_pipe_2"; 2940 // Creating a generic function type to be able to call with any builtin or 2941 // user defined type. 2942 llvm::Type *ArgTys[] = {Arg0->getType(), I8PTy, Int32Ty, Int32Ty}; 2943 llvm::FunctionType *FTy = llvm::FunctionType::get( 2944 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2945 Value *BCast = Builder.CreatePointerCast(Arg1, I8PTy); 2946 return RValue::get( 2947 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2948 {Arg0, BCast, PacketSize, PacketAlign})); 2949 } else { 2950 assert(4 == E->getNumArgs() && 2951 "Illegal number of parameters to pipe function"); 2952 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_4" 2953 : "__write_pipe_4"; 2954 2955 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, I8PTy, 2956 Int32Ty, Int32Ty}; 2957 Value *Arg2 = EmitScalarExpr(E->getArg(2)), 2958 *Arg3 = EmitScalarExpr(E->getArg(3)); 2959 llvm::FunctionType *FTy = llvm::FunctionType::get( 2960 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2961 Value *BCast = Builder.CreatePointerCast(Arg3, I8PTy); 2962 // We know the third argument is an integer type, but we may need to cast 2963 // it to i32. 2964 if (Arg2->getType() != Int32Ty) 2965 Arg2 = Builder.CreateZExtOrTrunc(Arg2, Int32Ty); 2966 return RValue::get(Builder.CreateCall( 2967 CGM.CreateRuntimeFunction(FTy, Name), 2968 {Arg0, Arg1, Arg2, BCast, PacketSize, PacketAlign})); 2969 } 2970 } 2971 // OpenCL v2.0 s6.13.16 ,s9.17.3.5 - Built-in pipe reserve read and write 2972 // functions 2973 case Builtin::BIreserve_read_pipe: 2974 case Builtin::BIreserve_write_pipe: 2975 case Builtin::BIwork_group_reserve_read_pipe: 2976 case Builtin::BIwork_group_reserve_write_pipe: 2977 case Builtin::BIsub_group_reserve_read_pipe: 2978 case Builtin::BIsub_group_reserve_write_pipe: { 2979 // Composing the mangled name for the function. 2980 const char *Name; 2981 if (BuiltinID == Builtin::BIreserve_read_pipe) 2982 Name = "__reserve_read_pipe"; 2983 else if (BuiltinID == Builtin::BIreserve_write_pipe) 2984 Name = "__reserve_write_pipe"; 2985 else if (BuiltinID == Builtin::BIwork_group_reserve_read_pipe) 2986 Name = "__work_group_reserve_read_pipe"; 2987 else if (BuiltinID == Builtin::BIwork_group_reserve_write_pipe) 2988 Name = "__work_group_reserve_write_pipe"; 2989 else if (BuiltinID == Builtin::BIsub_group_reserve_read_pipe) 2990 Name = "__sub_group_reserve_read_pipe"; 2991 else 2992 Name = "__sub_group_reserve_write_pipe"; 2993 2994 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2995 *Arg1 = EmitScalarExpr(E->getArg(1)); 2996 llvm::Type *ReservedIDTy = ConvertType(getContext().OCLReserveIDTy); 2997 CGOpenCLRuntime OpenCLRT(CGM); 2998 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2999 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 3000 3001 // Building the generic function prototype. 3002 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty, Int32Ty}; 3003 llvm::FunctionType *FTy = llvm::FunctionType::get( 3004 ReservedIDTy, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3005 // We know the second argument is an integer type, but we may need to cast 3006 // it to i32. 3007 if (Arg1->getType() != Int32Ty) 3008 Arg1 = Builder.CreateZExtOrTrunc(Arg1, Int32Ty); 3009 return RValue::get( 3010 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3011 {Arg0, Arg1, PacketSize, PacketAlign})); 3012 } 3013 // OpenCL v2.0 s6.13.16, s9.17.3.5 - Built-in pipe commit read and write 3014 // functions 3015 case Builtin::BIcommit_read_pipe: 3016 case Builtin::BIcommit_write_pipe: 3017 case Builtin::BIwork_group_commit_read_pipe: 3018 case Builtin::BIwork_group_commit_write_pipe: 3019 case Builtin::BIsub_group_commit_read_pipe: 3020 case Builtin::BIsub_group_commit_write_pipe: { 3021 const char *Name; 3022 if (BuiltinID == Builtin::BIcommit_read_pipe) 3023 Name = "__commit_read_pipe"; 3024 else if (BuiltinID == Builtin::BIcommit_write_pipe) 3025 Name = "__commit_write_pipe"; 3026 else if (BuiltinID == Builtin::BIwork_group_commit_read_pipe) 3027 Name = "__work_group_commit_read_pipe"; 3028 else if (BuiltinID == Builtin::BIwork_group_commit_write_pipe) 3029 Name = "__work_group_commit_write_pipe"; 3030 else if (BuiltinID == Builtin::BIsub_group_commit_read_pipe) 3031 Name = "__sub_group_commit_read_pipe"; 3032 else 3033 Name = "__sub_group_commit_write_pipe"; 3034 3035 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 3036 *Arg1 = EmitScalarExpr(E->getArg(1)); 3037 CGOpenCLRuntime OpenCLRT(CGM); 3038 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 3039 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 3040 3041 // Building the generic function prototype. 3042 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, Int32Ty}; 3043 llvm::FunctionType *FTy = 3044 llvm::FunctionType::get(llvm::Type::getVoidTy(getLLVMContext()), 3045 llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3046 3047 return RValue::get( 3048 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3049 {Arg0, Arg1, PacketSize, PacketAlign})); 3050 } 3051 // OpenCL v2.0 s6.13.16.4 Built-in pipe query functions 3052 case Builtin::BIget_pipe_num_packets: 3053 case Builtin::BIget_pipe_max_packets: { 3054 const char *Name; 3055 if (BuiltinID == Builtin::BIget_pipe_num_packets) 3056 Name = "__get_pipe_num_packets"; 3057 else 3058 Name = "__get_pipe_max_packets"; 3059 3060 // Building the generic function prototype. 3061 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 3062 CGOpenCLRuntime OpenCLRT(CGM); 3063 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 3064 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 3065 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty}; 3066 llvm::FunctionType *FTy = llvm::FunctionType::get( 3067 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3068 3069 return RValue::get(Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3070 {Arg0, PacketSize, PacketAlign})); 3071 } 3072 3073 // OpenCL v2.0 s6.13.9 - Address space qualifier functions. 3074 case Builtin::BIto_global: 3075 case Builtin::BIto_local: 3076 case Builtin::BIto_private: { 3077 auto Arg0 = EmitScalarExpr(E->getArg(0)); 3078 auto NewArgT = llvm::PointerType::get(Int8Ty, 3079 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3080 auto NewRetT = llvm::PointerType::get(Int8Ty, 3081 CGM.getContext().getTargetAddressSpace( 3082 E->getType()->getPointeeType().getAddressSpace())); 3083 auto FTy = llvm::FunctionType::get(NewRetT, {NewArgT}, false); 3084 llvm::Value *NewArg; 3085 if (Arg0->getType()->getPointerAddressSpace() != 3086 NewArgT->getPointerAddressSpace()) 3087 NewArg = Builder.CreateAddrSpaceCast(Arg0, NewArgT); 3088 else 3089 NewArg = Builder.CreateBitOrPointerCast(Arg0, NewArgT); 3090 auto NewName = std::string("__") + E->getDirectCallee()->getName().str(); 3091 auto NewCall = 3092 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, NewName), {NewArg}); 3093 return RValue::get(Builder.CreateBitOrPointerCast(NewCall, 3094 ConvertType(E->getType()))); 3095 } 3096 3097 // OpenCL v2.0, s6.13.17 - Enqueue kernel function. 3098 // It contains four different overload formats specified in Table 6.13.17.1. 3099 case Builtin::BIenqueue_kernel: { 3100 StringRef Name; // Generated function call name 3101 unsigned NumArgs = E->getNumArgs(); 3102 3103 llvm::Type *QueueTy = ConvertType(getContext().OCLQueueTy); 3104 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3105 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3106 3107 llvm::Value *Queue = EmitScalarExpr(E->getArg(0)); 3108 llvm::Value *Flags = EmitScalarExpr(E->getArg(1)); 3109 LValue NDRangeL = EmitAggExprToLValue(E->getArg(2)); 3110 llvm::Value *Range = NDRangeL.getAddress().getPointer(); 3111 llvm::Type *RangeTy = NDRangeL.getAddress().getType(); 3112 3113 if (NumArgs == 4) { 3114 // The most basic form of the call with parameters: 3115 // queue_t, kernel_enqueue_flags_t, ndrange_t, block(void) 3116 Name = "__enqueue_kernel_basic"; 3117 llvm::Type *ArgTys[] = {QueueTy, Int32Ty, RangeTy, GenericVoidPtrTy, 3118 GenericVoidPtrTy}; 3119 llvm::FunctionType *FTy = llvm::FunctionType::get( 3120 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3121 3122 auto Info = 3123 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(3)); 3124 llvm::Value *Kernel = 3125 Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3126 llvm::Value *Block = 3127 Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3128 3129 AttrBuilder B; 3130 B.addAttribute(Attribute::ByVal); 3131 llvm::AttributeList ByValAttrSet = 3132 llvm::AttributeList::get(CGM.getModule().getContext(), 3U, B); 3133 3134 auto RTCall = 3135 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name, ByValAttrSet), 3136 {Queue, Flags, Range, Kernel, Block}); 3137 RTCall->setAttributes(ByValAttrSet); 3138 return RValue::get(RTCall); 3139 } 3140 assert(NumArgs >= 5 && "Invalid enqueue_kernel signature"); 3141 3142 // Create a temporary array to hold the sizes of local pointer arguments 3143 // for the block. \p First is the position of the first size argument. 3144 auto CreateArrayForSizeVar = [=](unsigned First) { 3145 auto *AT = llvm::ArrayType::get(SizeTy, NumArgs - First); 3146 auto *Arr = Builder.CreateAlloca(AT); 3147 llvm::Value *Ptr; 3148 // Each of the following arguments specifies the size of the corresponding 3149 // argument passed to the enqueued block. 3150 auto *Zero = llvm::ConstantInt::get(IntTy, 0); 3151 for (unsigned I = First; I < NumArgs; ++I) { 3152 auto *Index = llvm::ConstantInt::get(IntTy, I - First); 3153 auto *GEP = Builder.CreateGEP(Arr, {Zero, Index}); 3154 if (I == First) 3155 Ptr = GEP; 3156 auto *V = 3157 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(I)), SizeTy); 3158 Builder.CreateAlignedStore( 3159 V, GEP, CGM.getDataLayout().getPrefTypeAlignment(SizeTy)); 3160 } 3161 return Ptr; 3162 }; 3163 3164 // Could have events and/or vaargs. 3165 if (E->getArg(3)->getType()->isBlockPointerType()) { 3166 // No events passed, but has variadic arguments. 3167 Name = "__enqueue_kernel_vaargs"; 3168 auto Info = 3169 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(3)); 3170 llvm::Value *Kernel = 3171 Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3172 auto *Block = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3173 auto *PtrToSizeArray = CreateArrayForSizeVar(4); 3174 3175 // Create a vector of the arguments, as well as a constant value to 3176 // express to the runtime the number of variadic arguments. 3177 std::vector<llvm::Value *> Args = { 3178 Queue, Flags, Range, 3179 Kernel, Block, ConstantInt::get(IntTy, NumArgs - 4), 3180 PtrToSizeArray}; 3181 std::vector<llvm::Type *> ArgTys = { 3182 QueueTy, IntTy, RangeTy, 3183 GenericVoidPtrTy, GenericVoidPtrTy, IntTy, 3184 PtrToSizeArray->getType()}; 3185 3186 llvm::FunctionType *FTy = llvm::FunctionType::get( 3187 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3188 return RValue::get( 3189 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3190 llvm::ArrayRef<llvm::Value *>(Args))); 3191 } 3192 // Any calls now have event arguments passed. 3193 if (NumArgs >= 7) { 3194 llvm::Type *EventTy = ConvertType(getContext().OCLClkEventTy); 3195 llvm::Type *EventPtrTy = EventTy->getPointerTo( 3196 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3197 3198 llvm::Value *NumEvents = 3199 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(3)), Int32Ty); 3200 llvm::Value *EventList = 3201 E->getArg(4)->getType()->isArrayType() 3202 ? EmitArrayToPointerDecay(E->getArg(4)).getPointer() 3203 : EmitScalarExpr(E->getArg(4)); 3204 llvm::Value *ClkEvent = EmitScalarExpr(E->getArg(5)); 3205 // Convert to generic address space. 3206 EventList = Builder.CreatePointerCast(EventList, EventPtrTy); 3207 ClkEvent = Builder.CreatePointerCast(ClkEvent, EventPtrTy); 3208 auto Info = 3209 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(6)); 3210 llvm::Value *Kernel = 3211 Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3212 llvm::Value *Block = 3213 Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3214 3215 std::vector<llvm::Type *> ArgTys = { 3216 QueueTy, Int32Ty, RangeTy, Int32Ty, 3217 EventPtrTy, EventPtrTy, GenericVoidPtrTy, GenericVoidPtrTy}; 3218 3219 std::vector<llvm::Value *> Args = {Queue, Flags, Range, NumEvents, 3220 EventList, ClkEvent, Kernel, Block}; 3221 3222 if (NumArgs == 7) { 3223 // Has events but no variadics. 3224 Name = "__enqueue_kernel_basic_events"; 3225 llvm::FunctionType *FTy = llvm::FunctionType::get( 3226 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3227 return RValue::get( 3228 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3229 llvm::ArrayRef<llvm::Value *>(Args))); 3230 } 3231 // Has event info and variadics 3232 // Pass the number of variadics to the runtime function too. 3233 Args.push_back(ConstantInt::get(Int32Ty, NumArgs - 7)); 3234 ArgTys.push_back(Int32Ty); 3235 Name = "__enqueue_kernel_events_vaargs"; 3236 3237 auto *PtrToSizeArray = CreateArrayForSizeVar(7); 3238 Args.push_back(PtrToSizeArray); 3239 ArgTys.push_back(PtrToSizeArray->getType()); 3240 3241 llvm::FunctionType *FTy = llvm::FunctionType::get( 3242 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3243 return RValue::get( 3244 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3245 llvm::ArrayRef<llvm::Value *>(Args))); 3246 } 3247 LLVM_FALLTHROUGH; 3248 } 3249 // OpenCL v2.0 s6.13.17.6 - Kernel query functions need bitcast of block 3250 // parameter. 3251 case Builtin::BIget_kernel_work_group_size: { 3252 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3253 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3254 auto Info = 3255 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(0)); 3256 Value *Kernel = Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3257 Value *Arg = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3258 return RValue::get(Builder.CreateCall( 3259 CGM.CreateRuntimeFunction( 3260 llvm::FunctionType::get(IntTy, {GenericVoidPtrTy, GenericVoidPtrTy}, 3261 false), 3262 "__get_kernel_work_group_size_impl"), 3263 {Kernel, Arg})); 3264 } 3265 case Builtin::BIget_kernel_preferred_work_group_size_multiple: { 3266 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3267 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3268 auto Info = 3269 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(0)); 3270 Value *Kernel = Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3271 Value *Arg = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3272 return RValue::get(Builder.CreateCall( 3273 CGM.CreateRuntimeFunction( 3274 llvm::FunctionType::get(IntTy, {GenericVoidPtrTy, GenericVoidPtrTy}, 3275 false), 3276 "__get_kernel_preferred_work_group_multiple_impl"), 3277 {Kernel, Arg})); 3278 } 3279 case Builtin::BIget_kernel_max_sub_group_size_for_ndrange: 3280 case Builtin::BIget_kernel_sub_group_count_for_ndrange: { 3281 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3282 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3283 LValue NDRangeL = EmitAggExprToLValue(E->getArg(0)); 3284 llvm::Value *NDRange = NDRangeL.getAddress().getPointer(); 3285 auto Info = 3286 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(1)); 3287 Value *Kernel = Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3288 Value *Block = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3289 const char *Name = 3290 BuiltinID == Builtin::BIget_kernel_max_sub_group_size_for_ndrange 3291 ? "__get_kernel_max_sub_group_size_for_ndrange_impl" 3292 : "__get_kernel_sub_group_count_for_ndrange_impl"; 3293 return RValue::get(Builder.CreateCall( 3294 CGM.CreateRuntimeFunction( 3295 llvm::FunctionType::get( 3296 IntTy, {NDRange->getType(), GenericVoidPtrTy, GenericVoidPtrTy}, 3297 false), 3298 Name), 3299 {NDRange, Kernel, Block})); 3300 } 3301 3302 case Builtin::BI__builtin_store_half: 3303 case Builtin::BI__builtin_store_halff: { 3304 Value *Val = EmitScalarExpr(E->getArg(0)); 3305 Address Address = EmitPointerWithAlignment(E->getArg(1)); 3306 Value *HalfVal = Builder.CreateFPTrunc(Val, Builder.getHalfTy()); 3307 return RValue::get(Builder.CreateStore(HalfVal, Address)); 3308 } 3309 case Builtin::BI__builtin_load_half: { 3310 Address Address = EmitPointerWithAlignment(E->getArg(0)); 3311 Value *HalfVal = Builder.CreateLoad(Address); 3312 return RValue::get(Builder.CreateFPExt(HalfVal, Builder.getDoubleTy())); 3313 } 3314 case Builtin::BI__builtin_load_halff: { 3315 Address Address = EmitPointerWithAlignment(E->getArg(0)); 3316 Value *HalfVal = Builder.CreateLoad(Address); 3317 return RValue::get(Builder.CreateFPExt(HalfVal, Builder.getFloatTy())); 3318 } 3319 case Builtin::BIprintf: 3320 if (getTarget().getTriple().isNVPTX()) 3321 return EmitNVPTXDevicePrintfCallExpr(E, ReturnValue); 3322 break; 3323 case Builtin::BI__builtin_canonicalize: 3324 case Builtin::BI__builtin_canonicalizef: 3325 case Builtin::BI__builtin_canonicalizel: 3326 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::canonicalize)); 3327 3328 case Builtin::BI__builtin_thread_pointer: { 3329 if (!getContext().getTargetInfo().isTLSSupported()) 3330 CGM.ErrorUnsupported(E, "__builtin_thread_pointer"); 3331 // Fall through - it's already mapped to the intrinsic by GCCBuiltin. 3332 break; 3333 } 3334 case Builtin::BI__builtin_os_log_format: 3335 return emitBuiltinOSLogFormat(*E); 3336 3337 case Builtin::BI__builtin_os_log_format_buffer_size: { 3338 analyze_os_log::OSLogBufferLayout Layout; 3339 analyze_os_log::computeOSLogBufferLayout(CGM.getContext(), E, Layout); 3340 return RValue::get(ConstantInt::get(ConvertType(E->getType()), 3341 Layout.size().getQuantity())); 3342 } 3343 3344 case Builtin::BI__xray_customevent: { 3345 if (!ShouldXRayInstrumentFunction()) 3346 return RValue::getIgnored(); 3347 3348 if (!CGM.getCodeGenOpts().XRayInstrumentationBundle.has( 3349 XRayInstrKind::Custom)) 3350 return RValue::getIgnored(); 3351 3352 if (const auto *XRayAttr = CurFuncDecl->getAttr<XRayInstrumentAttr>()) 3353 if (XRayAttr->neverXRayInstrument() && !AlwaysEmitXRayCustomEvents()) 3354 return RValue::getIgnored(); 3355 3356 Function *F = CGM.getIntrinsic(Intrinsic::xray_customevent); 3357 auto FTy = F->getFunctionType(); 3358 auto Arg0 = E->getArg(0); 3359 auto Arg0Val = EmitScalarExpr(Arg0); 3360 auto Arg0Ty = Arg0->getType(); 3361 auto PTy0 = FTy->getParamType(0); 3362 if (PTy0 != Arg0Val->getType()) { 3363 if (Arg0Ty->isArrayType()) 3364 Arg0Val = EmitArrayToPointerDecay(Arg0).getPointer(); 3365 else 3366 Arg0Val = Builder.CreatePointerCast(Arg0Val, PTy0); 3367 } 3368 auto Arg1 = EmitScalarExpr(E->getArg(1)); 3369 auto PTy1 = FTy->getParamType(1); 3370 if (PTy1 != Arg1->getType()) 3371 Arg1 = Builder.CreateTruncOrBitCast(Arg1, PTy1); 3372 return RValue::get(Builder.CreateCall(F, {Arg0Val, Arg1})); 3373 } 3374 3375 case Builtin::BI__xray_typedevent: { 3376 // TODO: There should be a way to always emit events even if the current 3377 // function is not instrumented. Losing events in a stream can cripple 3378 // a trace. 3379 if (!ShouldXRayInstrumentFunction()) 3380 return RValue::getIgnored(); 3381 3382 if (!CGM.getCodeGenOpts().XRayInstrumentationBundle.has( 3383 XRayInstrKind::Typed)) 3384 return RValue::getIgnored(); 3385 3386 if (const auto *XRayAttr = CurFuncDecl->getAttr<XRayInstrumentAttr>()) 3387 if (XRayAttr->neverXRayInstrument() && !AlwaysEmitXRayTypedEvents()) 3388 return RValue::getIgnored(); 3389 3390 Function *F = CGM.getIntrinsic(Intrinsic::xray_typedevent); 3391 auto FTy = F->getFunctionType(); 3392 auto Arg0 = EmitScalarExpr(E->getArg(0)); 3393 auto PTy0 = FTy->getParamType(0); 3394 if (PTy0 != Arg0->getType()) 3395 Arg0 = Builder.CreateTruncOrBitCast(Arg0, PTy0); 3396 auto Arg1 = E->getArg(1); 3397 auto Arg1Val = EmitScalarExpr(Arg1); 3398 auto Arg1Ty = Arg1->getType(); 3399 auto PTy1 = FTy->getParamType(1); 3400 if (PTy1 != Arg1Val->getType()) { 3401 if (Arg1Ty->isArrayType()) 3402 Arg1Val = EmitArrayToPointerDecay(Arg1).getPointer(); 3403 else 3404 Arg1Val = Builder.CreatePointerCast(Arg1Val, PTy1); 3405 } 3406 auto Arg2 = EmitScalarExpr(E->getArg(2)); 3407 auto PTy2 = FTy->getParamType(2); 3408 if (PTy2 != Arg2->getType()) 3409 Arg2 = Builder.CreateTruncOrBitCast(Arg2, PTy2); 3410 return RValue::get(Builder.CreateCall(F, {Arg0, Arg1Val, Arg2})); 3411 } 3412 3413 case Builtin::BI__builtin_ms_va_start: 3414 case Builtin::BI__builtin_ms_va_end: 3415 return RValue::get( 3416 EmitVAStartEnd(EmitMSVAListRef(E->getArg(0)).getPointer(), 3417 BuiltinID == Builtin::BI__builtin_ms_va_start)); 3418 3419 case Builtin::BI__builtin_ms_va_copy: { 3420 // Lower this manually. We can't reliably determine whether or not any 3421 // given va_copy() is for a Win64 va_list from the calling convention 3422 // alone, because it's legal to do this from a System V ABI function. 3423 // With opaque pointer types, we won't have enough information in LLVM 3424 // IR to determine this from the argument types, either. Best to do it 3425 // now, while we have enough information. 3426 Address DestAddr = EmitMSVAListRef(E->getArg(0)); 3427 Address SrcAddr = EmitMSVAListRef(E->getArg(1)); 3428 3429 llvm::Type *BPP = Int8PtrPtrTy; 3430 3431 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), BPP, "cp"), 3432 DestAddr.getAlignment()); 3433 SrcAddr = Address(Builder.CreateBitCast(SrcAddr.getPointer(), BPP, "ap"), 3434 SrcAddr.getAlignment()); 3435 3436 Value *ArgPtr = Builder.CreateLoad(SrcAddr, "ap.val"); 3437 return RValue::get(Builder.CreateStore(ArgPtr, DestAddr)); 3438 } 3439 } 3440 3441 // If this is an alias for a lib function (e.g. __builtin_sin), emit 3442 // the call using the normal call path, but using the unmangled 3443 // version of the function name. 3444 if (getContext().BuiltinInfo.isLibFunction(BuiltinID)) 3445 return emitLibraryCall(*this, FD, E, 3446 CGM.getBuiltinLibFunction(FD, BuiltinID)); 3447 3448 // If this is a predefined lib function (e.g. malloc), emit the call 3449 // using exactly the normal call path. 3450 if (getContext().BuiltinInfo.isPredefinedLibFunction(BuiltinID)) 3451 return emitLibraryCall(*this, FD, E, 3452 cast<llvm::Constant>(EmitScalarExpr(E->getCallee()))); 3453 3454 // Check that a call to a target specific builtin has the correct target 3455 // features. 3456 // This is down here to avoid non-target specific builtins, however, if 3457 // generic builtins start to require generic target features then we 3458 // can move this up to the beginning of the function. 3459 checkTargetFeatures(E, FD); 3460 3461 // See if we have a target specific intrinsic. 3462 const char *Name = getContext().BuiltinInfo.getName(BuiltinID); 3463 Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; 3464 StringRef Prefix = 3465 llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch()); 3466 if (!Prefix.empty()) { 3467 IntrinsicID = Intrinsic::getIntrinsicForGCCBuiltin(Prefix.data(), Name); 3468 // NOTE we don't need to perform a compatibility flag check here since the 3469 // intrinsics are declared in Builtins*.def via LANGBUILTIN which filter the 3470 // MS builtins via ALL_MS_LANGUAGES and are filtered earlier. 3471 if (IntrinsicID == Intrinsic::not_intrinsic) 3472 IntrinsicID = Intrinsic::getIntrinsicForMSBuiltin(Prefix.data(), Name); 3473 } 3474 3475 if (IntrinsicID != Intrinsic::not_intrinsic) { 3476 SmallVector<Value*, 16> Args; 3477 3478 // Find out if any arguments are required to be integer constant 3479 // expressions. 3480 unsigned ICEArguments = 0; 3481 ASTContext::GetBuiltinTypeError Error; 3482 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 3483 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 3484 3485 Function *F = CGM.getIntrinsic(IntrinsicID); 3486 llvm::FunctionType *FTy = F->getFunctionType(); 3487 3488 for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) { 3489 Value *ArgValue; 3490 // If this is a normal argument, just emit it as a scalar. 3491 if ((ICEArguments & (1 << i)) == 0) { 3492 ArgValue = EmitScalarExpr(E->getArg(i)); 3493 } else { 3494 // If this is required to be a constant, constant fold it so that we 3495 // know that the generated intrinsic gets a ConstantInt. 3496 llvm::APSInt Result; 3497 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result,getContext()); 3498 assert(IsConst && "Constant arg isn't actually constant?"); 3499 (void)IsConst; 3500 ArgValue = llvm::ConstantInt::get(getLLVMContext(), Result); 3501 } 3502 3503 // If the intrinsic arg type is different from the builtin arg type 3504 // we need to do a bit cast. 3505 llvm::Type *PTy = FTy->getParamType(i); 3506 if (PTy != ArgValue->getType()) { 3507 assert(PTy->canLosslesslyBitCastTo(FTy->getParamType(i)) && 3508 "Must be able to losslessly bit cast to param"); 3509 ArgValue = Builder.CreateBitCast(ArgValue, PTy); 3510 } 3511 3512 Args.push_back(ArgValue); 3513 } 3514 3515 Value *V = Builder.CreateCall(F, Args); 3516 QualType BuiltinRetType = E->getType(); 3517 3518 llvm::Type *RetTy = VoidTy; 3519 if (!BuiltinRetType->isVoidType()) 3520 RetTy = ConvertType(BuiltinRetType); 3521 3522 if (RetTy != V->getType()) { 3523 assert(V->getType()->canLosslesslyBitCastTo(RetTy) && 3524 "Must be able to losslessly bit cast result type"); 3525 V = Builder.CreateBitCast(V, RetTy); 3526 } 3527 3528 return RValue::get(V); 3529 } 3530 3531 // See if we have a target specific builtin that needs to be lowered. 3532 if (Value *V = EmitTargetBuiltinExpr(BuiltinID, E)) 3533 return RValue::get(V); 3534 3535 ErrorUnsupported(E, "builtin function"); 3536 3537 // Unknown builtin, for now just dump it out and return undef. 3538 return GetUndefRValue(E->getType()); 3539 } 3540 3541 static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF, 3542 unsigned BuiltinID, const CallExpr *E, 3543 llvm::Triple::ArchType Arch) { 3544 switch (Arch) { 3545 case llvm::Triple::arm: 3546 case llvm::Triple::armeb: 3547 case llvm::Triple::thumb: 3548 case llvm::Triple::thumbeb: 3549 return CGF->EmitARMBuiltinExpr(BuiltinID, E, Arch); 3550 case llvm::Triple::aarch64: 3551 case llvm::Triple::aarch64_be: 3552 return CGF->EmitAArch64BuiltinExpr(BuiltinID, E, Arch); 3553 case llvm::Triple::x86: 3554 case llvm::Triple::x86_64: 3555 return CGF->EmitX86BuiltinExpr(BuiltinID, E); 3556 case llvm::Triple::ppc: 3557 case llvm::Triple::ppc64: 3558 case llvm::Triple::ppc64le: 3559 return CGF->EmitPPCBuiltinExpr(BuiltinID, E); 3560 case llvm::Triple::r600: 3561 case llvm::Triple::amdgcn: 3562 return CGF->EmitAMDGPUBuiltinExpr(BuiltinID, E); 3563 case llvm::Triple::systemz: 3564 return CGF->EmitSystemZBuiltinExpr(BuiltinID, E); 3565 case llvm::Triple::nvptx: 3566 case llvm::Triple::nvptx64: 3567 return CGF->EmitNVPTXBuiltinExpr(BuiltinID, E); 3568 case llvm::Triple::wasm32: 3569 case llvm::Triple::wasm64: 3570 return CGF->EmitWebAssemblyBuiltinExpr(BuiltinID, E); 3571 case llvm::Triple::hexagon: 3572 return CGF->EmitHexagonBuiltinExpr(BuiltinID, E); 3573 default: 3574 return nullptr; 3575 } 3576 } 3577 3578 Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID, 3579 const CallExpr *E) { 3580 if (getContext().BuiltinInfo.isAuxBuiltinID(BuiltinID)) { 3581 assert(getContext().getAuxTargetInfo() && "Missing aux target info"); 3582 return EmitTargetArchBuiltinExpr( 3583 this, getContext().BuiltinInfo.getAuxBuiltinID(BuiltinID), E, 3584 getContext().getAuxTargetInfo()->getTriple().getArch()); 3585 } 3586 3587 return EmitTargetArchBuiltinExpr(this, BuiltinID, E, 3588 getTarget().getTriple().getArch()); 3589 } 3590 3591 static llvm::VectorType *GetNeonType(CodeGenFunction *CGF, 3592 NeonTypeFlags TypeFlags, 3593 bool HasLegalHalfType=true, 3594 bool V1Ty=false) { 3595 int IsQuad = TypeFlags.isQuad(); 3596 switch (TypeFlags.getEltType()) { 3597 case NeonTypeFlags::Int8: 3598 case NeonTypeFlags::Poly8: 3599 return llvm::VectorType::get(CGF->Int8Ty, V1Ty ? 1 : (8 << IsQuad)); 3600 case NeonTypeFlags::Int16: 3601 case NeonTypeFlags::Poly16: 3602 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 3603 case NeonTypeFlags::Float16: 3604 if (HasLegalHalfType) 3605 return llvm::VectorType::get(CGF->HalfTy, V1Ty ? 1 : (4 << IsQuad)); 3606 else 3607 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 3608 case NeonTypeFlags::Int32: 3609 return llvm::VectorType::get(CGF->Int32Ty, V1Ty ? 1 : (2 << IsQuad)); 3610 case NeonTypeFlags::Int64: 3611 case NeonTypeFlags::Poly64: 3612 return llvm::VectorType::get(CGF->Int64Ty, V1Ty ? 1 : (1 << IsQuad)); 3613 case NeonTypeFlags::Poly128: 3614 // FIXME: i128 and f128 doesn't get fully support in Clang and llvm. 3615 // There is a lot of i128 and f128 API missing. 3616 // so we use v16i8 to represent poly128 and get pattern matched. 3617 return llvm::VectorType::get(CGF->Int8Ty, 16); 3618 case NeonTypeFlags::Float32: 3619 return llvm::VectorType::get(CGF->FloatTy, V1Ty ? 1 : (2 << IsQuad)); 3620 case NeonTypeFlags::Float64: 3621 return llvm::VectorType::get(CGF->DoubleTy, V1Ty ? 1 : (1 << IsQuad)); 3622 } 3623 llvm_unreachable("Unknown vector element type!"); 3624 } 3625 3626 static llvm::VectorType *GetFloatNeonType(CodeGenFunction *CGF, 3627 NeonTypeFlags IntTypeFlags) { 3628 int IsQuad = IntTypeFlags.isQuad(); 3629 switch (IntTypeFlags.getEltType()) { 3630 case NeonTypeFlags::Int16: 3631 return llvm::VectorType::get(CGF->HalfTy, (4 << IsQuad)); 3632 case NeonTypeFlags::Int32: 3633 return llvm::VectorType::get(CGF->FloatTy, (2 << IsQuad)); 3634 case NeonTypeFlags::Int64: 3635 return llvm::VectorType::get(CGF->DoubleTy, (1 << IsQuad)); 3636 default: 3637 llvm_unreachable("Type can't be converted to floating-point!"); 3638 } 3639 } 3640 3641 Value *CodeGenFunction::EmitNeonSplat(Value *V, Constant *C) { 3642 unsigned nElts = V->getType()->getVectorNumElements(); 3643 Value* SV = llvm::ConstantVector::getSplat(nElts, C); 3644 return Builder.CreateShuffleVector(V, V, SV, "lane"); 3645 } 3646 3647 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, 3648 const char *name, 3649 unsigned shift, bool rightshift) { 3650 unsigned j = 0; 3651 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 3652 ai != ae; ++ai, ++j) 3653 if (shift > 0 && shift == j) 3654 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); 3655 else 3656 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); 3657 3658 return Builder.CreateCall(F, Ops, name); 3659 } 3660 3661 Value *CodeGenFunction::EmitNeonShiftVector(Value *V, llvm::Type *Ty, 3662 bool neg) { 3663 int SV = cast<ConstantInt>(V)->getSExtValue(); 3664 return ConstantInt::get(Ty, neg ? -SV : SV); 3665 } 3666 3667 // \brief Right-shift a vector by a constant. 3668 Value *CodeGenFunction::EmitNeonRShiftImm(Value *Vec, Value *Shift, 3669 llvm::Type *Ty, bool usgn, 3670 const char *name) { 3671 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 3672 3673 int ShiftAmt = cast<ConstantInt>(Shift)->getSExtValue(); 3674 int EltSize = VTy->getScalarSizeInBits(); 3675 3676 Vec = Builder.CreateBitCast(Vec, Ty); 3677 3678 // lshr/ashr are undefined when the shift amount is equal to the vector 3679 // element size. 3680 if (ShiftAmt == EltSize) { 3681 if (usgn) { 3682 // Right-shifting an unsigned value by its size yields 0. 3683 return llvm::ConstantAggregateZero::get(VTy); 3684 } else { 3685 // Right-shifting a signed value by its size is equivalent 3686 // to a shift of size-1. 3687 --ShiftAmt; 3688 Shift = ConstantInt::get(VTy->getElementType(), ShiftAmt); 3689 } 3690 } 3691 3692 Shift = EmitNeonShiftVector(Shift, Ty, false); 3693 if (usgn) 3694 return Builder.CreateLShr(Vec, Shift, name); 3695 else 3696 return Builder.CreateAShr(Vec, Shift, name); 3697 } 3698 3699 enum { 3700 AddRetType = (1 << 0), 3701 Add1ArgType = (1 << 1), 3702 Add2ArgTypes = (1 << 2), 3703 3704 VectorizeRetType = (1 << 3), 3705 VectorizeArgTypes = (1 << 4), 3706 3707 InventFloatType = (1 << 5), 3708 UnsignedAlts = (1 << 6), 3709 3710 Use64BitVectors = (1 << 7), 3711 Use128BitVectors = (1 << 8), 3712 3713 Vectorize1ArgType = Add1ArgType | VectorizeArgTypes, 3714 VectorRet = AddRetType | VectorizeRetType, 3715 VectorRetGetArgs01 = 3716 AddRetType | Add2ArgTypes | VectorizeRetType | VectorizeArgTypes, 3717 FpCmpzModifiers = 3718 AddRetType | VectorizeRetType | Add1ArgType | InventFloatType 3719 }; 3720 3721 namespace { 3722 struct NeonIntrinsicInfo { 3723 const char *NameHint; 3724 unsigned BuiltinID; 3725 unsigned LLVMIntrinsic; 3726 unsigned AltLLVMIntrinsic; 3727 unsigned TypeModifier; 3728 3729 bool operator<(unsigned RHSBuiltinID) const { 3730 return BuiltinID < RHSBuiltinID; 3731 } 3732 bool operator<(const NeonIntrinsicInfo &TE) const { 3733 return BuiltinID < TE.BuiltinID; 3734 } 3735 }; 3736 } // end anonymous namespace 3737 3738 #define NEONMAP0(NameBase) \ 3739 { #NameBase, NEON::BI__builtin_neon_ ## NameBase, 0, 0, 0 } 3740 3741 #define NEONMAP1(NameBase, LLVMIntrinsic, TypeModifier) \ 3742 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 3743 Intrinsic::LLVMIntrinsic, 0, TypeModifier } 3744 3745 #define NEONMAP2(NameBase, LLVMIntrinsic, AltLLVMIntrinsic, TypeModifier) \ 3746 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 3747 Intrinsic::LLVMIntrinsic, Intrinsic::AltLLVMIntrinsic, \ 3748 TypeModifier } 3749 3750 static const NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = { 3751 NEONMAP2(vabd_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 3752 NEONMAP2(vabdq_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 3753 NEONMAP1(vabs_v, arm_neon_vabs, 0), 3754 NEONMAP1(vabsq_v, arm_neon_vabs, 0), 3755 NEONMAP0(vaddhn_v), 3756 NEONMAP1(vaesdq_v, arm_neon_aesd, 0), 3757 NEONMAP1(vaeseq_v, arm_neon_aese, 0), 3758 NEONMAP1(vaesimcq_v, arm_neon_aesimc, 0), 3759 NEONMAP1(vaesmcq_v, arm_neon_aesmc, 0), 3760 NEONMAP1(vbsl_v, arm_neon_vbsl, AddRetType), 3761 NEONMAP1(vbslq_v, arm_neon_vbsl, AddRetType), 3762 NEONMAP1(vcage_v, arm_neon_vacge, 0), 3763 NEONMAP1(vcageq_v, arm_neon_vacge, 0), 3764 NEONMAP1(vcagt_v, arm_neon_vacgt, 0), 3765 NEONMAP1(vcagtq_v, arm_neon_vacgt, 0), 3766 NEONMAP1(vcale_v, arm_neon_vacge, 0), 3767 NEONMAP1(vcaleq_v, arm_neon_vacge, 0), 3768 NEONMAP1(vcalt_v, arm_neon_vacgt, 0), 3769 NEONMAP1(vcaltq_v, arm_neon_vacgt, 0), 3770 NEONMAP0(vceqz_v), 3771 NEONMAP0(vceqzq_v), 3772 NEONMAP0(vcgez_v), 3773 NEONMAP0(vcgezq_v), 3774 NEONMAP0(vcgtz_v), 3775 NEONMAP0(vcgtzq_v), 3776 NEONMAP0(vclez_v), 3777 NEONMAP0(vclezq_v), 3778 NEONMAP1(vcls_v, arm_neon_vcls, Add1ArgType), 3779 NEONMAP1(vclsq_v, arm_neon_vcls, Add1ArgType), 3780 NEONMAP0(vcltz_v), 3781 NEONMAP0(vcltzq_v), 3782 NEONMAP1(vclz_v, ctlz, Add1ArgType), 3783 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 3784 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 3785 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 3786 NEONMAP1(vcvt_f16_f32, arm_neon_vcvtfp2hf, 0), 3787 NEONMAP0(vcvt_f16_v), 3788 NEONMAP1(vcvt_f32_f16, arm_neon_vcvthf2fp, 0), 3789 NEONMAP0(vcvt_f32_v), 3790 NEONMAP2(vcvt_n_f16_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3791 NEONMAP2(vcvt_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3792 NEONMAP1(vcvt_n_s16_v, arm_neon_vcvtfp2fxs, 0), 3793 NEONMAP1(vcvt_n_s32_v, arm_neon_vcvtfp2fxs, 0), 3794 NEONMAP1(vcvt_n_s64_v, arm_neon_vcvtfp2fxs, 0), 3795 NEONMAP1(vcvt_n_u16_v, arm_neon_vcvtfp2fxu, 0), 3796 NEONMAP1(vcvt_n_u32_v, arm_neon_vcvtfp2fxu, 0), 3797 NEONMAP1(vcvt_n_u64_v, arm_neon_vcvtfp2fxu, 0), 3798 NEONMAP0(vcvt_s16_v), 3799 NEONMAP0(vcvt_s32_v), 3800 NEONMAP0(vcvt_s64_v), 3801 NEONMAP0(vcvt_u16_v), 3802 NEONMAP0(vcvt_u32_v), 3803 NEONMAP0(vcvt_u64_v), 3804 NEONMAP1(vcvta_s16_v, arm_neon_vcvtas, 0), 3805 NEONMAP1(vcvta_s32_v, arm_neon_vcvtas, 0), 3806 NEONMAP1(vcvta_s64_v, arm_neon_vcvtas, 0), 3807 NEONMAP1(vcvta_u32_v, arm_neon_vcvtau, 0), 3808 NEONMAP1(vcvta_u64_v, arm_neon_vcvtau, 0), 3809 NEONMAP1(vcvtaq_s16_v, arm_neon_vcvtas, 0), 3810 NEONMAP1(vcvtaq_s32_v, arm_neon_vcvtas, 0), 3811 NEONMAP1(vcvtaq_s64_v, arm_neon_vcvtas, 0), 3812 NEONMAP1(vcvtaq_u16_v, arm_neon_vcvtau, 0), 3813 NEONMAP1(vcvtaq_u32_v, arm_neon_vcvtau, 0), 3814 NEONMAP1(vcvtaq_u64_v, arm_neon_vcvtau, 0), 3815 NEONMAP1(vcvtm_s16_v, arm_neon_vcvtms, 0), 3816 NEONMAP1(vcvtm_s32_v, arm_neon_vcvtms, 0), 3817 NEONMAP1(vcvtm_s64_v, arm_neon_vcvtms, 0), 3818 NEONMAP1(vcvtm_u16_v, arm_neon_vcvtmu, 0), 3819 NEONMAP1(vcvtm_u32_v, arm_neon_vcvtmu, 0), 3820 NEONMAP1(vcvtm_u64_v, arm_neon_vcvtmu, 0), 3821 NEONMAP1(vcvtmq_s16_v, arm_neon_vcvtms, 0), 3822 NEONMAP1(vcvtmq_s32_v, arm_neon_vcvtms, 0), 3823 NEONMAP1(vcvtmq_s64_v, arm_neon_vcvtms, 0), 3824 NEONMAP1(vcvtmq_u16_v, arm_neon_vcvtmu, 0), 3825 NEONMAP1(vcvtmq_u32_v, arm_neon_vcvtmu, 0), 3826 NEONMAP1(vcvtmq_u64_v, arm_neon_vcvtmu, 0), 3827 NEONMAP1(vcvtn_s16_v, arm_neon_vcvtns, 0), 3828 NEONMAP1(vcvtn_s32_v, arm_neon_vcvtns, 0), 3829 NEONMAP1(vcvtn_s64_v, arm_neon_vcvtns, 0), 3830 NEONMAP1(vcvtn_u16_v, arm_neon_vcvtnu, 0), 3831 NEONMAP1(vcvtn_u32_v, arm_neon_vcvtnu, 0), 3832 NEONMAP1(vcvtn_u64_v, arm_neon_vcvtnu, 0), 3833 NEONMAP1(vcvtnq_s16_v, arm_neon_vcvtns, 0), 3834 NEONMAP1(vcvtnq_s32_v, arm_neon_vcvtns, 0), 3835 NEONMAP1(vcvtnq_s64_v, arm_neon_vcvtns, 0), 3836 NEONMAP1(vcvtnq_u16_v, arm_neon_vcvtnu, 0), 3837 NEONMAP1(vcvtnq_u32_v, arm_neon_vcvtnu, 0), 3838 NEONMAP1(vcvtnq_u64_v, arm_neon_vcvtnu, 0), 3839 NEONMAP1(vcvtp_s16_v, arm_neon_vcvtps, 0), 3840 NEONMAP1(vcvtp_s32_v, arm_neon_vcvtps, 0), 3841 NEONMAP1(vcvtp_s64_v, arm_neon_vcvtps, 0), 3842 NEONMAP1(vcvtp_u16_v, arm_neon_vcvtpu, 0), 3843 NEONMAP1(vcvtp_u32_v, arm_neon_vcvtpu, 0), 3844 NEONMAP1(vcvtp_u64_v, arm_neon_vcvtpu, 0), 3845 NEONMAP1(vcvtpq_s16_v, arm_neon_vcvtps, 0), 3846 NEONMAP1(vcvtpq_s32_v, arm_neon_vcvtps, 0), 3847 NEONMAP1(vcvtpq_s64_v, arm_neon_vcvtps, 0), 3848 NEONMAP1(vcvtpq_u16_v, arm_neon_vcvtpu, 0), 3849 NEONMAP1(vcvtpq_u32_v, arm_neon_vcvtpu, 0), 3850 NEONMAP1(vcvtpq_u64_v, arm_neon_vcvtpu, 0), 3851 NEONMAP0(vcvtq_f16_v), 3852 NEONMAP0(vcvtq_f32_v), 3853 NEONMAP2(vcvtq_n_f16_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3854 NEONMAP2(vcvtq_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3855 NEONMAP1(vcvtq_n_s16_v, arm_neon_vcvtfp2fxs, 0), 3856 NEONMAP1(vcvtq_n_s32_v, arm_neon_vcvtfp2fxs, 0), 3857 NEONMAP1(vcvtq_n_s64_v, arm_neon_vcvtfp2fxs, 0), 3858 NEONMAP1(vcvtq_n_u16_v, arm_neon_vcvtfp2fxu, 0), 3859 NEONMAP1(vcvtq_n_u32_v, arm_neon_vcvtfp2fxu, 0), 3860 NEONMAP1(vcvtq_n_u64_v, arm_neon_vcvtfp2fxu, 0), 3861 NEONMAP0(vcvtq_s16_v), 3862 NEONMAP0(vcvtq_s32_v), 3863 NEONMAP0(vcvtq_s64_v), 3864 NEONMAP0(vcvtq_u16_v), 3865 NEONMAP0(vcvtq_u32_v), 3866 NEONMAP0(vcvtq_u64_v), 3867 NEONMAP0(vext_v), 3868 NEONMAP0(vextq_v), 3869 NEONMAP0(vfma_v), 3870 NEONMAP0(vfmaq_v), 3871 NEONMAP2(vhadd_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 3872 NEONMAP2(vhaddq_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 3873 NEONMAP2(vhsub_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 3874 NEONMAP2(vhsubq_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 3875 NEONMAP0(vld1_dup_v), 3876 NEONMAP1(vld1_v, arm_neon_vld1, 0), 3877 NEONMAP0(vld1q_dup_v), 3878 NEONMAP1(vld1q_v, arm_neon_vld1, 0), 3879 NEONMAP1(vld2_lane_v, arm_neon_vld2lane, 0), 3880 NEONMAP1(vld2_v, arm_neon_vld2, 0), 3881 NEONMAP1(vld2q_lane_v, arm_neon_vld2lane, 0), 3882 NEONMAP1(vld2q_v, arm_neon_vld2, 0), 3883 NEONMAP1(vld3_lane_v, arm_neon_vld3lane, 0), 3884 NEONMAP1(vld3_v, arm_neon_vld3, 0), 3885 NEONMAP1(vld3q_lane_v, arm_neon_vld3lane, 0), 3886 NEONMAP1(vld3q_v, arm_neon_vld3, 0), 3887 NEONMAP1(vld4_lane_v, arm_neon_vld4lane, 0), 3888 NEONMAP1(vld4_v, arm_neon_vld4, 0), 3889 NEONMAP1(vld4q_lane_v, arm_neon_vld4lane, 0), 3890 NEONMAP1(vld4q_v, arm_neon_vld4, 0), 3891 NEONMAP2(vmax_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 3892 NEONMAP1(vmaxnm_v, arm_neon_vmaxnm, Add1ArgType), 3893 NEONMAP1(vmaxnmq_v, arm_neon_vmaxnm, Add1ArgType), 3894 NEONMAP2(vmaxq_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 3895 NEONMAP2(vmin_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 3896 NEONMAP1(vminnm_v, arm_neon_vminnm, Add1ArgType), 3897 NEONMAP1(vminnmq_v, arm_neon_vminnm, Add1ArgType), 3898 NEONMAP2(vminq_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 3899 NEONMAP0(vmovl_v), 3900 NEONMAP0(vmovn_v), 3901 NEONMAP1(vmul_v, arm_neon_vmulp, Add1ArgType), 3902 NEONMAP0(vmull_v), 3903 NEONMAP1(vmulq_v, arm_neon_vmulp, Add1ArgType), 3904 NEONMAP2(vpadal_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 3905 NEONMAP2(vpadalq_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 3906 NEONMAP1(vpadd_v, arm_neon_vpadd, Add1ArgType), 3907 NEONMAP2(vpaddl_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 3908 NEONMAP2(vpaddlq_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 3909 NEONMAP1(vpaddq_v, arm_neon_vpadd, Add1ArgType), 3910 NEONMAP2(vpmax_v, arm_neon_vpmaxu, arm_neon_vpmaxs, Add1ArgType | UnsignedAlts), 3911 NEONMAP2(vpmin_v, arm_neon_vpminu, arm_neon_vpmins, Add1ArgType | UnsignedAlts), 3912 NEONMAP1(vqabs_v, arm_neon_vqabs, Add1ArgType), 3913 NEONMAP1(vqabsq_v, arm_neon_vqabs, Add1ArgType), 3914 NEONMAP2(vqadd_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 3915 NEONMAP2(vqaddq_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 3916 NEONMAP2(vqdmlal_v, arm_neon_vqdmull, arm_neon_vqadds, 0), 3917 NEONMAP2(vqdmlsl_v, arm_neon_vqdmull, arm_neon_vqsubs, 0), 3918 NEONMAP1(vqdmulh_v, arm_neon_vqdmulh, Add1ArgType), 3919 NEONMAP1(vqdmulhq_v, arm_neon_vqdmulh, Add1ArgType), 3920 NEONMAP1(vqdmull_v, arm_neon_vqdmull, Add1ArgType), 3921 NEONMAP2(vqmovn_v, arm_neon_vqmovnu, arm_neon_vqmovns, Add1ArgType | UnsignedAlts), 3922 NEONMAP1(vqmovun_v, arm_neon_vqmovnsu, Add1ArgType), 3923 NEONMAP1(vqneg_v, arm_neon_vqneg, Add1ArgType), 3924 NEONMAP1(vqnegq_v, arm_neon_vqneg, Add1ArgType), 3925 NEONMAP1(vqrdmulh_v, arm_neon_vqrdmulh, Add1ArgType), 3926 NEONMAP1(vqrdmulhq_v, arm_neon_vqrdmulh, Add1ArgType), 3927 NEONMAP2(vqrshl_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 3928 NEONMAP2(vqrshlq_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 3929 NEONMAP2(vqshl_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 3930 NEONMAP2(vqshl_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 3931 NEONMAP2(vqshlq_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 3932 NEONMAP2(vqshlq_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 3933 NEONMAP1(vqshlu_n_v, arm_neon_vqshiftsu, 0), 3934 NEONMAP1(vqshluq_n_v, arm_neon_vqshiftsu, 0), 3935 NEONMAP2(vqsub_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 3936 NEONMAP2(vqsubq_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 3937 NEONMAP1(vraddhn_v, arm_neon_vraddhn, Add1ArgType), 3938 NEONMAP2(vrecpe_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 3939 NEONMAP2(vrecpeq_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 3940 NEONMAP1(vrecps_v, arm_neon_vrecps, Add1ArgType), 3941 NEONMAP1(vrecpsq_v, arm_neon_vrecps, Add1ArgType), 3942 NEONMAP2(vrhadd_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 3943 NEONMAP2(vrhaddq_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 3944 NEONMAP1(vrnd_v, arm_neon_vrintz, Add1ArgType), 3945 NEONMAP1(vrnda_v, arm_neon_vrinta, Add1ArgType), 3946 NEONMAP1(vrndaq_v, arm_neon_vrinta, Add1ArgType), 3947 NEONMAP1(vrndm_v, arm_neon_vrintm, Add1ArgType), 3948 NEONMAP1(vrndmq_v, arm_neon_vrintm, Add1ArgType), 3949 NEONMAP1(vrndn_v, arm_neon_vrintn, Add1ArgType), 3950 NEONMAP1(vrndnq_v, arm_neon_vrintn, Add1ArgType), 3951 NEONMAP1(vrndp_v, arm_neon_vrintp, Add1ArgType), 3952 NEONMAP1(vrndpq_v, arm_neon_vrintp, Add1ArgType), 3953 NEONMAP1(vrndq_v, arm_neon_vrintz, Add1ArgType), 3954 NEONMAP1(vrndx_v, arm_neon_vrintx, Add1ArgType), 3955 NEONMAP1(vrndxq_v, arm_neon_vrintx, Add1ArgType), 3956 NEONMAP2(vrshl_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 3957 NEONMAP2(vrshlq_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 3958 NEONMAP2(vrshr_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 3959 NEONMAP2(vrshrq_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 3960 NEONMAP2(vrsqrte_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 3961 NEONMAP2(vrsqrteq_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 3962 NEONMAP1(vrsqrts_v, arm_neon_vrsqrts, Add1ArgType), 3963 NEONMAP1(vrsqrtsq_v, arm_neon_vrsqrts, Add1ArgType), 3964 NEONMAP1(vrsubhn_v, arm_neon_vrsubhn, Add1ArgType), 3965 NEONMAP1(vsha1su0q_v, arm_neon_sha1su0, 0), 3966 NEONMAP1(vsha1su1q_v, arm_neon_sha1su1, 0), 3967 NEONMAP1(vsha256h2q_v, arm_neon_sha256h2, 0), 3968 NEONMAP1(vsha256hq_v, arm_neon_sha256h, 0), 3969 NEONMAP1(vsha256su0q_v, arm_neon_sha256su0, 0), 3970 NEONMAP1(vsha256su1q_v, arm_neon_sha256su1, 0), 3971 NEONMAP0(vshl_n_v), 3972 NEONMAP2(vshl_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 3973 NEONMAP0(vshll_n_v), 3974 NEONMAP0(vshlq_n_v), 3975 NEONMAP2(vshlq_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 3976 NEONMAP0(vshr_n_v), 3977 NEONMAP0(vshrn_n_v), 3978 NEONMAP0(vshrq_n_v), 3979 NEONMAP1(vst1_v, arm_neon_vst1, 0), 3980 NEONMAP1(vst1q_v, arm_neon_vst1, 0), 3981 NEONMAP1(vst2_lane_v, arm_neon_vst2lane, 0), 3982 NEONMAP1(vst2_v, arm_neon_vst2, 0), 3983 NEONMAP1(vst2q_lane_v, arm_neon_vst2lane, 0), 3984 NEONMAP1(vst2q_v, arm_neon_vst2, 0), 3985 NEONMAP1(vst3_lane_v, arm_neon_vst3lane, 0), 3986 NEONMAP1(vst3_v, arm_neon_vst3, 0), 3987 NEONMAP1(vst3q_lane_v, arm_neon_vst3lane, 0), 3988 NEONMAP1(vst3q_v, arm_neon_vst3, 0), 3989 NEONMAP1(vst4_lane_v, arm_neon_vst4lane, 0), 3990 NEONMAP1(vst4_v, arm_neon_vst4, 0), 3991 NEONMAP1(vst4q_lane_v, arm_neon_vst4lane, 0), 3992 NEONMAP1(vst4q_v, arm_neon_vst4, 0), 3993 NEONMAP0(vsubhn_v), 3994 NEONMAP0(vtrn_v), 3995 NEONMAP0(vtrnq_v), 3996 NEONMAP0(vtst_v), 3997 NEONMAP0(vtstq_v), 3998 NEONMAP0(vuzp_v), 3999 NEONMAP0(vuzpq_v), 4000 NEONMAP0(vzip_v), 4001 NEONMAP0(vzipq_v) 4002 }; 4003 4004 static const NeonIntrinsicInfo AArch64SIMDIntrinsicMap[] = { 4005 NEONMAP1(vabs_v, aarch64_neon_abs, 0), 4006 NEONMAP1(vabsq_v, aarch64_neon_abs, 0), 4007 NEONMAP0(vaddhn_v), 4008 NEONMAP1(vaesdq_v, aarch64_crypto_aesd, 0), 4009 NEONMAP1(vaeseq_v, aarch64_crypto_aese, 0), 4010 NEONMAP1(vaesimcq_v, aarch64_crypto_aesimc, 0), 4011 NEONMAP1(vaesmcq_v, aarch64_crypto_aesmc, 0), 4012 NEONMAP1(vcage_v, aarch64_neon_facge, 0), 4013 NEONMAP1(vcageq_v, aarch64_neon_facge, 0), 4014 NEONMAP1(vcagt_v, aarch64_neon_facgt, 0), 4015 NEONMAP1(vcagtq_v, aarch64_neon_facgt, 0), 4016 NEONMAP1(vcale_v, aarch64_neon_facge, 0), 4017 NEONMAP1(vcaleq_v, aarch64_neon_facge, 0), 4018 NEONMAP1(vcalt_v, aarch64_neon_facgt, 0), 4019 NEONMAP1(vcaltq_v, aarch64_neon_facgt, 0), 4020 NEONMAP0(vceqz_v), 4021 NEONMAP0(vceqzq_v), 4022 NEONMAP0(vcgez_v), 4023 NEONMAP0(vcgezq_v), 4024 NEONMAP0(vcgtz_v), 4025 NEONMAP0(vcgtzq_v), 4026 NEONMAP0(vclez_v), 4027 NEONMAP0(vclezq_v), 4028 NEONMAP1(vcls_v, aarch64_neon_cls, Add1ArgType), 4029 NEONMAP1(vclsq_v, aarch64_neon_cls, Add1ArgType), 4030 NEONMAP0(vcltz_v), 4031 NEONMAP0(vcltzq_v), 4032 NEONMAP1(vclz_v, ctlz, Add1ArgType), 4033 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 4034 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 4035 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 4036 NEONMAP1(vcvt_f16_f32, aarch64_neon_vcvtfp2hf, 0), 4037 NEONMAP0(vcvt_f16_v), 4038 NEONMAP1(vcvt_f32_f16, aarch64_neon_vcvthf2fp, 0), 4039 NEONMAP0(vcvt_f32_v), 4040 NEONMAP2(vcvt_n_f16_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4041 NEONMAP2(vcvt_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4042 NEONMAP2(vcvt_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4043 NEONMAP1(vcvt_n_s16_v, aarch64_neon_vcvtfp2fxs, 0), 4044 NEONMAP1(vcvt_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 4045 NEONMAP1(vcvt_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 4046 NEONMAP1(vcvt_n_u16_v, aarch64_neon_vcvtfp2fxu, 0), 4047 NEONMAP1(vcvt_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 4048 NEONMAP1(vcvt_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 4049 NEONMAP0(vcvtq_f16_v), 4050 NEONMAP0(vcvtq_f32_v), 4051 NEONMAP2(vcvtq_n_f16_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4052 NEONMAP2(vcvtq_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4053 NEONMAP2(vcvtq_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4054 NEONMAP1(vcvtq_n_s16_v, aarch64_neon_vcvtfp2fxs, 0), 4055 NEONMAP1(vcvtq_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 4056 NEONMAP1(vcvtq_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 4057 NEONMAP1(vcvtq_n_u16_v, aarch64_neon_vcvtfp2fxu, 0), 4058 NEONMAP1(vcvtq_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 4059 NEONMAP1(vcvtq_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 4060 NEONMAP1(vcvtx_f32_v, aarch64_neon_fcvtxn, AddRetType | Add1ArgType), 4061 NEONMAP0(vext_v), 4062 NEONMAP0(vextq_v), 4063 NEONMAP0(vfma_v), 4064 NEONMAP0(vfmaq_v), 4065 NEONMAP2(vhadd_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 4066 NEONMAP2(vhaddq_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 4067 NEONMAP2(vhsub_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 4068 NEONMAP2(vhsubq_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 4069 NEONMAP0(vmovl_v), 4070 NEONMAP0(vmovn_v), 4071 NEONMAP1(vmul_v, aarch64_neon_pmul, Add1ArgType), 4072 NEONMAP1(vmulq_v, aarch64_neon_pmul, Add1ArgType), 4073 NEONMAP1(vpadd_v, aarch64_neon_addp, Add1ArgType), 4074 NEONMAP2(vpaddl_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 4075 NEONMAP2(vpaddlq_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 4076 NEONMAP1(vpaddq_v, aarch64_neon_addp, Add1ArgType), 4077 NEONMAP1(vqabs_v, aarch64_neon_sqabs, Add1ArgType), 4078 NEONMAP1(vqabsq_v, aarch64_neon_sqabs, Add1ArgType), 4079 NEONMAP2(vqadd_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 4080 NEONMAP2(vqaddq_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 4081 NEONMAP2(vqdmlal_v, aarch64_neon_sqdmull, aarch64_neon_sqadd, 0), 4082 NEONMAP2(vqdmlsl_v, aarch64_neon_sqdmull, aarch64_neon_sqsub, 0), 4083 NEONMAP1(vqdmulh_v, aarch64_neon_sqdmulh, Add1ArgType), 4084 NEONMAP1(vqdmulhq_v, aarch64_neon_sqdmulh, Add1ArgType), 4085 NEONMAP1(vqdmull_v, aarch64_neon_sqdmull, Add1ArgType), 4086 NEONMAP2(vqmovn_v, aarch64_neon_uqxtn, aarch64_neon_sqxtn, Add1ArgType | UnsignedAlts), 4087 NEONMAP1(vqmovun_v, aarch64_neon_sqxtun, Add1ArgType), 4088 NEONMAP1(vqneg_v, aarch64_neon_sqneg, Add1ArgType), 4089 NEONMAP1(vqnegq_v, aarch64_neon_sqneg, Add1ArgType), 4090 NEONMAP1(vqrdmulh_v, aarch64_neon_sqrdmulh, Add1ArgType), 4091 NEONMAP1(vqrdmulhq_v, aarch64_neon_sqrdmulh, Add1ArgType), 4092 NEONMAP2(vqrshl_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 4093 NEONMAP2(vqrshlq_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 4094 NEONMAP2(vqshl_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl, UnsignedAlts), 4095 NEONMAP2(vqshl_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 4096 NEONMAP2(vqshlq_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl,UnsignedAlts), 4097 NEONMAP2(vqshlq_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 4098 NEONMAP1(vqshlu_n_v, aarch64_neon_sqshlu, 0), 4099 NEONMAP1(vqshluq_n_v, aarch64_neon_sqshlu, 0), 4100 NEONMAP2(vqsub_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 4101 NEONMAP2(vqsubq_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 4102 NEONMAP1(vraddhn_v, aarch64_neon_raddhn, Add1ArgType), 4103 NEONMAP2(vrecpe_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 4104 NEONMAP2(vrecpeq_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 4105 NEONMAP1(vrecps_v, aarch64_neon_frecps, Add1ArgType), 4106 NEONMAP1(vrecpsq_v, aarch64_neon_frecps, Add1ArgType), 4107 NEONMAP2(vrhadd_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 4108 NEONMAP2(vrhaddq_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 4109 NEONMAP2(vrshl_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 4110 NEONMAP2(vrshlq_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 4111 NEONMAP2(vrshr_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 4112 NEONMAP2(vrshrq_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 4113 NEONMAP2(vrsqrte_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 4114 NEONMAP2(vrsqrteq_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 4115 NEONMAP1(vrsqrts_v, aarch64_neon_frsqrts, Add1ArgType), 4116 NEONMAP1(vrsqrtsq_v, aarch64_neon_frsqrts, Add1ArgType), 4117 NEONMAP1(vrsubhn_v, aarch64_neon_rsubhn, Add1ArgType), 4118 NEONMAP1(vsha1su0q_v, aarch64_crypto_sha1su0, 0), 4119 NEONMAP1(vsha1su1q_v, aarch64_crypto_sha1su1, 0), 4120 NEONMAP1(vsha256h2q_v, aarch64_crypto_sha256h2, 0), 4121 NEONMAP1(vsha256hq_v, aarch64_crypto_sha256h, 0), 4122 NEONMAP1(vsha256su0q_v, aarch64_crypto_sha256su0, 0), 4123 NEONMAP1(vsha256su1q_v, aarch64_crypto_sha256su1, 0), 4124 NEONMAP0(vshl_n_v), 4125 NEONMAP2(vshl_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 4126 NEONMAP0(vshll_n_v), 4127 NEONMAP0(vshlq_n_v), 4128 NEONMAP2(vshlq_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 4129 NEONMAP0(vshr_n_v), 4130 NEONMAP0(vshrn_n_v), 4131 NEONMAP0(vshrq_n_v), 4132 NEONMAP0(vsubhn_v), 4133 NEONMAP0(vtst_v), 4134 NEONMAP0(vtstq_v), 4135 }; 4136 4137 static const NeonIntrinsicInfo AArch64SISDIntrinsicMap[] = { 4138 NEONMAP1(vabdd_f64, aarch64_sisd_fabd, Add1ArgType), 4139 NEONMAP1(vabds_f32, aarch64_sisd_fabd, Add1ArgType), 4140 NEONMAP1(vabsd_s64, aarch64_neon_abs, Add1ArgType), 4141 NEONMAP1(vaddlv_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 4142 NEONMAP1(vaddlv_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 4143 NEONMAP1(vaddlvq_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 4144 NEONMAP1(vaddlvq_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 4145 NEONMAP1(vaddv_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 4146 NEONMAP1(vaddv_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 4147 NEONMAP1(vaddv_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4148 NEONMAP1(vaddvq_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 4149 NEONMAP1(vaddvq_f64, aarch64_neon_faddv, AddRetType | Add1ArgType), 4150 NEONMAP1(vaddvq_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 4151 NEONMAP1(vaddvq_s64, aarch64_neon_saddv, AddRetType | Add1ArgType), 4152 NEONMAP1(vaddvq_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4153 NEONMAP1(vaddvq_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4154 NEONMAP1(vcaged_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 4155 NEONMAP1(vcages_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 4156 NEONMAP1(vcagtd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 4157 NEONMAP1(vcagts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 4158 NEONMAP1(vcaled_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 4159 NEONMAP1(vcales_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 4160 NEONMAP1(vcaltd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 4161 NEONMAP1(vcalts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 4162 NEONMAP1(vcvtad_s64_f64, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 4163 NEONMAP1(vcvtad_u64_f64, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 4164 NEONMAP1(vcvtas_s32_f32, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 4165 NEONMAP1(vcvtas_u32_f32, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 4166 NEONMAP1(vcvtd_n_f64_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 4167 NEONMAP1(vcvtd_n_f64_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 4168 NEONMAP1(vcvtd_n_s64_f64, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 4169 NEONMAP1(vcvtd_n_u64_f64, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 4170 NEONMAP1(vcvtmd_s64_f64, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 4171 NEONMAP1(vcvtmd_u64_f64, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 4172 NEONMAP1(vcvtms_s32_f32, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 4173 NEONMAP1(vcvtms_u32_f32, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 4174 NEONMAP1(vcvtnd_s64_f64, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 4175 NEONMAP1(vcvtnd_u64_f64, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 4176 NEONMAP1(vcvtns_s32_f32, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 4177 NEONMAP1(vcvtns_u32_f32, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 4178 NEONMAP1(vcvtpd_s64_f64, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 4179 NEONMAP1(vcvtpd_u64_f64, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 4180 NEONMAP1(vcvtps_s32_f32, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 4181 NEONMAP1(vcvtps_u32_f32, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 4182 NEONMAP1(vcvts_n_f32_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 4183 NEONMAP1(vcvts_n_f32_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 4184 NEONMAP1(vcvts_n_s32_f32, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 4185 NEONMAP1(vcvts_n_u32_f32, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 4186 NEONMAP1(vcvtxd_f32_f64, aarch64_sisd_fcvtxn, 0), 4187 NEONMAP1(vmaxnmv_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4188 NEONMAP1(vmaxnmvq_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4189 NEONMAP1(vmaxnmvq_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4190 NEONMAP1(vmaxv_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4191 NEONMAP1(vmaxv_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 4192 NEONMAP1(vmaxv_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 4193 NEONMAP1(vmaxvq_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4194 NEONMAP1(vmaxvq_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4195 NEONMAP1(vmaxvq_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 4196 NEONMAP1(vmaxvq_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 4197 NEONMAP1(vminnmv_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4198 NEONMAP1(vminnmvq_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4199 NEONMAP1(vminnmvq_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4200 NEONMAP1(vminv_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 4201 NEONMAP1(vminv_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 4202 NEONMAP1(vminv_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 4203 NEONMAP1(vminvq_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 4204 NEONMAP1(vminvq_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 4205 NEONMAP1(vminvq_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 4206 NEONMAP1(vminvq_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 4207 NEONMAP1(vmull_p64, aarch64_neon_pmull64, 0), 4208 NEONMAP1(vmulxd_f64, aarch64_neon_fmulx, Add1ArgType), 4209 NEONMAP1(vmulxs_f32, aarch64_neon_fmulx, Add1ArgType), 4210 NEONMAP1(vpaddd_s64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4211 NEONMAP1(vpaddd_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4212 NEONMAP1(vpmaxnmqd_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4213 NEONMAP1(vpmaxnms_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4214 NEONMAP1(vpmaxqd_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4215 NEONMAP1(vpmaxs_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4216 NEONMAP1(vpminnmqd_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4217 NEONMAP1(vpminnms_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4218 NEONMAP1(vpminqd_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 4219 NEONMAP1(vpmins_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 4220 NEONMAP1(vqabsb_s8, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 4221 NEONMAP1(vqabsd_s64, aarch64_neon_sqabs, Add1ArgType), 4222 NEONMAP1(vqabsh_s16, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 4223 NEONMAP1(vqabss_s32, aarch64_neon_sqabs, Add1ArgType), 4224 NEONMAP1(vqaddb_s8, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 4225 NEONMAP1(vqaddb_u8, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 4226 NEONMAP1(vqaddd_s64, aarch64_neon_sqadd, Add1ArgType), 4227 NEONMAP1(vqaddd_u64, aarch64_neon_uqadd, Add1ArgType), 4228 NEONMAP1(vqaddh_s16, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 4229 NEONMAP1(vqaddh_u16, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 4230 NEONMAP1(vqadds_s32, aarch64_neon_sqadd, Add1ArgType), 4231 NEONMAP1(vqadds_u32, aarch64_neon_uqadd, Add1ArgType), 4232 NEONMAP1(vqdmulhh_s16, aarch64_neon_sqdmulh, Vectorize1ArgType | Use64BitVectors), 4233 NEONMAP1(vqdmulhs_s32, aarch64_neon_sqdmulh, Add1ArgType), 4234 NEONMAP1(vqdmullh_s16, aarch64_neon_sqdmull, VectorRet | Use128BitVectors), 4235 NEONMAP1(vqdmulls_s32, aarch64_neon_sqdmulls_scalar, 0), 4236 NEONMAP1(vqmovnd_s64, aarch64_neon_scalar_sqxtn, AddRetType | Add1ArgType), 4237 NEONMAP1(vqmovnd_u64, aarch64_neon_scalar_uqxtn, AddRetType | Add1ArgType), 4238 NEONMAP1(vqmovnh_s16, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 4239 NEONMAP1(vqmovnh_u16, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 4240 NEONMAP1(vqmovns_s32, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 4241 NEONMAP1(vqmovns_u32, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 4242 NEONMAP1(vqmovund_s64, aarch64_neon_scalar_sqxtun, AddRetType | Add1ArgType), 4243 NEONMAP1(vqmovunh_s16, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 4244 NEONMAP1(vqmovuns_s32, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 4245 NEONMAP1(vqnegb_s8, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 4246 NEONMAP1(vqnegd_s64, aarch64_neon_sqneg, Add1ArgType), 4247 NEONMAP1(vqnegh_s16, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 4248 NEONMAP1(vqnegs_s32, aarch64_neon_sqneg, Add1ArgType), 4249 NEONMAP1(vqrdmulhh_s16, aarch64_neon_sqrdmulh, Vectorize1ArgType | Use64BitVectors), 4250 NEONMAP1(vqrdmulhs_s32, aarch64_neon_sqrdmulh, Add1ArgType), 4251 NEONMAP1(vqrshlb_s8, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 4252 NEONMAP1(vqrshlb_u8, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 4253 NEONMAP1(vqrshld_s64, aarch64_neon_sqrshl, Add1ArgType), 4254 NEONMAP1(vqrshld_u64, aarch64_neon_uqrshl, Add1ArgType), 4255 NEONMAP1(vqrshlh_s16, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 4256 NEONMAP1(vqrshlh_u16, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 4257 NEONMAP1(vqrshls_s32, aarch64_neon_sqrshl, Add1ArgType), 4258 NEONMAP1(vqrshls_u32, aarch64_neon_uqrshl, Add1ArgType), 4259 NEONMAP1(vqrshrnd_n_s64, aarch64_neon_sqrshrn, AddRetType), 4260 NEONMAP1(vqrshrnd_n_u64, aarch64_neon_uqrshrn, AddRetType), 4261 NEONMAP1(vqrshrnh_n_s16, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 4262 NEONMAP1(vqrshrnh_n_u16, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 4263 NEONMAP1(vqrshrns_n_s32, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 4264 NEONMAP1(vqrshrns_n_u32, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 4265 NEONMAP1(vqrshrund_n_s64, aarch64_neon_sqrshrun, AddRetType), 4266 NEONMAP1(vqrshrunh_n_s16, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 4267 NEONMAP1(vqrshruns_n_s32, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 4268 NEONMAP1(vqshlb_n_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4269 NEONMAP1(vqshlb_n_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4270 NEONMAP1(vqshlb_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4271 NEONMAP1(vqshlb_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4272 NEONMAP1(vqshld_s64, aarch64_neon_sqshl, Add1ArgType), 4273 NEONMAP1(vqshld_u64, aarch64_neon_uqshl, Add1ArgType), 4274 NEONMAP1(vqshlh_n_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4275 NEONMAP1(vqshlh_n_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4276 NEONMAP1(vqshlh_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4277 NEONMAP1(vqshlh_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4278 NEONMAP1(vqshls_n_s32, aarch64_neon_sqshl, Add1ArgType), 4279 NEONMAP1(vqshls_n_u32, aarch64_neon_uqshl, Add1ArgType), 4280 NEONMAP1(vqshls_s32, aarch64_neon_sqshl, Add1ArgType), 4281 NEONMAP1(vqshls_u32, aarch64_neon_uqshl, Add1ArgType), 4282 NEONMAP1(vqshlub_n_s8, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 4283 NEONMAP1(vqshluh_n_s16, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 4284 NEONMAP1(vqshlus_n_s32, aarch64_neon_sqshlu, Add1ArgType), 4285 NEONMAP1(vqshrnd_n_s64, aarch64_neon_sqshrn, AddRetType), 4286 NEONMAP1(vqshrnd_n_u64, aarch64_neon_uqshrn, AddRetType), 4287 NEONMAP1(vqshrnh_n_s16, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 4288 NEONMAP1(vqshrnh_n_u16, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 4289 NEONMAP1(vqshrns_n_s32, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 4290 NEONMAP1(vqshrns_n_u32, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 4291 NEONMAP1(vqshrund_n_s64, aarch64_neon_sqshrun, AddRetType), 4292 NEONMAP1(vqshrunh_n_s16, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 4293 NEONMAP1(vqshruns_n_s32, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 4294 NEONMAP1(vqsubb_s8, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 4295 NEONMAP1(vqsubb_u8, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 4296 NEONMAP1(vqsubd_s64, aarch64_neon_sqsub, Add1ArgType), 4297 NEONMAP1(vqsubd_u64, aarch64_neon_uqsub, Add1ArgType), 4298 NEONMAP1(vqsubh_s16, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 4299 NEONMAP1(vqsubh_u16, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 4300 NEONMAP1(vqsubs_s32, aarch64_neon_sqsub, Add1ArgType), 4301 NEONMAP1(vqsubs_u32, aarch64_neon_uqsub, Add1ArgType), 4302 NEONMAP1(vrecped_f64, aarch64_neon_frecpe, Add1ArgType), 4303 NEONMAP1(vrecpes_f32, aarch64_neon_frecpe, Add1ArgType), 4304 NEONMAP1(vrecpxd_f64, aarch64_neon_frecpx, Add1ArgType), 4305 NEONMAP1(vrecpxs_f32, aarch64_neon_frecpx, Add1ArgType), 4306 NEONMAP1(vrshld_s64, aarch64_neon_srshl, Add1ArgType), 4307 NEONMAP1(vrshld_u64, aarch64_neon_urshl, Add1ArgType), 4308 NEONMAP1(vrsqrted_f64, aarch64_neon_frsqrte, Add1ArgType), 4309 NEONMAP1(vrsqrtes_f32, aarch64_neon_frsqrte, Add1ArgType), 4310 NEONMAP1(vrsqrtsd_f64, aarch64_neon_frsqrts, Add1ArgType), 4311 NEONMAP1(vrsqrtss_f32, aarch64_neon_frsqrts, Add1ArgType), 4312 NEONMAP1(vsha1cq_u32, aarch64_crypto_sha1c, 0), 4313 NEONMAP1(vsha1h_u32, aarch64_crypto_sha1h, 0), 4314 NEONMAP1(vsha1mq_u32, aarch64_crypto_sha1m, 0), 4315 NEONMAP1(vsha1pq_u32, aarch64_crypto_sha1p, 0), 4316 NEONMAP1(vshld_s64, aarch64_neon_sshl, Add1ArgType), 4317 NEONMAP1(vshld_u64, aarch64_neon_ushl, Add1ArgType), 4318 NEONMAP1(vslid_n_s64, aarch64_neon_vsli, Vectorize1ArgType), 4319 NEONMAP1(vslid_n_u64, aarch64_neon_vsli, Vectorize1ArgType), 4320 NEONMAP1(vsqaddb_u8, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 4321 NEONMAP1(vsqaddd_u64, aarch64_neon_usqadd, Add1ArgType), 4322 NEONMAP1(vsqaddh_u16, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 4323 NEONMAP1(vsqadds_u32, aarch64_neon_usqadd, Add1ArgType), 4324 NEONMAP1(vsrid_n_s64, aarch64_neon_vsri, Vectorize1ArgType), 4325 NEONMAP1(vsrid_n_u64, aarch64_neon_vsri, Vectorize1ArgType), 4326 NEONMAP1(vuqaddb_s8, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 4327 NEONMAP1(vuqaddd_s64, aarch64_neon_suqadd, Add1ArgType), 4328 NEONMAP1(vuqaddh_s16, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 4329 NEONMAP1(vuqadds_s32, aarch64_neon_suqadd, Add1ArgType), 4330 // FP16 scalar intrinisics go here. 4331 NEONMAP1(vabdh_f16, aarch64_sisd_fabd, Add1ArgType), 4332 NEONMAP1(vcvtah_s32_f16, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 4333 NEONMAP1(vcvtah_s64_f16, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 4334 NEONMAP1(vcvtah_u32_f16, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 4335 NEONMAP1(vcvtah_u64_f16, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 4336 NEONMAP1(vcvth_n_f16_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 4337 NEONMAP1(vcvth_n_f16_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 4338 NEONMAP1(vcvth_n_f16_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 4339 NEONMAP1(vcvth_n_f16_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 4340 NEONMAP1(vcvth_n_s32_f16, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 4341 NEONMAP1(vcvth_n_s64_f16, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 4342 NEONMAP1(vcvth_n_u32_f16, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 4343 NEONMAP1(vcvth_n_u64_f16, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 4344 NEONMAP1(vcvtmh_s32_f16, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 4345 NEONMAP1(vcvtmh_s64_f16, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 4346 NEONMAP1(vcvtmh_u32_f16, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 4347 NEONMAP1(vcvtmh_u64_f16, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 4348 NEONMAP1(vcvtnh_s32_f16, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 4349 NEONMAP1(vcvtnh_s64_f16, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 4350 NEONMAP1(vcvtnh_u32_f16, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 4351 NEONMAP1(vcvtnh_u64_f16, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 4352 NEONMAP1(vcvtph_s32_f16, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 4353 NEONMAP1(vcvtph_s64_f16, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 4354 NEONMAP1(vcvtph_u32_f16, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 4355 NEONMAP1(vcvtph_u64_f16, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 4356 NEONMAP1(vmulxh_f16, aarch64_neon_fmulx, Add1ArgType), 4357 NEONMAP1(vrecpeh_f16, aarch64_neon_frecpe, Add1ArgType), 4358 NEONMAP1(vrecpxh_f16, aarch64_neon_frecpx, Add1ArgType), 4359 NEONMAP1(vrsqrteh_f16, aarch64_neon_frsqrte, Add1ArgType), 4360 NEONMAP1(vrsqrtsh_f16, aarch64_neon_frsqrts, Add1ArgType), 4361 }; 4362 4363 #undef NEONMAP0 4364 #undef NEONMAP1 4365 #undef NEONMAP2 4366 4367 static bool NEONSIMDIntrinsicsProvenSorted = false; 4368 4369 static bool AArch64SIMDIntrinsicsProvenSorted = false; 4370 static bool AArch64SISDIntrinsicsProvenSorted = false; 4371 4372 4373 static const NeonIntrinsicInfo * 4374 findNeonIntrinsicInMap(ArrayRef<NeonIntrinsicInfo> IntrinsicMap, 4375 unsigned BuiltinID, bool &MapProvenSorted) { 4376 4377 #ifndef NDEBUG 4378 if (!MapProvenSorted) { 4379 assert(std::is_sorted(std::begin(IntrinsicMap), std::end(IntrinsicMap))); 4380 MapProvenSorted = true; 4381 } 4382 #endif 4383 4384 const NeonIntrinsicInfo *Builtin = 4385 std::lower_bound(IntrinsicMap.begin(), IntrinsicMap.end(), BuiltinID); 4386 4387 if (Builtin != IntrinsicMap.end() && Builtin->BuiltinID == BuiltinID) 4388 return Builtin; 4389 4390 return nullptr; 4391 } 4392 4393 Function *CodeGenFunction::LookupNeonLLVMIntrinsic(unsigned IntrinsicID, 4394 unsigned Modifier, 4395 llvm::Type *ArgType, 4396 const CallExpr *E) { 4397 int VectorSize = 0; 4398 if (Modifier & Use64BitVectors) 4399 VectorSize = 64; 4400 else if (Modifier & Use128BitVectors) 4401 VectorSize = 128; 4402 4403 // Return type. 4404 SmallVector<llvm::Type *, 3> Tys; 4405 if (Modifier & AddRetType) { 4406 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 4407 if (Modifier & VectorizeRetType) 4408 Ty = llvm::VectorType::get( 4409 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); 4410 4411 Tys.push_back(Ty); 4412 } 4413 4414 // Arguments. 4415 if (Modifier & VectorizeArgTypes) { 4416 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; 4417 ArgType = llvm::VectorType::get(ArgType, Elts); 4418 } 4419 4420 if (Modifier & (Add1ArgType | Add2ArgTypes)) 4421 Tys.push_back(ArgType); 4422 4423 if (Modifier & Add2ArgTypes) 4424 Tys.push_back(ArgType); 4425 4426 if (Modifier & InventFloatType) 4427 Tys.push_back(FloatTy); 4428 4429 return CGM.getIntrinsic(IntrinsicID, Tys); 4430 } 4431 4432 static Value *EmitCommonNeonSISDBuiltinExpr(CodeGenFunction &CGF, 4433 const NeonIntrinsicInfo &SISDInfo, 4434 SmallVectorImpl<Value *> &Ops, 4435 const CallExpr *E) { 4436 unsigned BuiltinID = SISDInfo.BuiltinID; 4437 unsigned int Int = SISDInfo.LLVMIntrinsic; 4438 unsigned Modifier = SISDInfo.TypeModifier; 4439 const char *s = SISDInfo.NameHint; 4440 4441 switch (BuiltinID) { 4442 case NEON::BI__builtin_neon_vcled_s64: 4443 case NEON::BI__builtin_neon_vcled_u64: 4444 case NEON::BI__builtin_neon_vcles_f32: 4445 case NEON::BI__builtin_neon_vcled_f64: 4446 case NEON::BI__builtin_neon_vcltd_s64: 4447 case NEON::BI__builtin_neon_vcltd_u64: 4448 case NEON::BI__builtin_neon_vclts_f32: 4449 case NEON::BI__builtin_neon_vcltd_f64: 4450 case NEON::BI__builtin_neon_vcales_f32: 4451 case NEON::BI__builtin_neon_vcaled_f64: 4452 case NEON::BI__builtin_neon_vcalts_f32: 4453 case NEON::BI__builtin_neon_vcaltd_f64: 4454 // Only one direction of comparisons actually exist, cmle is actually a cmge 4455 // with swapped operands. The table gives us the right intrinsic but we 4456 // still need to do the swap. 4457 std::swap(Ops[0], Ops[1]); 4458 break; 4459 } 4460 4461 assert(Int && "Generic code assumes a valid intrinsic"); 4462 4463 // Determine the type(s) of this overloaded AArch64 intrinsic. 4464 const Expr *Arg = E->getArg(0); 4465 llvm::Type *ArgTy = CGF.ConvertType(Arg->getType()); 4466 Function *F = CGF.LookupNeonLLVMIntrinsic(Int, Modifier, ArgTy, E); 4467 4468 int j = 0; 4469 ConstantInt *C0 = ConstantInt::get(CGF.SizeTy, 0); 4470 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 4471 ai != ae; ++ai, ++j) { 4472 llvm::Type *ArgTy = ai->getType(); 4473 if (Ops[j]->getType()->getPrimitiveSizeInBits() == 4474 ArgTy->getPrimitiveSizeInBits()) 4475 continue; 4476 4477 assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy()); 4478 // The constant argument to an _n_ intrinsic always has Int32Ty, so truncate 4479 // it before inserting. 4480 Ops[j] = 4481 CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType()); 4482 Ops[j] = 4483 CGF.Builder.CreateInsertElement(UndefValue::get(ArgTy), Ops[j], C0); 4484 } 4485 4486 Value *Result = CGF.EmitNeonCall(F, Ops, s); 4487 llvm::Type *ResultType = CGF.ConvertType(E->getType()); 4488 if (ResultType->getPrimitiveSizeInBits() < 4489 Result->getType()->getPrimitiveSizeInBits()) 4490 return CGF.Builder.CreateExtractElement(Result, C0); 4491 4492 return CGF.Builder.CreateBitCast(Result, ResultType, s); 4493 } 4494 4495 Value *CodeGenFunction::EmitCommonNeonBuiltinExpr( 4496 unsigned BuiltinID, unsigned LLVMIntrinsic, unsigned AltLLVMIntrinsic, 4497 const char *NameHint, unsigned Modifier, const CallExpr *E, 4498 SmallVectorImpl<llvm::Value *> &Ops, Address PtrOp0, Address PtrOp1, 4499 llvm::Triple::ArchType Arch) { 4500 // Get the last argument, which specifies the vector type. 4501 llvm::APSInt NeonTypeConst; 4502 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 4503 if (!Arg->isIntegerConstantExpr(NeonTypeConst, getContext())) 4504 return nullptr; 4505 4506 // Determine the type of this overloaded NEON intrinsic. 4507 NeonTypeFlags Type(NeonTypeConst.getZExtValue()); 4508 bool Usgn = Type.isUnsigned(); 4509 bool Quad = Type.isQuad(); 4510 const bool HasLegalHalfType = getTarget().hasLegalHalfType(); 4511 4512 llvm::VectorType *VTy = GetNeonType(this, Type, HasLegalHalfType); 4513 llvm::Type *Ty = VTy; 4514 if (!Ty) 4515 return nullptr; 4516 4517 auto getAlignmentValue32 = [&](Address addr) -> Value* { 4518 return Builder.getInt32(addr.getAlignment().getQuantity()); 4519 }; 4520 4521 unsigned Int = LLVMIntrinsic; 4522 if ((Modifier & UnsignedAlts) && !Usgn) 4523 Int = AltLLVMIntrinsic; 4524 4525 switch (BuiltinID) { 4526 default: break; 4527 case NEON::BI__builtin_neon_vabs_v: 4528 case NEON::BI__builtin_neon_vabsq_v: 4529 if (VTy->getElementType()->isFloatingPointTy()) 4530 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, Ty), Ops, "vabs"); 4531 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), Ops, "vabs"); 4532 case NEON::BI__builtin_neon_vaddhn_v: { 4533 llvm::VectorType *SrcTy = 4534 llvm::VectorType::getExtendedElementVectorType(VTy); 4535 4536 // %sum = add <4 x i32> %lhs, %rhs 4537 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4538 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 4539 Ops[0] = Builder.CreateAdd(Ops[0], Ops[1], "vaddhn"); 4540 4541 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 4542 Constant *ShiftAmt = 4543 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 4544 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vaddhn"); 4545 4546 // %res = trunc <4 x i32> %high to <4 x i16> 4547 return Builder.CreateTrunc(Ops[0], VTy, "vaddhn"); 4548 } 4549 case NEON::BI__builtin_neon_vcale_v: 4550 case NEON::BI__builtin_neon_vcaleq_v: 4551 case NEON::BI__builtin_neon_vcalt_v: 4552 case NEON::BI__builtin_neon_vcaltq_v: 4553 std::swap(Ops[0], Ops[1]); 4554 LLVM_FALLTHROUGH; 4555 case NEON::BI__builtin_neon_vcage_v: 4556 case NEON::BI__builtin_neon_vcageq_v: 4557 case NEON::BI__builtin_neon_vcagt_v: 4558 case NEON::BI__builtin_neon_vcagtq_v: { 4559 llvm::Type *Ty; 4560 switch (VTy->getScalarSizeInBits()) { 4561 default: llvm_unreachable("unexpected type"); 4562 case 32: 4563 Ty = FloatTy; 4564 break; 4565 case 64: 4566 Ty = DoubleTy; 4567 break; 4568 case 16: 4569 Ty = HalfTy; 4570 break; 4571 } 4572 llvm::Type *VecFlt = llvm::VectorType::get(Ty, VTy->getNumElements()); 4573 llvm::Type *Tys[] = { VTy, VecFlt }; 4574 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 4575 return EmitNeonCall(F, Ops, NameHint); 4576 } 4577 case NEON::BI__builtin_neon_vceqz_v: 4578 case NEON::BI__builtin_neon_vceqzq_v: 4579 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OEQ, 4580 ICmpInst::ICMP_EQ, "vceqz"); 4581 case NEON::BI__builtin_neon_vcgez_v: 4582 case NEON::BI__builtin_neon_vcgezq_v: 4583 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGE, 4584 ICmpInst::ICMP_SGE, "vcgez"); 4585 case NEON::BI__builtin_neon_vclez_v: 4586 case NEON::BI__builtin_neon_vclezq_v: 4587 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLE, 4588 ICmpInst::ICMP_SLE, "vclez"); 4589 case NEON::BI__builtin_neon_vcgtz_v: 4590 case NEON::BI__builtin_neon_vcgtzq_v: 4591 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGT, 4592 ICmpInst::ICMP_SGT, "vcgtz"); 4593 case NEON::BI__builtin_neon_vcltz_v: 4594 case NEON::BI__builtin_neon_vcltzq_v: 4595 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLT, 4596 ICmpInst::ICMP_SLT, "vcltz"); 4597 case NEON::BI__builtin_neon_vclz_v: 4598 case NEON::BI__builtin_neon_vclzq_v: 4599 // We generate target-independent intrinsic, which needs a second argument 4600 // for whether or not clz of zero is undefined; on ARM it isn't. 4601 Ops.push_back(Builder.getInt1(getTarget().isCLZForZeroUndef())); 4602 break; 4603 case NEON::BI__builtin_neon_vcvt_f32_v: 4604 case NEON::BI__builtin_neon_vcvtq_f32_v: 4605 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4606 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, Quad), 4607 HasLegalHalfType); 4608 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 4609 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 4610 case NEON::BI__builtin_neon_vcvt_f16_v: 4611 case NEON::BI__builtin_neon_vcvtq_f16_v: 4612 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4613 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float16, false, Quad), 4614 HasLegalHalfType); 4615 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 4616 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 4617 case NEON::BI__builtin_neon_vcvt_n_f16_v: 4618 case NEON::BI__builtin_neon_vcvt_n_f32_v: 4619 case NEON::BI__builtin_neon_vcvt_n_f64_v: 4620 case NEON::BI__builtin_neon_vcvtq_n_f16_v: 4621 case NEON::BI__builtin_neon_vcvtq_n_f32_v: 4622 case NEON::BI__builtin_neon_vcvtq_n_f64_v: { 4623 llvm::Type *Tys[2] = { GetFloatNeonType(this, Type), Ty }; 4624 Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic; 4625 Function *F = CGM.getIntrinsic(Int, Tys); 4626 return EmitNeonCall(F, Ops, "vcvt_n"); 4627 } 4628 case NEON::BI__builtin_neon_vcvt_n_s16_v: 4629 case NEON::BI__builtin_neon_vcvt_n_s32_v: 4630 case NEON::BI__builtin_neon_vcvt_n_u16_v: 4631 case NEON::BI__builtin_neon_vcvt_n_u32_v: 4632 case NEON::BI__builtin_neon_vcvt_n_s64_v: 4633 case NEON::BI__builtin_neon_vcvt_n_u64_v: 4634 case NEON::BI__builtin_neon_vcvtq_n_s16_v: 4635 case NEON::BI__builtin_neon_vcvtq_n_s32_v: 4636 case NEON::BI__builtin_neon_vcvtq_n_u16_v: 4637 case NEON::BI__builtin_neon_vcvtq_n_u32_v: 4638 case NEON::BI__builtin_neon_vcvtq_n_s64_v: 4639 case NEON::BI__builtin_neon_vcvtq_n_u64_v: { 4640 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 4641 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 4642 return EmitNeonCall(F, Ops, "vcvt_n"); 4643 } 4644 case NEON::BI__builtin_neon_vcvt_s32_v: 4645 case NEON::BI__builtin_neon_vcvt_u32_v: 4646 case NEON::BI__builtin_neon_vcvt_s64_v: 4647 case NEON::BI__builtin_neon_vcvt_u64_v: 4648 case NEON::BI__builtin_neon_vcvt_s16_v: 4649 case NEON::BI__builtin_neon_vcvt_u16_v: 4650 case NEON::BI__builtin_neon_vcvtq_s32_v: 4651 case NEON::BI__builtin_neon_vcvtq_u32_v: 4652 case NEON::BI__builtin_neon_vcvtq_s64_v: 4653 case NEON::BI__builtin_neon_vcvtq_u64_v: 4654 case NEON::BI__builtin_neon_vcvtq_s16_v: 4655 case NEON::BI__builtin_neon_vcvtq_u16_v: { 4656 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 4657 return Usgn ? Builder.CreateFPToUI(Ops[0], Ty, "vcvt") 4658 : Builder.CreateFPToSI(Ops[0], Ty, "vcvt"); 4659 } 4660 case NEON::BI__builtin_neon_vcvta_s16_v: 4661 case NEON::BI__builtin_neon_vcvta_s32_v: 4662 case NEON::BI__builtin_neon_vcvta_s64_v: 4663 case NEON::BI__builtin_neon_vcvta_u32_v: 4664 case NEON::BI__builtin_neon_vcvta_u64_v: 4665 case NEON::BI__builtin_neon_vcvtaq_s16_v: 4666 case NEON::BI__builtin_neon_vcvtaq_s32_v: 4667 case NEON::BI__builtin_neon_vcvtaq_s64_v: 4668 case NEON::BI__builtin_neon_vcvtaq_u16_v: 4669 case NEON::BI__builtin_neon_vcvtaq_u32_v: 4670 case NEON::BI__builtin_neon_vcvtaq_u64_v: 4671 case NEON::BI__builtin_neon_vcvtn_s16_v: 4672 case NEON::BI__builtin_neon_vcvtn_s32_v: 4673 case NEON::BI__builtin_neon_vcvtn_s64_v: 4674 case NEON::BI__builtin_neon_vcvtn_u16_v: 4675 case NEON::BI__builtin_neon_vcvtn_u32_v: 4676 case NEON::BI__builtin_neon_vcvtn_u64_v: 4677 case NEON::BI__builtin_neon_vcvtnq_s16_v: 4678 case NEON::BI__builtin_neon_vcvtnq_s32_v: 4679 case NEON::BI__builtin_neon_vcvtnq_s64_v: 4680 case NEON::BI__builtin_neon_vcvtnq_u16_v: 4681 case NEON::BI__builtin_neon_vcvtnq_u32_v: 4682 case NEON::BI__builtin_neon_vcvtnq_u64_v: 4683 case NEON::BI__builtin_neon_vcvtp_s16_v: 4684 case NEON::BI__builtin_neon_vcvtp_s32_v: 4685 case NEON::BI__builtin_neon_vcvtp_s64_v: 4686 case NEON::BI__builtin_neon_vcvtp_u16_v: 4687 case NEON::BI__builtin_neon_vcvtp_u32_v: 4688 case NEON::BI__builtin_neon_vcvtp_u64_v: 4689 case NEON::BI__builtin_neon_vcvtpq_s16_v: 4690 case NEON::BI__builtin_neon_vcvtpq_s32_v: 4691 case NEON::BI__builtin_neon_vcvtpq_s64_v: 4692 case NEON::BI__builtin_neon_vcvtpq_u16_v: 4693 case NEON::BI__builtin_neon_vcvtpq_u32_v: 4694 case NEON::BI__builtin_neon_vcvtpq_u64_v: 4695 case NEON::BI__builtin_neon_vcvtm_s16_v: 4696 case NEON::BI__builtin_neon_vcvtm_s32_v: 4697 case NEON::BI__builtin_neon_vcvtm_s64_v: 4698 case NEON::BI__builtin_neon_vcvtm_u16_v: 4699 case NEON::BI__builtin_neon_vcvtm_u32_v: 4700 case NEON::BI__builtin_neon_vcvtm_u64_v: 4701 case NEON::BI__builtin_neon_vcvtmq_s16_v: 4702 case NEON::BI__builtin_neon_vcvtmq_s32_v: 4703 case NEON::BI__builtin_neon_vcvtmq_s64_v: 4704 case NEON::BI__builtin_neon_vcvtmq_u16_v: 4705 case NEON::BI__builtin_neon_vcvtmq_u32_v: 4706 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 4707 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 4708 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, NameHint); 4709 } 4710 case NEON::BI__builtin_neon_vext_v: 4711 case NEON::BI__builtin_neon_vextq_v: { 4712 int CV = cast<ConstantInt>(Ops[2])->getSExtValue(); 4713 SmallVector<uint32_t, 16> Indices; 4714 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 4715 Indices.push_back(i+CV); 4716 4717 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4718 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4719 return Builder.CreateShuffleVector(Ops[0], Ops[1], Indices, "vext"); 4720 } 4721 case NEON::BI__builtin_neon_vfma_v: 4722 case NEON::BI__builtin_neon_vfmaq_v: { 4723 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 4724 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4725 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4726 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4727 4728 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 4729 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 4730 } 4731 case NEON::BI__builtin_neon_vld1_v: 4732 case NEON::BI__builtin_neon_vld1q_v: { 4733 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4734 Ops.push_back(getAlignmentValue32(PtrOp0)); 4735 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, "vld1"); 4736 } 4737 case NEON::BI__builtin_neon_vld2_v: 4738 case NEON::BI__builtin_neon_vld2q_v: 4739 case NEON::BI__builtin_neon_vld3_v: 4740 case NEON::BI__builtin_neon_vld3q_v: 4741 case NEON::BI__builtin_neon_vld4_v: 4742 case NEON::BI__builtin_neon_vld4q_v: { 4743 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4744 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 4745 Value *Align = getAlignmentValue32(PtrOp1); 4746 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint); 4747 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4748 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4749 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4750 } 4751 case NEON::BI__builtin_neon_vld1_dup_v: 4752 case NEON::BI__builtin_neon_vld1q_dup_v: { 4753 Value *V = UndefValue::get(Ty); 4754 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 4755 PtrOp0 = Builder.CreateBitCast(PtrOp0, Ty); 4756 LoadInst *Ld = Builder.CreateLoad(PtrOp0); 4757 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 4758 Ops[0] = Builder.CreateInsertElement(V, Ld, CI); 4759 return EmitNeonSplat(Ops[0], CI); 4760 } 4761 case NEON::BI__builtin_neon_vld2_lane_v: 4762 case NEON::BI__builtin_neon_vld2q_lane_v: 4763 case NEON::BI__builtin_neon_vld3_lane_v: 4764 case NEON::BI__builtin_neon_vld3q_lane_v: 4765 case NEON::BI__builtin_neon_vld4_lane_v: 4766 case NEON::BI__builtin_neon_vld4q_lane_v: { 4767 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4768 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 4769 for (unsigned I = 2; I < Ops.size() - 1; ++I) 4770 Ops[I] = Builder.CreateBitCast(Ops[I], Ty); 4771 Ops.push_back(getAlignmentValue32(PtrOp1)); 4772 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), NameHint); 4773 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4774 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4775 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4776 } 4777 case NEON::BI__builtin_neon_vmovl_v: { 4778 llvm::Type *DTy =llvm::VectorType::getTruncatedElementVectorType(VTy); 4779 Ops[0] = Builder.CreateBitCast(Ops[0], DTy); 4780 if (Usgn) 4781 return Builder.CreateZExt(Ops[0], Ty, "vmovl"); 4782 return Builder.CreateSExt(Ops[0], Ty, "vmovl"); 4783 } 4784 case NEON::BI__builtin_neon_vmovn_v: { 4785 llvm::Type *QTy = llvm::VectorType::getExtendedElementVectorType(VTy); 4786 Ops[0] = Builder.CreateBitCast(Ops[0], QTy); 4787 return Builder.CreateTrunc(Ops[0], Ty, "vmovn"); 4788 } 4789 case NEON::BI__builtin_neon_vmull_v: 4790 // FIXME: the integer vmull operations could be emitted in terms of pure 4791 // LLVM IR (2 exts followed by a mul). Unfortunately LLVM has a habit of 4792 // hoisting the exts outside loops. Until global ISel comes along that can 4793 // see through such movement this leads to bad CodeGen. So we need an 4794 // intrinsic for now. 4795 Int = Usgn ? Intrinsic::arm_neon_vmullu : Intrinsic::arm_neon_vmulls; 4796 Int = Type.isPoly() ? (unsigned)Intrinsic::arm_neon_vmullp : Int; 4797 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 4798 case NEON::BI__builtin_neon_vpadal_v: 4799 case NEON::BI__builtin_neon_vpadalq_v: { 4800 // The source operand type has twice as many elements of half the size. 4801 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 4802 llvm::Type *EltTy = 4803 llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 4804 llvm::Type *NarrowTy = 4805 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 4806 llvm::Type *Tys[2] = { Ty, NarrowTy }; 4807 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, NameHint); 4808 } 4809 case NEON::BI__builtin_neon_vpaddl_v: 4810 case NEON::BI__builtin_neon_vpaddlq_v: { 4811 // The source operand type has twice as many elements of half the size. 4812 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 4813 llvm::Type *EltTy = llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 4814 llvm::Type *NarrowTy = 4815 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 4816 llvm::Type *Tys[2] = { Ty, NarrowTy }; 4817 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vpaddl"); 4818 } 4819 case NEON::BI__builtin_neon_vqdmlal_v: 4820 case NEON::BI__builtin_neon_vqdmlsl_v: { 4821 SmallVector<Value *, 2> MulOps(Ops.begin() + 1, Ops.end()); 4822 Ops[1] = 4823 EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), MulOps, "vqdmlal"); 4824 Ops.resize(2); 4825 return EmitNeonCall(CGM.getIntrinsic(AltLLVMIntrinsic, Ty), Ops, NameHint); 4826 } 4827 case NEON::BI__builtin_neon_vqshl_n_v: 4828 case NEON::BI__builtin_neon_vqshlq_n_v: 4829 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshl_n", 4830 1, false); 4831 case NEON::BI__builtin_neon_vqshlu_n_v: 4832 case NEON::BI__builtin_neon_vqshluq_n_v: 4833 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshlu_n", 4834 1, false); 4835 case NEON::BI__builtin_neon_vrecpe_v: 4836 case NEON::BI__builtin_neon_vrecpeq_v: 4837 case NEON::BI__builtin_neon_vrsqrte_v: 4838 case NEON::BI__builtin_neon_vrsqrteq_v: 4839 Int = Ty->isFPOrFPVectorTy() ? LLVMIntrinsic : AltLLVMIntrinsic; 4840 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint); 4841 4842 case NEON::BI__builtin_neon_vrshr_n_v: 4843 case NEON::BI__builtin_neon_vrshrq_n_v: 4844 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n", 4845 1, true); 4846 case NEON::BI__builtin_neon_vshl_n_v: 4847 case NEON::BI__builtin_neon_vshlq_n_v: 4848 Ops[1] = EmitNeonShiftVector(Ops[1], Ty, false); 4849 return Builder.CreateShl(Builder.CreateBitCast(Ops[0],Ty), Ops[1], 4850 "vshl_n"); 4851 case NEON::BI__builtin_neon_vshll_n_v: { 4852 llvm::Type *SrcTy = llvm::VectorType::getTruncatedElementVectorType(VTy); 4853 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4854 if (Usgn) 4855 Ops[0] = Builder.CreateZExt(Ops[0], VTy); 4856 else 4857 Ops[0] = Builder.CreateSExt(Ops[0], VTy); 4858 Ops[1] = EmitNeonShiftVector(Ops[1], VTy, false); 4859 return Builder.CreateShl(Ops[0], Ops[1], "vshll_n"); 4860 } 4861 case NEON::BI__builtin_neon_vshrn_n_v: { 4862 llvm::Type *SrcTy = llvm::VectorType::getExtendedElementVectorType(VTy); 4863 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4864 Ops[1] = EmitNeonShiftVector(Ops[1], SrcTy, false); 4865 if (Usgn) 4866 Ops[0] = Builder.CreateLShr(Ops[0], Ops[1]); 4867 else 4868 Ops[0] = Builder.CreateAShr(Ops[0], Ops[1]); 4869 return Builder.CreateTrunc(Ops[0], Ty, "vshrn_n"); 4870 } 4871 case NEON::BI__builtin_neon_vshr_n_v: 4872 case NEON::BI__builtin_neon_vshrq_n_v: 4873 return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, Usgn, "vshr_n"); 4874 case NEON::BI__builtin_neon_vst1_v: 4875 case NEON::BI__builtin_neon_vst1q_v: 4876 case NEON::BI__builtin_neon_vst2_v: 4877 case NEON::BI__builtin_neon_vst2q_v: 4878 case NEON::BI__builtin_neon_vst3_v: 4879 case NEON::BI__builtin_neon_vst3q_v: 4880 case NEON::BI__builtin_neon_vst4_v: 4881 case NEON::BI__builtin_neon_vst4q_v: 4882 case NEON::BI__builtin_neon_vst2_lane_v: 4883 case NEON::BI__builtin_neon_vst2q_lane_v: 4884 case NEON::BI__builtin_neon_vst3_lane_v: 4885 case NEON::BI__builtin_neon_vst3q_lane_v: 4886 case NEON::BI__builtin_neon_vst4_lane_v: 4887 case NEON::BI__builtin_neon_vst4q_lane_v: { 4888 llvm::Type *Tys[] = {Int8PtrTy, Ty}; 4889 Ops.push_back(getAlignmentValue32(PtrOp0)); 4890 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 4891 } 4892 case NEON::BI__builtin_neon_vsubhn_v: { 4893 llvm::VectorType *SrcTy = 4894 llvm::VectorType::getExtendedElementVectorType(VTy); 4895 4896 // %sum = add <4 x i32> %lhs, %rhs 4897 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4898 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 4899 Ops[0] = Builder.CreateSub(Ops[0], Ops[1], "vsubhn"); 4900 4901 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 4902 Constant *ShiftAmt = 4903 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 4904 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vsubhn"); 4905 4906 // %res = trunc <4 x i32> %high to <4 x i16> 4907 return Builder.CreateTrunc(Ops[0], VTy, "vsubhn"); 4908 } 4909 case NEON::BI__builtin_neon_vtrn_v: 4910 case NEON::BI__builtin_neon_vtrnq_v: { 4911 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4912 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4913 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4914 Value *SV = nullptr; 4915 4916 for (unsigned vi = 0; vi != 2; ++vi) { 4917 SmallVector<uint32_t, 16> Indices; 4918 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 4919 Indices.push_back(i+vi); 4920 Indices.push_back(i+e+vi); 4921 } 4922 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4923 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 4924 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4925 } 4926 return SV; 4927 } 4928 case NEON::BI__builtin_neon_vtst_v: 4929 case NEON::BI__builtin_neon_vtstq_v: { 4930 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4931 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4932 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 4933 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 4934 ConstantAggregateZero::get(Ty)); 4935 return Builder.CreateSExt(Ops[0], Ty, "vtst"); 4936 } 4937 case NEON::BI__builtin_neon_vuzp_v: 4938 case NEON::BI__builtin_neon_vuzpq_v: { 4939 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4940 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4941 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4942 Value *SV = nullptr; 4943 4944 for (unsigned vi = 0; vi != 2; ++vi) { 4945 SmallVector<uint32_t, 16> Indices; 4946 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 4947 Indices.push_back(2*i+vi); 4948 4949 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4950 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 4951 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4952 } 4953 return SV; 4954 } 4955 case NEON::BI__builtin_neon_vzip_v: 4956 case NEON::BI__builtin_neon_vzipq_v: { 4957 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4958 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4959 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4960 Value *SV = nullptr; 4961 4962 for (unsigned vi = 0; vi != 2; ++vi) { 4963 SmallVector<uint32_t, 16> Indices; 4964 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 4965 Indices.push_back((i + vi*e) >> 1); 4966 Indices.push_back(((i + vi*e) >> 1)+e); 4967 } 4968 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4969 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 4970 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4971 } 4972 return SV; 4973 } 4974 } 4975 4976 assert(Int && "Expected valid intrinsic number"); 4977 4978 // Determine the type(s) of this overloaded AArch64 intrinsic. 4979 Function *F = LookupNeonLLVMIntrinsic(Int, Modifier, Ty, E); 4980 4981 Value *Result = EmitNeonCall(F, Ops, NameHint); 4982 llvm::Type *ResultType = ConvertType(E->getType()); 4983 // AArch64 intrinsic one-element vector type cast to 4984 // scalar type expected by the builtin 4985 return Builder.CreateBitCast(Result, ResultType, NameHint); 4986 } 4987 4988 Value *CodeGenFunction::EmitAArch64CompareBuiltinExpr( 4989 Value *Op, llvm::Type *Ty, const CmpInst::Predicate Fp, 4990 const CmpInst::Predicate Ip, const Twine &Name) { 4991 llvm::Type *OTy = Op->getType(); 4992 4993 // FIXME: this is utterly horrific. We should not be looking at previous 4994 // codegen context to find out what needs doing. Unfortunately TableGen 4995 // currently gives us exactly the same calls for vceqz_f32 and vceqz_s32 4996 // (etc). 4997 if (BitCastInst *BI = dyn_cast<BitCastInst>(Op)) 4998 OTy = BI->getOperand(0)->getType(); 4999 5000 Op = Builder.CreateBitCast(Op, OTy); 5001 if (OTy->getScalarType()->isFloatingPointTy()) { 5002 Op = Builder.CreateFCmp(Fp, Op, Constant::getNullValue(OTy)); 5003 } else { 5004 Op = Builder.CreateICmp(Ip, Op, Constant::getNullValue(OTy)); 5005 } 5006 return Builder.CreateSExt(Op, Ty, Name); 5007 } 5008 5009 static Value *packTBLDVectorList(CodeGenFunction &CGF, ArrayRef<Value *> Ops, 5010 Value *ExtOp, Value *IndexOp, 5011 llvm::Type *ResTy, unsigned IntID, 5012 const char *Name) { 5013 SmallVector<Value *, 2> TblOps; 5014 if (ExtOp) 5015 TblOps.push_back(ExtOp); 5016 5017 // Build a vector containing sequential number like (0, 1, 2, ..., 15) 5018 SmallVector<uint32_t, 16> Indices; 5019 llvm::VectorType *TblTy = cast<llvm::VectorType>(Ops[0]->getType()); 5020 for (unsigned i = 0, e = TblTy->getNumElements(); i != e; ++i) { 5021 Indices.push_back(2*i); 5022 Indices.push_back(2*i+1); 5023 } 5024 5025 int PairPos = 0, End = Ops.size() - 1; 5026 while (PairPos < End) { 5027 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 5028 Ops[PairPos+1], Indices, 5029 Name)); 5030 PairPos += 2; 5031 } 5032 5033 // If there's an odd number of 64-bit lookup table, fill the high 64-bit 5034 // of the 128-bit lookup table with zero. 5035 if (PairPos == End) { 5036 Value *ZeroTbl = ConstantAggregateZero::get(TblTy); 5037 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 5038 ZeroTbl, Indices, Name)); 5039 } 5040 5041 Function *TblF; 5042 TblOps.push_back(IndexOp); 5043 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); 5044 5045 return CGF.EmitNeonCall(TblF, TblOps, Name); 5046 } 5047 5048 Value *CodeGenFunction::GetValueForARMHint(unsigned BuiltinID) { 5049 unsigned Value; 5050 switch (BuiltinID) { 5051 default: 5052 return nullptr; 5053 case ARM::BI__builtin_arm_nop: 5054 Value = 0; 5055 break; 5056 case ARM::BI__builtin_arm_yield: 5057 case ARM::BI__yield: 5058 Value = 1; 5059 break; 5060 case ARM::BI__builtin_arm_wfe: 5061 case ARM::BI__wfe: 5062 Value = 2; 5063 break; 5064 case ARM::BI__builtin_arm_wfi: 5065 case ARM::BI__wfi: 5066 Value = 3; 5067 break; 5068 case ARM::BI__builtin_arm_sev: 5069 case ARM::BI__sev: 5070 Value = 4; 5071 break; 5072 case ARM::BI__builtin_arm_sevl: 5073 case ARM::BI__sevl: 5074 Value = 5; 5075 break; 5076 } 5077 5078 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_hint), 5079 llvm::ConstantInt::get(Int32Ty, Value)); 5080 } 5081 5082 // Generates the IR for the read/write special register builtin, 5083 // ValueType is the type of the value that is to be written or read, 5084 // RegisterType is the type of the register being written to or read from. 5085 static Value *EmitSpecialRegisterBuiltin(CodeGenFunction &CGF, 5086 const CallExpr *E, 5087 llvm::Type *RegisterType, 5088 llvm::Type *ValueType, 5089 bool IsRead, 5090 StringRef SysReg = "") { 5091 // write and register intrinsics only support 32 and 64 bit operations. 5092 assert((RegisterType->isIntegerTy(32) || RegisterType->isIntegerTy(64)) 5093 && "Unsupported size for register."); 5094 5095 CodeGen::CGBuilderTy &Builder = CGF.Builder; 5096 CodeGen::CodeGenModule &CGM = CGF.CGM; 5097 LLVMContext &Context = CGM.getLLVMContext(); 5098 5099 if (SysReg.empty()) { 5100 const Expr *SysRegStrExpr = E->getArg(0)->IgnoreParenCasts(); 5101 SysReg = cast<clang::StringLiteral>(SysRegStrExpr)->getString(); 5102 } 5103 5104 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysReg) }; 5105 llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); 5106 llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); 5107 5108 llvm::Type *Types[] = { RegisterType }; 5109 5110 bool MixedTypes = RegisterType->isIntegerTy(64) && ValueType->isIntegerTy(32); 5111 assert(!(RegisterType->isIntegerTy(32) && ValueType->isIntegerTy(64)) 5112 && "Can't fit 64-bit value in 32-bit register"); 5113 5114 if (IsRead) { 5115 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::read_register, Types); 5116 llvm::Value *Call = Builder.CreateCall(F, Metadata); 5117 5118 if (MixedTypes) 5119 // Read into 64 bit register and then truncate result to 32 bit. 5120 return Builder.CreateTrunc(Call, ValueType); 5121 5122 if (ValueType->isPointerTy()) 5123 // Have i32/i64 result (Call) but want to return a VoidPtrTy (i8*). 5124 return Builder.CreateIntToPtr(Call, ValueType); 5125 5126 return Call; 5127 } 5128 5129 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types); 5130 llvm::Value *ArgValue = CGF.EmitScalarExpr(E->getArg(1)); 5131 if (MixedTypes) { 5132 // Extend 32 bit write value to 64 bit to pass to write. 5133 ArgValue = Builder.CreateZExt(ArgValue, RegisterType); 5134 return Builder.CreateCall(F, { Metadata, ArgValue }); 5135 } 5136 5137 if (ValueType->isPointerTy()) { 5138 // Have VoidPtrTy ArgValue but want to return an i32/i64. 5139 ArgValue = Builder.CreatePtrToInt(ArgValue, RegisterType); 5140 return Builder.CreateCall(F, { Metadata, ArgValue }); 5141 } 5142 5143 return Builder.CreateCall(F, { Metadata, ArgValue }); 5144 } 5145 5146 /// Return true if BuiltinID is an overloaded Neon intrinsic with an extra 5147 /// argument that specifies the vector type. 5148 static bool HasExtraNeonArgument(unsigned BuiltinID) { 5149 switch (BuiltinID) { 5150 default: break; 5151 case NEON::BI__builtin_neon_vget_lane_i8: 5152 case NEON::BI__builtin_neon_vget_lane_i16: 5153 case NEON::BI__builtin_neon_vget_lane_i32: 5154 case NEON::BI__builtin_neon_vget_lane_i64: 5155 case NEON::BI__builtin_neon_vget_lane_f32: 5156 case NEON::BI__builtin_neon_vgetq_lane_i8: 5157 case NEON::BI__builtin_neon_vgetq_lane_i16: 5158 case NEON::BI__builtin_neon_vgetq_lane_i32: 5159 case NEON::BI__builtin_neon_vgetq_lane_i64: 5160 case NEON::BI__builtin_neon_vgetq_lane_f32: 5161 case NEON::BI__builtin_neon_vset_lane_i8: 5162 case NEON::BI__builtin_neon_vset_lane_i16: 5163 case NEON::BI__builtin_neon_vset_lane_i32: 5164 case NEON::BI__builtin_neon_vset_lane_i64: 5165 case NEON::BI__builtin_neon_vset_lane_f32: 5166 case NEON::BI__builtin_neon_vsetq_lane_i8: 5167 case NEON::BI__builtin_neon_vsetq_lane_i16: 5168 case NEON::BI__builtin_neon_vsetq_lane_i32: 5169 case NEON::BI__builtin_neon_vsetq_lane_i64: 5170 case NEON::BI__builtin_neon_vsetq_lane_f32: 5171 case NEON::BI__builtin_neon_vsha1h_u32: 5172 case NEON::BI__builtin_neon_vsha1cq_u32: 5173 case NEON::BI__builtin_neon_vsha1pq_u32: 5174 case NEON::BI__builtin_neon_vsha1mq_u32: 5175 case clang::ARM::BI_MoveToCoprocessor: 5176 case clang::ARM::BI_MoveToCoprocessor2: 5177 return false; 5178 } 5179 return true; 5180 } 5181 5182 Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, 5183 const CallExpr *E, 5184 llvm::Triple::ArchType Arch) { 5185 if (auto Hint = GetValueForARMHint(BuiltinID)) 5186 return Hint; 5187 5188 if (BuiltinID == ARM::BI__emit) { 5189 bool IsThumb = getTarget().getTriple().getArch() == llvm::Triple::thumb; 5190 llvm::FunctionType *FTy = 5191 llvm::FunctionType::get(VoidTy, /*Variadic=*/false); 5192 5193 APSInt Value; 5194 if (!E->getArg(0)->EvaluateAsInt(Value, CGM.getContext())) 5195 llvm_unreachable("Sema will ensure that the parameter is constant"); 5196 5197 uint64_t ZExtValue = Value.zextOrTrunc(IsThumb ? 16 : 32).getZExtValue(); 5198 5199 llvm::InlineAsm *Emit = 5200 IsThumb ? InlineAsm::get(FTy, ".inst.n 0x" + utohexstr(ZExtValue), "", 5201 /*SideEffects=*/true) 5202 : InlineAsm::get(FTy, ".inst 0x" + utohexstr(ZExtValue), "", 5203 /*SideEffects=*/true); 5204 5205 return Builder.CreateCall(Emit); 5206 } 5207 5208 if (BuiltinID == ARM::BI__builtin_arm_dbg) { 5209 Value *Option = EmitScalarExpr(E->getArg(0)); 5210 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_dbg), Option); 5211 } 5212 5213 if (BuiltinID == ARM::BI__builtin_arm_prefetch) { 5214 Value *Address = EmitScalarExpr(E->getArg(0)); 5215 Value *RW = EmitScalarExpr(E->getArg(1)); 5216 Value *IsData = EmitScalarExpr(E->getArg(2)); 5217 5218 // Locality is not supported on ARM target 5219 Value *Locality = llvm::ConstantInt::get(Int32Ty, 3); 5220 5221 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 5222 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 5223 } 5224 5225 if (BuiltinID == ARM::BI__builtin_arm_rbit) { 5226 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 5227 return Builder.CreateCall( 5228 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 5229 } 5230 5231 if (BuiltinID == ARM::BI__clear_cache) { 5232 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 5233 const FunctionDecl *FD = E->getDirectCallee(); 5234 Value *Ops[2]; 5235 for (unsigned i = 0; i < 2; i++) 5236 Ops[i] = EmitScalarExpr(E->getArg(i)); 5237 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 5238 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 5239 StringRef Name = FD->getName(); 5240 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 5241 } 5242 5243 if (BuiltinID == ARM::BI__builtin_arm_mcrr || 5244 BuiltinID == ARM::BI__builtin_arm_mcrr2) { 5245 Function *F; 5246 5247 switch (BuiltinID) { 5248 default: llvm_unreachable("unexpected builtin"); 5249 case ARM::BI__builtin_arm_mcrr: 5250 F = CGM.getIntrinsic(Intrinsic::arm_mcrr); 5251 break; 5252 case ARM::BI__builtin_arm_mcrr2: 5253 F = CGM.getIntrinsic(Intrinsic::arm_mcrr2); 5254 break; 5255 } 5256 5257 // MCRR{2} instruction has 5 operands but 5258 // the intrinsic has 4 because Rt and Rt2 5259 // are represented as a single unsigned 64 5260 // bit integer in the intrinsic definition 5261 // but internally it's represented as 2 32 5262 // bit integers. 5263 5264 Value *Coproc = EmitScalarExpr(E->getArg(0)); 5265 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 5266 Value *RtAndRt2 = EmitScalarExpr(E->getArg(2)); 5267 Value *CRm = EmitScalarExpr(E->getArg(3)); 5268 5269 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 5270 Value *Rt = Builder.CreateTruncOrBitCast(RtAndRt2, Int32Ty); 5271 Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); 5272 Rt2 = Builder.CreateTruncOrBitCast(Rt2, Int32Ty); 5273 5274 return Builder.CreateCall(F, {Coproc, Opc1, Rt, Rt2, CRm}); 5275 } 5276 5277 if (BuiltinID == ARM::BI__builtin_arm_mrrc || 5278 BuiltinID == ARM::BI__builtin_arm_mrrc2) { 5279 Function *F; 5280 5281 switch (BuiltinID) { 5282 default: llvm_unreachable("unexpected builtin"); 5283 case ARM::BI__builtin_arm_mrrc: 5284 F = CGM.getIntrinsic(Intrinsic::arm_mrrc); 5285 break; 5286 case ARM::BI__builtin_arm_mrrc2: 5287 F = CGM.getIntrinsic(Intrinsic::arm_mrrc2); 5288 break; 5289 } 5290 5291 Value *Coproc = EmitScalarExpr(E->getArg(0)); 5292 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 5293 Value *CRm = EmitScalarExpr(E->getArg(2)); 5294 Value *RtAndRt2 = Builder.CreateCall(F, {Coproc, Opc1, CRm}); 5295 5296 // Returns an unsigned 64 bit integer, represented 5297 // as two 32 bit integers. 5298 5299 Value *Rt = Builder.CreateExtractValue(RtAndRt2, 1); 5300 Value *Rt1 = Builder.CreateExtractValue(RtAndRt2, 0); 5301 Rt = Builder.CreateZExt(Rt, Int64Ty); 5302 Rt1 = Builder.CreateZExt(Rt1, Int64Ty); 5303 5304 Value *ShiftCast = llvm::ConstantInt::get(Int64Ty, 32); 5305 RtAndRt2 = Builder.CreateShl(Rt, ShiftCast, "shl", true); 5306 RtAndRt2 = Builder.CreateOr(RtAndRt2, Rt1); 5307 5308 return Builder.CreateBitCast(RtAndRt2, ConvertType(E->getType())); 5309 } 5310 5311 if (BuiltinID == ARM::BI__builtin_arm_ldrexd || 5312 ((BuiltinID == ARM::BI__builtin_arm_ldrex || 5313 BuiltinID == ARM::BI__builtin_arm_ldaex) && 5314 getContext().getTypeSize(E->getType()) == 64) || 5315 BuiltinID == ARM::BI__ldrexd) { 5316 Function *F; 5317 5318 switch (BuiltinID) { 5319 default: llvm_unreachable("unexpected builtin"); 5320 case ARM::BI__builtin_arm_ldaex: 5321 F = CGM.getIntrinsic(Intrinsic::arm_ldaexd); 5322 break; 5323 case ARM::BI__builtin_arm_ldrexd: 5324 case ARM::BI__builtin_arm_ldrex: 5325 case ARM::BI__ldrexd: 5326 F = CGM.getIntrinsic(Intrinsic::arm_ldrexd); 5327 break; 5328 } 5329 5330 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 5331 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 5332 "ldrexd"); 5333 5334 Value *Val0 = Builder.CreateExtractValue(Val, 1); 5335 Value *Val1 = Builder.CreateExtractValue(Val, 0); 5336 Val0 = Builder.CreateZExt(Val0, Int64Ty); 5337 Val1 = Builder.CreateZExt(Val1, Int64Ty); 5338 5339 Value *ShiftCst = llvm::ConstantInt::get(Int64Ty, 32); 5340 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 5341 Val = Builder.CreateOr(Val, Val1); 5342 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 5343 } 5344 5345 if (BuiltinID == ARM::BI__builtin_arm_ldrex || 5346 BuiltinID == ARM::BI__builtin_arm_ldaex) { 5347 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 5348 5349 QualType Ty = E->getType(); 5350 llvm::Type *RealResTy = ConvertType(Ty); 5351 llvm::Type *PtrTy = llvm::IntegerType::get( 5352 getLLVMContext(), getContext().getTypeSize(Ty))->getPointerTo(); 5353 LoadAddr = Builder.CreateBitCast(LoadAddr, PtrTy); 5354 5355 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_ldaex 5356 ? Intrinsic::arm_ldaex 5357 : Intrinsic::arm_ldrex, 5358 PtrTy); 5359 Value *Val = Builder.CreateCall(F, LoadAddr, "ldrex"); 5360 5361 if (RealResTy->isPointerTy()) 5362 return Builder.CreateIntToPtr(Val, RealResTy); 5363 else { 5364 llvm::Type *IntResTy = llvm::IntegerType::get( 5365 getLLVMContext(), CGM.getDataLayout().getTypeSizeInBits(RealResTy)); 5366 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 5367 return Builder.CreateBitCast(Val, RealResTy); 5368 } 5369 } 5370 5371 if (BuiltinID == ARM::BI__builtin_arm_strexd || 5372 ((BuiltinID == ARM::BI__builtin_arm_stlex || 5373 BuiltinID == ARM::BI__builtin_arm_strex) && 5374 getContext().getTypeSize(E->getArg(0)->getType()) == 64)) { 5375 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 5376 ? Intrinsic::arm_stlexd 5377 : Intrinsic::arm_strexd); 5378 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty); 5379 5380 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 5381 Value *Val = EmitScalarExpr(E->getArg(0)); 5382 Builder.CreateStore(Val, Tmp); 5383 5384 Address LdPtr = Builder.CreateBitCast(Tmp,llvm::PointerType::getUnqual(STy)); 5385 Val = Builder.CreateLoad(LdPtr); 5386 5387 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 5388 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 5389 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), Int8PtrTy); 5390 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "strexd"); 5391 } 5392 5393 if (BuiltinID == ARM::BI__builtin_arm_strex || 5394 BuiltinID == ARM::BI__builtin_arm_stlex) { 5395 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 5396 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 5397 5398 QualType Ty = E->getArg(0)->getType(); 5399 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 5400 getContext().getTypeSize(Ty)); 5401 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 5402 5403 if (StoreVal->getType()->isPointerTy()) 5404 StoreVal = Builder.CreatePtrToInt(StoreVal, Int32Ty); 5405 else { 5406 llvm::Type *IntTy = llvm::IntegerType::get( 5407 getLLVMContext(), 5408 CGM.getDataLayout().getTypeSizeInBits(StoreVal->getType())); 5409 StoreVal = Builder.CreateBitCast(StoreVal, IntTy); 5410 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int32Ty); 5411 } 5412 5413 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 5414 ? Intrinsic::arm_stlex 5415 : Intrinsic::arm_strex, 5416 StoreAddr->getType()); 5417 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "strex"); 5418 } 5419 5420 switch (BuiltinID) { 5421 case ARM::BI__iso_volatile_load8: 5422 case ARM::BI__iso_volatile_load16: 5423 case ARM::BI__iso_volatile_load32: 5424 case ARM::BI__iso_volatile_load64: { 5425 Value *Ptr = EmitScalarExpr(E->getArg(0)); 5426 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 5427 CharUnits LoadSize = getContext().getTypeSizeInChars(ElTy); 5428 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 5429 LoadSize.getQuantity() * 8); 5430 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 5431 llvm::LoadInst *Load = 5432 Builder.CreateAlignedLoad(Ptr, LoadSize); 5433 Load->setVolatile(true); 5434 return Load; 5435 } 5436 case ARM::BI__iso_volatile_store8: 5437 case ARM::BI__iso_volatile_store16: 5438 case ARM::BI__iso_volatile_store32: 5439 case ARM::BI__iso_volatile_store64: { 5440 Value *Ptr = EmitScalarExpr(E->getArg(0)); 5441 Value *Value = EmitScalarExpr(E->getArg(1)); 5442 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 5443 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 5444 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 5445 StoreSize.getQuantity() * 8); 5446 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 5447 llvm::StoreInst *Store = 5448 Builder.CreateAlignedStore(Value, Ptr, 5449 StoreSize); 5450 Store->setVolatile(true); 5451 return Store; 5452 } 5453 } 5454 5455 if (BuiltinID == ARM::BI__builtin_arm_clrex) { 5456 Function *F = CGM.getIntrinsic(Intrinsic::arm_clrex); 5457 return Builder.CreateCall(F); 5458 } 5459 5460 // CRC32 5461 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 5462 switch (BuiltinID) { 5463 case ARM::BI__builtin_arm_crc32b: 5464 CRCIntrinsicID = Intrinsic::arm_crc32b; break; 5465 case ARM::BI__builtin_arm_crc32cb: 5466 CRCIntrinsicID = Intrinsic::arm_crc32cb; break; 5467 case ARM::BI__builtin_arm_crc32h: 5468 CRCIntrinsicID = Intrinsic::arm_crc32h; break; 5469 case ARM::BI__builtin_arm_crc32ch: 5470 CRCIntrinsicID = Intrinsic::arm_crc32ch; break; 5471 case ARM::BI__builtin_arm_crc32w: 5472 case ARM::BI__builtin_arm_crc32d: 5473 CRCIntrinsicID = Intrinsic::arm_crc32w; break; 5474 case ARM::BI__builtin_arm_crc32cw: 5475 case ARM::BI__builtin_arm_crc32cd: 5476 CRCIntrinsicID = Intrinsic::arm_crc32cw; break; 5477 } 5478 5479 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 5480 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 5481 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 5482 5483 // crc32{c,}d intrinsics are implemnted as two calls to crc32{c,}w 5484 // intrinsics, hence we need different codegen for these cases. 5485 if (BuiltinID == ARM::BI__builtin_arm_crc32d || 5486 BuiltinID == ARM::BI__builtin_arm_crc32cd) { 5487 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 5488 Value *Arg1a = Builder.CreateTruncOrBitCast(Arg1, Int32Ty); 5489 Value *Arg1b = Builder.CreateLShr(Arg1, C1); 5490 Arg1b = Builder.CreateTruncOrBitCast(Arg1b, Int32Ty); 5491 5492 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 5493 Value *Res = Builder.CreateCall(F, {Arg0, Arg1a}); 5494 return Builder.CreateCall(F, {Res, Arg1b}); 5495 } else { 5496 Arg1 = Builder.CreateZExtOrBitCast(Arg1, Int32Ty); 5497 5498 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 5499 return Builder.CreateCall(F, {Arg0, Arg1}); 5500 } 5501 } 5502 5503 if (BuiltinID == ARM::BI__builtin_arm_rsr || 5504 BuiltinID == ARM::BI__builtin_arm_rsr64 || 5505 BuiltinID == ARM::BI__builtin_arm_rsrp || 5506 BuiltinID == ARM::BI__builtin_arm_wsr || 5507 BuiltinID == ARM::BI__builtin_arm_wsr64 || 5508 BuiltinID == ARM::BI__builtin_arm_wsrp) { 5509 5510 bool IsRead = BuiltinID == ARM::BI__builtin_arm_rsr || 5511 BuiltinID == ARM::BI__builtin_arm_rsr64 || 5512 BuiltinID == ARM::BI__builtin_arm_rsrp; 5513 5514 bool IsPointerBuiltin = BuiltinID == ARM::BI__builtin_arm_rsrp || 5515 BuiltinID == ARM::BI__builtin_arm_wsrp; 5516 5517 bool Is64Bit = BuiltinID == ARM::BI__builtin_arm_rsr64 || 5518 BuiltinID == ARM::BI__builtin_arm_wsr64; 5519 5520 llvm::Type *ValueType; 5521 llvm::Type *RegisterType; 5522 if (IsPointerBuiltin) { 5523 ValueType = VoidPtrTy; 5524 RegisterType = Int32Ty; 5525 } else if (Is64Bit) { 5526 ValueType = RegisterType = Int64Ty; 5527 } else { 5528 ValueType = RegisterType = Int32Ty; 5529 } 5530 5531 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 5532 } 5533 5534 // Find out if any arguments are required to be integer constant 5535 // expressions. 5536 unsigned ICEArguments = 0; 5537 ASTContext::GetBuiltinTypeError Error; 5538 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 5539 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 5540 5541 auto getAlignmentValue32 = [&](Address addr) -> Value* { 5542 return Builder.getInt32(addr.getAlignment().getQuantity()); 5543 }; 5544 5545 Address PtrOp0 = Address::invalid(); 5546 Address PtrOp1 = Address::invalid(); 5547 SmallVector<Value*, 4> Ops; 5548 bool HasExtraArg = HasExtraNeonArgument(BuiltinID); 5549 unsigned NumArgs = E->getNumArgs() - (HasExtraArg ? 1 : 0); 5550 for (unsigned i = 0, e = NumArgs; i != e; i++) { 5551 if (i == 0) { 5552 switch (BuiltinID) { 5553 case NEON::BI__builtin_neon_vld1_v: 5554 case NEON::BI__builtin_neon_vld1q_v: 5555 case NEON::BI__builtin_neon_vld1q_lane_v: 5556 case NEON::BI__builtin_neon_vld1_lane_v: 5557 case NEON::BI__builtin_neon_vld1_dup_v: 5558 case NEON::BI__builtin_neon_vld1q_dup_v: 5559 case NEON::BI__builtin_neon_vst1_v: 5560 case NEON::BI__builtin_neon_vst1q_v: 5561 case NEON::BI__builtin_neon_vst1q_lane_v: 5562 case NEON::BI__builtin_neon_vst1_lane_v: 5563 case NEON::BI__builtin_neon_vst2_v: 5564 case NEON::BI__builtin_neon_vst2q_v: 5565 case NEON::BI__builtin_neon_vst2_lane_v: 5566 case NEON::BI__builtin_neon_vst2q_lane_v: 5567 case NEON::BI__builtin_neon_vst3_v: 5568 case NEON::BI__builtin_neon_vst3q_v: 5569 case NEON::BI__builtin_neon_vst3_lane_v: 5570 case NEON::BI__builtin_neon_vst3q_lane_v: 5571 case NEON::BI__builtin_neon_vst4_v: 5572 case NEON::BI__builtin_neon_vst4q_v: 5573 case NEON::BI__builtin_neon_vst4_lane_v: 5574 case NEON::BI__builtin_neon_vst4q_lane_v: 5575 // Get the alignment for the argument in addition to the value; 5576 // we'll use it later. 5577 PtrOp0 = EmitPointerWithAlignment(E->getArg(0)); 5578 Ops.push_back(PtrOp0.getPointer()); 5579 continue; 5580 } 5581 } 5582 if (i == 1) { 5583 switch (BuiltinID) { 5584 case NEON::BI__builtin_neon_vld2_v: 5585 case NEON::BI__builtin_neon_vld2q_v: 5586 case NEON::BI__builtin_neon_vld3_v: 5587 case NEON::BI__builtin_neon_vld3q_v: 5588 case NEON::BI__builtin_neon_vld4_v: 5589 case NEON::BI__builtin_neon_vld4q_v: 5590 case NEON::BI__builtin_neon_vld2_lane_v: 5591 case NEON::BI__builtin_neon_vld2q_lane_v: 5592 case NEON::BI__builtin_neon_vld3_lane_v: 5593 case NEON::BI__builtin_neon_vld3q_lane_v: 5594 case NEON::BI__builtin_neon_vld4_lane_v: 5595 case NEON::BI__builtin_neon_vld4q_lane_v: 5596 case NEON::BI__builtin_neon_vld2_dup_v: 5597 case NEON::BI__builtin_neon_vld3_dup_v: 5598 case NEON::BI__builtin_neon_vld4_dup_v: 5599 // Get the alignment for the argument in addition to the value; 5600 // we'll use it later. 5601 PtrOp1 = EmitPointerWithAlignment(E->getArg(1)); 5602 Ops.push_back(PtrOp1.getPointer()); 5603 continue; 5604 } 5605 } 5606 5607 if ((ICEArguments & (1 << i)) == 0) { 5608 Ops.push_back(EmitScalarExpr(E->getArg(i))); 5609 } else { 5610 // If this is required to be a constant, constant fold it so that we know 5611 // that the generated intrinsic gets a ConstantInt. 5612 llvm::APSInt Result; 5613 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 5614 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 5615 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 5616 } 5617 } 5618 5619 switch (BuiltinID) { 5620 default: break; 5621 5622 case NEON::BI__builtin_neon_vget_lane_i8: 5623 case NEON::BI__builtin_neon_vget_lane_i16: 5624 case NEON::BI__builtin_neon_vget_lane_i32: 5625 case NEON::BI__builtin_neon_vget_lane_i64: 5626 case NEON::BI__builtin_neon_vget_lane_f32: 5627 case NEON::BI__builtin_neon_vgetq_lane_i8: 5628 case NEON::BI__builtin_neon_vgetq_lane_i16: 5629 case NEON::BI__builtin_neon_vgetq_lane_i32: 5630 case NEON::BI__builtin_neon_vgetq_lane_i64: 5631 case NEON::BI__builtin_neon_vgetq_lane_f32: 5632 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane"); 5633 5634 case NEON::BI__builtin_neon_vrndns_f32: { 5635 Value *Arg = EmitScalarExpr(E->getArg(0)); 5636 llvm::Type *Tys[] = {Arg->getType()}; 5637 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vrintn, Tys); 5638 return Builder.CreateCall(F, {Arg}, "vrndn"); } 5639 5640 case NEON::BI__builtin_neon_vset_lane_i8: 5641 case NEON::BI__builtin_neon_vset_lane_i16: 5642 case NEON::BI__builtin_neon_vset_lane_i32: 5643 case NEON::BI__builtin_neon_vset_lane_i64: 5644 case NEON::BI__builtin_neon_vset_lane_f32: 5645 case NEON::BI__builtin_neon_vsetq_lane_i8: 5646 case NEON::BI__builtin_neon_vsetq_lane_i16: 5647 case NEON::BI__builtin_neon_vsetq_lane_i32: 5648 case NEON::BI__builtin_neon_vsetq_lane_i64: 5649 case NEON::BI__builtin_neon_vsetq_lane_f32: 5650 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5651 5652 case NEON::BI__builtin_neon_vsha1h_u32: 5653 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1h), Ops, 5654 "vsha1h"); 5655 case NEON::BI__builtin_neon_vsha1cq_u32: 5656 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1c), Ops, 5657 "vsha1h"); 5658 case NEON::BI__builtin_neon_vsha1pq_u32: 5659 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1p), Ops, 5660 "vsha1h"); 5661 case NEON::BI__builtin_neon_vsha1mq_u32: 5662 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1m), Ops, 5663 "vsha1h"); 5664 5665 // The ARM _MoveToCoprocessor builtins put the input register value as 5666 // the first argument, but the LLVM intrinsic expects it as the third one. 5667 case ARM::BI_MoveToCoprocessor: 5668 case ARM::BI_MoveToCoprocessor2: { 5669 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI_MoveToCoprocessor ? 5670 Intrinsic::arm_mcr : Intrinsic::arm_mcr2); 5671 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0], 5672 Ops[3], Ops[4], Ops[5]}); 5673 } 5674 case ARM::BI_BitScanForward: 5675 case ARM::BI_BitScanForward64: 5676 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 5677 case ARM::BI_BitScanReverse: 5678 case ARM::BI_BitScanReverse64: 5679 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 5680 5681 case ARM::BI_InterlockedAnd64: 5682 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 5683 case ARM::BI_InterlockedExchange64: 5684 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 5685 case ARM::BI_InterlockedExchangeAdd64: 5686 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 5687 case ARM::BI_InterlockedExchangeSub64: 5688 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 5689 case ARM::BI_InterlockedOr64: 5690 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 5691 case ARM::BI_InterlockedXor64: 5692 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 5693 case ARM::BI_InterlockedDecrement64: 5694 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 5695 case ARM::BI_InterlockedIncrement64: 5696 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 5697 } 5698 5699 // Get the last argument, which specifies the vector type. 5700 assert(HasExtraArg); 5701 llvm::APSInt Result; 5702 const Expr *Arg = E->getArg(E->getNumArgs()-1); 5703 if (!Arg->isIntegerConstantExpr(Result, getContext())) 5704 return nullptr; 5705 5706 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f || 5707 BuiltinID == ARM::BI__builtin_arm_vcvtr_d) { 5708 // Determine the overloaded type of this builtin. 5709 llvm::Type *Ty; 5710 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f) 5711 Ty = FloatTy; 5712 else 5713 Ty = DoubleTy; 5714 5715 // Determine whether this is an unsigned conversion or not. 5716 bool usgn = Result.getZExtValue() == 1; 5717 unsigned Int = usgn ? Intrinsic::arm_vcvtru : Intrinsic::arm_vcvtr; 5718 5719 // Call the appropriate intrinsic. 5720 Function *F = CGM.getIntrinsic(Int, Ty); 5721 return Builder.CreateCall(F, Ops, "vcvtr"); 5722 } 5723 5724 // Determine the type of this overloaded NEON intrinsic. 5725 NeonTypeFlags Type(Result.getZExtValue()); 5726 bool usgn = Type.isUnsigned(); 5727 bool rightShift = false; 5728 5729 llvm::VectorType *VTy = GetNeonType(this, Type, 5730 getTarget().hasLegalHalfType()); 5731 llvm::Type *Ty = VTy; 5732 if (!Ty) 5733 return nullptr; 5734 5735 // Many NEON builtins have identical semantics and uses in ARM and 5736 // AArch64. Emit these in a single function. 5737 auto IntrinsicMap = makeArrayRef(ARMSIMDIntrinsicMap); 5738 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 5739 IntrinsicMap, BuiltinID, NEONSIMDIntrinsicsProvenSorted); 5740 if (Builtin) 5741 return EmitCommonNeonBuiltinExpr( 5742 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 5743 Builtin->NameHint, Builtin->TypeModifier, E, Ops, PtrOp0, PtrOp1, Arch); 5744 5745 unsigned Int; 5746 switch (BuiltinID) { 5747 default: return nullptr; 5748 case NEON::BI__builtin_neon_vld1q_lane_v: 5749 // Handle 64-bit integer elements as a special case. Use shuffles of 5750 // one-element vectors to avoid poor code for i64 in the backend. 5751 if (VTy->getElementType()->isIntegerTy(64)) { 5752 // Extract the other lane. 5753 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5754 uint32_t Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); 5755 Value *SV = llvm::ConstantVector::get(ConstantInt::get(Int32Ty, 1-Lane)); 5756 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 5757 // Load the value as a one-element vector. 5758 Ty = llvm::VectorType::get(VTy->getElementType(), 1); 5759 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 5760 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Tys); 5761 Value *Align = getAlignmentValue32(PtrOp0); 5762 Value *Ld = Builder.CreateCall(F, {Ops[0], Align}); 5763 // Combine them. 5764 uint32_t Indices[] = {1 - Lane, Lane}; 5765 SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 5766 return Builder.CreateShuffleVector(Ops[1], Ld, SV, "vld1q_lane"); 5767 } 5768 LLVM_FALLTHROUGH; 5769 case NEON::BI__builtin_neon_vld1_lane_v: { 5770 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5771 PtrOp0 = Builder.CreateElementBitCast(PtrOp0, VTy->getElementType()); 5772 Value *Ld = Builder.CreateLoad(PtrOp0); 5773 return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); 5774 } 5775 case NEON::BI__builtin_neon_vld2_dup_v: 5776 case NEON::BI__builtin_neon_vld3_dup_v: 5777 case NEON::BI__builtin_neon_vld4_dup_v: { 5778 // Handle 64-bit elements as a special-case. There is no "dup" needed. 5779 if (VTy->getElementType()->getPrimitiveSizeInBits() == 64) { 5780 switch (BuiltinID) { 5781 case NEON::BI__builtin_neon_vld2_dup_v: 5782 Int = Intrinsic::arm_neon_vld2; 5783 break; 5784 case NEON::BI__builtin_neon_vld3_dup_v: 5785 Int = Intrinsic::arm_neon_vld3; 5786 break; 5787 case NEON::BI__builtin_neon_vld4_dup_v: 5788 Int = Intrinsic::arm_neon_vld4; 5789 break; 5790 default: llvm_unreachable("unknown vld_dup intrinsic?"); 5791 } 5792 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 5793 Function *F = CGM.getIntrinsic(Int, Tys); 5794 llvm::Value *Align = getAlignmentValue32(PtrOp1); 5795 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, "vld_dup"); 5796 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5797 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5798 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5799 } 5800 switch (BuiltinID) { 5801 case NEON::BI__builtin_neon_vld2_dup_v: 5802 Int = Intrinsic::arm_neon_vld2lane; 5803 break; 5804 case NEON::BI__builtin_neon_vld3_dup_v: 5805 Int = Intrinsic::arm_neon_vld3lane; 5806 break; 5807 case NEON::BI__builtin_neon_vld4_dup_v: 5808 Int = Intrinsic::arm_neon_vld4lane; 5809 break; 5810 default: llvm_unreachable("unknown vld_dup intrinsic?"); 5811 } 5812 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 5813 Function *F = CGM.getIntrinsic(Int, Tys); 5814 llvm::StructType *STy = cast<llvm::StructType>(F->getReturnType()); 5815 5816 SmallVector<Value*, 6> Args; 5817 Args.push_back(Ops[1]); 5818 Args.append(STy->getNumElements(), UndefValue::get(Ty)); 5819 5820 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 5821 Args.push_back(CI); 5822 Args.push_back(getAlignmentValue32(PtrOp1)); 5823 5824 Ops[1] = Builder.CreateCall(F, Args, "vld_dup"); 5825 // splat lane 0 to all elts in each vector of the result. 5826 for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { 5827 Value *Val = Builder.CreateExtractValue(Ops[1], i); 5828 Value *Elt = Builder.CreateBitCast(Val, Ty); 5829 Elt = EmitNeonSplat(Elt, CI); 5830 Elt = Builder.CreateBitCast(Elt, Val->getType()); 5831 Ops[1] = Builder.CreateInsertValue(Ops[1], Elt, i); 5832 } 5833 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5834 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5835 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5836 } 5837 case NEON::BI__builtin_neon_vqrshrn_n_v: 5838 Int = 5839 usgn ? Intrinsic::arm_neon_vqrshiftnu : Intrinsic::arm_neon_vqrshiftns; 5840 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n", 5841 1, true); 5842 case NEON::BI__builtin_neon_vqrshrun_n_v: 5843 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqrshiftnsu, Ty), 5844 Ops, "vqrshrun_n", 1, true); 5845 case NEON::BI__builtin_neon_vqshrn_n_v: 5846 Int = usgn ? Intrinsic::arm_neon_vqshiftnu : Intrinsic::arm_neon_vqshiftns; 5847 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n", 5848 1, true); 5849 case NEON::BI__builtin_neon_vqshrun_n_v: 5850 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqshiftnsu, Ty), 5851 Ops, "vqshrun_n", 1, true); 5852 case NEON::BI__builtin_neon_vrecpe_v: 5853 case NEON::BI__builtin_neon_vrecpeq_v: 5854 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecpe, Ty), 5855 Ops, "vrecpe"); 5856 case NEON::BI__builtin_neon_vrshrn_n_v: 5857 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrshiftn, Ty), 5858 Ops, "vrshrn_n", 1, true); 5859 case NEON::BI__builtin_neon_vrsra_n_v: 5860 case NEON::BI__builtin_neon_vrsraq_n_v: 5861 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5862 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5863 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, true); 5864 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 5865 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Ty), {Ops[1], Ops[2]}); 5866 return Builder.CreateAdd(Ops[0], Ops[1], "vrsra_n"); 5867 case NEON::BI__builtin_neon_vsri_n_v: 5868 case NEON::BI__builtin_neon_vsriq_n_v: 5869 rightShift = true; 5870 LLVM_FALLTHROUGH; 5871 case NEON::BI__builtin_neon_vsli_n_v: 5872 case NEON::BI__builtin_neon_vsliq_n_v: 5873 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, rightShift); 5874 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vshiftins, Ty), 5875 Ops, "vsli_n"); 5876 case NEON::BI__builtin_neon_vsra_n_v: 5877 case NEON::BI__builtin_neon_vsraq_n_v: 5878 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5879 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 5880 return Builder.CreateAdd(Ops[0], Ops[1]); 5881 case NEON::BI__builtin_neon_vst1q_lane_v: 5882 // Handle 64-bit integer elements as a special case. Use a shuffle to get 5883 // a one-element vector and avoid poor code for i64 in the backend. 5884 if (VTy->getElementType()->isIntegerTy(64)) { 5885 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5886 Value *SV = llvm::ConstantVector::get(cast<llvm::Constant>(Ops[2])); 5887 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 5888 Ops[2] = getAlignmentValue32(PtrOp0); 5889 llvm::Type *Tys[] = {Int8PtrTy, Ops[1]->getType()}; 5890 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, 5891 Tys), Ops); 5892 } 5893 LLVM_FALLTHROUGH; 5894 case NEON::BI__builtin_neon_vst1_lane_v: { 5895 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5896 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 5897 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5898 auto St = Builder.CreateStore(Ops[1], Builder.CreateBitCast(PtrOp0, Ty)); 5899 return St; 5900 } 5901 case NEON::BI__builtin_neon_vtbl1_v: 5902 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl1), 5903 Ops, "vtbl1"); 5904 case NEON::BI__builtin_neon_vtbl2_v: 5905 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl2), 5906 Ops, "vtbl2"); 5907 case NEON::BI__builtin_neon_vtbl3_v: 5908 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl3), 5909 Ops, "vtbl3"); 5910 case NEON::BI__builtin_neon_vtbl4_v: 5911 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl4), 5912 Ops, "vtbl4"); 5913 case NEON::BI__builtin_neon_vtbx1_v: 5914 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx1), 5915 Ops, "vtbx1"); 5916 case NEON::BI__builtin_neon_vtbx2_v: 5917 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx2), 5918 Ops, "vtbx2"); 5919 case NEON::BI__builtin_neon_vtbx3_v: 5920 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx3), 5921 Ops, "vtbx3"); 5922 case NEON::BI__builtin_neon_vtbx4_v: 5923 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx4), 5924 Ops, "vtbx4"); 5925 } 5926 } 5927 5928 static Value *EmitAArch64TblBuiltinExpr(CodeGenFunction &CGF, unsigned BuiltinID, 5929 const CallExpr *E, 5930 SmallVectorImpl<Value *> &Ops, 5931 llvm::Triple::ArchType Arch) { 5932 unsigned int Int = 0; 5933 const char *s = nullptr; 5934 5935 switch (BuiltinID) { 5936 default: 5937 return nullptr; 5938 case NEON::BI__builtin_neon_vtbl1_v: 5939 case NEON::BI__builtin_neon_vqtbl1_v: 5940 case NEON::BI__builtin_neon_vqtbl1q_v: 5941 case NEON::BI__builtin_neon_vtbl2_v: 5942 case NEON::BI__builtin_neon_vqtbl2_v: 5943 case NEON::BI__builtin_neon_vqtbl2q_v: 5944 case NEON::BI__builtin_neon_vtbl3_v: 5945 case NEON::BI__builtin_neon_vqtbl3_v: 5946 case NEON::BI__builtin_neon_vqtbl3q_v: 5947 case NEON::BI__builtin_neon_vtbl4_v: 5948 case NEON::BI__builtin_neon_vqtbl4_v: 5949 case NEON::BI__builtin_neon_vqtbl4q_v: 5950 break; 5951 case NEON::BI__builtin_neon_vtbx1_v: 5952 case NEON::BI__builtin_neon_vqtbx1_v: 5953 case NEON::BI__builtin_neon_vqtbx1q_v: 5954 case NEON::BI__builtin_neon_vtbx2_v: 5955 case NEON::BI__builtin_neon_vqtbx2_v: 5956 case NEON::BI__builtin_neon_vqtbx2q_v: 5957 case NEON::BI__builtin_neon_vtbx3_v: 5958 case NEON::BI__builtin_neon_vqtbx3_v: 5959 case NEON::BI__builtin_neon_vqtbx3q_v: 5960 case NEON::BI__builtin_neon_vtbx4_v: 5961 case NEON::BI__builtin_neon_vqtbx4_v: 5962 case NEON::BI__builtin_neon_vqtbx4q_v: 5963 break; 5964 } 5965 5966 assert(E->getNumArgs() >= 3); 5967 5968 // Get the last argument, which specifies the vector type. 5969 llvm::APSInt Result; 5970 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 5971 if (!Arg->isIntegerConstantExpr(Result, CGF.getContext())) 5972 return nullptr; 5973 5974 // Determine the type of this overloaded NEON intrinsic. 5975 NeonTypeFlags Type(Result.getZExtValue()); 5976 llvm::VectorType *Ty = GetNeonType(&CGF, Type); 5977 if (!Ty) 5978 return nullptr; 5979 5980 CodeGen::CGBuilderTy &Builder = CGF.Builder; 5981 5982 // AArch64 scalar builtins are not overloaded, they do not have an extra 5983 // argument that specifies the vector type, need to handle each case. 5984 switch (BuiltinID) { 5985 case NEON::BI__builtin_neon_vtbl1_v: { 5986 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 1), nullptr, 5987 Ops[1], Ty, Intrinsic::aarch64_neon_tbl1, 5988 "vtbl1"); 5989 } 5990 case NEON::BI__builtin_neon_vtbl2_v: { 5991 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 2), nullptr, 5992 Ops[2], Ty, Intrinsic::aarch64_neon_tbl1, 5993 "vtbl1"); 5994 } 5995 case NEON::BI__builtin_neon_vtbl3_v: { 5996 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 3), nullptr, 5997 Ops[3], Ty, Intrinsic::aarch64_neon_tbl2, 5998 "vtbl2"); 5999 } 6000 case NEON::BI__builtin_neon_vtbl4_v: { 6001 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 4), nullptr, 6002 Ops[4], Ty, Intrinsic::aarch64_neon_tbl2, 6003 "vtbl2"); 6004 } 6005 case NEON::BI__builtin_neon_vtbx1_v: { 6006 Value *TblRes = 6007 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 1), nullptr, Ops[2], 6008 Ty, Intrinsic::aarch64_neon_tbl1, "vtbl1"); 6009 6010 llvm::Constant *EightV = ConstantInt::get(Ty, 8); 6011 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[2], EightV); 6012 CmpRes = Builder.CreateSExt(CmpRes, Ty); 6013 6014 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 6015 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 6016 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 6017 } 6018 case NEON::BI__builtin_neon_vtbx2_v: { 6019 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 2), Ops[0], 6020 Ops[3], Ty, Intrinsic::aarch64_neon_tbx1, 6021 "vtbx1"); 6022 } 6023 case NEON::BI__builtin_neon_vtbx3_v: { 6024 Value *TblRes = 6025 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 3), nullptr, Ops[4], 6026 Ty, Intrinsic::aarch64_neon_tbl2, "vtbl2"); 6027 6028 llvm::Constant *TwentyFourV = ConstantInt::get(Ty, 24); 6029 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[4], 6030 TwentyFourV); 6031 CmpRes = Builder.CreateSExt(CmpRes, Ty); 6032 6033 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 6034 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 6035 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 6036 } 6037 case NEON::BI__builtin_neon_vtbx4_v: { 6038 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 4), Ops[0], 6039 Ops[5], Ty, Intrinsic::aarch64_neon_tbx2, 6040 "vtbx2"); 6041 } 6042 case NEON::BI__builtin_neon_vqtbl1_v: 6043 case NEON::BI__builtin_neon_vqtbl1q_v: 6044 Int = Intrinsic::aarch64_neon_tbl1; s = "vtbl1"; break; 6045 case NEON::BI__builtin_neon_vqtbl2_v: 6046 case NEON::BI__builtin_neon_vqtbl2q_v: { 6047 Int = Intrinsic::aarch64_neon_tbl2; s = "vtbl2"; break; 6048 case NEON::BI__builtin_neon_vqtbl3_v: 6049 case NEON::BI__builtin_neon_vqtbl3q_v: 6050 Int = Intrinsic::aarch64_neon_tbl3; s = "vtbl3"; break; 6051 case NEON::BI__builtin_neon_vqtbl4_v: 6052 case NEON::BI__builtin_neon_vqtbl4q_v: 6053 Int = Intrinsic::aarch64_neon_tbl4; s = "vtbl4"; break; 6054 case NEON::BI__builtin_neon_vqtbx1_v: 6055 case NEON::BI__builtin_neon_vqtbx1q_v: 6056 Int = Intrinsic::aarch64_neon_tbx1; s = "vtbx1"; break; 6057 case NEON::BI__builtin_neon_vqtbx2_v: 6058 case NEON::BI__builtin_neon_vqtbx2q_v: 6059 Int = Intrinsic::aarch64_neon_tbx2; s = "vtbx2"; break; 6060 case NEON::BI__builtin_neon_vqtbx3_v: 6061 case NEON::BI__builtin_neon_vqtbx3q_v: 6062 Int = Intrinsic::aarch64_neon_tbx3; s = "vtbx3"; break; 6063 case NEON::BI__builtin_neon_vqtbx4_v: 6064 case NEON::BI__builtin_neon_vqtbx4q_v: 6065 Int = Intrinsic::aarch64_neon_tbx4; s = "vtbx4"; break; 6066 } 6067 } 6068 6069 if (!Int) 6070 return nullptr; 6071 6072 Function *F = CGF.CGM.getIntrinsic(Int, Ty); 6073 return CGF.EmitNeonCall(F, Ops, s); 6074 } 6075 6076 Value *CodeGenFunction::vectorWrapScalar16(Value *Op) { 6077 llvm::Type *VTy = llvm::VectorType::get(Int16Ty, 4); 6078 Op = Builder.CreateBitCast(Op, Int16Ty); 6079 Value *V = UndefValue::get(VTy); 6080 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 6081 Op = Builder.CreateInsertElement(V, Op, CI); 6082 return Op; 6083 } 6084 6085 Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, 6086 const CallExpr *E, 6087 llvm::Triple::ArchType Arch) { 6088 unsigned HintID = static_cast<unsigned>(-1); 6089 switch (BuiltinID) { 6090 default: break; 6091 case AArch64::BI__builtin_arm_nop: 6092 HintID = 0; 6093 break; 6094 case AArch64::BI__builtin_arm_yield: 6095 HintID = 1; 6096 break; 6097 case AArch64::BI__builtin_arm_wfe: 6098 HintID = 2; 6099 break; 6100 case AArch64::BI__builtin_arm_wfi: 6101 HintID = 3; 6102 break; 6103 case AArch64::BI__builtin_arm_sev: 6104 HintID = 4; 6105 break; 6106 case AArch64::BI__builtin_arm_sevl: 6107 HintID = 5; 6108 break; 6109 } 6110 6111 if (HintID != static_cast<unsigned>(-1)) { 6112 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_hint); 6113 return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID)); 6114 } 6115 6116 if (BuiltinID == AArch64::BI__builtin_arm_prefetch) { 6117 Value *Address = EmitScalarExpr(E->getArg(0)); 6118 Value *RW = EmitScalarExpr(E->getArg(1)); 6119 Value *CacheLevel = EmitScalarExpr(E->getArg(2)); 6120 Value *RetentionPolicy = EmitScalarExpr(E->getArg(3)); 6121 Value *IsData = EmitScalarExpr(E->getArg(4)); 6122 6123 Value *Locality = nullptr; 6124 if (cast<llvm::ConstantInt>(RetentionPolicy)->isZero()) { 6125 // Temporal fetch, needs to convert cache level to locality. 6126 Locality = llvm::ConstantInt::get(Int32Ty, 6127 -cast<llvm::ConstantInt>(CacheLevel)->getValue() + 3); 6128 } else { 6129 // Streaming fetch. 6130 Locality = llvm::ConstantInt::get(Int32Ty, 0); 6131 } 6132 6133 // FIXME: We need AArch64 specific LLVM intrinsic if we want to specify 6134 // PLDL3STRM or PLDL2STRM. 6135 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 6136 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 6137 } 6138 6139 if (BuiltinID == AArch64::BI__builtin_arm_rbit) { 6140 assert((getContext().getTypeSize(E->getType()) == 32) && 6141 "rbit of unusual size!"); 6142 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 6143 return Builder.CreateCall( 6144 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 6145 } 6146 if (BuiltinID == AArch64::BI__builtin_arm_rbit64) { 6147 assert((getContext().getTypeSize(E->getType()) == 64) && 6148 "rbit of unusual size!"); 6149 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 6150 return Builder.CreateCall( 6151 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 6152 } 6153 6154 if (BuiltinID == AArch64::BI__clear_cache) { 6155 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 6156 const FunctionDecl *FD = E->getDirectCallee(); 6157 Value *Ops[2]; 6158 for (unsigned i = 0; i < 2; i++) 6159 Ops[i] = EmitScalarExpr(E->getArg(i)); 6160 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 6161 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 6162 StringRef Name = FD->getName(); 6163 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 6164 } 6165 6166 if ((BuiltinID == AArch64::BI__builtin_arm_ldrex || 6167 BuiltinID == AArch64::BI__builtin_arm_ldaex) && 6168 getContext().getTypeSize(E->getType()) == 128) { 6169 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 6170 ? Intrinsic::aarch64_ldaxp 6171 : Intrinsic::aarch64_ldxp); 6172 6173 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 6174 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 6175 "ldxp"); 6176 6177 Value *Val0 = Builder.CreateExtractValue(Val, 1); 6178 Value *Val1 = Builder.CreateExtractValue(Val, 0); 6179 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 6180 Val0 = Builder.CreateZExt(Val0, Int128Ty); 6181 Val1 = Builder.CreateZExt(Val1, Int128Ty); 6182 6183 Value *ShiftCst = llvm::ConstantInt::get(Int128Ty, 64); 6184 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 6185 Val = Builder.CreateOr(Val, Val1); 6186 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 6187 } else if (BuiltinID == AArch64::BI__builtin_arm_ldrex || 6188 BuiltinID == AArch64::BI__builtin_arm_ldaex) { 6189 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 6190 6191 QualType Ty = E->getType(); 6192 llvm::Type *RealResTy = ConvertType(Ty); 6193 llvm::Type *PtrTy = llvm::IntegerType::get( 6194 getLLVMContext(), getContext().getTypeSize(Ty))->getPointerTo(); 6195 LoadAddr = Builder.CreateBitCast(LoadAddr, PtrTy); 6196 6197 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 6198 ? Intrinsic::aarch64_ldaxr 6199 : Intrinsic::aarch64_ldxr, 6200 PtrTy); 6201 Value *Val = Builder.CreateCall(F, LoadAddr, "ldxr"); 6202 6203 if (RealResTy->isPointerTy()) 6204 return Builder.CreateIntToPtr(Val, RealResTy); 6205 6206 llvm::Type *IntResTy = llvm::IntegerType::get( 6207 getLLVMContext(), CGM.getDataLayout().getTypeSizeInBits(RealResTy)); 6208 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 6209 return Builder.CreateBitCast(Val, RealResTy); 6210 } 6211 6212 if ((BuiltinID == AArch64::BI__builtin_arm_strex || 6213 BuiltinID == AArch64::BI__builtin_arm_stlex) && 6214 getContext().getTypeSize(E->getArg(0)->getType()) == 128) { 6215 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 6216 ? Intrinsic::aarch64_stlxp 6217 : Intrinsic::aarch64_stxp); 6218 llvm::Type *STy = llvm::StructType::get(Int64Ty, Int64Ty); 6219 6220 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 6221 EmitAnyExprToMem(E->getArg(0), Tmp, Qualifiers(), /*init*/ true); 6222 6223 Tmp = Builder.CreateBitCast(Tmp, llvm::PointerType::getUnqual(STy)); 6224 llvm::Value *Val = Builder.CreateLoad(Tmp); 6225 6226 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 6227 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 6228 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), 6229 Int8PtrTy); 6230 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "stxp"); 6231 } 6232 6233 if (BuiltinID == AArch64::BI__builtin_arm_strex || 6234 BuiltinID == AArch64::BI__builtin_arm_stlex) { 6235 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 6236 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 6237 6238 QualType Ty = E->getArg(0)->getType(); 6239 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 6240 getContext().getTypeSize(Ty)); 6241 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 6242 6243 if (StoreVal->getType()->isPointerTy()) 6244 StoreVal = Builder.CreatePtrToInt(StoreVal, Int64Ty); 6245 else { 6246 llvm::Type *IntTy = llvm::IntegerType::get( 6247 getLLVMContext(), 6248 CGM.getDataLayout().getTypeSizeInBits(StoreVal->getType())); 6249 StoreVal = Builder.CreateBitCast(StoreVal, IntTy); 6250 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int64Ty); 6251 } 6252 6253 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 6254 ? Intrinsic::aarch64_stlxr 6255 : Intrinsic::aarch64_stxr, 6256 StoreAddr->getType()); 6257 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "stxr"); 6258 } 6259 6260 if (BuiltinID == AArch64::BI__builtin_arm_clrex) { 6261 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_clrex); 6262 return Builder.CreateCall(F); 6263 } 6264 6265 // CRC32 6266 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 6267 switch (BuiltinID) { 6268 case AArch64::BI__builtin_arm_crc32b: 6269 CRCIntrinsicID = Intrinsic::aarch64_crc32b; break; 6270 case AArch64::BI__builtin_arm_crc32cb: 6271 CRCIntrinsicID = Intrinsic::aarch64_crc32cb; break; 6272 case AArch64::BI__builtin_arm_crc32h: 6273 CRCIntrinsicID = Intrinsic::aarch64_crc32h; break; 6274 case AArch64::BI__builtin_arm_crc32ch: 6275 CRCIntrinsicID = Intrinsic::aarch64_crc32ch; break; 6276 case AArch64::BI__builtin_arm_crc32w: 6277 CRCIntrinsicID = Intrinsic::aarch64_crc32w; break; 6278 case AArch64::BI__builtin_arm_crc32cw: 6279 CRCIntrinsicID = Intrinsic::aarch64_crc32cw; break; 6280 case AArch64::BI__builtin_arm_crc32d: 6281 CRCIntrinsicID = Intrinsic::aarch64_crc32x; break; 6282 case AArch64::BI__builtin_arm_crc32cd: 6283 CRCIntrinsicID = Intrinsic::aarch64_crc32cx; break; 6284 } 6285 6286 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 6287 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 6288 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 6289 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 6290 6291 llvm::Type *DataTy = F->getFunctionType()->getParamType(1); 6292 Arg1 = Builder.CreateZExtOrBitCast(Arg1, DataTy); 6293 6294 return Builder.CreateCall(F, {Arg0, Arg1}); 6295 } 6296 6297 if (BuiltinID == AArch64::BI__builtin_arm_rsr || 6298 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 6299 BuiltinID == AArch64::BI__builtin_arm_rsrp || 6300 BuiltinID == AArch64::BI__builtin_arm_wsr || 6301 BuiltinID == AArch64::BI__builtin_arm_wsr64 || 6302 BuiltinID == AArch64::BI__builtin_arm_wsrp) { 6303 6304 bool IsRead = BuiltinID == AArch64::BI__builtin_arm_rsr || 6305 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 6306 BuiltinID == AArch64::BI__builtin_arm_rsrp; 6307 6308 bool IsPointerBuiltin = BuiltinID == AArch64::BI__builtin_arm_rsrp || 6309 BuiltinID == AArch64::BI__builtin_arm_wsrp; 6310 6311 bool Is64Bit = BuiltinID != AArch64::BI__builtin_arm_rsr && 6312 BuiltinID != AArch64::BI__builtin_arm_wsr; 6313 6314 llvm::Type *ValueType; 6315 llvm::Type *RegisterType = Int64Ty; 6316 if (IsPointerBuiltin) { 6317 ValueType = VoidPtrTy; 6318 } else if (Is64Bit) { 6319 ValueType = Int64Ty; 6320 } else { 6321 ValueType = Int32Ty; 6322 } 6323 6324 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 6325 } 6326 6327 // Find out if any arguments are required to be integer constant 6328 // expressions. 6329 unsigned ICEArguments = 0; 6330 ASTContext::GetBuiltinTypeError Error; 6331 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 6332 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 6333 6334 llvm::SmallVector<Value*, 4> Ops; 6335 for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; i++) { 6336 if ((ICEArguments & (1 << i)) == 0) { 6337 Ops.push_back(EmitScalarExpr(E->getArg(i))); 6338 } else { 6339 // If this is required to be a constant, constant fold it so that we know 6340 // that the generated intrinsic gets a ConstantInt. 6341 llvm::APSInt Result; 6342 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 6343 assert(IsConst && "Constant arg isn't actually constant?"); 6344 (void)IsConst; 6345 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 6346 } 6347 } 6348 6349 auto SISDMap = makeArrayRef(AArch64SISDIntrinsicMap); 6350 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 6351 SISDMap, BuiltinID, AArch64SISDIntrinsicsProvenSorted); 6352 6353 if (Builtin) { 6354 Ops.push_back(EmitScalarExpr(E->getArg(E->getNumArgs() - 1))); 6355 Value *Result = EmitCommonNeonSISDBuiltinExpr(*this, *Builtin, Ops, E); 6356 assert(Result && "SISD intrinsic should have been handled"); 6357 return Result; 6358 } 6359 6360 llvm::APSInt Result; 6361 const Expr *Arg = E->getArg(E->getNumArgs()-1); 6362 NeonTypeFlags Type(0); 6363 if (Arg->isIntegerConstantExpr(Result, getContext())) 6364 // Determine the type of this overloaded NEON intrinsic. 6365 Type = NeonTypeFlags(Result.getZExtValue()); 6366 6367 bool usgn = Type.isUnsigned(); 6368 bool quad = Type.isQuad(); 6369 6370 // Handle non-overloaded intrinsics first. 6371 switch (BuiltinID) { 6372 default: break; 6373 case NEON::BI__builtin_neon_vabsh_f16: 6374 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6375 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, HalfTy), Ops, "vabs"); 6376 case NEON::BI__builtin_neon_vldrq_p128: { 6377 llvm::Type *Int128Ty = llvm::Type::getIntNTy(getLLVMContext(), 128); 6378 llvm::Type *Int128PTy = llvm::PointerType::get(Int128Ty, 0); 6379 Value *Ptr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PTy); 6380 return Builder.CreateAlignedLoad(Int128Ty, Ptr, 6381 CharUnits::fromQuantity(16)); 6382 } 6383 case NEON::BI__builtin_neon_vstrq_p128: { 6384 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 6385 Value *Ptr = Builder.CreateBitCast(Ops[0], Int128PTy); 6386 return Builder.CreateDefaultAlignedStore(EmitScalarExpr(E->getArg(1)), Ptr); 6387 } 6388 case NEON::BI__builtin_neon_vcvts_u32_f32: 6389 case NEON::BI__builtin_neon_vcvtd_u64_f64: 6390 usgn = true; 6391 LLVM_FALLTHROUGH; 6392 case NEON::BI__builtin_neon_vcvts_s32_f32: 6393 case NEON::BI__builtin_neon_vcvtd_s64_f64: { 6394 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6395 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 6396 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 6397 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 6398 Ops[0] = Builder.CreateBitCast(Ops[0], FTy); 6399 if (usgn) 6400 return Builder.CreateFPToUI(Ops[0], InTy); 6401 return Builder.CreateFPToSI(Ops[0], InTy); 6402 } 6403 case NEON::BI__builtin_neon_vcvts_f32_u32: 6404 case NEON::BI__builtin_neon_vcvtd_f64_u64: 6405 usgn = true; 6406 LLVM_FALLTHROUGH; 6407 case NEON::BI__builtin_neon_vcvts_f32_s32: 6408 case NEON::BI__builtin_neon_vcvtd_f64_s64: { 6409 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6410 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 6411 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 6412 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 6413 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 6414 if (usgn) 6415 return Builder.CreateUIToFP(Ops[0], FTy); 6416 return Builder.CreateSIToFP(Ops[0], FTy); 6417 } 6418 case NEON::BI__builtin_neon_vcvth_f16_u16: 6419 case NEON::BI__builtin_neon_vcvth_f16_u32: 6420 case NEON::BI__builtin_neon_vcvth_f16_u64: 6421 usgn = true; 6422 // FALL THROUGH 6423 case NEON::BI__builtin_neon_vcvth_f16_s16: 6424 case NEON::BI__builtin_neon_vcvth_f16_s32: 6425 case NEON::BI__builtin_neon_vcvth_f16_s64: { 6426 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6427 llvm::Type *FTy = HalfTy; 6428 llvm::Type *InTy; 6429 if (Ops[0]->getType()->getPrimitiveSizeInBits() == 64) 6430 InTy = Int64Ty; 6431 else if (Ops[0]->getType()->getPrimitiveSizeInBits() == 32) 6432 InTy = Int32Ty; 6433 else 6434 InTy = Int16Ty; 6435 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 6436 if (usgn) 6437 return Builder.CreateUIToFP(Ops[0], FTy); 6438 return Builder.CreateSIToFP(Ops[0], FTy); 6439 } 6440 case NEON::BI__builtin_neon_vcvth_u16_f16: 6441 usgn = true; 6442 // FALL THROUGH 6443 case NEON::BI__builtin_neon_vcvth_s16_f16: { 6444 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6445 Ops[0] = Builder.CreateBitCast(Ops[0], HalfTy); 6446 if (usgn) 6447 return Builder.CreateFPToUI(Ops[0], Int16Ty); 6448 return Builder.CreateFPToSI(Ops[0], Int16Ty); 6449 } 6450 case NEON::BI__builtin_neon_vcvth_u32_f16: 6451 usgn = true; 6452 // FALL THROUGH 6453 case NEON::BI__builtin_neon_vcvth_s32_f16: { 6454 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6455 Ops[0] = Builder.CreateBitCast(Ops[0], HalfTy); 6456 if (usgn) 6457 return Builder.CreateFPToUI(Ops[0], Int32Ty); 6458 return Builder.CreateFPToSI(Ops[0], Int32Ty); 6459 } 6460 case NEON::BI__builtin_neon_vcvth_u64_f16: 6461 usgn = true; 6462 // FALL THROUGH 6463 case NEON::BI__builtin_neon_vcvth_s64_f16: { 6464 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6465 Ops[0] = Builder.CreateBitCast(Ops[0], HalfTy); 6466 if (usgn) 6467 return Builder.CreateFPToUI(Ops[0], Int64Ty); 6468 return Builder.CreateFPToSI(Ops[0], Int64Ty); 6469 } 6470 case NEON::BI__builtin_neon_vcvtah_u16_f16: 6471 case NEON::BI__builtin_neon_vcvtmh_u16_f16: 6472 case NEON::BI__builtin_neon_vcvtnh_u16_f16: 6473 case NEON::BI__builtin_neon_vcvtph_u16_f16: 6474 case NEON::BI__builtin_neon_vcvtah_s16_f16: 6475 case NEON::BI__builtin_neon_vcvtmh_s16_f16: 6476 case NEON::BI__builtin_neon_vcvtnh_s16_f16: 6477 case NEON::BI__builtin_neon_vcvtph_s16_f16: { 6478 unsigned Int; 6479 llvm::Type* InTy = Int32Ty; 6480 llvm::Type* FTy = HalfTy; 6481 llvm::Type *Tys[2] = {InTy, FTy}; 6482 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6483 switch (BuiltinID) { 6484 default: llvm_unreachable("missing builtin ID in switch!"); 6485 case NEON::BI__builtin_neon_vcvtah_u16_f16: 6486 Int = Intrinsic::aarch64_neon_fcvtau; break; 6487 case NEON::BI__builtin_neon_vcvtmh_u16_f16: 6488 Int = Intrinsic::aarch64_neon_fcvtmu; break; 6489 case NEON::BI__builtin_neon_vcvtnh_u16_f16: 6490 Int = Intrinsic::aarch64_neon_fcvtnu; break; 6491 case NEON::BI__builtin_neon_vcvtph_u16_f16: 6492 Int = Intrinsic::aarch64_neon_fcvtpu; break; 6493 case NEON::BI__builtin_neon_vcvtah_s16_f16: 6494 Int = Intrinsic::aarch64_neon_fcvtas; break; 6495 case NEON::BI__builtin_neon_vcvtmh_s16_f16: 6496 Int = Intrinsic::aarch64_neon_fcvtms; break; 6497 case NEON::BI__builtin_neon_vcvtnh_s16_f16: 6498 Int = Intrinsic::aarch64_neon_fcvtns; break; 6499 case NEON::BI__builtin_neon_vcvtph_s16_f16: 6500 Int = Intrinsic::aarch64_neon_fcvtps; break; 6501 } 6502 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "fcvt"); 6503 return Builder.CreateTrunc(Ops[0], Int16Ty); 6504 } 6505 case NEON::BI__builtin_neon_vcaleh_f16: 6506 case NEON::BI__builtin_neon_vcalth_f16: 6507 case NEON::BI__builtin_neon_vcageh_f16: 6508 case NEON::BI__builtin_neon_vcagth_f16: { 6509 unsigned Int; 6510 llvm::Type* InTy = Int32Ty; 6511 llvm::Type* FTy = HalfTy; 6512 llvm::Type *Tys[2] = {InTy, FTy}; 6513 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6514 switch (BuiltinID) { 6515 default: llvm_unreachable("missing builtin ID in switch!"); 6516 case NEON::BI__builtin_neon_vcageh_f16: 6517 Int = Intrinsic::aarch64_neon_facge; break; 6518 case NEON::BI__builtin_neon_vcagth_f16: 6519 Int = Intrinsic::aarch64_neon_facgt; break; 6520 case NEON::BI__builtin_neon_vcaleh_f16: 6521 Int = Intrinsic::aarch64_neon_facge; std::swap(Ops[0], Ops[1]); break; 6522 case NEON::BI__builtin_neon_vcalth_f16: 6523 Int = Intrinsic::aarch64_neon_facgt; std::swap(Ops[0], Ops[1]); break; 6524 } 6525 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "facg"); 6526 return Builder.CreateTrunc(Ops[0], Int16Ty); 6527 } 6528 case NEON::BI__builtin_neon_vcvth_n_s16_f16: 6529 case NEON::BI__builtin_neon_vcvth_n_u16_f16: { 6530 unsigned Int; 6531 llvm::Type* InTy = Int32Ty; 6532 llvm::Type* FTy = HalfTy; 6533 llvm::Type *Tys[2] = {InTy, FTy}; 6534 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6535 switch (BuiltinID) { 6536 default: llvm_unreachable("missing builtin ID in switch!"); 6537 case NEON::BI__builtin_neon_vcvth_n_s16_f16: 6538 Int = Intrinsic::aarch64_neon_vcvtfp2fxs; break; 6539 case NEON::BI__builtin_neon_vcvth_n_u16_f16: 6540 Int = Intrinsic::aarch64_neon_vcvtfp2fxu; break; 6541 } 6542 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "fcvth_n"); 6543 return Builder.CreateTrunc(Ops[0], Int16Ty); 6544 } 6545 case NEON::BI__builtin_neon_vcvth_n_f16_s16: 6546 case NEON::BI__builtin_neon_vcvth_n_f16_u16: { 6547 unsigned Int; 6548 llvm::Type* FTy = HalfTy; 6549 llvm::Type* InTy = Int32Ty; 6550 llvm::Type *Tys[2] = {FTy, InTy}; 6551 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6552 switch (BuiltinID) { 6553 default: llvm_unreachable("missing builtin ID in switch!"); 6554 case NEON::BI__builtin_neon_vcvth_n_f16_s16: 6555 Int = Intrinsic::aarch64_neon_vcvtfxs2fp; 6556 Ops[0] = Builder.CreateSExt(Ops[0], InTy, "sext"); 6557 break; 6558 case NEON::BI__builtin_neon_vcvth_n_f16_u16: 6559 Int = Intrinsic::aarch64_neon_vcvtfxu2fp; 6560 Ops[0] = Builder.CreateZExt(Ops[0], InTy); 6561 break; 6562 } 6563 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "fcvth_n"); 6564 } 6565 case NEON::BI__builtin_neon_vpaddd_s64: { 6566 llvm::Type *Ty = llvm::VectorType::get(Int64Ty, 2); 6567 Value *Vec = EmitScalarExpr(E->getArg(0)); 6568 // The vector is v2f64, so make sure it's bitcast to that. 6569 Vec = Builder.CreateBitCast(Vec, Ty, "v2i64"); 6570 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 6571 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 6572 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 6573 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 6574 // Pairwise addition of a v2f64 into a scalar f64. 6575 return Builder.CreateAdd(Op0, Op1, "vpaddd"); 6576 } 6577 case NEON::BI__builtin_neon_vpaddd_f64: { 6578 llvm::Type *Ty = 6579 llvm::VectorType::get(DoubleTy, 2); 6580 Value *Vec = EmitScalarExpr(E->getArg(0)); 6581 // The vector is v2f64, so make sure it's bitcast to that. 6582 Vec = Builder.CreateBitCast(Vec, Ty, "v2f64"); 6583 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 6584 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 6585 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 6586 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 6587 // Pairwise addition of a v2f64 into a scalar f64. 6588 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 6589 } 6590 case NEON::BI__builtin_neon_vpadds_f32: { 6591 llvm::Type *Ty = 6592 llvm::VectorType::get(FloatTy, 2); 6593 Value *Vec = EmitScalarExpr(E->getArg(0)); 6594 // The vector is v2f32, so make sure it's bitcast to that. 6595 Vec = Builder.CreateBitCast(Vec, Ty, "v2f32"); 6596 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 6597 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 6598 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 6599 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 6600 // Pairwise addition of a v2f32 into a scalar f32. 6601 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 6602 } 6603 case NEON::BI__builtin_neon_vceqzd_s64: 6604 case NEON::BI__builtin_neon_vceqzd_f64: 6605 case NEON::BI__builtin_neon_vceqzs_f32: 6606 case NEON::BI__builtin_neon_vceqzh_f16: 6607 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6608 return EmitAArch64CompareBuiltinExpr( 6609 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6610 ICmpInst::FCMP_OEQ, ICmpInst::ICMP_EQ, "vceqz"); 6611 case NEON::BI__builtin_neon_vcgezd_s64: 6612 case NEON::BI__builtin_neon_vcgezd_f64: 6613 case NEON::BI__builtin_neon_vcgezs_f32: 6614 case NEON::BI__builtin_neon_vcgezh_f16: 6615 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6616 return EmitAArch64CompareBuiltinExpr( 6617 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6618 ICmpInst::FCMP_OGE, ICmpInst::ICMP_SGE, "vcgez"); 6619 case NEON::BI__builtin_neon_vclezd_s64: 6620 case NEON::BI__builtin_neon_vclezd_f64: 6621 case NEON::BI__builtin_neon_vclezs_f32: 6622 case NEON::BI__builtin_neon_vclezh_f16: 6623 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6624 return EmitAArch64CompareBuiltinExpr( 6625 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6626 ICmpInst::FCMP_OLE, ICmpInst::ICMP_SLE, "vclez"); 6627 case NEON::BI__builtin_neon_vcgtzd_s64: 6628 case NEON::BI__builtin_neon_vcgtzd_f64: 6629 case NEON::BI__builtin_neon_vcgtzs_f32: 6630 case NEON::BI__builtin_neon_vcgtzh_f16: 6631 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6632 return EmitAArch64CompareBuiltinExpr( 6633 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6634 ICmpInst::FCMP_OGT, ICmpInst::ICMP_SGT, "vcgtz"); 6635 case NEON::BI__builtin_neon_vcltzd_s64: 6636 case NEON::BI__builtin_neon_vcltzd_f64: 6637 case NEON::BI__builtin_neon_vcltzs_f32: 6638 case NEON::BI__builtin_neon_vcltzh_f16: 6639 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6640 return EmitAArch64CompareBuiltinExpr( 6641 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6642 ICmpInst::FCMP_OLT, ICmpInst::ICMP_SLT, "vcltz"); 6643 6644 case NEON::BI__builtin_neon_vceqzd_u64: { 6645 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6646 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 6647 Ops[0] = 6648 Builder.CreateICmpEQ(Ops[0], llvm::Constant::getNullValue(Int64Ty)); 6649 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqzd"); 6650 } 6651 case NEON::BI__builtin_neon_vceqd_f64: 6652 case NEON::BI__builtin_neon_vcled_f64: 6653 case NEON::BI__builtin_neon_vcltd_f64: 6654 case NEON::BI__builtin_neon_vcged_f64: 6655 case NEON::BI__builtin_neon_vcgtd_f64: { 6656 llvm::CmpInst::Predicate P; 6657 switch (BuiltinID) { 6658 default: llvm_unreachable("missing builtin ID in switch!"); 6659 case NEON::BI__builtin_neon_vceqd_f64: P = llvm::FCmpInst::FCMP_OEQ; break; 6660 case NEON::BI__builtin_neon_vcled_f64: P = llvm::FCmpInst::FCMP_OLE; break; 6661 case NEON::BI__builtin_neon_vcltd_f64: P = llvm::FCmpInst::FCMP_OLT; break; 6662 case NEON::BI__builtin_neon_vcged_f64: P = llvm::FCmpInst::FCMP_OGE; break; 6663 case NEON::BI__builtin_neon_vcgtd_f64: P = llvm::FCmpInst::FCMP_OGT; break; 6664 } 6665 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6666 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 6667 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 6668 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 6669 return Builder.CreateSExt(Ops[0], Int64Ty, "vcmpd"); 6670 } 6671 case NEON::BI__builtin_neon_vceqs_f32: 6672 case NEON::BI__builtin_neon_vcles_f32: 6673 case NEON::BI__builtin_neon_vclts_f32: 6674 case NEON::BI__builtin_neon_vcges_f32: 6675 case NEON::BI__builtin_neon_vcgts_f32: { 6676 llvm::CmpInst::Predicate P; 6677 switch (BuiltinID) { 6678 default: llvm_unreachable("missing builtin ID in switch!"); 6679 case NEON::BI__builtin_neon_vceqs_f32: P = llvm::FCmpInst::FCMP_OEQ; break; 6680 case NEON::BI__builtin_neon_vcles_f32: P = llvm::FCmpInst::FCMP_OLE; break; 6681 case NEON::BI__builtin_neon_vclts_f32: P = llvm::FCmpInst::FCMP_OLT; break; 6682 case NEON::BI__builtin_neon_vcges_f32: P = llvm::FCmpInst::FCMP_OGE; break; 6683 case NEON::BI__builtin_neon_vcgts_f32: P = llvm::FCmpInst::FCMP_OGT; break; 6684 } 6685 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6686 Ops[0] = Builder.CreateBitCast(Ops[0], FloatTy); 6687 Ops[1] = Builder.CreateBitCast(Ops[1], FloatTy); 6688 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 6689 return Builder.CreateSExt(Ops[0], Int32Ty, "vcmpd"); 6690 } 6691 case NEON::BI__builtin_neon_vceqh_f16: 6692 case NEON::BI__builtin_neon_vcleh_f16: 6693 case NEON::BI__builtin_neon_vclth_f16: 6694 case NEON::BI__builtin_neon_vcgeh_f16: 6695 case NEON::BI__builtin_neon_vcgth_f16: { 6696 llvm::CmpInst::Predicate P; 6697 switch (BuiltinID) { 6698 default: llvm_unreachable("missing builtin ID in switch!"); 6699 case NEON::BI__builtin_neon_vceqh_f16: P = llvm::FCmpInst::FCMP_OEQ; break; 6700 case NEON::BI__builtin_neon_vcleh_f16: P = llvm::FCmpInst::FCMP_OLE; break; 6701 case NEON::BI__builtin_neon_vclth_f16: P = llvm::FCmpInst::FCMP_OLT; break; 6702 case NEON::BI__builtin_neon_vcgeh_f16: P = llvm::FCmpInst::FCMP_OGE; break; 6703 case NEON::BI__builtin_neon_vcgth_f16: P = llvm::FCmpInst::FCMP_OGT; break; 6704 } 6705 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6706 Ops[0] = Builder.CreateBitCast(Ops[0], HalfTy); 6707 Ops[1] = Builder.CreateBitCast(Ops[1], HalfTy); 6708 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 6709 return Builder.CreateSExt(Ops[0], Int16Ty, "vcmpd"); 6710 } 6711 case NEON::BI__builtin_neon_vceqd_s64: 6712 case NEON::BI__builtin_neon_vceqd_u64: 6713 case NEON::BI__builtin_neon_vcgtd_s64: 6714 case NEON::BI__builtin_neon_vcgtd_u64: 6715 case NEON::BI__builtin_neon_vcltd_s64: 6716 case NEON::BI__builtin_neon_vcltd_u64: 6717 case NEON::BI__builtin_neon_vcged_u64: 6718 case NEON::BI__builtin_neon_vcged_s64: 6719 case NEON::BI__builtin_neon_vcled_u64: 6720 case NEON::BI__builtin_neon_vcled_s64: { 6721 llvm::CmpInst::Predicate P; 6722 switch (BuiltinID) { 6723 default: llvm_unreachable("missing builtin ID in switch!"); 6724 case NEON::BI__builtin_neon_vceqd_s64: 6725 case NEON::BI__builtin_neon_vceqd_u64:P = llvm::ICmpInst::ICMP_EQ;break; 6726 case NEON::BI__builtin_neon_vcgtd_s64:P = llvm::ICmpInst::ICMP_SGT;break; 6727 case NEON::BI__builtin_neon_vcgtd_u64:P = llvm::ICmpInst::ICMP_UGT;break; 6728 case NEON::BI__builtin_neon_vcltd_s64:P = llvm::ICmpInst::ICMP_SLT;break; 6729 case NEON::BI__builtin_neon_vcltd_u64:P = llvm::ICmpInst::ICMP_ULT;break; 6730 case NEON::BI__builtin_neon_vcged_u64:P = llvm::ICmpInst::ICMP_UGE;break; 6731 case NEON::BI__builtin_neon_vcged_s64:P = llvm::ICmpInst::ICMP_SGE;break; 6732 case NEON::BI__builtin_neon_vcled_u64:P = llvm::ICmpInst::ICMP_ULE;break; 6733 case NEON::BI__builtin_neon_vcled_s64:P = llvm::ICmpInst::ICMP_SLE;break; 6734 } 6735 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6736 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 6737 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 6738 Ops[0] = Builder.CreateICmp(P, Ops[0], Ops[1]); 6739 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqd"); 6740 } 6741 case NEON::BI__builtin_neon_vtstd_s64: 6742 case NEON::BI__builtin_neon_vtstd_u64: { 6743 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6744 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 6745 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 6746 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 6747 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 6748 llvm::Constant::getNullValue(Int64Ty)); 6749 return Builder.CreateSExt(Ops[0], Int64Ty, "vtstd"); 6750 } 6751 case NEON::BI__builtin_neon_vset_lane_i8: 6752 case NEON::BI__builtin_neon_vset_lane_i16: 6753 case NEON::BI__builtin_neon_vset_lane_i32: 6754 case NEON::BI__builtin_neon_vset_lane_i64: 6755 case NEON::BI__builtin_neon_vset_lane_f32: 6756 case NEON::BI__builtin_neon_vsetq_lane_i8: 6757 case NEON::BI__builtin_neon_vsetq_lane_i16: 6758 case NEON::BI__builtin_neon_vsetq_lane_i32: 6759 case NEON::BI__builtin_neon_vsetq_lane_i64: 6760 case NEON::BI__builtin_neon_vsetq_lane_f32: 6761 Ops.push_back(EmitScalarExpr(E->getArg(2))); 6762 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 6763 case NEON::BI__builtin_neon_vset_lane_f64: 6764 // The vector type needs a cast for the v1f64 variant. 6765 Ops[1] = Builder.CreateBitCast(Ops[1], 6766 llvm::VectorType::get(DoubleTy, 1)); 6767 Ops.push_back(EmitScalarExpr(E->getArg(2))); 6768 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 6769 case NEON::BI__builtin_neon_vsetq_lane_f64: 6770 // The vector type needs a cast for the v2f64 variant. 6771 Ops[1] = Builder.CreateBitCast(Ops[1], 6772 llvm::VectorType::get(DoubleTy, 2)); 6773 Ops.push_back(EmitScalarExpr(E->getArg(2))); 6774 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 6775 6776 case NEON::BI__builtin_neon_vget_lane_i8: 6777 case NEON::BI__builtin_neon_vdupb_lane_i8: 6778 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 8)); 6779 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6780 "vget_lane"); 6781 case NEON::BI__builtin_neon_vgetq_lane_i8: 6782 case NEON::BI__builtin_neon_vdupb_laneq_i8: 6783 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 16)); 6784 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6785 "vgetq_lane"); 6786 case NEON::BI__builtin_neon_vget_lane_i16: 6787 case NEON::BI__builtin_neon_vduph_lane_i16: 6788 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 4)); 6789 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6790 "vget_lane"); 6791 case NEON::BI__builtin_neon_vgetq_lane_i16: 6792 case NEON::BI__builtin_neon_vduph_laneq_i16: 6793 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 8)); 6794 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6795 "vgetq_lane"); 6796 case NEON::BI__builtin_neon_vget_lane_i32: 6797 case NEON::BI__builtin_neon_vdups_lane_i32: 6798 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 2)); 6799 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6800 "vget_lane"); 6801 case NEON::BI__builtin_neon_vdups_lane_f32: 6802 Ops[0] = Builder.CreateBitCast(Ops[0], 6803 llvm::VectorType::get(FloatTy, 2)); 6804 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6805 "vdups_lane"); 6806 case NEON::BI__builtin_neon_vgetq_lane_i32: 6807 case NEON::BI__builtin_neon_vdups_laneq_i32: 6808 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 6809 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6810 "vgetq_lane"); 6811 case NEON::BI__builtin_neon_vget_lane_i64: 6812 case NEON::BI__builtin_neon_vdupd_lane_i64: 6813 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 1)); 6814 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6815 "vget_lane"); 6816 case NEON::BI__builtin_neon_vdupd_lane_f64: 6817 Ops[0] = Builder.CreateBitCast(Ops[0], 6818 llvm::VectorType::get(DoubleTy, 1)); 6819 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6820 "vdupd_lane"); 6821 case NEON::BI__builtin_neon_vgetq_lane_i64: 6822 case NEON::BI__builtin_neon_vdupd_laneq_i64: 6823 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 6824 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6825 "vgetq_lane"); 6826 case NEON::BI__builtin_neon_vget_lane_f32: 6827 Ops[0] = Builder.CreateBitCast(Ops[0], 6828 llvm::VectorType::get(FloatTy, 2)); 6829 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6830 "vget_lane"); 6831 case NEON::BI__builtin_neon_vget_lane_f64: 6832 Ops[0] = Builder.CreateBitCast(Ops[0], 6833 llvm::VectorType::get(DoubleTy, 1)); 6834 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6835 "vget_lane"); 6836 case NEON::BI__builtin_neon_vgetq_lane_f32: 6837 case NEON::BI__builtin_neon_vdups_laneq_f32: 6838 Ops[0] = Builder.CreateBitCast(Ops[0], 6839 llvm::VectorType::get(FloatTy, 4)); 6840 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6841 "vgetq_lane"); 6842 case NEON::BI__builtin_neon_vgetq_lane_f64: 6843 case NEON::BI__builtin_neon_vdupd_laneq_f64: 6844 Ops[0] = Builder.CreateBitCast(Ops[0], 6845 llvm::VectorType::get(DoubleTy, 2)); 6846 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6847 "vgetq_lane"); 6848 case NEON::BI__builtin_neon_vaddh_f16: 6849 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6850 return Builder.CreateFAdd(Ops[0], Ops[1], "vaddh"); 6851 case NEON::BI__builtin_neon_vsubh_f16: 6852 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6853 return Builder.CreateFSub(Ops[0], Ops[1], "vsubh"); 6854 case NEON::BI__builtin_neon_vmulh_f16: 6855 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6856 return Builder.CreateFMul(Ops[0], Ops[1], "vmulh"); 6857 case NEON::BI__builtin_neon_vdivh_f16: 6858 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6859 return Builder.CreateFDiv(Ops[0], Ops[1], "vdivh"); 6860 case NEON::BI__builtin_neon_vfmah_f16: { 6861 Value *F = CGM.getIntrinsic(Intrinsic::fma, HalfTy); 6862 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 6863 return Builder.CreateCall(F, 6864 {EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2)), Ops[0]}); 6865 } 6866 case NEON::BI__builtin_neon_vfmsh_f16: { 6867 Value *F = CGM.getIntrinsic(Intrinsic::fma, HalfTy); 6868 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(HalfTy); 6869 Value* Sub = Builder.CreateFSub(Zero, EmitScalarExpr(E->getArg(1)), "vsubh"); 6870 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 6871 return Builder.CreateCall(F, {Sub, EmitScalarExpr(E->getArg(2)), Ops[0]}); 6872 } 6873 case NEON::BI__builtin_neon_vaddd_s64: 6874 case NEON::BI__builtin_neon_vaddd_u64: 6875 return Builder.CreateAdd(Ops[0], EmitScalarExpr(E->getArg(1)), "vaddd"); 6876 case NEON::BI__builtin_neon_vsubd_s64: 6877 case NEON::BI__builtin_neon_vsubd_u64: 6878 return Builder.CreateSub(Ops[0], EmitScalarExpr(E->getArg(1)), "vsubd"); 6879 case NEON::BI__builtin_neon_vqdmlalh_s16: 6880 case NEON::BI__builtin_neon_vqdmlslh_s16: { 6881 SmallVector<Value *, 2> ProductOps; 6882 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 6883 ProductOps.push_back(vectorWrapScalar16(EmitScalarExpr(E->getArg(2)))); 6884 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 6885 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 6886 ProductOps, "vqdmlXl"); 6887 Constant *CI = ConstantInt::get(SizeTy, 0); 6888 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 6889 6890 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlalh_s16 6891 ? Intrinsic::aarch64_neon_sqadd 6892 : Intrinsic::aarch64_neon_sqsub; 6893 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int32Ty), Ops, "vqdmlXl"); 6894 } 6895 case NEON::BI__builtin_neon_vqshlud_n_s64: { 6896 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6897 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 6898 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqshlu, Int64Ty), 6899 Ops, "vqshlu_n"); 6900 } 6901 case NEON::BI__builtin_neon_vqshld_n_u64: 6902 case NEON::BI__builtin_neon_vqshld_n_s64: { 6903 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vqshld_n_u64 6904 ? Intrinsic::aarch64_neon_uqshl 6905 : Intrinsic::aarch64_neon_sqshl; 6906 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6907 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 6908 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vqshl_n"); 6909 } 6910 case NEON::BI__builtin_neon_vrshrd_n_u64: 6911 case NEON::BI__builtin_neon_vrshrd_n_s64: { 6912 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrshrd_n_u64 6913 ? Intrinsic::aarch64_neon_urshl 6914 : Intrinsic::aarch64_neon_srshl; 6915 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6916 int SV = cast<ConstantInt>(Ops[1])->getSExtValue(); 6917 Ops[1] = ConstantInt::get(Int64Ty, -SV); 6918 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vrshr_n"); 6919 } 6920 case NEON::BI__builtin_neon_vrsrad_n_u64: 6921 case NEON::BI__builtin_neon_vrsrad_n_s64: { 6922 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrsrad_n_u64 6923 ? Intrinsic::aarch64_neon_urshl 6924 : Intrinsic::aarch64_neon_srshl; 6925 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 6926 Ops.push_back(Builder.CreateNeg(EmitScalarExpr(E->getArg(2)))); 6927 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Int64Ty), 6928 {Ops[1], Builder.CreateSExt(Ops[2], Int64Ty)}); 6929 return Builder.CreateAdd(Ops[0], Builder.CreateBitCast(Ops[1], Int64Ty)); 6930 } 6931 case NEON::BI__builtin_neon_vshld_n_s64: 6932 case NEON::BI__builtin_neon_vshld_n_u64: { 6933 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 6934 return Builder.CreateShl( 6935 Ops[0], ConstantInt::get(Int64Ty, Amt->getZExtValue()), "shld_n"); 6936 } 6937 case NEON::BI__builtin_neon_vshrd_n_s64: { 6938 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 6939 return Builder.CreateAShr( 6940 Ops[0], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 6941 Amt->getZExtValue())), 6942 "shrd_n"); 6943 } 6944 case NEON::BI__builtin_neon_vshrd_n_u64: { 6945 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 6946 uint64_t ShiftAmt = Amt->getZExtValue(); 6947 // Right-shifting an unsigned value by its size yields 0. 6948 if (ShiftAmt == 64) 6949 return ConstantInt::get(Int64Ty, 0); 6950 return Builder.CreateLShr(Ops[0], ConstantInt::get(Int64Ty, ShiftAmt), 6951 "shrd_n"); 6952 } 6953 case NEON::BI__builtin_neon_vsrad_n_s64: { 6954 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 6955 Ops[1] = Builder.CreateAShr( 6956 Ops[1], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 6957 Amt->getZExtValue())), 6958 "shrd_n"); 6959 return Builder.CreateAdd(Ops[0], Ops[1]); 6960 } 6961 case NEON::BI__builtin_neon_vsrad_n_u64: { 6962 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 6963 uint64_t ShiftAmt = Amt->getZExtValue(); 6964 // Right-shifting an unsigned value by its size yields 0. 6965 // As Op + 0 = Op, return Ops[0] directly. 6966 if (ShiftAmt == 64) 6967 return Ops[0]; 6968 Ops[1] = Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, ShiftAmt), 6969 "shrd_n"); 6970 return Builder.CreateAdd(Ops[0], Ops[1]); 6971 } 6972 case NEON::BI__builtin_neon_vqdmlalh_lane_s16: 6973 case NEON::BI__builtin_neon_vqdmlalh_laneq_s16: 6974 case NEON::BI__builtin_neon_vqdmlslh_lane_s16: 6975 case NEON::BI__builtin_neon_vqdmlslh_laneq_s16: { 6976 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 6977 "lane"); 6978 SmallVector<Value *, 2> ProductOps; 6979 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 6980 ProductOps.push_back(vectorWrapScalar16(Ops[2])); 6981 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 6982 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 6983 ProductOps, "vqdmlXl"); 6984 Constant *CI = ConstantInt::get(SizeTy, 0); 6985 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 6986 Ops.pop_back(); 6987 6988 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlalh_lane_s16 || 6989 BuiltinID == NEON::BI__builtin_neon_vqdmlalh_laneq_s16) 6990 ? Intrinsic::aarch64_neon_sqadd 6991 : Intrinsic::aarch64_neon_sqsub; 6992 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int32Ty), Ops, "vqdmlXl"); 6993 } 6994 case NEON::BI__builtin_neon_vqdmlals_s32: 6995 case NEON::BI__builtin_neon_vqdmlsls_s32: { 6996 SmallVector<Value *, 2> ProductOps; 6997 ProductOps.push_back(Ops[1]); 6998 ProductOps.push_back(EmitScalarExpr(E->getArg(2))); 6999 Ops[1] = 7000 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 7001 ProductOps, "vqdmlXl"); 7002 7003 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlals_s32 7004 ? Intrinsic::aarch64_neon_sqadd 7005 : Intrinsic::aarch64_neon_sqsub; 7006 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int64Ty), Ops, "vqdmlXl"); 7007 } 7008 case NEON::BI__builtin_neon_vqdmlals_lane_s32: 7009 case NEON::BI__builtin_neon_vqdmlals_laneq_s32: 7010 case NEON::BI__builtin_neon_vqdmlsls_lane_s32: 7011 case NEON::BI__builtin_neon_vqdmlsls_laneq_s32: { 7012 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 7013 "lane"); 7014 SmallVector<Value *, 2> ProductOps; 7015 ProductOps.push_back(Ops[1]); 7016 ProductOps.push_back(Ops[2]); 7017 Ops[1] = 7018 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 7019 ProductOps, "vqdmlXl"); 7020 Ops.pop_back(); 7021 7022 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlals_lane_s32 || 7023 BuiltinID == NEON::BI__builtin_neon_vqdmlals_laneq_s32) 7024 ? Intrinsic::aarch64_neon_sqadd 7025 : Intrinsic::aarch64_neon_sqsub; 7026 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl"); 7027 } 7028 } 7029 7030 llvm::VectorType *VTy = GetNeonType(this, Type); 7031 llvm::Type *Ty = VTy; 7032 if (!Ty) 7033 return nullptr; 7034 7035 // Not all intrinsics handled by the common case work for AArch64 yet, so only 7036 // defer to common code if it's been added to our special map. 7037 Builtin = findNeonIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID, 7038 AArch64SIMDIntrinsicsProvenSorted); 7039 7040 if (Builtin) 7041 return EmitCommonNeonBuiltinExpr( 7042 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 7043 Builtin->NameHint, Builtin->TypeModifier, E, Ops, 7044 /*never use addresses*/ Address::invalid(), Address::invalid(), Arch); 7045 7046 if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops, Arch)) 7047 return V; 7048 7049 unsigned Int; 7050 switch (BuiltinID) { 7051 default: return nullptr; 7052 case NEON::BI__builtin_neon_vbsl_v: 7053 case NEON::BI__builtin_neon_vbslq_v: { 7054 llvm::Type *BitTy = llvm::VectorType::getInteger(VTy); 7055 Ops[0] = Builder.CreateBitCast(Ops[0], BitTy, "vbsl"); 7056 Ops[1] = Builder.CreateBitCast(Ops[1], BitTy, "vbsl"); 7057 Ops[2] = Builder.CreateBitCast(Ops[2], BitTy, "vbsl"); 7058 7059 Ops[1] = Builder.CreateAnd(Ops[0], Ops[1], "vbsl"); 7060 Ops[2] = Builder.CreateAnd(Builder.CreateNot(Ops[0]), Ops[2], "vbsl"); 7061 Ops[0] = Builder.CreateOr(Ops[1], Ops[2], "vbsl"); 7062 return Builder.CreateBitCast(Ops[0], Ty); 7063 } 7064 case NEON::BI__builtin_neon_vfma_lane_v: 7065 case NEON::BI__builtin_neon_vfmaq_lane_v: { // Only used for FP types 7066 // The ARM builtins (and instructions) have the addend as the first 7067 // operand, but the 'fma' intrinsics have it last. Swap it around here. 7068 Value *Addend = Ops[0]; 7069 Value *Multiplicand = Ops[1]; 7070 Value *LaneSource = Ops[2]; 7071 Ops[0] = Multiplicand; 7072 Ops[1] = LaneSource; 7073 Ops[2] = Addend; 7074 7075 // Now adjust things to handle the lane access. 7076 llvm::Type *SourceTy = BuiltinID == NEON::BI__builtin_neon_vfmaq_lane_v ? 7077 llvm::VectorType::get(VTy->getElementType(), VTy->getNumElements() / 2) : 7078 VTy; 7079 llvm::Constant *cst = cast<Constant>(Ops[3]); 7080 Value *SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), cst); 7081 Ops[1] = Builder.CreateBitCast(Ops[1], SourceTy); 7082 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV, "lane"); 7083 7084 Ops.pop_back(); 7085 Int = Intrinsic::fma; 7086 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmla"); 7087 } 7088 case NEON::BI__builtin_neon_vfma_laneq_v: { 7089 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 7090 // v1f64 fma should be mapped to Neon scalar f64 fma 7091 if (VTy && VTy->getElementType() == DoubleTy) { 7092 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 7093 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 7094 llvm::Type *VTy = GetNeonType(this, 7095 NeonTypeFlags(NeonTypeFlags::Float64, false, true)); 7096 Ops[2] = Builder.CreateBitCast(Ops[2], VTy); 7097 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 7098 Value *F = CGM.getIntrinsic(Intrinsic::fma, DoubleTy); 7099 Value *Result = Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 7100 return Builder.CreateBitCast(Result, Ty); 7101 } 7102 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 7103 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7104 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7105 7106 llvm::Type *STy = llvm::VectorType::get(VTy->getElementType(), 7107 VTy->getNumElements() * 2); 7108 Ops[2] = Builder.CreateBitCast(Ops[2], STy); 7109 Value* SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), 7110 cast<ConstantInt>(Ops[3])); 7111 Ops[2] = Builder.CreateShuffleVector(Ops[2], Ops[2], SV, "lane"); 7112 7113 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 7114 } 7115 case NEON::BI__builtin_neon_vfmaq_laneq_v: { 7116 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 7117 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7118 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7119 7120 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 7121 Ops[2] = EmitNeonSplat(Ops[2], cast<ConstantInt>(Ops[3])); 7122 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 7123 } 7124 case NEON::BI__builtin_neon_vfmah_lane_f16: 7125 case NEON::BI__builtin_neon_vfmas_lane_f32: 7126 case NEON::BI__builtin_neon_vfmah_laneq_f16: 7127 case NEON::BI__builtin_neon_vfmas_laneq_f32: 7128 case NEON::BI__builtin_neon_vfmad_lane_f64: 7129 case NEON::BI__builtin_neon_vfmad_laneq_f64: { 7130 Ops.push_back(EmitScalarExpr(E->getArg(3))); 7131 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 7132 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 7133 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 7134 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 7135 } 7136 case NEON::BI__builtin_neon_vmull_v: 7137 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 7138 Int = usgn ? Intrinsic::aarch64_neon_umull : Intrinsic::aarch64_neon_smull; 7139 if (Type.isPoly()) Int = Intrinsic::aarch64_neon_pmull; 7140 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 7141 case NEON::BI__builtin_neon_vmax_v: 7142 case NEON::BI__builtin_neon_vmaxq_v: 7143 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 7144 Int = usgn ? Intrinsic::aarch64_neon_umax : Intrinsic::aarch64_neon_smax; 7145 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmax; 7146 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmax"); 7147 case NEON::BI__builtin_neon_vmaxh_f16: { 7148 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7149 Int = Intrinsic::aarch64_neon_fmax; 7150 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vmax"); 7151 } 7152 case NEON::BI__builtin_neon_vmin_v: 7153 case NEON::BI__builtin_neon_vminq_v: 7154 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 7155 Int = usgn ? Intrinsic::aarch64_neon_umin : Intrinsic::aarch64_neon_smin; 7156 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmin; 7157 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmin"); 7158 case NEON::BI__builtin_neon_vminh_f16: { 7159 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7160 Int = Intrinsic::aarch64_neon_fmin; 7161 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vmin"); 7162 } 7163 case NEON::BI__builtin_neon_vabd_v: 7164 case NEON::BI__builtin_neon_vabdq_v: 7165 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 7166 Int = usgn ? Intrinsic::aarch64_neon_uabd : Intrinsic::aarch64_neon_sabd; 7167 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fabd; 7168 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vabd"); 7169 case NEON::BI__builtin_neon_vpadal_v: 7170 case NEON::BI__builtin_neon_vpadalq_v: { 7171 unsigned ArgElts = VTy->getNumElements(); 7172 llvm::IntegerType *EltTy = cast<IntegerType>(VTy->getElementType()); 7173 unsigned BitWidth = EltTy->getBitWidth(); 7174 llvm::Type *ArgTy = llvm::VectorType::get( 7175 llvm::IntegerType::get(getLLVMContext(), BitWidth/2), 2*ArgElts); 7176 llvm::Type* Tys[2] = { VTy, ArgTy }; 7177 Int = usgn ? Intrinsic::aarch64_neon_uaddlp : Intrinsic::aarch64_neon_saddlp; 7178 SmallVector<llvm::Value*, 1> TmpOps; 7179 TmpOps.push_back(Ops[1]); 7180 Function *F = CGM.getIntrinsic(Int, Tys); 7181 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vpadal"); 7182 llvm::Value *addend = Builder.CreateBitCast(Ops[0], tmp->getType()); 7183 return Builder.CreateAdd(tmp, addend); 7184 } 7185 case NEON::BI__builtin_neon_vpmin_v: 7186 case NEON::BI__builtin_neon_vpminq_v: 7187 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 7188 Int = usgn ? Intrinsic::aarch64_neon_uminp : Intrinsic::aarch64_neon_sminp; 7189 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fminp; 7190 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmin"); 7191 case NEON::BI__builtin_neon_vpmax_v: 7192 case NEON::BI__builtin_neon_vpmaxq_v: 7193 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 7194 Int = usgn ? Intrinsic::aarch64_neon_umaxp : Intrinsic::aarch64_neon_smaxp; 7195 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmaxp; 7196 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmax"); 7197 case NEON::BI__builtin_neon_vminnm_v: 7198 case NEON::BI__builtin_neon_vminnmq_v: 7199 Int = Intrinsic::aarch64_neon_fminnm; 7200 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vminnm"); 7201 case NEON::BI__builtin_neon_vminnmh_f16: 7202 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7203 Int = Intrinsic::aarch64_neon_fminnm; 7204 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vminnm"); 7205 case NEON::BI__builtin_neon_vmaxnm_v: 7206 case NEON::BI__builtin_neon_vmaxnmq_v: 7207 Int = Intrinsic::aarch64_neon_fmaxnm; 7208 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmaxnm"); 7209 case NEON::BI__builtin_neon_vmaxnmh_f16: 7210 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7211 Int = Intrinsic::aarch64_neon_fmaxnm; 7212 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vmaxnm"); 7213 case NEON::BI__builtin_neon_vrecpss_f32: { 7214 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7215 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, FloatTy), 7216 Ops, "vrecps"); 7217 } 7218 case NEON::BI__builtin_neon_vrecpsd_f64: 7219 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7220 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, DoubleTy), 7221 Ops, "vrecps"); 7222 case NEON::BI__builtin_neon_vrecpsh_f16: 7223 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7224 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, HalfTy), 7225 Ops, "vrecps"); 7226 case NEON::BI__builtin_neon_vqshrun_n_v: 7227 Int = Intrinsic::aarch64_neon_sqshrun; 7228 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrun_n"); 7229 case NEON::BI__builtin_neon_vqrshrun_n_v: 7230 Int = Intrinsic::aarch64_neon_sqrshrun; 7231 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrun_n"); 7232 case NEON::BI__builtin_neon_vqshrn_n_v: 7233 Int = usgn ? Intrinsic::aarch64_neon_uqshrn : Intrinsic::aarch64_neon_sqshrn; 7234 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n"); 7235 case NEON::BI__builtin_neon_vrshrn_n_v: 7236 Int = Intrinsic::aarch64_neon_rshrn; 7237 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshrn_n"); 7238 case NEON::BI__builtin_neon_vqrshrn_n_v: 7239 Int = usgn ? Intrinsic::aarch64_neon_uqrshrn : Intrinsic::aarch64_neon_sqrshrn; 7240 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n"); 7241 case NEON::BI__builtin_neon_vrndah_f16: { 7242 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7243 Int = Intrinsic::round; 7244 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrnda"); 7245 } 7246 case NEON::BI__builtin_neon_vrnda_v: 7247 case NEON::BI__builtin_neon_vrndaq_v: { 7248 Int = Intrinsic::round; 7249 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrnda"); 7250 } 7251 case NEON::BI__builtin_neon_vrndih_f16: { 7252 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7253 Int = Intrinsic::nearbyint; 7254 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndi"); 7255 } 7256 case NEON::BI__builtin_neon_vrndi_v: 7257 case NEON::BI__builtin_neon_vrndiq_v: { 7258 Int = Intrinsic::nearbyint; 7259 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndi"); 7260 } 7261 case NEON::BI__builtin_neon_vrndmh_f16: { 7262 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7263 Int = Intrinsic::floor; 7264 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndm"); 7265 } 7266 case NEON::BI__builtin_neon_vrndm_v: 7267 case NEON::BI__builtin_neon_vrndmq_v: { 7268 Int = Intrinsic::floor; 7269 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndm"); 7270 } 7271 case NEON::BI__builtin_neon_vrndnh_f16: { 7272 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7273 Int = Intrinsic::aarch64_neon_frintn; 7274 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndn"); 7275 } 7276 case NEON::BI__builtin_neon_vrndn_v: 7277 case NEON::BI__builtin_neon_vrndnq_v: { 7278 Int = Intrinsic::aarch64_neon_frintn; 7279 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndn"); 7280 } 7281 case NEON::BI__builtin_neon_vrndph_f16: { 7282 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7283 Int = Intrinsic::ceil; 7284 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndp"); 7285 } 7286 case NEON::BI__builtin_neon_vrndp_v: 7287 case NEON::BI__builtin_neon_vrndpq_v: { 7288 Int = Intrinsic::ceil; 7289 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndp"); 7290 } 7291 case NEON::BI__builtin_neon_vrndxh_f16: { 7292 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7293 Int = Intrinsic::rint; 7294 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndx"); 7295 } 7296 case NEON::BI__builtin_neon_vrndx_v: 7297 case NEON::BI__builtin_neon_vrndxq_v: { 7298 Int = Intrinsic::rint; 7299 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndx"); 7300 } 7301 case NEON::BI__builtin_neon_vrndh_f16: { 7302 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7303 Int = Intrinsic::trunc; 7304 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndz"); 7305 } 7306 case NEON::BI__builtin_neon_vrnd_v: 7307 case NEON::BI__builtin_neon_vrndq_v: { 7308 Int = Intrinsic::trunc; 7309 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndz"); 7310 } 7311 case NEON::BI__builtin_neon_vcvt_f64_v: 7312 case NEON::BI__builtin_neon_vcvtq_f64_v: 7313 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7314 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad)); 7315 return usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 7316 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 7317 case NEON::BI__builtin_neon_vcvt_f64_f32: { 7318 assert(Type.getEltType() == NeonTypeFlags::Float64 && quad && 7319 "unexpected vcvt_f64_f32 builtin"); 7320 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float32, false, false); 7321 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 7322 7323 return Builder.CreateFPExt(Ops[0], Ty, "vcvt"); 7324 } 7325 case NEON::BI__builtin_neon_vcvt_f32_f64: { 7326 assert(Type.getEltType() == NeonTypeFlags::Float32 && 7327 "unexpected vcvt_f32_f64 builtin"); 7328 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float64, false, true); 7329 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 7330 7331 return Builder.CreateFPTrunc(Ops[0], Ty, "vcvt"); 7332 } 7333 case NEON::BI__builtin_neon_vcvt_s32_v: 7334 case NEON::BI__builtin_neon_vcvt_u32_v: 7335 case NEON::BI__builtin_neon_vcvt_s64_v: 7336 case NEON::BI__builtin_neon_vcvt_u64_v: 7337 case NEON::BI__builtin_neon_vcvt_s16_v: 7338 case NEON::BI__builtin_neon_vcvt_u16_v: 7339 case NEON::BI__builtin_neon_vcvtq_s32_v: 7340 case NEON::BI__builtin_neon_vcvtq_u32_v: 7341 case NEON::BI__builtin_neon_vcvtq_s64_v: 7342 case NEON::BI__builtin_neon_vcvtq_u64_v: 7343 case NEON::BI__builtin_neon_vcvtq_s16_v: 7344 case NEON::BI__builtin_neon_vcvtq_u16_v: { 7345 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 7346 if (usgn) 7347 return Builder.CreateFPToUI(Ops[0], Ty); 7348 return Builder.CreateFPToSI(Ops[0], Ty); 7349 } 7350 case NEON::BI__builtin_neon_vcvta_s16_v: 7351 case NEON::BI__builtin_neon_vcvta_s32_v: 7352 case NEON::BI__builtin_neon_vcvtaq_s16_v: 7353 case NEON::BI__builtin_neon_vcvtaq_s32_v: 7354 case NEON::BI__builtin_neon_vcvta_u32_v: 7355 case NEON::BI__builtin_neon_vcvtaq_u16_v: 7356 case NEON::BI__builtin_neon_vcvtaq_u32_v: 7357 case NEON::BI__builtin_neon_vcvta_s64_v: 7358 case NEON::BI__builtin_neon_vcvtaq_s64_v: 7359 case NEON::BI__builtin_neon_vcvta_u64_v: 7360 case NEON::BI__builtin_neon_vcvtaq_u64_v: { 7361 Int = usgn ? Intrinsic::aarch64_neon_fcvtau : Intrinsic::aarch64_neon_fcvtas; 7362 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 7363 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvta"); 7364 } 7365 case NEON::BI__builtin_neon_vcvtm_s16_v: 7366 case NEON::BI__builtin_neon_vcvtm_s32_v: 7367 case NEON::BI__builtin_neon_vcvtmq_s16_v: 7368 case NEON::BI__builtin_neon_vcvtmq_s32_v: 7369 case NEON::BI__builtin_neon_vcvtm_u16_v: 7370 case NEON::BI__builtin_neon_vcvtm_u32_v: 7371 case NEON::BI__builtin_neon_vcvtmq_u16_v: 7372 case NEON::BI__builtin_neon_vcvtmq_u32_v: 7373 case NEON::BI__builtin_neon_vcvtm_s64_v: 7374 case NEON::BI__builtin_neon_vcvtmq_s64_v: 7375 case NEON::BI__builtin_neon_vcvtm_u64_v: 7376 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 7377 Int = usgn ? Intrinsic::aarch64_neon_fcvtmu : Intrinsic::aarch64_neon_fcvtms; 7378 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 7379 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtm"); 7380 } 7381 case NEON::BI__builtin_neon_vcvtn_s16_v: 7382 case NEON::BI__builtin_neon_vcvtn_s32_v: 7383 case NEON::BI__builtin_neon_vcvtnq_s16_v: 7384 case NEON::BI__builtin_neon_vcvtnq_s32_v: 7385 case NEON::BI__builtin_neon_vcvtn_u16_v: 7386 case NEON::BI__builtin_neon_vcvtn_u32_v: 7387 case NEON::BI__builtin_neon_vcvtnq_u16_v: 7388 case NEON::BI__builtin_neon_vcvtnq_u32_v: 7389 case NEON::BI__builtin_neon_vcvtn_s64_v: 7390 case NEON::BI__builtin_neon_vcvtnq_s64_v: 7391 case NEON::BI__builtin_neon_vcvtn_u64_v: 7392 case NEON::BI__builtin_neon_vcvtnq_u64_v: { 7393 Int = usgn ? Intrinsic::aarch64_neon_fcvtnu : Intrinsic::aarch64_neon_fcvtns; 7394 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 7395 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtn"); 7396 } 7397 case NEON::BI__builtin_neon_vcvtp_s16_v: 7398 case NEON::BI__builtin_neon_vcvtp_s32_v: 7399 case NEON::BI__builtin_neon_vcvtpq_s16_v: 7400 case NEON::BI__builtin_neon_vcvtpq_s32_v: 7401 case NEON::BI__builtin_neon_vcvtp_u16_v: 7402 case NEON::BI__builtin_neon_vcvtp_u32_v: 7403 case NEON::BI__builtin_neon_vcvtpq_u16_v: 7404 case NEON::BI__builtin_neon_vcvtpq_u32_v: 7405 case NEON::BI__builtin_neon_vcvtp_s64_v: 7406 case NEON::BI__builtin_neon_vcvtpq_s64_v: 7407 case NEON::BI__builtin_neon_vcvtp_u64_v: 7408 case NEON::BI__builtin_neon_vcvtpq_u64_v: { 7409 Int = usgn ? Intrinsic::aarch64_neon_fcvtpu : Intrinsic::aarch64_neon_fcvtps; 7410 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 7411 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtp"); 7412 } 7413 case NEON::BI__builtin_neon_vmulx_v: 7414 case NEON::BI__builtin_neon_vmulxq_v: { 7415 Int = Intrinsic::aarch64_neon_fmulx; 7416 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmulx"); 7417 } 7418 case NEON::BI__builtin_neon_vmulxh_lane_f16: 7419 case NEON::BI__builtin_neon_vmulxh_laneq_f16: { 7420 // vmulx_lane should be mapped to Neon scalar mulx after 7421 // extracting the scalar element 7422 Ops.push_back(EmitScalarExpr(E->getArg(2))); 7423 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 7424 Ops.pop_back(); 7425 Int = Intrinsic::aarch64_neon_fmulx; 7426 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vmulx"); 7427 } 7428 case NEON::BI__builtin_neon_vmul_lane_v: 7429 case NEON::BI__builtin_neon_vmul_laneq_v: { 7430 // v1f64 vmul_lane should be mapped to Neon scalar mul lane 7431 bool Quad = false; 7432 if (BuiltinID == NEON::BI__builtin_neon_vmul_laneq_v) 7433 Quad = true; 7434 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 7435 llvm::Type *VTy = GetNeonType(this, 7436 NeonTypeFlags(NeonTypeFlags::Float64, false, Quad)); 7437 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 7438 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 7439 Value *Result = Builder.CreateFMul(Ops[0], Ops[1]); 7440 return Builder.CreateBitCast(Result, Ty); 7441 } 7442 case NEON::BI__builtin_neon_vnegd_s64: 7443 return Builder.CreateNeg(EmitScalarExpr(E->getArg(0)), "vnegd"); 7444 case NEON::BI__builtin_neon_vnegh_f16: 7445 return Builder.CreateFNeg(EmitScalarExpr(E->getArg(0)), "vnegh"); 7446 case NEON::BI__builtin_neon_vpmaxnm_v: 7447 case NEON::BI__builtin_neon_vpmaxnmq_v: { 7448 Int = Intrinsic::aarch64_neon_fmaxnmp; 7449 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmaxnm"); 7450 } 7451 case NEON::BI__builtin_neon_vpminnm_v: 7452 case NEON::BI__builtin_neon_vpminnmq_v: { 7453 Int = Intrinsic::aarch64_neon_fminnmp; 7454 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpminnm"); 7455 } 7456 case NEON::BI__builtin_neon_vsqrth_f16: { 7457 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7458 Int = Intrinsic::sqrt; 7459 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vsqrt"); 7460 } 7461 case NEON::BI__builtin_neon_vsqrt_v: 7462 case NEON::BI__builtin_neon_vsqrtq_v: { 7463 Int = Intrinsic::sqrt; 7464 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7465 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqrt"); 7466 } 7467 case NEON::BI__builtin_neon_vrbit_v: 7468 case NEON::BI__builtin_neon_vrbitq_v: { 7469 Int = Intrinsic::aarch64_neon_rbit; 7470 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrbit"); 7471 } 7472 case NEON::BI__builtin_neon_vaddv_u8: 7473 // FIXME: These are handled by the AArch64 scalar code. 7474 usgn = true; 7475 LLVM_FALLTHROUGH; 7476 case NEON::BI__builtin_neon_vaddv_s8: { 7477 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 7478 Ty = Int32Ty; 7479 VTy = llvm::VectorType::get(Int8Ty, 8); 7480 llvm::Type *Tys[2] = { Ty, VTy }; 7481 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7482 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 7483 return Builder.CreateTrunc(Ops[0], Int8Ty); 7484 } 7485 case NEON::BI__builtin_neon_vaddv_u16: 7486 usgn = true; 7487 LLVM_FALLTHROUGH; 7488 case NEON::BI__builtin_neon_vaddv_s16: { 7489 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 7490 Ty = Int32Ty; 7491 VTy = llvm::VectorType::get(Int16Ty, 4); 7492 llvm::Type *Tys[2] = { Ty, VTy }; 7493 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7494 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 7495 return Builder.CreateTrunc(Ops[0], Int16Ty); 7496 } 7497 case NEON::BI__builtin_neon_vaddvq_u8: 7498 usgn = true; 7499 LLVM_FALLTHROUGH; 7500 case NEON::BI__builtin_neon_vaddvq_s8: { 7501 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 7502 Ty = Int32Ty; 7503 VTy = llvm::VectorType::get(Int8Ty, 16); 7504 llvm::Type *Tys[2] = { Ty, VTy }; 7505 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7506 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 7507 return Builder.CreateTrunc(Ops[0], Int8Ty); 7508 } 7509 case NEON::BI__builtin_neon_vaddvq_u16: 7510 usgn = true; 7511 LLVM_FALLTHROUGH; 7512 case NEON::BI__builtin_neon_vaddvq_s16: { 7513 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 7514 Ty = Int32Ty; 7515 VTy = llvm::VectorType::get(Int16Ty, 8); 7516 llvm::Type *Tys[2] = { Ty, VTy }; 7517 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7518 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 7519 return Builder.CreateTrunc(Ops[0], Int16Ty); 7520 } 7521 case NEON::BI__builtin_neon_vmaxv_u8: { 7522 Int = Intrinsic::aarch64_neon_umaxv; 7523 Ty = Int32Ty; 7524 VTy = llvm::VectorType::get(Int8Ty, 8); 7525 llvm::Type *Tys[2] = { Ty, VTy }; 7526 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7527 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7528 return Builder.CreateTrunc(Ops[0], Int8Ty); 7529 } 7530 case NEON::BI__builtin_neon_vmaxv_u16: { 7531 Int = Intrinsic::aarch64_neon_umaxv; 7532 Ty = Int32Ty; 7533 VTy = llvm::VectorType::get(Int16Ty, 4); 7534 llvm::Type *Tys[2] = { Ty, VTy }; 7535 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7536 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7537 return Builder.CreateTrunc(Ops[0], Int16Ty); 7538 } 7539 case NEON::BI__builtin_neon_vmaxvq_u8: { 7540 Int = Intrinsic::aarch64_neon_umaxv; 7541 Ty = Int32Ty; 7542 VTy = llvm::VectorType::get(Int8Ty, 16); 7543 llvm::Type *Tys[2] = { Ty, VTy }; 7544 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7545 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7546 return Builder.CreateTrunc(Ops[0], Int8Ty); 7547 } 7548 case NEON::BI__builtin_neon_vmaxvq_u16: { 7549 Int = Intrinsic::aarch64_neon_umaxv; 7550 Ty = Int32Ty; 7551 VTy = llvm::VectorType::get(Int16Ty, 8); 7552 llvm::Type *Tys[2] = { Ty, VTy }; 7553 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7554 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7555 return Builder.CreateTrunc(Ops[0], Int16Ty); 7556 } 7557 case NEON::BI__builtin_neon_vmaxv_s8: { 7558 Int = Intrinsic::aarch64_neon_smaxv; 7559 Ty = Int32Ty; 7560 VTy = llvm::VectorType::get(Int8Ty, 8); 7561 llvm::Type *Tys[2] = { Ty, VTy }; 7562 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7563 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7564 return Builder.CreateTrunc(Ops[0], Int8Ty); 7565 } 7566 case NEON::BI__builtin_neon_vmaxv_s16: { 7567 Int = Intrinsic::aarch64_neon_smaxv; 7568 Ty = Int32Ty; 7569 VTy = llvm::VectorType::get(Int16Ty, 4); 7570 llvm::Type *Tys[2] = { Ty, VTy }; 7571 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7572 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7573 return Builder.CreateTrunc(Ops[0], Int16Ty); 7574 } 7575 case NEON::BI__builtin_neon_vmaxvq_s8: { 7576 Int = Intrinsic::aarch64_neon_smaxv; 7577 Ty = Int32Ty; 7578 VTy = llvm::VectorType::get(Int8Ty, 16); 7579 llvm::Type *Tys[2] = { Ty, VTy }; 7580 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7581 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7582 return Builder.CreateTrunc(Ops[0], Int8Ty); 7583 } 7584 case NEON::BI__builtin_neon_vmaxvq_s16: { 7585 Int = Intrinsic::aarch64_neon_smaxv; 7586 Ty = Int32Ty; 7587 VTy = llvm::VectorType::get(Int16Ty, 8); 7588 llvm::Type *Tys[2] = { Ty, VTy }; 7589 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7590 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7591 return Builder.CreateTrunc(Ops[0], Int16Ty); 7592 } 7593 case NEON::BI__builtin_neon_vmaxv_f16: { 7594 Int = Intrinsic::aarch64_neon_fmaxv; 7595 Ty = HalfTy; 7596 VTy = llvm::VectorType::get(HalfTy, 4); 7597 llvm::Type *Tys[2] = { Ty, VTy }; 7598 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7599 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7600 return Builder.CreateTrunc(Ops[0], HalfTy); 7601 } 7602 case NEON::BI__builtin_neon_vmaxvq_f16: { 7603 Int = Intrinsic::aarch64_neon_fmaxv; 7604 Ty = HalfTy; 7605 VTy = llvm::VectorType::get(HalfTy, 8); 7606 llvm::Type *Tys[2] = { Ty, VTy }; 7607 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7608 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7609 return Builder.CreateTrunc(Ops[0], HalfTy); 7610 } 7611 case NEON::BI__builtin_neon_vminv_u8: { 7612 Int = Intrinsic::aarch64_neon_uminv; 7613 Ty = Int32Ty; 7614 VTy = llvm::VectorType::get(Int8Ty, 8); 7615 llvm::Type *Tys[2] = { Ty, VTy }; 7616 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7617 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7618 return Builder.CreateTrunc(Ops[0], Int8Ty); 7619 } 7620 case NEON::BI__builtin_neon_vminv_u16: { 7621 Int = Intrinsic::aarch64_neon_uminv; 7622 Ty = Int32Ty; 7623 VTy = llvm::VectorType::get(Int16Ty, 4); 7624 llvm::Type *Tys[2] = { Ty, VTy }; 7625 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7626 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7627 return Builder.CreateTrunc(Ops[0], Int16Ty); 7628 } 7629 case NEON::BI__builtin_neon_vminvq_u8: { 7630 Int = Intrinsic::aarch64_neon_uminv; 7631 Ty = Int32Ty; 7632 VTy = llvm::VectorType::get(Int8Ty, 16); 7633 llvm::Type *Tys[2] = { Ty, VTy }; 7634 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7635 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7636 return Builder.CreateTrunc(Ops[0], Int8Ty); 7637 } 7638 case NEON::BI__builtin_neon_vminvq_u16: { 7639 Int = Intrinsic::aarch64_neon_uminv; 7640 Ty = Int32Ty; 7641 VTy = llvm::VectorType::get(Int16Ty, 8); 7642 llvm::Type *Tys[2] = { Ty, VTy }; 7643 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7644 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7645 return Builder.CreateTrunc(Ops[0], Int16Ty); 7646 } 7647 case NEON::BI__builtin_neon_vminv_s8: { 7648 Int = Intrinsic::aarch64_neon_sminv; 7649 Ty = Int32Ty; 7650 VTy = llvm::VectorType::get(Int8Ty, 8); 7651 llvm::Type *Tys[2] = { Ty, VTy }; 7652 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7653 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7654 return Builder.CreateTrunc(Ops[0], Int8Ty); 7655 } 7656 case NEON::BI__builtin_neon_vminv_s16: { 7657 Int = Intrinsic::aarch64_neon_sminv; 7658 Ty = Int32Ty; 7659 VTy = llvm::VectorType::get(Int16Ty, 4); 7660 llvm::Type *Tys[2] = { Ty, VTy }; 7661 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7662 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7663 return Builder.CreateTrunc(Ops[0], Int16Ty); 7664 } 7665 case NEON::BI__builtin_neon_vminvq_s8: { 7666 Int = Intrinsic::aarch64_neon_sminv; 7667 Ty = Int32Ty; 7668 VTy = llvm::VectorType::get(Int8Ty, 16); 7669 llvm::Type *Tys[2] = { Ty, VTy }; 7670 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7671 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7672 return Builder.CreateTrunc(Ops[0], Int8Ty); 7673 } 7674 case NEON::BI__builtin_neon_vminvq_s16: { 7675 Int = Intrinsic::aarch64_neon_sminv; 7676 Ty = Int32Ty; 7677 VTy = llvm::VectorType::get(Int16Ty, 8); 7678 llvm::Type *Tys[2] = { Ty, VTy }; 7679 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7680 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7681 return Builder.CreateTrunc(Ops[0], Int16Ty); 7682 } 7683 case NEON::BI__builtin_neon_vminv_f16: { 7684 Int = Intrinsic::aarch64_neon_fminv; 7685 Ty = HalfTy; 7686 VTy = llvm::VectorType::get(HalfTy, 4); 7687 llvm::Type *Tys[2] = { Ty, VTy }; 7688 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7689 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7690 return Builder.CreateTrunc(Ops[0], HalfTy); 7691 } 7692 case NEON::BI__builtin_neon_vminvq_f16: { 7693 Int = Intrinsic::aarch64_neon_fminv; 7694 Ty = HalfTy; 7695 VTy = llvm::VectorType::get(HalfTy, 8); 7696 llvm::Type *Tys[2] = { Ty, VTy }; 7697 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7698 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7699 return Builder.CreateTrunc(Ops[0], HalfTy); 7700 } 7701 case NEON::BI__builtin_neon_vmaxnmv_f16: { 7702 Int = Intrinsic::aarch64_neon_fmaxnmv; 7703 Ty = HalfTy; 7704 VTy = llvm::VectorType::get(HalfTy, 4); 7705 llvm::Type *Tys[2] = { Ty, VTy }; 7706 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7707 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxnmv"); 7708 return Builder.CreateTrunc(Ops[0], HalfTy); 7709 } 7710 case NEON::BI__builtin_neon_vmaxnmvq_f16: { 7711 Int = Intrinsic::aarch64_neon_fmaxnmv; 7712 Ty = HalfTy; 7713 VTy = llvm::VectorType::get(HalfTy, 8); 7714 llvm::Type *Tys[2] = { Ty, VTy }; 7715 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7716 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxnmv"); 7717 return Builder.CreateTrunc(Ops[0], HalfTy); 7718 } 7719 case NEON::BI__builtin_neon_vminnmv_f16: { 7720 Int = Intrinsic::aarch64_neon_fminnmv; 7721 Ty = HalfTy; 7722 VTy = llvm::VectorType::get(HalfTy, 4); 7723 llvm::Type *Tys[2] = { Ty, VTy }; 7724 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7725 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminnmv"); 7726 return Builder.CreateTrunc(Ops[0], HalfTy); 7727 } 7728 case NEON::BI__builtin_neon_vminnmvq_f16: { 7729 Int = Intrinsic::aarch64_neon_fminnmv; 7730 Ty = HalfTy; 7731 VTy = llvm::VectorType::get(HalfTy, 8); 7732 llvm::Type *Tys[2] = { Ty, VTy }; 7733 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7734 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminnmv"); 7735 return Builder.CreateTrunc(Ops[0], HalfTy); 7736 } 7737 case NEON::BI__builtin_neon_vmul_n_f64: { 7738 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 7739 Value *RHS = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), DoubleTy); 7740 return Builder.CreateFMul(Ops[0], RHS); 7741 } 7742 case NEON::BI__builtin_neon_vaddlv_u8: { 7743 Int = Intrinsic::aarch64_neon_uaddlv; 7744 Ty = Int32Ty; 7745 VTy = llvm::VectorType::get(Int8Ty, 8); 7746 llvm::Type *Tys[2] = { Ty, VTy }; 7747 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7748 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7749 return Builder.CreateTrunc(Ops[0], Int16Ty); 7750 } 7751 case NEON::BI__builtin_neon_vaddlv_u16: { 7752 Int = Intrinsic::aarch64_neon_uaddlv; 7753 Ty = Int32Ty; 7754 VTy = llvm::VectorType::get(Int16Ty, 4); 7755 llvm::Type *Tys[2] = { Ty, VTy }; 7756 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7757 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7758 } 7759 case NEON::BI__builtin_neon_vaddlvq_u8: { 7760 Int = Intrinsic::aarch64_neon_uaddlv; 7761 Ty = Int32Ty; 7762 VTy = llvm::VectorType::get(Int8Ty, 16); 7763 llvm::Type *Tys[2] = { Ty, VTy }; 7764 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7765 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7766 return Builder.CreateTrunc(Ops[0], Int16Ty); 7767 } 7768 case NEON::BI__builtin_neon_vaddlvq_u16: { 7769 Int = Intrinsic::aarch64_neon_uaddlv; 7770 Ty = Int32Ty; 7771 VTy = llvm::VectorType::get(Int16Ty, 8); 7772 llvm::Type *Tys[2] = { Ty, VTy }; 7773 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7774 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7775 } 7776 case NEON::BI__builtin_neon_vaddlv_s8: { 7777 Int = Intrinsic::aarch64_neon_saddlv; 7778 Ty = Int32Ty; 7779 VTy = llvm::VectorType::get(Int8Ty, 8); 7780 llvm::Type *Tys[2] = { Ty, VTy }; 7781 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7782 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7783 return Builder.CreateTrunc(Ops[0], Int16Ty); 7784 } 7785 case NEON::BI__builtin_neon_vaddlv_s16: { 7786 Int = Intrinsic::aarch64_neon_saddlv; 7787 Ty = Int32Ty; 7788 VTy = llvm::VectorType::get(Int16Ty, 4); 7789 llvm::Type *Tys[2] = { Ty, VTy }; 7790 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7791 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7792 } 7793 case NEON::BI__builtin_neon_vaddlvq_s8: { 7794 Int = Intrinsic::aarch64_neon_saddlv; 7795 Ty = Int32Ty; 7796 VTy = llvm::VectorType::get(Int8Ty, 16); 7797 llvm::Type *Tys[2] = { Ty, VTy }; 7798 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7799 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7800 return Builder.CreateTrunc(Ops[0], Int16Ty); 7801 } 7802 case NEON::BI__builtin_neon_vaddlvq_s16: { 7803 Int = Intrinsic::aarch64_neon_saddlv; 7804 Ty = Int32Ty; 7805 VTy = llvm::VectorType::get(Int16Ty, 8); 7806 llvm::Type *Tys[2] = { Ty, VTy }; 7807 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7808 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7809 } 7810 case NEON::BI__builtin_neon_vsri_n_v: 7811 case NEON::BI__builtin_neon_vsriq_n_v: { 7812 Int = Intrinsic::aarch64_neon_vsri; 7813 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 7814 return EmitNeonCall(Intrin, Ops, "vsri_n"); 7815 } 7816 case NEON::BI__builtin_neon_vsli_n_v: 7817 case NEON::BI__builtin_neon_vsliq_n_v: { 7818 Int = Intrinsic::aarch64_neon_vsli; 7819 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 7820 return EmitNeonCall(Intrin, Ops, "vsli_n"); 7821 } 7822 case NEON::BI__builtin_neon_vsra_n_v: 7823 case NEON::BI__builtin_neon_vsraq_n_v: 7824 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7825 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 7826 return Builder.CreateAdd(Ops[0], Ops[1]); 7827 case NEON::BI__builtin_neon_vrsra_n_v: 7828 case NEON::BI__builtin_neon_vrsraq_n_v: { 7829 Int = usgn ? Intrinsic::aarch64_neon_urshl : Intrinsic::aarch64_neon_srshl; 7830 SmallVector<llvm::Value*,2> TmpOps; 7831 TmpOps.push_back(Ops[1]); 7832 TmpOps.push_back(Ops[2]); 7833 Function* F = CGM.getIntrinsic(Int, Ty); 7834 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vrshr_n", 1, true); 7835 Ops[0] = Builder.CreateBitCast(Ops[0], VTy); 7836 return Builder.CreateAdd(Ops[0], tmp); 7837 } 7838 // FIXME: Sharing loads & stores with 32-bit is complicated by the absence 7839 // of an Align parameter here. 7840 case NEON::BI__builtin_neon_vld1_x2_v: 7841 case NEON::BI__builtin_neon_vld1q_x2_v: 7842 case NEON::BI__builtin_neon_vld1_x3_v: 7843 case NEON::BI__builtin_neon_vld1q_x3_v: 7844 case NEON::BI__builtin_neon_vld1_x4_v: 7845 case NEON::BI__builtin_neon_vld1q_x4_v: { 7846 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 7847 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7848 llvm::Type *Tys[2] = { VTy, PTy }; 7849 unsigned Int; 7850 switch (BuiltinID) { 7851 case NEON::BI__builtin_neon_vld1_x2_v: 7852 case NEON::BI__builtin_neon_vld1q_x2_v: 7853 Int = Intrinsic::aarch64_neon_ld1x2; 7854 break; 7855 case NEON::BI__builtin_neon_vld1_x3_v: 7856 case NEON::BI__builtin_neon_vld1q_x3_v: 7857 Int = Intrinsic::aarch64_neon_ld1x3; 7858 break; 7859 case NEON::BI__builtin_neon_vld1_x4_v: 7860 case NEON::BI__builtin_neon_vld1q_x4_v: 7861 Int = Intrinsic::aarch64_neon_ld1x4; 7862 break; 7863 } 7864 Function *F = CGM.getIntrinsic(Int, Tys); 7865 Ops[1] = Builder.CreateCall(F, Ops[1], "vld1xN"); 7866 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 7867 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7868 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7869 } 7870 case NEON::BI__builtin_neon_vst1_x2_v: 7871 case NEON::BI__builtin_neon_vst1q_x2_v: 7872 case NEON::BI__builtin_neon_vst1_x3_v: 7873 case NEON::BI__builtin_neon_vst1q_x3_v: 7874 case NEON::BI__builtin_neon_vst1_x4_v: 7875 case NEON::BI__builtin_neon_vst1q_x4_v: { 7876 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 7877 llvm::Type *Tys[2] = { VTy, PTy }; 7878 unsigned Int; 7879 switch (BuiltinID) { 7880 case NEON::BI__builtin_neon_vst1_x2_v: 7881 case NEON::BI__builtin_neon_vst1q_x2_v: 7882 Int = Intrinsic::aarch64_neon_st1x2; 7883 break; 7884 case NEON::BI__builtin_neon_vst1_x3_v: 7885 case NEON::BI__builtin_neon_vst1q_x3_v: 7886 Int = Intrinsic::aarch64_neon_st1x3; 7887 break; 7888 case NEON::BI__builtin_neon_vst1_x4_v: 7889 case NEON::BI__builtin_neon_vst1q_x4_v: 7890 Int = Intrinsic::aarch64_neon_st1x4; 7891 break; 7892 } 7893 std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end()); 7894 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 7895 } 7896 case NEON::BI__builtin_neon_vld1_v: 7897 case NEON::BI__builtin_neon_vld1q_v: { 7898 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 7899 auto Alignment = CharUnits::fromQuantity( 7900 BuiltinID == NEON::BI__builtin_neon_vld1_v ? 8 : 16); 7901 return Builder.CreateAlignedLoad(VTy, Ops[0], Alignment); 7902 } 7903 case NEON::BI__builtin_neon_vst1_v: 7904 case NEON::BI__builtin_neon_vst1q_v: 7905 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 7906 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 7907 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7908 case NEON::BI__builtin_neon_vld1_lane_v: 7909 case NEON::BI__builtin_neon_vld1q_lane_v: { 7910 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7911 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 7912 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7913 auto Alignment = CharUnits::fromQuantity( 7914 BuiltinID == NEON::BI__builtin_neon_vld1_lane_v ? 8 : 16); 7915 Ops[0] = 7916 Builder.CreateAlignedLoad(VTy->getElementType(), Ops[0], Alignment); 7917 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vld1_lane"); 7918 } 7919 case NEON::BI__builtin_neon_vld1_dup_v: 7920 case NEON::BI__builtin_neon_vld1q_dup_v: { 7921 Value *V = UndefValue::get(Ty); 7922 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 7923 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7924 auto Alignment = CharUnits::fromQuantity( 7925 BuiltinID == NEON::BI__builtin_neon_vld1_dup_v ? 8 : 16); 7926 Ops[0] = 7927 Builder.CreateAlignedLoad(VTy->getElementType(), Ops[0], Alignment); 7928 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 7929 Ops[0] = Builder.CreateInsertElement(V, Ops[0], CI); 7930 return EmitNeonSplat(Ops[0], CI); 7931 } 7932 case NEON::BI__builtin_neon_vst1_lane_v: 7933 case NEON::BI__builtin_neon_vst1q_lane_v: 7934 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7935 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 7936 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 7937 return Builder.CreateDefaultAlignedStore(Ops[1], 7938 Builder.CreateBitCast(Ops[0], Ty)); 7939 case NEON::BI__builtin_neon_vld2_v: 7940 case NEON::BI__builtin_neon_vld2q_v: { 7941 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 7942 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7943 llvm::Type *Tys[2] = { VTy, PTy }; 7944 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2, Tys); 7945 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 7946 Ops[0] = Builder.CreateBitCast(Ops[0], 7947 llvm::PointerType::getUnqual(Ops[1]->getType())); 7948 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7949 } 7950 case NEON::BI__builtin_neon_vld3_v: 7951 case NEON::BI__builtin_neon_vld3q_v: { 7952 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 7953 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7954 llvm::Type *Tys[2] = { VTy, PTy }; 7955 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3, Tys); 7956 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 7957 Ops[0] = Builder.CreateBitCast(Ops[0], 7958 llvm::PointerType::getUnqual(Ops[1]->getType())); 7959 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7960 } 7961 case NEON::BI__builtin_neon_vld4_v: 7962 case NEON::BI__builtin_neon_vld4q_v: { 7963 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 7964 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7965 llvm::Type *Tys[2] = { VTy, PTy }; 7966 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4, Tys); 7967 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 7968 Ops[0] = Builder.CreateBitCast(Ops[0], 7969 llvm::PointerType::getUnqual(Ops[1]->getType())); 7970 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7971 } 7972 case NEON::BI__builtin_neon_vld2_dup_v: 7973 case NEON::BI__builtin_neon_vld2q_dup_v: { 7974 llvm::Type *PTy = 7975 llvm::PointerType::getUnqual(VTy->getElementType()); 7976 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7977 llvm::Type *Tys[2] = { VTy, PTy }; 7978 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2r, Tys); 7979 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 7980 Ops[0] = Builder.CreateBitCast(Ops[0], 7981 llvm::PointerType::getUnqual(Ops[1]->getType())); 7982 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7983 } 7984 case NEON::BI__builtin_neon_vld3_dup_v: 7985 case NEON::BI__builtin_neon_vld3q_dup_v: { 7986 llvm::Type *PTy = 7987 llvm::PointerType::getUnqual(VTy->getElementType()); 7988 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7989 llvm::Type *Tys[2] = { VTy, PTy }; 7990 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3r, Tys); 7991 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 7992 Ops[0] = Builder.CreateBitCast(Ops[0], 7993 llvm::PointerType::getUnqual(Ops[1]->getType())); 7994 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7995 } 7996 case NEON::BI__builtin_neon_vld4_dup_v: 7997 case NEON::BI__builtin_neon_vld4q_dup_v: { 7998 llvm::Type *PTy = 7999 llvm::PointerType::getUnqual(VTy->getElementType()); 8000 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 8001 llvm::Type *Tys[2] = { VTy, PTy }; 8002 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4r, Tys); 8003 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 8004 Ops[0] = Builder.CreateBitCast(Ops[0], 8005 llvm::PointerType::getUnqual(Ops[1]->getType())); 8006 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8007 } 8008 case NEON::BI__builtin_neon_vld2_lane_v: 8009 case NEON::BI__builtin_neon_vld2q_lane_v: { 8010 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 8011 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2lane, Tys); 8012 Ops.push_back(Ops[1]); 8013 Ops.erase(Ops.begin()+1); 8014 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8015 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8016 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 8017 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld2_lane"); 8018 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 8019 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 8020 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8021 } 8022 case NEON::BI__builtin_neon_vld3_lane_v: 8023 case NEON::BI__builtin_neon_vld3q_lane_v: { 8024 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 8025 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3lane, Tys); 8026 Ops.push_back(Ops[1]); 8027 Ops.erase(Ops.begin()+1); 8028 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8029 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8030 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 8031 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 8032 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld3_lane"); 8033 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 8034 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 8035 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8036 } 8037 case NEON::BI__builtin_neon_vld4_lane_v: 8038 case NEON::BI__builtin_neon_vld4q_lane_v: { 8039 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 8040 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4lane, Tys); 8041 Ops.push_back(Ops[1]); 8042 Ops.erase(Ops.begin()+1); 8043 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8044 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8045 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 8046 Ops[4] = Builder.CreateBitCast(Ops[4], Ty); 8047 Ops[5] = Builder.CreateZExt(Ops[5], Int64Ty); 8048 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld4_lane"); 8049 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 8050 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 8051 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8052 } 8053 case NEON::BI__builtin_neon_vst2_v: 8054 case NEON::BI__builtin_neon_vst2q_v: { 8055 Ops.push_back(Ops[0]); 8056 Ops.erase(Ops.begin()); 8057 llvm::Type *Tys[2] = { VTy, Ops[2]->getType() }; 8058 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2, Tys), 8059 Ops, ""); 8060 } 8061 case NEON::BI__builtin_neon_vst2_lane_v: 8062 case NEON::BI__builtin_neon_vst2q_lane_v: { 8063 Ops.push_back(Ops[0]); 8064 Ops.erase(Ops.begin()); 8065 Ops[2] = Builder.CreateZExt(Ops[2], Int64Ty); 8066 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 8067 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2lane, Tys), 8068 Ops, ""); 8069 } 8070 case NEON::BI__builtin_neon_vst3_v: 8071 case NEON::BI__builtin_neon_vst3q_v: { 8072 Ops.push_back(Ops[0]); 8073 Ops.erase(Ops.begin()); 8074 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 8075 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3, Tys), 8076 Ops, ""); 8077 } 8078 case NEON::BI__builtin_neon_vst3_lane_v: 8079 case NEON::BI__builtin_neon_vst3q_lane_v: { 8080 Ops.push_back(Ops[0]); 8081 Ops.erase(Ops.begin()); 8082 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 8083 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 8084 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3lane, Tys), 8085 Ops, ""); 8086 } 8087 case NEON::BI__builtin_neon_vst4_v: 8088 case NEON::BI__builtin_neon_vst4q_v: { 8089 Ops.push_back(Ops[0]); 8090 Ops.erase(Ops.begin()); 8091 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 8092 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4, Tys), 8093 Ops, ""); 8094 } 8095 case NEON::BI__builtin_neon_vst4_lane_v: 8096 case NEON::BI__builtin_neon_vst4q_lane_v: { 8097 Ops.push_back(Ops[0]); 8098 Ops.erase(Ops.begin()); 8099 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 8100 llvm::Type *Tys[2] = { VTy, Ops[5]->getType() }; 8101 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4lane, Tys), 8102 Ops, ""); 8103 } 8104 case NEON::BI__builtin_neon_vtrn_v: 8105 case NEON::BI__builtin_neon_vtrnq_v: { 8106 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 8107 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8108 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8109 Value *SV = nullptr; 8110 8111 for (unsigned vi = 0; vi != 2; ++vi) { 8112 SmallVector<uint32_t, 16> Indices; 8113 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 8114 Indices.push_back(i+vi); 8115 Indices.push_back(i+e+vi); 8116 } 8117 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 8118 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 8119 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 8120 } 8121 return SV; 8122 } 8123 case NEON::BI__builtin_neon_vuzp_v: 8124 case NEON::BI__builtin_neon_vuzpq_v: { 8125 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 8126 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8127 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8128 Value *SV = nullptr; 8129 8130 for (unsigned vi = 0; vi != 2; ++vi) { 8131 SmallVector<uint32_t, 16> Indices; 8132 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 8133 Indices.push_back(2*i+vi); 8134 8135 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 8136 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 8137 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 8138 } 8139 return SV; 8140 } 8141 case NEON::BI__builtin_neon_vzip_v: 8142 case NEON::BI__builtin_neon_vzipq_v: { 8143 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 8144 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8145 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8146 Value *SV = nullptr; 8147 8148 for (unsigned vi = 0; vi != 2; ++vi) { 8149 SmallVector<uint32_t, 16> Indices; 8150 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 8151 Indices.push_back((i + vi*e) >> 1); 8152 Indices.push_back(((i + vi*e) >> 1)+e); 8153 } 8154 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 8155 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 8156 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 8157 } 8158 return SV; 8159 } 8160 case NEON::BI__builtin_neon_vqtbl1q_v: { 8161 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl1, Ty), 8162 Ops, "vtbl1"); 8163 } 8164 case NEON::BI__builtin_neon_vqtbl2q_v: { 8165 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl2, Ty), 8166 Ops, "vtbl2"); 8167 } 8168 case NEON::BI__builtin_neon_vqtbl3q_v: { 8169 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl3, Ty), 8170 Ops, "vtbl3"); 8171 } 8172 case NEON::BI__builtin_neon_vqtbl4q_v: { 8173 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl4, Ty), 8174 Ops, "vtbl4"); 8175 } 8176 case NEON::BI__builtin_neon_vqtbx1q_v: { 8177 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx1, Ty), 8178 Ops, "vtbx1"); 8179 } 8180 case NEON::BI__builtin_neon_vqtbx2q_v: { 8181 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx2, Ty), 8182 Ops, "vtbx2"); 8183 } 8184 case NEON::BI__builtin_neon_vqtbx3q_v: { 8185 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx3, Ty), 8186 Ops, "vtbx3"); 8187 } 8188 case NEON::BI__builtin_neon_vqtbx4q_v: { 8189 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx4, Ty), 8190 Ops, "vtbx4"); 8191 } 8192 case NEON::BI__builtin_neon_vsqadd_v: 8193 case NEON::BI__builtin_neon_vsqaddq_v: { 8194 Int = Intrinsic::aarch64_neon_usqadd; 8195 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqadd"); 8196 } 8197 case NEON::BI__builtin_neon_vuqadd_v: 8198 case NEON::BI__builtin_neon_vuqaddq_v: { 8199 Int = Intrinsic::aarch64_neon_suqadd; 8200 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vuqadd"); 8201 } 8202 } 8203 } 8204 8205 llvm::Value *CodeGenFunction:: 8206 BuildVector(ArrayRef<llvm::Value*> Ops) { 8207 assert((Ops.size() & (Ops.size() - 1)) == 0 && 8208 "Not a power-of-two sized vector!"); 8209 bool AllConstants = true; 8210 for (unsigned i = 0, e = Ops.size(); i != e && AllConstants; ++i) 8211 AllConstants &= isa<Constant>(Ops[i]); 8212 8213 // If this is a constant vector, create a ConstantVector. 8214 if (AllConstants) { 8215 SmallVector<llvm::Constant*, 16> CstOps; 8216 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 8217 CstOps.push_back(cast<Constant>(Ops[i])); 8218 return llvm::ConstantVector::get(CstOps); 8219 } 8220 8221 // Otherwise, insertelement the values to build the vector. 8222 Value *Result = 8223 llvm::UndefValue::get(llvm::VectorType::get(Ops[0]->getType(), Ops.size())); 8224 8225 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 8226 Result = Builder.CreateInsertElement(Result, Ops[i], Builder.getInt32(i)); 8227 8228 return Result; 8229 } 8230 8231 // Convert the mask from an integer type to a vector of i1. 8232 static Value *getMaskVecValue(CodeGenFunction &CGF, Value *Mask, 8233 unsigned NumElts) { 8234 8235 llvm::VectorType *MaskTy = llvm::VectorType::get(CGF.Builder.getInt1Ty(), 8236 cast<IntegerType>(Mask->getType())->getBitWidth()); 8237 Value *MaskVec = CGF.Builder.CreateBitCast(Mask, MaskTy); 8238 8239 // If we have less than 8 elements, then the starting mask was an i8 and 8240 // we need to extract down to the right number of elements. 8241 if (NumElts < 8) { 8242 uint32_t Indices[4]; 8243 for (unsigned i = 0; i != NumElts; ++i) 8244 Indices[i] = i; 8245 MaskVec = CGF.Builder.CreateShuffleVector(MaskVec, MaskVec, 8246 makeArrayRef(Indices, NumElts), 8247 "extract"); 8248 } 8249 return MaskVec; 8250 } 8251 8252 static Value *EmitX86MaskedStore(CodeGenFunction &CGF, 8253 SmallVectorImpl<Value *> &Ops, 8254 unsigned Align) { 8255 // Cast the pointer to right type. 8256 Ops[0] = CGF.Builder.CreateBitCast(Ops[0], 8257 llvm::PointerType::getUnqual(Ops[1]->getType())); 8258 8259 // If the mask is all ones just emit a regular store. 8260 if (const auto *C = dyn_cast<Constant>(Ops[2])) 8261 if (C->isAllOnesValue()) 8262 return CGF.Builder.CreateAlignedStore(Ops[1], Ops[0], Align); 8263 8264 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 8265 Ops[1]->getType()->getVectorNumElements()); 8266 8267 return CGF.Builder.CreateMaskedStore(Ops[1], Ops[0], Align, MaskVec); 8268 } 8269 8270 static Value *EmitX86MaskedLoad(CodeGenFunction &CGF, 8271 SmallVectorImpl<Value *> &Ops, unsigned Align) { 8272 // Cast the pointer to right type. 8273 Ops[0] = CGF.Builder.CreateBitCast(Ops[0], 8274 llvm::PointerType::getUnqual(Ops[1]->getType())); 8275 8276 // If the mask is all ones just emit a regular store. 8277 if (const auto *C = dyn_cast<Constant>(Ops[2])) 8278 if (C->isAllOnesValue()) 8279 return CGF.Builder.CreateAlignedLoad(Ops[0], Align); 8280 8281 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 8282 Ops[1]->getType()->getVectorNumElements()); 8283 8284 return CGF.Builder.CreateMaskedLoad(Ops[0], Align, MaskVec, Ops[1]); 8285 } 8286 8287 static Value *EmitX86MaskLogic(CodeGenFunction &CGF, Instruction::BinaryOps Opc, 8288 unsigned NumElts, SmallVectorImpl<Value *> &Ops, 8289 bool InvertLHS = false) { 8290 Value *LHS = getMaskVecValue(CGF, Ops[0], NumElts); 8291 Value *RHS = getMaskVecValue(CGF, Ops[1], NumElts); 8292 8293 if (InvertLHS) 8294 LHS = CGF.Builder.CreateNot(LHS); 8295 8296 return CGF.Builder.CreateBitCast(CGF.Builder.CreateBinOp(Opc, LHS, RHS), 8297 CGF.Builder.getIntNTy(std::max(NumElts, 8U))); 8298 } 8299 8300 static Value *EmitX86SubVectorBroadcast(CodeGenFunction &CGF, 8301 SmallVectorImpl<Value *> &Ops, 8302 llvm::Type *DstTy, 8303 unsigned SrcSizeInBits, 8304 unsigned Align) { 8305 // Load the subvector. 8306 Ops[0] = CGF.Builder.CreateAlignedLoad(Ops[0], Align); 8307 8308 // Create broadcast mask. 8309 unsigned NumDstElts = DstTy->getVectorNumElements(); 8310 unsigned NumSrcElts = SrcSizeInBits / DstTy->getScalarSizeInBits(); 8311 8312 SmallVector<uint32_t, 8> Mask; 8313 for (unsigned i = 0; i != NumDstElts; i += NumSrcElts) 8314 for (unsigned j = 0; j != NumSrcElts; ++j) 8315 Mask.push_back(j); 8316 8317 return CGF.Builder.CreateShuffleVector(Ops[0], Ops[0], Mask, "subvecbcst"); 8318 } 8319 8320 static Value *EmitX86Select(CodeGenFunction &CGF, 8321 Value *Mask, Value *Op0, Value *Op1) { 8322 8323 // If the mask is all ones just return first argument. 8324 if (const auto *C = dyn_cast<Constant>(Mask)) 8325 if (C->isAllOnesValue()) 8326 return Op0; 8327 8328 Mask = getMaskVecValue(CGF, Mask, Op0->getType()->getVectorNumElements()); 8329 8330 return CGF.Builder.CreateSelect(Mask, Op0, Op1); 8331 } 8332 8333 static Value *EmitX86MaskedCompareResult(CodeGenFunction &CGF, Value *Cmp, 8334 unsigned NumElts, Value *MaskIn) { 8335 if (MaskIn) { 8336 const auto *C = dyn_cast<Constant>(MaskIn); 8337 if (!C || !C->isAllOnesValue()) 8338 Cmp = CGF.Builder.CreateAnd(Cmp, getMaskVecValue(CGF, MaskIn, NumElts)); 8339 } 8340 8341 if (NumElts < 8) { 8342 uint32_t Indices[8]; 8343 for (unsigned i = 0; i != NumElts; ++i) 8344 Indices[i] = i; 8345 for (unsigned i = NumElts; i != 8; ++i) 8346 Indices[i] = i % NumElts + NumElts; 8347 Cmp = CGF.Builder.CreateShuffleVector( 8348 Cmp, llvm::Constant::getNullValue(Cmp->getType()), Indices); 8349 } 8350 8351 return CGF.Builder.CreateBitCast(Cmp, 8352 IntegerType::get(CGF.getLLVMContext(), 8353 std::max(NumElts, 8U))); 8354 } 8355 8356 static Value *EmitX86MaskedCompare(CodeGenFunction &CGF, unsigned CC, 8357 bool Signed, ArrayRef<Value *> Ops) { 8358 assert((Ops.size() == 2 || Ops.size() == 4) && 8359 "Unexpected number of arguments"); 8360 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 8361 Value *Cmp; 8362 8363 if (CC == 3) { 8364 Cmp = Constant::getNullValue( 8365 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 8366 } else if (CC == 7) { 8367 Cmp = Constant::getAllOnesValue( 8368 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 8369 } else { 8370 ICmpInst::Predicate Pred; 8371 switch (CC) { 8372 default: llvm_unreachable("Unknown condition code"); 8373 case 0: Pred = ICmpInst::ICMP_EQ; break; 8374 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 8375 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 8376 case 4: Pred = ICmpInst::ICMP_NE; break; 8377 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 8378 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 8379 } 8380 Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 8381 } 8382 8383 Value *MaskIn = nullptr; 8384 if (Ops.size() == 4) 8385 MaskIn = Ops[3]; 8386 8387 return EmitX86MaskedCompareResult(CGF, Cmp, NumElts, MaskIn); 8388 } 8389 8390 static Value *EmitX86ConvertToMask(CodeGenFunction &CGF, Value *In) { 8391 Value *Zero = Constant::getNullValue(In->getType()); 8392 return EmitX86MaskedCompare(CGF, 1, true, { In, Zero }); 8393 } 8394 8395 static Value *EmitX86Abs(CodeGenFunction &CGF, ArrayRef<Value *> Ops) { 8396 8397 llvm::Type *Ty = Ops[0]->getType(); 8398 Value *Zero = llvm::Constant::getNullValue(Ty); 8399 Value *Sub = CGF.Builder.CreateSub(Zero, Ops[0]); 8400 Value *Cmp = CGF.Builder.CreateICmp(ICmpInst::ICMP_SGT, Ops[0], Zero); 8401 Value *Res = CGF.Builder.CreateSelect(Cmp, Ops[0], Sub); 8402 if (Ops.size() == 1) 8403 return Res; 8404 return EmitX86Select(CGF, Ops[2], Res, Ops[1]); 8405 } 8406 8407 static Value *EmitX86MinMax(CodeGenFunction &CGF, ICmpInst::Predicate Pred, 8408 ArrayRef<Value *> Ops) { 8409 Value *Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 8410 Value *Res = CGF.Builder.CreateSelect(Cmp, Ops[0], Ops[1]); 8411 8412 if (Ops.size() == 2) 8413 return Res; 8414 8415 assert(Ops.size() == 4); 8416 return EmitX86Select(CGF, Ops[3], Res, Ops[2]); 8417 } 8418 8419 static Value *EmitX86Muldq(CodeGenFunction &CGF, bool IsSigned, 8420 ArrayRef<Value *> Ops) { 8421 llvm::Type *Ty = Ops[0]->getType(); 8422 // Arguments have a vXi32 type so cast to vXi64. 8423 Ty = llvm::VectorType::get(CGF.Int64Ty, 8424 Ty->getPrimitiveSizeInBits() / 64); 8425 Value *LHS = CGF.Builder.CreateBitCast(Ops[0], Ty); 8426 Value *RHS = CGF.Builder.CreateBitCast(Ops[1], Ty); 8427 8428 if (IsSigned) { 8429 // Shift left then arithmetic shift right. 8430 Constant *ShiftAmt = ConstantInt::get(Ty, 32); 8431 LHS = CGF.Builder.CreateShl(LHS, ShiftAmt); 8432 LHS = CGF.Builder.CreateAShr(LHS, ShiftAmt); 8433 RHS = CGF.Builder.CreateShl(RHS, ShiftAmt); 8434 RHS = CGF.Builder.CreateAShr(RHS, ShiftAmt); 8435 } else { 8436 // Clear the upper bits. 8437 Constant *Mask = ConstantInt::get(Ty, 0xffffffff); 8438 LHS = CGF.Builder.CreateAnd(LHS, Mask); 8439 RHS = CGF.Builder.CreateAnd(RHS, Mask); 8440 } 8441 8442 return CGF.Builder.CreateMul(LHS, RHS); 8443 } 8444 8445 static Value *EmitX86SExtMask(CodeGenFunction &CGF, Value *Op, 8446 llvm::Type *DstTy) { 8447 unsigned NumberOfElements = DstTy->getVectorNumElements(); 8448 Value *Mask = getMaskVecValue(CGF, Op, NumberOfElements); 8449 return CGF.Builder.CreateSExt(Mask, DstTy, "vpmovm2"); 8450 } 8451 8452 Value *CodeGenFunction::EmitX86CpuIs(const CallExpr *E) { 8453 const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts(); 8454 StringRef CPUStr = cast<clang::StringLiteral>(CPUExpr)->getString(); 8455 return EmitX86CpuIs(CPUStr); 8456 } 8457 8458 Value *CodeGenFunction::EmitX86CpuIs(StringRef CPUStr) { 8459 8460 llvm::Type *Int32Ty = Builder.getInt32Ty(); 8461 8462 // Matching the struct layout from the compiler-rt/libgcc structure that is 8463 // filled in: 8464 // unsigned int __cpu_vendor; 8465 // unsigned int __cpu_type; 8466 // unsigned int __cpu_subtype; 8467 // unsigned int __cpu_features[1]; 8468 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, Int32Ty, 8469 llvm::ArrayType::get(Int32Ty, 1)); 8470 8471 // Grab the global __cpu_model. 8472 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 8473 8474 // Calculate the index needed to access the correct field based on the 8475 // range. Also adjust the expected value. 8476 unsigned Index; 8477 unsigned Value; 8478 std::tie(Index, Value) = StringSwitch<std::pair<unsigned, unsigned>>(CPUStr) 8479 #define X86_VENDOR(ENUM, STRING) \ 8480 .Case(STRING, {0u, static_cast<unsigned>(llvm::X86::ENUM)}) 8481 #define X86_CPU_TYPE_COMPAT_WITH_ALIAS(ARCHNAME, ENUM, STR, ALIAS) \ 8482 .Cases(STR, ALIAS, {1u, static_cast<unsigned>(llvm::X86::ENUM)}) 8483 #define X86_CPU_TYPE_COMPAT(ARCHNAME, ENUM, STR) \ 8484 .Case(STR, {1u, static_cast<unsigned>(llvm::X86::ENUM)}) 8485 #define X86_CPU_SUBTYPE_COMPAT(ARCHNAME, ENUM, STR) \ 8486 .Case(STR, {2u, static_cast<unsigned>(llvm::X86::ENUM)}) 8487 #include "llvm/Support/X86TargetParser.def" 8488 .Default({0, 0}); 8489 assert(Value != 0 && "Invalid CPUStr passed to CpuIs"); 8490 8491 // Grab the appropriate field from __cpu_model. 8492 llvm::Value *Idxs[] = {ConstantInt::get(Int32Ty, 0), 8493 ConstantInt::get(Int32Ty, Index)}; 8494 llvm::Value *CpuValue = Builder.CreateGEP(STy, CpuModel, Idxs); 8495 CpuValue = Builder.CreateAlignedLoad(CpuValue, CharUnits::fromQuantity(4)); 8496 8497 // Check the value of the field against the requested value. 8498 return Builder.CreateICmpEQ(CpuValue, 8499 llvm::ConstantInt::get(Int32Ty, Value)); 8500 } 8501 8502 Value *CodeGenFunction::EmitX86CpuSupports(const CallExpr *E) { 8503 const Expr *FeatureExpr = E->getArg(0)->IgnoreParenCasts(); 8504 StringRef FeatureStr = cast<StringLiteral>(FeatureExpr)->getString(); 8505 return EmitX86CpuSupports(FeatureStr); 8506 } 8507 8508 Value *CodeGenFunction::EmitX86CpuSupports(ArrayRef<StringRef> FeatureStrs) { 8509 // Processor features and mapping to processor feature value. 8510 8511 uint32_t FeaturesMask = 0; 8512 8513 for (const StringRef &FeatureStr : FeatureStrs) { 8514 unsigned Feature = 8515 StringSwitch<unsigned>(FeatureStr) 8516 #define X86_FEATURE_COMPAT(VAL, ENUM, STR) .Case(STR, VAL) 8517 #include "llvm/Support/X86TargetParser.def" 8518 ; 8519 FeaturesMask |= (1U << Feature); 8520 } 8521 8522 // Matching the struct layout from the compiler-rt/libgcc structure that is 8523 // filled in: 8524 // unsigned int __cpu_vendor; 8525 // unsigned int __cpu_type; 8526 // unsigned int __cpu_subtype; 8527 // unsigned int __cpu_features[1]; 8528 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, Int32Ty, 8529 llvm::ArrayType::get(Int32Ty, 1)); 8530 8531 // Grab the global __cpu_model. 8532 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 8533 8534 // Grab the first (0th) element from the field __cpu_features off of the 8535 // global in the struct STy. 8536 Value *Idxs[] = {ConstantInt::get(Int32Ty, 0), ConstantInt::get(Int32Ty, 3), 8537 ConstantInt::get(Int32Ty, 0)}; 8538 Value *CpuFeatures = Builder.CreateGEP(STy, CpuModel, Idxs); 8539 Value *Features = 8540 Builder.CreateAlignedLoad(CpuFeatures, CharUnits::fromQuantity(4)); 8541 8542 // Check the value of the bit corresponding to the feature requested. 8543 Value *Bitset = Builder.CreateAnd( 8544 Features, llvm::ConstantInt::get(Int32Ty, FeaturesMask)); 8545 return Builder.CreateICmpNE(Bitset, llvm::ConstantInt::get(Int32Ty, 0)); 8546 } 8547 8548 Value *CodeGenFunction::EmitX86CpuInit() { 8549 llvm::FunctionType *FTy = llvm::FunctionType::get(VoidTy, 8550 /*Variadic*/ false); 8551 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, "__cpu_indicator_init"); 8552 return Builder.CreateCall(Func); 8553 } 8554 8555 Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, 8556 const CallExpr *E) { 8557 if (BuiltinID == X86::BI__builtin_cpu_is) 8558 return EmitX86CpuIs(E); 8559 if (BuiltinID == X86::BI__builtin_cpu_supports) 8560 return EmitX86CpuSupports(E); 8561 if (BuiltinID == X86::BI__builtin_cpu_init) 8562 return EmitX86CpuInit(); 8563 8564 SmallVector<Value*, 4> Ops; 8565 8566 // Find out if any arguments are required to be integer constant expressions. 8567 unsigned ICEArguments = 0; 8568 ASTContext::GetBuiltinTypeError Error; 8569 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 8570 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 8571 8572 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) { 8573 // If this is a normal argument, just emit it as a scalar. 8574 if ((ICEArguments & (1 << i)) == 0) { 8575 Ops.push_back(EmitScalarExpr(E->getArg(i))); 8576 continue; 8577 } 8578 8579 // If this is required to be a constant, constant fold it so that we know 8580 // that the generated intrinsic gets a ConstantInt. 8581 llvm::APSInt Result; 8582 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 8583 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 8584 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 8585 } 8586 8587 // These exist so that the builtin that takes an immediate can be bounds 8588 // checked by clang to avoid passing bad immediates to the backend. Since 8589 // AVX has a larger immediate than SSE we would need separate builtins to 8590 // do the different bounds checking. Rather than create a clang specific 8591 // SSE only builtin, this implements eight separate builtins to match gcc 8592 // implementation. 8593 auto getCmpIntrinsicCall = [this, &Ops](Intrinsic::ID ID, unsigned Imm) { 8594 Ops.push_back(llvm::ConstantInt::get(Int8Ty, Imm)); 8595 llvm::Function *F = CGM.getIntrinsic(ID); 8596 return Builder.CreateCall(F, Ops); 8597 }; 8598 8599 // For the vector forms of FP comparisons, translate the builtins directly to 8600 // IR. 8601 // TODO: The builtins could be removed if the SSE header files used vector 8602 // extension comparisons directly (vector ordered/unordered may need 8603 // additional support via __builtin_isnan()). 8604 auto getVectorFCmpIR = [this, &Ops](CmpInst::Predicate Pred) { 8605 Value *Cmp = Builder.CreateFCmp(Pred, Ops[0], Ops[1]); 8606 llvm::VectorType *FPVecTy = cast<llvm::VectorType>(Ops[0]->getType()); 8607 llvm::VectorType *IntVecTy = llvm::VectorType::getInteger(FPVecTy); 8608 Value *Sext = Builder.CreateSExt(Cmp, IntVecTy); 8609 return Builder.CreateBitCast(Sext, FPVecTy); 8610 }; 8611 8612 switch (BuiltinID) { 8613 default: return nullptr; 8614 case X86::BI_mm_prefetch: { 8615 Value *Address = Ops[0]; 8616 ConstantInt *C = cast<ConstantInt>(Ops[1]); 8617 Value *RW = ConstantInt::get(Int32Ty, (C->getZExtValue() >> 2) & 0x1); 8618 Value *Locality = ConstantInt::get(Int32Ty, C->getZExtValue() & 0x3); 8619 Value *Data = ConstantInt::get(Int32Ty, 1); 8620 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 8621 return Builder.CreateCall(F, {Address, RW, Locality, Data}); 8622 } 8623 case X86::BI_mm_clflush: { 8624 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_clflush), 8625 Ops[0]); 8626 } 8627 case X86::BI_mm_lfence: { 8628 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_lfence)); 8629 } 8630 case X86::BI_mm_mfence: { 8631 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_mfence)); 8632 } 8633 case X86::BI_mm_sfence: { 8634 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_sfence)); 8635 } 8636 case X86::BI_mm_pause: { 8637 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_pause)); 8638 } 8639 case X86::BI__rdtsc: { 8640 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_rdtsc)); 8641 } 8642 case X86::BI__builtin_ia32_undef128: 8643 case X86::BI__builtin_ia32_undef256: 8644 case X86::BI__builtin_ia32_undef512: 8645 // The x86 definition of "undef" is not the same as the LLVM definition 8646 // (PR32176). We leave optimizing away an unnecessary zero constant to the 8647 // IR optimizer and backend. 8648 // TODO: If we had a "freeze" IR instruction to generate a fixed undef 8649 // value, we should use that here instead of a zero. 8650 return llvm::Constant::getNullValue(ConvertType(E->getType())); 8651 case X86::BI__builtin_ia32_vec_init_v8qi: 8652 case X86::BI__builtin_ia32_vec_init_v4hi: 8653 case X86::BI__builtin_ia32_vec_init_v2si: 8654 return Builder.CreateBitCast(BuildVector(Ops), 8655 llvm::Type::getX86_MMXTy(getLLVMContext())); 8656 case X86::BI__builtin_ia32_vec_ext_v2si: 8657 return Builder.CreateExtractElement(Ops[0], 8658 llvm::ConstantInt::get(Ops[1]->getType(), 0)); 8659 case X86::BI_mm_setcsr: 8660 case X86::BI__builtin_ia32_ldmxcsr: { 8661 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 8662 Builder.CreateStore(Ops[0], Tmp); 8663 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_ldmxcsr), 8664 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 8665 } 8666 case X86::BI_mm_getcsr: 8667 case X86::BI__builtin_ia32_stmxcsr: { 8668 Address Tmp = CreateMemTemp(E->getType()); 8669 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_stmxcsr), 8670 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 8671 return Builder.CreateLoad(Tmp, "stmxcsr"); 8672 } 8673 case X86::BI__builtin_ia32_xsave: 8674 case X86::BI__builtin_ia32_xsave64: 8675 case X86::BI__builtin_ia32_xrstor: 8676 case X86::BI__builtin_ia32_xrstor64: 8677 case X86::BI__builtin_ia32_xsaveopt: 8678 case X86::BI__builtin_ia32_xsaveopt64: 8679 case X86::BI__builtin_ia32_xrstors: 8680 case X86::BI__builtin_ia32_xrstors64: 8681 case X86::BI__builtin_ia32_xsavec: 8682 case X86::BI__builtin_ia32_xsavec64: 8683 case X86::BI__builtin_ia32_xsaves: 8684 case X86::BI__builtin_ia32_xsaves64: { 8685 Intrinsic::ID ID; 8686 #define INTRINSIC_X86_XSAVE_ID(NAME) \ 8687 case X86::BI__builtin_ia32_##NAME: \ 8688 ID = Intrinsic::x86_##NAME; \ 8689 break 8690 switch (BuiltinID) { 8691 default: llvm_unreachable("Unsupported intrinsic!"); 8692 INTRINSIC_X86_XSAVE_ID(xsave); 8693 INTRINSIC_X86_XSAVE_ID(xsave64); 8694 INTRINSIC_X86_XSAVE_ID(xrstor); 8695 INTRINSIC_X86_XSAVE_ID(xrstor64); 8696 INTRINSIC_X86_XSAVE_ID(xsaveopt); 8697 INTRINSIC_X86_XSAVE_ID(xsaveopt64); 8698 INTRINSIC_X86_XSAVE_ID(xrstors); 8699 INTRINSIC_X86_XSAVE_ID(xrstors64); 8700 INTRINSIC_X86_XSAVE_ID(xsavec); 8701 INTRINSIC_X86_XSAVE_ID(xsavec64); 8702 INTRINSIC_X86_XSAVE_ID(xsaves); 8703 INTRINSIC_X86_XSAVE_ID(xsaves64); 8704 } 8705 #undef INTRINSIC_X86_XSAVE_ID 8706 Value *Mhi = Builder.CreateTrunc( 8707 Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, 32)), Int32Ty); 8708 Value *Mlo = Builder.CreateTrunc(Ops[1], Int32Ty); 8709 Ops[1] = Mhi; 8710 Ops.push_back(Mlo); 8711 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 8712 } 8713 case X86::BI__builtin_ia32_storedqudi128_mask: 8714 case X86::BI__builtin_ia32_storedqusi128_mask: 8715 case X86::BI__builtin_ia32_storedquhi128_mask: 8716 case X86::BI__builtin_ia32_storedquqi128_mask: 8717 case X86::BI__builtin_ia32_storeupd128_mask: 8718 case X86::BI__builtin_ia32_storeups128_mask: 8719 case X86::BI__builtin_ia32_storedqudi256_mask: 8720 case X86::BI__builtin_ia32_storedqusi256_mask: 8721 case X86::BI__builtin_ia32_storedquhi256_mask: 8722 case X86::BI__builtin_ia32_storedquqi256_mask: 8723 case X86::BI__builtin_ia32_storeupd256_mask: 8724 case X86::BI__builtin_ia32_storeups256_mask: 8725 case X86::BI__builtin_ia32_storedqudi512_mask: 8726 case X86::BI__builtin_ia32_storedqusi512_mask: 8727 case X86::BI__builtin_ia32_storedquhi512_mask: 8728 case X86::BI__builtin_ia32_storedquqi512_mask: 8729 case X86::BI__builtin_ia32_storeupd512_mask: 8730 case X86::BI__builtin_ia32_storeups512_mask: 8731 return EmitX86MaskedStore(*this, Ops, 1); 8732 8733 case X86::BI__builtin_ia32_storess128_mask: 8734 case X86::BI__builtin_ia32_storesd128_mask: { 8735 return EmitX86MaskedStore(*this, Ops, 16); 8736 } 8737 case X86::BI__builtin_ia32_vpopcntb_128: 8738 case X86::BI__builtin_ia32_vpopcntd_128: 8739 case X86::BI__builtin_ia32_vpopcntq_128: 8740 case X86::BI__builtin_ia32_vpopcntw_128: 8741 case X86::BI__builtin_ia32_vpopcntb_256: 8742 case X86::BI__builtin_ia32_vpopcntd_256: 8743 case X86::BI__builtin_ia32_vpopcntq_256: 8744 case X86::BI__builtin_ia32_vpopcntw_256: 8745 case X86::BI__builtin_ia32_vpopcntb_512: 8746 case X86::BI__builtin_ia32_vpopcntd_512: 8747 case X86::BI__builtin_ia32_vpopcntq_512: 8748 case X86::BI__builtin_ia32_vpopcntw_512: { 8749 llvm::Type *ResultType = ConvertType(E->getType()); 8750 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 8751 return Builder.CreateCall(F, Ops); 8752 } 8753 case X86::BI__builtin_ia32_cvtmask2b128: 8754 case X86::BI__builtin_ia32_cvtmask2b256: 8755 case X86::BI__builtin_ia32_cvtmask2b512: 8756 case X86::BI__builtin_ia32_cvtmask2w128: 8757 case X86::BI__builtin_ia32_cvtmask2w256: 8758 case X86::BI__builtin_ia32_cvtmask2w512: 8759 case X86::BI__builtin_ia32_cvtmask2d128: 8760 case X86::BI__builtin_ia32_cvtmask2d256: 8761 case X86::BI__builtin_ia32_cvtmask2d512: 8762 case X86::BI__builtin_ia32_cvtmask2q128: 8763 case X86::BI__builtin_ia32_cvtmask2q256: 8764 case X86::BI__builtin_ia32_cvtmask2q512: 8765 return EmitX86SExtMask(*this, Ops[0], ConvertType(E->getType())); 8766 8767 case X86::BI__builtin_ia32_cvtb2mask128: 8768 case X86::BI__builtin_ia32_cvtb2mask256: 8769 case X86::BI__builtin_ia32_cvtb2mask512: 8770 case X86::BI__builtin_ia32_cvtw2mask128: 8771 case X86::BI__builtin_ia32_cvtw2mask256: 8772 case X86::BI__builtin_ia32_cvtw2mask512: 8773 case X86::BI__builtin_ia32_cvtd2mask128: 8774 case X86::BI__builtin_ia32_cvtd2mask256: 8775 case X86::BI__builtin_ia32_cvtd2mask512: 8776 case X86::BI__builtin_ia32_cvtq2mask128: 8777 case X86::BI__builtin_ia32_cvtq2mask256: 8778 case X86::BI__builtin_ia32_cvtq2mask512: 8779 return EmitX86ConvertToMask(*this, Ops[0]); 8780 8781 case X86::BI__builtin_ia32_movdqa32store128_mask: 8782 case X86::BI__builtin_ia32_movdqa64store128_mask: 8783 case X86::BI__builtin_ia32_storeaps128_mask: 8784 case X86::BI__builtin_ia32_storeapd128_mask: 8785 case X86::BI__builtin_ia32_movdqa32store256_mask: 8786 case X86::BI__builtin_ia32_movdqa64store256_mask: 8787 case X86::BI__builtin_ia32_storeaps256_mask: 8788 case X86::BI__builtin_ia32_storeapd256_mask: 8789 case X86::BI__builtin_ia32_movdqa32store512_mask: 8790 case X86::BI__builtin_ia32_movdqa64store512_mask: 8791 case X86::BI__builtin_ia32_storeaps512_mask: 8792 case X86::BI__builtin_ia32_storeapd512_mask: { 8793 unsigned Align = 8794 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 8795 return EmitX86MaskedStore(*this, Ops, Align); 8796 } 8797 case X86::BI__builtin_ia32_loadups128_mask: 8798 case X86::BI__builtin_ia32_loadups256_mask: 8799 case X86::BI__builtin_ia32_loadups512_mask: 8800 case X86::BI__builtin_ia32_loadupd128_mask: 8801 case X86::BI__builtin_ia32_loadupd256_mask: 8802 case X86::BI__builtin_ia32_loadupd512_mask: 8803 case X86::BI__builtin_ia32_loaddquqi128_mask: 8804 case X86::BI__builtin_ia32_loaddquqi256_mask: 8805 case X86::BI__builtin_ia32_loaddquqi512_mask: 8806 case X86::BI__builtin_ia32_loaddquhi128_mask: 8807 case X86::BI__builtin_ia32_loaddquhi256_mask: 8808 case X86::BI__builtin_ia32_loaddquhi512_mask: 8809 case X86::BI__builtin_ia32_loaddqusi128_mask: 8810 case X86::BI__builtin_ia32_loaddqusi256_mask: 8811 case X86::BI__builtin_ia32_loaddqusi512_mask: 8812 case X86::BI__builtin_ia32_loaddqudi128_mask: 8813 case X86::BI__builtin_ia32_loaddqudi256_mask: 8814 case X86::BI__builtin_ia32_loaddqudi512_mask: 8815 return EmitX86MaskedLoad(*this, Ops, 1); 8816 8817 case X86::BI__builtin_ia32_loadss128_mask: 8818 case X86::BI__builtin_ia32_loadsd128_mask: 8819 return EmitX86MaskedLoad(*this, Ops, 16); 8820 8821 case X86::BI__builtin_ia32_loadaps128_mask: 8822 case X86::BI__builtin_ia32_loadaps256_mask: 8823 case X86::BI__builtin_ia32_loadaps512_mask: 8824 case X86::BI__builtin_ia32_loadapd128_mask: 8825 case X86::BI__builtin_ia32_loadapd256_mask: 8826 case X86::BI__builtin_ia32_loadapd512_mask: 8827 case X86::BI__builtin_ia32_movdqa32load128_mask: 8828 case X86::BI__builtin_ia32_movdqa32load256_mask: 8829 case X86::BI__builtin_ia32_movdqa32load512_mask: 8830 case X86::BI__builtin_ia32_movdqa64load128_mask: 8831 case X86::BI__builtin_ia32_movdqa64load256_mask: 8832 case X86::BI__builtin_ia32_movdqa64load512_mask: { 8833 unsigned Align = 8834 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 8835 return EmitX86MaskedLoad(*this, Ops, Align); 8836 } 8837 8838 case X86::BI__builtin_ia32_vbroadcastf128_pd256: 8839 case X86::BI__builtin_ia32_vbroadcastf128_ps256: { 8840 llvm::Type *DstTy = ConvertType(E->getType()); 8841 return EmitX86SubVectorBroadcast(*this, Ops, DstTy, 128, 1); 8842 } 8843 8844 case X86::BI__builtin_ia32_storehps: 8845 case X86::BI__builtin_ia32_storelps: { 8846 llvm::Type *PtrTy = llvm::PointerType::getUnqual(Int64Ty); 8847 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 2); 8848 8849 // cast val v2i64 8850 Ops[1] = Builder.CreateBitCast(Ops[1], VecTy, "cast"); 8851 8852 // extract (0, 1) 8853 unsigned Index = BuiltinID == X86::BI__builtin_ia32_storelps ? 0 : 1; 8854 llvm::Value *Idx = llvm::ConstantInt::get(SizeTy, Index); 8855 Ops[1] = Builder.CreateExtractElement(Ops[1], Idx, "extract"); 8856 8857 // cast pointer to i64 & store 8858 Ops[0] = Builder.CreateBitCast(Ops[0], PtrTy); 8859 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8860 } 8861 case X86::BI__builtin_ia32_palignr128: 8862 case X86::BI__builtin_ia32_palignr256: 8863 case X86::BI__builtin_ia32_palignr512_mask: { 8864 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 8865 8866 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 8867 assert(NumElts % 16 == 0); 8868 8869 // If palignr is shifting the pair of vectors more than the size of two 8870 // lanes, emit zero. 8871 if (ShiftVal >= 32) 8872 return llvm::Constant::getNullValue(ConvertType(E->getType())); 8873 8874 // If palignr is shifting the pair of input vectors more than one lane, 8875 // but less than two lanes, convert to shifting in zeroes. 8876 if (ShiftVal > 16) { 8877 ShiftVal -= 16; 8878 Ops[1] = Ops[0]; 8879 Ops[0] = llvm::Constant::getNullValue(Ops[0]->getType()); 8880 } 8881 8882 uint32_t Indices[64]; 8883 // 256-bit palignr operates on 128-bit lanes so we need to handle that 8884 for (unsigned l = 0; l != NumElts; l += 16) { 8885 for (unsigned i = 0; i != 16; ++i) { 8886 unsigned Idx = ShiftVal + i; 8887 if (Idx >= 16) 8888 Idx += NumElts - 16; // End of lane, switch operand. 8889 Indices[l + i] = Idx + l; 8890 } 8891 } 8892 8893 Value *Align = Builder.CreateShuffleVector(Ops[1], Ops[0], 8894 makeArrayRef(Indices, NumElts), 8895 "palignr"); 8896 8897 // If this isn't a masked builtin, just return the align operation. 8898 if (Ops.size() == 3) 8899 return Align; 8900 8901 return EmitX86Select(*this, Ops[4], Align, Ops[3]); 8902 } 8903 8904 case X86::BI__builtin_ia32_vperm2f128_pd256: 8905 case X86::BI__builtin_ia32_vperm2f128_ps256: 8906 case X86::BI__builtin_ia32_vperm2f128_si256: 8907 case X86::BI__builtin_ia32_permti256: { 8908 unsigned Imm = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 8909 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 8910 8911 // This takes a very simple approach since there are two lanes and a 8912 // shuffle can have 2 inputs. So we reserve the first input for the first 8913 // lane and the second input for the second lane. This may result in 8914 // duplicate sources, but this can be dealt with in the backend. 8915 8916 Value *OutOps[2]; 8917 uint32_t Indices[8]; 8918 for (unsigned l = 0; l != 2; ++l) { 8919 // Determine the source for this lane. 8920 if (Imm & (1 << ((l * 4) + 3))) 8921 OutOps[l] = llvm::ConstantAggregateZero::get(Ops[0]->getType()); 8922 else if (Imm & (1 << ((l * 4) + 1))) 8923 OutOps[l] = Ops[1]; 8924 else 8925 OutOps[l] = Ops[0]; 8926 8927 for (unsigned i = 0; i != NumElts/2; ++i) { 8928 // Start with ith element of the source for this lane. 8929 unsigned Idx = (l * NumElts) + i; 8930 // If bit 0 of the immediate half is set, switch to the high half of 8931 // the source. 8932 if (Imm & (1 << (l * 4))) 8933 Idx += NumElts/2; 8934 Indices[(l * (NumElts/2)) + i] = Idx; 8935 } 8936 } 8937 8938 return Builder.CreateShuffleVector(OutOps[0], OutOps[1], 8939 makeArrayRef(Indices, NumElts), 8940 "vperm"); 8941 } 8942 8943 case X86::BI__builtin_ia32_movnti: 8944 case X86::BI__builtin_ia32_movnti64: 8945 case X86::BI__builtin_ia32_movntsd: 8946 case X86::BI__builtin_ia32_movntss: { 8947 llvm::MDNode *Node = llvm::MDNode::get( 8948 getLLVMContext(), llvm::ConstantAsMetadata::get(Builder.getInt32(1))); 8949 8950 Value *Ptr = Ops[0]; 8951 Value *Src = Ops[1]; 8952 8953 // Extract the 0'th element of the source vector. 8954 if (BuiltinID == X86::BI__builtin_ia32_movntsd || 8955 BuiltinID == X86::BI__builtin_ia32_movntss) 8956 Src = Builder.CreateExtractElement(Src, (uint64_t)0, "extract"); 8957 8958 // Convert the type of the pointer to a pointer to the stored type. 8959 Value *BC = Builder.CreateBitCast( 8960 Ptr, llvm::PointerType::getUnqual(Src->getType()), "cast"); 8961 8962 // Unaligned nontemporal store of the scalar value. 8963 StoreInst *SI = Builder.CreateDefaultAlignedStore(Src, BC); 8964 SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); 8965 SI->setAlignment(1); 8966 return SI; 8967 } 8968 8969 case X86::BI__builtin_ia32_selectb_128: 8970 case X86::BI__builtin_ia32_selectb_256: 8971 case X86::BI__builtin_ia32_selectb_512: 8972 case X86::BI__builtin_ia32_selectw_128: 8973 case X86::BI__builtin_ia32_selectw_256: 8974 case X86::BI__builtin_ia32_selectw_512: 8975 case X86::BI__builtin_ia32_selectd_128: 8976 case X86::BI__builtin_ia32_selectd_256: 8977 case X86::BI__builtin_ia32_selectd_512: 8978 case X86::BI__builtin_ia32_selectq_128: 8979 case X86::BI__builtin_ia32_selectq_256: 8980 case X86::BI__builtin_ia32_selectq_512: 8981 case X86::BI__builtin_ia32_selectps_128: 8982 case X86::BI__builtin_ia32_selectps_256: 8983 case X86::BI__builtin_ia32_selectps_512: 8984 case X86::BI__builtin_ia32_selectpd_128: 8985 case X86::BI__builtin_ia32_selectpd_256: 8986 case X86::BI__builtin_ia32_selectpd_512: 8987 return EmitX86Select(*this, Ops[0], Ops[1], Ops[2]); 8988 case X86::BI__builtin_ia32_cmpb128_mask: 8989 case X86::BI__builtin_ia32_cmpb256_mask: 8990 case X86::BI__builtin_ia32_cmpb512_mask: 8991 case X86::BI__builtin_ia32_cmpw128_mask: 8992 case X86::BI__builtin_ia32_cmpw256_mask: 8993 case X86::BI__builtin_ia32_cmpw512_mask: 8994 case X86::BI__builtin_ia32_cmpd128_mask: 8995 case X86::BI__builtin_ia32_cmpd256_mask: 8996 case X86::BI__builtin_ia32_cmpd512_mask: 8997 case X86::BI__builtin_ia32_cmpq128_mask: 8998 case X86::BI__builtin_ia32_cmpq256_mask: 8999 case X86::BI__builtin_ia32_cmpq512_mask: { 9000 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 9001 return EmitX86MaskedCompare(*this, CC, true, Ops); 9002 } 9003 case X86::BI__builtin_ia32_ucmpb128_mask: 9004 case X86::BI__builtin_ia32_ucmpb256_mask: 9005 case X86::BI__builtin_ia32_ucmpb512_mask: 9006 case X86::BI__builtin_ia32_ucmpw128_mask: 9007 case X86::BI__builtin_ia32_ucmpw256_mask: 9008 case X86::BI__builtin_ia32_ucmpw512_mask: 9009 case X86::BI__builtin_ia32_ucmpd128_mask: 9010 case X86::BI__builtin_ia32_ucmpd256_mask: 9011 case X86::BI__builtin_ia32_ucmpd512_mask: 9012 case X86::BI__builtin_ia32_ucmpq128_mask: 9013 case X86::BI__builtin_ia32_ucmpq256_mask: 9014 case X86::BI__builtin_ia32_ucmpq512_mask: { 9015 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 9016 return EmitX86MaskedCompare(*this, CC, false, Ops); 9017 } 9018 9019 case X86::BI__builtin_ia32_kortestchi: 9020 case X86::BI__builtin_ia32_kortestzhi: { 9021 Value *Or = EmitX86MaskLogic(*this, Instruction::Or, 16, Ops); 9022 Value *C; 9023 if (BuiltinID == X86::BI__builtin_ia32_kortestchi) 9024 C = llvm::Constant::getAllOnesValue(Builder.getInt16Ty()); 9025 else 9026 C = llvm::Constant::getNullValue(Builder.getInt16Ty()); 9027 Value *Cmp = Builder.CreateICmpEQ(Or, C); 9028 return Builder.CreateZExt(Cmp, ConvertType(E->getType())); 9029 } 9030 9031 case X86::BI__builtin_ia32_kandhi: 9032 return EmitX86MaskLogic(*this, Instruction::And, 16, Ops); 9033 case X86::BI__builtin_ia32_kandnhi: 9034 return EmitX86MaskLogic(*this, Instruction::And, 16, Ops, true); 9035 case X86::BI__builtin_ia32_korhi: 9036 return EmitX86MaskLogic(*this, Instruction::Or, 16, Ops); 9037 case X86::BI__builtin_ia32_kxnorhi: 9038 return EmitX86MaskLogic(*this, Instruction::Xor, 16, Ops, true); 9039 case X86::BI__builtin_ia32_kxorhi: 9040 return EmitX86MaskLogic(*this, Instruction::Xor, 16, Ops); 9041 case X86::BI__builtin_ia32_knothi: { 9042 Ops[0] = getMaskVecValue(*this, Ops[0], 16); 9043 return Builder.CreateBitCast(Builder.CreateNot(Ops[0]), 9044 Builder.getInt16Ty()); 9045 } 9046 9047 case X86::BI__builtin_ia32_kunpckdi: 9048 case X86::BI__builtin_ia32_kunpcksi: 9049 case X86::BI__builtin_ia32_kunpckhi: { 9050 unsigned NumElts = Ops[0]->getType()->getScalarSizeInBits(); 9051 Value *LHS = getMaskVecValue(*this, Ops[0], NumElts); 9052 Value *RHS = getMaskVecValue(*this, Ops[1], NumElts); 9053 uint32_t Indices[64]; 9054 for (unsigned i = 0; i != NumElts; ++i) 9055 Indices[i] = i; 9056 9057 // First extract half of each vector. This gives better codegen than 9058 // doing it in a single shuffle. 9059 LHS = Builder.CreateShuffleVector(LHS, LHS, 9060 makeArrayRef(Indices, NumElts / 2)); 9061 RHS = Builder.CreateShuffleVector(RHS, RHS, 9062 makeArrayRef(Indices, NumElts / 2)); 9063 // Concat the vectors. 9064 // NOTE: Operands are swapped to match the intrinsic definition. 9065 Value *Res = Builder.CreateShuffleVector(RHS, LHS, 9066 makeArrayRef(Indices, NumElts)); 9067 return Builder.CreateBitCast(Res, Ops[0]->getType()); 9068 } 9069 9070 case X86::BI__builtin_ia32_vplzcntd_128_mask: 9071 case X86::BI__builtin_ia32_vplzcntd_256_mask: 9072 case X86::BI__builtin_ia32_vplzcntd_512_mask: 9073 case X86::BI__builtin_ia32_vplzcntq_128_mask: 9074 case X86::BI__builtin_ia32_vplzcntq_256_mask: 9075 case X86::BI__builtin_ia32_vplzcntq_512_mask: { 9076 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, Ops[0]->getType()); 9077 return EmitX86Select(*this, Ops[2], 9078 Builder.CreateCall(F, {Ops[0],Builder.getInt1(false)}), 9079 Ops[1]); 9080 } 9081 9082 case X86::BI__builtin_ia32_pabsb128: 9083 case X86::BI__builtin_ia32_pabsw128: 9084 case X86::BI__builtin_ia32_pabsd128: 9085 case X86::BI__builtin_ia32_pabsb256: 9086 case X86::BI__builtin_ia32_pabsw256: 9087 case X86::BI__builtin_ia32_pabsd256: 9088 case X86::BI__builtin_ia32_pabsq128_mask: 9089 case X86::BI__builtin_ia32_pabsq256_mask: 9090 case X86::BI__builtin_ia32_pabsb512_mask: 9091 case X86::BI__builtin_ia32_pabsw512_mask: 9092 case X86::BI__builtin_ia32_pabsd512_mask: 9093 case X86::BI__builtin_ia32_pabsq512_mask: 9094 return EmitX86Abs(*this, Ops); 9095 9096 case X86::BI__builtin_ia32_pmaxsb128: 9097 case X86::BI__builtin_ia32_pmaxsw128: 9098 case X86::BI__builtin_ia32_pmaxsd128: 9099 case X86::BI__builtin_ia32_pmaxsq128_mask: 9100 case X86::BI__builtin_ia32_pmaxsb256: 9101 case X86::BI__builtin_ia32_pmaxsw256: 9102 case X86::BI__builtin_ia32_pmaxsd256: 9103 case X86::BI__builtin_ia32_pmaxsq256_mask: 9104 case X86::BI__builtin_ia32_pmaxsb512_mask: 9105 case X86::BI__builtin_ia32_pmaxsw512_mask: 9106 case X86::BI__builtin_ia32_pmaxsd512_mask: 9107 case X86::BI__builtin_ia32_pmaxsq512_mask: 9108 return EmitX86MinMax(*this, ICmpInst::ICMP_SGT, Ops); 9109 case X86::BI__builtin_ia32_pmaxub128: 9110 case X86::BI__builtin_ia32_pmaxuw128: 9111 case X86::BI__builtin_ia32_pmaxud128: 9112 case X86::BI__builtin_ia32_pmaxuq128_mask: 9113 case X86::BI__builtin_ia32_pmaxub256: 9114 case X86::BI__builtin_ia32_pmaxuw256: 9115 case X86::BI__builtin_ia32_pmaxud256: 9116 case X86::BI__builtin_ia32_pmaxuq256_mask: 9117 case X86::BI__builtin_ia32_pmaxub512_mask: 9118 case X86::BI__builtin_ia32_pmaxuw512_mask: 9119 case X86::BI__builtin_ia32_pmaxud512_mask: 9120 case X86::BI__builtin_ia32_pmaxuq512_mask: 9121 return EmitX86MinMax(*this, ICmpInst::ICMP_UGT, Ops); 9122 case X86::BI__builtin_ia32_pminsb128: 9123 case X86::BI__builtin_ia32_pminsw128: 9124 case X86::BI__builtin_ia32_pminsd128: 9125 case X86::BI__builtin_ia32_pminsq128_mask: 9126 case X86::BI__builtin_ia32_pminsb256: 9127 case X86::BI__builtin_ia32_pminsw256: 9128 case X86::BI__builtin_ia32_pminsd256: 9129 case X86::BI__builtin_ia32_pminsq256_mask: 9130 case X86::BI__builtin_ia32_pminsb512_mask: 9131 case X86::BI__builtin_ia32_pminsw512_mask: 9132 case X86::BI__builtin_ia32_pminsd512_mask: 9133 case X86::BI__builtin_ia32_pminsq512_mask: 9134 return EmitX86MinMax(*this, ICmpInst::ICMP_SLT, Ops); 9135 case X86::BI__builtin_ia32_pminub128: 9136 case X86::BI__builtin_ia32_pminuw128: 9137 case X86::BI__builtin_ia32_pminud128: 9138 case X86::BI__builtin_ia32_pminuq128_mask: 9139 case X86::BI__builtin_ia32_pminub256: 9140 case X86::BI__builtin_ia32_pminuw256: 9141 case X86::BI__builtin_ia32_pminud256: 9142 case X86::BI__builtin_ia32_pminuq256_mask: 9143 case X86::BI__builtin_ia32_pminub512_mask: 9144 case X86::BI__builtin_ia32_pminuw512_mask: 9145 case X86::BI__builtin_ia32_pminud512_mask: 9146 case X86::BI__builtin_ia32_pminuq512_mask: 9147 return EmitX86MinMax(*this, ICmpInst::ICMP_ULT, Ops); 9148 9149 case X86::BI__builtin_ia32_pmuludq128: 9150 case X86::BI__builtin_ia32_pmuludq256: 9151 case X86::BI__builtin_ia32_pmuludq512: 9152 return EmitX86Muldq(*this, /*IsSigned*/false, Ops); 9153 9154 case X86::BI__builtin_ia32_pmuldq128: 9155 case X86::BI__builtin_ia32_pmuldq256: 9156 case X86::BI__builtin_ia32_pmuldq512: 9157 return EmitX86Muldq(*this, /*IsSigned*/true, Ops); 9158 9159 // 3DNow! 9160 case X86::BI__builtin_ia32_pswapdsf: 9161 case X86::BI__builtin_ia32_pswapdsi: { 9162 llvm::Type *MMXTy = llvm::Type::getX86_MMXTy(getLLVMContext()); 9163 Ops[0] = Builder.CreateBitCast(Ops[0], MMXTy, "cast"); 9164 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_3dnowa_pswapd); 9165 return Builder.CreateCall(F, Ops, "pswapd"); 9166 } 9167 case X86::BI__builtin_ia32_rdrand16_step: 9168 case X86::BI__builtin_ia32_rdrand32_step: 9169 case X86::BI__builtin_ia32_rdrand64_step: 9170 case X86::BI__builtin_ia32_rdseed16_step: 9171 case X86::BI__builtin_ia32_rdseed32_step: 9172 case X86::BI__builtin_ia32_rdseed64_step: { 9173 Intrinsic::ID ID; 9174 switch (BuiltinID) { 9175 default: llvm_unreachable("Unsupported intrinsic!"); 9176 case X86::BI__builtin_ia32_rdrand16_step: 9177 ID = Intrinsic::x86_rdrand_16; 9178 break; 9179 case X86::BI__builtin_ia32_rdrand32_step: 9180 ID = Intrinsic::x86_rdrand_32; 9181 break; 9182 case X86::BI__builtin_ia32_rdrand64_step: 9183 ID = Intrinsic::x86_rdrand_64; 9184 break; 9185 case X86::BI__builtin_ia32_rdseed16_step: 9186 ID = Intrinsic::x86_rdseed_16; 9187 break; 9188 case X86::BI__builtin_ia32_rdseed32_step: 9189 ID = Intrinsic::x86_rdseed_32; 9190 break; 9191 case X86::BI__builtin_ia32_rdseed64_step: 9192 ID = Intrinsic::x86_rdseed_64; 9193 break; 9194 } 9195 9196 Value *Call = Builder.CreateCall(CGM.getIntrinsic(ID)); 9197 Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 0), 9198 Ops[0]); 9199 return Builder.CreateExtractValue(Call, 1); 9200 } 9201 9202 case X86::BI__builtin_ia32_cmpps128_mask: 9203 case X86::BI__builtin_ia32_cmpps256_mask: 9204 case X86::BI__builtin_ia32_cmpps512_mask: 9205 case X86::BI__builtin_ia32_cmppd128_mask: 9206 case X86::BI__builtin_ia32_cmppd256_mask: 9207 case X86::BI__builtin_ia32_cmppd512_mask: { 9208 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 9209 Value *MaskIn = Ops[3]; 9210 Ops.erase(&Ops[3]); 9211 9212 Intrinsic::ID ID; 9213 switch (BuiltinID) { 9214 default: llvm_unreachable("Unsupported intrinsic!"); 9215 case X86::BI__builtin_ia32_cmpps128_mask: 9216 ID = Intrinsic::x86_avx512_mask_cmp_ps_128; 9217 break; 9218 case X86::BI__builtin_ia32_cmpps256_mask: 9219 ID = Intrinsic::x86_avx512_mask_cmp_ps_256; 9220 break; 9221 case X86::BI__builtin_ia32_cmpps512_mask: 9222 ID = Intrinsic::x86_avx512_mask_cmp_ps_512; 9223 break; 9224 case X86::BI__builtin_ia32_cmppd128_mask: 9225 ID = Intrinsic::x86_avx512_mask_cmp_pd_128; 9226 break; 9227 case X86::BI__builtin_ia32_cmppd256_mask: 9228 ID = Intrinsic::x86_avx512_mask_cmp_pd_256; 9229 break; 9230 case X86::BI__builtin_ia32_cmppd512_mask: 9231 ID = Intrinsic::x86_avx512_mask_cmp_pd_512; 9232 break; 9233 } 9234 9235 Value *Cmp = Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 9236 return EmitX86MaskedCompareResult(*this, Cmp, NumElts, MaskIn); 9237 } 9238 9239 // SSE packed comparison intrinsics 9240 case X86::BI__builtin_ia32_cmpeqps: 9241 case X86::BI__builtin_ia32_cmpeqpd: 9242 return getVectorFCmpIR(CmpInst::FCMP_OEQ); 9243 case X86::BI__builtin_ia32_cmpltps: 9244 case X86::BI__builtin_ia32_cmpltpd: 9245 return getVectorFCmpIR(CmpInst::FCMP_OLT); 9246 case X86::BI__builtin_ia32_cmpleps: 9247 case X86::BI__builtin_ia32_cmplepd: 9248 return getVectorFCmpIR(CmpInst::FCMP_OLE); 9249 case X86::BI__builtin_ia32_cmpunordps: 9250 case X86::BI__builtin_ia32_cmpunordpd: 9251 return getVectorFCmpIR(CmpInst::FCMP_UNO); 9252 case X86::BI__builtin_ia32_cmpneqps: 9253 case X86::BI__builtin_ia32_cmpneqpd: 9254 return getVectorFCmpIR(CmpInst::FCMP_UNE); 9255 case X86::BI__builtin_ia32_cmpnltps: 9256 case X86::BI__builtin_ia32_cmpnltpd: 9257 return getVectorFCmpIR(CmpInst::FCMP_UGE); 9258 case X86::BI__builtin_ia32_cmpnleps: 9259 case X86::BI__builtin_ia32_cmpnlepd: 9260 return getVectorFCmpIR(CmpInst::FCMP_UGT); 9261 case X86::BI__builtin_ia32_cmpordps: 9262 case X86::BI__builtin_ia32_cmpordpd: 9263 return getVectorFCmpIR(CmpInst::FCMP_ORD); 9264 case X86::BI__builtin_ia32_cmpps: 9265 case X86::BI__builtin_ia32_cmpps256: 9266 case X86::BI__builtin_ia32_cmppd: 9267 case X86::BI__builtin_ia32_cmppd256: { 9268 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 9269 // If this one of the SSE immediates, we can use native IR. 9270 if (CC < 8) { 9271 FCmpInst::Predicate Pred; 9272 switch (CC) { 9273 case 0: Pred = FCmpInst::FCMP_OEQ; break; 9274 case 1: Pred = FCmpInst::FCMP_OLT; break; 9275 case 2: Pred = FCmpInst::FCMP_OLE; break; 9276 case 3: Pred = FCmpInst::FCMP_UNO; break; 9277 case 4: Pred = FCmpInst::FCMP_UNE; break; 9278 case 5: Pred = FCmpInst::FCMP_UGE; break; 9279 case 6: Pred = FCmpInst::FCMP_UGT; break; 9280 case 7: Pred = FCmpInst::FCMP_ORD; break; 9281 } 9282 return getVectorFCmpIR(Pred); 9283 } 9284 9285 // We can't handle 8-31 immediates with native IR, use the intrinsic. 9286 // Except for predicates that create constants. 9287 Intrinsic::ID ID; 9288 switch (BuiltinID) { 9289 default: llvm_unreachable("Unsupported intrinsic!"); 9290 case X86::BI__builtin_ia32_cmpps: 9291 ID = Intrinsic::x86_sse_cmp_ps; 9292 break; 9293 case X86::BI__builtin_ia32_cmpps256: 9294 // _CMP_TRUE_UQ, _CMP_TRUE_US produce -1,-1... vector 9295 // on any input and _CMP_FALSE_OQ, _CMP_FALSE_OS produce 0, 0... 9296 if (CC == 0xf || CC == 0xb || CC == 0x1b || CC == 0x1f) { 9297 Value *Constant = (CC == 0xf || CC == 0x1f) ? 9298 llvm::Constant::getAllOnesValue(Builder.getInt32Ty()) : 9299 llvm::Constant::getNullValue(Builder.getInt32Ty()); 9300 Value *Vec = Builder.CreateVectorSplat( 9301 Ops[0]->getType()->getVectorNumElements(), Constant); 9302 return Builder.CreateBitCast(Vec, Ops[0]->getType()); 9303 } 9304 ID = Intrinsic::x86_avx_cmp_ps_256; 9305 break; 9306 case X86::BI__builtin_ia32_cmppd: 9307 ID = Intrinsic::x86_sse2_cmp_pd; 9308 break; 9309 case X86::BI__builtin_ia32_cmppd256: 9310 // _CMP_TRUE_UQ, _CMP_TRUE_US produce -1,-1... vector 9311 // on any input and _CMP_FALSE_OQ, _CMP_FALSE_OS produce 0, 0... 9312 if (CC == 0xf || CC == 0xb || CC == 0x1b || CC == 0x1f) { 9313 Value *Constant = (CC == 0xf || CC == 0x1f) ? 9314 llvm::Constant::getAllOnesValue(Builder.getInt64Ty()) : 9315 llvm::Constant::getNullValue(Builder.getInt64Ty()); 9316 Value *Vec = Builder.CreateVectorSplat( 9317 Ops[0]->getType()->getVectorNumElements(), Constant); 9318 return Builder.CreateBitCast(Vec, Ops[0]->getType()); 9319 } 9320 ID = Intrinsic::x86_avx_cmp_pd_256; 9321 break; 9322 } 9323 9324 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 9325 } 9326 9327 // SSE scalar comparison intrinsics 9328 case X86::BI__builtin_ia32_cmpeqss: 9329 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 0); 9330 case X86::BI__builtin_ia32_cmpltss: 9331 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 1); 9332 case X86::BI__builtin_ia32_cmpless: 9333 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 2); 9334 case X86::BI__builtin_ia32_cmpunordss: 9335 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 3); 9336 case X86::BI__builtin_ia32_cmpneqss: 9337 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 4); 9338 case X86::BI__builtin_ia32_cmpnltss: 9339 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 5); 9340 case X86::BI__builtin_ia32_cmpnless: 9341 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 6); 9342 case X86::BI__builtin_ia32_cmpordss: 9343 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 7); 9344 case X86::BI__builtin_ia32_cmpeqsd: 9345 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 0); 9346 case X86::BI__builtin_ia32_cmpltsd: 9347 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 1); 9348 case X86::BI__builtin_ia32_cmplesd: 9349 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 2); 9350 case X86::BI__builtin_ia32_cmpunordsd: 9351 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 3); 9352 case X86::BI__builtin_ia32_cmpneqsd: 9353 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 4); 9354 case X86::BI__builtin_ia32_cmpnltsd: 9355 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 5); 9356 case X86::BI__builtin_ia32_cmpnlesd: 9357 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 6); 9358 case X86::BI__builtin_ia32_cmpordsd: 9359 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 7); 9360 9361 case X86::BI__emul: 9362 case X86::BI__emulu: { 9363 llvm::Type *Int64Ty = llvm::IntegerType::get(getLLVMContext(), 64); 9364 bool isSigned = (BuiltinID == X86::BI__emul); 9365 Value *LHS = Builder.CreateIntCast(Ops[0], Int64Ty, isSigned); 9366 Value *RHS = Builder.CreateIntCast(Ops[1], Int64Ty, isSigned); 9367 return Builder.CreateMul(LHS, RHS, "", !isSigned, isSigned); 9368 } 9369 case X86::BI__mulh: 9370 case X86::BI__umulh: 9371 case X86::BI_mul128: 9372 case X86::BI_umul128: { 9373 llvm::Type *ResType = ConvertType(E->getType()); 9374 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 9375 9376 bool IsSigned = (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI_mul128); 9377 Value *LHS = Builder.CreateIntCast(Ops[0], Int128Ty, IsSigned); 9378 Value *RHS = Builder.CreateIntCast(Ops[1], Int128Ty, IsSigned); 9379 9380 Value *MulResult, *HigherBits; 9381 if (IsSigned) { 9382 MulResult = Builder.CreateNSWMul(LHS, RHS); 9383 HigherBits = Builder.CreateAShr(MulResult, 64); 9384 } else { 9385 MulResult = Builder.CreateNUWMul(LHS, RHS); 9386 HigherBits = Builder.CreateLShr(MulResult, 64); 9387 } 9388 HigherBits = Builder.CreateIntCast(HigherBits, ResType, IsSigned); 9389 9390 if (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI__umulh) 9391 return HigherBits; 9392 9393 Address HighBitsAddress = EmitPointerWithAlignment(E->getArg(2)); 9394 Builder.CreateStore(HigherBits, HighBitsAddress); 9395 return Builder.CreateIntCast(MulResult, ResType, IsSigned); 9396 } 9397 9398 case X86::BI__faststorefence: { 9399 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 9400 llvm::SyncScope::System); 9401 } 9402 case X86::BI_ReadWriteBarrier: 9403 case X86::BI_ReadBarrier: 9404 case X86::BI_WriteBarrier: { 9405 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 9406 llvm::SyncScope::SingleThread); 9407 } 9408 case X86::BI_BitScanForward: 9409 case X86::BI_BitScanForward64: 9410 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 9411 case X86::BI_BitScanReverse: 9412 case X86::BI_BitScanReverse64: 9413 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 9414 9415 case X86::BI_InterlockedAnd64: 9416 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 9417 case X86::BI_InterlockedExchange64: 9418 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 9419 case X86::BI_InterlockedExchangeAdd64: 9420 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 9421 case X86::BI_InterlockedExchangeSub64: 9422 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 9423 case X86::BI_InterlockedOr64: 9424 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 9425 case X86::BI_InterlockedXor64: 9426 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 9427 case X86::BI_InterlockedDecrement64: 9428 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 9429 case X86::BI_InterlockedIncrement64: 9430 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 9431 case X86::BI_InterlockedCompareExchange128: { 9432 // InterlockedCompareExchange128 doesn't directly refer to 128bit ints, 9433 // instead it takes pointers to 64bit ints for Destination and 9434 // ComparandResult, and exchange is taken as two 64bit ints (high & low). 9435 // The previous value is written to ComparandResult, and success is 9436 // returned. 9437 9438 llvm::Type *Int128Ty = Builder.getInt128Ty(); 9439 llvm::Type *Int128PtrTy = Int128Ty->getPointerTo(); 9440 9441 Value *Destination = 9442 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PtrTy); 9443 Value *ExchangeHigh128 = 9444 Builder.CreateZExt(EmitScalarExpr(E->getArg(1)), Int128Ty); 9445 Value *ExchangeLow128 = 9446 Builder.CreateZExt(EmitScalarExpr(E->getArg(2)), Int128Ty); 9447 Address ComparandResult( 9448 Builder.CreateBitCast(EmitScalarExpr(E->getArg(3)), Int128PtrTy), 9449 getContext().toCharUnitsFromBits(128)); 9450 9451 Value *Exchange = Builder.CreateOr( 9452 Builder.CreateShl(ExchangeHigh128, 64, "", false, false), 9453 ExchangeLow128); 9454 9455 Value *Comparand = Builder.CreateLoad(ComparandResult); 9456 9457 AtomicCmpXchgInst *CXI = 9458 Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 9459 AtomicOrdering::SequentiallyConsistent, 9460 AtomicOrdering::SequentiallyConsistent); 9461 CXI->setVolatile(true); 9462 9463 // Write the result back to the inout pointer. 9464 Builder.CreateStore(Builder.CreateExtractValue(CXI, 0), ComparandResult); 9465 9466 // Get the success boolean and zero extend it to i8. 9467 Value *Success = Builder.CreateExtractValue(CXI, 1); 9468 return Builder.CreateZExt(Success, ConvertType(E->getType())); 9469 } 9470 9471 case X86::BI_AddressOfReturnAddress: { 9472 Value *F = CGM.getIntrinsic(Intrinsic::addressofreturnaddress); 9473 return Builder.CreateCall(F); 9474 } 9475 case X86::BI__stosb: { 9476 // We treat __stosb as a volatile memset - it may not generate "rep stosb" 9477 // instruction, but it will create a memset that won't be optimized away. 9478 return Builder.CreateMemSet(Ops[0], Ops[1], Ops[2], 1, true); 9479 } 9480 case X86::BI__ud2: 9481 // llvm.trap makes a ud2a instruction on x86. 9482 return EmitTrapCall(Intrinsic::trap); 9483 case X86::BI__int2c: { 9484 // This syscall signals a driver assertion failure in x86 NT kernels. 9485 llvm::FunctionType *FTy = llvm::FunctionType::get(VoidTy, false); 9486 llvm::InlineAsm *IA = 9487 llvm::InlineAsm::get(FTy, "int $$0x2c", "", /*SideEffects=*/true); 9488 llvm::AttributeList NoReturnAttr = llvm::AttributeList::get( 9489 getLLVMContext(), llvm::AttributeList::FunctionIndex, 9490 llvm::Attribute::NoReturn); 9491 CallSite CS = Builder.CreateCall(IA); 9492 CS.setAttributes(NoReturnAttr); 9493 return CS.getInstruction(); 9494 } 9495 case X86::BI__readfsbyte: 9496 case X86::BI__readfsword: 9497 case X86::BI__readfsdword: 9498 case X86::BI__readfsqword: { 9499 llvm::Type *IntTy = ConvertType(E->getType()); 9500 Value *Ptr = Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)), 9501 llvm::PointerType::get(IntTy, 257)); 9502 LoadInst *Load = Builder.CreateAlignedLoad( 9503 IntTy, Ptr, getContext().getTypeAlignInChars(E->getType())); 9504 Load->setVolatile(true); 9505 return Load; 9506 } 9507 case X86::BI__readgsbyte: 9508 case X86::BI__readgsword: 9509 case X86::BI__readgsdword: 9510 case X86::BI__readgsqword: { 9511 llvm::Type *IntTy = ConvertType(E->getType()); 9512 Value *Ptr = Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)), 9513 llvm::PointerType::get(IntTy, 256)); 9514 LoadInst *Load = Builder.CreateAlignedLoad( 9515 IntTy, Ptr, getContext().getTypeAlignInChars(E->getType())); 9516 Load->setVolatile(true); 9517 return Load; 9518 } 9519 } 9520 } 9521 9522 9523 Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, 9524 const CallExpr *E) { 9525 SmallVector<Value*, 4> Ops; 9526 9527 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) 9528 Ops.push_back(EmitScalarExpr(E->getArg(i))); 9529 9530 Intrinsic::ID ID = Intrinsic::not_intrinsic; 9531 9532 switch (BuiltinID) { 9533 default: return nullptr; 9534 9535 // __builtin_ppc_get_timebase is GCC 4.8+'s PowerPC-specific name for what we 9536 // call __builtin_readcyclecounter. 9537 case PPC::BI__builtin_ppc_get_timebase: 9538 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::readcyclecounter)); 9539 9540 // vec_ld, vec_xl_be, vec_lvsl, vec_lvsr 9541 case PPC::BI__builtin_altivec_lvx: 9542 case PPC::BI__builtin_altivec_lvxl: 9543 case PPC::BI__builtin_altivec_lvebx: 9544 case PPC::BI__builtin_altivec_lvehx: 9545 case PPC::BI__builtin_altivec_lvewx: 9546 case PPC::BI__builtin_altivec_lvsl: 9547 case PPC::BI__builtin_altivec_lvsr: 9548 case PPC::BI__builtin_vsx_lxvd2x: 9549 case PPC::BI__builtin_vsx_lxvw4x: 9550 case PPC::BI__builtin_vsx_lxvd2x_be: 9551 case PPC::BI__builtin_vsx_lxvw4x_be: 9552 case PPC::BI__builtin_vsx_lxvl: 9553 case PPC::BI__builtin_vsx_lxvll: 9554 { 9555 if(BuiltinID == PPC::BI__builtin_vsx_lxvl || 9556 BuiltinID == PPC::BI__builtin_vsx_lxvll){ 9557 Ops[0] = Builder.CreateBitCast(Ops[0], Int8PtrTy); 9558 }else { 9559 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 9560 Ops[0] = Builder.CreateGEP(Ops[1], Ops[0]); 9561 Ops.pop_back(); 9562 } 9563 9564 switch (BuiltinID) { 9565 default: llvm_unreachable("Unsupported ld/lvsl/lvsr intrinsic!"); 9566 case PPC::BI__builtin_altivec_lvx: 9567 ID = Intrinsic::ppc_altivec_lvx; 9568 break; 9569 case PPC::BI__builtin_altivec_lvxl: 9570 ID = Intrinsic::ppc_altivec_lvxl; 9571 break; 9572 case PPC::BI__builtin_altivec_lvebx: 9573 ID = Intrinsic::ppc_altivec_lvebx; 9574 break; 9575 case PPC::BI__builtin_altivec_lvehx: 9576 ID = Intrinsic::ppc_altivec_lvehx; 9577 break; 9578 case PPC::BI__builtin_altivec_lvewx: 9579 ID = Intrinsic::ppc_altivec_lvewx; 9580 break; 9581 case PPC::BI__builtin_altivec_lvsl: 9582 ID = Intrinsic::ppc_altivec_lvsl; 9583 break; 9584 case PPC::BI__builtin_altivec_lvsr: 9585 ID = Intrinsic::ppc_altivec_lvsr; 9586 break; 9587 case PPC::BI__builtin_vsx_lxvd2x: 9588 ID = Intrinsic::ppc_vsx_lxvd2x; 9589 break; 9590 case PPC::BI__builtin_vsx_lxvw4x: 9591 ID = Intrinsic::ppc_vsx_lxvw4x; 9592 break; 9593 case PPC::BI__builtin_vsx_lxvd2x_be: 9594 ID = Intrinsic::ppc_vsx_lxvd2x_be; 9595 break; 9596 case PPC::BI__builtin_vsx_lxvw4x_be: 9597 ID = Intrinsic::ppc_vsx_lxvw4x_be; 9598 break; 9599 case PPC::BI__builtin_vsx_lxvl: 9600 ID = Intrinsic::ppc_vsx_lxvl; 9601 break; 9602 case PPC::BI__builtin_vsx_lxvll: 9603 ID = Intrinsic::ppc_vsx_lxvll; 9604 break; 9605 } 9606 llvm::Function *F = CGM.getIntrinsic(ID); 9607 return Builder.CreateCall(F, Ops, ""); 9608 } 9609 9610 // vec_st, vec_xst_be 9611 case PPC::BI__builtin_altivec_stvx: 9612 case PPC::BI__builtin_altivec_stvxl: 9613 case PPC::BI__builtin_altivec_stvebx: 9614 case PPC::BI__builtin_altivec_stvehx: 9615 case PPC::BI__builtin_altivec_stvewx: 9616 case PPC::BI__builtin_vsx_stxvd2x: 9617 case PPC::BI__builtin_vsx_stxvw4x: 9618 case PPC::BI__builtin_vsx_stxvd2x_be: 9619 case PPC::BI__builtin_vsx_stxvw4x_be: 9620 case PPC::BI__builtin_vsx_stxvl: 9621 case PPC::BI__builtin_vsx_stxvll: 9622 { 9623 if(BuiltinID == PPC::BI__builtin_vsx_stxvl || 9624 BuiltinID == PPC::BI__builtin_vsx_stxvll ){ 9625 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 9626 }else { 9627 Ops[2] = Builder.CreateBitCast(Ops[2], Int8PtrTy); 9628 Ops[1] = Builder.CreateGEP(Ops[2], Ops[1]); 9629 Ops.pop_back(); 9630 } 9631 9632 switch (BuiltinID) { 9633 default: llvm_unreachable("Unsupported st intrinsic!"); 9634 case PPC::BI__builtin_altivec_stvx: 9635 ID = Intrinsic::ppc_altivec_stvx; 9636 break; 9637 case PPC::BI__builtin_altivec_stvxl: 9638 ID = Intrinsic::ppc_altivec_stvxl; 9639 break; 9640 case PPC::BI__builtin_altivec_stvebx: 9641 ID = Intrinsic::ppc_altivec_stvebx; 9642 break; 9643 case PPC::BI__builtin_altivec_stvehx: 9644 ID = Intrinsic::ppc_altivec_stvehx; 9645 break; 9646 case PPC::BI__builtin_altivec_stvewx: 9647 ID = Intrinsic::ppc_altivec_stvewx; 9648 break; 9649 case PPC::BI__builtin_vsx_stxvd2x: 9650 ID = Intrinsic::ppc_vsx_stxvd2x; 9651 break; 9652 case PPC::BI__builtin_vsx_stxvw4x: 9653 ID = Intrinsic::ppc_vsx_stxvw4x; 9654 break; 9655 case PPC::BI__builtin_vsx_stxvd2x_be: 9656 ID = Intrinsic::ppc_vsx_stxvd2x_be; 9657 break; 9658 case PPC::BI__builtin_vsx_stxvw4x_be: 9659 ID = Intrinsic::ppc_vsx_stxvw4x_be; 9660 break; 9661 case PPC::BI__builtin_vsx_stxvl: 9662 ID = Intrinsic::ppc_vsx_stxvl; 9663 break; 9664 case PPC::BI__builtin_vsx_stxvll: 9665 ID = Intrinsic::ppc_vsx_stxvll; 9666 break; 9667 } 9668 llvm::Function *F = CGM.getIntrinsic(ID); 9669 return Builder.CreateCall(F, Ops, ""); 9670 } 9671 // Square root 9672 case PPC::BI__builtin_vsx_xvsqrtsp: 9673 case PPC::BI__builtin_vsx_xvsqrtdp: { 9674 llvm::Type *ResultType = ConvertType(E->getType()); 9675 Value *X = EmitScalarExpr(E->getArg(0)); 9676 ID = Intrinsic::sqrt; 9677 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 9678 return Builder.CreateCall(F, X); 9679 } 9680 // Count leading zeros 9681 case PPC::BI__builtin_altivec_vclzb: 9682 case PPC::BI__builtin_altivec_vclzh: 9683 case PPC::BI__builtin_altivec_vclzw: 9684 case PPC::BI__builtin_altivec_vclzd: { 9685 llvm::Type *ResultType = ConvertType(E->getType()); 9686 Value *X = EmitScalarExpr(E->getArg(0)); 9687 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 9688 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 9689 return Builder.CreateCall(F, {X, Undef}); 9690 } 9691 case PPC::BI__builtin_altivec_vctzb: 9692 case PPC::BI__builtin_altivec_vctzh: 9693 case PPC::BI__builtin_altivec_vctzw: 9694 case PPC::BI__builtin_altivec_vctzd: { 9695 llvm::Type *ResultType = ConvertType(E->getType()); 9696 Value *X = EmitScalarExpr(E->getArg(0)); 9697 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 9698 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 9699 return Builder.CreateCall(F, {X, Undef}); 9700 } 9701 case PPC::BI__builtin_altivec_vpopcntb: 9702 case PPC::BI__builtin_altivec_vpopcnth: 9703 case PPC::BI__builtin_altivec_vpopcntw: 9704 case PPC::BI__builtin_altivec_vpopcntd: { 9705 llvm::Type *ResultType = ConvertType(E->getType()); 9706 Value *X = EmitScalarExpr(E->getArg(0)); 9707 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 9708 return Builder.CreateCall(F, X); 9709 } 9710 // Copy sign 9711 case PPC::BI__builtin_vsx_xvcpsgnsp: 9712 case PPC::BI__builtin_vsx_xvcpsgndp: { 9713 llvm::Type *ResultType = ConvertType(E->getType()); 9714 Value *X = EmitScalarExpr(E->getArg(0)); 9715 Value *Y = EmitScalarExpr(E->getArg(1)); 9716 ID = Intrinsic::copysign; 9717 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 9718 return Builder.CreateCall(F, {X, Y}); 9719 } 9720 // Rounding/truncation 9721 case PPC::BI__builtin_vsx_xvrspip: 9722 case PPC::BI__builtin_vsx_xvrdpip: 9723 case PPC::BI__builtin_vsx_xvrdpim: 9724 case PPC::BI__builtin_vsx_xvrspim: 9725 case PPC::BI__builtin_vsx_xvrdpi: 9726 case PPC::BI__builtin_vsx_xvrspi: 9727 case PPC::BI__builtin_vsx_xvrdpic: 9728 case PPC::BI__builtin_vsx_xvrspic: 9729 case PPC::BI__builtin_vsx_xvrdpiz: 9730 case PPC::BI__builtin_vsx_xvrspiz: { 9731 llvm::Type *ResultType = ConvertType(E->getType()); 9732 Value *X = EmitScalarExpr(E->getArg(0)); 9733 if (BuiltinID == PPC::BI__builtin_vsx_xvrdpim || 9734 BuiltinID == PPC::BI__builtin_vsx_xvrspim) 9735 ID = Intrinsic::floor; 9736 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpi || 9737 BuiltinID == PPC::BI__builtin_vsx_xvrspi) 9738 ID = Intrinsic::round; 9739 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpic || 9740 BuiltinID == PPC::BI__builtin_vsx_xvrspic) 9741 ID = Intrinsic::nearbyint; 9742 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpip || 9743 BuiltinID == PPC::BI__builtin_vsx_xvrspip) 9744 ID = Intrinsic::ceil; 9745 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpiz || 9746 BuiltinID == PPC::BI__builtin_vsx_xvrspiz) 9747 ID = Intrinsic::trunc; 9748 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 9749 return Builder.CreateCall(F, X); 9750 } 9751 9752 // Absolute value 9753 case PPC::BI__builtin_vsx_xvabsdp: 9754 case PPC::BI__builtin_vsx_xvabssp: { 9755 llvm::Type *ResultType = ConvertType(E->getType()); 9756 Value *X = EmitScalarExpr(E->getArg(0)); 9757 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 9758 return Builder.CreateCall(F, X); 9759 } 9760 9761 // FMA variations 9762 case PPC::BI__builtin_vsx_xvmaddadp: 9763 case PPC::BI__builtin_vsx_xvmaddasp: 9764 case PPC::BI__builtin_vsx_xvnmaddadp: 9765 case PPC::BI__builtin_vsx_xvnmaddasp: 9766 case PPC::BI__builtin_vsx_xvmsubadp: 9767 case PPC::BI__builtin_vsx_xvmsubasp: 9768 case PPC::BI__builtin_vsx_xvnmsubadp: 9769 case PPC::BI__builtin_vsx_xvnmsubasp: { 9770 llvm::Type *ResultType = ConvertType(E->getType()); 9771 Value *X = EmitScalarExpr(E->getArg(0)); 9772 Value *Y = EmitScalarExpr(E->getArg(1)); 9773 Value *Z = EmitScalarExpr(E->getArg(2)); 9774 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 9775 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 9776 switch (BuiltinID) { 9777 case PPC::BI__builtin_vsx_xvmaddadp: 9778 case PPC::BI__builtin_vsx_xvmaddasp: 9779 return Builder.CreateCall(F, {X, Y, Z}); 9780 case PPC::BI__builtin_vsx_xvnmaddadp: 9781 case PPC::BI__builtin_vsx_xvnmaddasp: 9782 return Builder.CreateFSub(Zero, 9783 Builder.CreateCall(F, {X, Y, Z}), "sub"); 9784 case PPC::BI__builtin_vsx_xvmsubadp: 9785 case PPC::BI__builtin_vsx_xvmsubasp: 9786 return Builder.CreateCall(F, 9787 {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 9788 case PPC::BI__builtin_vsx_xvnmsubadp: 9789 case PPC::BI__builtin_vsx_xvnmsubasp: 9790 Value *FsubRes = 9791 Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 9792 return Builder.CreateFSub(Zero, FsubRes, "sub"); 9793 } 9794 llvm_unreachable("Unknown FMA operation"); 9795 return nullptr; // Suppress no-return warning 9796 } 9797 9798 case PPC::BI__builtin_vsx_insertword: { 9799 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_vsx_xxinsertw); 9800 9801 // Third argument is a compile time constant int. It must be clamped to 9802 // to the range [0, 12]. 9803 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[2]); 9804 assert(ArgCI && 9805 "Third arg to xxinsertw intrinsic must be constant integer"); 9806 const int64_t MaxIndex = 12; 9807 int64_t Index = clamp(ArgCI->getSExtValue(), 0, MaxIndex); 9808 9809 // The builtin semantics don't exactly match the xxinsertw instructions 9810 // semantics (which ppc_vsx_xxinsertw follows). The builtin extracts the 9811 // word from the first argument, and inserts it in the second argument. The 9812 // instruction extracts the word from its second input register and inserts 9813 // it into its first input register, so swap the first and second arguments. 9814 std::swap(Ops[0], Ops[1]); 9815 9816 // Need to cast the second argument from a vector of unsigned int to a 9817 // vector of long long. 9818 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int64Ty, 2)); 9819 9820 if (getTarget().isLittleEndian()) { 9821 // Create a shuffle mask of (1, 0) 9822 Constant *ShuffleElts[2] = { ConstantInt::get(Int32Ty, 1), 9823 ConstantInt::get(Int32Ty, 0) 9824 }; 9825 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 9826 9827 // Reverse the double words in the vector we will extract from. 9828 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 9829 Ops[0] = Builder.CreateShuffleVector(Ops[0], Ops[0], ShuffleMask); 9830 9831 // Reverse the index. 9832 Index = MaxIndex - Index; 9833 } 9834 9835 // Intrinsic expects the first arg to be a vector of int. 9836 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 9837 Ops[2] = ConstantInt::getSigned(Int32Ty, Index); 9838 return Builder.CreateCall(F, Ops); 9839 } 9840 9841 case PPC::BI__builtin_vsx_extractuword: { 9842 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_vsx_xxextractuw); 9843 9844 // Intrinsic expects the first argument to be a vector of doublewords. 9845 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 9846 9847 // The second argument is a compile time constant int that needs to 9848 // be clamped to the range [0, 12]. 9849 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[1]); 9850 assert(ArgCI && 9851 "Second Arg to xxextractuw intrinsic must be a constant integer!"); 9852 const int64_t MaxIndex = 12; 9853 int64_t Index = clamp(ArgCI->getSExtValue(), 0, MaxIndex); 9854 9855 if (getTarget().isLittleEndian()) { 9856 // Reverse the index. 9857 Index = MaxIndex - Index; 9858 Ops[1] = ConstantInt::getSigned(Int32Ty, Index); 9859 9860 // Emit the call, then reverse the double words of the results vector. 9861 Value *Call = Builder.CreateCall(F, Ops); 9862 9863 // Create a shuffle mask of (1, 0) 9864 Constant *ShuffleElts[2] = { ConstantInt::get(Int32Ty, 1), 9865 ConstantInt::get(Int32Ty, 0) 9866 }; 9867 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 9868 9869 Value *ShuffleCall = Builder.CreateShuffleVector(Call, Call, ShuffleMask); 9870 return ShuffleCall; 9871 } else { 9872 Ops[1] = ConstantInt::getSigned(Int32Ty, Index); 9873 return Builder.CreateCall(F, Ops); 9874 } 9875 } 9876 9877 case PPC::BI__builtin_vsx_xxpermdi: { 9878 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[2]); 9879 assert(ArgCI && "Third arg must be constant integer!"); 9880 9881 unsigned Index = ArgCI->getZExtValue(); 9882 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 9883 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int64Ty, 2)); 9884 9885 // Element zero comes from the first input vector and element one comes from 9886 // the second. The element indices within each vector are numbered in big 9887 // endian order so the shuffle mask must be adjusted for this on little 9888 // endian platforms (i.e. index is complemented and source vector reversed). 9889 unsigned ElemIdx0; 9890 unsigned ElemIdx1; 9891 if (getTarget().isLittleEndian()) { 9892 ElemIdx0 = (~Index & 1) + 2; 9893 ElemIdx1 = (~Index & 2) >> 1; 9894 } else { // BigEndian 9895 ElemIdx0 = (Index & 2) >> 1; 9896 ElemIdx1 = 2 + (Index & 1); 9897 } 9898 9899 Constant *ShuffleElts[2] = {ConstantInt::get(Int32Ty, ElemIdx0), 9900 ConstantInt::get(Int32Ty, ElemIdx1)}; 9901 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 9902 9903 Value *ShuffleCall = 9904 Builder.CreateShuffleVector(Ops[0], Ops[1], ShuffleMask); 9905 QualType BIRetType = E->getType(); 9906 auto RetTy = ConvertType(BIRetType); 9907 return Builder.CreateBitCast(ShuffleCall, RetTy); 9908 } 9909 9910 case PPC::BI__builtin_vsx_xxsldwi: { 9911 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[2]); 9912 assert(ArgCI && "Third argument must be a compile time constant"); 9913 unsigned Index = ArgCI->getZExtValue() & 0x3; 9914 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 9915 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int32Ty, 4)); 9916 9917 // Create a shuffle mask 9918 unsigned ElemIdx0; 9919 unsigned ElemIdx1; 9920 unsigned ElemIdx2; 9921 unsigned ElemIdx3; 9922 if (getTarget().isLittleEndian()) { 9923 // Little endian element N comes from element 8+N-Index of the 9924 // concatenated wide vector (of course, using modulo arithmetic on 9925 // the total number of elements). 9926 ElemIdx0 = (8 - Index) % 8; 9927 ElemIdx1 = (9 - Index) % 8; 9928 ElemIdx2 = (10 - Index) % 8; 9929 ElemIdx3 = (11 - Index) % 8; 9930 } else { 9931 // Big endian ElemIdx<N> = Index + N 9932 ElemIdx0 = Index; 9933 ElemIdx1 = Index + 1; 9934 ElemIdx2 = Index + 2; 9935 ElemIdx3 = Index + 3; 9936 } 9937 9938 Constant *ShuffleElts[4] = {ConstantInt::get(Int32Ty, ElemIdx0), 9939 ConstantInt::get(Int32Ty, ElemIdx1), 9940 ConstantInt::get(Int32Ty, ElemIdx2), 9941 ConstantInt::get(Int32Ty, ElemIdx3)}; 9942 9943 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 9944 Value *ShuffleCall = 9945 Builder.CreateShuffleVector(Ops[0], Ops[1], ShuffleMask); 9946 QualType BIRetType = E->getType(); 9947 auto RetTy = ConvertType(BIRetType); 9948 return Builder.CreateBitCast(ShuffleCall, RetTy); 9949 } 9950 } 9951 } 9952 9953 Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID, 9954 const CallExpr *E) { 9955 switch (BuiltinID) { 9956 case AMDGPU::BI__builtin_amdgcn_div_scale: 9957 case AMDGPU::BI__builtin_amdgcn_div_scalef: { 9958 // Translate from the intrinsics's struct return to the builtin's out 9959 // argument. 9960 9961 Address FlagOutPtr = EmitPointerWithAlignment(E->getArg(3)); 9962 9963 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 9964 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 9965 llvm::Value *Z = EmitScalarExpr(E->getArg(2)); 9966 9967 llvm::Value *Callee = CGM.getIntrinsic(Intrinsic::amdgcn_div_scale, 9968 X->getType()); 9969 9970 llvm::Value *Tmp = Builder.CreateCall(Callee, {X, Y, Z}); 9971 9972 llvm::Value *Result = Builder.CreateExtractValue(Tmp, 0); 9973 llvm::Value *Flag = Builder.CreateExtractValue(Tmp, 1); 9974 9975 llvm::Type *RealFlagType 9976 = FlagOutPtr.getPointer()->getType()->getPointerElementType(); 9977 9978 llvm::Value *FlagExt = Builder.CreateZExt(Flag, RealFlagType); 9979 Builder.CreateStore(FlagExt, FlagOutPtr); 9980 return Result; 9981 } 9982 case AMDGPU::BI__builtin_amdgcn_div_fmas: 9983 case AMDGPU::BI__builtin_amdgcn_div_fmasf: { 9984 llvm::Value *Src0 = EmitScalarExpr(E->getArg(0)); 9985 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); 9986 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); 9987 llvm::Value *Src3 = EmitScalarExpr(E->getArg(3)); 9988 9989 llvm::Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_div_fmas, 9990 Src0->getType()); 9991 llvm::Value *Src3ToBool = Builder.CreateIsNotNull(Src3); 9992 return Builder.CreateCall(F, {Src0, Src1, Src2, Src3ToBool}); 9993 } 9994 9995 case AMDGPU::BI__builtin_amdgcn_ds_swizzle: 9996 return emitBinaryBuiltin(*this, E, Intrinsic::amdgcn_ds_swizzle); 9997 case AMDGPU::BI__builtin_amdgcn_mov_dpp: { 9998 llvm::SmallVector<llvm::Value *, 5> Args; 9999 for (unsigned I = 0; I != 5; ++I) 10000 Args.push_back(EmitScalarExpr(E->getArg(I))); 10001 Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_mov_dpp, 10002 Args[0]->getType()); 10003 return Builder.CreateCall(F, Args); 10004 } 10005 case AMDGPU::BI__builtin_amdgcn_div_fixup: 10006 case AMDGPU::BI__builtin_amdgcn_div_fixupf: 10007 case AMDGPU::BI__builtin_amdgcn_div_fixuph: 10008 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_div_fixup); 10009 case AMDGPU::BI__builtin_amdgcn_trig_preop: 10010 case AMDGPU::BI__builtin_amdgcn_trig_preopf: 10011 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_trig_preop); 10012 case AMDGPU::BI__builtin_amdgcn_rcp: 10013 case AMDGPU::BI__builtin_amdgcn_rcpf: 10014 case AMDGPU::BI__builtin_amdgcn_rcph: 10015 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rcp); 10016 case AMDGPU::BI__builtin_amdgcn_rsq: 10017 case AMDGPU::BI__builtin_amdgcn_rsqf: 10018 case AMDGPU::BI__builtin_amdgcn_rsqh: 10019 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq); 10020 case AMDGPU::BI__builtin_amdgcn_rsq_clamp: 10021 case AMDGPU::BI__builtin_amdgcn_rsq_clampf: 10022 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq_clamp); 10023 case AMDGPU::BI__builtin_amdgcn_sinf: 10024 case AMDGPU::BI__builtin_amdgcn_sinh: 10025 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_sin); 10026 case AMDGPU::BI__builtin_amdgcn_cosf: 10027 case AMDGPU::BI__builtin_amdgcn_cosh: 10028 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_cos); 10029 case AMDGPU::BI__builtin_amdgcn_log_clampf: 10030 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_log_clamp); 10031 case AMDGPU::BI__builtin_amdgcn_ldexp: 10032 case AMDGPU::BI__builtin_amdgcn_ldexpf: 10033 case AMDGPU::BI__builtin_amdgcn_ldexph: 10034 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_ldexp); 10035 case AMDGPU::BI__builtin_amdgcn_frexp_mant: 10036 case AMDGPU::BI__builtin_amdgcn_frexp_mantf: 10037 case AMDGPU::BI__builtin_amdgcn_frexp_manth: 10038 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_frexp_mant); 10039 case AMDGPU::BI__builtin_amdgcn_frexp_exp: 10040 case AMDGPU::BI__builtin_amdgcn_frexp_expf: { 10041 Value *Src0 = EmitScalarExpr(E->getArg(0)); 10042 Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_frexp_exp, 10043 { Builder.getInt32Ty(), Src0->getType() }); 10044 return Builder.CreateCall(F, Src0); 10045 } 10046 case AMDGPU::BI__builtin_amdgcn_frexp_exph: { 10047 Value *Src0 = EmitScalarExpr(E->getArg(0)); 10048 Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_frexp_exp, 10049 { Builder.getInt16Ty(), Src0->getType() }); 10050 return Builder.CreateCall(F, Src0); 10051 } 10052 case AMDGPU::BI__builtin_amdgcn_fract: 10053 case AMDGPU::BI__builtin_amdgcn_fractf: 10054 case AMDGPU::BI__builtin_amdgcn_fracth: 10055 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_fract); 10056 case AMDGPU::BI__builtin_amdgcn_lerp: 10057 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_lerp); 10058 case AMDGPU::BI__builtin_amdgcn_uicmp: 10059 case AMDGPU::BI__builtin_amdgcn_uicmpl: 10060 case AMDGPU::BI__builtin_amdgcn_sicmp: 10061 case AMDGPU::BI__builtin_amdgcn_sicmpl: 10062 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_icmp); 10063 case AMDGPU::BI__builtin_amdgcn_fcmp: 10064 case AMDGPU::BI__builtin_amdgcn_fcmpf: 10065 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_fcmp); 10066 case AMDGPU::BI__builtin_amdgcn_class: 10067 case AMDGPU::BI__builtin_amdgcn_classf: 10068 case AMDGPU::BI__builtin_amdgcn_classh: 10069 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_class); 10070 case AMDGPU::BI__builtin_amdgcn_fmed3f: 10071 case AMDGPU::BI__builtin_amdgcn_fmed3h: 10072 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_fmed3); 10073 case AMDGPU::BI__builtin_amdgcn_read_exec: { 10074 CallInst *CI = cast<CallInst>( 10075 EmitSpecialRegisterBuiltin(*this, E, Int64Ty, Int64Ty, true, "exec")); 10076 CI->setConvergent(); 10077 return CI; 10078 } 10079 case AMDGPU::BI__builtin_amdgcn_read_exec_lo: 10080 case AMDGPU::BI__builtin_amdgcn_read_exec_hi: { 10081 StringRef RegName = BuiltinID == AMDGPU::BI__builtin_amdgcn_read_exec_lo ? 10082 "exec_lo" : "exec_hi"; 10083 CallInst *CI = cast<CallInst>( 10084 EmitSpecialRegisterBuiltin(*this, E, Int32Ty, Int32Ty, true, RegName)); 10085 CI->setConvergent(); 10086 return CI; 10087 } 10088 10089 // amdgcn workitem 10090 case AMDGPU::BI__builtin_amdgcn_workitem_id_x: 10091 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_x, 0, 1024); 10092 case AMDGPU::BI__builtin_amdgcn_workitem_id_y: 10093 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_y, 0, 1024); 10094 case AMDGPU::BI__builtin_amdgcn_workitem_id_z: 10095 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_z, 0, 1024); 10096 10097 // r600 intrinsics 10098 case AMDGPU::BI__builtin_r600_recipsqrt_ieee: 10099 case AMDGPU::BI__builtin_r600_recipsqrt_ieeef: 10100 return emitUnaryBuiltin(*this, E, Intrinsic::r600_recipsqrt_ieee); 10101 case AMDGPU::BI__builtin_r600_read_tidig_x: 10102 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_x, 0, 1024); 10103 case AMDGPU::BI__builtin_r600_read_tidig_y: 10104 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_y, 0, 1024); 10105 case AMDGPU::BI__builtin_r600_read_tidig_z: 10106 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_z, 0, 1024); 10107 default: 10108 return nullptr; 10109 } 10110 } 10111 10112 /// Handle a SystemZ function in which the final argument is a pointer 10113 /// to an int that receives the post-instruction CC value. At the LLVM level 10114 /// this is represented as a function that returns a {result, cc} pair. 10115 static Value *EmitSystemZIntrinsicWithCC(CodeGenFunction &CGF, 10116 unsigned IntrinsicID, 10117 const CallExpr *E) { 10118 unsigned NumArgs = E->getNumArgs() - 1; 10119 SmallVector<Value *, 8> Args(NumArgs); 10120 for (unsigned I = 0; I < NumArgs; ++I) 10121 Args[I] = CGF.EmitScalarExpr(E->getArg(I)); 10122 Address CCPtr = CGF.EmitPointerWithAlignment(E->getArg(NumArgs)); 10123 Value *F = CGF.CGM.getIntrinsic(IntrinsicID); 10124 Value *Call = CGF.Builder.CreateCall(F, Args); 10125 Value *CC = CGF.Builder.CreateExtractValue(Call, 1); 10126 CGF.Builder.CreateStore(CC, CCPtr); 10127 return CGF.Builder.CreateExtractValue(Call, 0); 10128 } 10129 10130 Value *CodeGenFunction::EmitSystemZBuiltinExpr(unsigned BuiltinID, 10131 const CallExpr *E) { 10132 switch (BuiltinID) { 10133 case SystemZ::BI__builtin_tbegin: { 10134 Value *TDB = EmitScalarExpr(E->getArg(0)); 10135 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 10136 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin); 10137 return Builder.CreateCall(F, {TDB, Control}); 10138 } 10139 case SystemZ::BI__builtin_tbegin_nofloat: { 10140 Value *TDB = EmitScalarExpr(E->getArg(0)); 10141 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 10142 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin_nofloat); 10143 return Builder.CreateCall(F, {TDB, Control}); 10144 } 10145 case SystemZ::BI__builtin_tbeginc: { 10146 Value *TDB = llvm::ConstantPointerNull::get(Int8PtrTy); 10147 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff08); 10148 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbeginc); 10149 return Builder.CreateCall(F, {TDB, Control}); 10150 } 10151 case SystemZ::BI__builtin_tabort: { 10152 Value *Data = EmitScalarExpr(E->getArg(0)); 10153 Value *F = CGM.getIntrinsic(Intrinsic::s390_tabort); 10154 return Builder.CreateCall(F, Builder.CreateSExt(Data, Int64Ty, "tabort")); 10155 } 10156 case SystemZ::BI__builtin_non_tx_store: { 10157 Value *Address = EmitScalarExpr(E->getArg(0)); 10158 Value *Data = EmitScalarExpr(E->getArg(1)); 10159 Value *F = CGM.getIntrinsic(Intrinsic::s390_ntstg); 10160 return Builder.CreateCall(F, {Data, Address}); 10161 } 10162 10163 // Vector builtins. Note that most vector builtins are mapped automatically 10164 // to target-specific LLVM intrinsics. The ones handled specially here can 10165 // be represented via standard LLVM IR, which is preferable to enable common 10166 // LLVM optimizations. 10167 10168 case SystemZ::BI__builtin_s390_vpopctb: 10169 case SystemZ::BI__builtin_s390_vpopcth: 10170 case SystemZ::BI__builtin_s390_vpopctf: 10171 case SystemZ::BI__builtin_s390_vpopctg: { 10172 llvm::Type *ResultType = ConvertType(E->getType()); 10173 Value *X = EmitScalarExpr(E->getArg(0)); 10174 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 10175 return Builder.CreateCall(F, X); 10176 } 10177 10178 case SystemZ::BI__builtin_s390_vclzb: 10179 case SystemZ::BI__builtin_s390_vclzh: 10180 case SystemZ::BI__builtin_s390_vclzf: 10181 case SystemZ::BI__builtin_s390_vclzg: { 10182 llvm::Type *ResultType = ConvertType(E->getType()); 10183 Value *X = EmitScalarExpr(E->getArg(0)); 10184 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 10185 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 10186 return Builder.CreateCall(F, {X, Undef}); 10187 } 10188 10189 case SystemZ::BI__builtin_s390_vctzb: 10190 case SystemZ::BI__builtin_s390_vctzh: 10191 case SystemZ::BI__builtin_s390_vctzf: 10192 case SystemZ::BI__builtin_s390_vctzg: { 10193 llvm::Type *ResultType = ConvertType(E->getType()); 10194 Value *X = EmitScalarExpr(E->getArg(0)); 10195 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 10196 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 10197 return Builder.CreateCall(F, {X, Undef}); 10198 } 10199 10200 case SystemZ::BI__builtin_s390_vfsqsb: 10201 case SystemZ::BI__builtin_s390_vfsqdb: { 10202 llvm::Type *ResultType = ConvertType(E->getType()); 10203 Value *X = EmitScalarExpr(E->getArg(0)); 10204 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, ResultType); 10205 return Builder.CreateCall(F, X); 10206 } 10207 case SystemZ::BI__builtin_s390_vfmasb: 10208 case SystemZ::BI__builtin_s390_vfmadb: { 10209 llvm::Type *ResultType = ConvertType(E->getType()); 10210 Value *X = EmitScalarExpr(E->getArg(0)); 10211 Value *Y = EmitScalarExpr(E->getArg(1)); 10212 Value *Z = EmitScalarExpr(E->getArg(2)); 10213 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 10214 return Builder.CreateCall(F, {X, Y, Z}); 10215 } 10216 case SystemZ::BI__builtin_s390_vfmssb: 10217 case SystemZ::BI__builtin_s390_vfmsdb: { 10218 llvm::Type *ResultType = ConvertType(E->getType()); 10219 Value *X = EmitScalarExpr(E->getArg(0)); 10220 Value *Y = EmitScalarExpr(E->getArg(1)); 10221 Value *Z = EmitScalarExpr(E->getArg(2)); 10222 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 10223 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 10224 return Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 10225 } 10226 case SystemZ::BI__builtin_s390_vfnmasb: 10227 case SystemZ::BI__builtin_s390_vfnmadb: { 10228 llvm::Type *ResultType = ConvertType(E->getType()); 10229 Value *X = EmitScalarExpr(E->getArg(0)); 10230 Value *Y = EmitScalarExpr(E->getArg(1)); 10231 Value *Z = EmitScalarExpr(E->getArg(2)); 10232 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 10233 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 10234 return Builder.CreateFSub(Zero, Builder.CreateCall(F, {X, Y, Z}), "sub"); 10235 } 10236 case SystemZ::BI__builtin_s390_vfnmssb: 10237 case SystemZ::BI__builtin_s390_vfnmsdb: { 10238 llvm::Type *ResultType = ConvertType(E->getType()); 10239 Value *X = EmitScalarExpr(E->getArg(0)); 10240 Value *Y = EmitScalarExpr(E->getArg(1)); 10241 Value *Z = EmitScalarExpr(E->getArg(2)); 10242 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 10243 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 10244 Value *NegZ = Builder.CreateFSub(Zero, Z, "sub"); 10245 return Builder.CreateFSub(Zero, Builder.CreateCall(F, {X, Y, NegZ})); 10246 } 10247 case SystemZ::BI__builtin_s390_vflpsb: 10248 case SystemZ::BI__builtin_s390_vflpdb: { 10249 llvm::Type *ResultType = ConvertType(E->getType()); 10250 Value *X = EmitScalarExpr(E->getArg(0)); 10251 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 10252 return Builder.CreateCall(F, X); 10253 } 10254 case SystemZ::BI__builtin_s390_vflnsb: 10255 case SystemZ::BI__builtin_s390_vflndb: { 10256 llvm::Type *ResultType = ConvertType(E->getType()); 10257 Value *X = EmitScalarExpr(E->getArg(0)); 10258 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 10259 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 10260 return Builder.CreateFSub(Zero, Builder.CreateCall(F, X), "sub"); 10261 } 10262 case SystemZ::BI__builtin_s390_vfisb: 10263 case SystemZ::BI__builtin_s390_vfidb: { 10264 llvm::Type *ResultType = ConvertType(E->getType()); 10265 Value *X = EmitScalarExpr(E->getArg(0)); 10266 // Constant-fold the M4 and M5 mask arguments. 10267 llvm::APSInt M4, M5; 10268 bool IsConstM4 = E->getArg(1)->isIntegerConstantExpr(M4, getContext()); 10269 bool IsConstM5 = E->getArg(2)->isIntegerConstantExpr(M5, getContext()); 10270 assert(IsConstM4 && IsConstM5 && "Constant arg isn't actually constant?"); 10271 (void)IsConstM4; (void)IsConstM5; 10272 // Check whether this instance can be represented via a LLVM standard 10273 // intrinsic. We only support some combinations of M4 and M5. 10274 Intrinsic::ID ID = Intrinsic::not_intrinsic; 10275 switch (M4.getZExtValue()) { 10276 default: break; 10277 case 0: // IEEE-inexact exception allowed 10278 switch (M5.getZExtValue()) { 10279 default: break; 10280 case 0: ID = Intrinsic::rint; break; 10281 } 10282 break; 10283 case 4: // IEEE-inexact exception suppressed 10284 switch (M5.getZExtValue()) { 10285 default: break; 10286 case 0: ID = Intrinsic::nearbyint; break; 10287 case 1: ID = Intrinsic::round; break; 10288 case 5: ID = Intrinsic::trunc; break; 10289 case 6: ID = Intrinsic::ceil; break; 10290 case 7: ID = Intrinsic::floor; break; 10291 } 10292 break; 10293 } 10294 if (ID != Intrinsic::not_intrinsic) { 10295 Function *F = CGM.getIntrinsic(ID, ResultType); 10296 return Builder.CreateCall(F, X); 10297 } 10298 switch (BuiltinID) { 10299 case SystemZ::BI__builtin_s390_vfisb: ID = Intrinsic::s390_vfisb; break; 10300 case SystemZ::BI__builtin_s390_vfidb: ID = Intrinsic::s390_vfidb; break; 10301 default: llvm_unreachable("Unknown BuiltinID"); 10302 } 10303 Function *F = CGM.getIntrinsic(ID); 10304 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 10305 Value *M5Value = llvm::ConstantInt::get(getLLVMContext(), M5); 10306 return Builder.CreateCall(F, {X, M4Value, M5Value}); 10307 } 10308 case SystemZ::BI__builtin_s390_vfmaxsb: 10309 case SystemZ::BI__builtin_s390_vfmaxdb: { 10310 llvm::Type *ResultType = ConvertType(E->getType()); 10311 Value *X = EmitScalarExpr(E->getArg(0)); 10312 Value *Y = EmitScalarExpr(E->getArg(1)); 10313 // Constant-fold the M4 mask argument. 10314 llvm::APSInt M4; 10315 bool IsConstM4 = E->getArg(2)->isIntegerConstantExpr(M4, getContext()); 10316 assert(IsConstM4 && "Constant arg isn't actually constant?"); 10317 (void)IsConstM4; 10318 // Check whether this instance can be represented via a LLVM standard 10319 // intrinsic. We only support some values of M4. 10320 Intrinsic::ID ID = Intrinsic::not_intrinsic; 10321 switch (M4.getZExtValue()) { 10322 default: break; 10323 case 4: ID = Intrinsic::maxnum; break; 10324 } 10325 if (ID != Intrinsic::not_intrinsic) { 10326 Function *F = CGM.getIntrinsic(ID, ResultType); 10327 return Builder.CreateCall(F, {X, Y}); 10328 } 10329 switch (BuiltinID) { 10330 case SystemZ::BI__builtin_s390_vfmaxsb: ID = Intrinsic::s390_vfmaxsb; break; 10331 case SystemZ::BI__builtin_s390_vfmaxdb: ID = Intrinsic::s390_vfmaxdb; break; 10332 default: llvm_unreachable("Unknown BuiltinID"); 10333 } 10334 Function *F = CGM.getIntrinsic(ID); 10335 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 10336 return Builder.CreateCall(F, {X, Y, M4Value}); 10337 } 10338 case SystemZ::BI__builtin_s390_vfminsb: 10339 case SystemZ::BI__builtin_s390_vfmindb: { 10340 llvm::Type *ResultType = ConvertType(E->getType()); 10341 Value *X = EmitScalarExpr(E->getArg(0)); 10342 Value *Y = EmitScalarExpr(E->getArg(1)); 10343 // Constant-fold the M4 mask argument. 10344 llvm::APSInt M4; 10345 bool IsConstM4 = E->getArg(2)->isIntegerConstantExpr(M4, getContext()); 10346 assert(IsConstM4 && "Constant arg isn't actually constant?"); 10347 (void)IsConstM4; 10348 // Check whether this instance can be represented via a LLVM standard 10349 // intrinsic. We only support some values of M4. 10350 Intrinsic::ID ID = Intrinsic::not_intrinsic; 10351 switch (M4.getZExtValue()) { 10352 default: break; 10353 case 4: ID = Intrinsic::minnum; break; 10354 } 10355 if (ID != Intrinsic::not_intrinsic) { 10356 Function *F = CGM.getIntrinsic(ID, ResultType); 10357 return Builder.CreateCall(F, {X, Y}); 10358 } 10359 switch (BuiltinID) { 10360 case SystemZ::BI__builtin_s390_vfminsb: ID = Intrinsic::s390_vfminsb; break; 10361 case SystemZ::BI__builtin_s390_vfmindb: ID = Intrinsic::s390_vfmindb; break; 10362 default: llvm_unreachable("Unknown BuiltinID"); 10363 } 10364 Function *F = CGM.getIntrinsic(ID); 10365 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 10366 return Builder.CreateCall(F, {X, Y, M4Value}); 10367 } 10368 10369 // Vector intrisincs that output the post-instruction CC value. 10370 10371 #define INTRINSIC_WITH_CC(NAME) \ 10372 case SystemZ::BI__builtin_##NAME: \ 10373 return EmitSystemZIntrinsicWithCC(*this, Intrinsic::NAME, E) 10374 10375 INTRINSIC_WITH_CC(s390_vpkshs); 10376 INTRINSIC_WITH_CC(s390_vpksfs); 10377 INTRINSIC_WITH_CC(s390_vpksgs); 10378 10379 INTRINSIC_WITH_CC(s390_vpklshs); 10380 INTRINSIC_WITH_CC(s390_vpklsfs); 10381 INTRINSIC_WITH_CC(s390_vpklsgs); 10382 10383 INTRINSIC_WITH_CC(s390_vceqbs); 10384 INTRINSIC_WITH_CC(s390_vceqhs); 10385 INTRINSIC_WITH_CC(s390_vceqfs); 10386 INTRINSIC_WITH_CC(s390_vceqgs); 10387 10388 INTRINSIC_WITH_CC(s390_vchbs); 10389 INTRINSIC_WITH_CC(s390_vchhs); 10390 INTRINSIC_WITH_CC(s390_vchfs); 10391 INTRINSIC_WITH_CC(s390_vchgs); 10392 10393 INTRINSIC_WITH_CC(s390_vchlbs); 10394 INTRINSIC_WITH_CC(s390_vchlhs); 10395 INTRINSIC_WITH_CC(s390_vchlfs); 10396 INTRINSIC_WITH_CC(s390_vchlgs); 10397 10398 INTRINSIC_WITH_CC(s390_vfaebs); 10399 INTRINSIC_WITH_CC(s390_vfaehs); 10400 INTRINSIC_WITH_CC(s390_vfaefs); 10401 10402 INTRINSIC_WITH_CC(s390_vfaezbs); 10403 INTRINSIC_WITH_CC(s390_vfaezhs); 10404 INTRINSIC_WITH_CC(s390_vfaezfs); 10405 10406 INTRINSIC_WITH_CC(s390_vfeebs); 10407 INTRINSIC_WITH_CC(s390_vfeehs); 10408 INTRINSIC_WITH_CC(s390_vfeefs); 10409 10410 INTRINSIC_WITH_CC(s390_vfeezbs); 10411 INTRINSIC_WITH_CC(s390_vfeezhs); 10412 INTRINSIC_WITH_CC(s390_vfeezfs); 10413 10414 INTRINSIC_WITH_CC(s390_vfenebs); 10415 INTRINSIC_WITH_CC(s390_vfenehs); 10416 INTRINSIC_WITH_CC(s390_vfenefs); 10417 10418 INTRINSIC_WITH_CC(s390_vfenezbs); 10419 INTRINSIC_WITH_CC(s390_vfenezhs); 10420 INTRINSIC_WITH_CC(s390_vfenezfs); 10421 10422 INTRINSIC_WITH_CC(s390_vistrbs); 10423 INTRINSIC_WITH_CC(s390_vistrhs); 10424 INTRINSIC_WITH_CC(s390_vistrfs); 10425 10426 INTRINSIC_WITH_CC(s390_vstrcbs); 10427 INTRINSIC_WITH_CC(s390_vstrchs); 10428 INTRINSIC_WITH_CC(s390_vstrcfs); 10429 10430 INTRINSIC_WITH_CC(s390_vstrczbs); 10431 INTRINSIC_WITH_CC(s390_vstrczhs); 10432 INTRINSIC_WITH_CC(s390_vstrczfs); 10433 10434 INTRINSIC_WITH_CC(s390_vfcesbs); 10435 INTRINSIC_WITH_CC(s390_vfcedbs); 10436 INTRINSIC_WITH_CC(s390_vfchsbs); 10437 INTRINSIC_WITH_CC(s390_vfchdbs); 10438 INTRINSIC_WITH_CC(s390_vfchesbs); 10439 INTRINSIC_WITH_CC(s390_vfchedbs); 10440 10441 INTRINSIC_WITH_CC(s390_vftcisb); 10442 INTRINSIC_WITH_CC(s390_vftcidb); 10443 10444 #undef INTRINSIC_WITH_CC 10445 10446 default: 10447 return nullptr; 10448 } 10449 } 10450 10451 Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, 10452 const CallExpr *E) { 10453 auto MakeLdg = [&](unsigned IntrinsicID) { 10454 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10455 clang::CharUnits Align = 10456 getNaturalPointeeTypeAlignment(E->getArg(0)->getType()); 10457 return Builder.CreateCall( 10458 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 10459 Ptr->getType()}), 10460 {Ptr, ConstantInt::get(Builder.getInt32Ty(), Align.getQuantity())}); 10461 }; 10462 auto MakeScopedAtomic = [&](unsigned IntrinsicID) { 10463 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10464 return Builder.CreateCall( 10465 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 10466 Ptr->getType()}), 10467 {Ptr, EmitScalarExpr(E->getArg(1))}); 10468 }; 10469 switch (BuiltinID) { 10470 case NVPTX::BI__nvvm_atom_add_gen_i: 10471 case NVPTX::BI__nvvm_atom_add_gen_l: 10472 case NVPTX::BI__nvvm_atom_add_gen_ll: 10473 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Add, E); 10474 10475 case NVPTX::BI__nvvm_atom_sub_gen_i: 10476 case NVPTX::BI__nvvm_atom_sub_gen_l: 10477 case NVPTX::BI__nvvm_atom_sub_gen_ll: 10478 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Sub, E); 10479 10480 case NVPTX::BI__nvvm_atom_and_gen_i: 10481 case NVPTX::BI__nvvm_atom_and_gen_l: 10482 case NVPTX::BI__nvvm_atom_and_gen_ll: 10483 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::And, E); 10484 10485 case NVPTX::BI__nvvm_atom_or_gen_i: 10486 case NVPTX::BI__nvvm_atom_or_gen_l: 10487 case NVPTX::BI__nvvm_atom_or_gen_ll: 10488 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Or, E); 10489 10490 case NVPTX::BI__nvvm_atom_xor_gen_i: 10491 case NVPTX::BI__nvvm_atom_xor_gen_l: 10492 case NVPTX::BI__nvvm_atom_xor_gen_ll: 10493 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xor, E); 10494 10495 case NVPTX::BI__nvvm_atom_xchg_gen_i: 10496 case NVPTX::BI__nvvm_atom_xchg_gen_l: 10497 case NVPTX::BI__nvvm_atom_xchg_gen_ll: 10498 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xchg, E); 10499 10500 case NVPTX::BI__nvvm_atom_max_gen_i: 10501 case NVPTX::BI__nvvm_atom_max_gen_l: 10502 case NVPTX::BI__nvvm_atom_max_gen_ll: 10503 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Max, E); 10504 10505 case NVPTX::BI__nvvm_atom_max_gen_ui: 10506 case NVPTX::BI__nvvm_atom_max_gen_ul: 10507 case NVPTX::BI__nvvm_atom_max_gen_ull: 10508 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMax, E); 10509 10510 case NVPTX::BI__nvvm_atom_min_gen_i: 10511 case NVPTX::BI__nvvm_atom_min_gen_l: 10512 case NVPTX::BI__nvvm_atom_min_gen_ll: 10513 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Min, E); 10514 10515 case NVPTX::BI__nvvm_atom_min_gen_ui: 10516 case NVPTX::BI__nvvm_atom_min_gen_ul: 10517 case NVPTX::BI__nvvm_atom_min_gen_ull: 10518 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMin, E); 10519 10520 case NVPTX::BI__nvvm_atom_cas_gen_i: 10521 case NVPTX::BI__nvvm_atom_cas_gen_l: 10522 case NVPTX::BI__nvvm_atom_cas_gen_ll: 10523 // __nvvm_atom_cas_gen_* should return the old value rather than the 10524 // success flag. 10525 return MakeAtomicCmpXchgValue(*this, E, /*ReturnBool=*/false); 10526 10527 case NVPTX::BI__nvvm_atom_add_gen_f: { 10528 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10529 Value *Val = EmitScalarExpr(E->getArg(1)); 10530 // atomicrmw only deals with integer arguments so we need to use 10531 // LLVM's nvvm_atomic_load_add_f32 intrinsic for that. 10532 Value *FnALAF32 = 10533 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f32, Ptr->getType()); 10534 return Builder.CreateCall(FnALAF32, {Ptr, Val}); 10535 } 10536 10537 case NVPTX::BI__nvvm_atom_add_gen_d: { 10538 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10539 Value *Val = EmitScalarExpr(E->getArg(1)); 10540 // atomicrmw only deals with integer arguments, so we need to use 10541 // LLVM's nvvm_atomic_load_add_f64 intrinsic. 10542 Value *FnALAF64 = 10543 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f64, Ptr->getType()); 10544 return Builder.CreateCall(FnALAF64, {Ptr, Val}); 10545 } 10546 10547 case NVPTX::BI__nvvm_atom_inc_gen_ui: { 10548 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10549 Value *Val = EmitScalarExpr(E->getArg(1)); 10550 Value *FnALI32 = 10551 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_inc_32, Ptr->getType()); 10552 return Builder.CreateCall(FnALI32, {Ptr, Val}); 10553 } 10554 10555 case NVPTX::BI__nvvm_atom_dec_gen_ui: { 10556 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10557 Value *Val = EmitScalarExpr(E->getArg(1)); 10558 Value *FnALD32 = 10559 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_dec_32, Ptr->getType()); 10560 return Builder.CreateCall(FnALD32, {Ptr, Val}); 10561 } 10562 10563 case NVPTX::BI__nvvm_ldg_c: 10564 case NVPTX::BI__nvvm_ldg_c2: 10565 case NVPTX::BI__nvvm_ldg_c4: 10566 case NVPTX::BI__nvvm_ldg_s: 10567 case NVPTX::BI__nvvm_ldg_s2: 10568 case NVPTX::BI__nvvm_ldg_s4: 10569 case NVPTX::BI__nvvm_ldg_i: 10570 case NVPTX::BI__nvvm_ldg_i2: 10571 case NVPTX::BI__nvvm_ldg_i4: 10572 case NVPTX::BI__nvvm_ldg_l: 10573 case NVPTX::BI__nvvm_ldg_ll: 10574 case NVPTX::BI__nvvm_ldg_ll2: 10575 case NVPTX::BI__nvvm_ldg_uc: 10576 case NVPTX::BI__nvvm_ldg_uc2: 10577 case NVPTX::BI__nvvm_ldg_uc4: 10578 case NVPTX::BI__nvvm_ldg_us: 10579 case NVPTX::BI__nvvm_ldg_us2: 10580 case NVPTX::BI__nvvm_ldg_us4: 10581 case NVPTX::BI__nvvm_ldg_ui: 10582 case NVPTX::BI__nvvm_ldg_ui2: 10583 case NVPTX::BI__nvvm_ldg_ui4: 10584 case NVPTX::BI__nvvm_ldg_ul: 10585 case NVPTX::BI__nvvm_ldg_ull: 10586 case NVPTX::BI__nvvm_ldg_ull2: 10587 // PTX Interoperability section 2.2: "For a vector with an even number of 10588 // elements, its alignment is set to number of elements times the alignment 10589 // of its member: n*alignof(t)." 10590 return MakeLdg(Intrinsic::nvvm_ldg_global_i); 10591 case NVPTX::BI__nvvm_ldg_f: 10592 case NVPTX::BI__nvvm_ldg_f2: 10593 case NVPTX::BI__nvvm_ldg_f4: 10594 case NVPTX::BI__nvvm_ldg_d: 10595 case NVPTX::BI__nvvm_ldg_d2: 10596 return MakeLdg(Intrinsic::nvvm_ldg_global_f); 10597 10598 case NVPTX::BI__nvvm_atom_cta_add_gen_i: 10599 case NVPTX::BI__nvvm_atom_cta_add_gen_l: 10600 case NVPTX::BI__nvvm_atom_cta_add_gen_ll: 10601 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_cta); 10602 case NVPTX::BI__nvvm_atom_sys_add_gen_i: 10603 case NVPTX::BI__nvvm_atom_sys_add_gen_l: 10604 case NVPTX::BI__nvvm_atom_sys_add_gen_ll: 10605 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_sys); 10606 case NVPTX::BI__nvvm_atom_cta_add_gen_f: 10607 case NVPTX::BI__nvvm_atom_cta_add_gen_d: 10608 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_cta); 10609 case NVPTX::BI__nvvm_atom_sys_add_gen_f: 10610 case NVPTX::BI__nvvm_atom_sys_add_gen_d: 10611 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_sys); 10612 case NVPTX::BI__nvvm_atom_cta_xchg_gen_i: 10613 case NVPTX::BI__nvvm_atom_cta_xchg_gen_l: 10614 case NVPTX::BI__nvvm_atom_cta_xchg_gen_ll: 10615 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_cta); 10616 case NVPTX::BI__nvvm_atom_sys_xchg_gen_i: 10617 case NVPTX::BI__nvvm_atom_sys_xchg_gen_l: 10618 case NVPTX::BI__nvvm_atom_sys_xchg_gen_ll: 10619 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_sys); 10620 case NVPTX::BI__nvvm_atom_cta_max_gen_i: 10621 case NVPTX::BI__nvvm_atom_cta_max_gen_ui: 10622 case NVPTX::BI__nvvm_atom_cta_max_gen_l: 10623 case NVPTX::BI__nvvm_atom_cta_max_gen_ul: 10624 case NVPTX::BI__nvvm_atom_cta_max_gen_ll: 10625 case NVPTX::BI__nvvm_atom_cta_max_gen_ull: 10626 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_cta); 10627 case NVPTX::BI__nvvm_atom_sys_max_gen_i: 10628 case NVPTX::BI__nvvm_atom_sys_max_gen_ui: 10629 case NVPTX::BI__nvvm_atom_sys_max_gen_l: 10630 case NVPTX::BI__nvvm_atom_sys_max_gen_ul: 10631 case NVPTX::BI__nvvm_atom_sys_max_gen_ll: 10632 case NVPTX::BI__nvvm_atom_sys_max_gen_ull: 10633 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_sys); 10634 case NVPTX::BI__nvvm_atom_cta_min_gen_i: 10635 case NVPTX::BI__nvvm_atom_cta_min_gen_ui: 10636 case NVPTX::BI__nvvm_atom_cta_min_gen_l: 10637 case NVPTX::BI__nvvm_atom_cta_min_gen_ul: 10638 case NVPTX::BI__nvvm_atom_cta_min_gen_ll: 10639 case NVPTX::BI__nvvm_atom_cta_min_gen_ull: 10640 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_cta); 10641 case NVPTX::BI__nvvm_atom_sys_min_gen_i: 10642 case NVPTX::BI__nvvm_atom_sys_min_gen_ui: 10643 case NVPTX::BI__nvvm_atom_sys_min_gen_l: 10644 case NVPTX::BI__nvvm_atom_sys_min_gen_ul: 10645 case NVPTX::BI__nvvm_atom_sys_min_gen_ll: 10646 case NVPTX::BI__nvvm_atom_sys_min_gen_ull: 10647 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_sys); 10648 case NVPTX::BI__nvvm_atom_cta_inc_gen_ui: 10649 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_cta); 10650 case NVPTX::BI__nvvm_atom_cta_dec_gen_ui: 10651 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_cta); 10652 case NVPTX::BI__nvvm_atom_sys_inc_gen_ui: 10653 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_sys); 10654 case NVPTX::BI__nvvm_atom_sys_dec_gen_ui: 10655 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_sys); 10656 case NVPTX::BI__nvvm_atom_cta_and_gen_i: 10657 case NVPTX::BI__nvvm_atom_cta_and_gen_l: 10658 case NVPTX::BI__nvvm_atom_cta_and_gen_ll: 10659 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_cta); 10660 case NVPTX::BI__nvvm_atom_sys_and_gen_i: 10661 case NVPTX::BI__nvvm_atom_sys_and_gen_l: 10662 case NVPTX::BI__nvvm_atom_sys_and_gen_ll: 10663 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_sys); 10664 case NVPTX::BI__nvvm_atom_cta_or_gen_i: 10665 case NVPTX::BI__nvvm_atom_cta_or_gen_l: 10666 case NVPTX::BI__nvvm_atom_cta_or_gen_ll: 10667 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_cta); 10668 case NVPTX::BI__nvvm_atom_sys_or_gen_i: 10669 case NVPTX::BI__nvvm_atom_sys_or_gen_l: 10670 case NVPTX::BI__nvvm_atom_sys_or_gen_ll: 10671 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_sys); 10672 case NVPTX::BI__nvvm_atom_cta_xor_gen_i: 10673 case NVPTX::BI__nvvm_atom_cta_xor_gen_l: 10674 case NVPTX::BI__nvvm_atom_cta_xor_gen_ll: 10675 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_cta); 10676 case NVPTX::BI__nvvm_atom_sys_xor_gen_i: 10677 case NVPTX::BI__nvvm_atom_sys_xor_gen_l: 10678 case NVPTX::BI__nvvm_atom_sys_xor_gen_ll: 10679 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_sys); 10680 case NVPTX::BI__nvvm_atom_cta_cas_gen_i: 10681 case NVPTX::BI__nvvm_atom_cta_cas_gen_l: 10682 case NVPTX::BI__nvvm_atom_cta_cas_gen_ll: { 10683 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10684 return Builder.CreateCall( 10685 CGM.getIntrinsic( 10686 Intrinsic::nvvm_atomic_cas_gen_i_cta, 10687 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 10688 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 10689 } 10690 case NVPTX::BI__nvvm_atom_sys_cas_gen_i: 10691 case NVPTX::BI__nvvm_atom_sys_cas_gen_l: 10692 case NVPTX::BI__nvvm_atom_sys_cas_gen_ll: { 10693 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10694 return Builder.CreateCall( 10695 CGM.getIntrinsic( 10696 Intrinsic::nvvm_atomic_cas_gen_i_sys, 10697 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 10698 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 10699 } 10700 case NVPTX::BI__nvvm_match_all_sync_i32p: 10701 case NVPTX::BI__nvvm_match_all_sync_i64p: { 10702 Value *Mask = EmitScalarExpr(E->getArg(0)); 10703 Value *Val = EmitScalarExpr(E->getArg(1)); 10704 Address PredOutPtr = EmitPointerWithAlignment(E->getArg(2)); 10705 Value *ResultPair = Builder.CreateCall( 10706 CGM.getIntrinsic(BuiltinID == NVPTX::BI__nvvm_match_all_sync_i32p 10707 ? Intrinsic::nvvm_match_all_sync_i32p 10708 : Intrinsic::nvvm_match_all_sync_i64p), 10709 {Mask, Val}); 10710 Value *Pred = Builder.CreateZExt(Builder.CreateExtractValue(ResultPair, 1), 10711 PredOutPtr.getElementType()); 10712 Builder.CreateStore(Pred, PredOutPtr); 10713 return Builder.CreateExtractValue(ResultPair, 0); 10714 } 10715 case NVPTX::BI__hmma_m16n16k16_ld_a: 10716 case NVPTX::BI__hmma_m16n16k16_ld_b: 10717 case NVPTX::BI__hmma_m16n16k16_ld_c_f16: 10718 case NVPTX::BI__hmma_m16n16k16_ld_c_f32: 10719 case NVPTX::BI__hmma_m32n8k16_ld_a: 10720 case NVPTX::BI__hmma_m32n8k16_ld_b: 10721 case NVPTX::BI__hmma_m32n8k16_ld_c_f16: 10722 case NVPTX::BI__hmma_m32n8k16_ld_c_f32: 10723 case NVPTX::BI__hmma_m8n32k16_ld_a: 10724 case NVPTX::BI__hmma_m8n32k16_ld_b: 10725 case NVPTX::BI__hmma_m8n32k16_ld_c_f16: 10726 case NVPTX::BI__hmma_m8n32k16_ld_c_f32: { 10727 Address Dst = EmitPointerWithAlignment(E->getArg(0)); 10728 Value *Src = EmitScalarExpr(E->getArg(1)); 10729 Value *Ldm = EmitScalarExpr(E->getArg(2)); 10730 llvm::APSInt isColMajorArg; 10731 if (!E->getArg(3)->isIntegerConstantExpr(isColMajorArg, getContext())) 10732 return nullptr; 10733 bool isColMajor = isColMajorArg.getSExtValue(); 10734 unsigned IID; 10735 unsigned NumResults; 10736 switch (BuiltinID) { 10737 case NVPTX::BI__hmma_m16n16k16_ld_a: 10738 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_load_a_f16_col_stride 10739 : Intrinsic::nvvm_wmma_m16n16k16_load_a_f16_row_stride; 10740 NumResults = 8; 10741 break; 10742 case NVPTX::BI__hmma_m16n16k16_ld_b: 10743 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_load_b_f16_col_stride 10744 : Intrinsic::nvvm_wmma_m16n16k16_load_b_f16_row_stride; 10745 NumResults = 8; 10746 break; 10747 case NVPTX::BI__hmma_m16n16k16_ld_c_f16: 10748 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_load_c_f16_col_stride 10749 : Intrinsic::nvvm_wmma_m16n16k16_load_c_f16_row_stride; 10750 NumResults = 4; 10751 break; 10752 case NVPTX::BI__hmma_m16n16k16_ld_c_f32: 10753 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_load_c_f32_col_stride 10754 : Intrinsic::nvvm_wmma_m16n16k16_load_c_f32_row_stride; 10755 NumResults = 8; 10756 break; 10757 case NVPTX::BI__hmma_m32n8k16_ld_a: 10758 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_load_a_f16_col_stride 10759 : Intrinsic::nvvm_wmma_m32n8k16_load_a_f16_row_stride; 10760 NumResults = 8; 10761 break; 10762 case NVPTX::BI__hmma_m32n8k16_ld_b: 10763 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_load_b_f16_col_stride 10764 : Intrinsic::nvvm_wmma_m32n8k16_load_b_f16_row_stride; 10765 NumResults = 8; 10766 break; 10767 case NVPTX::BI__hmma_m32n8k16_ld_c_f16: 10768 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_load_c_f16_col_stride 10769 : Intrinsic::nvvm_wmma_m32n8k16_load_c_f16_row_stride; 10770 NumResults = 4; 10771 break; 10772 case NVPTX::BI__hmma_m32n8k16_ld_c_f32: 10773 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_load_c_f32_col_stride 10774 : Intrinsic::nvvm_wmma_m32n8k16_load_c_f32_row_stride; 10775 NumResults = 8; 10776 break; 10777 case NVPTX::BI__hmma_m8n32k16_ld_a: 10778 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_load_a_f16_col_stride 10779 : Intrinsic::nvvm_wmma_m8n32k16_load_a_f16_row_stride; 10780 NumResults = 8; 10781 break; 10782 case NVPTX::BI__hmma_m8n32k16_ld_b: 10783 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_load_b_f16_col_stride 10784 : Intrinsic::nvvm_wmma_m8n32k16_load_b_f16_row_stride; 10785 NumResults = 8; 10786 break; 10787 case NVPTX::BI__hmma_m8n32k16_ld_c_f16: 10788 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_load_c_f16_col_stride 10789 : Intrinsic::nvvm_wmma_m8n32k16_load_c_f16_row_stride; 10790 NumResults = 4; 10791 break; 10792 case NVPTX::BI__hmma_m8n32k16_ld_c_f32: 10793 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_load_c_f32_col_stride 10794 : Intrinsic::nvvm_wmma_m8n32k16_load_c_f32_row_stride; 10795 NumResults = 8; 10796 break; 10797 default: 10798 llvm_unreachable("Unexpected builtin ID."); 10799 } 10800 Value *Result = 10801 Builder.CreateCall(CGM.getIntrinsic(IID, Src->getType()), {Src, Ldm}); 10802 10803 // Save returned values. 10804 for (unsigned i = 0; i < NumResults; ++i) { 10805 Builder.CreateAlignedStore( 10806 Builder.CreateBitCast(Builder.CreateExtractValue(Result, i), 10807 Dst.getElementType()), 10808 Builder.CreateGEP(Dst.getPointer(), llvm::ConstantInt::get(IntTy, i)), 10809 CharUnits::fromQuantity(4)); 10810 } 10811 return Result; 10812 } 10813 10814 case NVPTX::BI__hmma_m16n16k16_st_c_f16: 10815 case NVPTX::BI__hmma_m16n16k16_st_c_f32: 10816 case NVPTX::BI__hmma_m32n8k16_st_c_f16: 10817 case NVPTX::BI__hmma_m32n8k16_st_c_f32: 10818 case NVPTX::BI__hmma_m8n32k16_st_c_f16: 10819 case NVPTX::BI__hmma_m8n32k16_st_c_f32: { 10820 Value *Dst = EmitScalarExpr(E->getArg(0)); 10821 Address Src = EmitPointerWithAlignment(E->getArg(1)); 10822 Value *Ldm = EmitScalarExpr(E->getArg(2)); 10823 llvm::APSInt isColMajorArg; 10824 if (!E->getArg(3)->isIntegerConstantExpr(isColMajorArg, getContext())) 10825 return nullptr; 10826 bool isColMajor = isColMajorArg.getSExtValue(); 10827 unsigned IID; 10828 unsigned NumResults = 8; 10829 // PTX Instructions (and LLVM instrinsics) are defined for slice _d_, yet 10830 // for some reason nvcc builtins use _c_. 10831 switch (BuiltinID) { 10832 case NVPTX::BI__hmma_m16n16k16_st_c_f16: 10833 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_store_d_f16_col_stride 10834 : Intrinsic::nvvm_wmma_m16n16k16_store_d_f16_row_stride; 10835 NumResults = 4; 10836 break; 10837 case NVPTX::BI__hmma_m16n16k16_st_c_f32: 10838 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_store_d_f32_col_stride 10839 : Intrinsic::nvvm_wmma_m16n16k16_store_d_f32_row_stride; 10840 break; 10841 case NVPTX::BI__hmma_m32n8k16_st_c_f16: 10842 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_store_d_f16_col_stride 10843 : Intrinsic::nvvm_wmma_m32n8k16_store_d_f16_row_stride; 10844 NumResults = 4; 10845 break; 10846 case NVPTX::BI__hmma_m32n8k16_st_c_f32: 10847 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_store_d_f32_col_stride 10848 : Intrinsic::nvvm_wmma_m32n8k16_store_d_f32_row_stride; 10849 break; 10850 case NVPTX::BI__hmma_m8n32k16_st_c_f16: 10851 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_store_d_f16_col_stride 10852 : Intrinsic::nvvm_wmma_m8n32k16_store_d_f16_row_stride; 10853 NumResults = 4; 10854 break; 10855 case NVPTX::BI__hmma_m8n32k16_st_c_f32: 10856 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_store_d_f32_col_stride 10857 : Intrinsic::nvvm_wmma_m8n32k16_store_d_f32_row_stride; 10858 break; 10859 default: 10860 llvm_unreachable("Unexpected builtin ID."); 10861 } 10862 Function *Intrinsic = CGM.getIntrinsic(IID, Dst->getType()); 10863 llvm::Type *ParamType = Intrinsic->getFunctionType()->getParamType(1); 10864 SmallVector<Value *, 10> Values = {Dst}; 10865 for (unsigned i = 0; i < NumResults; ++i) { 10866 Value *V = Builder.CreateAlignedLoad( 10867 Builder.CreateGEP(Src.getPointer(), llvm::ConstantInt::get(IntTy, i)), 10868 CharUnits::fromQuantity(4)); 10869 Values.push_back(Builder.CreateBitCast(V, ParamType)); 10870 } 10871 Values.push_back(Ldm); 10872 Value *Result = Builder.CreateCall(Intrinsic, Values); 10873 return Result; 10874 } 10875 10876 // BI__hmma_m16n16k16_mma_<Dtype><CType>(d, a, b, c, layout, satf) --> 10877 // Intrinsic::nvvm_wmma_m16n16k16_mma_sync<layout A,B><DType><CType><Satf> 10878 case NVPTX::BI__hmma_m16n16k16_mma_f16f16: 10879 case NVPTX::BI__hmma_m16n16k16_mma_f32f16: 10880 case NVPTX::BI__hmma_m16n16k16_mma_f32f32: 10881 case NVPTX::BI__hmma_m16n16k16_mma_f16f32: 10882 case NVPTX::BI__hmma_m32n8k16_mma_f16f16: 10883 case NVPTX::BI__hmma_m32n8k16_mma_f32f16: 10884 case NVPTX::BI__hmma_m32n8k16_mma_f32f32: 10885 case NVPTX::BI__hmma_m32n8k16_mma_f16f32: 10886 case NVPTX::BI__hmma_m8n32k16_mma_f16f16: 10887 case NVPTX::BI__hmma_m8n32k16_mma_f32f16: 10888 case NVPTX::BI__hmma_m8n32k16_mma_f32f32: 10889 case NVPTX::BI__hmma_m8n32k16_mma_f16f32: { 10890 Address Dst = EmitPointerWithAlignment(E->getArg(0)); 10891 Address SrcA = EmitPointerWithAlignment(E->getArg(1)); 10892 Address SrcB = EmitPointerWithAlignment(E->getArg(2)); 10893 Address SrcC = EmitPointerWithAlignment(E->getArg(3)); 10894 llvm::APSInt LayoutArg; 10895 if (!E->getArg(4)->isIntegerConstantExpr(LayoutArg, getContext())) 10896 return nullptr; 10897 int Layout = LayoutArg.getSExtValue(); 10898 if (Layout < 0 || Layout > 3) 10899 return nullptr; 10900 llvm::APSInt SatfArg; 10901 if (!E->getArg(5)->isIntegerConstantExpr(SatfArg, getContext())) 10902 return nullptr; 10903 bool Satf = SatfArg.getSExtValue(); 10904 10905 // clang-format off 10906 #define MMA_VARIANTS(geom, type) {{ \ 10907 Intrinsic::nvvm_wmma_##geom##_mma_row_row_##type, \ 10908 Intrinsic::nvvm_wmma_##geom##_mma_row_row_##type##_satfinite, \ 10909 Intrinsic::nvvm_wmma_##geom##_mma_row_col_##type, \ 10910 Intrinsic::nvvm_wmma_##geom##_mma_row_col_##type##_satfinite, \ 10911 Intrinsic::nvvm_wmma_##geom##_mma_col_row_##type, \ 10912 Intrinsic::nvvm_wmma_##geom##_mma_col_row_##type##_satfinite, \ 10913 Intrinsic::nvvm_wmma_##geom##_mma_col_col_##type, \ 10914 Intrinsic::nvvm_wmma_##geom##_mma_col_col_##type##_satfinite \ 10915 }} 10916 // clang-format on 10917 10918 auto getMMAIntrinsic = [Layout, Satf](std::array<unsigned, 8> Variants) { 10919 unsigned Index = Layout * 2 + Satf; 10920 assert(Index < 8); 10921 return Variants[Index]; 10922 }; 10923 unsigned IID; 10924 unsigned NumEltsC; 10925 unsigned NumEltsD; 10926 switch (BuiltinID) { 10927 case NVPTX::BI__hmma_m16n16k16_mma_f16f16: 10928 IID = getMMAIntrinsic(MMA_VARIANTS(m16n16k16, f16_f16)); 10929 NumEltsC = 4; 10930 NumEltsD = 4; 10931 break; 10932 case NVPTX::BI__hmma_m16n16k16_mma_f32f16: 10933 IID = getMMAIntrinsic(MMA_VARIANTS(m16n16k16, f32_f16)); 10934 NumEltsC = 4; 10935 NumEltsD = 8; 10936 break; 10937 case NVPTX::BI__hmma_m16n16k16_mma_f16f32: 10938 IID = getMMAIntrinsic(MMA_VARIANTS(m16n16k16, f16_f32)); 10939 NumEltsC = 8; 10940 NumEltsD = 4; 10941 break; 10942 case NVPTX::BI__hmma_m16n16k16_mma_f32f32: 10943 IID = getMMAIntrinsic(MMA_VARIANTS(m16n16k16, f32_f32)); 10944 NumEltsC = 8; 10945 NumEltsD = 8; 10946 break; 10947 case NVPTX::BI__hmma_m32n8k16_mma_f16f16: 10948 IID = getMMAIntrinsic(MMA_VARIANTS(m32n8k16, f16_f16)); 10949 NumEltsC = 4; 10950 NumEltsD = 4; 10951 break; 10952 case NVPTX::BI__hmma_m32n8k16_mma_f32f16: 10953 IID = getMMAIntrinsic(MMA_VARIANTS(m32n8k16, f32_f16)); 10954 NumEltsC = 4; 10955 NumEltsD = 8; 10956 break; 10957 case NVPTX::BI__hmma_m32n8k16_mma_f16f32: 10958 IID = getMMAIntrinsic(MMA_VARIANTS(m32n8k16, f16_f32)); 10959 NumEltsC = 8; 10960 NumEltsD = 4; 10961 break; 10962 case NVPTX::BI__hmma_m32n8k16_mma_f32f32: 10963 IID = getMMAIntrinsic(MMA_VARIANTS(m32n8k16, f32_f32)); 10964 NumEltsC = 8; 10965 NumEltsD = 8; 10966 break; 10967 case NVPTX::BI__hmma_m8n32k16_mma_f16f16: 10968 IID = getMMAIntrinsic(MMA_VARIANTS(m8n32k16, f16_f16)); 10969 NumEltsC = 4; 10970 NumEltsD = 4; 10971 break; 10972 case NVPTX::BI__hmma_m8n32k16_mma_f32f16: 10973 IID = getMMAIntrinsic(MMA_VARIANTS(m8n32k16, f32_f16)); 10974 NumEltsC = 4; 10975 NumEltsD = 8; 10976 break; 10977 case NVPTX::BI__hmma_m8n32k16_mma_f16f32: 10978 IID = getMMAIntrinsic(MMA_VARIANTS(m8n32k16, f16_f32)); 10979 NumEltsC = 8; 10980 NumEltsD = 4; 10981 break; 10982 case NVPTX::BI__hmma_m8n32k16_mma_f32f32: 10983 IID = getMMAIntrinsic(MMA_VARIANTS(m8n32k16, f32_f32)); 10984 NumEltsC = 8; 10985 NumEltsD = 8; 10986 break; 10987 default: 10988 llvm_unreachable("Unexpected builtin ID."); 10989 } 10990 #undef MMA_VARIANTS 10991 10992 SmallVector<Value *, 24> Values; 10993 Function *Intrinsic = CGM.getIntrinsic(IID); 10994 llvm::Type *ABType = Intrinsic->getFunctionType()->getParamType(0); 10995 // Load A 10996 for (unsigned i = 0; i < 8; ++i) { 10997 Value *V = Builder.CreateAlignedLoad( 10998 Builder.CreateGEP(SrcA.getPointer(), 10999 llvm::ConstantInt::get(IntTy, i)), 11000 CharUnits::fromQuantity(4)); 11001 Values.push_back(Builder.CreateBitCast(V, ABType)); 11002 } 11003 // Load B 11004 for (unsigned i = 0; i < 8; ++i) { 11005 Value *V = Builder.CreateAlignedLoad( 11006 Builder.CreateGEP(SrcB.getPointer(), 11007 llvm::ConstantInt::get(IntTy, i)), 11008 CharUnits::fromQuantity(4)); 11009 Values.push_back(Builder.CreateBitCast(V, ABType)); 11010 } 11011 // Load C 11012 llvm::Type *CType = Intrinsic->getFunctionType()->getParamType(16); 11013 for (unsigned i = 0; i < NumEltsC; ++i) { 11014 Value *V = Builder.CreateAlignedLoad( 11015 Builder.CreateGEP(SrcC.getPointer(), 11016 llvm::ConstantInt::get(IntTy, i)), 11017 CharUnits::fromQuantity(4)); 11018 Values.push_back(Builder.CreateBitCast(V, CType)); 11019 } 11020 Value *Result = Builder.CreateCall(Intrinsic, Values); 11021 llvm::Type *DType = Dst.getElementType(); 11022 for (unsigned i = 0; i < NumEltsD; ++i) 11023 Builder.CreateAlignedStore( 11024 Builder.CreateBitCast(Builder.CreateExtractValue(Result, i), DType), 11025 Builder.CreateGEP(Dst.getPointer(), llvm::ConstantInt::get(IntTy, i)), 11026 CharUnits::fromQuantity(4)); 11027 return Result; 11028 } 11029 default: 11030 return nullptr; 11031 } 11032 } 11033 11034 Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, 11035 const CallExpr *E) { 11036 switch (BuiltinID) { 11037 case WebAssembly::BI__builtin_wasm_mem_size: { 11038 llvm::Type *ResultType = ConvertType(E->getType()); 11039 Value *I = EmitScalarExpr(E->getArg(0)); 11040 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_mem_size, ResultType); 11041 return Builder.CreateCall(Callee, I); 11042 } 11043 case WebAssembly::BI__builtin_wasm_mem_grow: { 11044 llvm::Type *ResultType = ConvertType(E->getType()); 11045 Value *Args[] = { 11046 EmitScalarExpr(E->getArg(0)), 11047 EmitScalarExpr(E->getArg(1)) 11048 }; 11049 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_mem_grow, ResultType); 11050 return Builder.CreateCall(Callee, Args); 11051 } 11052 case WebAssembly::BI__builtin_wasm_current_memory: { 11053 llvm::Type *ResultType = ConvertType(E->getType()); 11054 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_current_memory, ResultType); 11055 return Builder.CreateCall(Callee); 11056 } 11057 case WebAssembly::BI__builtin_wasm_grow_memory: { 11058 Value *X = EmitScalarExpr(E->getArg(0)); 11059 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_grow_memory, X->getType()); 11060 return Builder.CreateCall(Callee, X); 11061 } 11062 case WebAssembly::BI__builtin_wasm_throw: { 11063 Value *Tag = EmitScalarExpr(E->getArg(0)); 11064 Value *Obj = EmitScalarExpr(E->getArg(1)); 11065 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_throw); 11066 return Builder.CreateCall(Callee, {Tag, Obj}); 11067 } 11068 case WebAssembly::BI__builtin_wasm_rethrow: { 11069 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_rethrow); 11070 return Builder.CreateCall(Callee); 11071 } 11072 11073 default: 11074 return nullptr; 11075 } 11076 } 11077 11078 Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, 11079 const CallExpr *E) { 11080 SmallVector<llvm::Value *, 4> Ops; 11081 Intrinsic::ID ID = Intrinsic::not_intrinsic; 11082 11083 auto MakeCircLd = [&](unsigned IntID, bool HasImm) { 11084 // The base pointer is passed by address, so it needs to be loaded. 11085 Address BP = EmitPointerWithAlignment(E->getArg(0)); 11086 BP = Address(Builder.CreateBitCast(BP.getPointer(), Int8PtrPtrTy), 11087 BP.getAlignment()); 11088 llvm::Value *Base = Builder.CreateLoad(BP); 11089 // Operands are Base, Increment, Modifier, Start. 11090 if (HasImm) 11091 Ops = { Base, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2)), 11092 EmitScalarExpr(E->getArg(3)) }; 11093 else 11094 Ops = { Base, EmitScalarExpr(E->getArg(1)), 11095 EmitScalarExpr(E->getArg(2)) }; 11096 11097 llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops); 11098 llvm::Value *NewBase = Builder.CreateExtractValue(Result, 1); 11099 llvm::Value *LV = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), 11100 NewBase->getType()->getPointerTo()); 11101 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 11102 // The intrinsic generates two results. The new value for the base pointer 11103 // needs to be stored. 11104 Builder.CreateAlignedStore(NewBase, LV, Dest.getAlignment()); 11105 return Builder.CreateExtractValue(Result, 0); 11106 }; 11107 11108 auto MakeCircSt = [&](unsigned IntID, bool HasImm) { 11109 // The base pointer is passed by address, so it needs to be loaded. 11110 Address BP = EmitPointerWithAlignment(E->getArg(0)); 11111 BP = Address(Builder.CreateBitCast(BP.getPointer(), Int8PtrPtrTy), 11112 BP.getAlignment()); 11113 llvm::Value *Base = Builder.CreateLoad(BP); 11114 // Operands are Base, Increment, Modifier, Value, Start. 11115 if (HasImm) 11116 Ops = { Base, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2)), 11117 EmitScalarExpr(E->getArg(3)), EmitScalarExpr(E->getArg(4)) }; 11118 else 11119 Ops = { Base, EmitScalarExpr(E->getArg(1)), 11120 EmitScalarExpr(E->getArg(2)), EmitScalarExpr(E->getArg(3)) }; 11121 11122 llvm::Value *NewBase = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops); 11123 llvm::Value *LV = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), 11124 NewBase->getType()->getPointerTo()); 11125 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 11126 // The intrinsic generates one result, which is the new value for the base 11127 // pointer. It needs to be stored. 11128 return Builder.CreateAlignedStore(NewBase, LV, Dest.getAlignment()); 11129 }; 11130 11131 // Handle the conversion of bit-reverse load intrinsics to bit code. 11132 // The intrinsic call after this function only reads from memory and the 11133 // write to memory is dealt by the store instruction. 11134 auto MakeBrevLd = [&](unsigned IntID, llvm::Type *DestTy) { 11135 // The intrinsic generates one result, which is the new value for the base 11136 // pointer. It needs to be returned. The result of the load instruction is 11137 // passed to intrinsic by address, so the value needs to be stored. 11138 llvm::Value *BaseAddress = 11139 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int8PtrTy); 11140 11141 // Expressions like &(*pt++) will be incremented per evaluation. 11142 // EmitPointerWithAlignment and EmitScalarExpr evaluates the expression 11143 // per call. 11144 Address DestAddr = EmitPointerWithAlignment(E->getArg(1)); 11145 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), Int8PtrTy), 11146 DestAddr.getAlignment()); 11147 llvm::Value *DestAddress = DestAddr.getPointer(); 11148 11149 // Operands are Base, Dest, Modifier. 11150 // The intrinsic format in LLVM IR is defined as 11151 // { ValueType, i8* } (i8*, i32). 11152 Ops = {BaseAddress, EmitScalarExpr(E->getArg(2))}; 11153 11154 llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops); 11155 // The value needs to be stored as the variable is passed by reference. 11156 llvm::Value *DestVal = Builder.CreateExtractValue(Result, 0); 11157 11158 // The store needs to be truncated to fit the destination type. 11159 // While i32 and i64 are natively supported on Hexagon, i8 and i16 needs 11160 // to be handled with stores of respective destination type. 11161 DestVal = Builder.CreateTrunc(DestVal, DestTy); 11162 11163 llvm::Value *DestForStore = 11164 Builder.CreateBitCast(DestAddress, DestVal->getType()->getPointerTo()); 11165 Builder.CreateAlignedStore(DestVal, DestForStore, DestAddr.getAlignment()); 11166 // The updated value of the base pointer is returned. 11167 return Builder.CreateExtractValue(Result, 1); 11168 }; 11169 11170 switch (BuiltinID) { 11171 case Hexagon::BI__builtin_HEXAGON_V6_vaddcarry: 11172 case Hexagon::BI__builtin_HEXAGON_V6_vaddcarry_128B: { 11173 Address Dest = EmitPointerWithAlignment(E->getArg(2)); 11174 unsigned Size; 11175 if (BuiltinID == Hexagon::BI__builtin_HEXAGON_V6_vaddcarry) { 11176 Size = 512; 11177 ID = Intrinsic::hexagon_V6_vaddcarry; 11178 } else { 11179 Size = 1024; 11180 ID = Intrinsic::hexagon_V6_vaddcarry_128B; 11181 } 11182 Dest = Builder.CreateBitCast(Dest, 11183 llvm::VectorType::get(Builder.getInt1Ty(), Size)->getPointerTo(0)); 11184 LoadInst *QLd = Builder.CreateLoad(Dest); 11185 Ops = { EmitScalarExpr(E->getArg(0)), EmitScalarExpr(E->getArg(1)), QLd }; 11186 llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 11187 llvm::Value *Vprd = Builder.CreateExtractValue(Result, 1); 11188 llvm::Value *Base = Builder.CreateBitCast(EmitScalarExpr(E->getArg(2)), 11189 Vprd->getType()->getPointerTo(0)); 11190 Builder.CreateAlignedStore(Vprd, Base, Dest.getAlignment()); 11191 return Builder.CreateExtractValue(Result, 0); 11192 } 11193 case Hexagon::BI__builtin_HEXAGON_V6_vsubcarry: 11194 case Hexagon::BI__builtin_HEXAGON_V6_vsubcarry_128B: { 11195 Address Dest = EmitPointerWithAlignment(E->getArg(2)); 11196 unsigned Size; 11197 if (BuiltinID == Hexagon::BI__builtin_HEXAGON_V6_vsubcarry) { 11198 Size = 512; 11199 ID = Intrinsic::hexagon_V6_vsubcarry; 11200 } else { 11201 Size = 1024; 11202 ID = Intrinsic::hexagon_V6_vsubcarry_128B; 11203 } 11204 Dest = Builder.CreateBitCast(Dest, 11205 llvm::VectorType::get(Builder.getInt1Ty(), Size)->getPointerTo(0)); 11206 LoadInst *QLd = Builder.CreateLoad(Dest); 11207 Ops = { EmitScalarExpr(E->getArg(0)), EmitScalarExpr(E->getArg(1)), QLd }; 11208 llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 11209 llvm::Value *Vprd = Builder.CreateExtractValue(Result, 1); 11210 llvm::Value *Base = Builder.CreateBitCast(EmitScalarExpr(E->getArg(2)), 11211 Vprd->getType()->getPointerTo(0)); 11212 Builder.CreateAlignedStore(Vprd, Base, Dest.getAlignment()); 11213 return Builder.CreateExtractValue(Result, 0); 11214 } 11215 case Hexagon::BI__builtin_HEXAGON_L2_loadrub_pci: 11216 return MakeCircLd(Intrinsic::hexagon_L2_loadrub_pci, /*HasImm*/true); 11217 case Hexagon::BI__builtin_HEXAGON_L2_loadrb_pci: 11218 return MakeCircLd(Intrinsic::hexagon_L2_loadrb_pci, /*HasImm*/true); 11219 case Hexagon::BI__builtin_HEXAGON_L2_loadruh_pci: 11220 return MakeCircLd(Intrinsic::hexagon_L2_loadruh_pci, /*HasImm*/true); 11221 case Hexagon::BI__builtin_HEXAGON_L2_loadrh_pci: 11222 return MakeCircLd(Intrinsic::hexagon_L2_loadrh_pci, /*HasImm*/true); 11223 case Hexagon::BI__builtin_HEXAGON_L2_loadri_pci: 11224 return MakeCircLd(Intrinsic::hexagon_L2_loadri_pci, /*HasImm*/true); 11225 case Hexagon::BI__builtin_HEXAGON_L2_loadrd_pci: 11226 return MakeCircLd(Intrinsic::hexagon_L2_loadrd_pci, /*HasImm*/true); 11227 case Hexagon::BI__builtin_HEXAGON_L2_loadrub_pcr: 11228 return MakeCircLd(Intrinsic::hexagon_L2_loadrub_pcr, /*HasImm*/false); 11229 case Hexagon::BI__builtin_HEXAGON_L2_loadrb_pcr: 11230 return MakeCircLd(Intrinsic::hexagon_L2_loadrb_pcr, /*HasImm*/false); 11231 case Hexagon::BI__builtin_HEXAGON_L2_loadruh_pcr: 11232 return MakeCircLd(Intrinsic::hexagon_L2_loadruh_pcr, /*HasImm*/false); 11233 case Hexagon::BI__builtin_HEXAGON_L2_loadrh_pcr: 11234 return MakeCircLd(Intrinsic::hexagon_L2_loadrh_pcr, /*HasImm*/false); 11235 case Hexagon::BI__builtin_HEXAGON_L2_loadri_pcr: 11236 return MakeCircLd(Intrinsic::hexagon_L2_loadri_pcr, /*HasImm*/false); 11237 case Hexagon::BI__builtin_HEXAGON_L2_loadrd_pcr: 11238 return MakeCircLd(Intrinsic::hexagon_L2_loadrd_pcr, /*HasImm*/false); 11239 case Hexagon::BI__builtin_HEXAGON_S2_storerb_pci: 11240 return MakeCircSt(Intrinsic::hexagon_S2_storerb_pci, /*HasImm*/true); 11241 case Hexagon::BI__builtin_HEXAGON_S2_storerh_pci: 11242 return MakeCircSt(Intrinsic::hexagon_S2_storerh_pci, /*HasImm*/true); 11243 case Hexagon::BI__builtin_HEXAGON_S2_storerf_pci: 11244 return MakeCircSt(Intrinsic::hexagon_S2_storerf_pci, /*HasImm*/true); 11245 case Hexagon::BI__builtin_HEXAGON_S2_storeri_pci: 11246 return MakeCircSt(Intrinsic::hexagon_S2_storeri_pci, /*HasImm*/true); 11247 case Hexagon::BI__builtin_HEXAGON_S2_storerd_pci: 11248 return MakeCircSt(Intrinsic::hexagon_S2_storerd_pci, /*HasImm*/true); 11249 case Hexagon::BI__builtin_HEXAGON_S2_storerb_pcr: 11250 return MakeCircSt(Intrinsic::hexagon_S2_storerb_pcr, /*HasImm*/false); 11251 case Hexagon::BI__builtin_HEXAGON_S2_storerh_pcr: 11252 return MakeCircSt(Intrinsic::hexagon_S2_storerh_pcr, /*HasImm*/false); 11253 case Hexagon::BI__builtin_HEXAGON_S2_storerf_pcr: 11254 return MakeCircSt(Intrinsic::hexagon_S2_storerf_pcr, /*HasImm*/false); 11255 case Hexagon::BI__builtin_HEXAGON_S2_storeri_pcr: 11256 return MakeCircSt(Intrinsic::hexagon_S2_storeri_pcr, /*HasImm*/false); 11257 case Hexagon::BI__builtin_HEXAGON_S2_storerd_pcr: 11258 return MakeCircSt(Intrinsic::hexagon_S2_storerd_pcr, /*HasImm*/false); 11259 case Hexagon::BI__builtin_brev_ldub: 11260 return MakeBrevLd(Intrinsic::hexagon_L2_loadrub_pbr, Int8Ty); 11261 case Hexagon::BI__builtin_brev_ldb: 11262 return MakeBrevLd(Intrinsic::hexagon_L2_loadrb_pbr, Int8Ty); 11263 case Hexagon::BI__builtin_brev_lduh: 11264 return MakeBrevLd(Intrinsic::hexagon_L2_loadruh_pbr, Int16Ty); 11265 case Hexagon::BI__builtin_brev_ldh: 11266 return MakeBrevLd(Intrinsic::hexagon_L2_loadrh_pbr, Int16Ty); 11267 case Hexagon::BI__builtin_brev_ldw: 11268 return MakeBrevLd(Intrinsic::hexagon_L2_loadri_pbr, Int32Ty); 11269 case Hexagon::BI__builtin_brev_ldd: 11270 return MakeBrevLd(Intrinsic::hexagon_L2_loadrd_pbr, Int64Ty); 11271 default: 11272 break; 11273 } // switch 11274 11275 return nullptr; 11276 } 11277