1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This contains code to emit Builtin calls as LLVM code. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "CodeGenFunction.h" 15 #include "CGCXXABI.h" 16 #include "CGObjCRuntime.h" 17 #include "CodeGenModule.h" 18 #include "TargetInfo.h" 19 #include "clang/AST/ASTContext.h" 20 #include "clang/AST/Decl.h" 21 #include "clang/Basic/TargetBuiltins.h" 22 #include "clang/Basic/TargetInfo.h" 23 #include "clang/CodeGen/CGFunctionInfo.h" 24 #include "llvm/ADT/StringExtras.h" 25 #include "llvm/IR/CallSite.h" 26 #include "llvm/IR/DataLayout.h" 27 #include "llvm/IR/InlineAsm.h" 28 #include "llvm/IR/Intrinsics.h" 29 #include <sstream> 30 31 using namespace clang; 32 using namespace CodeGen; 33 using namespace llvm; 34 35 /// getBuiltinLibFunction - Given a builtin id for a function like 36 /// "__builtin_fabsf", return a Function* for "fabsf". 37 llvm::Value *CodeGenModule::getBuiltinLibFunction(const FunctionDecl *FD, 38 unsigned BuiltinID) { 39 assert(Context.BuiltinInfo.isLibFunction(BuiltinID)); 40 41 // Get the name, skip over the __builtin_ prefix (if necessary). 42 StringRef Name; 43 GlobalDecl D(FD); 44 45 // If the builtin has been declared explicitly with an assembler label, 46 // use the mangled name. This differs from the plain label on platforms 47 // that prefix labels. 48 if (FD->hasAttr<AsmLabelAttr>()) 49 Name = getMangledName(D); 50 else 51 Name = Context.BuiltinInfo.getName(BuiltinID) + 10; 52 53 llvm::FunctionType *Ty = 54 cast<llvm::FunctionType>(getTypes().ConvertType(FD->getType())); 55 56 return GetOrCreateLLVMFunction(Name, Ty, D, /*ForVTable=*/false); 57 } 58 59 /// Emit the conversions required to turn the given value into an 60 /// integer of the given size. 61 static Value *EmitToInt(CodeGenFunction &CGF, llvm::Value *V, 62 QualType T, llvm::IntegerType *IntType) { 63 V = CGF.EmitToMemory(V, T); 64 65 if (V->getType()->isPointerTy()) 66 return CGF.Builder.CreatePtrToInt(V, IntType); 67 68 assert(V->getType() == IntType); 69 return V; 70 } 71 72 static Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V, 73 QualType T, llvm::Type *ResultType) { 74 V = CGF.EmitFromMemory(V, T); 75 76 if (ResultType->isPointerTy()) 77 return CGF.Builder.CreateIntToPtr(V, ResultType); 78 79 assert(V->getType() == ResultType); 80 return V; 81 } 82 83 /// Utility to insert an atomic instruction based on Instrinsic::ID 84 /// and the expression node. 85 static Value *MakeBinaryAtomicValue(CodeGenFunction &CGF, 86 llvm::AtomicRMWInst::BinOp Kind, 87 const CallExpr *E) { 88 QualType T = E->getType(); 89 assert(E->getArg(0)->getType()->isPointerType()); 90 assert(CGF.getContext().hasSameUnqualifiedType(T, 91 E->getArg(0)->getType()->getPointeeType())); 92 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 93 94 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 95 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 96 97 llvm::IntegerType *IntType = 98 llvm::IntegerType::get(CGF.getLLVMContext(), 99 CGF.getContext().getTypeSize(T)); 100 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 101 102 llvm::Value *Args[2]; 103 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 104 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 105 llvm::Type *ValueType = Args[1]->getType(); 106 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 107 108 llvm::Value *Result = 109 CGF.Builder.CreateAtomicRMW(Kind, Args[0], Args[1], 110 llvm::SequentiallyConsistent); 111 return EmitFromInt(CGF, Result, T, ValueType); 112 } 113 114 static Value *EmitNontemporalStore(CodeGenFunction &CGF, const CallExpr *E) { 115 Value *Val = CGF.EmitScalarExpr(E->getArg(0)); 116 Value *Address = CGF.EmitScalarExpr(E->getArg(1)); 117 118 // Convert the type of the pointer to a pointer to the stored type. 119 Val = CGF.EmitToMemory(Val, E->getArg(0)->getType()); 120 Value *BC = CGF.Builder.CreateBitCast( 121 Address, llvm::PointerType::getUnqual(Val->getType()), "cast"); 122 LValue LV = CGF.MakeNaturalAlignAddrLValue(BC, E->getArg(0)->getType()); 123 LV.setNontemporal(true); 124 CGF.EmitStoreOfScalar(Val, LV, false); 125 return nullptr; 126 } 127 128 static Value *EmitNontemporalLoad(CodeGenFunction &CGF, const CallExpr *E) { 129 Value *Address = CGF.EmitScalarExpr(E->getArg(0)); 130 131 LValue LV = CGF.MakeNaturalAlignAddrLValue(Address, E->getType()); 132 LV.setNontemporal(true); 133 return CGF.EmitLoadOfScalar(LV, E->getExprLoc()); 134 } 135 136 static RValue EmitBinaryAtomic(CodeGenFunction &CGF, 137 llvm::AtomicRMWInst::BinOp Kind, 138 const CallExpr *E) { 139 return RValue::get(MakeBinaryAtomicValue(CGF, Kind, E)); 140 } 141 142 /// Utility to insert an atomic instruction based Instrinsic::ID and 143 /// the expression node, where the return value is the result of the 144 /// operation. 145 static RValue EmitBinaryAtomicPost(CodeGenFunction &CGF, 146 llvm::AtomicRMWInst::BinOp Kind, 147 const CallExpr *E, 148 Instruction::BinaryOps Op, 149 bool Invert = false) { 150 QualType T = E->getType(); 151 assert(E->getArg(0)->getType()->isPointerType()); 152 assert(CGF.getContext().hasSameUnqualifiedType(T, 153 E->getArg(0)->getType()->getPointeeType())); 154 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 155 156 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 157 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 158 159 llvm::IntegerType *IntType = 160 llvm::IntegerType::get(CGF.getLLVMContext(), 161 CGF.getContext().getTypeSize(T)); 162 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 163 164 llvm::Value *Args[2]; 165 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 166 llvm::Type *ValueType = Args[1]->getType(); 167 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 168 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 169 170 llvm::Value *Result = 171 CGF.Builder.CreateAtomicRMW(Kind, Args[0], Args[1], 172 llvm::SequentiallyConsistent); 173 Result = CGF.Builder.CreateBinOp(Op, Result, Args[1]); 174 if (Invert) 175 Result = CGF.Builder.CreateBinOp(llvm::Instruction::Xor, Result, 176 llvm::ConstantInt::get(IntType, -1)); 177 Result = EmitFromInt(CGF, Result, T, ValueType); 178 return RValue::get(Result); 179 } 180 181 /// @brief Utility to insert an atomic cmpxchg instruction. 182 /// 183 /// @param CGF The current codegen function. 184 /// @param E Builtin call expression to convert to cmpxchg. 185 /// arg0 - address to operate on 186 /// arg1 - value to compare with 187 /// arg2 - new value 188 /// @param ReturnBool Specifies whether to return success flag of 189 /// cmpxchg result or the old value. 190 /// 191 /// @returns result of cmpxchg, according to ReturnBool 192 static Value *MakeAtomicCmpXchgValue(CodeGenFunction &CGF, const CallExpr *E, 193 bool ReturnBool) { 194 QualType T = ReturnBool ? E->getArg(1)->getType() : E->getType(); 195 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 196 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 197 198 llvm::IntegerType *IntType = llvm::IntegerType::get( 199 CGF.getLLVMContext(), CGF.getContext().getTypeSize(T)); 200 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 201 202 Value *Args[3]; 203 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 204 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 205 llvm::Type *ValueType = Args[1]->getType(); 206 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 207 Args[2] = EmitToInt(CGF, CGF.EmitScalarExpr(E->getArg(2)), T, IntType); 208 209 Value *Pair = CGF.Builder.CreateAtomicCmpXchg(Args[0], Args[1], Args[2], 210 llvm::SequentiallyConsistent, 211 llvm::SequentiallyConsistent); 212 if (ReturnBool) 213 // Extract boolean success flag and zext it to int. 214 return CGF.Builder.CreateZExt(CGF.Builder.CreateExtractValue(Pair, 1), 215 CGF.ConvertType(E->getType())); 216 else 217 // Extract old value and emit it using the same type as compare value. 218 return EmitFromInt(CGF, CGF.Builder.CreateExtractValue(Pair, 0), T, 219 ValueType); 220 } 221 222 /// EmitFAbs - Emit a call to @llvm.fabs(). 223 static Value *EmitFAbs(CodeGenFunction &CGF, Value *V) { 224 Value *F = CGF.CGM.getIntrinsic(Intrinsic::fabs, V->getType()); 225 llvm::CallInst *Call = CGF.Builder.CreateCall(F, V); 226 Call->setDoesNotAccessMemory(); 227 return Call; 228 } 229 230 /// Emit the computation of the sign bit for a floating point value. Returns 231 /// the i1 sign bit value. 232 static Value *EmitSignBit(CodeGenFunction &CGF, Value *V) { 233 LLVMContext &C = CGF.CGM.getLLVMContext(); 234 235 llvm::Type *Ty = V->getType(); 236 int Width = Ty->getPrimitiveSizeInBits(); 237 llvm::Type *IntTy = llvm::IntegerType::get(C, Width); 238 V = CGF.Builder.CreateBitCast(V, IntTy); 239 if (Ty->isPPC_FP128Ty()) { 240 // The higher-order double comes first, and so we need to truncate the 241 // pair to extract the overall sign. The order of the pair is the same 242 // in both little- and big-Endian modes. 243 Width >>= 1; 244 IntTy = llvm::IntegerType::get(C, Width); 245 V = CGF.Builder.CreateTrunc(V, IntTy); 246 } 247 Value *Zero = llvm::Constant::getNullValue(IntTy); 248 return CGF.Builder.CreateICmpSLT(V, Zero); 249 } 250 251 static RValue emitLibraryCall(CodeGenFunction &CGF, const FunctionDecl *Fn, 252 const CallExpr *E, llvm::Value *calleeValue) { 253 return CGF.EmitCall(E->getCallee()->getType(), calleeValue, E, 254 ReturnValueSlot(), Fn); 255 } 256 257 /// \brief Emit a call to llvm.{sadd,uadd,ssub,usub,smul,umul}.with.overflow.* 258 /// depending on IntrinsicID. 259 /// 260 /// \arg CGF The current codegen function. 261 /// \arg IntrinsicID The ID for the Intrinsic we wish to generate. 262 /// \arg X The first argument to the llvm.*.with.overflow.*. 263 /// \arg Y The second argument to the llvm.*.with.overflow.*. 264 /// \arg Carry The carry returned by the llvm.*.with.overflow.*. 265 /// \returns The result (i.e. sum/product) returned by the intrinsic. 266 static llvm::Value *EmitOverflowIntrinsic(CodeGenFunction &CGF, 267 const llvm::Intrinsic::ID IntrinsicID, 268 llvm::Value *X, llvm::Value *Y, 269 llvm::Value *&Carry) { 270 // Make sure we have integers of the same width. 271 assert(X->getType() == Y->getType() && 272 "Arguments must be the same type. (Did you forget to make sure both " 273 "arguments have the same integer width?)"); 274 275 llvm::Value *Callee = CGF.CGM.getIntrinsic(IntrinsicID, X->getType()); 276 llvm::Value *Tmp = CGF.Builder.CreateCall(Callee, {X, Y}); 277 Carry = CGF.Builder.CreateExtractValue(Tmp, 1); 278 return CGF.Builder.CreateExtractValue(Tmp, 0); 279 } 280 281 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) { 282 llvm::Type *DestType = Int8PtrTy; 283 if (ArgValue->getType() != DestType) 284 ArgValue = 285 Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data()); 286 287 Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend; 288 return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue); 289 } 290 291 RValue CodeGenFunction::EmitBuiltinExpr(const FunctionDecl *FD, 292 unsigned BuiltinID, const CallExpr *E, 293 ReturnValueSlot ReturnValue) { 294 // See if we can constant fold this builtin. If so, don't emit it at all. 295 Expr::EvalResult Result; 296 if (E->EvaluateAsRValue(Result, CGM.getContext()) && 297 !Result.hasSideEffects()) { 298 if (Result.Val.isInt()) 299 return RValue::get(llvm::ConstantInt::get(getLLVMContext(), 300 Result.Val.getInt())); 301 if (Result.Val.isFloat()) 302 return RValue::get(llvm::ConstantFP::get(getLLVMContext(), 303 Result.Val.getFloat())); 304 } 305 306 switch (BuiltinID) { 307 default: break; // Handle intrinsics and libm functions below. 308 case Builtin::BI__builtin___CFStringMakeConstantString: 309 case Builtin::BI__builtin___NSStringMakeConstantString: 310 return RValue::get(CGM.EmitConstantExpr(E, E->getType(), nullptr)); 311 case Builtin::BI__builtin_stdarg_start: 312 case Builtin::BI__builtin_va_start: 313 case Builtin::BI__va_start: 314 case Builtin::BI__builtin_va_end: 315 return RValue::get( 316 EmitVAStartEnd(BuiltinID == Builtin::BI__va_start 317 ? EmitScalarExpr(E->getArg(0)) 318 : EmitVAListRef(E->getArg(0)).getPointer(), 319 BuiltinID != Builtin::BI__builtin_va_end)); 320 case Builtin::BI__builtin_va_copy: { 321 Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer(); 322 Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer(); 323 324 llvm::Type *Type = Int8PtrTy; 325 326 DstPtr = Builder.CreateBitCast(DstPtr, Type); 327 SrcPtr = Builder.CreateBitCast(SrcPtr, Type); 328 return RValue::get(Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), 329 {DstPtr, SrcPtr})); 330 } 331 case Builtin::BI__builtin_abs: 332 case Builtin::BI__builtin_labs: 333 case Builtin::BI__builtin_llabs: { 334 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 335 336 Value *NegOp = Builder.CreateNeg(ArgValue, "neg"); 337 Value *CmpResult = 338 Builder.CreateICmpSGE(ArgValue, 339 llvm::Constant::getNullValue(ArgValue->getType()), 340 "abscond"); 341 Value *Result = 342 Builder.CreateSelect(CmpResult, ArgValue, NegOp, "abs"); 343 344 return RValue::get(Result); 345 } 346 case Builtin::BI__builtin_fabs: 347 case Builtin::BI__builtin_fabsf: 348 case Builtin::BI__builtin_fabsl: { 349 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 350 Value *Result = EmitFAbs(*this, Arg1); 351 return RValue::get(Result); 352 } 353 case Builtin::BI__builtin_fmod: 354 case Builtin::BI__builtin_fmodf: 355 case Builtin::BI__builtin_fmodl: { 356 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 357 Value *Arg2 = EmitScalarExpr(E->getArg(1)); 358 Value *Result = Builder.CreateFRem(Arg1, Arg2, "fmod"); 359 return RValue::get(Result); 360 } 361 362 case Builtin::BI__builtin_conj: 363 case Builtin::BI__builtin_conjf: 364 case Builtin::BI__builtin_conjl: { 365 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 366 Value *Real = ComplexVal.first; 367 Value *Imag = ComplexVal.second; 368 Value *Zero = 369 Imag->getType()->isFPOrFPVectorTy() 370 ? llvm::ConstantFP::getZeroValueForNegation(Imag->getType()) 371 : llvm::Constant::getNullValue(Imag->getType()); 372 373 Imag = Builder.CreateFSub(Zero, Imag, "sub"); 374 return RValue::getComplex(std::make_pair(Real, Imag)); 375 } 376 case Builtin::BI__builtin_creal: 377 case Builtin::BI__builtin_crealf: 378 case Builtin::BI__builtin_creall: 379 case Builtin::BIcreal: 380 case Builtin::BIcrealf: 381 case Builtin::BIcreall: { 382 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 383 return RValue::get(ComplexVal.first); 384 } 385 386 case Builtin::BI__builtin_cimag: 387 case Builtin::BI__builtin_cimagf: 388 case Builtin::BI__builtin_cimagl: 389 case Builtin::BIcimag: 390 case Builtin::BIcimagf: 391 case Builtin::BIcimagl: { 392 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 393 return RValue::get(ComplexVal.second); 394 } 395 396 case Builtin::BI__builtin_ctzs: 397 case Builtin::BI__builtin_ctz: 398 case Builtin::BI__builtin_ctzl: 399 case Builtin::BI__builtin_ctzll: { 400 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 401 402 llvm::Type *ArgType = ArgValue->getType(); 403 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 404 405 llvm::Type *ResultType = ConvertType(E->getType()); 406 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 407 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 408 if (Result->getType() != ResultType) 409 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 410 "cast"); 411 return RValue::get(Result); 412 } 413 case Builtin::BI__builtin_clzs: 414 case Builtin::BI__builtin_clz: 415 case Builtin::BI__builtin_clzl: 416 case Builtin::BI__builtin_clzll: { 417 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 418 419 llvm::Type *ArgType = ArgValue->getType(); 420 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 421 422 llvm::Type *ResultType = ConvertType(E->getType()); 423 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 424 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 425 if (Result->getType() != ResultType) 426 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 427 "cast"); 428 return RValue::get(Result); 429 } 430 case Builtin::BI__builtin_ffs: 431 case Builtin::BI__builtin_ffsl: 432 case Builtin::BI__builtin_ffsll: { 433 // ffs(x) -> x ? cttz(x) + 1 : 0 434 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 435 436 llvm::Type *ArgType = ArgValue->getType(); 437 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 438 439 llvm::Type *ResultType = ConvertType(E->getType()); 440 Value *Tmp = 441 Builder.CreateAdd(Builder.CreateCall(F, {ArgValue, Builder.getTrue()}), 442 llvm::ConstantInt::get(ArgType, 1)); 443 Value *Zero = llvm::Constant::getNullValue(ArgType); 444 Value *IsZero = Builder.CreateICmpEQ(ArgValue, Zero, "iszero"); 445 Value *Result = Builder.CreateSelect(IsZero, Zero, Tmp, "ffs"); 446 if (Result->getType() != ResultType) 447 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 448 "cast"); 449 return RValue::get(Result); 450 } 451 case Builtin::BI__builtin_parity: 452 case Builtin::BI__builtin_parityl: 453 case Builtin::BI__builtin_parityll: { 454 // parity(x) -> ctpop(x) & 1 455 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 456 457 llvm::Type *ArgType = ArgValue->getType(); 458 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 459 460 llvm::Type *ResultType = ConvertType(E->getType()); 461 Value *Tmp = Builder.CreateCall(F, ArgValue); 462 Value *Result = Builder.CreateAnd(Tmp, llvm::ConstantInt::get(ArgType, 1)); 463 if (Result->getType() != ResultType) 464 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 465 "cast"); 466 return RValue::get(Result); 467 } 468 case Builtin::BI__builtin_popcount: 469 case Builtin::BI__builtin_popcountl: 470 case Builtin::BI__builtin_popcountll: { 471 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 472 473 llvm::Type *ArgType = ArgValue->getType(); 474 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 475 476 llvm::Type *ResultType = ConvertType(E->getType()); 477 Value *Result = Builder.CreateCall(F, ArgValue); 478 if (Result->getType() != ResultType) 479 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 480 "cast"); 481 return RValue::get(Result); 482 } 483 case Builtin::BI__builtin_unpredictable: { 484 // Always return the argument of __builtin_unpredictable. LLVM does not 485 // handle this builtin. Metadata for this builtin should be added directly 486 // to instructions such as branches or switches that use it. 487 return RValue::get(EmitScalarExpr(E->getArg(0))); 488 } 489 case Builtin::BI__builtin_expect: { 490 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 491 llvm::Type *ArgType = ArgValue->getType(); 492 493 Value *ExpectedValue = EmitScalarExpr(E->getArg(1)); 494 // Don't generate llvm.expect on -O0 as the backend won't use it for 495 // anything. 496 // Note, we still IRGen ExpectedValue because it could have side-effects. 497 if (CGM.getCodeGenOpts().OptimizationLevel == 0) 498 return RValue::get(ArgValue); 499 500 Value *FnExpect = CGM.getIntrinsic(Intrinsic::expect, ArgType); 501 Value *Result = 502 Builder.CreateCall(FnExpect, {ArgValue, ExpectedValue}, "expval"); 503 return RValue::get(Result); 504 } 505 case Builtin::BI__builtin_assume_aligned: { 506 Value *PtrValue = EmitScalarExpr(E->getArg(0)); 507 Value *OffsetValue = 508 (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : nullptr; 509 510 Value *AlignmentValue = EmitScalarExpr(E->getArg(1)); 511 ConstantInt *AlignmentCI = cast<ConstantInt>(AlignmentValue); 512 unsigned Alignment = (unsigned) AlignmentCI->getZExtValue(); 513 514 EmitAlignmentAssumption(PtrValue, Alignment, OffsetValue); 515 return RValue::get(PtrValue); 516 } 517 case Builtin::BI__assume: 518 case Builtin::BI__builtin_assume: { 519 if (E->getArg(0)->HasSideEffects(getContext())) 520 return RValue::get(nullptr); 521 522 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 523 Value *FnAssume = CGM.getIntrinsic(Intrinsic::assume); 524 return RValue::get(Builder.CreateCall(FnAssume, ArgValue)); 525 } 526 case Builtin::BI__builtin_bswap16: 527 case Builtin::BI__builtin_bswap32: 528 case Builtin::BI__builtin_bswap64: { 529 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 530 llvm::Type *ArgType = ArgValue->getType(); 531 Value *F = CGM.getIntrinsic(Intrinsic::bswap, ArgType); 532 return RValue::get(Builder.CreateCall(F, ArgValue)); 533 } 534 case Builtin::BI__builtin_object_size: { 535 // We rely on constant folding to deal with expressions with side effects. 536 assert(!E->getArg(0)->HasSideEffects(getContext()) && 537 "should have been constant folded"); 538 539 // We pass this builtin onto the optimizer so that it can 540 // figure out the object size in more complex cases. 541 llvm::Type *ResType = ConvertType(E->getType()); 542 543 // LLVM only supports 0 and 2, make sure that we pass along that 544 // as a boolean. 545 Value *Ty = EmitScalarExpr(E->getArg(1)); 546 ConstantInt *CI = dyn_cast<ConstantInt>(Ty); 547 assert(CI); 548 uint64_t val = CI->getZExtValue(); 549 CI = ConstantInt::get(Builder.getInt1Ty(), (val & 0x2) >> 1); 550 // FIXME: Get right address space. 551 llvm::Type *Tys[] = { ResType, Builder.getInt8PtrTy(0) }; 552 Value *F = CGM.getIntrinsic(Intrinsic::objectsize, Tys); 553 return RValue::get( 554 Builder.CreateCall(F, {EmitScalarExpr(E->getArg(0)), CI})); 555 } 556 case Builtin::BI__builtin_prefetch: { 557 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); 558 // FIXME: Technically these constants should of type 'int', yes? 559 RW = (E->getNumArgs() > 1) ? EmitScalarExpr(E->getArg(1)) : 560 llvm::ConstantInt::get(Int32Ty, 0); 561 Locality = (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : 562 llvm::ConstantInt::get(Int32Ty, 3); 563 Value *Data = llvm::ConstantInt::get(Int32Ty, 1); 564 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 565 return RValue::get(Builder.CreateCall(F, {Address, RW, Locality, Data})); 566 } 567 case Builtin::BI__builtin_readcyclecounter: { 568 Value *F = CGM.getIntrinsic(Intrinsic::readcyclecounter); 569 return RValue::get(Builder.CreateCall(F)); 570 } 571 case Builtin::BI__builtin___clear_cache: { 572 Value *Begin = EmitScalarExpr(E->getArg(0)); 573 Value *End = EmitScalarExpr(E->getArg(1)); 574 Value *F = CGM.getIntrinsic(Intrinsic::clear_cache); 575 return RValue::get(Builder.CreateCall(F, {Begin, End})); 576 } 577 case Builtin::BI__builtin_trap: 578 return RValue::get(EmitTrapCall(Intrinsic::trap)); 579 case Builtin::BI__debugbreak: 580 return RValue::get(EmitTrapCall(Intrinsic::debugtrap)); 581 case Builtin::BI__builtin_unreachable: { 582 if (SanOpts.has(SanitizerKind::Unreachable)) { 583 SanitizerScope SanScope(this); 584 EmitCheck(std::make_pair(static_cast<llvm::Value *>(Builder.getFalse()), 585 SanitizerKind::Unreachable), 586 "builtin_unreachable", EmitCheckSourceLocation(E->getExprLoc()), 587 None); 588 } else 589 Builder.CreateUnreachable(); 590 591 // We do need to preserve an insertion point. 592 EmitBlock(createBasicBlock("unreachable.cont")); 593 594 return RValue::get(nullptr); 595 } 596 597 case Builtin::BI__builtin_powi: 598 case Builtin::BI__builtin_powif: 599 case Builtin::BI__builtin_powil: { 600 Value *Base = EmitScalarExpr(E->getArg(0)); 601 Value *Exponent = EmitScalarExpr(E->getArg(1)); 602 llvm::Type *ArgType = Base->getType(); 603 Value *F = CGM.getIntrinsic(Intrinsic::powi, ArgType); 604 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 605 } 606 607 case Builtin::BI__builtin_isgreater: 608 case Builtin::BI__builtin_isgreaterequal: 609 case Builtin::BI__builtin_isless: 610 case Builtin::BI__builtin_islessequal: 611 case Builtin::BI__builtin_islessgreater: 612 case Builtin::BI__builtin_isunordered: { 613 // Ordered comparisons: we know the arguments to these are matching scalar 614 // floating point values. 615 Value *LHS = EmitScalarExpr(E->getArg(0)); 616 Value *RHS = EmitScalarExpr(E->getArg(1)); 617 618 switch (BuiltinID) { 619 default: llvm_unreachable("Unknown ordered comparison"); 620 case Builtin::BI__builtin_isgreater: 621 LHS = Builder.CreateFCmpOGT(LHS, RHS, "cmp"); 622 break; 623 case Builtin::BI__builtin_isgreaterequal: 624 LHS = Builder.CreateFCmpOGE(LHS, RHS, "cmp"); 625 break; 626 case Builtin::BI__builtin_isless: 627 LHS = Builder.CreateFCmpOLT(LHS, RHS, "cmp"); 628 break; 629 case Builtin::BI__builtin_islessequal: 630 LHS = Builder.CreateFCmpOLE(LHS, RHS, "cmp"); 631 break; 632 case Builtin::BI__builtin_islessgreater: 633 LHS = Builder.CreateFCmpONE(LHS, RHS, "cmp"); 634 break; 635 case Builtin::BI__builtin_isunordered: 636 LHS = Builder.CreateFCmpUNO(LHS, RHS, "cmp"); 637 break; 638 } 639 // ZExt bool to int type. 640 return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType()))); 641 } 642 case Builtin::BI__builtin_isnan: { 643 Value *V = EmitScalarExpr(E->getArg(0)); 644 V = Builder.CreateFCmpUNO(V, V, "cmp"); 645 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 646 } 647 648 case Builtin::BI__builtin_isinf: { 649 // isinf(x) --> fabs(x) == infinity 650 Value *V = EmitScalarExpr(E->getArg(0)); 651 V = EmitFAbs(*this, V); 652 653 V = Builder.CreateFCmpOEQ(V, ConstantFP::getInfinity(V->getType()),"isinf"); 654 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 655 } 656 657 case Builtin::BI__builtin_isinf_sign: { 658 // isinf_sign(x) -> fabs(x) == infinity ? (signbit(x) ? -1 : 1) : 0 659 Value *Arg = EmitScalarExpr(E->getArg(0)); 660 Value *AbsArg = EmitFAbs(*this, Arg); 661 Value *IsInf = Builder.CreateFCmpOEQ( 662 AbsArg, ConstantFP::getInfinity(Arg->getType()), "isinf"); 663 Value *IsNeg = EmitSignBit(*this, Arg); 664 665 llvm::Type *IntTy = ConvertType(E->getType()); 666 Value *Zero = Constant::getNullValue(IntTy); 667 Value *One = ConstantInt::get(IntTy, 1); 668 Value *NegativeOne = ConstantInt::get(IntTy, -1); 669 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); 670 Value *Result = Builder.CreateSelect(IsInf, SignResult, Zero); 671 return RValue::get(Result); 672 } 673 674 case Builtin::BI__builtin_isnormal: { 675 // isnormal(x) --> x == x && fabsf(x) < infinity && fabsf(x) >= float_min 676 Value *V = EmitScalarExpr(E->getArg(0)); 677 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 678 679 Value *Abs = EmitFAbs(*this, V); 680 Value *IsLessThanInf = 681 Builder.CreateFCmpULT(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 682 APFloat Smallest = APFloat::getSmallestNormalized( 683 getContext().getFloatTypeSemantics(E->getArg(0)->getType())); 684 Value *IsNormal = 685 Builder.CreateFCmpUGE(Abs, ConstantFP::get(V->getContext(), Smallest), 686 "isnormal"); 687 V = Builder.CreateAnd(Eq, IsLessThanInf, "and"); 688 V = Builder.CreateAnd(V, IsNormal, "and"); 689 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 690 } 691 692 case Builtin::BI__builtin_isfinite: { 693 // isfinite(x) --> x == x && fabs(x) != infinity; 694 Value *V = EmitScalarExpr(E->getArg(0)); 695 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 696 697 Value *Abs = EmitFAbs(*this, V); 698 Value *IsNotInf = 699 Builder.CreateFCmpUNE(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 700 701 V = Builder.CreateAnd(Eq, IsNotInf, "and"); 702 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 703 } 704 705 case Builtin::BI__builtin_fpclassify: { 706 Value *V = EmitScalarExpr(E->getArg(5)); 707 llvm::Type *Ty = ConvertType(E->getArg(5)->getType()); 708 709 // Create Result 710 BasicBlock *Begin = Builder.GetInsertBlock(); 711 BasicBlock *End = createBasicBlock("fpclassify_end", this->CurFn); 712 Builder.SetInsertPoint(End); 713 PHINode *Result = 714 Builder.CreatePHI(ConvertType(E->getArg(0)->getType()), 4, 715 "fpclassify_result"); 716 717 // if (V==0) return FP_ZERO 718 Builder.SetInsertPoint(Begin); 719 Value *IsZero = Builder.CreateFCmpOEQ(V, Constant::getNullValue(Ty), 720 "iszero"); 721 Value *ZeroLiteral = EmitScalarExpr(E->getArg(4)); 722 BasicBlock *NotZero = createBasicBlock("fpclassify_not_zero", this->CurFn); 723 Builder.CreateCondBr(IsZero, End, NotZero); 724 Result->addIncoming(ZeroLiteral, Begin); 725 726 // if (V != V) return FP_NAN 727 Builder.SetInsertPoint(NotZero); 728 Value *IsNan = Builder.CreateFCmpUNO(V, V, "cmp"); 729 Value *NanLiteral = EmitScalarExpr(E->getArg(0)); 730 BasicBlock *NotNan = createBasicBlock("fpclassify_not_nan", this->CurFn); 731 Builder.CreateCondBr(IsNan, End, NotNan); 732 Result->addIncoming(NanLiteral, NotZero); 733 734 // if (fabs(V) == infinity) return FP_INFINITY 735 Builder.SetInsertPoint(NotNan); 736 Value *VAbs = EmitFAbs(*this, V); 737 Value *IsInf = 738 Builder.CreateFCmpOEQ(VAbs, ConstantFP::getInfinity(V->getType()), 739 "isinf"); 740 Value *InfLiteral = EmitScalarExpr(E->getArg(1)); 741 BasicBlock *NotInf = createBasicBlock("fpclassify_not_inf", this->CurFn); 742 Builder.CreateCondBr(IsInf, End, NotInf); 743 Result->addIncoming(InfLiteral, NotNan); 744 745 // if (fabs(V) >= MIN_NORMAL) return FP_NORMAL else FP_SUBNORMAL 746 Builder.SetInsertPoint(NotInf); 747 APFloat Smallest = APFloat::getSmallestNormalized( 748 getContext().getFloatTypeSemantics(E->getArg(5)->getType())); 749 Value *IsNormal = 750 Builder.CreateFCmpUGE(VAbs, ConstantFP::get(V->getContext(), Smallest), 751 "isnormal"); 752 Value *NormalResult = 753 Builder.CreateSelect(IsNormal, EmitScalarExpr(E->getArg(2)), 754 EmitScalarExpr(E->getArg(3))); 755 Builder.CreateBr(End); 756 Result->addIncoming(NormalResult, NotInf); 757 758 // return Result 759 Builder.SetInsertPoint(End); 760 return RValue::get(Result); 761 } 762 763 case Builtin::BIalloca: 764 case Builtin::BI_alloca: 765 case Builtin::BI__builtin_alloca: { 766 Value *Size = EmitScalarExpr(E->getArg(0)); 767 return RValue::get(Builder.CreateAlloca(Builder.getInt8Ty(), Size)); 768 } 769 case Builtin::BIbzero: 770 case Builtin::BI__builtin_bzero: { 771 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 772 Value *SizeVal = EmitScalarExpr(E->getArg(1)); 773 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 774 E->getArg(0)->getExprLoc(), FD, 0); 775 Builder.CreateMemSet(Dest, Builder.getInt8(0), SizeVal, false); 776 return RValue::get(Dest.getPointer()); 777 } 778 case Builtin::BImemcpy: 779 case Builtin::BI__builtin_memcpy: { 780 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 781 Address Src = EmitPointerWithAlignment(E->getArg(1)); 782 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 783 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 784 E->getArg(0)->getExprLoc(), FD, 0); 785 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 786 E->getArg(1)->getExprLoc(), FD, 1); 787 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 788 return RValue::get(Dest.getPointer()); 789 } 790 791 case Builtin::BI__builtin___memcpy_chk: { 792 // fold __builtin_memcpy_chk(x, y, cst1, cst2) to memcpy iff cst1<=cst2. 793 llvm::APSInt Size, DstSize; 794 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 795 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 796 break; 797 if (Size.ugt(DstSize)) 798 break; 799 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 800 Address Src = EmitPointerWithAlignment(E->getArg(1)); 801 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 802 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 803 return RValue::get(Dest.getPointer()); 804 } 805 806 case Builtin::BI__builtin_objc_memmove_collectable: { 807 Address DestAddr = EmitPointerWithAlignment(E->getArg(0)); 808 Address SrcAddr = EmitPointerWithAlignment(E->getArg(1)); 809 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 810 CGM.getObjCRuntime().EmitGCMemmoveCollectable(*this, 811 DestAddr, SrcAddr, SizeVal); 812 return RValue::get(DestAddr.getPointer()); 813 } 814 815 case Builtin::BI__builtin___memmove_chk: { 816 // fold __builtin_memmove_chk(x, y, cst1, cst2) to memmove iff cst1<=cst2. 817 llvm::APSInt Size, DstSize; 818 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 819 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 820 break; 821 if (Size.ugt(DstSize)) 822 break; 823 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 824 Address Src = EmitPointerWithAlignment(E->getArg(1)); 825 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 826 Builder.CreateMemMove(Dest, Src, SizeVal, false); 827 return RValue::get(Dest.getPointer()); 828 } 829 830 case Builtin::BImemmove: 831 case Builtin::BI__builtin_memmove: { 832 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 833 Address Src = EmitPointerWithAlignment(E->getArg(1)); 834 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 835 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 836 E->getArg(0)->getExprLoc(), FD, 0); 837 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 838 E->getArg(1)->getExprLoc(), FD, 1); 839 Builder.CreateMemMove(Dest, Src, SizeVal, false); 840 return RValue::get(Dest.getPointer()); 841 } 842 case Builtin::BImemset: 843 case Builtin::BI__builtin_memset: { 844 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 845 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 846 Builder.getInt8Ty()); 847 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 848 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 849 E->getArg(0)->getExprLoc(), FD, 0); 850 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 851 return RValue::get(Dest.getPointer()); 852 } 853 case Builtin::BI__builtin___memset_chk: { 854 // fold __builtin_memset_chk(x, y, cst1, cst2) to memset iff cst1<=cst2. 855 llvm::APSInt Size, DstSize; 856 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 857 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 858 break; 859 if (Size.ugt(DstSize)) 860 break; 861 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 862 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 863 Builder.getInt8Ty()); 864 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 865 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 866 return RValue::get(Dest.getPointer()); 867 } 868 case Builtin::BI__builtin_dwarf_cfa: { 869 // The offset in bytes from the first argument to the CFA. 870 // 871 // Why on earth is this in the frontend? Is there any reason at 872 // all that the backend can't reasonably determine this while 873 // lowering llvm.eh.dwarf.cfa()? 874 // 875 // TODO: If there's a satisfactory reason, add a target hook for 876 // this instead of hard-coding 0, which is correct for most targets. 877 int32_t Offset = 0; 878 879 Value *F = CGM.getIntrinsic(Intrinsic::eh_dwarf_cfa); 880 return RValue::get(Builder.CreateCall(F, 881 llvm::ConstantInt::get(Int32Ty, Offset))); 882 } 883 case Builtin::BI__builtin_return_address: { 884 Value *Depth = 885 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 886 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 887 return RValue::get(Builder.CreateCall(F, Depth)); 888 } 889 case Builtin::BI__builtin_frame_address: { 890 Value *Depth = 891 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 892 Value *F = CGM.getIntrinsic(Intrinsic::frameaddress); 893 return RValue::get(Builder.CreateCall(F, Depth)); 894 } 895 case Builtin::BI__builtin_extract_return_addr: { 896 Value *Address = EmitScalarExpr(E->getArg(0)); 897 Value *Result = getTargetHooks().decodeReturnAddress(*this, Address); 898 return RValue::get(Result); 899 } 900 case Builtin::BI__builtin_frob_return_addr: { 901 Value *Address = EmitScalarExpr(E->getArg(0)); 902 Value *Result = getTargetHooks().encodeReturnAddress(*this, Address); 903 return RValue::get(Result); 904 } 905 case Builtin::BI__builtin_dwarf_sp_column: { 906 llvm::IntegerType *Ty 907 = cast<llvm::IntegerType>(ConvertType(E->getType())); 908 int Column = getTargetHooks().getDwarfEHStackPointer(CGM); 909 if (Column == -1) { 910 CGM.ErrorUnsupported(E, "__builtin_dwarf_sp_column"); 911 return RValue::get(llvm::UndefValue::get(Ty)); 912 } 913 return RValue::get(llvm::ConstantInt::get(Ty, Column, true)); 914 } 915 case Builtin::BI__builtin_init_dwarf_reg_size_table: { 916 Value *Address = EmitScalarExpr(E->getArg(0)); 917 if (getTargetHooks().initDwarfEHRegSizeTable(*this, Address)) 918 CGM.ErrorUnsupported(E, "__builtin_init_dwarf_reg_size_table"); 919 return RValue::get(llvm::UndefValue::get(ConvertType(E->getType()))); 920 } 921 case Builtin::BI__builtin_eh_return: { 922 Value *Int = EmitScalarExpr(E->getArg(0)); 923 Value *Ptr = EmitScalarExpr(E->getArg(1)); 924 925 llvm::IntegerType *IntTy = cast<llvm::IntegerType>(Int->getType()); 926 assert((IntTy->getBitWidth() == 32 || IntTy->getBitWidth() == 64) && 927 "LLVM's __builtin_eh_return only supports 32- and 64-bit variants"); 928 Value *F = CGM.getIntrinsic(IntTy->getBitWidth() == 32 929 ? Intrinsic::eh_return_i32 930 : Intrinsic::eh_return_i64); 931 Builder.CreateCall(F, {Int, Ptr}); 932 Builder.CreateUnreachable(); 933 934 // We do need to preserve an insertion point. 935 EmitBlock(createBasicBlock("builtin_eh_return.cont")); 936 937 return RValue::get(nullptr); 938 } 939 case Builtin::BI__builtin_unwind_init: { 940 Value *F = CGM.getIntrinsic(Intrinsic::eh_unwind_init); 941 return RValue::get(Builder.CreateCall(F)); 942 } 943 case Builtin::BI__builtin_extend_pointer: { 944 // Extends a pointer to the size of an _Unwind_Word, which is 945 // uint64_t on all platforms. Generally this gets poked into a 946 // register and eventually used as an address, so if the 947 // addressing registers are wider than pointers and the platform 948 // doesn't implicitly ignore high-order bits when doing 949 // addressing, we need to make sure we zext / sext based on 950 // the platform's expectations. 951 // 952 // See: http://gcc.gnu.org/ml/gcc-bugs/2002-02/msg00237.html 953 954 // Cast the pointer to intptr_t. 955 Value *Ptr = EmitScalarExpr(E->getArg(0)); 956 Value *Result = Builder.CreatePtrToInt(Ptr, IntPtrTy, "extend.cast"); 957 958 // If that's 64 bits, we're done. 959 if (IntPtrTy->getBitWidth() == 64) 960 return RValue::get(Result); 961 962 // Otherwise, ask the codegen data what to do. 963 if (getTargetHooks().extendPointerWithSExt()) 964 return RValue::get(Builder.CreateSExt(Result, Int64Ty, "extend.sext")); 965 else 966 return RValue::get(Builder.CreateZExt(Result, Int64Ty, "extend.zext")); 967 } 968 case Builtin::BI__builtin_setjmp: { 969 // Buffer is a void**. 970 Address Buf = EmitPointerWithAlignment(E->getArg(0)); 971 972 // Store the frame pointer to the setjmp buffer. 973 Value *FrameAddr = 974 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 975 ConstantInt::get(Int32Ty, 0)); 976 Builder.CreateStore(FrameAddr, Buf); 977 978 // Store the stack pointer to the setjmp buffer. 979 Value *StackAddr = 980 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::stacksave)); 981 Address StackSaveSlot = 982 Builder.CreateConstInBoundsGEP(Buf, 2, getPointerSize()); 983 Builder.CreateStore(StackAddr, StackSaveSlot); 984 985 // Call LLVM's EH setjmp, which is lightweight. 986 Value *F = CGM.getIntrinsic(Intrinsic::eh_sjlj_setjmp); 987 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 988 return RValue::get(Builder.CreateCall(F, Buf.getPointer())); 989 } 990 case Builtin::BI__builtin_longjmp: { 991 Value *Buf = EmitScalarExpr(E->getArg(0)); 992 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 993 994 // Call LLVM's EH longjmp, which is lightweight. 995 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::eh_sjlj_longjmp), Buf); 996 997 // longjmp doesn't return; mark this as unreachable. 998 Builder.CreateUnreachable(); 999 1000 // We do need to preserve an insertion point. 1001 EmitBlock(createBasicBlock("longjmp.cont")); 1002 1003 return RValue::get(nullptr); 1004 } 1005 case Builtin::BI__sync_fetch_and_add: 1006 case Builtin::BI__sync_fetch_and_sub: 1007 case Builtin::BI__sync_fetch_and_or: 1008 case Builtin::BI__sync_fetch_and_and: 1009 case Builtin::BI__sync_fetch_and_xor: 1010 case Builtin::BI__sync_fetch_and_nand: 1011 case Builtin::BI__sync_add_and_fetch: 1012 case Builtin::BI__sync_sub_and_fetch: 1013 case Builtin::BI__sync_and_and_fetch: 1014 case Builtin::BI__sync_or_and_fetch: 1015 case Builtin::BI__sync_xor_and_fetch: 1016 case Builtin::BI__sync_nand_and_fetch: 1017 case Builtin::BI__sync_val_compare_and_swap: 1018 case Builtin::BI__sync_bool_compare_and_swap: 1019 case Builtin::BI__sync_lock_test_and_set: 1020 case Builtin::BI__sync_lock_release: 1021 case Builtin::BI__sync_swap: 1022 llvm_unreachable("Shouldn't make it through sema"); 1023 case Builtin::BI__sync_fetch_and_add_1: 1024 case Builtin::BI__sync_fetch_and_add_2: 1025 case Builtin::BI__sync_fetch_and_add_4: 1026 case Builtin::BI__sync_fetch_and_add_8: 1027 case Builtin::BI__sync_fetch_and_add_16: 1028 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E); 1029 case Builtin::BI__sync_fetch_and_sub_1: 1030 case Builtin::BI__sync_fetch_and_sub_2: 1031 case Builtin::BI__sync_fetch_and_sub_4: 1032 case Builtin::BI__sync_fetch_and_sub_8: 1033 case Builtin::BI__sync_fetch_and_sub_16: 1034 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E); 1035 case Builtin::BI__sync_fetch_and_or_1: 1036 case Builtin::BI__sync_fetch_and_or_2: 1037 case Builtin::BI__sync_fetch_and_or_4: 1038 case Builtin::BI__sync_fetch_and_or_8: 1039 case Builtin::BI__sync_fetch_and_or_16: 1040 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E); 1041 case Builtin::BI__sync_fetch_and_and_1: 1042 case Builtin::BI__sync_fetch_and_and_2: 1043 case Builtin::BI__sync_fetch_and_and_4: 1044 case Builtin::BI__sync_fetch_and_and_8: 1045 case Builtin::BI__sync_fetch_and_and_16: 1046 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E); 1047 case Builtin::BI__sync_fetch_and_xor_1: 1048 case Builtin::BI__sync_fetch_and_xor_2: 1049 case Builtin::BI__sync_fetch_and_xor_4: 1050 case Builtin::BI__sync_fetch_and_xor_8: 1051 case Builtin::BI__sync_fetch_and_xor_16: 1052 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E); 1053 case Builtin::BI__sync_fetch_and_nand_1: 1054 case Builtin::BI__sync_fetch_and_nand_2: 1055 case Builtin::BI__sync_fetch_and_nand_4: 1056 case Builtin::BI__sync_fetch_and_nand_8: 1057 case Builtin::BI__sync_fetch_and_nand_16: 1058 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Nand, E); 1059 1060 // Clang extensions: not overloaded yet. 1061 case Builtin::BI__sync_fetch_and_min: 1062 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E); 1063 case Builtin::BI__sync_fetch_and_max: 1064 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Max, E); 1065 case Builtin::BI__sync_fetch_and_umin: 1066 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMin, E); 1067 case Builtin::BI__sync_fetch_and_umax: 1068 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMax, E); 1069 1070 case Builtin::BI__sync_add_and_fetch_1: 1071 case Builtin::BI__sync_add_and_fetch_2: 1072 case Builtin::BI__sync_add_and_fetch_4: 1073 case Builtin::BI__sync_add_and_fetch_8: 1074 case Builtin::BI__sync_add_and_fetch_16: 1075 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Add, E, 1076 llvm::Instruction::Add); 1077 case Builtin::BI__sync_sub_and_fetch_1: 1078 case Builtin::BI__sync_sub_and_fetch_2: 1079 case Builtin::BI__sync_sub_and_fetch_4: 1080 case Builtin::BI__sync_sub_and_fetch_8: 1081 case Builtin::BI__sync_sub_and_fetch_16: 1082 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Sub, E, 1083 llvm::Instruction::Sub); 1084 case Builtin::BI__sync_and_and_fetch_1: 1085 case Builtin::BI__sync_and_and_fetch_2: 1086 case Builtin::BI__sync_and_and_fetch_4: 1087 case Builtin::BI__sync_and_and_fetch_8: 1088 case Builtin::BI__sync_and_and_fetch_16: 1089 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::And, E, 1090 llvm::Instruction::And); 1091 case Builtin::BI__sync_or_and_fetch_1: 1092 case Builtin::BI__sync_or_and_fetch_2: 1093 case Builtin::BI__sync_or_and_fetch_4: 1094 case Builtin::BI__sync_or_and_fetch_8: 1095 case Builtin::BI__sync_or_and_fetch_16: 1096 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Or, E, 1097 llvm::Instruction::Or); 1098 case Builtin::BI__sync_xor_and_fetch_1: 1099 case Builtin::BI__sync_xor_and_fetch_2: 1100 case Builtin::BI__sync_xor_and_fetch_4: 1101 case Builtin::BI__sync_xor_and_fetch_8: 1102 case Builtin::BI__sync_xor_and_fetch_16: 1103 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Xor, E, 1104 llvm::Instruction::Xor); 1105 case Builtin::BI__sync_nand_and_fetch_1: 1106 case Builtin::BI__sync_nand_and_fetch_2: 1107 case Builtin::BI__sync_nand_and_fetch_4: 1108 case Builtin::BI__sync_nand_and_fetch_8: 1109 case Builtin::BI__sync_nand_and_fetch_16: 1110 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Nand, E, 1111 llvm::Instruction::And, true); 1112 1113 case Builtin::BI__sync_val_compare_and_swap_1: 1114 case Builtin::BI__sync_val_compare_and_swap_2: 1115 case Builtin::BI__sync_val_compare_and_swap_4: 1116 case Builtin::BI__sync_val_compare_and_swap_8: 1117 case Builtin::BI__sync_val_compare_and_swap_16: 1118 return RValue::get(MakeAtomicCmpXchgValue(*this, E, false)); 1119 1120 case Builtin::BI__sync_bool_compare_and_swap_1: 1121 case Builtin::BI__sync_bool_compare_and_swap_2: 1122 case Builtin::BI__sync_bool_compare_and_swap_4: 1123 case Builtin::BI__sync_bool_compare_and_swap_8: 1124 case Builtin::BI__sync_bool_compare_and_swap_16: 1125 return RValue::get(MakeAtomicCmpXchgValue(*this, E, true)); 1126 1127 case Builtin::BI__sync_swap_1: 1128 case Builtin::BI__sync_swap_2: 1129 case Builtin::BI__sync_swap_4: 1130 case Builtin::BI__sync_swap_8: 1131 case Builtin::BI__sync_swap_16: 1132 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1133 1134 case Builtin::BI__sync_lock_test_and_set_1: 1135 case Builtin::BI__sync_lock_test_and_set_2: 1136 case Builtin::BI__sync_lock_test_and_set_4: 1137 case Builtin::BI__sync_lock_test_and_set_8: 1138 case Builtin::BI__sync_lock_test_and_set_16: 1139 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1140 1141 case Builtin::BI__sync_lock_release_1: 1142 case Builtin::BI__sync_lock_release_2: 1143 case Builtin::BI__sync_lock_release_4: 1144 case Builtin::BI__sync_lock_release_8: 1145 case Builtin::BI__sync_lock_release_16: { 1146 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1147 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 1148 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 1149 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 1150 StoreSize.getQuantity() * 8); 1151 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 1152 llvm::StoreInst *Store = 1153 Builder.CreateAlignedStore(llvm::Constant::getNullValue(ITy), Ptr, 1154 StoreSize); 1155 Store->setAtomic(llvm::Release); 1156 return RValue::get(nullptr); 1157 } 1158 1159 case Builtin::BI__sync_synchronize: { 1160 // We assume this is supposed to correspond to a C++0x-style 1161 // sequentially-consistent fence (i.e. this is only usable for 1162 // synchonization, not device I/O or anything like that). This intrinsic 1163 // is really badly designed in the sense that in theory, there isn't 1164 // any way to safely use it... but in practice, it mostly works 1165 // to use it with non-atomic loads and stores to get acquire/release 1166 // semantics. 1167 Builder.CreateFence(llvm::SequentiallyConsistent); 1168 return RValue::get(nullptr); 1169 } 1170 1171 case Builtin::BI__builtin_nontemporal_load: 1172 return RValue::get(EmitNontemporalLoad(*this, E)); 1173 case Builtin::BI__builtin_nontemporal_store: 1174 return RValue::get(EmitNontemporalStore(*this, E)); 1175 case Builtin::BI__c11_atomic_is_lock_free: 1176 case Builtin::BI__atomic_is_lock_free: { 1177 // Call "bool __atomic_is_lock_free(size_t size, void *ptr)". For the 1178 // __c11 builtin, ptr is 0 (indicating a properly-aligned object), since 1179 // _Atomic(T) is always properly-aligned. 1180 const char *LibCallName = "__atomic_is_lock_free"; 1181 CallArgList Args; 1182 Args.add(RValue::get(EmitScalarExpr(E->getArg(0))), 1183 getContext().getSizeType()); 1184 if (BuiltinID == Builtin::BI__atomic_is_lock_free) 1185 Args.add(RValue::get(EmitScalarExpr(E->getArg(1))), 1186 getContext().VoidPtrTy); 1187 else 1188 Args.add(RValue::get(llvm::Constant::getNullValue(VoidPtrTy)), 1189 getContext().VoidPtrTy); 1190 const CGFunctionInfo &FuncInfo = 1191 CGM.getTypes().arrangeFreeFunctionCall(E->getType(), Args, 1192 FunctionType::ExtInfo(), 1193 RequiredArgs::All); 1194 llvm::FunctionType *FTy = CGM.getTypes().GetFunctionType(FuncInfo); 1195 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, LibCallName); 1196 return EmitCall(FuncInfo, Func, ReturnValueSlot(), Args); 1197 } 1198 1199 case Builtin::BI__atomic_test_and_set: { 1200 // Look at the argument type to determine whether this is a volatile 1201 // operation. The parameter type is always volatile. 1202 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1203 bool Volatile = 1204 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1205 1206 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1207 unsigned AddrSpace = Ptr->getType()->getPointerAddressSpace(); 1208 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1209 Value *NewVal = Builder.getInt8(1); 1210 Value *Order = EmitScalarExpr(E->getArg(1)); 1211 if (isa<llvm::ConstantInt>(Order)) { 1212 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1213 AtomicRMWInst *Result = nullptr; 1214 switch (ord) { 1215 case 0: // memory_order_relaxed 1216 default: // invalid order 1217 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1218 Ptr, NewVal, 1219 llvm::Monotonic); 1220 break; 1221 case 1: // memory_order_consume 1222 case 2: // memory_order_acquire 1223 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1224 Ptr, NewVal, 1225 llvm::Acquire); 1226 break; 1227 case 3: // memory_order_release 1228 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1229 Ptr, NewVal, 1230 llvm::Release); 1231 break; 1232 case 4: // memory_order_acq_rel 1233 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1234 Ptr, NewVal, 1235 llvm::AcquireRelease); 1236 break; 1237 case 5: // memory_order_seq_cst 1238 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1239 Ptr, NewVal, 1240 llvm::SequentiallyConsistent); 1241 break; 1242 } 1243 Result->setVolatile(Volatile); 1244 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1245 } 1246 1247 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1248 1249 llvm::BasicBlock *BBs[5] = { 1250 createBasicBlock("monotonic", CurFn), 1251 createBasicBlock("acquire", CurFn), 1252 createBasicBlock("release", CurFn), 1253 createBasicBlock("acqrel", CurFn), 1254 createBasicBlock("seqcst", CurFn) 1255 }; 1256 llvm::AtomicOrdering Orders[5] = { 1257 llvm::Monotonic, llvm::Acquire, llvm::Release, 1258 llvm::AcquireRelease, llvm::SequentiallyConsistent 1259 }; 1260 1261 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1262 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1263 1264 Builder.SetInsertPoint(ContBB); 1265 PHINode *Result = Builder.CreatePHI(Int8Ty, 5, "was_set"); 1266 1267 for (unsigned i = 0; i < 5; ++i) { 1268 Builder.SetInsertPoint(BBs[i]); 1269 AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1270 Ptr, NewVal, Orders[i]); 1271 RMW->setVolatile(Volatile); 1272 Result->addIncoming(RMW, BBs[i]); 1273 Builder.CreateBr(ContBB); 1274 } 1275 1276 SI->addCase(Builder.getInt32(0), BBs[0]); 1277 SI->addCase(Builder.getInt32(1), BBs[1]); 1278 SI->addCase(Builder.getInt32(2), BBs[1]); 1279 SI->addCase(Builder.getInt32(3), BBs[2]); 1280 SI->addCase(Builder.getInt32(4), BBs[3]); 1281 SI->addCase(Builder.getInt32(5), BBs[4]); 1282 1283 Builder.SetInsertPoint(ContBB); 1284 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1285 } 1286 1287 case Builtin::BI__atomic_clear: { 1288 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1289 bool Volatile = 1290 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1291 1292 Address Ptr = EmitPointerWithAlignment(E->getArg(0)); 1293 unsigned AddrSpace = Ptr.getPointer()->getType()->getPointerAddressSpace(); 1294 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1295 Value *NewVal = Builder.getInt8(0); 1296 Value *Order = EmitScalarExpr(E->getArg(1)); 1297 if (isa<llvm::ConstantInt>(Order)) { 1298 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1299 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1300 switch (ord) { 1301 case 0: // memory_order_relaxed 1302 default: // invalid order 1303 Store->setOrdering(llvm::Monotonic); 1304 break; 1305 case 3: // memory_order_release 1306 Store->setOrdering(llvm::Release); 1307 break; 1308 case 5: // memory_order_seq_cst 1309 Store->setOrdering(llvm::SequentiallyConsistent); 1310 break; 1311 } 1312 return RValue::get(nullptr); 1313 } 1314 1315 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1316 1317 llvm::BasicBlock *BBs[3] = { 1318 createBasicBlock("monotonic", CurFn), 1319 createBasicBlock("release", CurFn), 1320 createBasicBlock("seqcst", CurFn) 1321 }; 1322 llvm::AtomicOrdering Orders[3] = { 1323 llvm::Monotonic, llvm::Release, llvm::SequentiallyConsistent 1324 }; 1325 1326 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1327 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1328 1329 for (unsigned i = 0; i < 3; ++i) { 1330 Builder.SetInsertPoint(BBs[i]); 1331 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1332 Store->setOrdering(Orders[i]); 1333 Builder.CreateBr(ContBB); 1334 } 1335 1336 SI->addCase(Builder.getInt32(0), BBs[0]); 1337 SI->addCase(Builder.getInt32(3), BBs[1]); 1338 SI->addCase(Builder.getInt32(5), BBs[2]); 1339 1340 Builder.SetInsertPoint(ContBB); 1341 return RValue::get(nullptr); 1342 } 1343 1344 case Builtin::BI__atomic_thread_fence: 1345 case Builtin::BI__atomic_signal_fence: 1346 case Builtin::BI__c11_atomic_thread_fence: 1347 case Builtin::BI__c11_atomic_signal_fence: { 1348 llvm::SynchronizationScope Scope; 1349 if (BuiltinID == Builtin::BI__atomic_signal_fence || 1350 BuiltinID == Builtin::BI__c11_atomic_signal_fence) 1351 Scope = llvm::SingleThread; 1352 else 1353 Scope = llvm::CrossThread; 1354 Value *Order = EmitScalarExpr(E->getArg(0)); 1355 if (isa<llvm::ConstantInt>(Order)) { 1356 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1357 switch (ord) { 1358 case 0: // memory_order_relaxed 1359 default: // invalid order 1360 break; 1361 case 1: // memory_order_consume 1362 case 2: // memory_order_acquire 1363 Builder.CreateFence(llvm::Acquire, Scope); 1364 break; 1365 case 3: // memory_order_release 1366 Builder.CreateFence(llvm::Release, Scope); 1367 break; 1368 case 4: // memory_order_acq_rel 1369 Builder.CreateFence(llvm::AcquireRelease, Scope); 1370 break; 1371 case 5: // memory_order_seq_cst 1372 Builder.CreateFence(llvm::SequentiallyConsistent, Scope); 1373 break; 1374 } 1375 return RValue::get(nullptr); 1376 } 1377 1378 llvm::BasicBlock *AcquireBB, *ReleaseBB, *AcqRelBB, *SeqCstBB; 1379 AcquireBB = createBasicBlock("acquire", CurFn); 1380 ReleaseBB = createBasicBlock("release", CurFn); 1381 AcqRelBB = createBasicBlock("acqrel", CurFn); 1382 SeqCstBB = createBasicBlock("seqcst", CurFn); 1383 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1384 1385 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1386 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, ContBB); 1387 1388 Builder.SetInsertPoint(AcquireBB); 1389 Builder.CreateFence(llvm::Acquire, Scope); 1390 Builder.CreateBr(ContBB); 1391 SI->addCase(Builder.getInt32(1), AcquireBB); 1392 SI->addCase(Builder.getInt32(2), AcquireBB); 1393 1394 Builder.SetInsertPoint(ReleaseBB); 1395 Builder.CreateFence(llvm::Release, Scope); 1396 Builder.CreateBr(ContBB); 1397 SI->addCase(Builder.getInt32(3), ReleaseBB); 1398 1399 Builder.SetInsertPoint(AcqRelBB); 1400 Builder.CreateFence(llvm::AcquireRelease, Scope); 1401 Builder.CreateBr(ContBB); 1402 SI->addCase(Builder.getInt32(4), AcqRelBB); 1403 1404 Builder.SetInsertPoint(SeqCstBB); 1405 Builder.CreateFence(llvm::SequentiallyConsistent, Scope); 1406 Builder.CreateBr(ContBB); 1407 SI->addCase(Builder.getInt32(5), SeqCstBB); 1408 1409 Builder.SetInsertPoint(ContBB); 1410 return RValue::get(nullptr); 1411 } 1412 1413 // Library functions with special handling. 1414 case Builtin::BIsqrt: 1415 case Builtin::BIsqrtf: 1416 case Builtin::BIsqrtl: { 1417 // Transform a call to sqrt* into a @llvm.sqrt.* intrinsic call, but only 1418 // in finite- or unsafe-math mode (the intrinsic has different semantics 1419 // for handling negative numbers compared to the library function, so 1420 // -fmath-errno=0 is not enough). 1421 if (!FD->hasAttr<ConstAttr>()) 1422 break; 1423 if (!(CGM.getCodeGenOpts().UnsafeFPMath || 1424 CGM.getCodeGenOpts().NoNaNsFPMath)) 1425 break; 1426 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 1427 llvm::Type *ArgType = Arg0->getType(); 1428 Value *F = CGM.getIntrinsic(Intrinsic::sqrt, ArgType); 1429 return RValue::get(Builder.CreateCall(F, Arg0)); 1430 } 1431 1432 case Builtin::BI__builtin_pow: 1433 case Builtin::BI__builtin_powf: 1434 case Builtin::BI__builtin_powl: 1435 case Builtin::BIpow: 1436 case Builtin::BIpowf: 1437 case Builtin::BIpowl: { 1438 // Transform a call to pow* into a @llvm.pow.* intrinsic call. 1439 if (!FD->hasAttr<ConstAttr>()) 1440 break; 1441 Value *Base = EmitScalarExpr(E->getArg(0)); 1442 Value *Exponent = EmitScalarExpr(E->getArg(1)); 1443 llvm::Type *ArgType = Base->getType(); 1444 Value *F = CGM.getIntrinsic(Intrinsic::pow, ArgType); 1445 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 1446 } 1447 1448 case Builtin::BIfma: 1449 case Builtin::BIfmaf: 1450 case Builtin::BIfmal: 1451 case Builtin::BI__builtin_fma: 1452 case Builtin::BI__builtin_fmaf: 1453 case Builtin::BI__builtin_fmal: { 1454 // Rewrite fma to intrinsic. 1455 Value *FirstArg = EmitScalarExpr(E->getArg(0)); 1456 llvm::Type *ArgType = FirstArg->getType(); 1457 Value *F = CGM.getIntrinsic(Intrinsic::fma, ArgType); 1458 return RValue::get( 1459 Builder.CreateCall(F, {FirstArg, EmitScalarExpr(E->getArg(1)), 1460 EmitScalarExpr(E->getArg(2))})); 1461 } 1462 1463 case Builtin::BI__builtin_signbit: 1464 case Builtin::BI__builtin_signbitf: 1465 case Builtin::BI__builtin_signbitl: { 1466 return RValue::get( 1467 Builder.CreateZExt(EmitSignBit(*this, EmitScalarExpr(E->getArg(0))), 1468 ConvertType(E->getType()))); 1469 } 1470 case Builtin::BI__builtin_annotation: { 1471 llvm::Value *AnnVal = EmitScalarExpr(E->getArg(0)); 1472 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::annotation, 1473 AnnVal->getType()); 1474 1475 // Get the annotation string, go through casts. Sema requires this to be a 1476 // non-wide string literal, potentially casted, so the cast<> is safe. 1477 const Expr *AnnotationStrExpr = E->getArg(1)->IgnoreParenCasts(); 1478 StringRef Str = cast<StringLiteral>(AnnotationStrExpr)->getString(); 1479 return RValue::get(EmitAnnotationCall(F, AnnVal, Str, E->getExprLoc())); 1480 } 1481 case Builtin::BI__builtin_addcb: 1482 case Builtin::BI__builtin_addcs: 1483 case Builtin::BI__builtin_addc: 1484 case Builtin::BI__builtin_addcl: 1485 case Builtin::BI__builtin_addcll: 1486 case Builtin::BI__builtin_subcb: 1487 case Builtin::BI__builtin_subcs: 1488 case Builtin::BI__builtin_subc: 1489 case Builtin::BI__builtin_subcl: 1490 case Builtin::BI__builtin_subcll: { 1491 1492 // We translate all of these builtins from expressions of the form: 1493 // int x = ..., y = ..., carryin = ..., carryout, result; 1494 // result = __builtin_addc(x, y, carryin, &carryout); 1495 // 1496 // to LLVM IR of the form: 1497 // 1498 // %tmp1 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y) 1499 // %tmpsum1 = extractvalue {i32, i1} %tmp1, 0 1500 // %carry1 = extractvalue {i32, i1} %tmp1, 1 1501 // %tmp2 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %tmpsum1, 1502 // i32 %carryin) 1503 // %result = extractvalue {i32, i1} %tmp2, 0 1504 // %carry2 = extractvalue {i32, i1} %tmp2, 1 1505 // %tmp3 = or i1 %carry1, %carry2 1506 // %tmp4 = zext i1 %tmp3 to i32 1507 // store i32 %tmp4, i32* %carryout 1508 1509 // Scalarize our inputs. 1510 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1511 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1512 llvm::Value *Carryin = EmitScalarExpr(E->getArg(2)); 1513 Address CarryOutPtr = EmitPointerWithAlignment(E->getArg(3)); 1514 1515 // Decide if we are lowering to a uadd.with.overflow or usub.with.overflow. 1516 llvm::Intrinsic::ID IntrinsicId; 1517 switch (BuiltinID) { 1518 default: llvm_unreachable("Unknown multiprecision builtin id."); 1519 case Builtin::BI__builtin_addcb: 1520 case Builtin::BI__builtin_addcs: 1521 case Builtin::BI__builtin_addc: 1522 case Builtin::BI__builtin_addcl: 1523 case Builtin::BI__builtin_addcll: 1524 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1525 break; 1526 case Builtin::BI__builtin_subcb: 1527 case Builtin::BI__builtin_subcs: 1528 case Builtin::BI__builtin_subc: 1529 case Builtin::BI__builtin_subcl: 1530 case Builtin::BI__builtin_subcll: 1531 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1532 break; 1533 } 1534 1535 // Construct our resulting LLVM IR expression. 1536 llvm::Value *Carry1; 1537 llvm::Value *Sum1 = EmitOverflowIntrinsic(*this, IntrinsicId, 1538 X, Y, Carry1); 1539 llvm::Value *Carry2; 1540 llvm::Value *Sum2 = EmitOverflowIntrinsic(*this, IntrinsicId, 1541 Sum1, Carryin, Carry2); 1542 llvm::Value *CarryOut = Builder.CreateZExt(Builder.CreateOr(Carry1, Carry2), 1543 X->getType()); 1544 Builder.CreateStore(CarryOut, CarryOutPtr); 1545 return RValue::get(Sum2); 1546 } 1547 case Builtin::BI__builtin_uadd_overflow: 1548 case Builtin::BI__builtin_uaddl_overflow: 1549 case Builtin::BI__builtin_uaddll_overflow: 1550 case Builtin::BI__builtin_usub_overflow: 1551 case Builtin::BI__builtin_usubl_overflow: 1552 case Builtin::BI__builtin_usubll_overflow: 1553 case Builtin::BI__builtin_umul_overflow: 1554 case Builtin::BI__builtin_umull_overflow: 1555 case Builtin::BI__builtin_umulll_overflow: 1556 case Builtin::BI__builtin_sadd_overflow: 1557 case Builtin::BI__builtin_saddl_overflow: 1558 case Builtin::BI__builtin_saddll_overflow: 1559 case Builtin::BI__builtin_ssub_overflow: 1560 case Builtin::BI__builtin_ssubl_overflow: 1561 case Builtin::BI__builtin_ssubll_overflow: 1562 case Builtin::BI__builtin_smul_overflow: 1563 case Builtin::BI__builtin_smull_overflow: 1564 case Builtin::BI__builtin_smulll_overflow: { 1565 1566 // We translate all of these builtins directly to the relevant llvm IR node. 1567 1568 // Scalarize our inputs. 1569 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1570 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1571 Address SumOutPtr = EmitPointerWithAlignment(E->getArg(2)); 1572 1573 // Decide which of the overflow intrinsics we are lowering to: 1574 llvm::Intrinsic::ID IntrinsicId; 1575 switch (BuiltinID) { 1576 default: llvm_unreachable("Unknown security overflow builtin id."); 1577 case Builtin::BI__builtin_uadd_overflow: 1578 case Builtin::BI__builtin_uaddl_overflow: 1579 case Builtin::BI__builtin_uaddll_overflow: 1580 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1581 break; 1582 case Builtin::BI__builtin_usub_overflow: 1583 case Builtin::BI__builtin_usubl_overflow: 1584 case Builtin::BI__builtin_usubll_overflow: 1585 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1586 break; 1587 case Builtin::BI__builtin_umul_overflow: 1588 case Builtin::BI__builtin_umull_overflow: 1589 case Builtin::BI__builtin_umulll_overflow: 1590 IntrinsicId = llvm::Intrinsic::umul_with_overflow; 1591 break; 1592 case Builtin::BI__builtin_sadd_overflow: 1593 case Builtin::BI__builtin_saddl_overflow: 1594 case Builtin::BI__builtin_saddll_overflow: 1595 IntrinsicId = llvm::Intrinsic::sadd_with_overflow; 1596 break; 1597 case Builtin::BI__builtin_ssub_overflow: 1598 case Builtin::BI__builtin_ssubl_overflow: 1599 case Builtin::BI__builtin_ssubll_overflow: 1600 IntrinsicId = llvm::Intrinsic::ssub_with_overflow; 1601 break; 1602 case Builtin::BI__builtin_smul_overflow: 1603 case Builtin::BI__builtin_smull_overflow: 1604 case Builtin::BI__builtin_smulll_overflow: 1605 IntrinsicId = llvm::Intrinsic::smul_with_overflow; 1606 break; 1607 } 1608 1609 1610 llvm::Value *Carry; 1611 llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry); 1612 Builder.CreateStore(Sum, SumOutPtr); 1613 1614 return RValue::get(Carry); 1615 } 1616 case Builtin::BI__builtin_addressof: 1617 return RValue::get(EmitLValue(E->getArg(0)).getPointer()); 1618 case Builtin::BI__builtin_operator_new: 1619 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 1620 E->getArg(0), false); 1621 case Builtin::BI__builtin_operator_delete: 1622 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 1623 E->getArg(0), true); 1624 case Builtin::BI__noop: 1625 // __noop always evaluates to an integer literal zero. 1626 return RValue::get(ConstantInt::get(IntTy, 0)); 1627 case Builtin::BI__builtin_call_with_static_chain: { 1628 const CallExpr *Call = cast<CallExpr>(E->getArg(0)); 1629 const Expr *Chain = E->getArg(1); 1630 return EmitCall(Call->getCallee()->getType(), 1631 EmitScalarExpr(Call->getCallee()), Call, ReturnValue, 1632 Call->getCalleeDecl(), EmitScalarExpr(Chain)); 1633 } 1634 case Builtin::BI_InterlockedExchange: 1635 case Builtin::BI_InterlockedExchangePointer: 1636 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1637 case Builtin::BI_InterlockedCompareExchangePointer: { 1638 llvm::Type *RTy; 1639 llvm::IntegerType *IntType = 1640 IntegerType::get(getLLVMContext(), 1641 getContext().getTypeSize(E->getType())); 1642 llvm::Type *IntPtrType = IntType->getPointerTo(); 1643 1644 llvm::Value *Destination = 1645 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), IntPtrType); 1646 1647 llvm::Value *Exchange = EmitScalarExpr(E->getArg(1)); 1648 RTy = Exchange->getType(); 1649 Exchange = Builder.CreatePtrToInt(Exchange, IntType); 1650 1651 llvm::Value *Comparand = 1652 Builder.CreatePtrToInt(EmitScalarExpr(E->getArg(2)), IntType); 1653 1654 auto Result = Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 1655 SequentiallyConsistent, 1656 SequentiallyConsistent); 1657 Result->setVolatile(true); 1658 1659 return RValue::get(Builder.CreateIntToPtr(Builder.CreateExtractValue(Result, 1660 0), 1661 RTy)); 1662 } 1663 case Builtin::BI_InterlockedCompareExchange: { 1664 AtomicCmpXchgInst *CXI = Builder.CreateAtomicCmpXchg( 1665 EmitScalarExpr(E->getArg(0)), 1666 EmitScalarExpr(E->getArg(2)), 1667 EmitScalarExpr(E->getArg(1)), 1668 SequentiallyConsistent, 1669 SequentiallyConsistent); 1670 CXI->setVolatile(true); 1671 return RValue::get(Builder.CreateExtractValue(CXI, 0)); 1672 } 1673 case Builtin::BI_InterlockedIncrement: { 1674 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 1675 AtomicRMWInst::Add, 1676 EmitScalarExpr(E->getArg(0)), 1677 ConstantInt::get(Int32Ty, 1), 1678 llvm::SequentiallyConsistent); 1679 RMWI->setVolatile(true); 1680 return RValue::get(Builder.CreateAdd(RMWI, ConstantInt::get(Int32Ty, 1))); 1681 } 1682 case Builtin::BI_InterlockedDecrement: { 1683 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 1684 AtomicRMWInst::Sub, 1685 EmitScalarExpr(E->getArg(0)), 1686 ConstantInt::get(Int32Ty, 1), 1687 llvm::SequentiallyConsistent); 1688 RMWI->setVolatile(true); 1689 return RValue::get(Builder.CreateSub(RMWI, ConstantInt::get(Int32Ty, 1))); 1690 } 1691 case Builtin::BI_InterlockedExchangeAdd: { 1692 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 1693 AtomicRMWInst::Add, 1694 EmitScalarExpr(E->getArg(0)), 1695 EmitScalarExpr(E->getArg(1)), 1696 llvm::SequentiallyConsistent); 1697 RMWI->setVolatile(true); 1698 return RValue::get(RMWI); 1699 } 1700 case Builtin::BI__readfsdword: { 1701 Value *IntToPtr = 1702 Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)), 1703 llvm::PointerType::get(CGM.Int32Ty, 257)); 1704 LoadInst *Load = 1705 Builder.CreateAlignedLoad(IntToPtr, /*Align=*/4, /*isVolatile=*/true); 1706 return RValue::get(Load); 1707 } 1708 1709 case Builtin::BI__exception_code: 1710 case Builtin::BI_exception_code: 1711 return RValue::get(EmitSEHExceptionCode()); 1712 case Builtin::BI__exception_info: 1713 case Builtin::BI_exception_info: 1714 return RValue::get(EmitSEHExceptionInfo()); 1715 case Builtin::BI__abnormal_termination: 1716 case Builtin::BI_abnormal_termination: 1717 return RValue::get(EmitSEHAbnormalTermination()); 1718 case Builtin::BI_setjmpex: { 1719 if (getTarget().getTriple().isOSMSVCRT()) { 1720 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 1721 llvm::AttributeSet ReturnsTwiceAttr = 1722 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 1723 llvm::Attribute::ReturnsTwice); 1724 llvm::Constant *SetJmpEx = CGM.CreateRuntimeFunction( 1725 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 1726 "_setjmpex", ReturnsTwiceAttr); 1727 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 1728 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 1729 llvm::Value *FrameAddr = 1730 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1731 ConstantInt::get(Int32Ty, 0)); 1732 llvm::Value *Args[] = {Buf, FrameAddr}; 1733 llvm::CallSite CS = EmitRuntimeCallOrInvoke(SetJmpEx, Args); 1734 CS.setAttributes(ReturnsTwiceAttr); 1735 return RValue::get(CS.getInstruction()); 1736 } 1737 break; 1738 } 1739 case Builtin::BI_setjmp: { 1740 if (getTarget().getTriple().isOSMSVCRT()) { 1741 llvm::AttributeSet ReturnsTwiceAttr = 1742 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 1743 llvm::Attribute::ReturnsTwice); 1744 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 1745 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 1746 llvm::CallSite CS; 1747 if (getTarget().getTriple().getArch() == llvm::Triple::x86) { 1748 llvm::Type *ArgTypes[] = {Int8PtrTy, IntTy}; 1749 llvm::Constant *SetJmp3 = CGM.CreateRuntimeFunction( 1750 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/true), 1751 "_setjmp3", ReturnsTwiceAttr); 1752 llvm::Value *Count = ConstantInt::get(IntTy, 0); 1753 llvm::Value *Args[] = {Buf, Count}; 1754 CS = EmitRuntimeCallOrInvoke(SetJmp3, Args); 1755 } else { 1756 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 1757 llvm::Constant *SetJmp = CGM.CreateRuntimeFunction( 1758 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 1759 "_setjmp", ReturnsTwiceAttr); 1760 llvm::Value *FrameAddr = 1761 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1762 ConstantInt::get(Int32Ty, 0)); 1763 llvm::Value *Args[] = {Buf, FrameAddr}; 1764 CS = EmitRuntimeCallOrInvoke(SetJmp, Args); 1765 } 1766 CS.setAttributes(ReturnsTwiceAttr); 1767 return RValue::get(CS.getInstruction()); 1768 } 1769 break; 1770 } 1771 1772 case Builtin::BI__GetExceptionInfo: { 1773 if (llvm::GlobalVariable *GV = 1774 CGM.getCXXABI().getThrowInfo(FD->getParamDecl(0)->getType())) 1775 return RValue::get(llvm::ConstantExpr::getBitCast(GV, CGM.Int8PtrTy)); 1776 break; 1777 } 1778 } 1779 1780 // If this is an alias for a lib function (e.g. __builtin_sin), emit 1781 // the call using the normal call path, but using the unmangled 1782 // version of the function name. 1783 if (getContext().BuiltinInfo.isLibFunction(BuiltinID)) 1784 return emitLibraryCall(*this, FD, E, 1785 CGM.getBuiltinLibFunction(FD, BuiltinID)); 1786 1787 // If this is a predefined lib function (e.g. malloc), emit the call 1788 // using exactly the normal call path. 1789 if (getContext().BuiltinInfo.isPredefinedLibFunction(BuiltinID)) 1790 return emitLibraryCall(*this, FD, E, EmitScalarExpr(E->getCallee())); 1791 1792 // See if we have a target specific intrinsic. 1793 const char *Name = getContext().BuiltinInfo.getName(BuiltinID); 1794 Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; 1795 if (const char *Prefix = 1796 llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch())) { 1797 IntrinsicID = Intrinsic::getIntrinsicForGCCBuiltin(Prefix, Name); 1798 // NOTE we dont need to perform a compatibility flag check here since the 1799 // intrinsics are declared in Builtins*.def via LANGBUILTIN which filter the 1800 // MS builtins via ALL_MS_LANGUAGES and are filtered earlier. 1801 if (IntrinsicID == Intrinsic::not_intrinsic) 1802 IntrinsicID = Intrinsic::getIntrinsicForMSBuiltin(Prefix, Name); 1803 } 1804 1805 if (IntrinsicID != Intrinsic::not_intrinsic) { 1806 SmallVector<Value*, 16> Args; 1807 1808 // Find out if any arguments are required to be integer constant 1809 // expressions. 1810 unsigned ICEArguments = 0; 1811 ASTContext::GetBuiltinTypeError Error; 1812 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 1813 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 1814 1815 Function *F = CGM.getIntrinsic(IntrinsicID); 1816 llvm::FunctionType *FTy = F->getFunctionType(); 1817 1818 for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) { 1819 Value *ArgValue; 1820 // If this is a normal argument, just emit it as a scalar. 1821 if ((ICEArguments & (1 << i)) == 0) { 1822 ArgValue = EmitScalarExpr(E->getArg(i)); 1823 } else { 1824 // If this is required to be a constant, constant fold it so that we 1825 // know that the generated intrinsic gets a ConstantInt. 1826 llvm::APSInt Result; 1827 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result,getContext()); 1828 assert(IsConst && "Constant arg isn't actually constant?"); 1829 (void)IsConst; 1830 ArgValue = llvm::ConstantInt::get(getLLVMContext(), Result); 1831 } 1832 1833 // If the intrinsic arg type is different from the builtin arg type 1834 // we need to do a bit cast. 1835 llvm::Type *PTy = FTy->getParamType(i); 1836 if (PTy != ArgValue->getType()) { 1837 assert(PTy->canLosslesslyBitCastTo(FTy->getParamType(i)) && 1838 "Must be able to losslessly bit cast to param"); 1839 ArgValue = Builder.CreateBitCast(ArgValue, PTy); 1840 } 1841 1842 Args.push_back(ArgValue); 1843 } 1844 1845 Value *V = Builder.CreateCall(F, Args); 1846 QualType BuiltinRetType = E->getType(); 1847 1848 llvm::Type *RetTy = VoidTy; 1849 if (!BuiltinRetType->isVoidType()) 1850 RetTy = ConvertType(BuiltinRetType); 1851 1852 if (RetTy != V->getType()) { 1853 assert(V->getType()->canLosslesslyBitCastTo(RetTy) && 1854 "Must be able to losslessly bit cast result type"); 1855 V = Builder.CreateBitCast(V, RetTy); 1856 } 1857 1858 return RValue::get(V); 1859 } 1860 1861 // See if we have a target specific builtin that needs to be lowered. 1862 if (Value *V = EmitTargetBuiltinExpr(BuiltinID, E)) 1863 return RValue::get(V); 1864 1865 ErrorUnsupported(E, "builtin function"); 1866 1867 // Unknown builtin, for now just dump it out and return undef. 1868 return GetUndefRValue(E->getType()); 1869 } 1870 1871 static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF, 1872 unsigned BuiltinID, const CallExpr *E, 1873 llvm::Triple::ArchType Arch) { 1874 switch (Arch) { 1875 case llvm::Triple::arm: 1876 case llvm::Triple::armeb: 1877 case llvm::Triple::thumb: 1878 case llvm::Triple::thumbeb: 1879 return CGF->EmitARMBuiltinExpr(BuiltinID, E); 1880 case llvm::Triple::aarch64: 1881 case llvm::Triple::aarch64_be: 1882 return CGF->EmitAArch64BuiltinExpr(BuiltinID, E); 1883 case llvm::Triple::x86: 1884 case llvm::Triple::x86_64: 1885 return CGF->EmitX86BuiltinExpr(BuiltinID, E); 1886 case llvm::Triple::ppc: 1887 case llvm::Triple::ppc64: 1888 case llvm::Triple::ppc64le: 1889 return CGF->EmitPPCBuiltinExpr(BuiltinID, E); 1890 case llvm::Triple::r600: 1891 case llvm::Triple::amdgcn: 1892 return CGF->EmitAMDGPUBuiltinExpr(BuiltinID, E); 1893 case llvm::Triple::systemz: 1894 return CGF->EmitSystemZBuiltinExpr(BuiltinID, E); 1895 case llvm::Triple::nvptx: 1896 case llvm::Triple::nvptx64: 1897 return CGF->EmitNVPTXBuiltinExpr(BuiltinID, E); 1898 case llvm::Triple::wasm32: 1899 case llvm::Triple::wasm64: 1900 return CGF->EmitWebAssemblyBuiltinExpr(BuiltinID, E); 1901 default: 1902 return nullptr; 1903 } 1904 } 1905 1906 Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID, 1907 const CallExpr *E) { 1908 if (getContext().BuiltinInfo.isAuxBuiltinID(BuiltinID)) { 1909 assert(getContext().getAuxTargetInfo() && "Missing aux target info"); 1910 return EmitTargetArchBuiltinExpr( 1911 this, getContext().BuiltinInfo.getAuxBuiltinID(BuiltinID), E, 1912 getContext().getAuxTargetInfo()->getTriple().getArch()); 1913 } 1914 1915 return EmitTargetArchBuiltinExpr(this, BuiltinID, E, 1916 getTarget().getTriple().getArch()); 1917 } 1918 1919 static llvm::VectorType *GetNeonType(CodeGenFunction *CGF, 1920 NeonTypeFlags TypeFlags, 1921 bool V1Ty=false) { 1922 int IsQuad = TypeFlags.isQuad(); 1923 switch (TypeFlags.getEltType()) { 1924 case NeonTypeFlags::Int8: 1925 case NeonTypeFlags::Poly8: 1926 return llvm::VectorType::get(CGF->Int8Ty, V1Ty ? 1 : (8 << IsQuad)); 1927 case NeonTypeFlags::Int16: 1928 case NeonTypeFlags::Poly16: 1929 case NeonTypeFlags::Float16: 1930 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 1931 case NeonTypeFlags::Int32: 1932 return llvm::VectorType::get(CGF->Int32Ty, V1Ty ? 1 : (2 << IsQuad)); 1933 case NeonTypeFlags::Int64: 1934 case NeonTypeFlags::Poly64: 1935 return llvm::VectorType::get(CGF->Int64Ty, V1Ty ? 1 : (1 << IsQuad)); 1936 case NeonTypeFlags::Poly128: 1937 // FIXME: i128 and f128 doesn't get fully support in Clang and llvm. 1938 // There is a lot of i128 and f128 API missing. 1939 // so we use v16i8 to represent poly128 and get pattern matched. 1940 return llvm::VectorType::get(CGF->Int8Ty, 16); 1941 case NeonTypeFlags::Float32: 1942 return llvm::VectorType::get(CGF->FloatTy, V1Ty ? 1 : (2 << IsQuad)); 1943 case NeonTypeFlags::Float64: 1944 return llvm::VectorType::get(CGF->DoubleTy, V1Ty ? 1 : (1 << IsQuad)); 1945 } 1946 llvm_unreachable("Unknown vector element type!"); 1947 } 1948 1949 static llvm::VectorType *GetFloatNeonType(CodeGenFunction *CGF, 1950 NeonTypeFlags IntTypeFlags) { 1951 int IsQuad = IntTypeFlags.isQuad(); 1952 switch (IntTypeFlags.getEltType()) { 1953 case NeonTypeFlags::Int32: 1954 return llvm::VectorType::get(CGF->FloatTy, (2 << IsQuad)); 1955 case NeonTypeFlags::Int64: 1956 return llvm::VectorType::get(CGF->DoubleTy, (1 << IsQuad)); 1957 default: 1958 llvm_unreachable("Type can't be converted to floating-point!"); 1959 } 1960 } 1961 1962 Value *CodeGenFunction::EmitNeonSplat(Value *V, Constant *C) { 1963 unsigned nElts = cast<llvm::VectorType>(V->getType())->getNumElements(); 1964 Value* SV = llvm::ConstantVector::getSplat(nElts, C); 1965 return Builder.CreateShuffleVector(V, V, SV, "lane"); 1966 } 1967 1968 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, 1969 const char *name, 1970 unsigned shift, bool rightshift) { 1971 unsigned j = 0; 1972 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 1973 ai != ae; ++ai, ++j) 1974 if (shift > 0 && shift == j) 1975 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); 1976 else 1977 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); 1978 1979 return Builder.CreateCall(F, Ops, name); 1980 } 1981 1982 Value *CodeGenFunction::EmitNeonShiftVector(Value *V, llvm::Type *Ty, 1983 bool neg) { 1984 int SV = cast<ConstantInt>(V)->getSExtValue(); 1985 return ConstantInt::get(Ty, neg ? -SV : SV); 1986 } 1987 1988 // \brief Right-shift a vector by a constant. 1989 Value *CodeGenFunction::EmitNeonRShiftImm(Value *Vec, Value *Shift, 1990 llvm::Type *Ty, bool usgn, 1991 const char *name) { 1992 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 1993 1994 int ShiftAmt = cast<ConstantInt>(Shift)->getSExtValue(); 1995 int EltSize = VTy->getScalarSizeInBits(); 1996 1997 Vec = Builder.CreateBitCast(Vec, Ty); 1998 1999 // lshr/ashr are undefined when the shift amount is equal to the vector 2000 // element size. 2001 if (ShiftAmt == EltSize) { 2002 if (usgn) { 2003 // Right-shifting an unsigned value by its size yields 0. 2004 return llvm::ConstantAggregateZero::get(VTy); 2005 } else { 2006 // Right-shifting a signed value by its size is equivalent 2007 // to a shift of size-1. 2008 --ShiftAmt; 2009 Shift = ConstantInt::get(VTy->getElementType(), ShiftAmt); 2010 } 2011 } 2012 2013 Shift = EmitNeonShiftVector(Shift, Ty, false); 2014 if (usgn) 2015 return Builder.CreateLShr(Vec, Shift, name); 2016 else 2017 return Builder.CreateAShr(Vec, Shift, name); 2018 } 2019 2020 enum { 2021 AddRetType = (1 << 0), 2022 Add1ArgType = (1 << 1), 2023 Add2ArgTypes = (1 << 2), 2024 2025 VectorizeRetType = (1 << 3), 2026 VectorizeArgTypes = (1 << 4), 2027 2028 InventFloatType = (1 << 5), 2029 UnsignedAlts = (1 << 6), 2030 2031 Use64BitVectors = (1 << 7), 2032 Use128BitVectors = (1 << 8), 2033 2034 Vectorize1ArgType = Add1ArgType | VectorizeArgTypes, 2035 VectorRet = AddRetType | VectorizeRetType, 2036 VectorRetGetArgs01 = 2037 AddRetType | Add2ArgTypes | VectorizeRetType | VectorizeArgTypes, 2038 FpCmpzModifiers = 2039 AddRetType | VectorizeRetType | Add1ArgType | InventFloatType 2040 }; 2041 2042 struct NeonIntrinsicInfo { 2043 unsigned BuiltinID; 2044 unsigned LLVMIntrinsic; 2045 unsigned AltLLVMIntrinsic; 2046 const char *NameHint; 2047 unsigned TypeModifier; 2048 2049 bool operator<(unsigned RHSBuiltinID) const { 2050 return BuiltinID < RHSBuiltinID; 2051 } 2052 }; 2053 2054 #define NEONMAP0(NameBase) \ 2055 { NEON::BI__builtin_neon_ ## NameBase, 0, 0, #NameBase, 0 } 2056 2057 #define NEONMAP1(NameBase, LLVMIntrinsic, TypeModifier) \ 2058 { NEON:: BI__builtin_neon_ ## NameBase, \ 2059 Intrinsic::LLVMIntrinsic, 0, #NameBase, TypeModifier } 2060 2061 #define NEONMAP2(NameBase, LLVMIntrinsic, AltLLVMIntrinsic, TypeModifier) \ 2062 { NEON:: BI__builtin_neon_ ## NameBase, \ 2063 Intrinsic::LLVMIntrinsic, Intrinsic::AltLLVMIntrinsic, \ 2064 #NameBase, TypeModifier } 2065 2066 static NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = { 2067 NEONMAP2(vabd_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 2068 NEONMAP2(vabdq_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 2069 NEONMAP1(vabs_v, arm_neon_vabs, 0), 2070 NEONMAP1(vabsq_v, arm_neon_vabs, 0), 2071 NEONMAP0(vaddhn_v), 2072 NEONMAP1(vaesdq_v, arm_neon_aesd, 0), 2073 NEONMAP1(vaeseq_v, arm_neon_aese, 0), 2074 NEONMAP1(vaesimcq_v, arm_neon_aesimc, 0), 2075 NEONMAP1(vaesmcq_v, arm_neon_aesmc, 0), 2076 NEONMAP1(vbsl_v, arm_neon_vbsl, AddRetType), 2077 NEONMAP1(vbslq_v, arm_neon_vbsl, AddRetType), 2078 NEONMAP1(vcage_v, arm_neon_vacge, 0), 2079 NEONMAP1(vcageq_v, arm_neon_vacge, 0), 2080 NEONMAP1(vcagt_v, arm_neon_vacgt, 0), 2081 NEONMAP1(vcagtq_v, arm_neon_vacgt, 0), 2082 NEONMAP1(vcale_v, arm_neon_vacge, 0), 2083 NEONMAP1(vcaleq_v, arm_neon_vacge, 0), 2084 NEONMAP1(vcalt_v, arm_neon_vacgt, 0), 2085 NEONMAP1(vcaltq_v, arm_neon_vacgt, 0), 2086 NEONMAP1(vcls_v, arm_neon_vcls, Add1ArgType), 2087 NEONMAP1(vclsq_v, arm_neon_vcls, Add1ArgType), 2088 NEONMAP1(vclz_v, ctlz, Add1ArgType), 2089 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 2090 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 2091 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 2092 NEONMAP1(vcvt_f16_f32, arm_neon_vcvtfp2hf, 0), 2093 NEONMAP1(vcvt_f32_f16, arm_neon_vcvthf2fp, 0), 2094 NEONMAP0(vcvt_f32_v), 2095 NEONMAP2(vcvt_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 2096 NEONMAP1(vcvt_n_s32_v, arm_neon_vcvtfp2fxs, 0), 2097 NEONMAP1(vcvt_n_s64_v, arm_neon_vcvtfp2fxs, 0), 2098 NEONMAP1(vcvt_n_u32_v, arm_neon_vcvtfp2fxu, 0), 2099 NEONMAP1(vcvt_n_u64_v, arm_neon_vcvtfp2fxu, 0), 2100 NEONMAP0(vcvt_s32_v), 2101 NEONMAP0(vcvt_s64_v), 2102 NEONMAP0(vcvt_u32_v), 2103 NEONMAP0(vcvt_u64_v), 2104 NEONMAP1(vcvta_s32_v, arm_neon_vcvtas, 0), 2105 NEONMAP1(vcvta_s64_v, arm_neon_vcvtas, 0), 2106 NEONMAP1(vcvta_u32_v, arm_neon_vcvtau, 0), 2107 NEONMAP1(vcvta_u64_v, arm_neon_vcvtau, 0), 2108 NEONMAP1(vcvtaq_s32_v, arm_neon_vcvtas, 0), 2109 NEONMAP1(vcvtaq_s64_v, arm_neon_vcvtas, 0), 2110 NEONMAP1(vcvtaq_u32_v, arm_neon_vcvtau, 0), 2111 NEONMAP1(vcvtaq_u64_v, arm_neon_vcvtau, 0), 2112 NEONMAP1(vcvtm_s32_v, arm_neon_vcvtms, 0), 2113 NEONMAP1(vcvtm_s64_v, arm_neon_vcvtms, 0), 2114 NEONMAP1(vcvtm_u32_v, arm_neon_vcvtmu, 0), 2115 NEONMAP1(vcvtm_u64_v, arm_neon_vcvtmu, 0), 2116 NEONMAP1(vcvtmq_s32_v, arm_neon_vcvtms, 0), 2117 NEONMAP1(vcvtmq_s64_v, arm_neon_vcvtms, 0), 2118 NEONMAP1(vcvtmq_u32_v, arm_neon_vcvtmu, 0), 2119 NEONMAP1(vcvtmq_u64_v, arm_neon_vcvtmu, 0), 2120 NEONMAP1(vcvtn_s32_v, arm_neon_vcvtns, 0), 2121 NEONMAP1(vcvtn_s64_v, arm_neon_vcvtns, 0), 2122 NEONMAP1(vcvtn_u32_v, arm_neon_vcvtnu, 0), 2123 NEONMAP1(vcvtn_u64_v, arm_neon_vcvtnu, 0), 2124 NEONMAP1(vcvtnq_s32_v, arm_neon_vcvtns, 0), 2125 NEONMAP1(vcvtnq_s64_v, arm_neon_vcvtns, 0), 2126 NEONMAP1(vcvtnq_u32_v, arm_neon_vcvtnu, 0), 2127 NEONMAP1(vcvtnq_u64_v, arm_neon_vcvtnu, 0), 2128 NEONMAP1(vcvtp_s32_v, arm_neon_vcvtps, 0), 2129 NEONMAP1(vcvtp_s64_v, arm_neon_vcvtps, 0), 2130 NEONMAP1(vcvtp_u32_v, arm_neon_vcvtpu, 0), 2131 NEONMAP1(vcvtp_u64_v, arm_neon_vcvtpu, 0), 2132 NEONMAP1(vcvtpq_s32_v, arm_neon_vcvtps, 0), 2133 NEONMAP1(vcvtpq_s64_v, arm_neon_vcvtps, 0), 2134 NEONMAP1(vcvtpq_u32_v, arm_neon_vcvtpu, 0), 2135 NEONMAP1(vcvtpq_u64_v, arm_neon_vcvtpu, 0), 2136 NEONMAP0(vcvtq_f32_v), 2137 NEONMAP2(vcvtq_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 2138 NEONMAP1(vcvtq_n_s32_v, arm_neon_vcvtfp2fxs, 0), 2139 NEONMAP1(vcvtq_n_s64_v, arm_neon_vcvtfp2fxs, 0), 2140 NEONMAP1(vcvtq_n_u32_v, arm_neon_vcvtfp2fxu, 0), 2141 NEONMAP1(vcvtq_n_u64_v, arm_neon_vcvtfp2fxu, 0), 2142 NEONMAP0(vcvtq_s32_v), 2143 NEONMAP0(vcvtq_s64_v), 2144 NEONMAP0(vcvtq_u32_v), 2145 NEONMAP0(vcvtq_u64_v), 2146 NEONMAP0(vext_v), 2147 NEONMAP0(vextq_v), 2148 NEONMAP0(vfma_v), 2149 NEONMAP0(vfmaq_v), 2150 NEONMAP2(vhadd_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 2151 NEONMAP2(vhaddq_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 2152 NEONMAP2(vhsub_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 2153 NEONMAP2(vhsubq_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 2154 NEONMAP0(vld1_dup_v), 2155 NEONMAP1(vld1_v, arm_neon_vld1, 0), 2156 NEONMAP0(vld1q_dup_v), 2157 NEONMAP1(vld1q_v, arm_neon_vld1, 0), 2158 NEONMAP1(vld2_lane_v, arm_neon_vld2lane, 0), 2159 NEONMAP1(vld2_v, arm_neon_vld2, 0), 2160 NEONMAP1(vld2q_lane_v, arm_neon_vld2lane, 0), 2161 NEONMAP1(vld2q_v, arm_neon_vld2, 0), 2162 NEONMAP1(vld3_lane_v, arm_neon_vld3lane, 0), 2163 NEONMAP1(vld3_v, arm_neon_vld3, 0), 2164 NEONMAP1(vld3q_lane_v, arm_neon_vld3lane, 0), 2165 NEONMAP1(vld3q_v, arm_neon_vld3, 0), 2166 NEONMAP1(vld4_lane_v, arm_neon_vld4lane, 0), 2167 NEONMAP1(vld4_v, arm_neon_vld4, 0), 2168 NEONMAP1(vld4q_lane_v, arm_neon_vld4lane, 0), 2169 NEONMAP1(vld4q_v, arm_neon_vld4, 0), 2170 NEONMAP2(vmax_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 2171 NEONMAP1(vmaxnm_v, arm_neon_vmaxnm, Add1ArgType), 2172 NEONMAP1(vmaxnmq_v, arm_neon_vmaxnm, Add1ArgType), 2173 NEONMAP2(vmaxq_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 2174 NEONMAP2(vmin_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 2175 NEONMAP1(vminnm_v, arm_neon_vminnm, Add1ArgType), 2176 NEONMAP1(vminnmq_v, arm_neon_vminnm, Add1ArgType), 2177 NEONMAP2(vminq_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 2178 NEONMAP0(vmovl_v), 2179 NEONMAP0(vmovn_v), 2180 NEONMAP1(vmul_v, arm_neon_vmulp, Add1ArgType), 2181 NEONMAP0(vmull_v), 2182 NEONMAP1(vmulq_v, arm_neon_vmulp, Add1ArgType), 2183 NEONMAP2(vpadal_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 2184 NEONMAP2(vpadalq_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 2185 NEONMAP1(vpadd_v, arm_neon_vpadd, Add1ArgType), 2186 NEONMAP2(vpaddl_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 2187 NEONMAP2(vpaddlq_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 2188 NEONMAP1(vpaddq_v, arm_neon_vpadd, Add1ArgType), 2189 NEONMAP2(vpmax_v, arm_neon_vpmaxu, arm_neon_vpmaxs, Add1ArgType | UnsignedAlts), 2190 NEONMAP2(vpmin_v, arm_neon_vpminu, arm_neon_vpmins, Add1ArgType | UnsignedAlts), 2191 NEONMAP1(vqabs_v, arm_neon_vqabs, Add1ArgType), 2192 NEONMAP1(vqabsq_v, arm_neon_vqabs, Add1ArgType), 2193 NEONMAP2(vqadd_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 2194 NEONMAP2(vqaddq_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 2195 NEONMAP2(vqdmlal_v, arm_neon_vqdmull, arm_neon_vqadds, 0), 2196 NEONMAP2(vqdmlsl_v, arm_neon_vqdmull, arm_neon_vqsubs, 0), 2197 NEONMAP1(vqdmulh_v, arm_neon_vqdmulh, Add1ArgType), 2198 NEONMAP1(vqdmulhq_v, arm_neon_vqdmulh, Add1ArgType), 2199 NEONMAP1(vqdmull_v, arm_neon_vqdmull, Add1ArgType), 2200 NEONMAP2(vqmovn_v, arm_neon_vqmovnu, arm_neon_vqmovns, Add1ArgType | UnsignedAlts), 2201 NEONMAP1(vqmovun_v, arm_neon_vqmovnsu, Add1ArgType), 2202 NEONMAP1(vqneg_v, arm_neon_vqneg, Add1ArgType), 2203 NEONMAP1(vqnegq_v, arm_neon_vqneg, Add1ArgType), 2204 NEONMAP1(vqrdmulh_v, arm_neon_vqrdmulh, Add1ArgType), 2205 NEONMAP1(vqrdmulhq_v, arm_neon_vqrdmulh, Add1ArgType), 2206 NEONMAP2(vqrshl_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 2207 NEONMAP2(vqrshlq_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 2208 NEONMAP2(vqshl_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 2209 NEONMAP2(vqshl_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 2210 NEONMAP2(vqshlq_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 2211 NEONMAP2(vqshlq_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 2212 NEONMAP1(vqshlu_n_v, arm_neon_vqshiftsu, 0), 2213 NEONMAP1(vqshluq_n_v, arm_neon_vqshiftsu, 0), 2214 NEONMAP2(vqsub_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 2215 NEONMAP2(vqsubq_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 2216 NEONMAP1(vraddhn_v, arm_neon_vraddhn, Add1ArgType), 2217 NEONMAP2(vrecpe_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 2218 NEONMAP2(vrecpeq_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 2219 NEONMAP1(vrecps_v, arm_neon_vrecps, Add1ArgType), 2220 NEONMAP1(vrecpsq_v, arm_neon_vrecps, Add1ArgType), 2221 NEONMAP2(vrhadd_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 2222 NEONMAP2(vrhaddq_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 2223 NEONMAP1(vrnd_v, arm_neon_vrintz, Add1ArgType), 2224 NEONMAP1(vrnda_v, arm_neon_vrinta, Add1ArgType), 2225 NEONMAP1(vrndaq_v, arm_neon_vrinta, Add1ArgType), 2226 NEONMAP1(vrndm_v, arm_neon_vrintm, Add1ArgType), 2227 NEONMAP1(vrndmq_v, arm_neon_vrintm, Add1ArgType), 2228 NEONMAP1(vrndn_v, arm_neon_vrintn, Add1ArgType), 2229 NEONMAP1(vrndnq_v, arm_neon_vrintn, Add1ArgType), 2230 NEONMAP1(vrndp_v, arm_neon_vrintp, Add1ArgType), 2231 NEONMAP1(vrndpq_v, arm_neon_vrintp, Add1ArgType), 2232 NEONMAP1(vrndq_v, arm_neon_vrintz, Add1ArgType), 2233 NEONMAP1(vrndx_v, arm_neon_vrintx, Add1ArgType), 2234 NEONMAP1(vrndxq_v, arm_neon_vrintx, Add1ArgType), 2235 NEONMAP2(vrshl_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 2236 NEONMAP2(vrshlq_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 2237 NEONMAP2(vrshr_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 2238 NEONMAP2(vrshrq_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 2239 NEONMAP2(vrsqrte_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 2240 NEONMAP2(vrsqrteq_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 2241 NEONMAP1(vrsqrts_v, arm_neon_vrsqrts, Add1ArgType), 2242 NEONMAP1(vrsqrtsq_v, arm_neon_vrsqrts, Add1ArgType), 2243 NEONMAP1(vrsubhn_v, arm_neon_vrsubhn, Add1ArgType), 2244 NEONMAP1(vsha1su0q_v, arm_neon_sha1su0, 0), 2245 NEONMAP1(vsha1su1q_v, arm_neon_sha1su1, 0), 2246 NEONMAP1(vsha256h2q_v, arm_neon_sha256h2, 0), 2247 NEONMAP1(vsha256hq_v, arm_neon_sha256h, 0), 2248 NEONMAP1(vsha256su0q_v, arm_neon_sha256su0, 0), 2249 NEONMAP1(vsha256su1q_v, arm_neon_sha256su1, 0), 2250 NEONMAP0(vshl_n_v), 2251 NEONMAP2(vshl_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 2252 NEONMAP0(vshll_n_v), 2253 NEONMAP0(vshlq_n_v), 2254 NEONMAP2(vshlq_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 2255 NEONMAP0(vshr_n_v), 2256 NEONMAP0(vshrn_n_v), 2257 NEONMAP0(vshrq_n_v), 2258 NEONMAP1(vst1_v, arm_neon_vst1, 0), 2259 NEONMAP1(vst1q_v, arm_neon_vst1, 0), 2260 NEONMAP1(vst2_lane_v, arm_neon_vst2lane, 0), 2261 NEONMAP1(vst2_v, arm_neon_vst2, 0), 2262 NEONMAP1(vst2q_lane_v, arm_neon_vst2lane, 0), 2263 NEONMAP1(vst2q_v, arm_neon_vst2, 0), 2264 NEONMAP1(vst3_lane_v, arm_neon_vst3lane, 0), 2265 NEONMAP1(vst3_v, arm_neon_vst3, 0), 2266 NEONMAP1(vst3q_lane_v, arm_neon_vst3lane, 0), 2267 NEONMAP1(vst3q_v, arm_neon_vst3, 0), 2268 NEONMAP1(vst4_lane_v, arm_neon_vst4lane, 0), 2269 NEONMAP1(vst4_v, arm_neon_vst4, 0), 2270 NEONMAP1(vst4q_lane_v, arm_neon_vst4lane, 0), 2271 NEONMAP1(vst4q_v, arm_neon_vst4, 0), 2272 NEONMAP0(vsubhn_v), 2273 NEONMAP0(vtrn_v), 2274 NEONMAP0(vtrnq_v), 2275 NEONMAP0(vtst_v), 2276 NEONMAP0(vtstq_v), 2277 NEONMAP0(vuzp_v), 2278 NEONMAP0(vuzpq_v), 2279 NEONMAP0(vzip_v), 2280 NEONMAP0(vzipq_v) 2281 }; 2282 2283 static NeonIntrinsicInfo AArch64SIMDIntrinsicMap[] = { 2284 NEONMAP1(vabs_v, aarch64_neon_abs, 0), 2285 NEONMAP1(vabsq_v, aarch64_neon_abs, 0), 2286 NEONMAP0(vaddhn_v), 2287 NEONMAP1(vaesdq_v, aarch64_crypto_aesd, 0), 2288 NEONMAP1(vaeseq_v, aarch64_crypto_aese, 0), 2289 NEONMAP1(vaesimcq_v, aarch64_crypto_aesimc, 0), 2290 NEONMAP1(vaesmcq_v, aarch64_crypto_aesmc, 0), 2291 NEONMAP1(vcage_v, aarch64_neon_facge, 0), 2292 NEONMAP1(vcageq_v, aarch64_neon_facge, 0), 2293 NEONMAP1(vcagt_v, aarch64_neon_facgt, 0), 2294 NEONMAP1(vcagtq_v, aarch64_neon_facgt, 0), 2295 NEONMAP1(vcale_v, aarch64_neon_facge, 0), 2296 NEONMAP1(vcaleq_v, aarch64_neon_facge, 0), 2297 NEONMAP1(vcalt_v, aarch64_neon_facgt, 0), 2298 NEONMAP1(vcaltq_v, aarch64_neon_facgt, 0), 2299 NEONMAP1(vcls_v, aarch64_neon_cls, Add1ArgType), 2300 NEONMAP1(vclsq_v, aarch64_neon_cls, Add1ArgType), 2301 NEONMAP1(vclz_v, ctlz, Add1ArgType), 2302 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 2303 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 2304 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 2305 NEONMAP1(vcvt_f16_f32, aarch64_neon_vcvtfp2hf, 0), 2306 NEONMAP1(vcvt_f32_f16, aarch64_neon_vcvthf2fp, 0), 2307 NEONMAP0(vcvt_f32_v), 2308 NEONMAP2(vcvt_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2309 NEONMAP2(vcvt_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2310 NEONMAP1(vcvt_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 2311 NEONMAP1(vcvt_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 2312 NEONMAP1(vcvt_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 2313 NEONMAP1(vcvt_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 2314 NEONMAP0(vcvtq_f32_v), 2315 NEONMAP2(vcvtq_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2316 NEONMAP2(vcvtq_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2317 NEONMAP1(vcvtq_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 2318 NEONMAP1(vcvtq_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 2319 NEONMAP1(vcvtq_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 2320 NEONMAP1(vcvtq_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 2321 NEONMAP1(vcvtx_f32_v, aarch64_neon_fcvtxn, AddRetType | Add1ArgType), 2322 NEONMAP0(vext_v), 2323 NEONMAP0(vextq_v), 2324 NEONMAP0(vfma_v), 2325 NEONMAP0(vfmaq_v), 2326 NEONMAP2(vhadd_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 2327 NEONMAP2(vhaddq_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 2328 NEONMAP2(vhsub_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 2329 NEONMAP2(vhsubq_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 2330 NEONMAP0(vmovl_v), 2331 NEONMAP0(vmovn_v), 2332 NEONMAP1(vmul_v, aarch64_neon_pmul, Add1ArgType), 2333 NEONMAP1(vmulq_v, aarch64_neon_pmul, Add1ArgType), 2334 NEONMAP1(vpadd_v, aarch64_neon_addp, Add1ArgType), 2335 NEONMAP2(vpaddl_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 2336 NEONMAP2(vpaddlq_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 2337 NEONMAP1(vpaddq_v, aarch64_neon_addp, Add1ArgType), 2338 NEONMAP1(vqabs_v, aarch64_neon_sqabs, Add1ArgType), 2339 NEONMAP1(vqabsq_v, aarch64_neon_sqabs, Add1ArgType), 2340 NEONMAP2(vqadd_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 2341 NEONMAP2(vqaddq_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 2342 NEONMAP2(vqdmlal_v, aarch64_neon_sqdmull, aarch64_neon_sqadd, 0), 2343 NEONMAP2(vqdmlsl_v, aarch64_neon_sqdmull, aarch64_neon_sqsub, 0), 2344 NEONMAP1(vqdmulh_v, aarch64_neon_sqdmulh, Add1ArgType), 2345 NEONMAP1(vqdmulhq_v, aarch64_neon_sqdmulh, Add1ArgType), 2346 NEONMAP1(vqdmull_v, aarch64_neon_sqdmull, Add1ArgType), 2347 NEONMAP2(vqmovn_v, aarch64_neon_uqxtn, aarch64_neon_sqxtn, Add1ArgType | UnsignedAlts), 2348 NEONMAP1(vqmovun_v, aarch64_neon_sqxtun, Add1ArgType), 2349 NEONMAP1(vqneg_v, aarch64_neon_sqneg, Add1ArgType), 2350 NEONMAP1(vqnegq_v, aarch64_neon_sqneg, Add1ArgType), 2351 NEONMAP1(vqrdmulh_v, aarch64_neon_sqrdmulh, Add1ArgType), 2352 NEONMAP1(vqrdmulhq_v, aarch64_neon_sqrdmulh, Add1ArgType), 2353 NEONMAP2(vqrshl_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 2354 NEONMAP2(vqrshlq_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 2355 NEONMAP2(vqshl_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl, UnsignedAlts), 2356 NEONMAP2(vqshl_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 2357 NEONMAP2(vqshlq_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl,UnsignedAlts), 2358 NEONMAP2(vqshlq_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 2359 NEONMAP1(vqshlu_n_v, aarch64_neon_sqshlu, 0), 2360 NEONMAP1(vqshluq_n_v, aarch64_neon_sqshlu, 0), 2361 NEONMAP2(vqsub_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 2362 NEONMAP2(vqsubq_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 2363 NEONMAP1(vraddhn_v, aarch64_neon_raddhn, Add1ArgType), 2364 NEONMAP2(vrecpe_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 2365 NEONMAP2(vrecpeq_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 2366 NEONMAP1(vrecps_v, aarch64_neon_frecps, Add1ArgType), 2367 NEONMAP1(vrecpsq_v, aarch64_neon_frecps, Add1ArgType), 2368 NEONMAP2(vrhadd_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 2369 NEONMAP2(vrhaddq_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 2370 NEONMAP2(vrshl_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 2371 NEONMAP2(vrshlq_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 2372 NEONMAP2(vrshr_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 2373 NEONMAP2(vrshrq_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 2374 NEONMAP2(vrsqrte_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 2375 NEONMAP2(vrsqrteq_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 2376 NEONMAP1(vrsqrts_v, aarch64_neon_frsqrts, Add1ArgType), 2377 NEONMAP1(vrsqrtsq_v, aarch64_neon_frsqrts, Add1ArgType), 2378 NEONMAP1(vrsubhn_v, aarch64_neon_rsubhn, Add1ArgType), 2379 NEONMAP1(vsha1su0q_v, aarch64_crypto_sha1su0, 0), 2380 NEONMAP1(vsha1su1q_v, aarch64_crypto_sha1su1, 0), 2381 NEONMAP1(vsha256h2q_v, aarch64_crypto_sha256h2, 0), 2382 NEONMAP1(vsha256hq_v, aarch64_crypto_sha256h, 0), 2383 NEONMAP1(vsha256su0q_v, aarch64_crypto_sha256su0, 0), 2384 NEONMAP1(vsha256su1q_v, aarch64_crypto_sha256su1, 0), 2385 NEONMAP0(vshl_n_v), 2386 NEONMAP2(vshl_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 2387 NEONMAP0(vshll_n_v), 2388 NEONMAP0(vshlq_n_v), 2389 NEONMAP2(vshlq_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 2390 NEONMAP0(vshr_n_v), 2391 NEONMAP0(vshrn_n_v), 2392 NEONMAP0(vshrq_n_v), 2393 NEONMAP0(vsubhn_v), 2394 NEONMAP0(vtst_v), 2395 NEONMAP0(vtstq_v), 2396 }; 2397 2398 static NeonIntrinsicInfo AArch64SISDIntrinsicMap[] = { 2399 NEONMAP1(vabdd_f64, aarch64_sisd_fabd, Add1ArgType), 2400 NEONMAP1(vabds_f32, aarch64_sisd_fabd, Add1ArgType), 2401 NEONMAP1(vabsd_s64, aarch64_neon_abs, Add1ArgType), 2402 NEONMAP1(vaddlv_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 2403 NEONMAP1(vaddlv_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 2404 NEONMAP1(vaddlvq_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 2405 NEONMAP1(vaddlvq_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 2406 NEONMAP1(vaddv_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 2407 NEONMAP1(vaddv_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 2408 NEONMAP1(vaddv_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2409 NEONMAP1(vaddvq_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 2410 NEONMAP1(vaddvq_f64, aarch64_neon_faddv, AddRetType | Add1ArgType), 2411 NEONMAP1(vaddvq_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 2412 NEONMAP1(vaddvq_s64, aarch64_neon_saddv, AddRetType | Add1ArgType), 2413 NEONMAP1(vaddvq_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2414 NEONMAP1(vaddvq_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2415 NEONMAP1(vcaged_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 2416 NEONMAP1(vcages_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 2417 NEONMAP1(vcagtd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 2418 NEONMAP1(vcagts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 2419 NEONMAP1(vcaled_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 2420 NEONMAP1(vcales_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 2421 NEONMAP1(vcaltd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 2422 NEONMAP1(vcalts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 2423 NEONMAP1(vcvtad_s64_f64, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 2424 NEONMAP1(vcvtad_u64_f64, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 2425 NEONMAP1(vcvtas_s32_f32, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 2426 NEONMAP1(vcvtas_u32_f32, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 2427 NEONMAP1(vcvtd_n_f64_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 2428 NEONMAP1(vcvtd_n_f64_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 2429 NEONMAP1(vcvtd_n_s64_f64, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 2430 NEONMAP1(vcvtd_n_u64_f64, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 2431 NEONMAP1(vcvtmd_s64_f64, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 2432 NEONMAP1(vcvtmd_u64_f64, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 2433 NEONMAP1(vcvtms_s32_f32, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 2434 NEONMAP1(vcvtms_u32_f32, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 2435 NEONMAP1(vcvtnd_s64_f64, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 2436 NEONMAP1(vcvtnd_u64_f64, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 2437 NEONMAP1(vcvtns_s32_f32, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 2438 NEONMAP1(vcvtns_u32_f32, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 2439 NEONMAP1(vcvtpd_s64_f64, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 2440 NEONMAP1(vcvtpd_u64_f64, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 2441 NEONMAP1(vcvtps_s32_f32, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 2442 NEONMAP1(vcvtps_u32_f32, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 2443 NEONMAP1(vcvts_n_f32_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 2444 NEONMAP1(vcvts_n_f32_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 2445 NEONMAP1(vcvts_n_s32_f32, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 2446 NEONMAP1(vcvts_n_u32_f32, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 2447 NEONMAP1(vcvtxd_f32_f64, aarch64_sisd_fcvtxn, 0), 2448 NEONMAP1(vmaxnmv_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2449 NEONMAP1(vmaxnmvq_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2450 NEONMAP1(vmaxnmvq_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2451 NEONMAP1(vmaxv_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2452 NEONMAP1(vmaxv_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 2453 NEONMAP1(vmaxv_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 2454 NEONMAP1(vmaxvq_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2455 NEONMAP1(vmaxvq_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2456 NEONMAP1(vmaxvq_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 2457 NEONMAP1(vmaxvq_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 2458 NEONMAP1(vminnmv_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2459 NEONMAP1(vminnmvq_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2460 NEONMAP1(vminnmvq_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2461 NEONMAP1(vminv_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 2462 NEONMAP1(vminv_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 2463 NEONMAP1(vminv_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 2464 NEONMAP1(vminvq_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 2465 NEONMAP1(vminvq_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 2466 NEONMAP1(vminvq_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 2467 NEONMAP1(vminvq_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 2468 NEONMAP1(vmull_p64, aarch64_neon_pmull64, 0), 2469 NEONMAP1(vmulxd_f64, aarch64_neon_fmulx, Add1ArgType), 2470 NEONMAP1(vmulxs_f32, aarch64_neon_fmulx, Add1ArgType), 2471 NEONMAP1(vpaddd_s64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2472 NEONMAP1(vpaddd_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2473 NEONMAP1(vpmaxnmqd_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2474 NEONMAP1(vpmaxnms_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2475 NEONMAP1(vpmaxqd_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2476 NEONMAP1(vpmaxs_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2477 NEONMAP1(vpminnmqd_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2478 NEONMAP1(vpminnms_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2479 NEONMAP1(vpminqd_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 2480 NEONMAP1(vpmins_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 2481 NEONMAP1(vqabsb_s8, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 2482 NEONMAP1(vqabsd_s64, aarch64_neon_sqabs, Add1ArgType), 2483 NEONMAP1(vqabsh_s16, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 2484 NEONMAP1(vqabss_s32, aarch64_neon_sqabs, Add1ArgType), 2485 NEONMAP1(vqaddb_s8, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 2486 NEONMAP1(vqaddb_u8, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 2487 NEONMAP1(vqaddd_s64, aarch64_neon_sqadd, Add1ArgType), 2488 NEONMAP1(vqaddd_u64, aarch64_neon_uqadd, Add1ArgType), 2489 NEONMAP1(vqaddh_s16, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 2490 NEONMAP1(vqaddh_u16, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 2491 NEONMAP1(vqadds_s32, aarch64_neon_sqadd, Add1ArgType), 2492 NEONMAP1(vqadds_u32, aarch64_neon_uqadd, Add1ArgType), 2493 NEONMAP1(vqdmulhh_s16, aarch64_neon_sqdmulh, Vectorize1ArgType | Use64BitVectors), 2494 NEONMAP1(vqdmulhs_s32, aarch64_neon_sqdmulh, Add1ArgType), 2495 NEONMAP1(vqdmullh_s16, aarch64_neon_sqdmull, VectorRet | Use128BitVectors), 2496 NEONMAP1(vqdmulls_s32, aarch64_neon_sqdmulls_scalar, 0), 2497 NEONMAP1(vqmovnd_s64, aarch64_neon_scalar_sqxtn, AddRetType | Add1ArgType), 2498 NEONMAP1(vqmovnd_u64, aarch64_neon_scalar_uqxtn, AddRetType | Add1ArgType), 2499 NEONMAP1(vqmovnh_s16, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 2500 NEONMAP1(vqmovnh_u16, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 2501 NEONMAP1(vqmovns_s32, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 2502 NEONMAP1(vqmovns_u32, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 2503 NEONMAP1(vqmovund_s64, aarch64_neon_scalar_sqxtun, AddRetType | Add1ArgType), 2504 NEONMAP1(vqmovunh_s16, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 2505 NEONMAP1(vqmovuns_s32, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 2506 NEONMAP1(vqnegb_s8, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 2507 NEONMAP1(vqnegd_s64, aarch64_neon_sqneg, Add1ArgType), 2508 NEONMAP1(vqnegh_s16, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 2509 NEONMAP1(vqnegs_s32, aarch64_neon_sqneg, Add1ArgType), 2510 NEONMAP1(vqrdmulhh_s16, aarch64_neon_sqrdmulh, Vectorize1ArgType | Use64BitVectors), 2511 NEONMAP1(vqrdmulhs_s32, aarch64_neon_sqrdmulh, Add1ArgType), 2512 NEONMAP1(vqrshlb_s8, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 2513 NEONMAP1(vqrshlb_u8, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 2514 NEONMAP1(vqrshld_s64, aarch64_neon_sqrshl, Add1ArgType), 2515 NEONMAP1(vqrshld_u64, aarch64_neon_uqrshl, Add1ArgType), 2516 NEONMAP1(vqrshlh_s16, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 2517 NEONMAP1(vqrshlh_u16, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 2518 NEONMAP1(vqrshls_s32, aarch64_neon_sqrshl, Add1ArgType), 2519 NEONMAP1(vqrshls_u32, aarch64_neon_uqrshl, Add1ArgType), 2520 NEONMAP1(vqrshrnd_n_s64, aarch64_neon_sqrshrn, AddRetType), 2521 NEONMAP1(vqrshrnd_n_u64, aarch64_neon_uqrshrn, AddRetType), 2522 NEONMAP1(vqrshrnh_n_s16, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 2523 NEONMAP1(vqrshrnh_n_u16, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 2524 NEONMAP1(vqrshrns_n_s32, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 2525 NEONMAP1(vqrshrns_n_u32, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 2526 NEONMAP1(vqrshrund_n_s64, aarch64_neon_sqrshrun, AddRetType), 2527 NEONMAP1(vqrshrunh_n_s16, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 2528 NEONMAP1(vqrshruns_n_s32, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 2529 NEONMAP1(vqshlb_n_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2530 NEONMAP1(vqshlb_n_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2531 NEONMAP1(vqshlb_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2532 NEONMAP1(vqshlb_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2533 NEONMAP1(vqshld_s64, aarch64_neon_sqshl, Add1ArgType), 2534 NEONMAP1(vqshld_u64, aarch64_neon_uqshl, Add1ArgType), 2535 NEONMAP1(vqshlh_n_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2536 NEONMAP1(vqshlh_n_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2537 NEONMAP1(vqshlh_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2538 NEONMAP1(vqshlh_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2539 NEONMAP1(vqshls_n_s32, aarch64_neon_sqshl, Add1ArgType), 2540 NEONMAP1(vqshls_n_u32, aarch64_neon_uqshl, Add1ArgType), 2541 NEONMAP1(vqshls_s32, aarch64_neon_sqshl, Add1ArgType), 2542 NEONMAP1(vqshls_u32, aarch64_neon_uqshl, Add1ArgType), 2543 NEONMAP1(vqshlub_n_s8, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 2544 NEONMAP1(vqshluh_n_s16, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 2545 NEONMAP1(vqshlus_n_s32, aarch64_neon_sqshlu, Add1ArgType), 2546 NEONMAP1(vqshrnd_n_s64, aarch64_neon_sqshrn, AddRetType), 2547 NEONMAP1(vqshrnd_n_u64, aarch64_neon_uqshrn, AddRetType), 2548 NEONMAP1(vqshrnh_n_s16, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 2549 NEONMAP1(vqshrnh_n_u16, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 2550 NEONMAP1(vqshrns_n_s32, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 2551 NEONMAP1(vqshrns_n_u32, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 2552 NEONMAP1(vqshrund_n_s64, aarch64_neon_sqshrun, AddRetType), 2553 NEONMAP1(vqshrunh_n_s16, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 2554 NEONMAP1(vqshruns_n_s32, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 2555 NEONMAP1(vqsubb_s8, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 2556 NEONMAP1(vqsubb_u8, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 2557 NEONMAP1(vqsubd_s64, aarch64_neon_sqsub, Add1ArgType), 2558 NEONMAP1(vqsubd_u64, aarch64_neon_uqsub, Add1ArgType), 2559 NEONMAP1(vqsubh_s16, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 2560 NEONMAP1(vqsubh_u16, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 2561 NEONMAP1(vqsubs_s32, aarch64_neon_sqsub, Add1ArgType), 2562 NEONMAP1(vqsubs_u32, aarch64_neon_uqsub, Add1ArgType), 2563 NEONMAP1(vrecped_f64, aarch64_neon_frecpe, Add1ArgType), 2564 NEONMAP1(vrecpes_f32, aarch64_neon_frecpe, Add1ArgType), 2565 NEONMAP1(vrecpxd_f64, aarch64_neon_frecpx, Add1ArgType), 2566 NEONMAP1(vrecpxs_f32, aarch64_neon_frecpx, Add1ArgType), 2567 NEONMAP1(vrshld_s64, aarch64_neon_srshl, Add1ArgType), 2568 NEONMAP1(vrshld_u64, aarch64_neon_urshl, Add1ArgType), 2569 NEONMAP1(vrsqrted_f64, aarch64_neon_frsqrte, Add1ArgType), 2570 NEONMAP1(vrsqrtes_f32, aarch64_neon_frsqrte, Add1ArgType), 2571 NEONMAP1(vrsqrtsd_f64, aarch64_neon_frsqrts, Add1ArgType), 2572 NEONMAP1(vrsqrtss_f32, aarch64_neon_frsqrts, Add1ArgType), 2573 NEONMAP1(vsha1cq_u32, aarch64_crypto_sha1c, 0), 2574 NEONMAP1(vsha1h_u32, aarch64_crypto_sha1h, 0), 2575 NEONMAP1(vsha1mq_u32, aarch64_crypto_sha1m, 0), 2576 NEONMAP1(vsha1pq_u32, aarch64_crypto_sha1p, 0), 2577 NEONMAP1(vshld_s64, aarch64_neon_sshl, Add1ArgType), 2578 NEONMAP1(vshld_u64, aarch64_neon_ushl, Add1ArgType), 2579 NEONMAP1(vslid_n_s64, aarch64_neon_vsli, Vectorize1ArgType), 2580 NEONMAP1(vslid_n_u64, aarch64_neon_vsli, Vectorize1ArgType), 2581 NEONMAP1(vsqaddb_u8, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 2582 NEONMAP1(vsqaddd_u64, aarch64_neon_usqadd, Add1ArgType), 2583 NEONMAP1(vsqaddh_u16, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 2584 NEONMAP1(vsqadds_u32, aarch64_neon_usqadd, Add1ArgType), 2585 NEONMAP1(vsrid_n_s64, aarch64_neon_vsri, Vectorize1ArgType), 2586 NEONMAP1(vsrid_n_u64, aarch64_neon_vsri, Vectorize1ArgType), 2587 NEONMAP1(vuqaddb_s8, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 2588 NEONMAP1(vuqaddd_s64, aarch64_neon_suqadd, Add1ArgType), 2589 NEONMAP1(vuqaddh_s16, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 2590 NEONMAP1(vuqadds_s32, aarch64_neon_suqadd, Add1ArgType), 2591 }; 2592 2593 #undef NEONMAP0 2594 #undef NEONMAP1 2595 #undef NEONMAP2 2596 2597 static bool NEONSIMDIntrinsicsProvenSorted = false; 2598 2599 static bool AArch64SIMDIntrinsicsProvenSorted = false; 2600 static bool AArch64SISDIntrinsicsProvenSorted = false; 2601 2602 2603 static const NeonIntrinsicInfo * 2604 findNeonIntrinsicInMap(ArrayRef<NeonIntrinsicInfo> IntrinsicMap, 2605 unsigned BuiltinID, bool &MapProvenSorted) { 2606 2607 #ifndef NDEBUG 2608 if (!MapProvenSorted) { 2609 // FIXME: use std::is_sorted once C++11 is allowed 2610 for (unsigned i = 0; i < IntrinsicMap.size() - 1; ++i) 2611 assert(IntrinsicMap[i].BuiltinID <= IntrinsicMap[i + 1].BuiltinID); 2612 MapProvenSorted = true; 2613 } 2614 #endif 2615 2616 const NeonIntrinsicInfo *Builtin = 2617 std::lower_bound(IntrinsicMap.begin(), IntrinsicMap.end(), BuiltinID); 2618 2619 if (Builtin != IntrinsicMap.end() && Builtin->BuiltinID == BuiltinID) 2620 return Builtin; 2621 2622 return nullptr; 2623 } 2624 2625 Function *CodeGenFunction::LookupNeonLLVMIntrinsic(unsigned IntrinsicID, 2626 unsigned Modifier, 2627 llvm::Type *ArgType, 2628 const CallExpr *E) { 2629 int VectorSize = 0; 2630 if (Modifier & Use64BitVectors) 2631 VectorSize = 64; 2632 else if (Modifier & Use128BitVectors) 2633 VectorSize = 128; 2634 2635 // Return type. 2636 SmallVector<llvm::Type *, 3> Tys; 2637 if (Modifier & AddRetType) { 2638 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 2639 if (Modifier & VectorizeRetType) 2640 Ty = llvm::VectorType::get( 2641 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); 2642 2643 Tys.push_back(Ty); 2644 } 2645 2646 // Arguments. 2647 if (Modifier & VectorizeArgTypes) { 2648 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; 2649 ArgType = llvm::VectorType::get(ArgType, Elts); 2650 } 2651 2652 if (Modifier & (Add1ArgType | Add2ArgTypes)) 2653 Tys.push_back(ArgType); 2654 2655 if (Modifier & Add2ArgTypes) 2656 Tys.push_back(ArgType); 2657 2658 if (Modifier & InventFloatType) 2659 Tys.push_back(FloatTy); 2660 2661 return CGM.getIntrinsic(IntrinsicID, Tys); 2662 } 2663 2664 static Value *EmitCommonNeonSISDBuiltinExpr(CodeGenFunction &CGF, 2665 const NeonIntrinsicInfo &SISDInfo, 2666 SmallVectorImpl<Value *> &Ops, 2667 const CallExpr *E) { 2668 unsigned BuiltinID = SISDInfo.BuiltinID; 2669 unsigned int Int = SISDInfo.LLVMIntrinsic; 2670 unsigned Modifier = SISDInfo.TypeModifier; 2671 const char *s = SISDInfo.NameHint; 2672 2673 switch (BuiltinID) { 2674 case NEON::BI__builtin_neon_vcled_s64: 2675 case NEON::BI__builtin_neon_vcled_u64: 2676 case NEON::BI__builtin_neon_vcles_f32: 2677 case NEON::BI__builtin_neon_vcled_f64: 2678 case NEON::BI__builtin_neon_vcltd_s64: 2679 case NEON::BI__builtin_neon_vcltd_u64: 2680 case NEON::BI__builtin_neon_vclts_f32: 2681 case NEON::BI__builtin_neon_vcltd_f64: 2682 case NEON::BI__builtin_neon_vcales_f32: 2683 case NEON::BI__builtin_neon_vcaled_f64: 2684 case NEON::BI__builtin_neon_vcalts_f32: 2685 case NEON::BI__builtin_neon_vcaltd_f64: 2686 // Only one direction of comparisons actually exist, cmle is actually a cmge 2687 // with swapped operands. The table gives us the right intrinsic but we 2688 // still need to do the swap. 2689 std::swap(Ops[0], Ops[1]); 2690 break; 2691 } 2692 2693 assert(Int && "Generic code assumes a valid intrinsic"); 2694 2695 // Determine the type(s) of this overloaded AArch64 intrinsic. 2696 const Expr *Arg = E->getArg(0); 2697 llvm::Type *ArgTy = CGF.ConvertType(Arg->getType()); 2698 Function *F = CGF.LookupNeonLLVMIntrinsic(Int, Modifier, ArgTy, E); 2699 2700 int j = 0; 2701 ConstantInt *C0 = ConstantInt::get(CGF.SizeTy, 0); 2702 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 2703 ai != ae; ++ai, ++j) { 2704 llvm::Type *ArgTy = ai->getType(); 2705 if (Ops[j]->getType()->getPrimitiveSizeInBits() == 2706 ArgTy->getPrimitiveSizeInBits()) 2707 continue; 2708 2709 assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy()); 2710 // The constant argument to an _n_ intrinsic always has Int32Ty, so truncate 2711 // it before inserting. 2712 Ops[j] = 2713 CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType()); 2714 Ops[j] = 2715 CGF.Builder.CreateInsertElement(UndefValue::get(ArgTy), Ops[j], C0); 2716 } 2717 2718 Value *Result = CGF.EmitNeonCall(F, Ops, s); 2719 llvm::Type *ResultType = CGF.ConvertType(E->getType()); 2720 if (ResultType->getPrimitiveSizeInBits() < 2721 Result->getType()->getPrimitiveSizeInBits()) 2722 return CGF.Builder.CreateExtractElement(Result, C0); 2723 2724 return CGF.Builder.CreateBitCast(Result, ResultType, s); 2725 } 2726 2727 Value *CodeGenFunction::EmitCommonNeonBuiltinExpr( 2728 unsigned BuiltinID, unsigned LLVMIntrinsic, unsigned AltLLVMIntrinsic, 2729 const char *NameHint, unsigned Modifier, const CallExpr *E, 2730 SmallVectorImpl<llvm::Value *> &Ops, Address PtrOp0, Address PtrOp1) { 2731 // Get the last argument, which specifies the vector type. 2732 llvm::APSInt NeonTypeConst; 2733 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 2734 if (!Arg->isIntegerConstantExpr(NeonTypeConst, getContext())) 2735 return nullptr; 2736 2737 // Determine the type of this overloaded NEON intrinsic. 2738 NeonTypeFlags Type(NeonTypeConst.getZExtValue()); 2739 bool Usgn = Type.isUnsigned(); 2740 bool Quad = Type.isQuad(); 2741 2742 llvm::VectorType *VTy = GetNeonType(this, Type); 2743 llvm::Type *Ty = VTy; 2744 if (!Ty) 2745 return nullptr; 2746 2747 auto getAlignmentValue32 = [&](Address addr) -> Value* { 2748 return Builder.getInt32(addr.getAlignment().getQuantity()); 2749 }; 2750 2751 unsigned Int = LLVMIntrinsic; 2752 if ((Modifier & UnsignedAlts) && !Usgn) 2753 Int = AltLLVMIntrinsic; 2754 2755 switch (BuiltinID) { 2756 default: break; 2757 case NEON::BI__builtin_neon_vabs_v: 2758 case NEON::BI__builtin_neon_vabsq_v: 2759 if (VTy->getElementType()->isFloatingPointTy()) 2760 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, Ty), Ops, "vabs"); 2761 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), Ops, "vabs"); 2762 case NEON::BI__builtin_neon_vaddhn_v: { 2763 llvm::VectorType *SrcTy = 2764 llvm::VectorType::getExtendedElementVectorType(VTy); 2765 2766 // %sum = add <4 x i32> %lhs, %rhs 2767 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 2768 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 2769 Ops[0] = Builder.CreateAdd(Ops[0], Ops[1], "vaddhn"); 2770 2771 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 2772 Constant *ShiftAmt = 2773 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 2774 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vaddhn"); 2775 2776 // %res = trunc <4 x i32> %high to <4 x i16> 2777 return Builder.CreateTrunc(Ops[0], VTy, "vaddhn"); 2778 } 2779 case NEON::BI__builtin_neon_vcale_v: 2780 case NEON::BI__builtin_neon_vcaleq_v: 2781 case NEON::BI__builtin_neon_vcalt_v: 2782 case NEON::BI__builtin_neon_vcaltq_v: 2783 std::swap(Ops[0], Ops[1]); 2784 case NEON::BI__builtin_neon_vcage_v: 2785 case NEON::BI__builtin_neon_vcageq_v: 2786 case NEON::BI__builtin_neon_vcagt_v: 2787 case NEON::BI__builtin_neon_vcagtq_v: { 2788 llvm::Type *VecFlt = llvm::VectorType::get( 2789 VTy->getScalarSizeInBits() == 32 ? FloatTy : DoubleTy, 2790 VTy->getNumElements()); 2791 llvm::Type *Tys[] = { VTy, VecFlt }; 2792 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 2793 return EmitNeonCall(F, Ops, NameHint); 2794 } 2795 case NEON::BI__builtin_neon_vclz_v: 2796 case NEON::BI__builtin_neon_vclzq_v: 2797 // We generate target-independent intrinsic, which needs a second argument 2798 // for whether or not clz of zero is undefined; on ARM it isn't. 2799 Ops.push_back(Builder.getInt1(getTarget().isCLZForZeroUndef())); 2800 break; 2801 case NEON::BI__builtin_neon_vcvt_f32_v: 2802 case NEON::BI__builtin_neon_vcvtq_f32_v: 2803 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2804 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, Quad)); 2805 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 2806 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 2807 case NEON::BI__builtin_neon_vcvt_n_f32_v: 2808 case NEON::BI__builtin_neon_vcvt_n_f64_v: 2809 case NEON::BI__builtin_neon_vcvtq_n_f32_v: 2810 case NEON::BI__builtin_neon_vcvtq_n_f64_v: { 2811 llvm::Type *Tys[2] = { GetFloatNeonType(this, Type), Ty }; 2812 Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic; 2813 Function *F = CGM.getIntrinsic(Int, Tys); 2814 return EmitNeonCall(F, Ops, "vcvt_n"); 2815 } 2816 case NEON::BI__builtin_neon_vcvt_n_s32_v: 2817 case NEON::BI__builtin_neon_vcvt_n_u32_v: 2818 case NEON::BI__builtin_neon_vcvt_n_s64_v: 2819 case NEON::BI__builtin_neon_vcvt_n_u64_v: 2820 case NEON::BI__builtin_neon_vcvtq_n_s32_v: 2821 case NEON::BI__builtin_neon_vcvtq_n_u32_v: 2822 case NEON::BI__builtin_neon_vcvtq_n_s64_v: 2823 case NEON::BI__builtin_neon_vcvtq_n_u64_v: { 2824 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 2825 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 2826 return EmitNeonCall(F, Ops, "vcvt_n"); 2827 } 2828 case NEON::BI__builtin_neon_vcvt_s32_v: 2829 case NEON::BI__builtin_neon_vcvt_u32_v: 2830 case NEON::BI__builtin_neon_vcvt_s64_v: 2831 case NEON::BI__builtin_neon_vcvt_u64_v: 2832 case NEON::BI__builtin_neon_vcvtq_s32_v: 2833 case NEON::BI__builtin_neon_vcvtq_u32_v: 2834 case NEON::BI__builtin_neon_vcvtq_s64_v: 2835 case NEON::BI__builtin_neon_vcvtq_u64_v: { 2836 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 2837 return Usgn ? Builder.CreateFPToUI(Ops[0], Ty, "vcvt") 2838 : Builder.CreateFPToSI(Ops[0], Ty, "vcvt"); 2839 } 2840 case NEON::BI__builtin_neon_vcvta_s32_v: 2841 case NEON::BI__builtin_neon_vcvta_s64_v: 2842 case NEON::BI__builtin_neon_vcvta_u32_v: 2843 case NEON::BI__builtin_neon_vcvta_u64_v: 2844 case NEON::BI__builtin_neon_vcvtaq_s32_v: 2845 case NEON::BI__builtin_neon_vcvtaq_s64_v: 2846 case NEON::BI__builtin_neon_vcvtaq_u32_v: 2847 case NEON::BI__builtin_neon_vcvtaq_u64_v: 2848 case NEON::BI__builtin_neon_vcvtn_s32_v: 2849 case NEON::BI__builtin_neon_vcvtn_s64_v: 2850 case NEON::BI__builtin_neon_vcvtn_u32_v: 2851 case NEON::BI__builtin_neon_vcvtn_u64_v: 2852 case NEON::BI__builtin_neon_vcvtnq_s32_v: 2853 case NEON::BI__builtin_neon_vcvtnq_s64_v: 2854 case NEON::BI__builtin_neon_vcvtnq_u32_v: 2855 case NEON::BI__builtin_neon_vcvtnq_u64_v: 2856 case NEON::BI__builtin_neon_vcvtp_s32_v: 2857 case NEON::BI__builtin_neon_vcvtp_s64_v: 2858 case NEON::BI__builtin_neon_vcvtp_u32_v: 2859 case NEON::BI__builtin_neon_vcvtp_u64_v: 2860 case NEON::BI__builtin_neon_vcvtpq_s32_v: 2861 case NEON::BI__builtin_neon_vcvtpq_s64_v: 2862 case NEON::BI__builtin_neon_vcvtpq_u32_v: 2863 case NEON::BI__builtin_neon_vcvtpq_u64_v: 2864 case NEON::BI__builtin_neon_vcvtm_s32_v: 2865 case NEON::BI__builtin_neon_vcvtm_s64_v: 2866 case NEON::BI__builtin_neon_vcvtm_u32_v: 2867 case NEON::BI__builtin_neon_vcvtm_u64_v: 2868 case NEON::BI__builtin_neon_vcvtmq_s32_v: 2869 case NEON::BI__builtin_neon_vcvtmq_s64_v: 2870 case NEON::BI__builtin_neon_vcvtmq_u32_v: 2871 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 2872 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 2873 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, NameHint); 2874 } 2875 case NEON::BI__builtin_neon_vext_v: 2876 case NEON::BI__builtin_neon_vextq_v: { 2877 int CV = cast<ConstantInt>(Ops[2])->getSExtValue(); 2878 SmallVector<Constant*, 16> Indices; 2879 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 2880 Indices.push_back(ConstantInt::get(Int32Ty, i+CV)); 2881 2882 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2883 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 2884 Value *SV = llvm::ConstantVector::get(Indices); 2885 return Builder.CreateShuffleVector(Ops[0], Ops[1], SV, "vext"); 2886 } 2887 case NEON::BI__builtin_neon_vfma_v: 2888 case NEON::BI__builtin_neon_vfmaq_v: { 2889 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 2890 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2891 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 2892 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 2893 2894 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 2895 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 2896 } 2897 case NEON::BI__builtin_neon_vld1_v: 2898 case NEON::BI__builtin_neon_vld1q_v: { 2899 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 2900 Ops.push_back(getAlignmentValue32(PtrOp0)); 2901 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, "vld1"); 2902 } 2903 case NEON::BI__builtin_neon_vld2_v: 2904 case NEON::BI__builtin_neon_vld2q_v: 2905 case NEON::BI__builtin_neon_vld3_v: 2906 case NEON::BI__builtin_neon_vld3q_v: 2907 case NEON::BI__builtin_neon_vld4_v: 2908 case NEON::BI__builtin_neon_vld4q_v: { 2909 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 2910 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 2911 Value *Align = getAlignmentValue32(PtrOp1); 2912 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint); 2913 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 2914 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2915 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 2916 } 2917 case NEON::BI__builtin_neon_vld1_dup_v: 2918 case NEON::BI__builtin_neon_vld1q_dup_v: { 2919 Value *V = UndefValue::get(Ty); 2920 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 2921 PtrOp0 = Builder.CreateBitCast(PtrOp0, Ty); 2922 LoadInst *Ld = Builder.CreateLoad(PtrOp0); 2923 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 2924 Ops[0] = Builder.CreateInsertElement(V, Ld, CI); 2925 return EmitNeonSplat(Ops[0], CI); 2926 } 2927 case NEON::BI__builtin_neon_vld2_lane_v: 2928 case NEON::BI__builtin_neon_vld2q_lane_v: 2929 case NEON::BI__builtin_neon_vld3_lane_v: 2930 case NEON::BI__builtin_neon_vld3q_lane_v: 2931 case NEON::BI__builtin_neon_vld4_lane_v: 2932 case NEON::BI__builtin_neon_vld4q_lane_v: { 2933 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 2934 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 2935 for (unsigned I = 2; I < Ops.size() - 1; ++I) 2936 Ops[I] = Builder.CreateBitCast(Ops[I], Ty); 2937 Ops.push_back(getAlignmentValue32(PtrOp1)); 2938 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), NameHint); 2939 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 2940 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2941 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 2942 } 2943 case NEON::BI__builtin_neon_vmovl_v: { 2944 llvm::Type *DTy =llvm::VectorType::getTruncatedElementVectorType(VTy); 2945 Ops[0] = Builder.CreateBitCast(Ops[0], DTy); 2946 if (Usgn) 2947 return Builder.CreateZExt(Ops[0], Ty, "vmovl"); 2948 return Builder.CreateSExt(Ops[0], Ty, "vmovl"); 2949 } 2950 case NEON::BI__builtin_neon_vmovn_v: { 2951 llvm::Type *QTy = llvm::VectorType::getExtendedElementVectorType(VTy); 2952 Ops[0] = Builder.CreateBitCast(Ops[0], QTy); 2953 return Builder.CreateTrunc(Ops[0], Ty, "vmovn"); 2954 } 2955 case NEON::BI__builtin_neon_vmull_v: 2956 // FIXME: the integer vmull operations could be emitted in terms of pure 2957 // LLVM IR (2 exts followed by a mul). Unfortunately LLVM has a habit of 2958 // hoisting the exts outside loops. Until global ISel comes along that can 2959 // see through such movement this leads to bad CodeGen. So we need an 2960 // intrinsic for now. 2961 Int = Usgn ? Intrinsic::arm_neon_vmullu : Intrinsic::arm_neon_vmulls; 2962 Int = Type.isPoly() ? (unsigned)Intrinsic::arm_neon_vmullp : Int; 2963 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 2964 case NEON::BI__builtin_neon_vpadal_v: 2965 case NEON::BI__builtin_neon_vpadalq_v: { 2966 // The source operand type has twice as many elements of half the size. 2967 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 2968 llvm::Type *EltTy = 2969 llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 2970 llvm::Type *NarrowTy = 2971 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 2972 llvm::Type *Tys[2] = { Ty, NarrowTy }; 2973 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, NameHint); 2974 } 2975 case NEON::BI__builtin_neon_vpaddl_v: 2976 case NEON::BI__builtin_neon_vpaddlq_v: { 2977 // The source operand type has twice as many elements of half the size. 2978 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 2979 llvm::Type *EltTy = llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 2980 llvm::Type *NarrowTy = 2981 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 2982 llvm::Type *Tys[2] = { Ty, NarrowTy }; 2983 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vpaddl"); 2984 } 2985 case NEON::BI__builtin_neon_vqdmlal_v: 2986 case NEON::BI__builtin_neon_vqdmlsl_v: { 2987 SmallVector<Value *, 2> MulOps(Ops.begin() + 1, Ops.end()); 2988 Ops[1] = 2989 EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), MulOps, "vqdmlal"); 2990 Ops.resize(2); 2991 return EmitNeonCall(CGM.getIntrinsic(AltLLVMIntrinsic, Ty), Ops, NameHint); 2992 } 2993 case NEON::BI__builtin_neon_vqshl_n_v: 2994 case NEON::BI__builtin_neon_vqshlq_n_v: 2995 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshl_n", 2996 1, false); 2997 case NEON::BI__builtin_neon_vqshlu_n_v: 2998 case NEON::BI__builtin_neon_vqshluq_n_v: 2999 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshlu_n", 3000 1, false); 3001 case NEON::BI__builtin_neon_vrecpe_v: 3002 case NEON::BI__builtin_neon_vrecpeq_v: 3003 case NEON::BI__builtin_neon_vrsqrte_v: 3004 case NEON::BI__builtin_neon_vrsqrteq_v: 3005 Int = Ty->isFPOrFPVectorTy() ? LLVMIntrinsic : AltLLVMIntrinsic; 3006 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint); 3007 3008 case NEON::BI__builtin_neon_vrshr_n_v: 3009 case NEON::BI__builtin_neon_vrshrq_n_v: 3010 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n", 3011 1, true); 3012 case NEON::BI__builtin_neon_vshl_n_v: 3013 case NEON::BI__builtin_neon_vshlq_n_v: 3014 Ops[1] = EmitNeonShiftVector(Ops[1], Ty, false); 3015 return Builder.CreateShl(Builder.CreateBitCast(Ops[0],Ty), Ops[1], 3016 "vshl_n"); 3017 case NEON::BI__builtin_neon_vshll_n_v: { 3018 llvm::Type *SrcTy = llvm::VectorType::getTruncatedElementVectorType(VTy); 3019 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3020 if (Usgn) 3021 Ops[0] = Builder.CreateZExt(Ops[0], VTy); 3022 else 3023 Ops[0] = Builder.CreateSExt(Ops[0], VTy); 3024 Ops[1] = EmitNeonShiftVector(Ops[1], VTy, false); 3025 return Builder.CreateShl(Ops[0], Ops[1], "vshll_n"); 3026 } 3027 case NEON::BI__builtin_neon_vshrn_n_v: { 3028 llvm::Type *SrcTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3029 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3030 Ops[1] = EmitNeonShiftVector(Ops[1], SrcTy, false); 3031 if (Usgn) 3032 Ops[0] = Builder.CreateLShr(Ops[0], Ops[1]); 3033 else 3034 Ops[0] = Builder.CreateAShr(Ops[0], Ops[1]); 3035 return Builder.CreateTrunc(Ops[0], Ty, "vshrn_n"); 3036 } 3037 case NEON::BI__builtin_neon_vshr_n_v: 3038 case NEON::BI__builtin_neon_vshrq_n_v: 3039 return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, Usgn, "vshr_n"); 3040 case NEON::BI__builtin_neon_vst1_v: 3041 case NEON::BI__builtin_neon_vst1q_v: 3042 case NEON::BI__builtin_neon_vst2_v: 3043 case NEON::BI__builtin_neon_vst2q_v: 3044 case NEON::BI__builtin_neon_vst3_v: 3045 case NEON::BI__builtin_neon_vst3q_v: 3046 case NEON::BI__builtin_neon_vst4_v: 3047 case NEON::BI__builtin_neon_vst4q_v: 3048 case NEON::BI__builtin_neon_vst2_lane_v: 3049 case NEON::BI__builtin_neon_vst2q_lane_v: 3050 case NEON::BI__builtin_neon_vst3_lane_v: 3051 case NEON::BI__builtin_neon_vst3q_lane_v: 3052 case NEON::BI__builtin_neon_vst4_lane_v: 3053 case NEON::BI__builtin_neon_vst4q_lane_v: { 3054 llvm::Type *Tys[] = {Int8PtrTy, Ty}; 3055 Ops.push_back(getAlignmentValue32(PtrOp0)); 3056 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 3057 } 3058 case NEON::BI__builtin_neon_vsubhn_v: { 3059 llvm::VectorType *SrcTy = 3060 llvm::VectorType::getExtendedElementVectorType(VTy); 3061 3062 // %sum = add <4 x i32> %lhs, %rhs 3063 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3064 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 3065 Ops[0] = Builder.CreateSub(Ops[0], Ops[1], "vsubhn"); 3066 3067 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 3068 Constant *ShiftAmt = 3069 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 3070 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vsubhn"); 3071 3072 // %res = trunc <4 x i32> %high to <4 x i16> 3073 return Builder.CreateTrunc(Ops[0], VTy, "vsubhn"); 3074 } 3075 case NEON::BI__builtin_neon_vtrn_v: 3076 case NEON::BI__builtin_neon_vtrnq_v: { 3077 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3078 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3079 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3080 Value *SV = nullptr; 3081 3082 for (unsigned vi = 0; vi != 2; ++vi) { 3083 SmallVector<Constant*, 16> Indices; 3084 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 3085 Indices.push_back(Builder.getInt32(i+vi)); 3086 Indices.push_back(Builder.getInt32(i+e+vi)); 3087 } 3088 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3089 SV = llvm::ConstantVector::get(Indices); 3090 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vtrn"); 3091 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3092 } 3093 return SV; 3094 } 3095 case NEON::BI__builtin_neon_vtst_v: 3096 case NEON::BI__builtin_neon_vtstq_v: { 3097 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3098 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3099 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 3100 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 3101 ConstantAggregateZero::get(Ty)); 3102 return Builder.CreateSExt(Ops[0], Ty, "vtst"); 3103 } 3104 case NEON::BI__builtin_neon_vuzp_v: 3105 case NEON::BI__builtin_neon_vuzpq_v: { 3106 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3107 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3108 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3109 Value *SV = nullptr; 3110 3111 for (unsigned vi = 0; vi != 2; ++vi) { 3112 SmallVector<Constant*, 16> Indices; 3113 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 3114 Indices.push_back(ConstantInt::get(Int32Ty, 2*i+vi)); 3115 3116 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3117 SV = llvm::ConstantVector::get(Indices); 3118 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vuzp"); 3119 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3120 } 3121 return SV; 3122 } 3123 case NEON::BI__builtin_neon_vzip_v: 3124 case NEON::BI__builtin_neon_vzipq_v: { 3125 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3126 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3127 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3128 Value *SV = nullptr; 3129 3130 for (unsigned vi = 0; vi != 2; ++vi) { 3131 SmallVector<Constant*, 16> Indices; 3132 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 3133 Indices.push_back(ConstantInt::get(Int32Ty, (i + vi*e) >> 1)); 3134 Indices.push_back(ConstantInt::get(Int32Ty, ((i + vi*e) >> 1)+e)); 3135 } 3136 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3137 SV = llvm::ConstantVector::get(Indices); 3138 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vzip"); 3139 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3140 } 3141 return SV; 3142 } 3143 } 3144 3145 assert(Int && "Expected valid intrinsic number"); 3146 3147 // Determine the type(s) of this overloaded AArch64 intrinsic. 3148 Function *F = LookupNeonLLVMIntrinsic(Int, Modifier, Ty, E); 3149 3150 Value *Result = EmitNeonCall(F, Ops, NameHint); 3151 llvm::Type *ResultType = ConvertType(E->getType()); 3152 // AArch64 intrinsic one-element vector type cast to 3153 // scalar type expected by the builtin 3154 return Builder.CreateBitCast(Result, ResultType, NameHint); 3155 } 3156 3157 Value *CodeGenFunction::EmitAArch64CompareBuiltinExpr( 3158 Value *Op, llvm::Type *Ty, const CmpInst::Predicate Fp, 3159 const CmpInst::Predicate Ip, const Twine &Name) { 3160 llvm::Type *OTy = Op->getType(); 3161 3162 // FIXME: this is utterly horrific. We should not be looking at previous 3163 // codegen context to find out what needs doing. Unfortunately TableGen 3164 // currently gives us exactly the same calls for vceqz_f32 and vceqz_s32 3165 // (etc). 3166 if (BitCastInst *BI = dyn_cast<BitCastInst>(Op)) 3167 OTy = BI->getOperand(0)->getType(); 3168 3169 Op = Builder.CreateBitCast(Op, OTy); 3170 if (OTy->getScalarType()->isFloatingPointTy()) { 3171 Op = Builder.CreateFCmp(Fp, Op, Constant::getNullValue(OTy)); 3172 } else { 3173 Op = Builder.CreateICmp(Ip, Op, Constant::getNullValue(OTy)); 3174 } 3175 return Builder.CreateSExt(Op, Ty, Name); 3176 } 3177 3178 static Value *packTBLDVectorList(CodeGenFunction &CGF, ArrayRef<Value *> Ops, 3179 Value *ExtOp, Value *IndexOp, 3180 llvm::Type *ResTy, unsigned IntID, 3181 const char *Name) { 3182 SmallVector<Value *, 2> TblOps; 3183 if (ExtOp) 3184 TblOps.push_back(ExtOp); 3185 3186 // Build a vector containing sequential number like (0, 1, 2, ..., 15) 3187 SmallVector<Constant*, 16> Indices; 3188 llvm::VectorType *TblTy = cast<llvm::VectorType>(Ops[0]->getType()); 3189 for (unsigned i = 0, e = TblTy->getNumElements(); i != e; ++i) { 3190 Indices.push_back(ConstantInt::get(CGF.Int32Ty, 2*i)); 3191 Indices.push_back(ConstantInt::get(CGF.Int32Ty, 2*i+1)); 3192 } 3193 Value *SV = llvm::ConstantVector::get(Indices); 3194 3195 int PairPos = 0, End = Ops.size() - 1; 3196 while (PairPos < End) { 3197 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 3198 Ops[PairPos+1], SV, Name)); 3199 PairPos += 2; 3200 } 3201 3202 // If there's an odd number of 64-bit lookup table, fill the high 64-bit 3203 // of the 128-bit lookup table with zero. 3204 if (PairPos == End) { 3205 Value *ZeroTbl = ConstantAggregateZero::get(TblTy); 3206 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 3207 ZeroTbl, SV, Name)); 3208 } 3209 3210 Function *TblF; 3211 TblOps.push_back(IndexOp); 3212 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); 3213 3214 return CGF.EmitNeonCall(TblF, TblOps, Name); 3215 } 3216 3217 Value *CodeGenFunction::GetValueForARMHint(unsigned BuiltinID) { 3218 unsigned Value; 3219 switch (BuiltinID) { 3220 default: 3221 return nullptr; 3222 case ARM::BI__builtin_arm_nop: 3223 Value = 0; 3224 break; 3225 case ARM::BI__builtin_arm_yield: 3226 case ARM::BI__yield: 3227 Value = 1; 3228 break; 3229 case ARM::BI__builtin_arm_wfe: 3230 case ARM::BI__wfe: 3231 Value = 2; 3232 break; 3233 case ARM::BI__builtin_arm_wfi: 3234 case ARM::BI__wfi: 3235 Value = 3; 3236 break; 3237 case ARM::BI__builtin_arm_sev: 3238 case ARM::BI__sev: 3239 Value = 4; 3240 break; 3241 case ARM::BI__builtin_arm_sevl: 3242 case ARM::BI__sevl: 3243 Value = 5; 3244 break; 3245 } 3246 3247 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_hint), 3248 llvm::ConstantInt::get(Int32Ty, Value)); 3249 } 3250 3251 // Generates the IR for the read/write special register builtin, 3252 // ValueType is the type of the value that is to be written or read, 3253 // RegisterType is the type of the register being written to or read from. 3254 static Value *EmitSpecialRegisterBuiltin(CodeGenFunction &CGF, 3255 const CallExpr *E, 3256 llvm::Type *RegisterType, 3257 llvm::Type *ValueType, bool IsRead) { 3258 // write and register intrinsics only support 32 and 64 bit operations. 3259 assert((RegisterType->isIntegerTy(32) || RegisterType->isIntegerTy(64)) 3260 && "Unsupported size for register."); 3261 3262 CodeGen::CGBuilderTy &Builder = CGF.Builder; 3263 CodeGen::CodeGenModule &CGM = CGF.CGM; 3264 LLVMContext &Context = CGM.getLLVMContext(); 3265 3266 const Expr *SysRegStrExpr = E->getArg(0)->IgnoreParenCasts(); 3267 StringRef SysReg = cast<StringLiteral>(SysRegStrExpr)->getString(); 3268 3269 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysReg) }; 3270 llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); 3271 llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); 3272 3273 llvm::Type *Types[] = { RegisterType }; 3274 3275 bool MixedTypes = RegisterType->isIntegerTy(64) && ValueType->isIntegerTy(32); 3276 assert(!(RegisterType->isIntegerTy(32) && ValueType->isIntegerTy(64)) 3277 && "Can't fit 64-bit value in 32-bit register"); 3278 3279 if (IsRead) { 3280 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::read_register, Types); 3281 llvm::Value *Call = Builder.CreateCall(F, Metadata); 3282 3283 if (MixedTypes) 3284 // Read into 64 bit register and then truncate result to 32 bit. 3285 return Builder.CreateTrunc(Call, ValueType); 3286 3287 if (ValueType->isPointerTy()) 3288 // Have i32/i64 result (Call) but want to return a VoidPtrTy (i8*). 3289 return Builder.CreateIntToPtr(Call, ValueType); 3290 3291 return Call; 3292 } 3293 3294 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types); 3295 llvm::Value *ArgValue = CGF.EmitScalarExpr(E->getArg(1)); 3296 if (MixedTypes) { 3297 // Extend 32 bit write value to 64 bit to pass to write. 3298 ArgValue = Builder.CreateZExt(ArgValue, RegisterType); 3299 return Builder.CreateCall(F, { Metadata, ArgValue }); 3300 } 3301 3302 if (ValueType->isPointerTy()) { 3303 // Have VoidPtrTy ArgValue but want to return an i32/i64. 3304 ArgValue = Builder.CreatePtrToInt(ArgValue, RegisterType); 3305 return Builder.CreateCall(F, { Metadata, ArgValue }); 3306 } 3307 3308 return Builder.CreateCall(F, { Metadata, ArgValue }); 3309 } 3310 3311 /// Return true if BuiltinID is an overloaded Neon intrinsic with an extra 3312 /// argument that specifies the vector type. 3313 static bool HasExtraNeonArgument(unsigned BuiltinID) { 3314 switch (BuiltinID) { 3315 default: break; 3316 case NEON::BI__builtin_neon_vget_lane_i8: 3317 case NEON::BI__builtin_neon_vget_lane_i16: 3318 case NEON::BI__builtin_neon_vget_lane_i32: 3319 case NEON::BI__builtin_neon_vget_lane_i64: 3320 case NEON::BI__builtin_neon_vget_lane_f32: 3321 case NEON::BI__builtin_neon_vgetq_lane_i8: 3322 case NEON::BI__builtin_neon_vgetq_lane_i16: 3323 case NEON::BI__builtin_neon_vgetq_lane_i32: 3324 case NEON::BI__builtin_neon_vgetq_lane_i64: 3325 case NEON::BI__builtin_neon_vgetq_lane_f32: 3326 case NEON::BI__builtin_neon_vset_lane_i8: 3327 case NEON::BI__builtin_neon_vset_lane_i16: 3328 case NEON::BI__builtin_neon_vset_lane_i32: 3329 case NEON::BI__builtin_neon_vset_lane_i64: 3330 case NEON::BI__builtin_neon_vset_lane_f32: 3331 case NEON::BI__builtin_neon_vsetq_lane_i8: 3332 case NEON::BI__builtin_neon_vsetq_lane_i16: 3333 case NEON::BI__builtin_neon_vsetq_lane_i32: 3334 case NEON::BI__builtin_neon_vsetq_lane_i64: 3335 case NEON::BI__builtin_neon_vsetq_lane_f32: 3336 case NEON::BI__builtin_neon_vsha1h_u32: 3337 case NEON::BI__builtin_neon_vsha1cq_u32: 3338 case NEON::BI__builtin_neon_vsha1pq_u32: 3339 case NEON::BI__builtin_neon_vsha1mq_u32: 3340 case ARM::BI_MoveToCoprocessor: 3341 case ARM::BI_MoveToCoprocessor2: 3342 return false; 3343 } 3344 return true; 3345 } 3346 3347 Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, 3348 const CallExpr *E) { 3349 if (auto Hint = GetValueForARMHint(BuiltinID)) 3350 return Hint; 3351 3352 if (BuiltinID == ARM::BI__emit) { 3353 bool IsThumb = getTarget().getTriple().getArch() == llvm::Triple::thumb; 3354 llvm::FunctionType *FTy = 3355 llvm::FunctionType::get(VoidTy, /*Variadic=*/false); 3356 3357 APSInt Value; 3358 if (!E->getArg(0)->EvaluateAsInt(Value, CGM.getContext())) 3359 llvm_unreachable("Sema will ensure that the parameter is constant"); 3360 3361 uint64_t ZExtValue = Value.zextOrTrunc(IsThumb ? 16 : 32).getZExtValue(); 3362 3363 llvm::InlineAsm *Emit = 3364 IsThumb ? InlineAsm::get(FTy, ".inst.n 0x" + utohexstr(ZExtValue), "", 3365 /*SideEffects=*/true) 3366 : InlineAsm::get(FTy, ".inst 0x" + utohexstr(ZExtValue), "", 3367 /*SideEffects=*/true); 3368 3369 return Builder.CreateCall(Emit); 3370 } 3371 3372 if (BuiltinID == ARM::BI__builtin_arm_dbg) { 3373 Value *Option = EmitScalarExpr(E->getArg(0)); 3374 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_dbg), Option); 3375 } 3376 3377 if (BuiltinID == ARM::BI__builtin_arm_prefetch) { 3378 Value *Address = EmitScalarExpr(E->getArg(0)); 3379 Value *RW = EmitScalarExpr(E->getArg(1)); 3380 Value *IsData = EmitScalarExpr(E->getArg(2)); 3381 3382 // Locality is not supported on ARM target 3383 Value *Locality = llvm::ConstantInt::get(Int32Ty, 3); 3384 3385 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 3386 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 3387 } 3388 3389 if (BuiltinID == ARM::BI__builtin_arm_rbit) { 3390 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_rbit), 3391 EmitScalarExpr(E->getArg(0)), 3392 "rbit"); 3393 } 3394 3395 if (BuiltinID == ARM::BI__clear_cache) { 3396 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 3397 const FunctionDecl *FD = E->getDirectCallee(); 3398 Value *Ops[2]; 3399 for (unsigned i = 0; i < 2; i++) 3400 Ops[i] = EmitScalarExpr(E->getArg(i)); 3401 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 3402 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 3403 StringRef Name = FD->getName(); 3404 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 3405 } 3406 3407 if (BuiltinID == ARM::BI__builtin_arm_ldrexd || 3408 ((BuiltinID == ARM::BI__builtin_arm_ldrex || 3409 BuiltinID == ARM::BI__builtin_arm_ldaex) && 3410 getContext().getTypeSize(E->getType()) == 64) || 3411 BuiltinID == ARM::BI__ldrexd) { 3412 Function *F; 3413 3414 switch (BuiltinID) { 3415 default: llvm_unreachable("unexpected builtin"); 3416 case ARM::BI__builtin_arm_ldaex: 3417 F = CGM.getIntrinsic(Intrinsic::arm_ldaexd); 3418 break; 3419 case ARM::BI__builtin_arm_ldrexd: 3420 case ARM::BI__builtin_arm_ldrex: 3421 case ARM::BI__ldrexd: 3422 F = CGM.getIntrinsic(Intrinsic::arm_ldrexd); 3423 break; 3424 } 3425 3426 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 3427 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 3428 "ldrexd"); 3429 3430 Value *Val0 = Builder.CreateExtractValue(Val, 1); 3431 Value *Val1 = Builder.CreateExtractValue(Val, 0); 3432 Val0 = Builder.CreateZExt(Val0, Int64Ty); 3433 Val1 = Builder.CreateZExt(Val1, Int64Ty); 3434 3435 Value *ShiftCst = llvm::ConstantInt::get(Int64Ty, 32); 3436 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 3437 Val = Builder.CreateOr(Val, Val1); 3438 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 3439 } 3440 3441 if (BuiltinID == ARM::BI__builtin_arm_ldrex || 3442 BuiltinID == ARM::BI__builtin_arm_ldaex) { 3443 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 3444 3445 QualType Ty = E->getType(); 3446 llvm::Type *RealResTy = ConvertType(Ty); 3447 llvm::Type *IntResTy = llvm::IntegerType::get(getLLVMContext(), 3448 getContext().getTypeSize(Ty)); 3449 LoadAddr = Builder.CreateBitCast(LoadAddr, IntResTy->getPointerTo()); 3450 3451 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_ldaex 3452 ? Intrinsic::arm_ldaex 3453 : Intrinsic::arm_ldrex, 3454 LoadAddr->getType()); 3455 Value *Val = Builder.CreateCall(F, LoadAddr, "ldrex"); 3456 3457 if (RealResTy->isPointerTy()) 3458 return Builder.CreateIntToPtr(Val, RealResTy); 3459 else { 3460 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 3461 return Builder.CreateBitCast(Val, RealResTy); 3462 } 3463 } 3464 3465 if (BuiltinID == ARM::BI__builtin_arm_strexd || 3466 ((BuiltinID == ARM::BI__builtin_arm_stlex || 3467 BuiltinID == ARM::BI__builtin_arm_strex) && 3468 getContext().getTypeSize(E->getArg(0)->getType()) == 64)) { 3469 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 3470 ? Intrinsic::arm_stlexd 3471 : Intrinsic::arm_strexd); 3472 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, nullptr); 3473 3474 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 3475 Value *Val = EmitScalarExpr(E->getArg(0)); 3476 Builder.CreateStore(Val, Tmp); 3477 3478 Address LdPtr = Builder.CreateBitCast(Tmp,llvm::PointerType::getUnqual(STy)); 3479 Val = Builder.CreateLoad(LdPtr); 3480 3481 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 3482 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 3483 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), Int8PtrTy); 3484 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "strexd"); 3485 } 3486 3487 if (BuiltinID == ARM::BI__builtin_arm_strex || 3488 BuiltinID == ARM::BI__builtin_arm_stlex) { 3489 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 3490 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 3491 3492 QualType Ty = E->getArg(0)->getType(); 3493 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 3494 getContext().getTypeSize(Ty)); 3495 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 3496 3497 if (StoreVal->getType()->isPointerTy()) 3498 StoreVal = Builder.CreatePtrToInt(StoreVal, Int32Ty); 3499 else { 3500 StoreVal = Builder.CreateBitCast(StoreVal, StoreTy); 3501 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int32Ty); 3502 } 3503 3504 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 3505 ? Intrinsic::arm_stlex 3506 : Intrinsic::arm_strex, 3507 StoreAddr->getType()); 3508 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "strex"); 3509 } 3510 3511 if (BuiltinID == ARM::BI__builtin_arm_clrex) { 3512 Function *F = CGM.getIntrinsic(Intrinsic::arm_clrex); 3513 return Builder.CreateCall(F); 3514 } 3515 3516 // CRC32 3517 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 3518 switch (BuiltinID) { 3519 case ARM::BI__builtin_arm_crc32b: 3520 CRCIntrinsicID = Intrinsic::arm_crc32b; break; 3521 case ARM::BI__builtin_arm_crc32cb: 3522 CRCIntrinsicID = Intrinsic::arm_crc32cb; break; 3523 case ARM::BI__builtin_arm_crc32h: 3524 CRCIntrinsicID = Intrinsic::arm_crc32h; break; 3525 case ARM::BI__builtin_arm_crc32ch: 3526 CRCIntrinsicID = Intrinsic::arm_crc32ch; break; 3527 case ARM::BI__builtin_arm_crc32w: 3528 case ARM::BI__builtin_arm_crc32d: 3529 CRCIntrinsicID = Intrinsic::arm_crc32w; break; 3530 case ARM::BI__builtin_arm_crc32cw: 3531 case ARM::BI__builtin_arm_crc32cd: 3532 CRCIntrinsicID = Intrinsic::arm_crc32cw; break; 3533 } 3534 3535 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 3536 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 3537 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 3538 3539 // crc32{c,}d intrinsics are implemnted as two calls to crc32{c,}w 3540 // intrinsics, hence we need different codegen for these cases. 3541 if (BuiltinID == ARM::BI__builtin_arm_crc32d || 3542 BuiltinID == ARM::BI__builtin_arm_crc32cd) { 3543 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 3544 Value *Arg1a = Builder.CreateTruncOrBitCast(Arg1, Int32Ty); 3545 Value *Arg1b = Builder.CreateLShr(Arg1, C1); 3546 Arg1b = Builder.CreateTruncOrBitCast(Arg1b, Int32Ty); 3547 3548 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 3549 Value *Res = Builder.CreateCall(F, {Arg0, Arg1a}); 3550 return Builder.CreateCall(F, {Res, Arg1b}); 3551 } else { 3552 Arg1 = Builder.CreateZExtOrBitCast(Arg1, Int32Ty); 3553 3554 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 3555 return Builder.CreateCall(F, {Arg0, Arg1}); 3556 } 3557 } 3558 3559 if (BuiltinID == ARM::BI__builtin_arm_rsr || 3560 BuiltinID == ARM::BI__builtin_arm_rsr64 || 3561 BuiltinID == ARM::BI__builtin_arm_rsrp || 3562 BuiltinID == ARM::BI__builtin_arm_wsr || 3563 BuiltinID == ARM::BI__builtin_arm_wsr64 || 3564 BuiltinID == ARM::BI__builtin_arm_wsrp) { 3565 3566 bool IsRead = BuiltinID == ARM::BI__builtin_arm_rsr || 3567 BuiltinID == ARM::BI__builtin_arm_rsr64 || 3568 BuiltinID == ARM::BI__builtin_arm_rsrp; 3569 3570 bool IsPointerBuiltin = BuiltinID == ARM::BI__builtin_arm_rsrp || 3571 BuiltinID == ARM::BI__builtin_arm_wsrp; 3572 3573 bool Is64Bit = BuiltinID == ARM::BI__builtin_arm_rsr64 || 3574 BuiltinID == ARM::BI__builtin_arm_wsr64; 3575 3576 llvm::Type *ValueType; 3577 llvm::Type *RegisterType; 3578 if (IsPointerBuiltin) { 3579 ValueType = VoidPtrTy; 3580 RegisterType = Int32Ty; 3581 } else if (Is64Bit) { 3582 ValueType = RegisterType = Int64Ty; 3583 } else { 3584 ValueType = RegisterType = Int32Ty; 3585 } 3586 3587 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 3588 } 3589 3590 // Find out if any arguments are required to be integer constant 3591 // expressions. 3592 unsigned ICEArguments = 0; 3593 ASTContext::GetBuiltinTypeError Error; 3594 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 3595 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 3596 3597 auto getAlignmentValue32 = [&](Address addr) -> Value* { 3598 return Builder.getInt32(addr.getAlignment().getQuantity()); 3599 }; 3600 3601 Address PtrOp0 = Address::invalid(); 3602 Address PtrOp1 = Address::invalid(); 3603 SmallVector<Value*, 4> Ops; 3604 bool HasExtraArg = HasExtraNeonArgument(BuiltinID); 3605 unsigned NumArgs = E->getNumArgs() - (HasExtraArg ? 1 : 0); 3606 for (unsigned i = 0, e = NumArgs; i != e; i++) { 3607 if (i == 0) { 3608 switch (BuiltinID) { 3609 case NEON::BI__builtin_neon_vld1_v: 3610 case NEON::BI__builtin_neon_vld1q_v: 3611 case NEON::BI__builtin_neon_vld1q_lane_v: 3612 case NEON::BI__builtin_neon_vld1_lane_v: 3613 case NEON::BI__builtin_neon_vld1_dup_v: 3614 case NEON::BI__builtin_neon_vld1q_dup_v: 3615 case NEON::BI__builtin_neon_vst1_v: 3616 case NEON::BI__builtin_neon_vst1q_v: 3617 case NEON::BI__builtin_neon_vst1q_lane_v: 3618 case NEON::BI__builtin_neon_vst1_lane_v: 3619 case NEON::BI__builtin_neon_vst2_v: 3620 case NEON::BI__builtin_neon_vst2q_v: 3621 case NEON::BI__builtin_neon_vst2_lane_v: 3622 case NEON::BI__builtin_neon_vst2q_lane_v: 3623 case NEON::BI__builtin_neon_vst3_v: 3624 case NEON::BI__builtin_neon_vst3q_v: 3625 case NEON::BI__builtin_neon_vst3_lane_v: 3626 case NEON::BI__builtin_neon_vst3q_lane_v: 3627 case NEON::BI__builtin_neon_vst4_v: 3628 case NEON::BI__builtin_neon_vst4q_v: 3629 case NEON::BI__builtin_neon_vst4_lane_v: 3630 case NEON::BI__builtin_neon_vst4q_lane_v: 3631 // Get the alignment for the argument in addition to the value; 3632 // we'll use it later. 3633 PtrOp0 = EmitPointerWithAlignment(E->getArg(0)); 3634 Ops.push_back(PtrOp0.getPointer()); 3635 continue; 3636 } 3637 } 3638 if (i == 1) { 3639 switch (BuiltinID) { 3640 case NEON::BI__builtin_neon_vld2_v: 3641 case NEON::BI__builtin_neon_vld2q_v: 3642 case NEON::BI__builtin_neon_vld3_v: 3643 case NEON::BI__builtin_neon_vld3q_v: 3644 case NEON::BI__builtin_neon_vld4_v: 3645 case NEON::BI__builtin_neon_vld4q_v: 3646 case NEON::BI__builtin_neon_vld2_lane_v: 3647 case NEON::BI__builtin_neon_vld2q_lane_v: 3648 case NEON::BI__builtin_neon_vld3_lane_v: 3649 case NEON::BI__builtin_neon_vld3q_lane_v: 3650 case NEON::BI__builtin_neon_vld4_lane_v: 3651 case NEON::BI__builtin_neon_vld4q_lane_v: 3652 case NEON::BI__builtin_neon_vld2_dup_v: 3653 case NEON::BI__builtin_neon_vld3_dup_v: 3654 case NEON::BI__builtin_neon_vld4_dup_v: 3655 // Get the alignment for the argument in addition to the value; 3656 // we'll use it later. 3657 PtrOp1 = EmitPointerWithAlignment(E->getArg(1)); 3658 Ops.push_back(PtrOp1.getPointer()); 3659 continue; 3660 } 3661 } 3662 3663 if ((ICEArguments & (1 << i)) == 0) { 3664 Ops.push_back(EmitScalarExpr(E->getArg(i))); 3665 } else { 3666 // If this is required to be a constant, constant fold it so that we know 3667 // that the generated intrinsic gets a ConstantInt. 3668 llvm::APSInt Result; 3669 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 3670 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 3671 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 3672 } 3673 } 3674 3675 switch (BuiltinID) { 3676 default: break; 3677 3678 case NEON::BI__builtin_neon_vget_lane_i8: 3679 case NEON::BI__builtin_neon_vget_lane_i16: 3680 case NEON::BI__builtin_neon_vget_lane_i32: 3681 case NEON::BI__builtin_neon_vget_lane_i64: 3682 case NEON::BI__builtin_neon_vget_lane_f32: 3683 case NEON::BI__builtin_neon_vgetq_lane_i8: 3684 case NEON::BI__builtin_neon_vgetq_lane_i16: 3685 case NEON::BI__builtin_neon_vgetq_lane_i32: 3686 case NEON::BI__builtin_neon_vgetq_lane_i64: 3687 case NEON::BI__builtin_neon_vgetq_lane_f32: 3688 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane"); 3689 3690 case NEON::BI__builtin_neon_vset_lane_i8: 3691 case NEON::BI__builtin_neon_vset_lane_i16: 3692 case NEON::BI__builtin_neon_vset_lane_i32: 3693 case NEON::BI__builtin_neon_vset_lane_i64: 3694 case NEON::BI__builtin_neon_vset_lane_f32: 3695 case NEON::BI__builtin_neon_vsetq_lane_i8: 3696 case NEON::BI__builtin_neon_vsetq_lane_i16: 3697 case NEON::BI__builtin_neon_vsetq_lane_i32: 3698 case NEON::BI__builtin_neon_vsetq_lane_i64: 3699 case NEON::BI__builtin_neon_vsetq_lane_f32: 3700 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 3701 3702 case NEON::BI__builtin_neon_vsha1h_u32: 3703 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1h), Ops, 3704 "vsha1h"); 3705 case NEON::BI__builtin_neon_vsha1cq_u32: 3706 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1c), Ops, 3707 "vsha1h"); 3708 case NEON::BI__builtin_neon_vsha1pq_u32: 3709 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1p), Ops, 3710 "vsha1h"); 3711 case NEON::BI__builtin_neon_vsha1mq_u32: 3712 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1m), Ops, 3713 "vsha1h"); 3714 3715 // The ARM _MoveToCoprocessor builtins put the input register value as 3716 // the first argument, but the LLVM intrinsic expects it as the third one. 3717 case ARM::BI_MoveToCoprocessor: 3718 case ARM::BI_MoveToCoprocessor2: { 3719 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI_MoveToCoprocessor ? 3720 Intrinsic::arm_mcr : Intrinsic::arm_mcr2); 3721 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0], 3722 Ops[3], Ops[4], Ops[5]}); 3723 } 3724 } 3725 3726 // Get the last argument, which specifies the vector type. 3727 assert(HasExtraArg); 3728 llvm::APSInt Result; 3729 const Expr *Arg = E->getArg(E->getNumArgs()-1); 3730 if (!Arg->isIntegerConstantExpr(Result, getContext())) 3731 return nullptr; 3732 3733 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f || 3734 BuiltinID == ARM::BI__builtin_arm_vcvtr_d) { 3735 // Determine the overloaded type of this builtin. 3736 llvm::Type *Ty; 3737 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f) 3738 Ty = FloatTy; 3739 else 3740 Ty = DoubleTy; 3741 3742 // Determine whether this is an unsigned conversion or not. 3743 bool usgn = Result.getZExtValue() == 1; 3744 unsigned Int = usgn ? Intrinsic::arm_vcvtru : Intrinsic::arm_vcvtr; 3745 3746 // Call the appropriate intrinsic. 3747 Function *F = CGM.getIntrinsic(Int, Ty); 3748 return Builder.CreateCall(F, Ops, "vcvtr"); 3749 } 3750 3751 // Determine the type of this overloaded NEON intrinsic. 3752 NeonTypeFlags Type(Result.getZExtValue()); 3753 bool usgn = Type.isUnsigned(); 3754 bool rightShift = false; 3755 3756 llvm::VectorType *VTy = GetNeonType(this, Type); 3757 llvm::Type *Ty = VTy; 3758 if (!Ty) 3759 return nullptr; 3760 3761 // Many NEON builtins have identical semantics and uses in ARM and 3762 // AArch64. Emit these in a single function. 3763 auto IntrinsicMap = makeArrayRef(ARMSIMDIntrinsicMap); 3764 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 3765 IntrinsicMap, BuiltinID, NEONSIMDIntrinsicsProvenSorted); 3766 if (Builtin) 3767 return EmitCommonNeonBuiltinExpr( 3768 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 3769 Builtin->NameHint, Builtin->TypeModifier, E, Ops, PtrOp0, PtrOp1); 3770 3771 unsigned Int; 3772 switch (BuiltinID) { 3773 default: return nullptr; 3774 case NEON::BI__builtin_neon_vld1q_lane_v: 3775 // Handle 64-bit integer elements as a special case. Use shuffles of 3776 // one-element vectors to avoid poor code for i64 in the backend. 3777 if (VTy->getElementType()->isIntegerTy(64)) { 3778 // Extract the other lane. 3779 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3780 uint32_t Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); 3781 Value *SV = llvm::ConstantVector::get(ConstantInt::get(Int32Ty, 1-Lane)); 3782 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 3783 // Load the value as a one-element vector. 3784 Ty = llvm::VectorType::get(VTy->getElementType(), 1); 3785 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3786 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Tys); 3787 Value *Align = getAlignmentValue32(PtrOp0); 3788 Value *Ld = Builder.CreateCall(F, {Ops[0], Align}); 3789 // Combine them. 3790 uint32_t Indices[] = {1 - Lane, Lane}; 3791 SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 3792 return Builder.CreateShuffleVector(Ops[1], Ld, SV, "vld1q_lane"); 3793 } 3794 // fall through 3795 case NEON::BI__builtin_neon_vld1_lane_v: { 3796 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3797 PtrOp0 = Builder.CreateElementBitCast(PtrOp0, VTy->getElementType()); 3798 Value *Ld = Builder.CreateLoad(PtrOp0); 3799 return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); 3800 } 3801 case NEON::BI__builtin_neon_vld2_dup_v: 3802 case NEON::BI__builtin_neon_vld3_dup_v: 3803 case NEON::BI__builtin_neon_vld4_dup_v: { 3804 // Handle 64-bit elements as a special-case. There is no "dup" needed. 3805 if (VTy->getElementType()->getPrimitiveSizeInBits() == 64) { 3806 switch (BuiltinID) { 3807 case NEON::BI__builtin_neon_vld2_dup_v: 3808 Int = Intrinsic::arm_neon_vld2; 3809 break; 3810 case NEON::BI__builtin_neon_vld3_dup_v: 3811 Int = Intrinsic::arm_neon_vld3; 3812 break; 3813 case NEON::BI__builtin_neon_vld4_dup_v: 3814 Int = Intrinsic::arm_neon_vld4; 3815 break; 3816 default: llvm_unreachable("unknown vld_dup intrinsic?"); 3817 } 3818 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3819 Function *F = CGM.getIntrinsic(Int, Tys); 3820 llvm::Value *Align = getAlignmentValue32(PtrOp1); 3821 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, "vld_dup"); 3822 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3823 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3824 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3825 } 3826 switch (BuiltinID) { 3827 case NEON::BI__builtin_neon_vld2_dup_v: 3828 Int = Intrinsic::arm_neon_vld2lane; 3829 break; 3830 case NEON::BI__builtin_neon_vld3_dup_v: 3831 Int = Intrinsic::arm_neon_vld3lane; 3832 break; 3833 case NEON::BI__builtin_neon_vld4_dup_v: 3834 Int = Intrinsic::arm_neon_vld4lane; 3835 break; 3836 default: llvm_unreachable("unknown vld_dup intrinsic?"); 3837 } 3838 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3839 Function *F = CGM.getIntrinsic(Int, Tys); 3840 llvm::StructType *STy = cast<llvm::StructType>(F->getReturnType()); 3841 3842 SmallVector<Value*, 6> Args; 3843 Args.push_back(Ops[1]); 3844 Args.append(STy->getNumElements(), UndefValue::get(Ty)); 3845 3846 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 3847 Args.push_back(CI); 3848 Args.push_back(getAlignmentValue32(PtrOp1)); 3849 3850 Ops[1] = Builder.CreateCall(F, Args, "vld_dup"); 3851 // splat lane 0 to all elts in each vector of the result. 3852 for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { 3853 Value *Val = Builder.CreateExtractValue(Ops[1], i); 3854 Value *Elt = Builder.CreateBitCast(Val, Ty); 3855 Elt = EmitNeonSplat(Elt, CI); 3856 Elt = Builder.CreateBitCast(Elt, Val->getType()); 3857 Ops[1] = Builder.CreateInsertValue(Ops[1], Elt, i); 3858 } 3859 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3860 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3861 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3862 } 3863 case NEON::BI__builtin_neon_vqrshrn_n_v: 3864 Int = 3865 usgn ? Intrinsic::arm_neon_vqrshiftnu : Intrinsic::arm_neon_vqrshiftns; 3866 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n", 3867 1, true); 3868 case NEON::BI__builtin_neon_vqrshrun_n_v: 3869 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqrshiftnsu, Ty), 3870 Ops, "vqrshrun_n", 1, true); 3871 case NEON::BI__builtin_neon_vqshrn_n_v: 3872 Int = usgn ? Intrinsic::arm_neon_vqshiftnu : Intrinsic::arm_neon_vqshiftns; 3873 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n", 3874 1, true); 3875 case NEON::BI__builtin_neon_vqshrun_n_v: 3876 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqshiftnsu, Ty), 3877 Ops, "vqshrun_n", 1, true); 3878 case NEON::BI__builtin_neon_vrecpe_v: 3879 case NEON::BI__builtin_neon_vrecpeq_v: 3880 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecpe, Ty), 3881 Ops, "vrecpe"); 3882 case NEON::BI__builtin_neon_vrshrn_n_v: 3883 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrshiftn, Ty), 3884 Ops, "vrshrn_n", 1, true); 3885 case NEON::BI__builtin_neon_vrsra_n_v: 3886 case NEON::BI__builtin_neon_vrsraq_n_v: 3887 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3888 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3889 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, true); 3890 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 3891 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Ty), {Ops[1], Ops[2]}); 3892 return Builder.CreateAdd(Ops[0], Ops[1], "vrsra_n"); 3893 case NEON::BI__builtin_neon_vsri_n_v: 3894 case NEON::BI__builtin_neon_vsriq_n_v: 3895 rightShift = true; 3896 case NEON::BI__builtin_neon_vsli_n_v: 3897 case NEON::BI__builtin_neon_vsliq_n_v: 3898 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, rightShift); 3899 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vshiftins, Ty), 3900 Ops, "vsli_n"); 3901 case NEON::BI__builtin_neon_vsra_n_v: 3902 case NEON::BI__builtin_neon_vsraq_n_v: 3903 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3904 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 3905 return Builder.CreateAdd(Ops[0], Ops[1]); 3906 case NEON::BI__builtin_neon_vst1q_lane_v: 3907 // Handle 64-bit integer elements as a special case. Use a shuffle to get 3908 // a one-element vector and avoid poor code for i64 in the backend. 3909 if (VTy->getElementType()->isIntegerTy(64)) { 3910 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3911 Value *SV = llvm::ConstantVector::get(cast<llvm::Constant>(Ops[2])); 3912 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 3913 Ops[2] = getAlignmentValue32(PtrOp0); 3914 llvm::Type *Tys[] = {Int8PtrTy, Ops[1]->getType()}; 3915 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, 3916 Tys), Ops); 3917 } 3918 // fall through 3919 case NEON::BI__builtin_neon_vst1_lane_v: { 3920 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3921 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 3922 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3923 auto St = Builder.CreateStore(Ops[1], Builder.CreateBitCast(PtrOp0, Ty)); 3924 return St; 3925 } 3926 case NEON::BI__builtin_neon_vtbl1_v: 3927 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl1), 3928 Ops, "vtbl1"); 3929 case NEON::BI__builtin_neon_vtbl2_v: 3930 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl2), 3931 Ops, "vtbl2"); 3932 case NEON::BI__builtin_neon_vtbl3_v: 3933 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl3), 3934 Ops, "vtbl3"); 3935 case NEON::BI__builtin_neon_vtbl4_v: 3936 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl4), 3937 Ops, "vtbl4"); 3938 case NEON::BI__builtin_neon_vtbx1_v: 3939 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx1), 3940 Ops, "vtbx1"); 3941 case NEON::BI__builtin_neon_vtbx2_v: 3942 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx2), 3943 Ops, "vtbx2"); 3944 case NEON::BI__builtin_neon_vtbx3_v: 3945 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx3), 3946 Ops, "vtbx3"); 3947 case NEON::BI__builtin_neon_vtbx4_v: 3948 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx4), 3949 Ops, "vtbx4"); 3950 } 3951 } 3952 3953 static Value *EmitAArch64TblBuiltinExpr(CodeGenFunction &CGF, unsigned BuiltinID, 3954 const CallExpr *E, 3955 SmallVectorImpl<Value *> &Ops) { 3956 unsigned int Int = 0; 3957 const char *s = nullptr; 3958 3959 switch (BuiltinID) { 3960 default: 3961 return nullptr; 3962 case NEON::BI__builtin_neon_vtbl1_v: 3963 case NEON::BI__builtin_neon_vqtbl1_v: 3964 case NEON::BI__builtin_neon_vqtbl1q_v: 3965 case NEON::BI__builtin_neon_vtbl2_v: 3966 case NEON::BI__builtin_neon_vqtbl2_v: 3967 case NEON::BI__builtin_neon_vqtbl2q_v: 3968 case NEON::BI__builtin_neon_vtbl3_v: 3969 case NEON::BI__builtin_neon_vqtbl3_v: 3970 case NEON::BI__builtin_neon_vqtbl3q_v: 3971 case NEON::BI__builtin_neon_vtbl4_v: 3972 case NEON::BI__builtin_neon_vqtbl4_v: 3973 case NEON::BI__builtin_neon_vqtbl4q_v: 3974 break; 3975 case NEON::BI__builtin_neon_vtbx1_v: 3976 case NEON::BI__builtin_neon_vqtbx1_v: 3977 case NEON::BI__builtin_neon_vqtbx1q_v: 3978 case NEON::BI__builtin_neon_vtbx2_v: 3979 case NEON::BI__builtin_neon_vqtbx2_v: 3980 case NEON::BI__builtin_neon_vqtbx2q_v: 3981 case NEON::BI__builtin_neon_vtbx3_v: 3982 case NEON::BI__builtin_neon_vqtbx3_v: 3983 case NEON::BI__builtin_neon_vqtbx3q_v: 3984 case NEON::BI__builtin_neon_vtbx4_v: 3985 case NEON::BI__builtin_neon_vqtbx4_v: 3986 case NEON::BI__builtin_neon_vqtbx4q_v: 3987 break; 3988 } 3989 3990 assert(E->getNumArgs() >= 3); 3991 3992 // Get the last argument, which specifies the vector type. 3993 llvm::APSInt Result; 3994 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 3995 if (!Arg->isIntegerConstantExpr(Result, CGF.getContext())) 3996 return nullptr; 3997 3998 // Determine the type of this overloaded NEON intrinsic. 3999 NeonTypeFlags Type(Result.getZExtValue()); 4000 llvm::VectorType *Ty = GetNeonType(&CGF, Type); 4001 if (!Ty) 4002 return nullptr; 4003 4004 CodeGen::CGBuilderTy &Builder = CGF.Builder; 4005 4006 // AArch64 scalar builtins are not overloaded, they do not have an extra 4007 // argument that specifies the vector type, need to handle each case. 4008 switch (BuiltinID) { 4009 case NEON::BI__builtin_neon_vtbl1_v: { 4010 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 1), nullptr, 4011 Ops[1], Ty, Intrinsic::aarch64_neon_tbl1, 4012 "vtbl1"); 4013 } 4014 case NEON::BI__builtin_neon_vtbl2_v: { 4015 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 2), nullptr, 4016 Ops[2], Ty, Intrinsic::aarch64_neon_tbl1, 4017 "vtbl1"); 4018 } 4019 case NEON::BI__builtin_neon_vtbl3_v: { 4020 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 3), nullptr, 4021 Ops[3], Ty, Intrinsic::aarch64_neon_tbl2, 4022 "vtbl2"); 4023 } 4024 case NEON::BI__builtin_neon_vtbl4_v: { 4025 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 4), nullptr, 4026 Ops[4], Ty, Intrinsic::aarch64_neon_tbl2, 4027 "vtbl2"); 4028 } 4029 case NEON::BI__builtin_neon_vtbx1_v: { 4030 Value *TblRes = 4031 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 1), nullptr, Ops[2], 4032 Ty, Intrinsic::aarch64_neon_tbl1, "vtbl1"); 4033 4034 llvm::Constant *EightV = ConstantInt::get(Ty, 8); 4035 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[2], EightV); 4036 CmpRes = Builder.CreateSExt(CmpRes, Ty); 4037 4038 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 4039 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 4040 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 4041 } 4042 case NEON::BI__builtin_neon_vtbx2_v: { 4043 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 2), Ops[0], 4044 Ops[3], Ty, Intrinsic::aarch64_neon_tbx1, 4045 "vtbx1"); 4046 } 4047 case NEON::BI__builtin_neon_vtbx3_v: { 4048 Value *TblRes = 4049 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 3), nullptr, Ops[4], 4050 Ty, Intrinsic::aarch64_neon_tbl2, "vtbl2"); 4051 4052 llvm::Constant *TwentyFourV = ConstantInt::get(Ty, 24); 4053 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[4], 4054 TwentyFourV); 4055 CmpRes = Builder.CreateSExt(CmpRes, Ty); 4056 4057 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 4058 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 4059 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 4060 } 4061 case NEON::BI__builtin_neon_vtbx4_v: { 4062 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 4), Ops[0], 4063 Ops[5], Ty, Intrinsic::aarch64_neon_tbx2, 4064 "vtbx2"); 4065 } 4066 case NEON::BI__builtin_neon_vqtbl1_v: 4067 case NEON::BI__builtin_neon_vqtbl1q_v: 4068 Int = Intrinsic::aarch64_neon_tbl1; s = "vtbl1"; break; 4069 case NEON::BI__builtin_neon_vqtbl2_v: 4070 case NEON::BI__builtin_neon_vqtbl2q_v: { 4071 Int = Intrinsic::aarch64_neon_tbl2; s = "vtbl2"; break; 4072 case NEON::BI__builtin_neon_vqtbl3_v: 4073 case NEON::BI__builtin_neon_vqtbl3q_v: 4074 Int = Intrinsic::aarch64_neon_tbl3; s = "vtbl3"; break; 4075 case NEON::BI__builtin_neon_vqtbl4_v: 4076 case NEON::BI__builtin_neon_vqtbl4q_v: 4077 Int = Intrinsic::aarch64_neon_tbl4; s = "vtbl4"; break; 4078 case NEON::BI__builtin_neon_vqtbx1_v: 4079 case NEON::BI__builtin_neon_vqtbx1q_v: 4080 Int = Intrinsic::aarch64_neon_tbx1; s = "vtbx1"; break; 4081 case NEON::BI__builtin_neon_vqtbx2_v: 4082 case NEON::BI__builtin_neon_vqtbx2q_v: 4083 Int = Intrinsic::aarch64_neon_tbx2; s = "vtbx2"; break; 4084 case NEON::BI__builtin_neon_vqtbx3_v: 4085 case NEON::BI__builtin_neon_vqtbx3q_v: 4086 Int = Intrinsic::aarch64_neon_tbx3; s = "vtbx3"; break; 4087 case NEON::BI__builtin_neon_vqtbx4_v: 4088 case NEON::BI__builtin_neon_vqtbx4q_v: 4089 Int = Intrinsic::aarch64_neon_tbx4; s = "vtbx4"; break; 4090 } 4091 } 4092 4093 if (!Int) 4094 return nullptr; 4095 4096 Function *F = CGF.CGM.getIntrinsic(Int, Ty); 4097 return CGF.EmitNeonCall(F, Ops, s); 4098 } 4099 4100 Value *CodeGenFunction::vectorWrapScalar16(Value *Op) { 4101 llvm::Type *VTy = llvm::VectorType::get(Int16Ty, 4); 4102 Op = Builder.CreateBitCast(Op, Int16Ty); 4103 Value *V = UndefValue::get(VTy); 4104 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 4105 Op = Builder.CreateInsertElement(V, Op, CI); 4106 return Op; 4107 } 4108 4109 Value *CodeGenFunction::vectorWrapScalar8(Value *Op) { 4110 llvm::Type *VTy = llvm::VectorType::get(Int8Ty, 8); 4111 Op = Builder.CreateBitCast(Op, Int8Ty); 4112 Value *V = UndefValue::get(VTy); 4113 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 4114 Op = Builder.CreateInsertElement(V, Op, CI); 4115 return Op; 4116 } 4117 4118 Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, 4119 const CallExpr *E) { 4120 unsigned HintID = static_cast<unsigned>(-1); 4121 switch (BuiltinID) { 4122 default: break; 4123 case AArch64::BI__builtin_arm_nop: 4124 HintID = 0; 4125 break; 4126 case AArch64::BI__builtin_arm_yield: 4127 HintID = 1; 4128 break; 4129 case AArch64::BI__builtin_arm_wfe: 4130 HintID = 2; 4131 break; 4132 case AArch64::BI__builtin_arm_wfi: 4133 HintID = 3; 4134 break; 4135 case AArch64::BI__builtin_arm_sev: 4136 HintID = 4; 4137 break; 4138 case AArch64::BI__builtin_arm_sevl: 4139 HintID = 5; 4140 break; 4141 } 4142 4143 if (HintID != static_cast<unsigned>(-1)) { 4144 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_hint); 4145 return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID)); 4146 } 4147 4148 if (BuiltinID == AArch64::BI__builtin_arm_prefetch) { 4149 Value *Address = EmitScalarExpr(E->getArg(0)); 4150 Value *RW = EmitScalarExpr(E->getArg(1)); 4151 Value *CacheLevel = EmitScalarExpr(E->getArg(2)); 4152 Value *RetentionPolicy = EmitScalarExpr(E->getArg(3)); 4153 Value *IsData = EmitScalarExpr(E->getArg(4)); 4154 4155 Value *Locality = nullptr; 4156 if (cast<llvm::ConstantInt>(RetentionPolicy)->isZero()) { 4157 // Temporal fetch, needs to convert cache level to locality. 4158 Locality = llvm::ConstantInt::get(Int32Ty, 4159 -cast<llvm::ConstantInt>(CacheLevel)->getValue() + 3); 4160 } else { 4161 // Streaming fetch. 4162 Locality = llvm::ConstantInt::get(Int32Ty, 0); 4163 } 4164 4165 // FIXME: We need AArch64 specific LLVM intrinsic if we want to specify 4166 // PLDL3STRM or PLDL2STRM. 4167 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 4168 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 4169 } 4170 4171 if (BuiltinID == AArch64::BI__builtin_arm_rbit) { 4172 assert((getContext().getTypeSize(E->getType()) == 32) && 4173 "rbit of unusual size!"); 4174 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 4175 return Builder.CreateCall( 4176 CGM.getIntrinsic(Intrinsic::aarch64_rbit, Arg->getType()), Arg, "rbit"); 4177 } 4178 if (BuiltinID == AArch64::BI__builtin_arm_rbit64) { 4179 assert((getContext().getTypeSize(E->getType()) == 64) && 4180 "rbit of unusual size!"); 4181 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 4182 return Builder.CreateCall( 4183 CGM.getIntrinsic(Intrinsic::aarch64_rbit, Arg->getType()), Arg, "rbit"); 4184 } 4185 4186 if (BuiltinID == AArch64::BI__clear_cache) { 4187 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 4188 const FunctionDecl *FD = E->getDirectCallee(); 4189 Value *Ops[2]; 4190 for (unsigned i = 0; i < 2; i++) 4191 Ops[i] = EmitScalarExpr(E->getArg(i)); 4192 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 4193 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 4194 StringRef Name = FD->getName(); 4195 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 4196 } 4197 4198 if ((BuiltinID == AArch64::BI__builtin_arm_ldrex || 4199 BuiltinID == AArch64::BI__builtin_arm_ldaex) && 4200 getContext().getTypeSize(E->getType()) == 128) { 4201 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 4202 ? Intrinsic::aarch64_ldaxp 4203 : Intrinsic::aarch64_ldxp); 4204 4205 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 4206 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 4207 "ldxp"); 4208 4209 Value *Val0 = Builder.CreateExtractValue(Val, 1); 4210 Value *Val1 = Builder.CreateExtractValue(Val, 0); 4211 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 4212 Val0 = Builder.CreateZExt(Val0, Int128Ty); 4213 Val1 = Builder.CreateZExt(Val1, Int128Ty); 4214 4215 Value *ShiftCst = llvm::ConstantInt::get(Int128Ty, 64); 4216 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 4217 Val = Builder.CreateOr(Val, Val1); 4218 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 4219 } else if (BuiltinID == AArch64::BI__builtin_arm_ldrex || 4220 BuiltinID == AArch64::BI__builtin_arm_ldaex) { 4221 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 4222 4223 QualType Ty = E->getType(); 4224 llvm::Type *RealResTy = ConvertType(Ty); 4225 llvm::Type *IntResTy = llvm::IntegerType::get(getLLVMContext(), 4226 getContext().getTypeSize(Ty)); 4227 LoadAddr = Builder.CreateBitCast(LoadAddr, IntResTy->getPointerTo()); 4228 4229 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 4230 ? Intrinsic::aarch64_ldaxr 4231 : Intrinsic::aarch64_ldxr, 4232 LoadAddr->getType()); 4233 Value *Val = Builder.CreateCall(F, LoadAddr, "ldxr"); 4234 4235 if (RealResTy->isPointerTy()) 4236 return Builder.CreateIntToPtr(Val, RealResTy); 4237 4238 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 4239 return Builder.CreateBitCast(Val, RealResTy); 4240 } 4241 4242 if ((BuiltinID == AArch64::BI__builtin_arm_strex || 4243 BuiltinID == AArch64::BI__builtin_arm_stlex) && 4244 getContext().getTypeSize(E->getArg(0)->getType()) == 128) { 4245 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 4246 ? Intrinsic::aarch64_stlxp 4247 : Intrinsic::aarch64_stxp); 4248 llvm::Type *STy = llvm::StructType::get(Int64Ty, Int64Ty, nullptr); 4249 4250 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 4251 EmitAnyExprToMem(E->getArg(0), Tmp, Qualifiers(), /*init*/ true); 4252 4253 Tmp = Builder.CreateBitCast(Tmp, llvm::PointerType::getUnqual(STy)); 4254 llvm::Value *Val = Builder.CreateLoad(Tmp); 4255 4256 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 4257 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 4258 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), 4259 Int8PtrTy); 4260 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "stxp"); 4261 } 4262 4263 if (BuiltinID == AArch64::BI__builtin_arm_strex || 4264 BuiltinID == AArch64::BI__builtin_arm_stlex) { 4265 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 4266 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 4267 4268 QualType Ty = E->getArg(0)->getType(); 4269 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 4270 getContext().getTypeSize(Ty)); 4271 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 4272 4273 if (StoreVal->getType()->isPointerTy()) 4274 StoreVal = Builder.CreatePtrToInt(StoreVal, Int64Ty); 4275 else { 4276 StoreVal = Builder.CreateBitCast(StoreVal, StoreTy); 4277 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int64Ty); 4278 } 4279 4280 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 4281 ? Intrinsic::aarch64_stlxr 4282 : Intrinsic::aarch64_stxr, 4283 StoreAddr->getType()); 4284 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "stxr"); 4285 } 4286 4287 if (BuiltinID == AArch64::BI__builtin_arm_clrex) { 4288 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_clrex); 4289 return Builder.CreateCall(F); 4290 } 4291 4292 if (BuiltinID == AArch64::BI__builtin_thread_pointer) { 4293 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_thread_pointer); 4294 return Builder.CreateCall(F); 4295 } 4296 4297 // CRC32 4298 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 4299 switch (BuiltinID) { 4300 case AArch64::BI__builtin_arm_crc32b: 4301 CRCIntrinsicID = Intrinsic::aarch64_crc32b; break; 4302 case AArch64::BI__builtin_arm_crc32cb: 4303 CRCIntrinsicID = Intrinsic::aarch64_crc32cb; break; 4304 case AArch64::BI__builtin_arm_crc32h: 4305 CRCIntrinsicID = Intrinsic::aarch64_crc32h; break; 4306 case AArch64::BI__builtin_arm_crc32ch: 4307 CRCIntrinsicID = Intrinsic::aarch64_crc32ch; break; 4308 case AArch64::BI__builtin_arm_crc32w: 4309 CRCIntrinsicID = Intrinsic::aarch64_crc32w; break; 4310 case AArch64::BI__builtin_arm_crc32cw: 4311 CRCIntrinsicID = Intrinsic::aarch64_crc32cw; break; 4312 case AArch64::BI__builtin_arm_crc32d: 4313 CRCIntrinsicID = Intrinsic::aarch64_crc32x; break; 4314 case AArch64::BI__builtin_arm_crc32cd: 4315 CRCIntrinsicID = Intrinsic::aarch64_crc32cx; break; 4316 } 4317 4318 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 4319 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 4320 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 4321 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 4322 4323 llvm::Type *DataTy = F->getFunctionType()->getParamType(1); 4324 Arg1 = Builder.CreateZExtOrBitCast(Arg1, DataTy); 4325 4326 return Builder.CreateCall(F, {Arg0, Arg1}); 4327 } 4328 4329 if (BuiltinID == AArch64::BI__builtin_arm_rsr || 4330 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 4331 BuiltinID == AArch64::BI__builtin_arm_rsrp || 4332 BuiltinID == AArch64::BI__builtin_arm_wsr || 4333 BuiltinID == AArch64::BI__builtin_arm_wsr64 || 4334 BuiltinID == AArch64::BI__builtin_arm_wsrp) { 4335 4336 bool IsRead = BuiltinID == AArch64::BI__builtin_arm_rsr || 4337 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 4338 BuiltinID == AArch64::BI__builtin_arm_rsrp; 4339 4340 bool IsPointerBuiltin = BuiltinID == AArch64::BI__builtin_arm_rsrp || 4341 BuiltinID == AArch64::BI__builtin_arm_wsrp; 4342 4343 bool Is64Bit = BuiltinID != AArch64::BI__builtin_arm_rsr && 4344 BuiltinID != AArch64::BI__builtin_arm_wsr; 4345 4346 llvm::Type *ValueType; 4347 llvm::Type *RegisterType = Int64Ty; 4348 if (IsPointerBuiltin) { 4349 ValueType = VoidPtrTy; 4350 } else if (Is64Bit) { 4351 ValueType = Int64Ty; 4352 } else { 4353 ValueType = Int32Ty; 4354 } 4355 4356 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 4357 } 4358 4359 // Find out if any arguments are required to be integer constant 4360 // expressions. 4361 unsigned ICEArguments = 0; 4362 ASTContext::GetBuiltinTypeError Error; 4363 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 4364 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 4365 4366 llvm::SmallVector<Value*, 4> Ops; 4367 for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; i++) { 4368 if ((ICEArguments & (1 << i)) == 0) { 4369 Ops.push_back(EmitScalarExpr(E->getArg(i))); 4370 } else { 4371 // If this is required to be a constant, constant fold it so that we know 4372 // that the generated intrinsic gets a ConstantInt. 4373 llvm::APSInt Result; 4374 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 4375 assert(IsConst && "Constant arg isn't actually constant?"); 4376 (void)IsConst; 4377 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 4378 } 4379 } 4380 4381 auto SISDMap = makeArrayRef(AArch64SISDIntrinsicMap); 4382 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 4383 SISDMap, BuiltinID, AArch64SISDIntrinsicsProvenSorted); 4384 4385 if (Builtin) { 4386 Ops.push_back(EmitScalarExpr(E->getArg(E->getNumArgs() - 1))); 4387 Value *Result = EmitCommonNeonSISDBuiltinExpr(*this, *Builtin, Ops, E); 4388 assert(Result && "SISD intrinsic should have been handled"); 4389 return Result; 4390 } 4391 4392 llvm::APSInt Result; 4393 const Expr *Arg = E->getArg(E->getNumArgs()-1); 4394 NeonTypeFlags Type(0); 4395 if (Arg->isIntegerConstantExpr(Result, getContext())) 4396 // Determine the type of this overloaded NEON intrinsic. 4397 Type = NeonTypeFlags(Result.getZExtValue()); 4398 4399 bool usgn = Type.isUnsigned(); 4400 bool quad = Type.isQuad(); 4401 4402 // Handle non-overloaded intrinsics first. 4403 switch (BuiltinID) { 4404 default: break; 4405 case NEON::BI__builtin_neon_vldrq_p128: { 4406 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 4407 Value *Ptr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PTy); 4408 return Builder.CreateDefaultAlignedLoad(Ptr); 4409 } 4410 case NEON::BI__builtin_neon_vstrq_p128: { 4411 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 4412 Value *Ptr = Builder.CreateBitCast(Ops[0], Int128PTy); 4413 return Builder.CreateDefaultAlignedStore(EmitScalarExpr(E->getArg(1)), Ptr); 4414 } 4415 case NEON::BI__builtin_neon_vcvts_u32_f32: 4416 case NEON::BI__builtin_neon_vcvtd_u64_f64: 4417 usgn = true; 4418 // FALL THROUGH 4419 case NEON::BI__builtin_neon_vcvts_s32_f32: 4420 case NEON::BI__builtin_neon_vcvtd_s64_f64: { 4421 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4422 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 4423 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 4424 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 4425 Ops[0] = Builder.CreateBitCast(Ops[0], FTy); 4426 if (usgn) 4427 return Builder.CreateFPToUI(Ops[0], InTy); 4428 return Builder.CreateFPToSI(Ops[0], InTy); 4429 } 4430 case NEON::BI__builtin_neon_vcvts_f32_u32: 4431 case NEON::BI__builtin_neon_vcvtd_f64_u64: 4432 usgn = true; 4433 // FALL THROUGH 4434 case NEON::BI__builtin_neon_vcvts_f32_s32: 4435 case NEON::BI__builtin_neon_vcvtd_f64_s64: { 4436 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4437 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 4438 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 4439 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 4440 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 4441 if (usgn) 4442 return Builder.CreateUIToFP(Ops[0], FTy); 4443 return Builder.CreateSIToFP(Ops[0], FTy); 4444 } 4445 case NEON::BI__builtin_neon_vpaddd_s64: { 4446 llvm::Type *Ty = llvm::VectorType::get(Int64Ty, 2); 4447 Value *Vec = EmitScalarExpr(E->getArg(0)); 4448 // The vector is v2f64, so make sure it's bitcast to that. 4449 Vec = Builder.CreateBitCast(Vec, Ty, "v2i64"); 4450 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 4451 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 4452 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 4453 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 4454 // Pairwise addition of a v2f64 into a scalar f64. 4455 return Builder.CreateAdd(Op0, Op1, "vpaddd"); 4456 } 4457 case NEON::BI__builtin_neon_vpaddd_f64: { 4458 llvm::Type *Ty = 4459 llvm::VectorType::get(DoubleTy, 2); 4460 Value *Vec = EmitScalarExpr(E->getArg(0)); 4461 // The vector is v2f64, so make sure it's bitcast to that. 4462 Vec = Builder.CreateBitCast(Vec, Ty, "v2f64"); 4463 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 4464 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 4465 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 4466 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 4467 // Pairwise addition of a v2f64 into a scalar f64. 4468 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 4469 } 4470 case NEON::BI__builtin_neon_vpadds_f32: { 4471 llvm::Type *Ty = 4472 llvm::VectorType::get(FloatTy, 2); 4473 Value *Vec = EmitScalarExpr(E->getArg(0)); 4474 // The vector is v2f32, so make sure it's bitcast to that. 4475 Vec = Builder.CreateBitCast(Vec, Ty, "v2f32"); 4476 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 4477 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 4478 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 4479 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 4480 // Pairwise addition of a v2f32 into a scalar f32. 4481 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 4482 } 4483 case NEON::BI__builtin_neon_vceqzd_s64: 4484 case NEON::BI__builtin_neon_vceqzd_f64: 4485 case NEON::BI__builtin_neon_vceqzs_f32: 4486 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4487 return EmitAArch64CompareBuiltinExpr( 4488 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4489 ICmpInst::FCMP_OEQ, ICmpInst::ICMP_EQ, "vceqz"); 4490 case NEON::BI__builtin_neon_vcgezd_s64: 4491 case NEON::BI__builtin_neon_vcgezd_f64: 4492 case NEON::BI__builtin_neon_vcgezs_f32: 4493 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4494 return EmitAArch64CompareBuiltinExpr( 4495 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4496 ICmpInst::FCMP_OGE, ICmpInst::ICMP_SGE, "vcgez"); 4497 case NEON::BI__builtin_neon_vclezd_s64: 4498 case NEON::BI__builtin_neon_vclezd_f64: 4499 case NEON::BI__builtin_neon_vclezs_f32: 4500 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4501 return EmitAArch64CompareBuiltinExpr( 4502 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4503 ICmpInst::FCMP_OLE, ICmpInst::ICMP_SLE, "vclez"); 4504 case NEON::BI__builtin_neon_vcgtzd_s64: 4505 case NEON::BI__builtin_neon_vcgtzd_f64: 4506 case NEON::BI__builtin_neon_vcgtzs_f32: 4507 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4508 return EmitAArch64CompareBuiltinExpr( 4509 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4510 ICmpInst::FCMP_OGT, ICmpInst::ICMP_SGT, "vcgtz"); 4511 case NEON::BI__builtin_neon_vcltzd_s64: 4512 case NEON::BI__builtin_neon_vcltzd_f64: 4513 case NEON::BI__builtin_neon_vcltzs_f32: 4514 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4515 return EmitAArch64CompareBuiltinExpr( 4516 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4517 ICmpInst::FCMP_OLT, ICmpInst::ICMP_SLT, "vcltz"); 4518 4519 case NEON::BI__builtin_neon_vceqzd_u64: { 4520 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4521 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 4522 Ops[0] = 4523 Builder.CreateICmpEQ(Ops[0], llvm::Constant::getNullValue(Int64Ty)); 4524 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqzd"); 4525 } 4526 case NEON::BI__builtin_neon_vceqd_f64: 4527 case NEON::BI__builtin_neon_vcled_f64: 4528 case NEON::BI__builtin_neon_vcltd_f64: 4529 case NEON::BI__builtin_neon_vcged_f64: 4530 case NEON::BI__builtin_neon_vcgtd_f64: { 4531 llvm::CmpInst::Predicate P; 4532 switch (BuiltinID) { 4533 default: llvm_unreachable("missing builtin ID in switch!"); 4534 case NEON::BI__builtin_neon_vceqd_f64: P = llvm::FCmpInst::FCMP_OEQ; break; 4535 case NEON::BI__builtin_neon_vcled_f64: P = llvm::FCmpInst::FCMP_OLE; break; 4536 case NEON::BI__builtin_neon_vcltd_f64: P = llvm::FCmpInst::FCMP_OLT; break; 4537 case NEON::BI__builtin_neon_vcged_f64: P = llvm::FCmpInst::FCMP_OGE; break; 4538 case NEON::BI__builtin_neon_vcgtd_f64: P = llvm::FCmpInst::FCMP_OGT; break; 4539 } 4540 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4541 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 4542 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 4543 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 4544 return Builder.CreateSExt(Ops[0], Int64Ty, "vcmpd"); 4545 } 4546 case NEON::BI__builtin_neon_vceqs_f32: 4547 case NEON::BI__builtin_neon_vcles_f32: 4548 case NEON::BI__builtin_neon_vclts_f32: 4549 case NEON::BI__builtin_neon_vcges_f32: 4550 case NEON::BI__builtin_neon_vcgts_f32: { 4551 llvm::CmpInst::Predicate P; 4552 switch (BuiltinID) { 4553 default: llvm_unreachable("missing builtin ID in switch!"); 4554 case NEON::BI__builtin_neon_vceqs_f32: P = llvm::FCmpInst::FCMP_OEQ; break; 4555 case NEON::BI__builtin_neon_vcles_f32: P = llvm::FCmpInst::FCMP_OLE; break; 4556 case NEON::BI__builtin_neon_vclts_f32: P = llvm::FCmpInst::FCMP_OLT; break; 4557 case NEON::BI__builtin_neon_vcges_f32: P = llvm::FCmpInst::FCMP_OGE; break; 4558 case NEON::BI__builtin_neon_vcgts_f32: P = llvm::FCmpInst::FCMP_OGT; break; 4559 } 4560 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4561 Ops[0] = Builder.CreateBitCast(Ops[0], FloatTy); 4562 Ops[1] = Builder.CreateBitCast(Ops[1], FloatTy); 4563 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 4564 return Builder.CreateSExt(Ops[0], Int32Ty, "vcmpd"); 4565 } 4566 case NEON::BI__builtin_neon_vceqd_s64: 4567 case NEON::BI__builtin_neon_vceqd_u64: 4568 case NEON::BI__builtin_neon_vcgtd_s64: 4569 case NEON::BI__builtin_neon_vcgtd_u64: 4570 case NEON::BI__builtin_neon_vcltd_s64: 4571 case NEON::BI__builtin_neon_vcltd_u64: 4572 case NEON::BI__builtin_neon_vcged_u64: 4573 case NEON::BI__builtin_neon_vcged_s64: 4574 case NEON::BI__builtin_neon_vcled_u64: 4575 case NEON::BI__builtin_neon_vcled_s64: { 4576 llvm::CmpInst::Predicate P; 4577 switch (BuiltinID) { 4578 default: llvm_unreachable("missing builtin ID in switch!"); 4579 case NEON::BI__builtin_neon_vceqd_s64: 4580 case NEON::BI__builtin_neon_vceqd_u64:P = llvm::ICmpInst::ICMP_EQ;break; 4581 case NEON::BI__builtin_neon_vcgtd_s64:P = llvm::ICmpInst::ICMP_SGT;break; 4582 case NEON::BI__builtin_neon_vcgtd_u64:P = llvm::ICmpInst::ICMP_UGT;break; 4583 case NEON::BI__builtin_neon_vcltd_s64:P = llvm::ICmpInst::ICMP_SLT;break; 4584 case NEON::BI__builtin_neon_vcltd_u64:P = llvm::ICmpInst::ICMP_ULT;break; 4585 case NEON::BI__builtin_neon_vcged_u64:P = llvm::ICmpInst::ICMP_UGE;break; 4586 case NEON::BI__builtin_neon_vcged_s64:P = llvm::ICmpInst::ICMP_SGE;break; 4587 case NEON::BI__builtin_neon_vcled_u64:P = llvm::ICmpInst::ICMP_ULE;break; 4588 case NEON::BI__builtin_neon_vcled_s64:P = llvm::ICmpInst::ICMP_SLE;break; 4589 } 4590 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4591 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 4592 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 4593 Ops[0] = Builder.CreateICmp(P, Ops[0], Ops[1]); 4594 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqd"); 4595 } 4596 case NEON::BI__builtin_neon_vtstd_s64: 4597 case NEON::BI__builtin_neon_vtstd_u64: { 4598 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4599 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 4600 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 4601 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 4602 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 4603 llvm::Constant::getNullValue(Int64Ty)); 4604 return Builder.CreateSExt(Ops[0], Int64Ty, "vtstd"); 4605 } 4606 case NEON::BI__builtin_neon_vset_lane_i8: 4607 case NEON::BI__builtin_neon_vset_lane_i16: 4608 case NEON::BI__builtin_neon_vset_lane_i32: 4609 case NEON::BI__builtin_neon_vset_lane_i64: 4610 case NEON::BI__builtin_neon_vset_lane_f32: 4611 case NEON::BI__builtin_neon_vsetq_lane_i8: 4612 case NEON::BI__builtin_neon_vsetq_lane_i16: 4613 case NEON::BI__builtin_neon_vsetq_lane_i32: 4614 case NEON::BI__builtin_neon_vsetq_lane_i64: 4615 case NEON::BI__builtin_neon_vsetq_lane_f32: 4616 Ops.push_back(EmitScalarExpr(E->getArg(2))); 4617 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4618 case NEON::BI__builtin_neon_vset_lane_f64: 4619 // The vector type needs a cast for the v1f64 variant. 4620 Ops[1] = Builder.CreateBitCast(Ops[1], 4621 llvm::VectorType::get(DoubleTy, 1)); 4622 Ops.push_back(EmitScalarExpr(E->getArg(2))); 4623 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4624 case NEON::BI__builtin_neon_vsetq_lane_f64: 4625 // The vector type needs a cast for the v2f64 variant. 4626 Ops[1] = Builder.CreateBitCast(Ops[1], 4627 llvm::VectorType::get(DoubleTy, 2)); 4628 Ops.push_back(EmitScalarExpr(E->getArg(2))); 4629 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4630 4631 case NEON::BI__builtin_neon_vget_lane_i8: 4632 case NEON::BI__builtin_neon_vdupb_lane_i8: 4633 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 8)); 4634 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4635 "vget_lane"); 4636 case NEON::BI__builtin_neon_vgetq_lane_i8: 4637 case NEON::BI__builtin_neon_vdupb_laneq_i8: 4638 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 16)); 4639 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4640 "vgetq_lane"); 4641 case NEON::BI__builtin_neon_vget_lane_i16: 4642 case NEON::BI__builtin_neon_vduph_lane_i16: 4643 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 4)); 4644 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4645 "vget_lane"); 4646 case NEON::BI__builtin_neon_vgetq_lane_i16: 4647 case NEON::BI__builtin_neon_vduph_laneq_i16: 4648 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 8)); 4649 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4650 "vgetq_lane"); 4651 case NEON::BI__builtin_neon_vget_lane_i32: 4652 case NEON::BI__builtin_neon_vdups_lane_i32: 4653 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 2)); 4654 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4655 "vget_lane"); 4656 case NEON::BI__builtin_neon_vdups_lane_f32: 4657 Ops[0] = Builder.CreateBitCast(Ops[0], 4658 llvm::VectorType::get(FloatTy, 2)); 4659 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4660 "vdups_lane"); 4661 case NEON::BI__builtin_neon_vgetq_lane_i32: 4662 case NEON::BI__builtin_neon_vdups_laneq_i32: 4663 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 4664 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4665 "vgetq_lane"); 4666 case NEON::BI__builtin_neon_vget_lane_i64: 4667 case NEON::BI__builtin_neon_vdupd_lane_i64: 4668 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 1)); 4669 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4670 "vget_lane"); 4671 case NEON::BI__builtin_neon_vdupd_lane_f64: 4672 Ops[0] = Builder.CreateBitCast(Ops[0], 4673 llvm::VectorType::get(DoubleTy, 1)); 4674 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4675 "vdupd_lane"); 4676 case NEON::BI__builtin_neon_vgetq_lane_i64: 4677 case NEON::BI__builtin_neon_vdupd_laneq_i64: 4678 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 4679 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4680 "vgetq_lane"); 4681 case NEON::BI__builtin_neon_vget_lane_f32: 4682 Ops[0] = Builder.CreateBitCast(Ops[0], 4683 llvm::VectorType::get(FloatTy, 2)); 4684 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4685 "vget_lane"); 4686 case NEON::BI__builtin_neon_vget_lane_f64: 4687 Ops[0] = Builder.CreateBitCast(Ops[0], 4688 llvm::VectorType::get(DoubleTy, 1)); 4689 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4690 "vget_lane"); 4691 case NEON::BI__builtin_neon_vgetq_lane_f32: 4692 case NEON::BI__builtin_neon_vdups_laneq_f32: 4693 Ops[0] = Builder.CreateBitCast(Ops[0], 4694 llvm::VectorType::get(FloatTy, 4)); 4695 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4696 "vgetq_lane"); 4697 case NEON::BI__builtin_neon_vgetq_lane_f64: 4698 case NEON::BI__builtin_neon_vdupd_laneq_f64: 4699 Ops[0] = Builder.CreateBitCast(Ops[0], 4700 llvm::VectorType::get(DoubleTy, 2)); 4701 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4702 "vgetq_lane"); 4703 case NEON::BI__builtin_neon_vaddd_s64: 4704 case NEON::BI__builtin_neon_vaddd_u64: 4705 return Builder.CreateAdd(Ops[0], EmitScalarExpr(E->getArg(1)), "vaddd"); 4706 case NEON::BI__builtin_neon_vsubd_s64: 4707 case NEON::BI__builtin_neon_vsubd_u64: 4708 return Builder.CreateSub(Ops[0], EmitScalarExpr(E->getArg(1)), "vsubd"); 4709 case NEON::BI__builtin_neon_vqdmlalh_s16: 4710 case NEON::BI__builtin_neon_vqdmlslh_s16: { 4711 SmallVector<Value *, 2> ProductOps; 4712 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 4713 ProductOps.push_back(vectorWrapScalar16(EmitScalarExpr(E->getArg(2)))); 4714 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 4715 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 4716 ProductOps, "vqdmlXl"); 4717 Constant *CI = ConstantInt::get(SizeTy, 0); 4718 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 4719 4720 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlalh_s16 4721 ? Intrinsic::aarch64_neon_sqadd 4722 : Intrinsic::aarch64_neon_sqsub; 4723 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int32Ty), Ops, "vqdmlXl"); 4724 } 4725 case NEON::BI__builtin_neon_vqshlud_n_s64: { 4726 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4727 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 4728 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqshlu, Int64Ty), 4729 Ops, "vqshlu_n"); 4730 } 4731 case NEON::BI__builtin_neon_vqshld_n_u64: 4732 case NEON::BI__builtin_neon_vqshld_n_s64: { 4733 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vqshld_n_u64 4734 ? Intrinsic::aarch64_neon_uqshl 4735 : Intrinsic::aarch64_neon_sqshl; 4736 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4737 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 4738 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vqshl_n"); 4739 } 4740 case NEON::BI__builtin_neon_vrshrd_n_u64: 4741 case NEON::BI__builtin_neon_vrshrd_n_s64: { 4742 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrshrd_n_u64 4743 ? Intrinsic::aarch64_neon_urshl 4744 : Intrinsic::aarch64_neon_srshl; 4745 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4746 int SV = cast<ConstantInt>(Ops[1])->getSExtValue(); 4747 Ops[1] = ConstantInt::get(Int64Ty, -SV); 4748 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vrshr_n"); 4749 } 4750 case NEON::BI__builtin_neon_vrsrad_n_u64: 4751 case NEON::BI__builtin_neon_vrsrad_n_s64: { 4752 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrsrad_n_u64 4753 ? Intrinsic::aarch64_neon_urshl 4754 : Intrinsic::aarch64_neon_srshl; 4755 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 4756 Ops.push_back(Builder.CreateNeg(EmitScalarExpr(E->getArg(2)))); 4757 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Int64Ty), 4758 {Ops[1], Builder.CreateSExt(Ops[2], Int64Ty)}); 4759 return Builder.CreateAdd(Ops[0], Builder.CreateBitCast(Ops[1], Int64Ty)); 4760 } 4761 case NEON::BI__builtin_neon_vshld_n_s64: 4762 case NEON::BI__builtin_neon_vshld_n_u64: { 4763 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 4764 return Builder.CreateShl( 4765 Ops[0], ConstantInt::get(Int64Ty, Amt->getZExtValue()), "shld_n"); 4766 } 4767 case NEON::BI__builtin_neon_vshrd_n_s64: { 4768 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 4769 return Builder.CreateAShr( 4770 Ops[0], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 4771 Amt->getZExtValue())), 4772 "shrd_n"); 4773 } 4774 case NEON::BI__builtin_neon_vshrd_n_u64: { 4775 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 4776 uint64_t ShiftAmt = Amt->getZExtValue(); 4777 // Right-shifting an unsigned value by its size yields 0. 4778 if (ShiftAmt == 64) 4779 return ConstantInt::get(Int64Ty, 0); 4780 return Builder.CreateLShr(Ops[0], ConstantInt::get(Int64Ty, ShiftAmt), 4781 "shrd_n"); 4782 } 4783 case NEON::BI__builtin_neon_vsrad_n_s64: { 4784 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 4785 Ops[1] = Builder.CreateAShr( 4786 Ops[1], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 4787 Amt->getZExtValue())), 4788 "shrd_n"); 4789 return Builder.CreateAdd(Ops[0], Ops[1]); 4790 } 4791 case NEON::BI__builtin_neon_vsrad_n_u64: { 4792 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 4793 uint64_t ShiftAmt = Amt->getZExtValue(); 4794 // Right-shifting an unsigned value by its size yields 0. 4795 // As Op + 0 = Op, return Ops[0] directly. 4796 if (ShiftAmt == 64) 4797 return Ops[0]; 4798 Ops[1] = Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, ShiftAmt), 4799 "shrd_n"); 4800 return Builder.CreateAdd(Ops[0], Ops[1]); 4801 } 4802 case NEON::BI__builtin_neon_vqdmlalh_lane_s16: 4803 case NEON::BI__builtin_neon_vqdmlalh_laneq_s16: 4804 case NEON::BI__builtin_neon_vqdmlslh_lane_s16: 4805 case NEON::BI__builtin_neon_vqdmlslh_laneq_s16: { 4806 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 4807 "lane"); 4808 SmallVector<Value *, 2> ProductOps; 4809 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 4810 ProductOps.push_back(vectorWrapScalar16(Ops[2])); 4811 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 4812 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 4813 ProductOps, "vqdmlXl"); 4814 Constant *CI = ConstantInt::get(SizeTy, 0); 4815 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 4816 Ops.pop_back(); 4817 4818 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlalh_lane_s16 || 4819 BuiltinID == NEON::BI__builtin_neon_vqdmlalh_laneq_s16) 4820 ? Intrinsic::aarch64_neon_sqadd 4821 : Intrinsic::aarch64_neon_sqsub; 4822 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int32Ty), Ops, "vqdmlXl"); 4823 } 4824 case NEON::BI__builtin_neon_vqdmlals_s32: 4825 case NEON::BI__builtin_neon_vqdmlsls_s32: { 4826 SmallVector<Value *, 2> ProductOps; 4827 ProductOps.push_back(Ops[1]); 4828 ProductOps.push_back(EmitScalarExpr(E->getArg(2))); 4829 Ops[1] = 4830 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 4831 ProductOps, "vqdmlXl"); 4832 4833 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlals_s32 4834 ? Intrinsic::aarch64_neon_sqadd 4835 : Intrinsic::aarch64_neon_sqsub; 4836 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int64Ty), Ops, "vqdmlXl"); 4837 } 4838 case NEON::BI__builtin_neon_vqdmlals_lane_s32: 4839 case NEON::BI__builtin_neon_vqdmlals_laneq_s32: 4840 case NEON::BI__builtin_neon_vqdmlsls_lane_s32: 4841 case NEON::BI__builtin_neon_vqdmlsls_laneq_s32: { 4842 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 4843 "lane"); 4844 SmallVector<Value *, 2> ProductOps; 4845 ProductOps.push_back(Ops[1]); 4846 ProductOps.push_back(Ops[2]); 4847 Ops[1] = 4848 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 4849 ProductOps, "vqdmlXl"); 4850 Ops.pop_back(); 4851 4852 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlals_lane_s32 || 4853 BuiltinID == NEON::BI__builtin_neon_vqdmlals_laneq_s32) 4854 ? Intrinsic::aarch64_neon_sqadd 4855 : Intrinsic::aarch64_neon_sqsub; 4856 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl"); 4857 } 4858 } 4859 4860 llvm::VectorType *VTy = GetNeonType(this, Type); 4861 llvm::Type *Ty = VTy; 4862 if (!Ty) 4863 return nullptr; 4864 4865 // Not all intrinsics handled by the common case work for AArch64 yet, so only 4866 // defer to common code if it's been added to our special map. 4867 Builtin = findNeonIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID, 4868 AArch64SIMDIntrinsicsProvenSorted); 4869 4870 if (Builtin) 4871 return EmitCommonNeonBuiltinExpr( 4872 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 4873 Builtin->NameHint, Builtin->TypeModifier, E, Ops, 4874 /*never use addresses*/ Address::invalid(), Address::invalid()); 4875 4876 if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops)) 4877 return V; 4878 4879 unsigned Int; 4880 switch (BuiltinID) { 4881 default: return nullptr; 4882 case NEON::BI__builtin_neon_vbsl_v: 4883 case NEON::BI__builtin_neon_vbslq_v: { 4884 llvm::Type *BitTy = llvm::VectorType::getInteger(VTy); 4885 Ops[0] = Builder.CreateBitCast(Ops[0], BitTy, "vbsl"); 4886 Ops[1] = Builder.CreateBitCast(Ops[1], BitTy, "vbsl"); 4887 Ops[2] = Builder.CreateBitCast(Ops[2], BitTy, "vbsl"); 4888 4889 Ops[1] = Builder.CreateAnd(Ops[0], Ops[1], "vbsl"); 4890 Ops[2] = Builder.CreateAnd(Builder.CreateNot(Ops[0]), Ops[2], "vbsl"); 4891 Ops[0] = Builder.CreateOr(Ops[1], Ops[2], "vbsl"); 4892 return Builder.CreateBitCast(Ops[0], Ty); 4893 } 4894 case NEON::BI__builtin_neon_vfma_lane_v: 4895 case NEON::BI__builtin_neon_vfmaq_lane_v: { // Only used for FP types 4896 // The ARM builtins (and instructions) have the addend as the first 4897 // operand, but the 'fma' intrinsics have it last. Swap it around here. 4898 Value *Addend = Ops[0]; 4899 Value *Multiplicand = Ops[1]; 4900 Value *LaneSource = Ops[2]; 4901 Ops[0] = Multiplicand; 4902 Ops[1] = LaneSource; 4903 Ops[2] = Addend; 4904 4905 // Now adjust things to handle the lane access. 4906 llvm::Type *SourceTy = BuiltinID == NEON::BI__builtin_neon_vfmaq_lane_v ? 4907 llvm::VectorType::get(VTy->getElementType(), VTy->getNumElements() / 2) : 4908 VTy; 4909 llvm::Constant *cst = cast<Constant>(Ops[3]); 4910 Value *SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), cst); 4911 Ops[1] = Builder.CreateBitCast(Ops[1], SourceTy); 4912 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV, "lane"); 4913 4914 Ops.pop_back(); 4915 Int = Intrinsic::fma; 4916 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmla"); 4917 } 4918 case NEON::BI__builtin_neon_vfma_laneq_v: { 4919 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 4920 // v1f64 fma should be mapped to Neon scalar f64 fma 4921 if (VTy && VTy->getElementType() == DoubleTy) { 4922 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 4923 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 4924 llvm::Type *VTy = GetNeonType(this, 4925 NeonTypeFlags(NeonTypeFlags::Float64, false, true)); 4926 Ops[2] = Builder.CreateBitCast(Ops[2], VTy); 4927 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 4928 Value *F = CGM.getIntrinsic(Intrinsic::fma, DoubleTy); 4929 Value *Result = Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 4930 return Builder.CreateBitCast(Result, Ty); 4931 } 4932 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 4933 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4934 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4935 4936 llvm::Type *STy = llvm::VectorType::get(VTy->getElementType(), 4937 VTy->getNumElements() * 2); 4938 Ops[2] = Builder.CreateBitCast(Ops[2], STy); 4939 Value* SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), 4940 cast<ConstantInt>(Ops[3])); 4941 Ops[2] = Builder.CreateShuffleVector(Ops[2], Ops[2], SV, "lane"); 4942 4943 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 4944 } 4945 case NEON::BI__builtin_neon_vfmaq_laneq_v: { 4946 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 4947 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4948 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4949 4950 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4951 Ops[2] = EmitNeonSplat(Ops[2], cast<ConstantInt>(Ops[3])); 4952 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 4953 } 4954 case NEON::BI__builtin_neon_vfmas_lane_f32: 4955 case NEON::BI__builtin_neon_vfmas_laneq_f32: 4956 case NEON::BI__builtin_neon_vfmad_lane_f64: 4957 case NEON::BI__builtin_neon_vfmad_laneq_f64: { 4958 Ops.push_back(EmitScalarExpr(E->getArg(3))); 4959 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 4960 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 4961 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 4962 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 4963 } 4964 case NEON::BI__builtin_neon_vfms_v: 4965 case NEON::BI__builtin_neon_vfmsq_v: { // Only used for FP types 4966 // FIXME: probably remove when we no longer support aarch64_simd.h 4967 // (arm_neon.h delegates to vfma). 4968 4969 // The ARM builtins (and instructions) have the addend as the first 4970 // operand, but the 'fma' intrinsics have it last. Swap it around here. 4971 Value *Subtrahend = Ops[0]; 4972 Value *Multiplicand = Ops[2]; 4973 Ops[0] = Multiplicand; 4974 Ops[2] = Subtrahend; 4975 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 4976 Ops[1] = Builder.CreateFNeg(Ops[1]); 4977 Int = Intrinsic::fma; 4978 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmls"); 4979 } 4980 case NEON::BI__builtin_neon_vmull_v: 4981 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 4982 Int = usgn ? Intrinsic::aarch64_neon_umull : Intrinsic::aarch64_neon_smull; 4983 if (Type.isPoly()) Int = Intrinsic::aarch64_neon_pmull; 4984 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 4985 case NEON::BI__builtin_neon_vmax_v: 4986 case NEON::BI__builtin_neon_vmaxq_v: 4987 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 4988 Int = usgn ? Intrinsic::aarch64_neon_umax : Intrinsic::aarch64_neon_smax; 4989 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmax; 4990 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmax"); 4991 case NEON::BI__builtin_neon_vmin_v: 4992 case NEON::BI__builtin_neon_vminq_v: 4993 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 4994 Int = usgn ? Intrinsic::aarch64_neon_umin : Intrinsic::aarch64_neon_smin; 4995 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmin; 4996 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmin"); 4997 case NEON::BI__builtin_neon_vabd_v: 4998 case NEON::BI__builtin_neon_vabdq_v: 4999 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5000 Int = usgn ? Intrinsic::aarch64_neon_uabd : Intrinsic::aarch64_neon_sabd; 5001 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fabd; 5002 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vabd"); 5003 case NEON::BI__builtin_neon_vpadal_v: 5004 case NEON::BI__builtin_neon_vpadalq_v: { 5005 unsigned ArgElts = VTy->getNumElements(); 5006 llvm::IntegerType *EltTy = cast<IntegerType>(VTy->getElementType()); 5007 unsigned BitWidth = EltTy->getBitWidth(); 5008 llvm::Type *ArgTy = llvm::VectorType::get( 5009 llvm::IntegerType::get(getLLVMContext(), BitWidth/2), 2*ArgElts); 5010 llvm::Type* Tys[2] = { VTy, ArgTy }; 5011 Int = usgn ? Intrinsic::aarch64_neon_uaddlp : Intrinsic::aarch64_neon_saddlp; 5012 SmallVector<llvm::Value*, 1> TmpOps; 5013 TmpOps.push_back(Ops[1]); 5014 Function *F = CGM.getIntrinsic(Int, Tys); 5015 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vpadal"); 5016 llvm::Value *addend = Builder.CreateBitCast(Ops[0], tmp->getType()); 5017 return Builder.CreateAdd(tmp, addend); 5018 } 5019 case NEON::BI__builtin_neon_vpmin_v: 5020 case NEON::BI__builtin_neon_vpminq_v: 5021 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5022 Int = usgn ? Intrinsic::aarch64_neon_uminp : Intrinsic::aarch64_neon_sminp; 5023 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fminp; 5024 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmin"); 5025 case NEON::BI__builtin_neon_vpmax_v: 5026 case NEON::BI__builtin_neon_vpmaxq_v: 5027 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5028 Int = usgn ? Intrinsic::aarch64_neon_umaxp : Intrinsic::aarch64_neon_smaxp; 5029 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmaxp; 5030 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmax"); 5031 case NEON::BI__builtin_neon_vminnm_v: 5032 case NEON::BI__builtin_neon_vminnmq_v: 5033 Int = Intrinsic::aarch64_neon_fminnm; 5034 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vminnm"); 5035 case NEON::BI__builtin_neon_vmaxnm_v: 5036 case NEON::BI__builtin_neon_vmaxnmq_v: 5037 Int = Intrinsic::aarch64_neon_fmaxnm; 5038 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmaxnm"); 5039 case NEON::BI__builtin_neon_vrecpss_f32: { 5040 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5041 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, FloatTy), 5042 Ops, "vrecps"); 5043 } 5044 case NEON::BI__builtin_neon_vrecpsd_f64: { 5045 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5046 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, DoubleTy), 5047 Ops, "vrecps"); 5048 } 5049 case NEON::BI__builtin_neon_vqshrun_n_v: 5050 Int = Intrinsic::aarch64_neon_sqshrun; 5051 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrun_n"); 5052 case NEON::BI__builtin_neon_vqrshrun_n_v: 5053 Int = Intrinsic::aarch64_neon_sqrshrun; 5054 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrun_n"); 5055 case NEON::BI__builtin_neon_vqshrn_n_v: 5056 Int = usgn ? Intrinsic::aarch64_neon_uqshrn : Intrinsic::aarch64_neon_sqshrn; 5057 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n"); 5058 case NEON::BI__builtin_neon_vrshrn_n_v: 5059 Int = Intrinsic::aarch64_neon_rshrn; 5060 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshrn_n"); 5061 case NEON::BI__builtin_neon_vqrshrn_n_v: 5062 Int = usgn ? Intrinsic::aarch64_neon_uqrshrn : Intrinsic::aarch64_neon_sqrshrn; 5063 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n"); 5064 case NEON::BI__builtin_neon_vrnda_v: 5065 case NEON::BI__builtin_neon_vrndaq_v: { 5066 Int = Intrinsic::round; 5067 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrnda"); 5068 } 5069 case NEON::BI__builtin_neon_vrndi_v: 5070 case NEON::BI__builtin_neon_vrndiq_v: { 5071 Int = Intrinsic::nearbyint; 5072 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndi"); 5073 } 5074 case NEON::BI__builtin_neon_vrndm_v: 5075 case NEON::BI__builtin_neon_vrndmq_v: { 5076 Int = Intrinsic::floor; 5077 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndm"); 5078 } 5079 case NEON::BI__builtin_neon_vrndn_v: 5080 case NEON::BI__builtin_neon_vrndnq_v: { 5081 Int = Intrinsic::aarch64_neon_frintn; 5082 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndn"); 5083 } 5084 case NEON::BI__builtin_neon_vrndp_v: 5085 case NEON::BI__builtin_neon_vrndpq_v: { 5086 Int = Intrinsic::ceil; 5087 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndp"); 5088 } 5089 case NEON::BI__builtin_neon_vrndx_v: 5090 case NEON::BI__builtin_neon_vrndxq_v: { 5091 Int = Intrinsic::rint; 5092 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndx"); 5093 } 5094 case NEON::BI__builtin_neon_vrnd_v: 5095 case NEON::BI__builtin_neon_vrndq_v: { 5096 Int = Intrinsic::trunc; 5097 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndz"); 5098 } 5099 case NEON::BI__builtin_neon_vceqz_v: 5100 case NEON::BI__builtin_neon_vceqzq_v: 5101 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OEQ, 5102 ICmpInst::ICMP_EQ, "vceqz"); 5103 case NEON::BI__builtin_neon_vcgez_v: 5104 case NEON::BI__builtin_neon_vcgezq_v: 5105 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGE, 5106 ICmpInst::ICMP_SGE, "vcgez"); 5107 case NEON::BI__builtin_neon_vclez_v: 5108 case NEON::BI__builtin_neon_vclezq_v: 5109 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLE, 5110 ICmpInst::ICMP_SLE, "vclez"); 5111 case NEON::BI__builtin_neon_vcgtz_v: 5112 case NEON::BI__builtin_neon_vcgtzq_v: 5113 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGT, 5114 ICmpInst::ICMP_SGT, "vcgtz"); 5115 case NEON::BI__builtin_neon_vcltz_v: 5116 case NEON::BI__builtin_neon_vcltzq_v: 5117 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLT, 5118 ICmpInst::ICMP_SLT, "vcltz"); 5119 case NEON::BI__builtin_neon_vcvt_f64_v: 5120 case NEON::BI__builtin_neon_vcvtq_f64_v: 5121 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5122 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad)); 5123 return usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 5124 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 5125 case NEON::BI__builtin_neon_vcvt_f64_f32: { 5126 assert(Type.getEltType() == NeonTypeFlags::Float64 && quad && 5127 "unexpected vcvt_f64_f32 builtin"); 5128 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float32, false, false); 5129 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 5130 5131 return Builder.CreateFPExt(Ops[0], Ty, "vcvt"); 5132 } 5133 case NEON::BI__builtin_neon_vcvt_f32_f64: { 5134 assert(Type.getEltType() == NeonTypeFlags::Float32 && 5135 "unexpected vcvt_f32_f64 builtin"); 5136 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float64, false, true); 5137 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 5138 5139 return Builder.CreateFPTrunc(Ops[0], Ty, "vcvt"); 5140 } 5141 case NEON::BI__builtin_neon_vcvt_s32_v: 5142 case NEON::BI__builtin_neon_vcvt_u32_v: 5143 case NEON::BI__builtin_neon_vcvt_s64_v: 5144 case NEON::BI__builtin_neon_vcvt_u64_v: 5145 case NEON::BI__builtin_neon_vcvtq_s32_v: 5146 case NEON::BI__builtin_neon_vcvtq_u32_v: 5147 case NEON::BI__builtin_neon_vcvtq_s64_v: 5148 case NEON::BI__builtin_neon_vcvtq_u64_v: { 5149 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 5150 if (usgn) 5151 return Builder.CreateFPToUI(Ops[0], Ty); 5152 return Builder.CreateFPToSI(Ops[0], Ty); 5153 } 5154 case NEON::BI__builtin_neon_vcvta_s32_v: 5155 case NEON::BI__builtin_neon_vcvtaq_s32_v: 5156 case NEON::BI__builtin_neon_vcvta_u32_v: 5157 case NEON::BI__builtin_neon_vcvtaq_u32_v: 5158 case NEON::BI__builtin_neon_vcvta_s64_v: 5159 case NEON::BI__builtin_neon_vcvtaq_s64_v: 5160 case NEON::BI__builtin_neon_vcvta_u64_v: 5161 case NEON::BI__builtin_neon_vcvtaq_u64_v: { 5162 Int = usgn ? Intrinsic::aarch64_neon_fcvtau : Intrinsic::aarch64_neon_fcvtas; 5163 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5164 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvta"); 5165 } 5166 case NEON::BI__builtin_neon_vcvtm_s32_v: 5167 case NEON::BI__builtin_neon_vcvtmq_s32_v: 5168 case NEON::BI__builtin_neon_vcvtm_u32_v: 5169 case NEON::BI__builtin_neon_vcvtmq_u32_v: 5170 case NEON::BI__builtin_neon_vcvtm_s64_v: 5171 case NEON::BI__builtin_neon_vcvtmq_s64_v: 5172 case NEON::BI__builtin_neon_vcvtm_u64_v: 5173 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 5174 Int = usgn ? Intrinsic::aarch64_neon_fcvtmu : Intrinsic::aarch64_neon_fcvtms; 5175 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5176 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtm"); 5177 } 5178 case NEON::BI__builtin_neon_vcvtn_s32_v: 5179 case NEON::BI__builtin_neon_vcvtnq_s32_v: 5180 case NEON::BI__builtin_neon_vcvtn_u32_v: 5181 case NEON::BI__builtin_neon_vcvtnq_u32_v: 5182 case NEON::BI__builtin_neon_vcvtn_s64_v: 5183 case NEON::BI__builtin_neon_vcvtnq_s64_v: 5184 case NEON::BI__builtin_neon_vcvtn_u64_v: 5185 case NEON::BI__builtin_neon_vcvtnq_u64_v: { 5186 Int = usgn ? Intrinsic::aarch64_neon_fcvtnu : Intrinsic::aarch64_neon_fcvtns; 5187 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5188 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtn"); 5189 } 5190 case NEON::BI__builtin_neon_vcvtp_s32_v: 5191 case NEON::BI__builtin_neon_vcvtpq_s32_v: 5192 case NEON::BI__builtin_neon_vcvtp_u32_v: 5193 case NEON::BI__builtin_neon_vcvtpq_u32_v: 5194 case NEON::BI__builtin_neon_vcvtp_s64_v: 5195 case NEON::BI__builtin_neon_vcvtpq_s64_v: 5196 case NEON::BI__builtin_neon_vcvtp_u64_v: 5197 case NEON::BI__builtin_neon_vcvtpq_u64_v: { 5198 Int = usgn ? Intrinsic::aarch64_neon_fcvtpu : Intrinsic::aarch64_neon_fcvtps; 5199 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5200 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtp"); 5201 } 5202 case NEON::BI__builtin_neon_vmulx_v: 5203 case NEON::BI__builtin_neon_vmulxq_v: { 5204 Int = Intrinsic::aarch64_neon_fmulx; 5205 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmulx"); 5206 } 5207 case NEON::BI__builtin_neon_vmul_lane_v: 5208 case NEON::BI__builtin_neon_vmul_laneq_v: { 5209 // v1f64 vmul_lane should be mapped to Neon scalar mul lane 5210 bool Quad = false; 5211 if (BuiltinID == NEON::BI__builtin_neon_vmul_laneq_v) 5212 Quad = true; 5213 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5214 llvm::Type *VTy = GetNeonType(this, 5215 NeonTypeFlags(NeonTypeFlags::Float64, false, Quad)); 5216 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 5217 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 5218 Value *Result = Builder.CreateFMul(Ops[0], Ops[1]); 5219 return Builder.CreateBitCast(Result, Ty); 5220 } 5221 case NEON::BI__builtin_neon_vnegd_s64: 5222 return Builder.CreateNeg(EmitScalarExpr(E->getArg(0)), "vnegd"); 5223 case NEON::BI__builtin_neon_vpmaxnm_v: 5224 case NEON::BI__builtin_neon_vpmaxnmq_v: { 5225 Int = Intrinsic::aarch64_neon_fmaxnmp; 5226 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmaxnm"); 5227 } 5228 case NEON::BI__builtin_neon_vpminnm_v: 5229 case NEON::BI__builtin_neon_vpminnmq_v: { 5230 Int = Intrinsic::aarch64_neon_fminnmp; 5231 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpminnm"); 5232 } 5233 case NEON::BI__builtin_neon_vsqrt_v: 5234 case NEON::BI__builtin_neon_vsqrtq_v: { 5235 Int = Intrinsic::sqrt; 5236 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5237 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqrt"); 5238 } 5239 case NEON::BI__builtin_neon_vrbit_v: 5240 case NEON::BI__builtin_neon_vrbitq_v: { 5241 Int = Intrinsic::aarch64_neon_rbit; 5242 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrbit"); 5243 } 5244 case NEON::BI__builtin_neon_vaddv_u8: 5245 // FIXME: These are handled by the AArch64 scalar code. 5246 usgn = true; 5247 // FALLTHROUGH 5248 case NEON::BI__builtin_neon_vaddv_s8: { 5249 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5250 Ty = Int32Ty; 5251 VTy = llvm::VectorType::get(Int8Ty, 8); 5252 llvm::Type *Tys[2] = { Ty, VTy }; 5253 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5254 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5255 return Builder.CreateTrunc(Ops[0], Int8Ty); 5256 } 5257 case NEON::BI__builtin_neon_vaddv_u16: 5258 usgn = true; 5259 // FALLTHROUGH 5260 case NEON::BI__builtin_neon_vaddv_s16: { 5261 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5262 Ty = Int32Ty; 5263 VTy = llvm::VectorType::get(Int16Ty, 4); 5264 llvm::Type *Tys[2] = { Ty, VTy }; 5265 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5266 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5267 return Builder.CreateTrunc(Ops[0], Int16Ty); 5268 } 5269 case NEON::BI__builtin_neon_vaddvq_u8: 5270 usgn = true; 5271 // FALLTHROUGH 5272 case NEON::BI__builtin_neon_vaddvq_s8: { 5273 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5274 Ty = Int32Ty; 5275 VTy = llvm::VectorType::get(Int8Ty, 16); 5276 llvm::Type *Tys[2] = { Ty, VTy }; 5277 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5278 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5279 return Builder.CreateTrunc(Ops[0], Int8Ty); 5280 } 5281 case NEON::BI__builtin_neon_vaddvq_u16: 5282 usgn = true; 5283 // FALLTHROUGH 5284 case NEON::BI__builtin_neon_vaddvq_s16: { 5285 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5286 Ty = Int32Ty; 5287 VTy = llvm::VectorType::get(Int16Ty, 8); 5288 llvm::Type *Tys[2] = { Ty, VTy }; 5289 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5290 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5291 return Builder.CreateTrunc(Ops[0], Int16Ty); 5292 } 5293 case NEON::BI__builtin_neon_vmaxv_u8: { 5294 Int = Intrinsic::aarch64_neon_umaxv; 5295 Ty = Int32Ty; 5296 VTy = llvm::VectorType::get(Int8Ty, 8); 5297 llvm::Type *Tys[2] = { Ty, VTy }; 5298 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5299 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5300 return Builder.CreateTrunc(Ops[0], Int8Ty); 5301 } 5302 case NEON::BI__builtin_neon_vmaxv_u16: { 5303 Int = Intrinsic::aarch64_neon_umaxv; 5304 Ty = Int32Ty; 5305 VTy = llvm::VectorType::get(Int16Ty, 4); 5306 llvm::Type *Tys[2] = { Ty, VTy }; 5307 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5308 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5309 return Builder.CreateTrunc(Ops[0], Int16Ty); 5310 } 5311 case NEON::BI__builtin_neon_vmaxvq_u8: { 5312 Int = Intrinsic::aarch64_neon_umaxv; 5313 Ty = Int32Ty; 5314 VTy = llvm::VectorType::get(Int8Ty, 16); 5315 llvm::Type *Tys[2] = { Ty, VTy }; 5316 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5317 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5318 return Builder.CreateTrunc(Ops[0], Int8Ty); 5319 } 5320 case NEON::BI__builtin_neon_vmaxvq_u16: { 5321 Int = Intrinsic::aarch64_neon_umaxv; 5322 Ty = Int32Ty; 5323 VTy = llvm::VectorType::get(Int16Ty, 8); 5324 llvm::Type *Tys[2] = { Ty, VTy }; 5325 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5326 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5327 return Builder.CreateTrunc(Ops[0], Int16Ty); 5328 } 5329 case NEON::BI__builtin_neon_vmaxv_s8: { 5330 Int = Intrinsic::aarch64_neon_smaxv; 5331 Ty = Int32Ty; 5332 VTy = llvm::VectorType::get(Int8Ty, 8); 5333 llvm::Type *Tys[2] = { Ty, VTy }; 5334 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5335 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5336 return Builder.CreateTrunc(Ops[0], Int8Ty); 5337 } 5338 case NEON::BI__builtin_neon_vmaxv_s16: { 5339 Int = Intrinsic::aarch64_neon_smaxv; 5340 Ty = Int32Ty; 5341 VTy = llvm::VectorType::get(Int16Ty, 4); 5342 llvm::Type *Tys[2] = { Ty, VTy }; 5343 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5344 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5345 return Builder.CreateTrunc(Ops[0], Int16Ty); 5346 } 5347 case NEON::BI__builtin_neon_vmaxvq_s8: { 5348 Int = Intrinsic::aarch64_neon_smaxv; 5349 Ty = Int32Ty; 5350 VTy = llvm::VectorType::get(Int8Ty, 16); 5351 llvm::Type *Tys[2] = { Ty, VTy }; 5352 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5353 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5354 return Builder.CreateTrunc(Ops[0], Int8Ty); 5355 } 5356 case NEON::BI__builtin_neon_vmaxvq_s16: { 5357 Int = Intrinsic::aarch64_neon_smaxv; 5358 Ty = Int32Ty; 5359 VTy = llvm::VectorType::get(Int16Ty, 8); 5360 llvm::Type *Tys[2] = { Ty, VTy }; 5361 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5362 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5363 return Builder.CreateTrunc(Ops[0], Int16Ty); 5364 } 5365 case NEON::BI__builtin_neon_vminv_u8: { 5366 Int = Intrinsic::aarch64_neon_uminv; 5367 Ty = Int32Ty; 5368 VTy = llvm::VectorType::get(Int8Ty, 8); 5369 llvm::Type *Tys[2] = { Ty, VTy }; 5370 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5371 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5372 return Builder.CreateTrunc(Ops[0], Int8Ty); 5373 } 5374 case NEON::BI__builtin_neon_vminv_u16: { 5375 Int = Intrinsic::aarch64_neon_uminv; 5376 Ty = Int32Ty; 5377 VTy = llvm::VectorType::get(Int16Ty, 4); 5378 llvm::Type *Tys[2] = { Ty, VTy }; 5379 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5380 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5381 return Builder.CreateTrunc(Ops[0], Int16Ty); 5382 } 5383 case NEON::BI__builtin_neon_vminvq_u8: { 5384 Int = Intrinsic::aarch64_neon_uminv; 5385 Ty = Int32Ty; 5386 VTy = llvm::VectorType::get(Int8Ty, 16); 5387 llvm::Type *Tys[2] = { Ty, VTy }; 5388 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5389 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5390 return Builder.CreateTrunc(Ops[0], Int8Ty); 5391 } 5392 case NEON::BI__builtin_neon_vminvq_u16: { 5393 Int = Intrinsic::aarch64_neon_uminv; 5394 Ty = Int32Ty; 5395 VTy = llvm::VectorType::get(Int16Ty, 8); 5396 llvm::Type *Tys[2] = { Ty, VTy }; 5397 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5398 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5399 return Builder.CreateTrunc(Ops[0], Int16Ty); 5400 } 5401 case NEON::BI__builtin_neon_vminv_s8: { 5402 Int = Intrinsic::aarch64_neon_sminv; 5403 Ty = Int32Ty; 5404 VTy = llvm::VectorType::get(Int8Ty, 8); 5405 llvm::Type *Tys[2] = { Ty, VTy }; 5406 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5407 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5408 return Builder.CreateTrunc(Ops[0], Int8Ty); 5409 } 5410 case NEON::BI__builtin_neon_vminv_s16: { 5411 Int = Intrinsic::aarch64_neon_sminv; 5412 Ty = Int32Ty; 5413 VTy = llvm::VectorType::get(Int16Ty, 4); 5414 llvm::Type *Tys[2] = { Ty, VTy }; 5415 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5416 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5417 return Builder.CreateTrunc(Ops[0], Int16Ty); 5418 } 5419 case NEON::BI__builtin_neon_vminvq_s8: { 5420 Int = Intrinsic::aarch64_neon_sminv; 5421 Ty = Int32Ty; 5422 VTy = llvm::VectorType::get(Int8Ty, 16); 5423 llvm::Type *Tys[2] = { Ty, VTy }; 5424 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5425 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5426 return Builder.CreateTrunc(Ops[0], Int8Ty); 5427 } 5428 case NEON::BI__builtin_neon_vminvq_s16: { 5429 Int = Intrinsic::aarch64_neon_sminv; 5430 Ty = Int32Ty; 5431 VTy = llvm::VectorType::get(Int16Ty, 8); 5432 llvm::Type *Tys[2] = { Ty, VTy }; 5433 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5434 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5435 return Builder.CreateTrunc(Ops[0], Int16Ty); 5436 } 5437 case NEON::BI__builtin_neon_vmul_n_f64: { 5438 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5439 Value *RHS = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), DoubleTy); 5440 return Builder.CreateFMul(Ops[0], RHS); 5441 } 5442 case NEON::BI__builtin_neon_vaddlv_u8: { 5443 Int = Intrinsic::aarch64_neon_uaddlv; 5444 Ty = Int32Ty; 5445 VTy = llvm::VectorType::get(Int8Ty, 8); 5446 llvm::Type *Tys[2] = { Ty, VTy }; 5447 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5448 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5449 return Builder.CreateTrunc(Ops[0], Int16Ty); 5450 } 5451 case NEON::BI__builtin_neon_vaddlv_u16: { 5452 Int = Intrinsic::aarch64_neon_uaddlv; 5453 Ty = Int32Ty; 5454 VTy = llvm::VectorType::get(Int16Ty, 4); 5455 llvm::Type *Tys[2] = { Ty, VTy }; 5456 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5457 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5458 } 5459 case NEON::BI__builtin_neon_vaddlvq_u8: { 5460 Int = Intrinsic::aarch64_neon_uaddlv; 5461 Ty = Int32Ty; 5462 VTy = llvm::VectorType::get(Int8Ty, 16); 5463 llvm::Type *Tys[2] = { Ty, VTy }; 5464 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5465 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5466 return Builder.CreateTrunc(Ops[0], Int16Ty); 5467 } 5468 case NEON::BI__builtin_neon_vaddlvq_u16: { 5469 Int = Intrinsic::aarch64_neon_uaddlv; 5470 Ty = Int32Ty; 5471 VTy = llvm::VectorType::get(Int16Ty, 8); 5472 llvm::Type *Tys[2] = { Ty, VTy }; 5473 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5474 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5475 } 5476 case NEON::BI__builtin_neon_vaddlv_s8: { 5477 Int = Intrinsic::aarch64_neon_saddlv; 5478 Ty = Int32Ty; 5479 VTy = llvm::VectorType::get(Int8Ty, 8); 5480 llvm::Type *Tys[2] = { Ty, VTy }; 5481 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5482 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5483 return Builder.CreateTrunc(Ops[0], Int16Ty); 5484 } 5485 case NEON::BI__builtin_neon_vaddlv_s16: { 5486 Int = Intrinsic::aarch64_neon_saddlv; 5487 Ty = Int32Ty; 5488 VTy = llvm::VectorType::get(Int16Ty, 4); 5489 llvm::Type *Tys[2] = { Ty, VTy }; 5490 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5491 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5492 } 5493 case NEON::BI__builtin_neon_vaddlvq_s8: { 5494 Int = Intrinsic::aarch64_neon_saddlv; 5495 Ty = Int32Ty; 5496 VTy = llvm::VectorType::get(Int8Ty, 16); 5497 llvm::Type *Tys[2] = { Ty, VTy }; 5498 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5499 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5500 return Builder.CreateTrunc(Ops[0], Int16Ty); 5501 } 5502 case NEON::BI__builtin_neon_vaddlvq_s16: { 5503 Int = Intrinsic::aarch64_neon_saddlv; 5504 Ty = Int32Ty; 5505 VTy = llvm::VectorType::get(Int16Ty, 8); 5506 llvm::Type *Tys[2] = { Ty, VTy }; 5507 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5508 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5509 } 5510 case NEON::BI__builtin_neon_vsri_n_v: 5511 case NEON::BI__builtin_neon_vsriq_n_v: { 5512 Int = Intrinsic::aarch64_neon_vsri; 5513 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 5514 return EmitNeonCall(Intrin, Ops, "vsri_n"); 5515 } 5516 case NEON::BI__builtin_neon_vsli_n_v: 5517 case NEON::BI__builtin_neon_vsliq_n_v: { 5518 Int = Intrinsic::aarch64_neon_vsli; 5519 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 5520 return EmitNeonCall(Intrin, Ops, "vsli_n"); 5521 } 5522 case NEON::BI__builtin_neon_vsra_n_v: 5523 case NEON::BI__builtin_neon_vsraq_n_v: 5524 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5525 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 5526 return Builder.CreateAdd(Ops[0], Ops[1]); 5527 case NEON::BI__builtin_neon_vrsra_n_v: 5528 case NEON::BI__builtin_neon_vrsraq_n_v: { 5529 Int = usgn ? Intrinsic::aarch64_neon_urshl : Intrinsic::aarch64_neon_srshl; 5530 SmallVector<llvm::Value*,2> TmpOps; 5531 TmpOps.push_back(Ops[1]); 5532 TmpOps.push_back(Ops[2]); 5533 Function* F = CGM.getIntrinsic(Int, Ty); 5534 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vrshr_n", 1, true); 5535 Ops[0] = Builder.CreateBitCast(Ops[0], VTy); 5536 return Builder.CreateAdd(Ops[0], tmp); 5537 } 5538 // FIXME: Sharing loads & stores with 32-bit is complicated by the absence 5539 // of an Align parameter here. 5540 case NEON::BI__builtin_neon_vld1_x2_v: 5541 case NEON::BI__builtin_neon_vld1q_x2_v: 5542 case NEON::BI__builtin_neon_vld1_x3_v: 5543 case NEON::BI__builtin_neon_vld1q_x3_v: 5544 case NEON::BI__builtin_neon_vld1_x4_v: 5545 case NEON::BI__builtin_neon_vld1q_x4_v: { 5546 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 5547 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5548 llvm::Type *Tys[2] = { VTy, PTy }; 5549 unsigned Int; 5550 switch (BuiltinID) { 5551 case NEON::BI__builtin_neon_vld1_x2_v: 5552 case NEON::BI__builtin_neon_vld1q_x2_v: 5553 Int = Intrinsic::aarch64_neon_ld1x2; 5554 break; 5555 case NEON::BI__builtin_neon_vld1_x3_v: 5556 case NEON::BI__builtin_neon_vld1q_x3_v: 5557 Int = Intrinsic::aarch64_neon_ld1x3; 5558 break; 5559 case NEON::BI__builtin_neon_vld1_x4_v: 5560 case NEON::BI__builtin_neon_vld1q_x4_v: 5561 Int = Intrinsic::aarch64_neon_ld1x4; 5562 break; 5563 } 5564 Function *F = CGM.getIntrinsic(Int, Tys); 5565 Ops[1] = Builder.CreateCall(F, Ops[1], "vld1xN"); 5566 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5567 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5568 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5569 } 5570 case NEON::BI__builtin_neon_vst1_x2_v: 5571 case NEON::BI__builtin_neon_vst1q_x2_v: 5572 case NEON::BI__builtin_neon_vst1_x3_v: 5573 case NEON::BI__builtin_neon_vst1q_x3_v: 5574 case NEON::BI__builtin_neon_vst1_x4_v: 5575 case NEON::BI__builtin_neon_vst1q_x4_v: { 5576 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 5577 llvm::Type *Tys[2] = { VTy, PTy }; 5578 unsigned Int; 5579 switch (BuiltinID) { 5580 case NEON::BI__builtin_neon_vst1_x2_v: 5581 case NEON::BI__builtin_neon_vst1q_x2_v: 5582 Int = Intrinsic::aarch64_neon_st1x2; 5583 break; 5584 case NEON::BI__builtin_neon_vst1_x3_v: 5585 case NEON::BI__builtin_neon_vst1q_x3_v: 5586 Int = Intrinsic::aarch64_neon_st1x3; 5587 break; 5588 case NEON::BI__builtin_neon_vst1_x4_v: 5589 case NEON::BI__builtin_neon_vst1q_x4_v: 5590 Int = Intrinsic::aarch64_neon_st1x4; 5591 break; 5592 } 5593 std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end()); 5594 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 5595 } 5596 case NEON::BI__builtin_neon_vld1_v: 5597 case NEON::BI__builtin_neon_vld1q_v: 5598 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 5599 return Builder.CreateDefaultAlignedLoad(Ops[0]); 5600 case NEON::BI__builtin_neon_vst1_v: 5601 case NEON::BI__builtin_neon_vst1q_v: 5602 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 5603 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 5604 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5605 case NEON::BI__builtin_neon_vld1_lane_v: 5606 case NEON::BI__builtin_neon_vld1q_lane_v: 5607 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5608 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 5609 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5610 Ops[0] = Builder.CreateDefaultAlignedLoad(Ops[0]); 5611 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vld1_lane"); 5612 case NEON::BI__builtin_neon_vld1_dup_v: 5613 case NEON::BI__builtin_neon_vld1q_dup_v: { 5614 Value *V = UndefValue::get(Ty); 5615 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 5616 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5617 Ops[0] = Builder.CreateDefaultAlignedLoad(Ops[0]); 5618 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 5619 Ops[0] = Builder.CreateInsertElement(V, Ops[0], CI); 5620 return EmitNeonSplat(Ops[0], CI); 5621 } 5622 case NEON::BI__builtin_neon_vst1_lane_v: 5623 case NEON::BI__builtin_neon_vst1q_lane_v: 5624 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5625 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 5626 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5627 return Builder.CreateDefaultAlignedStore(Ops[1], 5628 Builder.CreateBitCast(Ops[0], Ty)); 5629 case NEON::BI__builtin_neon_vld2_v: 5630 case NEON::BI__builtin_neon_vld2q_v: { 5631 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 5632 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5633 llvm::Type *Tys[2] = { VTy, PTy }; 5634 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2, Tys); 5635 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 5636 Ops[0] = Builder.CreateBitCast(Ops[0], 5637 llvm::PointerType::getUnqual(Ops[1]->getType())); 5638 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5639 } 5640 case NEON::BI__builtin_neon_vld3_v: 5641 case NEON::BI__builtin_neon_vld3q_v: { 5642 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 5643 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5644 llvm::Type *Tys[2] = { VTy, PTy }; 5645 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3, Tys); 5646 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 5647 Ops[0] = Builder.CreateBitCast(Ops[0], 5648 llvm::PointerType::getUnqual(Ops[1]->getType())); 5649 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5650 } 5651 case NEON::BI__builtin_neon_vld4_v: 5652 case NEON::BI__builtin_neon_vld4q_v: { 5653 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 5654 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5655 llvm::Type *Tys[2] = { VTy, PTy }; 5656 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4, Tys); 5657 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 5658 Ops[0] = Builder.CreateBitCast(Ops[0], 5659 llvm::PointerType::getUnqual(Ops[1]->getType())); 5660 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5661 } 5662 case NEON::BI__builtin_neon_vld2_dup_v: 5663 case NEON::BI__builtin_neon_vld2q_dup_v: { 5664 llvm::Type *PTy = 5665 llvm::PointerType::getUnqual(VTy->getElementType()); 5666 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5667 llvm::Type *Tys[2] = { VTy, PTy }; 5668 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2r, Tys); 5669 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 5670 Ops[0] = Builder.CreateBitCast(Ops[0], 5671 llvm::PointerType::getUnqual(Ops[1]->getType())); 5672 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5673 } 5674 case NEON::BI__builtin_neon_vld3_dup_v: 5675 case NEON::BI__builtin_neon_vld3q_dup_v: { 5676 llvm::Type *PTy = 5677 llvm::PointerType::getUnqual(VTy->getElementType()); 5678 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5679 llvm::Type *Tys[2] = { VTy, PTy }; 5680 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3r, Tys); 5681 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 5682 Ops[0] = Builder.CreateBitCast(Ops[0], 5683 llvm::PointerType::getUnqual(Ops[1]->getType())); 5684 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5685 } 5686 case NEON::BI__builtin_neon_vld4_dup_v: 5687 case NEON::BI__builtin_neon_vld4q_dup_v: { 5688 llvm::Type *PTy = 5689 llvm::PointerType::getUnqual(VTy->getElementType()); 5690 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5691 llvm::Type *Tys[2] = { VTy, PTy }; 5692 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4r, Tys); 5693 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 5694 Ops[0] = Builder.CreateBitCast(Ops[0], 5695 llvm::PointerType::getUnqual(Ops[1]->getType())); 5696 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5697 } 5698 case NEON::BI__builtin_neon_vld2_lane_v: 5699 case NEON::BI__builtin_neon_vld2q_lane_v: { 5700 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 5701 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2lane, Tys); 5702 Ops.push_back(Ops[1]); 5703 Ops.erase(Ops.begin()+1); 5704 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5705 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5706 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 5707 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld2_lane"); 5708 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5709 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5710 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5711 } 5712 case NEON::BI__builtin_neon_vld3_lane_v: 5713 case NEON::BI__builtin_neon_vld3q_lane_v: { 5714 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 5715 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3lane, Tys); 5716 Ops.push_back(Ops[1]); 5717 Ops.erase(Ops.begin()+1); 5718 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5719 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5720 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 5721 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 5722 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld3_lane"); 5723 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5724 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5725 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5726 } 5727 case NEON::BI__builtin_neon_vld4_lane_v: 5728 case NEON::BI__builtin_neon_vld4q_lane_v: { 5729 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 5730 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4lane, Tys); 5731 Ops.push_back(Ops[1]); 5732 Ops.erase(Ops.begin()+1); 5733 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5734 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5735 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 5736 Ops[4] = Builder.CreateBitCast(Ops[4], Ty); 5737 Ops[5] = Builder.CreateZExt(Ops[5], Int64Ty); 5738 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld4_lane"); 5739 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5740 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5741 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5742 } 5743 case NEON::BI__builtin_neon_vst2_v: 5744 case NEON::BI__builtin_neon_vst2q_v: { 5745 Ops.push_back(Ops[0]); 5746 Ops.erase(Ops.begin()); 5747 llvm::Type *Tys[2] = { VTy, Ops[2]->getType() }; 5748 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2, Tys), 5749 Ops, ""); 5750 } 5751 case NEON::BI__builtin_neon_vst2_lane_v: 5752 case NEON::BI__builtin_neon_vst2q_lane_v: { 5753 Ops.push_back(Ops[0]); 5754 Ops.erase(Ops.begin()); 5755 Ops[2] = Builder.CreateZExt(Ops[2], Int64Ty); 5756 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 5757 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2lane, Tys), 5758 Ops, ""); 5759 } 5760 case NEON::BI__builtin_neon_vst3_v: 5761 case NEON::BI__builtin_neon_vst3q_v: { 5762 Ops.push_back(Ops[0]); 5763 Ops.erase(Ops.begin()); 5764 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 5765 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3, Tys), 5766 Ops, ""); 5767 } 5768 case NEON::BI__builtin_neon_vst3_lane_v: 5769 case NEON::BI__builtin_neon_vst3q_lane_v: { 5770 Ops.push_back(Ops[0]); 5771 Ops.erase(Ops.begin()); 5772 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 5773 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 5774 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3lane, Tys), 5775 Ops, ""); 5776 } 5777 case NEON::BI__builtin_neon_vst4_v: 5778 case NEON::BI__builtin_neon_vst4q_v: { 5779 Ops.push_back(Ops[0]); 5780 Ops.erase(Ops.begin()); 5781 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 5782 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4, Tys), 5783 Ops, ""); 5784 } 5785 case NEON::BI__builtin_neon_vst4_lane_v: 5786 case NEON::BI__builtin_neon_vst4q_lane_v: { 5787 Ops.push_back(Ops[0]); 5788 Ops.erase(Ops.begin()); 5789 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 5790 llvm::Type *Tys[2] = { VTy, Ops[5]->getType() }; 5791 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4lane, Tys), 5792 Ops, ""); 5793 } 5794 case NEON::BI__builtin_neon_vtrn_v: 5795 case NEON::BI__builtin_neon_vtrnq_v: { 5796 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 5797 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5798 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5799 Value *SV = nullptr; 5800 5801 for (unsigned vi = 0; vi != 2; ++vi) { 5802 SmallVector<Constant*, 16> Indices; 5803 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 5804 Indices.push_back(ConstantInt::get(Int32Ty, i+vi)); 5805 Indices.push_back(ConstantInt::get(Int32Ty, i+e+vi)); 5806 } 5807 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 5808 SV = llvm::ConstantVector::get(Indices); 5809 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vtrn"); 5810 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 5811 } 5812 return SV; 5813 } 5814 case NEON::BI__builtin_neon_vuzp_v: 5815 case NEON::BI__builtin_neon_vuzpq_v: { 5816 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 5817 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5818 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5819 Value *SV = nullptr; 5820 5821 for (unsigned vi = 0; vi != 2; ++vi) { 5822 SmallVector<Constant*, 16> Indices; 5823 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 5824 Indices.push_back(ConstantInt::get(Int32Ty, 2*i+vi)); 5825 5826 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 5827 SV = llvm::ConstantVector::get(Indices); 5828 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vuzp"); 5829 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 5830 } 5831 return SV; 5832 } 5833 case NEON::BI__builtin_neon_vzip_v: 5834 case NEON::BI__builtin_neon_vzipq_v: { 5835 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 5836 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5837 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5838 Value *SV = nullptr; 5839 5840 for (unsigned vi = 0; vi != 2; ++vi) { 5841 SmallVector<Constant*, 16> Indices; 5842 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 5843 Indices.push_back(ConstantInt::get(Int32Ty, (i + vi*e) >> 1)); 5844 Indices.push_back(ConstantInt::get(Int32Ty, ((i + vi*e) >> 1)+e)); 5845 } 5846 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 5847 SV = llvm::ConstantVector::get(Indices); 5848 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vzip"); 5849 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 5850 } 5851 return SV; 5852 } 5853 case NEON::BI__builtin_neon_vqtbl1q_v: { 5854 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl1, Ty), 5855 Ops, "vtbl1"); 5856 } 5857 case NEON::BI__builtin_neon_vqtbl2q_v: { 5858 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl2, Ty), 5859 Ops, "vtbl2"); 5860 } 5861 case NEON::BI__builtin_neon_vqtbl3q_v: { 5862 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl3, Ty), 5863 Ops, "vtbl3"); 5864 } 5865 case NEON::BI__builtin_neon_vqtbl4q_v: { 5866 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl4, Ty), 5867 Ops, "vtbl4"); 5868 } 5869 case NEON::BI__builtin_neon_vqtbx1q_v: { 5870 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx1, Ty), 5871 Ops, "vtbx1"); 5872 } 5873 case NEON::BI__builtin_neon_vqtbx2q_v: { 5874 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx2, Ty), 5875 Ops, "vtbx2"); 5876 } 5877 case NEON::BI__builtin_neon_vqtbx3q_v: { 5878 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx3, Ty), 5879 Ops, "vtbx3"); 5880 } 5881 case NEON::BI__builtin_neon_vqtbx4q_v: { 5882 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx4, Ty), 5883 Ops, "vtbx4"); 5884 } 5885 case NEON::BI__builtin_neon_vsqadd_v: 5886 case NEON::BI__builtin_neon_vsqaddq_v: { 5887 Int = Intrinsic::aarch64_neon_usqadd; 5888 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqadd"); 5889 } 5890 case NEON::BI__builtin_neon_vuqadd_v: 5891 case NEON::BI__builtin_neon_vuqaddq_v: { 5892 Int = Intrinsic::aarch64_neon_suqadd; 5893 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vuqadd"); 5894 } 5895 } 5896 } 5897 5898 llvm::Value *CodeGenFunction:: 5899 BuildVector(ArrayRef<llvm::Value*> Ops) { 5900 assert((Ops.size() & (Ops.size() - 1)) == 0 && 5901 "Not a power-of-two sized vector!"); 5902 bool AllConstants = true; 5903 for (unsigned i = 0, e = Ops.size(); i != e && AllConstants; ++i) 5904 AllConstants &= isa<Constant>(Ops[i]); 5905 5906 // If this is a constant vector, create a ConstantVector. 5907 if (AllConstants) { 5908 SmallVector<llvm::Constant*, 16> CstOps; 5909 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 5910 CstOps.push_back(cast<Constant>(Ops[i])); 5911 return llvm::ConstantVector::get(CstOps); 5912 } 5913 5914 // Otherwise, insertelement the values to build the vector. 5915 Value *Result = 5916 llvm::UndefValue::get(llvm::VectorType::get(Ops[0]->getType(), Ops.size())); 5917 5918 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 5919 Result = Builder.CreateInsertElement(Result, Ops[i], Builder.getInt32(i)); 5920 5921 return Result; 5922 } 5923 5924 Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, 5925 const CallExpr *E) { 5926 if (BuiltinID == X86::BI__builtin_ms_va_start || 5927 BuiltinID == X86::BI__builtin_ms_va_end) 5928 return EmitVAStartEnd(EmitMSVAListRef(E->getArg(0)).getPointer(), 5929 BuiltinID == X86::BI__builtin_ms_va_start); 5930 if (BuiltinID == X86::BI__builtin_ms_va_copy) { 5931 // Lower this manually. We can't reliably determine whether or not any 5932 // given va_copy() is for a Win64 va_list from the calling convention 5933 // alone, because it's legal to do this from a System V ABI function. 5934 // With opaque pointer types, we won't have enough information in LLVM 5935 // IR to determine this from the argument types, either. Best to do it 5936 // now, while we have enough information. 5937 Address DestAddr = EmitMSVAListRef(E->getArg(0)); 5938 Address SrcAddr = EmitMSVAListRef(E->getArg(1)); 5939 5940 llvm::Type *BPP = Int8PtrPtrTy; 5941 5942 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), BPP, "cp"), 5943 DestAddr.getAlignment()); 5944 SrcAddr = Address(Builder.CreateBitCast(SrcAddr.getPointer(), BPP, "ap"), 5945 SrcAddr.getAlignment()); 5946 5947 Value *ArgPtr = Builder.CreateLoad(SrcAddr, "ap.val"); 5948 return Builder.CreateStore(ArgPtr, DestAddr); 5949 } 5950 5951 SmallVector<Value*, 4> Ops; 5952 5953 // Find out if any arguments are required to be integer constant expressions. 5954 unsigned ICEArguments = 0; 5955 ASTContext::GetBuiltinTypeError Error; 5956 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 5957 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 5958 5959 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) { 5960 // If this is a normal argument, just emit it as a scalar. 5961 if ((ICEArguments & (1 << i)) == 0) { 5962 Ops.push_back(EmitScalarExpr(E->getArg(i))); 5963 continue; 5964 } 5965 5966 // If this is required to be a constant, constant fold it so that we know 5967 // that the generated intrinsic gets a ConstantInt. 5968 llvm::APSInt Result; 5969 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 5970 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 5971 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 5972 } 5973 5974 switch (BuiltinID) { 5975 default: return nullptr; 5976 case X86::BI__builtin_cpu_supports: { 5977 const Expr *FeatureExpr = E->getArg(0)->IgnoreParenCasts(); 5978 StringRef FeatureStr = cast<StringLiteral>(FeatureExpr)->getString(); 5979 5980 // TODO: When/if this becomes more than x86 specific then use a TargetInfo 5981 // based mapping. 5982 // Processor features and mapping to processor feature value. 5983 enum X86Features { 5984 CMOV = 0, 5985 MMX, 5986 POPCNT, 5987 SSE, 5988 SSE2, 5989 SSE3, 5990 SSSE3, 5991 SSE4_1, 5992 SSE4_2, 5993 AVX, 5994 AVX2, 5995 SSE4_A, 5996 FMA4, 5997 XOP, 5998 FMA, 5999 AVX512F, 6000 BMI, 6001 BMI2, 6002 MAX 6003 }; 6004 6005 X86Features Feature = StringSwitch<X86Features>(FeatureStr) 6006 .Case("cmov", X86Features::CMOV) 6007 .Case("mmx", X86Features::MMX) 6008 .Case("popcnt", X86Features::POPCNT) 6009 .Case("sse", X86Features::SSE) 6010 .Case("sse2", X86Features::SSE2) 6011 .Case("sse3", X86Features::SSE3) 6012 .Case("sse4.1", X86Features::SSE4_1) 6013 .Case("sse4.2", X86Features::SSE4_2) 6014 .Case("avx", X86Features::AVX) 6015 .Case("avx2", X86Features::AVX2) 6016 .Case("sse4a", X86Features::SSE4_A) 6017 .Case("fma4", X86Features::FMA4) 6018 .Case("xop", X86Features::XOP) 6019 .Case("fma", X86Features::FMA) 6020 .Case("avx512f", X86Features::AVX512F) 6021 .Case("bmi", X86Features::BMI) 6022 .Case("bmi2", X86Features::BMI2) 6023 .Default(X86Features::MAX); 6024 assert(Feature != X86Features::MAX && "Invalid feature!"); 6025 6026 // Matching the struct layout from the compiler-rt/libgcc structure that is 6027 // filled in: 6028 // unsigned int __cpu_vendor; 6029 // unsigned int __cpu_type; 6030 // unsigned int __cpu_subtype; 6031 // unsigned int __cpu_features[1]; 6032 llvm::Type *STy = llvm::StructType::get( 6033 Int32Ty, Int32Ty, Int32Ty, llvm::ArrayType::get(Int32Ty, 1), nullptr); 6034 6035 // Grab the global __cpu_model. 6036 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 6037 6038 // Grab the first (0th) element from the field __cpu_features off of the 6039 // global in the struct STy. 6040 Value *Idxs[] = { 6041 ConstantInt::get(Int32Ty, 0), 6042 ConstantInt::get(Int32Ty, 3), 6043 ConstantInt::get(Int32Ty, 0) 6044 }; 6045 Value *CpuFeatures = Builder.CreateGEP(STy, CpuModel, Idxs); 6046 Value *Features = Builder.CreateAlignedLoad(CpuFeatures, 6047 CharUnits::fromQuantity(4)); 6048 6049 // Check the value of the bit corresponding to the feature requested. 6050 Value *Bitset = Builder.CreateAnd( 6051 Features, llvm::ConstantInt::get(Int32Ty, 1 << Feature)); 6052 return Builder.CreateICmpNE(Bitset, llvm::ConstantInt::get(Int32Ty, 0)); 6053 } 6054 case X86::BI_mm_prefetch: { 6055 Value *Address = Ops[0]; 6056 Value *RW = ConstantInt::get(Int32Ty, 0); 6057 Value *Locality = Ops[1]; 6058 Value *Data = ConstantInt::get(Int32Ty, 1); 6059 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 6060 return Builder.CreateCall(F, {Address, RW, Locality, Data}); 6061 } 6062 case X86::BI__builtin_ia32_undef128: 6063 case X86::BI__builtin_ia32_undef256: 6064 case X86::BI__builtin_ia32_undef512: 6065 return UndefValue::get(ConvertType(E->getType())); 6066 case X86::BI__builtin_ia32_vec_init_v8qi: 6067 case X86::BI__builtin_ia32_vec_init_v4hi: 6068 case X86::BI__builtin_ia32_vec_init_v2si: 6069 return Builder.CreateBitCast(BuildVector(Ops), 6070 llvm::Type::getX86_MMXTy(getLLVMContext())); 6071 case X86::BI__builtin_ia32_vec_ext_v2si: 6072 return Builder.CreateExtractElement(Ops[0], 6073 llvm::ConstantInt::get(Ops[1]->getType(), 0)); 6074 case X86::BI__builtin_ia32_ldmxcsr: { 6075 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 6076 Builder.CreateStore(Ops[0], Tmp); 6077 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_ldmxcsr), 6078 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 6079 } 6080 case X86::BI__builtin_ia32_stmxcsr: { 6081 Address Tmp = CreateMemTemp(E->getType()); 6082 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_stmxcsr), 6083 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 6084 return Builder.CreateLoad(Tmp, "stmxcsr"); 6085 } 6086 case X86::BI__builtin_ia32_storehps: 6087 case X86::BI__builtin_ia32_storelps: { 6088 llvm::Type *PtrTy = llvm::PointerType::getUnqual(Int64Ty); 6089 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 2); 6090 6091 // cast val v2i64 6092 Ops[1] = Builder.CreateBitCast(Ops[1], VecTy, "cast"); 6093 6094 // extract (0, 1) 6095 unsigned Index = BuiltinID == X86::BI__builtin_ia32_storelps ? 0 : 1; 6096 llvm::Value *Idx = llvm::ConstantInt::get(SizeTy, Index); 6097 Ops[1] = Builder.CreateExtractElement(Ops[1], Idx, "extract"); 6098 6099 // cast pointer to i64 & store 6100 Ops[0] = Builder.CreateBitCast(Ops[0], PtrTy); 6101 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6102 } 6103 case X86::BI__builtin_ia32_palignr128: 6104 case X86::BI__builtin_ia32_palignr256: { 6105 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 6106 6107 unsigned NumElts = 6108 cast<llvm::VectorType>(Ops[0]->getType())->getNumElements(); 6109 assert(NumElts % 16 == 0); 6110 unsigned NumLanes = NumElts / 16; 6111 unsigned NumLaneElts = NumElts / NumLanes; 6112 6113 // If palignr is shifting the pair of vectors more than the size of two 6114 // lanes, emit zero. 6115 if (ShiftVal >= (2 * NumLaneElts)) 6116 return llvm::Constant::getNullValue(ConvertType(E->getType())); 6117 6118 // If palignr is shifting the pair of input vectors more than one lane, 6119 // but less than two lanes, convert to shifting in zeroes. 6120 if (ShiftVal > NumLaneElts) { 6121 ShiftVal -= NumLaneElts; 6122 Ops[1] = Ops[0]; 6123 Ops[0] = llvm::Constant::getNullValue(Ops[0]->getType()); 6124 } 6125 6126 uint32_t Indices[32]; 6127 // 256-bit palignr operates on 128-bit lanes so we need to handle that 6128 for (unsigned l = 0; l != NumElts; l += NumLaneElts) { 6129 for (unsigned i = 0; i != NumLaneElts; ++i) { 6130 unsigned Idx = ShiftVal + i; 6131 if (Idx >= NumLaneElts) 6132 Idx += NumElts - NumLaneElts; // End of lane, switch operand. 6133 Indices[l + i] = Idx + l; 6134 } 6135 } 6136 6137 Value *SV = llvm::ConstantDataVector::get(getLLVMContext(), 6138 makeArrayRef(Indices, NumElts)); 6139 return Builder.CreateShuffleVector(Ops[1], Ops[0], SV, "palignr"); 6140 } 6141 case X86::BI__builtin_ia32_pslldqi256: { 6142 // Shift value is in bits so divide by 8. 6143 unsigned shiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() >> 3; 6144 6145 // If pslldq is shifting the vector more than 15 bytes, emit zero. 6146 if (shiftVal >= 16) 6147 return llvm::Constant::getNullValue(ConvertType(E->getType())); 6148 6149 uint32_t Indices[32]; 6150 // 256-bit pslldq operates on 128-bit lanes so we need to handle that 6151 for (unsigned l = 0; l != 32; l += 16) { 6152 for (unsigned i = 0; i != 16; ++i) { 6153 unsigned Idx = 32 + i - shiftVal; 6154 if (Idx < 32) Idx -= 16; // end of lane, switch operand. 6155 Indices[l + i] = Idx + l; 6156 } 6157 } 6158 6159 llvm::Type *VecTy = llvm::VectorType::get(Int8Ty, 32); 6160 Ops[0] = Builder.CreateBitCast(Ops[0], VecTy, "cast"); 6161 Value *Zero = llvm::Constant::getNullValue(VecTy); 6162 6163 Value *SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 6164 SV = Builder.CreateShuffleVector(Zero, Ops[0], SV, "pslldq"); 6165 llvm::Type *ResultType = ConvertType(E->getType()); 6166 return Builder.CreateBitCast(SV, ResultType, "cast"); 6167 } 6168 case X86::BI__builtin_ia32_psrldqi256: { 6169 // Shift value is in bits so divide by 8. 6170 unsigned shiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() >> 3; 6171 6172 // If psrldq is shifting the vector more than 15 bytes, emit zero. 6173 if (shiftVal >= 16) 6174 return llvm::Constant::getNullValue(ConvertType(E->getType())); 6175 6176 uint32_t Indices[32]; 6177 // 256-bit psrldq operates on 128-bit lanes so we need to handle that 6178 for (unsigned l = 0; l != 32; l += 16) { 6179 for (unsigned i = 0; i != 16; ++i) { 6180 unsigned Idx = i + shiftVal; 6181 if (Idx >= 16) Idx += 16; // end of lane, switch operand. 6182 Indices[l + i] = Idx + l; 6183 } 6184 } 6185 6186 llvm::Type *VecTy = llvm::VectorType::get(Int8Ty, 32); 6187 Ops[0] = Builder.CreateBitCast(Ops[0], VecTy, "cast"); 6188 Value *Zero = llvm::Constant::getNullValue(VecTy); 6189 6190 Value *SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 6191 SV = Builder.CreateShuffleVector(Ops[0], Zero, SV, "psrldq"); 6192 llvm::Type *ResultType = ConvertType(E->getType()); 6193 return Builder.CreateBitCast(SV, ResultType, "cast"); 6194 } 6195 case X86::BI__builtin_ia32_movntps: 6196 case X86::BI__builtin_ia32_movntps256: 6197 case X86::BI__builtin_ia32_movntpd: 6198 case X86::BI__builtin_ia32_movntpd256: 6199 case X86::BI__builtin_ia32_movntdq: 6200 case X86::BI__builtin_ia32_movntdq256: 6201 case X86::BI__builtin_ia32_movnti: 6202 case X86::BI__builtin_ia32_movnti64: { 6203 llvm::MDNode *Node = llvm::MDNode::get( 6204 getLLVMContext(), llvm::ConstantAsMetadata::get(Builder.getInt32(1))); 6205 6206 // Convert the type of the pointer to a pointer to the stored type. 6207 Value *BC = Builder.CreateBitCast(Ops[0], 6208 llvm::PointerType::getUnqual(Ops[1]->getType()), 6209 "cast"); 6210 StoreInst *SI = Builder.CreateDefaultAlignedStore(Ops[1], BC); 6211 SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); 6212 6213 // If the operand is an integer, we can't assume alignment. Otherwise, 6214 // assume natural alignment. 6215 QualType ArgTy = E->getArg(1)->getType(); 6216 unsigned Align; 6217 if (ArgTy->isIntegerType()) 6218 Align = 1; 6219 else 6220 Align = getContext().getTypeSizeInChars(ArgTy).getQuantity(); 6221 SI->setAlignment(Align); 6222 return SI; 6223 } 6224 // 3DNow! 6225 case X86::BI__builtin_ia32_pswapdsf: 6226 case X86::BI__builtin_ia32_pswapdsi: { 6227 llvm::Type *MMXTy = llvm::Type::getX86_MMXTy(getLLVMContext()); 6228 Ops[0] = Builder.CreateBitCast(Ops[0], MMXTy, "cast"); 6229 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_3dnowa_pswapd); 6230 return Builder.CreateCall(F, Ops, "pswapd"); 6231 } 6232 case X86::BI__builtin_ia32_rdrand16_step: 6233 case X86::BI__builtin_ia32_rdrand32_step: 6234 case X86::BI__builtin_ia32_rdrand64_step: 6235 case X86::BI__builtin_ia32_rdseed16_step: 6236 case X86::BI__builtin_ia32_rdseed32_step: 6237 case X86::BI__builtin_ia32_rdseed64_step: { 6238 Intrinsic::ID ID; 6239 switch (BuiltinID) { 6240 default: llvm_unreachable("Unsupported intrinsic!"); 6241 case X86::BI__builtin_ia32_rdrand16_step: 6242 ID = Intrinsic::x86_rdrand_16; 6243 break; 6244 case X86::BI__builtin_ia32_rdrand32_step: 6245 ID = Intrinsic::x86_rdrand_32; 6246 break; 6247 case X86::BI__builtin_ia32_rdrand64_step: 6248 ID = Intrinsic::x86_rdrand_64; 6249 break; 6250 case X86::BI__builtin_ia32_rdseed16_step: 6251 ID = Intrinsic::x86_rdseed_16; 6252 break; 6253 case X86::BI__builtin_ia32_rdseed32_step: 6254 ID = Intrinsic::x86_rdseed_32; 6255 break; 6256 case X86::BI__builtin_ia32_rdseed64_step: 6257 ID = Intrinsic::x86_rdseed_64; 6258 break; 6259 } 6260 6261 Value *Call = Builder.CreateCall(CGM.getIntrinsic(ID)); 6262 Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 0), 6263 Ops[0]); 6264 return Builder.CreateExtractValue(Call, 1); 6265 } 6266 // SSE comparison intrisics 6267 case X86::BI__builtin_ia32_cmpeqps: 6268 case X86::BI__builtin_ia32_cmpltps: 6269 case X86::BI__builtin_ia32_cmpleps: 6270 case X86::BI__builtin_ia32_cmpunordps: 6271 case X86::BI__builtin_ia32_cmpneqps: 6272 case X86::BI__builtin_ia32_cmpnltps: 6273 case X86::BI__builtin_ia32_cmpnleps: 6274 case X86::BI__builtin_ia32_cmpordps: 6275 case X86::BI__builtin_ia32_cmpeqss: 6276 case X86::BI__builtin_ia32_cmpltss: 6277 case X86::BI__builtin_ia32_cmpless: 6278 case X86::BI__builtin_ia32_cmpunordss: 6279 case X86::BI__builtin_ia32_cmpneqss: 6280 case X86::BI__builtin_ia32_cmpnltss: 6281 case X86::BI__builtin_ia32_cmpnless: 6282 case X86::BI__builtin_ia32_cmpordss: 6283 case X86::BI__builtin_ia32_cmpeqpd: 6284 case X86::BI__builtin_ia32_cmpltpd: 6285 case X86::BI__builtin_ia32_cmplepd: 6286 case X86::BI__builtin_ia32_cmpunordpd: 6287 case X86::BI__builtin_ia32_cmpneqpd: 6288 case X86::BI__builtin_ia32_cmpnltpd: 6289 case X86::BI__builtin_ia32_cmpnlepd: 6290 case X86::BI__builtin_ia32_cmpordpd: 6291 case X86::BI__builtin_ia32_cmpeqsd: 6292 case X86::BI__builtin_ia32_cmpltsd: 6293 case X86::BI__builtin_ia32_cmplesd: 6294 case X86::BI__builtin_ia32_cmpunordsd: 6295 case X86::BI__builtin_ia32_cmpneqsd: 6296 case X86::BI__builtin_ia32_cmpnltsd: 6297 case X86::BI__builtin_ia32_cmpnlesd: 6298 case X86::BI__builtin_ia32_cmpordsd: 6299 // These exist so that the builtin that takes an immediate can be bounds 6300 // checked by clang to avoid passing bad immediates to the backend. Since 6301 // AVX has a larger immediate than SSE we would need separate builtins to 6302 // do the different bounds checking. Rather than create a clang specific 6303 // SSE only builtin, this implements eight separate builtins to match gcc 6304 // implementation. 6305 6306 // Choose the immediate. 6307 unsigned Imm; 6308 switch (BuiltinID) { 6309 default: llvm_unreachable("Unsupported intrinsic!"); 6310 case X86::BI__builtin_ia32_cmpeqps: 6311 case X86::BI__builtin_ia32_cmpeqss: 6312 case X86::BI__builtin_ia32_cmpeqpd: 6313 case X86::BI__builtin_ia32_cmpeqsd: 6314 Imm = 0; 6315 break; 6316 case X86::BI__builtin_ia32_cmpltps: 6317 case X86::BI__builtin_ia32_cmpltss: 6318 case X86::BI__builtin_ia32_cmpltpd: 6319 case X86::BI__builtin_ia32_cmpltsd: 6320 Imm = 1; 6321 break; 6322 case X86::BI__builtin_ia32_cmpleps: 6323 case X86::BI__builtin_ia32_cmpless: 6324 case X86::BI__builtin_ia32_cmplepd: 6325 case X86::BI__builtin_ia32_cmplesd: 6326 Imm = 2; 6327 break; 6328 case X86::BI__builtin_ia32_cmpunordps: 6329 case X86::BI__builtin_ia32_cmpunordss: 6330 case X86::BI__builtin_ia32_cmpunordpd: 6331 case X86::BI__builtin_ia32_cmpunordsd: 6332 Imm = 3; 6333 break; 6334 case X86::BI__builtin_ia32_cmpneqps: 6335 case X86::BI__builtin_ia32_cmpneqss: 6336 case X86::BI__builtin_ia32_cmpneqpd: 6337 case X86::BI__builtin_ia32_cmpneqsd: 6338 Imm = 4; 6339 break; 6340 case X86::BI__builtin_ia32_cmpnltps: 6341 case X86::BI__builtin_ia32_cmpnltss: 6342 case X86::BI__builtin_ia32_cmpnltpd: 6343 case X86::BI__builtin_ia32_cmpnltsd: 6344 Imm = 5; 6345 break; 6346 case X86::BI__builtin_ia32_cmpnleps: 6347 case X86::BI__builtin_ia32_cmpnless: 6348 case X86::BI__builtin_ia32_cmpnlepd: 6349 case X86::BI__builtin_ia32_cmpnlesd: 6350 Imm = 6; 6351 break; 6352 case X86::BI__builtin_ia32_cmpordps: 6353 case X86::BI__builtin_ia32_cmpordss: 6354 case X86::BI__builtin_ia32_cmpordpd: 6355 case X86::BI__builtin_ia32_cmpordsd: 6356 Imm = 7; 6357 break; 6358 } 6359 6360 // Choose the intrinsic ID. 6361 const char *name; 6362 Intrinsic::ID ID; 6363 switch (BuiltinID) { 6364 default: llvm_unreachable("Unsupported intrinsic!"); 6365 case X86::BI__builtin_ia32_cmpeqps: 6366 case X86::BI__builtin_ia32_cmpltps: 6367 case X86::BI__builtin_ia32_cmpleps: 6368 case X86::BI__builtin_ia32_cmpunordps: 6369 case X86::BI__builtin_ia32_cmpneqps: 6370 case X86::BI__builtin_ia32_cmpnltps: 6371 case X86::BI__builtin_ia32_cmpnleps: 6372 case X86::BI__builtin_ia32_cmpordps: 6373 name = "cmpps"; 6374 ID = Intrinsic::x86_sse_cmp_ps; 6375 break; 6376 case X86::BI__builtin_ia32_cmpeqss: 6377 case X86::BI__builtin_ia32_cmpltss: 6378 case X86::BI__builtin_ia32_cmpless: 6379 case X86::BI__builtin_ia32_cmpunordss: 6380 case X86::BI__builtin_ia32_cmpneqss: 6381 case X86::BI__builtin_ia32_cmpnltss: 6382 case X86::BI__builtin_ia32_cmpnless: 6383 case X86::BI__builtin_ia32_cmpordss: 6384 name = "cmpss"; 6385 ID = Intrinsic::x86_sse_cmp_ss; 6386 break; 6387 case X86::BI__builtin_ia32_cmpeqpd: 6388 case X86::BI__builtin_ia32_cmpltpd: 6389 case X86::BI__builtin_ia32_cmplepd: 6390 case X86::BI__builtin_ia32_cmpunordpd: 6391 case X86::BI__builtin_ia32_cmpneqpd: 6392 case X86::BI__builtin_ia32_cmpnltpd: 6393 case X86::BI__builtin_ia32_cmpnlepd: 6394 case X86::BI__builtin_ia32_cmpordpd: 6395 name = "cmppd"; 6396 ID = Intrinsic::x86_sse2_cmp_pd; 6397 break; 6398 case X86::BI__builtin_ia32_cmpeqsd: 6399 case X86::BI__builtin_ia32_cmpltsd: 6400 case X86::BI__builtin_ia32_cmplesd: 6401 case X86::BI__builtin_ia32_cmpunordsd: 6402 case X86::BI__builtin_ia32_cmpneqsd: 6403 case X86::BI__builtin_ia32_cmpnltsd: 6404 case X86::BI__builtin_ia32_cmpnlesd: 6405 case X86::BI__builtin_ia32_cmpordsd: 6406 name = "cmpsd"; 6407 ID = Intrinsic::x86_sse2_cmp_sd; 6408 break; 6409 } 6410 6411 Ops.push_back(llvm::ConstantInt::get(Int8Ty, Imm)); 6412 llvm::Function *F = CGM.getIntrinsic(ID); 6413 return Builder.CreateCall(F, Ops, name); 6414 } 6415 } 6416 6417 6418 Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, 6419 const CallExpr *E) { 6420 SmallVector<Value*, 4> Ops; 6421 6422 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) 6423 Ops.push_back(EmitScalarExpr(E->getArg(i))); 6424 6425 Intrinsic::ID ID = Intrinsic::not_intrinsic; 6426 6427 switch (BuiltinID) { 6428 default: return nullptr; 6429 6430 // __builtin_ppc_get_timebase is GCC 4.8+'s PowerPC-specific name for what we 6431 // call __builtin_readcyclecounter. 6432 case PPC::BI__builtin_ppc_get_timebase: 6433 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::readcyclecounter)); 6434 6435 // vec_ld, vec_lvsl, vec_lvsr 6436 case PPC::BI__builtin_altivec_lvx: 6437 case PPC::BI__builtin_altivec_lvxl: 6438 case PPC::BI__builtin_altivec_lvebx: 6439 case PPC::BI__builtin_altivec_lvehx: 6440 case PPC::BI__builtin_altivec_lvewx: 6441 case PPC::BI__builtin_altivec_lvsl: 6442 case PPC::BI__builtin_altivec_lvsr: 6443 case PPC::BI__builtin_vsx_lxvd2x: 6444 case PPC::BI__builtin_vsx_lxvw4x: 6445 { 6446 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 6447 6448 Ops[0] = Builder.CreateGEP(Ops[1], Ops[0]); 6449 Ops.pop_back(); 6450 6451 switch (BuiltinID) { 6452 default: llvm_unreachable("Unsupported ld/lvsl/lvsr intrinsic!"); 6453 case PPC::BI__builtin_altivec_lvx: 6454 ID = Intrinsic::ppc_altivec_lvx; 6455 break; 6456 case PPC::BI__builtin_altivec_lvxl: 6457 ID = Intrinsic::ppc_altivec_lvxl; 6458 break; 6459 case PPC::BI__builtin_altivec_lvebx: 6460 ID = Intrinsic::ppc_altivec_lvebx; 6461 break; 6462 case PPC::BI__builtin_altivec_lvehx: 6463 ID = Intrinsic::ppc_altivec_lvehx; 6464 break; 6465 case PPC::BI__builtin_altivec_lvewx: 6466 ID = Intrinsic::ppc_altivec_lvewx; 6467 break; 6468 case PPC::BI__builtin_altivec_lvsl: 6469 ID = Intrinsic::ppc_altivec_lvsl; 6470 break; 6471 case PPC::BI__builtin_altivec_lvsr: 6472 ID = Intrinsic::ppc_altivec_lvsr; 6473 break; 6474 case PPC::BI__builtin_vsx_lxvd2x: 6475 ID = Intrinsic::ppc_vsx_lxvd2x; 6476 break; 6477 case PPC::BI__builtin_vsx_lxvw4x: 6478 ID = Intrinsic::ppc_vsx_lxvw4x; 6479 break; 6480 } 6481 llvm::Function *F = CGM.getIntrinsic(ID); 6482 return Builder.CreateCall(F, Ops, ""); 6483 } 6484 6485 // vec_st 6486 case PPC::BI__builtin_altivec_stvx: 6487 case PPC::BI__builtin_altivec_stvxl: 6488 case PPC::BI__builtin_altivec_stvebx: 6489 case PPC::BI__builtin_altivec_stvehx: 6490 case PPC::BI__builtin_altivec_stvewx: 6491 case PPC::BI__builtin_vsx_stxvd2x: 6492 case PPC::BI__builtin_vsx_stxvw4x: 6493 { 6494 Ops[2] = Builder.CreateBitCast(Ops[2], Int8PtrTy); 6495 Ops[1] = Builder.CreateGEP(Ops[2], Ops[1]); 6496 Ops.pop_back(); 6497 6498 switch (BuiltinID) { 6499 default: llvm_unreachable("Unsupported st intrinsic!"); 6500 case PPC::BI__builtin_altivec_stvx: 6501 ID = Intrinsic::ppc_altivec_stvx; 6502 break; 6503 case PPC::BI__builtin_altivec_stvxl: 6504 ID = Intrinsic::ppc_altivec_stvxl; 6505 break; 6506 case PPC::BI__builtin_altivec_stvebx: 6507 ID = Intrinsic::ppc_altivec_stvebx; 6508 break; 6509 case PPC::BI__builtin_altivec_stvehx: 6510 ID = Intrinsic::ppc_altivec_stvehx; 6511 break; 6512 case PPC::BI__builtin_altivec_stvewx: 6513 ID = Intrinsic::ppc_altivec_stvewx; 6514 break; 6515 case PPC::BI__builtin_vsx_stxvd2x: 6516 ID = Intrinsic::ppc_vsx_stxvd2x; 6517 break; 6518 case PPC::BI__builtin_vsx_stxvw4x: 6519 ID = Intrinsic::ppc_vsx_stxvw4x; 6520 break; 6521 } 6522 llvm::Function *F = CGM.getIntrinsic(ID); 6523 return Builder.CreateCall(F, Ops, ""); 6524 } 6525 // Square root 6526 case PPC::BI__builtin_vsx_xvsqrtsp: 6527 case PPC::BI__builtin_vsx_xvsqrtdp: { 6528 llvm::Type *ResultType = ConvertType(E->getType()); 6529 Value *X = EmitScalarExpr(E->getArg(0)); 6530 ID = Intrinsic::sqrt; 6531 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 6532 return Builder.CreateCall(F, X); 6533 } 6534 // Count leading zeros 6535 case PPC::BI__builtin_altivec_vclzb: 6536 case PPC::BI__builtin_altivec_vclzh: 6537 case PPC::BI__builtin_altivec_vclzw: 6538 case PPC::BI__builtin_altivec_vclzd: { 6539 llvm::Type *ResultType = ConvertType(E->getType()); 6540 Value *X = EmitScalarExpr(E->getArg(0)); 6541 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 6542 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 6543 return Builder.CreateCall(F, {X, Undef}); 6544 } 6545 // Copy sign 6546 case PPC::BI__builtin_vsx_xvcpsgnsp: 6547 case PPC::BI__builtin_vsx_xvcpsgndp: { 6548 llvm::Type *ResultType = ConvertType(E->getType()); 6549 Value *X = EmitScalarExpr(E->getArg(0)); 6550 Value *Y = EmitScalarExpr(E->getArg(1)); 6551 ID = Intrinsic::copysign; 6552 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 6553 return Builder.CreateCall(F, {X, Y}); 6554 } 6555 // Rounding/truncation 6556 case PPC::BI__builtin_vsx_xvrspip: 6557 case PPC::BI__builtin_vsx_xvrdpip: 6558 case PPC::BI__builtin_vsx_xvrdpim: 6559 case PPC::BI__builtin_vsx_xvrspim: 6560 case PPC::BI__builtin_vsx_xvrdpi: 6561 case PPC::BI__builtin_vsx_xvrspi: 6562 case PPC::BI__builtin_vsx_xvrdpic: 6563 case PPC::BI__builtin_vsx_xvrspic: 6564 case PPC::BI__builtin_vsx_xvrdpiz: 6565 case PPC::BI__builtin_vsx_xvrspiz: { 6566 llvm::Type *ResultType = ConvertType(E->getType()); 6567 Value *X = EmitScalarExpr(E->getArg(0)); 6568 if (BuiltinID == PPC::BI__builtin_vsx_xvrdpim || 6569 BuiltinID == PPC::BI__builtin_vsx_xvrspim) 6570 ID = Intrinsic::floor; 6571 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpi || 6572 BuiltinID == PPC::BI__builtin_vsx_xvrspi) 6573 ID = Intrinsic::round; 6574 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpic || 6575 BuiltinID == PPC::BI__builtin_vsx_xvrspic) 6576 ID = Intrinsic::nearbyint; 6577 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpip || 6578 BuiltinID == PPC::BI__builtin_vsx_xvrspip) 6579 ID = Intrinsic::ceil; 6580 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpiz || 6581 BuiltinID == PPC::BI__builtin_vsx_xvrspiz) 6582 ID = Intrinsic::trunc; 6583 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 6584 return Builder.CreateCall(F, X); 6585 } 6586 // FMA variations 6587 case PPC::BI__builtin_vsx_xvmaddadp: 6588 case PPC::BI__builtin_vsx_xvmaddasp: 6589 case PPC::BI__builtin_vsx_xvnmaddadp: 6590 case PPC::BI__builtin_vsx_xvnmaddasp: 6591 case PPC::BI__builtin_vsx_xvmsubadp: 6592 case PPC::BI__builtin_vsx_xvmsubasp: 6593 case PPC::BI__builtin_vsx_xvnmsubadp: 6594 case PPC::BI__builtin_vsx_xvnmsubasp: { 6595 llvm::Type *ResultType = ConvertType(E->getType()); 6596 Value *X = EmitScalarExpr(E->getArg(0)); 6597 Value *Y = EmitScalarExpr(E->getArg(1)); 6598 Value *Z = EmitScalarExpr(E->getArg(2)); 6599 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 6600 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 6601 switch (BuiltinID) { 6602 case PPC::BI__builtin_vsx_xvmaddadp: 6603 case PPC::BI__builtin_vsx_xvmaddasp: 6604 return Builder.CreateCall(F, {X, Y, Z}); 6605 case PPC::BI__builtin_vsx_xvnmaddadp: 6606 case PPC::BI__builtin_vsx_xvnmaddasp: 6607 return Builder.CreateFSub(Zero, 6608 Builder.CreateCall(F, {X, Y, Z}), "sub"); 6609 case PPC::BI__builtin_vsx_xvmsubadp: 6610 case PPC::BI__builtin_vsx_xvmsubasp: 6611 return Builder.CreateCall(F, 6612 {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 6613 case PPC::BI__builtin_vsx_xvnmsubadp: 6614 case PPC::BI__builtin_vsx_xvnmsubasp: 6615 Value *FsubRes = 6616 Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 6617 return Builder.CreateFSub(Zero, FsubRes, "sub"); 6618 } 6619 llvm_unreachable("Unknown FMA operation"); 6620 return nullptr; // Suppress no-return warning 6621 } 6622 } 6623 } 6624 6625 // Emit an intrinsic that has 1 float or double. 6626 static Value *emitUnaryFPBuiltin(CodeGenFunction &CGF, 6627 const CallExpr *E, 6628 unsigned IntrinsicID) { 6629 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 6630 6631 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 6632 return CGF.Builder.CreateCall(F, Src0); 6633 } 6634 6635 // Emit an intrinsic that has 3 float or double operands. 6636 static Value *emitTernaryFPBuiltin(CodeGenFunction &CGF, 6637 const CallExpr *E, 6638 unsigned IntrinsicID) { 6639 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 6640 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 6641 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); 6642 6643 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 6644 return CGF.Builder.CreateCall(F, {Src0, Src1, Src2}); 6645 } 6646 6647 // Emit an intrinsic that has 1 float or double operand, and 1 integer. 6648 static Value *emitFPIntBuiltin(CodeGenFunction &CGF, 6649 const CallExpr *E, 6650 unsigned IntrinsicID) { 6651 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 6652 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 6653 6654 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 6655 return CGF.Builder.CreateCall(F, {Src0, Src1}); 6656 } 6657 6658 Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID, 6659 const CallExpr *E) { 6660 switch (BuiltinID) { 6661 case AMDGPU::BI__builtin_amdgpu_div_scale: 6662 case AMDGPU::BI__builtin_amdgpu_div_scalef: { 6663 // Translate from the intrinsics's struct return to the builtin's out 6664 // argument. 6665 6666 Address FlagOutPtr = EmitPointerWithAlignment(E->getArg(3)); 6667 6668 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 6669 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 6670 llvm::Value *Z = EmitScalarExpr(E->getArg(2)); 6671 6672 llvm::Value *Callee = CGM.getIntrinsic(Intrinsic::AMDGPU_div_scale, 6673 X->getType()); 6674 6675 llvm::Value *Tmp = Builder.CreateCall(Callee, {X, Y, Z}); 6676 6677 llvm::Value *Result = Builder.CreateExtractValue(Tmp, 0); 6678 llvm::Value *Flag = Builder.CreateExtractValue(Tmp, 1); 6679 6680 llvm::Type *RealFlagType 6681 = FlagOutPtr.getPointer()->getType()->getPointerElementType(); 6682 6683 llvm::Value *FlagExt = Builder.CreateZExt(Flag, RealFlagType); 6684 Builder.CreateStore(FlagExt, FlagOutPtr); 6685 return Result; 6686 } 6687 case AMDGPU::BI__builtin_amdgpu_div_fmas: 6688 case AMDGPU::BI__builtin_amdgpu_div_fmasf: { 6689 llvm::Value *Src0 = EmitScalarExpr(E->getArg(0)); 6690 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); 6691 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); 6692 llvm::Value *Src3 = EmitScalarExpr(E->getArg(3)); 6693 6694 llvm::Value *F = CGM.getIntrinsic(Intrinsic::AMDGPU_div_fmas, 6695 Src0->getType()); 6696 llvm::Value *Src3ToBool = Builder.CreateIsNotNull(Src3); 6697 return Builder.CreateCall(F, {Src0, Src1, Src2, Src3ToBool}); 6698 } 6699 case AMDGPU::BI__builtin_amdgpu_div_fixup: 6700 case AMDGPU::BI__builtin_amdgpu_div_fixupf: 6701 return emitTernaryFPBuiltin(*this, E, Intrinsic::AMDGPU_div_fixup); 6702 case AMDGPU::BI__builtin_amdgpu_trig_preop: 6703 case AMDGPU::BI__builtin_amdgpu_trig_preopf: 6704 return emitFPIntBuiltin(*this, E, Intrinsic::AMDGPU_trig_preop); 6705 case AMDGPU::BI__builtin_amdgpu_rcp: 6706 case AMDGPU::BI__builtin_amdgpu_rcpf: 6707 return emitUnaryFPBuiltin(*this, E, Intrinsic::AMDGPU_rcp); 6708 case AMDGPU::BI__builtin_amdgpu_rsq: 6709 case AMDGPU::BI__builtin_amdgpu_rsqf: 6710 return emitUnaryFPBuiltin(*this, E, Intrinsic::AMDGPU_rsq); 6711 case AMDGPU::BI__builtin_amdgpu_rsq_clamped: 6712 case AMDGPU::BI__builtin_amdgpu_rsq_clampedf: 6713 return emitUnaryFPBuiltin(*this, E, Intrinsic::AMDGPU_rsq_clamped); 6714 case AMDGPU::BI__builtin_amdgpu_ldexp: 6715 case AMDGPU::BI__builtin_amdgpu_ldexpf: 6716 return emitFPIntBuiltin(*this, E, Intrinsic::AMDGPU_ldexp); 6717 case AMDGPU::BI__builtin_amdgpu_class: 6718 case AMDGPU::BI__builtin_amdgpu_classf: 6719 return emitFPIntBuiltin(*this, E, Intrinsic::AMDGPU_class); 6720 default: 6721 return nullptr; 6722 } 6723 } 6724 6725 /// Handle a SystemZ function in which the final argument is a pointer 6726 /// to an int that receives the post-instruction CC value. At the LLVM level 6727 /// this is represented as a function that returns a {result, cc} pair. 6728 static Value *EmitSystemZIntrinsicWithCC(CodeGenFunction &CGF, 6729 unsigned IntrinsicID, 6730 const CallExpr *E) { 6731 unsigned NumArgs = E->getNumArgs() - 1; 6732 SmallVector<Value *, 8> Args(NumArgs); 6733 for (unsigned I = 0; I < NumArgs; ++I) 6734 Args[I] = CGF.EmitScalarExpr(E->getArg(I)); 6735 Address CCPtr = CGF.EmitPointerWithAlignment(E->getArg(NumArgs)); 6736 Value *F = CGF.CGM.getIntrinsic(IntrinsicID); 6737 Value *Call = CGF.Builder.CreateCall(F, Args); 6738 Value *CC = CGF.Builder.CreateExtractValue(Call, 1); 6739 CGF.Builder.CreateStore(CC, CCPtr); 6740 return CGF.Builder.CreateExtractValue(Call, 0); 6741 } 6742 6743 Value *CodeGenFunction::EmitSystemZBuiltinExpr(unsigned BuiltinID, 6744 const CallExpr *E) { 6745 switch (BuiltinID) { 6746 case SystemZ::BI__builtin_tbegin: { 6747 Value *TDB = EmitScalarExpr(E->getArg(0)); 6748 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 6749 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin); 6750 return Builder.CreateCall(F, {TDB, Control}); 6751 } 6752 case SystemZ::BI__builtin_tbegin_nofloat: { 6753 Value *TDB = EmitScalarExpr(E->getArg(0)); 6754 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 6755 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin_nofloat); 6756 return Builder.CreateCall(F, {TDB, Control}); 6757 } 6758 case SystemZ::BI__builtin_tbeginc: { 6759 Value *TDB = llvm::ConstantPointerNull::get(Int8PtrTy); 6760 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff08); 6761 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbeginc); 6762 return Builder.CreateCall(F, {TDB, Control}); 6763 } 6764 case SystemZ::BI__builtin_tabort: { 6765 Value *Data = EmitScalarExpr(E->getArg(0)); 6766 Value *F = CGM.getIntrinsic(Intrinsic::s390_tabort); 6767 return Builder.CreateCall(F, Builder.CreateSExt(Data, Int64Ty, "tabort")); 6768 } 6769 case SystemZ::BI__builtin_non_tx_store: { 6770 Value *Address = EmitScalarExpr(E->getArg(0)); 6771 Value *Data = EmitScalarExpr(E->getArg(1)); 6772 Value *F = CGM.getIntrinsic(Intrinsic::s390_ntstg); 6773 return Builder.CreateCall(F, {Data, Address}); 6774 } 6775 6776 // Vector builtins. Note that most vector builtins are mapped automatically 6777 // to target-specific LLVM intrinsics. The ones handled specially here can 6778 // be represented via standard LLVM IR, which is preferable to enable common 6779 // LLVM optimizations. 6780 6781 case SystemZ::BI__builtin_s390_vpopctb: 6782 case SystemZ::BI__builtin_s390_vpopcth: 6783 case SystemZ::BI__builtin_s390_vpopctf: 6784 case SystemZ::BI__builtin_s390_vpopctg: { 6785 llvm::Type *ResultType = ConvertType(E->getType()); 6786 Value *X = EmitScalarExpr(E->getArg(0)); 6787 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 6788 return Builder.CreateCall(F, X); 6789 } 6790 6791 case SystemZ::BI__builtin_s390_vclzb: 6792 case SystemZ::BI__builtin_s390_vclzh: 6793 case SystemZ::BI__builtin_s390_vclzf: 6794 case SystemZ::BI__builtin_s390_vclzg: { 6795 llvm::Type *ResultType = ConvertType(E->getType()); 6796 Value *X = EmitScalarExpr(E->getArg(0)); 6797 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 6798 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 6799 return Builder.CreateCall(F, {X, Undef}); 6800 } 6801 6802 case SystemZ::BI__builtin_s390_vctzb: 6803 case SystemZ::BI__builtin_s390_vctzh: 6804 case SystemZ::BI__builtin_s390_vctzf: 6805 case SystemZ::BI__builtin_s390_vctzg: { 6806 llvm::Type *ResultType = ConvertType(E->getType()); 6807 Value *X = EmitScalarExpr(E->getArg(0)); 6808 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 6809 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 6810 return Builder.CreateCall(F, {X, Undef}); 6811 } 6812 6813 case SystemZ::BI__builtin_s390_vfsqdb: { 6814 llvm::Type *ResultType = ConvertType(E->getType()); 6815 Value *X = EmitScalarExpr(E->getArg(0)); 6816 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, ResultType); 6817 return Builder.CreateCall(F, X); 6818 } 6819 case SystemZ::BI__builtin_s390_vfmadb: { 6820 llvm::Type *ResultType = ConvertType(E->getType()); 6821 Value *X = EmitScalarExpr(E->getArg(0)); 6822 Value *Y = EmitScalarExpr(E->getArg(1)); 6823 Value *Z = EmitScalarExpr(E->getArg(2)); 6824 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 6825 return Builder.CreateCall(F, {X, Y, Z}); 6826 } 6827 case SystemZ::BI__builtin_s390_vfmsdb: { 6828 llvm::Type *ResultType = ConvertType(E->getType()); 6829 Value *X = EmitScalarExpr(E->getArg(0)); 6830 Value *Y = EmitScalarExpr(E->getArg(1)); 6831 Value *Z = EmitScalarExpr(E->getArg(2)); 6832 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 6833 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 6834 return Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 6835 } 6836 case SystemZ::BI__builtin_s390_vflpdb: { 6837 llvm::Type *ResultType = ConvertType(E->getType()); 6838 Value *X = EmitScalarExpr(E->getArg(0)); 6839 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 6840 return Builder.CreateCall(F, X); 6841 } 6842 case SystemZ::BI__builtin_s390_vflndb: { 6843 llvm::Type *ResultType = ConvertType(E->getType()); 6844 Value *X = EmitScalarExpr(E->getArg(0)); 6845 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 6846 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 6847 return Builder.CreateFSub(Zero, Builder.CreateCall(F, X), "sub"); 6848 } 6849 case SystemZ::BI__builtin_s390_vfidb: { 6850 llvm::Type *ResultType = ConvertType(E->getType()); 6851 Value *X = EmitScalarExpr(E->getArg(0)); 6852 // Constant-fold the M4 and M5 mask arguments. 6853 llvm::APSInt M4, M5; 6854 bool IsConstM4 = E->getArg(1)->isIntegerConstantExpr(M4, getContext()); 6855 bool IsConstM5 = E->getArg(2)->isIntegerConstantExpr(M5, getContext()); 6856 assert(IsConstM4 && IsConstM5 && "Constant arg isn't actually constant?"); 6857 (void)IsConstM4; (void)IsConstM5; 6858 // Check whether this instance of vfidb can be represented via a LLVM 6859 // standard intrinsic. We only support some combinations of M4 and M5. 6860 Intrinsic::ID ID = Intrinsic::not_intrinsic; 6861 switch (M4.getZExtValue()) { 6862 default: break; 6863 case 0: // IEEE-inexact exception allowed 6864 switch (M5.getZExtValue()) { 6865 default: break; 6866 case 0: ID = Intrinsic::rint; break; 6867 } 6868 break; 6869 case 4: // IEEE-inexact exception suppressed 6870 switch (M5.getZExtValue()) { 6871 default: break; 6872 case 0: ID = Intrinsic::nearbyint; break; 6873 case 1: ID = Intrinsic::round; break; 6874 case 5: ID = Intrinsic::trunc; break; 6875 case 6: ID = Intrinsic::ceil; break; 6876 case 7: ID = Intrinsic::floor; break; 6877 } 6878 break; 6879 } 6880 if (ID != Intrinsic::not_intrinsic) { 6881 Function *F = CGM.getIntrinsic(ID, ResultType); 6882 return Builder.CreateCall(F, X); 6883 } 6884 Function *F = CGM.getIntrinsic(Intrinsic::s390_vfidb); 6885 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 6886 Value *M5Value = llvm::ConstantInt::get(getLLVMContext(), M5); 6887 return Builder.CreateCall(F, {X, M4Value, M5Value}); 6888 } 6889 6890 // Vector intrisincs that output the post-instruction CC value. 6891 6892 #define INTRINSIC_WITH_CC(NAME) \ 6893 case SystemZ::BI__builtin_##NAME: \ 6894 return EmitSystemZIntrinsicWithCC(*this, Intrinsic::NAME, E) 6895 6896 INTRINSIC_WITH_CC(s390_vpkshs); 6897 INTRINSIC_WITH_CC(s390_vpksfs); 6898 INTRINSIC_WITH_CC(s390_vpksgs); 6899 6900 INTRINSIC_WITH_CC(s390_vpklshs); 6901 INTRINSIC_WITH_CC(s390_vpklsfs); 6902 INTRINSIC_WITH_CC(s390_vpklsgs); 6903 6904 INTRINSIC_WITH_CC(s390_vceqbs); 6905 INTRINSIC_WITH_CC(s390_vceqhs); 6906 INTRINSIC_WITH_CC(s390_vceqfs); 6907 INTRINSIC_WITH_CC(s390_vceqgs); 6908 6909 INTRINSIC_WITH_CC(s390_vchbs); 6910 INTRINSIC_WITH_CC(s390_vchhs); 6911 INTRINSIC_WITH_CC(s390_vchfs); 6912 INTRINSIC_WITH_CC(s390_vchgs); 6913 6914 INTRINSIC_WITH_CC(s390_vchlbs); 6915 INTRINSIC_WITH_CC(s390_vchlhs); 6916 INTRINSIC_WITH_CC(s390_vchlfs); 6917 INTRINSIC_WITH_CC(s390_vchlgs); 6918 6919 INTRINSIC_WITH_CC(s390_vfaebs); 6920 INTRINSIC_WITH_CC(s390_vfaehs); 6921 INTRINSIC_WITH_CC(s390_vfaefs); 6922 6923 INTRINSIC_WITH_CC(s390_vfaezbs); 6924 INTRINSIC_WITH_CC(s390_vfaezhs); 6925 INTRINSIC_WITH_CC(s390_vfaezfs); 6926 6927 INTRINSIC_WITH_CC(s390_vfeebs); 6928 INTRINSIC_WITH_CC(s390_vfeehs); 6929 INTRINSIC_WITH_CC(s390_vfeefs); 6930 6931 INTRINSIC_WITH_CC(s390_vfeezbs); 6932 INTRINSIC_WITH_CC(s390_vfeezhs); 6933 INTRINSIC_WITH_CC(s390_vfeezfs); 6934 6935 INTRINSIC_WITH_CC(s390_vfenebs); 6936 INTRINSIC_WITH_CC(s390_vfenehs); 6937 INTRINSIC_WITH_CC(s390_vfenefs); 6938 6939 INTRINSIC_WITH_CC(s390_vfenezbs); 6940 INTRINSIC_WITH_CC(s390_vfenezhs); 6941 INTRINSIC_WITH_CC(s390_vfenezfs); 6942 6943 INTRINSIC_WITH_CC(s390_vistrbs); 6944 INTRINSIC_WITH_CC(s390_vistrhs); 6945 INTRINSIC_WITH_CC(s390_vistrfs); 6946 6947 INTRINSIC_WITH_CC(s390_vstrcbs); 6948 INTRINSIC_WITH_CC(s390_vstrchs); 6949 INTRINSIC_WITH_CC(s390_vstrcfs); 6950 6951 INTRINSIC_WITH_CC(s390_vstrczbs); 6952 INTRINSIC_WITH_CC(s390_vstrczhs); 6953 INTRINSIC_WITH_CC(s390_vstrczfs); 6954 6955 INTRINSIC_WITH_CC(s390_vfcedbs); 6956 INTRINSIC_WITH_CC(s390_vfchdbs); 6957 INTRINSIC_WITH_CC(s390_vfchedbs); 6958 6959 INTRINSIC_WITH_CC(s390_vftcidb); 6960 6961 #undef INTRINSIC_WITH_CC 6962 6963 default: 6964 return nullptr; 6965 } 6966 } 6967 6968 Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, 6969 const CallExpr *E) { 6970 switch (BuiltinID) { 6971 case NVPTX::BI__nvvm_atom_add_gen_i: 6972 case NVPTX::BI__nvvm_atom_add_gen_l: 6973 case NVPTX::BI__nvvm_atom_add_gen_ll: 6974 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Add, E); 6975 6976 case NVPTX::BI__nvvm_atom_sub_gen_i: 6977 case NVPTX::BI__nvvm_atom_sub_gen_l: 6978 case NVPTX::BI__nvvm_atom_sub_gen_ll: 6979 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Sub, E); 6980 6981 case NVPTX::BI__nvvm_atom_and_gen_i: 6982 case NVPTX::BI__nvvm_atom_and_gen_l: 6983 case NVPTX::BI__nvvm_atom_and_gen_ll: 6984 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::And, E); 6985 6986 case NVPTX::BI__nvvm_atom_or_gen_i: 6987 case NVPTX::BI__nvvm_atom_or_gen_l: 6988 case NVPTX::BI__nvvm_atom_or_gen_ll: 6989 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Or, E); 6990 6991 case NVPTX::BI__nvvm_atom_xor_gen_i: 6992 case NVPTX::BI__nvvm_atom_xor_gen_l: 6993 case NVPTX::BI__nvvm_atom_xor_gen_ll: 6994 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xor, E); 6995 6996 case NVPTX::BI__nvvm_atom_xchg_gen_i: 6997 case NVPTX::BI__nvvm_atom_xchg_gen_l: 6998 case NVPTX::BI__nvvm_atom_xchg_gen_ll: 6999 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xchg, E); 7000 7001 case NVPTX::BI__nvvm_atom_max_gen_i: 7002 case NVPTX::BI__nvvm_atom_max_gen_l: 7003 case NVPTX::BI__nvvm_atom_max_gen_ll: 7004 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Max, E); 7005 7006 case NVPTX::BI__nvvm_atom_max_gen_ui: 7007 case NVPTX::BI__nvvm_atom_max_gen_ul: 7008 case NVPTX::BI__nvvm_atom_max_gen_ull: 7009 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMax, E); 7010 7011 case NVPTX::BI__nvvm_atom_min_gen_i: 7012 case NVPTX::BI__nvvm_atom_min_gen_l: 7013 case NVPTX::BI__nvvm_atom_min_gen_ll: 7014 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Min, E); 7015 7016 case NVPTX::BI__nvvm_atom_min_gen_ui: 7017 case NVPTX::BI__nvvm_atom_min_gen_ul: 7018 case NVPTX::BI__nvvm_atom_min_gen_ull: 7019 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMin, E); 7020 7021 case NVPTX::BI__nvvm_atom_cas_gen_i: 7022 case NVPTX::BI__nvvm_atom_cas_gen_l: 7023 case NVPTX::BI__nvvm_atom_cas_gen_ll: 7024 // __nvvm_atom_cas_gen_* should return the old value rather than the 7025 // success flag. 7026 return MakeAtomicCmpXchgValue(*this, E, /*ReturnBool=*/false); 7027 7028 case NVPTX::BI__nvvm_atom_add_gen_f: { 7029 Value *Ptr = EmitScalarExpr(E->getArg(0)); 7030 Value *Val = EmitScalarExpr(E->getArg(1)); 7031 // atomicrmw only deals with integer arguments so we need to use 7032 // LLVM's nvvm_atomic_load_add_f32 intrinsic for that. 7033 Value *FnALAF32 = 7034 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f32, Ptr->getType()); 7035 return Builder.CreateCall(FnALAF32, {Ptr, Val}); 7036 } 7037 7038 default: 7039 return nullptr; 7040 } 7041 } 7042 7043 Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, 7044 const CallExpr *E) { 7045 switch (BuiltinID) { 7046 case WebAssembly::BI__builtin_wasm_page_size: { 7047 llvm::Type *ResultType = ConvertType(E->getType()); 7048 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_page_size, ResultType); 7049 return Builder.CreateCall(Callee); 7050 } 7051 case WebAssembly::BI__builtin_wasm_memory_size: { 7052 llvm::Type *ResultType = ConvertType(E->getType()); 7053 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_memory_size, ResultType); 7054 return Builder.CreateCall(Callee); 7055 } 7056 case WebAssembly::BI__builtin_wasm_resize_memory: { 7057 Value *X = EmitScalarExpr(E->getArg(0)); 7058 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_resize_memory, X->getType()); 7059 return Builder.CreateCall(Callee, X); 7060 } 7061 7062 default: 7063 return nullptr; 7064 } 7065 } 7066