1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This contains code to emit Builtin calls as LLVM code. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "CGCXXABI.h" 15 #include "CGObjCRuntime.h" 16 #include "CGOpenCLRuntime.h" 17 #include "CGRecordLayout.h" 18 #include "CodeGenFunction.h" 19 #include "CodeGenModule.h" 20 #include "ConstantEmitter.h" 21 #include "TargetInfo.h" 22 #include "clang/AST/ASTContext.h" 23 #include "clang/AST/Decl.h" 24 #include "clang/Analysis/Analyses/OSLog.h" 25 #include "clang/Basic/TargetBuiltins.h" 26 #include "clang/Basic/TargetInfo.h" 27 #include "clang/CodeGen/CGFunctionInfo.h" 28 #include "llvm/ADT/StringExtras.h" 29 #include "llvm/IR/CallSite.h" 30 #include "llvm/IR/DataLayout.h" 31 #include "llvm/IR/InlineAsm.h" 32 #include "llvm/IR/Intrinsics.h" 33 #include "llvm/IR/MDBuilder.h" 34 #include "llvm/Support/ConvertUTF.h" 35 #include "llvm/Support/ScopedPrinter.h" 36 #include "llvm/Support/TargetParser.h" 37 #include <sstream> 38 39 using namespace clang; 40 using namespace CodeGen; 41 using namespace llvm; 42 43 static 44 int64_t clamp(int64_t Value, int64_t Low, int64_t High) { 45 return std::min(High, std::max(Low, Value)); 46 } 47 48 /// getBuiltinLibFunction - Given a builtin id for a function like 49 /// "__builtin_fabsf", return a Function* for "fabsf". 50 llvm::Constant *CodeGenModule::getBuiltinLibFunction(const FunctionDecl *FD, 51 unsigned BuiltinID) { 52 assert(Context.BuiltinInfo.isLibFunction(BuiltinID)); 53 54 // Get the name, skip over the __builtin_ prefix (if necessary). 55 StringRef Name; 56 GlobalDecl D(FD); 57 58 // If the builtin has been declared explicitly with an assembler label, 59 // use the mangled name. This differs from the plain label on platforms 60 // that prefix labels. 61 if (FD->hasAttr<AsmLabelAttr>()) 62 Name = getMangledName(D); 63 else 64 Name = Context.BuiltinInfo.getName(BuiltinID) + 10; 65 66 llvm::FunctionType *Ty = 67 cast<llvm::FunctionType>(getTypes().ConvertType(FD->getType())); 68 69 return GetOrCreateLLVMFunction(Name, Ty, D, /*ForVTable=*/false); 70 } 71 72 /// Emit the conversions required to turn the given value into an 73 /// integer of the given size. 74 static Value *EmitToInt(CodeGenFunction &CGF, llvm::Value *V, 75 QualType T, llvm::IntegerType *IntType) { 76 V = CGF.EmitToMemory(V, T); 77 78 if (V->getType()->isPointerTy()) 79 return CGF.Builder.CreatePtrToInt(V, IntType); 80 81 assert(V->getType() == IntType); 82 return V; 83 } 84 85 static Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V, 86 QualType T, llvm::Type *ResultType) { 87 V = CGF.EmitFromMemory(V, T); 88 89 if (ResultType->isPointerTy()) 90 return CGF.Builder.CreateIntToPtr(V, ResultType); 91 92 assert(V->getType() == ResultType); 93 return V; 94 } 95 96 /// Utility to insert an atomic instruction based on Instrinsic::ID 97 /// and the expression node. 98 static Value *MakeBinaryAtomicValue(CodeGenFunction &CGF, 99 llvm::AtomicRMWInst::BinOp Kind, 100 const CallExpr *E) { 101 QualType T = E->getType(); 102 assert(E->getArg(0)->getType()->isPointerType()); 103 assert(CGF.getContext().hasSameUnqualifiedType(T, 104 E->getArg(0)->getType()->getPointeeType())); 105 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 106 107 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 108 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 109 110 llvm::IntegerType *IntType = 111 llvm::IntegerType::get(CGF.getLLVMContext(), 112 CGF.getContext().getTypeSize(T)); 113 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 114 115 llvm::Value *Args[2]; 116 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 117 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 118 llvm::Type *ValueType = Args[1]->getType(); 119 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 120 121 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 122 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 123 return EmitFromInt(CGF, Result, T, ValueType); 124 } 125 126 static Value *EmitNontemporalStore(CodeGenFunction &CGF, const CallExpr *E) { 127 Value *Val = CGF.EmitScalarExpr(E->getArg(0)); 128 Value *Address = CGF.EmitScalarExpr(E->getArg(1)); 129 130 // Convert the type of the pointer to a pointer to the stored type. 131 Val = CGF.EmitToMemory(Val, E->getArg(0)->getType()); 132 Value *BC = CGF.Builder.CreateBitCast( 133 Address, llvm::PointerType::getUnqual(Val->getType()), "cast"); 134 LValue LV = CGF.MakeNaturalAlignAddrLValue(BC, E->getArg(0)->getType()); 135 LV.setNontemporal(true); 136 CGF.EmitStoreOfScalar(Val, LV, false); 137 return nullptr; 138 } 139 140 static Value *EmitNontemporalLoad(CodeGenFunction &CGF, const CallExpr *E) { 141 Value *Address = CGF.EmitScalarExpr(E->getArg(0)); 142 143 LValue LV = CGF.MakeNaturalAlignAddrLValue(Address, E->getType()); 144 LV.setNontemporal(true); 145 return CGF.EmitLoadOfScalar(LV, E->getExprLoc()); 146 } 147 148 static RValue EmitBinaryAtomic(CodeGenFunction &CGF, 149 llvm::AtomicRMWInst::BinOp Kind, 150 const CallExpr *E) { 151 return RValue::get(MakeBinaryAtomicValue(CGF, Kind, E)); 152 } 153 154 /// Utility to insert an atomic instruction based Instrinsic::ID and 155 /// the expression node, where the return value is the result of the 156 /// operation. 157 static RValue EmitBinaryAtomicPost(CodeGenFunction &CGF, 158 llvm::AtomicRMWInst::BinOp Kind, 159 const CallExpr *E, 160 Instruction::BinaryOps Op, 161 bool Invert = false) { 162 QualType T = E->getType(); 163 assert(E->getArg(0)->getType()->isPointerType()); 164 assert(CGF.getContext().hasSameUnqualifiedType(T, 165 E->getArg(0)->getType()->getPointeeType())); 166 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 167 168 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 169 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 170 171 llvm::IntegerType *IntType = 172 llvm::IntegerType::get(CGF.getLLVMContext(), 173 CGF.getContext().getTypeSize(T)); 174 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 175 176 llvm::Value *Args[2]; 177 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 178 llvm::Type *ValueType = Args[1]->getType(); 179 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 180 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 181 182 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 183 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 184 Result = CGF.Builder.CreateBinOp(Op, Result, Args[1]); 185 if (Invert) 186 Result = CGF.Builder.CreateBinOp(llvm::Instruction::Xor, Result, 187 llvm::ConstantInt::get(IntType, -1)); 188 Result = EmitFromInt(CGF, Result, T, ValueType); 189 return RValue::get(Result); 190 } 191 192 /// Utility to insert an atomic cmpxchg instruction. 193 /// 194 /// @param CGF The current codegen function. 195 /// @param E Builtin call expression to convert to cmpxchg. 196 /// arg0 - address to operate on 197 /// arg1 - value to compare with 198 /// arg2 - new value 199 /// @param ReturnBool Specifies whether to return success flag of 200 /// cmpxchg result or the old value. 201 /// 202 /// @returns result of cmpxchg, according to ReturnBool 203 static Value *MakeAtomicCmpXchgValue(CodeGenFunction &CGF, const CallExpr *E, 204 bool ReturnBool) { 205 QualType T = ReturnBool ? E->getArg(1)->getType() : E->getType(); 206 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 207 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 208 209 llvm::IntegerType *IntType = llvm::IntegerType::get( 210 CGF.getLLVMContext(), CGF.getContext().getTypeSize(T)); 211 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 212 213 Value *Args[3]; 214 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 215 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 216 llvm::Type *ValueType = Args[1]->getType(); 217 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 218 Args[2] = EmitToInt(CGF, CGF.EmitScalarExpr(E->getArg(2)), T, IntType); 219 220 Value *Pair = CGF.Builder.CreateAtomicCmpXchg( 221 Args[0], Args[1], Args[2], llvm::AtomicOrdering::SequentiallyConsistent, 222 llvm::AtomicOrdering::SequentiallyConsistent); 223 if (ReturnBool) 224 // Extract boolean success flag and zext it to int. 225 return CGF.Builder.CreateZExt(CGF.Builder.CreateExtractValue(Pair, 1), 226 CGF.ConvertType(E->getType())); 227 else 228 // Extract old value and emit it using the same type as compare value. 229 return EmitFromInt(CGF, CGF.Builder.CreateExtractValue(Pair, 0), T, 230 ValueType); 231 } 232 233 // Emit a simple mangled intrinsic that has 1 argument and a return type 234 // matching the argument type. 235 static Value *emitUnaryBuiltin(CodeGenFunction &CGF, 236 const CallExpr *E, 237 unsigned IntrinsicID) { 238 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 239 240 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 241 return CGF.Builder.CreateCall(F, Src0); 242 } 243 244 // Emit an intrinsic that has 2 operands of the same type as its result. 245 static Value *emitBinaryBuiltin(CodeGenFunction &CGF, 246 const CallExpr *E, 247 unsigned IntrinsicID) { 248 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 249 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 250 251 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 252 return CGF.Builder.CreateCall(F, { Src0, Src1 }); 253 } 254 255 // Emit an intrinsic that has 3 operands of the same type as its result. 256 static Value *emitTernaryBuiltin(CodeGenFunction &CGF, 257 const CallExpr *E, 258 unsigned IntrinsicID) { 259 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 260 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 261 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); 262 263 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 264 return CGF.Builder.CreateCall(F, { Src0, Src1, Src2 }); 265 } 266 267 // Emit an intrinsic that has 1 float or double operand, and 1 integer. 268 static Value *emitFPIntBuiltin(CodeGenFunction &CGF, 269 const CallExpr *E, 270 unsigned IntrinsicID) { 271 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 272 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 273 274 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 275 return CGF.Builder.CreateCall(F, {Src0, Src1}); 276 } 277 278 /// EmitFAbs - Emit a call to @llvm.fabs(). 279 static Value *EmitFAbs(CodeGenFunction &CGF, Value *V) { 280 Value *F = CGF.CGM.getIntrinsic(Intrinsic::fabs, V->getType()); 281 llvm::CallInst *Call = CGF.Builder.CreateCall(F, V); 282 Call->setDoesNotAccessMemory(); 283 return Call; 284 } 285 286 /// Emit the computation of the sign bit for a floating point value. Returns 287 /// the i1 sign bit value. 288 static Value *EmitSignBit(CodeGenFunction &CGF, Value *V) { 289 LLVMContext &C = CGF.CGM.getLLVMContext(); 290 291 llvm::Type *Ty = V->getType(); 292 int Width = Ty->getPrimitiveSizeInBits(); 293 llvm::Type *IntTy = llvm::IntegerType::get(C, Width); 294 V = CGF.Builder.CreateBitCast(V, IntTy); 295 if (Ty->isPPC_FP128Ty()) { 296 // We want the sign bit of the higher-order double. The bitcast we just 297 // did works as if the double-double was stored to memory and then 298 // read as an i128. The "store" will put the higher-order double in the 299 // lower address in both little- and big-Endian modes, but the "load" 300 // will treat those bits as a different part of the i128: the low bits in 301 // little-Endian, the high bits in big-Endian. Therefore, on big-Endian 302 // we need to shift the high bits down to the low before truncating. 303 Width >>= 1; 304 if (CGF.getTarget().isBigEndian()) { 305 Value *ShiftCst = llvm::ConstantInt::get(IntTy, Width); 306 V = CGF.Builder.CreateLShr(V, ShiftCst); 307 } 308 // We are truncating value in order to extract the higher-order 309 // double, which we will be using to extract the sign from. 310 IntTy = llvm::IntegerType::get(C, Width); 311 V = CGF.Builder.CreateTrunc(V, IntTy); 312 } 313 Value *Zero = llvm::Constant::getNullValue(IntTy); 314 return CGF.Builder.CreateICmpSLT(V, Zero); 315 } 316 317 static RValue emitLibraryCall(CodeGenFunction &CGF, const FunctionDecl *FD, 318 const CallExpr *E, llvm::Constant *calleeValue) { 319 CGCallee callee = CGCallee::forDirect(calleeValue, FD); 320 return CGF.EmitCall(E->getCallee()->getType(), callee, E, ReturnValueSlot()); 321 } 322 323 /// Emit a call to llvm.{sadd,uadd,ssub,usub,smul,umul}.with.overflow.* 324 /// depending on IntrinsicID. 325 /// 326 /// \arg CGF The current codegen function. 327 /// \arg IntrinsicID The ID for the Intrinsic we wish to generate. 328 /// \arg X The first argument to the llvm.*.with.overflow.*. 329 /// \arg Y The second argument to the llvm.*.with.overflow.*. 330 /// \arg Carry The carry returned by the llvm.*.with.overflow.*. 331 /// \returns The result (i.e. sum/product) returned by the intrinsic. 332 static llvm::Value *EmitOverflowIntrinsic(CodeGenFunction &CGF, 333 const llvm::Intrinsic::ID IntrinsicID, 334 llvm::Value *X, llvm::Value *Y, 335 llvm::Value *&Carry) { 336 // Make sure we have integers of the same width. 337 assert(X->getType() == Y->getType() && 338 "Arguments must be the same type. (Did you forget to make sure both " 339 "arguments have the same integer width?)"); 340 341 llvm::Value *Callee = CGF.CGM.getIntrinsic(IntrinsicID, X->getType()); 342 llvm::Value *Tmp = CGF.Builder.CreateCall(Callee, {X, Y}); 343 Carry = CGF.Builder.CreateExtractValue(Tmp, 1); 344 return CGF.Builder.CreateExtractValue(Tmp, 0); 345 } 346 347 static Value *emitRangedBuiltin(CodeGenFunction &CGF, 348 unsigned IntrinsicID, 349 int low, int high) { 350 llvm::MDBuilder MDHelper(CGF.getLLVMContext()); 351 llvm::MDNode *RNode = MDHelper.createRange(APInt(32, low), APInt(32, high)); 352 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, {}); 353 llvm::Instruction *Call = CGF.Builder.CreateCall(F); 354 Call->setMetadata(llvm::LLVMContext::MD_range, RNode); 355 return Call; 356 } 357 358 namespace { 359 struct WidthAndSignedness { 360 unsigned Width; 361 bool Signed; 362 }; 363 } 364 365 static WidthAndSignedness 366 getIntegerWidthAndSignedness(const clang::ASTContext &context, 367 const clang::QualType Type) { 368 assert(Type->isIntegerType() && "Given type is not an integer."); 369 unsigned Width = Type->isBooleanType() ? 1 : context.getTypeInfo(Type).Width; 370 bool Signed = Type->isSignedIntegerType(); 371 return {Width, Signed}; 372 } 373 374 // Given one or more integer types, this function produces an integer type that 375 // encompasses them: any value in one of the given types could be expressed in 376 // the encompassing type. 377 static struct WidthAndSignedness 378 EncompassingIntegerType(ArrayRef<struct WidthAndSignedness> Types) { 379 assert(Types.size() > 0 && "Empty list of types."); 380 381 // If any of the given types is signed, we must return a signed type. 382 bool Signed = false; 383 for (const auto &Type : Types) { 384 Signed |= Type.Signed; 385 } 386 387 // The encompassing type must have a width greater than or equal to the width 388 // of the specified types. Additionally, if the encompassing type is signed, 389 // its width must be strictly greater than the width of any unsigned types 390 // given. 391 unsigned Width = 0; 392 for (const auto &Type : Types) { 393 unsigned MinWidth = Type.Width + (Signed && !Type.Signed); 394 if (Width < MinWidth) { 395 Width = MinWidth; 396 } 397 } 398 399 return {Width, Signed}; 400 } 401 402 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) { 403 llvm::Type *DestType = Int8PtrTy; 404 if (ArgValue->getType() != DestType) 405 ArgValue = 406 Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data()); 407 408 Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend; 409 return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue); 410 } 411 412 /// Checks if using the result of __builtin_object_size(p, @p From) in place of 413 /// __builtin_object_size(p, @p To) is correct 414 static bool areBOSTypesCompatible(int From, int To) { 415 // Note: Our __builtin_object_size implementation currently treats Type=0 and 416 // Type=2 identically. Encoding this implementation detail here may make 417 // improving __builtin_object_size difficult in the future, so it's omitted. 418 return From == To || (From == 0 && To == 1) || (From == 3 && To == 2); 419 } 420 421 static llvm::Value * 422 getDefaultBuiltinObjectSizeResult(unsigned Type, llvm::IntegerType *ResType) { 423 return ConstantInt::get(ResType, (Type & 2) ? 0 : -1, /*isSigned=*/true); 424 } 425 426 llvm::Value * 427 CodeGenFunction::evaluateOrEmitBuiltinObjectSize(const Expr *E, unsigned Type, 428 llvm::IntegerType *ResType, 429 llvm::Value *EmittedE) { 430 uint64_t ObjectSize; 431 if (!E->tryEvaluateObjectSize(ObjectSize, getContext(), Type)) 432 return emitBuiltinObjectSize(E, Type, ResType, EmittedE); 433 return ConstantInt::get(ResType, ObjectSize, /*isSigned=*/true); 434 } 435 436 /// Returns a Value corresponding to the size of the given expression. 437 /// This Value may be either of the following: 438 /// - A llvm::Argument (if E is a param with the pass_object_size attribute on 439 /// it) 440 /// - A call to the @llvm.objectsize intrinsic 441 /// 442 /// EmittedE is the result of emitting `E` as a scalar expr. If it's non-null 443 /// and we wouldn't otherwise try to reference a pass_object_size parameter, 444 /// we'll call @llvm.objectsize on EmittedE, rather than emitting E. 445 llvm::Value * 446 CodeGenFunction::emitBuiltinObjectSize(const Expr *E, unsigned Type, 447 llvm::IntegerType *ResType, 448 llvm::Value *EmittedE) { 449 // We need to reference an argument if the pointer is a parameter with the 450 // pass_object_size attribute. 451 if (auto *D = dyn_cast<DeclRefExpr>(E->IgnoreParenImpCasts())) { 452 auto *Param = dyn_cast<ParmVarDecl>(D->getDecl()); 453 auto *PS = D->getDecl()->getAttr<PassObjectSizeAttr>(); 454 if (Param != nullptr && PS != nullptr && 455 areBOSTypesCompatible(PS->getType(), Type)) { 456 auto Iter = SizeArguments.find(Param); 457 assert(Iter != SizeArguments.end()); 458 459 const ImplicitParamDecl *D = Iter->second; 460 auto DIter = LocalDeclMap.find(D); 461 assert(DIter != LocalDeclMap.end()); 462 463 return EmitLoadOfScalar(DIter->second, /*volatile=*/false, 464 getContext().getSizeType(), E->getLocStart()); 465 } 466 } 467 468 // LLVM can't handle Type=3 appropriately, and __builtin_object_size shouldn't 469 // evaluate E for side-effects. In either case, we shouldn't lower to 470 // @llvm.objectsize. 471 if (Type == 3 || (!EmittedE && E->HasSideEffects(getContext()))) 472 return getDefaultBuiltinObjectSizeResult(Type, ResType); 473 474 Value *Ptr = EmittedE ? EmittedE : EmitScalarExpr(E); 475 assert(Ptr->getType()->isPointerTy() && 476 "Non-pointer passed to __builtin_object_size?"); 477 478 Value *F = CGM.getIntrinsic(Intrinsic::objectsize, {ResType, Ptr->getType()}); 479 480 // LLVM only supports 0 and 2, make sure that we pass along that as a boolean. 481 Value *Min = Builder.getInt1((Type & 2) != 0); 482 // For GCC compatibility, __builtin_object_size treat NULL as unknown size. 483 Value *NullIsUnknown = Builder.getTrue(); 484 return Builder.CreateCall(F, {Ptr, Min, NullIsUnknown}); 485 } 486 487 // Many of MSVC builtins are on both x64 and ARM; to avoid repeating code, we 488 // handle them here. 489 enum class CodeGenFunction::MSVCIntrin { 490 _BitScanForward, 491 _BitScanReverse, 492 _InterlockedAnd, 493 _InterlockedDecrement, 494 _InterlockedExchange, 495 _InterlockedExchangeAdd, 496 _InterlockedExchangeSub, 497 _InterlockedIncrement, 498 _InterlockedOr, 499 _InterlockedXor, 500 _interlockedbittestandset, 501 __fastfail, 502 }; 503 504 Value *CodeGenFunction::EmitMSVCBuiltinExpr(MSVCIntrin BuiltinID, 505 const CallExpr *E) { 506 switch (BuiltinID) { 507 case MSVCIntrin::_BitScanForward: 508 case MSVCIntrin::_BitScanReverse: { 509 Value *ArgValue = EmitScalarExpr(E->getArg(1)); 510 511 llvm::Type *ArgType = ArgValue->getType(); 512 llvm::Type *IndexType = 513 EmitScalarExpr(E->getArg(0))->getType()->getPointerElementType(); 514 llvm::Type *ResultType = ConvertType(E->getType()); 515 516 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 517 Value *ResZero = llvm::Constant::getNullValue(ResultType); 518 Value *ResOne = llvm::ConstantInt::get(ResultType, 1); 519 520 BasicBlock *Begin = Builder.GetInsertBlock(); 521 BasicBlock *End = createBasicBlock("bitscan_end", this->CurFn); 522 Builder.SetInsertPoint(End); 523 PHINode *Result = Builder.CreatePHI(ResultType, 2, "bitscan_result"); 524 525 Builder.SetInsertPoint(Begin); 526 Value *IsZero = Builder.CreateICmpEQ(ArgValue, ArgZero); 527 BasicBlock *NotZero = createBasicBlock("bitscan_not_zero", this->CurFn); 528 Builder.CreateCondBr(IsZero, End, NotZero); 529 Result->addIncoming(ResZero, Begin); 530 531 Builder.SetInsertPoint(NotZero); 532 Address IndexAddress = EmitPointerWithAlignment(E->getArg(0)); 533 534 if (BuiltinID == MSVCIntrin::_BitScanForward) { 535 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 536 Value *ZeroCount = Builder.CreateCall(F, {ArgValue, Builder.getTrue()}); 537 ZeroCount = Builder.CreateIntCast(ZeroCount, IndexType, false); 538 Builder.CreateStore(ZeroCount, IndexAddress, false); 539 } else { 540 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 541 Value *ArgTypeLastIndex = llvm::ConstantInt::get(IndexType, ArgWidth - 1); 542 543 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 544 Value *ZeroCount = Builder.CreateCall(F, {ArgValue, Builder.getTrue()}); 545 ZeroCount = Builder.CreateIntCast(ZeroCount, IndexType, false); 546 Value *Index = Builder.CreateNSWSub(ArgTypeLastIndex, ZeroCount); 547 Builder.CreateStore(Index, IndexAddress, false); 548 } 549 Builder.CreateBr(End); 550 Result->addIncoming(ResOne, NotZero); 551 552 Builder.SetInsertPoint(End); 553 return Result; 554 } 555 case MSVCIntrin::_InterlockedAnd: 556 return MakeBinaryAtomicValue(*this, AtomicRMWInst::And, E); 557 case MSVCIntrin::_InterlockedExchange: 558 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xchg, E); 559 case MSVCIntrin::_InterlockedExchangeAdd: 560 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Add, E); 561 case MSVCIntrin::_InterlockedExchangeSub: 562 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Sub, E); 563 case MSVCIntrin::_InterlockedOr: 564 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Or, E); 565 case MSVCIntrin::_InterlockedXor: 566 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xor, E); 567 568 case MSVCIntrin::_interlockedbittestandset: { 569 llvm::Value *Addr = EmitScalarExpr(E->getArg(0)); 570 llvm::Value *Bit = EmitScalarExpr(E->getArg(1)); 571 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 572 AtomicRMWInst::Or, Addr, 573 Builder.CreateShl(ConstantInt::get(Bit->getType(), 1), Bit), 574 llvm::AtomicOrdering::SequentiallyConsistent); 575 // Shift the relevant bit to the least significant position, truncate to 576 // the result type, and test the low bit. 577 llvm::Value *Shifted = Builder.CreateLShr(RMWI, Bit); 578 llvm::Value *Truncated = 579 Builder.CreateTrunc(Shifted, ConvertType(E->getType())); 580 return Builder.CreateAnd(Truncated, 581 ConstantInt::get(Truncated->getType(), 1)); 582 } 583 584 case MSVCIntrin::_InterlockedDecrement: { 585 llvm::Type *IntTy = ConvertType(E->getType()); 586 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 587 AtomicRMWInst::Sub, 588 EmitScalarExpr(E->getArg(0)), 589 ConstantInt::get(IntTy, 1), 590 llvm::AtomicOrdering::SequentiallyConsistent); 591 return Builder.CreateSub(RMWI, ConstantInt::get(IntTy, 1)); 592 } 593 case MSVCIntrin::_InterlockedIncrement: { 594 llvm::Type *IntTy = ConvertType(E->getType()); 595 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 596 AtomicRMWInst::Add, 597 EmitScalarExpr(E->getArg(0)), 598 ConstantInt::get(IntTy, 1), 599 llvm::AtomicOrdering::SequentiallyConsistent); 600 return Builder.CreateAdd(RMWI, ConstantInt::get(IntTy, 1)); 601 } 602 603 case MSVCIntrin::__fastfail: { 604 // Request immediate process termination from the kernel. The instruction 605 // sequences to do this are documented on MSDN: 606 // https://msdn.microsoft.com/en-us/library/dn774154.aspx 607 llvm::Triple::ArchType ISA = getTarget().getTriple().getArch(); 608 StringRef Asm, Constraints; 609 switch (ISA) { 610 default: 611 ErrorUnsupported(E, "__fastfail call for this architecture"); 612 break; 613 case llvm::Triple::x86: 614 case llvm::Triple::x86_64: 615 Asm = "int $$0x29"; 616 Constraints = "{cx}"; 617 break; 618 case llvm::Triple::thumb: 619 Asm = "udf #251"; 620 Constraints = "{r0}"; 621 break; 622 } 623 llvm::FunctionType *FTy = llvm::FunctionType::get(VoidTy, {Int32Ty}, false); 624 llvm::InlineAsm *IA = 625 llvm::InlineAsm::get(FTy, Asm, Constraints, /*SideEffects=*/true); 626 llvm::AttributeList NoReturnAttr = llvm::AttributeList::get( 627 getLLVMContext(), llvm::AttributeList::FunctionIndex, 628 llvm::Attribute::NoReturn); 629 CallSite CS = Builder.CreateCall(IA, EmitScalarExpr(E->getArg(0))); 630 CS.setAttributes(NoReturnAttr); 631 return CS.getInstruction(); 632 } 633 } 634 llvm_unreachable("Incorrect MSVC intrinsic!"); 635 } 636 637 namespace { 638 // ARC cleanup for __builtin_os_log_format 639 struct CallObjCArcUse final : EHScopeStack::Cleanup { 640 CallObjCArcUse(llvm::Value *object) : object(object) {} 641 llvm::Value *object; 642 643 void Emit(CodeGenFunction &CGF, Flags flags) override { 644 CGF.EmitARCIntrinsicUse(object); 645 } 646 }; 647 } 648 649 Value *CodeGenFunction::EmitCheckedArgForBuiltin(const Expr *E, 650 BuiltinCheckKind Kind) { 651 assert((Kind == BCK_CLZPassedZero || Kind == BCK_CTZPassedZero) 652 && "Unsupported builtin check kind"); 653 654 Value *ArgValue = EmitScalarExpr(E); 655 if (!SanOpts.has(SanitizerKind::Builtin) || !getTarget().isCLZForZeroUndef()) 656 return ArgValue; 657 658 SanitizerScope SanScope(this); 659 Value *Cond = Builder.CreateICmpNE( 660 ArgValue, llvm::Constant::getNullValue(ArgValue->getType())); 661 EmitCheck(std::make_pair(Cond, SanitizerKind::Builtin), 662 SanitizerHandler::InvalidBuiltin, 663 {EmitCheckSourceLocation(E->getExprLoc()), 664 llvm::ConstantInt::get(Builder.getInt8Ty(), Kind)}, 665 None); 666 return ArgValue; 667 } 668 669 /// Get the argument type for arguments to os_log_helper. 670 static CanQualType getOSLogArgType(ASTContext &C, int Size) { 671 QualType UnsignedTy = C.getIntTypeForBitwidth(Size * 8, /*Signed=*/false); 672 return C.getCanonicalType(UnsignedTy); 673 } 674 675 llvm::Function *CodeGenFunction::generateBuiltinOSLogHelperFunction( 676 const analyze_os_log::OSLogBufferLayout &Layout, 677 CharUnits BufferAlignment) { 678 ASTContext &Ctx = getContext(); 679 680 llvm::SmallString<64> Name; 681 { 682 raw_svector_ostream OS(Name); 683 OS << "__os_log_helper"; 684 OS << "_" << BufferAlignment.getQuantity(); 685 OS << "_" << int(Layout.getSummaryByte()); 686 OS << "_" << int(Layout.getNumArgsByte()); 687 for (const auto &Item : Layout.Items) 688 OS << "_" << int(Item.getSizeByte()) << "_" 689 << int(Item.getDescriptorByte()); 690 } 691 692 if (llvm::Function *F = CGM.getModule().getFunction(Name)) 693 return F; 694 695 llvm::SmallVector<ImplicitParamDecl, 4> Params; 696 Params.emplace_back(Ctx, nullptr, SourceLocation(), &Ctx.Idents.get("buffer"), 697 Ctx.VoidPtrTy, ImplicitParamDecl::Other); 698 699 for (unsigned int I = 0, E = Layout.Items.size(); I < E; ++I) { 700 char Size = Layout.Items[I].getSizeByte(); 701 if (!Size) 702 continue; 703 704 Params.emplace_back( 705 Ctx, nullptr, SourceLocation(), 706 &Ctx.Idents.get(std::string("arg") + llvm::to_string(I)), 707 getOSLogArgType(Ctx, Size), ImplicitParamDecl::Other); 708 } 709 710 FunctionArgList Args; 711 for (auto &P : Params) 712 Args.push_back(&P); 713 714 // The helper function has linkonce_odr linkage to enable the linker to merge 715 // identical functions. To ensure the merging always happens, 'noinline' is 716 // attached to the function when compiling with -Oz. 717 const CGFunctionInfo &FI = 718 CGM.getTypes().arrangeBuiltinFunctionDeclaration(Ctx.VoidTy, Args); 719 llvm::FunctionType *FuncTy = CGM.getTypes().GetFunctionType(FI); 720 llvm::Function *Fn = llvm::Function::Create( 721 FuncTy, llvm::GlobalValue::LinkOnceODRLinkage, Name, &CGM.getModule()); 722 Fn->setVisibility(llvm::GlobalValue::HiddenVisibility); 723 CGM.SetLLVMFunctionAttributes(nullptr, FI, Fn); 724 CGM.SetLLVMFunctionAttributesForDefinition(nullptr, Fn); 725 726 // Attach 'noinline' at -Oz. 727 if (CGM.getCodeGenOpts().OptimizeSize == 2) 728 Fn->addFnAttr(llvm::Attribute::NoInline); 729 730 auto NL = ApplyDebugLocation::CreateEmpty(*this); 731 IdentifierInfo *II = &Ctx.Idents.get(Name); 732 FunctionDecl *FD = FunctionDecl::Create( 733 Ctx, Ctx.getTranslationUnitDecl(), SourceLocation(), SourceLocation(), II, 734 Ctx.VoidTy, nullptr, SC_PrivateExtern, false, false); 735 736 StartFunction(FD, Ctx.VoidTy, Fn, FI, Args); 737 738 // Create a scope with an artificial location for the body of this function. 739 auto AL = ApplyDebugLocation::CreateArtificial(*this); 740 741 CharUnits Offset; 742 Address BufAddr(Builder.CreateLoad(GetAddrOfLocalVar(&Params[0]), "buf"), 743 BufferAlignment); 744 Builder.CreateStore(Builder.getInt8(Layout.getSummaryByte()), 745 Builder.CreateConstByteGEP(BufAddr, Offset++, "summary")); 746 Builder.CreateStore(Builder.getInt8(Layout.getNumArgsByte()), 747 Builder.CreateConstByteGEP(BufAddr, Offset++, "numArgs")); 748 749 unsigned I = 1; 750 for (const auto &Item : Layout.Items) { 751 Builder.CreateStore( 752 Builder.getInt8(Item.getDescriptorByte()), 753 Builder.CreateConstByteGEP(BufAddr, Offset++, "argDescriptor")); 754 Builder.CreateStore( 755 Builder.getInt8(Item.getSizeByte()), 756 Builder.CreateConstByteGEP(BufAddr, Offset++, "argSize")); 757 758 CharUnits Size = Item.size(); 759 if (!Size.getQuantity()) 760 continue; 761 762 Address Arg = GetAddrOfLocalVar(&Params[I]); 763 Address Addr = Builder.CreateConstByteGEP(BufAddr, Offset, "argData"); 764 Addr = Builder.CreateBitCast(Addr, Arg.getPointer()->getType(), 765 "argDataCast"); 766 Builder.CreateStore(Builder.CreateLoad(Arg), Addr); 767 Offset += Size; 768 ++I; 769 } 770 771 FinishFunction(); 772 773 return Fn; 774 } 775 776 RValue CodeGenFunction::emitBuiltinOSLogFormat(const CallExpr &E) { 777 assert(E.getNumArgs() >= 2 && 778 "__builtin_os_log_format takes at least 2 arguments"); 779 ASTContext &Ctx = getContext(); 780 analyze_os_log::OSLogBufferLayout Layout; 781 analyze_os_log::computeOSLogBufferLayout(Ctx, &E, Layout); 782 Address BufAddr = EmitPointerWithAlignment(E.getArg(0)); 783 llvm::SmallVector<llvm::Value *, 4> RetainableOperands; 784 785 // Ignore argument 1, the format string. It is not currently used. 786 CallArgList Args; 787 Args.add(RValue::get(BufAddr.getPointer()), Ctx.VoidPtrTy); 788 789 for (const auto &Item : Layout.Items) { 790 int Size = Item.getSizeByte(); 791 if (!Size) 792 continue; 793 794 llvm::Value *ArgVal; 795 796 if (const Expr *TheExpr = Item.getExpr()) { 797 ArgVal = EmitScalarExpr(TheExpr, /*Ignore*/ false); 798 799 // Check if this is a retainable type. 800 if (TheExpr->getType()->isObjCRetainableType()) { 801 assert(getEvaluationKind(TheExpr->getType()) == TEK_Scalar && 802 "Only scalar can be a ObjC retainable type"); 803 // Check if the object is constant, if not, save it in 804 // RetainableOperands. 805 if (!isa<Constant>(ArgVal)) 806 RetainableOperands.push_back(ArgVal); 807 } 808 } else { 809 ArgVal = Builder.getInt32(Item.getConstValue().getQuantity()); 810 } 811 812 unsigned ArgValSize = 813 CGM.getDataLayout().getTypeSizeInBits(ArgVal->getType()); 814 llvm::IntegerType *IntTy = llvm::Type::getIntNTy(getLLVMContext(), 815 ArgValSize); 816 ArgVal = Builder.CreateBitOrPointerCast(ArgVal, IntTy); 817 CanQualType ArgTy = getOSLogArgType(Ctx, Size); 818 // If ArgVal has type x86_fp80, zero-extend ArgVal. 819 ArgVal = Builder.CreateZExtOrBitCast(ArgVal, ConvertType(ArgTy)); 820 Args.add(RValue::get(ArgVal), ArgTy); 821 } 822 823 const CGFunctionInfo &FI = 824 CGM.getTypes().arrangeBuiltinFunctionCall(Ctx.VoidTy, Args); 825 llvm::Function *F = CodeGenFunction(CGM).generateBuiltinOSLogHelperFunction( 826 Layout, BufAddr.getAlignment()); 827 EmitCall(FI, CGCallee::forDirect(F), ReturnValueSlot(), Args); 828 829 // Push a clang.arc.use cleanup for each object in RetainableOperands. The 830 // cleanup will cause the use to appear after the final log call, keeping 831 // the object valid while it’s held in the log buffer. Note that if there’s 832 // a release cleanup on the object, it will already be active; since 833 // cleanups are emitted in reverse order, the use will occur before the 834 // object is released. 835 if (!RetainableOperands.empty() && getLangOpts().ObjCAutoRefCount && 836 CGM.getCodeGenOpts().OptimizationLevel != 0) 837 for (llvm::Value *Object : RetainableOperands) 838 pushFullExprCleanup<CallObjCArcUse>(getARCCleanupKind(), Object); 839 840 return RValue::get(BufAddr.getPointer()); 841 } 842 843 /// Determine if a binop is a checked mixed-sign multiply we can specialize. 844 static bool isSpecialMixedSignMultiply(unsigned BuiltinID, 845 WidthAndSignedness Op1Info, 846 WidthAndSignedness Op2Info, 847 WidthAndSignedness ResultInfo) { 848 return BuiltinID == Builtin::BI__builtin_mul_overflow && 849 Op1Info.Width == Op2Info.Width && Op1Info.Width >= ResultInfo.Width && 850 Op1Info.Signed != Op2Info.Signed; 851 } 852 853 /// Emit a checked mixed-sign multiply. This is a cheaper specialization of 854 /// the generic checked-binop irgen. 855 static RValue 856 EmitCheckedMixedSignMultiply(CodeGenFunction &CGF, const clang::Expr *Op1, 857 WidthAndSignedness Op1Info, const clang::Expr *Op2, 858 WidthAndSignedness Op2Info, 859 const clang::Expr *ResultArg, QualType ResultQTy, 860 WidthAndSignedness ResultInfo) { 861 assert(isSpecialMixedSignMultiply(Builtin::BI__builtin_mul_overflow, Op1Info, 862 Op2Info, ResultInfo) && 863 "Not a mixed-sign multipliction we can specialize"); 864 865 // Emit the signed and unsigned operands. 866 const clang::Expr *SignedOp = Op1Info.Signed ? Op1 : Op2; 867 const clang::Expr *UnsignedOp = Op1Info.Signed ? Op2 : Op1; 868 llvm::Value *Signed = CGF.EmitScalarExpr(SignedOp); 869 llvm::Value *Unsigned = CGF.EmitScalarExpr(UnsignedOp); 870 871 llvm::Type *OpTy = Signed->getType(); 872 llvm::Value *Zero = llvm::Constant::getNullValue(OpTy); 873 Address ResultPtr = CGF.EmitPointerWithAlignment(ResultArg); 874 llvm::Type *ResTy = ResultPtr.getElementType(); 875 876 // Take the absolute value of the signed operand. 877 llvm::Value *IsNegative = CGF.Builder.CreateICmpSLT(Signed, Zero); 878 llvm::Value *AbsOfNegative = CGF.Builder.CreateSub(Zero, Signed); 879 llvm::Value *AbsSigned = 880 CGF.Builder.CreateSelect(IsNegative, AbsOfNegative, Signed); 881 882 // Perform a checked unsigned multiplication. 883 llvm::Value *UnsignedOverflow; 884 llvm::Value *UnsignedResult = 885 EmitOverflowIntrinsic(CGF, llvm::Intrinsic::umul_with_overflow, AbsSigned, 886 Unsigned, UnsignedOverflow); 887 888 llvm::Value *Overflow, *Result; 889 if (ResultInfo.Signed) { 890 // Signed overflow occurs if the result is greater than INT_MAX or lesser 891 // than INT_MIN, i.e when |Result| > (INT_MAX + IsNegative). 892 auto IntMax = llvm::APInt::getSignedMaxValue(ResultInfo.Width) 893 .zextOrSelf(Op1Info.Width); 894 llvm::Value *MaxResult = 895 CGF.Builder.CreateAdd(llvm::ConstantInt::get(OpTy, IntMax), 896 CGF.Builder.CreateZExt(IsNegative, OpTy)); 897 llvm::Value *SignedOverflow = 898 CGF.Builder.CreateICmpUGT(UnsignedResult, MaxResult); 899 Overflow = CGF.Builder.CreateOr(UnsignedOverflow, SignedOverflow); 900 901 // Prepare the signed result (possibly by negating it). 902 llvm::Value *NegativeResult = CGF.Builder.CreateNeg(UnsignedResult); 903 llvm::Value *SignedResult = 904 CGF.Builder.CreateSelect(IsNegative, NegativeResult, UnsignedResult); 905 Result = CGF.Builder.CreateTrunc(SignedResult, ResTy); 906 } else { 907 // Unsigned overflow occurs if the result is < 0 or greater than UINT_MAX. 908 llvm::Value *Underflow = CGF.Builder.CreateAnd( 909 IsNegative, CGF.Builder.CreateIsNotNull(UnsignedResult)); 910 Overflow = CGF.Builder.CreateOr(UnsignedOverflow, Underflow); 911 if (ResultInfo.Width < Op1Info.Width) { 912 auto IntMax = 913 llvm::APInt::getMaxValue(ResultInfo.Width).zext(Op1Info.Width); 914 llvm::Value *TruncOverflow = CGF.Builder.CreateICmpUGT( 915 UnsignedResult, llvm::ConstantInt::get(OpTy, IntMax)); 916 Overflow = CGF.Builder.CreateOr(Overflow, TruncOverflow); 917 } 918 919 // Negate the product if it would be negative in infinite precision. 920 Result = CGF.Builder.CreateSelect( 921 IsNegative, CGF.Builder.CreateNeg(UnsignedResult), UnsignedResult); 922 923 Result = CGF.Builder.CreateTrunc(Result, ResTy); 924 } 925 assert(Overflow && Result && "Missing overflow or result"); 926 927 bool isVolatile = 928 ResultArg->getType()->getPointeeType().isVolatileQualified(); 929 CGF.Builder.CreateStore(CGF.EmitToMemory(Result, ResultQTy), ResultPtr, 930 isVolatile); 931 return RValue::get(Overflow); 932 } 933 934 static llvm::Value *dumpRecord(CodeGenFunction &CGF, QualType RType, 935 Value *&RecordPtr, CharUnits Align, Value *Func, 936 int Lvl) { 937 const auto *RT = RType->getAs<RecordType>(); 938 ASTContext &Context = CGF.getContext(); 939 RecordDecl *RD = RT->getDecl()->getDefinition(); 940 ASTContext &Ctx = RD->getASTContext(); 941 const ASTRecordLayout &RL = Ctx.getASTRecordLayout(RD); 942 std::string Pad = std::string(Lvl * 4, ' '); 943 944 Value *GString = 945 CGF.Builder.CreateGlobalStringPtr(RType.getAsString() + " {\n"); 946 Value *Res = CGF.Builder.CreateCall(Func, {GString}); 947 948 static llvm::DenseMap<QualType, const char *> Types; 949 if (Types.empty()) { 950 Types[Context.CharTy] = "%c"; 951 Types[Context.BoolTy] = "%d"; 952 Types[Context.SignedCharTy] = "%hhd"; 953 Types[Context.UnsignedCharTy] = "%hhu"; 954 Types[Context.IntTy] = "%d"; 955 Types[Context.UnsignedIntTy] = "%u"; 956 Types[Context.LongTy] = "%ld"; 957 Types[Context.UnsignedLongTy] = "%lu"; 958 Types[Context.LongLongTy] = "%lld"; 959 Types[Context.UnsignedLongLongTy] = "%llu"; 960 Types[Context.ShortTy] = "%hd"; 961 Types[Context.UnsignedShortTy] = "%hu"; 962 Types[Context.VoidPtrTy] = "%p"; 963 Types[Context.FloatTy] = "%f"; 964 Types[Context.DoubleTy] = "%f"; 965 Types[Context.LongDoubleTy] = "%Lf"; 966 Types[Context.getPointerType(Context.CharTy)] = "%s"; 967 Types[Context.getPointerType(Context.getConstType(Context.CharTy))] = "%s"; 968 } 969 970 for (const auto *FD : RD->fields()) { 971 uint64_t Off = RL.getFieldOffset(FD->getFieldIndex()); 972 Off = Ctx.toCharUnitsFromBits(Off).getQuantity(); 973 974 Value *FieldPtr = RecordPtr; 975 if (RD->isUnion()) 976 FieldPtr = CGF.Builder.CreatePointerCast( 977 FieldPtr, CGF.ConvertType(Context.getPointerType(FD->getType()))); 978 else 979 FieldPtr = CGF.Builder.CreateStructGEP(CGF.ConvertType(RType), FieldPtr, 980 FD->getFieldIndex()); 981 982 GString = CGF.Builder.CreateGlobalStringPtr( 983 llvm::Twine(Pad) 984 .concat(FD->getType().getAsString()) 985 .concat(llvm::Twine(' ')) 986 .concat(FD->getNameAsString()) 987 .concat(" : ") 988 .str()); 989 Value *TmpRes = CGF.Builder.CreateCall(Func, {GString}); 990 Res = CGF.Builder.CreateAdd(Res, TmpRes); 991 992 QualType CanonicalType = 993 FD->getType().getUnqualifiedType().getCanonicalType(); 994 995 // We check whether we are in a recursive type 996 if (CanonicalType->isRecordType()) { 997 Value *TmpRes = 998 dumpRecord(CGF, CanonicalType, FieldPtr, Align, Func, Lvl + 1); 999 Res = CGF.Builder.CreateAdd(TmpRes, Res); 1000 continue; 1001 } 1002 1003 // We try to determine the best format to print the current field 1004 llvm::Twine Format = Types.find(CanonicalType) == Types.end() 1005 ? Types[Context.VoidPtrTy] 1006 : Types[CanonicalType]; 1007 1008 Address FieldAddress = Address(FieldPtr, Align); 1009 FieldPtr = CGF.Builder.CreateLoad(FieldAddress); 1010 1011 // FIXME Need to handle bitfield here 1012 GString = CGF.Builder.CreateGlobalStringPtr( 1013 Format.concat(llvm::Twine('\n')).str()); 1014 TmpRes = CGF.Builder.CreateCall(Func, {GString, FieldPtr}); 1015 Res = CGF.Builder.CreateAdd(Res, TmpRes); 1016 } 1017 1018 GString = CGF.Builder.CreateGlobalStringPtr(Pad + "}\n"); 1019 Value *TmpRes = CGF.Builder.CreateCall(Func, {GString}); 1020 Res = CGF.Builder.CreateAdd(Res, TmpRes); 1021 return Res; 1022 } 1023 1024 RValue CodeGenFunction::EmitBuiltinExpr(const FunctionDecl *FD, 1025 unsigned BuiltinID, const CallExpr *E, 1026 ReturnValueSlot ReturnValue) { 1027 // See if we can constant fold this builtin. If so, don't emit it at all. 1028 Expr::EvalResult Result; 1029 if (E->EvaluateAsRValue(Result, CGM.getContext()) && 1030 !Result.hasSideEffects()) { 1031 if (Result.Val.isInt()) 1032 return RValue::get(llvm::ConstantInt::get(getLLVMContext(), 1033 Result.Val.getInt())); 1034 if (Result.Val.isFloat()) 1035 return RValue::get(llvm::ConstantFP::get(getLLVMContext(), 1036 Result.Val.getFloat())); 1037 } 1038 1039 // There are LLVM math intrinsics/instructions corresponding to math library 1040 // functions except the LLVM op will never set errno while the math library 1041 // might. Also, math builtins have the same semantics as their math library 1042 // twins. Thus, we can transform math library and builtin calls to their 1043 // LLVM counterparts if the call is marked 'const' (known to never set errno). 1044 if (FD->hasAttr<ConstAttr>()) { 1045 switch (BuiltinID) { 1046 case Builtin::BIceil: 1047 case Builtin::BIceilf: 1048 case Builtin::BIceill: 1049 case Builtin::BI__builtin_ceil: 1050 case Builtin::BI__builtin_ceilf: 1051 case Builtin::BI__builtin_ceill: 1052 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::ceil)); 1053 1054 case Builtin::BIcopysign: 1055 case Builtin::BIcopysignf: 1056 case Builtin::BIcopysignl: 1057 case Builtin::BI__builtin_copysign: 1058 case Builtin::BI__builtin_copysignf: 1059 case Builtin::BI__builtin_copysignl: 1060 case Builtin::BI__builtin_copysignf128: 1061 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::copysign)); 1062 1063 case Builtin::BIcos: 1064 case Builtin::BIcosf: 1065 case Builtin::BIcosl: 1066 case Builtin::BI__builtin_cos: 1067 case Builtin::BI__builtin_cosf: 1068 case Builtin::BI__builtin_cosl: 1069 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::cos)); 1070 1071 case Builtin::BIexp: 1072 case Builtin::BIexpf: 1073 case Builtin::BIexpl: 1074 case Builtin::BI__builtin_exp: 1075 case Builtin::BI__builtin_expf: 1076 case Builtin::BI__builtin_expl: 1077 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::exp)); 1078 1079 case Builtin::BIexp2: 1080 case Builtin::BIexp2f: 1081 case Builtin::BIexp2l: 1082 case Builtin::BI__builtin_exp2: 1083 case Builtin::BI__builtin_exp2f: 1084 case Builtin::BI__builtin_exp2l: 1085 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::exp2)); 1086 1087 case Builtin::BIfabs: 1088 case Builtin::BIfabsf: 1089 case Builtin::BIfabsl: 1090 case Builtin::BI__builtin_fabs: 1091 case Builtin::BI__builtin_fabsf: 1092 case Builtin::BI__builtin_fabsl: 1093 case Builtin::BI__builtin_fabsf128: 1094 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::fabs)); 1095 1096 case Builtin::BIfloor: 1097 case Builtin::BIfloorf: 1098 case Builtin::BIfloorl: 1099 case Builtin::BI__builtin_floor: 1100 case Builtin::BI__builtin_floorf: 1101 case Builtin::BI__builtin_floorl: 1102 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::floor)); 1103 1104 case Builtin::BIfma: 1105 case Builtin::BIfmaf: 1106 case Builtin::BIfmal: 1107 case Builtin::BI__builtin_fma: 1108 case Builtin::BI__builtin_fmaf: 1109 case Builtin::BI__builtin_fmal: 1110 return RValue::get(emitTernaryBuiltin(*this, E, Intrinsic::fma)); 1111 1112 case Builtin::BIfmax: 1113 case Builtin::BIfmaxf: 1114 case Builtin::BIfmaxl: 1115 case Builtin::BI__builtin_fmax: 1116 case Builtin::BI__builtin_fmaxf: 1117 case Builtin::BI__builtin_fmaxl: 1118 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::maxnum)); 1119 1120 case Builtin::BIfmin: 1121 case Builtin::BIfminf: 1122 case Builtin::BIfminl: 1123 case Builtin::BI__builtin_fmin: 1124 case Builtin::BI__builtin_fminf: 1125 case Builtin::BI__builtin_fminl: 1126 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::minnum)); 1127 1128 // fmod() is a special-case. It maps to the frem instruction rather than an 1129 // LLVM intrinsic. 1130 case Builtin::BIfmod: 1131 case Builtin::BIfmodf: 1132 case Builtin::BIfmodl: 1133 case Builtin::BI__builtin_fmod: 1134 case Builtin::BI__builtin_fmodf: 1135 case Builtin::BI__builtin_fmodl: { 1136 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 1137 Value *Arg2 = EmitScalarExpr(E->getArg(1)); 1138 return RValue::get(Builder.CreateFRem(Arg1, Arg2, "fmod")); 1139 } 1140 1141 case Builtin::BIlog: 1142 case Builtin::BIlogf: 1143 case Builtin::BIlogl: 1144 case Builtin::BI__builtin_log: 1145 case Builtin::BI__builtin_logf: 1146 case Builtin::BI__builtin_logl: 1147 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::log)); 1148 1149 case Builtin::BIlog10: 1150 case Builtin::BIlog10f: 1151 case Builtin::BIlog10l: 1152 case Builtin::BI__builtin_log10: 1153 case Builtin::BI__builtin_log10f: 1154 case Builtin::BI__builtin_log10l: 1155 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::log10)); 1156 1157 case Builtin::BIlog2: 1158 case Builtin::BIlog2f: 1159 case Builtin::BIlog2l: 1160 case Builtin::BI__builtin_log2: 1161 case Builtin::BI__builtin_log2f: 1162 case Builtin::BI__builtin_log2l: 1163 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::log2)); 1164 1165 case Builtin::BInearbyint: 1166 case Builtin::BInearbyintf: 1167 case Builtin::BInearbyintl: 1168 case Builtin::BI__builtin_nearbyint: 1169 case Builtin::BI__builtin_nearbyintf: 1170 case Builtin::BI__builtin_nearbyintl: 1171 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::nearbyint)); 1172 1173 case Builtin::BIpow: 1174 case Builtin::BIpowf: 1175 case Builtin::BIpowl: 1176 case Builtin::BI__builtin_pow: 1177 case Builtin::BI__builtin_powf: 1178 case Builtin::BI__builtin_powl: 1179 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::pow)); 1180 1181 case Builtin::BIrint: 1182 case Builtin::BIrintf: 1183 case Builtin::BIrintl: 1184 case Builtin::BI__builtin_rint: 1185 case Builtin::BI__builtin_rintf: 1186 case Builtin::BI__builtin_rintl: 1187 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::rint)); 1188 1189 case Builtin::BIround: 1190 case Builtin::BIroundf: 1191 case Builtin::BIroundl: 1192 case Builtin::BI__builtin_round: 1193 case Builtin::BI__builtin_roundf: 1194 case Builtin::BI__builtin_roundl: 1195 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::round)); 1196 1197 case Builtin::BIsin: 1198 case Builtin::BIsinf: 1199 case Builtin::BIsinl: 1200 case Builtin::BI__builtin_sin: 1201 case Builtin::BI__builtin_sinf: 1202 case Builtin::BI__builtin_sinl: 1203 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::sin)); 1204 1205 case Builtin::BIsqrt: 1206 case Builtin::BIsqrtf: 1207 case Builtin::BIsqrtl: 1208 case Builtin::BI__builtin_sqrt: 1209 case Builtin::BI__builtin_sqrtf: 1210 case Builtin::BI__builtin_sqrtl: 1211 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::sqrt)); 1212 1213 case Builtin::BItrunc: 1214 case Builtin::BItruncf: 1215 case Builtin::BItruncl: 1216 case Builtin::BI__builtin_trunc: 1217 case Builtin::BI__builtin_truncf: 1218 case Builtin::BI__builtin_truncl: 1219 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::trunc)); 1220 1221 default: 1222 break; 1223 } 1224 } 1225 1226 switch (BuiltinID) { 1227 default: break; 1228 case Builtin::BI__builtin___CFStringMakeConstantString: 1229 case Builtin::BI__builtin___NSStringMakeConstantString: 1230 return RValue::get(ConstantEmitter(*this).emitAbstract(E, E->getType())); 1231 case Builtin::BI__builtin_stdarg_start: 1232 case Builtin::BI__builtin_va_start: 1233 case Builtin::BI__va_start: 1234 case Builtin::BI__builtin_va_end: 1235 return RValue::get( 1236 EmitVAStartEnd(BuiltinID == Builtin::BI__va_start 1237 ? EmitScalarExpr(E->getArg(0)) 1238 : EmitVAListRef(E->getArg(0)).getPointer(), 1239 BuiltinID != Builtin::BI__builtin_va_end)); 1240 case Builtin::BI__builtin_va_copy: { 1241 Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer(); 1242 Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer(); 1243 1244 llvm::Type *Type = Int8PtrTy; 1245 1246 DstPtr = Builder.CreateBitCast(DstPtr, Type); 1247 SrcPtr = Builder.CreateBitCast(SrcPtr, Type); 1248 return RValue::get(Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), 1249 {DstPtr, SrcPtr})); 1250 } 1251 case Builtin::BI__builtin_abs: 1252 case Builtin::BI__builtin_labs: 1253 case Builtin::BI__builtin_llabs: { 1254 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1255 1256 Value *NegOp = Builder.CreateNeg(ArgValue, "neg"); 1257 Value *CmpResult = 1258 Builder.CreateICmpSGE(ArgValue, 1259 llvm::Constant::getNullValue(ArgValue->getType()), 1260 "abscond"); 1261 Value *Result = 1262 Builder.CreateSelect(CmpResult, ArgValue, NegOp, "abs"); 1263 1264 return RValue::get(Result); 1265 } 1266 case Builtin::BI__builtin_conj: 1267 case Builtin::BI__builtin_conjf: 1268 case Builtin::BI__builtin_conjl: { 1269 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 1270 Value *Real = ComplexVal.first; 1271 Value *Imag = ComplexVal.second; 1272 Value *Zero = 1273 Imag->getType()->isFPOrFPVectorTy() 1274 ? llvm::ConstantFP::getZeroValueForNegation(Imag->getType()) 1275 : llvm::Constant::getNullValue(Imag->getType()); 1276 1277 Imag = Builder.CreateFSub(Zero, Imag, "sub"); 1278 return RValue::getComplex(std::make_pair(Real, Imag)); 1279 } 1280 case Builtin::BI__builtin_creal: 1281 case Builtin::BI__builtin_crealf: 1282 case Builtin::BI__builtin_creall: 1283 case Builtin::BIcreal: 1284 case Builtin::BIcrealf: 1285 case Builtin::BIcreall: { 1286 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 1287 return RValue::get(ComplexVal.first); 1288 } 1289 1290 case Builtin::BI__builtin_dump_struct: { 1291 Value *Func = EmitScalarExpr(E->getArg(1)->IgnoreImpCasts()); 1292 CharUnits Arg0Align = EmitPointerWithAlignment(E->getArg(0)).getAlignment(); 1293 1294 const Expr *Arg0 = E->getArg(0)->IgnoreImpCasts(); 1295 QualType Arg0Type = Arg0->getType()->getPointeeType(); 1296 1297 Value *RecordPtr = EmitScalarExpr(Arg0); 1298 Value *Res = dumpRecord(*this, Arg0Type, RecordPtr, Arg0Align, Func, 0); 1299 return RValue::get(Res); 1300 } 1301 1302 case Builtin::BI__builtin_cimag: 1303 case Builtin::BI__builtin_cimagf: 1304 case Builtin::BI__builtin_cimagl: 1305 case Builtin::BIcimag: 1306 case Builtin::BIcimagf: 1307 case Builtin::BIcimagl: { 1308 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 1309 return RValue::get(ComplexVal.second); 1310 } 1311 1312 case Builtin::BI__builtin_ctzs: 1313 case Builtin::BI__builtin_ctz: 1314 case Builtin::BI__builtin_ctzl: 1315 case Builtin::BI__builtin_ctzll: { 1316 Value *ArgValue = EmitCheckedArgForBuiltin(E->getArg(0), BCK_CTZPassedZero); 1317 1318 llvm::Type *ArgType = ArgValue->getType(); 1319 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 1320 1321 llvm::Type *ResultType = ConvertType(E->getType()); 1322 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 1323 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 1324 if (Result->getType() != ResultType) 1325 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1326 "cast"); 1327 return RValue::get(Result); 1328 } 1329 case Builtin::BI__builtin_clzs: 1330 case Builtin::BI__builtin_clz: 1331 case Builtin::BI__builtin_clzl: 1332 case Builtin::BI__builtin_clzll: { 1333 Value *ArgValue = EmitCheckedArgForBuiltin(E->getArg(0), BCK_CLZPassedZero); 1334 1335 llvm::Type *ArgType = ArgValue->getType(); 1336 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 1337 1338 llvm::Type *ResultType = ConvertType(E->getType()); 1339 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 1340 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 1341 if (Result->getType() != ResultType) 1342 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1343 "cast"); 1344 return RValue::get(Result); 1345 } 1346 case Builtin::BI__builtin_ffs: 1347 case Builtin::BI__builtin_ffsl: 1348 case Builtin::BI__builtin_ffsll: { 1349 // ffs(x) -> x ? cttz(x) + 1 : 0 1350 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1351 1352 llvm::Type *ArgType = ArgValue->getType(); 1353 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 1354 1355 llvm::Type *ResultType = ConvertType(E->getType()); 1356 Value *Tmp = 1357 Builder.CreateAdd(Builder.CreateCall(F, {ArgValue, Builder.getTrue()}), 1358 llvm::ConstantInt::get(ArgType, 1)); 1359 Value *Zero = llvm::Constant::getNullValue(ArgType); 1360 Value *IsZero = Builder.CreateICmpEQ(ArgValue, Zero, "iszero"); 1361 Value *Result = Builder.CreateSelect(IsZero, Zero, Tmp, "ffs"); 1362 if (Result->getType() != ResultType) 1363 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1364 "cast"); 1365 return RValue::get(Result); 1366 } 1367 case Builtin::BI__builtin_parity: 1368 case Builtin::BI__builtin_parityl: 1369 case Builtin::BI__builtin_parityll: { 1370 // parity(x) -> ctpop(x) & 1 1371 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1372 1373 llvm::Type *ArgType = ArgValue->getType(); 1374 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 1375 1376 llvm::Type *ResultType = ConvertType(E->getType()); 1377 Value *Tmp = Builder.CreateCall(F, ArgValue); 1378 Value *Result = Builder.CreateAnd(Tmp, llvm::ConstantInt::get(ArgType, 1)); 1379 if (Result->getType() != ResultType) 1380 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1381 "cast"); 1382 return RValue::get(Result); 1383 } 1384 case Builtin::BI__popcnt16: 1385 case Builtin::BI__popcnt: 1386 case Builtin::BI__popcnt64: 1387 case Builtin::BI__builtin_popcount: 1388 case Builtin::BI__builtin_popcountl: 1389 case Builtin::BI__builtin_popcountll: { 1390 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1391 1392 llvm::Type *ArgType = ArgValue->getType(); 1393 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 1394 1395 llvm::Type *ResultType = ConvertType(E->getType()); 1396 Value *Result = Builder.CreateCall(F, ArgValue); 1397 if (Result->getType() != ResultType) 1398 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1399 "cast"); 1400 return RValue::get(Result); 1401 } 1402 case Builtin::BI_rotr8: 1403 case Builtin::BI_rotr16: 1404 case Builtin::BI_rotr: 1405 case Builtin::BI_lrotr: 1406 case Builtin::BI_rotr64: { 1407 Value *Val = EmitScalarExpr(E->getArg(0)); 1408 Value *Shift = EmitScalarExpr(E->getArg(1)); 1409 1410 llvm::Type *ArgType = Val->getType(); 1411 Shift = Builder.CreateIntCast(Shift, ArgType, false); 1412 unsigned ArgWidth = ArgType->getIntegerBitWidth(); 1413 Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1); 1414 1415 Value *RightShiftAmt = Builder.CreateAnd(Shift, Mask); 1416 Value *RightShifted = Builder.CreateLShr(Val, RightShiftAmt); 1417 Value *LeftShiftAmt = Builder.CreateAnd(Builder.CreateNeg(Shift), Mask); 1418 Value *LeftShifted = Builder.CreateShl(Val, LeftShiftAmt); 1419 Value *Result = Builder.CreateOr(LeftShifted, RightShifted); 1420 return RValue::get(Result); 1421 } 1422 case Builtin::BI_rotl8: 1423 case Builtin::BI_rotl16: 1424 case Builtin::BI_rotl: 1425 case Builtin::BI_lrotl: 1426 case Builtin::BI_rotl64: { 1427 Value *Val = EmitScalarExpr(E->getArg(0)); 1428 Value *Shift = EmitScalarExpr(E->getArg(1)); 1429 1430 llvm::Type *ArgType = Val->getType(); 1431 Shift = Builder.CreateIntCast(Shift, ArgType, false); 1432 unsigned ArgWidth = ArgType->getIntegerBitWidth(); 1433 Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1); 1434 1435 Value *LeftShiftAmt = Builder.CreateAnd(Shift, Mask); 1436 Value *LeftShifted = Builder.CreateShl(Val, LeftShiftAmt); 1437 Value *RightShiftAmt = Builder.CreateAnd(Builder.CreateNeg(Shift), Mask); 1438 Value *RightShifted = Builder.CreateLShr(Val, RightShiftAmt); 1439 Value *Result = Builder.CreateOr(LeftShifted, RightShifted); 1440 return RValue::get(Result); 1441 } 1442 case Builtin::BI__builtin_unpredictable: { 1443 // Always return the argument of __builtin_unpredictable. LLVM does not 1444 // handle this builtin. Metadata for this builtin should be added directly 1445 // to instructions such as branches or switches that use it. 1446 return RValue::get(EmitScalarExpr(E->getArg(0))); 1447 } 1448 case Builtin::BI__builtin_expect: { 1449 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1450 llvm::Type *ArgType = ArgValue->getType(); 1451 1452 Value *ExpectedValue = EmitScalarExpr(E->getArg(1)); 1453 // Don't generate llvm.expect on -O0 as the backend won't use it for 1454 // anything. 1455 // Note, we still IRGen ExpectedValue because it could have side-effects. 1456 if (CGM.getCodeGenOpts().OptimizationLevel == 0) 1457 return RValue::get(ArgValue); 1458 1459 Value *FnExpect = CGM.getIntrinsic(Intrinsic::expect, ArgType); 1460 Value *Result = 1461 Builder.CreateCall(FnExpect, {ArgValue, ExpectedValue}, "expval"); 1462 return RValue::get(Result); 1463 } 1464 case Builtin::BI__builtin_assume_aligned: { 1465 Value *PtrValue = EmitScalarExpr(E->getArg(0)); 1466 Value *OffsetValue = 1467 (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : nullptr; 1468 1469 Value *AlignmentValue = EmitScalarExpr(E->getArg(1)); 1470 ConstantInt *AlignmentCI = cast<ConstantInt>(AlignmentValue); 1471 unsigned Alignment = (unsigned) AlignmentCI->getZExtValue(); 1472 1473 EmitAlignmentAssumption(PtrValue, Alignment, OffsetValue); 1474 return RValue::get(PtrValue); 1475 } 1476 case Builtin::BI__assume: 1477 case Builtin::BI__builtin_assume: { 1478 if (E->getArg(0)->HasSideEffects(getContext())) 1479 return RValue::get(nullptr); 1480 1481 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1482 Value *FnAssume = CGM.getIntrinsic(Intrinsic::assume); 1483 return RValue::get(Builder.CreateCall(FnAssume, ArgValue)); 1484 } 1485 case Builtin::BI__builtin_bswap16: 1486 case Builtin::BI__builtin_bswap32: 1487 case Builtin::BI__builtin_bswap64: { 1488 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bswap)); 1489 } 1490 case Builtin::BI__builtin_bitreverse8: 1491 case Builtin::BI__builtin_bitreverse16: 1492 case Builtin::BI__builtin_bitreverse32: 1493 case Builtin::BI__builtin_bitreverse64: { 1494 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bitreverse)); 1495 } 1496 case Builtin::BI__builtin_object_size: { 1497 unsigned Type = 1498 E->getArg(1)->EvaluateKnownConstInt(getContext()).getZExtValue(); 1499 auto *ResType = cast<llvm::IntegerType>(ConvertType(E->getType())); 1500 1501 // We pass this builtin onto the optimizer so that it can figure out the 1502 // object size in more complex cases. 1503 return RValue::get(emitBuiltinObjectSize(E->getArg(0), Type, ResType, 1504 /*EmittedE=*/nullptr)); 1505 } 1506 case Builtin::BI__builtin_prefetch: { 1507 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); 1508 // FIXME: Technically these constants should of type 'int', yes? 1509 RW = (E->getNumArgs() > 1) ? EmitScalarExpr(E->getArg(1)) : 1510 llvm::ConstantInt::get(Int32Ty, 0); 1511 Locality = (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : 1512 llvm::ConstantInt::get(Int32Ty, 3); 1513 Value *Data = llvm::ConstantInt::get(Int32Ty, 1); 1514 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 1515 return RValue::get(Builder.CreateCall(F, {Address, RW, Locality, Data})); 1516 } 1517 case Builtin::BI__builtin_readcyclecounter: { 1518 Value *F = CGM.getIntrinsic(Intrinsic::readcyclecounter); 1519 return RValue::get(Builder.CreateCall(F)); 1520 } 1521 case Builtin::BI__builtin___clear_cache: { 1522 Value *Begin = EmitScalarExpr(E->getArg(0)); 1523 Value *End = EmitScalarExpr(E->getArg(1)); 1524 Value *F = CGM.getIntrinsic(Intrinsic::clear_cache); 1525 return RValue::get(Builder.CreateCall(F, {Begin, End})); 1526 } 1527 case Builtin::BI__builtin_trap: 1528 return RValue::get(EmitTrapCall(Intrinsic::trap)); 1529 case Builtin::BI__debugbreak: 1530 return RValue::get(EmitTrapCall(Intrinsic::debugtrap)); 1531 case Builtin::BI__builtin_unreachable: { 1532 EmitUnreachable(E->getExprLoc()); 1533 1534 // We do need to preserve an insertion point. 1535 EmitBlock(createBasicBlock("unreachable.cont")); 1536 1537 return RValue::get(nullptr); 1538 } 1539 1540 case Builtin::BI__builtin_powi: 1541 case Builtin::BI__builtin_powif: 1542 case Builtin::BI__builtin_powil: { 1543 Value *Base = EmitScalarExpr(E->getArg(0)); 1544 Value *Exponent = EmitScalarExpr(E->getArg(1)); 1545 llvm::Type *ArgType = Base->getType(); 1546 Value *F = CGM.getIntrinsic(Intrinsic::powi, ArgType); 1547 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 1548 } 1549 1550 case Builtin::BI__builtin_isgreater: 1551 case Builtin::BI__builtin_isgreaterequal: 1552 case Builtin::BI__builtin_isless: 1553 case Builtin::BI__builtin_islessequal: 1554 case Builtin::BI__builtin_islessgreater: 1555 case Builtin::BI__builtin_isunordered: { 1556 // Ordered comparisons: we know the arguments to these are matching scalar 1557 // floating point values. 1558 Value *LHS = EmitScalarExpr(E->getArg(0)); 1559 Value *RHS = EmitScalarExpr(E->getArg(1)); 1560 1561 switch (BuiltinID) { 1562 default: llvm_unreachable("Unknown ordered comparison"); 1563 case Builtin::BI__builtin_isgreater: 1564 LHS = Builder.CreateFCmpOGT(LHS, RHS, "cmp"); 1565 break; 1566 case Builtin::BI__builtin_isgreaterequal: 1567 LHS = Builder.CreateFCmpOGE(LHS, RHS, "cmp"); 1568 break; 1569 case Builtin::BI__builtin_isless: 1570 LHS = Builder.CreateFCmpOLT(LHS, RHS, "cmp"); 1571 break; 1572 case Builtin::BI__builtin_islessequal: 1573 LHS = Builder.CreateFCmpOLE(LHS, RHS, "cmp"); 1574 break; 1575 case Builtin::BI__builtin_islessgreater: 1576 LHS = Builder.CreateFCmpONE(LHS, RHS, "cmp"); 1577 break; 1578 case Builtin::BI__builtin_isunordered: 1579 LHS = Builder.CreateFCmpUNO(LHS, RHS, "cmp"); 1580 break; 1581 } 1582 // ZExt bool to int type. 1583 return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType()))); 1584 } 1585 case Builtin::BI__builtin_isnan: { 1586 Value *V = EmitScalarExpr(E->getArg(0)); 1587 V = Builder.CreateFCmpUNO(V, V, "cmp"); 1588 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 1589 } 1590 1591 case Builtin::BIfinite: 1592 case Builtin::BI__finite: 1593 case Builtin::BIfinitef: 1594 case Builtin::BI__finitef: 1595 case Builtin::BIfinitel: 1596 case Builtin::BI__finitel: 1597 case Builtin::BI__builtin_isinf: 1598 case Builtin::BI__builtin_isfinite: { 1599 // isinf(x) --> fabs(x) == infinity 1600 // isfinite(x) --> fabs(x) != infinity 1601 // x != NaN via the ordered compare in either case. 1602 Value *V = EmitScalarExpr(E->getArg(0)); 1603 Value *Fabs = EmitFAbs(*this, V); 1604 Constant *Infinity = ConstantFP::getInfinity(V->getType()); 1605 CmpInst::Predicate Pred = (BuiltinID == Builtin::BI__builtin_isinf) 1606 ? CmpInst::FCMP_OEQ 1607 : CmpInst::FCMP_ONE; 1608 Value *FCmp = Builder.CreateFCmp(Pred, Fabs, Infinity, "cmpinf"); 1609 return RValue::get(Builder.CreateZExt(FCmp, ConvertType(E->getType()))); 1610 } 1611 1612 case Builtin::BI__builtin_isinf_sign: { 1613 // isinf_sign(x) -> fabs(x) == infinity ? (signbit(x) ? -1 : 1) : 0 1614 Value *Arg = EmitScalarExpr(E->getArg(0)); 1615 Value *AbsArg = EmitFAbs(*this, Arg); 1616 Value *IsInf = Builder.CreateFCmpOEQ( 1617 AbsArg, ConstantFP::getInfinity(Arg->getType()), "isinf"); 1618 Value *IsNeg = EmitSignBit(*this, Arg); 1619 1620 llvm::Type *IntTy = ConvertType(E->getType()); 1621 Value *Zero = Constant::getNullValue(IntTy); 1622 Value *One = ConstantInt::get(IntTy, 1); 1623 Value *NegativeOne = ConstantInt::get(IntTy, -1); 1624 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); 1625 Value *Result = Builder.CreateSelect(IsInf, SignResult, Zero); 1626 return RValue::get(Result); 1627 } 1628 1629 case Builtin::BI__builtin_isnormal: { 1630 // isnormal(x) --> x == x && fabsf(x) < infinity && fabsf(x) >= float_min 1631 Value *V = EmitScalarExpr(E->getArg(0)); 1632 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 1633 1634 Value *Abs = EmitFAbs(*this, V); 1635 Value *IsLessThanInf = 1636 Builder.CreateFCmpULT(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 1637 APFloat Smallest = APFloat::getSmallestNormalized( 1638 getContext().getFloatTypeSemantics(E->getArg(0)->getType())); 1639 Value *IsNormal = 1640 Builder.CreateFCmpUGE(Abs, ConstantFP::get(V->getContext(), Smallest), 1641 "isnormal"); 1642 V = Builder.CreateAnd(Eq, IsLessThanInf, "and"); 1643 V = Builder.CreateAnd(V, IsNormal, "and"); 1644 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 1645 } 1646 1647 case Builtin::BI__builtin_fpclassify: { 1648 Value *V = EmitScalarExpr(E->getArg(5)); 1649 llvm::Type *Ty = ConvertType(E->getArg(5)->getType()); 1650 1651 // Create Result 1652 BasicBlock *Begin = Builder.GetInsertBlock(); 1653 BasicBlock *End = createBasicBlock("fpclassify_end", this->CurFn); 1654 Builder.SetInsertPoint(End); 1655 PHINode *Result = 1656 Builder.CreatePHI(ConvertType(E->getArg(0)->getType()), 4, 1657 "fpclassify_result"); 1658 1659 // if (V==0) return FP_ZERO 1660 Builder.SetInsertPoint(Begin); 1661 Value *IsZero = Builder.CreateFCmpOEQ(V, Constant::getNullValue(Ty), 1662 "iszero"); 1663 Value *ZeroLiteral = EmitScalarExpr(E->getArg(4)); 1664 BasicBlock *NotZero = createBasicBlock("fpclassify_not_zero", this->CurFn); 1665 Builder.CreateCondBr(IsZero, End, NotZero); 1666 Result->addIncoming(ZeroLiteral, Begin); 1667 1668 // if (V != V) return FP_NAN 1669 Builder.SetInsertPoint(NotZero); 1670 Value *IsNan = Builder.CreateFCmpUNO(V, V, "cmp"); 1671 Value *NanLiteral = EmitScalarExpr(E->getArg(0)); 1672 BasicBlock *NotNan = createBasicBlock("fpclassify_not_nan", this->CurFn); 1673 Builder.CreateCondBr(IsNan, End, NotNan); 1674 Result->addIncoming(NanLiteral, NotZero); 1675 1676 // if (fabs(V) == infinity) return FP_INFINITY 1677 Builder.SetInsertPoint(NotNan); 1678 Value *VAbs = EmitFAbs(*this, V); 1679 Value *IsInf = 1680 Builder.CreateFCmpOEQ(VAbs, ConstantFP::getInfinity(V->getType()), 1681 "isinf"); 1682 Value *InfLiteral = EmitScalarExpr(E->getArg(1)); 1683 BasicBlock *NotInf = createBasicBlock("fpclassify_not_inf", this->CurFn); 1684 Builder.CreateCondBr(IsInf, End, NotInf); 1685 Result->addIncoming(InfLiteral, NotNan); 1686 1687 // if (fabs(V) >= MIN_NORMAL) return FP_NORMAL else FP_SUBNORMAL 1688 Builder.SetInsertPoint(NotInf); 1689 APFloat Smallest = APFloat::getSmallestNormalized( 1690 getContext().getFloatTypeSemantics(E->getArg(5)->getType())); 1691 Value *IsNormal = 1692 Builder.CreateFCmpUGE(VAbs, ConstantFP::get(V->getContext(), Smallest), 1693 "isnormal"); 1694 Value *NormalResult = 1695 Builder.CreateSelect(IsNormal, EmitScalarExpr(E->getArg(2)), 1696 EmitScalarExpr(E->getArg(3))); 1697 Builder.CreateBr(End); 1698 Result->addIncoming(NormalResult, NotInf); 1699 1700 // return Result 1701 Builder.SetInsertPoint(End); 1702 return RValue::get(Result); 1703 } 1704 1705 case Builtin::BIalloca: 1706 case Builtin::BI_alloca: 1707 case Builtin::BI__builtin_alloca: { 1708 Value *Size = EmitScalarExpr(E->getArg(0)); 1709 const TargetInfo &TI = getContext().getTargetInfo(); 1710 // The alignment of the alloca should correspond to __BIGGEST_ALIGNMENT__. 1711 unsigned SuitableAlignmentInBytes = 1712 CGM.getContext() 1713 .toCharUnitsFromBits(TI.getSuitableAlign()) 1714 .getQuantity(); 1715 AllocaInst *AI = Builder.CreateAlloca(Builder.getInt8Ty(), Size); 1716 AI->setAlignment(SuitableAlignmentInBytes); 1717 return RValue::get(AI); 1718 } 1719 1720 case Builtin::BI__builtin_alloca_with_align: { 1721 Value *Size = EmitScalarExpr(E->getArg(0)); 1722 Value *AlignmentInBitsValue = EmitScalarExpr(E->getArg(1)); 1723 auto *AlignmentInBitsCI = cast<ConstantInt>(AlignmentInBitsValue); 1724 unsigned AlignmentInBits = AlignmentInBitsCI->getZExtValue(); 1725 unsigned AlignmentInBytes = 1726 CGM.getContext().toCharUnitsFromBits(AlignmentInBits).getQuantity(); 1727 AllocaInst *AI = Builder.CreateAlloca(Builder.getInt8Ty(), Size); 1728 AI->setAlignment(AlignmentInBytes); 1729 return RValue::get(AI); 1730 } 1731 1732 case Builtin::BIbzero: 1733 case Builtin::BI__builtin_bzero: { 1734 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1735 Value *SizeVal = EmitScalarExpr(E->getArg(1)); 1736 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1737 E->getArg(0)->getExprLoc(), FD, 0); 1738 Builder.CreateMemSet(Dest, Builder.getInt8(0), SizeVal, false); 1739 return RValue::get(nullptr); 1740 } 1741 case Builtin::BImemcpy: 1742 case Builtin::BI__builtin_memcpy: { 1743 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1744 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1745 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1746 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1747 E->getArg(0)->getExprLoc(), FD, 0); 1748 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 1749 E->getArg(1)->getExprLoc(), FD, 1); 1750 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 1751 return RValue::get(Dest.getPointer()); 1752 } 1753 1754 case Builtin::BI__builtin_char_memchr: 1755 BuiltinID = Builtin::BI__builtin_memchr; 1756 break; 1757 1758 case Builtin::BI__builtin___memcpy_chk: { 1759 // fold __builtin_memcpy_chk(x, y, cst1, cst2) to memcpy iff cst1<=cst2. 1760 llvm::APSInt Size, DstSize; 1761 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1762 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1763 break; 1764 if (Size.ugt(DstSize)) 1765 break; 1766 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1767 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1768 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1769 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 1770 return RValue::get(Dest.getPointer()); 1771 } 1772 1773 case Builtin::BI__builtin_objc_memmove_collectable: { 1774 Address DestAddr = EmitPointerWithAlignment(E->getArg(0)); 1775 Address SrcAddr = EmitPointerWithAlignment(E->getArg(1)); 1776 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1777 CGM.getObjCRuntime().EmitGCMemmoveCollectable(*this, 1778 DestAddr, SrcAddr, SizeVal); 1779 return RValue::get(DestAddr.getPointer()); 1780 } 1781 1782 case Builtin::BI__builtin___memmove_chk: { 1783 // fold __builtin_memmove_chk(x, y, cst1, cst2) to memmove iff cst1<=cst2. 1784 llvm::APSInt Size, DstSize; 1785 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1786 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1787 break; 1788 if (Size.ugt(DstSize)) 1789 break; 1790 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1791 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1792 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1793 Builder.CreateMemMove(Dest, Src, SizeVal, false); 1794 return RValue::get(Dest.getPointer()); 1795 } 1796 1797 case Builtin::BImemmove: 1798 case Builtin::BI__builtin_memmove: { 1799 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1800 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1801 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1802 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1803 E->getArg(0)->getExprLoc(), FD, 0); 1804 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 1805 E->getArg(1)->getExprLoc(), FD, 1); 1806 Builder.CreateMemMove(Dest, Src, SizeVal, false); 1807 return RValue::get(Dest.getPointer()); 1808 } 1809 case Builtin::BImemset: 1810 case Builtin::BI__builtin_memset: { 1811 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1812 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 1813 Builder.getInt8Ty()); 1814 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1815 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1816 E->getArg(0)->getExprLoc(), FD, 0); 1817 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 1818 return RValue::get(Dest.getPointer()); 1819 } 1820 case Builtin::BI__builtin___memset_chk: { 1821 // fold __builtin_memset_chk(x, y, cst1, cst2) to memset iff cst1<=cst2. 1822 llvm::APSInt Size, DstSize; 1823 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1824 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1825 break; 1826 if (Size.ugt(DstSize)) 1827 break; 1828 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1829 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 1830 Builder.getInt8Ty()); 1831 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1832 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 1833 return RValue::get(Dest.getPointer()); 1834 } 1835 case Builtin::BI__builtin_wmemcmp: { 1836 // The MSVC runtime library does not provide a definition of wmemcmp, so we 1837 // need an inline implementation. 1838 if (!getTarget().getTriple().isOSMSVCRT()) 1839 break; 1840 1841 llvm::Type *WCharTy = ConvertType(getContext().WCharTy); 1842 1843 Value *Dst = EmitScalarExpr(E->getArg(0)); 1844 Value *Src = EmitScalarExpr(E->getArg(1)); 1845 Value *Size = EmitScalarExpr(E->getArg(2)); 1846 1847 BasicBlock *Entry = Builder.GetInsertBlock(); 1848 BasicBlock *CmpGT = createBasicBlock("wmemcmp.gt"); 1849 BasicBlock *CmpLT = createBasicBlock("wmemcmp.lt"); 1850 BasicBlock *Next = createBasicBlock("wmemcmp.next"); 1851 BasicBlock *Exit = createBasicBlock("wmemcmp.exit"); 1852 Value *SizeEq0 = Builder.CreateICmpEQ(Size, ConstantInt::get(SizeTy, 0)); 1853 Builder.CreateCondBr(SizeEq0, Exit, CmpGT); 1854 1855 EmitBlock(CmpGT); 1856 PHINode *DstPhi = Builder.CreatePHI(Dst->getType(), 2); 1857 DstPhi->addIncoming(Dst, Entry); 1858 PHINode *SrcPhi = Builder.CreatePHI(Src->getType(), 2); 1859 SrcPhi->addIncoming(Src, Entry); 1860 PHINode *SizePhi = Builder.CreatePHI(SizeTy, 2); 1861 SizePhi->addIncoming(Size, Entry); 1862 CharUnits WCharAlign = 1863 getContext().getTypeAlignInChars(getContext().WCharTy); 1864 Value *DstCh = Builder.CreateAlignedLoad(WCharTy, DstPhi, WCharAlign); 1865 Value *SrcCh = Builder.CreateAlignedLoad(WCharTy, SrcPhi, WCharAlign); 1866 Value *DstGtSrc = Builder.CreateICmpUGT(DstCh, SrcCh); 1867 Builder.CreateCondBr(DstGtSrc, Exit, CmpLT); 1868 1869 EmitBlock(CmpLT); 1870 Value *DstLtSrc = Builder.CreateICmpULT(DstCh, SrcCh); 1871 Builder.CreateCondBr(DstLtSrc, Exit, Next); 1872 1873 EmitBlock(Next); 1874 Value *NextDst = Builder.CreateConstInBoundsGEP1_32(WCharTy, DstPhi, 1); 1875 Value *NextSrc = Builder.CreateConstInBoundsGEP1_32(WCharTy, SrcPhi, 1); 1876 Value *NextSize = Builder.CreateSub(SizePhi, ConstantInt::get(SizeTy, 1)); 1877 Value *NextSizeEq0 = 1878 Builder.CreateICmpEQ(NextSize, ConstantInt::get(SizeTy, 0)); 1879 Builder.CreateCondBr(NextSizeEq0, Exit, CmpGT); 1880 DstPhi->addIncoming(NextDst, Next); 1881 SrcPhi->addIncoming(NextSrc, Next); 1882 SizePhi->addIncoming(NextSize, Next); 1883 1884 EmitBlock(Exit); 1885 PHINode *Ret = Builder.CreatePHI(IntTy, 4); 1886 Ret->addIncoming(ConstantInt::get(IntTy, 0), Entry); 1887 Ret->addIncoming(ConstantInt::get(IntTy, 1), CmpGT); 1888 Ret->addIncoming(ConstantInt::get(IntTy, -1), CmpLT); 1889 Ret->addIncoming(ConstantInt::get(IntTy, 0), Next); 1890 return RValue::get(Ret); 1891 } 1892 case Builtin::BI__builtin_dwarf_cfa: { 1893 // The offset in bytes from the first argument to the CFA. 1894 // 1895 // Why on earth is this in the frontend? Is there any reason at 1896 // all that the backend can't reasonably determine this while 1897 // lowering llvm.eh.dwarf.cfa()? 1898 // 1899 // TODO: If there's a satisfactory reason, add a target hook for 1900 // this instead of hard-coding 0, which is correct for most targets. 1901 int32_t Offset = 0; 1902 1903 Value *F = CGM.getIntrinsic(Intrinsic::eh_dwarf_cfa); 1904 return RValue::get(Builder.CreateCall(F, 1905 llvm::ConstantInt::get(Int32Ty, Offset))); 1906 } 1907 case Builtin::BI__builtin_return_address: { 1908 Value *Depth = ConstantEmitter(*this).emitAbstract(E->getArg(0), 1909 getContext().UnsignedIntTy); 1910 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 1911 return RValue::get(Builder.CreateCall(F, Depth)); 1912 } 1913 case Builtin::BI_ReturnAddress: { 1914 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 1915 return RValue::get(Builder.CreateCall(F, Builder.getInt32(0))); 1916 } 1917 case Builtin::BI__builtin_frame_address: { 1918 Value *Depth = ConstantEmitter(*this).emitAbstract(E->getArg(0), 1919 getContext().UnsignedIntTy); 1920 Value *F = CGM.getIntrinsic(Intrinsic::frameaddress); 1921 return RValue::get(Builder.CreateCall(F, Depth)); 1922 } 1923 case Builtin::BI__builtin_extract_return_addr: { 1924 Value *Address = EmitScalarExpr(E->getArg(0)); 1925 Value *Result = getTargetHooks().decodeReturnAddress(*this, Address); 1926 return RValue::get(Result); 1927 } 1928 case Builtin::BI__builtin_frob_return_addr: { 1929 Value *Address = EmitScalarExpr(E->getArg(0)); 1930 Value *Result = getTargetHooks().encodeReturnAddress(*this, Address); 1931 return RValue::get(Result); 1932 } 1933 case Builtin::BI__builtin_dwarf_sp_column: { 1934 llvm::IntegerType *Ty 1935 = cast<llvm::IntegerType>(ConvertType(E->getType())); 1936 int Column = getTargetHooks().getDwarfEHStackPointer(CGM); 1937 if (Column == -1) { 1938 CGM.ErrorUnsupported(E, "__builtin_dwarf_sp_column"); 1939 return RValue::get(llvm::UndefValue::get(Ty)); 1940 } 1941 return RValue::get(llvm::ConstantInt::get(Ty, Column, true)); 1942 } 1943 case Builtin::BI__builtin_init_dwarf_reg_size_table: { 1944 Value *Address = EmitScalarExpr(E->getArg(0)); 1945 if (getTargetHooks().initDwarfEHRegSizeTable(*this, Address)) 1946 CGM.ErrorUnsupported(E, "__builtin_init_dwarf_reg_size_table"); 1947 return RValue::get(llvm::UndefValue::get(ConvertType(E->getType()))); 1948 } 1949 case Builtin::BI__builtin_eh_return: { 1950 Value *Int = EmitScalarExpr(E->getArg(0)); 1951 Value *Ptr = EmitScalarExpr(E->getArg(1)); 1952 1953 llvm::IntegerType *IntTy = cast<llvm::IntegerType>(Int->getType()); 1954 assert((IntTy->getBitWidth() == 32 || IntTy->getBitWidth() == 64) && 1955 "LLVM's __builtin_eh_return only supports 32- and 64-bit variants"); 1956 Value *F = CGM.getIntrinsic(IntTy->getBitWidth() == 32 1957 ? Intrinsic::eh_return_i32 1958 : Intrinsic::eh_return_i64); 1959 Builder.CreateCall(F, {Int, Ptr}); 1960 Builder.CreateUnreachable(); 1961 1962 // We do need to preserve an insertion point. 1963 EmitBlock(createBasicBlock("builtin_eh_return.cont")); 1964 1965 return RValue::get(nullptr); 1966 } 1967 case Builtin::BI__builtin_unwind_init: { 1968 Value *F = CGM.getIntrinsic(Intrinsic::eh_unwind_init); 1969 return RValue::get(Builder.CreateCall(F)); 1970 } 1971 case Builtin::BI__builtin_extend_pointer: { 1972 // Extends a pointer to the size of an _Unwind_Word, which is 1973 // uint64_t on all platforms. Generally this gets poked into a 1974 // register and eventually used as an address, so if the 1975 // addressing registers are wider than pointers and the platform 1976 // doesn't implicitly ignore high-order bits when doing 1977 // addressing, we need to make sure we zext / sext based on 1978 // the platform's expectations. 1979 // 1980 // See: http://gcc.gnu.org/ml/gcc-bugs/2002-02/msg00237.html 1981 1982 // Cast the pointer to intptr_t. 1983 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1984 Value *Result = Builder.CreatePtrToInt(Ptr, IntPtrTy, "extend.cast"); 1985 1986 // If that's 64 bits, we're done. 1987 if (IntPtrTy->getBitWidth() == 64) 1988 return RValue::get(Result); 1989 1990 // Otherwise, ask the codegen data what to do. 1991 if (getTargetHooks().extendPointerWithSExt()) 1992 return RValue::get(Builder.CreateSExt(Result, Int64Ty, "extend.sext")); 1993 else 1994 return RValue::get(Builder.CreateZExt(Result, Int64Ty, "extend.zext")); 1995 } 1996 case Builtin::BI__builtin_setjmp: { 1997 // Buffer is a void**. 1998 Address Buf = EmitPointerWithAlignment(E->getArg(0)); 1999 2000 // Store the frame pointer to the setjmp buffer. 2001 Value *FrameAddr = 2002 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2003 ConstantInt::get(Int32Ty, 0)); 2004 Builder.CreateStore(FrameAddr, Buf); 2005 2006 // Store the stack pointer to the setjmp buffer. 2007 Value *StackAddr = 2008 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::stacksave)); 2009 Address StackSaveSlot = 2010 Builder.CreateConstInBoundsGEP(Buf, 2, getPointerSize()); 2011 Builder.CreateStore(StackAddr, StackSaveSlot); 2012 2013 // Call LLVM's EH setjmp, which is lightweight. 2014 Value *F = CGM.getIntrinsic(Intrinsic::eh_sjlj_setjmp); 2015 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 2016 return RValue::get(Builder.CreateCall(F, Buf.getPointer())); 2017 } 2018 case Builtin::BI__builtin_longjmp: { 2019 Value *Buf = EmitScalarExpr(E->getArg(0)); 2020 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 2021 2022 // Call LLVM's EH longjmp, which is lightweight. 2023 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::eh_sjlj_longjmp), Buf); 2024 2025 // longjmp doesn't return; mark this as unreachable. 2026 Builder.CreateUnreachable(); 2027 2028 // We do need to preserve an insertion point. 2029 EmitBlock(createBasicBlock("longjmp.cont")); 2030 2031 return RValue::get(nullptr); 2032 } 2033 case Builtin::BI__sync_fetch_and_add: 2034 case Builtin::BI__sync_fetch_and_sub: 2035 case Builtin::BI__sync_fetch_and_or: 2036 case Builtin::BI__sync_fetch_and_and: 2037 case Builtin::BI__sync_fetch_and_xor: 2038 case Builtin::BI__sync_fetch_and_nand: 2039 case Builtin::BI__sync_add_and_fetch: 2040 case Builtin::BI__sync_sub_and_fetch: 2041 case Builtin::BI__sync_and_and_fetch: 2042 case Builtin::BI__sync_or_and_fetch: 2043 case Builtin::BI__sync_xor_and_fetch: 2044 case Builtin::BI__sync_nand_and_fetch: 2045 case Builtin::BI__sync_val_compare_and_swap: 2046 case Builtin::BI__sync_bool_compare_and_swap: 2047 case Builtin::BI__sync_lock_test_and_set: 2048 case Builtin::BI__sync_lock_release: 2049 case Builtin::BI__sync_swap: 2050 llvm_unreachable("Shouldn't make it through sema"); 2051 case Builtin::BI__sync_fetch_and_add_1: 2052 case Builtin::BI__sync_fetch_and_add_2: 2053 case Builtin::BI__sync_fetch_and_add_4: 2054 case Builtin::BI__sync_fetch_and_add_8: 2055 case Builtin::BI__sync_fetch_and_add_16: 2056 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E); 2057 case Builtin::BI__sync_fetch_and_sub_1: 2058 case Builtin::BI__sync_fetch_and_sub_2: 2059 case Builtin::BI__sync_fetch_and_sub_4: 2060 case Builtin::BI__sync_fetch_and_sub_8: 2061 case Builtin::BI__sync_fetch_and_sub_16: 2062 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E); 2063 case Builtin::BI__sync_fetch_and_or_1: 2064 case Builtin::BI__sync_fetch_and_or_2: 2065 case Builtin::BI__sync_fetch_and_or_4: 2066 case Builtin::BI__sync_fetch_and_or_8: 2067 case Builtin::BI__sync_fetch_and_or_16: 2068 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E); 2069 case Builtin::BI__sync_fetch_and_and_1: 2070 case Builtin::BI__sync_fetch_and_and_2: 2071 case Builtin::BI__sync_fetch_and_and_4: 2072 case Builtin::BI__sync_fetch_and_and_8: 2073 case Builtin::BI__sync_fetch_and_and_16: 2074 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E); 2075 case Builtin::BI__sync_fetch_and_xor_1: 2076 case Builtin::BI__sync_fetch_and_xor_2: 2077 case Builtin::BI__sync_fetch_and_xor_4: 2078 case Builtin::BI__sync_fetch_and_xor_8: 2079 case Builtin::BI__sync_fetch_and_xor_16: 2080 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E); 2081 case Builtin::BI__sync_fetch_and_nand_1: 2082 case Builtin::BI__sync_fetch_and_nand_2: 2083 case Builtin::BI__sync_fetch_and_nand_4: 2084 case Builtin::BI__sync_fetch_and_nand_8: 2085 case Builtin::BI__sync_fetch_and_nand_16: 2086 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Nand, E); 2087 2088 // Clang extensions: not overloaded yet. 2089 case Builtin::BI__sync_fetch_and_min: 2090 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E); 2091 case Builtin::BI__sync_fetch_and_max: 2092 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Max, E); 2093 case Builtin::BI__sync_fetch_and_umin: 2094 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMin, E); 2095 case Builtin::BI__sync_fetch_and_umax: 2096 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMax, E); 2097 2098 case Builtin::BI__sync_add_and_fetch_1: 2099 case Builtin::BI__sync_add_and_fetch_2: 2100 case Builtin::BI__sync_add_and_fetch_4: 2101 case Builtin::BI__sync_add_and_fetch_8: 2102 case Builtin::BI__sync_add_and_fetch_16: 2103 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Add, E, 2104 llvm::Instruction::Add); 2105 case Builtin::BI__sync_sub_and_fetch_1: 2106 case Builtin::BI__sync_sub_and_fetch_2: 2107 case Builtin::BI__sync_sub_and_fetch_4: 2108 case Builtin::BI__sync_sub_and_fetch_8: 2109 case Builtin::BI__sync_sub_and_fetch_16: 2110 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Sub, E, 2111 llvm::Instruction::Sub); 2112 case Builtin::BI__sync_and_and_fetch_1: 2113 case Builtin::BI__sync_and_and_fetch_2: 2114 case Builtin::BI__sync_and_and_fetch_4: 2115 case Builtin::BI__sync_and_and_fetch_8: 2116 case Builtin::BI__sync_and_and_fetch_16: 2117 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::And, E, 2118 llvm::Instruction::And); 2119 case Builtin::BI__sync_or_and_fetch_1: 2120 case Builtin::BI__sync_or_and_fetch_2: 2121 case Builtin::BI__sync_or_and_fetch_4: 2122 case Builtin::BI__sync_or_and_fetch_8: 2123 case Builtin::BI__sync_or_and_fetch_16: 2124 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Or, E, 2125 llvm::Instruction::Or); 2126 case Builtin::BI__sync_xor_and_fetch_1: 2127 case Builtin::BI__sync_xor_and_fetch_2: 2128 case Builtin::BI__sync_xor_and_fetch_4: 2129 case Builtin::BI__sync_xor_and_fetch_8: 2130 case Builtin::BI__sync_xor_and_fetch_16: 2131 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Xor, E, 2132 llvm::Instruction::Xor); 2133 case Builtin::BI__sync_nand_and_fetch_1: 2134 case Builtin::BI__sync_nand_and_fetch_2: 2135 case Builtin::BI__sync_nand_and_fetch_4: 2136 case Builtin::BI__sync_nand_and_fetch_8: 2137 case Builtin::BI__sync_nand_and_fetch_16: 2138 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Nand, E, 2139 llvm::Instruction::And, true); 2140 2141 case Builtin::BI__sync_val_compare_and_swap_1: 2142 case Builtin::BI__sync_val_compare_and_swap_2: 2143 case Builtin::BI__sync_val_compare_and_swap_4: 2144 case Builtin::BI__sync_val_compare_and_swap_8: 2145 case Builtin::BI__sync_val_compare_and_swap_16: 2146 return RValue::get(MakeAtomicCmpXchgValue(*this, E, false)); 2147 2148 case Builtin::BI__sync_bool_compare_and_swap_1: 2149 case Builtin::BI__sync_bool_compare_and_swap_2: 2150 case Builtin::BI__sync_bool_compare_and_swap_4: 2151 case Builtin::BI__sync_bool_compare_and_swap_8: 2152 case Builtin::BI__sync_bool_compare_and_swap_16: 2153 return RValue::get(MakeAtomicCmpXchgValue(*this, E, true)); 2154 2155 case Builtin::BI__sync_swap_1: 2156 case Builtin::BI__sync_swap_2: 2157 case Builtin::BI__sync_swap_4: 2158 case Builtin::BI__sync_swap_8: 2159 case Builtin::BI__sync_swap_16: 2160 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 2161 2162 case Builtin::BI__sync_lock_test_and_set_1: 2163 case Builtin::BI__sync_lock_test_and_set_2: 2164 case Builtin::BI__sync_lock_test_and_set_4: 2165 case Builtin::BI__sync_lock_test_and_set_8: 2166 case Builtin::BI__sync_lock_test_and_set_16: 2167 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 2168 2169 case Builtin::BI__sync_lock_release_1: 2170 case Builtin::BI__sync_lock_release_2: 2171 case Builtin::BI__sync_lock_release_4: 2172 case Builtin::BI__sync_lock_release_8: 2173 case Builtin::BI__sync_lock_release_16: { 2174 Value *Ptr = EmitScalarExpr(E->getArg(0)); 2175 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 2176 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 2177 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 2178 StoreSize.getQuantity() * 8); 2179 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 2180 llvm::StoreInst *Store = 2181 Builder.CreateAlignedStore(llvm::Constant::getNullValue(ITy), Ptr, 2182 StoreSize); 2183 Store->setAtomic(llvm::AtomicOrdering::Release); 2184 return RValue::get(nullptr); 2185 } 2186 2187 case Builtin::BI__sync_synchronize: { 2188 // We assume this is supposed to correspond to a C++0x-style 2189 // sequentially-consistent fence (i.e. this is only usable for 2190 // synchronization, not device I/O or anything like that). This intrinsic 2191 // is really badly designed in the sense that in theory, there isn't 2192 // any way to safely use it... but in practice, it mostly works 2193 // to use it with non-atomic loads and stores to get acquire/release 2194 // semantics. 2195 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent); 2196 return RValue::get(nullptr); 2197 } 2198 2199 case Builtin::BI__builtin_nontemporal_load: 2200 return RValue::get(EmitNontemporalLoad(*this, E)); 2201 case Builtin::BI__builtin_nontemporal_store: 2202 return RValue::get(EmitNontemporalStore(*this, E)); 2203 case Builtin::BI__c11_atomic_is_lock_free: 2204 case Builtin::BI__atomic_is_lock_free: { 2205 // Call "bool __atomic_is_lock_free(size_t size, void *ptr)". For the 2206 // __c11 builtin, ptr is 0 (indicating a properly-aligned object), since 2207 // _Atomic(T) is always properly-aligned. 2208 const char *LibCallName = "__atomic_is_lock_free"; 2209 CallArgList Args; 2210 Args.add(RValue::get(EmitScalarExpr(E->getArg(0))), 2211 getContext().getSizeType()); 2212 if (BuiltinID == Builtin::BI__atomic_is_lock_free) 2213 Args.add(RValue::get(EmitScalarExpr(E->getArg(1))), 2214 getContext().VoidPtrTy); 2215 else 2216 Args.add(RValue::get(llvm::Constant::getNullValue(VoidPtrTy)), 2217 getContext().VoidPtrTy); 2218 const CGFunctionInfo &FuncInfo = 2219 CGM.getTypes().arrangeBuiltinFunctionCall(E->getType(), Args); 2220 llvm::FunctionType *FTy = CGM.getTypes().GetFunctionType(FuncInfo); 2221 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, LibCallName); 2222 return EmitCall(FuncInfo, CGCallee::forDirect(Func), 2223 ReturnValueSlot(), Args); 2224 } 2225 2226 case Builtin::BI__atomic_test_and_set: { 2227 // Look at the argument type to determine whether this is a volatile 2228 // operation. The parameter type is always volatile. 2229 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 2230 bool Volatile = 2231 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 2232 2233 Value *Ptr = EmitScalarExpr(E->getArg(0)); 2234 unsigned AddrSpace = Ptr->getType()->getPointerAddressSpace(); 2235 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 2236 Value *NewVal = Builder.getInt8(1); 2237 Value *Order = EmitScalarExpr(E->getArg(1)); 2238 if (isa<llvm::ConstantInt>(Order)) { 2239 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 2240 AtomicRMWInst *Result = nullptr; 2241 switch (ord) { 2242 case 0: // memory_order_relaxed 2243 default: // invalid order 2244 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2245 llvm::AtomicOrdering::Monotonic); 2246 break; 2247 case 1: // memory_order_consume 2248 case 2: // memory_order_acquire 2249 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2250 llvm::AtomicOrdering::Acquire); 2251 break; 2252 case 3: // memory_order_release 2253 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2254 llvm::AtomicOrdering::Release); 2255 break; 2256 case 4: // memory_order_acq_rel 2257 2258 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2259 llvm::AtomicOrdering::AcquireRelease); 2260 break; 2261 case 5: // memory_order_seq_cst 2262 Result = Builder.CreateAtomicRMW( 2263 llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2264 llvm::AtomicOrdering::SequentiallyConsistent); 2265 break; 2266 } 2267 Result->setVolatile(Volatile); 2268 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 2269 } 2270 2271 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 2272 2273 llvm::BasicBlock *BBs[5] = { 2274 createBasicBlock("monotonic", CurFn), 2275 createBasicBlock("acquire", CurFn), 2276 createBasicBlock("release", CurFn), 2277 createBasicBlock("acqrel", CurFn), 2278 createBasicBlock("seqcst", CurFn) 2279 }; 2280 llvm::AtomicOrdering Orders[5] = { 2281 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Acquire, 2282 llvm::AtomicOrdering::Release, llvm::AtomicOrdering::AcquireRelease, 2283 llvm::AtomicOrdering::SequentiallyConsistent}; 2284 2285 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 2286 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 2287 2288 Builder.SetInsertPoint(ContBB); 2289 PHINode *Result = Builder.CreatePHI(Int8Ty, 5, "was_set"); 2290 2291 for (unsigned i = 0; i < 5; ++i) { 2292 Builder.SetInsertPoint(BBs[i]); 2293 AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 2294 Ptr, NewVal, Orders[i]); 2295 RMW->setVolatile(Volatile); 2296 Result->addIncoming(RMW, BBs[i]); 2297 Builder.CreateBr(ContBB); 2298 } 2299 2300 SI->addCase(Builder.getInt32(0), BBs[0]); 2301 SI->addCase(Builder.getInt32(1), BBs[1]); 2302 SI->addCase(Builder.getInt32(2), BBs[1]); 2303 SI->addCase(Builder.getInt32(3), BBs[2]); 2304 SI->addCase(Builder.getInt32(4), BBs[3]); 2305 SI->addCase(Builder.getInt32(5), BBs[4]); 2306 2307 Builder.SetInsertPoint(ContBB); 2308 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 2309 } 2310 2311 case Builtin::BI__atomic_clear: { 2312 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 2313 bool Volatile = 2314 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 2315 2316 Address Ptr = EmitPointerWithAlignment(E->getArg(0)); 2317 unsigned AddrSpace = Ptr.getPointer()->getType()->getPointerAddressSpace(); 2318 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 2319 Value *NewVal = Builder.getInt8(0); 2320 Value *Order = EmitScalarExpr(E->getArg(1)); 2321 if (isa<llvm::ConstantInt>(Order)) { 2322 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 2323 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 2324 switch (ord) { 2325 case 0: // memory_order_relaxed 2326 default: // invalid order 2327 Store->setOrdering(llvm::AtomicOrdering::Monotonic); 2328 break; 2329 case 3: // memory_order_release 2330 Store->setOrdering(llvm::AtomicOrdering::Release); 2331 break; 2332 case 5: // memory_order_seq_cst 2333 Store->setOrdering(llvm::AtomicOrdering::SequentiallyConsistent); 2334 break; 2335 } 2336 return RValue::get(nullptr); 2337 } 2338 2339 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 2340 2341 llvm::BasicBlock *BBs[3] = { 2342 createBasicBlock("monotonic", CurFn), 2343 createBasicBlock("release", CurFn), 2344 createBasicBlock("seqcst", CurFn) 2345 }; 2346 llvm::AtomicOrdering Orders[3] = { 2347 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Release, 2348 llvm::AtomicOrdering::SequentiallyConsistent}; 2349 2350 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 2351 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 2352 2353 for (unsigned i = 0; i < 3; ++i) { 2354 Builder.SetInsertPoint(BBs[i]); 2355 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 2356 Store->setOrdering(Orders[i]); 2357 Builder.CreateBr(ContBB); 2358 } 2359 2360 SI->addCase(Builder.getInt32(0), BBs[0]); 2361 SI->addCase(Builder.getInt32(3), BBs[1]); 2362 SI->addCase(Builder.getInt32(5), BBs[2]); 2363 2364 Builder.SetInsertPoint(ContBB); 2365 return RValue::get(nullptr); 2366 } 2367 2368 case Builtin::BI__atomic_thread_fence: 2369 case Builtin::BI__atomic_signal_fence: 2370 case Builtin::BI__c11_atomic_thread_fence: 2371 case Builtin::BI__c11_atomic_signal_fence: { 2372 llvm::SyncScope::ID SSID; 2373 if (BuiltinID == Builtin::BI__atomic_signal_fence || 2374 BuiltinID == Builtin::BI__c11_atomic_signal_fence) 2375 SSID = llvm::SyncScope::SingleThread; 2376 else 2377 SSID = llvm::SyncScope::System; 2378 Value *Order = EmitScalarExpr(E->getArg(0)); 2379 if (isa<llvm::ConstantInt>(Order)) { 2380 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 2381 switch (ord) { 2382 case 0: // memory_order_relaxed 2383 default: // invalid order 2384 break; 2385 case 1: // memory_order_consume 2386 case 2: // memory_order_acquire 2387 Builder.CreateFence(llvm::AtomicOrdering::Acquire, SSID); 2388 break; 2389 case 3: // memory_order_release 2390 Builder.CreateFence(llvm::AtomicOrdering::Release, SSID); 2391 break; 2392 case 4: // memory_order_acq_rel 2393 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, SSID); 2394 break; 2395 case 5: // memory_order_seq_cst 2396 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, SSID); 2397 break; 2398 } 2399 return RValue::get(nullptr); 2400 } 2401 2402 llvm::BasicBlock *AcquireBB, *ReleaseBB, *AcqRelBB, *SeqCstBB; 2403 AcquireBB = createBasicBlock("acquire", CurFn); 2404 ReleaseBB = createBasicBlock("release", CurFn); 2405 AcqRelBB = createBasicBlock("acqrel", CurFn); 2406 SeqCstBB = createBasicBlock("seqcst", CurFn); 2407 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 2408 2409 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 2410 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, ContBB); 2411 2412 Builder.SetInsertPoint(AcquireBB); 2413 Builder.CreateFence(llvm::AtomicOrdering::Acquire, SSID); 2414 Builder.CreateBr(ContBB); 2415 SI->addCase(Builder.getInt32(1), AcquireBB); 2416 SI->addCase(Builder.getInt32(2), AcquireBB); 2417 2418 Builder.SetInsertPoint(ReleaseBB); 2419 Builder.CreateFence(llvm::AtomicOrdering::Release, SSID); 2420 Builder.CreateBr(ContBB); 2421 SI->addCase(Builder.getInt32(3), ReleaseBB); 2422 2423 Builder.SetInsertPoint(AcqRelBB); 2424 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, SSID); 2425 Builder.CreateBr(ContBB); 2426 SI->addCase(Builder.getInt32(4), AcqRelBB); 2427 2428 Builder.SetInsertPoint(SeqCstBB); 2429 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, SSID); 2430 Builder.CreateBr(ContBB); 2431 SI->addCase(Builder.getInt32(5), SeqCstBB); 2432 2433 Builder.SetInsertPoint(ContBB); 2434 return RValue::get(nullptr); 2435 } 2436 2437 case Builtin::BI__builtin_signbit: 2438 case Builtin::BI__builtin_signbitf: 2439 case Builtin::BI__builtin_signbitl: { 2440 return RValue::get( 2441 Builder.CreateZExt(EmitSignBit(*this, EmitScalarExpr(E->getArg(0))), 2442 ConvertType(E->getType()))); 2443 } 2444 case Builtin::BI__annotation: { 2445 // Re-encode each wide string to UTF8 and make an MDString. 2446 SmallVector<Metadata *, 1> Strings; 2447 for (const Expr *Arg : E->arguments()) { 2448 const auto *Str = cast<StringLiteral>(Arg->IgnoreParenCasts()); 2449 assert(Str->getCharByteWidth() == 2); 2450 StringRef WideBytes = Str->getBytes(); 2451 std::string StrUtf8; 2452 if (!convertUTF16ToUTF8String( 2453 makeArrayRef(WideBytes.data(), WideBytes.size()), StrUtf8)) { 2454 CGM.ErrorUnsupported(E, "non-UTF16 __annotation argument"); 2455 continue; 2456 } 2457 Strings.push_back(llvm::MDString::get(getLLVMContext(), StrUtf8)); 2458 } 2459 2460 // Build and MDTuple of MDStrings and emit the intrinsic call. 2461 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::codeview_annotation, {}); 2462 MDTuple *StrTuple = MDTuple::get(getLLVMContext(), Strings); 2463 Builder.CreateCall(F, MetadataAsValue::get(getLLVMContext(), StrTuple)); 2464 return RValue::getIgnored(); 2465 } 2466 case Builtin::BI__builtin_annotation: { 2467 llvm::Value *AnnVal = EmitScalarExpr(E->getArg(0)); 2468 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::annotation, 2469 AnnVal->getType()); 2470 2471 // Get the annotation string, go through casts. Sema requires this to be a 2472 // non-wide string literal, potentially casted, so the cast<> is safe. 2473 const Expr *AnnotationStrExpr = E->getArg(1)->IgnoreParenCasts(); 2474 StringRef Str = cast<StringLiteral>(AnnotationStrExpr)->getString(); 2475 return RValue::get(EmitAnnotationCall(F, AnnVal, Str, E->getExprLoc())); 2476 } 2477 case Builtin::BI__builtin_addcb: 2478 case Builtin::BI__builtin_addcs: 2479 case Builtin::BI__builtin_addc: 2480 case Builtin::BI__builtin_addcl: 2481 case Builtin::BI__builtin_addcll: 2482 case Builtin::BI__builtin_subcb: 2483 case Builtin::BI__builtin_subcs: 2484 case Builtin::BI__builtin_subc: 2485 case Builtin::BI__builtin_subcl: 2486 case Builtin::BI__builtin_subcll: { 2487 2488 // We translate all of these builtins from expressions of the form: 2489 // int x = ..., y = ..., carryin = ..., carryout, result; 2490 // result = __builtin_addc(x, y, carryin, &carryout); 2491 // 2492 // to LLVM IR of the form: 2493 // 2494 // %tmp1 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y) 2495 // %tmpsum1 = extractvalue {i32, i1} %tmp1, 0 2496 // %carry1 = extractvalue {i32, i1} %tmp1, 1 2497 // %tmp2 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %tmpsum1, 2498 // i32 %carryin) 2499 // %result = extractvalue {i32, i1} %tmp2, 0 2500 // %carry2 = extractvalue {i32, i1} %tmp2, 1 2501 // %tmp3 = or i1 %carry1, %carry2 2502 // %tmp4 = zext i1 %tmp3 to i32 2503 // store i32 %tmp4, i32* %carryout 2504 2505 // Scalarize our inputs. 2506 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 2507 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 2508 llvm::Value *Carryin = EmitScalarExpr(E->getArg(2)); 2509 Address CarryOutPtr = EmitPointerWithAlignment(E->getArg(3)); 2510 2511 // Decide if we are lowering to a uadd.with.overflow or usub.with.overflow. 2512 llvm::Intrinsic::ID IntrinsicId; 2513 switch (BuiltinID) { 2514 default: llvm_unreachable("Unknown multiprecision builtin id."); 2515 case Builtin::BI__builtin_addcb: 2516 case Builtin::BI__builtin_addcs: 2517 case Builtin::BI__builtin_addc: 2518 case Builtin::BI__builtin_addcl: 2519 case Builtin::BI__builtin_addcll: 2520 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 2521 break; 2522 case Builtin::BI__builtin_subcb: 2523 case Builtin::BI__builtin_subcs: 2524 case Builtin::BI__builtin_subc: 2525 case Builtin::BI__builtin_subcl: 2526 case Builtin::BI__builtin_subcll: 2527 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 2528 break; 2529 } 2530 2531 // Construct our resulting LLVM IR expression. 2532 llvm::Value *Carry1; 2533 llvm::Value *Sum1 = EmitOverflowIntrinsic(*this, IntrinsicId, 2534 X, Y, Carry1); 2535 llvm::Value *Carry2; 2536 llvm::Value *Sum2 = EmitOverflowIntrinsic(*this, IntrinsicId, 2537 Sum1, Carryin, Carry2); 2538 llvm::Value *CarryOut = Builder.CreateZExt(Builder.CreateOr(Carry1, Carry2), 2539 X->getType()); 2540 Builder.CreateStore(CarryOut, CarryOutPtr); 2541 return RValue::get(Sum2); 2542 } 2543 2544 case Builtin::BI__builtin_add_overflow: 2545 case Builtin::BI__builtin_sub_overflow: 2546 case Builtin::BI__builtin_mul_overflow: { 2547 const clang::Expr *LeftArg = E->getArg(0); 2548 const clang::Expr *RightArg = E->getArg(1); 2549 const clang::Expr *ResultArg = E->getArg(2); 2550 2551 clang::QualType ResultQTy = 2552 ResultArg->getType()->castAs<PointerType>()->getPointeeType(); 2553 2554 WidthAndSignedness LeftInfo = 2555 getIntegerWidthAndSignedness(CGM.getContext(), LeftArg->getType()); 2556 WidthAndSignedness RightInfo = 2557 getIntegerWidthAndSignedness(CGM.getContext(), RightArg->getType()); 2558 WidthAndSignedness ResultInfo = 2559 getIntegerWidthAndSignedness(CGM.getContext(), ResultQTy); 2560 2561 // Handle mixed-sign multiplication as a special case, because adding 2562 // runtime or backend support for our generic irgen would be too expensive. 2563 if (isSpecialMixedSignMultiply(BuiltinID, LeftInfo, RightInfo, ResultInfo)) 2564 return EmitCheckedMixedSignMultiply(*this, LeftArg, LeftInfo, RightArg, 2565 RightInfo, ResultArg, ResultQTy, 2566 ResultInfo); 2567 2568 WidthAndSignedness EncompassingInfo = 2569 EncompassingIntegerType({LeftInfo, RightInfo, ResultInfo}); 2570 2571 llvm::Type *EncompassingLLVMTy = 2572 llvm::IntegerType::get(CGM.getLLVMContext(), EncompassingInfo.Width); 2573 2574 llvm::Type *ResultLLVMTy = CGM.getTypes().ConvertType(ResultQTy); 2575 2576 llvm::Intrinsic::ID IntrinsicId; 2577 switch (BuiltinID) { 2578 default: 2579 llvm_unreachable("Unknown overflow builtin id."); 2580 case Builtin::BI__builtin_add_overflow: 2581 IntrinsicId = EncompassingInfo.Signed 2582 ? llvm::Intrinsic::sadd_with_overflow 2583 : llvm::Intrinsic::uadd_with_overflow; 2584 break; 2585 case Builtin::BI__builtin_sub_overflow: 2586 IntrinsicId = EncompassingInfo.Signed 2587 ? llvm::Intrinsic::ssub_with_overflow 2588 : llvm::Intrinsic::usub_with_overflow; 2589 break; 2590 case Builtin::BI__builtin_mul_overflow: 2591 IntrinsicId = EncompassingInfo.Signed 2592 ? llvm::Intrinsic::smul_with_overflow 2593 : llvm::Intrinsic::umul_with_overflow; 2594 break; 2595 } 2596 2597 llvm::Value *Left = EmitScalarExpr(LeftArg); 2598 llvm::Value *Right = EmitScalarExpr(RightArg); 2599 Address ResultPtr = EmitPointerWithAlignment(ResultArg); 2600 2601 // Extend each operand to the encompassing type. 2602 Left = Builder.CreateIntCast(Left, EncompassingLLVMTy, LeftInfo.Signed); 2603 Right = Builder.CreateIntCast(Right, EncompassingLLVMTy, RightInfo.Signed); 2604 2605 // Perform the operation on the extended values. 2606 llvm::Value *Overflow, *Result; 2607 Result = EmitOverflowIntrinsic(*this, IntrinsicId, Left, Right, Overflow); 2608 2609 if (EncompassingInfo.Width > ResultInfo.Width) { 2610 // The encompassing type is wider than the result type, so we need to 2611 // truncate it. 2612 llvm::Value *ResultTrunc = Builder.CreateTrunc(Result, ResultLLVMTy); 2613 2614 // To see if the truncation caused an overflow, we will extend 2615 // the result and then compare it to the original result. 2616 llvm::Value *ResultTruncExt = Builder.CreateIntCast( 2617 ResultTrunc, EncompassingLLVMTy, ResultInfo.Signed); 2618 llvm::Value *TruncationOverflow = 2619 Builder.CreateICmpNE(Result, ResultTruncExt); 2620 2621 Overflow = Builder.CreateOr(Overflow, TruncationOverflow); 2622 Result = ResultTrunc; 2623 } 2624 2625 // Finally, store the result using the pointer. 2626 bool isVolatile = 2627 ResultArg->getType()->getPointeeType().isVolatileQualified(); 2628 Builder.CreateStore(EmitToMemory(Result, ResultQTy), ResultPtr, isVolatile); 2629 2630 return RValue::get(Overflow); 2631 } 2632 2633 case Builtin::BI__builtin_uadd_overflow: 2634 case Builtin::BI__builtin_uaddl_overflow: 2635 case Builtin::BI__builtin_uaddll_overflow: 2636 case Builtin::BI__builtin_usub_overflow: 2637 case Builtin::BI__builtin_usubl_overflow: 2638 case Builtin::BI__builtin_usubll_overflow: 2639 case Builtin::BI__builtin_umul_overflow: 2640 case Builtin::BI__builtin_umull_overflow: 2641 case Builtin::BI__builtin_umulll_overflow: 2642 case Builtin::BI__builtin_sadd_overflow: 2643 case Builtin::BI__builtin_saddl_overflow: 2644 case Builtin::BI__builtin_saddll_overflow: 2645 case Builtin::BI__builtin_ssub_overflow: 2646 case Builtin::BI__builtin_ssubl_overflow: 2647 case Builtin::BI__builtin_ssubll_overflow: 2648 case Builtin::BI__builtin_smul_overflow: 2649 case Builtin::BI__builtin_smull_overflow: 2650 case Builtin::BI__builtin_smulll_overflow: { 2651 2652 // We translate all of these builtins directly to the relevant llvm IR node. 2653 2654 // Scalarize our inputs. 2655 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 2656 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 2657 Address SumOutPtr = EmitPointerWithAlignment(E->getArg(2)); 2658 2659 // Decide which of the overflow intrinsics we are lowering to: 2660 llvm::Intrinsic::ID IntrinsicId; 2661 switch (BuiltinID) { 2662 default: llvm_unreachable("Unknown overflow builtin id."); 2663 case Builtin::BI__builtin_uadd_overflow: 2664 case Builtin::BI__builtin_uaddl_overflow: 2665 case Builtin::BI__builtin_uaddll_overflow: 2666 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 2667 break; 2668 case Builtin::BI__builtin_usub_overflow: 2669 case Builtin::BI__builtin_usubl_overflow: 2670 case Builtin::BI__builtin_usubll_overflow: 2671 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 2672 break; 2673 case Builtin::BI__builtin_umul_overflow: 2674 case Builtin::BI__builtin_umull_overflow: 2675 case Builtin::BI__builtin_umulll_overflow: 2676 IntrinsicId = llvm::Intrinsic::umul_with_overflow; 2677 break; 2678 case Builtin::BI__builtin_sadd_overflow: 2679 case Builtin::BI__builtin_saddl_overflow: 2680 case Builtin::BI__builtin_saddll_overflow: 2681 IntrinsicId = llvm::Intrinsic::sadd_with_overflow; 2682 break; 2683 case Builtin::BI__builtin_ssub_overflow: 2684 case Builtin::BI__builtin_ssubl_overflow: 2685 case Builtin::BI__builtin_ssubll_overflow: 2686 IntrinsicId = llvm::Intrinsic::ssub_with_overflow; 2687 break; 2688 case Builtin::BI__builtin_smul_overflow: 2689 case Builtin::BI__builtin_smull_overflow: 2690 case Builtin::BI__builtin_smulll_overflow: 2691 IntrinsicId = llvm::Intrinsic::smul_with_overflow; 2692 break; 2693 } 2694 2695 2696 llvm::Value *Carry; 2697 llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry); 2698 Builder.CreateStore(Sum, SumOutPtr); 2699 2700 return RValue::get(Carry); 2701 } 2702 case Builtin::BI__builtin_addressof: 2703 return RValue::get(EmitLValue(E->getArg(0)).getPointer()); 2704 case Builtin::BI__builtin_operator_new: 2705 return EmitBuiltinNewDeleteCall( 2706 E->getCallee()->getType()->castAs<FunctionProtoType>(), E, false); 2707 case Builtin::BI__builtin_operator_delete: 2708 return EmitBuiltinNewDeleteCall( 2709 E->getCallee()->getType()->castAs<FunctionProtoType>(), E, true); 2710 2711 case Builtin::BI__noop: 2712 // __noop always evaluates to an integer literal zero. 2713 return RValue::get(ConstantInt::get(IntTy, 0)); 2714 case Builtin::BI__builtin_call_with_static_chain: { 2715 const CallExpr *Call = cast<CallExpr>(E->getArg(0)); 2716 const Expr *Chain = E->getArg(1); 2717 return EmitCall(Call->getCallee()->getType(), 2718 EmitCallee(Call->getCallee()), Call, ReturnValue, 2719 EmitScalarExpr(Chain)); 2720 } 2721 case Builtin::BI_InterlockedExchange8: 2722 case Builtin::BI_InterlockedExchange16: 2723 case Builtin::BI_InterlockedExchange: 2724 case Builtin::BI_InterlockedExchangePointer: 2725 return RValue::get( 2726 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E)); 2727 case Builtin::BI_InterlockedCompareExchangePointer: { 2728 llvm::Type *RTy; 2729 llvm::IntegerType *IntType = 2730 IntegerType::get(getLLVMContext(), 2731 getContext().getTypeSize(E->getType())); 2732 llvm::Type *IntPtrType = IntType->getPointerTo(); 2733 2734 llvm::Value *Destination = 2735 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), IntPtrType); 2736 2737 llvm::Value *Exchange = EmitScalarExpr(E->getArg(1)); 2738 RTy = Exchange->getType(); 2739 Exchange = Builder.CreatePtrToInt(Exchange, IntType); 2740 2741 llvm::Value *Comparand = 2742 Builder.CreatePtrToInt(EmitScalarExpr(E->getArg(2)), IntType); 2743 2744 auto Result = 2745 Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 2746 AtomicOrdering::SequentiallyConsistent, 2747 AtomicOrdering::SequentiallyConsistent); 2748 Result->setVolatile(true); 2749 2750 return RValue::get(Builder.CreateIntToPtr(Builder.CreateExtractValue(Result, 2751 0), 2752 RTy)); 2753 } 2754 case Builtin::BI_InterlockedCompareExchange8: 2755 case Builtin::BI_InterlockedCompareExchange16: 2756 case Builtin::BI_InterlockedCompareExchange: 2757 case Builtin::BI_InterlockedCompareExchange64: { 2758 AtomicCmpXchgInst *CXI = Builder.CreateAtomicCmpXchg( 2759 EmitScalarExpr(E->getArg(0)), 2760 EmitScalarExpr(E->getArg(2)), 2761 EmitScalarExpr(E->getArg(1)), 2762 AtomicOrdering::SequentiallyConsistent, 2763 AtomicOrdering::SequentiallyConsistent); 2764 CXI->setVolatile(true); 2765 return RValue::get(Builder.CreateExtractValue(CXI, 0)); 2766 } 2767 case Builtin::BI_InterlockedIncrement16: 2768 case Builtin::BI_InterlockedIncrement: 2769 return RValue::get( 2770 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E)); 2771 case Builtin::BI_InterlockedDecrement16: 2772 case Builtin::BI_InterlockedDecrement: 2773 return RValue::get( 2774 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E)); 2775 case Builtin::BI_InterlockedAnd8: 2776 case Builtin::BI_InterlockedAnd16: 2777 case Builtin::BI_InterlockedAnd: 2778 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E)); 2779 case Builtin::BI_InterlockedExchangeAdd8: 2780 case Builtin::BI_InterlockedExchangeAdd16: 2781 case Builtin::BI_InterlockedExchangeAdd: 2782 return RValue::get( 2783 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E)); 2784 case Builtin::BI_InterlockedExchangeSub8: 2785 case Builtin::BI_InterlockedExchangeSub16: 2786 case Builtin::BI_InterlockedExchangeSub: 2787 return RValue::get( 2788 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E)); 2789 case Builtin::BI_InterlockedOr8: 2790 case Builtin::BI_InterlockedOr16: 2791 case Builtin::BI_InterlockedOr: 2792 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E)); 2793 case Builtin::BI_InterlockedXor8: 2794 case Builtin::BI_InterlockedXor16: 2795 case Builtin::BI_InterlockedXor: 2796 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E)); 2797 case Builtin::BI_interlockedbittestandset: 2798 return RValue::get( 2799 EmitMSVCBuiltinExpr(MSVCIntrin::_interlockedbittestandset, E)); 2800 2801 case Builtin::BI__exception_code: 2802 case Builtin::BI_exception_code: 2803 return RValue::get(EmitSEHExceptionCode()); 2804 case Builtin::BI__exception_info: 2805 case Builtin::BI_exception_info: 2806 return RValue::get(EmitSEHExceptionInfo()); 2807 case Builtin::BI__abnormal_termination: 2808 case Builtin::BI_abnormal_termination: 2809 return RValue::get(EmitSEHAbnormalTermination()); 2810 case Builtin::BI_setjmpex: { 2811 if (getTarget().getTriple().isOSMSVCRT()) { 2812 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 2813 llvm::AttributeList ReturnsTwiceAttr = llvm::AttributeList::get( 2814 getLLVMContext(), llvm::AttributeList::FunctionIndex, 2815 llvm::Attribute::ReturnsTwice); 2816 llvm::Constant *SetJmpEx = CGM.CreateRuntimeFunction( 2817 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 2818 "_setjmpex", ReturnsTwiceAttr, /*Local=*/true); 2819 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 2820 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 2821 llvm::Value *FrameAddr = 2822 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2823 ConstantInt::get(Int32Ty, 0)); 2824 llvm::Value *Args[] = {Buf, FrameAddr}; 2825 llvm::CallSite CS = EmitRuntimeCallOrInvoke(SetJmpEx, Args); 2826 CS.setAttributes(ReturnsTwiceAttr); 2827 return RValue::get(CS.getInstruction()); 2828 } 2829 break; 2830 } 2831 case Builtin::BI_setjmp: { 2832 if (getTarget().getTriple().isOSMSVCRT()) { 2833 llvm::AttributeList ReturnsTwiceAttr = llvm::AttributeList::get( 2834 getLLVMContext(), llvm::AttributeList::FunctionIndex, 2835 llvm::Attribute::ReturnsTwice); 2836 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 2837 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 2838 llvm::CallSite CS; 2839 if (getTarget().getTriple().getArch() == llvm::Triple::x86) { 2840 llvm::Type *ArgTypes[] = {Int8PtrTy, IntTy}; 2841 llvm::Constant *SetJmp3 = CGM.CreateRuntimeFunction( 2842 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/true), 2843 "_setjmp3", ReturnsTwiceAttr, /*Local=*/true); 2844 llvm::Value *Count = ConstantInt::get(IntTy, 0); 2845 llvm::Value *Args[] = {Buf, Count}; 2846 CS = EmitRuntimeCallOrInvoke(SetJmp3, Args); 2847 } else { 2848 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 2849 llvm::Constant *SetJmp = CGM.CreateRuntimeFunction( 2850 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 2851 "_setjmp", ReturnsTwiceAttr, /*Local=*/true); 2852 llvm::Value *FrameAddr = 2853 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2854 ConstantInt::get(Int32Ty, 0)); 2855 llvm::Value *Args[] = {Buf, FrameAddr}; 2856 CS = EmitRuntimeCallOrInvoke(SetJmp, Args); 2857 } 2858 CS.setAttributes(ReturnsTwiceAttr); 2859 return RValue::get(CS.getInstruction()); 2860 } 2861 break; 2862 } 2863 2864 case Builtin::BI__GetExceptionInfo: { 2865 if (llvm::GlobalVariable *GV = 2866 CGM.getCXXABI().getThrowInfo(FD->getParamDecl(0)->getType())) 2867 return RValue::get(llvm::ConstantExpr::getBitCast(GV, CGM.Int8PtrTy)); 2868 break; 2869 } 2870 2871 case Builtin::BI__fastfail: 2872 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::__fastfail, E)); 2873 2874 case Builtin::BI__builtin_coro_size: { 2875 auto & Context = getContext(); 2876 auto SizeTy = Context.getSizeType(); 2877 auto T = Builder.getIntNTy(Context.getTypeSize(SizeTy)); 2878 Value *F = CGM.getIntrinsic(Intrinsic::coro_size, T); 2879 return RValue::get(Builder.CreateCall(F)); 2880 } 2881 2882 case Builtin::BI__builtin_coro_id: 2883 return EmitCoroutineIntrinsic(E, Intrinsic::coro_id); 2884 case Builtin::BI__builtin_coro_promise: 2885 return EmitCoroutineIntrinsic(E, Intrinsic::coro_promise); 2886 case Builtin::BI__builtin_coro_resume: 2887 return EmitCoroutineIntrinsic(E, Intrinsic::coro_resume); 2888 case Builtin::BI__builtin_coro_frame: 2889 return EmitCoroutineIntrinsic(E, Intrinsic::coro_frame); 2890 case Builtin::BI__builtin_coro_noop: 2891 return EmitCoroutineIntrinsic(E, Intrinsic::coro_noop); 2892 case Builtin::BI__builtin_coro_free: 2893 return EmitCoroutineIntrinsic(E, Intrinsic::coro_free); 2894 case Builtin::BI__builtin_coro_destroy: 2895 return EmitCoroutineIntrinsic(E, Intrinsic::coro_destroy); 2896 case Builtin::BI__builtin_coro_done: 2897 return EmitCoroutineIntrinsic(E, Intrinsic::coro_done); 2898 case Builtin::BI__builtin_coro_alloc: 2899 return EmitCoroutineIntrinsic(E, Intrinsic::coro_alloc); 2900 case Builtin::BI__builtin_coro_begin: 2901 return EmitCoroutineIntrinsic(E, Intrinsic::coro_begin); 2902 case Builtin::BI__builtin_coro_end: 2903 return EmitCoroutineIntrinsic(E, Intrinsic::coro_end); 2904 case Builtin::BI__builtin_coro_suspend: 2905 return EmitCoroutineIntrinsic(E, Intrinsic::coro_suspend); 2906 case Builtin::BI__builtin_coro_param: 2907 return EmitCoroutineIntrinsic(E, Intrinsic::coro_param); 2908 2909 // OpenCL v2.0 s6.13.16.2, Built-in pipe read and write functions 2910 case Builtin::BIread_pipe: 2911 case Builtin::BIwrite_pipe: { 2912 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2913 *Arg1 = EmitScalarExpr(E->getArg(1)); 2914 CGOpenCLRuntime OpenCLRT(CGM); 2915 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2916 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2917 2918 // Type of the generic packet parameter. 2919 unsigned GenericAS = 2920 getContext().getTargetAddressSpace(LangAS::opencl_generic); 2921 llvm::Type *I8PTy = llvm::PointerType::get( 2922 llvm::Type::getInt8Ty(getLLVMContext()), GenericAS); 2923 2924 // Testing which overloaded version we should generate the call for. 2925 if (2U == E->getNumArgs()) { 2926 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_2" 2927 : "__write_pipe_2"; 2928 // Creating a generic function type to be able to call with any builtin or 2929 // user defined type. 2930 llvm::Type *ArgTys[] = {Arg0->getType(), I8PTy, Int32Ty, Int32Ty}; 2931 llvm::FunctionType *FTy = llvm::FunctionType::get( 2932 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2933 Value *BCast = Builder.CreatePointerCast(Arg1, I8PTy); 2934 return RValue::get( 2935 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2936 {Arg0, BCast, PacketSize, PacketAlign})); 2937 } else { 2938 assert(4 == E->getNumArgs() && 2939 "Illegal number of parameters to pipe function"); 2940 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_4" 2941 : "__write_pipe_4"; 2942 2943 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, I8PTy, 2944 Int32Ty, Int32Ty}; 2945 Value *Arg2 = EmitScalarExpr(E->getArg(2)), 2946 *Arg3 = EmitScalarExpr(E->getArg(3)); 2947 llvm::FunctionType *FTy = llvm::FunctionType::get( 2948 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2949 Value *BCast = Builder.CreatePointerCast(Arg3, I8PTy); 2950 // We know the third argument is an integer type, but we may need to cast 2951 // it to i32. 2952 if (Arg2->getType() != Int32Ty) 2953 Arg2 = Builder.CreateZExtOrTrunc(Arg2, Int32Ty); 2954 return RValue::get(Builder.CreateCall( 2955 CGM.CreateRuntimeFunction(FTy, Name), 2956 {Arg0, Arg1, Arg2, BCast, PacketSize, PacketAlign})); 2957 } 2958 } 2959 // OpenCL v2.0 s6.13.16 ,s9.17.3.5 - Built-in pipe reserve read and write 2960 // functions 2961 case Builtin::BIreserve_read_pipe: 2962 case Builtin::BIreserve_write_pipe: 2963 case Builtin::BIwork_group_reserve_read_pipe: 2964 case Builtin::BIwork_group_reserve_write_pipe: 2965 case Builtin::BIsub_group_reserve_read_pipe: 2966 case Builtin::BIsub_group_reserve_write_pipe: { 2967 // Composing the mangled name for the function. 2968 const char *Name; 2969 if (BuiltinID == Builtin::BIreserve_read_pipe) 2970 Name = "__reserve_read_pipe"; 2971 else if (BuiltinID == Builtin::BIreserve_write_pipe) 2972 Name = "__reserve_write_pipe"; 2973 else if (BuiltinID == Builtin::BIwork_group_reserve_read_pipe) 2974 Name = "__work_group_reserve_read_pipe"; 2975 else if (BuiltinID == Builtin::BIwork_group_reserve_write_pipe) 2976 Name = "__work_group_reserve_write_pipe"; 2977 else if (BuiltinID == Builtin::BIsub_group_reserve_read_pipe) 2978 Name = "__sub_group_reserve_read_pipe"; 2979 else 2980 Name = "__sub_group_reserve_write_pipe"; 2981 2982 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2983 *Arg1 = EmitScalarExpr(E->getArg(1)); 2984 llvm::Type *ReservedIDTy = ConvertType(getContext().OCLReserveIDTy); 2985 CGOpenCLRuntime OpenCLRT(CGM); 2986 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2987 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2988 2989 // Building the generic function prototype. 2990 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty, Int32Ty}; 2991 llvm::FunctionType *FTy = llvm::FunctionType::get( 2992 ReservedIDTy, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2993 // We know the second argument is an integer type, but we may need to cast 2994 // it to i32. 2995 if (Arg1->getType() != Int32Ty) 2996 Arg1 = Builder.CreateZExtOrTrunc(Arg1, Int32Ty); 2997 return RValue::get( 2998 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2999 {Arg0, Arg1, PacketSize, PacketAlign})); 3000 } 3001 // OpenCL v2.0 s6.13.16, s9.17.3.5 - Built-in pipe commit read and write 3002 // functions 3003 case Builtin::BIcommit_read_pipe: 3004 case Builtin::BIcommit_write_pipe: 3005 case Builtin::BIwork_group_commit_read_pipe: 3006 case Builtin::BIwork_group_commit_write_pipe: 3007 case Builtin::BIsub_group_commit_read_pipe: 3008 case Builtin::BIsub_group_commit_write_pipe: { 3009 const char *Name; 3010 if (BuiltinID == Builtin::BIcommit_read_pipe) 3011 Name = "__commit_read_pipe"; 3012 else if (BuiltinID == Builtin::BIcommit_write_pipe) 3013 Name = "__commit_write_pipe"; 3014 else if (BuiltinID == Builtin::BIwork_group_commit_read_pipe) 3015 Name = "__work_group_commit_read_pipe"; 3016 else if (BuiltinID == Builtin::BIwork_group_commit_write_pipe) 3017 Name = "__work_group_commit_write_pipe"; 3018 else if (BuiltinID == Builtin::BIsub_group_commit_read_pipe) 3019 Name = "__sub_group_commit_read_pipe"; 3020 else 3021 Name = "__sub_group_commit_write_pipe"; 3022 3023 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 3024 *Arg1 = EmitScalarExpr(E->getArg(1)); 3025 CGOpenCLRuntime OpenCLRT(CGM); 3026 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 3027 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 3028 3029 // Building the generic function prototype. 3030 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, Int32Ty}; 3031 llvm::FunctionType *FTy = 3032 llvm::FunctionType::get(llvm::Type::getVoidTy(getLLVMContext()), 3033 llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3034 3035 return RValue::get( 3036 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3037 {Arg0, Arg1, PacketSize, PacketAlign})); 3038 } 3039 // OpenCL v2.0 s6.13.16.4 Built-in pipe query functions 3040 case Builtin::BIget_pipe_num_packets: 3041 case Builtin::BIget_pipe_max_packets: { 3042 const char *BaseName; 3043 const PipeType *PipeTy = E->getArg(0)->getType()->getAs<PipeType>(); 3044 if (BuiltinID == Builtin::BIget_pipe_num_packets) 3045 BaseName = "__get_pipe_num_packets"; 3046 else 3047 BaseName = "__get_pipe_max_packets"; 3048 auto Name = std::string(BaseName) + 3049 std::string(PipeTy->isReadOnly() ? "_ro" : "_wo"); 3050 3051 // Building the generic function prototype. 3052 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 3053 CGOpenCLRuntime OpenCLRT(CGM); 3054 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 3055 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 3056 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty}; 3057 llvm::FunctionType *FTy = llvm::FunctionType::get( 3058 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3059 3060 return RValue::get(Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3061 {Arg0, PacketSize, PacketAlign})); 3062 } 3063 3064 // OpenCL v2.0 s6.13.9 - Address space qualifier functions. 3065 case Builtin::BIto_global: 3066 case Builtin::BIto_local: 3067 case Builtin::BIto_private: { 3068 auto Arg0 = EmitScalarExpr(E->getArg(0)); 3069 auto NewArgT = llvm::PointerType::get(Int8Ty, 3070 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3071 auto NewRetT = llvm::PointerType::get(Int8Ty, 3072 CGM.getContext().getTargetAddressSpace( 3073 E->getType()->getPointeeType().getAddressSpace())); 3074 auto FTy = llvm::FunctionType::get(NewRetT, {NewArgT}, false); 3075 llvm::Value *NewArg; 3076 if (Arg0->getType()->getPointerAddressSpace() != 3077 NewArgT->getPointerAddressSpace()) 3078 NewArg = Builder.CreateAddrSpaceCast(Arg0, NewArgT); 3079 else 3080 NewArg = Builder.CreateBitOrPointerCast(Arg0, NewArgT); 3081 auto NewName = std::string("__") + E->getDirectCallee()->getName().str(); 3082 auto NewCall = 3083 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, NewName), {NewArg}); 3084 return RValue::get(Builder.CreateBitOrPointerCast(NewCall, 3085 ConvertType(E->getType()))); 3086 } 3087 3088 // OpenCL v2.0, s6.13.17 - Enqueue kernel function. 3089 // It contains four different overload formats specified in Table 6.13.17.1. 3090 case Builtin::BIenqueue_kernel: { 3091 StringRef Name; // Generated function call name 3092 unsigned NumArgs = E->getNumArgs(); 3093 3094 llvm::Type *QueueTy = ConvertType(getContext().OCLQueueTy); 3095 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3096 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3097 3098 llvm::Value *Queue = EmitScalarExpr(E->getArg(0)); 3099 llvm::Value *Flags = EmitScalarExpr(E->getArg(1)); 3100 LValue NDRangeL = EmitAggExprToLValue(E->getArg(2)); 3101 llvm::Value *Range = NDRangeL.getAddress().getPointer(); 3102 llvm::Type *RangeTy = NDRangeL.getAddress().getType(); 3103 3104 if (NumArgs == 4) { 3105 // The most basic form of the call with parameters: 3106 // queue_t, kernel_enqueue_flags_t, ndrange_t, block(void) 3107 Name = "__enqueue_kernel_basic"; 3108 llvm::Type *ArgTys[] = {QueueTy, Int32Ty, RangeTy, GenericVoidPtrTy, 3109 GenericVoidPtrTy}; 3110 llvm::FunctionType *FTy = llvm::FunctionType::get( 3111 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3112 3113 auto Info = 3114 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(3)); 3115 llvm::Value *Kernel = 3116 Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3117 llvm::Value *Block = 3118 Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3119 3120 AttrBuilder B; 3121 B.addAttribute(Attribute::ByVal); 3122 llvm::AttributeList ByValAttrSet = 3123 llvm::AttributeList::get(CGM.getModule().getContext(), 3U, B); 3124 3125 auto RTCall = 3126 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name, ByValAttrSet), 3127 {Queue, Flags, Range, Kernel, Block}); 3128 RTCall->setAttributes(ByValAttrSet); 3129 return RValue::get(RTCall); 3130 } 3131 assert(NumArgs >= 5 && "Invalid enqueue_kernel signature"); 3132 3133 // Create a temporary array to hold the sizes of local pointer arguments 3134 // for the block. \p First is the position of the first size argument. 3135 auto CreateArrayForSizeVar = [=](unsigned First) { 3136 auto *AT = llvm::ArrayType::get(SizeTy, NumArgs - First); 3137 auto *Arr = Builder.CreateAlloca(AT); 3138 llvm::Value *Ptr; 3139 // Each of the following arguments specifies the size of the corresponding 3140 // argument passed to the enqueued block. 3141 auto *Zero = llvm::ConstantInt::get(IntTy, 0); 3142 for (unsigned I = First; I < NumArgs; ++I) { 3143 auto *Index = llvm::ConstantInt::get(IntTy, I - First); 3144 auto *GEP = Builder.CreateGEP(Arr, {Zero, Index}); 3145 if (I == First) 3146 Ptr = GEP; 3147 auto *V = 3148 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(I)), SizeTy); 3149 Builder.CreateAlignedStore( 3150 V, GEP, CGM.getDataLayout().getPrefTypeAlignment(SizeTy)); 3151 } 3152 return Ptr; 3153 }; 3154 3155 // Could have events and/or varargs. 3156 if (E->getArg(3)->getType()->isBlockPointerType()) { 3157 // No events passed, but has variadic arguments. 3158 Name = "__enqueue_kernel_varargs"; 3159 auto Info = 3160 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(3)); 3161 llvm::Value *Kernel = 3162 Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3163 auto *Block = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3164 auto *PtrToSizeArray = CreateArrayForSizeVar(4); 3165 3166 // Create a vector of the arguments, as well as a constant value to 3167 // express to the runtime the number of variadic arguments. 3168 std::vector<llvm::Value *> Args = { 3169 Queue, Flags, Range, 3170 Kernel, Block, ConstantInt::get(IntTy, NumArgs - 4), 3171 PtrToSizeArray}; 3172 std::vector<llvm::Type *> ArgTys = { 3173 QueueTy, IntTy, RangeTy, 3174 GenericVoidPtrTy, GenericVoidPtrTy, IntTy, 3175 PtrToSizeArray->getType()}; 3176 3177 llvm::FunctionType *FTy = llvm::FunctionType::get( 3178 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3179 return RValue::get( 3180 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3181 llvm::ArrayRef<llvm::Value *>(Args))); 3182 } 3183 // Any calls now have event arguments passed. 3184 if (NumArgs >= 7) { 3185 llvm::Type *EventTy = ConvertType(getContext().OCLClkEventTy); 3186 llvm::Type *EventPtrTy = EventTy->getPointerTo( 3187 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3188 3189 llvm::Value *NumEvents = 3190 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(3)), Int32Ty); 3191 llvm::Value *EventList = 3192 E->getArg(4)->getType()->isArrayType() 3193 ? EmitArrayToPointerDecay(E->getArg(4)).getPointer() 3194 : EmitScalarExpr(E->getArg(4)); 3195 llvm::Value *ClkEvent = EmitScalarExpr(E->getArg(5)); 3196 // Convert to generic address space. 3197 EventList = Builder.CreatePointerCast(EventList, EventPtrTy); 3198 ClkEvent = Builder.CreatePointerCast(ClkEvent, EventPtrTy); 3199 auto Info = 3200 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(6)); 3201 llvm::Value *Kernel = 3202 Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3203 llvm::Value *Block = 3204 Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3205 3206 std::vector<llvm::Type *> ArgTys = { 3207 QueueTy, Int32Ty, RangeTy, Int32Ty, 3208 EventPtrTy, EventPtrTy, GenericVoidPtrTy, GenericVoidPtrTy}; 3209 3210 std::vector<llvm::Value *> Args = {Queue, Flags, Range, NumEvents, 3211 EventList, ClkEvent, Kernel, Block}; 3212 3213 if (NumArgs == 7) { 3214 // Has events but no variadics. 3215 Name = "__enqueue_kernel_basic_events"; 3216 llvm::FunctionType *FTy = llvm::FunctionType::get( 3217 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3218 return RValue::get( 3219 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3220 llvm::ArrayRef<llvm::Value *>(Args))); 3221 } 3222 // Has event info and variadics 3223 // Pass the number of variadics to the runtime function too. 3224 Args.push_back(ConstantInt::get(Int32Ty, NumArgs - 7)); 3225 ArgTys.push_back(Int32Ty); 3226 Name = "__enqueue_kernel_events_varargs"; 3227 3228 auto *PtrToSizeArray = CreateArrayForSizeVar(7); 3229 Args.push_back(PtrToSizeArray); 3230 ArgTys.push_back(PtrToSizeArray->getType()); 3231 3232 llvm::FunctionType *FTy = llvm::FunctionType::get( 3233 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3234 return RValue::get( 3235 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3236 llvm::ArrayRef<llvm::Value *>(Args))); 3237 } 3238 LLVM_FALLTHROUGH; 3239 } 3240 // OpenCL v2.0 s6.13.17.6 - Kernel query functions need bitcast of block 3241 // parameter. 3242 case Builtin::BIget_kernel_work_group_size: { 3243 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3244 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3245 auto Info = 3246 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(0)); 3247 Value *Kernel = Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3248 Value *Arg = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3249 return RValue::get(Builder.CreateCall( 3250 CGM.CreateRuntimeFunction( 3251 llvm::FunctionType::get(IntTy, {GenericVoidPtrTy, GenericVoidPtrTy}, 3252 false), 3253 "__get_kernel_work_group_size_impl"), 3254 {Kernel, Arg})); 3255 } 3256 case Builtin::BIget_kernel_preferred_work_group_size_multiple: { 3257 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3258 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3259 auto Info = 3260 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(0)); 3261 Value *Kernel = Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3262 Value *Arg = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3263 return RValue::get(Builder.CreateCall( 3264 CGM.CreateRuntimeFunction( 3265 llvm::FunctionType::get(IntTy, {GenericVoidPtrTy, GenericVoidPtrTy}, 3266 false), 3267 "__get_kernel_preferred_work_group_size_multiple_impl"), 3268 {Kernel, Arg})); 3269 } 3270 case Builtin::BIget_kernel_max_sub_group_size_for_ndrange: 3271 case Builtin::BIget_kernel_sub_group_count_for_ndrange: { 3272 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3273 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3274 LValue NDRangeL = EmitAggExprToLValue(E->getArg(0)); 3275 llvm::Value *NDRange = NDRangeL.getAddress().getPointer(); 3276 auto Info = 3277 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(1)); 3278 Value *Kernel = Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3279 Value *Block = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3280 const char *Name = 3281 BuiltinID == Builtin::BIget_kernel_max_sub_group_size_for_ndrange 3282 ? "__get_kernel_max_sub_group_size_for_ndrange_impl" 3283 : "__get_kernel_sub_group_count_for_ndrange_impl"; 3284 return RValue::get(Builder.CreateCall( 3285 CGM.CreateRuntimeFunction( 3286 llvm::FunctionType::get( 3287 IntTy, {NDRange->getType(), GenericVoidPtrTy, GenericVoidPtrTy}, 3288 false), 3289 Name), 3290 {NDRange, Kernel, Block})); 3291 } 3292 3293 case Builtin::BI__builtin_store_half: 3294 case Builtin::BI__builtin_store_halff: { 3295 Value *Val = EmitScalarExpr(E->getArg(0)); 3296 Address Address = EmitPointerWithAlignment(E->getArg(1)); 3297 Value *HalfVal = Builder.CreateFPTrunc(Val, Builder.getHalfTy()); 3298 return RValue::get(Builder.CreateStore(HalfVal, Address)); 3299 } 3300 case Builtin::BI__builtin_load_half: { 3301 Address Address = EmitPointerWithAlignment(E->getArg(0)); 3302 Value *HalfVal = Builder.CreateLoad(Address); 3303 return RValue::get(Builder.CreateFPExt(HalfVal, Builder.getDoubleTy())); 3304 } 3305 case Builtin::BI__builtin_load_halff: { 3306 Address Address = EmitPointerWithAlignment(E->getArg(0)); 3307 Value *HalfVal = Builder.CreateLoad(Address); 3308 return RValue::get(Builder.CreateFPExt(HalfVal, Builder.getFloatTy())); 3309 } 3310 case Builtin::BIprintf: 3311 if (getTarget().getTriple().isNVPTX()) 3312 return EmitNVPTXDevicePrintfCallExpr(E, ReturnValue); 3313 break; 3314 case Builtin::BI__builtin_canonicalize: 3315 case Builtin::BI__builtin_canonicalizef: 3316 case Builtin::BI__builtin_canonicalizel: 3317 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::canonicalize)); 3318 3319 case Builtin::BI__builtin_thread_pointer: { 3320 if (!getContext().getTargetInfo().isTLSSupported()) 3321 CGM.ErrorUnsupported(E, "__builtin_thread_pointer"); 3322 // Fall through - it's already mapped to the intrinsic by GCCBuiltin. 3323 break; 3324 } 3325 case Builtin::BI__builtin_os_log_format: 3326 return emitBuiltinOSLogFormat(*E); 3327 3328 case Builtin::BI__builtin_os_log_format_buffer_size: { 3329 analyze_os_log::OSLogBufferLayout Layout; 3330 analyze_os_log::computeOSLogBufferLayout(CGM.getContext(), E, Layout); 3331 return RValue::get(ConstantInt::get(ConvertType(E->getType()), 3332 Layout.size().getQuantity())); 3333 } 3334 3335 case Builtin::BI__xray_customevent: { 3336 if (!ShouldXRayInstrumentFunction()) 3337 return RValue::getIgnored(); 3338 3339 if (!CGM.getCodeGenOpts().XRayInstrumentationBundle.has( 3340 XRayInstrKind::Custom)) 3341 return RValue::getIgnored(); 3342 3343 if (const auto *XRayAttr = CurFuncDecl->getAttr<XRayInstrumentAttr>()) 3344 if (XRayAttr->neverXRayInstrument() && !AlwaysEmitXRayCustomEvents()) 3345 return RValue::getIgnored(); 3346 3347 Function *F = CGM.getIntrinsic(Intrinsic::xray_customevent); 3348 auto FTy = F->getFunctionType(); 3349 auto Arg0 = E->getArg(0); 3350 auto Arg0Val = EmitScalarExpr(Arg0); 3351 auto Arg0Ty = Arg0->getType(); 3352 auto PTy0 = FTy->getParamType(0); 3353 if (PTy0 != Arg0Val->getType()) { 3354 if (Arg0Ty->isArrayType()) 3355 Arg0Val = EmitArrayToPointerDecay(Arg0).getPointer(); 3356 else 3357 Arg0Val = Builder.CreatePointerCast(Arg0Val, PTy0); 3358 } 3359 auto Arg1 = EmitScalarExpr(E->getArg(1)); 3360 auto PTy1 = FTy->getParamType(1); 3361 if (PTy1 != Arg1->getType()) 3362 Arg1 = Builder.CreateTruncOrBitCast(Arg1, PTy1); 3363 return RValue::get(Builder.CreateCall(F, {Arg0Val, Arg1})); 3364 } 3365 3366 case Builtin::BI__xray_typedevent: { 3367 // TODO: There should be a way to always emit events even if the current 3368 // function is not instrumented. Losing events in a stream can cripple 3369 // a trace. 3370 if (!ShouldXRayInstrumentFunction()) 3371 return RValue::getIgnored(); 3372 3373 if (!CGM.getCodeGenOpts().XRayInstrumentationBundle.has( 3374 XRayInstrKind::Typed)) 3375 return RValue::getIgnored(); 3376 3377 if (const auto *XRayAttr = CurFuncDecl->getAttr<XRayInstrumentAttr>()) 3378 if (XRayAttr->neverXRayInstrument() && !AlwaysEmitXRayTypedEvents()) 3379 return RValue::getIgnored(); 3380 3381 Function *F = CGM.getIntrinsic(Intrinsic::xray_typedevent); 3382 auto FTy = F->getFunctionType(); 3383 auto Arg0 = EmitScalarExpr(E->getArg(0)); 3384 auto PTy0 = FTy->getParamType(0); 3385 if (PTy0 != Arg0->getType()) 3386 Arg0 = Builder.CreateTruncOrBitCast(Arg0, PTy0); 3387 auto Arg1 = E->getArg(1); 3388 auto Arg1Val = EmitScalarExpr(Arg1); 3389 auto Arg1Ty = Arg1->getType(); 3390 auto PTy1 = FTy->getParamType(1); 3391 if (PTy1 != Arg1Val->getType()) { 3392 if (Arg1Ty->isArrayType()) 3393 Arg1Val = EmitArrayToPointerDecay(Arg1).getPointer(); 3394 else 3395 Arg1Val = Builder.CreatePointerCast(Arg1Val, PTy1); 3396 } 3397 auto Arg2 = EmitScalarExpr(E->getArg(2)); 3398 auto PTy2 = FTy->getParamType(2); 3399 if (PTy2 != Arg2->getType()) 3400 Arg2 = Builder.CreateTruncOrBitCast(Arg2, PTy2); 3401 return RValue::get(Builder.CreateCall(F, {Arg0, Arg1Val, Arg2})); 3402 } 3403 3404 case Builtin::BI__builtin_ms_va_start: 3405 case Builtin::BI__builtin_ms_va_end: 3406 return RValue::get( 3407 EmitVAStartEnd(EmitMSVAListRef(E->getArg(0)).getPointer(), 3408 BuiltinID == Builtin::BI__builtin_ms_va_start)); 3409 3410 case Builtin::BI__builtin_ms_va_copy: { 3411 // Lower this manually. We can't reliably determine whether or not any 3412 // given va_copy() is for a Win64 va_list from the calling convention 3413 // alone, because it's legal to do this from a System V ABI function. 3414 // With opaque pointer types, we won't have enough information in LLVM 3415 // IR to determine this from the argument types, either. Best to do it 3416 // now, while we have enough information. 3417 Address DestAddr = EmitMSVAListRef(E->getArg(0)); 3418 Address SrcAddr = EmitMSVAListRef(E->getArg(1)); 3419 3420 llvm::Type *BPP = Int8PtrPtrTy; 3421 3422 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), BPP, "cp"), 3423 DestAddr.getAlignment()); 3424 SrcAddr = Address(Builder.CreateBitCast(SrcAddr.getPointer(), BPP, "ap"), 3425 SrcAddr.getAlignment()); 3426 3427 Value *ArgPtr = Builder.CreateLoad(SrcAddr, "ap.val"); 3428 return RValue::get(Builder.CreateStore(ArgPtr, DestAddr)); 3429 } 3430 } 3431 3432 // If this is an alias for a lib function (e.g. __builtin_sin), emit 3433 // the call using the normal call path, but using the unmangled 3434 // version of the function name. 3435 if (getContext().BuiltinInfo.isLibFunction(BuiltinID)) 3436 return emitLibraryCall(*this, FD, E, 3437 CGM.getBuiltinLibFunction(FD, BuiltinID)); 3438 3439 // If this is a predefined lib function (e.g. malloc), emit the call 3440 // using exactly the normal call path. 3441 if (getContext().BuiltinInfo.isPredefinedLibFunction(BuiltinID)) 3442 return emitLibraryCall(*this, FD, E, 3443 cast<llvm::Constant>(EmitScalarExpr(E->getCallee()))); 3444 3445 // Check that a call to a target specific builtin has the correct target 3446 // features. 3447 // This is down here to avoid non-target specific builtins, however, if 3448 // generic builtins start to require generic target features then we 3449 // can move this up to the beginning of the function. 3450 checkTargetFeatures(E, FD); 3451 3452 // See if we have a target specific intrinsic. 3453 const char *Name = getContext().BuiltinInfo.getName(BuiltinID); 3454 Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; 3455 StringRef Prefix = 3456 llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch()); 3457 if (!Prefix.empty()) { 3458 IntrinsicID = Intrinsic::getIntrinsicForGCCBuiltin(Prefix.data(), Name); 3459 // NOTE we don't need to perform a compatibility flag check here since the 3460 // intrinsics are declared in Builtins*.def via LANGBUILTIN which filter the 3461 // MS builtins via ALL_MS_LANGUAGES and are filtered earlier. 3462 if (IntrinsicID == Intrinsic::not_intrinsic) 3463 IntrinsicID = Intrinsic::getIntrinsicForMSBuiltin(Prefix.data(), Name); 3464 } 3465 3466 if (IntrinsicID != Intrinsic::not_intrinsic) { 3467 SmallVector<Value*, 16> Args; 3468 3469 // Find out if any arguments are required to be integer constant 3470 // expressions. 3471 unsigned ICEArguments = 0; 3472 ASTContext::GetBuiltinTypeError Error; 3473 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 3474 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 3475 3476 Function *F = CGM.getIntrinsic(IntrinsicID); 3477 llvm::FunctionType *FTy = F->getFunctionType(); 3478 3479 for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) { 3480 Value *ArgValue; 3481 // If this is a normal argument, just emit it as a scalar. 3482 if ((ICEArguments & (1 << i)) == 0) { 3483 ArgValue = EmitScalarExpr(E->getArg(i)); 3484 } else { 3485 // If this is required to be a constant, constant fold it so that we 3486 // know that the generated intrinsic gets a ConstantInt. 3487 llvm::APSInt Result; 3488 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result,getContext()); 3489 assert(IsConst && "Constant arg isn't actually constant?"); 3490 (void)IsConst; 3491 ArgValue = llvm::ConstantInt::get(getLLVMContext(), Result); 3492 } 3493 3494 // If the intrinsic arg type is different from the builtin arg type 3495 // we need to do a bit cast. 3496 llvm::Type *PTy = FTy->getParamType(i); 3497 if (PTy != ArgValue->getType()) { 3498 assert(PTy->canLosslesslyBitCastTo(FTy->getParamType(i)) && 3499 "Must be able to losslessly bit cast to param"); 3500 ArgValue = Builder.CreateBitCast(ArgValue, PTy); 3501 } 3502 3503 Args.push_back(ArgValue); 3504 } 3505 3506 Value *V = Builder.CreateCall(F, Args); 3507 QualType BuiltinRetType = E->getType(); 3508 3509 llvm::Type *RetTy = VoidTy; 3510 if (!BuiltinRetType->isVoidType()) 3511 RetTy = ConvertType(BuiltinRetType); 3512 3513 if (RetTy != V->getType()) { 3514 assert(V->getType()->canLosslesslyBitCastTo(RetTy) && 3515 "Must be able to losslessly bit cast result type"); 3516 V = Builder.CreateBitCast(V, RetTy); 3517 } 3518 3519 return RValue::get(V); 3520 } 3521 3522 // See if we have a target specific builtin that needs to be lowered. 3523 if (Value *V = EmitTargetBuiltinExpr(BuiltinID, E)) 3524 return RValue::get(V); 3525 3526 ErrorUnsupported(E, "builtin function"); 3527 3528 // Unknown builtin, for now just dump it out and return undef. 3529 return GetUndefRValue(E->getType()); 3530 } 3531 3532 static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF, 3533 unsigned BuiltinID, const CallExpr *E, 3534 llvm::Triple::ArchType Arch) { 3535 switch (Arch) { 3536 case llvm::Triple::arm: 3537 case llvm::Triple::armeb: 3538 case llvm::Triple::thumb: 3539 case llvm::Triple::thumbeb: 3540 return CGF->EmitARMBuiltinExpr(BuiltinID, E, Arch); 3541 case llvm::Triple::aarch64: 3542 case llvm::Triple::aarch64_be: 3543 return CGF->EmitAArch64BuiltinExpr(BuiltinID, E, Arch); 3544 case llvm::Triple::x86: 3545 case llvm::Triple::x86_64: 3546 return CGF->EmitX86BuiltinExpr(BuiltinID, E); 3547 case llvm::Triple::ppc: 3548 case llvm::Triple::ppc64: 3549 case llvm::Triple::ppc64le: 3550 return CGF->EmitPPCBuiltinExpr(BuiltinID, E); 3551 case llvm::Triple::r600: 3552 case llvm::Triple::amdgcn: 3553 return CGF->EmitAMDGPUBuiltinExpr(BuiltinID, E); 3554 case llvm::Triple::systemz: 3555 return CGF->EmitSystemZBuiltinExpr(BuiltinID, E); 3556 case llvm::Triple::nvptx: 3557 case llvm::Triple::nvptx64: 3558 return CGF->EmitNVPTXBuiltinExpr(BuiltinID, E); 3559 case llvm::Triple::wasm32: 3560 case llvm::Triple::wasm64: 3561 return CGF->EmitWebAssemblyBuiltinExpr(BuiltinID, E); 3562 case llvm::Triple::hexagon: 3563 return CGF->EmitHexagonBuiltinExpr(BuiltinID, E); 3564 default: 3565 return nullptr; 3566 } 3567 } 3568 3569 Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID, 3570 const CallExpr *E) { 3571 if (getContext().BuiltinInfo.isAuxBuiltinID(BuiltinID)) { 3572 assert(getContext().getAuxTargetInfo() && "Missing aux target info"); 3573 return EmitTargetArchBuiltinExpr( 3574 this, getContext().BuiltinInfo.getAuxBuiltinID(BuiltinID), E, 3575 getContext().getAuxTargetInfo()->getTriple().getArch()); 3576 } 3577 3578 return EmitTargetArchBuiltinExpr(this, BuiltinID, E, 3579 getTarget().getTriple().getArch()); 3580 } 3581 3582 static llvm::VectorType *GetNeonType(CodeGenFunction *CGF, 3583 NeonTypeFlags TypeFlags, 3584 bool HasLegalHalfType=true, 3585 bool V1Ty=false) { 3586 int IsQuad = TypeFlags.isQuad(); 3587 switch (TypeFlags.getEltType()) { 3588 case NeonTypeFlags::Int8: 3589 case NeonTypeFlags::Poly8: 3590 return llvm::VectorType::get(CGF->Int8Ty, V1Ty ? 1 : (8 << IsQuad)); 3591 case NeonTypeFlags::Int16: 3592 case NeonTypeFlags::Poly16: 3593 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 3594 case NeonTypeFlags::Float16: 3595 if (HasLegalHalfType) 3596 return llvm::VectorType::get(CGF->HalfTy, V1Ty ? 1 : (4 << IsQuad)); 3597 else 3598 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 3599 case NeonTypeFlags::Int32: 3600 return llvm::VectorType::get(CGF->Int32Ty, V1Ty ? 1 : (2 << IsQuad)); 3601 case NeonTypeFlags::Int64: 3602 case NeonTypeFlags::Poly64: 3603 return llvm::VectorType::get(CGF->Int64Ty, V1Ty ? 1 : (1 << IsQuad)); 3604 case NeonTypeFlags::Poly128: 3605 // FIXME: i128 and f128 doesn't get fully support in Clang and llvm. 3606 // There is a lot of i128 and f128 API missing. 3607 // so we use v16i8 to represent poly128 and get pattern matched. 3608 return llvm::VectorType::get(CGF->Int8Ty, 16); 3609 case NeonTypeFlags::Float32: 3610 return llvm::VectorType::get(CGF->FloatTy, V1Ty ? 1 : (2 << IsQuad)); 3611 case NeonTypeFlags::Float64: 3612 return llvm::VectorType::get(CGF->DoubleTy, V1Ty ? 1 : (1 << IsQuad)); 3613 } 3614 llvm_unreachable("Unknown vector element type!"); 3615 } 3616 3617 static llvm::VectorType *GetFloatNeonType(CodeGenFunction *CGF, 3618 NeonTypeFlags IntTypeFlags) { 3619 int IsQuad = IntTypeFlags.isQuad(); 3620 switch (IntTypeFlags.getEltType()) { 3621 case NeonTypeFlags::Int16: 3622 return llvm::VectorType::get(CGF->HalfTy, (4 << IsQuad)); 3623 case NeonTypeFlags::Int32: 3624 return llvm::VectorType::get(CGF->FloatTy, (2 << IsQuad)); 3625 case NeonTypeFlags::Int64: 3626 return llvm::VectorType::get(CGF->DoubleTy, (1 << IsQuad)); 3627 default: 3628 llvm_unreachable("Type can't be converted to floating-point!"); 3629 } 3630 } 3631 3632 Value *CodeGenFunction::EmitNeonSplat(Value *V, Constant *C) { 3633 unsigned nElts = V->getType()->getVectorNumElements(); 3634 Value* SV = llvm::ConstantVector::getSplat(nElts, C); 3635 return Builder.CreateShuffleVector(V, V, SV, "lane"); 3636 } 3637 3638 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, 3639 const char *name, 3640 unsigned shift, bool rightshift) { 3641 unsigned j = 0; 3642 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 3643 ai != ae; ++ai, ++j) 3644 if (shift > 0 && shift == j) 3645 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); 3646 else 3647 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); 3648 3649 return Builder.CreateCall(F, Ops, name); 3650 } 3651 3652 Value *CodeGenFunction::EmitNeonShiftVector(Value *V, llvm::Type *Ty, 3653 bool neg) { 3654 int SV = cast<ConstantInt>(V)->getSExtValue(); 3655 return ConstantInt::get(Ty, neg ? -SV : SV); 3656 } 3657 3658 // Right-shift a vector by a constant. 3659 Value *CodeGenFunction::EmitNeonRShiftImm(Value *Vec, Value *Shift, 3660 llvm::Type *Ty, bool usgn, 3661 const char *name) { 3662 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 3663 3664 int ShiftAmt = cast<ConstantInt>(Shift)->getSExtValue(); 3665 int EltSize = VTy->getScalarSizeInBits(); 3666 3667 Vec = Builder.CreateBitCast(Vec, Ty); 3668 3669 // lshr/ashr are undefined when the shift amount is equal to the vector 3670 // element size. 3671 if (ShiftAmt == EltSize) { 3672 if (usgn) { 3673 // Right-shifting an unsigned value by its size yields 0. 3674 return llvm::ConstantAggregateZero::get(VTy); 3675 } else { 3676 // Right-shifting a signed value by its size is equivalent 3677 // to a shift of size-1. 3678 --ShiftAmt; 3679 Shift = ConstantInt::get(VTy->getElementType(), ShiftAmt); 3680 } 3681 } 3682 3683 Shift = EmitNeonShiftVector(Shift, Ty, false); 3684 if (usgn) 3685 return Builder.CreateLShr(Vec, Shift, name); 3686 else 3687 return Builder.CreateAShr(Vec, Shift, name); 3688 } 3689 3690 enum { 3691 AddRetType = (1 << 0), 3692 Add1ArgType = (1 << 1), 3693 Add2ArgTypes = (1 << 2), 3694 3695 VectorizeRetType = (1 << 3), 3696 VectorizeArgTypes = (1 << 4), 3697 3698 InventFloatType = (1 << 5), 3699 UnsignedAlts = (1 << 6), 3700 3701 Use64BitVectors = (1 << 7), 3702 Use128BitVectors = (1 << 8), 3703 3704 Vectorize1ArgType = Add1ArgType | VectorizeArgTypes, 3705 VectorRet = AddRetType | VectorizeRetType, 3706 VectorRetGetArgs01 = 3707 AddRetType | Add2ArgTypes | VectorizeRetType | VectorizeArgTypes, 3708 FpCmpzModifiers = 3709 AddRetType | VectorizeRetType | Add1ArgType | InventFloatType 3710 }; 3711 3712 namespace { 3713 struct NeonIntrinsicInfo { 3714 const char *NameHint; 3715 unsigned BuiltinID; 3716 unsigned LLVMIntrinsic; 3717 unsigned AltLLVMIntrinsic; 3718 unsigned TypeModifier; 3719 3720 bool operator<(unsigned RHSBuiltinID) const { 3721 return BuiltinID < RHSBuiltinID; 3722 } 3723 bool operator<(const NeonIntrinsicInfo &TE) const { 3724 return BuiltinID < TE.BuiltinID; 3725 } 3726 }; 3727 } // end anonymous namespace 3728 3729 #define NEONMAP0(NameBase) \ 3730 { #NameBase, NEON::BI__builtin_neon_ ## NameBase, 0, 0, 0 } 3731 3732 #define NEONMAP1(NameBase, LLVMIntrinsic, TypeModifier) \ 3733 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 3734 Intrinsic::LLVMIntrinsic, 0, TypeModifier } 3735 3736 #define NEONMAP2(NameBase, LLVMIntrinsic, AltLLVMIntrinsic, TypeModifier) \ 3737 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 3738 Intrinsic::LLVMIntrinsic, Intrinsic::AltLLVMIntrinsic, \ 3739 TypeModifier } 3740 3741 static const NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = { 3742 NEONMAP2(vabd_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 3743 NEONMAP2(vabdq_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 3744 NEONMAP1(vabs_v, arm_neon_vabs, 0), 3745 NEONMAP1(vabsq_v, arm_neon_vabs, 0), 3746 NEONMAP0(vaddhn_v), 3747 NEONMAP1(vaesdq_v, arm_neon_aesd, 0), 3748 NEONMAP1(vaeseq_v, arm_neon_aese, 0), 3749 NEONMAP1(vaesimcq_v, arm_neon_aesimc, 0), 3750 NEONMAP1(vaesmcq_v, arm_neon_aesmc, 0), 3751 NEONMAP1(vbsl_v, arm_neon_vbsl, AddRetType), 3752 NEONMAP1(vbslq_v, arm_neon_vbsl, AddRetType), 3753 NEONMAP1(vcage_v, arm_neon_vacge, 0), 3754 NEONMAP1(vcageq_v, arm_neon_vacge, 0), 3755 NEONMAP1(vcagt_v, arm_neon_vacgt, 0), 3756 NEONMAP1(vcagtq_v, arm_neon_vacgt, 0), 3757 NEONMAP1(vcale_v, arm_neon_vacge, 0), 3758 NEONMAP1(vcaleq_v, arm_neon_vacge, 0), 3759 NEONMAP1(vcalt_v, arm_neon_vacgt, 0), 3760 NEONMAP1(vcaltq_v, arm_neon_vacgt, 0), 3761 NEONMAP0(vceqz_v), 3762 NEONMAP0(vceqzq_v), 3763 NEONMAP0(vcgez_v), 3764 NEONMAP0(vcgezq_v), 3765 NEONMAP0(vcgtz_v), 3766 NEONMAP0(vcgtzq_v), 3767 NEONMAP0(vclez_v), 3768 NEONMAP0(vclezq_v), 3769 NEONMAP1(vcls_v, arm_neon_vcls, Add1ArgType), 3770 NEONMAP1(vclsq_v, arm_neon_vcls, Add1ArgType), 3771 NEONMAP0(vcltz_v), 3772 NEONMAP0(vcltzq_v), 3773 NEONMAP1(vclz_v, ctlz, Add1ArgType), 3774 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 3775 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 3776 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 3777 NEONMAP1(vcvt_f16_f32, arm_neon_vcvtfp2hf, 0), 3778 NEONMAP0(vcvt_f16_v), 3779 NEONMAP1(vcvt_f32_f16, arm_neon_vcvthf2fp, 0), 3780 NEONMAP0(vcvt_f32_v), 3781 NEONMAP2(vcvt_n_f16_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3782 NEONMAP2(vcvt_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3783 NEONMAP1(vcvt_n_s16_v, arm_neon_vcvtfp2fxs, 0), 3784 NEONMAP1(vcvt_n_s32_v, arm_neon_vcvtfp2fxs, 0), 3785 NEONMAP1(vcvt_n_s64_v, arm_neon_vcvtfp2fxs, 0), 3786 NEONMAP1(vcvt_n_u16_v, arm_neon_vcvtfp2fxu, 0), 3787 NEONMAP1(vcvt_n_u32_v, arm_neon_vcvtfp2fxu, 0), 3788 NEONMAP1(vcvt_n_u64_v, arm_neon_vcvtfp2fxu, 0), 3789 NEONMAP0(vcvt_s16_v), 3790 NEONMAP0(vcvt_s32_v), 3791 NEONMAP0(vcvt_s64_v), 3792 NEONMAP0(vcvt_u16_v), 3793 NEONMAP0(vcvt_u32_v), 3794 NEONMAP0(vcvt_u64_v), 3795 NEONMAP1(vcvta_s16_v, arm_neon_vcvtas, 0), 3796 NEONMAP1(vcvta_s32_v, arm_neon_vcvtas, 0), 3797 NEONMAP1(vcvta_s64_v, arm_neon_vcvtas, 0), 3798 NEONMAP1(vcvta_u32_v, arm_neon_vcvtau, 0), 3799 NEONMAP1(vcvta_u64_v, arm_neon_vcvtau, 0), 3800 NEONMAP1(vcvtaq_s16_v, arm_neon_vcvtas, 0), 3801 NEONMAP1(vcvtaq_s32_v, arm_neon_vcvtas, 0), 3802 NEONMAP1(vcvtaq_s64_v, arm_neon_vcvtas, 0), 3803 NEONMAP1(vcvtaq_u16_v, arm_neon_vcvtau, 0), 3804 NEONMAP1(vcvtaq_u32_v, arm_neon_vcvtau, 0), 3805 NEONMAP1(vcvtaq_u64_v, arm_neon_vcvtau, 0), 3806 NEONMAP1(vcvtm_s16_v, arm_neon_vcvtms, 0), 3807 NEONMAP1(vcvtm_s32_v, arm_neon_vcvtms, 0), 3808 NEONMAP1(vcvtm_s64_v, arm_neon_vcvtms, 0), 3809 NEONMAP1(vcvtm_u16_v, arm_neon_vcvtmu, 0), 3810 NEONMAP1(vcvtm_u32_v, arm_neon_vcvtmu, 0), 3811 NEONMAP1(vcvtm_u64_v, arm_neon_vcvtmu, 0), 3812 NEONMAP1(vcvtmq_s16_v, arm_neon_vcvtms, 0), 3813 NEONMAP1(vcvtmq_s32_v, arm_neon_vcvtms, 0), 3814 NEONMAP1(vcvtmq_s64_v, arm_neon_vcvtms, 0), 3815 NEONMAP1(vcvtmq_u16_v, arm_neon_vcvtmu, 0), 3816 NEONMAP1(vcvtmq_u32_v, arm_neon_vcvtmu, 0), 3817 NEONMAP1(vcvtmq_u64_v, arm_neon_vcvtmu, 0), 3818 NEONMAP1(vcvtn_s16_v, arm_neon_vcvtns, 0), 3819 NEONMAP1(vcvtn_s32_v, arm_neon_vcvtns, 0), 3820 NEONMAP1(vcvtn_s64_v, arm_neon_vcvtns, 0), 3821 NEONMAP1(vcvtn_u16_v, arm_neon_vcvtnu, 0), 3822 NEONMAP1(vcvtn_u32_v, arm_neon_vcvtnu, 0), 3823 NEONMAP1(vcvtn_u64_v, arm_neon_vcvtnu, 0), 3824 NEONMAP1(vcvtnq_s16_v, arm_neon_vcvtns, 0), 3825 NEONMAP1(vcvtnq_s32_v, arm_neon_vcvtns, 0), 3826 NEONMAP1(vcvtnq_s64_v, arm_neon_vcvtns, 0), 3827 NEONMAP1(vcvtnq_u16_v, arm_neon_vcvtnu, 0), 3828 NEONMAP1(vcvtnq_u32_v, arm_neon_vcvtnu, 0), 3829 NEONMAP1(vcvtnq_u64_v, arm_neon_vcvtnu, 0), 3830 NEONMAP1(vcvtp_s16_v, arm_neon_vcvtps, 0), 3831 NEONMAP1(vcvtp_s32_v, arm_neon_vcvtps, 0), 3832 NEONMAP1(vcvtp_s64_v, arm_neon_vcvtps, 0), 3833 NEONMAP1(vcvtp_u16_v, arm_neon_vcvtpu, 0), 3834 NEONMAP1(vcvtp_u32_v, arm_neon_vcvtpu, 0), 3835 NEONMAP1(vcvtp_u64_v, arm_neon_vcvtpu, 0), 3836 NEONMAP1(vcvtpq_s16_v, arm_neon_vcvtps, 0), 3837 NEONMAP1(vcvtpq_s32_v, arm_neon_vcvtps, 0), 3838 NEONMAP1(vcvtpq_s64_v, arm_neon_vcvtps, 0), 3839 NEONMAP1(vcvtpq_u16_v, arm_neon_vcvtpu, 0), 3840 NEONMAP1(vcvtpq_u32_v, arm_neon_vcvtpu, 0), 3841 NEONMAP1(vcvtpq_u64_v, arm_neon_vcvtpu, 0), 3842 NEONMAP0(vcvtq_f16_v), 3843 NEONMAP0(vcvtq_f32_v), 3844 NEONMAP2(vcvtq_n_f16_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3845 NEONMAP2(vcvtq_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3846 NEONMAP1(vcvtq_n_s16_v, arm_neon_vcvtfp2fxs, 0), 3847 NEONMAP1(vcvtq_n_s32_v, arm_neon_vcvtfp2fxs, 0), 3848 NEONMAP1(vcvtq_n_s64_v, arm_neon_vcvtfp2fxs, 0), 3849 NEONMAP1(vcvtq_n_u16_v, arm_neon_vcvtfp2fxu, 0), 3850 NEONMAP1(vcvtq_n_u32_v, arm_neon_vcvtfp2fxu, 0), 3851 NEONMAP1(vcvtq_n_u64_v, arm_neon_vcvtfp2fxu, 0), 3852 NEONMAP0(vcvtq_s16_v), 3853 NEONMAP0(vcvtq_s32_v), 3854 NEONMAP0(vcvtq_s64_v), 3855 NEONMAP0(vcvtq_u16_v), 3856 NEONMAP0(vcvtq_u32_v), 3857 NEONMAP0(vcvtq_u64_v), 3858 NEONMAP2(vdot_v, arm_neon_udot, arm_neon_sdot, 0), 3859 NEONMAP2(vdotq_v, arm_neon_udot, arm_neon_sdot, 0), 3860 NEONMAP0(vext_v), 3861 NEONMAP0(vextq_v), 3862 NEONMAP0(vfma_v), 3863 NEONMAP0(vfmaq_v), 3864 NEONMAP2(vhadd_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 3865 NEONMAP2(vhaddq_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 3866 NEONMAP2(vhsub_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 3867 NEONMAP2(vhsubq_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 3868 NEONMAP0(vld1_dup_v), 3869 NEONMAP1(vld1_v, arm_neon_vld1, 0), 3870 NEONMAP0(vld1q_dup_v), 3871 NEONMAP1(vld1q_v, arm_neon_vld1, 0), 3872 NEONMAP1(vld2_lane_v, arm_neon_vld2lane, 0), 3873 NEONMAP1(vld2_v, arm_neon_vld2, 0), 3874 NEONMAP1(vld2q_lane_v, arm_neon_vld2lane, 0), 3875 NEONMAP1(vld2q_v, arm_neon_vld2, 0), 3876 NEONMAP1(vld3_lane_v, arm_neon_vld3lane, 0), 3877 NEONMAP1(vld3_v, arm_neon_vld3, 0), 3878 NEONMAP1(vld3q_lane_v, arm_neon_vld3lane, 0), 3879 NEONMAP1(vld3q_v, arm_neon_vld3, 0), 3880 NEONMAP1(vld4_lane_v, arm_neon_vld4lane, 0), 3881 NEONMAP1(vld4_v, arm_neon_vld4, 0), 3882 NEONMAP1(vld4q_lane_v, arm_neon_vld4lane, 0), 3883 NEONMAP1(vld4q_v, arm_neon_vld4, 0), 3884 NEONMAP2(vmax_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 3885 NEONMAP1(vmaxnm_v, arm_neon_vmaxnm, Add1ArgType), 3886 NEONMAP1(vmaxnmq_v, arm_neon_vmaxnm, Add1ArgType), 3887 NEONMAP2(vmaxq_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 3888 NEONMAP2(vmin_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 3889 NEONMAP1(vminnm_v, arm_neon_vminnm, Add1ArgType), 3890 NEONMAP1(vminnmq_v, arm_neon_vminnm, Add1ArgType), 3891 NEONMAP2(vminq_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 3892 NEONMAP0(vmovl_v), 3893 NEONMAP0(vmovn_v), 3894 NEONMAP1(vmul_v, arm_neon_vmulp, Add1ArgType), 3895 NEONMAP0(vmull_v), 3896 NEONMAP1(vmulq_v, arm_neon_vmulp, Add1ArgType), 3897 NEONMAP2(vpadal_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 3898 NEONMAP2(vpadalq_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 3899 NEONMAP1(vpadd_v, arm_neon_vpadd, Add1ArgType), 3900 NEONMAP2(vpaddl_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 3901 NEONMAP2(vpaddlq_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 3902 NEONMAP1(vpaddq_v, arm_neon_vpadd, Add1ArgType), 3903 NEONMAP2(vpmax_v, arm_neon_vpmaxu, arm_neon_vpmaxs, Add1ArgType | UnsignedAlts), 3904 NEONMAP2(vpmin_v, arm_neon_vpminu, arm_neon_vpmins, Add1ArgType | UnsignedAlts), 3905 NEONMAP1(vqabs_v, arm_neon_vqabs, Add1ArgType), 3906 NEONMAP1(vqabsq_v, arm_neon_vqabs, Add1ArgType), 3907 NEONMAP2(vqadd_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 3908 NEONMAP2(vqaddq_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 3909 NEONMAP2(vqdmlal_v, arm_neon_vqdmull, arm_neon_vqadds, 0), 3910 NEONMAP2(vqdmlsl_v, arm_neon_vqdmull, arm_neon_vqsubs, 0), 3911 NEONMAP1(vqdmulh_v, arm_neon_vqdmulh, Add1ArgType), 3912 NEONMAP1(vqdmulhq_v, arm_neon_vqdmulh, Add1ArgType), 3913 NEONMAP1(vqdmull_v, arm_neon_vqdmull, Add1ArgType), 3914 NEONMAP2(vqmovn_v, arm_neon_vqmovnu, arm_neon_vqmovns, Add1ArgType | UnsignedAlts), 3915 NEONMAP1(vqmovun_v, arm_neon_vqmovnsu, Add1ArgType), 3916 NEONMAP1(vqneg_v, arm_neon_vqneg, Add1ArgType), 3917 NEONMAP1(vqnegq_v, arm_neon_vqneg, Add1ArgType), 3918 NEONMAP1(vqrdmulh_v, arm_neon_vqrdmulh, Add1ArgType), 3919 NEONMAP1(vqrdmulhq_v, arm_neon_vqrdmulh, Add1ArgType), 3920 NEONMAP2(vqrshl_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 3921 NEONMAP2(vqrshlq_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 3922 NEONMAP2(vqshl_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 3923 NEONMAP2(vqshl_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 3924 NEONMAP2(vqshlq_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 3925 NEONMAP2(vqshlq_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 3926 NEONMAP1(vqshlu_n_v, arm_neon_vqshiftsu, 0), 3927 NEONMAP1(vqshluq_n_v, arm_neon_vqshiftsu, 0), 3928 NEONMAP2(vqsub_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 3929 NEONMAP2(vqsubq_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 3930 NEONMAP1(vraddhn_v, arm_neon_vraddhn, Add1ArgType), 3931 NEONMAP2(vrecpe_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 3932 NEONMAP2(vrecpeq_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 3933 NEONMAP1(vrecps_v, arm_neon_vrecps, Add1ArgType), 3934 NEONMAP1(vrecpsq_v, arm_neon_vrecps, Add1ArgType), 3935 NEONMAP2(vrhadd_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 3936 NEONMAP2(vrhaddq_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 3937 NEONMAP1(vrnd_v, arm_neon_vrintz, Add1ArgType), 3938 NEONMAP1(vrnda_v, arm_neon_vrinta, Add1ArgType), 3939 NEONMAP1(vrndaq_v, arm_neon_vrinta, Add1ArgType), 3940 NEONMAP1(vrndm_v, arm_neon_vrintm, Add1ArgType), 3941 NEONMAP1(vrndmq_v, arm_neon_vrintm, Add1ArgType), 3942 NEONMAP1(vrndn_v, arm_neon_vrintn, Add1ArgType), 3943 NEONMAP1(vrndnq_v, arm_neon_vrintn, Add1ArgType), 3944 NEONMAP1(vrndp_v, arm_neon_vrintp, Add1ArgType), 3945 NEONMAP1(vrndpq_v, arm_neon_vrintp, Add1ArgType), 3946 NEONMAP1(vrndq_v, arm_neon_vrintz, Add1ArgType), 3947 NEONMAP1(vrndx_v, arm_neon_vrintx, Add1ArgType), 3948 NEONMAP1(vrndxq_v, arm_neon_vrintx, Add1ArgType), 3949 NEONMAP2(vrshl_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 3950 NEONMAP2(vrshlq_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 3951 NEONMAP2(vrshr_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 3952 NEONMAP2(vrshrq_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 3953 NEONMAP2(vrsqrte_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 3954 NEONMAP2(vrsqrteq_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 3955 NEONMAP1(vrsqrts_v, arm_neon_vrsqrts, Add1ArgType), 3956 NEONMAP1(vrsqrtsq_v, arm_neon_vrsqrts, Add1ArgType), 3957 NEONMAP1(vrsubhn_v, arm_neon_vrsubhn, Add1ArgType), 3958 NEONMAP1(vsha1su0q_v, arm_neon_sha1su0, 0), 3959 NEONMAP1(vsha1su1q_v, arm_neon_sha1su1, 0), 3960 NEONMAP1(vsha256h2q_v, arm_neon_sha256h2, 0), 3961 NEONMAP1(vsha256hq_v, arm_neon_sha256h, 0), 3962 NEONMAP1(vsha256su0q_v, arm_neon_sha256su0, 0), 3963 NEONMAP1(vsha256su1q_v, arm_neon_sha256su1, 0), 3964 NEONMAP0(vshl_n_v), 3965 NEONMAP2(vshl_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 3966 NEONMAP0(vshll_n_v), 3967 NEONMAP0(vshlq_n_v), 3968 NEONMAP2(vshlq_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 3969 NEONMAP0(vshr_n_v), 3970 NEONMAP0(vshrn_n_v), 3971 NEONMAP0(vshrq_n_v), 3972 NEONMAP1(vst1_v, arm_neon_vst1, 0), 3973 NEONMAP1(vst1q_v, arm_neon_vst1, 0), 3974 NEONMAP1(vst2_lane_v, arm_neon_vst2lane, 0), 3975 NEONMAP1(vst2_v, arm_neon_vst2, 0), 3976 NEONMAP1(vst2q_lane_v, arm_neon_vst2lane, 0), 3977 NEONMAP1(vst2q_v, arm_neon_vst2, 0), 3978 NEONMAP1(vst3_lane_v, arm_neon_vst3lane, 0), 3979 NEONMAP1(vst3_v, arm_neon_vst3, 0), 3980 NEONMAP1(vst3q_lane_v, arm_neon_vst3lane, 0), 3981 NEONMAP1(vst3q_v, arm_neon_vst3, 0), 3982 NEONMAP1(vst4_lane_v, arm_neon_vst4lane, 0), 3983 NEONMAP1(vst4_v, arm_neon_vst4, 0), 3984 NEONMAP1(vst4q_lane_v, arm_neon_vst4lane, 0), 3985 NEONMAP1(vst4q_v, arm_neon_vst4, 0), 3986 NEONMAP0(vsubhn_v), 3987 NEONMAP0(vtrn_v), 3988 NEONMAP0(vtrnq_v), 3989 NEONMAP0(vtst_v), 3990 NEONMAP0(vtstq_v), 3991 NEONMAP0(vuzp_v), 3992 NEONMAP0(vuzpq_v), 3993 NEONMAP0(vzip_v), 3994 NEONMAP0(vzipq_v) 3995 }; 3996 3997 static const NeonIntrinsicInfo AArch64SIMDIntrinsicMap[] = { 3998 NEONMAP1(vabs_v, aarch64_neon_abs, 0), 3999 NEONMAP1(vabsq_v, aarch64_neon_abs, 0), 4000 NEONMAP0(vaddhn_v), 4001 NEONMAP1(vaesdq_v, aarch64_crypto_aesd, 0), 4002 NEONMAP1(vaeseq_v, aarch64_crypto_aese, 0), 4003 NEONMAP1(vaesimcq_v, aarch64_crypto_aesimc, 0), 4004 NEONMAP1(vaesmcq_v, aarch64_crypto_aesmc, 0), 4005 NEONMAP1(vcage_v, aarch64_neon_facge, 0), 4006 NEONMAP1(vcageq_v, aarch64_neon_facge, 0), 4007 NEONMAP1(vcagt_v, aarch64_neon_facgt, 0), 4008 NEONMAP1(vcagtq_v, aarch64_neon_facgt, 0), 4009 NEONMAP1(vcale_v, aarch64_neon_facge, 0), 4010 NEONMAP1(vcaleq_v, aarch64_neon_facge, 0), 4011 NEONMAP1(vcalt_v, aarch64_neon_facgt, 0), 4012 NEONMAP1(vcaltq_v, aarch64_neon_facgt, 0), 4013 NEONMAP0(vceqz_v), 4014 NEONMAP0(vceqzq_v), 4015 NEONMAP0(vcgez_v), 4016 NEONMAP0(vcgezq_v), 4017 NEONMAP0(vcgtz_v), 4018 NEONMAP0(vcgtzq_v), 4019 NEONMAP0(vclez_v), 4020 NEONMAP0(vclezq_v), 4021 NEONMAP1(vcls_v, aarch64_neon_cls, Add1ArgType), 4022 NEONMAP1(vclsq_v, aarch64_neon_cls, Add1ArgType), 4023 NEONMAP0(vcltz_v), 4024 NEONMAP0(vcltzq_v), 4025 NEONMAP1(vclz_v, ctlz, Add1ArgType), 4026 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 4027 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 4028 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 4029 NEONMAP1(vcvt_f16_f32, aarch64_neon_vcvtfp2hf, 0), 4030 NEONMAP0(vcvt_f16_v), 4031 NEONMAP1(vcvt_f32_f16, aarch64_neon_vcvthf2fp, 0), 4032 NEONMAP0(vcvt_f32_v), 4033 NEONMAP2(vcvt_n_f16_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4034 NEONMAP2(vcvt_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4035 NEONMAP2(vcvt_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4036 NEONMAP1(vcvt_n_s16_v, aarch64_neon_vcvtfp2fxs, 0), 4037 NEONMAP1(vcvt_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 4038 NEONMAP1(vcvt_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 4039 NEONMAP1(vcvt_n_u16_v, aarch64_neon_vcvtfp2fxu, 0), 4040 NEONMAP1(vcvt_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 4041 NEONMAP1(vcvt_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 4042 NEONMAP0(vcvtq_f16_v), 4043 NEONMAP0(vcvtq_f32_v), 4044 NEONMAP2(vcvtq_n_f16_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4045 NEONMAP2(vcvtq_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4046 NEONMAP2(vcvtq_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4047 NEONMAP1(vcvtq_n_s16_v, aarch64_neon_vcvtfp2fxs, 0), 4048 NEONMAP1(vcvtq_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 4049 NEONMAP1(vcvtq_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 4050 NEONMAP1(vcvtq_n_u16_v, aarch64_neon_vcvtfp2fxu, 0), 4051 NEONMAP1(vcvtq_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 4052 NEONMAP1(vcvtq_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 4053 NEONMAP1(vcvtx_f32_v, aarch64_neon_fcvtxn, AddRetType | Add1ArgType), 4054 NEONMAP2(vdot_v, aarch64_neon_udot, aarch64_neon_sdot, 0), 4055 NEONMAP2(vdotq_v, aarch64_neon_udot, aarch64_neon_sdot, 0), 4056 NEONMAP0(vext_v), 4057 NEONMAP0(vextq_v), 4058 NEONMAP0(vfma_v), 4059 NEONMAP0(vfmaq_v), 4060 NEONMAP2(vhadd_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 4061 NEONMAP2(vhaddq_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 4062 NEONMAP2(vhsub_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 4063 NEONMAP2(vhsubq_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 4064 NEONMAP0(vmovl_v), 4065 NEONMAP0(vmovn_v), 4066 NEONMAP1(vmul_v, aarch64_neon_pmul, Add1ArgType), 4067 NEONMAP1(vmulq_v, aarch64_neon_pmul, Add1ArgType), 4068 NEONMAP1(vpadd_v, aarch64_neon_addp, Add1ArgType), 4069 NEONMAP2(vpaddl_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 4070 NEONMAP2(vpaddlq_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 4071 NEONMAP1(vpaddq_v, aarch64_neon_addp, Add1ArgType), 4072 NEONMAP1(vqabs_v, aarch64_neon_sqabs, Add1ArgType), 4073 NEONMAP1(vqabsq_v, aarch64_neon_sqabs, Add1ArgType), 4074 NEONMAP2(vqadd_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 4075 NEONMAP2(vqaddq_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 4076 NEONMAP2(vqdmlal_v, aarch64_neon_sqdmull, aarch64_neon_sqadd, 0), 4077 NEONMAP2(vqdmlsl_v, aarch64_neon_sqdmull, aarch64_neon_sqsub, 0), 4078 NEONMAP1(vqdmulh_v, aarch64_neon_sqdmulh, Add1ArgType), 4079 NEONMAP1(vqdmulhq_v, aarch64_neon_sqdmulh, Add1ArgType), 4080 NEONMAP1(vqdmull_v, aarch64_neon_sqdmull, Add1ArgType), 4081 NEONMAP2(vqmovn_v, aarch64_neon_uqxtn, aarch64_neon_sqxtn, Add1ArgType | UnsignedAlts), 4082 NEONMAP1(vqmovun_v, aarch64_neon_sqxtun, Add1ArgType), 4083 NEONMAP1(vqneg_v, aarch64_neon_sqneg, Add1ArgType), 4084 NEONMAP1(vqnegq_v, aarch64_neon_sqneg, Add1ArgType), 4085 NEONMAP1(vqrdmulh_v, aarch64_neon_sqrdmulh, Add1ArgType), 4086 NEONMAP1(vqrdmulhq_v, aarch64_neon_sqrdmulh, Add1ArgType), 4087 NEONMAP2(vqrshl_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 4088 NEONMAP2(vqrshlq_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 4089 NEONMAP2(vqshl_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl, UnsignedAlts), 4090 NEONMAP2(vqshl_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 4091 NEONMAP2(vqshlq_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl,UnsignedAlts), 4092 NEONMAP2(vqshlq_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 4093 NEONMAP1(vqshlu_n_v, aarch64_neon_sqshlu, 0), 4094 NEONMAP1(vqshluq_n_v, aarch64_neon_sqshlu, 0), 4095 NEONMAP2(vqsub_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 4096 NEONMAP2(vqsubq_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 4097 NEONMAP1(vraddhn_v, aarch64_neon_raddhn, Add1ArgType), 4098 NEONMAP2(vrecpe_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 4099 NEONMAP2(vrecpeq_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 4100 NEONMAP1(vrecps_v, aarch64_neon_frecps, Add1ArgType), 4101 NEONMAP1(vrecpsq_v, aarch64_neon_frecps, Add1ArgType), 4102 NEONMAP2(vrhadd_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 4103 NEONMAP2(vrhaddq_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 4104 NEONMAP2(vrshl_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 4105 NEONMAP2(vrshlq_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 4106 NEONMAP2(vrshr_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 4107 NEONMAP2(vrshrq_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 4108 NEONMAP2(vrsqrte_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 4109 NEONMAP2(vrsqrteq_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 4110 NEONMAP1(vrsqrts_v, aarch64_neon_frsqrts, Add1ArgType), 4111 NEONMAP1(vrsqrtsq_v, aarch64_neon_frsqrts, Add1ArgType), 4112 NEONMAP1(vrsubhn_v, aarch64_neon_rsubhn, Add1ArgType), 4113 NEONMAP1(vsha1su0q_v, aarch64_crypto_sha1su0, 0), 4114 NEONMAP1(vsha1su1q_v, aarch64_crypto_sha1su1, 0), 4115 NEONMAP1(vsha256h2q_v, aarch64_crypto_sha256h2, 0), 4116 NEONMAP1(vsha256hq_v, aarch64_crypto_sha256h, 0), 4117 NEONMAP1(vsha256su0q_v, aarch64_crypto_sha256su0, 0), 4118 NEONMAP1(vsha256su1q_v, aarch64_crypto_sha256su1, 0), 4119 NEONMAP0(vshl_n_v), 4120 NEONMAP2(vshl_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 4121 NEONMAP0(vshll_n_v), 4122 NEONMAP0(vshlq_n_v), 4123 NEONMAP2(vshlq_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 4124 NEONMAP0(vshr_n_v), 4125 NEONMAP0(vshrn_n_v), 4126 NEONMAP0(vshrq_n_v), 4127 NEONMAP0(vsubhn_v), 4128 NEONMAP0(vtst_v), 4129 NEONMAP0(vtstq_v), 4130 }; 4131 4132 static const NeonIntrinsicInfo AArch64SISDIntrinsicMap[] = { 4133 NEONMAP1(vabdd_f64, aarch64_sisd_fabd, Add1ArgType), 4134 NEONMAP1(vabds_f32, aarch64_sisd_fabd, Add1ArgType), 4135 NEONMAP1(vabsd_s64, aarch64_neon_abs, Add1ArgType), 4136 NEONMAP1(vaddlv_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 4137 NEONMAP1(vaddlv_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 4138 NEONMAP1(vaddlvq_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 4139 NEONMAP1(vaddlvq_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 4140 NEONMAP1(vaddv_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 4141 NEONMAP1(vaddv_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 4142 NEONMAP1(vaddv_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4143 NEONMAP1(vaddvq_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 4144 NEONMAP1(vaddvq_f64, aarch64_neon_faddv, AddRetType | Add1ArgType), 4145 NEONMAP1(vaddvq_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 4146 NEONMAP1(vaddvq_s64, aarch64_neon_saddv, AddRetType | Add1ArgType), 4147 NEONMAP1(vaddvq_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4148 NEONMAP1(vaddvq_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4149 NEONMAP1(vcaged_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 4150 NEONMAP1(vcages_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 4151 NEONMAP1(vcagtd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 4152 NEONMAP1(vcagts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 4153 NEONMAP1(vcaled_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 4154 NEONMAP1(vcales_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 4155 NEONMAP1(vcaltd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 4156 NEONMAP1(vcalts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 4157 NEONMAP1(vcvtad_s64_f64, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 4158 NEONMAP1(vcvtad_u64_f64, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 4159 NEONMAP1(vcvtas_s32_f32, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 4160 NEONMAP1(vcvtas_u32_f32, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 4161 NEONMAP1(vcvtd_n_f64_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 4162 NEONMAP1(vcvtd_n_f64_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 4163 NEONMAP1(vcvtd_n_s64_f64, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 4164 NEONMAP1(vcvtd_n_u64_f64, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 4165 NEONMAP1(vcvtmd_s64_f64, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 4166 NEONMAP1(vcvtmd_u64_f64, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 4167 NEONMAP1(vcvtms_s32_f32, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 4168 NEONMAP1(vcvtms_u32_f32, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 4169 NEONMAP1(vcvtnd_s64_f64, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 4170 NEONMAP1(vcvtnd_u64_f64, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 4171 NEONMAP1(vcvtns_s32_f32, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 4172 NEONMAP1(vcvtns_u32_f32, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 4173 NEONMAP1(vcvtpd_s64_f64, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 4174 NEONMAP1(vcvtpd_u64_f64, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 4175 NEONMAP1(vcvtps_s32_f32, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 4176 NEONMAP1(vcvtps_u32_f32, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 4177 NEONMAP1(vcvts_n_f32_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 4178 NEONMAP1(vcvts_n_f32_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 4179 NEONMAP1(vcvts_n_s32_f32, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 4180 NEONMAP1(vcvts_n_u32_f32, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 4181 NEONMAP1(vcvtxd_f32_f64, aarch64_sisd_fcvtxn, 0), 4182 NEONMAP1(vmaxnmv_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4183 NEONMAP1(vmaxnmvq_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4184 NEONMAP1(vmaxnmvq_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4185 NEONMAP1(vmaxv_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4186 NEONMAP1(vmaxv_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 4187 NEONMAP1(vmaxv_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 4188 NEONMAP1(vmaxvq_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4189 NEONMAP1(vmaxvq_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4190 NEONMAP1(vmaxvq_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 4191 NEONMAP1(vmaxvq_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 4192 NEONMAP1(vminnmv_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4193 NEONMAP1(vminnmvq_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4194 NEONMAP1(vminnmvq_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4195 NEONMAP1(vminv_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 4196 NEONMAP1(vminv_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 4197 NEONMAP1(vminv_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 4198 NEONMAP1(vminvq_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 4199 NEONMAP1(vminvq_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 4200 NEONMAP1(vminvq_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 4201 NEONMAP1(vminvq_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 4202 NEONMAP1(vmull_p64, aarch64_neon_pmull64, 0), 4203 NEONMAP1(vmulxd_f64, aarch64_neon_fmulx, Add1ArgType), 4204 NEONMAP1(vmulxs_f32, aarch64_neon_fmulx, Add1ArgType), 4205 NEONMAP1(vpaddd_s64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4206 NEONMAP1(vpaddd_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4207 NEONMAP1(vpmaxnmqd_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4208 NEONMAP1(vpmaxnms_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4209 NEONMAP1(vpmaxqd_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4210 NEONMAP1(vpmaxs_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4211 NEONMAP1(vpminnmqd_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4212 NEONMAP1(vpminnms_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4213 NEONMAP1(vpminqd_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 4214 NEONMAP1(vpmins_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 4215 NEONMAP1(vqabsb_s8, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 4216 NEONMAP1(vqabsd_s64, aarch64_neon_sqabs, Add1ArgType), 4217 NEONMAP1(vqabsh_s16, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 4218 NEONMAP1(vqabss_s32, aarch64_neon_sqabs, Add1ArgType), 4219 NEONMAP1(vqaddb_s8, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 4220 NEONMAP1(vqaddb_u8, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 4221 NEONMAP1(vqaddd_s64, aarch64_neon_sqadd, Add1ArgType), 4222 NEONMAP1(vqaddd_u64, aarch64_neon_uqadd, Add1ArgType), 4223 NEONMAP1(vqaddh_s16, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 4224 NEONMAP1(vqaddh_u16, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 4225 NEONMAP1(vqadds_s32, aarch64_neon_sqadd, Add1ArgType), 4226 NEONMAP1(vqadds_u32, aarch64_neon_uqadd, Add1ArgType), 4227 NEONMAP1(vqdmulhh_s16, aarch64_neon_sqdmulh, Vectorize1ArgType | Use64BitVectors), 4228 NEONMAP1(vqdmulhs_s32, aarch64_neon_sqdmulh, Add1ArgType), 4229 NEONMAP1(vqdmullh_s16, aarch64_neon_sqdmull, VectorRet | Use128BitVectors), 4230 NEONMAP1(vqdmulls_s32, aarch64_neon_sqdmulls_scalar, 0), 4231 NEONMAP1(vqmovnd_s64, aarch64_neon_scalar_sqxtn, AddRetType | Add1ArgType), 4232 NEONMAP1(vqmovnd_u64, aarch64_neon_scalar_uqxtn, AddRetType | Add1ArgType), 4233 NEONMAP1(vqmovnh_s16, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 4234 NEONMAP1(vqmovnh_u16, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 4235 NEONMAP1(vqmovns_s32, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 4236 NEONMAP1(vqmovns_u32, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 4237 NEONMAP1(vqmovund_s64, aarch64_neon_scalar_sqxtun, AddRetType | Add1ArgType), 4238 NEONMAP1(vqmovunh_s16, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 4239 NEONMAP1(vqmovuns_s32, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 4240 NEONMAP1(vqnegb_s8, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 4241 NEONMAP1(vqnegd_s64, aarch64_neon_sqneg, Add1ArgType), 4242 NEONMAP1(vqnegh_s16, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 4243 NEONMAP1(vqnegs_s32, aarch64_neon_sqneg, Add1ArgType), 4244 NEONMAP1(vqrdmulhh_s16, aarch64_neon_sqrdmulh, Vectorize1ArgType | Use64BitVectors), 4245 NEONMAP1(vqrdmulhs_s32, aarch64_neon_sqrdmulh, Add1ArgType), 4246 NEONMAP1(vqrshlb_s8, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 4247 NEONMAP1(vqrshlb_u8, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 4248 NEONMAP1(vqrshld_s64, aarch64_neon_sqrshl, Add1ArgType), 4249 NEONMAP1(vqrshld_u64, aarch64_neon_uqrshl, Add1ArgType), 4250 NEONMAP1(vqrshlh_s16, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 4251 NEONMAP1(vqrshlh_u16, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 4252 NEONMAP1(vqrshls_s32, aarch64_neon_sqrshl, Add1ArgType), 4253 NEONMAP1(vqrshls_u32, aarch64_neon_uqrshl, Add1ArgType), 4254 NEONMAP1(vqrshrnd_n_s64, aarch64_neon_sqrshrn, AddRetType), 4255 NEONMAP1(vqrshrnd_n_u64, aarch64_neon_uqrshrn, AddRetType), 4256 NEONMAP1(vqrshrnh_n_s16, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 4257 NEONMAP1(vqrshrnh_n_u16, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 4258 NEONMAP1(vqrshrns_n_s32, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 4259 NEONMAP1(vqrshrns_n_u32, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 4260 NEONMAP1(vqrshrund_n_s64, aarch64_neon_sqrshrun, AddRetType), 4261 NEONMAP1(vqrshrunh_n_s16, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 4262 NEONMAP1(vqrshruns_n_s32, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 4263 NEONMAP1(vqshlb_n_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4264 NEONMAP1(vqshlb_n_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4265 NEONMAP1(vqshlb_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4266 NEONMAP1(vqshlb_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4267 NEONMAP1(vqshld_s64, aarch64_neon_sqshl, Add1ArgType), 4268 NEONMAP1(vqshld_u64, aarch64_neon_uqshl, Add1ArgType), 4269 NEONMAP1(vqshlh_n_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4270 NEONMAP1(vqshlh_n_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4271 NEONMAP1(vqshlh_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4272 NEONMAP1(vqshlh_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4273 NEONMAP1(vqshls_n_s32, aarch64_neon_sqshl, Add1ArgType), 4274 NEONMAP1(vqshls_n_u32, aarch64_neon_uqshl, Add1ArgType), 4275 NEONMAP1(vqshls_s32, aarch64_neon_sqshl, Add1ArgType), 4276 NEONMAP1(vqshls_u32, aarch64_neon_uqshl, Add1ArgType), 4277 NEONMAP1(vqshlub_n_s8, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 4278 NEONMAP1(vqshluh_n_s16, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 4279 NEONMAP1(vqshlus_n_s32, aarch64_neon_sqshlu, Add1ArgType), 4280 NEONMAP1(vqshrnd_n_s64, aarch64_neon_sqshrn, AddRetType), 4281 NEONMAP1(vqshrnd_n_u64, aarch64_neon_uqshrn, AddRetType), 4282 NEONMAP1(vqshrnh_n_s16, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 4283 NEONMAP1(vqshrnh_n_u16, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 4284 NEONMAP1(vqshrns_n_s32, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 4285 NEONMAP1(vqshrns_n_u32, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 4286 NEONMAP1(vqshrund_n_s64, aarch64_neon_sqshrun, AddRetType), 4287 NEONMAP1(vqshrunh_n_s16, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 4288 NEONMAP1(vqshruns_n_s32, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 4289 NEONMAP1(vqsubb_s8, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 4290 NEONMAP1(vqsubb_u8, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 4291 NEONMAP1(vqsubd_s64, aarch64_neon_sqsub, Add1ArgType), 4292 NEONMAP1(vqsubd_u64, aarch64_neon_uqsub, Add1ArgType), 4293 NEONMAP1(vqsubh_s16, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 4294 NEONMAP1(vqsubh_u16, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 4295 NEONMAP1(vqsubs_s32, aarch64_neon_sqsub, Add1ArgType), 4296 NEONMAP1(vqsubs_u32, aarch64_neon_uqsub, Add1ArgType), 4297 NEONMAP1(vrecped_f64, aarch64_neon_frecpe, Add1ArgType), 4298 NEONMAP1(vrecpes_f32, aarch64_neon_frecpe, Add1ArgType), 4299 NEONMAP1(vrecpxd_f64, aarch64_neon_frecpx, Add1ArgType), 4300 NEONMAP1(vrecpxs_f32, aarch64_neon_frecpx, Add1ArgType), 4301 NEONMAP1(vrshld_s64, aarch64_neon_srshl, Add1ArgType), 4302 NEONMAP1(vrshld_u64, aarch64_neon_urshl, Add1ArgType), 4303 NEONMAP1(vrsqrted_f64, aarch64_neon_frsqrte, Add1ArgType), 4304 NEONMAP1(vrsqrtes_f32, aarch64_neon_frsqrte, Add1ArgType), 4305 NEONMAP1(vrsqrtsd_f64, aarch64_neon_frsqrts, Add1ArgType), 4306 NEONMAP1(vrsqrtss_f32, aarch64_neon_frsqrts, Add1ArgType), 4307 NEONMAP1(vsha1cq_u32, aarch64_crypto_sha1c, 0), 4308 NEONMAP1(vsha1h_u32, aarch64_crypto_sha1h, 0), 4309 NEONMAP1(vsha1mq_u32, aarch64_crypto_sha1m, 0), 4310 NEONMAP1(vsha1pq_u32, aarch64_crypto_sha1p, 0), 4311 NEONMAP1(vshld_s64, aarch64_neon_sshl, Add1ArgType), 4312 NEONMAP1(vshld_u64, aarch64_neon_ushl, Add1ArgType), 4313 NEONMAP1(vslid_n_s64, aarch64_neon_vsli, Vectorize1ArgType), 4314 NEONMAP1(vslid_n_u64, aarch64_neon_vsli, Vectorize1ArgType), 4315 NEONMAP1(vsqaddb_u8, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 4316 NEONMAP1(vsqaddd_u64, aarch64_neon_usqadd, Add1ArgType), 4317 NEONMAP1(vsqaddh_u16, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 4318 NEONMAP1(vsqadds_u32, aarch64_neon_usqadd, Add1ArgType), 4319 NEONMAP1(vsrid_n_s64, aarch64_neon_vsri, Vectorize1ArgType), 4320 NEONMAP1(vsrid_n_u64, aarch64_neon_vsri, Vectorize1ArgType), 4321 NEONMAP1(vuqaddb_s8, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 4322 NEONMAP1(vuqaddd_s64, aarch64_neon_suqadd, Add1ArgType), 4323 NEONMAP1(vuqaddh_s16, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 4324 NEONMAP1(vuqadds_s32, aarch64_neon_suqadd, Add1ArgType), 4325 // FP16 scalar intrinisics go here. 4326 NEONMAP1(vabdh_f16, aarch64_sisd_fabd, Add1ArgType), 4327 NEONMAP1(vcvtah_s32_f16, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 4328 NEONMAP1(vcvtah_s64_f16, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 4329 NEONMAP1(vcvtah_u32_f16, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 4330 NEONMAP1(vcvtah_u64_f16, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 4331 NEONMAP1(vcvth_n_f16_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 4332 NEONMAP1(vcvth_n_f16_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 4333 NEONMAP1(vcvth_n_f16_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 4334 NEONMAP1(vcvth_n_f16_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 4335 NEONMAP1(vcvth_n_s32_f16, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 4336 NEONMAP1(vcvth_n_s64_f16, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 4337 NEONMAP1(vcvth_n_u32_f16, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 4338 NEONMAP1(vcvth_n_u64_f16, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 4339 NEONMAP1(vcvtmh_s32_f16, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 4340 NEONMAP1(vcvtmh_s64_f16, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 4341 NEONMAP1(vcvtmh_u32_f16, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 4342 NEONMAP1(vcvtmh_u64_f16, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 4343 NEONMAP1(vcvtnh_s32_f16, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 4344 NEONMAP1(vcvtnh_s64_f16, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 4345 NEONMAP1(vcvtnh_u32_f16, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 4346 NEONMAP1(vcvtnh_u64_f16, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 4347 NEONMAP1(vcvtph_s32_f16, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 4348 NEONMAP1(vcvtph_s64_f16, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 4349 NEONMAP1(vcvtph_u32_f16, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 4350 NEONMAP1(vcvtph_u64_f16, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 4351 NEONMAP1(vmulxh_f16, aarch64_neon_fmulx, Add1ArgType), 4352 NEONMAP1(vrecpeh_f16, aarch64_neon_frecpe, Add1ArgType), 4353 NEONMAP1(vrecpxh_f16, aarch64_neon_frecpx, Add1ArgType), 4354 NEONMAP1(vrsqrteh_f16, aarch64_neon_frsqrte, Add1ArgType), 4355 NEONMAP1(vrsqrtsh_f16, aarch64_neon_frsqrts, Add1ArgType), 4356 }; 4357 4358 #undef NEONMAP0 4359 #undef NEONMAP1 4360 #undef NEONMAP2 4361 4362 static bool NEONSIMDIntrinsicsProvenSorted = false; 4363 4364 static bool AArch64SIMDIntrinsicsProvenSorted = false; 4365 static bool AArch64SISDIntrinsicsProvenSorted = false; 4366 4367 4368 static const NeonIntrinsicInfo * 4369 findNeonIntrinsicInMap(ArrayRef<NeonIntrinsicInfo> IntrinsicMap, 4370 unsigned BuiltinID, bool &MapProvenSorted) { 4371 4372 #ifndef NDEBUG 4373 if (!MapProvenSorted) { 4374 assert(std::is_sorted(std::begin(IntrinsicMap), std::end(IntrinsicMap))); 4375 MapProvenSorted = true; 4376 } 4377 #endif 4378 4379 const NeonIntrinsicInfo *Builtin = 4380 std::lower_bound(IntrinsicMap.begin(), IntrinsicMap.end(), BuiltinID); 4381 4382 if (Builtin != IntrinsicMap.end() && Builtin->BuiltinID == BuiltinID) 4383 return Builtin; 4384 4385 return nullptr; 4386 } 4387 4388 Function *CodeGenFunction::LookupNeonLLVMIntrinsic(unsigned IntrinsicID, 4389 unsigned Modifier, 4390 llvm::Type *ArgType, 4391 const CallExpr *E) { 4392 int VectorSize = 0; 4393 if (Modifier & Use64BitVectors) 4394 VectorSize = 64; 4395 else if (Modifier & Use128BitVectors) 4396 VectorSize = 128; 4397 4398 // Return type. 4399 SmallVector<llvm::Type *, 3> Tys; 4400 if (Modifier & AddRetType) { 4401 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 4402 if (Modifier & VectorizeRetType) 4403 Ty = llvm::VectorType::get( 4404 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); 4405 4406 Tys.push_back(Ty); 4407 } 4408 4409 // Arguments. 4410 if (Modifier & VectorizeArgTypes) { 4411 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; 4412 ArgType = llvm::VectorType::get(ArgType, Elts); 4413 } 4414 4415 if (Modifier & (Add1ArgType | Add2ArgTypes)) 4416 Tys.push_back(ArgType); 4417 4418 if (Modifier & Add2ArgTypes) 4419 Tys.push_back(ArgType); 4420 4421 if (Modifier & InventFloatType) 4422 Tys.push_back(FloatTy); 4423 4424 return CGM.getIntrinsic(IntrinsicID, Tys); 4425 } 4426 4427 static Value *EmitCommonNeonSISDBuiltinExpr(CodeGenFunction &CGF, 4428 const NeonIntrinsicInfo &SISDInfo, 4429 SmallVectorImpl<Value *> &Ops, 4430 const CallExpr *E) { 4431 unsigned BuiltinID = SISDInfo.BuiltinID; 4432 unsigned int Int = SISDInfo.LLVMIntrinsic; 4433 unsigned Modifier = SISDInfo.TypeModifier; 4434 const char *s = SISDInfo.NameHint; 4435 4436 switch (BuiltinID) { 4437 case NEON::BI__builtin_neon_vcled_s64: 4438 case NEON::BI__builtin_neon_vcled_u64: 4439 case NEON::BI__builtin_neon_vcles_f32: 4440 case NEON::BI__builtin_neon_vcled_f64: 4441 case NEON::BI__builtin_neon_vcltd_s64: 4442 case NEON::BI__builtin_neon_vcltd_u64: 4443 case NEON::BI__builtin_neon_vclts_f32: 4444 case NEON::BI__builtin_neon_vcltd_f64: 4445 case NEON::BI__builtin_neon_vcales_f32: 4446 case NEON::BI__builtin_neon_vcaled_f64: 4447 case NEON::BI__builtin_neon_vcalts_f32: 4448 case NEON::BI__builtin_neon_vcaltd_f64: 4449 // Only one direction of comparisons actually exist, cmle is actually a cmge 4450 // with swapped operands. The table gives us the right intrinsic but we 4451 // still need to do the swap. 4452 std::swap(Ops[0], Ops[1]); 4453 break; 4454 } 4455 4456 assert(Int && "Generic code assumes a valid intrinsic"); 4457 4458 // Determine the type(s) of this overloaded AArch64 intrinsic. 4459 const Expr *Arg = E->getArg(0); 4460 llvm::Type *ArgTy = CGF.ConvertType(Arg->getType()); 4461 Function *F = CGF.LookupNeonLLVMIntrinsic(Int, Modifier, ArgTy, E); 4462 4463 int j = 0; 4464 ConstantInt *C0 = ConstantInt::get(CGF.SizeTy, 0); 4465 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 4466 ai != ae; ++ai, ++j) { 4467 llvm::Type *ArgTy = ai->getType(); 4468 if (Ops[j]->getType()->getPrimitiveSizeInBits() == 4469 ArgTy->getPrimitiveSizeInBits()) 4470 continue; 4471 4472 assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy()); 4473 // The constant argument to an _n_ intrinsic always has Int32Ty, so truncate 4474 // it before inserting. 4475 Ops[j] = 4476 CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType()); 4477 Ops[j] = 4478 CGF.Builder.CreateInsertElement(UndefValue::get(ArgTy), Ops[j], C0); 4479 } 4480 4481 Value *Result = CGF.EmitNeonCall(F, Ops, s); 4482 llvm::Type *ResultType = CGF.ConvertType(E->getType()); 4483 if (ResultType->getPrimitiveSizeInBits() < 4484 Result->getType()->getPrimitiveSizeInBits()) 4485 return CGF.Builder.CreateExtractElement(Result, C0); 4486 4487 return CGF.Builder.CreateBitCast(Result, ResultType, s); 4488 } 4489 4490 Value *CodeGenFunction::EmitCommonNeonBuiltinExpr( 4491 unsigned BuiltinID, unsigned LLVMIntrinsic, unsigned AltLLVMIntrinsic, 4492 const char *NameHint, unsigned Modifier, const CallExpr *E, 4493 SmallVectorImpl<llvm::Value *> &Ops, Address PtrOp0, Address PtrOp1, 4494 llvm::Triple::ArchType Arch) { 4495 // Get the last argument, which specifies the vector type. 4496 llvm::APSInt NeonTypeConst; 4497 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 4498 if (!Arg->isIntegerConstantExpr(NeonTypeConst, getContext())) 4499 return nullptr; 4500 4501 // Determine the type of this overloaded NEON intrinsic. 4502 NeonTypeFlags Type(NeonTypeConst.getZExtValue()); 4503 bool Usgn = Type.isUnsigned(); 4504 bool Quad = Type.isQuad(); 4505 const bool HasLegalHalfType = getTarget().hasLegalHalfType(); 4506 4507 llvm::VectorType *VTy = GetNeonType(this, Type, HasLegalHalfType); 4508 llvm::Type *Ty = VTy; 4509 if (!Ty) 4510 return nullptr; 4511 4512 auto getAlignmentValue32 = [&](Address addr) -> Value* { 4513 return Builder.getInt32(addr.getAlignment().getQuantity()); 4514 }; 4515 4516 unsigned Int = LLVMIntrinsic; 4517 if ((Modifier & UnsignedAlts) && !Usgn) 4518 Int = AltLLVMIntrinsic; 4519 4520 switch (BuiltinID) { 4521 default: break; 4522 case NEON::BI__builtin_neon_vabs_v: 4523 case NEON::BI__builtin_neon_vabsq_v: 4524 if (VTy->getElementType()->isFloatingPointTy()) 4525 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, Ty), Ops, "vabs"); 4526 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), Ops, "vabs"); 4527 case NEON::BI__builtin_neon_vaddhn_v: { 4528 llvm::VectorType *SrcTy = 4529 llvm::VectorType::getExtendedElementVectorType(VTy); 4530 4531 // %sum = add <4 x i32> %lhs, %rhs 4532 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4533 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 4534 Ops[0] = Builder.CreateAdd(Ops[0], Ops[1], "vaddhn"); 4535 4536 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 4537 Constant *ShiftAmt = 4538 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 4539 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vaddhn"); 4540 4541 // %res = trunc <4 x i32> %high to <4 x i16> 4542 return Builder.CreateTrunc(Ops[0], VTy, "vaddhn"); 4543 } 4544 case NEON::BI__builtin_neon_vcale_v: 4545 case NEON::BI__builtin_neon_vcaleq_v: 4546 case NEON::BI__builtin_neon_vcalt_v: 4547 case NEON::BI__builtin_neon_vcaltq_v: 4548 std::swap(Ops[0], Ops[1]); 4549 LLVM_FALLTHROUGH; 4550 case NEON::BI__builtin_neon_vcage_v: 4551 case NEON::BI__builtin_neon_vcageq_v: 4552 case NEON::BI__builtin_neon_vcagt_v: 4553 case NEON::BI__builtin_neon_vcagtq_v: { 4554 llvm::Type *Ty; 4555 switch (VTy->getScalarSizeInBits()) { 4556 default: llvm_unreachable("unexpected type"); 4557 case 32: 4558 Ty = FloatTy; 4559 break; 4560 case 64: 4561 Ty = DoubleTy; 4562 break; 4563 case 16: 4564 Ty = HalfTy; 4565 break; 4566 } 4567 llvm::Type *VecFlt = llvm::VectorType::get(Ty, VTy->getNumElements()); 4568 llvm::Type *Tys[] = { VTy, VecFlt }; 4569 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 4570 return EmitNeonCall(F, Ops, NameHint); 4571 } 4572 case NEON::BI__builtin_neon_vceqz_v: 4573 case NEON::BI__builtin_neon_vceqzq_v: 4574 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OEQ, 4575 ICmpInst::ICMP_EQ, "vceqz"); 4576 case NEON::BI__builtin_neon_vcgez_v: 4577 case NEON::BI__builtin_neon_vcgezq_v: 4578 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGE, 4579 ICmpInst::ICMP_SGE, "vcgez"); 4580 case NEON::BI__builtin_neon_vclez_v: 4581 case NEON::BI__builtin_neon_vclezq_v: 4582 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLE, 4583 ICmpInst::ICMP_SLE, "vclez"); 4584 case NEON::BI__builtin_neon_vcgtz_v: 4585 case NEON::BI__builtin_neon_vcgtzq_v: 4586 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGT, 4587 ICmpInst::ICMP_SGT, "vcgtz"); 4588 case NEON::BI__builtin_neon_vcltz_v: 4589 case NEON::BI__builtin_neon_vcltzq_v: 4590 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLT, 4591 ICmpInst::ICMP_SLT, "vcltz"); 4592 case NEON::BI__builtin_neon_vclz_v: 4593 case NEON::BI__builtin_neon_vclzq_v: 4594 // We generate target-independent intrinsic, which needs a second argument 4595 // for whether or not clz of zero is undefined; on ARM it isn't. 4596 Ops.push_back(Builder.getInt1(getTarget().isCLZForZeroUndef())); 4597 break; 4598 case NEON::BI__builtin_neon_vcvt_f32_v: 4599 case NEON::BI__builtin_neon_vcvtq_f32_v: 4600 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4601 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, Quad), 4602 HasLegalHalfType); 4603 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 4604 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 4605 case NEON::BI__builtin_neon_vcvt_f16_v: 4606 case NEON::BI__builtin_neon_vcvtq_f16_v: 4607 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4608 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float16, false, Quad), 4609 HasLegalHalfType); 4610 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 4611 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 4612 case NEON::BI__builtin_neon_vcvt_n_f16_v: 4613 case NEON::BI__builtin_neon_vcvt_n_f32_v: 4614 case NEON::BI__builtin_neon_vcvt_n_f64_v: 4615 case NEON::BI__builtin_neon_vcvtq_n_f16_v: 4616 case NEON::BI__builtin_neon_vcvtq_n_f32_v: 4617 case NEON::BI__builtin_neon_vcvtq_n_f64_v: { 4618 llvm::Type *Tys[2] = { GetFloatNeonType(this, Type), Ty }; 4619 Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic; 4620 Function *F = CGM.getIntrinsic(Int, Tys); 4621 return EmitNeonCall(F, Ops, "vcvt_n"); 4622 } 4623 case NEON::BI__builtin_neon_vcvt_n_s16_v: 4624 case NEON::BI__builtin_neon_vcvt_n_s32_v: 4625 case NEON::BI__builtin_neon_vcvt_n_u16_v: 4626 case NEON::BI__builtin_neon_vcvt_n_u32_v: 4627 case NEON::BI__builtin_neon_vcvt_n_s64_v: 4628 case NEON::BI__builtin_neon_vcvt_n_u64_v: 4629 case NEON::BI__builtin_neon_vcvtq_n_s16_v: 4630 case NEON::BI__builtin_neon_vcvtq_n_s32_v: 4631 case NEON::BI__builtin_neon_vcvtq_n_u16_v: 4632 case NEON::BI__builtin_neon_vcvtq_n_u32_v: 4633 case NEON::BI__builtin_neon_vcvtq_n_s64_v: 4634 case NEON::BI__builtin_neon_vcvtq_n_u64_v: { 4635 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 4636 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 4637 return EmitNeonCall(F, Ops, "vcvt_n"); 4638 } 4639 case NEON::BI__builtin_neon_vcvt_s32_v: 4640 case NEON::BI__builtin_neon_vcvt_u32_v: 4641 case NEON::BI__builtin_neon_vcvt_s64_v: 4642 case NEON::BI__builtin_neon_vcvt_u64_v: 4643 case NEON::BI__builtin_neon_vcvt_s16_v: 4644 case NEON::BI__builtin_neon_vcvt_u16_v: 4645 case NEON::BI__builtin_neon_vcvtq_s32_v: 4646 case NEON::BI__builtin_neon_vcvtq_u32_v: 4647 case NEON::BI__builtin_neon_vcvtq_s64_v: 4648 case NEON::BI__builtin_neon_vcvtq_u64_v: 4649 case NEON::BI__builtin_neon_vcvtq_s16_v: 4650 case NEON::BI__builtin_neon_vcvtq_u16_v: { 4651 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 4652 return Usgn ? Builder.CreateFPToUI(Ops[0], Ty, "vcvt") 4653 : Builder.CreateFPToSI(Ops[0], Ty, "vcvt"); 4654 } 4655 case NEON::BI__builtin_neon_vcvta_s16_v: 4656 case NEON::BI__builtin_neon_vcvta_s32_v: 4657 case NEON::BI__builtin_neon_vcvta_s64_v: 4658 case NEON::BI__builtin_neon_vcvta_u32_v: 4659 case NEON::BI__builtin_neon_vcvta_u64_v: 4660 case NEON::BI__builtin_neon_vcvtaq_s16_v: 4661 case NEON::BI__builtin_neon_vcvtaq_s32_v: 4662 case NEON::BI__builtin_neon_vcvtaq_s64_v: 4663 case NEON::BI__builtin_neon_vcvtaq_u16_v: 4664 case NEON::BI__builtin_neon_vcvtaq_u32_v: 4665 case NEON::BI__builtin_neon_vcvtaq_u64_v: 4666 case NEON::BI__builtin_neon_vcvtn_s16_v: 4667 case NEON::BI__builtin_neon_vcvtn_s32_v: 4668 case NEON::BI__builtin_neon_vcvtn_s64_v: 4669 case NEON::BI__builtin_neon_vcvtn_u16_v: 4670 case NEON::BI__builtin_neon_vcvtn_u32_v: 4671 case NEON::BI__builtin_neon_vcvtn_u64_v: 4672 case NEON::BI__builtin_neon_vcvtnq_s16_v: 4673 case NEON::BI__builtin_neon_vcvtnq_s32_v: 4674 case NEON::BI__builtin_neon_vcvtnq_s64_v: 4675 case NEON::BI__builtin_neon_vcvtnq_u16_v: 4676 case NEON::BI__builtin_neon_vcvtnq_u32_v: 4677 case NEON::BI__builtin_neon_vcvtnq_u64_v: 4678 case NEON::BI__builtin_neon_vcvtp_s16_v: 4679 case NEON::BI__builtin_neon_vcvtp_s32_v: 4680 case NEON::BI__builtin_neon_vcvtp_s64_v: 4681 case NEON::BI__builtin_neon_vcvtp_u16_v: 4682 case NEON::BI__builtin_neon_vcvtp_u32_v: 4683 case NEON::BI__builtin_neon_vcvtp_u64_v: 4684 case NEON::BI__builtin_neon_vcvtpq_s16_v: 4685 case NEON::BI__builtin_neon_vcvtpq_s32_v: 4686 case NEON::BI__builtin_neon_vcvtpq_s64_v: 4687 case NEON::BI__builtin_neon_vcvtpq_u16_v: 4688 case NEON::BI__builtin_neon_vcvtpq_u32_v: 4689 case NEON::BI__builtin_neon_vcvtpq_u64_v: 4690 case NEON::BI__builtin_neon_vcvtm_s16_v: 4691 case NEON::BI__builtin_neon_vcvtm_s32_v: 4692 case NEON::BI__builtin_neon_vcvtm_s64_v: 4693 case NEON::BI__builtin_neon_vcvtm_u16_v: 4694 case NEON::BI__builtin_neon_vcvtm_u32_v: 4695 case NEON::BI__builtin_neon_vcvtm_u64_v: 4696 case NEON::BI__builtin_neon_vcvtmq_s16_v: 4697 case NEON::BI__builtin_neon_vcvtmq_s32_v: 4698 case NEON::BI__builtin_neon_vcvtmq_s64_v: 4699 case NEON::BI__builtin_neon_vcvtmq_u16_v: 4700 case NEON::BI__builtin_neon_vcvtmq_u32_v: 4701 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 4702 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 4703 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, NameHint); 4704 } 4705 case NEON::BI__builtin_neon_vext_v: 4706 case NEON::BI__builtin_neon_vextq_v: { 4707 int CV = cast<ConstantInt>(Ops[2])->getSExtValue(); 4708 SmallVector<uint32_t, 16> Indices; 4709 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 4710 Indices.push_back(i+CV); 4711 4712 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4713 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4714 return Builder.CreateShuffleVector(Ops[0], Ops[1], Indices, "vext"); 4715 } 4716 case NEON::BI__builtin_neon_vfma_v: 4717 case NEON::BI__builtin_neon_vfmaq_v: { 4718 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 4719 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4720 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4721 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4722 4723 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 4724 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 4725 } 4726 case NEON::BI__builtin_neon_vld1_v: 4727 case NEON::BI__builtin_neon_vld1q_v: { 4728 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4729 Ops.push_back(getAlignmentValue32(PtrOp0)); 4730 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, "vld1"); 4731 } 4732 case NEON::BI__builtin_neon_vld2_v: 4733 case NEON::BI__builtin_neon_vld2q_v: 4734 case NEON::BI__builtin_neon_vld3_v: 4735 case NEON::BI__builtin_neon_vld3q_v: 4736 case NEON::BI__builtin_neon_vld4_v: 4737 case NEON::BI__builtin_neon_vld4q_v: { 4738 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4739 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 4740 Value *Align = getAlignmentValue32(PtrOp1); 4741 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint); 4742 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4743 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4744 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4745 } 4746 case NEON::BI__builtin_neon_vld1_dup_v: 4747 case NEON::BI__builtin_neon_vld1q_dup_v: { 4748 Value *V = UndefValue::get(Ty); 4749 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 4750 PtrOp0 = Builder.CreateBitCast(PtrOp0, Ty); 4751 LoadInst *Ld = Builder.CreateLoad(PtrOp0); 4752 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 4753 Ops[0] = Builder.CreateInsertElement(V, Ld, CI); 4754 return EmitNeonSplat(Ops[0], CI); 4755 } 4756 case NEON::BI__builtin_neon_vld2_lane_v: 4757 case NEON::BI__builtin_neon_vld2q_lane_v: 4758 case NEON::BI__builtin_neon_vld3_lane_v: 4759 case NEON::BI__builtin_neon_vld3q_lane_v: 4760 case NEON::BI__builtin_neon_vld4_lane_v: 4761 case NEON::BI__builtin_neon_vld4q_lane_v: { 4762 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4763 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 4764 for (unsigned I = 2; I < Ops.size() - 1; ++I) 4765 Ops[I] = Builder.CreateBitCast(Ops[I], Ty); 4766 Ops.push_back(getAlignmentValue32(PtrOp1)); 4767 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), NameHint); 4768 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4769 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4770 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4771 } 4772 case NEON::BI__builtin_neon_vmovl_v: { 4773 llvm::Type *DTy =llvm::VectorType::getTruncatedElementVectorType(VTy); 4774 Ops[0] = Builder.CreateBitCast(Ops[0], DTy); 4775 if (Usgn) 4776 return Builder.CreateZExt(Ops[0], Ty, "vmovl"); 4777 return Builder.CreateSExt(Ops[0], Ty, "vmovl"); 4778 } 4779 case NEON::BI__builtin_neon_vmovn_v: { 4780 llvm::Type *QTy = llvm::VectorType::getExtendedElementVectorType(VTy); 4781 Ops[0] = Builder.CreateBitCast(Ops[0], QTy); 4782 return Builder.CreateTrunc(Ops[0], Ty, "vmovn"); 4783 } 4784 case NEON::BI__builtin_neon_vmull_v: 4785 // FIXME: the integer vmull operations could be emitted in terms of pure 4786 // LLVM IR (2 exts followed by a mul). Unfortunately LLVM has a habit of 4787 // hoisting the exts outside loops. Until global ISel comes along that can 4788 // see through such movement this leads to bad CodeGen. So we need an 4789 // intrinsic for now. 4790 Int = Usgn ? Intrinsic::arm_neon_vmullu : Intrinsic::arm_neon_vmulls; 4791 Int = Type.isPoly() ? (unsigned)Intrinsic::arm_neon_vmullp : Int; 4792 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 4793 case NEON::BI__builtin_neon_vpadal_v: 4794 case NEON::BI__builtin_neon_vpadalq_v: { 4795 // The source operand type has twice as many elements of half the size. 4796 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 4797 llvm::Type *EltTy = 4798 llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 4799 llvm::Type *NarrowTy = 4800 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 4801 llvm::Type *Tys[2] = { Ty, NarrowTy }; 4802 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, NameHint); 4803 } 4804 case NEON::BI__builtin_neon_vpaddl_v: 4805 case NEON::BI__builtin_neon_vpaddlq_v: { 4806 // The source operand type has twice as many elements of half the size. 4807 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 4808 llvm::Type *EltTy = llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 4809 llvm::Type *NarrowTy = 4810 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 4811 llvm::Type *Tys[2] = { Ty, NarrowTy }; 4812 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vpaddl"); 4813 } 4814 case NEON::BI__builtin_neon_vqdmlal_v: 4815 case NEON::BI__builtin_neon_vqdmlsl_v: { 4816 SmallVector<Value *, 2> MulOps(Ops.begin() + 1, Ops.end()); 4817 Ops[1] = 4818 EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), MulOps, "vqdmlal"); 4819 Ops.resize(2); 4820 return EmitNeonCall(CGM.getIntrinsic(AltLLVMIntrinsic, Ty), Ops, NameHint); 4821 } 4822 case NEON::BI__builtin_neon_vqshl_n_v: 4823 case NEON::BI__builtin_neon_vqshlq_n_v: 4824 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshl_n", 4825 1, false); 4826 case NEON::BI__builtin_neon_vqshlu_n_v: 4827 case NEON::BI__builtin_neon_vqshluq_n_v: 4828 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshlu_n", 4829 1, false); 4830 case NEON::BI__builtin_neon_vrecpe_v: 4831 case NEON::BI__builtin_neon_vrecpeq_v: 4832 case NEON::BI__builtin_neon_vrsqrte_v: 4833 case NEON::BI__builtin_neon_vrsqrteq_v: 4834 Int = Ty->isFPOrFPVectorTy() ? LLVMIntrinsic : AltLLVMIntrinsic; 4835 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint); 4836 4837 case NEON::BI__builtin_neon_vrshr_n_v: 4838 case NEON::BI__builtin_neon_vrshrq_n_v: 4839 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n", 4840 1, true); 4841 case NEON::BI__builtin_neon_vshl_n_v: 4842 case NEON::BI__builtin_neon_vshlq_n_v: 4843 Ops[1] = EmitNeonShiftVector(Ops[1], Ty, false); 4844 return Builder.CreateShl(Builder.CreateBitCast(Ops[0],Ty), Ops[1], 4845 "vshl_n"); 4846 case NEON::BI__builtin_neon_vshll_n_v: { 4847 llvm::Type *SrcTy = llvm::VectorType::getTruncatedElementVectorType(VTy); 4848 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4849 if (Usgn) 4850 Ops[0] = Builder.CreateZExt(Ops[0], VTy); 4851 else 4852 Ops[0] = Builder.CreateSExt(Ops[0], VTy); 4853 Ops[1] = EmitNeonShiftVector(Ops[1], VTy, false); 4854 return Builder.CreateShl(Ops[0], Ops[1], "vshll_n"); 4855 } 4856 case NEON::BI__builtin_neon_vshrn_n_v: { 4857 llvm::Type *SrcTy = llvm::VectorType::getExtendedElementVectorType(VTy); 4858 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4859 Ops[1] = EmitNeonShiftVector(Ops[1], SrcTy, false); 4860 if (Usgn) 4861 Ops[0] = Builder.CreateLShr(Ops[0], Ops[1]); 4862 else 4863 Ops[0] = Builder.CreateAShr(Ops[0], Ops[1]); 4864 return Builder.CreateTrunc(Ops[0], Ty, "vshrn_n"); 4865 } 4866 case NEON::BI__builtin_neon_vshr_n_v: 4867 case NEON::BI__builtin_neon_vshrq_n_v: 4868 return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, Usgn, "vshr_n"); 4869 case NEON::BI__builtin_neon_vst1_v: 4870 case NEON::BI__builtin_neon_vst1q_v: 4871 case NEON::BI__builtin_neon_vst2_v: 4872 case NEON::BI__builtin_neon_vst2q_v: 4873 case NEON::BI__builtin_neon_vst3_v: 4874 case NEON::BI__builtin_neon_vst3q_v: 4875 case NEON::BI__builtin_neon_vst4_v: 4876 case NEON::BI__builtin_neon_vst4q_v: 4877 case NEON::BI__builtin_neon_vst2_lane_v: 4878 case NEON::BI__builtin_neon_vst2q_lane_v: 4879 case NEON::BI__builtin_neon_vst3_lane_v: 4880 case NEON::BI__builtin_neon_vst3q_lane_v: 4881 case NEON::BI__builtin_neon_vst4_lane_v: 4882 case NEON::BI__builtin_neon_vst4q_lane_v: { 4883 llvm::Type *Tys[] = {Int8PtrTy, Ty}; 4884 Ops.push_back(getAlignmentValue32(PtrOp0)); 4885 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 4886 } 4887 case NEON::BI__builtin_neon_vsubhn_v: { 4888 llvm::VectorType *SrcTy = 4889 llvm::VectorType::getExtendedElementVectorType(VTy); 4890 4891 // %sum = add <4 x i32> %lhs, %rhs 4892 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4893 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 4894 Ops[0] = Builder.CreateSub(Ops[0], Ops[1], "vsubhn"); 4895 4896 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 4897 Constant *ShiftAmt = 4898 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 4899 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vsubhn"); 4900 4901 // %res = trunc <4 x i32> %high to <4 x i16> 4902 return Builder.CreateTrunc(Ops[0], VTy, "vsubhn"); 4903 } 4904 case NEON::BI__builtin_neon_vtrn_v: 4905 case NEON::BI__builtin_neon_vtrnq_v: { 4906 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4907 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4908 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4909 Value *SV = nullptr; 4910 4911 for (unsigned vi = 0; vi != 2; ++vi) { 4912 SmallVector<uint32_t, 16> Indices; 4913 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 4914 Indices.push_back(i+vi); 4915 Indices.push_back(i+e+vi); 4916 } 4917 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4918 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 4919 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4920 } 4921 return SV; 4922 } 4923 case NEON::BI__builtin_neon_vtst_v: 4924 case NEON::BI__builtin_neon_vtstq_v: { 4925 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4926 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4927 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 4928 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 4929 ConstantAggregateZero::get(Ty)); 4930 return Builder.CreateSExt(Ops[0], Ty, "vtst"); 4931 } 4932 case NEON::BI__builtin_neon_vuzp_v: 4933 case NEON::BI__builtin_neon_vuzpq_v: { 4934 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4935 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4936 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4937 Value *SV = nullptr; 4938 4939 for (unsigned vi = 0; vi != 2; ++vi) { 4940 SmallVector<uint32_t, 16> Indices; 4941 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 4942 Indices.push_back(2*i+vi); 4943 4944 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4945 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 4946 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4947 } 4948 return SV; 4949 } 4950 case NEON::BI__builtin_neon_vzip_v: 4951 case NEON::BI__builtin_neon_vzipq_v: { 4952 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4953 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4954 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4955 Value *SV = nullptr; 4956 4957 for (unsigned vi = 0; vi != 2; ++vi) { 4958 SmallVector<uint32_t, 16> Indices; 4959 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 4960 Indices.push_back((i + vi*e) >> 1); 4961 Indices.push_back(((i + vi*e) >> 1)+e); 4962 } 4963 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4964 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 4965 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4966 } 4967 return SV; 4968 } 4969 case NEON::BI__builtin_neon_vdot_v: 4970 case NEON::BI__builtin_neon_vdotq_v: { 4971 llvm::Type *InputTy = 4972 llvm::VectorType::get(Int8Ty, Ty->getPrimitiveSizeInBits() / 8); 4973 llvm::Type *Tys[2] = { Ty, InputTy }; 4974 Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic; 4975 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vdot"); 4976 } 4977 } 4978 4979 assert(Int && "Expected valid intrinsic number"); 4980 4981 // Determine the type(s) of this overloaded AArch64 intrinsic. 4982 Function *F = LookupNeonLLVMIntrinsic(Int, Modifier, Ty, E); 4983 4984 Value *Result = EmitNeonCall(F, Ops, NameHint); 4985 llvm::Type *ResultType = ConvertType(E->getType()); 4986 // AArch64 intrinsic one-element vector type cast to 4987 // scalar type expected by the builtin 4988 return Builder.CreateBitCast(Result, ResultType, NameHint); 4989 } 4990 4991 Value *CodeGenFunction::EmitAArch64CompareBuiltinExpr( 4992 Value *Op, llvm::Type *Ty, const CmpInst::Predicate Fp, 4993 const CmpInst::Predicate Ip, const Twine &Name) { 4994 llvm::Type *OTy = Op->getType(); 4995 4996 // FIXME: this is utterly horrific. We should not be looking at previous 4997 // codegen context to find out what needs doing. Unfortunately TableGen 4998 // currently gives us exactly the same calls for vceqz_f32 and vceqz_s32 4999 // (etc). 5000 if (BitCastInst *BI = dyn_cast<BitCastInst>(Op)) 5001 OTy = BI->getOperand(0)->getType(); 5002 5003 Op = Builder.CreateBitCast(Op, OTy); 5004 if (OTy->getScalarType()->isFloatingPointTy()) { 5005 Op = Builder.CreateFCmp(Fp, Op, Constant::getNullValue(OTy)); 5006 } else { 5007 Op = Builder.CreateICmp(Ip, Op, Constant::getNullValue(OTy)); 5008 } 5009 return Builder.CreateSExt(Op, Ty, Name); 5010 } 5011 5012 static Value *packTBLDVectorList(CodeGenFunction &CGF, ArrayRef<Value *> Ops, 5013 Value *ExtOp, Value *IndexOp, 5014 llvm::Type *ResTy, unsigned IntID, 5015 const char *Name) { 5016 SmallVector<Value *, 2> TblOps; 5017 if (ExtOp) 5018 TblOps.push_back(ExtOp); 5019 5020 // Build a vector containing sequential number like (0, 1, 2, ..., 15) 5021 SmallVector<uint32_t, 16> Indices; 5022 llvm::VectorType *TblTy = cast<llvm::VectorType>(Ops[0]->getType()); 5023 for (unsigned i = 0, e = TblTy->getNumElements(); i != e; ++i) { 5024 Indices.push_back(2*i); 5025 Indices.push_back(2*i+1); 5026 } 5027 5028 int PairPos = 0, End = Ops.size() - 1; 5029 while (PairPos < End) { 5030 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 5031 Ops[PairPos+1], Indices, 5032 Name)); 5033 PairPos += 2; 5034 } 5035 5036 // If there's an odd number of 64-bit lookup table, fill the high 64-bit 5037 // of the 128-bit lookup table with zero. 5038 if (PairPos == End) { 5039 Value *ZeroTbl = ConstantAggregateZero::get(TblTy); 5040 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 5041 ZeroTbl, Indices, Name)); 5042 } 5043 5044 Function *TblF; 5045 TblOps.push_back(IndexOp); 5046 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); 5047 5048 return CGF.EmitNeonCall(TblF, TblOps, Name); 5049 } 5050 5051 Value *CodeGenFunction::GetValueForARMHint(unsigned BuiltinID) { 5052 unsigned Value; 5053 switch (BuiltinID) { 5054 default: 5055 return nullptr; 5056 case ARM::BI__builtin_arm_nop: 5057 Value = 0; 5058 break; 5059 case ARM::BI__builtin_arm_yield: 5060 case ARM::BI__yield: 5061 Value = 1; 5062 break; 5063 case ARM::BI__builtin_arm_wfe: 5064 case ARM::BI__wfe: 5065 Value = 2; 5066 break; 5067 case ARM::BI__builtin_arm_wfi: 5068 case ARM::BI__wfi: 5069 Value = 3; 5070 break; 5071 case ARM::BI__builtin_arm_sev: 5072 case ARM::BI__sev: 5073 Value = 4; 5074 break; 5075 case ARM::BI__builtin_arm_sevl: 5076 case ARM::BI__sevl: 5077 Value = 5; 5078 break; 5079 } 5080 5081 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_hint), 5082 llvm::ConstantInt::get(Int32Ty, Value)); 5083 } 5084 5085 // Generates the IR for the read/write special register builtin, 5086 // ValueType is the type of the value that is to be written or read, 5087 // RegisterType is the type of the register being written to or read from. 5088 static Value *EmitSpecialRegisterBuiltin(CodeGenFunction &CGF, 5089 const CallExpr *E, 5090 llvm::Type *RegisterType, 5091 llvm::Type *ValueType, 5092 bool IsRead, 5093 StringRef SysReg = "") { 5094 // write and register intrinsics only support 32 and 64 bit operations. 5095 assert((RegisterType->isIntegerTy(32) || RegisterType->isIntegerTy(64)) 5096 && "Unsupported size for register."); 5097 5098 CodeGen::CGBuilderTy &Builder = CGF.Builder; 5099 CodeGen::CodeGenModule &CGM = CGF.CGM; 5100 LLVMContext &Context = CGM.getLLVMContext(); 5101 5102 if (SysReg.empty()) { 5103 const Expr *SysRegStrExpr = E->getArg(0)->IgnoreParenCasts(); 5104 SysReg = cast<clang::StringLiteral>(SysRegStrExpr)->getString(); 5105 } 5106 5107 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysReg) }; 5108 llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); 5109 llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); 5110 5111 llvm::Type *Types[] = { RegisterType }; 5112 5113 bool MixedTypes = RegisterType->isIntegerTy(64) && ValueType->isIntegerTy(32); 5114 assert(!(RegisterType->isIntegerTy(32) && ValueType->isIntegerTy(64)) 5115 && "Can't fit 64-bit value in 32-bit register"); 5116 5117 if (IsRead) { 5118 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::read_register, Types); 5119 llvm::Value *Call = Builder.CreateCall(F, Metadata); 5120 5121 if (MixedTypes) 5122 // Read into 64 bit register and then truncate result to 32 bit. 5123 return Builder.CreateTrunc(Call, ValueType); 5124 5125 if (ValueType->isPointerTy()) 5126 // Have i32/i64 result (Call) but want to return a VoidPtrTy (i8*). 5127 return Builder.CreateIntToPtr(Call, ValueType); 5128 5129 return Call; 5130 } 5131 5132 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types); 5133 llvm::Value *ArgValue = CGF.EmitScalarExpr(E->getArg(1)); 5134 if (MixedTypes) { 5135 // Extend 32 bit write value to 64 bit to pass to write. 5136 ArgValue = Builder.CreateZExt(ArgValue, RegisterType); 5137 return Builder.CreateCall(F, { Metadata, ArgValue }); 5138 } 5139 5140 if (ValueType->isPointerTy()) { 5141 // Have VoidPtrTy ArgValue but want to return an i32/i64. 5142 ArgValue = Builder.CreatePtrToInt(ArgValue, RegisterType); 5143 return Builder.CreateCall(F, { Metadata, ArgValue }); 5144 } 5145 5146 return Builder.CreateCall(F, { Metadata, ArgValue }); 5147 } 5148 5149 /// Return true if BuiltinID is an overloaded Neon intrinsic with an extra 5150 /// argument that specifies the vector type. 5151 static bool HasExtraNeonArgument(unsigned BuiltinID) { 5152 switch (BuiltinID) { 5153 default: break; 5154 case NEON::BI__builtin_neon_vget_lane_i8: 5155 case NEON::BI__builtin_neon_vget_lane_i16: 5156 case NEON::BI__builtin_neon_vget_lane_i32: 5157 case NEON::BI__builtin_neon_vget_lane_i64: 5158 case NEON::BI__builtin_neon_vget_lane_f32: 5159 case NEON::BI__builtin_neon_vgetq_lane_i8: 5160 case NEON::BI__builtin_neon_vgetq_lane_i16: 5161 case NEON::BI__builtin_neon_vgetq_lane_i32: 5162 case NEON::BI__builtin_neon_vgetq_lane_i64: 5163 case NEON::BI__builtin_neon_vgetq_lane_f32: 5164 case NEON::BI__builtin_neon_vset_lane_i8: 5165 case NEON::BI__builtin_neon_vset_lane_i16: 5166 case NEON::BI__builtin_neon_vset_lane_i32: 5167 case NEON::BI__builtin_neon_vset_lane_i64: 5168 case NEON::BI__builtin_neon_vset_lane_f32: 5169 case NEON::BI__builtin_neon_vsetq_lane_i8: 5170 case NEON::BI__builtin_neon_vsetq_lane_i16: 5171 case NEON::BI__builtin_neon_vsetq_lane_i32: 5172 case NEON::BI__builtin_neon_vsetq_lane_i64: 5173 case NEON::BI__builtin_neon_vsetq_lane_f32: 5174 case NEON::BI__builtin_neon_vsha1h_u32: 5175 case NEON::BI__builtin_neon_vsha1cq_u32: 5176 case NEON::BI__builtin_neon_vsha1pq_u32: 5177 case NEON::BI__builtin_neon_vsha1mq_u32: 5178 case clang::ARM::BI_MoveToCoprocessor: 5179 case clang::ARM::BI_MoveToCoprocessor2: 5180 return false; 5181 } 5182 return true; 5183 } 5184 5185 Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, 5186 const CallExpr *E, 5187 llvm::Triple::ArchType Arch) { 5188 if (auto Hint = GetValueForARMHint(BuiltinID)) 5189 return Hint; 5190 5191 if (BuiltinID == ARM::BI__emit) { 5192 bool IsThumb = getTarget().getTriple().getArch() == llvm::Triple::thumb; 5193 llvm::FunctionType *FTy = 5194 llvm::FunctionType::get(VoidTy, /*Variadic=*/false); 5195 5196 APSInt Value; 5197 if (!E->getArg(0)->EvaluateAsInt(Value, CGM.getContext())) 5198 llvm_unreachable("Sema will ensure that the parameter is constant"); 5199 5200 uint64_t ZExtValue = Value.zextOrTrunc(IsThumb ? 16 : 32).getZExtValue(); 5201 5202 llvm::InlineAsm *Emit = 5203 IsThumb ? InlineAsm::get(FTy, ".inst.n 0x" + utohexstr(ZExtValue), "", 5204 /*SideEffects=*/true) 5205 : InlineAsm::get(FTy, ".inst 0x" + utohexstr(ZExtValue), "", 5206 /*SideEffects=*/true); 5207 5208 return Builder.CreateCall(Emit); 5209 } 5210 5211 if (BuiltinID == ARM::BI__builtin_arm_dbg) { 5212 Value *Option = EmitScalarExpr(E->getArg(0)); 5213 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_dbg), Option); 5214 } 5215 5216 if (BuiltinID == ARM::BI__builtin_arm_prefetch) { 5217 Value *Address = EmitScalarExpr(E->getArg(0)); 5218 Value *RW = EmitScalarExpr(E->getArg(1)); 5219 Value *IsData = EmitScalarExpr(E->getArg(2)); 5220 5221 // Locality is not supported on ARM target 5222 Value *Locality = llvm::ConstantInt::get(Int32Ty, 3); 5223 5224 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 5225 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 5226 } 5227 5228 if (BuiltinID == ARM::BI__builtin_arm_rbit) { 5229 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 5230 return Builder.CreateCall( 5231 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 5232 } 5233 5234 if (BuiltinID == ARM::BI__clear_cache) { 5235 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 5236 const FunctionDecl *FD = E->getDirectCallee(); 5237 Value *Ops[2]; 5238 for (unsigned i = 0; i < 2; i++) 5239 Ops[i] = EmitScalarExpr(E->getArg(i)); 5240 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 5241 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 5242 StringRef Name = FD->getName(); 5243 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 5244 } 5245 5246 if (BuiltinID == ARM::BI__builtin_arm_mcrr || 5247 BuiltinID == ARM::BI__builtin_arm_mcrr2) { 5248 Function *F; 5249 5250 switch (BuiltinID) { 5251 default: llvm_unreachable("unexpected builtin"); 5252 case ARM::BI__builtin_arm_mcrr: 5253 F = CGM.getIntrinsic(Intrinsic::arm_mcrr); 5254 break; 5255 case ARM::BI__builtin_arm_mcrr2: 5256 F = CGM.getIntrinsic(Intrinsic::arm_mcrr2); 5257 break; 5258 } 5259 5260 // MCRR{2} instruction has 5 operands but 5261 // the intrinsic has 4 because Rt and Rt2 5262 // are represented as a single unsigned 64 5263 // bit integer in the intrinsic definition 5264 // but internally it's represented as 2 32 5265 // bit integers. 5266 5267 Value *Coproc = EmitScalarExpr(E->getArg(0)); 5268 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 5269 Value *RtAndRt2 = EmitScalarExpr(E->getArg(2)); 5270 Value *CRm = EmitScalarExpr(E->getArg(3)); 5271 5272 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 5273 Value *Rt = Builder.CreateTruncOrBitCast(RtAndRt2, Int32Ty); 5274 Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); 5275 Rt2 = Builder.CreateTruncOrBitCast(Rt2, Int32Ty); 5276 5277 return Builder.CreateCall(F, {Coproc, Opc1, Rt, Rt2, CRm}); 5278 } 5279 5280 if (BuiltinID == ARM::BI__builtin_arm_mrrc || 5281 BuiltinID == ARM::BI__builtin_arm_mrrc2) { 5282 Function *F; 5283 5284 switch (BuiltinID) { 5285 default: llvm_unreachable("unexpected builtin"); 5286 case ARM::BI__builtin_arm_mrrc: 5287 F = CGM.getIntrinsic(Intrinsic::arm_mrrc); 5288 break; 5289 case ARM::BI__builtin_arm_mrrc2: 5290 F = CGM.getIntrinsic(Intrinsic::arm_mrrc2); 5291 break; 5292 } 5293 5294 Value *Coproc = EmitScalarExpr(E->getArg(0)); 5295 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 5296 Value *CRm = EmitScalarExpr(E->getArg(2)); 5297 Value *RtAndRt2 = Builder.CreateCall(F, {Coproc, Opc1, CRm}); 5298 5299 // Returns an unsigned 64 bit integer, represented 5300 // as two 32 bit integers. 5301 5302 Value *Rt = Builder.CreateExtractValue(RtAndRt2, 1); 5303 Value *Rt1 = Builder.CreateExtractValue(RtAndRt2, 0); 5304 Rt = Builder.CreateZExt(Rt, Int64Ty); 5305 Rt1 = Builder.CreateZExt(Rt1, Int64Ty); 5306 5307 Value *ShiftCast = llvm::ConstantInt::get(Int64Ty, 32); 5308 RtAndRt2 = Builder.CreateShl(Rt, ShiftCast, "shl", true); 5309 RtAndRt2 = Builder.CreateOr(RtAndRt2, Rt1); 5310 5311 return Builder.CreateBitCast(RtAndRt2, ConvertType(E->getType())); 5312 } 5313 5314 if (BuiltinID == ARM::BI__builtin_arm_ldrexd || 5315 ((BuiltinID == ARM::BI__builtin_arm_ldrex || 5316 BuiltinID == ARM::BI__builtin_arm_ldaex) && 5317 getContext().getTypeSize(E->getType()) == 64) || 5318 BuiltinID == ARM::BI__ldrexd) { 5319 Function *F; 5320 5321 switch (BuiltinID) { 5322 default: llvm_unreachable("unexpected builtin"); 5323 case ARM::BI__builtin_arm_ldaex: 5324 F = CGM.getIntrinsic(Intrinsic::arm_ldaexd); 5325 break; 5326 case ARM::BI__builtin_arm_ldrexd: 5327 case ARM::BI__builtin_arm_ldrex: 5328 case ARM::BI__ldrexd: 5329 F = CGM.getIntrinsic(Intrinsic::arm_ldrexd); 5330 break; 5331 } 5332 5333 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 5334 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 5335 "ldrexd"); 5336 5337 Value *Val0 = Builder.CreateExtractValue(Val, 1); 5338 Value *Val1 = Builder.CreateExtractValue(Val, 0); 5339 Val0 = Builder.CreateZExt(Val0, Int64Ty); 5340 Val1 = Builder.CreateZExt(Val1, Int64Ty); 5341 5342 Value *ShiftCst = llvm::ConstantInt::get(Int64Ty, 32); 5343 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 5344 Val = Builder.CreateOr(Val, Val1); 5345 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 5346 } 5347 5348 if (BuiltinID == ARM::BI__builtin_arm_ldrex || 5349 BuiltinID == ARM::BI__builtin_arm_ldaex) { 5350 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 5351 5352 QualType Ty = E->getType(); 5353 llvm::Type *RealResTy = ConvertType(Ty); 5354 llvm::Type *PtrTy = llvm::IntegerType::get( 5355 getLLVMContext(), getContext().getTypeSize(Ty))->getPointerTo(); 5356 LoadAddr = Builder.CreateBitCast(LoadAddr, PtrTy); 5357 5358 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_ldaex 5359 ? Intrinsic::arm_ldaex 5360 : Intrinsic::arm_ldrex, 5361 PtrTy); 5362 Value *Val = Builder.CreateCall(F, LoadAddr, "ldrex"); 5363 5364 if (RealResTy->isPointerTy()) 5365 return Builder.CreateIntToPtr(Val, RealResTy); 5366 else { 5367 llvm::Type *IntResTy = llvm::IntegerType::get( 5368 getLLVMContext(), CGM.getDataLayout().getTypeSizeInBits(RealResTy)); 5369 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 5370 return Builder.CreateBitCast(Val, RealResTy); 5371 } 5372 } 5373 5374 if (BuiltinID == ARM::BI__builtin_arm_strexd || 5375 ((BuiltinID == ARM::BI__builtin_arm_stlex || 5376 BuiltinID == ARM::BI__builtin_arm_strex) && 5377 getContext().getTypeSize(E->getArg(0)->getType()) == 64)) { 5378 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 5379 ? Intrinsic::arm_stlexd 5380 : Intrinsic::arm_strexd); 5381 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty); 5382 5383 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 5384 Value *Val = EmitScalarExpr(E->getArg(0)); 5385 Builder.CreateStore(Val, Tmp); 5386 5387 Address LdPtr = Builder.CreateBitCast(Tmp,llvm::PointerType::getUnqual(STy)); 5388 Val = Builder.CreateLoad(LdPtr); 5389 5390 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 5391 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 5392 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), Int8PtrTy); 5393 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "strexd"); 5394 } 5395 5396 if (BuiltinID == ARM::BI__builtin_arm_strex || 5397 BuiltinID == ARM::BI__builtin_arm_stlex) { 5398 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 5399 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 5400 5401 QualType Ty = E->getArg(0)->getType(); 5402 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 5403 getContext().getTypeSize(Ty)); 5404 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 5405 5406 if (StoreVal->getType()->isPointerTy()) 5407 StoreVal = Builder.CreatePtrToInt(StoreVal, Int32Ty); 5408 else { 5409 llvm::Type *IntTy = llvm::IntegerType::get( 5410 getLLVMContext(), 5411 CGM.getDataLayout().getTypeSizeInBits(StoreVal->getType())); 5412 StoreVal = Builder.CreateBitCast(StoreVal, IntTy); 5413 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int32Ty); 5414 } 5415 5416 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 5417 ? Intrinsic::arm_stlex 5418 : Intrinsic::arm_strex, 5419 StoreAddr->getType()); 5420 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "strex"); 5421 } 5422 5423 switch (BuiltinID) { 5424 case ARM::BI__iso_volatile_load8: 5425 case ARM::BI__iso_volatile_load16: 5426 case ARM::BI__iso_volatile_load32: 5427 case ARM::BI__iso_volatile_load64: { 5428 Value *Ptr = EmitScalarExpr(E->getArg(0)); 5429 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 5430 CharUnits LoadSize = getContext().getTypeSizeInChars(ElTy); 5431 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 5432 LoadSize.getQuantity() * 8); 5433 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 5434 llvm::LoadInst *Load = 5435 Builder.CreateAlignedLoad(Ptr, LoadSize); 5436 Load->setVolatile(true); 5437 return Load; 5438 } 5439 case ARM::BI__iso_volatile_store8: 5440 case ARM::BI__iso_volatile_store16: 5441 case ARM::BI__iso_volatile_store32: 5442 case ARM::BI__iso_volatile_store64: { 5443 Value *Ptr = EmitScalarExpr(E->getArg(0)); 5444 Value *Value = EmitScalarExpr(E->getArg(1)); 5445 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 5446 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 5447 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 5448 StoreSize.getQuantity() * 8); 5449 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 5450 llvm::StoreInst *Store = 5451 Builder.CreateAlignedStore(Value, Ptr, 5452 StoreSize); 5453 Store->setVolatile(true); 5454 return Store; 5455 } 5456 } 5457 5458 if (BuiltinID == ARM::BI__builtin_arm_clrex) { 5459 Function *F = CGM.getIntrinsic(Intrinsic::arm_clrex); 5460 return Builder.CreateCall(F); 5461 } 5462 5463 // CRC32 5464 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 5465 switch (BuiltinID) { 5466 case ARM::BI__builtin_arm_crc32b: 5467 CRCIntrinsicID = Intrinsic::arm_crc32b; break; 5468 case ARM::BI__builtin_arm_crc32cb: 5469 CRCIntrinsicID = Intrinsic::arm_crc32cb; break; 5470 case ARM::BI__builtin_arm_crc32h: 5471 CRCIntrinsicID = Intrinsic::arm_crc32h; break; 5472 case ARM::BI__builtin_arm_crc32ch: 5473 CRCIntrinsicID = Intrinsic::arm_crc32ch; break; 5474 case ARM::BI__builtin_arm_crc32w: 5475 case ARM::BI__builtin_arm_crc32d: 5476 CRCIntrinsicID = Intrinsic::arm_crc32w; break; 5477 case ARM::BI__builtin_arm_crc32cw: 5478 case ARM::BI__builtin_arm_crc32cd: 5479 CRCIntrinsicID = Intrinsic::arm_crc32cw; break; 5480 } 5481 5482 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 5483 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 5484 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 5485 5486 // crc32{c,}d intrinsics are implemnted as two calls to crc32{c,}w 5487 // intrinsics, hence we need different codegen for these cases. 5488 if (BuiltinID == ARM::BI__builtin_arm_crc32d || 5489 BuiltinID == ARM::BI__builtin_arm_crc32cd) { 5490 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 5491 Value *Arg1a = Builder.CreateTruncOrBitCast(Arg1, Int32Ty); 5492 Value *Arg1b = Builder.CreateLShr(Arg1, C1); 5493 Arg1b = Builder.CreateTruncOrBitCast(Arg1b, Int32Ty); 5494 5495 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 5496 Value *Res = Builder.CreateCall(F, {Arg0, Arg1a}); 5497 return Builder.CreateCall(F, {Res, Arg1b}); 5498 } else { 5499 Arg1 = Builder.CreateZExtOrBitCast(Arg1, Int32Ty); 5500 5501 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 5502 return Builder.CreateCall(F, {Arg0, Arg1}); 5503 } 5504 } 5505 5506 if (BuiltinID == ARM::BI__builtin_arm_rsr || 5507 BuiltinID == ARM::BI__builtin_arm_rsr64 || 5508 BuiltinID == ARM::BI__builtin_arm_rsrp || 5509 BuiltinID == ARM::BI__builtin_arm_wsr || 5510 BuiltinID == ARM::BI__builtin_arm_wsr64 || 5511 BuiltinID == ARM::BI__builtin_arm_wsrp) { 5512 5513 bool IsRead = BuiltinID == ARM::BI__builtin_arm_rsr || 5514 BuiltinID == ARM::BI__builtin_arm_rsr64 || 5515 BuiltinID == ARM::BI__builtin_arm_rsrp; 5516 5517 bool IsPointerBuiltin = BuiltinID == ARM::BI__builtin_arm_rsrp || 5518 BuiltinID == ARM::BI__builtin_arm_wsrp; 5519 5520 bool Is64Bit = BuiltinID == ARM::BI__builtin_arm_rsr64 || 5521 BuiltinID == ARM::BI__builtin_arm_wsr64; 5522 5523 llvm::Type *ValueType; 5524 llvm::Type *RegisterType; 5525 if (IsPointerBuiltin) { 5526 ValueType = VoidPtrTy; 5527 RegisterType = Int32Ty; 5528 } else if (Is64Bit) { 5529 ValueType = RegisterType = Int64Ty; 5530 } else { 5531 ValueType = RegisterType = Int32Ty; 5532 } 5533 5534 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 5535 } 5536 5537 // Find out if any arguments are required to be integer constant 5538 // expressions. 5539 unsigned ICEArguments = 0; 5540 ASTContext::GetBuiltinTypeError Error; 5541 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 5542 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 5543 5544 auto getAlignmentValue32 = [&](Address addr) -> Value* { 5545 return Builder.getInt32(addr.getAlignment().getQuantity()); 5546 }; 5547 5548 Address PtrOp0 = Address::invalid(); 5549 Address PtrOp1 = Address::invalid(); 5550 SmallVector<Value*, 4> Ops; 5551 bool HasExtraArg = HasExtraNeonArgument(BuiltinID); 5552 unsigned NumArgs = E->getNumArgs() - (HasExtraArg ? 1 : 0); 5553 for (unsigned i = 0, e = NumArgs; i != e; i++) { 5554 if (i == 0) { 5555 switch (BuiltinID) { 5556 case NEON::BI__builtin_neon_vld1_v: 5557 case NEON::BI__builtin_neon_vld1q_v: 5558 case NEON::BI__builtin_neon_vld1q_lane_v: 5559 case NEON::BI__builtin_neon_vld1_lane_v: 5560 case NEON::BI__builtin_neon_vld1_dup_v: 5561 case NEON::BI__builtin_neon_vld1q_dup_v: 5562 case NEON::BI__builtin_neon_vst1_v: 5563 case NEON::BI__builtin_neon_vst1q_v: 5564 case NEON::BI__builtin_neon_vst1q_lane_v: 5565 case NEON::BI__builtin_neon_vst1_lane_v: 5566 case NEON::BI__builtin_neon_vst2_v: 5567 case NEON::BI__builtin_neon_vst2q_v: 5568 case NEON::BI__builtin_neon_vst2_lane_v: 5569 case NEON::BI__builtin_neon_vst2q_lane_v: 5570 case NEON::BI__builtin_neon_vst3_v: 5571 case NEON::BI__builtin_neon_vst3q_v: 5572 case NEON::BI__builtin_neon_vst3_lane_v: 5573 case NEON::BI__builtin_neon_vst3q_lane_v: 5574 case NEON::BI__builtin_neon_vst4_v: 5575 case NEON::BI__builtin_neon_vst4q_v: 5576 case NEON::BI__builtin_neon_vst4_lane_v: 5577 case NEON::BI__builtin_neon_vst4q_lane_v: 5578 // Get the alignment for the argument in addition to the value; 5579 // we'll use it later. 5580 PtrOp0 = EmitPointerWithAlignment(E->getArg(0)); 5581 Ops.push_back(PtrOp0.getPointer()); 5582 continue; 5583 } 5584 } 5585 if (i == 1) { 5586 switch (BuiltinID) { 5587 case NEON::BI__builtin_neon_vld2_v: 5588 case NEON::BI__builtin_neon_vld2q_v: 5589 case NEON::BI__builtin_neon_vld3_v: 5590 case NEON::BI__builtin_neon_vld3q_v: 5591 case NEON::BI__builtin_neon_vld4_v: 5592 case NEON::BI__builtin_neon_vld4q_v: 5593 case NEON::BI__builtin_neon_vld2_lane_v: 5594 case NEON::BI__builtin_neon_vld2q_lane_v: 5595 case NEON::BI__builtin_neon_vld3_lane_v: 5596 case NEON::BI__builtin_neon_vld3q_lane_v: 5597 case NEON::BI__builtin_neon_vld4_lane_v: 5598 case NEON::BI__builtin_neon_vld4q_lane_v: 5599 case NEON::BI__builtin_neon_vld2_dup_v: 5600 case NEON::BI__builtin_neon_vld3_dup_v: 5601 case NEON::BI__builtin_neon_vld4_dup_v: 5602 // Get the alignment for the argument in addition to the value; 5603 // we'll use it later. 5604 PtrOp1 = EmitPointerWithAlignment(E->getArg(1)); 5605 Ops.push_back(PtrOp1.getPointer()); 5606 continue; 5607 } 5608 } 5609 5610 if ((ICEArguments & (1 << i)) == 0) { 5611 Ops.push_back(EmitScalarExpr(E->getArg(i))); 5612 } else { 5613 // If this is required to be a constant, constant fold it so that we know 5614 // that the generated intrinsic gets a ConstantInt. 5615 llvm::APSInt Result; 5616 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 5617 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 5618 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 5619 } 5620 } 5621 5622 switch (BuiltinID) { 5623 default: break; 5624 5625 case NEON::BI__builtin_neon_vget_lane_i8: 5626 case NEON::BI__builtin_neon_vget_lane_i16: 5627 case NEON::BI__builtin_neon_vget_lane_i32: 5628 case NEON::BI__builtin_neon_vget_lane_i64: 5629 case NEON::BI__builtin_neon_vget_lane_f32: 5630 case NEON::BI__builtin_neon_vgetq_lane_i8: 5631 case NEON::BI__builtin_neon_vgetq_lane_i16: 5632 case NEON::BI__builtin_neon_vgetq_lane_i32: 5633 case NEON::BI__builtin_neon_vgetq_lane_i64: 5634 case NEON::BI__builtin_neon_vgetq_lane_f32: 5635 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane"); 5636 5637 case NEON::BI__builtin_neon_vrndns_f32: { 5638 Value *Arg = EmitScalarExpr(E->getArg(0)); 5639 llvm::Type *Tys[] = {Arg->getType()}; 5640 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vrintn, Tys); 5641 return Builder.CreateCall(F, {Arg}, "vrndn"); } 5642 5643 case NEON::BI__builtin_neon_vset_lane_i8: 5644 case NEON::BI__builtin_neon_vset_lane_i16: 5645 case NEON::BI__builtin_neon_vset_lane_i32: 5646 case NEON::BI__builtin_neon_vset_lane_i64: 5647 case NEON::BI__builtin_neon_vset_lane_f32: 5648 case NEON::BI__builtin_neon_vsetq_lane_i8: 5649 case NEON::BI__builtin_neon_vsetq_lane_i16: 5650 case NEON::BI__builtin_neon_vsetq_lane_i32: 5651 case NEON::BI__builtin_neon_vsetq_lane_i64: 5652 case NEON::BI__builtin_neon_vsetq_lane_f32: 5653 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5654 5655 case NEON::BI__builtin_neon_vsha1h_u32: 5656 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1h), Ops, 5657 "vsha1h"); 5658 case NEON::BI__builtin_neon_vsha1cq_u32: 5659 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1c), Ops, 5660 "vsha1h"); 5661 case NEON::BI__builtin_neon_vsha1pq_u32: 5662 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1p), Ops, 5663 "vsha1h"); 5664 case NEON::BI__builtin_neon_vsha1mq_u32: 5665 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1m), Ops, 5666 "vsha1h"); 5667 5668 // The ARM _MoveToCoprocessor builtins put the input register value as 5669 // the first argument, but the LLVM intrinsic expects it as the third one. 5670 case ARM::BI_MoveToCoprocessor: 5671 case ARM::BI_MoveToCoprocessor2: { 5672 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI_MoveToCoprocessor ? 5673 Intrinsic::arm_mcr : Intrinsic::arm_mcr2); 5674 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0], 5675 Ops[3], Ops[4], Ops[5]}); 5676 } 5677 case ARM::BI_BitScanForward: 5678 case ARM::BI_BitScanForward64: 5679 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 5680 case ARM::BI_BitScanReverse: 5681 case ARM::BI_BitScanReverse64: 5682 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 5683 5684 case ARM::BI_InterlockedAnd64: 5685 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 5686 case ARM::BI_InterlockedExchange64: 5687 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 5688 case ARM::BI_InterlockedExchangeAdd64: 5689 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 5690 case ARM::BI_InterlockedExchangeSub64: 5691 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 5692 case ARM::BI_InterlockedOr64: 5693 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 5694 case ARM::BI_InterlockedXor64: 5695 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 5696 case ARM::BI_InterlockedDecrement64: 5697 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 5698 case ARM::BI_InterlockedIncrement64: 5699 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 5700 } 5701 5702 // Get the last argument, which specifies the vector type. 5703 assert(HasExtraArg); 5704 llvm::APSInt Result; 5705 const Expr *Arg = E->getArg(E->getNumArgs()-1); 5706 if (!Arg->isIntegerConstantExpr(Result, getContext())) 5707 return nullptr; 5708 5709 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f || 5710 BuiltinID == ARM::BI__builtin_arm_vcvtr_d) { 5711 // Determine the overloaded type of this builtin. 5712 llvm::Type *Ty; 5713 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f) 5714 Ty = FloatTy; 5715 else 5716 Ty = DoubleTy; 5717 5718 // Determine whether this is an unsigned conversion or not. 5719 bool usgn = Result.getZExtValue() == 1; 5720 unsigned Int = usgn ? Intrinsic::arm_vcvtru : Intrinsic::arm_vcvtr; 5721 5722 // Call the appropriate intrinsic. 5723 Function *F = CGM.getIntrinsic(Int, Ty); 5724 return Builder.CreateCall(F, Ops, "vcvtr"); 5725 } 5726 5727 // Determine the type of this overloaded NEON intrinsic. 5728 NeonTypeFlags Type(Result.getZExtValue()); 5729 bool usgn = Type.isUnsigned(); 5730 bool rightShift = false; 5731 5732 llvm::VectorType *VTy = GetNeonType(this, Type, 5733 getTarget().hasLegalHalfType()); 5734 llvm::Type *Ty = VTy; 5735 if (!Ty) 5736 return nullptr; 5737 5738 // Many NEON builtins have identical semantics and uses in ARM and 5739 // AArch64. Emit these in a single function. 5740 auto IntrinsicMap = makeArrayRef(ARMSIMDIntrinsicMap); 5741 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 5742 IntrinsicMap, BuiltinID, NEONSIMDIntrinsicsProvenSorted); 5743 if (Builtin) 5744 return EmitCommonNeonBuiltinExpr( 5745 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 5746 Builtin->NameHint, Builtin->TypeModifier, E, Ops, PtrOp0, PtrOp1, Arch); 5747 5748 unsigned Int; 5749 switch (BuiltinID) { 5750 default: return nullptr; 5751 case NEON::BI__builtin_neon_vld1q_lane_v: 5752 // Handle 64-bit integer elements as a special case. Use shuffles of 5753 // one-element vectors to avoid poor code for i64 in the backend. 5754 if (VTy->getElementType()->isIntegerTy(64)) { 5755 // Extract the other lane. 5756 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5757 uint32_t Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); 5758 Value *SV = llvm::ConstantVector::get(ConstantInt::get(Int32Ty, 1-Lane)); 5759 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 5760 // Load the value as a one-element vector. 5761 Ty = llvm::VectorType::get(VTy->getElementType(), 1); 5762 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 5763 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Tys); 5764 Value *Align = getAlignmentValue32(PtrOp0); 5765 Value *Ld = Builder.CreateCall(F, {Ops[0], Align}); 5766 // Combine them. 5767 uint32_t Indices[] = {1 - Lane, Lane}; 5768 SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 5769 return Builder.CreateShuffleVector(Ops[1], Ld, SV, "vld1q_lane"); 5770 } 5771 LLVM_FALLTHROUGH; 5772 case NEON::BI__builtin_neon_vld1_lane_v: { 5773 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5774 PtrOp0 = Builder.CreateElementBitCast(PtrOp0, VTy->getElementType()); 5775 Value *Ld = Builder.CreateLoad(PtrOp0); 5776 return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); 5777 } 5778 case NEON::BI__builtin_neon_vld2_dup_v: 5779 case NEON::BI__builtin_neon_vld3_dup_v: 5780 case NEON::BI__builtin_neon_vld4_dup_v: { 5781 // Handle 64-bit elements as a special-case. There is no "dup" needed. 5782 if (VTy->getElementType()->getPrimitiveSizeInBits() == 64) { 5783 switch (BuiltinID) { 5784 case NEON::BI__builtin_neon_vld2_dup_v: 5785 Int = Intrinsic::arm_neon_vld2; 5786 break; 5787 case NEON::BI__builtin_neon_vld3_dup_v: 5788 Int = Intrinsic::arm_neon_vld3; 5789 break; 5790 case NEON::BI__builtin_neon_vld4_dup_v: 5791 Int = Intrinsic::arm_neon_vld4; 5792 break; 5793 default: llvm_unreachable("unknown vld_dup intrinsic?"); 5794 } 5795 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 5796 Function *F = CGM.getIntrinsic(Int, Tys); 5797 llvm::Value *Align = getAlignmentValue32(PtrOp1); 5798 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, "vld_dup"); 5799 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5800 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5801 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5802 } 5803 switch (BuiltinID) { 5804 case NEON::BI__builtin_neon_vld2_dup_v: 5805 Int = Intrinsic::arm_neon_vld2lane; 5806 break; 5807 case NEON::BI__builtin_neon_vld3_dup_v: 5808 Int = Intrinsic::arm_neon_vld3lane; 5809 break; 5810 case NEON::BI__builtin_neon_vld4_dup_v: 5811 Int = Intrinsic::arm_neon_vld4lane; 5812 break; 5813 default: llvm_unreachable("unknown vld_dup intrinsic?"); 5814 } 5815 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 5816 Function *F = CGM.getIntrinsic(Int, Tys); 5817 llvm::StructType *STy = cast<llvm::StructType>(F->getReturnType()); 5818 5819 SmallVector<Value*, 6> Args; 5820 Args.push_back(Ops[1]); 5821 Args.append(STy->getNumElements(), UndefValue::get(Ty)); 5822 5823 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 5824 Args.push_back(CI); 5825 Args.push_back(getAlignmentValue32(PtrOp1)); 5826 5827 Ops[1] = Builder.CreateCall(F, Args, "vld_dup"); 5828 // splat lane 0 to all elts in each vector of the result. 5829 for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { 5830 Value *Val = Builder.CreateExtractValue(Ops[1], i); 5831 Value *Elt = Builder.CreateBitCast(Val, Ty); 5832 Elt = EmitNeonSplat(Elt, CI); 5833 Elt = Builder.CreateBitCast(Elt, Val->getType()); 5834 Ops[1] = Builder.CreateInsertValue(Ops[1], Elt, i); 5835 } 5836 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5837 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5838 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5839 } 5840 case NEON::BI__builtin_neon_vqrshrn_n_v: 5841 Int = 5842 usgn ? Intrinsic::arm_neon_vqrshiftnu : Intrinsic::arm_neon_vqrshiftns; 5843 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n", 5844 1, true); 5845 case NEON::BI__builtin_neon_vqrshrun_n_v: 5846 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqrshiftnsu, Ty), 5847 Ops, "vqrshrun_n", 1, true); 5848 case NEON::BI__builtin_neon_vqshrn_n_v: 5849 Int = usgn ? Intrinsic::arm_neon_vqshiftnu : Intrinsic::arm_neon_vqshiftns; 5850 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n", 5851 1, true); 5852 case NEON::BI__builtin_neon_vqshrun_n_v: 5853 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqshiftnsu, Ty), 5854 Ops, "vqshrun_n", 1, true); 5855 case NEON::BI__builtin_neon_vrecpe_v: 5856 case NEON::BI__builtin_neon_vrecpeq_v: 5857 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecpe, Ty), 5858 Ops, "vrecpe"); 5859 case NEON::BI__builtin_neon_vrshrn_n_v: 5860 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrshiftn, Ty), 5861 Ops, "vrshrn_n", 1, true); 5862 case NEON::BI__builtin_neon_vrsra_n_v: 5863 case NEON::BI__builtin_neon_vrsraq_n_v: 5864 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5865 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5866 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, true); 5867 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 5868 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Ty), {Ops[1], Ops[2]}); 5869 return Builder.CreateAdd(Ops[0], Ops[1], "vrsra_n"); 5870 case NEON::BI__builtin_neon_vsri_n_v: 5871 case NEON::BI__builtin_neon_vsriq_n_v: 5872 rightShift = true; 5873 LLVM_FALLTHROUGH; 5874 case NEON::BI__builtin_neon_vsli_n_v: 5875 case NEON::BI__builtin_neon_vsliq_n_v: 5876 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, rightShift); 5877 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vshiftins, Ty), 5878 Ops, "vsli_n"); 5879 case NEON::BI__builtin_neon_vsra_n_v: 5880 case NEON::BI__builtin_neon_vsraq_n_v: 5881 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5882 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 5883 return Builder.CreateAdd(Ops[0], Ops[1]); 5884 case NEON::BI__builtin_neon_vst1q_lane_v: 5885 // Handle 64-bit integer elements as a special case. Use a shuffle to get 5886 // a one-element vector and avoid poor code for i64 in the backend. 5887 if (VTy->getElementType()->isIntegerTy(64)) { 5888 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5889 Value *SV = llvm::ConstantVector::get(cast<llvm::Constant>(Ops[2])); 5890 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 5891 Ops[2] = getAlignmentValue32(PtrOp0); 5892 llvm::Type *Tys[] = {Int8PtrTy, Ops[1]->getType()}; 5893 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, 5894 Tys), Ops); 5895 } 5896 LLVM_FALLTHROUGH; 5897 case NEON::BI__builtin_neon_vst1_lane_v: { 5898 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5899 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 5900 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5901 auto St = Builder.CreateStore(Ops[1], Builder.CreateBitCast(PtrOp0, Ty)); 5902 return St; 5903 } 5904 case NEON::BI__builtin_neon_vtbl1_v: 5905 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl1), 5906 Ops, "vtbl1"); 5907 case NEON::BI__builtin_neon_vtbl2_v: 5908 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl2), 5909 Ops, "vtbl2"); 5910 case NEON::BI__builtin_neon_vtbl3_v: 5911 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl3), 5912 Ops, "vtbl3"); 5913 case NEON::BI__builtin_neon_vtbl4_v: 5914 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl4), 5915 Ops, "vtbl4"); 5916 case NEON::BI__builtin_neon_vtbx1_v: 5917 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx1), 5918 Ops, "vtbx1"); 5919 case NEON::BI__builtin_neon_vtbx2_v: 5920 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx2), 5921 Ops, "vtbx2"); 5922 case NEON::BI__builtin_neon_vtbx3_v: 5923 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx3), 5924 Ops, "vtbx3"); 5925 case NEON::BI__builtin_neon_vtbx4_v: 5926 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx4), 5927 Ops, "vtbx4"); 5928 } 5929 } 5930 5931 static Value *EmitAArch64TblBuiltinExpr(CodeGenFunction &CGF, unsigned BuiltinID, 5932 const CallExpr *E, 5933 SmallVectorImpl<Value *> &Ops, 5934 llvm::Triple::ArchType Arch) { 5935 unsigned int Int = 0; 5936 const char *s = nullptr; 5937 5938 switch (BuiltinID) { 5939 default: 5940 return nullptr; 5941 case NEON::BI__builtin_neon_vtbl1_v: 5942 case NEON::BI__builtin_neon_vqtbl1_v: 5943 case NEON::BI__builtin_neon_vqtbl1q_v: 5944 case NEON::BI__builtin_neon_vtbl2_v: 5945 case NEON::BI__builtin_neon_vqtbl2_v: 5946 case NEON::BI__builtin_neon_vqtbl2q_v: 5947 case NEON::BI__builtin_neon_vtbl3_v: 5948 case NEON::BI__builtin_neon_vqtbl3_v: 5949 case NEON::BI__builtin_neon_vqtbl3q_v: 5950 case NEON::BI__builtin_neon_vtbl4_v: 5951 case NEON::BI__builtin_neon_vqtbl4_v: 5952 case NEON::BI__builtin_neon_vqtbl4q_v: 5953 break; 5954 case NEON::BI__builtin_neon_vtbx1_v: 5955 case NEON::BI__builtin_neon_vqtbx1_v: 5956 case NEON::BI__builtin_neon_vqtbx1q_v: 5957 case NEON::BI__builtin_neon_vtbx2_v: 5958 case NEON::BI__builtin_neon_vqtbx2_v: 5959 case NEON::BI__builtin_neon_vqtbx2q_v: 5960 case NEON::BI__builtin_neon_vtbx3_v: 5961 case NEON::BI__builtin_neon_vqtbx3_v: 5962 case NEON::BI__builtin_neon_vqtbx3q_v: 5963 case NEON::BI__builtin_neon_vtbx4_v: 5964 case NEON::BI__builtin_neon_vqtbx4_v: 5965 case NEON::BI__builtin_neon_vqtbx4q_v: 5966 break; 5967 } 5968 5969 assert(E->getNumArgs() >= 3); 5970 5971 // Get the last argument, which specifies the vector type. 5972 llvm::APSInt Result; 5973 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 5974 if (!Arg->isIntegerConstantExpr(Result, CGF.getContext())) 5975 return nullptr; 5976 5977 // Determine the type of this overloaded NEON intrinsic. 5978 NeonTypeFlags Type(Result.getZExtValue()); 5979 llvm::VectorType *Ty = GetNeonType(&CGF, Type); 5980 if (!Ty) 5981 return nullptr; 5982 5983 CodeGen::CGBuilderTy &Builder = CGF.Builder; 5984 5985 // AArch64 scalar builtins are not overloaded, they do not have an extra 5986 // argument that specifies the vector type, need to handle each case. 5987 switch (BuiltinID) { 5988 case NEON::BI__builtin_neon_vtbl1_v: { 5989 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 1), nullptr, 5990 Ops[1], Ty, Intrinsic::aarch64_neon_tbl1, 5991 "vtbl1"); 5992 } 5993 case NEON::BI__builtin_neon_vtbl2_v: { 5994 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 2), nullptr, 5995 Ops[2], Ty, Intrinsic::aarch64_neon_tbl1, 5996 "vtbl1"); 5997 } 5998 case NEON::BI__builtin_neon_vtbl3_v: { 5999 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 3), nullptr, 6000 Ops[3], Ty, Intrinsic::aarch64_neon_tbl2, 6001 "vtbl2"); 6002 } 6003 case NEON::BI__builtin_neon_vtbl4_v: { 6004 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 4), nullptr, 6005 Ops[4], Ty, Intrinsic::aarch64_neon_tbl2, 6006 "vtbl2"); 6007 } 6008 case NEON::BI__builtin_neon_vtbx1_v: { 6009 Value *TblRes = 6010 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 1), nullptr, Ops[2], 6011 Ty, Intrinsic::aarch64_neon_tbl1, "vtbl1"); 6012 6013 llvm::Constant *EightV = ConstantInt::get(Ty, 8); 6014 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[2], EightV); 6015 CmpRes = Builder.CreateSExt(CmpRes, Ty); 6016 6017 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 6018 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 6019 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 6020 } 6021 case NEON::BI__builtin_neon_vtbx2_v: { 6022 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 2), Ops[0], 6023 Ops[3], Ty, Intrinsic::aarch64_neon_tbx1, 6024 "vtbx1"); 6025 } 6026 case NEON::BI__builtin_neon_vtbx3_v: { 6027 Value *TblRes = 6028 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 3), nullptr, Ops[4], 6029 Ty, Intrinsic::aarch64_neon_tbl2, "vtbl2"); 6030 6031 llvm::Constant *TwentyFourV = ConstantInt::get(Ty, 24); 6032 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[4], 6033 TwentyFourV); 6034 CmpRes = Builder.CreateSExt(CmpRes, Ty); 6035 6036 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 6037 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 6038 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 6039 } 6040 case NEON::BI__builtin_neon_vtbx4_v: { 6041 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 4), Ops[0], 6042 Ops[5], Ty, Intrinsic::aarch64_neon_tbx2, 6043 "vtbx2"); 6044 } 6045 case NEON::BI__builtin_neon_vqtbl1_v: 6046 case NEON::BI__builtin_neon_vqtbl1q_v: 6047 Int = Intrinsic::aarch64_neon_tbl1; s = "vtbl1"; break; 6048 case NEON::BI__builtin_neon_vqtbl2_v: 6049 case NEON::BI__builtin_neon_vqtbl2q_v: { 6050 Int = Intrinsic::aarch64_neon_tbl2; s = "vtbl2"; break; 6051 case NEON::BI__builtin_neon_vqtbl3_v: 6052 case NEON::BI__builtin_neon_vqtbl3q_v: 6053 Int = Intrinsic::aarch64_neon_tbl3; s = "vtbl3"; break; 6054 case NEON::BI__builtin_neon_vqtbl4_v: 6055 case NEON::BI__builtin_neon_vqtbl4q_v: 6056 Int = Intrinsic::aarch64_neon_tbl4; s = "vtbl4"; break; 6057 case NEON::BI__builtin_neon_vqtbx1_v: 6058 case NEON::BI__builtin_neon_vqtbx1q_v: 6059 Int = Intrinsic::aarch64_neon_tbx1; s = "vtbx1"; break; 6060 case NEON::BI__builtin_neon_vqtbx2_v: 6061 case NEON::BI__builtin_neon_vqtbx2q_v: 6062 Int = Intrinsic::aarch64_neon_tbx2; s = "vtbx2"; break; 6063 case NEON::BI__builtin_neon_vqtbx3_v: 6064 case NEON::BI__builtin_neon_vqtbx3q_v: 6065 Int = Intrinsic::aarch64_neon_tbx3; s = "vtbx3"; break; 6066 case NEON::BI__builtin_neon_vqtbx4_v: 6067 case NEON::BI__builtin_neon_vqtbx4q_v: 6068 Int = Intrinsic::aarch64_neon_tbx4; s = "vtbx4"; break; 6069 } 6070 } 6071 6072 if (!Int) 6073 return nullptr; 6074 6075 Function *F = CGF.CGM.getIntrinsic(Int, Ty); 6076 return CGF.EmitNeonCall(F, Ops, s); 6077 } 6078 6079 Value *CodeGenFunction::vectorWrapScalar16(Value *Op) { 6080 llvm::Type *VTy = llvm::VectorType::get(Int16Ty, 4); 6081 Op = Builder.CreateBitCast(Op, Int16Ty); 6082 Value *V = UndefValue::get(VTy); 6083 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 6084 Op = Builder.CreateInsertElement(V, Op, CI); 6085 return Op; 6086 } 6087 6088 Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, 6089 const CallExpr *E, 6090 llvm::Triple::ArchType Arch) { 6091 unsigned HintID = static_cast<unsigned>(-1); 6092 switch (BuiltinID) { 6093 default: break; 6094 case AArch64::BI__builtin_arm_nop: 6095 HintID = 0; 6096 break; 6097 case AArch64::BI__builtin_arm_yield: 6098 HintID = 1; 6099 break; 6100 case AArch64::BI__builtin_arm_wfe: 6101 HintID = 2; 6102 break; 6103 case AArch64::BI__builtin_arm_wfi: 6104 HintID = 3; 6105 break; 6106 case AArch64::BI__builtin_arm_sev: 6107 HintID = 4; 6108 break; 6109 case AArch64::BI__builtin_arm_sevl: 6110 HintID = 5; 6111 break; 6112 } 6113 6114 if (HintID != static_cast<unsigned>(-1)) { 6115 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_hint); 6116 return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID)); 6117 } 6118 6119 if (BuiltinID == AArch64::BI__builtin_arm_prefetch) { 6120 Value *Address = EmitScalarExpr(E->getArg(0)); 6121 Value *RW = EmitScalarExpr(E->getArg(1)); 6122 Value *CacheLevel = EmitScalarExpr(E->getArg(2)); 6123 Value *RetentionPolicy = EmitScalarExpr(E->getArg(3)); 6124 Value *IsData = EmitScalarExpr(E->getArg(4)); 6125 6126 Value *Locality = nullptr; 6127 if (cast<llvm::ConstantInt>(RetentionPolicy)->isZero()) { 6128 // Temporal fetch, needs to convert cache level to locality. 6129 Locality = llvm::ConstantInt::get(Int32Ty, 6130 -cast<llvm::ConstantInt>(CacheLevel)->getValue() + 3); 6131 } else { 6132 // Streaming fetch. 6133 Locality = llvm::ConstantInt::get(Int32Ty, 0); 6134 } 6135 6136 // FIXME: We need AArch64 specific LLVM intrinsic if we want to specify 6137 // PLDL3STRM or PLDL2STRM. 6138 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 6139 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 6140 } 6141 6142 if (BuiltinID == AArch64::BI__builtin_arm_rbit) { 6143 assert((getContext().getTypeSize(E->getType()) == 32) && 6144 "rbit of unusual size!"); 6145 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 6146 return Builder.CreateCall( 6147 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 6148 } 6149 if (BuiltinID == AArch64::BI__builtin_arm_rbit64) { 6150 assert((getContext().getTypeSize(E->getType()) == 64) && 6151 "rbit of unusual size!"); 6152 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 6153 return Builder.CreateCall( 6154 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 6155 } 6156 6157 if (BuiltinID == AArch64::BI__clear_cache) { 6158 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 6159 const FunctionDecl *FD = E->getDirectCallee(); 6160 Value *Ops[2]; 6161 for (unsigned i = 0; i < 2; i++) 6162 Ops[i] = EmitScalarExpr(E->getArg(i)); 6163 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 6164 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 6165 StringRef Name = FD->getName(); 6166 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 6167 } 6168 6169 if ((BuiltinID == AArch64::BI__builtin_arm_ldrex || 6170 BuiltinID == AArch64::BI__builtin_arm_ldaex) && 6171 getContext().getTypeSize(E->getType()) == 128) { 6172 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 6173 ? Intrinsic::aarch64_ldaxp 6174 : Intrinsic::aarch64_ldxp); 6175 6176 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 6177 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 6178 "ldxp"); 6179 6180 Value *Val0 = Builder.CreateExtractValue(Val, 1); 6181 Value *Val1 = Builder.CreateExtractValue(Val, 0); 6182 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 6183 Val0 = Builder.CreateZExt(Val0, Int128Ty); 6184 Val1 = Builder.CreateZExt(Val1, Int128Ty); 6185 6186 Value *ShiftCst = llvm::ConstantInt::get(Int128Ty, 64); 6187 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 6188 Val = Builder.CreateOr(Val, Val1); 6189 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 6190 } else if (BuiltinID == AArch64::BI__builtin_arm_ldrex || 6191 BuiltinID == AArch64::BI__builtin_arm_ldaex) { 6192 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 6193 6194 QualType Ty = E->getType(); 6195 llvm::Type *RealResTy = ConvertType(Ty); 6196 llvm::Type *PtrTy = llvm::IntegerType::get( 6197 getLLVMContext(), getContext().getTypeSize(Ty))->getPointerTo(); 6198 LoadAddr = Builder.CreateBitCast(LoadAddr, PtrTy); 6199 6200 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 6201 ? Intrinsic::aarch64_ldaxr 6202 : Intrinsic::aarch64_ldxr, 6203 PtrTy); 6204 Value *Val = Builder.CreateCall(F, LoadAddr, "ldxr"); 6205 6206 if (RealResTy->isPointerTy()) 6207 return Builder.CreateIntToPtr(Val, RealResTy); 6208 6209 llvm::Type *IntResTy = llvm::IntegerType::get( 6210 getLLVMContext(), CGM.getDataLayout().getTypeSizeInBits(RealResTy)); 6211 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 6212 return Builder.CreateBitCast(Val, RealResTy); 6213 } 6214 6215 if ((BuiltinID == AArch64::BI__builtin_arm_strex || 6216 BuiltinID == AArch64::BI__builtin_arm_stlex) && 6217 getContext().getTypeSize(E->getArg(0)->getType()) == 128) { 6218 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 6219 ? Intrinsic::aarch64_stlxp 6220 : Intrinsic::aarch64_stxp); 6221 llvm::Type *STy = llvm::StructType::get(Int64Ty, Int64Ty); 6222 6223 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 6224 EmitAnyExprToMem(E->getArg(0), Tmp, Qualifiers(), /*init*/ true); 6225 6226 Tmp = Builder.CreateBitCast(Tmp, llvm::PointerType::getUnqual(STy)); 6227 llvm::Value *Val = Builder.CreateLoad(Tmp); 6228 6229 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 6230 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 6231 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), 6232 Int8PtrTy); 6233 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "stxp"); 6234 } 6235 6236 if (BuiltinID == AArch64::BI__builtin_arm_strex || 6237 BuiltinID == AArch64::BI__builtin_arm_stlex) { 6238 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 6239 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 6240 6241 QualType Ty = E->getArg(0)->getType(); 6242 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 6243 getContext().getTypeSize(Ty)); 6244 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 6245 6246 if (StoreVal->getType()->isPointerTy()) 6247 StoreVal = Builder.CreatePtrToInt(StoreVal, Int64Ty); 6248 else { 6249 llvm::Type *IntTy = llvm::IntegerType::get( 6250 getLLVMContext(), 6251 CGM.getDataLayout().getTypeSizeInBits(StoreVal->getType())); 6252 StoreVal = Builder.CreateBitCast(StoreVal, IntTy); 6253 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int64Ty); 6254 } 6255 6256 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 6257 ? Intrinsic::aarch64_stlxr 6258 : Intrinsic::aarch64_stxr, 6259 StoreAddr->getType()); 6260 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "stxr"); 6261 } 6262 6263 if (BuiltinID == AArch64::BI__builtin_arm_clrex) { 6264 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_clrex); 6265 return Builder.CreateCall(F); 6266 } 6267 6268 // CRC32 6269 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 6270 switch (BuiltinID) { 6271 case AArch64::BI__builtin_arm_crc32b: 6272 CRCIntrinsicID = Intrinsic::aarch64_crc32b; break; 6273 case AArch64::BI__builtin_arm_crc32cb: 6274 CRCIntrinsicID = Intrinsic::aarch64_crc32cb; break; 6275 case AArch64::BI__builtin_arm_crc32h: 6276 CRCIntrinsicID = Intrinsic::aarch64_crc32h; break; 6277 case AArch64::BI__builtin_arm_crc32ch: 6278 CRCIntrinsicID = Intrinsic::aarch64_crc32ch; break; 6279 case AArch64::BI__builtin_arm_crc32w: 6280 CRCIntrinsicID = Intrinsic::aarch64_crc32w; break; 6281 case AArch64::BI__builtin_arm_crc32cw: 6282 CRCIntrinsicID = Intrinsic::aarch64_crc32cw; break; 6283 case AArch64::BI__builtin_arm_crc32d: 6284 CRCIntrinsicID = Intrinsic::aarch64_crc32x; break; 6285 case AArch64::BI__builtin_arm_crc32cd: 6286 CRCIntrinsicID = Intrinsic::aarch64_crc32cx; break; 6287 } 6288 6289 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 6290 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 6291 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 6292 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 6293 6294 llvm::Type *DataTy = F->getFunctionType()->getParamType(1); 6295 Arg1 = Builder.CreateZExtOrBitCast(Arg1, DataTy); 6296 6297 return Builder.CreateCall(F, {Arg0, Arg1}); 6298 } 6299 6300 if (BuiltinID == AArch64::BI__builtin_arm_rsr || 6301 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 6302 BuiltinID == AArch64::BI__builtin_arm_rsrp || 6303 BuiltinID == AArch64::BI__builtin_arm_wsr || 6304 BuiltinID == AArch64::BI__builtin_arm_wsr64 || 6305 BuiltinID == AArch64::BI__builtin_arm_wsrp) { 6306 6307 bool IsRead = BuiltinID == AArch64::BI__builtin_arm_rsr || 6308 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 6309 BuiltinID == AArch64::BI__builtin_arm_rsrp; 6310 6311 bool IsPointerBuiltin = BuiltinID == AArch64::BI__builtin_arm_rsrp || 6312 BuiltinID == AArch64::BI__builtin_arm_wsrp; 6313 6314 bool Is64Bit = BuiltinID != AArch64::BI__builtin_arm_rsr && 6315 BuiltinID != AArch64::BI__builtin_arm_wsr; 6316 6317 llvm::Type *ValueType; 6318 llvm::Type *RegisterType = Int64Ty; 6319 if (IsPointerBuiltin) { 6320 ValueType = VoidPtrTy; 6321 } else if (Is64Bit) { 6322 ValueType = Int64Ty; 6323 } else { 6324 ValueType = Int32Ty; 6325 } 6326 6327 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 6328 } 6329 6330 // Find out if any arguments are required to be integer constant 6331 // expressions. 6332 unsigned ICEArguments = 0; 6333 ASTContext::GetBuiltinTypeError Error; 6334 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 6335 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 6336 6337 llvm::SmallVector<Value*, 4> Ops; 6338 for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; i++) { 6339 if ((ICEArguments & (1 << i)) == 0) { 6340 Ops.push_back(EmitScalarExpr(E->getArg(i))); 6341 } else { 6342 // If this is required to be a constant, constant fold it so that we know 6343 // that the generated intrinsic gets a ConstantInt. 6344 llvm::APSInt Result; 6345 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 6346 assert(IsConst && "Constant arg isn't actually constant?"); 6347 (void)IsConst; 6348 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 6349 } 6350 } 6351 6352 auto SISDMap = makeArrayRef(AArch64SISDIntrinsicMap); 6353 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 6354 SISDMap, BuiltinID, AArch64SISDIntrinsicsProvenSorted); 6355 6356 if (Builtin) { 6357 Ops.push_back(EmitScalarExpr(E->getArg(E->getNumArgs() - 1))); 6358 Value *Result = EmitCommonNeonSISDBuiltinExpr(*this, *Builtin, Ops, E); 6359 assert(Result && "SISD intrinsic should have been handled"); 6360 return Result; 6361 } 6362 6363 llvm::APSInt Result; 6364 const Expr *Arg = E->getArg(E->getNumArgs()-1); 6365 NeonTypeFlags Type(0); 6366 if (Arg->isIntegerConstantExpr(Result, getContext())) 6367 // Determine the type of this overloaded NEON intrinsic. 6368 Type = NeonTypeFlags(Result.getZExtValue()); 6369 6370 bool usgn = Type.isUnsigned(); 6371 bool quad = Type.isQuad(); 6372 6373 // Handle non-overloaded intrinsics first. 6374 switch (BuiltinID) { 6375 default: break; 6376 case NEON::BI__builtin_neon_vabsh_f16: 6377 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6378 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, HalfTy), Ops, "vabs"); 6379 case NEON::BI__builtin_neon_vldrq_p128: { 6380 llvm::Type *Int128Ty = llvm::Type::getIntNTy(getLLVMContext(), 128); 6381 llvm::Type *Int128PTy = llvm::PointerType::get(Int128Ty, 0); 6382 Value *Ptr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PTy); 6383 return Builder.CreateAlignedLoad(Int128Ty, Ptr, 6384 CharUnits::fromQuantity(16)); 6385 } 6386 case NEON::BI__builtin_neon_vstrq_p128: { 6387 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 6388 Value *Ptr = Builder.CreateBitCast(Ops[0], Int128PTy); 6389 return Builder.CreateDefaultAlignedStore(EmitScalarExpr(E->getArg(1)), Ptr); 6390 } 6391 case NEON::BI__builtin_neon_vcvts_u32_f32: 6392 case NEON::BI__builtin_neon_vcvtd_u64_f64: 6393 usgn = true; 6394 LLVM_FALLTHROUGH; 6395 case NEON::BI__builtin_neon_vcvts_s32_f32: 6396 case NEON::BI__builtin_neon_vcvtd_s64_f64: { 6397 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6398 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 6399 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 6400 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 6401 Ops[0] = Builder.CreateBitCast(Ops[0], FTy); 6402 if (usgn) 6403 return Builder.CreateFPToUI(Ops[0], InTy); 6404 return Builder.CreateFPToSI(Ops[0], InTy); 6405 } 6406 case NEON::BI__builtin_neon_vcvts_f32_u32: 6407 case NEON::BI__builtin_neon_vcvtd_f64_u64: 6408 usgn = true; 6409 LLVM_FALLTHROUGH; 6410 case NEON::BI__builtin_neon_vcvts_f32_s32: 6411 case NEON::BI__builtin_neon_vcvtd_f64_s64: { 6412 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6413 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 6414 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 6415 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 6416 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 6417 if (usgn) 6418 return Builder.CreateUIToFP(Ops[0], FTy); 6419 return Builder.CreateSIToFP(Ops[0], FTy); 6420 } 6421 case NEON::BI__builtin_neon_vcvth_f16_u16: 6422 case NEON::BI__builtin_neon_vcvth_f16_u32: 6423 case NEON::BI__builtin_neon_vcvth_f16_u64: 6424 usgn = true; 6425 // FALL THROUGH 6426 case NEON::BI__builtin_neon_vcvth_f16_s16: 6427 case NEON::BI__builtin_neon_vcvth_f16_s32: 6428 case NEON::BI__builtin_neon_vcvth_f16_s64: { 6429 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6430 llvm::Type *FTy = HalfTy; 6431 llvm::Type *InTy; 6432 if (Ops[0]->getType()->getPrimitiveSizeInBits() == 64) 6433 InTy = Int64Ty; 6434 else if (Ops[0]->getType()->getPrimitiveSizeInBits() == 32) 6435 InTy = Int32Ty; 6436 else 6437 InTy = Int16Ty; 6438 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 6439 if (usgn) 6440 return Builder.CreateUIToFP(Ops[0], FTy); 6441 return Builder.CreateSIToFP(Ops[0], FTy); 6442 } 6443 case NEON::BI__builtin_neon_vcvth_u16_f16: 6444 usgn = true; 6445 // FALL THROUGH 6446 case NEON::BI__builtin_neon_vcvth_s16_f16: { 6447 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6448 Ops[0] = Builder.CreateBitCast(Ops[0], HalfTy); 6449 if (usgn) 6450 return Builder.CreateFPToUI(Ops[0], Int16Ty); 6451 return Builder.CreateFPToSI(Ops[0], Int16Ty); 6452 } 6453 case NEON::BI__builtin_neon_vcvth_u32_f16: 6454 usgn = true; 6455 // FALL THROUGH 6456 case NEON::BI__builtin_neon_vcvth_s32_f16: { 6457 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6458 Ops[0] = Builder.CreateBitCast(Ops[0], HalfTy); 6459 if (usgn) 6460 return Builder.CreateFPToUI(Ops[0], Int32Ty); 6461 return Builder.CreateFPToSI(Ops[0], Int32Ty); 6462 } 6463 case NEON::BI__builtin_neon_vcvth_u64_f16: 6464 usgn = true; 6465 // FALL THROUGH 6466 case NEON::BI__builtin_neon_vcvth_s64_f16: { 6467 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6468 Ops[0] = Builder.CreateBitCast(Ops[0], HalfTy); 6469 if (usgn) 6470 return Builder.CreateFPToUI(Ops[0], Int64Ty); 6471 return Builder.CreateFPToSI(Ops[0], Int64Ty); 6472 } 6473 case NEON::BI__builtin_neon_vcvtah_u16_f16: 6474 case NEON::BI__builtin_neon_vcvtmh_u16_f16: 6475 case NEON::BI__builtin_neon_vcvtnh_u16_f16: 6476 case NEON::BI__builtin_neon_vcvtph_u16_f16: 6477 case NEON::BI__builtin_neon_vcvtah_s16_f16: 6478 case NEON::BI__builtin_neon_vcvtmh_s16_f16: 6479 case NEON::BI__builtin_neon_vcvtnh_s16_f16: 6480 case NEON::BI__builtin_neon_vcvtph_s16_f16: { 6481 unsigned Int; 6482 llvm::Type* InTy = Int32Ty; 6483 llvm::Type* FTy = HalfTy; 6484 llvm::Type *Tys[2] = {InTy, FTy}; 6485 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6486 switch (BuiltinID) { 6487 default: llvm_unreachable("missing builtin ID in switch!"); 6488 case NEON::BI__builtin_neon_vcvtah_u16_f16: 6489 Int = Intrinsic::aarch64_neon_fcvtau; break; 6490 case NEON::BI__builtin_neon_vcvtmh_u16_f16: 6491 Int = Intrinsic::aarch64_neon_fcvtmu; break; 6492 case NEON::BI__builtin_neon_vcvtnh_u16_f16: 6493 Int = Intrinsic::aarch64_neon_fcvtnu; break; 6494 case NEON::BI__builtin_neon_vcvtph_u16_f16: 6495 Int = Intrinsic::aarch64_neon_fcvtpu; break; 6496 case NEON::BI__builtin_neon_vcvtah_s16_f16: 6497 Int = Intrinsic::aarch64_neon_fcvtas; break; 6498 case NEON::BI__builtin_neon_vcvtmh_s16_f16: 6499 Int = Intrinsic::aarch64_neon_fcvtms; break; 6500 case NEON::BI__builtin_neon_vcvtnh_s16_f16: 6501 Int = Intrinsic::aarch64_neon_fcvtns; break; 6502 case NEON::BI__builtin_neon_vcvtph_s16_f16: 6503 Int = Intrinsic::aarch64_neon_fcvtps; break; 6504 } 6505 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "fcvt"); 6506 return Builder.CreateTrunc(Ops[0], Int16Ty); 6507 } 6508 case NEON::BI__builtin_neon_vcaleh_f16: 6509 case NEON::BI__builtin_neon_vcalth_f16: 6510 case NEON::BI__builtin_neon_vcageh_f16: 6511 case NEON::BI__builtin_neon_vcagth_f16: { 6512 unsigned Int; 6513 llvm::Type* InTy = Int32Ty; 6514 llvm::Type* FTy = HalfTy; 6515 llvm::Type *Tys[2] = {InTy, FTy}; 6516 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6517 switch (BuiltinID) { 6518 default: llvm_unreachable("missing builtin ID in switch!"); 6519 case NEON::BI__builtin_neon_vcageh_f16: 6520 Int = Intrinsic::aarch64_neon_facge; break; 6521 case NEON::BI__builtin_neon_vcagth_f16: 6522 Int = Intrinsic::aarch64_neon_facgt; break; 6523 case NEON::BI__builtin_neon_vcaleh_f16: 6524 Int = Intrinsic::aarch64_neon_facge; std::swap(Ops[0], Ops[1]); break; 6525 case NEON::BI__builtin_neon_vcalth_f16: 6526 Int = Intrinsic::aarch64_neon_facgt; std::swap(Ops[0], Ops[1]); break; 6527 } 6528 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "facg"); 6529 return Builder.CreateTrunc(Ops[0], Int16Ty); 6530 } 6531 case NEON::BI__builtin_neon_vcvth_n_s16_f16: 6532 case NEON::BI__builtin_neon_vcvth_n_u16_f16: { 6533 unsigned Int; 6534 llvm::Type* InTy = Int32Ty; 6535 llvm::Type* FTy = HalfTy; 6536 llvm::Type *Tys[2] = {InTy, FTy}; 6537 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6538 switch (BuiltinID) { 6539 default: llvm_unreachable("missing builtin ID in switch!"); 6540 case NEON::BI__builtin_neon_vcvth_n_s16_f16: 6541 Int = Intrinsic::aarch64_neon_vcvtfp2fxs; break; 6542 case NEON::BI__builtin_neon_vcvth_n_u16_f16: 6543 Int = Intrinsic::aarch64_neon_vcvtfp2fxu; break; 6544 } 6545 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "fcvth_n"); 6546 return Builder.CreateTrunc(Ops[0], Int16Ty); 6547 } 6548 case NEON::BI__builtin_neon_vcvth_n_f16_s16: 6549 case NEON::BI__builtin_neon_vcvth_n_f16_u16: { 6550 unsigned Int; 6551 llvm::Type* FTy = HalfTy; 6552 llvm::Type* InTy = Int32Ty; 6553 llvm::Type *Tys[2] = {FTy, InTy}; 6554 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6555 switch (BuiltinID) { 6556 default: llvm_unreachable("missing builtin ID in switch!"); 6557 case NEON::BI__builtin_neon_vcvth_n_f16_s16: 6558 Int = Intrinsic::aarch64_neon_vcvtfxs2fp; 6559 Ops[0] = Builder.CreateSExt(Ops[0], InTy, "sext"); 6560 break; 6561 case NEON::BI__builtin_neon_vcvth_n_f16_u16: 6562 Int = Intrinsic::aarch64_neon_vcvtfxu2fp; 6563 Ops[0] = Builder.CreateZExt(Ops[0], InTy); 6564 break; 6565 } 6566 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "fcvth_n"); 6567 } 6568 case NEON::BI__builtin_neon_vpaddd_s64: { 6569 llvm::Type *Ty = llvm::VectorType::get(Int64Ty, 2); 6570 Value *Vec = EmitScalarExpr(E->getArg(0)); 6571 // The vector is v2f64, so make sure it's bitcast to that. 6572 Vec = Builder.CreateBitCast(Vec, Ty, "v2i64"); 6573 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 6574 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 6575 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 6576 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 6577 // Pairwise addition of a v2f64 into a scalar f64. 6578 return Builder.CreateAdd(Op0, Op1, "vpaddd"); 6579 } 6580 case NEON::BI__builtin_neon_vpaddd_f64: { 6581 llvm::Type *Ty = 6582 llvm::VectorType::get(DoubleTy, 2); 6583 Value *Vec = EmitScalarExpr(E->getArg(0)); 6584 // The vector is v2f64, so make sure it's bitcast to that. 6585 Vec = Builder.CreateBitCast(Vec, Ty, "v2f64"); 6586 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 6587 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 6588 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 6589 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 6590 // Pairwise addition of a v2f64 into a scalar f64. 6591 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 6592 } 6593 case NEON::BI__builtin_neon_vpadds_f32: { 6594 llvm::Type *Ty = 6595 llvm::VectorType::get(FloatTy, 2); 6596 Value *Vec = EmitScalarExpr(E->getArg(0)); 6597 // The vector is v2f32, so make sure it's bitcast to that. 6598 Vec = Builder.CreateBitCast(Vec, Ty, "v2f32"); 6599 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 6600 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 6601 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 6602 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 6603 // Pairwise addition of a v2f32 into a scalar f32. 6604 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 6605 } 6606 case NEON::BI__builtin_neon_vceqzd_s64: 6607 case NEON::BI__builtin_neon_vceqzd_f64: 6608 case NEON::BI__builtin_neon_vceqzs_f32: 6609 case NEON::BI__builtin_neon_vceqzh_f16: 6610 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6611 return EmitAArch64CompareBuiltinExpr( 6612 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6613 ICmpInst::FCMP_OEQ, ICmpInst::ICMP_EQ, "vceqz"); 6614 case NEON::BI__builtin_neon_vcgezd_s64: 6615 case NEON::BI__builtin_neon_vcgezd_f64: 6616 case NEON::BI__builtin_neon_vcgezs_f32: 6617 case NEON::BI__builtin_neon_vcgezh_f16: 6618 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6619 return EmitAArch64CompareBuiltinExpr( 6620 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6621 ICmpInst::FCMP_OGE, ICmpInst::ICMP_SGE, "vcgez"); 6622 case NEON::BI__builtin_neon_vclezd_s64: 6623 case NEON::BI__builtin_neon_vclezd_f64: 6624 case NEON::BI__builtin_neon_vclezs_f32: 6625 case NEON::BI__builtin_neon_vclezh_f16: 6626 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6627 return EmitAArch64CompareBuiltinExpr( 6628 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6629 ICmpInst::FCMP_OLE, ICmpInst::ICMP_SLE, "vclez"); 6630 case NEON::BI__builtin_neon_vcgtzd_s64: 6631 case NEON::BI__builtin_neon_vcgtzd_f64: 6632 case NEON::BI__builtin_neon_vcgtzs_f32: 6633 case NEON::BI__builtin_neon_vcgtzh_f16: 6634 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6635 return EmitAArch64CompareBuiltinExpr( 6636 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6637 ICmpInst::FCMP_OGT, ICmpInst::ICMP_SGT, "vcgtz"); 6638 case NEON::BI__builtin_neon_vcltzd_s64: 6639 case NEON::BI__builtin_neon_vcltzd_f64: 6640 case NEON::BI__builtin_neon_vcltzs_f32: 6641 case NEON::BI__builtin_neon_vcltzh_f16: 6642 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6643 return EmitAArch64CompareBuiltinExpr( 6644 Ops[0], ConvertType(E->getCallReturnType(getContext())), 6645 ICmpInst::FCMP_OLT, ICmpInst::ICMP_SLT, "vcltz"); 6646 6647 case NEON::BI__builtin_neon_vceqzd_u64: { 6648 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6649 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 6650 Ops[0] = 6651 Builder.CreateICmpEQ(Ops[0], llvm::Constant::getNullValue(Int64Ty)); 6652 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqzd"); 6653 } 6654 case NEON::BI__builtin_neon_vceqd_f64: 6655 case NEON::BI__builtin_neon_vcled_f64: 6656 case NEON::BI__builtin_neon_vcltd_f64: 6657 case NEON::BI__builtin_neon_vcged_f64: 6658 case NEON::BI__builtin_neon_vcgtd_f64: { 6659 llvm::CmpInst::Predicate P; 6660 switch (BuiltinID) { 6661 default: llvm_unreachable("missing builtin ID in switch!"); 6662 case NEON::BI__builtin_neon_vceqd_f64: P = llvm::FCmpInst::FCMP_OEQ; break; 6663 case NEON::BI__builtin_neon_vcled_f64: P = llvm::FCmpInst::FCMP_OLE; break; 6664 case NEON::BI__builtin_neon_vcltd_f64: P = llvm::FCmpInst::FCMP_OLT; break; 6665 case NEON::BI__builtin_neon_vcged_f64: P = llvm::FCmpInst::FCMP_OGE; break; 6666 case NEON::BI__builtin_neon_vcgtd_f64: P = llvm::FCmpInst::FCMP_OGT; break; 6667 } 6668 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6669 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 6670 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 6671 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 6672 return Builder.CreateSExt(Ops[0], Int64Ty, "vcmpd"); 6673 } 6674 case NEON::BI__builtin_neon_vceqs_f32: 6675 case NEON::BI__builtin_neon_vcles_f32: 6676 case NEON::BI__builtin_neon_vclts_f32: 6677 case NEON::BI__builtin_neon_vcges_f32: 6678 case NEON::BI__builtin_neon_vcgts_f32: { 6679 llvm::CmpInst::Predicate P; 6680 switch (BuiltinID) { 6681 default: llvm_unreachable("missing builtin ID in switch!"); 6682 case NEON::BI__builtin_neon_vceqs_f32: P = llvm::FCmpInst::FCMP_OEQ; break; 6683 case NEON::BI__builtin_neon_vcles_f32: P = llvm::FCmpInst::FCMP_OLE; break; 6684 case NEON::BI__builtin_neon_vclts_f32: P = llvm::FCmpInst::FCMP_OLT; break; 6685 case NEON::BI__builtin_neon_vcges_f32: P = llvm::FCmpInst::FCMP_OGE; break; 6686 case NEON::BI__builtin_neon_vcgts_f32: P = llvm::FCmpInst::FCMP_OGT; break; 6687 } 6688 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6689 Ops[0] = Builder.CreateBitCast(Ops[0], FloatTy); 6690 Ops[1] = Builder.CreateBitCast(Ops[1], FloatTy); 6691 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 6692 return Builder.CreateSExt(Ops[0], Int32Ty, "vcmpd"); 6693 } 6694 case NEON::BI__builtin_neon_vceqh_f16: 6695 case NEON::BI__builtin_neon_vcleh_f16: 6696 case NEON::BI__builtin_neon_vclth_f16: 6697 case NEON::BI__builtin_neon_vcgeh_f16: 6698 case NEON::BI__builtin_neon_vcgth_f16: { 6699 llvm::CmpInst::Predicate P; 6700 switch (BuiltinID) { 6701 default: llvm_unreachable("missing builtin ID in switch!"); 6702 case NEON::BI__builtin_neon_vceqh_f16: P = llvm::FCmpInst::FCMP_OEQ; break; 6703 case NEON::BI__builtin_neon_vcleh_f16: P = llvm::FCmpInst::FCMP_OLE; break; 6704 case NEON::BI__builtin_neon_vclth_f16: P = llvm::FCmpInst::FCMP_OLT; break; 6705 case NEON::BI__builtin_neon_vcgeh_f16: P = llvm::FCmpInst::FCMP_OGE; break; 6706 case NEON::BI__builtin_neon_vcgth_f16: P = llvm::FCmpInst::FCMP_OGT; break; 6707 } 6708 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6709 Ops[0] = Builder.CreateBitCast(Ops[0], HalfTy); 6710 Ops[1] = Builder.CreateBitCast(Ops[1], HalfTy); 6711 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 6712 return Builder.CreateSExt(Ops[0], Int16Ty, "vcmpd"); 6713 } 6714 case NEON::BI__builtin_neon_vceqd_s64: 6715 case NEON::BI__builtin_neon_vceqd_u64: 6716 case NEON::BI__builtin_neon_vcgtd_s64: 6717 case NEON::BI__builtin_neon_vcgtd_u64: 6718 case NEON::BI__builtin_neon_vcltd_s64: 6719 case NEON::BI__builtin_neon_vcltd_u64: 6720 case NEON::BI__builtin_neon_vcged_u64: 6721 case NEON::BI__builtin_neon_vcged_s64: 6722 case NEON::BI__builtin_neon_vcled_u64: 6723 case NEON::BI__builtin_neon_vcled_s64: { 6724 llvm::CmpInst::Predicate P; 6725 switch (BuiltinID) { 6726 default: llvm_unreachable("missing builtin ID in switch!"); 6727 case NEON::BI__builtin_neon_vceqd_s64: 6728 case NEON::BI__builtin_neon_vceqd_u64:P = llvm::ICmpInst::ICMP_EQ;break; 6729 case NEON::BI__builtin_neon_vcgtd_s64:P = llvm::ICmpInst::ICMP_SGT;break; 6730 case NEON::BI__builtin_neon_vcgtd_u64:P = llvm::ICmpInst::ICMP_UGT;break; 6731 case NEON::BI__builtin_neon_vcltd_s64:P = llvm::ICmpInst::ICMP_SLT;break; 6732 case NEON::BI__builtin_neon_vcltd_u64:P = llvm::ICmpInst::ICMP_ULT;break; 6733 case NEON::BI__builtin_neon_vcged_u64:P = llvm::ICmpInst::ICMP_UGE;break; 6734 case NEON::BI__builtin_neon_vcged_s64:P = llvm::ICmpInst::ICMP_SGE;break; 6735 case NEON::BI__builtin_neon_vcled_u64:P = llvm::ICmpInst::ICMP_ULE;break; 6736 case NEON::BI__builtin_neon_vcled_s64:P = llvm::ICmpInst::ICMP_SLE;break; 6737 } 6738 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6739 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 6740 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 6741 Ops[0] = Builder.CreateICmp(P, Ops[0], Ops[1]); 6742 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqd"); 6743 } 6744 case NEON::BI__builtin_neon_vtstd_s64: 6745 case NEON::BI__builtin_neon_vtstd_u64: { 6746 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6747 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 6748 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 6749 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 6750 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 6751 llvm::Constant::getNullValue(Int64Ty)); 6752 return Builder.CreateSExt(Ops[0], Int64Ty, "vtstd"); 6753 } 6754 case NEON::BI__builtin_neon_vset_lane_i8: 6755 case NEON::BI__builtin_neon_vset_lane_i16: 6756 case NEON::BI__builtin_neon_vset_lane_i32: 6757 case NEON::BI__builtin_neon_vset_lane_i64: 6758 case NEON::BI__builtin_neon_vset_lane_f32: 6759 case NEON::BI__builtin_neon_vsetq_lane_i8: 6760 case NEON::BI__builtin_neon_vsetq_lane_i16: 6761 case NEON::BI__builtin_neon_vsetq_lane_i32: 6762 case NEON::BI__builtin_neon_vsetq_lane_i64: 6763 case NEON::BI__builtin_neon_vsetq_lane_f32: 6764 Ops.push_back(EmitScalarExpr(E->getArg(2))); 6765 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 6766 case NEON::BI__builtin_neon_vset_lane_f64: 6767 // The vector type needs a cast for the v1f64 variant. 6768 Ops[1] = Builder.CreateBitCast(Ops[1], 6769 llvm::VectorType::get(DoubleTy, 1)); 6770 Ops.push_back(EmitScalarExpr(E->getArg(2))); 6771 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 6772 case NEON::BI__builtin_neon_vsetq_lane_f64: 6773 // The vector type needs a cast for the v2f64 variant. 6774 Ops[1] = Builder.CreateBitCast(Ops[1], 6775 llvm::VectorType::get(DoubleTy, 2)); 6776 Ops.push_back(EmitScalarExpr(E->getArg(2))); 6777 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 6778 6779 case NEON::BI__builtin_neon_vget_lane_i8: 6780 case NEON::BI__builtin_neon_vdupb_lane_i8: 6781 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 8)); 6782 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6783 "vget_lane"); 6784 case NEON::BI__builtin_neon_vgetq_lane_i8: 6785 case NEON::BI__builtin_neon_vdupb_laneq_i8: 6786 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 16)); 6787 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6788 "vgetq_lane"); 6789 case NEON::BI__builtin_neon_vget_lane_i16: 6790 case NEON::BI__builtin_neon_vduph_lane_i16: 6791 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 4)); 6792 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6793 "vget_lane"); 6794 case NEON::BI__builtin_neon_vgetq_lane_i16: 6795 case NEON::BI__builtin_neon_vduph_laneq_i16: 6796 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 8)); 6797 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6798 "vgetq_lane"); 6799 case NEON::BI__builtin_neon_vget_lane_i32: 6800 case NEON::BI__builtin_neon_vdups_lane_i32: 6801 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 2)); 6802 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6803 "vget_lane"); 6804 case NEON::BI__builtin_neon_vdups_lane_f32: 6805 Ops[0] = Builder.CreateBitCast(Ops[0], 6806 llvm::VectorType::get(FloatTy, 2)); 6807 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6808 "vdups_lane"); 6809 case NEON::BI__builtin_neon_vgetq_lane_i32: 6810 case NEON::BI__builtin_neon_vdups_laneq_i32: 6811 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 6812 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6813 "vgetq_lane"); 6814 case NEON::BI__builtin_neon_vget_lane_i64: 6815 case NEON::BI__builtin_neon_vdupd_lane_i64: 6816 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 1)); 6817 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6818 "vget_lane"); 6819 case NEON::BI__builtin_neon_vdupd_lane_f64: 6820 Ops[0] = Builder.CreateBitCast(Ops[0], 6821 llvm::VectorType::get(DoubleTy, 1)); 6822 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6823 "vdupd_lane"); 6824 case NEON::BI__builtin_neon_vgetq_lane_i64: 6825 case NEON::BI__builtin_neon_vdupd_laneq_i64: 6826 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 6827 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6828 "vgetq_lane"); 6829 case NEON::BI__builtin_neon_vget_lane_f32: 6830 Ops[0] = Builder.CreateBitCast(Ops[0], 6831 llvm::VectorType::get(FloatTy, 2)); 6832 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6833 "vget_lane"); 6834 case NEON::BI__builtin_neon_vget_lane_f64: 6835 Ops[0] = Builder.CreateBitCast(Ops[0], 6836 llvm::VectorType::get(DoubleTy, 1)); 6837 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6838 "vget_lane"); 6839 case NEON::BI__builtin_neon_vgetq_lane_f32: 6840 case NEON::BI__builtin_neon_vdups_laneq_f32: 6841 Ops[0] = Builder.CreateBitCast(Ops[0], 6842 llvm::VectorType::get(FloatTy, 4)); 6843 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6844 "vgetq_lane"); 6845 case NEON::BI__builtin_neon_vgetq_lane_f64: 6846 case NEON::BI__builtin_neon_vdupd_laneq_f64: 6847 Ops[0] = Builder.CreateBitCast(Ops[0], 6848 llvm::VectorType::get(DoubleTy, 2)); 6849 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 6850 "vgetq_lane"); 6851 case NEON::BI__builtin_neon_vaddh_f16: 6852 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6853 return Builder.CreateFAdd(Ops[0], Ops[1], "vaddh"); 6854 case NEON::BI__builtin_neon_vsubh_f16: 6855 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6856 return Builder.CreateFSub(Ops[0], Ops[1], "vsubh"); 6857 case NEON::BI__builtin_neon_vmulh_f16: 6858 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6859 return Builder.CreateFMul(Ops[0], Ops[1], "vmulh"); 6860 case NEON::BI__builtin_neon_vdivh_f16: 6861 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6862 return Builder.CreateFDiv(Ops[0], Ops[1], "vdivh"); 6863 case NEON::BI__builtin_neon_vfmah_f16: { 6864 Value *F = CGM.getIntrinsic(Intrinsic::fma, HalfTy); 6865 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 6866 return Builder.CreateCall(F, 6867 {EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2)), Ops[0]}); 6868 } 6869 case NEON::BI__builtin_neon_vfmsh_f16: { 6870 Value *F = CGM.getIntrinsic(Intrinsic::fma, HalfTy); 6871 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(HalfTy); 6872 Value* Sub = Builder.CreateFSub(Zero, EmitScalarExpr(E->getArg(1)), "vsubh"); 6873 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 6874 return Builder.CreateCall(F, {Sub, EmitScalarExpr(E->getArg(2)), Ops[0]}); 6875 } 6876 case NEON::BI__builtin_neon_vaddd_s64: 6877 case NEON::BI__builtin_neon_vaddd_u64: 6878 return Builder.CreateAdd(Ops[0], EmitScalarExpr(E->getArg(1)), "vaddd"); 6879 case NEON::BI__builtin_neon_vsubd_s64: 6880 case NEON::BI__builtin_neon_vsubd_u64: 6881 return Builder.CreateSub(Ops[0], EmitScalarExpr(E->getArg(1)), "vsubd"); 6882 case NEON::BI__builtin_neon_vqdmlalh_s16: 6883 case NEON::BI__builtin_neon_vqdmlslh_s16: { 6884 SmallVector<Value *, 2> ProductOps; 6885 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 6886 ProductOps.push_back(vectorWrapScalar16(EmitScalarExpr(E->getArg(2)))); 6887 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 6888 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 6889 ProductOps, "vqdmlXl"); 6890 Constant *CI = ConstantInt::get(SizeTy, 0); 6891 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 6892 6893 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlalh_s16 6894 ? Intrinsic::aarch64_neon_sqadd 6895 : Intrinsic::aarch64_neon_sqsub; 6896 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int32Ty), Ops, "vqdmlXl"); 6897 } 6898 case NEON::BI__builtin_neon_vqshlud_n_s64: { 6899 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6900 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 6901 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqshlu, Int64Ty), 6902 Ops, "vqshlu_n"); 6903 } 6904 case NEON::BI__builtin_neon_vqshld_n_u64: 6905 case NEON::BI__builtin_neon_vqshld_n_s64: { 6906 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vqshld_n_u64 6907 ? Intrinsic::aarch64_neon_uqshl 6908 : Intrinsic::aarch64_neon_sqshl; 6909 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6910 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 6911 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vqshl_n"); 6912 } 6913 case NEON::BI__builtin_neon_vrshrd_n_u64: 6914 case NEON::BI__builtin_neon_vrshrd_n_s64: { 6915 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrshrd_n_u64 6916 ? Intrinsic::aarch64_neon_urshl 6917 : Intrinsic::aarch64_neon_srshl; 6918 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6919 int SV = cast<ConstantInt>(Ops[1])->getSExtValue(); 6920 Ops[1] = ConstantInt::get(Int64Ty, -SV); 6921 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vrshr_n"); 6922 } 6923 case NEON::BI__builtin_neon_vrsrad_n_u64: 6924 case NEON::BI__builtin_neon_vrsrad_n_s64: { 6925 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrsrad_n_u64 6926 ? Intrinsic::aarch64_neon_urshl 6927 : Intrinsic::aarch64_neon_srshl; 6928 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 6929 Ops.push_back(Builder.CreateNeg(EmitScalarExpr(E->getArg(2)))); 6930 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Int64Ty), 6931 {Ops[1], Builder.CreateSExt(Ops[2], Int64Ty)}); 6932 return Builder.CreateAdd(Ops[0], Builder.CreateBitCast(Ops[1], Int64Ty)); 6933 } 6934 case NEON::BI__builtin_neon_vshld_n_s64: 6935 case NEON::BI__builtin_neon_vshld_n_u64: { 6936 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 6937 return Builder.CreateShl( 6938 Ops[0], ConstantInt::get(Int64Ty, Amt->getZExtValue()), "shld_n"); 6939 } 6940 case NEON::BI__builtin_neon_vshrd_n_s64: { 6941 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 6942 return Builder.CreateAShr( 6943 Ops[0], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 6944 Amt->getZExtValue())), 6945 "shrd_n"); 6946 } 6947 case NEON::BI__builtin_neon_vshrd_n_u64: { 6948 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 6949 uint64_t ShiftAmt = Amt->getZExtValue(); 6950 // Right-shifting an unsigned value by its size yields 0. 6951 if (ShiftAmt == 64) 6952 return ConstantInt::get(Int64Ty, 0); 6953 return Builder.CreateLShr(Ops[0], ConstantInt::get(Int64Ty, ShiftAmt), 6954 "shrd_n"); 6955 } 6956 case NEON::BI__builtin_neon_vsrad_n_s64: { 6957 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 6958 Ops[1] = Builder.CreateAShr( 6959 Ops[1], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 6960 Amt->getZExtValue())), 6961 "shrd_n"); 6962 return Builder.CreateAdd(Ops[0], Ops[1]); 6963 } 6964 case NEON::BI__builtin_neon_vsrad_n_u64: { 6965 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 6966 uint64_t ShiftAmt = Amt->getZExtValue(); 6967 // Right-shifting an unsigned value by its size yields 0. 6968 // As Op + 0 = Op, return Ops[0] directly. 6969 if (ShiftAmt == 64) 6970 return Ops[0]; 6971 Ops[1] = Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, ShiftAmt), 6972 "shrd_n"); 6973 return Builder.CreateAdd(Ops[0], Ops[1]); 6974 } 6975 case NEON::BI__builtin_neon_vqdmlalh_lane_s16: 6976 case NEON::BI__builtin_neon_vqdmlalh_laneq_s16: 6977 case NEON::BI__builtin_neon_vqdmlslh_lane_s16: 6978 case NEON::BI__builtin_neon_vqdmlslh_laneq_s16: { 6979 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 6980 "lane"); 6981 SmallVector<Value *, 2> ProductOps; 6982 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 6983 ProductOps.push_back(vectorWrapScalar16(Ops[2])); 6984 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 6985 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 6986 ProductOps, "vqdmlXl"); 6987 Constant *CI = ConstantInt::get(SizeTy, 0); 6988 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 6989 Ops.pop_back(); 6990 6991 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlalh_lane_s16 || 6992 BuiltinID == NEON::BI__builtin_neon_vqdmlalh_laneq_s16) 6993 ? Intrinsic::aarch64_neon_sqadd 6994 : Intrinsic::aarch64_neon_sqsub; 6995 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int32Ty), Ops, "vqdmlXl"); 6996 } 6997 case NEON::BI__builtin_neon_vqdmlals_s32: 6998 case NEON::BI__builtin_neon_vqdmlsls_s32: { 6999 SmallVector<Value *, 2> ProductOps; 7000 ProductOps.push_back(Ops[1]); 7001 ProductOps.push_back(EmitScalarExpr(E->getArg(2))); 7002 Ops[1] = 7003 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 7004 ProductOps, "vqdmlXl"); 7005 7006 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlals_s32 7007 ? Intrinsic::aarch64_neon_sqadd 7008 : Intrinsic::aarch64_neon_sqsub; 7009 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int64Ty), Ops, "vqdmlXl"); 7010 } 7011 case NEON::BI__builtin_neon_vqdmlals_lane_s32: 7012 case NEON::BI__builtin_neon_vqdmlals_laneq_s32: 7013 case NEON::BI__builtin_neon_vqdmlsls_lane_s32: 7014 case NEON::BI__builtin_neon_vqdmlsls_laneq_s32: { 7015 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 7016 "lane"); 7017 SmallVector<Value *, 2> ProductOps; 7018 ProductOps.push_back(Ops[1]); 7019 ProductOps.push_back(Ops[2]); 7020 Ops[1] = 7021 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 7022 ProductOps, "vqdmlXl"); 7023 Ops.pop_back(); 7024 7025 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlals_lane_s32 || 7026 BuiltinID == NEON::BI__builtin_neon_vqdmlals_laneq_s32) 7027 ? Intrinsic::aarch64_neon_sqadd 7028 : Intrinsic::aarch64_neon_sqsub; 7029 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl"); 7030 } 7031 } 7032 7033 llvm::VectorType *VTy = GetNeonType(this, Type); 7034 llvm::Type *Ty = VTy; 7035 if (!Ty) 7036 return nullptr; 7037 7038 // Not all intrinsics handled by the common case work for AArch64 yet, so only 7039 // defer to common code if it's been added to our special map. 7040 Builtin = findNeonIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID, 7041 AArch64SIMDIntrinsicsProvenSorted); 7042 7043 if (Builtin) 7044 return EmitCommonNeonBuiltinExpr( 7045 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 7046 Builtin->NameHint, Builtin->TypeModifier, E, Ops, 7047 /*never use addresses*/ Address::invalid(), Address::invalid(), Arch); 7048 7049 if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops, Arch)) 7050 return V; 7051 7052 unsigned Int; 7053 switch (BuiltinID) { 7054 default: return nullptr; 7055 case NEON::BI__builtin_neon_vbsl_v: 7056 case NEON::BI__builtin_neon_vbslq_v: { 7057 llvm::Type *BitTy = llvm::VectorType::getInteger(VTy); 7058 Ops[0] = Builder.CreateBitCast(Ops[0], BitTy, "vbsl"); 7059 Ops[1] = Builder.CreateBitCast(Ops[1], BitTy, "vbsl"); 7060 Ops[2] = Builder.CreateBitCast(Ops[2], BitTy, "vbsl"); 7061 7062 Ops[1] = Builder.CreateAnd(Ops[0], Ops[1], "vbsl"); 7063 Ops[2] = Builder.CreateAnd(Builder.CreateNot(Ops[0]), Ops[2], "vbsl"); 7064 Ops[0] = Builder.CreateOr(Ops[1], Ops[2], "vbsl"); 7065 return Builder.CreateBitCast(Ops[0], Ty); 7066 } 7067 case NEON::BI__builtin_neon_vfma_lane_v: 7068 case NEON::BI__builtin_neon_vfmaq_lane_v: { // Only used for FP types 7069 // The ARM builtins (and instructions) have the addend as the first 7070 // operand, but the 'fma' intrinsics have it last. Swap it around here. 7071 Value *Addend = Ops[0]; 7072 Value *Multiplicand = Ops[1]; 7073 Value *LaneSource = Ops[2]; 7074 Ops[0] = Multiplicand; 7075 Ops[1] = LaneSource; 7076 Ops[2] = Addend; 7077 7078 // Now adjust things to handle the lane access. 7079 llvm::Type *SourceTy = BuiltinID == NEON::BI__builtin_neon_vfmaq_lane_v ? 7080 llvm::VectorType::get(VTy->getElementType(), VTy->getNumElements() / 2) : 7081 VTy; 7082 llvm::Constant *cst = cast<Constant>(Ops[3]); 7083 Value *SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), cst); 7084 Ops[1] = Builder.CreateBitCast(Ops[1], SourceTy); 7085 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV, "lane"); 7086 7087 Ops.pop_back(); 7088 Int = Intrinsic::fma; 7089 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmla"); 7090 } 7091 case NEON::BI__builtin_neon_vfma_laneq_v: { 7092 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 7093 // v1f64 fma should be mapped to Neon scalar f64 fma 7094 if (VTy && VTy->getElementType() == DoubleTy) { 7095 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 7096 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 7097 llvm::Type *VTy = GetNeonType(this, 7098 NeonTypeFlags(NeonTypeFlags::Float64, false, true)); 7099 Ops[2] = Builder.CreateBitCast(Ops[2], VTy); 7100 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 7101 Value *F = CGM.getIntrinsic(Intrinsic::fma, DoubleTy); 7102 Value *Result = Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 7103 return Builder.CreateBitCast(Result, Ty); 7104 } 7105 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 7106 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7107 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7108 7109 llvm::Type *STy = llvm::VectorType::get(VTy->getElementType(), 7110 VTy->getNumElements() * 2); 7111 Ops[2] = Builder.CreateBitCast(Ops[2], STy); 7112 Value* SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), 7113 cast<ConstantInt>(Ops[3])); 7114 Ops[2] = Builder.CreateShuffleVector(Ops[2], Ops[2], SV, "lane"); 7115 7116 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 7117 } 7118 case NEON::BI__builtin_neon_vfmaq_laneq_v: { 7119 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 7120 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7121 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7122 7123 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 7124 Ops[2] = EmitNeonSplat(Ops[2], cast<ConstantInt>(Ops[3])); 7125 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 7126 } 7127 case NEON::BI__builtin_neon_vfmah_lane_f16: 7128 case NEON::BI__builtin_neon_vfmas_lane_f32: 7129 case NEON::BI__builtin_neon_vfmah_laneq_f16: 7130 case NEON::BI__builtin_neon_vfmas_laneq_f32: 7131 case NEON::BI__builtin_neon_vfmad_lane_f64: 7132 case NEON::BI__builtin_neon_vfmad_laneq_f64: { 7133 Ops.push_back(EmitScalarExpr(E->getArg(3))); 7134 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 7135 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 7136 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 7137 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 7138 } 7139 case NEON::BI__builtin_neon_vmull_v: 7140 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 7141 Int = usgn ? Intrinsic::aarch64_neon_umull : Intrinsic::aarch64_neon_smull; 7142 if (Type.isPoly()) Int = Intrinsic::aarch64_neon_pmull; 7143 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 7144 case NEON::BI__builtin_neon_vmax_v: 7145 case NEON::BI__builtin_neon_vmaxq_v: 7146 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 7147 Int = usgn ? Intrinsic::aarch64_neon_umax : Intrinsic::aarch64_neon_smax; 7148 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmax; 7149 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmax"); 7150 case NEON::BI__builtin_neon_vmaxh_f16: { 7151 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7152 Int = Intrinsic::aarch64_neon_fmax; 7153 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vmax"); 7154 } 7155 case NEON::BI__builtin_neon_vmin_v: 7156 case NEON::BI__builtin_neon_vminq_v: 7157 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 7158 Int = usgn ? Intrinsic::aarch64_neon_umin : Intrinsic::aarch64_neon_smin; 7159 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmin; 7160 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmin"); 7161 case NEON::BI__builtin_neon_vminh_f16: { 7162 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7163 Int = Intrinsic::aarch64_neon_fmin; 7164 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vmin"); 7165 } 7166 case NEON::BI__builtin_neon_vabd_v: 7167 case NEON::BI__builtin_neon_vabdq_v: 7168 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 7169 Int = usgn ? Intrinsic::aarch64_neon_uabd : Intrinsic::aarch64_neon_sabd; 7170 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fabd; 7171 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vabd"); 7172 case NEON::BI__builtin_neon_vpadal_v: 7173 case NEON::BI__builtin_neon_vpadalq_v: { 7174 unsigned ArgElts = VTy->getNumElements(); 7175 llvm::IntegerType *EltTy = cast<IntegerType>(VTy->getElementType()); 7176 unsigned BitWidth = EltTy->getBitWidth(); 7177 llvm::Type *ArgTy = llvm::VectorType::get( 7178 llvm::IntegerType::get(getLLVMContext(), BitWidth/2), 2*ArgElts); 7179 llvm::Type* Tys[2] = { VTy, ArgTy }; 7180 Int = usgn ? Intrinsic::aarch64_neon_uaddlp : Intrinsic::aarch64_neon_saddlp; 7181 SmallVector<llvm::Value*, 1> TmpOps; 7182 TmpOps.push_back(Ops[1]); 7183 Function *F = CGM.getIntrinsic(Int, Tys); 7184 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vpadal"); 7185 llvm::Value *addend = Builder.CreateBitCast(Ops[0], tmp->getType()); 7186 return Builder.CreateAdd(tmp, addend); 7187 } 7188 case NEON::BI__builtin_neon_vpmin_v: 7189 case NEON::BI__builtin_neon_vpminq_v: 7190 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 7191 Int = usgn ? Intrinsic::aarch64_neon_uminp : Intrinsic::aarch64_neon_sminp; 7192 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fminp; 7193 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmin"); 7194 case NEON::BI__builtin_neon_vpmax_v: 7195 case NEON::BI__builtin_neon_vpmaxq_v: 7196 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 7197 Int = usgn ? Intrinsic::aarch64_neon_umaxp : Intrinsic::aarch64_neon_smaxp; 7198 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmaxp; 7199 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmax"); 7200 case NEON::BI__builtin_neon_vminnm_v: 7201 case NEON::BI__builtin_neon_vminnmq_v: 7202 Int = Intrinsic::aarch64_neon_fminnm; 7203 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vminnm"); 7204 case NEON::BI__builtin_neon_vminnmh_f16: 7205 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7206 Int = Intrinsic::aarch64_neon_fminnm; 7207 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vminnm"); 7208 case NEON::BI__builtin_neon_vmaxnm_v: 7209 case NEON::BI__builtin_neon_vmaxnmq_v: 7210 Int = Intrinsic::aarch64_neon_fmaxnm; 7211 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmaxnm"); 7212 case NEON::BI__builtin_neon_vmaxnmh_f16: 7213 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7214 Int = Intrinsic::aarch64_neon_fmaxnm; 7215 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vmaxnm"); 7216 case NEON::BI__builtin_neon_vrecpss_f32: { 7217 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7218 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, FloatTy), 7219 Ops, "vrecps"); 7220 } 7221 case NEON::BI__builtin_neon_vrecpsd_f64: 7222 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7223 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, DoubleTy), 7224 Ops, "vrecps"); 7225 case NEON::BI__builtin_neon_vrecpsh_f16: 7226 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7227 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, HalfTy), 7228 Ops, "vrecps"); 7229 case NEON::BI__builtin_neon_vqshrun_n_v: 7230 Int = Intrinsic::aarch64_neon_sqshrun; 7231 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrun_n"); 7232 case NEON::BI__builtin_neon_vqrshrun_n_v: 7233 Int = Intrinsic::aarch64_neon_sqrshrun; 7234 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrun_n"); 7235 case NEON::BI__builtin_neon_vqshrn_n_v: 7236 Int = usgn ? Intrinsic::aarch64_neon_uqshrn : Intrinsic::aarch64_neon_sqshrn; 7237 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n"); 7238 case NEON::BI__builtin_neon_vrshrn_n_v: 7239 Int = Intrinsic::aarch64_neon_rshrn; 7240 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshrn_n"); 7241 case NEON::BI__builtin_neon_vqrshrn_n_v: 7242 Int = usgn ? Intrinsic::aarch64_neon_uqrshrn : Intrinsic::aarch64_neon_sqrshrn; 7243 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n"); 7244 case NEON::BI__builtin_neon_vrndah_f16: { 7245 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7246 Int = Intrinsic::round; 7247 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrnda"); 7248 } 7249 case NEON::BI__builtin_neon_vrnda_v: 7250 case NEON::BI__builtin_neon_vrndaq_v: { 7251 Int = Intrinsic::round; 7252 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrnda"); 7253 } 7254 case NEON::BI__builtin_neon_vrndih_f16: { 7255 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7256 Int = Intrinsic::nearbyint; 7257 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndi"); 7258 } 7259 case NEON::BI__builtin_neon_vrndi_v: 7260 case NEON::BI__builtin_neon_vrndiq_v: { 7261 Int = Intrinsic::nearbyint; 7262 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndi"); 7263 } 7264 case NEON::BI__builtin_neon_vrndmh_f16: { 7265 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7266 Int = Intrinsic::floor; 7267 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndm"); 7268 } 7269 case NEON::BI__builtin_neon_vrndm_v: 7270 case NEON::BI__builtin_neon_vrndmq_v: { 7271 Int = Intrinsic::floor; 7272 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndm"); 7273 } 7274 case NEON::BI__builtin_neon_vrndnh_f16: { 7275 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7276 Int = Intrinsic::aarch64_neon_frintn; 7277 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndn"); 7278 } 7279 case NEON::BI__builtin_neon_vrndn_v: 7280 case NEON::BI__builtin_neon_vrndnq_v: { 7281 Int = Intrinsic::aarch64_neon_frintn; 7282 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndn"); 7283 } 7284 case NEON::BI__builtin_neon_vrndph_f16: { 7285 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7286 Int = Intrinsic::ceil; 7287 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndp"); 7288 } 7289 case NEON::BI__builtin_neon_vrndp_v: 7290 case NEON::BI__builtin_neon_vrndpq_v: { 7291 Int = Intrinsic::ceil; 7292 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndp"); 7293 } 7294 case NEON::BI__builtin_neon_vrndxh_f16: { 7295 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7296 Int = Intrinsic::rint; 7297 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndx"); 7298 } 7299 case NEON::BI__builtin_neon_vrndx_v: 7300 case NEON::BI__builtin_neon_vrndxq_v: { 7301 Int = Intrinsic::rint; 7302 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndx"); 7303 } 7304 case NEON::BI__builtin_neon_vrndh_f16: { 7305 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7306 Int = Intrinsic::trunc; 7307 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndz"); 7308 } 7309 case NEON::BI__builtin_neon_vrnd_v: 7310 case NEON::BI__builtin_neon_vrndq_v: { 7311 Int = Intrinsic::trunc; 7312 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndz"); 7313 } 7314 case NEON::BI__builtin_neon_vcvt_f64_v: 7315 case NEON::BI__builtin_neon_vcvtq_f64_v: 7316 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7317 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad)); 7318 return usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 7319 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 7320 case NEON::BI__builtin_neon_vcvt_f64_f32: { 7321 assert(Type.getEltType() == NeonTypeFlags::Float64 && quad && 7322 "unexpected vcvt_f64_f32 builtin"); 7323 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float32, false, false); 7324 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 7325 7326 return Builder.CreateFPExt(Ops[0], Ty, "vcvt"); 7327 } 7328 case NEON::BI__builtin_neon_vcvt_f32_f64: { 7329 assert(Type.getEltType() == NeonTypeFlags::Float32 && 7330 "unexpected vcvt_f32_f64 builtin"); 7331 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float64, false, true); 7332 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 7333 7334 return Builder.CreateFPTrunc(Ops[0], Ty, "vcvt"); 7335 } 7336 case NEON::BI__builtin_neon_vcvt_s32_v: 7337 case NEON::BI__builtin_neon_vcvt_u32_v: 7338 case NEON::BI__builtin_neon_vcvt_s64_v: 7339 case NEON::BI__builtin_neon_vcvt_u64_v: 7340 case NEON::BI__builtin_neon_vcvt_s16_v: 7341 case NEON::BI__builtin_neon_vcvt_u16_v: 7342 case NEON::BI__builtin_neon_vcvtq_s32_v: 7343 case NEON::BI__builtin_neon_vcvtq_u32_v: 7344 case NEON::BI__builtin_neon_vcvtq_s64_v: 7345 case NEON::BI__builtin_neon_vcvtq_u64_v: 7346 case NEON::BI__builtin_neon_vcvtq_s16_v: 7347 case NEON::BI__builtin_neon_vcvtq_u16_v: { 7348 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 7349 if (usgn) 7350 return Builder.CreateFPToUI(Ops[0], Ty); 7351 return Builder.CreateFPToSI(Ops[0], Ty); 7352 } 7353 case NEON::BI__builtin_neon_vcvta_s16_v: 7354 case NEON::BI__builtin_neon_vcvta_s32_v: 7355 case NEON::BI__builtin_neon_vcvtaq_s16_v: 7356 case NEON::BI__builtin_neon_vcvtaq_s32_v: 7357 case NEON::BI__builtin_neon_vcvta_u32_v: 7358 case NEON::BI__builtin_neon_vcvtaq_u16_v: 7359 case NEON::BI__builtin_neon_vcvtaq_u32_v: 7360 case NEON::BI__builtin_neon_vcvta_s64_v: 7361 case NEON::BI__builtin_neon_vcvtaq_s64_v: 7362 case NEON::BI__builtin_neon_vcvta_u64_v: 7363 case NEON::BI__builtin_neon_vcvtaq_u64_v: { 7364 Int = usgn ? Intrinsic::aarch64_neon_fcvtau : Intrinsic::aarch64_neon_fcvtas; 7365 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 7366 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvta"); 7367 } 7368 case NEON::BI__builtin_neon_vcvtm_s16_v: 7369 case NEON::BI__builtin_neon_vcvtm_s32_v: 7370 case NEON::BI__builtin_neon_vcvtmq_s16_v: 7371 case NEON::BI__builtin_neon_vcvtmq_s32_v: 7372 case NEON::BI__builtin_neon_vcvtm_u16_v: 7373 case NEON::BI__builtin_neon_vcvtm_u32_v: 7374 case NEON::BI__builtin_neon_vcvtmq_u16_v: 7375 case NEON::BI__builtin_neon_vcvtmq_u32_v: 7376 case NEON::BI__builtin_neon_vcvtm_s64_v: 7377 case NEON::BI__builtin_neon_vcvtmq_s64_v: 7378 case NEON::BI__builtin_neon_vcvtm_u64_v: 7379 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 7380 Int = usgn ? Intrinsic::aarch64_neon_fcvtmu : Intrinsic::aarch64_neon_fcvtms; 7381 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 7382 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtm"); 7383 } 7384 case NEON::BI__builtin_neon_vcvtn_s16_v: 7385 case NEON::BI__builtin_neon_vcvtn_s32_v: 7386 case NEON::BI__builtin_neon_vcvtnq_s16_v: 7387 case NEON::BI__builtin_neon_vcvtnq_s32_v: 7388 case NEON::BI__builtin_neon_vcvtn_u16_v: 7389 case NEON::BI__builtin_neon_vcvtn_u32_v: 7390 case NEON::BI__builtin_neon_vcvtnq_u16_v: 7391 case NEON::BI__builtin_neon_vcvtnq_u32_v: 7392 case NEON::BI__builtin_neon_vcvtn_s64_v: 7393 case NEON::BI__builtin_neon_vcvtnq_s64_v: 7394 case NEON::BI__builtin_neon_vcvtn_u64_v: 7395 case NEON::BI__builtin_neon_vcvtnq_u64_v: { 7396 Int = usgn ? Intrinsic::aarch64_neon_fcvtnu : Intrinsic::aarch64_neon_fcvtns; 7397 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 7398 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtn"); 7399 } 7400 case NEON::BI__builtin_neon_vcvtp_s16_v: 7401 case NEON::BI__builtin_neon_vcvtp_s32_v: 7402 case NEON::BI__builtin_neon_vcvtpq_s16_v: 7403 case NEON::BI__builtin_neon_vcvtpq_s32_v: 7404 case NEON::BI__builtin_neon_vcvtp_u16_v: 7405 case NEON::BI__builtin_neon_vcvtp_u32_v: 7406 case NEON::BI__builtin_neon_vcvtpq_u16_v: 7407 case NEON::BI__builtin_neon_vcvtpq_u32_v: 7408 case NEON::BI__builtin_neon_vcvtp_s64_v: 7409 case NEON::BI__builtin_neon_vcvtpq_s64_v: 7410 case NEON::BI__builtin_neon_vcvtp_u64_v: 7411 case NEON::BI__builtin_neon_vcvtpq_u64_v: { 7412 Int = usgn ? Intrinsic::aarch64_neon_fcvtpu : Intrinsic::aarch64_neon_fcvtps; 7413 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 7414 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtp"); 7415 } 7416 case NEON::BI__builtin_neon_vmulx_v: 7417 case NEON::BI__builtin_neon_vmulxq_v: { 7418 Int = Intrinsic::aarch64_neon_fmulx; 7419 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmulx"); 7420 } 7421 case NEON::BI__builtin_neon_vmulxh_lane_f16: 7422 case NEON::BI__builtin_neon_vmulxh_laneq_f16: { 7423 // vmulx_lane should be mapped to Neon scalar mulx after 7424 // extracting the scalar element 7425 Ops.push_back(EmitScalarExpr(E->getArg(2))); 7426 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 7427 Ops.pop_back(); 7428 Int = Intrinsic::aarch64_neon_fmulx; 7429 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vmulx"); 7430 } 7431 case NEON::BI__builtin_neon_vmul_lane_v: 7432 case NEON::BI__builtin_neon_vmul_laneq_v: { 7433 // v1f64 vmul_lane should be mapped to Neon scalar mul lane 7434 bool Quad = false; 7435 if (BuiltinID == NEON::BI__builtin_neon_vmul_laneq_v) 7436 Quad = true; 7437 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 7438 llvm::Type *VTy = GetNeonType(this, 7439 NeonTypeFlags(NeonTypeFlags::Float64, false, Quad)); 7440 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 7441 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 7442 Value *Result = Builder.CreateFMul(Ops[0], Ops[1]); 7443 return Builder.CreateBitCast(Result, Ty); 7444 } 7445 case NEON::BI__builtin_neon_vnegd_s64: 7446 return Builder.CreateNeg(EmitScalarExpr(E->getArg(0)), "vnegd"); 7447 case NEON::BI__builtin_neon_vnegh_f16: 7448 return Builder.CreateFNeg(EmitScalarExpr(E->getArg(0)), "vnegh"); 7449 case NEON::BI__builtin_neon_vpmaxnm_v: 7450 case NEON::BI__builtin_neon_vpmaxnmq_v: { 7451 Int = Intrinsic::aarch64_neon_fmaxnmp; 7452 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmaxnm"); 7453 } 7454 case NEON::BI__builtin_neon_vpminnm_v: 7455 case NEON::BI__builtin_neon_vpminnmq_v: { 7456 Int = Intrinsic::aarch64_neon_fminnmp; 7457 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpminnm"); 7458 } 7459 case NEON::BI__builtin_neon_vsqrth_f16: { 7460 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7461 Int = Intrinsic::sqrt; 7462 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vsqrt"); 7463 } 7464 case NEON::BI__builtin_neon_vsqrt_v: 7465 case NEON::BI__builtin_neon_vsqrtq_v: { 7466 Int = Intrinsic::sqrt; 7467 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7468 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqrt"); 7469 } 7470 case NEON::BI__builtin_neon_vrbit_v: 7471 case NEON::BI__builtin_neon_vrbitq_v: { 7472 Int = Intrinsic::aarch64_neon_rbit; 7473 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrbit"); 7474 } 7475 case NEON::BI__builtin_neon_vaddv_u8: 7476 // FIXME: These are handled by the AArch64 scalar code. 7477 usgn = true; 7478 LLVM_FALLTHROUGH; 7479 case NEON::BI__builtin_neon_vaddv_s8: { 7480 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 7481 Ty = Int32Ty; 7482 VTy = llvm::VectorType::get(Int8Ty, 8); 7483 llvm::Type *Tys[2] = { Ty, VTy }; 7484 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7485 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 7486 return Builder.CreateTrunc(Ops[0], Int8Ty); 7487 } 7488 case NEON::BI__builtin_neon_vaddv_u16: 7489 usgn = true; 7490 LLVM_FALLTHROUGH; 7491 case NEON::BI__builtin_neon_vaddv_s16: { 7492 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 7493 Ty = Int32Ty; 7494 VTy = llvm::VectorType::get(Int16Ty, 4); 7495 llvm::Type *Tys[2] = { Ty, VTy }; 7496 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7497 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 7498 return Builder.CreateTrunc(Ops[0], Int16Ty); 7499 } 7500 case NEON::BI__builtin_neon_vaddvq_u8: 7501 usgn = true; 7502 LLVM_FALLTHROUGH; 7503 case NEON::BI__builtin_neon_vaddvq_s8: { 7504 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 7505 Ty = Int32Ty; 7506 VTy = llvm::VectorType::get(Int8Ty, 16); 7507 llvm::Type *Tys[2] = { Ty, VTy }; 7508 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7509 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 7510 return Builder.CreateTrunc(Ops[0], Int8Ty); 7511 } 7512 case NEON::BI__builtin_neon_vaddvq_u16: 7513 usgn = true; 7514 LLVM_FALLTHROUGH; 7515 case NEON::BI__builtin_neon_vaddvq_s16: { 7516 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 7517 Ty = Int32Ty; 7518 VTy = llvm::VectorType::get(Int16Ty, 8); 7519 llvm::Type *Tys[2] = { Ty, VTy }; 7520 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7521 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 7522 return Builder.CreateTrunc(Ops[0], Int16Ty); 7523 } 7524 case NEON::BI__builtin_neon_vmaxv_u8: { 7525 Int = Intrinsic::aarch64_neon_umaxv; 7526 Ty = Int32Ty; 7527 VTy = llvm::VectorType::get(Int8Ty, 8); 7528 llvm::Type *Tys[2] = { Ty, VTy }; 7529 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7530 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7531 return Builder.CreateTrunc(Ops[0], Int8Ty); 7532 } 7533 case NEON::BI__builtin_neon_vmaxv_u16: { 7534 Int = Intrinsic::aarch64_neon_umaxv; 7535 Ty = Int32Ty; 7536 VTy = llvm::VectorType::get(Int16Ty, 4); 7537 llvm::Type *Tys[2] = { Ty, VTy }; 7538 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7539 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7540 return Builder.CreateTrunc(Ops[0], Int16Ty); 7541 } 7542 case NEON::BI__builtin_neon_vmaxvq_u8: { 7543 Int = Intrinsic::aarch64_neon_umaxv; 7544 Ty = Int32Ty; 7545 VTy = llvm::VectorType::get(Int8Ty, 16); 7546 llvm::Type *Tys[2] = { Ty, VTy }; 7547 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7548 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7549 return Builder.CreateTrunc(Ops[0], Int8Ty); 7550 } 7551 case NEON::BI__builtin_neon_vmaxvq_u16: { 7552 Int = Intrinsic::aarch64_neon_umaxv; 7553 Ty = Int32Ty; 7554 VTy = llvm::VectorType::get(Int16Ty, 8); 7555 llvm::Type *Tys[2] = { Ty, VTy }; 7556 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7557 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7558 return Builder.CreateTrunc(Ops[0], Int16Ty); 7559 } 7560 case NEON::BI__builtin_neon_vmaxv_s8: { 7561 Int = Intrinsic::aarch64_neon_smaxv; 7562 Ty = Int32Ty; 7563 VTy = llvm::VectorType::get(Int8Ty, 8); 7564 llvm::Type *Tys[2] = { Ty, VTy }; 7565 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7566 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7567 return Builder.CreateTrunc(Ops[0], Int8Ty); 7568 } 7569 case NEON::BI__builtin_neon_vmaxv_s16: { 7570 Int = Intrinsic::aarch64_neon_smaxv; 7571 Ty = Int32Ty; 7572 VTy = llvm::VectorType::get(Int16Ty, 4); 7573 llvm::Type *Tys[2] = { Ty, VTy }; 7574 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7575 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7576 return Builder.CreateTrunc(Ops[0], Int16Ty); 7577 } 7578 case NEON::BI__builtin_neon_vmaxvq_s8: { 7579 Int = Intrinsic::aarch64_neon_smaxv; 7580 Ty = Int32Ty; 7581 VTy = llvm::VectorType::get(Int8Ty, 16); 7582 llvm::Type *Tys[2] = { Ty, VTy }; 7583 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7584 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7585 return Builder.CreateTrunc(Ops[0], Int8Ty); 7586 } 7587 case NEON::BI__builtin_neon_vmaxvq_s16: { 7588 Int = Intrinsic::aarch64_neon_smaxv; 7589 Ty = Int32Ty; 7590 VTy = llvm::VectorType::get(Int16Ty, 8); 7591 llvm::Type *Tys[2] = { Ty, VTy }; 7592 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7593 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7594 return Builder.CreateTrunc(Ops[0], Int16Ty); 7595 } 7596 case NEON::BI__builtin_neon_vmaxv_f16: { 7597 Int = Intrinsic::aarch64_neon_fmaxv; 7598 Ty = HalfTy; 7599 VTy = llvm::VectorType::get(HalfTy, 4); 7600 llvm::Type *Tys[2] = { Ty, VTy }; 7601 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7602 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7603 return Builder.CreateTrunc(Ops[0], HalfTy); 7604 } 7605 case NEON::BI__builtin_neon_vmaxvq_f16: { 7606 Int = Intrinsic::aarch64_neon_fmaxv; 7607 Ty = HalfTy; 7608 VTy = llvm::VectorType::get(HalfTy, 8); 7609 llvm::Type *Tys[2] = { Ty, VTy }; 7610 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7611 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 7612 return Builder.CreateTrunc(Ops[0], HalfTy); 7613 } 7614 case NEON::BI__builtin_neon_vminv_u8: { 7615 Int = Intrinsic::aarch64_neon_uminv; 7616 Ty = Int32Ty; 7617 VTy = llvm::VectorType::get(Int8Ty, 8); 7618 llvm::Type *Tys[2] = { Ty, VTy }; 7619 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7620 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7621 return Builder.CreateTrunc(Ops[0], Int8Ty); 7622 } 7623 case NEON::BI__builtin_neon_vminv_u16: { 7624 Int = Intrinsic::aarch64_neon_uminv; 7625 Ty = Int32Ty; 7626 VTy = llvm::VectorType::get(Int16Ty, 4); 7627 llvm::Type *Tys[2] = { Ty, VTy }; 7628 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7629 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7630 return Builder.CreateTrunc(Ops[0], Int16Ty); 7631 } 7632 case NEON::BI__builtin_neon_vminvq_u8: { 7633 Int = Intrinsic::aarch64_neon_uminv; 7634 Ty = Int32Ty; 7635 VTy = llvm::VectorType::get(Int8Ty, 16); 7636 llvm::Type *Tys[2] = { Ty, VTy }; 7637 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7638 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7639 return Builder.CreateTrunc(Ops[0], Int8Ty); 7640 } 7641 case NEON::BI__builtin_neon_vminvq_u16: { 7642 Int = Intrinsic::aarch64_neon_uminv; 7643 Ty = Int32Ty; 7644 VTy = llvm::VectorType::get(Int16Ty, 8); 7645 llvm::Type *Tys[2] = { Ty, VTy }; 7646 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7647 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7648 return Builder.CreateTrunc(Ops[0], Int16Ty); 7649 } 7650 case NEON::BI__builtin_neon_vminv_s8: { 7651 Int = Intrinsic::aarch64_neon_sminv; 7652 Ty = Int32Ty; 7653 VTy = llvm::VectorType::get(Int8Ty, 8); 7654 llvm::Type *Tys[2] = { Ty, VTy }; 7655 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7656 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7657 return Builder.CreateTrunc(Ops[0], Int8Ty); 7658 } 7659 case NEON::BI__builtin_neon_vminv_s16: { 7660 Int = Intrinsic::aarch64_neon_sminv; 7661 Ty = Int32Ty; 7662 VTy = llvm::VectorType::get(Int16Ty, 4); 7663 llvm::Type *Tys[2] = { Ty, VTy }; 7664 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7665 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7666 return Builder.CreateTrunc(Ops[0], Int16Ty); 7667 } 7668 case NEON::BI__builtin_neon_vminvq_s8: { 7669 Int = Intrinsic::aarch64_neon_sminv; 7670 Ty = Int32Ty; 7671 VTy = llvm::VectorType::get(Int8Ty, 16); 7672 llvm::Type *Tys[2] = { Ty, VTy }; 7673 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7674 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7675 return Builder.CreateTrunc(Ops[0], Int8Ty); 7676 } 7677 case NEON::BI__builtin_neon_vminvq_s16: { 7678 Int = Intrinsic::aarch64_neon_sminv; 7679 Ty = Int32Ty; 7680 VTy = llvm::VectorType::get(Int16Ty, 8); 7681 llvm::Type *Tys[2] = { Ty, VTy }; 7682 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7683 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7684 return Builder.CreateTrunc(Ops[0], Int16Ty); 7685 } 7686 case NEON::BI__builtin_neon_vminv_f16: { 7687 Int = Intrinsic::aarch64_neon_fminv; 7688 Ty = HalfTy; 7689 VTy = llvm::VectorType::get(HalfTy, 4); 7690 llvm::Type *Tys[2] = { Ty, VTy }; 7691 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7692 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7693 return Builder.CreateTrunc(Ops[0], HalfTy); 7694 } 7695 case NEON::BI__builtin_neon_vminvq_f16: { 7696 Int = Intrinsic::aarch64_neon_fminv; 7697 Ty = HalfTy; 7698 VTy = llvm::VectorType::get(HalfTy, 8); 7699 llvm::Type *Tys[2] = { Ty, VTy }; 7700 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7701 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 7702 return Builder.CreateTrunc(Ops[0], HalfTy); 7703 } 7704 case NEON::BI__builtin_neon_vmaxnmv_f16: { 7705 Int = Intrinsic::aarch64_neon_fmaxnmv; 7706 Ty = HalfTy; 7707 VTy = llvm::VectorType::get(HalfTy, 4); 7708 llvm::Type *Tys[2] = { Ty, VTy }; 7709 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7710 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxnmv"); 7711 return Builder.CreateTrunc(Ops[0], HalfTy); 7712 } 7713 case NEON::BI__builtin_neon_vmaxnmvq_f16: { 7714 Int = Intrinsic::aarch64_neon_fmaxnmv; 7715 Ty = HalfTy; 7716 VTy = llvm::VectorType::get(HalfTy, 8); 7717 llvm::Type *Tys[2] = { Ty, VTy }; 7718 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7719 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxnmv"); 7720 return Builder.CreateTrunc(Ops[0], HalfTy); 7721 } 7722 case NEON::BI__builtin_neon_vminnmv_f16: { 7723 Int = Intrinsic::aarch64_neon_fminnmv; 7724 Ty = HalfTy; 7725 VTy = llvm::VectorType::get(HalfTy, 4); 7726 llvm::Type *Tys[2] = { Ty, VTy }; 7727 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7728 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminnmv"); 7729 return Builder.CreateTrunc(Ops[0], HalfTy); 7730 } 7731 case NEON::BI__builtin_neon_vminnmvq_f16: { 7732 Int = Intrinsic::aarch64_neon_fminnmv; 7733 Ty = HalfTy; 7734 VTy = llvm::VectorType::get(HalfTy, 8); 7735 llvm::Type *Tys[2] = { Ty, VTy }; 7736 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7737 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminnmv"); 7738 return Builder.CreateTrunc(Ops[0], HalfTy); 7739 } 7740 case NEON::BI__builtin_neon_vmul_n_f64: { 7741 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 7742 Value *RHS = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), DoubleTy); 7743 return Builder.CreateFMul(Ops[0], RHS); 7744 } 7745 case NEON::BI__builtin_neon_vaddlv_u8: { 7746 Int = Intrinsic::aarch64_neon_uaddlv; 7747 Ty = Int32Ty; 7748 VTy = llvm::VectorType::get(Int8Ty, 8); 7749 llvm::Type *Tys[2] = { Ty, VTy }; 7750 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7751 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7752 return Builder.CreateTrunc(Ops[0], Int16Ty); 7753 } 7754 case NEON::BI__builtin_neon_vaddlv_u16: { 7755 Int = Intrinsic::aarch64_neon_uaddlv; 7756 Ty = Int32Ty; 7757 VTy = llvm::VectorType::get(Int16Ty, 4); 7758 llvm::Type *Tys[2] = { Ty, VTy }; 7759 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7760 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7761 } 7762 case NEON::BI__builtin_neon_vaddlvq_u8: { 7763 Int = Intrinsic::aarch64_neon_uaddlv; 7764 Ty = Int32Ty; 7765 VTy = llvm::VectorType::get(Int8Ty, 16); 7766 llvm::Type *Tys[2] = { Ty, VTy }; 7767 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7768 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7769 return Builder.CreateTrunc(Ops[0], Int16Ty); 7770 } 7771 case NEON::BI__builtin_neon_vaddlvq_u16: { 7772 Int = Intrinsic::aarch64_neon_uaddlv; 7773 Ty = Int32Ty; 7774 VTy = llvm::VectorType::get(Int16Ty, 8); 7775 llvm::Type *Tys[2] = { Ty, VTy }; 7776 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7777 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7778 } 7779 case NEON::BI__builtin_neon_vaddlv_s8: { 7780 Int = Intrinsic::aarch64_neon_saddlv; 7781 Ty = Int32Ty; 7782 VTy = llvm::VectorType::get(Int8Ty, 8); 7783 llvm::Type *Tys[2] = { Ty, VTy }; 7784 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7785 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7786 return Builder.CreateTrunc(Ops[0], Int16Ty); 7787 } 7788 case NEON::BI__builtin_neon_vaddlv_s16: { 7789 Int = Intrinsic::aarch64_neon_saddlv; 7790 Ty = Int32Ty; 7791 VTy = llvm::VectorType::get(Int16Ty, 4); 7792 llvm::Type *Tys[2] = { Ty, VTy }; 7793 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7794 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7795 } 7796 case NEON::BI__builtin_neon_vaddlvq_s8: { 7797 Int = Intrinsic::aarch64_neon_saddlv; 7798 Ty = Int32Ty; 7799 VTy = llvm::VectorType::get(Int8Ty, 16); 7800 llvm::Type *Tys[2] = { Ty, VTy }; 7801 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7802 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7803 return Builder.CreateTrunc(Ops[0], Int16Ty); 7804 } 7805 case NEON::BI__builtin_neon_vaddlvq_s16: { 7806 Int = Intrinsic::aarch64_neon_saddlv; 7807 Ty = Int32Ty; 7808 VTy = llvm::VectorType::get(Int16Ty, 8); 7809 llvm::Type *Tys[2] = { Ty, VTy }; 7810 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7811 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 7812 } 7813 case NEON::BI__builtin_neon_vsri_n_v: 7814 case NEON::BI__builtin_neon_vsriq_n_v: { 7815 Int = Intrinsic::aarch64_neon_vsri; 7816 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 7817 return EmitNeonCall(Intrin, Ops, "vsri_n"); 7818 } 7819 case NEON::BI__builtin_neon_vsli_n_v: 7820 case NEON::BI__builtin_neon_vsliq_n_v: { 7821 Int = Intrinsic::aarch64_neon_vsli; 7822 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 7823 return EmitNeonCall(Intrin, Ops, "vsli_n"); 7824 } 7825 case NEON::BI__builtin_neon_vsra_n_v: 7826 case NEON::BI__builtin_neon_vsraq_n_v: 7827 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7828 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 7829 return Builder.CreateAdd(Ops[0], Ops[1]); 7830 case NEON::BI__builtin_neon_vrsra_n_v: 7831 case NEON::BI__builtin_neon_vrsraq_n_v: { 7832 Int = usgn ? Intrinsic::aarch64_neon_urshl : Intrinsic::aarch64_neon_srshl; 7833 SmallVector<llvm::Value*,2> TmpOps; 7834 TmpOps.push_back(Ops[1]); 7835 TmpOps.push_back(Ops[2]); 7836 Function* F = CGM.getIntrinsic(Int, Ty); 7837 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vrshr_n", 1, true); 7838 Ops[0] = Builder.CreateBitCast(Ops[0], VTy); 7839 return Builder.CreateAdd(Ops[0], tmp); 7840 } 7841 // FIXME: Sharing loads & stores with 32-bit is complicated by the absence 7842 // of an Align parameter here. 7843 case NEON::BI__builtin_neon_vld1_x2_v: 7844 case NEON::BI__builtin_neon_vld1q_x2_v: 7845 case NEON::BI__builtin_neon_vld1_x3_v: 7846 case NEON::BI__builtin_neon_vld1q_x3_v: 7847 case NEON::BI__builtin_neon_vld1_x4_v: 7848 case NEON::BI__builtin_neon_vld1q_x4_v: { 7849 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 7850 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7851 llvm::Type *Tys[2] = { VTy, PTy }; 7852 unsigned Int; 7853 switch (BuiltinID) { 7854 case NEON::BI__builtin_neon_vld1_x2_v: 7855 case NEON::BI__builtin_neon_vld1q_x2_v: 7856 Int = Intrinsic::aarch64_neon_ld1x2; 7857 break; 7858 case NEON::BI__builtin_neon_vld1_x3_v: 7859 case NEON::BI__builtin_neon_vld1q_x3_v: 7860 Int = Intrinsic::aarch64_neon_ld1x3; 7861 break; 7862 case NEON::BI__builtin_neon_vld1_x4_v: 7863 case NEON::BI__builtin_neon_vld1q_x4_v: 7864 Int = Intrinsic::aarch64_neon_ld1x4; 7865 break; 7866 } 7867 Function *F = CGM.getIntrinsic(Int, Tys); 7868 Ops[1] = Builder.CreateCall(F, Ops[1], "vld1xN"); 7869 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 7870 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7871 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7872 } 7873 case NEON::BI__builtin_neon_vst1_x2_v: 7874 case NEON::BI__builtin_neon_vst1q_x2_v: 7875 case NEON::BI__builtin_neon_vst1_x3_v: 7876 case NEON::BI__builtin_neon_vst1q_x3_v: 7877 case NEON::BI__builtin_neon_vst1_x4_v: 7878 case NEON::BI__builtin_neon_vst1q_x4_v: { 7879 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 7880 llvm::Type *Tys[2] = { VTy, PTy }; 7881 unsigned Int; 7882 switch (BuiltinID) { 7883 case NEON::BI__builtin_neon_vst1_x2_v: 7884 case NEON::BI__builtin_neon_vst1q_x2_v: 7885 Int = Intrinsic::aarch64_neon_st1x2; 7886 break; 7887 case NEON::BI__builtin_neon_vst1_x3_v: 7888 case NEON::BI__builtin_neon_vst1q_x3_v: 7889 Int = Intrinsic::aarch64_neon_st1x3; 7890 break; 7891 case NEON::BI__builtin_neon_vst1_x4_v: 7892 case NEON::BI__builtin_neon_vst1q_x4_v: 7893 Int = Intrinsic::aarch64_neon_st1x4; 7894 break; 7895 } 7896 std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end()); 7897 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 7898 } 7899 case NEON::BI__builtin_neon_vld1_v: 7900 case NEON::BI__builtin_neon_vld1q_v: { 7901 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 7902 auto Alignment = CharUnits::fromQuantity( 7903 BuiltinID == NEON::BI__builtin_neon_vld1_v ? 8 : 16); 7904 return Builder.CreateAlignedLoad(VTy, Ops[0], Alignment); 7905 } 7906 case NEON::BI__builtin_neon_vst1_v: 7907 case NEON::BI__builtin_neon_vst1q_v: 7908 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 7909 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 7910 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7911 case NEON::BI__builtin_neon_vld1_lane_v: 7912 case NEON::BI__builtin_neon_vld1q_lane_v: { 7913 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7914 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 7915 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7916 auto Alignment = CharUnits::fromQuantity( 7917 BuiltinID == NEON::BI__builtin_neon_vld1_lane_v ? 8 : 16); 7918 Ops[0] = 7919 Builder.CreateAlignedLoad(VTy->getElementType(), Ops[0], Alignment); 7920 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vld1_lane"); 7921 } 7922 case NEON::BI__builtin_neon_vld1_dup_v: 7923 case NEON::BI__builtin_neon_vld1q_dup_v: { 7924 Value *V = UndefValue::get(Ty); 7925 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 7926 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7927 auto Alignment = CharUnits::fromQuantity( 7928 BuiltinID == NEON::BI__builtin_neon_vld1_dup_v ? 8 : 16); 7929 Ops[0] = 7930 Builder.CreateAlignedLoad(VTy->getElementType(), Ops[0], Alignment); 7931 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 7932 Ops[0] = Builder.CreateInsertElement(V, Ops[0], CI); 7933 return EmitNeonSplat(Ops[0], CI); 7934 } 7935 case NEON::BI__builtin_neon_vst1_lane_v: 7936 case NEON::BI__builtin_neon_vst1q_lane_v: 7937 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7938 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 7939 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 7940 return Builder.CreateDefaultAlignedStore(Ops[1], 7941 Builder.CreateBitCast(Ops[0], Ty)); 7942 case NEON::BI__builtin_neon_vld2_v: 7943 case NEON::BI__builtin_neon_vld2q_v: { 7944 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 7945 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7946 llvm::Type *Tys[2] = { VTy, PTy }; 7947 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2, Tys); 7948 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 7949 Ops[0] = Builder.CreateBitCast(Ops[0], 7950 llvm::PointerType::getUnqual(Ops[1]->getType())); 7951 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7952 } 7953 case NEON::BI__builtin_neon_vld3_v: 7954 case NEON::BI__builtin_neon_vld3q_v: { 7955 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 7956 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7957 llvm::Type *Tys[2] = { VTy, PTy }; 7958 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3, Tys); 7959 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 7960 Ops[0] = Builder.CreateBitCast(Ops[0], 7961 llvm::PointerType::getUnqual(Ops[1]->getType())); 7962 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7963 } 7964 case NEON::BI__builtin_neon_vld4_v: 7965 case NEON::BI__builtin_neon_vld4q_v: { 7966 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 7967 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7968 llvm::Type *Tys[2] = { VTy, PTy }; 7969 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4, Tys); 7970 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 7971 Ops[0] = Builder.CreateBitCast(Ops[0], 7972 llvm::PointerType::getUnqual(Ops[1]->getType())); 7973 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7974 } 7975 case NEON::BI__builtin_neon_vld2_dup_v: 7976 case NEON::BI__builtin_neon_vld2q_dup_v: { 7977 llvm::Type *PTy = 7978 llvm::PointerType::getUnqual(VTy->getElementType()); 7979 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7980 llvm::Type *Tys[2] = { VTy, PTy }; 7981 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2r, Tys); 7982 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 7983 Ops[0] = Builder.CreateBitCast(Ops[0], 7984 llvm::PointerType::getUnqual(Ops[1]->getType())); 7985 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7986 } 7987 case NEON::BI__builtin_neon_vld3_dup_v: 7988 case NEON::BI__builtin_neon_vld3q_dup_v: { 7989 llvm::Type *PTy = 7990 llvm::PointerType::getUnqual(VTy->getElementType()); 7991 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 7992 llvm::Type *Tys[2] = { VTy, PTy }; 7993 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3r, Tys); 7994 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 7995 Ops[0] = Builder.CreateBitCast(Ops[0], 7996 llvm::PointerType::getUnqual(Ops[1]->getType())); 7997 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7998 } 7999 case NEON::BI__builtin_neon_vld4_dup_v: 8000 case NEON::BI__builtin_neon_vld4q_dup_v: { 8001 llvm::Type *PTy = 8002 llvm::PointerType::getUnqual(VTy->getElementType()); 8003 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 8004 llvm::Type *Tys[2] = { VTy, PTy }; 8005 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4r, Tys); 8006 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 8007 Ops[0] = Builder.CreateBitCast(Ops[0], 8008 llvm::PointerType::getUnqual(Ops[1]->getType())); 8009 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8010 } 8011 case NEON::BI__builtin_neon_vld2_lane_v: 8012 case NEON::BI__builtin_neon_vld2q_lane_v: { 8013 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 8014 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2lane, Tys); 8015 Ops.push_back(Ops[1]); 8016 Ops.erase(Ops.begin()+1); 8017 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8018 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8019 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 8020 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld2_lane"); 8021 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 8022 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 8023 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8024 } 8025 case NEON::BI__builtin_neon_vld3_lane_v: 8026 case NEON::BI__builtin_neon_vld3q_lane_v: { 8027 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 8028 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3lane, Tys); 8029 Ops.push_back(Ops[1]); 8030 Ops.erase(Ops.begin()+1); 8031 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8032 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8033 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 8034 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 8035 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld3_lane"); 8036 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 8037 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 8038 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8039 } 8040 case NEON::BI__builtin_neon_vld4_lane_v: 8041 case NEON::BI__builtin_neon_vld4q_lane_v: { 8042 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 8043 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4lane, Tys); 8044 Ops.push_back(Ops[1]); 8045 Ops.erase(Ops.begin()+1); 8046 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8047 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8048 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 8049 Ops[4] = Builder.CreateBitCast(Ops[4], Ty); 8050 Ops[5] = Builder.CreateZExt(Ops[5], Int64Ty); 8051 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld4_lane"); 8052 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 8053 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 8054 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8055 } 8056 case NEON::BI__builtin_neon_vst2_v: 8057 case NEON::BI__builtin_neon_vst2q_v: { 8058 Ops.push_back(Ops[0]); 8059 Ops.erase(Ops.begin()); 8060 llvm::Type *Tys[2] = { VTy, Ops[2]->getType() }; 8061 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2, Tys), 8062 Ops, ""); 8063 } 8064 case NEON::BI__builtin_neon_vst2_lane_v: 8065 case NEON::BI__builtin_neon_vst2q_lane_v: { 8066 Ops.push_back(Ops[0]); 8067 Ops.erase(Ops.begin()); 8068 Ops[2] = Builder.CreateZExt(Ops[2], Int64Ty); 8069 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 8070 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2lane, Tys), 8071 Ops, ""); 8072 } 8073 case NEON::BI__builtin_neon_vst3_v: 8074 case NEON::BI__builtin_neon_vst3q_v: { 8075 Ops.push_back(Ops[0]); 8076 Ops.erase(Ops.begin()); 8077 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 8078 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3, Tys), 8079 Ops, ""); 8080 } 8081 case NEON::BI__builtin_neon_vst3_lane_v: 8082 case NEON::BI__builtin_neon_vst3q_lane_v: { 8083 Ops.push_back(Ops[0]); 8084 Ops.erase(Ops.begin()); 8085 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 8086 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 8087 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3lane, Tys), 8088 Ops, ""); 8089 } 8090 case NEON::BI__builtin_neon_vst4_v: 8091 case NEON::BI__builtin_neon_vst4q_v: { 8092 Ops.push_back(Ops[0]); 8093 Ops.erase(Ops.begin()); 8094 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 8095 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4, Tys), 8096 Ops, ""); 8097 } 8098 case NEON::BI__builtin_neon_vst4_lane_v: 8099 case NEON::BI__builtin_neon_vst4q_lane_v: { 8100 Ops.push_back(Ops[0]); 8101 Ops.erase(Ops.begin()); 8102 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 8103 llvm::Type *Tys[2] = { VTy, Ops[5]->getType() }; 8104 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4lane, Tys), 8105 Ops, ""); 8106 } 8107 case NEON::BI__builtin_neon_vtrn_v: 8108 case NEON::BI__builtin_neon_vtrnq_v: { 8109 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 8110 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8111 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8112 Value *SV = nullptr; 8113 8114 for (unsigned vi = 0; vi != 2; ++vi) { 8115 SmallVector<uint32_t, 16> Indices; 8116 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 8117 Indices.push_back(i+vi); 8118 Indices.push_back(i+e+vi); 8119 } 8120 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 8121 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 8122 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 8123 } 8124 return SV; 8125 } 8126 case NEON::BI__builtin_neon_vuzp_v: 8127 case NEON::BI__builtin_neon_vuzpq_v: { 8128 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 8129 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8130 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8131 Value *SV = nullptr; 8132 8133 for (unsigned vi = 0; vi != 2; ++vi) { 8134 SmallVector<uint32_t, 16> Indices; 8135 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 8136 Indices.push_back(2*i+vi); 8137 8138 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 8139 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 8140 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 8141 } 8142 return SV; 8143 } 8144 case NEON::BI__builtin_neon_vzip_v: 8145 case NEON::BI__builtin_neon_vzipq_v: { 8146 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 8147 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8148 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8149 Value *SV = nullptr; 8150 8151 for (unsigned vi = 0; vi != 2; ++vi) { 8152 SmallVector<uint32_t, 16> Indices; 8153 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 8154 Indices.push_back((i + vi*e) >> 1); 8155 Indices.push_back(((i + vi*e) >> 1)+e); 8156 } 8157 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 8158 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 8159 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 8160 } 8161 return SV; 8162 } 8163 case NEON::BI__builtin_neon_vqtbl1q_v: { 8164 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl1, Ty), 8165 Ops, "vtbl1"); 8166 } 8167 case NEON::BI__builtin_neon_vqtbl2q_v: { 8168 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl2, Ty), 8169 Ops, "vtbl2"); 8170 } 8171 case NEON::BI__builtin_neon_vqtbl3q_v: { 8172 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl3, Ty), 8173 Ops, "vtbl3"); 8174 } 8175 case NEON::BI__builtin_neon_vqtbl4q_v: { 8176 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl4, Ty), 8177 Ops, "vtbl4"); 8178 } 8179 case NEON::BI__builtin_neon_vqtbx1q_v: { 8180 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx1, Ty), 8181 Ops, "vtbx1"); 8182 } 8183 case NEON::BI__builtin_neon_vqtbx2q_v: { 8184 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx2, Ty), 8185 Ops, "vtbx2"); 8186 } 8187 case NEON::BI__builtin_neon_vqtbx3q_v: { 8188 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx3, Ty), 8189 Ops, "vtbx3"); 8190 } 8191 case NEON::BI__builtin_neon_vqtbx4q_v: { 8192 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx4, Ty), 8193 Ops, "vtbx4"); 8194 } 8195 case NEON::BI__builtin_neon_vsqadd_v: 8196 case NEON::BI__builtin_neon_vsqaddq_v: { 8197 Int = Intrinsic::aarch64_neon_usqadd; 8198 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqadd"); 8199 } 8200 case NEON::BI__builtin_neon_vuqadd_v: 8201 case NEON::BI__builtin_neon_vuqaddq_v: { 8202 Int = Intrinsic::aarch64_neon_suqadd; 8203 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vuqadd"); 8204 } 8205 } 8206 } 8207 8208 llvm::Value *CodeGenFunction:: 8209 BuildVector(ArrayRef<llvm::Value*> Ops) { 8210 assert((Ops.size() & (Ops.size() - 1)) == 0 && 8211 "Not a power-of-two sized vector!"); 8212 bool AllConstants = true; 8213 for (unsigned i = 0, e = Ops.size(); i != e && AllConstants; ++i) 8214 AllConstants &= isa<Constant>(Ops[i]); 8215 8216 // If this is a constant vector, create a ConstantVector. 8217 if (AllConstants) { 8218 SmallVector<llvm::Constant*, 16> CstOps; 8219 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 8220 CstOps.push_back(cast<Constant>(Ops[i])); 8221 return llvm::ConstantVector::get(CstOps); 8222 } 8223 8224 // Otherwise, insertelement the values to build the vector. 8225 Value *Result = 8226 llvm::UndefValue::get(llvm::VectorType::get(Ops[0]->getType(), Ops.size())); 8227 8228 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 8229 Result = Builder.CreateInsertElement(Result, Ops[i], Builder.getInt32(i)); 8230 8231 return Result; 8232 } 8233 8234 // Convert the mask from an integer type to a vector of i1. 8235 static Value *getMaskVecValue(CodeGenFunction &CGF, Value *Mask, 8236 unsigned NumElts) { 8237 8238 llvm::VectorType *MaskTy = llvm::VectorType::get(CGF.Builder.getInt1Ty(), 8239 cast<IntegerType>(Mask->getType())->getBitWidth()); 8240 Value *MaskVec = CGF.Builder.CreateBitCast(Mask, MaskTy); 8241 8242 // If we have less than 8 elements, then the starting mask was an i8 and 8243 // we need to extract down to the right number of elements. 8244 if (NumElts < 8) { 8245 uint32_t Indices[4]; 8246 for (unsigned i = 0; i != NumElts; ++i) 8247 Indices[i] = i; 8248 MaskVec = CGF.Builder.CreateShuffleVector(MaskVec, MaskVec, 8249 makeArrayRef(Indices, NumElts), 8250 "extract"); 8251 } 8252 return MaskVec; 8253 } 8254 8255 static Value *EmitX86MaskedStore(CodeGenFunction &CGF, 8256 SmallVectorImpl<Value *> &Ops, 8257 unsigned Align) { 8258 // Cast the pointer to right type. 8259 Ops[0] = CGF.Builder.CreateBitCast(Ops[0], 8260 llvm::PointerType::getUnqual(Ops[1]->getType())); 8261 8262 // If the mask is all ones just emit a regular store. 8263 if (const auto *C = dyn_cast<Constant>(Ops[2])) 8264 if (C->isAllOnesValue()) 8265 return CGF.Builder.CreateAlignedStore(Ops[1], Ops[0], Align); 8266 8267 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 8268 Ops[1]->getType()->getVectorNumElements()); 8269 8270 return CGF.Builder.CreateMaskedStore(Ops[1], Ops[0], Align, MaskVec); 8271 } 8272 8273 static Value *EmitX86MaskedLoad(CodeGenFunction &CGF, 8274 SmallVectorImpl<Value *> &Ops, unsigned Align) { 8275 // Cast the pointer to right type. 8276 Ops[0] = CGF.Builder.CreateBitCast(Ops[0], 8277 llvm::PointerType::getUnqual(Ops[1]->getType())); 8278 8279 // If the mask is all ones just emit a regular store. 8280 if (const auto *C = dyn_cast<Constant>(Ops[2])) 8281 if (C->isAllOnesValue()) 8282 return CGF.Builder.CreateAlignedLoad(Ops[0], Align); 8283 8284 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 8285 Ops[1]->getType()->getVectorNumElements()); 8286 8287 return CGF.Builder.CreateMaskedLoad(Ops[0], Align, MaskVec, Ops[1]); 8288 } 8289 8290 static Value *EmitX86MaskLogic(CodeGenFunction &CGF, Instruction::BinaryOps Opc, 8291 unsigned NumElts, SmallVectorImpl<Value *> &Ops, 8292 bool InvertLHS = false) { 8293 Value *LHS = getMaskVecValue(CGF, Ops[0], NumElts); 8294 Value *RHS = getMaskVecValue(CGF, Ops[1], NumElts); 8295 8296 if (InvertLHS) 8297 LHS = CGF.Builder.CreateNot(LHS); 8298 8299 return CGF.Builder.CreateBitCast(CGF.Builder.CreateBinOp(Opc, LHS, RHS), 8300 CGF.Builder.getIntNTy(std::max(NumElts, 8U))); 8301 } 8302 8303 static Value *EmitX86SubVectorBroadcast(CodeGenFunction &CGF, 8304 SmallVectorImpl<Value *> &Ops, 8305 llvm::Type *DstTy, 8306 unsigned SrcSizeInBits, 8307 unsigned Align) { 8308 // Load the subvector. 8309 Ops[0] = CGF.Builder.CreateAlignedLoad(Ops[0], Align); 8310 8311 // Create broadcast mask. 8312 unsigned NumDstElts = DstTy->getVectorNumElements(); 8313 unsigned NumSrcElts = SrcSizeInBits / DstTy->getScalarSizeInBits(); 8314 8315 SmallVector<uint32_t, 8> Mask; 8316 for (unsigned i = 0; i != NumDstElts; i += NumSrcElts) 8317 for (unsigned j = 0; j != NumSrcElts; ++j) 8318 Mask.push_back(j); 8319 8320 return CGF.Builder.CreateShuffleVector(Ops[0], Ops[0], Mask, "subvecbcst"); 8321 } 8322 8323 static Value *EmitX86Select(CodeGenFunction &CGF, 8324 Value *Mask, Value *Op0, Value *Op1) { 8325 8326 // If the mask is all ones just return first argument. 8327 if (const auto *C = dyn_cast<Constant>(Mask)) 8328 if (C->isAllOnesValue()) 8329 return Op0; 8330 8331 Mask = getMaskVecValue(CGF, Mask, Op0->getType()->getVectorNumElements()); 8332 8333 return CGF.Builder.CreateSelect(Mask, Op0, Op1); 8334 } 8335 8336 static Value *EmitX86MaskedCompareResult(CodeGenFunction &CGF, Value *Cmp, 8337 unsigned NumElts, Value *MaskIn) { 8338 if (MaskIn) { 8339 const auto *C = dyn_cast<Constant>(MaskIn); 8340 if (!C || !C->isAllOnesValue()) 8341 Cmp = CGF.Builder.CreateAnd(Cmp, getMaskVecValue(CGF, MaskIn, NumElts)); 8342 } 8343 8344 if (NumElts < 8) { 8345 uint32_t Indices[8]; 8346 for (unsigned i = 0; i != NumElts; ++i) 8347 Indices[i] = i; 8348 for (unsigned i = NumElts; i != 8; ++i) 8349 Indices[i] = i % NumElts + NumElts; 8350 Cmp = CGF.Builder.CreateShuffleVector( 8351 Cmp, llvm::Constant::getNullValue(Cmp->getType()), Indices); 8352 } 8353 8354 return CGF.Builder.CreateBitCast(Cmp, 8355 IntegerType::get(CGF.getLLVMContext(), 8356 std::max(NumElts, 8U))); 8357 } 8358 8359 static Value *EmitX86MaskedCompare(CodeGenFunction &CGF, unsigned CC, 8360 bool Signed, ArrayRef<Value *> Ops) { 8361 assert((Ops.size() == 2 || Ops.size() == 4) && 8362 "Unexpected number of arguments"); 8363 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 8364 Value *Cmp; 8365 8366 if (CC == 3) { 8367 Cmp = Constant::getNullValue( 8368 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 8369 } else if (CC == 7) { 8370 Cmp = Constant::getAllOnesValue( 8371 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 8372 } else { 8373 ICmpInst::Predicate Pred; 8374 switch (CC) { 8375 default: llvm_unreachable("Unknown condition code"); 8376 case 0: Pred = ICmpInst::ICMP_EQ; break; 8377 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 8378 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 8379 case 4: Pred = ICmpInst::ICMP_NE; break; 8380 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 8381 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 8382 } 8383 Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 8384 } 8385 8386 Value *MaskIn = nullptr; 8387 if (Ops.size() == 4) 8388 MaskIn = Ops[3]; 8389 8390 return EmitX86MaskedCompareResult(CGF, Cmp, NumElts, MaskIn); 8391 } 8392 8393 static Value *EmitX86ConvertToMask(CodeGenFunction &CGF, Value *In) { 8394 Value *Zero = Constant::getNullValue(In->getType()); 8395 return EmitX86MaskedCompare(CGF, 1, true, { In, Zero }); 8396 } 8397 8398 static Value *EmitX86Abs(CodeGenFunction &CGF, ArrayRef<Value *> Ops) { 8399 8400 llvm::Type *Ty = Ops[0]->getType(); 8401 Value *Zero = llvm::Constant::getNullValue(Ty); 8402 Value *Sub = CGF.Builder.CreateSub(Zero, Ops[0]); 8403 Value *Cmp = CGF.Builder.CreateICmp(ICmpInst::ICMP_SGT, Ops[0], Zero); 8404 Value *Res = CGF.Builder.CreateSelect(Cmp, Ops[0], Sub); 8405 if (Ops.size() == 1) 8406 return Res; 8407 return EmitX86Select(CGF, Ops[2], Res, Ops[1]); 8408 } 8409 8410 static Value *EmitX86MinMax(CodeGenFunction &CGF, ICmpInst::Predicate Pred, 8411 ArrayRef<Value *> Ops) { 8412 Value *Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 8413 Value *Res = CGF.Builder.CreateSelect(Cmp, Ops[0], Ops[1]); 8414 8415 if (Ops.size() == 2) 8416 return Res; 8417 8418 assert(Ops.size() == 4); 8419 return EmitX86Select(CGF, Ops[3], Res, Ops[2]); 8420 } 8421 8422 static Value *EmitX86Muldq(CodeGenFunction &CGF, bool IsSigned, 8423 ArrayRef<Value *> Ops) { 8424 llvm::Type *Ty = Ops[0]->getType(); 8425 // Arguments have a vXi32 type so cast to vXi64. 8426 Ty = llvm::VectorType::get(CGF.Int64Ty, 8427 Ty->getPrimitiveSizeInBits() / 64); 8428 Value *LHS = CGF.Builder.CreateBitCast(Ops[0], Ty); 8429 Value *RHS = CGF.Builder.CreateBitCast(Ops[1], Ty); 8430 8431 if (IsSigned) { 8432 // Shift left then arithmetic shift right. 8433 Constant *ShiftAmt = ConstantInt::get(Ty, 32); 8434 LHS = CGF.Builder.CreateShl(LHS, ShiftAmt); 8435 LHS = CGF.Builder.CreateAShr(LHS, ShiftAmt); 8436 RHS = CGF.Builder.CreateShl(RHS, ShiftAmt); 8437 RHS = CGF.Builder.CreateAShr(RHS, ShiftAmt); 8438 } else { 8439 // Clear the upper bits. 8440 Constant *Mask = ConstantInt::get(Ty, 0xffffffff); 8441 LHS = CGF.Builder.CreateAnd(LHS, Mask); 8442 RHS = CGF.Builder.CreateAnd(RHS, Mask); 8443 } 8444 8445 return CGF.Builder.CreateMul(LHS, RHS); 8446 } 8447 8448 static Value *EmitX86SExtMask(CodeGenFunction &CGF, Value *Op, 8449 llvm::Type *DstTy) { 8450 unsigned NumberOfElements = DstTy->getVectorNumElements(); 8451 Value *Mask = getMaskVecValue(CGF, Op, NumberOfElements); 8452 return CGF.Builder.CreateSExt(Mask, DstTy, "vpmovm2"); 8453 } 8454 8455 Value *CodeGenFunction::EmitX86CpuIs(const CallExpr *E) { 8456 const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts(); 8457 StringRef CPUStr = cast<clang::StringLiteral>(CPUExpr)->getString(); 8458 return EmitX86CpuIs(CPUStr); 8459 } 8460 8461 Value *CodeGenFunction::EmitX86CpuIs(StringRef CPUStr) { 8462 8463 llvm::Type *Int32Ty = Builder.getInt32Ty(); 8464 8465 // Matching the struct layout from the compiler-rt/libgcc structure that is 8466 // filled in: 8467 // unsigned int __cpu_vendor; 8468 // unsigned int __cpu_type; 8469 // unsigned int __cpu_subtype; 8470 // unsigned int __cpu_features[1]; 8471 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, Int32Ty, 8472 llvm::ArrayType::get(Int32Ty, 1)); 8473 8474 // Grab the global __cpu_model. 8475 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 8476 8477 // Calculate the index needed to access the correct field based on the 8478 // range. Also adjust the expected value. 8479 unsigned Index; 8480 unsigned Value; 8481 std::tie(Index, Value) = StringSwitch<std::pair<unsigned, unsigned>>(CPUStr) 8482 #define X86_VENDOR(ENUM, STRING) \ 8483 .Case(STRING, {0u, static_cast<unsigned>(llvm::X86::ENUM)}) 8484 #define X86_CPU_TYPE_COMPAT_WITH_ALIAS(ARCHNAME, ENUM, STR, ALIAS) \ 8485 .Cases(STR, ALIAS, {1u, static_cast<unsigned>(llvm::X86::ENUM)}) 8486 #define X86_CPU_TYPE_COMPAT(ARCHNAME, ENUM, STR) \ 8487 .Case(STR, {1u, static_cast<unsigned>(llvm::X86::ENUM)}) 8488 #define X86_CPU_SUBTYPE_COMPAT(ARCHNAME, ENUM, STR) \ 8489 .Case(STR, {2u, static_cast<unsigned>(llvm::X86::ENUM)}) 8490 #include "llvm/Support/X86TargetParser.def" 8491 .Default({0, 0}); 8492 assert(Value != 0 && "Invalid CPUStr passed to CpuIs"); 8493 8494 // Grab the appropriate field from __cpu_model. 8495 llvm::Value *Idxs[] = {ConstantInt::get(Int32Ty, 0), 8496 ConstantInt::get(Int32Ty, Index)}; 8497 llvm::Value *CpuValue = Builder.CreateGEP(STy, CpuModel, Idxs); 8498 CpuValue = Builder.CreateAlignedLoad(CpuValue, CharUnits::fromQuantity(4)); 8499 8500 // Check the value of the field against the requested value. 8501 return Builder.CreateICmpEQ(CpuValue, 8502 llvm::ConstantInt::get(Int32Ty, Value)); 8503 } 8504 8505 Value *CodeGenFunction::EmitX86CpuSupports(const CallExpr *E) { 8506 const Expr *FeatureExpr = E->getArg(0)->IgnoreParenCasts(); 8507 StringRef FeatureStr = cast<StringLiteral>(FeatureExpr)->getString(); 8508 return EmitX86CpuSupports(FeatureStr); 8509 } 8510 8511 Value *CodeGenFunction::EmitX86CpuSupports(ArrayRef<StringRef> FeatureStrs) { 8512 // Processor features and mapping to processor feature value. 8513 8514 uint32_t FeaturesMask = 0; 8515 8516 for (const StringRef &FeatureStr : FeatureStrs) { 8517 unsigned Feature = 8518 StringSwitch<unsigned>(FeatureStr) 8519 #define X86_FEATURE_COMPAT(VAL, ENUM, STR) .Case(STR, VAL) 8520 #include "llvm/Support/X86TargetParser.def" 8521 ; 8522 FeaturesMask |= (1U << Feature); 8523 } 8524 8525 // Matching the struct layout from the compiler-rt/libgcc structure that is 8526 // filled in: 8527 // unsigned int __cpu_vendor; 8528 // unsigned int __cpu_type; 8529 // unsigned int __cpu_subtype; 8530 // unsigned int __cpu_features[1]; 8531 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, Int32Ty, 8532 llvm::ArrayType::get(Int32Ty, 1)); 8533 8534 // Grab the global __cpu_model. 8535 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 8536 8537 // Grab the first (0th) element from the field __cpu_features off of the 8538 // global in the struct STy. 8539 Value *Idxs[] = {ConstantInt::get(Int32Ty, 0), ConstantInt::get(Int32Ty, 3), 8540 ConstantInt::get(Int32Ty, 0)}; 8541 Value *CpuFeatures = Builder.CreateGEP(STy, CpuModel, Idxs); 8542 Value *Features = 8543 Builder.CreateAlignedLoad(CpuFeatures, CharUnits::fromQuantity(4)); 8544 8545 // Check the value of the bit corresponding to the feature requested. 8546 Value *Bitset = Builder.CreateAnd( 8547 Features, llvm::ConstantInt::get(Int32Ty, FeaturesMask)); 8548 return Builder.CreateICmpNE(Bitset, llvm::ConstantInt::get(Int32Ty, 0)); 8549 } 8550 8551 Value *CodeGenFunction::EmitX86CpuInit() { 8552 llvm::FunctionType *FTy = llvm::FunctionType::get(VoidTy, 8553 /*Variadic*/ false); 8554 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, "__cpu_indicator_init"); 8555 return Builder.CreateCall(Func); 8556 } 8557 8558 Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, 8559 const CallExpr *E) { 8560 if (BuiltinID == X86::BI__builtin_cpu_is) 8561 return EmitX86CpuIs(E); 8562 if (BuiltinID == X86::BI__builtin_cpu_supports) 8563 return EmitX86CpuSupports(E); 8564 if (BuiltinID == X86::BI__builtin_cpu_init) 8565 return EmitX86CpuInit(); 8566 8567 SmallVector<Value*, 4> Ops; 8568 8569 // Find out if any arguments are required to be integer constant expressions. 8570 unsigned ICEArguments = 0; 8571 ASTContext::GetBuiltinTypeError Error; 8572 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 8573 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 8574 8575 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) { 8576 // If this is a normal argument, just emit it as a scalar. 8577 if ((ICEArguments & (1 << i)) == 0) { 8578 Ops.push_back(EmitScalarExpr(E->getArg(i))); 8579 continue; 8580 } 8581 8582 // If this is required to be a constant, constant fold it so that we know 8583 // that the generated intrinsic gets a ConstantInt. 8584 llvm::APSInt Result; 8585 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 8586 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 8587 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 8588 } 8589 8590 // These exist so that the builtin that takes an immediate can be bounds 8591 // checked by clang to avoid passing bad immediates to the backend. Since 8592 // AVX has a larger immediate than SSE we would need separate builtins to 8593 // do the different bounds checking. Rather than create a clang specific 8594 // SSE only builtin, this implements eight separate builtins to match gcc 8595 // implementation. 8596 auto getCmpIntrinsicCall = [this, &Ops](Intrinsic::ID ID, unsigned Imm) { 8597 Ops.push_back(llvm::ConstantInt::get(Int8Ty, Imm)); 8598 llvm::Function *F = CGM.getIntrinsic(ID); 8599 return Builder.CreateCall(F, Ops); 8600 }; 8601 8602 // For the vector forms of FP comparisons, translate the builtins directly to 8603 // IR. 8604 // TODO: The builtins could be removed if the SSE header files used vector 8605 // extension comparisons directly (vector ordered/unordered may need 8606 // additional support via __builtin_isnan()). 8607 auto getVectorFCmpIR = [this, &Ops](CmpInst::Predicate Pred) { 8608 Value *Cmp = Builder.CreateFCmp(Pred, Ops[0], Ops[1]); 8609 llvm::VectorType *FPVecTy = cast<llvm::VectorType>(Ops[0]->getType()); 8610 llvm::VectorType *IntVecTy = llvm::VectorType::getInteger(FPVecTy); 8611 Value *Sext = Builder.CreateSExt(Cmp, IntVecTy); 8612 return Builder.CreateBitCast(Sext, FPVecTy); 8613 }; 8614 8615 switch (BuiltinID) { 8616 default: return nullptr; 8617 case X86::BI_mm_prefetch: { 8618 Value *Address = Ops[0]; 8619 ConstantInt *C = cast<ConstantInt>(Ops[1]); 8620 Value *RW = ConstantInt::get(Int32Ty, (C->getZExtValue() >> 2) & 0x1); 8621 Value *Locality = ConstantInt::get(Int32Ty, C->getZExtValue() & 0x3); 8622 Value *Data = ConstantInt::get(Int32Ty, 1); 8623 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 8624 return Builder.CreateCall(F, {Address, RW, Locality, Data}); 8625 } 8626 case X86::BI_mm_clflush: { 8627 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_clflush), 8628 Ops[0]); 8629 } 8630 case X86::BI_mm_lfence: { 8631 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_lfence)); 8632 } 8633 case X86::BI_mm_mfence: { 8634 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_mfence)); 8635 } 8636 case X86::BI_mm_sfence: { 8637 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_sfence)); 8638 } 8639 case X86::BI_mm_pause: { 8640 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_pause)); 8641 } 8642 case X86::BI__rdtsc: { 8643 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_rdtsc)); 8644 } 8645 case X86::BI__builtin_ia32_undef128: 8646 case X86::BI__builtin_ia32_undef256: 8647 case X86::BI__builtin_ia32_undef512: 8648 // The x86 definition of "undef" is not the same as the LLVM definition 8649 // (PR32176). We leave optimizing away an unnecessary zero constant to the 8650 // IR optimizer and backend. 8651 // TODO: If we had a "freeze" IR instruction to generate a fixed undef 8652 // value, we should use that here instead of a zero. 8653 return llvm::Constant::getNullValue(ConvertType(E->getType())); 8654 case X86::BI__builtin_ia32_vec_init_v8qi: 8655 case X86::BI__builtin_ia32_vec_init_v4hi: 8656 case X86::BI__builtin_ia32_vec_init_v2si: 8657 return Builder.CreateBitCast(BuildVector(Ops), 8658 llvm::Type::getX86_MMXTy(getLLVMContext())); 8659 case X86::BI__builtin_ia32_vec_ext_v2si: 8660 return Builder.CreateExtractElement(Ops[0], 8661 llvm::ConstantInt::get(Ops[1]->getType(), 0)); 8662 case X86::BI_mm_setcsr: 8663 case X86::BI__builtin_ia32_ldmxcsr: { 8664 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 8665 Builder.CreateStore(Ops[0], Tmp); 8666 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_ldmxcsr), 8667 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 8668 } 8669 case X86::BI_mm_getcsr: 8670 case X86::BI__builtin_ia32_stmxcsr: { 8671 Address Tmp = CreateMemTemp(E->getType()); 8672 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_stmxcsr), 8673 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 8674 return Builder.CreateLoad(Tmp, "stmxcsr"); 8675 } 8676 case X86::BI__builtin_ia32_xsave: 8677 case X86::BI__builtin_ia32_xsave64: 8678 case X86::BI__builtin_ia32_xrstor: 8679 case X86::BI__builtin_ia32_xrstor64: 8680 case X86::BI__builtin_ia32_xsaveopt: 8681 case X86::BI__builtin_ia32_xsaveopt64: 8682 case X86::BI__builtin_ia32_xrstors: 8683 case X86::BI__builtin_ia32_xrstors64: 8684 case X86::BI__builtin_ia32_xsavec: 8685 case X86::BI__builtin_ia32_xsavec64: 8686 case X86::BI__builtin_ia32_xsaves: 8687 case X86::BI__builtin_ia32_xsaves64: { 8688 Intrinsic::ID ID; 8689 #define INTRINSIC_X86_XSAVE_ID(NAME) \ 8690 case X86::BI__builtin_ia32_##NAME: \ 8691 ID = Intrinsic::x86_##NAME; \ 8692 break 8693 switch (BuiltinID) { 8694 default: llvm_unreachable("Unsupported intrinsic!"); 8695 INTRINSIC_X86_XSAVE_ID(xsave); 8696 INTRINSIC_X86_XSAVE_ID(xsave64); 8697 INTRINSIC_X86_XSAVE_ID(xrstor); 8698 INTRINSIC_X86_XSAVE_ID(xrstor64); 8699 INTRINSIC_X86_XSAVE_ID(xsaveopt); 8700 INTRINSIC_X86_XSAVE_ID(xsaveopt64); 8701 INTRINSIC_X86_XSAVE_ID(xrstors); 8702 INTRINSIC_X86_XSAVE_ID(xrstors64); 8703 INTRINSIC_X86_XSAVE_ID(xsavec); 8704 INTRINSIC_X86_XSAVE_ID(xsavec64); 8705 INTRINSIC_X86_XSAVE_ID(xsaves); 8706 INTRINSIC_X86_XSAVE_ID(xsaves64); 8707 } 8708 #undef INTRINSIC_X86_XSAVE_ID 8709 Value *Mhi = Builder.CreateTrunc( 8710 Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, 32)), Int32Ty); 8711 Value *Mlo = Builder.CreateTrunc(Ops[1], Int32Ty); 8712 Ops[1] = Mhi; 8713 Ops.push_back(Mlo); 8714 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 8715 } 8716 case X86::BI__builtin_ia32_storedqudi128_mask: 8717 case X86::BI__builtin_ia32_storedqusi128_mask: 8718 case X86::BI__builtin_ia32_storedquhi128_mask: 8719 case X86::BI__builtin_ia32_storedquqi128_mask: 8720 case X86::BI__builtin_ia32_storeupd128_mask: 8721 case X86::BI__builtin_ia32_storeups128_mask: 8722 case X86::BI__builtin_ia32_storedqudi256_mask: 8723 case X86::BI__builtin_ia32_storedqusi256_mask: 8724 case X86::BI__builtin_ia32_storedquhi256_mask: 8725 case X86::BI__builtin_ia32_storedquqi256_mask: 8726 case X86::BI__builtin_ia32_storeupd256_mask: 8727 case X86::BI__builtin_ia32_storeups256_mask: 8728 case X86::BI__builtin_ia32_storedqudi512_mask: 8729 case X86::BI__builtin_ia32_storedqusi512_mask: 8730 case X86::BI__builtin_ia32_storedquhi512_mask: 8731 case X86::BI__builtin_ia32_storedquqi512_mask: 8732 case X86::BI__builtin_ia32_storeupd512_mask: 8733 case X86::BI__builtin_ia32_storeups512_mask: 8734 return EmitX86MaskedStore(*this, Ops, 1); 8735 8736 case X86::BI__builtin_ia32_storess128_mask: 8737 case X86::BI__builtin_ia32_storesd128_mask: { 8738 return EmitX86MaskedStore(*this, Ops, 16); 8739 } 8740 case X86::BI__builtin_ia32_vpopcntb_128: 8741 case X86::BI__builtin_ia32_vpopcntd_128: 8742 case X86::BI__builtin_ia32_vpopcntq_128: 8743 case X86::BI__builtin_ia32_vpopcntw_128: 8744 case X86::BI__builtin_ia32_vpopcntb_256: 8745 case X86::BI__builtin_ia32_vpopcntd_256: 8746 case X86::BI__builtin_ia32_vpopcntq_256: 8747 case X86::BI__builtin_ia32_vpopcntw_256: 8748 case X86::BI__builtin_ia32_vpopcntb_512: 8749 case X86::BI__builtin_ia32_vpopcntd_512: 8750 case X86::BI__builtin_ia32_vpopcntq_512: 8751 case X86::BI__builtin_ia32_vpopcntw_512: { 8752 llvm::Type *ResultType = ConvertType(E->getType()); 8753 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 8754 return Builder.CreateCall(F, Ops); 8755 } 8756 case X86::BI__builtin_ia32_cvtmask2b128: 8757 case X86::BI__builtin_ia32_cvtmask2b256: 8758 case X86::BI__builtin_ia32_cvtmask2b512: 8759 case X86::BI__builtin_ia32_cvtmask2w128: 8760 case X86::BI__builtin_ia32_cvtmask2w256: 8761 case X86::BI__builtin_ia32_cvtmask2w512: 8762 case X86::BI__builtin_ia32_cvtmask2d128: 8763 case X86::BI__builtin_ia32_cvtmask2d256: 8764 case X86::BI__builtin_ia32_cvtmask2d512: 8765 case X86::BI__builtin_ia32_cvtmask2q128: 8766 case X86::BI__builtin_ia32_cvtmask2q256: 8767 case X86::BI__builtin_ia32_cvtmask2q512: 8768 return EmitX86SExtMask(*this, Ops[0], ConvertType(E->getType())); 8769 8770 case X86::BI__builtin_ia32_cvtb2mask128: 8771 case X86::BI__builtin_ia32_cvtb2mask256: 8772 case X86::BI__builtin_ia32_cvtb2mask512: 8773 case X86::BI__builtin_ia32_cvtw2mask128: 8774 case X86::BI__builtin_ia32_cvtw2mask256: 8775 case X86::BI__builtin_ia32_cvtw2mask512: 8776 case X86::BI__builtin_ia32_cvtd2mask128: 8777 case X86::BI__builtin_ia32_cvtd2mask256: 8778 case X86::BI__builtin_ia32_cvtd2mask512: 8779 case X86::BI__builtin_ia32_cvtq2mask128: 8780 case X86::BI__builtin_ia32_cvtq2mask256: 8781 case X86::BI__builtin_ia32_cvtq2mask512: 8782 return EmitX86ConvertToMask(*this, Ops[0]); 8783 8784 case X86::BI__builtin_ia32_movdqa32store128_mask: 8785 case X86::BI__builtin_ia32_movdqa64store128_mask: 8786 case X86::BI__builtin_ia32_storeaps128_mask: 8787 case X86::BI__builtin_ia32_storeapd128_mask: 8788 case X86::BI__builtin_ia32_movdqa32store256_mask: 8789 case X86::BI__builtin_ia32_movdqa64store256_mask: 8790 case X86::BI__builtin_ia32_storeaps256_mask: 8791 case X86::BI__builtin_ia32_storeapd256_mask: 8792 case X86::BI__builtin_ia32_movdqa32store512_mask: 8793 case X86::BI__builtin_ia32_movdqa64store512_mask: 8794 case X86::BI__builtin_ia32_storeaps512_mask: 8795 case X86::BI__builtin_ia32_storeapd512_mask: { 8796 unsigned Align = 8797 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 8798 return EmitX86MaskedStore(*this, Ops, Align); 8799 } 8800 case X86::BI__builtin_ia32_loadups128_mask: 8801 case X86::BI__builtin_ia32_loadups256_mask: 8802 case X86::BI__builtin_ia32_loadups512_mask: 8803 case X86::BI__builtin_ia32_loadupd128_mask: 8804 case X86::BI__builtin_ia32_loadupd256_mask: 8805 case X86::BI__builtin_ia32_loadupd512_mask: 8806 case X86::BI__builtin_ia32_loaddquqi128_mask: 8807 case X86::BI__builtin_ia32_loaddquqi256_mask: 8808 case X86::BI__builtin_ia32_loaddquqi512_mask: 8809 case X86::BI__builtin_ia32_loaddquhi128_mask: 8810 case X86::BI__builtin_ia32_loaddquhi256_mask: 8811 case X86::BI__builtin_ia32_loaddquhi512_mask: 8812 case X86::BI__builtin_ia32_loaddqusi128_mask: 8813 case X86::BI__builtin_ia32_loaddqusi256_mask: 8814 case X86::BI__builtin_ia32_loaddqusi512_mask: 8815 case X86::BI__builtin_ia32_loaddqudi128_mask: 8816 case X86::BI__builtin_ia32_loaddqudi256_mask: 8817 case X86::BI__builtin_ia32_loaddqudi512_mask: 8818 return EmitX86MaskedLoad(*this, Ops, 1); 8819 8820 case X86::BI__builtin_ia32_loadss128_mask: 8821 case X86::BI__builtin_ia32_loadsd128_mask: 8822 return EmitX86MaskedLoad(*this, Ops, 16); 8823 8824 case X86::BI__builtin_ia32_loadaps128_mask: 8825 case X86::BI__builtin_ia32_loadaps256_mask: 8826 case X86::BI__builtin_ia32_loadaps512_mask: 8827 case X86::BI__builtin_ia32_loadapd128_mask: 8828 case X86::BI__builtin_ia32_loadapd256_mask: 8829 case X86::BI__builtin_ia32_loadapd512_mask: 8830 case X86::BI__builtin_ia32_movdqa32load128_mask: 8831 case X86::BI__builtin_ia32_movdqa32load256_mask: 8832 case X86::BI__builtin_ia32_movdqa32load512_mask: 8833 case X86::BI__builtin_ia32_movdqa64load128_mask: 8834 case X86::BI__builtin_ia32_movdqa64load256_mask: 8835 case X86::BI__builtin_ia32_movdqa64load512_mask: { 8836 unsigned Align = 8837 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 8838 return EmitX86MaskedLoad(*this, Ops, Align); 8839 } 8840 8841 case X86::BI__builtin_ia32_vbroadcastf128_pd256: 8842 case X86::BI__builtin_ia32_vbroadcastf128_ps256: { 8843 llvm::Type *DstTy = ConvertType(E->getType()); 8844 return EmitX86SubVectorBroadcast(*this, Ops, DstTy, 128, 1); 8845 } 8846 8847 case X86::BI__builtin_ia32_storehps: 8848 case X86::BI__builtin_ia32_storelps: { 8849 llvm::Type *PtrTy = llvm::PointerType::getUnqual(Int64Ty); 8850 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 2); 8851 8852 // cast val v2i64 8853 Ops[1] = Builder.CreateBitCast(Ops[1], VecTy, "cast"); 8854 8855 // extract (0, 1) 8856 unsigned Index = BuiltinID == X86::BI__builtin_ia32_storelps ? 0 : 1; 8857 llvm::Value *Idx = llvm::ConstantInt::get(SizeTy, Index); 8858 Ops[1] = Builder.CreateExtractElement(Ops[1], Idx, "extract"); 8859 8860 // cast pointer to i64 & store 8861 Ops[0] = Builder.CreateBitCast(Ops[0], PtrTy); 8862 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8863 } 8864 case X86::BI__builtin_ia32_palignr128: 8865 case X86::BI__builtin_ia32_palignr256: 8866 case X86::BI__builtin_ia32_palignr512_mask: { 8867 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 8868 8869 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 8870 assert(NumElts % 16 == 0); 8871 8872 // If palignr is shifting the pair of vectors more than the size of two 8873 // lanes, emit zero. 8874 if (ShiftVal >= 32) 8875 return llvm::Constant::getNullValue(ConvertType(E->getType())); 8876 8877 // If palignr is shifting the pair of input vectors more than one lane, 8878 // but less than two lanes, convert to shifting in zeroes. 8879 if (ShiftVal > 16) { 8880 ShiftVal -= 16; 8881 Ops[1] = Ops[0]; 8882 Ops[0] = llvm::Constant::getNullValue(Ops[0]->getType()); 8883 } 8884 8885 uint32_t Indices[64]; 8886 // 256-bit palignr operates on 128-bit lanes so we need to handle that 8887 for (unsigned l = 0; l != NumElts; l += 16) { 8888 for (unsigned i = 0; i != 16; ++i) { 8889 unsigned Idx = ShiftVal + i; 8890 if (Idx >= 16) 8891 Idx += NumElts - 16; // End of lane, switch operand. 8892 Indices[l + i] = Idx + l; 8893 } 8894 } 8895 8896 Value *Align = Builder.CreateShuffleVector(Ops[1], Ops[0], 8897 makeArrayRef(Indices, NumElts), 8898 "palignr"); 8899 8900 // If this isn't a masked builtin, just return the align operation. 8901 if (Ops.size() == 3) 8902 return Align; 8903 8904 return EmitX86Select(*this, Ops[4], Align, Ops[3]); 8905 } 8906 8907 case X86::BI__builtin_ia32_vperm2f128_pd256: 8908 case X86::BI__builtin_ia32_vperm2f128_ps256: 8909 case X86::BI__builtin_ia32_vperm2f128_si256: 8910 case X86::BI__builtin_ia32_permti256: { 8911 unsigned Imm = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 8912 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 8913 8914 // This takes a very simple approach since there are two lanes and a 8915 // shuffle can have 2 inputs. So we reserve the first input for the first 8916 // lane and the second input for the second lane. This may result in 8917 // duplicate sources, but this can be dealt with in the backend. 8918 8919 Value *OutOps[2]; 8920 uint32_t Indices[8]; 8921 for (unsigned l = 0; l != 2; ++l) { 8922 // Determine the source for this lane. 8923 if (Imm & (1 << ((l * 4) + 3))) 8924 OutOps[l] = llvm::ConstantAggregateZero::get(Ops[0]->getType()); 8925 else if (Imm & (1 << ((l * 4) + 1))) 8926 OutOps[l] = Ops[1]; 8927 else 8928 OutOps[l] = Ops[0]; 8929 8930 for (unsigned i = 0; i != NumElts/2; ++i) { 8931 // Start with ith element of the source for this lane. 8932 unsigned Idx = (l * NumElts) + i; 8933 // If bit 0 of the immediate half is set, switch to the high half of 8934 // the source. 8935 if (Imm & (1 << (l * 4))) 8936 Idx += NumElts/2; 8937 Indices[(l * (NumElts/2)) + i] = Idx; 8938 } 8939 } 8940 8941 return Builder.CreateShuffleVector(OutOps[0], OutOps[1], 8942 makeArrayRef(Indices, NumElts), 8943 "vperm"); 8944 } 8945 8946 case X86::BI__builtin_ia32_movnti: 8947 case X86::BI__builtin_ia32_movnti64: 8948 case X86::BI__builtin_ia32_movntsd: 8949 case X86::BI__builtin_ia32_movntss: { 8950 llvm::MDNode *Node = llvm::MDNode::get( 8951 getLLVMContext(), llvm::ConstantAsMetadata::get(Builder.getInt32(1))); 8952 8953 Value *Ptr = Ops[0]; 8954 Value *Src = Ops[1]; 8955 8956 // Extract the 0'th element of the source vector. 8957 if (BuiltinID == X86::BI__builtin_ia32_movntsd || 8958 BuiltinID == X86::BI__builtin_ia32_movntss) 8959 Src = Builder.CreateExtractElement(Src, (uint64_t)0, "extract"); 8960 8961 // Convert the type of the pointer to a pointer to the stored type. 8962 Value *BC = Builder.CreateBitCast( 8963 Ptr, llvm::PointerType::getUnqual(Src->getType()), "cast"); 8964 8965 // Unaligned nontemporal store of the scalar value. 8966 StoreInst *SI = Builder.CreateDefaultAlignedStore(Src, BC); 8967 SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); 8968 SI->setAlignment(1); 8969 return SI; 8970 } 8971 8972 case X86::BI__builtin_ia32_selectb_128: 8973 case X86::BI__builtin_ia32_selectb_256: 8974 case X86::BI__builtin_ia32_selectb_512: 8975 case X86::BI__builtin_ia32_selectw_128: 8976 case X86::BI__builtin_ia32_selectw_256: 8977 case X86::BI__builtin_ia32_selectw_512: 8978 case X86::BI__builtin_ia32_selectd_128: 8979 case X86::BI__builtin_ia32_selectd_256: 8980 case X86::BI__builtin_ia32_selectd_512: 8981 case X86::BI__builtin_ia32_selectq_128: 8982 case X86::BI__builtin_ia32_selectq_256: 8983 case X86::BI__builtin_ia32_selectq_512: 8984 case X86::BI__builtin_ia32_selectps_128: 8985 case X86::BI__builtin_ia32_selectps_256: 8986 case X86::BI__builtin_ia32_selectps_512: 8987 case X86::BI__builtin_ia32_selectpd_128: 8988 case X86::BI__builtin_ia32_selectpd_256: 8989 case X86::BI__builtin_ia32_selectpd_512: 8990 return EmitX86Select(*this, Ops[0], Ops[1], Ops[2]); 8991 case X86::BI__builtin_ia32_cmpb128_mask: 8992 case X86::BI__builtin_ia32_cmpb256_mask: 8993 case X86::BI__builtin_ia32_cmpb512_mask: 8994 case X86::BI__builtin_ia32_cmpw128_mask: 8995 case X86::BI__builtin_ia32_cmpw256_mask: 8996 case X86::BI__builtin_ia32_cmpw512_mask: 8997 case X86::BI__builtin_ia32_cmpd128_mask: 8998 case X86::BI__builtin_ia32_cmpd256_mask: 8999 case X86::BI__builtin_ia32_cmpd512_mask: 9000 case X86::BI__builtin_ia32_cmpq128_mask: 9001 case X86::BI__builtin_ia32_cmpq256_mask: 9002 case X86::BI__builtin_ia32_cmpq512_mask: { 9003 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 9004 return EmitX86MaskedCompare(*this, CC, true, Ops); 9005 } 9006 case X86::BI__builtin_ia32_ucmpb128_mask: 9007 case X86::BI__builtin_ia32_ucmpb256_mask: 9008 case X86::BI__builtin_ia32_ucmpb512_mask: 9009 case X86::BI__builtin_ia32_ucmpw128_mask: 9010 case X86::BI__builtin_ia32_ucmpw256_mask: 9011 case X86::BI__builtin_ia32_ucmpw512_mask: 9012 case X86::BI__builtin_ia32_ucmpd128_mask: 9013 case X86::BI__builtin_ia32_ucmpd256_mask: 9014 case X86::BI__builtin_ia32_ucmpd512_mask: 9015 case X86::BI__builtin_ia32_ucmpq128_mask: 9016 case X86::BI__builtin_ia32_ucmpq256_mask: 9017 case X86::BI__builtin_ia32_ucmpq512_mask: { 9018 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 9019 return EmitX86MaskedCompare(*this, CC, false, Ops); 9020 } 9021 9022 case X86::BI__builtin_ia32_kortestchi: 9023 case X86::BI__builtin_ia32_kortestzhi: { 9024 Value *Or = EmitX86MaskLogic(*this, Instruction::Or, 16, Ops); 9025 Value *C; 9026 if (BuiltinID == X86::BI__builtin_ia32_kortestchi) 9027 C = llvm::Constant::getAllOnesValue(Builder.getInt16Ty()); 9028 else 9029 C = llvm::Constant::getNullValue(Builder.getInt16Ty()); 9030 Value *Cmp = Builder.CreateICmpEQ(Or, C); 9031 return Builder.CreateZExt(Cmp, ConvertType(E->getType())); 9032 } 9033 9034 case X86::BI__builtin_ia32_kandhi: 9035 return EmitX86MaskLogic(*this, Instruction::And, 16, Ops); 9036 case X86::BI__builtin_ia32_kandnhi: 9037 return EmitX86MaskLogic(*this, Instruction::And, 16, Ops, true); 9038 case X86::BI__builtin_ia32_korhi: 9039 return EmitX86MaskLogic(*this, Instruction::Or, 16, Ops); 9040 case X86::BI__builtin_ia32_kxnorhi: 9041 return EmitX86MaskLogic(*this, Instruction::Xor, 16, Ops, true); 9042 case X86::BI__builtin_ia32_kxorhi: 9043 return EmitX86MaskLogic(*this, Instruction::Xor, 16, Ops); 9044 case X86::BI__builtin_ia32_knothi: { 9045 Ops[0] = getMaskVecValue(*this, Ops[0], 16); 9046 return Builder.CreateBitCast(Builder.CreateNot(Ops[0]), 9047 Builder.getInt16Ty()); 9048 } 9049 9050 case X86::BI__builtin_ia32_kunpckdi: 9051 case X86::BI__builtin_ia32_kunpcksi: 9052 case X86::BI__builtin_ia32_kunpckhi: { 9053 unsigned NumElts = Ops[0]->getType()->getScalarSizeInBits(); 9054 Value *LHS = getMaskVecValue(*this, Ops[0], NumElts); 9055 Value *RHS = getMaskVecValue(*this, Ops[1], NumElts); 9056 uint32_t Indices[64]; 9057 for (unsigned i = 0; i != NumElts; ++i) 9058 Indices[i] = i; 9059 9060 // First extract half of each vector. This gives better codegen than 9061 // doing it in a single shuffle. 9062 LHS = Builder.CreateShuffleVector(LHS, LHS, 9063 makeArrayRef(Indices, NumElts / 2)); 9064 RHS = Builder.CreateShuffleVector(RHS, RHS, 9065 makeArrayRef(Indices, NumElts / 2)); 9066 // Concat the vectors. 9067 // NOTE: Operands are swapped to match the intrinsic definition. 9068 Value *Res = Builder.CreateShuffleVector(RHS, LHS, 9069 makeArrayRef(Indices, NumElts)); 9070 return Builder.CreateBitCast(Res, Ops[0]->getType()); 9071 } 9072 9073 case X86::BI__builtin_ia32_vplzcntd_128_mask: 9074 case X86::BI__builtin_ia32_vplzcntd_256_mask: 9075 case X86::BI__builtin_ia32_vplzcntd_512_mask: 9076 case X86::BI__builtin_ia32_vplzcntq_128_mask: 9077 case X86::BI__builtin_ia32_vplzcntq_256_mask: 9078 case X86::BI__builtin_ia32_vplzcntq_512_mask: { 9079 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, Ops[0]->getType()); 9080 return EmitX86Select(*this, Ops[2], 9081 Builder.CreateCall(F, {Ops[0],Builder.getInt1(false)}), 9082 Ops[1]); 9083 } 9084 9085 case X86::BI__builtin_ia32_pabsb128: 9086 case X86::BI__builtin_ia32_pabsw128: 9087 case X86::BI__builtin_ia32_pabsd128: 9088 case X86::BI__builtin_ia32_pabsb256: 9089 case X86::BI__builtin_ia32_pabsw256: 9090 case X86::BI__builtin_ia32_pabsd256: 9091 case X86::BI__builtin_ia32_pabsq128_mask: 9092 case X86::BI__builtin_ia32_pabsq256_mask: 9093 case X86::BI__builtin_ia32_pabsb512_mask: 9094 case X86::BI__builtin_ia32_pabsw512_mask: 9095 case X86::BI__builtin_ia32_pabsd512_mask: 9096 case X86::BI__builtin_ia32_pabsq512_mask: 9097 return EmitX86Abs(*this, Ops); 9098 9099 case X86::BI__builtin_ia32_pmaxsb128: 9100 case X86::BI__builtin_ia32_pmaxsw128: 9101 case X86::BI__builtin_ia32_pmaxsd128: 9102 case X86::BI__builtin_ia32_pmaxsq128_mask: 9103 case X86::BI__builtin_ia32_pmaxsb256: 9104 case X86::BI__builtin_ia32_pmaxsw256: 9105 case X86::BI__builtin_ia32_pmaxsd256: 9106 case X86::BI__builtin_ia32_pmaxsq256_mask: 9107 case X86::BI__builtin_ia32_pmaxsb512_mask: 9108 case X86::BI__builtin_ia32_pmaxsw512_mask: 9109 case X86::BI__builtin_ia32_pmaxsd512_mask: 9110 case X86::BI__builtin_ia32_pmaxsq512_mask: 9111 return EmitX86MinMax(*this, ICmpInst::ICMP_SGT, Ops); 9112 case X86::BI__builtin_ia32_pmaxub128: 9113 case X86::BI__builtin_ia32_pmaxuw128: 9114 case X86::BI__builtin_ia32_pmaxud128: 9115 case X86::BI__builtin_ia32_pmaxuq128_mask: 9116 case X86::BI__builtin_ia32_pmaxub256: 9117 case X86::BI__builtin_ia32_pmaxuw256: 9118 case X86::BI__builtin_ia32_pmaxud256: 9119 case X86::BI__builtin_ia32_pmaxuq256_mask: 9120 case X86::BI__builtin_ia32_pmaxub512_mask: 9121 case X86::BI__builtin_ia32_pmaxuw512_mask: 9122 case X86::BI__builtin_ia32_pmaxud512_mask: 9123 case X86::BI__builtin_ia32_pmaxuq512_mask: 9124 return EmitX86MinMax(*this, ICmpInst::ICMP_UGT, Ops); 9125 case X86::BI__builtin_ia32_pminsb128: 9126 case X86::BI__builtin_ia32_pminsw128: 9127 case X86::BI__builtin_ia32_pminsd128: 9128 case X86::BI__builtin_ia32_pminsq128_mask: 9129 case X86::BI__builtin_ia32_pminsb256: 9130 case X86::BI__builtin_ia32_pminsw256: 9131 case X86::BI__builtin_ia32_pminsd256: 9132 case X86::BI__builtin_ia32_pminsq256_mask: 9133 case X86::BI__builtin_ia32_pminsb512_mask: 9134 case X86::BI__builtin_ia32_pminsw512_mask: 9135 case X86::BI__builtin_ia32_pminsd512_mask: 9136 case X86::BI__builtin_ia32_pminsq512_mask: 9137 return EmitX86MinMax(*this, ICmpInst::ICMP_SLT, Ops); 9138 case X86::BI__builtin_ia32_pminub128: 9139 case X86::BI__builtin_ia32_pminuw128: 9140 case X86::BI__builtin_ia32_pminud128: 9141 case X86::BI__builtin_ia32_pminuq128_mask: 9142 case X86::BI__builtin_ia32_pminub256: 9143 case X86::BI__builtin_ia32_pminuw256: 9144 case X86::BI__builtin_ia32_pminud256: 9145 case X86::BI__builtin_ia32_pminuq256_mask: 9146 case X86::BI__builtin_ia32_pminub512_mask: 9147 case X86::BI__builtin_ia32_pminuw512_mask: 9148 case X86::BI__builtin_ia32_pminud512_mask: 9149 case X86::BI__builtin_ia32_pminuq512_mask: 9150 return EmitX86MinMax(*this, ICmpInst::ICMP_ULT, Ops); 9151 9152 case X86::BI__builtin_ia32_pmuludq128: 9153 case X86::BI__builtin_ia32_pmuludq256: 9154 case X86::BI__builtin_ia32_pmuludq512: 9155 return EmitX86Muldq(*this, /*IsSigned*/false, Ops); 9156 9157 case X86::BI__builtin_ia32_pmuldq128: 9158 case X86::BI__builtin_ia32_pmuldq256: 9159 case X86::BI__builtin_ia32_pmuldq512: 9160 return EmitX86Muldq(*this, /*IsSigned*/true, Ops); 9161 9162 // 3DNow! 9163 case X86::BI__builtin_ia32_pswapdsf: 9164 case X86::BI__builtin_ia32_pswapdsi: { 9165 llvm::Type *MMXTy = llvm::Type::getX86_MMXTy(getLLVMContext()); 9166 Ops[0] = Builder.CreateBitCast(Ops[0], MMXTy, "cast"); 9167 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_3dnowa_pswapd); 9168 return Builder.CreateCall(F, Ops, "pswapd"); 9169 } 9170 case X86::BI__builtin_ia32_rdrand16_step: 9171 case X86::BI__builtin_ia32_rdrand32_step: 9172 case X86::BI__builtin_ia32_rdrand64_step: 9173 case X86::BI__builtin_ia32_rdseed16_step: 9174 case X86::BI__builtin_ia32_rdseed32_step: 9175 case X86::BI__builtin_ia32_rdseed64_step: { 9176 Intrinsic::ID ID; 9177 switch (BuiltinID) { 9178 default: llvm_unreachable("Unsupported intrinsic!"); 9179 case X86::BI__builtin_ia32_rdrand16_step: 9180 ID = Intrinsic::x86_rdrand_16; 9181 break; 9182 case X86::BI__builtin_ia32_rdrand32_step: 9183 ID = Intrinsic::x86_rdrand_32; 9184 break; 9185 case X86::BI__builtin_ia32_rdrand64_step: 9186 ID = Intrinsic::x86_rdrand_64; 9187 break; 9188 case X86::BI__builtin_ia32_rdseed16_step: 9189 ID = Intrinsic::x86_rdseed_16; 9190 break; 9191 case X86::BI__builtin_ia32_rdseed32_step: 9192 ID = Intrinsic::x86_rdseed_32; 9193 break; 9194 case X86::BI__builtin_ia32_rdseed64_step: 9195 ID = Intrinsic::x86_rdseed_64; 9196 break; 9197 } 9198 9199 Value *Call = Builder.CreateCall(CGM.getIntrinsic(ID)); 9200 Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 0), 9201 Ops[0]); 9202 return Builder.CreateExtractValue(Call, 1); 9203 } 9204 9205 case X86::BI__builtin_ia32_cmpps128_mask: 9206 case X86::BI__builtin_ia32_cmpps256_mask: 9207 case X86::BI__builtin_ia32_cmpps512_mask: 9208 case X86::BI__builtin_ia32_cmppd128_mask: 9209 case X86::BI__builtin_ia32_cmppd256_mask: 9210 case X86::BI__builtin_ia32_cmppd512_mask: { 9211 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 9212 Value *MaskIn = Ops[3]; 9213 Ops.erase(&Ops[3]); 9214 9215 Intrinsic::ID ID; 9216 switch (BuiltinID) { 9217 default: llvm_unreachable("Unsupported intrinsic!"); 9218 case X86::BI__builtin_ia32_cmpps128_mask: 9219 ID = Intrinsic::x86_avx512_mask_cmp_ps_128; 9220 break; 9221 case X86::BI__builtin_ia32_cmpps256_mask: 9222 ID = Intrinsic::x86_avx512_mask_cmp_ps_256; 9223 break; 9224 case X86::BI__builtin_ia32_cmpps512_mask: 9225 ID = Intrinsic::x86_avx512_mask_cmp_ps_512; 9226 break; 9227 case X86::BI__builtin_ia32_cmppd128_mask: 9228 ID = Intrinsic::x86_avx512_mask_cmp_pd_128; 9229 break; 9230 case X86::BI__builtin_ia32_cmppd256_mask: 9231 ID = Intrinsic::x86_avx512_mask_cmp_pd_256; 9232 break; 9233 case X86::BI__builtin_ia32_cmppd512_mask: 9234 ID = Intrinsic::x86_avx512_mask_cmp_pd_512; 9235 break; 9236 } 9237 9238 Value *Cmp = Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 9239 return EmitX86MaskedCompareResult(*this, Cmp, NumElts, MaskIn); 9240 } 9241 9242 // SSE packed comparison intrinsics 9243 case X86::BI__builtin_ia32_cmpeqps: 9244 case X86::BI__builtin_ia32_cmpeqpd: 9245 return getVectorFCmpIR(CmpInst::FCMP_OEQ); 9246 case X86::BI__builtin_ia32_cmpltps: 9247 case X86::BI__builtin_ia32_cmpltpd: 9248 return getVectorFCmpIR(CmpInst::FCMP_OLT); 9249 case X86::BI__builtin_ia32_cmpleps: 9250 case X86::BI__builtin_ia32_cmplepd: 9251 return getVectorFCmpIR(CmpInst::FCMP_OLE); 9252 case X86::BI__builtin_ia32_cmpunordps: 9253 case X86::BI__builtin_ia32_cmpunordpd: 9254 return getVectorFCmpIR(CmpInst::FCMP_UNO); 9255 case X86::BI__builtin_ia32_cmpneqps: 9256 case X86::BI__builtin_ia32_cmpneqpd: 9257 return getVectorFCmpIR(CmpInst::FCMP_UNE); 9258 case X86::BI__builtin_ia32_cmpnltps: 9259 case X86::BI__builtin_ia32_cmpnltpd: 9260 return getVectorFCmpIR(CmpInst::FCMP_UGE); 9261 case X86::BI__builtin_ia32_cmpnleps: 9262 case X86::BI__builtin_ia32_cmpnlepd: 9263 return getVectorFCmpIR(CmpInst::FCMP_UGT); 9264 case X86::BI__builtin_ia32_cmpordps: 9265 case X86::BI__builtin_ia32_cmpordpd: 9266 return getVectorFCmpIR(CmpInst::FCMP_ORD); 9267 case X86::BI__builtin_ia32_cmpps: 9268 case X86::BI__builtin_ia32_cmpps256: 9269 case X86::BI__builtin_ia32_cmppd: 9270 case X86::BI__builtin_ia32_cmppd256: { 9271 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 9272 // If this one of the SSE immediates, we can use native IR. 9273 if (CC < 8) { 9274 FCmpInst::Predicate Pred; 9275 switch (CC) { 9276 case 0: Pred = FCmpInst::FCMP_OEQ; break; 9277 case 1: Pred = FCmpInst::FCMP_OLT; break; 9278 case 2: Pred = FCmpInst::FCMP_OLE; break; 9279 case 3: Pred = FCmpInst::FCMP_UNO; break; 9280 case 4: Pred = FCmpInst::FCMP_UNE; break; 9281 case 5: Pred = FCmpInst::FCMP_UGE; break; 9282 case 6: Pred = FCmpInst::FCMP_UGT; break; 9283 case 7: Pred = FCmpInst::FCMP_ORD; break; 9284 } 9285 return getVectorFCmpIR(Pred); 9286 } 9287 9288 // We can't handle 8-31 immediates with native IR, use the intrinsic. 9289 // Except for predicates that create constants. 9290 Intrinsic::ID ID; 9291 switch (BuiltinID) { 9292 default: llvm_unreachable("Unsupported intrinsic!"); 9293 case X86::BI__builtin_ia32_cmpps: 9294 ID = Intrinsic::x86_sse_cmp_ps; 9295 break; 9296 case X86::BI__builtin_ia32_cmpps256: 9297 // _CMP_TRUE_UQ, _CMP_TRUE_US produce -1,-1... vector 9298 // on any input and _CMP_FALSE_OQ, _CMP_FALSE_OS produce 0, 0... 9299 if (CC == 0xf || CC == 0xb || CC == 0x1b || CC == 0x1f) { 9300 Value *Constant = (CC == 0xf || CC == 0x1f) ? 9301 llvm::Constant::getAllOnesValue(Builder.getInt32Ty()) : 9302 llvm::Constant::getNullValue(Builder.getInt32Ty()); 9303 Value *Vec = Builder.CreateVectorSplat( 9304 Ops[0]->getType()->getVectorNumElements(), Constant); 9305 return Builder.CreateBitCast(Vec, Ops[0]->getType()); 9306 } 9307 ID = Intrinsic::x86_avx_cmp_ps_256; 9308 break; 9309 case X86::BI__builtin_ia32_cmppd: 9310 ID = Intrinsic::x86_sse2_cmp_pd; 9311 break; 9312 case X86::BI__builtin_ia32_cmppd256: 9313 // _CMP_TRUE_UQ, _CMP_TRUE_US produce -1,-1... vector 9314 // on any input and _CMP_FALSE_OQ, _CMP_FALSE_OS produce 0, 0... 9315 if (CC == 0xf || CC == 0xb || CC == 0x1b || CC == 0x1f) { 9316 Value *Constant = (CC == 0xf || CC == 0x1f) ? 9317 llvm::Constant::getAllOnesValue(Builder.getInt64Ty()) : 9318 llvm::Constant::getNullValue(Builder.getInt64Ty()); 9319 Value *Vec = Builder.CreateVectorSplat( 9320 Ops[0]->getType()->getVectorNumElements(), Constant); 9321 return Builder.CreateBitCast(Vec, Ops[0]->getType()); 9322 } 9323 ID = Intrinsic::x86_avx_cmp_pd_256; 9324 break; 9325 } 9326 9327 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 9328 } 9329 9330 // SSE scalar comparison intrinsics 9331 case X86::BI__builtin_ia32_cmpeqss: 9332 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 0); 9333 case X86::BI__builtin_ia32_cmpltss: 9334 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 1); 9335 case X86::BI__builtin_ia32_cmpless: 9336 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 2); 9337 case X86::BI__builtin_ia32_cmpunordss: 9338 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 3); 9339 case X86::BI__builtin_ia32_cmpneqss: 9340 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 4); 9341 case X86::BI__builtin_ia32_cmpnltss: 9342 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 5); 9343 case X86::BI__builtin_ia32_cmpnless: 9344 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 6); 9345 case X86::BI__builtin_ia32_cmpordss: 9346 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 7); 9347 case X86::BI__builtin_ia32_cmpeqsd: 9348 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 0); 9349 case X86::BI__builtin_ia32_cmpltsd: 9350 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 1); 9351 case X86::BI__builtin_ia32_cmplesd: 9352 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 2); 9353 case X86::BI__builtin_ia32_cmpunordsd: 9354 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 3); 9355 case X86::BI__builtin_ia32_cmpneqsd: 9356 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 4); 9357 case X86::BI__builtin_ia32_cmpnltsd: 9358 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 5); 9359 case X86::BI__builtin_ia32_cmpnlesd: 9360 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 6); 9361 case X86::BI__builtin_ia32_cmpordsd: 9362 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 7); 9363 9364 case X86::BI__emul: 9365 case X86::BI__emulu: { 9366 llvm::Type *Int64Ty = llvm::IntegerType::get(getLLVMContext(), 64); 9367 bool isSigned = (BuiltinID == X86::BI__emul); 9368 Value *LHS = Builder.CreateIntCast(Ops[0], Int64Ty, isSigned); 9369 Value *RHS = Builder.CreateIntCast(Ops[1], Int64Ty, isSigned); 9370 return Builder.CreateMul(LHS, RHS, "", !isSigned, isSigned); 9371 } 9372 case X86::BI__mulh: 9373 case X86::BI__umulh: 9374 case X86::BI_mul128: 9375 case X86::BI_umul128: { 9376 llvm::Type *ResType = ConvertType(E->getType()); 9377 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 9378 9379 bool IsSigned = (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI_mul128); 9380 Value *LHS = Builder.CreateIntCast(Ops[0], Int128Ty, IsSigned); 9381 Value *RHS = Builder.CreateIntCast(Ops[1], Int128Ty, IsSigned); 9382 9383 Value *MulResult, *HigherBits; 9384 if (IsSigned) { 9385 MulResult = Builder.CreateNSWMul(LHS, RHS); 9386 HigherBits = Builder.CreateAShr(MulResult, 64); 9387 } else { 9388 MulResult = Builder.CreateNUWMul(LHS, RHS); 9389 HigherBits = Builder.CreateLShr(MulResult, 64); 9390 } 9391 HigherBits = Builder.CreateIntCast(HigherBits, ResType, IsSigned); 9392 9393 if (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI__umulh) 9394 return HigherBits; 9395 9396 Address HighBitsAddress = EmitPointerWithAlignment(E->getArg(2)); 9397 Builder.CreateStore(HigherBits, HighBitsAddress); 9398 return Builder.CreateIntCast(MulResult, ResType, IsSigned); 9399 } 9400 9401 case X86::BI__faststorefence: { 9402 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 9403 llvm::SyncScope::System); 9404 } 9405 case X86::BI_ReadWriteBarrier: 9406 case X86::BI_ReadBarrier: 9407 case X86::BI_WriteBarrier: { 9408 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 9409 llvm::SyncScope::SingleThread); 9410 } 9411 case X86::BI_BitScanForward: 9412 case X86::BI_BitScanForward64: 9413 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 9414 case X86::BI_BitScanReverse: 9415 case X86::BI_BitScanReverse64: 9416 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 9417 9418 case X86::BI_InterlockedAnd64: 9419 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 9420 case X86::BI_InterlockedExchange64: 9421 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 9422 case X86::BI_InterlockedExchangeAdd64: 9423 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 9424 case X86::BI_InterlockedExchangeSub64: 9425 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 9426 case X86::BI_InterlockedOr64: 9427 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 9428 case X86::BI_InterlockedXor64: 9429 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 9430 case X86::BI_InterlockedDecrement64: 9431 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 9432 case X86::BI_InterlockedIncrement64: 9433 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 9434 case X86::BI_InterlockedCompareExchange128: { 9435 // InterlockedCompareExchange128 doesn't directly refer to 128bit ints, 9436 // instead it takes pointers to 64bit ints for Destination and 9437 // ComparandResult, and exchange is taken as two 64bit ints (high & low). 9438 // The previous value is written to ComparandResult, and success is 9439 // returned. 9440 9441 llvm::Type *Int128Ty = Builder.getInt128Ty(); 9442 llvm::Type *Int128PtrTy = Int128Ty->getPointerTo(); 9443 9444 Value *Destination = 9445 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PtrTy); 9446 Value *ExchangeHigh128 = 9447 Builder.CreateZExt(EmitScalarExpr(E->getArg(1)), Int128Ty); 9448 Value *ExchangeLow128 = 9449 Builder.CreateZExt(EmitScalarExpr(E->getArg(2)), Int128Ty); 9450 Address ComparandResult( 9451 Builder.CreateBitCast(EmitScalarExpr(E->getArg(3)), Int128PtrTy), 9452 getContext().toCharUnitsFromBits(128)); 9453 9454 Value *Exchange = Builder.CreateOr( 9455 Builder.CreateShl(ExchangeHigh128, 64, "", false, false), 9456 ExchangeLow128); 9457 9458 Value *Comparand = Builder.CreateLoad(ComparandResult); 9459 9460 AtomicCmpXchgInst *CXI = 9461 Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 9462 AtomicOrdering::SequentiallyConsistent, 9463 AtomicOrdering::SequentiallyConsistent); 9464 CXI->setVolatile(true); 9465 9466 // Write the result back to the inout pointer. 9467 Builder.CreateStore(Builder.CreateExtractValue(CXI, 0), ComparandResult); 9468 9469 // Get the success boolean and zero extend it to i8. 9470 Value *Success = Builder.CreateExtractValue(CXI, 1); 9471 return Builder.CreateZExt(Success, ConvertType(E->getType())); 9472 } 9473 9474 case X86::BI_AddressOfReturnAddress: { 9475 Value *F = CGM.getIntrinsic(Intrinsic::addressofreturnaddress); 9476 return Builder.CreateCall(F); 9477 } 9478 case X86::BI__stosb: { 9479 // We treat __stosb as a volatile memset - it may not generate "rep stosb" 9480 // instruction, but it will create a memset that won't be optimized away. 9481 return Builder.CreateMemSet(Ops[0], Ops[1], Ops[2], 1, true); 9482 } 9483 case X86::BI__ud2: 9484 // llvm.trap makes a ud2a instruction on x86. 9485 return EmitTrapCall(Intrinsic::trap); 9486 case X86::BI__int2c: { 9487 // This syscall signals a driver assertion failure in x86 NT kernels. 9488 llvm::FunctionType *FTy = llvm::FunctionType::get(VoidTy, false); 9489 llvm::InlineAsm *IA = 9490 llvm::InlineAsm::get(FTy, "int $$0x2c", "", /*SideEffects=*/true); 9491 llvm::AttributeList NoReturnAttr = llvm::AttributeList::get( 9492 getLLVMContext(), llvm::AttributeList::FunctionIndex, 9493 llvm::Attribute::NoReturn); 9494 CallSite CS = Builder.CreateCall(IA); 9495 CS.setAttributes(NoReturnAttr); 9496 return CS.getInstruction(); 9497 } 9498 case X86::BI__readfsbyte: 9499 case X86::BI__readfsword: 9500 case X86::BI__readfsdword: 9501 case X86::BI__readfsqword: { 9502 llvm::Type *IntTy = ConvertType(E->getType()); 9503 Value *Ptr = Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)), 9504 llvm::PointerType::get(IntTy, 257)); 9505 LoadInst *Load = Builder.CreateAlignedLoad( 9506 IntTy, Ptr, getContext().getTypeAlignInChars(E->getType())); 9507 Load->setVolatile(true); 9508 return Load; 9509 } 9510 case X86::BI__readgsbyte: 9511 case X86::BI__readgsword: 9512 case X86::BI__readgsdword: 9513 case X86::BI__readgsqword: { 9514 llvm::Type *IntTy = ConvertType(E->getType()); 9515 Value *Ptr = Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)), 9516 llvm::PointerType::get(IntTy, 256)); 9517 LoadInst *Load = Builder.CreateAlignedLoad( 9518 IntTy, Ptr, getContext().getTypeAlignInChars(E->getType())); 9519 Load->setVolatile(true); 9520 return Load; 9521 } 9522 } 9523 } 9524 9525 9526 Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, 9527 const CallExpr *E) { 9528 SmallVector<Value*, 4> Ops; 9529 9530 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) 9531 Ops.push_back(EmitScalarExpr(E->getArg(i))); 9532 9533 Intrinsic::ID ID = Intrinsic::not_intrinsic; 9534 9535 switch (BuiltinID) { 9536 default: return nullptr; 9537 9538 // __builtin_ppc_get_timebase is GCC 4.8+'s PowerPC-specific name for what we 9539 // call __builtin_readcyclecounter. 9540 case PPC::BI__builtin_ppc_get_timebase: 9541 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::readcyclecounter)); 9542 9543 // vec_ld, vec_xl_be, vec_lvsl, vec_lvsr 9544 case PPC::BI__builtin_altivec_lvx: 9545 case PPC::BI__builtin_altivec_lvxl: 9546 case PPC::BI__builtin_altivec_lvebx: 9547 case PPC::BI__builtin_altivec_lvehx: 9548 case PPC::BI__builtin_altivec_lvewx: 9549 case PPC::BI__builtin_altivec_lvsl: 9550 case PPC::BI__builtin_altivec_lvsr: 9551 case PPC::BI__builtin_vsx_lxvd2x: 9552 case PPC::BI__builtin_vsx_lxvw4x: 9553 case PPC::BI__builtin_vsx_lxvd2x_be: 9554 case PPC::BI__builtin_vsx_lxvw4x_be: 9555 case PPC::BI__builtin_vsx_lxvl: 9556 case PPC::BI__builtin_vsx_lxvll: 9557 { 9558 if(BuiltinID == PPC::BI__builtin_vsx_lxvl || 9559 BuiltinID == PPC::BI__builtin_vsx_lxvll){ 9560 Ops[0] = Builder.CreateBitCast(Ops[0], Int8PtrTy); 9561 }else { 9562 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 9563 Ops[0] = Builder.CreateGEP(Ops[1], Ops[0]); 9564 Ops.pop_back(); 9565 } 9566 9567 switch (BuiltinID) { 9568 default: llvm_unreachable("Unsupported ld/lvsl/lvsr intrinsic!"); 9569 case PPC::BI__builtin_altivec_lvx: 9570 ID = Intrinsic::ppc_altivec_lvx; 9571 break; 9572 case PPC::BI__builtin_altivec_lvxl: 9573 ID = Intrinsic::ppc_altivec_lvxl; 9574 break; 9575 case PPC::BI__builtin_altivec_lvebx: 9576 ID = Intrinsic::ppc_altivec_lvebx; 9577 break; 9578 case PPC::BI__builtin_altivec_lvehx: 9579 ID = Intrinsic::ppc_altivec_lvehx; 9580 break; 9581 case PPC::BI__builtin_altivec_lvewx: 9582 ID = Intrinsic::ppc_altivec_lvewx; 9583 break; 9584 case PPC::BI__builtin_altivec_lvsl: 9585 ID = Intrinsic::ppc_altivec_lvsl; 9586 break; 9587 case PPC::BI__builtin_altivec_lvsr: 9588 ID = Intrinsic::ppc_altivec_lvsr; 9589 break; 9590 case PPC::BI__builtin_vsx_lxvd2x: 9591 ID = Intrinsic::ppc_vsx_lxvd2x; 9592 break; 9593 case PPC::BI__builtin_vsx_lxvw4x: 9594 ID = Intrinsic::ppc_vsx_lxvw4x; 9595 break; 9596 case PPC::BI__builtin_vsx_lxvd2x_be: 9597 ID = Intrinsic::ppc_vsx_lxvd2x_be; 9598 break; 9599 case PPC::BI__builtin_vsx_lxvw4x_be: 9600 ID = Intrinsic::ppc_vsx_lxvw4x_be; 9601 break; 9602 case PPC::BI__builtin_vsx_lxvl: 9603 ID = Intrinsic::ppc_vsx_lxvl; 9604 break; 9605 case PPC::BI__builtin_vsx_lxvll: 9606 ID = Intrinsic::ppc_vsx_lxvll; 9607 break; 9608 } 9609 llvm::Function *F = CGM.getIntrinsic(ID); 9610 return Builder.CreateCall(F, Ops, ""); 9611 } 9612 9613 // vec_st, vec_xst_be 9614 case PPC::BI__builtin_altivec_stvx: 9615 case PPC::BI__builtin_altivec_stvxl: 9616 case PPC::BI__builtin_altivec_stvebx: 9617 case PPC::BI__builtin_altivec_stvehx: 9618 case PPC::BI__builtin_altivec_stvewx: 9619 case PPC::BI__builtin_vsx_stxvd2x: 9620 case PPC::BI__builtin_vsx_stxvw4x: 9621 case PPC::BI__builtin_vsx_stxvd2x_be: 9622 case PPC::BI__builtin_vsx_stxvw4x_be: 9623 case PPC::BI__builtin_vsx_stxvl: 9624 case PPC::BI__builtin_vsx_stxvll: 9625 { 9626 if(BuiltinID == PPC::BI__builtin_vsx_stxvl || 9627 BuiltinID == PPC::BI__builtin_vsx_stxvll ){ 9628 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 9629 }else { 9630 Ops[2] = Builder.CreateBitCast(Ops[2], Int8PtrTy); 9631 Ops[1] = Builder.CreateGEP(Ops[2], Ops[1]); 9632 Ops.pop_back(); 9633 } 9634 9635 switch (BuiltinID) { 9636 default: llvm_unreachable("Unsupported st intrinsic!"); 9637 case PPC::BI__builtin_altivec_stvx: 9638 ID = Intrinsic::ppc_altivec_stvx; 9639 break; 9640 case PPC::BI__builtin_altivec_stvxl: 9641 ID = Intrinsic::ppc_altivec_stvxl; 9642 break; 9643 case PPC::BI__builtin_altivec_stvebx: 9644 ID = Intrinsic::ppc_altivec_stvebx; 9645 break; 9646 case PPC::BI__builtin_altivec_stvehx: 9647 ID = Intrinsic::ppc_altivec_stvehx; 9648 break; 9649 case PPC::BI__builtin_altivec_stvewx: 9650 ID = Intrinsic::ppc_altivec_stvewx; 9651 break; 9652 case PPC::BI__builtin_vsx_stxvd2x: 9653 ID = Intrinsic::ppc_vsx_stxvd2x; 9654 break; 9655 case PPC::BI__builtin_vsx_stxvw4x: 9656 ID = Intrinsic::ppc_vsx_stxvw4x; 9657 break; 9658 case PPC::BI__builtin_vsx_stxvd2x_be: 9659 ID = Intrinsic::ppc_vsx_stxvd2x_be; 9660 break; 9661 case PPC::BI__builtin_vsx_stxvw4x_be: 9662 ID = Intrinsic::ppc_vsx_stxvw4x_be; 9663 break; 9664 case PPC::BI__builtin_vsx_stxvl: 9665 ID = Intrinsic::ppc_vsx_stxvl; 9666 break; 9667 case PPC::BI__builtin_vsx_stxvll: 9668 ID = Intrinsic::ppc_vsx_stxvll; 9669 break; 9670 } 9671 llvm::Function *F = CGM.getIntrinsic(ID); 9672 return Builder.CreateCall(F, Ops, ""); 9673 } 9674 // Square root 9675 case PPC::BI__builtin_vsx_xvsqrtsp: 9676 case PPC::BI__builtin_vsx_xvsqrtdp: { 9677 llvm::Type *ResultType = ConvertType(E->getType()); 9678 Value *X = EmitScalarExpr(E->getArg(0)); 9679 ID = Intrinsic::sqrt; 9680 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 9681 return Builder.CreateCall(F, X); 9682 } 9683 // Count leading zeros 9684 case PPC::BI__builtin_altivec_vclzb: 9685 case PPC::BI__builtin_altivec_vclzh: 9686 case PPC::BI__builtin_altivec_vclzw: 9687 case PPC::BI__builtin_altivec_vclzd: { 9688 llvm::Type *ResultType = ConvertType(E->getType()); 9689 Value *X = EmitScalarExpr(E->getArg(0)); 9690 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 9691 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 9692 return Builder.CreateCall(F, {X, Undef}); 9693 } 9694 case PPC::BI__builtin_altivec_vctzb: 9695 case PPC::BI__builtin_altivec_vctzh: 9696 case PPC::BI__builtin_altivec_vctzw: 9697 case PPC::BI__builtin_altivec_vctzd: { 9698 llvm::Type *ResultType = ConvertType(E->getType()); 9699 Value *X = EmitScalarExpr(E->getArg(0)); 9700 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 9701 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 9702 return Builder.CreateCall(F, {X, Undef}); 9703 } 9704 case PPC::BI__builtin_altivec_vpopcntb: 9705 case PPC::BI__builtin_altivec_vpopcnth: 9706 case PPC::BI__builtin_altivec_vpopcntw: 9707 case PPC::BI__builtin_altivec_vpopcntd: { 9708 llvm::Type *ResultType = ConvertType(E->getType()); 9709 Value *X = EmitScalarExpr(E->getArg(0)); 9710 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 9711 return Builder.CreateCall(F, X); 9712 } 9713 // Copy sign 9714 case PPC::BI__builtin_vsx_xvcpsgnsp: 9715 case PPC::BI__builtin_vsx_xvcpsgndp: { 9716 llvm::Type *ResultType = ConvertType(E->getType()); 9717 Value *X = EmitScalarExpr(E->getArg(0)); 9718 Value *Y = EmitScalarExpr(E->getArg(1)); 9719 ID = Intrinsic::copysign; 9720 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 9721 return Builder.CreateCall(F, {X, Y}); 9722 } 9723 // Rounding/truncation 9724 case PPC::BI__builtin_vsx_xvrspip: 9725 case PPC::BI__builtin_vsx_xvrdpip: 9726 case PPC::BI__builtin_vsx_xvrdpim: 9727 case PPC::BI__builtin_vsx_xvrspim: 9728 case PPC::BI__builtin_vsx_xvrdpi: 9729 case PPC::BI__builtin_vsx_xvrspi: 9730 case PPC::BI__builtin_vsx_xvrdpic: 9731 case PPC::BI__builtin_vsx_xvrspic: 9732 case PPC::BI__builtin_vsx_xvrdpiz: 9733 case PPC::BI__builtin_vsx_xvrspiz: { 9734 llvm::Type *ResultType = ConvertType(E->getType()); 9735 Value *X = EmitScalarExpr(E->getArg(0)); 9736 if (BuiltinID == PPC::BI__builtin_vsx_xvrdpim || 9737 BuiltinID == PPC::BI__builtin_vsx_xvrspim) 9738 ID = Intrinsic::floor; 9739 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpi || 9740 BuiltinID == PPC::BI__builtin_vsx_xvrspi) 9741 ID = Intrinsic::round; 9742 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpic || 9743 BuiltinID == PPC::BI__builtin_vsx_xvrspic) 9744 ID = Intrinsic::nearbyint; 9745 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpip || 9746 BuiltinID == PPC::BI__builtin_vsx_xvrspip) 9747 ID = Intrinsic::ceil; 9748 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpiz || 9749 BuiltinID == PPC::BI__builtin_vsx_xvrspiz) 9750 ID = Intrinsic::trunc; 9751 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 9752 return Builder.CreateCall(F, X); 9753 } 9754 9755 // Absolute value 9756 case PPC::BI__builtin_vsx_xvabsdp: 9757 case PPC::BI__builtin_vsx_xvabssp: { 9758 llvm::Type *ResultType = ConvertType(E->getType()); 9759 Value *X = EmitScalarExpr(E->getArg(0)); 9760 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 9761 return Builder.CreateCall(F, X); 9762 } 9763 9764 // FMA variations 9765 case PPC::BI__builtin_vsx_xvmaddadp: 9766 case PPC::BI__builtin_vsx_xvmaddasp: 9767 case PPC::BI__builtin_vsx_xvnmaddadp: 9768 case PPC::BI__builtin_vsx_xvnmaddasp: 9769 case PPC::BI__builtin_vsx_xvmsubadp: 9770 case PPC::BI__builtin_vsx_xvmsubasp: 9771 case PPC::BI__builtin_vsx_xvnmsubadp: 9772 case PPC::BI__builtin_vsx_xvnmsubasp: { 9773 llvm::Type *ResultType = ConvertType(E->getType()); 9774 Value *X = EmitScalarExpr(E->getArg(0)); 9775 Value *Y = EmitScalarExpr(E->getArg(1)); 9776 Value *Z = EmitScalarExpr(E->getArg(2)); 9777 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 9778 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 9779 switch (BuiltinID) { 9780 case PPC::BI__builtin_vsx_xvmaddadp: 9781 case PPC::BI__builtin_vsx_xvmaddasp: 9782 return Builder.CreateCall(F, {X, Y, Z}); 9783 case PPC::BI__builtin_vsx_xvnmaddadp: 9784 case PPC::BI__builtin_vsx_xvnmaddasp: 9785 return Builder.CreateFSub(Zero, 9786 Builder.CreateCall(F, {X, Y, Z}), "sub"); 9787 case PPC::BI__builtin_vsx_xvmsubadp: 9788 case PPC::BI__builtin_vsx_xvmsubasp: 9789 return Builder.CreateCall(F, 9790 {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 9791 case PPC::BI__builtin_vsx_xvnmsubadp: 9792 case PPC::BI__builtin_vsx_xvnmsubasp: 9793 Value *FsubRes = 9794 Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 9795 return Builder.CreateFSub(Zero, FsubRes, "sub"); 9796 } 9797 llvm_unreachable("Unknown FMA operation"); 9798 return nullptr; // Suppress no-return warning 9799 } 9800 9801 case PPC::BI__builtin_vsx_insertword: { 9802 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_vsx_xxinsertw); 9803 9804 // Third argument is a compile time constant int. It must be clamped to 9805 // to the range [0, 12]. 9806 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[2]); 9807 assert(ArgCI && 9808 "Third arg to xxinsertw intrinsic must be constant integer"); 9809 const int64_t MaxIndex = 12; 9810 int64_t Index = clamp(ArgCI->getSExtValue(), 0, MaxIndex); 9811 9812 // The builtin semantics don't exactly match the xxinsertw instructions 9813 // semantics (which ppc_vsx_xxinsertw follows). The builtin extracts the 9814 // word from the first argument, and inserts it in the second argument. The 9815 // instruction extracts the word from its second input register and inserts 9816 // it into its first input register, so swap the first and second arguments. 9817 std::swap(Ops[0], Ops[1]); 9818 9819 // Need to cast the second argument from a vector of unsigned int to a 9820 // vector of long long. 9821 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int64Ty, 2)); 9822 9823 if (getTarget().isLittleEndian()) { 9824 // Create a shuffle mask of (1, 0) 9825 Constant *ShuffleElts[2] = { ConstantInt::get(Int32Ty, 1), 9826 ConstantInt::get(Int32Ty, 0) 9827 }; 9828 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 9829 9830 // Reverse the double words in the vector we will extract from. 9831 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 9832 Ops[0] = Builder.CreateShuffleVector(Ops[0], Ops[0], ShuffleMask); 9833 9834 // Reverse the index. 9835 Index = MaxIndex - Index; 9836 } 9837 9838 // Intrinsic expects the first arg to be a vector of int. 9839 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 9840 Ops[2] = ConstantInt::getSigned(Int32Ty, Index); 9841 return Builder.CreateCall(F, Ops); 9842 } 9843 9844 case PPC::BI__builtin_vsx_extractuword: { 9845 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_vsx_xxextractuw); 9846 9847 // Intrinsic expects the first argument to be a vector of doublewords. 9848 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 9849 9850 // The second argument is a compile time constant int that needs to 9851 // be clamped to the range [0, 12]. 9852 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[1]); 9853 assert(ArgCI && 9854 "Second Arg to xxextractuw intrinsic must be a constant integer!"); 9855 const int64_t MaxIndex = 12; 9856 int64_t Index = clamp(ArgCI->getSExtValue(), 0, MaxIndex); 9857 9858 if (getTarget().isLittleEndian()) { 9859 // Reverse the index. 9860 Index = MaxIndex - Index; 9861 Ops[1] = ConstantInt::getSigned(Int32Ty, Index); 9862 9863 // Emit the call, then reverse the double words of the results vector. 9864 Value *Call = Builder.CreateCall(F, Ops); 9865 9866 // Create a shuffle mask of (1, 0) 9867 Constant *ShuffleElts[2] = { ConstantInt::get(Int32Ty, 1), 9868 ConstantInt::get(Int32Ty, 0) 9869 }; 9870 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 9871 9872 Value *ShuffleCall = Builder.CreateShuffleVector(Call, Call, ShuffleMask); 9873 return ShuffleCall; 9874 } else { 9875 Ops[1] = ConstantInt::getSigned(Int32Ty, Index); 9876 return Builder.CreateCall(F, Ops); 9877 } 9878 } 9879 9880 case PPC::BI__builtin_vsx_xxpermdi: { 9881 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[2]); 9882 assert(ArgCI && "Third arg must be constant integer!"); 9883 9884 unsigned Index = ArgCI->getZExtValue(); 9885 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 9886 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int64Ty, 2)); 9887 9888 // Element zero comes from the first input vector and element one comes from 9889 // the second. The element indices within each vector are numbered in big 9890 // endian order so the shuffle mask must be adjusted for this on little 9891 // endian platforms (i.e. index is complemented and source vector reversed). 9892 unsigned ElemIdx0; 9893 unsigned ElemIdx1; 9894 if (getTarget().isLittleEndian()) { 9895 ElemIdx0 = (~Index & 1) + 2; 9896 ElemIdx1 = (~Index & 2) >> 1; 9897 } else { // BigEndian 9898 ElemIdx0 = (Index & 2) >> 1; 9899 ElemIdx1 = 2 + (Index & 1); 9900 } 9901 9902 Constant *ShuffleElts[2] = {ConstantInt::get(Int32Ty, ElemIdx0), 9903 ConstantInt::get(Int32Ty, ElemIdx1)}; 9904 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 9905 9906 Value *ShuffleCall = 9907 Builder.CreateShuffleVector(Ops[0], Ops[1], ShuffleMask); 9908 QualType BIRetType = E->getType(); 9909 auto RetTy = ConvertType(BIRetType); 9910 return Builder.CreateBitCast(ShuffleCall, RetTy); 9911 } 9912 9913 case PPC::BI__builtin_vsx_xxsldwi: { 9914 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[2]); 9915 assert(ArgCI && "Third argument must be a compile time constant"); 9916 unsigned Index = ArgCI->getZExtValue() & 0x3; 9917 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 9918 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int32Ty, 4)); 9919 9920 // Create a shuffle mask 9921 unsigned ElemIdx0; 9922 unsigned ElemIdx1; 9923 unsigned ElemIdx2; 9924 unsigned ElemIdx3; 9925 if (getTarget().isLittleEndian()) { 9926 // Little endian element N comes from element 8+N-Index of the 9927 // concatenated wide vector (of course, using modulo arithmetic on 9928 // the total number of elements). 9929 ElemIdx0 = (8 - Index) % 8; 9930 ElemIdx1 = (9 - Index) % 8; 9931 ElemIdx2 = (10 - Index) % 8; 9932 ElemIdx3 = (11 - Index) % 8; 9933 } else { 9934 // Big endian ElemIdx<N> = Index + N 9935 ElemIdx0 = Index; 9936 ElemIdx1 = Index + 1; 9937 ElemIdx2 = Index + 2; 9938 ElemIdx3 = Index + 3; 9939 } 9940 9941 Constant *ShuffleElts[4] = {ConstantInt::get(Int32Ty, ElemIdx0), 9942 ConstantInt::get(Int32Ty, ElemIdx1), 9943 ConstantInt::get(Int32Ty, ElemIdx2), 9944 ConstantInt::get(Int32Ty, ElemIdx3)}; 9945 9946 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 9947 Value *ShuffleCall = 9948 Builder.CreateShuffleVector(Ops[0], Ops[1], ShuffleMask); 9949 QualType BIRetType = E->getType(); 9950 auto RetTy = ConvertType(BIRetType); 9951 return Builder.CreateBitCast(ShuffleCall, RetTy); 9952 } 9953 } 9954 } 9955 9956 Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID, 9957 const CallExpr *E) { 9958 switch (BuiltinID) { 9959 case AMDGPU::BI__builtin_amdgcn_div_scale: 9960 case AMDGPU::BI__builtin_amdgcn_div_scalef: { 9961 // Translate from the intrinsics's struct return to the builtin's out 9962 // argument. 9963 9964 Address FlagOutPtr = EmitPointerWithAlignment(E->getArg(3)); 9965 9966 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 9967 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 9968 llvm::Value *Z = EmitScalarExpr(E->getArg(2)); 9969 9970 llvm::Value *Callee = CGM.getIntrinsic(Intrinsic::amdgcn_div_scale, 9971 X->getType()); 9972 9973 llvm::Value *Tmp = Builder.CreateCall(Callee, {X, Y, Z}); 9974 9975 llvm::Value *Result = Builder.CreateExtractValue(Tmp, 0); 9976 llvm::Value *Flag = Builder.CreateExtractValue(Tmp, 1); 9977 9978 llvm::Type *RealFlagType 9979 = FlagOutPtr.getPointer()->getType()->getPointerElementType(); 9980 9981 llvm::Value *FlagExt = Builder.CreateZExt(Flag, RealFlagType); 9982 Builder.CreateStore(FlagExt, FlagOutPtr); 9983 return Result; 9984 } 9985 case AMDGPU::BI__builtin_amdgcn_div_fmas: 9986 case AMDGPU::BI__builtin_amdgcn_div_fmasf: { 9987 llvm::Value *Src0 = EmitScalarExpr(E->getArg(0)); 9988 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); 9989 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); 9990 llvm::Value *Src3 = EmitScalarExpr(E->getArg(3)); 9991 9992 llvm::Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_div_fmas, 9993 Src0->getType()); 9994 llvm::Value *Src3ToBool = Builder.CreateIsNotNull(Src3); 9995 return Builder.CreateCall(F, {Src0, Src1, Src2, Src3ToBool}); 9996 } 9997 9998 case AMDGPU::BI__builtin_amdgcn_ds_swizzle: 9999 return emitBinaryBuiltin(*this, E, Intrinsic::amdgcn_ds_swizzle); 10000 case AMDGPU::BI__builtin_amdgcn_mov_dpp: { 10001 llvm::SmallVector<llvm::Value *, 5> Args; 10002 for (unsigned I = 0; I != 5; ++I) 10003 Args.push_back(EmitScalarExpr(E->getArg(I))); 10004 Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_mov_dpp, 10005 Args[0]->getType()); 10006 return Builder.CreateCall(F, Args); 10007 } 10008 case AMDGPU::BI__builtin_amdgcn_div_fixup: 10009 case AMDGPU::BI__builtin_amdgcn_div_fixupf: 10010 case AMDGPU::BI__builtin_amdgcn_div_fixuph: 10011 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_div_fixup); 10012 case AMDGPU::BI__builtin_amdgcn_trig_preop: 10013 case AMDGPU::BI__builtin_amdgcn_trig_preopf: 10014 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_trig_preop); 10015 case AMDGPU::BI__builtin_amdgcn_rcp: 10016 case AMDGPU::BI__builtin_amdgcn_rcpf: 10017 case AMDGPU::BI__builtin_amdgcn_rcph: 10018 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rcp); 10019 case AMDGPU::BI__builtin_amdgcn_rsq: 10020 case AMDGPU::BI__builtin_amdgcn_rsqf: 10021 case AMDGPU::BI__builtin_amdgcn_rsqh: 10022 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq); 10023 case AMDGPU::BI__builtin_amdgcn_rsq_clamp: 10024 case AMDGPU::BI__builtin_amdgcn_rsq_clampf: 10025 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq_clamp); 10026 case AMDGPU::BI__builtin_amdgcn_sinf: 10027 case AMDGPU::BI__builtin_amdgcn_sinh: 10028 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_sin); 10029 case AMDGPU::BI__builtin_amdgcn_cosf: 10030 case AMDGPU::BI__builtin_amdgcn_cosh: 10031 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_cos); 10032 case AMDGPU::BI__builtin_amdgcn_log_clampf: 10033 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_log_clamp); 10034 case AMDGPU::BI__builtin_amdgcn_ldexp: 10035 case AMDGPU::BI__builtin_amdgcn_ldexpf: 10036 case AMDGPU::BI__builtin_amdgcn_ldexph: 10037 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_ldexp); 10038 case AMDGPU::BI__builtin_amdgcn_frexp_mant: 10039 case AMDGPU::BI__builtin_amdgcn_frexp_mantf: 10040 case AMDGPU::BI__builtin_amdgcn_frexp_manth: 10041 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_frexp_mant); 10042 case AMDGPU::BI__builtin_amdgcn_frexp_exp: 10043 case AMDGPU::BI__builtin_amdgcn_frexp_expf: { 10044 Value *Src0 = EmitScalarExpr(E->getArg(0)); 10045 Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_frexp_exp, 10046 { Builder.getInt32Ty(), Src0->getType() }); 10047 return Builder.CreateCall(F, Src0); 10048 } 10049 case AMDGPU::BI__builtin_amdgcn_frexp_exph: { 10050 Value *Src0 = EmitScalarExpr(E->getArg(0)); 10051 Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_frexp_exp, 10052 { Builder.getInt16Ty(), Src0->getType() }); 10053 return Builder.CreateCall(F, Src0); 10054 } 10055 case AMDGPU::BI__builtin_amdgcn_fract: 10056 case AMDGPU::BI__builtin_amdgcn_fractf: 10057 case AMDGPU::BI__builtin_amdgcn_fracth: 10058 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_fract); 10059 case AMDGPU::BI__builtin_amdgcn_lerp: 10060 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_lerp); 10061 case AMDGPU::BI__builtin_amdgcn_uicmp: 10062 case AMDGPU::BI__builtin_amdgcn_uicmpl: 10063 case AMDGPU::BI__builtin_amdgcn_sicmp: 10064 case AMDGPU::BI__builtin_amdgcn_sicmpl: 10065 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_icmp); 10066 case AMDGPU::BI__builtin_amdgcn_fcmp: 10067 case AMDGPU::BI__builtin_amdgcn_fcmpf: 10068 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_fcmp); 10069 case AMDGPU::BI__builtin_amdgcn_class: 10070 case AMDGPU::BI__builtin_amdgcn_classf: 10071 case AMDGPU::BI__builtin_amdgcn_classh: 10072 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_class); 10073 case AMDGPU::BI__builtin_amdgcn_fmed3f: 10074 case AMDGPU::BI__builtin_amdgcn_fmed3h: 10075 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_fmed3); 10076 case AMDGPU::BI__builtin_amdgcn_read_exec: { 10077 CallInst *CI = cast<CallInst>( 10078 EmitSpecialRegisterBuiltin(*this, E, Int64Ty, Int64Ty, true, "exec")); 10079 CI->setConvergent(); 10080 return CI; 10081 } 10082 case AMDGPU::BI__builtin_amdgcn_read_exec_lo: 10083 case AMDGPU::BI__builtin_amdgcn_read_exec_hi: { 10084 StringRef RegName = BuiltinID == AMDGPU::BI__builtin_amdgcn_read_exec_lo ? 10085 "exec_lo" : "exec_hi"; 10086 CallInst *CI = cast<CallInst>( 10087 EmitSpecialRegisterBuiltin(*this, E, Int32Ty, Int32Ty, true, RegName)); 10088 CI->setConvergent(); 10089 return CI; 10090 } 10091 10092 // amdgcn workitem 10093 case AMDGPU::BI__builtin_amdgcn_workitem_id_x: 10094 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_x, 0, 1024); 10095 case AMDGPU::BI__builtin_amdgcn_workitem_id_y: 10096 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_y, 0, 1024); 10097 case AMDGPU::BI__builtin_amdgcn_workitem_id_z: 10098 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_z, 0, 1024); 10099 10100 // r600 intrinsics 10101 case AMDGPU::BI__builtin_r600_recipsqrt_ieee: 10102 case AMDGPU::BI__builtin_r600_recipsqrt_ieeef: 10103 return emitUnaryBuiltin(*this, E, Intrinsic::r600_recipsqrt_ieee); 10104 case AMDGPU::BI__builtin_r600_read_tidig_x: 10105 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_x, 0, 1024); 10106 case AMDGPU::BI__builtin_r600_read_tidig_y: 10107 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_y, 0, 1024); 10108 case AMDGPU::BI__builtin_r600_read_tidig_z: 10109 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_z, 0, 1024); 10110 default: 10111 return nullptr; 10112 } 10113 } 10114 10115 /// Handle a SystemZ function in which the final argument is a pointer 10116 /// to an int that receives the post-instruction CC value. At the LLVM level 10117 /// this is represented as a function that returns a {result, cc} pair. 10118 static Value *EmitSystemZIntrinsicWithCC(CodeGenFunction &CGF, 10119 unsigned IntrinsicID, 10120 const CallExpr *E) { 10121 unsigned NumArgs = E->getNumArgs() - 1; 10122 SmallVector<Value *, 8> Args(NumArgs); 10123 for (unsigned I = 0; I < NumArgs; ++I) 10124 Args[I] = CGF.EmitScalarExpr(E->getArg(I)); 10125 Address CCPtr = CGF.EmitPointerWithAlignment(E->getArg(NumArgs)); 10126 Value *F = CGF.CGM.getIntrinsic(IntrinsicID); 10127 Value *Call = CGF.Builder.CreateCall(F, Args); 10128 Value *CC = CGF.Builder.CreateExtractValue(Call, 1); 10129 CGF.Builder.CreateStore(CC, CCPtr); 10130 return CGF.Builder.CreateExtractValue(Call, 0); 10131 } 10132 10133 Value *CodeGenFunction::EmitSystemZBuiltinExpr(unsigned BuiltinID, 10134 const CallExpr *E) { 10135 switch (BuiltinID) { 10136 case SystemZ::BI__builtin_tbegin: { 10137 Value *TDB = EmitScalarExpr(E->getArg(0)); 10138 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 10139 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin); 10140 return Builder.CreateCall(F, {TDB, Control}); 10141 } 10142 case SystemZ::BI__builtin_tbegin_nofloat: { 10143 Value *TDB = EmitScalarExpr(E->getArg(0)); 10144 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 10145 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin_nofloat); 10146 return Builder.CreateCall(F, {TDB, Control}); 10147 } 10148 case SystemZ::BI__builtin_tbeginc: { 10149 Value *TDB = llvm::ConstantPointerNull::get(Int8PtrTy); 10150 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff08); 10151 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbeginc); 10152 return Builder.CreateCall(F, {TDB, Control}); 10153 } 10154 case SystemZ::BI__builtin_tabort: { 10155 Value *Data = EmitScalarExpr(E->getArg(0)); 10156 Value *F = CGM.getIntrinsic(Intrinsic::s390_tabort); 10157 return Builder.CreateCall(F, Builder.CreateSExt(Data, Int64Ty, "tabort")); 10158 } 10159 case SystemZ::BI__builtin_non_tx_store: { 10160 Value *Address = EmitScalarExpr(E->getArg(0)); 10161 Value *Data = EmitScalarExpr(E->getArg(1)); 10162 Value *F = CGM.getIntrinsic(Intrinsic::s390_ntstg); 10163 return Builder.CreateCall(F, {Data, Address}); 10164 } 10165 10166 // Vector builtins. Note that most vector builtins are mapped automatically 10167 // to target-specific LLVM intrinsics. The ones handled specially here can 10168 // be represented via standard LLVM IR, which is preferable to enable common 10169 // LLVM optimizations. 10170 10171 case SystemZ::BI__builtin_s390_vpopctb: 10172 case SystemZ::BI__builtin_s390_vpopcth: 10173 case SystemZ::BI__builtin_s390_vpopctf: 10174 case SystemZ::BI__builtin_s390_vpopctg: { 10175 llvm::Type *ResultType = ConvertType(E->getType()); 10176 Value *X = EmitScalarExpr(E->getArg(0)); 10177 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 10178 return Builder.CreateCall(F, X); 10179 } 10180 10181 case SystemZ::BI__builtin_s390_vclzb: 10182 case SystemZ::BI__builtin_s390_vclzh: 10183 case SystemZ::BI__builtin_s390_vclzf: 10184 case SystemZ::BI__builtin_s390_vclzg: { 10185 llvm::Type *ResultType = ConvertType(E->getType()); 10186 Value *X = EmitScalarExpr(E->getArg(0)); 10187 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 10188 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 10189 return Builder.CreateCall(F, {X, Undef}); 10190 } 10191 10192 case SystemZ::BI__builtin_s390_vctzb: 10193 case SystemZ::BI__builtin_s390_vctzh: 10194 case SystemZ::BI__builtin_s390_vctzf: 10195 case SystemZ::BI__builtin_s390_vctzg: { 10196 llvm::Type *ResultType = ConvertType(E->getType()); 10197 Value *X = EmitScalarExpr(E->getArg(0)); 10198 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 10199 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 10200 return Builder.CreateCall(F, {X, Undef}); 10201 } 10202 10203 case SystemZ::BI__builtin_s390_vfsqsb: 10204 case SystemZ::BI__builtin_s390_vfsqdb: { 10205 llvm::Type *ResultType = ConvertType(E->getType()); 10206 Value *X = EmitScalarExpr(E->getArg(0)); 10207 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, ResultType); 10208 return Builder.CreateCall(F, X); 10209 } 10210 case SystemZ::BI__builtin_s390_vfmasb: 10211 case SystemZ::BI__builtin_s390_vfmadb: { 10212 llvm::Type *ResultType = ConvertType(E->getType()); 10213 Value *X = EmitScalarExpr(E->getArg(0)); 10214 Value *Y = EmitScalarExpr(E->getArg(1)); 10215 Value *Z = EmitScalarExpr(E->getArg(2)); 10216 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 10217 return Builder.CreateCall(F, {X, Y, Z}); 10218 } 10219 case SystemZ::BI__builtin_s390_vfmssb: 10220 case SystemZ::BI__builtin_s390_vfmsdb: { 10221 llvm::Type *ResultType = ConvertType(E->getType()); 10222 Value *X = EmitScalarExpr(E->getArg(0)); 10223 Value *Y = EmitScalarExpr(E->getArg(1)); 10224 Value *Z = EmitScalarExpr(E->getArg(2)); 10225 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 10226 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 10227 return Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 10228 } 10229 case SystemZ::BI__builtin_s390_vfnmasb: 10230 case SystemZ::BI__builtin_s390_vfnmadb: { 10231 llvm::Type *ResultType = ConvertType(E->getType()); 10232 Value *X = EmitScalarExpr(E->getArg(0)); 10233 Value *Y = EmitScalarExpr(E->getArg(1)); 10234 Value *Z = EmitScalarExpr(E->getArg(2)); 10235 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 10236 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 10237 return Builder.CreateFSub(Zero, Builder.CreateCall(F, {X, Y, Z}), "sub"); 10238 } 10239 case SystemZ::BI__builtin_s390_vfnmssb: 10240 case SystemZ::BI__builtin_s390_vfnmsdb: { 10241 llvm::Type *ResultType = ConvertType(E->getType()); 10242 Value *X = EmitScalarExpr(E->getArg(0)); 10243 Value *Y = EmitScalarExpr(E->getArg(1)); 10244 Value *Z = EmitScalarExpr(E->getArg(2)); 10245 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 10246 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 10247 Value *NegZ = Builder.CreateFSub(Zero, Z, "sub"); 10248 return Builder.CreateFSub(Zero, Builder.CreateCall(F, {X, Y, NegZ})); 10249 } 10250 case SystemZ::BI__builtin_s390_vflpsb: 10251 case SystemZ::BI__builtin_s390_vflpdb: { 10252 llvm::Type *ResultType = ConvertType(E->getType()); 10253 Value *X = EmitScalarExpr(E->getArg(0)); 10254 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 10255 return Builder.CreateCall(F, X); 10256 } 10257 case SystemZ::BI__builtin_s390_vflnsb: 10258 case SystemZ::BI__builtin_s390_vflndb: { 10259 llvm::Type *ResultType = ConvertType(E->getType()); 10260 Value *X = EmitScalarExpr(E->getArg(0)); 10261 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 10262 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 10263 return Builder.CreateFSub(Zero, Builder.CreateCall(F, X), "sub"); 10264 } 10265 case SystemZ::BI__builtin_s390_vfisb: 10266 case SystemZ::BI__builtin_s390_vfidb: { 10267 llvm::Type *ResultType = ConvertType(E->getType()); 10268 Value *X = EmitScalarExpr(E->getArg(0)); 10269 // Constant-fold the M4 and M5 mask arguments. 10270 llvm::APSInt M4, M5; 10271 bool IsConstM4 = E->getArg(1)->isIntegerConstantExpr(M4, getContext()); 10272 bool IsConstM5 = E->getArg(2)->isIntegerConstantExpr(M5, getContext()); 10273 assert(IsConstM4 && IsConstM5 && "Constant arg isn't actually constant?"); 10274 (void)IsConstM4; (void)IsConstM5; 10275 // Check whether this instance can be represented via a LLVM standard 10276 // intrinsic. We only support some combinations of M4 and M5. 10277 Intrinsic::ID ID = Intrinsic::not_intrinsic; 10278 switch (M4.getZExtValue()) { 10279 default: break; 10280 case 0: // IEEE-inexact exception allowed 10281 switch (M5.getZExtValue()) { 10282 default: break; 10283 case 0: ID = Intrinsic::rint; break; 10284 } 10285 break; 10286 case 4: // IEEE-inexact exception suppressed 10287 switch (M5.getZExtValue()) { 10288 default: break; 10289 case 0: ID = Intrinsic::nearbyint; break; 10290 case 1: ID = Intrinsic::round; break; 10291 case 5: ID = Intrinsic::trunc; break; 10292 case 6: ID = Intrinsic::ceil; break; 10293 case 7: ID = Intrinsic::floor; break; 10294 } 10295 break; 10296 } 10297 if (ID != Intrinsic::not_intrinsic) { 10298 Function *F = CGM.getIntrinsic(ID, ResultType); 10299 return Builder.CreateCall(F, X); 10300 } 10301 switch (BuiltinID) { 10302 case SystemZ::BI__builtin_s390_vfisb: ID = Intrinsic::s390_vfisb; break; 10303 case SystemZ::BI__builtin_s390_vfidb: ID = Intrinsic::s390_vfidb; break; 10304 default: llvm_unreachable("Unknown BuiltinID"); 10305 } 10306 Function *F = CGM.getIntrinsic(ID); 10307 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 10308 Value *M5Value = llvm::ConstantInt::get(getLLVMContext(), M5); 10309 return Builder.CreateCall(F, {X, M4Value, M5Value}); 10310 } 10311 case SystemZ::BI__builtin_s390_vfmaxsb: 10312 case SystemZ::BI__builtin_s390_vfmaxdb: { 10313 llvm::Type *ResultType = ConvertType(E->getType()); 10314 Value *X = EmitScalarExpr(E->getArg(0)); 10315 Value *Y = EmitScalarExpr(E->getArg(1)); 10316 // Constant-fold the M4 mask argument. 10317 llvm::APSInt M4; 10318 bool IsConstM4 = E->getArg(2)->isIntegerConstantExpr(M4, getContext()); 10319 assert(IsConstM4 && "Constant arg isn't actually constant?"); 10320 (void)IsConstM4; 10321 // Check whether this instance can be represented via a LLVM standard 10322 // intrinsic. We only support some values of M4. 10323 Intrinsic::ID ID = Intrinsic::not_intrinsic; 10324 switch (M4.getZExtValue()) { 10325 default: break; 10326 case 4: ID = Intrinsic::maxnum; break; 10327 } 10328 if (ID != Intrinsic::not_intrinsic) { 10329 Function *F = CGM.getIntrinsic(ID, ResultType); 10330 return Builder.CreateCall(F, {X, Y}); 10331 } 10332 switch (BuiltinID) { 10333 case SystemZ::BI__builtin_s390_vfmaxsb: ID = Intrinsic::s390_vfmaxsb; break; 10334 case SystemZ::BI__builtin_s390_vfmaxdb: ID = Intrinsic::s390_vfmaxdb; break; 10335 default: llvm_unreachable("Unknown BuiltinID"); 10336 } 10337 Function *F = CGM.getIntrinsic(ID); 10338 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 10339 return Builder.CreateCall(F, {X, Y, M4Value}); 10340 } 10341 case SystemZ::BI__builtin_s390_vfminsb: 10342 case SystemZ::BI__builtin_s390_vfmindb: { 10343 llvm::Type *ResultType = ConvertType(E->getType()); 10344 Value *X = EmitScalarExpr(E->getArg(0)); 10345 Value *Y = EmitScalarExpr(E->getArg(1)); 10346 // Constant-fold the M4 mask argument. 10347 llvm::APSInt M4; 10348 bool IsConstM4 = E->getArg(2)->isIntegerConstantExpr(M4, getContext()); 10349 assert(IsConstM4 && "Constant arg isn't actually constant?"); 10350 (void)IsConstM4; 10351 // Check whether this instance can be represented via a LLVM standard 10352 // intrinsic. We only support some values of M4. 10353 Intrinsic::ID ID = Intrinsic::not_intrinsic; 10354 switch (M4.getZExtValue()) { 10355 default: break; 10356 case 4: ID = Intrinsic::minnum; break; 10357 } 10358 if (ID != Intrinsic::not_intrinsic) { 10359 Function *F = CGM.getIntrinsic(ID, ResultType); 10360 return Builder.CreateCall(F, {X, Y}); 10361 } 10362 switch (BuiltinID) { 10363 case SystemZ::BI__builtin_s390_vfminsb: ID = Intrinsic::s390_vfminsb; break; 10364 case SystemZ::BI__builtin_s390_vfmindb: ID = Intrinsic::s390_vfmindb; break; 10365 default: llvm_unreachable("Unknown BuiltinID"); 10366 } 10367 Function *F = CGM.getIntrinsic(ID); 10368 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 10369 return Builder.CreateCall(F, {X, Y, M4Value}); 10370 } 10371 10372 // Vector intrisincs that output the post-instruction CC value. 10373 10374 #define INTRINSIC_WITH_CC(NAME) \ 10375 case SystemZ::BI__builtin_##NAME: \ 10376 return EmitSystemZIntrinsicWithCC(*this, Intrinsic::NAME, E) 10377 10378 INTRINSIC_WITH_CC(s390_vpkshs); 10379 INTRINSIC_WITH_CC(s390_vpksfs); 10380 INTRINSIC_WITH_CC(s390_vpksgs); 10381 10382 INTRINSIC_WITH_CC(s390_vpklshs); 10383 INTRINSIC_WITH_CC(s390_vpklsfs); 10384 INTRINSIC_WITH_CC(s390_vpklsgs); 10385 10386 INTRINSIC_WITH_CC(s390_vceqbs); 10387 INTRINSIC_WITH_CC(s390_vceqhs); 10388 INTRINSIC_WITH_CC(s390_vceqfs); 10389 INTRINSIC_WITH_CC(s390_vceqgs); 10390 10391 INTRINSIC_WITH_CC(s390_vchbs); 10392 INTRINSIC_WITH_CC(s390_vchhs); 10393 INTRINSIC_WITH_CC(s390_vchfs); 10394 INTRINSIC_WITH_CC(s390_vchgs); 10395 10396 INTRINSIC_WITH_CC(s390_vchlbs); 10397 INTRINSIC_WITH_CC(s390_vchlhs); 10398 INTRINSIC_WITH_CC(s390_vchlfs); 10399 INTRINSIC_WITH_CC(s390_vchlgs); 10400 10401 INTRINSIC_WITH_CC(s390_vfaebs); 10402 INTRINSIC_WITH_CC(s390_vfaehs); 10403 INTRINSIC_WITH_CC(s390_vfaefs); 10404 10405 INTRINSIC_WITH_CC(s390_vfaezbs); 10406 INTRINSIC_WITH_CC(s390_vfaezhs); 10407 INTRINSIC_WITH_CC(s390_vfaezfs); 10408 10409 INTRINSIC_WITH_CC(s390_vfeebs); 10410 INTRINSIC_WITH_CC(s390_vfeehs); 10411 INTRINSIC_WITH_CC(s390_vfeefs); 10412 10413 INTRINSIC_WITH_CC(s390_vfeezbs); 10414 INTRINSIC_WITH_CC(s390_vfeezhs); 10415 INTRINSIC_WITH_CC(s390_vfeezfs); 10416 10417 INTRINSIC_WITH_CC(s390_vfenebs); 10418 INTRINSIC_WITH_CC(s390_vfenehs); 10419 INTRINSIC_WITH_CC(s390_vfenefs); 10420 10421 INTRINSIC_WITH_CC(s390_vfenezbs); 10422 INTRINSIC_WITH_CC(s390_vfenezhs); 10423 INTRINSIC_WITH_CC(s390_vfenezfs); 10424 10425 INTRINSIC_WITH_CC(s390_vistrbs); 10426 INTRINSIC_WITH_CC(s390_vistrhs); 10427 INTRINSIC_WITH_CC(s390_vistrfs); 10428 10429 INTRINSIC_WITH_CC(s390_vstrcbs); 10430 INTRINSIC_WITH_CC(s390_vstrchs); 10431 INTRINSIC_WITH_CC(s390_vstrcfs); 10432 10433 INTRINSIC_WITH_CC(s390_vstrczbs); 10434 INTRINSIC_WITH_CC(s390_vstrczhs); 10435 INTRINSIC_WITH_CC(s390_vstrczfs); 10436 10437 INTRINSIC_WITH_CC(s390_vfcesbs); 10438 INTRINSIC_WITH_CC(s390_vfcedbs); 10439 INTRINSIC_WITH_CC(s390_vfchsbs); 10440 INTRINSIC_WITH_CC(s390_vfchdbs); 10441 INTRINSIC_WITH_CC(s390_vfchesbs); 10442 INTRINSIC_WITH_CC(s390_vfchedbs); 10443 10444 INTRINSIC_WITH_CC(s390_vftcisb); 10445 INTRINSIC_WITH_CC(s390_vftcidb); 10446 10447 #undef INTRINSIC_WITH_CC 10448 10449 default: 10450 return nullptr; 10451 } 10452 } 10453 10454 Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, 10455 const CallExpr *E) { 10456 auto MakeLdg = [&](unsigned IntrinsicID) { 10457 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10458 clang::CharUnits Align = 10459 getNaturalPointeeTypeAlignment(E->getArg(0)->getType()); 10460 return Builder.CreateCall( 10461 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 10462 Ptr->getType()}), 10463 {Ptr, ConstantInt::get(Builder.getInt32Ty(), Align.getQuantity())}); 10464 }; 10465 auto MakeScopedAtomic = [&](unsigned IntrinsicID) { 10466 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10467 return Builder.CreateCall( 10468 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 10469 Ptr->getType()}), 10470 {Ptr, EmitScalarExpr(E->getArg(1))}); 10471 }; 10472 switch (BuiltinID) { 10473 case NVPTX::BI__nvvm_atom_add_gen_i: 10474 case NVPTX::BI__nvvm_atom_add_gen_l: 10475 case NVPTX::BI__nvvm_atom_add_gen_ll: 10476 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Add, E); 10477 10478 case NVPTX::BI__nvvm_atom_sub_gen_i: 10479 case NVPTX::BI__nvvm_atom_sub_gen_l: 10480 case NVPTX::BI__nvvm_atom_sub_gen_ll: 10481 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Sub, E); 10482 10483 case NVPTX::BI__nvvm_atom_and_gen_i: 10484 case NVPTX::BI__nvvm_atom_and_gen_l: 10485 case NVPTX::BI__nvvm_atom_and_gen_ll: 10486 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::And, E); 10487 10488 case NVPTX::BI__nvvm_atom_or_gen_i: 10489 case NVPTX::BI__nvvm_atom_or_gen_l: 10490 case NVPTX::BI__nvvm_atom_or_gen_ll: 10491 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Or, E); 10492 10493 case NVPTX::BI__nvvm_atom_xor_gen_i: 10494 case NVPTX::BI__nvvm_atom_xor_gen_l: 10495 case NVPTX::BI__nvvm_atom_xor_gen_ll: 10496 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xor, E); 10497 10498 case NVPTX::BI__nvvm_atom_xchg_gen_i: 10499 case NVPTX::BI__nvvm_atom_xchg_gen_l: 10500 case NVPTX::BI__nvvm_atom_xchg_gen_ll: 10501 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xchg, E); 10502 10503 case NVPTX::BI__nvvm_atom_max_gen_i: 10504 case NVPTX::BI__nvvm_atom_max_gen_l: 10505 case NVPTX::BI__nvvm_atom_max_gen_ll: 10506 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Max, E); 10507 10508 case NVPTX::BI__nvvm_atom_max_gen_ui: 10509 case NVPTX::BI__nvvm_atom_max_gen_ul: 10510 case NVPTX::BI__nvvm_atom_max_gen_ull: 10511 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMax, E); 10512 10513 case NVPTX::BI__nvvm_atom_min_gen_i: 10514 case NVPTX::BI__nvvm_atom_min_gen_l: 10515 case NVPTX::BI__nvvm_atom_min_gen_ll: 10516 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Min, E); 10517 10518 case NVPTX::BI__nvvm_atom_min_gen_ui: 10519 case NVPTX::BI__nvvm_atom_min_gen_ul: 10520 case NVPTX::BI__nvvm_atom_min_gen_ull: 10521 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMin, E); 10522 10523 case NVPTX::BI__nvvm_atom_cas_gen_i: 10524 case NVPTX::BI__nvvm_atom_cas_gen_l: 10525 case NVPTX::BI__nvvm_atom_cas_gen_ll: 10526 // __nvvm_atom_cas_gen_* should return the old value rather than the 10527 // success flag. 10528 return MakeAtomicCmpXchgValue(*this, E, /*ReturnBool=*/false); 10529 10530 case NVPTX::BI__nvvm_atom_add_gen_f: { 10531 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10532 Value *Val = EmitScalarExpr(E->getArg(1)); 10533 // atomicrmw only deals with integer arguments so we need to use 10534 // LLVM's nvvm_atomic_load_add_f32 intrinsic for that. 10535 Value *FnALAF32 = 10536 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f32, Ptr->getType()); 10537 return Builder.CreateCall(FnALAF32, {Ptr, Val}); 10538 } 10539 10540 case NVPTX::BI__nvvm_atom_add_gen_d: { 10541 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10542 Value *Val = EmitScalarExpr(E->getArg(1)); 10543 // atomicrmw only deals with integer arguments, so we need to use 10544 // LLVM's nvvm_atomic_load_add_f64 intrinsic. 10545 Value *FnALAF64 = 10546 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f64, Ptr->getType()); 10547 return Builder.CreateCall(FnALAF64, {Ptr, Val}); 10548 } 10549 10550 case NVPTX::BI__nvvm_atom_inc_gen_ui: { 10551 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10552 Value *Val = EmitScalarExpr(E->getArg(1)); 10553 Value *FnALI32 = 10554 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_inc_32, Ptr->getType()); 10555 return Builder.CreateCall(FnALI32, {Ptr, Val}); 10556 } 10557 10558 case NVPTX::BI__nvvm_atom_dec_gen_ui: { 10559 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10560 Value *Val = EmitScalarExpr(E->getArg(1)); 10561 Value *FnALD32 = 10562 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_dec_32, Ptr->getType()); 10563 return Builder.CreateCall(FnALD32, {Ptr, Val}); 10564 } 10565 10566 case NVPTX::BI__nvvm_ldg_c: 10567 case NVPTX::BI__nvvm_ldg_c2: 10568 case NVPTX::BI__nvvm_ldg_c4: 10569 case NVPTX::BI__nvvm_ldg_s: 10570 case NVPTX::BI__nvvm_ldg_s2: 10571 case NVPTX::BI__nvvm_ldg_s4: 10572 case NVPTX::BI__nvvm_ldg_i: 10573 case NVPTX::BI__nvvm_ldg_i2: 10574 case NVPTX::BI__nvvm_ldg_i4: 10575 case NVPTX::BI__nvvm_ldg_l: 10576 case NVPTX::BI__nvvm_ldg_ll: 10577 case NVPTX::BI__nvvm_ldg_ll2: 10578 case NVPTX::BI__nvvm_ldg_uc: 10579 case NVPTX::BI__nvvm_ldg_uc2: 10580 case NVPTX::BI__nvvm_ldg_uc4: 10581 case NVPTX::BI__nvvm_ldg_us: 10582 case NVPTX::BI__nvvm_ldg_us2: 10583 case NVPTX::BI__nvvm_ldg_us4: 10584 case NVPTX::BI__nvvm_ldg_ui: 10585 case NVPTX::BI__nvvm_ldg_ui2: 10586 case NVPTX::BI__nvvm_ldg_ui4: 10587 case NVPTX::BI__nvvm_ldg_ul: 10588 case NVPTX::BI__nvvm_ldg_ull: 10589 case NVPTX::BI__nvvm_ldg_ull2: 10590 // PTX Interoperability section 2.2: "For a vector with an even number of 10591 // elements, its alignment is set to number of elements times the alignment 10592 // of its member: n*alignof(t)." 10593 return MakeLdg(Intrinsic::nvvm_ldg_global_i); 10594 case NVPTX::BI__nvvm_ldg_f: 10595 case NVPTX::BI__nvvm_ldg_f2: 10596 case NVPTX::BI__nvvm_ldg_f4: 10597 case NVPTX::BI__nvvm_ldg_d: 10598 case NVPTX::BI__nvvm_ldg_d2: 10599 return MakeLdg(Intrinsic::nvvm_ldg_global_f); 10600 10601 case NVPTX::BI__nvvm_atom_cta_add_gen_i: 10602 case NVPTX::BI__nvvm_atom_cta_add_gen_l: 10603 case NVPTX::BI__nvvm_atom_cta_add_gen_ll: 10604 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_cta); 10605 case NVPTX::BI__nvvm_atom_sys_add_gen_i: 10606 case NVPTX::BI__nvvm_atom_sys_add_gen_l: 10607 case NVPTX::BI__nvvm_atom_sys_add_gen_ll: 10608 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_sys); 10609 case NVPTX::BI__nvvm_atom_cta_add_gen_f: 10610 case NVPTX::BI__nvvm_atom_cta_add_gen_d: 10611 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_cta); 10612 case NVPTX::BI__nvvm_atom_sys_add_gen_f: 10613 case NVPTX::BI__nvvm_atom_sys_add_gen_d: 10614 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_sys); 10615 case NVPTX::BI__nvvm_atom_cta_xchg_gen_i: 10616 case NVPTX::BI__nvvm_atom_cta_xchg_gen_l: 10617 case NVPTX::BI__nvvm_atom_cta_xchg_gen_ll: 10618 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_cta); 10619 case NVPTX::BI__nvvm_atom_sys_xchg_gen_i: 10620 case NVPTX::BI__nvvm_atom_sys_xchg_gen_l: 10621 case NVPTX::BI__nvvm_atom_sys_xchg_gen_ll: 10622 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_sys); 10623 case NVPTX::BI__nvvm_atom_cta_max_gen_i: 10624 case NVPTX::BI__nvvm_atom_cta_max_gen_ui: 10625 case NVPTX::BI__nvvm_atom_cta_max_gen_l: 10626 case NVPTX::BI__nvvm_atom_cta_max_gen_ul: 10627 case NVPTX::BI__nvvm_atom_cta_max_gen_ll: 10628 case NVPTX::BI__nvvm_atom_cta_max_gen_ull: 10629 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_cta); 10630 case NVPTX::BI__nvvm_atom_sys_max_gen_i: 10631 case NVPTX::BI__nvvm_atom_sys_max_gen_ui: 10632 case NVPTX::BI__nvvm_atom_sys_max_gen_l: 10633 case NVPTX::BI__nvvm_atom_sys_max_gen_ul: 10634 case NVPTX::BI__nvvm_atom_sys_max_gen_ll: 10635 case NVPTX::BI__nvvm_atom_sys_max_gen_ull: 10636 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_sys); 10637 case NVPTX::BI__nvvm_atom_cta_min_gen_i: 10638 case NVPTX::BI__nvvm_atom_cta_min_gen_ui: 10639 case NVPTX::BI__nvvm_atom_cta_min_gen_l: 10640 case NVPTX::BI__nvvm_atom_cta_min_gen_ul: 10641 case NVPTX::BI__nvvm_atom_cta_min_gen_ll: 10642 case NVPTX::BI__nvvm_atom_cta_min_gen_ull: 10643 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_cta); 10644 case NVPTX::BI__nvvm_atom_sys_min_gen_i: 10645 case NVPTX::BI__nvvm_atom_sys_min_gen_ui: 10646 case NVPTX::BI__nvvm_atom_sys_min_gen_l: 10647 case NVPTX::BI__nvvm_atom_sys_min_gen_ul: 10648 case NVPTX::BI__nvvm_atom_sys_min_gen_ll: 10649 case NVPTX::BI__nvvm_atom_sys_min_gen_ull: 10650 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_sys); 10651 case NVPTX::BI__nvvm_atom_cta_inc_gen_ui: 10652 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_cta); 10653 case NVPTX::BI__nvvm_atom_cta_dec_gen_ui: 10654 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_cta); 10655 case NVPTX::BI__nvvm_atom_sys_inc_gen_ui: 10656 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_sys); 10657 case NVPTX::BI__nvvm_atom_sys_dec_gen_ui: 10658 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_sys); 10659 case NVPTX::BI__nvvm_atom_cta_and_gen_i: 10660 case NVPTX::BI__nvvm_atom_cta_and_gen_l: 10661 case NVPTX::BI__nvvm_atom_cta_and_gen_ll: 10662 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_cta); 10663 case NVPTX::BI__nvvm_atom_sys_and_gen_i: 10664 case NVPTX::BI__nvvm_atom_sys_and_gen_l: 10665 case NVPTX::BI__nvvm_atom_sys_and_gen_ll: 10666 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_sys); 10667 case NVPTX::BI__nvvm_atom_cta_or_gen_i: 10668 case NVPTX::BI__nvvm_atom_cta_or_gen_l: 10669 case NVPTX::BI__nvvm_atom_cta_or_gen_ll: 10670 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_cta); 10671 case NVPTX::BI__nvvm_atom_sys_or_gen_i: 10672 case NVPTX::BI__nvvm_atom_sys_or_gen_l: 10673 case NVPTX::BI__nvvm_atom_sys_or_gen_ll: 10674 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_sys); 10675 case NVPTX::BI__nvvm_atom_cta_xor_gen_i: 10676 case NVPTX::BI__nvvm_atom_cta_xor_gen_l: 10677 case NVPTX::BI__nvvm_atom_cta_xor_gen_ll: 10678 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_cta); 10679 case NVPTX::BI__nvvm_atom_sys_xor_gen_i: 10680 case NVPTX::BI__nvvm_atom_sys_xor_gen_l: 10681 case NVPTX::BI__nvvm_atom_sys_xor_gen_ll: 10682 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_sys); 10683 case NVPTX::BI__nvvm_atom_cta_cas_gen_i: 10684 case NVPTX::BI__nvvm_atom_cta_cas_gen_l: 10685 case NVPTX::BI__nvvm_atom_cta_cas_gen_ll: { 10686 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10687 return Builder.CreateCall( 10688 CGM.getIntrinsic( 10689 Intrinsic::nvvm_atomic_cas_gen_i_cta, 10690 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 10691 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 10692 } 10693 case NVPTX::BI__nvvm_atom_sys_cas_gen_i: 10694 case NVPTX::BI__nvvm_atom_sys_cas_gen_l: 10695 case NVPTX::BI__nvvm_atom_sys_cas_gen_ll: { 10696 Value *Ptr = EmitScalarExpr(E->getArg(0)); 10697 return Builder.CreateCall( 10698 CGM.getIntrinsic( 10699 Intrinsic::nvvm_atomic_cas_gen_i_sys, 10700 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 10701 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 10702 } 10703 case NVPTX::BI__nvvm_match_all_sync_i32p: 10704 case NVPTX::BI__nvvm_match_all_sync_i64p: { 10705 Value *Mask = EmitScalarExpr(E->getArg(0)); 10706 Value *Val = EmitScalarExpr(E->getArg(1)); 10707 Address PredOutPtr = EmitPointerWithAlignment(E->getArg(2)); 10708 Value *ResultPair = Builder.CreateCall( 10709 CGM.getIntrinsic(BuiltinID == NVPTX::BI__nvvm_match_all_sync_i32p 10710 ? Intrinsic::nvvm_match_all_sync_i32p 10711 : Intrinsic::nvvm_match_all_sync_i64p), 10712 {Mask, Val}); 10713 Value *Pred = Builder.CreateZExt(Builder.CreateExtractValue(ResultPair, 1), 10714 PredOutPtr.getElementType()); 10715 Builder.CreateStore(Pred, PredOutPtr); 10716 return Builder.CreateExtractValue(ResultPair, 0); 10717 } 10718 case NVPTX::BI__hmma_m16n16k16_ld_a: 10719 case NVPTX::BI__hmma_m16n16k16_ld_b: 10720 case NVPTX::BI__hmma_m16n16k16_ld_c_f16: 10721 case NVPTX::BI__hmma_m16n16k16_ld_c_f32: 10722 case NVPTX::BI__hmma_m32n8k16_ld_a: 10723 case NVPTX::BI__hmma_m32n8k16_ld_b: 10724 case NVPTX::BI__hmma_m32n8k16_ld_c_f16: 10725 case NVPTX::BI__hmma_m32n8k16_ld_c_f32: 10726 case NVPTX::BI__hmma_m8n32k16_ld_a: 10727 case NVPTX::BI__hmma_m8n32k16_ld_b: 10728 case NVPTX::BI__hmma_m8n32k16_ld_c_f16: 10729 case NVPTX::BI__hmma_m8n32k16_ld_c_f32: { 10730 Address Dst = EmitPointerWithAlignment(E->getArg(0)); 10731 Value *Src = EmitScalarExpr(E->getArg(1)); 10732 Value *Ldm = EmitScalarExpr(E->getArg(2)); 10733 llvm::APSInt isColMajorArg; 10734 if (!E->getArg(3)->isIntegerConstantExpr(isColMajorArg, getContext())) 10735 return nullptr; 10736 bool isColMajor = isColMajorArg.getSExtValue(); 10737 unsigned IID; 10738 unsigned NumResults; 10739 switch (BuiltinID) { 10740 case NVPTX::BI__hmma_m16n16k16_ld_a: 10741 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_load_a_f16_col_stride 10742 : Intrinsic::nvvm_wmma_m16n16k16_load_a_f16_row_stride; 10743 NumResults = 8; 10744 break; 10745 case NVPTX::BI__hmma_m16n16k16_ld_b: 10746 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_load_b_f16_col_stride 10747 : Intrinsic::nvvm_wmma_m16n16k16_load_b_f16_row_stride; 10748 NumResults = 8; 10749 break; 10750 case NVPTX::BI__hmma_m16n16k16_ld_c_f16: 10751 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_load_c_f16_col_stride 10752 : Intrinsic::nvvm_wmma_m16n16k16_load_c_f16_row_stride; 10753 NumResults = 4; 10754 break; 10755 case NVPTX::BI__hmma_m16n16k16_ld_c_f32: 10756 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_load_c_f32_col_stride 10757 : Intrinsic::nvvm_wmma_m16n16k16_load_c_f32_row_stride; 10758 NumResults = 8; 10759 break; 10760 case NVPTX::BI__hmma_m32n8k16_ld_a: 10761 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_load_a_f16_col_stride 10762 : Intrinsic::nvvm_wmma_m32n8k16_load_a_f16_row_stride; 10763 NumResults = 8; 10764 break; 10765 case NVPTX::BI__hmma_m32n8k16_ld_b: 10766 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_load_b_f16_col_stride 10767 : Intrinsic::nvvm_wmma_m32n8k16_load_b_f16_row_stride; 10768 NumResults = 8; 10769 break; 10770 case NVPTX::BI__hmma_m32n8k16_ld_c_f16: 10771 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_load_c_f16_col_stride 10772 : Intrinsic::nvvm_wmma_m32n8k16_load_c_f16_row_stride; 10773 NumResults = 4; 10774 break; 10775 case NVPTX::BI__hmma_m32n8k16_ld_c_f32: 10776 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_load_c_f32_col_stride 10777 : Intrinsic::nvvm_wmma_m32n8k16_load_c_f32_row_stride; 10778 NumResults = 8; 10779 break; 10780 case NVPTX::BI__hmma_m8n32k16_ld_a: 10781 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_load_a_f16_col_stride 10782 : Intrinsic::nvvm_wmma_m8n32k16_load_a_f16_row_stride; 10783 NumResults = 8; 10784 break; 10785 case NVPTX::BI__hmma_m8n32k16_ld_b: 10786 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_load_b_f16_col_stride 10787 : Intrinsic::nvvm_wmma_m8n32k16_load_b_f16_row_stride; 10788 NumResults = 8; 10789 break; 10790 case NVPTX::BI__hmma_m8n32k16_ld_c_f16: 10791 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_load_c_f16_col_stride 10792 : Intrinsic::nvvm_wmma_m8n32k16_load_c_f16_row_stride; 10793 NumResults = 4; 10794 break; 10795 case NVPTX::BI__hmma_m8n32k16_ld_c_f32: 10796 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_load_c_f32_col_stride 10797 : Intrinsic::nvvm_wmma_m8n32k16_load_c_f32_row_stride; 10798 NumResults = 8; 10799 break; 10800 default: 10801 llvm_unreachable("Unexpected builtin ID."); 10802 } 10803 Value *Result = 10804 Builder.CreateCall(CGM.getIntrinsic(IID, Src->getType()), {Src, Ldm}); 10805 10806 // Save returned values. 10807 for (unsigned i = 0; i < NumResults; ++i) { 10808 Builder.CreateAlignedStore( 10809 Builder.CreateBitCast(Builder.CreateExtractValue(Result, i), 10810 Dst.getElementType()), 10811 Builder.CreateGEP(Dst.getPointer(), llvm::ConstantInt::get(IntTy, i)), 10812 CharUnits::fromQuantity(4)); 10813 } 10814 return Result; 10815 } 10816 10817 case NVPTX::BI__hmma_m16n16k16_st_c_f16: 10818 case NVPTX::BI__hmma_m16n16k16_st_c_f32: 10819 case NVPTX::BI__hmma_m32n8k16_st_c_f16: 10820 case NVPTX::BI__hmma_m32n8k16_st_c_f32: 10821 case NVPTX::BI__hmma_m8n32k16_st_c_f16: 10822 case NVPTX::BI__hmma_m8n32k16_st_c_f32: { 10823 Value *Dst = EmitScalarExpr(E->getArg(0)); 10824 Address Src = EmitPointerWithAlignment(E->getArg(1)); 10825 Value *Ldm = EmitScalarExpr(E->getArg(2)); 10826 llvm::APSInt isColMajorArg; 10827 if (!E->getArg(3)->isIntegerConstantExpr(isColMajorArg, getContext())) 10828 return nullptr; 10829 bool isColMajor = isColMajorArg.getSExtValue(); 10830 unsigned IID; 10831 unsigned NumResults = 8; 10832 // PTX Instructions (and LLVM instrinsics) are defined for slice _d_, yet 10833 // for some reason nvcc builtins use _c_. 10834 switch (BuiltinID) { 10835 case NVPTX::BI__hmma_m16n16k16_st_c_f16: 10836 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_store_d_f16_col_stride 10837 : Intrinsic::nvvm_wmma_m16n16k16_store_d_f16_row_stride; 10838 NumResults = 4; 10839 break; 10840 case NVPTX::BI__hmma_m16n16k16_st_c_f32: 10841 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_store_d_f32_col_stride 10842 : Intrinsic::nvvm_wmma_m16n16k16_store_d_f32_row_stride; 10843 break; 10844 case NVPTX::BI__hmma_m32n8k16_st_c_f16: 10845 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_store_d_f16_col_stride 10846 : Intrinsic::nvvm_wmma_m32n8k16_store_d_f16_row_stride; 10847 NumResults = 4; 10848 break; 10849 case NVPTX::BI__hmma_m32n8k16_st_c_f32: 10850 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_store_d_f32_col_stride 10851 : Intrinsic::nvvm_wmma_m32n8k16_store_d_f32_row_stride; 10852 break; 10853 case NVPTX::BI__hmma_m8n32k16_st_c_f16: 10854 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_store_d_f16_col_stride 10855 : Intrinsic::nvvm_wmma_m8n32k16_store_d_f16_row_stride; 10856 NumResults = 4; 10857 break; 10858 case NVPTX::BI__hmma_m8n32k16_st_c_f32: 10859 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_store_d_f32_col_stride 10860 : Intrinsic::nvvm_wmma_m8n32k16_store_d_f32_row_stride; 10861 break; 10862 default: 10863 llvm_unreachable("Unexpected builtin ID."); 10864 } 10865 Function *Intrinsic = CGM.getIntrinsic(IID, Dst->getType()); 10866 llvm::Type *ParamType = Intrinsic->getFunctionType()->getParamType(1); 10867 SmallVector<Value *, 10> Values = {Dst}; 10868 for (unsigned i = 0; i < NumResults; ++i) { 10869 Value *V = Builder.CreateAlignedLoad( 10870 Builder.CreateGEP(Src.getPointer(), llvm::ConstantInt::get(IntTy, i)), 10871 CharUnits::fromQuantity(4)); 10872 Values.push_back(Builder.CreateBitCast(V, ParamType)); 10873 } 10874 Values.push_back(Ldm); 10875 Value *Result = Builder.CreateCall(Intrinsic, Values); 10876 return Result; 10877 } 10878 10879 // BI__hmma_m16n16k16_mma_<Dtype><CType>(d, a, b, c, layout, satf) --> 10880 // Intrinsic::nvvm_wmma_m16n16k16_mma_sync<layout A,B><DType><CType><Satf> 10881 case NVPTX::BI__hmma_m16n16k16_mma_f16f16: 10882 case NVPTX::BI__hmma_m16n16k16_mma_f32f16: 10883 case NVPTX::BI__hmma_m16n16k16_mma_f32f32: 10884 case NVPTX::BI__hmma_m16n16k16_mma_f16f32: 10885 case NVPTX::BI__hmma_m32n8k16_mma_f16f16: 10886 case NVPTX::BI__hmma_m32n8k16_mma_f32f16: 10887 case NVPTX::BI__hmma_m32n8k16_mma_f32f32: 10888 case NVPTX::BI__hmma_m32n8k16_mma_f16f32: 10889 case NVPTX::BI__hmma_m8n32k16_mma_f16f16: 10890 case NVPTX::BI__hmma_m8n32k16_mma_f32f16: 10891 case NVPTX::BI__hmma_m8n32k16_mma_f32f32: 10892 case NVPTX::BI__hmma_m8n32k16_mma_f16f32: { 10893 Address Dst = EmitPointerWithAlignment(E->getArg(0)); 10894 Address SrcA = EmitPointerWithAlignment(E->getArg(1)); 10895 Address SrcB = EmitPointerWithAlignment(E->getArg(2)); 10896 Address SrcC = EmitPointerWithAlignment(E->getArg(3)); 10897 llvm::APSInt LayoutArg; 10898 if (!E->getArg(4)->isIntegerConstantExpr(LayoutArg, getContext())) 10899 return nullptr; 10900 int Layout = LayoutArg.getSExtValue(); 10901 if (Layout < 0 || Layout > 3) 10902 return nullptr; 10903 llvm::APSInt SatfArg; 10904 if (!E->getArg(5)->isIntegerConstantExpr(SatfArg, getContext())) 10905 return nullptr; 10906 bool Satf = SatfArg.getSExtValue(); 10907 10908 // clang-format off 10909 #define MMA_VARIANTS(geom, type) {{ \ 10910 Intrinsic::nvvm_wmma_##geom##_mma_row_row_##type, \ 10911 Intrinsic::nvvm_wmma_##geom##_mma_row_row_##type##_satfinite, \ 10912 Intrinsic::nvvm_wmma_##geom##_mma_row_col_##type, \ 10913 Intrinsic::nvvm_wmma_##geom##_mma_row_col_##type##_satfinite, \ 10914 Intrinsic::nvvm_wmma_##geom##_mma_col_row_##type, \ 10915 Intrinsic::nvvm_wmma_##geom##_mma_col_row_##type##_satfinite, \ 10916 Intrinsic::nvvm_wmma_##geom##_mma_col_col_##type, \ 10917 Intrinsic::nvvm_wmma_##geom##_mma_col_col_##type##_satfinite \ 10918 }} 10919 // clang-format on 10920 10921 auto getMMAIntrinsic = [Layout, Satf](std::array<unsigned, 8> Variants) { 10922 unsigned Index = Layout * 2 + Satf; 10923 assert(Index < 8); 10924 return Variants[Index]; 10925 }; 10926 unsigned IID; 10927 unsigned NumEltsC; 10928 unsigned NumEltsD; 10929 switch (BuiltinID) { 10930 case NVPTX::BI__hmma_m16n16k16_mma_f16f16: 10931 IID = getMMAIntrinsic(MMA_VARIANTS(m16n16k16, f16_f16)); 10932 NumEltsC = 4; 10933 NumEltsD = 4; 10934 break; 10935 case NVPTX::BI__hmma_m16n16k16_mma_f32f16: 10936 IID = getMMAIntrinsic(MMA_VARIANTS(m16n16k16, f32_f16)); 10937 NumEltsC = 4; 10938 NumEltsD = 8; 10939 break; 10940 case NVPTX::BI__hmma_m16n16k16_mma_f16f32: 10941 IID = getMMAIntrinsic(MMA_VARIANTS(m16n16k16, f16_f32)); 10942 NumEltsC = 8; 10943 NumEltsD = 4; 10944 break; 10945 case NVPTX::BI__hmma_m16n16k16_mma_f32f32: 10946 IID = getMMAIntrinsic(MMA_VARIANTS(m16n16k16, f32_f32)); 10947 NumEltsC = 8; 10948 NumEltsD = 8; 10949 break; 10950 case NVPTX::BI__hmma_m32n8k16_mma_f16f16: 10951 IID = getMMAIntrinsic(MMA_VARIANTS(m32n8k16, f16_f16)); 10952 NumEltsC = 4; 10953 NumEltsD = 4; 10954 break; 10955 case NVPTX::BI__hmma_m32n8k16_mma_f32f16: 10956 IID = getMMAIntrinsic(MMA_VARIANTS(m32n8k16, f32_f16)); 10957 NumEltsC = 4; 10958 NumEltsD = 8; 10959 break; 10960 case NVPTX::BI__hmma_m32n8k16_mma_f16f32: 10961 IID = getMMAIntrinsic(MMA_VARIANTS(m32n8k16, f16_f32)); 10962 NumEltsC = 8; 10963 NumEltsD = 4; 10964 break; 10965 case NVPTX::BI__hmma_m32n8k16_mma_f32f32: 10966 IID = getMMAIntrinsic(MMA_VARIANTS(m32n8k16, f32_f32)); 10967 NumEltsC = 8; 10968 NumEltsD = 8; 10969 break; 10970 case NVPTX::BI__hmma_m8n32k16_mma_f16f16: 10971 IID = getMMAIntrinsic(MMA_VARIANTS(m8n32k16, f16_f16)); 10972 NumEltsC = 4; 10973 NumEltsD = 4; 10974 break; 10975 case NVPTX::BI__hmma_m8n32k16_mma_f32f16: 10976 IID = getMMAIntrinsic(MMA_VARIANTS(m8n32k16, f32_f16)); 10977 NumEltsC = 4; 10978 NumEltsD = 8; 10979 break; 10980 case NVPTX::BI__hmma_m8n32k16_mma_f16f32: 10981 IID = getMMAIntrinsic(MMA_VARIANTS(m8n32k16, f16_f32)); 10982 NumEltsC = 8; 10983 NumEltsD = 4; 10984 break; 10985 case NVPTX::BI__hmma_m8n32k16_mma_f32f32: 10986 IID = getMMAIntrinsic(MMA_VARIANTS(m8n32k16, f32_f32)); 10987 NumEltsC = 8; 10988 NumEltsD = 8; 10989 break; 10990 default: 10991 llvm_unreachable("Unexpected builtin ID."); 10992 } 10993 #undef MMA_VARIANTS 10994 10995 SmallVector<Value *, 24> Values; 10996 Function *Intrinsic = CGM.getIntrinsic(IID); 10997 llvm::Type *ABType = Intrinsic->getFunctionType()->getParamType(0); 10998 // Load A 10999 for (unsigned i = 0; i < 8; ++i) { 11000 Value *V = Builder.CreateAlignedLoad( 11001 Builder.CreateGEP(SrcA.getPointer(), 11002 llvm::ConstantInt::get(IntTy, i)), 11003 CharUnits::fromQuantity(4)); 11004 Values.push_back(Builder.CreateBitCast(V, ABType)); 11005 } 11006 // Load B 11007 for (unsigned i = 0; i < 8; ++i) { 11008 Value *V = Builder.CreateAlignedLoad( 11009 Builder.CreateGEP(SrcB.getPointer(), 11010 llvm::ConstantInt::get(IntTy, i)), 11011 CharUnits::fromQuantity(4)); 11012 Values.push_back(Builder.CreateBitCast(V, ABType)); 11013 } 11014 // Load C 11015 llvm::Type *CType = Intrinsic->getFunctionType()->getParamType(16); 11016 for (unsigned i = 0; i < NumEltsC; ++i) { 11017 Value *V = Builder.CreateAlignedLoad( 11018 Builder.CreateGEP(SrcC.getPointer(), 11019 llvm::ConstantInt::get(IntTy, i)), 11020 CharUnits::fromQuantity(4)); 11021 Values.push_back(Builder.CreateBitCast(V, CType)); 11022 } 11023 Value *Result = Builder.CreateCall(Intrinsic, Values); 11024 llvm::Type *DType = Dst.getElementType(); 11025 for (unsigned i = 0; i < NumEltsD; ++i) 11026 Builder.CreateAlignedStore( 11027 Builder.CreateBitCast(Builder.CreateExtractValue(Result, i), DType), 11028 Builder.CreateGEP(Dst.getPointer(), llvm::ConstantInt::get(IntTy, i)), 11029 CharUnits::fromQuantity(4)); 11030 return Result; 11031 } 11032 default: 11033 return nullptr; 11034 } 11035 } 11036 11037 Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, 11038 const CallExpr *E) { 11039 switch (BuiltinID) { 11040 case WebAssembly::BI__builtin_wasm_mem_size: { 11041 llvm::Type *ResultType = ConvertType(E->getType()); 11042 Value *I = EmitScalarExpr(E->getArg(0)); 11043 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_mem_size, ResultType); 11044 return Builder.CreateCall(Callee, I); 11045 } 11046 case WebAssembly::BI__builtin_wasm_mem_grow: { 11047 llvm::Type *ResultType = ConvertType(E->getType()); 11048 Value *Args[] = { 11049 EmitScalarExpr(E->getArg(0)), 11050 EmitScalarExpr(E->getArg(1)) 11051 }; 11052 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_mem_grow, ResultType); 11053 return Builder.CreateCall(Callee, Args); 11054 } 11055 case WebAssembly::BI__builtin_wasm_current_memory: { 11056 llvm::Type *ResultType = ConvertType(E->getType()); 11057 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_current_memory, ResultType); 11058 return Builder.CreateCall(Callee); 11059 } 11060 case WebAssembly::BI__builtin_wasm_grow_memory: { 11061 Value *X = EmitScalarExpr(E->getArg(0)); 11062 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_grow_memory, X->getType()); 11063 return Builder.CreateCall(Callee, X); 11064 } 11065 case WebAssembly::BI__builtin_wasm_throw: { 11066 Value *Tag = EmitScalarExpr(E->getArg(0)); 11067 Value *Obj = EmitScalarExpr(E->getArg(1)); 11068 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_throw); 11069 return Builder.CreateCall(Callee, {Tag, Obj}); 11070 } 11071 case WebAssembly::BI__builtin_wasm_rethrow: { 11072 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_rethrow); 11073 return Builder.CreateCall(Callee); 11074 } 11075 11076 default: 11077 return nullptr; 11078 } 11079 } 11080 11081 Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, 11082 const CallExpr *E) { 11083 SmallVector<llvm::Value *, 4> Ops; 11084 Intrinsic::ID ID = Intrinsic::not_intrinsic; 11085 11086 auto MakeCircLd = [&](unsigned IntID, bool HasImm) { 11087 // The base pointer is passed by address, so it needs to be loaded. 11088 Address BP = EmitPointerWithAlignment(E->getArg(0)); 11089 BP = Address(Builder.CreateBitCast(BP.getPointer(), Int8PtrPtrTy), 11090 BP.getAlignment()); 11091 llvm::Value *Base = Builder.CreateLoad(BP); 11092 // Operands are Base, Increment, Modifier, Start. 11093 if (HasImm) 11094 Ops = { Base, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2)), 11095 EmitScalarExpr(E->getArg(3)) }; 11096 else 11097 Ops = { Base, EmitScalarExpr(E->getArg(1)), 11098 EmitScalarExpr(E->getArg(2)) }; 11099 11100 llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops); 11101 llvm::Value *NewBase = Builder.CreateExtractValue(Result, 1); 11102 llvm::Value *LV = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), 11103 NewBase->getType()->getPointerTo()); 11104 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 11105 // The intrinsic generates two results. The new value for the base pointer 11106 // needs to be stored. 11107 Builder.CreateAlignedStore(NewBase, LV, Dest.getAlignment()); 11108 return Builder.CreateExtractValue(Result, 0); 11109 }; 11110 11111 auto MakeCircSt = [&](unsigned IntID, bool HasImm) { 11112 // The base pointer is passed by address, so it needs to be loaded. 11113 Address BP = EmitPointerWithAlignment(E->getArg(0)); 11114 BP = Address(Builder.CreateBitCast(BP.getPointer(), Int8PtrPtrTy), 11115 BP.getAlignment()); 11116 llvm::Value *Base = Builder.CreateLoad(BP); 11117 // Operands are Base, Increment, Modifier, Value, Start. 11118 if (HasImm) 11119 Ops = { Base, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2)), 11120 EmitScalarExpr(E->getArg(3)), EmitScalarExpr(E->getArg(4)) }; 11121 else 11122 Ops = { Base, EmitScalarExpr(E->getArg(1)), 11123 EmitScalarExpr(E->getArg(2)), EmitScalarExpr(E->getArg(3)) }; 11124 11125 llvm::Value *NewBase = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops); 11126 llvm::Value *LV = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), 11127 NewBase->getType()->getPointerTo()); 11128 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 11129 // The intrinsic generates one result, which is the new value for the base 11130 // pointer. It needs to be stored. 11131 return Builder.CreateAlignedStore(NewBase, LV, Dest.getAlignment()); 11132 }; 11133 11134 // Handle the conversion of bit-reverse load intrinsics to bit code. 11135 // The intrinsic call after this function only reads from memory and the 11136 // write to memory is dealt by the store instruction. 11137 auto MakeBrevLd = [&](unsigned IntID, llvm::Type *DestTy) { 11138 // The intrinsic generates one result, which is the new value for the base 11139 // pointer. It needs to be returned. The result of the load instruction is 11140 // passed to intrinsic by address, so the value needs to be stored. 11141 llvm::Value *BaseAddress = 11142 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int8PtrTy); 11143 11144 // Expressions like &(*pt++) will be incremented per evaluation. 11145 // EmitPointerWithAlignment and EmitScalarExpr evaluates the expression 11146 // per call. 11147 Address DestAddr = EmitPointerWithAlignment(E->getArg(1)); 11148 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), Int8PtrTy), 11149 DestAddr.getAlignment()); 11150 llvm::Value *DestAddress = DestAddr.getPointer(); 11151 11152 // Operands are Base, Dest, Modifier. 11153 // The intrinsic format in LLVM IR is defined as 11154 // { ValueType, i8* } (i8*, i32). 11155 Ops = {BaseAddress, EmitScalarExpr(E->getArg(2))}; 11156 11157 llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops); 11158 // The value needs to be stored as the variable is passed by reference. 11159 llvm::Value *DestVal = Builder.CreateExtractValue(Result, 0); 11160 11161 // The store needs to be truncated to fit the destination type. 11162 // While i32 and i64 are natively supported on Hexagon, i8 and i16 needs 11163 // to be handled with stores of respective destination type. 11164 DestVal = Builder.CreateTrunc(DestVal, DestTy); 11165 11166 llvm::Value *DestForStore = 11167 Builder.CreateBitCast(DestAddress, DestVal->getType()->getPointerTo()); 11168 Builder.CreateAlignedStore(DestVal, DestForStore, DestAddr.getAlignment()); 11169 // The updated value of the base pointer is returned. 11170 return Builder.CreateExtractValue(Result, 1); 11171 }; 11172 11173 switch (BuiltinID) { 11174 case Hexagon::BI__builtin_HEXAGON_V6_vaddcarry: 11175 case Hexagon::BI__builtin_HEXAGON_V6_vaddcarry_128B: { 11176 Address Dest = EmitPointerWithAlignment(E->getArg(2)); 11177 unsigned Size; 11178 if (BuiltinID == Hexagon::BI__builtin_HEXAGON_V6_vaddcarry) { 11179 Size = 512; 11180 ID = Intrinsic::hexagon_V6_vaddcarry; 11181 } else { 11182 Size = 1024; 11183 ID = Intrinsic::hexagon_V6_vaddcarry_128B; 11184 } 11185 Dest = Builder.CreateBitCast(Dest, 11186 llvm::VectorType::get(Builder.getInt1Ty(), Size)->getPointerTo(0)); 11187 LoadInst *QLd = Builder.CreateLoad(Dest); 11188 Ops = { EmitScalarExpr(E->getArg(0)), EmitScalarExpr(E->getArg(1)), QLd }; 11189 llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 11190 llvm::Value *Vprd = Builder.CreateExtractValue(Result, 1); 11191 llvm::Value *Base = Builder.CreateBitCast(EmitScalarExpr(E->getArg(2)), 11192 Vprd->getType()->getPointerTo(0)); 11193 Builder.CreateAlignedStore(Vprd, Base, Dest.getAlignment()); 11194 return Builder.CreateExtractValue(Result, 0); 11195 } 11196 case Hexagon::BI__builtin_HEXAGON_V6_vsubcarry: 11197 case Hexagon::BI__builtin_HEXAGON_V6_vsubcarry_128B: { 11198 Address Dest = EmitPointerWithAlignment(E->getArg(2)); 11199 unsigned Size; 11200 if (BuiltinID == Hexagon::BI__builtin_HEXAGON_V6_vsubcarry) { 11201 Size = 512; 11202 ID = Intrinsic::hexagon_V6_vsubcarry; 11203 } else { 11204 Size = 1024; 11205 ID = Intrinsic::hexagon_V6_vsubcarry_128B; 11206 } 11207 Dest = Builder.CreateBitCast(Dest, 11208 llvm::VectorType::get(Builder.getInt1Ty(), Size)->getPointerTo(0)); 11209 LoadInst *QLd = Builder.CreateLoad(Dest); 11210 Ops = { EmitScalarExpr(E->getArg(0)), EmitScalarExpr(E->getArg(1)), QLd }; 11211 llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 11212 llvm::Value *Vprd = Builder.CreateExtractValue(Result, 1); 11213 llvm::Value *Base = Builder.CreateBitCast(EmitScalarExpr(E->getArg(2)), 11214 Vprd->getType()->getPointerTo(0)); 11215 Builder.CreateAlignedStore(Vprd, Base, Dest.getAlignment()); 11216 return Builder.CreateExtractValue(Result, 0); 11217 } 11218 case Hexagon::BI__builtin_HEXAGON_L2_loadrub_pci: 11219 return MakeCircLd(Intrinsic::hexagon_L2_loadrub_pci, /*HasImm*/true); 11220 case Hexagon::BI__builtin_HEXAGON_L2_loadrb_pci: 11221 return MakeCircLd(Intrinsic::hexagon_L2_loadrb_pci, /*HasImm*/true); 11222 case Hexagon::BI__builtin_HEXAGON_L2_loadruh_pci: 11223 return MakeCircLd(Intrinsic::hexagon_L2_loadruh_pci, /*HasImm*/true); 11224 case Hexagon::BI__builtin_HEXAGON_L2_loadrh_pci: 11225 return MakeCircLd(Intrinsic::hexagon_L2_loadrh_pci, /*HasImm*/true); 11226 case Hexagon::BI__builtin_HEXAGON_L2_loadri_pci: 11227 return MakeCircLd(Intrinsic::hexagon_L2_loadri_pci, /*HasImm*/true); 11228 case Hexagon::BI__builtin_HEXAGON_L2_loadrd_pci: 11229 return MakeCircLd(Intrinsic::hexagon_L2_loadrd_pci, /*HasImm*/true); 11230 case Hexagon::BI__builtin_HEXAGON_L2_loadrub_pcr: 11231 return MakeCircLd(Intrinsic::hexagon_L2_loadrub_pcr, /*HasImm*/false); 11232 case Hexagon::BI__builtin_HEXAGON_L2_loadrb_pcr: 11233 return MakeCircLd(Intrinsic::hexagon_L2_loadrb_pcr, /*HasImm*/false); 11234 case Hexagon::BI__builtin_HEXAGON_L2_loadruh_pcr: 11235 return MakeCircLd(Intrinsic::hexagon_L2_loadruh_pcr, /*HasImm*/false); 11236 case Hexagon::BI__builtin_HEXAGON_L2_loadrh_pcr: 11237 return MakeCircLd(Intrinsic::hexagon_L2_loadrh_pcr, /*HasImm*/false); 11238 case Hexagon::BI__builtin_HEXAGON_L2_loadri_pcr: 11239 return MakeCircLd(Intrinsic::hexagon_L2_loadri_pcr, /*HasImm*/false); 11240 case Hexagon::BI__builtin_HEXAGON_L2_loadrd_pcr: 11241 return MakeCircLd(Intrinsic::hexagon_L2_loadrd_pcr, /*HasImm*/false); 11242 case Hexagon::BI__builtin_HEXAGON_S2_storerb_pci: 11243 return MakeCircSt(Intrinsic::hexagon_S2_storerb_pci, /*HasImm*/true); 11244 case Hexagon::BI__builtin_HEXAGON_S2_storerh_pci: 11245 return MakeCircSt(Intrinsic::hexagon_S2_storerh_pci, /*HasImm*/true); 11246 case Hexagon::BI__builtin_HEXAGON_S2_storerf_pci: 11247 return MakeCircSt(Intrinsic::hexagon_S2_storerf_pci, /*HasImm*/true); 11248 case Hexagon::BI__builtin_HEXAGON_S2_storeri_pci: 11249 return MakeCircSt(Intrinsic::hexagon_S2_storeri_pci, /*HasImm*/true); 11250 case Hexagon::BI__builtin_HEXAGON_S2_storerd_pci: 11251 return MakeCircSt(Intrinsic::hexagon_S2_storerd_pci, /*HasImm*/true); 11252 case Hexagon::BI__builtin_HEXAGON_S2_storerb_pcr: 11253 return MakeCircSt(Intrinsic::hexagon_S2_storerb_pcr, /*HasImm*/false); 11254 case Hexagon::BI__builtin_HEXAGON_S2_storerh_pcr: 11255 return MakeCircSt(Intrinsic::hexagon_S2_storerh_pcr, /*HasImm*/false); 11256 case Hexagon::BI__builtin_HEXAGON_S2_storerf_pcr: 11257 return MakeCircSt(Intrinsic::hexagon_S2_storerf_pcr, /*HasImm*/false); 11258 case Hexagon::BI__builtin_HEXAGON_S2_storeri_pcr: 11259 return MakeCircSt(Intrinsic::hexagon_S2_storeri_pcr, /*HasImm*/false); 11260 case Hexagon::BI__builtin_HEXAGON_S2_storerd_pcr: 11261 return MakeCircSt(Intrinsic::hexagon_S2_storerd_pcr, /*HasImm*/false); 11262 case Hexagon::BI__builtin_brev_ldub: 11263 return MakeBrevLd(Intrinsic::hexagon_L2_loadrub_pbr, Int8Ty); 11264 case Hexagon::BI__builtin_brev_ldb: 11265 return MakeBrevLd(Intrinsic::hexagon_L2_loadrb_pbr, Int8Ty); 11266 case Hexagon::BI__builtin_brev_lduh: 11267 return MakeBrevLd(Intrinsic::hexagon_L2_loadruh_pbr, Int16Ty); 11268 case Hexagon::BI__builtin_brev_ldh: 11269 return MakeBrevLd(Intrinsic::hexagon_L2_loadrh_pbr, Int16Ty); 11270 case Hexagon::BI__builtin_brev_ldw: 11271 return MakeBrevLd(Intrinsic::hexagon_L2_loadri_pbr, Int32Ty); 11272 case Hexagon::BI__builtin_brev_ldd: 11273 return MakeBrevLd(Intrinsic::hexagon_L2_loadrd_pbr, Int64Ty); 11274 default: 11275 break; 11276 } // switch 11277 11278 return nullptr; 11279 } 11280