1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This contains code to emit Builtin calls as LLVM code. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "CGCXXABI.h" 14 #include "CGObjCRuntime.h" 15 #include "CGOpenCLRuntime.h" 16 #include "CGRecordLayout.h" 17 #include "CodeGenFunction.h" 18 #include "CodeGenModule.h" 19 #include "ConstantEmitter.h" 20 #include "TargetInfo.h" 21 #include "clang/AST/ASTContext.h" 22 #include "clang/AST/Decl.h" 23 #include "clang/AST/OSLog.h" 24 #include "clang/Basic/TargetBuiltins.h" 25 #include "clang/Basic/TargetInfo.h" 26 #include "clang/CodeGen/CGFunctionInfo.h" 27 #include "llvm/ADT/SmallPtrSet.h" 28 #include "llvm/ADT/StringExtras.h" 29 #include "llvm/IR/DataLayout.h" 30 #include "llvm/IR/InlineAsm.h" 31 #include "llvm/IR/Intrinsics.h" 32 #include "llvm/IR/MDBuilder.h" 33 #include "llvm/Support/ConvertUTF.h" 34 #include "llvm/Support/ScopedPrinter.h" 35 #include "llvm/Support/TargetParser.h" 36 #include <sstream> 37 38 using namespace clang; 39 using namespace CodeGen; 40 using namespace llvm; 41 42 static 43 int64_t clamp(int64_t Value, int64_t Low, int64_t High) { 44 return std::min(High, std::max(Low, Value)); 45 } 46 47 /// getBuiltinLibFunction - Given a builtin id for a function like 48 /// "__builtin_fabsf", return a Function* for "fabsf". 49 llvm::Constant *CodeGenModule::getBuiltinLibFunction(const FunctionDecl *FD, 50 unsigned BuiltinID) { 51 assert(Context.BuiltinInfo.isLibFunction(BuiltinID)); 52 53 // Get the name, skip over the __builtin_ prefix (if necessary). 54 StringRef Name; 55 GlobalDecl D(FD); 56 57 // If the builtin has been declared explicitly with an assembler label, 58 // use the mangled name. This differs from the plain label on platforms 59 // that prefix labels. 60 if (FD->hasAttr<AsmLabelAttr>()) 61 Name = getMangledName(D); 62 else 63 Name = Context.BuiltinInfo.getName(BuiltinID) + 10; 64 65 llvm::FunctionType *Ty = 66 cast<llvm::FunctionType>(getTypes().ConvertType(FD->getType())); 67 68 return GetOrCreateLLVMFunction(Name, Ty, D, /*ForVTable=*/false); 69 } 70 71 /// Emit the conversions required to turn the given value into an 72 /// integer of the given size. 73 static Value *EmitToInt(CodeGenFunction &CGF, llvm::Value *V, 74 QualType T, llvm::IntegerType *IntType) { 75 V = CGF.EmitToMemory(V, T); 76 77 if (V->getType()->isPointerTy()) 78 return CGF.Builder.CreatePtrToInt(V, IntType); 79 80 assert(V->getType() == IntType); 81 return V; 82 } 83 84 static Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V, 85 QualType T, llvm::Type *ResultType) { 86 V = CGF.EmitFromMemory(V, T); 87 88 if (ResultType->isPointerTy()) 89 return CGF.Builder.CreateIntToPtr(V, ResultType); 90 91 assert(V->getType() == ResultType); 92 return V; 93 } 94 95 /// Utility to insert an atomic instruction based on Intrinsic::ID 96 /// and the expression node. 97 static Value *MakeBinaryAtomicValue( 98 CodeGenFunction &CGF, llvm::AtomicRMWInst::BinOp Kind, const CallExpr *E, 99 AtomicOrdering Ordering = AtomicOrdering::SequentiallyConsistent) { 100 QualType T = E->getType(); 101 assert(E->getArg(0)->getType()->isPointerType()); 102 assert(CGF.getContext().hasSameUnqualifiedType(T, 103 E->getArg(0)->getType()->getPointeeType())); 104 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 105 106 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 107 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 108 109 llvm::IntegerType *IntType = 110 llvm::IntegerType::get(CGF.getLLVMContext(), 111 CGF.getContext().getTypeSize(T)); 112 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 113 114 llvm::Value *Args[2]; 115 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 116 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 117 llvm::Type *ValueType = Args[1]->getType(); 118 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 119 120 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 121 Kind, Args[0], Args[1], Ordering); 122 return EmitFromInt(CGF, Result, T, ValueType); 123 } 124 125 static Value *EmitNontemporalStore(CodeGenFunction &CGF, const CallExpr *E) { 126 Value *Val = CGF.EmitScalarExpr(E->getArg(0)); 127 Value *Address = CGF.EmitScalarExpr(E->getArg(1)); 128 129 // Convert the type of the pointer to a pointer to the stored type. 130 Val = CGF.EmitToMemory(Val, E->getArg(0)->getType()); 131 Value *BC = CGF.Builder.CreateBitCast( 132 Address, llvm::PointerType::getUnqual(Val->getType()), "cast"); 133 LValue LV = CGF.MakeNaturalAlignAddrLValue(BC, E->getArg(0)->getType()); 134 LV.setNontemporal(true); 135 CGF.EmitStoreOfScalar(Val, LV, false); 136 return nullptr; 137 } 138 139 static Value *EmitNontemporalLoad(CodeGenFunction &CGF, const CallExpr *E) { 140 Value *Address = CGF.EmitScalarExpr(E->getArg(0)); 141 142 LValue LV = CGF.MakeNaturalAlignAddrLValue(Address, E->getType()); 143 LV.setNontemporal(true); 144 return CGF.EmitLoadOfScalar(LV, E->getExprLoc()); 145 } 146 147 static RValue EmitBinaryAtomic(CodeGenFunction &CGF, 148 llvm::AtomicRMWInst::BinOp Kind, 149 const CallExpr *E) { 150 return RValue::get(MakeBinaryAtomicValue(CGF, Kind, E)); 151 } 152 153 /// Utility to insert an atomic instruction based Intrinsic::ID and 154 /// the expression node, where the return value is the result of the 155 /// operation. 156 static RValue EmitBinaryAtomicPost(CodeGenFunction &CGF, 157 llvm::AtomicRMWInst::BinOp Kind, 158 const CallExpr *E, 159 Instruction::BinaryOps Op, 160 bool Invert = false) { 161 QualType T = E->getType(); 162 assert(E->getArg(0)->getType()->isPointerType()); 163 assert(CGF.getContext().hasSameUnqualifiedType(T, 164 E->getArg(0)->getType()->getPointeeType())); 165 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 166 167 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 168 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 169 170 llvm::IntegerType *IntType = 171 llvm::IntegerType::get(CGF.getLLVMContext(), 172 CGF.getContext().getTypeSize(T)); 173 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 174 175 llvm::Value *Args[2]; 176 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 177 llvm::Type *ValueType = Args[1]->getType(); 178 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 179 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 180 181 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 182 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 183 Result = CGF.Builder.CreateBinOp(Op, Result, Args[1]); 184 if (Invert) 185 Result = CGF.Builder.CreateBinOp(llvm::Instruction::Xor, Result, 186 llvm::ConstantInt::get(IntType, -1)); 187 Result = EmitFromInt(CGF, Result, T, ValueType); 188 return RValue::get(Result); 189 } 190 191 /// Utility to insert an atomic cmpxchg instruction. 192 /// 193 /// @param CGF The current codegen function. 194 /// @param E Builtin call expression to convert to cmpxchg. 195 /// arg0 - address to operate on 196 /// arg1 - value to compare with 197 /// arg2 - new value 198 /// @param ReturnBool Specifies whether to return success flag of 199 /// cmpxchg result or the old value. 200 /// 201 /// @returns result of cmpxchg, according to ReturnBool 202 /// 203 /// Note: In order to lower Microsoft's _InterlockedCompareExchange* intrinsics 204 /// invoke the function EmitAtomicCmpXchgForMSIntrin. 205 static Value *MakeAtomicCmpXchgValue(CodeGenFunction &CGF, const CallExpr *E, 206 bool ReturnBool) { 207 QualType T = ReturnBool ? E->getArg(1)->getType() : E->getType(); 208 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 209 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 210 211 llvm::IntegerType *IntType = llvm::IntegerType::get( 212 CGF.getLLVMContext(), CGF.getContext().getTypeSize(T)); 213 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 214 215 Value *Args[3]; 216 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 217 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 218 llvm::Type *ValueType = Args[1]->getType(); 219 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 220 Args[2] = EmitToInt(CGF, CGF.EmitScalarExpr(E->getArg(2)), T, IntType); 221 222 Value *Pair = CGF.Builder.CreateAtomicCmpXchg( 223 Args[0], Args[1], Args[2], llvm::AtomicOrdering::SequentiallyConsistent, 224 llvm::AtomicOrdering::SequentiallyConsistent); 225 if (ReturnBool) 226 // Extract boolean success flag and zext it to int. 227 return CGF.Builder.CreateZExt(CGF.Builder.CreateExtractValue(Pair, 1), 228 CGF.ConvertType(E->getType())); 229 else 230 // Extract old value and emit it using the same type as compare value. 231 return EmitFromInt(CGF, CGF.Builder.CreateExtractValue(Pair, 0), T, 232 ValueType); 233 } 234 235 /// This function should be invoked to emit atomic cmpxchg for Microsoft's 236 /// _InterlockedCompareExchange* intrinsics which have the following signature: 237 /// T _InterlockedCompareExchange(T volatile *Destination, 238 /// T Exchange, 239 /// T Comparand); 240 /// 241 /// Whereas the llvm 'cmpxchg' instruction has the following syntax: 242 /// cmpxchg *Destination, Comparand, Exchange. 243 /// So we need to swap Comparand and Exchange when invoking 244 /// CreateAtomicCmpXchg. That is the reason we could not use the above utility 245 /// function MakeAtomicCmpXchgValue since it expects the arguments to be 246 /// already swapped. 247 248 static 249 Value *EmitAtomicCmpXchgForMSIntrin(CodeGenFunction &CGF, const CallExpr *E, 250 AtomicOrdering SuccessOrdering = AtomicOrdering::SequentiallyConsistent) { 251 assert(E->getArg(0)->getType()->isPointerType()); 252 assert(CGF.getContext().hasSameUnqualifiedType( 253 E->getType(), E->getArg(0)->getType()->getPointeeType())); 254 assert(CGF.getContext().hasSameUnqualifiedType(E->getType(), 255 E->getArg(1)->getType())); 256 assert(CGF.getContext().hasSameUnqualifiedType(E->getType(), 257 E->getArg(2)->getType())); 258 259 auto *Destination = CGF.EmitScalarExpr(E->getArg(0)); 260 auto *Comparand = CGF.EmitScalarExpr(E->getArg(2)); 261 auto *Exchange = CGF.EmitScalarExpr(E->getArg(1)); 262 263 // For Release ordering, the failure ordering should be Monotonic. 264 auto FailureOrdering = SuccessOrdering == AtomicOrdering::Release ? 265 AtomicOrdering::Monotonic : 266 SuccessOrdering; 267 268 auto *Result = CGF.Builder.CreateAtomicCmpXchg( 269 Destination, Comparand, Exchange, 270 SuccessOrdering, FailureOrdering); 271 Result->setVolatile(true); 272 return CGF.Builder.CreateExtractValue(Result, 0); 273 } 274 275 static Value *EmitAtomicIncrementValue(CodeGenFunction &CGF, const CallExpr *E, 276 AtomicOrdering Ordering = AtomicOrdering::SequentiallyConsistent) { 277 assert(E->getArg(0)->getType()->isPointerType()); 278 279 auto *IntTy = CGF.ConvertType(E->getType()); 280 auto *Result = CGF.Builder.CreateAtomicRMW( 281 AtomicRMWInst::Add, 282 CGF.EmitScalarExpr(E->getArg(0)), 283 ConstantInt::get(IntTy, 1), 284 Ordering); 285 return CGF.Builder.CreateAdd(Result, ConstantInt::get(IntTy, 1)); 286 } 287 288 static Value *EmitAtomicDecrementValue(CodeGenFunction &CGF, const CallExpr *E, 289 AtomicOrdering Ordering = AtomicOrdering::SequentiallyConsistent) { 290 assert(E->getArg(0)->getType()->isPointerType()); 291 292 auto *IntTy = CGF.ConvertType(E->getType()); 293 auto *Result = CGF.Builder.CreateAtomicRMW( 294 AtomicRMWInst::Sub, 295 CGF.EmitScalarExpr(E->getArg(0)), 296 ConstantInt::get(IntTy, 1), 297 Ordering); 298 return CGF.Builder.CreateSub(Result, ConstantInt::get(IntTy, 1)); 299 } 300 301 // Emit a simple mangled intrinsic that has 1 argument and a return type 302 // matching the argument type. 303 static Value *emitUnaryBuiltin(CodeGenFunction &CGF, 304 const CallExpr *E, 305 unsigned IntrinsicID) { 306 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 307 308 Function *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 309 return CGF.Builder.CreateCall(F, Src0); 310 } 311 312 // Emit an intrinsic that has 2 operands of the same type as its result. 313 static Value *emitBinaryBuiltin(CodeGenFunction &CGF, 314 const CallExpr *E, 315 unsigned IntrinsicID) { 316 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 317 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 318 319 Function *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 320 return CGF.Builder.CreateCall(F, { Src0, Src1 }); 321 } 322 323 // Emit an intrinsic that has 3 operands of the same type as its result. 324 static Value *emitTernaryBuiltin(CodeGenFunction &CGF, 325 const CallExpr *E, 326 unsigned IntrinsicID) { 327 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 328 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 329 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); 330 331 Function *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 332 return CGF.Builder.CreateCall(F, { Src0, Src1, Src2 }); 333 } 334 335 // Emit an intrinsic that has 1 float or double operand, and 1 integer. 336 static Value *emitFPIntBuiltin(CodeGenFunction &CGF, 337 const CallExpr *E, 338 unsigned IntrinsicID) { 339 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 340 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 341 342 Function *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 343 return CGF.Builder.CreateCall(F, {Src0, Src1}); 344 } 345 346 /// EmitFAbs - Emit a call to @llvm.fabs(). 347 static Value *EmitFAbs(CodeGenFunction &CGF, Value *V) { 348 Function *F = CGF.CGM.getIntrinsic(Intrinsic::fabs, V->getType()); 349 llvm::CallInst *Call = CGF.Builder.CreateCall(F, V); 350 Call->setDoesNotAccessMemory(); 351 return Call; 352 } 353 354 /// Emit the computation of the sign bit for a floating point value. Returns 355 /// the i1 sign bit value. 356 static Value *EmitSignBit(CodeGenFunction &CGF, Value *V) { 357 LLVMContext &C = CGF.CGM.getLLVMContext(); 358 359 llvm::Type *Ty = V->getType(); 360 int Width = Ty->getPrimitiveSizeInBits(); 361 llvm::Type *IntTy = llvm::IntegerType::get(C, Width); 362 V = CGF.Builder.CreateBitCast(V, IntTy); 363 if (Ty->isPPC_FP128Ty()) { 364 // We want the sign bit of the higher-order double. The bitcast we just 365 // did works as if the double-double was stored to memory and then 366 // read as an i128. The "store" will put the higher-order double in the 367 // lower address in both little- and big-Endian modes, but the "load" 368 // will treat those bits as a different part of the i128: the low bits in 369 // little-Endian, the high bits in big-Endian. Therefore, on big-Endian 370 // we need to shift the high bits down to the low before truncating. 371 Width >>= 1; 372 if (CGF.getTarget().isBigEndian()) { 373 Value *ShiftCst = llvm::ConstantInt::get(IntTy, Width); 374 V = CGF.Builder.CreateLShr(V, ShiftCst); 375 } 376 // We are truncating value in order to extract the higher-order 377 // double, which we will be using to extract the sign from. 378 IntTy = llvm::IntegerType::get(C, Width); 379 V = CGF.Builder.CreateTrunc(V, IntTy); 380 } 381 Value *Zero = llvm::Constant::getNullValue(IntTy); 382 return CGF.Builder.CreateICmpSLT(V, Zero); 383 } 384 385 static RValue emitLibraryCall(CodeGenFunction &CGF, const FunctionDecl *FD, 386 const CallExpr *E, llvm::Constant *calleeValue) { 387 CGCallee callee = CGCallee::forDirect(calleeValue, GlobalDecl(FD)); 388 return CGF.EmitCall(E->getCallee()->getType(), callee, E, ReturnValueSlot()); 389 } 390 391 /// Emit a call to llvm.{sadd,uadd,ssub,usub,smul,umul}.with.overflow.* 392 /// depending on IntrinsicID. 393 /// 394 /// \arg CGF The current codegen function. 395 /// \arg IntrinsicID The ID for the Intrinsic we wish to generate. 396 /// \arg X The first argument to the llvm.*.with.overflow.*. 397 /// \arg Y The second argument to the llvm.*.with.overflow.*. 398 /// \arg Carry The carry returned by the llvm.*.with.overflow.*. 399 /// \returns The result (i.e. sum/product) returned by the intrinsic. 400 static llvm::Value *EmitOverflowIntrinsic(CodeGenFunction &CGF, 401 const llvm::Intrinsic::ID IntrinsicID, 402 llvm::Value *X, llvm::Value *Y, 403 llvm::Value *&Carry) { 404 // Make sure we have integers of the same width. 405 assert(X->getType() == Y->getType() && 406 "Arguments must be the same type. (Did you forget to make sure both " 407 "arguments have the same integer width?)"); 408 409 Function *Callee = CGF.CGM.getIntrinsic(IntrinsicID, X->getType()); 410 llvm::Value *Tmp = CGF.Builder.CreateCall(Callee, {X, Y}); 411 Carry = CGF.Builder.CreateExtractValue(Tmp, 1); 412 return CGF.Builder.CreateExtractValue(Tmp, 0); 413 } 414 415 static Value *emitRangedBuiltin(CodeGenFunction &CGF, 416 unsigned IntrinsicID, 417 int low, int high) { 418 llvm::MDBuilder MDHelper(CGF.getLLVMContext()); 419 llvm::MDNode *RNode = MDHelper.createRange(APInt(32, low), APInt(32, high)); 420 Function *F = CGF.CGM.getIntrinsic(IntrinsicID, {}); 421 llvm::Instruction *Call = CGF.Builder.CreateCall(F); 422 Call->setMetadata(llvm::LLVMContext::MD_range, RNode); 423 return Call; 424 } 425 426 namespace { 427 struct WidthAndSignedness { 428 unsigned Width; 429 bool Signed; 430 }; 431 } 432 433 static WidthAndSignedness 434 getIntegerWidthAndSignedness(const clang::ASTContext &context, 435 const clang::QualType Type) { 436 assert(Type->isIntegerType() && "Given type is not an integer."); 437 unsigned Width = Type->isBooleanType() ? 1 : context.getTypeInfo(Type).Width; 438 bool Signed = Type->isSignedIntegerType(); 439 return {Width, Signed}; 440 } 441 442 // Given one or more integer types, this function produces an integer type that 443 // encompasses them: any value in one of the given types could be expressed in 444 // the encompassing type. 445 static struct WidthAndSignedness 446 EncompassingIntegerType(ArrayRef<struct WidthAndSignedness> Types) { 447 assert(Types.size() > 0 && "Empty list of types."); 448 449 // If any of the given types is signed, we must return a signed type. 450 bool Signed = false; 451 for (const auto &Type : Types) { 452 Signed |= Type.Signed; 453 } 454 455 // The encompassing type must have a width greater than or equal to the width 456 // of the specified types. Additionally, if the encompassing type is signed, 457 // its width must be strictly greater than the width of any unsigned types 458 // given. 459 unsigned Width = 0; 460 for (const auto &Type : Types) { 461 unsigned MinWidth = Type.Width + (Signed && !Type.Signed); 462 if (Width < MinWidth) { 463 Width = MinWidth; 464 } 465 } 466 467 return {Width, Signed}; 468 } 469 470 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) { 471 llvm::Type *DestType = Int8PtrTy; 472 if (ArgValue->getType() != DestType) 473 ArgValue = 474 Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data()); 475 476 Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend; 477 return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue); 478 } 479 480 /// Checks if using the result of __builtin_object_size(p, @p From) in place of 481 /// __builtin_object_size(p, @p To) is correct 482 static bool areBOSTypesCompatible(int From, int To) { 483 // Note: Our __builtin_object_size implementation currently treats Type=0 and 484 // Type=2 identically. Encoding this implementation detail here may make 485 // improving __builtin_object_size difficult in the future, so it's omitted. 486 return From == To || (From == 0 && To == 1) || (From == 3 && To == 2); 487 } 488 489 static llvm::Value * 490 getDefaultBuiltinObjectSizeResult(unsigned Type, llvm::IntegerType *ResType) { 491 return ConstantInt::get(ResType, (Type & 2) ? 0 : -1, /*isSigned=*/true); 492 } 493 494 llvm::Value * 495 CodeGenFunction::evaluateOrEmitBuiltinObjectSize(const Expr *E, unsigned Type, 496 llvm::IntegerType *ResType, 497 llvm::Value *EmittedE, 498 bool IsDynamic) { 499 uint64_t ObjectSize; 500 if (!E->tryEvaluateObjectSize(ObjectSize, getContext(), Type)) 501 return emitBuiltinObjectSize(E, Type, ResType, EmittedE, IsDynamic); 502 return ConstantInt::get(ResType, ObjectSize, /*isSigned=*/true); 503 } 504 505 /// Returns a Value corresponding to the size of the given expression. 506 /// This Value may be either of the following: 507 /// - A llvm::Argument (if E is a param with the pass_object_size attribute on 508 /// it) 509 /// - A call to the @llvm.objectsize intrinsic 510 /// 511 /// EmittedE is the result of emitting `E` as a scalar expr. If it's non-null 512 /// and we wouldn't otherwise try to reference a pass_object_size parameter, 513 /// we'll call @llvm.objectsize on EmittedE, rather than emitting E. 514 llvm::Value * 515 CodeGenFunction::emitBuiltinObjectSize(const Expr *E, unsigned Type, 516 llvm::IntegerType *ResType, 517 llvm::Value *EmittedE, bool IsDynamic) { 518 // We need to reference an argument if the pointer is a parameter with the 519 // pass_object_size attribute. 520 if (auto *D = dyn_cast<DeclRefExpr>(E->IgnoreParenImpCasts())) { 521 auto *Param = dyn_cast<ParmVarDecl>(D->getDecl()); 522 auto *PS = D->getDecl()->getAttr<PassObjectSizeAttr>(); 523 if (Param != nullptr && PS != nullptr && 524 areBOSTypesCompatible(PS->getType(), Type)) { 525 auto Iter = SizeArguments.find(Param); 526 assert(Iter != SizeArguments.end()); 527 528 const ImplicitParamDecl *D = Iter->second; 529 auto DIter = LocalDeclMap.find(D); 530 assert(DIter != LocalDeclMap.end()); 531 532 return EmitLoadOfScalar(DIter->second, /*volatile=*/false, 533 getContext().getSizeType(), E->getBeginLoc()); 534 } 535 } 536 537 // LLVM can't handle Type=3 appropriately, and __builtin_object_size shouldn't 538 // evaluate E for side-effects. In either case, we shouldn't lower to 539 // @llvm.objectsize. 540 if (Type == 3 || (!EmittedE && E->HasSideEffects(getContext()))) 541 return getDefaultBuiltinObjectSizeResult(Type, ResType); 542 543 Value *Ptr = EmittedE ? EmittedE : EmitScalarExpr(E); 544 assert(Ptr->getType()->isPointerTy() && 545 "Non-pointer passed to __builtin_object_size?"); 546 547 Function *F = 548 CGM.getIntrinsic(Intrinsic::objectsize, {ResType, Ptr->getType()}); 549 550 // LLVM only supports 0 and 2, make sure that we pass along that as a boolean. 551 Value *Min = Builder.getInt1((Type & 2) != 0); 552 // For GCC compatibility, __builtin_object_size treat NULL as unknown size. 553 Value *NullIsUnknown = Builder.getTrue(); 554 Value *Dynamic = Builder.getInt1(IsDynamic); 555 return Builder.CreateCall(F, {Ptr, Min, NullIsUnknown, Dynamic}); 556 } 557 558 namespace { 559 /// A struct to generically describe a bit test intrinsic. 560 struct BitTest { 561 enum ActionKind : uint8_t { TestOnly, Complement, Reset, Set }; 562 enum InterlockingKind : uint8_t { 563 Unlocked, 564 Sequential, 565 Acquire, 566 Release, 567 NoFence 568 }; 569 570 ActionKind Action; 571 InterlockingKind Interlocking; 572 bool Is64Bit; 573 574 static BitTest decodeBitTestBuiltin(unsigned BuiltinID); 575 }; 576 } // namespace 577 578 BitTest BitTest::decodeBitTestBuiltin(unsigned BuiltinID) { 579 switch (BuiltinID) { 580 // Main portable variants. 581 case Builtin::BI_bittest: 582 return {TestOnly, Unlocked, false}; 583 case Builtin::BI_bittestandcomplement: 584 return {Complement, Unlocked, false}; 585 case Builtin::BI_bittestandreset: 586 return {Reset, Unlocked, false}; 587 case Builtin::BI_bittestandset: 588 return {Set, Unlocked, false}; 589 case Builtin::BI_interlockedbittestandreset: 590 return {Reset, Sequential, false}; 591 case Builtin::BI_interlockedbittestandset: 592 return {Set, Sequential, false}; 593 594 // X86-specific 64-bit variants. 595 case Builtin::BI_bittest64: 596 return {TestOnly, Unlocked, true}; 597 case Builtin::BI_bittestandcomplement64: 598 return {Complement, Unlocked, true}; 599 case Builtin::BI_bittestandreset64: 600 return {Reset, Unlocked, true}; 601 case Builtin::BI_bittestandset64: 602 return {Set, Unlocked, true}; 603 case Builtin::BI_interlockedbittestandreset64: 604 return {Reset, Sequential, true}; 605 case Builtin::BI_interlockedbittestandset64: 606 return {Set, Sequential, true}; 607 608 // ARM/AArch64-specific ordering variants. 609 case Builtin::BI_interlockedbittestandset_acq: 610 return {Set, Acquire, false}; 611 case Builtin::BI_interlockedbittestandset_rel: 612 return {Set, Release, false}; 613 case Builtin::BI_interlockedbittestandset_nf: 614 return {Set, NoFence, false}; 615 case Builtin::BI_interlockedbittestandreset_acq: 616 return {Reset, Acquire, false}; 617 case Builtin::BI_interlockedbittestandreset_rel: 618 return {Reset, Release, false}; 619 case Builtin::BI_interlockedbittestandreset_nf: 620 return {Reset, NoFence, false}; 621 } 622 llvm_unreachable("expected only bittest intrinsics"); 623 } 624 625 static char bitActionToX86BTCode(BitTest::ActionKind A) { 626 switch (A) { 627 case BitTest::TestOnly: return '\0'; 628 case BitTest::Complement: return 'c'; 629 case BitTest::Reset: return 'r'; 630 case BitTest::Set: return 's'; 631 } 632 llvm_unreachable("invalid action"); 633 } 634 635 static llvm::Value *EmitX86BitTestIntrinsic(CodeGenFunction &CGF, 636 BitTest BT, 637 const CallExpr *E, Value *BitBase, 638 Value *BitPos) { 639 char Action = bitActionToX86BTCode(BT.Action); 640 char SizeSuffix = BT.Is64Bit ? 'q' : 'l'; 641 642 // Build the assembly. 643 SmallString<64> Asm; 644 raw_svector_ostream AsmOS(Asm); 645 if (BT.Interlocking != BitTest::Unlocked) 646 AsmOS << "lock "; 647 AsmOS << "bt"; 648 if (Action) 649 AsmOS << Action; 650 AsmOS << SizeSuffix << " $2, ($1)\n\tsetc ${0:b}"; 651 652 // Build the constraints. FIXME: We should support immediates when possible. 653 std::string Constraints = "=r,r,r,~{cc},~{flags},~{fpsr}"; 654 llvm::IntegerType *IntType = llvm::IntegerType::get( 655 CGF.getLLVMContext(), 656 CGF.getContext().getTypeSize(E->getArg(1)->getType())); 657 llvm::Type *IntPtrType = IntType->getPointerTo(); 658 llvm::FunctionType *FTy = 659 llvm::FunctionType::get(CGF.Int8Ty, {IntPtrType, IntType}, false); 660 661 llvm::InlineAsm *IA = 662 llvm::InlineAsm::get(FTy, Asm, Constraints, /*SideEffects=*/true); 663 return CGF.Builder.CreateCall(IA, {BitBase, BitPos}); 664 } 665 666 static llvm::AtomicOrdering 667 getBitTestAtomicOrdering(BitTest::InterlockingKind I) { 668 switch (I) { 669 case BitTest::Unlocked: return llvm::AtomicOrdering::NotAtomic; 670 case BitTest::Sequential: return llvm::AtomicOrdering::SequentiallyConsistent; 671 case BitTest::Acquire: return llvm::AtomicOrdering::Acquire; 672 case BitTest::Release: return llvm::AtomicOrdering::Release; 673 case BitTest::NoFence: return llvm::AtomicOrdering::Monotonic; 674 } 675 llvm_unreachable("invalid interlocking"); 676 } 677 678 /// Emit a _bittest* intrinsic. These intrinsics take a pointer to an array of 679 /// bits and a bit position and read and optionally modify the bit at that 680 /// position. The position index can be arbitrarily large, i.e. it can be larger 681 /// than 31 or 63, so we need an indexed load in the general case. 682 static llvm::Value *EmitBitTestIntrinsic(CodeGenFunction &CGF, 683 unsigned BuiltinID, 684 const CallExpr *E) { 685 Value *BitBase = CGF.EmitScalarExpr(E->getArg(0)); 686 Value *BitPos = CGF.EmitScalarExpr(E->getArg(1)); 687 688 BitTest BT = BitTest::decodeBitTestBuiltin(BuiltinID); 689 690 // X86 has special BT, BTC, BTR, and BTS instructions that handle the array 691 // indexing operation internally. Use them if possible. 692 llvm::Triple::ArchType Arch = CGF.getTarget().getTriple().getArch(); 693 if (Arch == llvm::Triple::x86 || Arch == llvm::Triple::x86_64) 694 return EmitX86BitTestIntrinsic(CGF, BT, E, BitBase, BitPos); 695 696 // Otherwise, use generic code to load one byte and test the bit. Use all but 697 // the bottom three bits as the array index, and the bottom three bits to form 698 // a mask. 699 // Bit = BitBaseI8[BitPos >> 3] & (1 << (BitPos & 0x7)) != 0; 700 Value *ByteIndex = CGF.Builder.CreateAShr( 701 BitPos, llvm::ConstantInt::get(BitPos->getType(), 3), "bittest.byteidx"); 702 Value *BitBaseI8 = CGF.Builder.CreatePointerCast(BitBase, CGF.Int8PtrTy); 703 Address ByteAddr(CGF.Builder.CreateInBoundsGEP(CGF.Int8Ty, BitBaseI8, 704 ByteIndex, "bittest.byteaddr"), 705 CharUnits::One()); 706 Value *PosLow = 707 CGF.Builder.CreateAnd(CGF.Builder.CreateTrunc(BitPos, CGF.Int8Ty), 708 llvm::ConstantInt::get(CGF.Int8Ty, 0x7)); 709 710 // The updating instructions will need a mask. 711 Value *Mask = nullptr; 712 if (BT.Action != BitTest::TestOnly) { 713 Mask = CGF.Builder.CreateShl(llvm::ConstantInt::get(CGF.Int8Ty, 1), PosLow, 714 "bittest.mask"); 715 } 716 717 // Check the action and ordering of the interlocked intrinsics. 718 llvm::AtomicOrdering Ordering = getBitTestAtomicOrdering(BT.Interlocking); 719 720 Value *OldByte = nullptr; 721 if (Ordering != llvm::AtomicOrdering::NotAtomic) { 722 // Emit a combined atomicrmw load/store operation for the interlocked 723 // intrinsics. 724 llvm::AtomicRMWInst::BinOp RMWOp = llvm::AtomicRMWInst::Or; 725 if (BT.Action == BitTest::Reset) { 726 Mask = CGF.Builder.CreateNot(Mask); 727 RMWOp = llvm::AtomicRMWInst::And; 728 } 729 OldByte = CGF.Builder.CreateAtomicRMW(RMWOp, ByteAddr.getPointer(), Mask, 730 Ordering); 731 } else { 732 // Emit a plain load for the non-interlocked intrinsics. 733 OldByte = CGF.Builder.CreateLoad(ByteAddr, "bittest.byte"); 734 Value *NewByte = nullptr; 735 switch (BT.Action) { 736 case BitTest::TestOnly: 737 // Don't store anything. 738 break; 739 case BitTest::Complement: 740 NewByte = CGF.Builder.CreateXor(OldByte, Mask); 741 break; 742 case BitTest::Reset: 743 NewByte = CGF.Builder.CreateAnd(OldByte, CGF.Builder.CreateNot(Mask)); 744 break; 745 case BitTest::Set: 746 NewByte = CGF.Builder.CreateOr(OldByte, Mask); 747 break; 748 } 749 if (NewByte) 750 CGF.Builder.CreateStore(NewByte, ByteAddr); 751 } 752 753 // However we loaded the old byte, either by plain load or atomicrmw, shift 754 // the bit into the low position and mask it to 0 or 1. 755 Value *ShiftedByte = CGF.Builder.CreateLShr(OldByte, PosLow, "bittest.shr"); 756 return CGF.Builder.CreateAnd( 757 ShiftedByte, llvm::ConstantInt::get(CGF.Int8Ty, 1), "bittest.res"); 758 } 759 760 namespace { 761 enum class MSVCSetJmpKind { 762 _setjmpex, 763 _setjmp3, 764 _setjmp 765 }; 766 } 767 768 /// MSVC handles setjmp a bit differently on different platforms. On every 769 /// architecture except 32-bit x86, the frame address is passed. On x86, extra 770 /// parameters can be passed as variadic arguments, but we always pass none. 771 static RValue EmitMSVCRTSetJmp(CodeGenFunction &CGF, MSVCSetJmpKind SJKind, 772 const CallExpr *E) { 773 llvm::Value *Arg1 = nullptr; 774 llvm::Type *Arg1Ty = nullptr; 775 StringRef Name; 776 bool IsVarArg = false; 777 if (SJKind == MSVCSetJmpKind::_setjmp3) { 778 Name = "_setjmp3"; 779 Arg1Ty = CGF.Int32Ty; 780 Arg1 = llvm::ConstantInt::get(CGF.IntTy, 0); 781 IsVarArg = true; 782 } else { 783 Name = SJKind == MSVCSetJmpKind::_setjmp ? "_setjmp" : "_setjmpex"; 784 Arg1Ty = CGF.Int8PtrTy; 785 if (CGF.getTarget().getTriple().getArch() == llvm::Triple::aarch64) { 786 Arg1 = CGF.Builder.CreateCall(CGF.CGM.getIntrinsic(Intrinsic::sponentry)); 787 } else 788 Arg1 = CGF.Builder.CreateCall(CGF.CGM.getIntrinsic(Intrinsic::frameaddress), 789 llvm::ConstantInt::get(CGF.Int32Ty, 0)); 790 } 791 792 // Mark the call site and declaration with ReturnsTwice. 793 llvm::Type *ArgTypes[2] = {CGF.Int8PtrTy, Arg1Ty}; 794 llvm::AttributeList ReturnsTwiceAttr = llvm::AttributeList::get( 795 CGF.getLLVMContext(), llvm::AttributeList::FunctionIndex, 796 llvm::Attribute::ReturnsTwice); 797 llvm::FunctionCallee SetJmpFn = CGF.CGM.CreateRuntimeFunction( 798 llvm::FunctionType::get(CGF.IntTy, ArgTypes, IsVarArg), Name, 799 ReturnsTwiceAttr, /*Local=*/true); 800 801 llvm::Value *Buf = CGF.Builder.CreateBitOrPointerCast( 802 CGF.EmitScalarExpr(E->getArg(0)), CGF.Int8PtrTy); 803 llvm::Value *Args[] = {Buf, Arg1}; 804 llvm::CallBase *CB = CGF.EmitRuntimeCallOrInvoke(SetJmpFn, Args); 805 CB->setAttributes(ReturnsTwiceAttr); 806 return RValue::get(CB); 807 } 808 809 // Many of MSVC builtins are on x64, ARM and AArch64; to avoid repeating code, 810 // we handle them here. 811 enum class CodeGenFunction::MSVCIntrin { 812 _BitScanForward, 813 _BitScanReverse, 814 _InterlockedAnd, 815 _InterlockedDecrement, 816 _InterlockedExchange, 817 _InterlockedExchangeAdd, 818 _InterlockedExchangeSub, 819 _InterlockedIncrement, 820 _InterlockedOr, 821 _InterlockedXor, 822 _InterlockedExchangeAdd_acq, 823 _InterlockedExchangeAdd_rel, 824 _InterlockedExchangeAdd_nf, 825 _InterlockedExchange_acq, 826 _InterlockedExchange_rel, 827 _InterlockedExchange_nf, 828 _InterlockedCompareExchange_acq, 829 _InterlockedCompareExchange_rel, 830 _InterlockedCompareExchange_nf, 831 _InterlockedOr_acq, 832 _InterlockedOr_rel, 833 _InterlockedOr_nf, 834 _InterlockedXor_acq, 835 _InterlockedXor_rel, 836 _InterlockedXor_nf, 837 _InterlockedAnd_acq, 838 _InterlockedAnd_rel, 839 _InterlockedAnd_nf, 840 _InterlockedIncrement_acq, 841 _InterlockedIncrement_rel, 842 _InterlockedIncrement_nf, 843 _InterlockedDecrement_acq, 844 _InterlockedDecrement_rel, 845 _InterlockedDecrement_nf, 846 __fastfail, 847 }; 848 849 Value *CodeGenFunction::EmitMSVCBuiltinExpr(MSVCIntrin BuiltinID, 850 const CallExpr *E) { 851 switch (BuiltinID) { 852 case MSVCIntrin::_BitScanForward: 853 case MSVCIntrin::_BitScanReverse: { 854 Value *ArgValue = EmitScalarExpr(E->getArg(1)); 855 856 llvm::Type *ArgType = ArgValue->getType(); 857 llvm::Type *IndexType = 858 EmitScalarExpr(E->getArg(0))->getType()->getPointerElementType(); 859 llvm::Type *ResultType = ConvertType(E->getType()); 860 861 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 862 Value *ResZero = llvm::Constant::getNullValue(ResultType); 863 Value *ResOne = llvm::ConstantInt::get(ResultType, 1); 864 865 BasicBlock *Begin = Builder.GetInsertBlock(); 866 BasicBlock *End = createBasicBlock("bitscan_end", this->CurFn); 867 Builder.SetInsertPoint(End); 868 PHINode *Result = Builder.CreatePHI(ResultType, 2, "bitscan_result"); 869 870 Builder.SetInsertPoint(Begin); 871 Value *IsZero = Builder.CreateICmpEQ(ArgValue, ArgZero); 872 BasicBlock *NotZero = createBasicBlock("bitscan_not_zero", this->CurFn); 873 Builder.CreateCondBr(IsZero, End, NotZero); 874 Result->addIncoming(ResZero, Begin); 875 876 Builder.SetInsertPoint(NotZero); 877 Address IndexAddress = EmitPointerWithAlignment(E->getArg(0)); 878 879 if (BuiltinID == MSVCIntrin::_BitScanForward) { 880 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 881 Value *ZeroCount = Builder.CreateCall(F, {ArgValue, Builder.getTrue()}); 882 ZeroCount = Builder.CreateIntCast(ZeroCount, IndexType, false); 883 Builder.CreateStore(ZeroCount, IndexAddress, false); 884 } else { 885 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 886 Value *ArgTypeLastIndex = llvm::ConstantInt::get(IndexType, ArgWidth - 1); 887 888 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 889 Value *ZeroCount = Builder.CreateCall(F, {ArgValue, Builder.getTrue()}); 890 ZeroCount = Builder.CreateIntCast(ZeroCount, IndexType, false); 891 Value *Index = Builder.CreateNSWSub(ArgTypeLastIndex, ZeroCount); 892 Builder.CreateStore(Index, IndexAddress, false); 893 } 894 Builder.CreateBr(End); 895 Result->addIncoming(ResOne, NotZero); 896 897 Builder.SetInsertPoint(End); 898 return Result; 899 } 900 case MSVCIntrin::_InterlockedAnd: 901 return MakeBinaryAtomicValue(*this, AtomicRMWInst::And, E); 902 case MSVCIntrin::_InterlockedExchange: 903 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xchg, E); 904 case MSVCIntrin::_InterlockedExchangeAdd: 905 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Add, E); 906 case MSVCIntrin::_InterlockedExchangeSub: 907 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Sub, E); 908 case MSVCIntrin::_InterlockedOr: 909 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Or, E); 910 case MSVCIntrin::_InterlockedXor: 911 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xor, E); 912 case MSVCIntrin::_InterlockedExchangeAdd_acq: 913 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Add, E, 914 AtomicOrdering::Acquire); 915 case MSVCIntrin::_InterlockedExchangeAdd_rel: 916 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Add, E, 917 AtomicOrdering::Release); 918 case MSVCIntrin::_InterlockedExchangeAdd_nf: 919 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Add, E, 920 AtomicOrdering::Monotonic); 921 case MSVCIntrin::_InterlockedExchange_acq: 922 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xchg, E, 923 AtomicOrdering::Acquire); 924 case MSVCIntrin::_InterlockedExchange_rel: 925 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xchg, E, 926 AtomicOrdering::Release); 927 case MSVCIntrin::_InterlockedExchange_nf: 928 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xchg, E, 929 AtomicOrdering::Monotonic); 930 case MSVCIntrin::_InterlockedCompareExchange_acq: 931 return EmitAtomicCmpXchgForMSIntrin(*this, E, AtomicOrdering::Acquire); 932 case MSVCIntrin::_InterlockedCompareExchange_rel: 933 return EmitAtomicCmpXchgForMSIntrin(*this, E, AtomicOrdering::Release); 934 case MSVCIntrin::_InterlockedCompareExchange_nf: 935 return EmitAtomicCmpXchgForMSIntrin(*this, E, AtomicOrdering::Monotonic); 936 case MSVCIntrin::_InterlockedOr_acq: 937 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Or, E, 938 AtomicOrdering::Acquire); 939 case MSVCIntrin::_InterlockedOr_rel: 940 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Or, E, 941 AtomicOrdering::Release); 942 case MSVCIntrin::_InterlockedOr_nf: 943 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Or, E, 944 AtomicOrdering::Monotonic); 945 case MSVCIntrin::_InterlockedXor_acq: 946 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xor, E, 947 AtomicOrdering::Acquire); 948 case MSVCIntrin::_InterlockedXor_rel: 949 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xor, E, 950 AtomicOrdering::Release); 951 case MSVCIntrin::_InterlockedXor_nf: 952 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xor, E, 953 AtomicOrdering::Monotonic); 954 case MSVCIntrin::_InterlockedAnd_acq: 955 return MakeBinaryAtomicValue(*this, AtomicRMWInst::And, E, 956 AtomicOrdering::Acquire); 957 case MSVCIntrin::_InterlockedAnd_rel: 958 return MakeBinaryAtomicValue(*this, AtomicRMWInst::And, E, 959 AtomicOrdering::Release); 960 case MSVCIntrin::_InterlockedAnd_nf: 961 return MakeBinaryAtomicValue(*this, AtomicRMWInst::And, E, 962 AtomicOrdering::Monotonic); 963 case MSVCIntrin::_InterlockedIncrement_acq: 964 return EmitAtomicIncrementValue(*this, E, AtomicOrdering::Acquire); 965 case MSVCIntrin::_InterlockedIncrement_rel: 966 return EmitAtomicIncrementValue(*this, E, AtomicOrdering::Release); 967 case MSVCIntrin::_InterlockedIncrement_nf: 968 return EmitAtomicIncrementValue(*this, E, AtomicOrdering::Monotonic); 969 case MSVCIntrin::_InterlockedDecrement_acq: 970 return EmitAtomicDecrementValue(*this, E, AtomicOrdering::Acquire); 971 case MSVCIntrin::_InterlockedDecrement_rel: 972 return EmitAtomicDecrementValue(*this, E, AtomicOrdering::Release); 973 case MSVCIntrin::_InterlockedDecrement_nf: 974 return EmitAtomicDecrementValue(*this, E, AtomicOrdering::Monotonic); 975 976 case MSVCIntrin::_InterlockedDecrement: 977 return EmitAtomicDecrementValue(*this, E); 978 case MSVCIntrin::_InterlockedIncrement: 979 return EmitAtomicIncrementValue(*this, E); 980 981 case MSVCIntrin::__fastfail: { 982 // Request immediate process termination from the kernel. The instruction 983 // sequences to do this are documented on MSDN: 984 // https://msdn.microsoft.com/en-us/library/dn774154.aspx 985 llvm::Triple::ArchType ISA = getTarget().getTriple().getArch(); 986 StringRef Asm, Constraints; 987 switch (ISA) { 988 default: 989 ErrorUnsupported(E, "__fastfail call for this architecture"); 990 break; 991 case llvm::Triple::x86: 992 case llvm::Triple::x86_64: 993 Asm = "int $$0x29"; 994 Constraints = "{cx}"; 995 break; 996 case llvm::Triple::thumb: 997 Asm = "udf #251"; 998 Constraints = "{r0}"; 999 break; 1000 case llvm::Triple::aarch64: 1001 Asm = "brk #0xF003"; 1002 Constraints = "{w0}"; 1003 } 1004 llvm::FunctionType *FTy = llvm::FunctionType::get(VoidTy, {Int32Ty}, false); 1005 llvm::InlineAsm *IA = 1006 llvm::InlineAsm::get(FTy, Asm, Constraints, /*SideEffects=*/true); 1007 llvm::AttributeList NoReturnAttr = llvm::AttributeList::get( 1008 getLLVMContext(), llvm::AttributeList::FunctionIndex, 1009 llvm::Attribute::NoReturn); 1010 llvm::CallInst *CI = Builder.CreateCall(IA, EmitScalarExpr(E->getArg(0))); 1011 CI->setAttributes(NoReturnAttr); 1012 return CI; 1013 } 1014 } 1015 llvm_unreachable("Incorrect MSVC intrinsic!"); 1016 } 1017 1018 namespace { 1019 // ARC cleanup for __builtin_os_log_format 1020 struct CallObjCArcUse final : EHScopeStack::Cleanup { 1021 CallObjCArcUse(llvm::Value *object) : object(object) {} 1022 llvm::Value *object; 1023 1024 void Emit(CodeGenFunction &CGF, Flags flags) override { 1025 CGF.EmitARCIntrinsicUse(object); 1026 } 1027 }; 1028 } 1029 1030 Value *CodeGenFunction::EmitCheckedArgForBuiltin(const Expr *E, 1031 BuiltinCheckKind Kind) { 1032 assert((Kind == BCK_CLZPassedZero || Kind == BCK_CTZPassedZero) 1033 && "Unsupported builtin check kind"); 1034 1035 Value *ArgValue = EmitScalarExpr(E); 1036 if (!SanOpts.has(SanitizerKind::Builtin) || !getTarget().isCLZForZeroUndef()) 1037 return ArgValue; 1038 1039 SanitizerScope SanScope(this); 1040 Value *Cond = Builder.CreateICmpNE( 1041 ArgValue, llvm::Constant::getNullValue(ArgValue->getType())); 1042 EmitCheck(std::make_pair(Cond, SanitizerKind::Builtin), 1043 SanitizerHandler::InvalidBuiltin, 1044 {EmitCheckSourceLocation(E->getExprLoc()), 1045 llvm::ConstantInt::get(Builder.getInt8Ty(), Kind)}, 1046 None); 1047 return ArgValue; 1048 } 1049 1050 /// Get the argument type for arguments to os_log_helper. 1051 static CanQualType getOSLogArgType(ASTContext &C, int Size) { 1052 QualType UnsignedTy = C.getIntTypeForBitwidth(Size * 8, /*Signed=*/false); 1053 return C.getCanonicalType(UnsignedTy); 1054 } 1055 1056 llvm::Function *CodeGenFunction::generateBuiltinOSLogHelperFunction( 1057 const analyze_os_log::OSLogBufferLayout &Layout, 1058 CharUnits BufferAlignment) { 1059 ASTContext &Ctx = getContext(); 1060 1061 llvm::SmallString<64> Name; 1062 { 1063 raw_svector_ostream OS(Name); 1064 OS << "__os_log_helper"; 1065 OS << "_" << BufferAlignment.getQuantity(); 1066 OS << "_" << int(Layout.getSummaryByte()); 1067 OS << "_" << int(Layout.getNumArgsByte()); 1068 for (const auto &Item : Layout.Items) 1069 OS << "_" << int(Item.getSizeByte()) << "_" 1070 << int(Item.getDescriptorByte()); 1071 } 1072 1073 if (llvm::Function *F = CGM.getModule().getFunction(Name)) 1074 return F; 1075 1076 llvm::SmallVector<QualType, 4> ArgTys; 1077 llvm::SmallVector<ImplicitParamDecl, 4> Params; 1078 Params.emplace_back(Ctx, nullptr, SourceLocation(), &Ctx.Idents.get("buffer"), 1079 Ctx.VoidPtrTy, ImplicitParamDecl::Other); 1080 ArgTys.emplace_back(Ctx.VoidPtrTy); 1081 1082 for (unsigned int I = 0, E = Layout.Items.size(); I < E; ++I) { 1083 char Size = Layout.Items[I].getSizeByte(); 1084 if (!Size) 1085 continue; 1086 1087 QualType ArgTy = getOSLogArgType(Ctx, Size); 1088 Params.emplace_back( 1089 Ctx, nullptr, SourceLocation(), 1090 &Ctx.Idents.get(std::string("arg") + llvm::to_string(I)), ArgTy, 1091 ImplicitParamDecl::Other); 1092 ArgTys.emplace_back(ArgTy); 1093 } 1094 1095 FunctionArgList Args; 1096 for (auto &P : Params) 1097 Args.push_back(&P); 1098 1099 QualType ReturnTy = Ctx.VoidTy; 1100 QualType FuncionTy = Ctx.getFunctionType(ReturnTy, ArgTys, {}); 1101 1102 // The helper function has linkonce_odr linkage to enable the linker to merge 1103 // identical functions. To ensure the merging always happens, 'noinline' is 1104 // attached to the function when compiling with -Oz. 1105 const CGFunctionInfo &FI = 1106 CGM.getTypes().arrangeBuiltinFunctionDeclaration(ReturnTy, Args); 1107 llvm::FunctionType *FuncTy = CGM.getTypes().GetFunctionType(FI); 1108 llvm::Function *Fn = llvm::Function::Create( 1109 FuncTy, llvm::GlobalValue::LinkOnceODRLinkage, Name, &CGM.getModule()); 1110 Fn->setVisibility(llvm::GlobalValue::HiddenVisibility); 1111 CGM.SetLLVMFunctionAttributes(GlobalDecl(), FI, Fn); 1112 CGM.SetLLVMFunctionAttributesForDefinition(nullptr, Fn); 1113 1114 // Attach 'noinline' at -Oz. 1115 if (CGM.getCodeGenOpts().OptimizeSize == 2) 1116 Fn->addFnAttr(llvm::Attribute::NoInline); 1117 1118 auto NL = ApplyDebugLocation::CreateEmpty(*this); 1119 IdentifierInfo *II = &Ctx.Idents.get(Name); 1120 FunctionDecl *FD = FunctionDecl::Create( 1121 Ctx, Ctx.getTranslationUnitDecl(), SourceLocation(), SourceLocation(), II, 1122 FuncionTy, nullptr, SC_PrivateExtern, false, false); 1123 1124 StartFunction(FD, ReturnTy, Fn, FI, Args); 1125 1126 // Create a scope with an artificial location for the body of this function. 1127 auto AL = ApplyDebugLocation::CreateArtificial(*this); 1128 1129 CharUnits Offset; 1130 Address BufAddr(Builder.CreateLoad(GetAddrOfLocalVar(&Params[0]), "buf"), 1131 BufferAlignment); 1132 Builder.CreateStore(Builder.getInt8(Layout.getSummaryByte()), 1133 Builder.CreateConstByteGEP(BufAddr, Offset++, "summary")); 1134 Builder.CreateStore(Builder.getInt8(Layout.getNumArgsByte()), 1135 Builder.CreateConstByteGEP(BufAddr, Offset++, "numArgs")); 1136 1137 unsigned I = 1; 1138 for (const auto &Item : Layout.Items) { 1139 Builder.CreateStore( 1140 Builder.getInt8(Item.getDescriptorByte()), 1141 Builder.CreateConstByteGEP(BufAddr, Offset++, "argDescriptor")); 1142 Builder.CreateStore( 1143 Builder.getInt8(Item.getSizeByte()), 1144 Builder.CreateConstByteGEP(BufAddr, Offset++, "argSize")); 1145 1146 CharUnits Size = Item.size(); 1147 if (!Size.getQuantity()) 1148 continue; 1149 1150 Address Arg = GetAddrOfLocalVar(&Params[I]); 1151 Address Addr = Builder.CreateConstByteGEP(BufAddr, Offset, "argData"); 1152 Addr = Builder.CreateBitCast(Addr, Arg.getPointer()->getType(), 1153 "argDataCast"); 1154 Builder.CreateStore(Builder.CreateLoad(Arg), Addr); 1155 Offset += Size; 1156 ++I; 1157 } 1158 1159 FinishFunction(); 1160 1161 return Fn; 1162 } 1163 1164 RValue CodeGenFunction::emitBuiltinOSLogFormat(const CallExpr &E) { 1165 assert(E.getNumArgs() >= 2 && 1166 "__builtin_os_log_format takes at least 2 arguments"); 1167 ASTContext &Ctx = getContext(); 1168 analyze_os_log::OSLogBufferLayout Layout; 1169 analyze_os_log::computeOSLogBufferLayout(Ctx, &E, Layout); 1170 Address BufAddr = EmitPointerWithAlignment(E.getArg(0)); 1171 llvm::SmallVector<llvm::Value *, 4> RetainableOperands; 1172 1173 // Ignore argument 1, the format string. It is not currently used. 1174 CallArgList Args; 1175 Args.add(RValue::get(BufAddr.getPointer()), Ctx.VoidPtrTy); 1176 1177 for (const auto &Item : Layout.Items) { 1178 int Size = Item.getSizeByte(); 1179 if (!Size) 1180 continue; 1181 1182 llvm::Value *ArgVal; 1183 1184 if (Item.getKind() == analyze_os_log::OSLogBufferItem::MaskKind) { 1185 uint64_t Val = 0; 1186 for (unsigned I = 0, E = Item.getMaskType().size(); I < E; ++I) 1187 Val |= ((uint64_t)Item.getMaskType()[I]) << I * 8; 1188 ArgVal = llvm::Constant::getIntegerValue(Int64Ty, llvm::APInt(64, Val)); 1189 } else if (const Expr *TheExpr = Item.getExpr()) { 1190 ArgVal = EmitScalarExpr(TheExpr, /*Ignore*/ false); 1191 1192 // Check if this is a retainable type. 1193 if (TheExpr->getType()->isObjCRetainableType()) { 1194 assert(getEvaluationKind(TheExpr->getType()) == TEK_Scalar && 1195 "Only scalar can be a ObjC retainable type"); 1196 // Check if the object is constant, if not, save it in 1197 // RetainableOperands. 1198 if (!isa<Constant>(ArgVal)) 1199 RetainableOperands.push_back(ArgVal); 1200 } 1201 } else { 1202 ArgVal = Builder.getInt32(Item.getConstValue().getQuantity()); 1203 } 1204 1205 unsigned ArgValSize = 1206 CGM.getDataLayout().getTypeSizeInBits(ArgVal->getType()); 1207 llvm::IntegerType *IntTy = llvm::Type::getIntNTy(getLLVMContext(), 1208 ArgValSize); 1209 ArgVal = Builder.CreateBitOrPointerCast(ArgVal, IntTy); 1210 CanQualType ArgTy = getOSLogArgType(Ctx, Size); 1211 // If ArgVal has type x86_fp80, zero-extend ArgVal. 1212 ArgVal = Builder.CreateZExtOrBitCast(ArgVal, ConvertType(ArgTy)); 1213 Args.add(RValue::get(ArgVal), ArgTy); 1214 } 1215 1216 const CGFunctionInfo &FI = 1217 CGM.getTypes().arrangeBuiltinFunctionCall(Ctx.VoidTy, Args); 1218 llvm::Function *F = CodeGenFunction(CGM).generateBuiltinOSLogHelperFunction( 1219 Layout, BufAddr.getAlignment()); 1220 EmitCall(FI, CGCallee::forDirect(F), ReturnValueSlot(), Args); 1221 1222 // Push a clang.arc.use cleanup for each object in RetainableOperands. The 1223 // cleanup will cause the use to appear after the final log call, keeping 1224 // the object valid while it’s held in the log buffer. Note that if there’s 1225 // a release cleanup on the object, it will already be active; since 1226 // cleanups are emitted in reverse order, the use will occur before the 1227 // object is released. 1228 if (!RetainableOperands.empty() && getLangOpts().ObjCAutoRefCount && 1229 CGM.getCodeGenOpts().OptimizationLevel != 0) 1230 for (llvm::Value *Object : RetainableOperands) 1231 pushFullExprCleanup<CallObjCArcUse>(getARCCleanupKind(), Object); 1232 1233 return RValue::get(BufAddr.getPointer()); 1234 } 1235 1236 /// Determine if a binop is a checked mixed-sign multiply we can specialize. 1237 static bool isSpecialMixedSignMultiply(unsigned BuiltinID, 1238 WidthAndSignedness Op1Info, 1239 WidthAndSignedness Op2Info, 1240 WidthAndSignedness ResultInfo) { 1241 return BuiltinID == Builtin::BI__builtin_mul_overflow && 1242 std::max(Op1Info.Width, Op2Info.Width) >= ResultInfo.Width && 1243 Op1Info.Signed != Op2Info.Signed; 1244 } 1245 1246 /// Emit a checked mixed-sign multiply. This is a cheaper specialization of 1247 /// the generic checked-binop irgen. 1248 static RValue 1249 EmitCheckedMixedSignMultiply(CodeGenFunction &CGF, const clang::Expr *Op1, 1250 WidthAndSignedness Op1Info, const clang::Expr *Op2, 1251 WidthAndSignedness Op2Info, 1252 const clang::Expr *ResultArg, QualType ResultQTy, 1253 WidthAndSignedness ResultInfo) { 1254 assert(isSpecialMixedSignMultiply(Builtin::BI__builtin_mul_overflow, Op1Info, 1255 Op2Info, ResultInfo) && 1256 "Not a mixed-sign multipliction we can specialize"); 1257 1258 // Emit the signed and unsigned operands. 1259 const clang::Expr *SignedOp = Op1Info.Signed ? Op1 : Op2; 1260 const clang::Expr *UnsignedOp = Op1Info.Signed ? Op2 : Op1; 1261 llvm::Value *Signed = CGF.EmitScalarExpr(SignedOp); 1262 llvm::Value *Unsigned = CGF.EmitScalarExpr(UnsignedOp); 1263 unsigned SignedOpWidth = Op1Info.Signed ? Op1Info.Width : Op2Info.Width; 1264 unsigned UnsignedOpWidth = Op1Info.Signed ? Op2Info.Width : Op1Info.Width; 1265 1266 // One of the operands may be smaller than the other. If so, [s|z]ext it. 1267 if (SignedOpWidth < UnsignedOpWidth) 1268 Signed = CGF.Builder.CreateSExt(Signed, Unsigned->getType(), "op.sext"); 1269 if (UnsignedOpWidth < SignedOpWidth) 1270 Unsigned = CGF.Builder.CreateZExt(Unsigned, Signed->getType(), "op.zext"); 1271 1272 llvm::Type *OpTy = Signed->getType(); 1273 llvm::Value *Zero = llvm::Constant::getNullValue(OpTy); 1274 Address ResultPtr = CGF.EmitPointerWithAlignment(ResultArg); 1275 llvm::Type *ResTy = ResultPtr.getElementType(); 1276 unsigned OpWidth = std::max(Op1Info.Width, Op2Info.Width); 1277 1278 // Take the absolute value of the signed operand. 1279 llvm::Value *IsNegative = CGF.Builder.CreateICmpSLT(Signed, Zero); 1280 llvm::Value *AbsOfNegative = CGF.Builder.CreateSub(Zero, Signed); 1281 llvm::Value *AbsSigned = 1282 CGF.Builder.CreateSelect(IsNegative, AbsOfNegative, Signed); 1283 1284 // Perform a checked unsigned multiplication. 1285 llvm::Value *UnsignedOverflow; 1286 llvm::Value *UnsignedResult = 1287 EmitOverflowIntrinsic(CGF, llvm::Intrinsic::umul_with_overflow, AbsSigned, 1288 Unsigned, UnsignedOverflow); 1289 1290 llvm::Value *Overflow, *Result; 1291 if (ResultInfo.Signed) { 1292 // Signed overflow occurs if the result is greater than INT_MAX or lesser 1293 // than INT_MIN, i.e when |Result| > (INT_MAX + IsNegative). 1294 auto IntMax = 1295 llvm::APInt::getSignedMaxValue(ResultInfo.Width).zextOrSelf(OpWidth); 1296 llvm::Value *MaxResult = 1297 CGF.Builder.CreateAdd(llvm::ConstantInt::get(OpTy, IntMax), 1298 CGF.Builder.CreateZExt(IsNegative, OpTy)); 1299 llvm::Value *SignedOverflow = 1300 CGF.Builder.CreateICmpUGT(UnsignedResult, MaxResult); 1301 Overflow = CGF.Builder.CreateOr(UnsignedOverflow, SignedOverflow); 1302 1303 // Prepare the signed result (possibly by negating it). 1304 llvm::Value *NegativeResult = CGF.Builder.CreateNeg(UnsignedResult); 1305 llvm::Value *SignedResult = 1306 CGF.Builder.CreateSelect(IsNegative, NegativeResult, UnsignedResult); 1307 Result = CGF.Builder.CreateTrunc(SignedResult, ResTy); 1308 } else { 1309 // Unsigned overflow occurs if the result is < 0 or greater than UINT_MAX. 1310 llvm::Value *Underflow = CGF.Builder.CreateAnd( 1311 IsNegative, CGF.Builder.CreateIsNotNull(UnsignedResult)); 1312 Overflow = CGF.Builder.CreateOr(UnsignedOverflow, Underflow); 1313 if (ResultInfo.Width < OpWidth) { 1314 auto IntMax = 1315 llvm::APInt::getMaxValue(ResultInfo.Width).zext(OpWidth); 1316 llvm::Value *TruncOverflow = CGF.Builder.CreateICmpUGT( 1317 UnsignedResult, llvm::ConstantInt::get(OpTy, IntMax)); 1318 Overflow = CGF.Builder.CreateOr(Overflow, TruncOverflow); 1319 } 1320 1321 // Negate the product if it would be negative in infinite precision. 1322 Result = CGF.Builder.CreateSelect( 1323 IsNegative, CGF.Builder.CreateNeg(UnsignedResult), UnsignedResult); 1324 1325 Result = CGF.Builder.CreateTrunc(Result, ResTy); 1326 } 1327 assert(Overflow && Result && "Missing overflow or result"); 1328 1329 bool isVolatile = 1330 ResultArg->getType()->getPointeeType().isVolatileQualified(); 1331 CGF.Builder.CreateStore(CGF.EmitToMemory(Result, ResultQTy), ResultPtr, 1332 isVolatile); 1333 return RValue::get(Overflow); 1334 } 1335 1336 static llvm::Value *dumpRecord(CodeGenFunction &CGF, QualType RType, 1337 Value *&RecordPtr, CharUnits Align, 1338 llvm::FunctionCallee Func, int Lvl) { 1339 const auto *RT = RType->getAs<RecordType>(); 1340 ASTContext &Context = CGF.getContext(); 1341 RecordDecl *RD = RT->getDecl()->getDefinition(); 1342 ASTContext &Ctx = RD->getASTContext(); 1343 const ASTRecordLayout &RL = Ctx.getASTRecordLayout(RD); 1344 std::string Pad = std::string(Lvl * 4, ' '); 1345 1346 Value *GString = 1347 CGF.Builder.CreateGlobalStringPtr(RType.getAsString() + " {\n"); 1348 Value *Res = CGF.Builder.CreateCall(Func, {GString}); 1349 1350 static llvm::DenseMap<QualType, const char *> Types; 1351 if (Types.empty()) { 1352 Types[Context.CharTy] = "%c"; 1353 Types[Context.BoolTy] = "%d"; 1354 Types[Context.SignedCharTy] = "%hhd"; 1355 Types[Context.UnsignedCharTy] = "%hhu"; 1356 Types[Context.IntTy] = "%d"; 1357 Types[Context.UnsignedIntTy] = "%u"; 1358 Types[Context.LongTy] = "%ld"; 1359 Types[Context.UnsignedLongTy] = "%lu"; 1360 Types[Context.LongLongTy] = "%lld"; 1361 Types[Context.UnsignedLongLongTy] = "%llu"; 1362 Types[Context.ShortTy] = "%hd"; 1363 Types[Context.UnsignedShortTy] = "%hu"; 1364 Types[Context.VoidPtrTy] = "%p"; 1365 Types[Context.FloatTy] = "%f"; 1366 Types[Context.DoubleTy] = "%f"; 1367 Types[Context.LongDoubleTy] = "%Lf"; 1368 Types[Context.getPointerType(Context.CharTy)] = "%s"; 1369 Types[Context.getPointerType(Context.getConstType(Context.CharTy))] = "%s"; 1370 } 1371 1372 for (const auto *FD : RD->fields()) { 1373 uint64_t Off = RL.getFieldOffset(FD->getFieldIndex()); 1374 Off = Ctx.toCharUnitsFromBits(Off).getQuantity(); 1375 1376 Value *FieldPtr = RecordPtr; 1377 if (RD->isUnion()) 1378 FieldPtr = CGF.Builder.CreatePointerCast( 1379 FieldPtr, CGF.ConvertType(Context.getPointerType(FD->getType()))); 1380 else 1381 FieldPtr = CGF.Builder.CreateStructGEP(CGF.ConvertType(RType), FieldPtr, 1382 FD->getFieldIndex()); 1383 1384 GString = CGF.Builder.CreateGlobalStringPtr( 1385 llvm::Twine(Pad) 1386 .concat(FD->getType().getAsString()) 1387 .concat(llvm::Twine(' ')) 1388 .concat(FD->getNameAsString()) 1389 .concat(" : ") 1390 .str()); 1391 Value *TmpRes = CGF.Builder.CreateCall(Func, {GString}); 1392 Res = CGF.Builder.CreateAdd(Res, TmpRes); 1393 1394 QualType CanonicalType = 1395 FD->getType().getUnqualifiedType().getCanonicalType(); 1396 1397 // We check whether we are in a recursive type 1398 if (CanonicalType->isRecordType()) { 1399 Value *TmpRes = 1400 dumpRecord(CGF, CanonicalType, FieldPtr, Align, Func, Lvl + 1); 1401 Res = CGF.Builder.CreateAdd(TmpRes, Res); 1402 continue; 1403 } 1404 1405 // We try to determine the best format to print the current field 1406 llvm::Twine Format = Types.find(CanonicalType) == Types.end() 1407 ? Types[Context.VoidPtrTy] 1408 : Types[CanonicalType]; 1409 1410 Address FieldAddress = Address(FieldPtr, Align); 1411 FieldPtr = CGF.Builder.CreateLoad(FieldAddress); 1412 1413 // FIXME Need to handle bitfield here 1414 GString = CGF.Builder.CreateGlobalStringPtr( 1415 Format.concat(llvm::Twine('\n')).str()); 1416 TmpRes = CGF.Builder.CreateCall(Func, {GString, FieldPtr}); 1417 Res = CGF.Builder.CreateAdd(Res, TmpRes); 1418 } 1419 1420 GString = CGF.Builder.CreateGlobalStringPtr(Pad + "}\n"); 1421 Value *TmpRes = CGF.Builder.CreateCall(Func, {GString}); 1422 Res = CGF.Builder.CreateAdd(Res, TmpRes); 1423 return Res; 1424 } 1425 1426 static bool 1427 TypeRequiresBuiltinLaunderImp(const ASTContext &Ctx, QualType Ty, 1428 llvm::SmallPtrSetImpl<const Decl *> &Seen) { 1429 if (const auto *Arr = Ctx.getAsArrayType(Ty)) 1430 Ty = Ctx.getBaseElementType(Arr); 1431 1432 const auto *Record = Ty->getAsCXXRecordDecl(); 1433 if (!Record) 1434 return false; 1435 1436 // We've already checked this type, or are in the process of checking it. 1437 if (!Seen.insert(Record).second) 1438 return false; 1439 1440 assert(Record->hasDefinition() && 1441 "Incomplete types should already be diagnosed"); 1442 1443 if (Record->isDynamicClass()) 1444 return true; 1445 1446 for (FieldDecl *F : Record->fields()) { 1447 if (TypeRequiresBuiltinLaunderImp(Ctx, F->getType(), Seen)) 1448 return true; 1449 } 1450 return false; 1451 } 1452 1453 /// Determine if the specified type requires laundering by checking if it is a 1454 /// dynamic class type or contains a subobject which is a dynamic class type. 1455 static bool TypeRequiresBuiltinLaunder(CodeGenModule &CGM, QualType Ty) { 1456 if (!CGM.getCodeGenOpts().StrictVTablePointers) 1457 return false; 1458 llvm::SmallPtrSet<const Decl *, 16> Seen; 1459 return TypeRequiresBuiltinLaunderImp(CGM.getContext(), Ty, Seen); 1460 } 1461 1462 RValue CodeGenFunction::emitRotate(const CallExpr *E, bool IsRotateRight) { 1463 llvm::Value *Src = EmitScalarExpr(E->getArg(0)); 1464 llvm::Value *ShiftAmt = EmitScalarExpr(E->getArg(1)); 1465 1466 // The builtin's shift arg may have a different type than the source arg and 1467 // result, but the LLVM intrinsic uses the same type for all values. 1468 llvm::Type *Ty = Src->getType(); 1469 ShiftAmt = Builder.CreateIntCast(ShiftAmt, Ty, false); 1470 1471 // Rotate is a special case of LLVM funnel shift - 1st 2 args are the same. 1472 unsigned IID = IsRotateRight ? Intrinsic::fshr : Intrinsic::fshl; 1473 Function *F = CGM.getIntrinsic(IID, Ty); 1474 return RValue::get(Builder.CreateCall(F, { Src, Src, ShiftAmt })); 1475 } 1476 1477 /// For a call to a builtin C standard library function, emit a call to a 1478 /// fortified variant using __builtin_object_size. For instance, instead of 1479 /// emitting `sprintf(buf, "%d", 32)`, this function would emit 1480 /// `__sprintf_chk(buf, Flag, __builtin_object_size(buf, 0), "%d", 32)`. 1481 RValue CodeGenFunction::emitFortifiedStdLibCall(CodeGenFunction &CGF, 1482 const CallExpr *CE, 1483 unsigned BuiltinID, 1484 unsigned BOSType, 1485 unsigned Flag) { 1486 SmallVector<llvm::Value *, 8> ArgVals; 1487 for (const Expr *Arg : CE->arguments()) 1488 ArgVals.push_back(EmitScalarExpr(Arg)); 1489 1490 llvm::Value *FlagVal = llvm::ConstantInt::get(IntTy, Flag); 1491 auto emitObjSize = [&]() { 1492 return evaluateOrEmitBuiltinObjectSize(CE->getArg(0), BOSType, SizeTy, 1493 ArgVals[0], false); 1494 }; 1495 1496 unsigned FortifiedVariantID = Builtin::getFortifiedVariantFunction(BuiltinID); 1497 assert(FortifiedVariantID != 0 && "Should be diagnosed in Sema"); 1498 1499 // Adjust ArgVals to include a __builtin_object_size(n) or flag argument at 1500 // the right position. Variadic printf-like functions take a flag and object 1501 // size (if they're printing to a string) before the format string, and all 1502 // other functions just take the object size as their last argument. The 1503 // object size, if present, always corresponds to the first argument. 1504 switch (BuiltinID) { 1505 case Builtin::BImemcpy: 1506 case Builtin::BImemmove: 1507 case Builtin::BImemset: 1508 case Builtin::BIstpcpy: 1509 case Builtin::BIstrcat: 1510 case Builtin::BIstrcpy: 1511 case Builtin::BIstrlcat: 1512 case Builtin::BIstrlcpy: 1513 case Builtin::BIstrncat: 1514 case Builtin::BIstrncpy: 1515 case Builtin::BIstpncpy: 1516 ArgVals.push_back(emitObjSize()); 1517 break; 1518 1519 case Builtin::BIsnprintf: 1520 case Builtin::BIvsnprintf: 1521 ArgVals.insert(ArgVals.begin() + 2, FlagVal); 1522 ArgVals.insert(ArgVals.begin() + 3, emitObjSize()); 1523 break; 1524 1525 case Builtin::BIsprintf: 1526 case Builtin::BIvsprintf: 1527 ArgVals.insert(ArgVals.begin() + 1, FlagVal); 1528 ArgVals.insert(ArgVals.begin() + 2, emitObjSize()); 1529 break; 1530 1531 case Builtin::BIfprintf: 1532 case Builtin::BIvfprintf: 1533 ArgVals.insert(ArgVals.begin() + 1, FlagVal); 1534 break; 1535 1536 case Builtin::BIprintf: 1537 case Builtin::BIvprintf: 1538 ArgVals.insert(ArgVals.begin(), FlagVal); 1539 break; 1540 1541 default: 1542 llvm_unreachable("Unknown fortified builtin?"); 1543 } 1544 1545 ASTContext::GetBuiltinTypeError Err; 1546 QualType VariantTy = getContext().GetBuiltinType(FortifiedVariantID, Err); 1547 assert(Err == ASTContext::GE_None && "Should not codegen an error"); 1548 auto *LLVMVariantTy = cast<llvm::FunctionType>(ConvertType(VariantTy)); 1549 StringRef VariantName = getContext().BuiltinInfo.getName(FortifiedVariantID) + 1550 strlen("__builtin_"); 1551 1552 llvm::Value *V = Builder.CreateCall( 1553 CGM.CreateRuntimeFunction(LLVMVariantTy, VariantName), ArgVals); 1554 return RValue::get(V); 1555 } 1556 1557 RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID, 1558 const CallExpr *E, 1559 ReturnValueSlot ReturnValue) { 1560 const FunctionDecl *FD = GD.getDecl()->getAsFunction(); 1561 // See if we can constant fold this builtin. If so, don't emit it at all. 1562 Expr::EvalResult Result; 1563 if (E->EvaluateAsRValue(Result, CGM.getContext()) && 1564 !Result.hasSideEffects()) { 1565 if (Result.Val.isInt()) 1566 return RValue::get(llvm::ConstantInt::get(getLLVMContext(), 1567 Result.Val.getInt())); 1568 if (Result.Val.isFloat()) 1569 return RValue::get(llvm::ConstantFP::get(getLLVMContext(), 1570 Result.Val.getFloat())); 1571 } 1572 1573 if (const auto *FortifyAttr = FD->getAttr<FortifyStdLibAttr>()) 1574 return emitFortifiedStdLibCall(*this, E, BuiltinID, FortifyAttr->getType(), 1575 FortifyAttr->getFlag()); 1576 1577 // There are LLVM math intrinsics/instructions corresponding to math library 1578 // functions except the LLVM op will never set errno while the math library 1579 // might. Also, math builtins have the same semantics as their math library 1580 // twins. Thus, we can transform math library and builtin calls to their 1581 // LLVM counterparts if the call is marked 'const' (known to never set errno). 1582 if (FD->hasAttr<ConstAttr>()) { 1583 switch (BuiltinID) { 1584 case Builtin::BIceil: 1585 case Builtin::BIceilf: 1586 case Builtin::BIceill: 1587 case Builtin::BI__builtin_ceil: 1588 case Builtin::BI__builtin_ceilf: 1589 case Builtin::BI__builtin_ceill: 1590 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::ceil)); 1591 1592 case Builtin::BIcopysign: 1593 case Builtin::BIcopysignf: 1594 case Builtin::BIcopysignl: 1595 case Builtin::BI__builtin_copysign: 1596 case Builtin::BI__builtin_copysignf: 1597 case Builtin::BI__builtin_copysignl: 1598 case Builtin::BI__builtin_copysignf128: 1599 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::copysign)); 1600 1601 case Builtin::BIcos: 1602 case Builtin::BIcosf: 1603 case Builtin::BIcosl: 1604 case Builtin::BI__builtin_cos: 1605 case Builtin::BI__builtin_cosf: 1606 case Builtin::BI__builtin_cosl: 1607 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::cos)); 1608 1609 case Builtin::BIexp: 1610 case Builtin::BIexpf: 1611 case Builtin::BIexpl: 1612 case Builtin::BI__builtin_exp: 1613 case Builtin::BI__builtin_expf: 1614 case Builtin::BI__builtin_expl: 1615 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::exp)); 1616 1617 case Builtin::BIexp2: 1618 case Builtin::BIexp2f: 1619 case Builtin::BIexp2l: 1620 case Builtin::BI__builtin_exp2: 1621 case Builtin::BI__builtin_exp2f: 1622 case Builtin::BI__builtin_exp2l: 1623 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::exp2)); 1624 1625 case Builtin::BIfabs: 1626 case Builtin::BIfabsf: 1627 case Builtin::BIfabsl: 1628 case Builtin::BI__builtin_fabs: 1629 case Builtin::BI__builtin_fabsf: 1630 case Builtin::BI__builtin_fabsl: 1631 case Builtin::BI__builtin_fabsf128: 1632 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::fabs)); 1633 1634 case Builtin::BIfloor: 1635 case Builtin::BIfloorf: 1636 case Builtin::BIfloorl: 1637 case Builtin::BI__builtin_floor: 1638 case Builtin::BI__builtin_floorf: 1639 case Builtin::BI__builtin_floorl: 1640 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::floor)); 1641 1642 case Builtin::BIfma: 1643 case Builtin::BIfmaf: 1644 case Builtin::BIfmal: 1645 case Builtin::BI__builtin_fma: 1646 case Builtin::BI__builtin_fmaf: 1647 case Builtin::BI__builtin_fmal: 1648 return RValue::get(emitTernaryBuiltin(*this, E, Intrinsic::fma)); 1649 1650 case Builtin::BIfmax: 1651 case Builtin::BIfmaxf: 1652 case Builtin::BIfmaxl: 1653 case Builtin::BI__builtin_fmax: 1654 case Builtin::BI__builtin_fmaxf: 1655 case Builtin::BI__builtin_fmaxl: 1656 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::maxnum)); 1657 1658 case Builtin::BIfmin: 1659 case Builtin::BIfminf: 1660 case Builtin::BIfminl: 1661 case Builtin::BI__builtin_fmin: 1662 case Builtin::BI__builtin_fminf: 1663 case Builtin::BI__builtin_fminl: 1664 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::minnum)); 1665 1666 // fmod() is a special-case. It maps to the frem instruction rather than an 1667 // LLVM intrinsic. 1668 case Builtin::BIfmod: 1669 case Builtin::BIfmodf: 1670 case Builtin::BIfmodl: 1671 case Builtin::BI__builtin_fmod: 1672 case Builtin::BI__builtin_fmodf: 1673 case Builtin::BI__builtin_fmodl: { 1674 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 1675 Value *Arg2 = EmitScalarExpr(E->getArg(1)); 1676 return RValue::get(Builder.CreateFRem(Arg1, Arg2, "fmod")); 1677 } 1678 1679 case Builtin::BIlog: 1680 case Builtin::BIlogf: 1681 case Builtin::BIlogl: 1682 case Builtin::BI__builtin_log: 1683 case Builtin::BI__builtin_logf: 1684 case Builtin::BI__builtin_logl: 1685 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::log)); 1686 1687 case Builtin::BIlog10: 1688 case Builtin::BIlog10f: 1689 case Builtin::BIlog10l: 1690 case Builtin::BI__builtin_log10: 1691 case Builtin::BI__builtin_log10f: 1692 case Builtin::BI__builtin_log10l: 1693 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::log10)); 1694 1695 case Builtin::BIlog2: 1696 case Builtin::BIlog2f: 1697 case Builtin::BIlog2l: 1698 case Builtin::BI__builtin_log2: 1699 case Builtin::BI__builtin_log2f: 1700 case Builtin::BI__builtin_log2l: 1701 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::log2)); 1702 1703 case Builtin::BInearbyint: 1704 case Builtin::BInearbyintf: 1705 case Builtin::BInearbyintl: 1706 case Builtin::BI__builtin_nearbyint: 1707 case Builtin::BI__builtin_nearbyintf: 1708 case Builtin::BI__builtin_nearbyintl: 1709 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::nearbyint)); 1710 1711 case Builtin::BIpow: 1712 case Builtin::BIpowf: 1713 case Builtin::BIpowl: 1714 case Builtin::BI__builtin_pow: 1715 case Builtin::BI__builtin_powf: 1716 case Builtin::BI__builtin_powl: 1717 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::pow)); 1718 1719 case Builtin::BIrint: 1720 case Builtin::BIrintf: 1721 case Builtin::BIrintl: 1722 case Builtin::BI__builtin_rint: 1723 case Builtin::BI__builtin_rintf: 1724 case Builtin::BI__builtin_rintl: 1725 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::rint)); 1726 1727 case Builtin::BIround: 1728 case Builtin::BIroundf: 1729 case Builtin::BIroundl: 1730 case Builtin::BI__builtin_round: 1731 case Builtin::BI__builtin_roundf: 1732 case Builtin::BI__builtin_roundl: 1733 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::round)); 1734 1735 case Builtin::BIsin: 1736 case Builtin::BIsinf: 1737 case Builtin::BIsinl: 1738 case Builtin::BI__builtin_sin: 1739 case Builtin::BI__builtin_sinf: 1740 case Builtin::BI__builtin_sinl: 1741 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::sin)); 1742 1743 case Builtin::BIsqrt: 1744 case Builtin::BIsqrtf: 1745 case Builtin::BIsqrtl: 1746 case Builtin::BI__builtin_sqrt: 1747 case Builtin::BI__builtin_sqrtf: 1748 case Builtin::BI__builtin_sqrtl: 1749 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::sqrt)); 1750 1751 case Builtin::BItrunc: 1752 case Builtin::BItruncf: 1753 case Builtin::BItruncl: 1754 case Builtin::BI__builtin_trunc: 1755 case Builtin::BI__builtin_truncf: 1756 case Builtin::BI__builtin_truncl: 1757 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::trunc)); 1758 1759 default: 1760 break; 1761 } 1762 } 1763 1764 switch (BuiltinID) { 1765 default: break; 1766 case Builtin::BI__builtin___CFStringMakeConstantString: 1767 case Builtin::BI__builtin___NSStringMakeConstantString: 1768 return RValue::get(ConstantEmitter(*this).emitAbstract(E, E->getType())); 1769 case Builtin::BI__builtin_stdarg_start: 1770 case Builtin::BI__builtin_va_start: 1771 case Builtin::BI__va_start: 1772 case Builtin::BI__builtin_va_end: 1773 return RValue::get( 1774 EmitVAStartEnd(BuiltinID == Builtin::BI__va_start 1775 ? EmitScalarExpr(E->getArg(0)) 1776 : EmitVAListRef(E->getArg(0)).getPointer(), 1777 BuiltinID != Builtin::BI__builtin_va_end)); 1778 case Builtin::BI__builtin_va_copy: { 1779 Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer(); 1780 Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer(); 1781 1782 llvm::Type *Type = Int8PtrTy; 1783 1784 DstPtr = Builder.CreateBitCast(DstPtr, Type); 1785 SrcPtr = Builder.CreateBitCast(SrcPtr, Type); 1786 return RValue::get(Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), 1787 {DstPtr, SrcPtr})); 1788 } 1789 case Builtin::BI__builtin_abs: 1790 case Builtin::BI__builtin_labs: 1791 case Builtin::BI__builtin_llabs: { 1792 // X < 0 ? -X : X 1793 // The negation has 'nsw' because abs of INT_MIN is undefined. 1794 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1795 Value *NegOp = Builder.CreateNSWNeg(ArgValue, "neg"); 1796 Constant *Zero = llvm::Constant::getNullValue(ArgValue->getType()); 1797 Value *CmpResult = Builder.CreateICmpSLT(ArgValue, Zero, "abscond"); 1798 Value *Result = Builder.CreateSelect(CmpResult, NegOp, ArgValue, "abs"); 1799 return RValue::get(Result); 1800 } 1801 case Builtin::BI__builtin_conj: 1802 case Builtin::BI__builtin_conjf: 1803 case Builtin::BI__builtin_conjl: { 1804 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 1805 Value *Real = ComplexVal.first; 1806 Value *Imag = ComplexVal.second; 1807 Value *Zero = 1808 Imag->getType()->isFPOrFPVectorTy() 1809 ? llvm::ConstantFP::getZeroValueForNegation(Imag->getType()) 1810 : llvm::Constant::getNullValue(Imag->getType()); 1811 1812 Imag = Builder.CreateFSub(Zero, Imag, "sub"); 1813 return RValue::getComplex(std::make_pair(Real, Imag)); 1814 } 1815 case Builtin::BI__builtin_creal: 1816 case Builtin::BI__builtin_crealf: 1817 case Builtin::BI__builtin_creall: 1818 case Builtin::BIcreal: 1819 case Builtin::BIcrealf: 1820 case Builtin::BIcreall: { 1821 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 1822 return RValue::get(ComplexVal.first); 1823 } 1824 1825 case Builtin::BI__builtin_dump_struct: { 1826 llvm::Type *LLVMIntTy = getTypes().ConvertType(getContext().IntTy); 1827 llvm::FunctionType *LLVMFuncType = llvm::FunctionType::get( 1828 LLVMIntTy, {llvm::Type::getInt8PtrTy(getLLVMContext())}, true); 1829 1830 Value *Func = EmitScalarExpr(E->getArg(1)->IgnoreImpCasts()); 1831 CharUnits Arg0Align = EmitPointerWithAlignment(E->getArg(0)).getAlignment(); 1832 1833 const Expr *Arg0 = E->getArg(0)->IgnoreImpCasts(); 1834 QualType Arg0Type = Arg0->getType()->getPointeeType(); 1835 1836 Value *RecordPtr = EmitScalarExpr(Arg0); 1837 Value *Res = dumpRecord(*this, Arg0Type, RecordPtr, Arg0Align, 1838 {LLVMFuncType, Func}, 0); 1839 return RValue::get(Res); 1840 } 1841 1842 case Builtin::BI__builtin_cimag: 1843 case Builtin::BI__builtin_cimagf: 1844 case Builtin::BI__builtin_cimagl: 1845 case Builtin::BIcimag: 1846 case Builtin::BIcimagf: 1847 case Builtin::BIcimagl: { 1848 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 1849 return RValue::get(ComplexVal.second); 1850 } 1851 1852 case Builtin::BI__builtin_clrsb: 1853 case Builtin::BI__builtin_clrsbl: 1854 case Builtin::BI__builtin_clrsbll: { 1855 // clrsb(x) -> clz(x < 0 ? ~x : x) - 1 or 1856 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1857 1858 llvm::Type *ArgType = ArgValue->getType(); 1859 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 1860 1861 llvm::Type *ResultType = ConvertType(E->getType()); 1862 Value *Zero = llvm::Constant::getNullValue(ArgType); 1863 Value *IsNeg = Builder.CreateICmpSLT(ArgValue, Zero, "isneg"); 1864 Value *Inverse = Builder.CreateNot(ArgValue, "not"); 1865 Value *Tmp = Builder.CreateSelect(IsNeg, Inverse, ArgValue); 1866 Value *Ctlz = Builder.CreateCall(F, {Tmp, Builder.getFalse()}); 1867 Value *Result = Builder.CreateSub(Ctlz, llvm::ConstantInt::get(ArgType, 1)); 1868 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1869 "cast"); 1870 return RValue::get(Result); 1871 } 1872 case Builtin::BI__builtin_ctzs: 1873 case Builtin::BI__builtin_ctz: 1874 case Builtin::BI__builtin_ctzl: 1875 case Builtin::BI__builtin_ctzll: { 1876 Value *ArgValue = EmitCheckedArgForBuiltin(E->getArg(0), BCK_CTZPassedZero); 1877 1878 llvm::Type *ArgType = ArgValue->getType(); 1879 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 1880 1881 llvm::Type *ResultType = ConvertType(E->getType()); 1882 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 1883 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 1884 if (Result->getType() != ResultType) 1885 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1886 "cast"); 1887 return RValue::get(Result); 1888 } 1889 case Builtin::BI__builtin_clzs: 1890 case Builtin::BI__builtin_clz: 1891 case Builtin::BI__builtin_clzl: 1892 case Builtin::BI__builtin_clzll: { 1893 Value *ArgValue = EmitCheckedArgForBuiltin(E->getArg(0), BCK_CLZPassedZero); 1894 1895 llvm::Type *ArgType = ArgValue->getType(); 1896 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 1897 1898 llvm::Type *ResultType = ConvertType(E->getType()); 1899 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 1900 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 1901 if (Result->getType() != ResultType) 1902 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1903 "cast"); 1904 return RValue::get(Result); 1905 } 1906 case Builtin::BI__builtin_ffs: 1907 case Builtin::BI__builtin_ffsl: 1908 case Builtin::BI__builtin_ffsll: { 1909 // ffs(x) -> x ? cttz(x) + 1 : 0 1910 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1911 1912 llvm::Type *ArgType = ArgValue->getType(); 1913 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 1914 1915 llvm::Type *ResultType = ConvertType(E->getType()); 1916 Value *Tmp = 1917 Builder.CreateAdd(Builder.CreateCall(F, {ArgValue, Builder.getTrue()}), 1918 llvm::ConstantInt::get(ArgType, 1)); 1919 Value *Zero = llvm::Constant::getNullValue(ArgType); 1920 Value *IsZero = Builder.CreateICmpEQ(ArgValue, Zero, "iszero"); 1921 Value *Result = Builder.CreateSelect(IsZero, Zero, Tmp, "ffs"); 1922 if (Result->getType() != ResultType) 1923 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1924 "cast"); 1925 return RValue::get(Result); 1926 } 1927 case Builtin::BI__builtin_parity: 1928 case Builtin::BI__builtin_parityl: 1929 case Builtin::BI__builtin_parityll: { 1930 // parity(x) -> ctpop(x) & 1 1931 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1932 1933 llvm::Type *ArgType = ArgValue->getType(); 1934 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 1935 1936 llvm::Type *ResultType = ConvertType(E->getType()); 1937 Value *Tmp = Builder.CreateCall(F, ArgValue); 1938 Value *Result = Builder.CreateAnd(Tmp, llvm::ConstantInt::get(ArgType, 1)); 1939 if (Result->getType() != ResultType) 1940 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1941 "cast"); 1942 return RValue::get(Result); 1943 } 1944 case Builtin::BI__lzcnt16: 1945 case Builtin::BI__lzcnt: 1946 case Builtin::BI__lzcnt64: { 1947 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1948 1949 llvm::Type *ArgType = ArgValue->getType(); 1950 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 1951 1952 llvm::Type *ResultType = ConvertType(E->getType()); 1953 Value *Result = Builder.CreateCall(F, {ArgValue, Builder.getFalse()}); 1954 if (Result->getType() != ResultType) 1955 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1956 "cast"); 1957 return RValue::get(Result); 1958 } 1959 case Builtin::BI__popcnt16: 1960 case Builtin::BI__popcnt: 1961 case Builtin::BI__popcnt64: 1962 case Builtin::BI__builtin_popcount: 1963 case Builtin::BI__builtin_popcountl: 1964 case Builtin::BI__builtin_popcountll: { 1965 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1966 1967 llvm::Type *ArgType = ArgValue->getType(); 1968 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 1969 1970 llvm::Type *ResultType = ConvertType(E->getType()); 1971 Value *Result = Builder.CreateCall(F, ArgValue); 1972 if (Result->getType() != ResultType) 1973 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 1974 "cast"); 1975 return RValue::get(Result); 1976 } 1977 case Builtin::BI__builtin_unpredictable: { 1978 // Always return the argument of __builtin_unpredictable. LLVM does not 1979 // handle this builtin. Metadata for this builtin should be added directly 1980 // to instructions such as branches or switches that use it. 1981 return RValue::get(EmitScalarExpr(E->getArg(0))); 1982 } 1983 case Builtin::BI__builtin_expect: { 1984 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 1985 llvm::Type *ArgType = ArgValue->getType(); 1986 1987 Value *ExpectedValue = EmitScalarExpr(E->getArg(1)); 1988 // Don't generate llvm.expect on -O0 as the backend won't use it for 1989 // anything. 1990 // Note, we still IRGen ExpectedValue because it could have side-effects. 1991 if (CGM.getCodeGenOpts().OptimizationLevel == 0) 1992 return RValue::get(ArgValue); 1993 1994 Function *FnExpect = CGM.getIntrinsic(Intrinsic::expect, ArgType); 1995 Value *Result = 1996 Builder.CreateCall(FnExpect, {ArgValue, ExpectedValue}, "expval"); 1997 return RValue::get(Result); 1998 } 1999 case Builtin::BI__builtin_assume_aligned: { 2000 const Expr *Ptr = E->getArg(0); 2001 Value *PtrValue = EmitScalarExpr(Ptr); 2002 Value *OffsetValue = 2003 (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : nullptr; 2004 2005 Value *AlignmentValue = EmitScalarExpr(E->getArg(1)); 2006 ConstantInt *AlignmentCI = cast<ConstantInt>(AlignmentValue); 2007 unsigned Alignment = (unsigned)AlignmentCI->getZExtValue(); 2008 2009 EmitAlignmentAssumption(PtrValue, Ptr, /*The expr loc is sufficient.*/ SourceLocation(), 2010 Alignment, OffsetValue); 2011 return RValue::get(PtrValue); 2012 } 2013 case Builtin::BI__assume: 2014 case Builtin::BI__builtin_assume: { 2015 if (E->getArg(0)->HasSideEffects(getContext())) 2016 return RValue::get(nullptr); 2017 2018 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 2019 Function *FnAssume = CGM.getIntrinsic(Intrinsic::assume); 2020 return RValue::get(Builder.CreateCall(FnAssume, ArgValue)); 2021 } 2022 case Builtin::BI__builtin_bswap16: 2023 case Builtin::BI__builtin_bswap32: 2024 case Builtin::BI__builtin_bswap64: { 2025 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bswap)); 2026 } 2027 case Builtin::BI__builtin_bitreverse8: 2028 case Builtin::BI__builtin_bitreverse16: 2029 case Builtin::BI__builtin_bitreverse32: 2030 case Builtin::BI__builtin_bitreverse64: { 2031 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bitreverse)); 2032 } 2033 case Builtin::BI__builtin_rotateleft8: 2034 case Builtin::BI__builtin_rotateleft16: 2035 case Builtin::BI__builtin_rotateleft32: 2036 case Builtin::BI__builtin_rotateleft64: 2037 case Builtin::BI_rotl8: // Microsoft variants of rotate left 2038 case Builtin::BI_rotl16: 2039 case Builtin::BI_rotl: 2040 case Builtin::BI_lrotl: 2041 case Builtin::BI_rotl64: 2042 return emitRotate(E, false); 2043 2044 case Builtin::BI__builtin_rotateright8: 2045 case Builtin::BI__builtin_rotateright16: 2046 case Builtin::BI__builtin_rotateright32: 2047 case Builtin::BI__builtin_rotateright64: 2048 case Builtin::BI_rotr8: // Microsoft variants of rotate right 2049 case Builtin::BI_rotr16: 2050 case Builtin::BI_rotr: 2051 case Builtin::BI_lrotr: 2052 case Builtin::BI_rotr64: 2053 return emitRotate(E, true); 2054 2055 case Builtin::BI__builtin_constant_p: { 2056 llvm::Type *ResultType = ConvertType(E->getType()); 2057 if (CGM.getCodeGenOpts().OptimizationLevel == 0) 2058 // At -O0, we don't perform inlining, so we don't need to delay the 2059 // processing. 2060 return RValue::get(ConstantInt::get(ResultType, 0)); 2061 2062 const Expr *Arg = E->getArg(0); 2063 QualType ArgType = Arg->getType(); 2064 if (!hasScalarEvaluationKind(ArgType) || ArgType->isFunctionType()) 2065 // We can only reason about scalar types. 2066 return RValue::get(ConstantInt::get(ResultType, 0)); 2067 2068 Value *ArgValue = EmitScalarExpr(Arg); 2069 if (ArgType->isObjCObjectPointerType()) { 2070 // Convert Objective-C objects to id because we cannot distinguish between 2071 // LLVM types for Obj-C classes as they are opaque. 2072 ArgType = CGM.getContext().getObjCIdType(); 2073 ArgValue = Builder.CreateBitCast(ArgValue, ConvertType(ArgType)); 2074 } 2075 Function *F = 2076 CGM.getIntrinsic(Intrinsic::is_constant, ConvertType(ArgType)); 2077 Value *Result = Builder.CreateCall(F, ArgValue); 2078 if (Result->getType() != ResultType) 2079 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/false); 2080 return RValue::get(Result); 2081 } 2082 case Builtin::BI__builtin_dynamic_object_size: 2083 case Builtin::BI__builtin_object_size: { 2084 unsigned Type = 2085 E->getArg(1)->EvaluateKnownConstInt(getContext()).getZExtValue(); 2086 auto *ResType = cast<llvm::IntegerType>(ConvertType(E->getType())); 2087 2088 // We pass this builtin onto the optimizer so that it can figure out the 2089 // object size in more complex cases. 2090 bool IsDynamic = BuiltinID == Builtin::BI__builtin_dynamic_object_size; 2091 return RValue::get(emitBuiltinObjectSize(E->getArg(0), Type, ResType, 2092 /*EmittedE=*/nullptr, IsDynamic)); 2093 } 2094 case Builtin::BI__builtin_prefetch: { 2095 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); 2096 // FIXME: Technically these constants should of type 'int', yes? 2097 RW = (E->getNumArgs() > 1) ? EmitScalarExpr(E->getArg(1)) : 2098 llvm::ConstantInt::get(Int32Ty, 0); 2099 Locality = (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : 2100 llvm::ConstantInt::get(Int32Ty, 3); 2101 Value *Data = llvm::ConstantInt::get(Int32Ty, 1); 2102 Function *F = CGM.getIntrinsic(Intrinsic::prefetch); 2103 return RValue::get(Builder.CreateCall(F, {Address, RW, Locality, Data})); 2104 } 2105 case Builtin::BI__builtin_readcyclecounter: { 2106 Function *F = CGM.getIntrinsic(Intrinsic::readcyclecounter); 2107 return RValue::get(Builder.CreateCall(F)); 2108 } 2109 case Builtin::BI__builtin___clear_cache: { 2110 Value *Begin = EmitScalarExpr(E->getArg(0)); 2111 Value *End = EmitScalarExpr(E->getArg(1)); 2112 Function *F = CGM.getIntrinsic(Intrinsic::clear_cache); 2113 return RValue::get(Builder.CreateCall(F, {Begin, End})); 2114 } 2115 case Builtin::BI__builtin_trap: 2116 return RValue::get(EmitTrapCall(Intrinsic::trap)); 2117 case Builtin::BI__debugbreak: 2118 return RValue::get(EmitTrapCall(Intrinsic::debugtrap)); 2119 case Builtin::BI__builtin_unreachable: { 2120 EmitUnreachable(E->getExprLoc()); 2121 2122 // We do need to preserve an insertion point. 2123 EmitBlock(createBasicBlock("unreachable.cont")); 2124 2125 return RValue::get(nullptr); 2126 } 2127 2128 case Builtin::BI__builtin_powi: 2129 case Builtin::BI__builtin_powif: 2130 case Builtin::BI__builtin_powil: { 2131 Value *Base = EmitScalarExpr(E->getArg(0)); 2132 Value *Exponent = EmitScalarExpr(E->getArg(1)); 2133 llvm::Type *ArgType = Base->getType(); 2134 Function *F = CGM.getIntrinsic(Intrinsic::powi, ArgType); 2135 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 2136 } 2137 2138 case Builtin::BI__builtin_isgreater: 2139 case Builtin::BI__builtin_isgreaterequal: 2140 case Builtin::BI__builtin_isless: 2141 case Builtin::BI__builtin_islessequal: 2142 case Builtin::BI__builtin_islessgreater: 2143 case Builtin::BI__builtin_isunordered: { 2144 // Ordered comparisons: we know the arguments to these are matching scalar 2145 // floating point values. 2146 Value *LHS = EmitScalarExpr(E->getArg(0)); 2147 Value *RHS = EmitScalarExpr(E->getArg(1)); 2148 2149 switch (BuiltinID) { 2150 default: llvm_unreachable("Unknown ordered comparison"); 2151 case Builtin::BI__builtin_isgreater: 2152 LHS = Builder.CreateFCmpOGT(LHS, RHS, "cmp"); 2153 break; 2154 case Builtin::BI__builtin_isgreaterequal: 2155 LHS = Builder.CreateFCmpOGE(LHS, RHS, "cmp"); 2156 break; 2157 case Builtin::BI__builtin_isless: 2158 LHS = Builder.CreateFCmpOLT(LHS, RHS, "cmp"); 2159 break; 2160 case Builtin::BI__builtin_islessequal: 2161 LHS = Builder.CreateFCmpOLE(LHS, RHS, "cmp"); 2162 break; 2163 case Builtin::BI__builtin_islessgreater: 2164 LHS = Builder.CreateFCmpONE(LHS, RHS, "cmp"); 2165 break; 2166 case Builtin::BI__builtin_isunordered: 2167 LHS = Builder.CreateFCmpUNO(LHS, RHS, "cmp"); 2168 break; 2169 } 2170 // ZExt bool to int type. 2171 return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType()))); 2172 } 2173 case Builtin::BI__builtin_isnan: { 2174 Value *V = EmitScalarExpr(E->getArg(0)); 2175 V = Builder.CreateFCmpUNO(V, V, "cmp"); 2176 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 2177 } 2178 2179 case Builtin::BIfinite: 2180 case Builtin::BI__finite: 2181 case Builtin::BIfinitef: 2182 case Builtin::BI__finitef: 2183 case Builtin::BIfinitel: 2184 case Builtin::BI__finitel: 2185 case Builtin::BI__builtin_isinf: 2186 case Builtin::BI__builtin_isfinite: { 2187 // isinf(x) --> fabs(x) == infinity 2188 // isfinite(x) --> fabs(x) != infinity 2189 // x != NaN via the ordered compare in either case. 2190 Value *V = EmitScalarExpr(E->getArg(0)); 2191 Value *Fabs = EmitFAbs(*this, V); 2192 Constant *Infinity = ConstantFP::getInfinity(V->getType()); 2193 CmpInst::Predicate Pred = (BuiltinID == Builtin::BI__builtin_isinf) 2194 ? CmpInst::FCMP_OEQ 2195 : CmpInst::FCMP_ONE; 2196 Value *FCmp = Builder.CreateFCmp(Pred, Fabs, Infinity, "cmpinf"); 2197 return RValue::get(Builder.CreateZExt(FCmp, ConvertType(E->getType()))); 2198 } 2199 2200 case Builtin::BI__builtin_isinf_sign: { 2201 // isinf_sign(x) -> fabs(x) == infinity ? (signbit(x) ? -1 : 1) : 0 2202 Value *Arg = EmitScalarExpr(E->getArg(0)); 2203 Value *AbsArg = EmitFAbs(*this, Arg); 2204 Value *IsInf = Builder.CreateFCmpOEQ( 2205 AbsArg, ConstantFP::getInfinity(Arg->getType()), "isinf"); 2206 Value *IsNeg = EmitSignBit(*this, Arg); 2207 2208 llvm::Type *IntTy = ConvertType(E->getType()); 2209 Value *Zero = Constant::getNullValue(IntTy); 2210 Value *One = ConstantInt::get(IntTy, 1); 2211 Value *NegativeOne = ConstantInt::get(IntTy, -1); 2212 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); 2213 Value *Result = Builder.CreateSelect(IsInf, SignResult, Zero); 2214 return RValue::get(Result); 2215 } 2216 2217 case Builtin::BI__builtin_isnormal: { 2218 // isnormal(x) --> x == x && fabsf(x) < infinity && fabsf(x) >= float_min 2219 Value *V = EmitScalarExpr(E->getArg(0)); 2220 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 2221 2222 Value *Abs = EmitFAbs(*this, V); 2223 Value *IsLessThanInf = 2224 Builder.CreateFCmpULT(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 2225 APFloat Smallest = APFloat::getSmallestNormalized( 2226 getContext().getFloatTypeSemantics(E->getArg(0)->getType())); 2227 Value *IsNormal = 2228 Builder.CreateFCmpUGE(Abs, ConstantFP::get(V->getContext(), Smallest), 2229 "isnormal"); 2230 V = Builder.CreateAnd(Eq, IsLessThanInf, "and"); 2231 V = Builder.CreateAnd(V, IsNormal, "and"); 2232 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 2233 } 2234 2235 case Builtin::BI__builtin_flt_rounds: { 2236 Function *F = CGM.getIntrinsic(Intrinsic::flt_rounds); 2237 2238 llvm::Type *ResultType = ConvertType(E->getType()); 2239 Value *Result = Builder.CreateCall(F); 2240 if (Result->getType() != ResultType) 2241 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 2242 "cast"); 2243 return RValue::get(Result); 2244 } 2245 2246 case Builtin::BI__builtin_fpclassify: { 2247 Value *V = EmitScalarExpr(E->getArg(5)); 2248 llvm::Type *Ty = ConvertType(E->getArg(5)->getType()); 2249 2250 // Create Result 2251 BasicBlock *Begin = Builder.GetInsertBlock(); 2252 BasicBlock *End = createBasicBlock("fpclassify_end", this->CurFn); 2253 Builder.SetInsertPoint(End); 2254 PHINode *Result = 2255 Builder.CreatePHI(ConvertType(E->getArg(0)->getType()), 4, 2256 "fpclassify_result"); 2257 2258 // if (V==0) return FP_ZERO 2259 Builder.SetInsertPoint(Begin); 2260 Value *IsZero = Builder.CreateFCmpOEQ(V, Constant::getNullValue(Ty), 2261 "iszero"); 2262 Value *ZeroLiteral = EmitScalarExpr(E->getArg(4)); 2263 BasicBlock *NotZero = createBasicBlock("fpclassify_not_zero", this->CurFn); 2264 Builder.CreateCondBr(IsZero, End, NotZero); 2265 Result->addIncoming(ZeroLiteral, Begin); 2266 2267 // if (V != V) return FP_NAN 2268 Builder.SetInsertPoint(NotZero); 2269 Value *IsNan = Builder.CreateFCmpUNO(V, V, "cmp"); 2270 Value *NanLiteral = EmitScalarExpr(E->getArg(0)); 2271 BasicBlock *NotNan = createBasicBlock("fpclassify_not_nan", this->CurFn); 2272 Builder.CreateCondBr(IsNan, End, NotNan); 2273 Result->addIncoming(NanLiteral, NotZero); 2274 2275 // if (fabs(V) == infinity) return FP_INFINITY 2276 Builder.SetInsertPoint(NotNan); 2277 Value *VAbs = EmitFAbs(*this, V); 2278 Value *IsInf = 2279 Builder.CreateFCmpOEQ(VAbs, ConstantFP::getInfinity(V->getType()), 2280 "isinf"); 2281 Value *InfLiteral = EmitScalarExpr(E->getArg(1)); 2282 BasicBlock *NotInf = createBasicBlock("fpclassify_not_inf", this->CurFn); 2283 Builder.CreateCondBr(IsInf, End, NotInf); 2284 Result->addIncoming(InfLiteral, NotNan); 2285 2286 // if (fabs(V) >= MIN_NORMAL) return FP_NORMAL else FP_SUBNORMAL 2287 Builder.SetInsertPoint(NotInf); 2288 APFloat Smallest = APFloat::getSmallestNormalized( 2289 getContext().getFloatTypeSemantics(E->getArg(5)->getType())); 2290 Value *IsNormal = 2291 Builder.CreateFCmpUGE(VAbs, ConstantFP::get(V->getContext(), Smallest), 2292 "isnormal"); 2293 Value *NormalResult = 2294 Builder.CreateSelect(IsNormal, EmitScalarExpr(E->getArg(2)), 2295 EmitScalarExpr(E->getArg(3))); 2296 Builder.CreateBr(End); 2297 Result->addIncoming(NormalResult, NotInf); 2298 2299 // return Result 2300 Builder.SetInsertPoint(End); 2301 return RValue::get(Result); 2302 } 2303 2304 case Builtin::BIalloca: 2305 case Builtin::BI_alloca: 2306 case Builtin::BI__builtin_alloca: { 2307 Value *Size = EmitScalarExpr(E->getArg(0)); 2308 const TargetInfo &TI = getContext().getTargetInfo(); 2309 // The alignment of the alloca should correspond to __BIGGEST_ALIGNMENT__. 2310 unsigned SuitableAlignmentInBytes = 2311 CGM.getContext() 2312 .toCharUnitsFromBits(TI.getSuitableAlign()) 2313 .getQuantity(); 2314 AllocaInst *AI = Builder.CreateAlloca(Builder.getInt8Ty(), Size); 2315 AI->setAlignment(SuitableAlignmentInBytes); 2316 return RValue::get(AI); 2317 } 2318 2319 case Builtin::BI__builtin_alloca_with_align: { 2320 Value *Size = EmitScalarExpr(E->getArg(0)); 2321 Value *AlignmentInBitsValue = EmitScalarExpr(E->getArg(1)); 2322 auto *AlignmentInBitsCI = cast<ConstantInt>(AlignmentInBitsValue); 2323 unsigned AlignmentInBits = AlignmentInBitsCI->getZExtValue(); 2324 unsigned AlignmentInBytes = 2325 CGM.getContext().toCharUnitsFromBits(AlignmentInBits).getQuantity(); 2326 AllocaInst *AI = Builder.CreateAlloca(Builder.getInt8Ty(), Size); 2327 AI->setAlignment(AlignmentInBytes); 2328 return RValue::get(AI); 2329 } 2330 2331 case Builtin::BIbzero: 2332 case Builtin::BI__builtin_bzero: { 2333 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 2334 Value *SizeVal = EmitScalarExpr(E->getArg(1)); 2335 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 2336 E->getArg(0)->getExprLoc(), FD, 0); 2337 Builder.CreateMemSet(Dest, Builder.getInt8(0), SizeVal, false); 2338 return RValue::get(nullptr); 2339 } 2340 case Builtin::BImemcpy: 2341 case Builtin::BI__builtin_memcpy: { 2342 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 2343 Address Src = EmitPointerWithAlignment(E->getArg(1)); 2344 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 2345 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 2346 E->getArg(0)->getExprLoc(), FD, 0); 2347 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 2348 E->getArg(1)->getExprLoc(), FD, 1); 2349 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 2350 return RValue::get(Dest.getPointer()); 2351 } 2352 2353 case Builtin::BI__builtin_char_memchr: 2354 BuiltinID = Builtin::BI__builtin_memchr; 2355 break; 2356 2357 case Builtin::BI__builtin___memcpy_chk: { 2358 // fold __builtin_memcpy_chk(x, y, cst1, cst2) to memcpy iff cst1<=cst2. 2359 Expr::EvalResult SizeResult, DstSizeResult; 2360 if (!E->getArg(2)->EvaluateAsInt(SizeResult, CGM.getContext()) || 2361 !E->getArg(3)->EvaluateAsInt(DstSizeResult, CGM.getContext())) 2362 break; 2363 llvm::APSInt Size = SizeResult.Val.getInt(); 2364 llvm::APSInt DstSize = DstSizeResult.Val.getInt(); 2365 if (Size.ugt(DstSize)) 2366 break; 2367 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 2368 Address Src = EmitPointerWithAlignment(E->getArg(1)); 2369 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 2370 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 2371 return RValue::get(Dest.getPointer()); 2372 } 2373 2374 case Builtin::BI__builtin_objc_memmove_collectable: { 2375 Address DestAddr = EmitPointerWithAlignment(E->getArg(0)); 2376 Address SrcAddr = EmitPointerWithAlignment(E->getArg(1)); 2377 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 2378 CGM.getObjCRuntime().EmitGCMemmoveCollectable(*this, 2379 DestAddr, SrcAddr, SizeVal); 2380 return RValue::get(DestAddr.getPointer()); 2381 } 2382 2383 case Builtin::BI__builtin___memmove_chk: { 2384 // fold __builtin_memmove_chk(x, y, cst1, cst2) to memmove iff cst1<=cst2. 2385 Expr::EvalResult SizeResult, DstSizeResult; 2386 if (!E->getArg(2)->EvaluateAsInt(SizeResult, CGM.getContext()) || 2387 !E->getArg(3)->EvaluateAsInt(DstSizeResult, CGM.getContext())) 2388 break; 2389 llvm::APSInt Size = SizeResult.Val.getInt(); 2390 llvm::APSInt DstSize = DstSizeResult.Val.getInt(); 2391 if (Size.ugt(DstSize)) 2392 break; 2393 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 2394 Address Src = EmitPointerWithAlignment(E->getArg(1)); 2395 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 2396 Builder.CreateMemMove(Dest, Src, SizeVal, false); 2397 return RValue::get(Dest.getPointer()); 2398 } 2399 2400 case Builtin::BImemmove: 2401 case Builtin::BI__builtin_memmove: { 2402 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 2403 Address Src = EmitPointerWithAlignment(E->getArg(1)); 2404 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 2405 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 2406 E->getArg(0)->getExprLoc(), FD, 0); 2407 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 2408 E->getArg(1)->getExprLoc(), FD, 1); 2409 Builder.CreateMemMove(Dest, Src, SizeVal, false); 2410 return RValue::get(Dest.getPointer()); 2411 } 2412 case Builtin::BImemset: 2413 case Builtin::BI__builtin_memset: { 2414 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 2415 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 2416 Builder.getInt8Ty()); 2417 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 2418 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 2419 E->getArg(0)->getExprLoc(), FD, 0); 2420 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 2421 return RValue::get(Dest.getPointer()); 2422 } 2423 case Builtin::BI__builtin___memset_chk: { 2424 // fold __builtin_memset_chk(x, y, cst1, cst2) to memset iff cst1<=cst2. 2425 Expr::EvalResult SizeResult, DstSizeResult; 2426 if (!E->getArg(2)->EvaluateAsInt(SizeResult, CGM.getContext()) || 2427 !E->getArg(3)->EvaluateAsInt(DstSizeResult, CGM.getContext())) 2428 break; 2429 llvm::APSInt Size = SizeResult.Val.getInt(); 2430 llvm::APSInt DstSize = DstSizeResult.Val.getInt(); 2431 if (Size.ugt(DstSize)) 2432 break; 2433 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 2434 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 2435 Builder.getInt8Ty()); 2436 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 2437 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 2438 return RValue::get(Dest.getPointer()); 2439 } 2440 case Builtin::BI__builtin_wmemcmp: { 2441 // The MSVC runtime library does not provide a definition of wmemcmp, so we 2442 // need an inline implementation. 2443 if (!getTarget().getTriple().isOSMSVCRT()) 2444 break; 2445 2446 llvm::Type *WCharTy = ConvertType(getContext().WCharTy); 2447 2448 Value *Dst = EmitScalarExpr(E->getArg(0)); 2449 Value *Src = EmitScalarExpr(E->getArg(1)); 2450 Value *Size = EmitScalarExpr(E->getArg(2)); 2451 2452 BasicBlock *Entry = Builder.GetInsertBlock(); 2453 BasicBlock *CmpGT = createBasicBlock("wmemcmp.gt"); 2454 BasicBlock *CmpLT = createBasicBlock("wmemcmp.lt"); 2455 BasicBlock *Next = createBasicBlock("wmemcmp.next"); 2456 BasicBlock *Exit = createBasicBlock("wmemcmp.exit"); 2457 Value *SizeEq0 = Builder.CreateICmpEQ(Size, ConstantInt::get(SizeTy, 0)); 2458 Builder.CreateCondBr(SizeEq0, Exit, CmpGT); 2459 2460 EmitBlock(CmpGT); 2461 PHINode *DstPhi = Builder.CreatePHI(Dst->getType(), 2); 2462 DstPhi->addIncoming(Dst, Entry); 2463 PHINode *SrcPhi = Builder.CreatePHI(Src->getType(), 2); 2464 SrcPhi->addIncoming(Src, Entry); 2465 PHINode *SizePhi = Builder.CreatePHI(SizeTy, 2); 2466 SizePhi->addIncoming(Size, Entry); 2467 CharUnits WCharAlign = 2468 getContext().getTypeAlignInChars(getContext().WCharTy); 2469 Value *DstCh = Builder.CreateAlignedLoad(WCharTy, DstPhi, WCharAlign); 2470 Value *SrcCh = Builder.CreateAlignedLoad(WCharTy, SrcPhi, WCharAlign); 2471 Value *DstGtSrc = Builder.CreateICmpUGT(DstCh, SrcCh); 2472 Builder.CreateCondBr(DstGtSrc, Exit, CmpLT); 2473 2474 EmitBlock(CmpLT); 2475 Value *DstLtSrc = Builder.CreateICmpULT(DstCh, SrcCh); 2476 Builder.CreateCondBr(DstLtSrc, Exit, Next); 2477 2478 EmitBlock(Next); 2479 Value *NextDst = Builder.CreateConstInBoundsGEP1_32(WCharTy, DstPhi, 1); 2480 Value *NextSrc = Builder.CreateConstInBoundsGEP1_32(WCharTy, SrcPhi, 1); 2481 Value *NextSize = Builder.CreateSub(SizePhi, ConstantInt::get(SizeTy, 1)); 2482 Value *NextSizeEq0 = 2483 Builder.CreateICmpEQ(NextSize, ConstantInt::get(SizeTy, 0)); 2484 Builder.CreateCondBr(NextSizeEq0, Exit, CmpGT); 2485 DstPhi->addIncoming(NextDst, Next); 2486 SrcPhi->addIncoming(NextSrc, Next); 2487 SizePhi->addIncoming(NextSize, Next); 2488 2489 EmitBlock(Exit); 2490 PHINode *Ret = Builder.CreatePHI(IntTy, 4); 2491 Ret->addIncoming(ConstantInt::get(IntTy, 0), Entry); 2492 Ret->addIncoming(ConstantInt::get(IntTy, 1), CmpGT); 2493 Ret->addIncoming(ConstantInt::get(IntTy, -1), CmpLT); 2494 Ret->addIncoming(ConstantInt::get(IntTy, 0), Next); 2495 return RValue::get(Ret); 2496 } 2497 case Builtin::BI__builtin_dwarf_cfa: { 2498 // The offset in bytes from the first argument to the CFA. 2499 // 2500 // Why on earth is this in the frontend? Is there any reason at 2501 // all that the backend can't reasonably determine this while 2502 // lowering llvm.eh.dwarf.cfa()? 2503 // 2504 // TODO: If there's a satisfactory reason, add a target hook for 2505 // this instead of hard-coding 0, which is correct for most targets. 2506 int32_t Offset = 0; 2507 2508 Function *F = CGM.getIntrinsic(Intrinsic::eh_dwarf_cfa); 2509 return RValue::get(Builder.CreateCall(F, 2510 llvm::ConstantInt::get(Int32Ty, Offset))); 2511 } 2512 case Builtin::BI__builtin_return_address: { 2513 Value *Depth = ConstantEmitter(*this).emitAbstract(E->getArg(0), 2514 getContext().UnsignedIntTy); 2515 Function *F = CGM.getIntrinsic(Intrinsic::returnaddress); 2516 return RValue::get(Builder.CreateCall(F, Depth)); 2517 } 2518 case Builtin::BI_ReturnAddress: { 2519 Function *F = CGM.getIntrinsic(Intrinsic::returnaddress); 2520 return RValue::get(Builder.CreateCall(F, Builder.getInt32(0))); 2521 } 2522 case Builtin::BI__builtin_frame_address: { 2523 Value *Depth = ConstantEmitter(*this).emitAbstract(E->getArg(0), 2524 getContext().UnsignedIntTy); 2525 Function *F = CGM.getIntrinsic(Intrinsic::frameaddress); 2526 return RValue::get(Builder.CreateCall(F, Depth)); 2527 } 2528 case Builtin::BI__builtin_extract_return_addr: { 2529 Value *Address = EmitScalarExpr(E->getArg(0)); 2530 Value *Result = getTargetHooks().decodeReturnAddress(*this, Address); 2531 return RValue::get(Result); 2532 } 2533 case Builtin::BI__builtin_frob_return_addr: { 2534 Value *Address = EmitScalarExpr(E->getArg(0)); 2535 Value *Result = getTargetHooks().encodeReturnAddress(*this, Address); 2536 return RValue::get(Result); 2537 } 2538 case Builtin::BI__builtin_dwarf_sp_column: { 2539 llvm::IntegerType *Ty 2540 = cast<llvm::IntegerType>(ConvertType(E->getType())); 2541 int Column = getTargetHooks().getDwarfEHStackPointer(CGM); 2542 if (Column == -1) { 2543 CGM.ErrorUnsupported(E, "__builtin_dwarf_sp_column"); 2544 return RValue::get(llvm::UndefValue::get(Ty)); 2545 } 2546 return RValue::get(llvm::ConstantInt::get(Ty, Column, true)); 2547 } 2548 case Builtin::BI__builtin_init_dwarf_reg_size_table: { 2549 Value *Address = EmitScalarExpr(E->getArg(0)); 2550 if (getTargetHooks().initDwarfEHRegSizeTable(*this, Address)) 2551 CGM.ErrorUnsupported(E, "__builtin_init_dwarf_reg_size_table"); 2552 return RValue::get(llvm::UndefValue::get(ConvertType(E->getType()))); 2553 } 2554 case Builtin::BI__builtin_eh_return: { 2555 Value *Int = EmitScalarExpr(E->getArg(0)); 2556 Value *Ptr = EmitScalarExpr(E->getArg(1)); 2557 2558 llvm::IntegerType *IntTy = cast<llvm::IntegerType>(Int->getType()); 2559 assert((IntTy->getBitWidth() == 32 || IntTy->getBitWidth() == 64) && 2560 "LLVM's __builtin_eh_return only supports 32- and 64-bit variants"); 2561 Function *F = 2562 CGM.getIntrinsic(IntTy->getBitWidth() == 32 ? Intrinsic::eh_return_i32 2563 : Intrinsic::eh_return_i64); 2564 Builder.CreateCall(F, {Int, Ptr}); 2565 Builder.CreateUnreachable(); 2566 2567 // We do need to preserve an insertion point. 2568 EmitBlock(createBasicBlock("builtin_eh_return.cont")); 2569 2570 return RValue::get(nullptr); 2571 } 2572 case Builtin::BI__builtin_unwind_init: { 2573 Function *F = CGM.getIntrinsic(Intrinsic::eh_unwind_init); 2574 return RValue::get(Builder.CreateCall(F)); 2575 } 2576 case Builtin::BI__builtin_extend_pointer: { 2577 // Extends a pointer to the size of an _Unwind_Word, which is 2578 // uint64_t on all platforms. Generally this gets poked into a 2579 // register and eventually used as an address, so if the 2580 // addressing registers are wider than pointers and the platform 2581 // doesn't implicitly ignore high-order bits when doing 2582 // addressing, we need to make sure we zext / sext based on 2583 // the platform's expectations. 2584 // 2585 // See: http://gcc.gnu.org/ml/gcc-bugs/2002-02/msg00237.html 2586 2587 // Cast the pointer to intptr_t. 2588 Value *Ptr = EmitScalarExpr(E->getArg(0)); 2589 Value *Result = Builder.CreatePtrToInt(Ptr, IntPtrTy, "extend.cast"); 2590 2591 // If that's 64 bits, we're done. 2592 if (IntPtrTy->getBitWidth() == 64) 2593 return RValue::get(Result); 2594 2595 // Otherwise, ask the codegen data what to do. 2596 if (getTargetHooks().extendPointerWithSExt()) 2597 return RValue::get(Builder.CreateSExt(Result, Int64Ty, "extend.sext")); 2598 else 2599 return RValue::get(Builder.CreateZExt(Result, Int64Ty, "extend.zext")); 2600 } 2601 case Builtin::BI__builtin_setjmp: { 2602 // Buffer is a void**. 2603 Address Buf = EmitPointerWithAlignment(E->getArg(0)); 2604 2605 // Store the frame pointer to the setjmp buffer. 2606 Value *FrameAddr = 2607 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2608 ConstantInt::get(Int32Ty, 0)); 2609 Builder.CreateStore(FrameAddr, Buf); 2610 2611 // Store the stack pointer to the setjmp buffer. 2612 Value *StackAddr = 2613 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::stacksave)); 2614 Address StackSaveSlot = Builder.CreateConstInBoundsGEP(Buf, 2); 2615 Builder.CreateStore(StackAddr, StackSaveSlot); 2616 2617 // Call LLVM's EH setjmp, which is lightweight. 2618 Function *F = CGM.getIntrinsic(Intrinsic::eh_sjlj_setjmp); 2619 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 2620 return RValue::get(Builder.CreateCall(F, Buf.getPointer())); 2621 } 2622 case Builtin::BI__builtin_longjmp: { 2623 Value *Buf = EmitScalarExpr(E->getArg(0)); 2624 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 2625 2626 // Call LLVM's EH longjmp, which is lightweight. 2627 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::eh_sjlj_longjmp), Buf); 2628 2629 // longjmp doesn't return; mark this as unreachable. 2630 Builder.CreateUnreachable(); 2631 2632 // We do need to preserve an insertion point. 2633 EmitBlock(createBasicBlock("longjmp.cont")); 2634 2635 return RValue::get(nullptr); 2636 } 2637 case Builtin::BI__builtin_launder: { 2638 const Expr *Arg = E->getArg(0); 2639 QualType ArgTy = Arg->getType()->getPointeeType(); 2640 Value *Ptr = EmitScalarExpr(Arg); 2641 if (TypeRequiresBuiltinLaunder(CGM, ArgTy)) 2642 Ptr = Builder.CreateLaunderInvariantGroup(Ptr); 2643 2644 return RValue::get(Ptr); 2645 } 2646 case Builtin::BI__sync_fetch_and_add: 2647 case Builtin::BI__sync_fetch_and_sub: 2648 case Builtin::BI__sync_fetch_and_or: 2649 case Builtin::BI__sync_fetch_and_and: 2650 case Builtin::BI__sync_fetch_and_xor: 2651 case Builtin::BI__sync_fetch_and_nand: 2652 case Builtin::BI__sync_add_and_fetch: 2653 case Builtin::BI__sync_sub_and_fetch: 2654 case Builtin::BI__sync_and_and_fetch: 2655 case Builtin::BI__sync_or_and_fetch: 2656 case Builtin::BI__sync_xor_and_fetch: 2657 case Builtin::BI__sync_nand_and_fetch: 2658 case Builtin::BI__sync_val_compare_and_swap: 2659 case Builtin::BI__sync_bool_compare_and_swap: 2660 case Builtin::BI__sync_lock_test_and_set: 2661 case Builtin::BI__sync_lock_release: 2662 case Builtin::BI__sync_swap: 2663 llvm_unreachable("Shouldn't make it through sema"); 2664 case Builtin::BI__sync_fetch_and_add_1: 2665 case Builtin::BI__sync_fetch_and_add_2: 2666 case Builtin::BI__sync_fetch_and_add_4: 2667 case Builtin::BI__sync_fetch_and_add_8: 2668 case Builtin::BI__sync_fetch_and_add_16: 2669 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E); 2670 case Builtin::BI__sync_fetch_and_sub_1: 2671 case Builtin::BI__sync_fetch_and_sub_2: 2672 case Builtin::BI__sync_fetch_and_sub_4: 2673 case Builtin::BI__sync_fetch_and_sub_8: 2674 case Builtin::BI__sync_fetch_and_sub_16: 2675 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E); 2676 case Builtin::BI__sync_fetch_and_or_1: 2677 case Builtin::BI__sync_fetch_and_or_2: 2678 case Builtin::BI__sync_fetch_and_or_4: 2679 case Builtin::BI__sync_fetch_and_or_8: 2680 case Builtin::BI__sync_fetch_and_or_16: 2681 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E); 2682 case Builtin::BI__sync_fetch_and_and_1: 2683 case Builtin::BI__sync_fetch_and_and_2: 2684 case Builtin::BI__sync_fetch_and_and_4: 2685 case Builtin::BI__sync_fetch_and_and_8: 2686 case Builtin::BI__sync_fetch_and_and_16: 2687 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E); 2688 case Builtin::BI__sync_fetch_and_xor_1: 2689 case Builtin::BI__sync_fetch_and_xor_2: 2690 case Builtin::BI__sync_fetch_and_xor_4: 2691 case Builtin::BI__sync_fetch_and_xor_8: 2692 case Builtin::BI__sync_fetch_and_xor_16: 2693 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E); 2694 case Builtin::BI__sync_fetch_and_nand_1: 2695 case Builtin::BI__sync_fetch_and_nand_2: 2696 case Builtin::BI__sync_fetch_and_nand_4: 2697 case Builtin::BI__sync_fetch_and_nand_8: 2698 case Builtin::BI__sync_fetch_and_nand_16: 2699 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Nand, E); 2700 2701 // Clang extensions: not overloaded yet. 2702 case Builtin::BI__sync_fetch_and_min: 2703 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E); 2704 case Builtin::BI__sync_fetch_and_max: 2705 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Max, E); 2706 case Builtin::BI__sync_fetch_and_umin: 2707 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMin, E); 2708 case Builtin::BI__sync_fetch_and_umax: 2709 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMax, E); 2710 2711 case Builtin::BI__sync_add_and_fetch_1: 2712 case Builtin::BI__sync_add_and_fetch_2: 2713 case Builtin::BI__sync_add_and_fetch_4: 2714 case Builtin::BI__sync_add_and_fetch_8: 2715 case Builtin::BI__sync_add_and_fetch_16: 2716 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Add, E, 2717 llvm::Instruction::Add); 2718 case Builtin::BI__sync_sub_and_fetch_1: 2719 case Builtin::BI__sync_sub_and_fetch_2: 2720 case Builtin::BI__sync_sub_and_fetch_4: 2721 case Builtin::BI__sync_sub_and_fetch_8: 2722 case Builtin::BI__sync_sub_and_fetch_16: 2723 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Sub, E, 2724 llvm::Instruction::Sub); 2725 case Builtin::BI__sync_and_and_fetch_1: 2726 case Builtin::BI__sync_and_and_fetch_2: 2727 case Builtin::BI__sync_and_and_fetch_4: 2728 case Builtin::BI__sync_and_and_fetch_8: 2729 case Builtin::BI__sync_and_and_fetch_16: 2730 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::And, E, 2731 llvm::Instruction::And); 2732 case Builtin::BI__sync_or_and_fetch_1: 2733 case Builtin::BI__sync_or_and_fetch_2: 2734 case Builtin::BI__sync_or_and_fetch_4: 2735 case Builtin::BI__sync_or_and_fetch_8: 2736 case Builtin::BI__sync_or_and_fetch_16: 2737 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Or, E, 2738 llvm::Instruction::Or); 2739 case Builtin::BI__sync_xor_and_fetch_1: 2740 case Builtin::BI__sync_xor_and_fetch_2: 2741 case Builtin::BI__sync_xor_and_fetch_4: 2742 case Builtin::BI__sync_xor_and_fetch_8: 2743 case Builtin::BI__sync_xor_and_fetch_16: 2744 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Xor, E, 2745 llvm::Instruction::Xor); 2746 case Builtin::BI__sync_nand_and_fetch_1: 2747 case Builtin::BI__sync_nand_and_fetch_2: 2748 case Builtin::BI__sync_nand_and_fetch_4: 2749 case Builtin::BI__sync_nand_and_fetch_8: 2750 case Builtin::BI__sync_nand_and_fetch_16: 2751 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Nand, E, 2752 llvm::Instruction::And, true); 2753 2754 case Builtin::BI__sync_val_compare_and_swap_1: 2755 case Builtin::BI__sync_val_compare_and_swap_2: 2756 case Builtin::BI__sync_val_compare_and_swap_4: 2757 case Builtin::BI__sync_val_compare_and_swap_8: 2758 case Builtin::BI__sync_val_compare_and_swap_16: 2759 return RValue::get(MakeAtomicCmpXchgValue(*this, E, false)); 2760 2761 case Builtin::BI__sync_bool_compare_and_swap_1: 2762 case Builtin::BI__sync_bool_compare_and_swap_2: 2763 case Builtin::BI__sync_bool_compare_and_swap_4: 2764 case Builtin::BI__sync_bool_compare_and_swap_8: 2765 case Builtin::BI__sync_bool_compare_and_swap_16: 2766 return RValue::get(MakeAtomicCmpXchgValue(*this, E, true)); 2767 2768 case Builtin::BI__sync_swap_1: 2769 case Builtin::BI__sync_swap_2: 2770 case Builtin::BI__sync_swap_4: 2771 case Builtin::BI__sync_swap_8: 2772 case Builtin::BI__sync_swap_16: 2773 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 2774 2775 case Builtin::BI__sync_lock_test_and_set_1: 2776 case Builtin::BI__sync_lock_test_and_set_2: 2777 case Builtin::BI__sync_lock_test_and_set_4: 2778 case Builtin::BI__sync_lock_test_and_set_8: 2779 case Builtin::BI__sync_lock_test_and_set_16: 2780 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 2781 2782 case Builtin::BI__sync_lock_release_1: 2783 case Builtin::BI__sync_lock_release_2: 2784 case Builtin::BI__sync_lock_release_4: 2785 case Builtin::BI__sync_lock_release_8: 2786 case Builtin::BI__sync_lock_release_16: { 2787 Value *Ptr = EmitScalarExpr(E->getArg(0)); 2788 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 2789 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 2790 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 2791 StoreSize.getQuantity() * 8); 2792 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 2793 llvm::StoreInst *Store = 2794 Builder.CreateAlignedStore(llvm::Constant::getNullValue(ITy), Ptr, 2795 StoreSize); 2796 Store->setAtomic(llvm::AtomicOrdering::Release); 2797 return RValue::get(nullptr); 2798 } 2799 2800 case Builtin::BI__sync_synchronize: { 2801 // We assume this is supposed to correspond to a C++0x-style 2802 // sequentially-consistent fence (i.e. this is only usable for 2803 // synchronization, not device I/O or anything like that). This intrinsic 2804 // is really badly designed in the sense that in theory, there isn't 2805 // any way to safely use it... but in practice, it mostly works 2806 // to use it with non-atomic loads and stores to get acquire/release 2807 // semantics. 2808 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent); 2809 return RValue::get(nullptr); 2810 } 2811 2812 case Builtin::BI__builtin_nontemporal_load: 2813 return RValue::get(EmitNontemporalLoad(*this, E)); 2814 case Builtin::BI__builtin_nontemporal_store: 2815 return RValue::get(EmitNontemporalStore(*this, E)); 2816 case Builtin::BI__c11_atomic_is_lock_free: 2817 case Builtin::BI__atomic_is_lock_free: { 2818 // Call "bool __atomic_is_lock_free(size_t size, void *ptr)". For the 2819 // __c11 builtin, ptr is 0 (indicating a properly-aligned object), since 2820 // _Atomic(T) is always properly-aligned. 2821 const char *LibCallName = "__atomic_is_lock_free"; 2822 CallArgList Args; 2823 Args.add(RValue::get(EmitScalarExpr(E->getArg(0))), 2824 getContext().getSizeType()); 2825 if (BuiltinID == Builtin::BI__atomic_is_lock_free) 2826 Args.add(RValue::get(EmitScalarExpr(E->getArg(1))), 2827 getContext().VoidPtrTy); 2828 else 2829 Args.add(RValue::get(llvm::Constant::getNullValue(VoidPtrTy)), 2830 getContext().VoidPtrTy); 2831 const CGFunctionInfo &FuncInfo = 2832 CGM.getTypes().arrangeBuiltinFunctionCall(E->getType(), Args); 2833 llvm::FunctionType *FTy = CGM.getTypes().GetFunctionType(FuncInfo); 2834 llvm::FunctionCallee Func = CGM.CreateRuntimeFunction(FTy, LibCallName); 2835 return EmitCall(FuncInfo, CGCallee::forDirect(Func), 2836 ReturnValueSlot(), Args); 2837 } 2838 2839 case Builtin::BI__atomic_test_and_set: { 2840 // Look at the argument type to determine whether this is a volatile 2841 // operation. The parameter type is always volatile. 2842 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 2843 bool Volatile = 2844 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 2845 2846 Value *Ptr = EmitScalarExpr(E->getArg(0)); 2847 unsigned AddrSpace = Ptr->getType()->getPointerAddressSpace(); 2848 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 2849 Value *NewVal = Builder.getInt8(1); 2850 Value *Order = EmitScalarExpr(E->getArg(1)); 2851 if (isa<llvm::ConstantInt>(Order)) { 2852 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 2853 AtomicRMWInst *Result = nullptr; 2854 switch (ord) { 2855 case 0: // memory_order_relaxed 2856 default: // invalid order 2857 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2858 llvm::AtomicOrdering::Monotonic); 2859 break; 2860 case 1: // memory_order_consume 2861 case 2: // memory_order_acquire 2862 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2863 llvm::AtomicOrdering::Acquire); 2864 break; 2865 case 3: // memory_order_release 2866 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2867 llvm::AtomicOrdering::Release); 2868 break; 2869 case 4: // memory_order_acq_rel 2870 2871 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2872 llvm::AtomicOrdering::AcquireRelease); 2873 break; 2874 case 5: // memory_order_seq_cst 2875 Result = Builder.CreateAtomicRMW( 2876 llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 2877 llvm::AtomicOrdering::SequentiallyConsistent); 2878 break; 2879 } 2880 Result->setVolatile(Volatile); 2881 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 2882 } 2883 2884 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 2885 2886 llvm::BasicBlock *BBs[5] = { 2887 createBasicBlock("monotonic", CurFn), 2888 createBasicBlock("acquire", CurFn), 2889 createBasicBlock("release", CurFn), 2890 createBasicBlock("acqrel", CurFn), 2891 createBasicBlock("seqcst", CurFn) 2892 }; 2893 llvm::AtomicOrdering Orders[5] = { 2894 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Acquire, 2895 llvm::AtomicOrdering::Release, llvm::AtomicOrdering::AcquireRelease, 2896 llvm::AtomicOrdering::SequentiallyConsistent}; 2897 2898 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 2899 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 2900 2901 Builder.SetInsertPoint(ContBB); 2902 PHINode *Result = Builder.CreatePHI(Int8Ty, 5, "was_set"); 2903 2904 for (unsigned i = 0; i < 5; ++i) { 2905 Builder.SetInsertPoint(BBs[i]); 2906 AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 2907 Ptr, NewVal, Orders[i]); 2908 RMW->setVolatile(Volatile); 2909 Result->addIncoming(RMW, BBs[i]); 2910 Builder.CreateBr(ContBB); 2911 } 2912 2913 SI->addCase(Builder.getInt32(0), BBs[0]); 2914 SI->addCase(Builder.getInt32(1), BBs[1]); 2915 SI->addCase(Builder.getInt32(2), BBs[1]); 2916 SI->addCase(Builder.getInt32(3), BBs[2]); 2917 SI->addCase(Builder.getInt32(4), BBs[3]); 2918 SI->addCase(Builder.getInt32(5), BBs[4]); 2919 2920 Builder.SetInsertPoint(ContBB); 2921 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 2922 } 2923 2924 case Builtin::BI__atomic_clear: { 2925 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 2926 bool Volatile = 2927 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 2928 2929 Address Ptr = EmitPointerWithAlignment(E->getArg(0)); 2930 unsigned AddrSpace = Ptr.getPointer()->getType()->getPointerAddressSpace(); 2931 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 2932 Value *NewVal = Builder.getInt8(0); 2933 Value *Order = EmitScalarExpr(E->getArg(1)); 2934 if (isa<llvm::ConstantInt>(Order)) { 2935 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 2936 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 2937 switch (ord) { 2938 case 0: // memory_order_relaxed 2939 default: // invalid order 2940 Store->setOrdering(llvm::AtomicOrdering::Monotonic); 2941 break; 2942 case 3: // memory_order_release 2943 Store->setOrdering(llvm::AtomicOrdering::Release); 2944 break; 2945 case 5: // memory_order_seq_cst 2946 Store->setOrdering(llvm::AtomicOrdering::SequentiallyConsistent); 2947 break; 2948 } 2949 return RValue::get(nullptr); 2950 } 2951 2952 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 2953 2954 llvm::BasicBlock *BBs[3] = { 2955 createBasicBlock("monotonic", CurFn), 2956 createBasicBlock("release", CurFn), 2957 createBasicBlock("seqcst", CurFn) 2958 }; 2959 llvm::AtomicOrdering Orders[3] = { 2960 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Release, 2961 llvm::AtomicOrdering::SequentiallyConsistent}; 2962 2963 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 2964 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 2965 2966 for (unsigned i = 0; i < 3; ++i) { 2967 Builder.SetInsertPoint(BBs[i]); 2968 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 2969 Store->setOrdering(Orders[i]); 2970 Builder.CreateBr(ContBB); 2971 } 2972 2973 SI->addCase(Builder.getInt32(0), BBs[0]); 2974 SI->addCase(Builder.getInt32(3), BBs[1]); 2975 SI->addCase(Builder.getInt32(5), BBs[2]); 2976 2977 Builder.SetInsertPoint(ContBB); 2978 return RValue::get(nullptr); 2979 } 2980 2981 case Builtin::BI__atomic_thread_fence: 2982 case Builtin::BI__atomic_signal_fence: 2983 case Builtin::BI__c11_atomic_thread_fence: 2984 case Builtin::BI__c11_atomic_signal_fence: { 2985 llvm::SyncScope::ID SSID; 2986 if (BuiltinID == Builtin::BI__atomic_signal_fence || 2987 BuiltinID == Builtin::BI__c11_atomic_signal_fence) 2988 SSID = llvm::SyncScope::SingleThread; 2989 else 2990 SSID = llvm::SyncScope::System; 2991 Value *Order = EmitScalarExpr(E->getArg(0)); 2992 if (isa<llvm::ConstantInt>(Order)) { 2993 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 2994 switch (ord) { 2995 case 0: // memory_order_relaxed 2996 default: // invalid order 2997 break; 2998 case 1: // memory_order_consume 2999 case 2: // memory_order_acquire 3000 Builder.CreateFence(llvm::AtomicOrdering::Acquire, SSID); 3001 break; 3002 case 3: // memory_order_release 3003 Builder.CreateFence(llvm::AtomicOrdering::Release, SSID); 3004 break; 3005 case 4: // memory_order_acq_rel 3006 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, SSID); 3007 break; 3008 case 5: // memory_order_seq_cst 3009 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, SSID); 3010 break; 3011 } 3012 return RValue::get(nullptr); 3013 } 3014 3015 llvm::BasicBlock *AcquireBB, *ReleaseBB, *AcqRelBB, *SeqCstBB; 3016 AcquireBB = createBasicBlock("acquire", CurFn); 3017 ReleaseBB = createBasicBlock("release", CurFn); 3018 AcqRelBB = createBasicBlock("acqrel", CurFn); 3019 SeqCstBB = createBasicBlock("seqcst", CurFn); 3020 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 3021 3022 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 3023 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, ContBB); 3024 3025 Builder.SetInsertPoint(AcquireBB); 3026 Builder.CreateFence(llvm::AtomicOrdering::Acquire, SSID); 3027 Builder.CreateBr(ContBB); 3028 SI->addCase(Builder.getInt32(1), AcquireBB); 3029 SI->addCase(Builder.getInt32(2), AcquireBB); 3030 3031 Builder.SetInsertPoint(ReleaseBB); 3032 Builder.CreateFence(llvm::AtomicOrdering::Release, SSID); 3033 Builder.CreateBr(ContBB); 3034 SI->addCase(Builder.getInt32(3), ReleaseBB); 3035 3036 Builder.SetInsertPoint(AcqRelBB); 3037 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, SSID); 3038 Builder.CreateBr(ContBB); 3039 SI->addCase(Builder.getInt32(4), AcqRelBB); 3040 3041 Builder.SetInsertPoint(SeqCstBB); 3042 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, SSID); 3043 Builder.CreateBr(ContBB); 3044 SI->addCase(Builder.getInt32(5), SeqCstBB); 3045 3046 Builder.SetInsertPoint(ContBB); 3047 return RValue::get(nullptr); 3048 } 3049 3050 case Builtin::BI__builtin_signbit: 3051 case Builtin::BI__builtin_signbitf: 3052 case Builtin::BI__builtin_signbitl: { 3053 return RValue::get( 3054 Builder.CreateZExt(EmitSignBit(*this, EmitScalarExpr(E->getArg(0))), 3055 ConvertType(E->getType()))); 3056 } 3057 case Builtin::BI__annotation: { 3058 // Re-encode each wide string to UTF8 and make an MDString. 3059 SmallVector<Metadata *, 1> Strings; 3060 for (const Expr *Arg : E->arguments()) { 3061 const auto *Str = cast<StringLiteral>(Arg->IgnoreParenCasts()); 3062 assert(Str->getCharByteWidth() == 2); 3063 StringRef WideBytes = Str->getBytes(); 3064 std::string StrUtf8; 3065 if (!convertUTF16ToUTF8String( 3066 makeArrayRef(WideBytes.data(), WideBytes.size()), StrUtf8)) { 3067 CGM.ErrorUnsupported(E, "non-UTF16 __annotation argument"); 3068 continue; 3069 } 3070 Strings.push_back(llvm::MDString::get(getLLVMContext(), StrUtf8)); 3071 } 3072 3073 // Build and MDTuple of MDStrings and emit the intrinsic call. 3074 llvm::Function *F = 3075 CGM.getIntrinsic(llvm::Intrinsic::codeview_annotation, {}); 3076 MDTuple *StrTuple = MDTuple::get(getLLVMContext(), Strings); 3077 Builder.CreateCall(F, MetadataAsValue::get(getLLVMContext(), StrTuple)); 3078 return RValue::getIgnored(); 3079 } 3080 case Builtin::BI__builtin_annotation: { 3081 llvm::Value *AnnVal = EmitScalarExpr(E->getArg(0)); 3082 llvm::Function *F = CGM.getIntrinsic(llvm::Intrinsic::annotation, 3083 AnnVal->getType()); 3084 3085 // Get the annotation string, go through casts. Sema requires this to be a 3086 // non-wide string literal, potentially casted, so the cast<> is safe. 3087 const Expr *AnnotationStrExpr = E->getArg(1)->IgnoreParenCasts(); 3088 StringRef Str = cast<StringLiteral>(AnnotationStrExpr)->getString(); 3089 return RValue::get(EmitAnnotationCall(F, AnnVal, Str, E->getExprLoc())); 3090 } 3091 case Builtin::BI__builtin_addcb: 3092 case Builtin::BI__builtin_addcs: 3093 case Builtin::BI__builtin_addc: 3094 case Builtin::BI__builtin_addcl: 3095 case Builtin::BI__builtin_addcll: 3096 case Builtin::BI__builtin_subcb: 3097 case Builtin::BI__builtin_subcs: 3098 case Builtin::BI__builtin_subc: 3099 case Builtin::BI__builtin_subcl: 3100 case Builtin::BI__builtin_subcll: { 3101 3102 // We translate all of these builtins from expressions of the form: 3103 // int x = ..., y = ..., carryin = ..., carryout, result; 3104 // result = __builtin_addc(x, y, carryin, &carryout); 3105 // 3106 // to LLVM IR of the form: 3107 // 3108 // %tmp1 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y) 3109 // %tmpsum1 = extractvalue {i32, i1} %tmp1, 0 3110 // %carry1 = extractvalue {i32, i1} %tmp1, 1 3111 // %tmp2 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %tmpsum1, 3112 // i32 %carryin) 3113 // %result = extractvalue {i32, i1} %tmp2, 0 3114 // %carry2 = extractvalue {i32, i1} %tmp2, 1 3115 // %tmp3 = or i1 %carry1, %carry2 3116 // %tmp4 = zext i1 %tmp3 to i32 3117 // store i32 %tmp4, i32* %carryout 3118 3119 // Scalarize our inputs. 3120 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 3121 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 3122 llvm::Value *Carryin = EmitScalarExpr(E->getArg(2)); 3123 Address CarryOutPtr = EmitPointerWithAlignment(E->getArg(3)); 3124 3125 // Decide if we are lowering to a uadd.with.overflow or usub.with.overflow. 3126 llvm::Intrinsic::ID IntrinsicId; 3127 switch (BuiltinID) { 3128 default: llvm_unreachable("Unknown multiprecision builtin id."); 3129 case Builtin::BI__builtin_addcb: 3130 case Builtin::BI__builtin_addcs: 3131 case Builtin::BI__builtin_addc: 3132 case Builtin::BI__builtin_addcl: 3133 case Builtin::BI__builtin_addcll: 3134 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 3135 break; 3136 case Builtin::BI__builtin_subcb: 3137 case Builtin::BI__builtin_subcs: 3138 case Builtin::BI__builtin_subc: 3139 case Builtin::BI__builtin_subcl: 3140 case Builtin::BI__builtin_subcll: 3141 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 3142 break; 3143 } 3144 3145 // Construct our resulting LLVM IR expression. 3146 llvm::Value *Carry1; 3147 llvm::Value *Sum1 = EmitOverflowIntrinsic(*this, IntrinsicId, 3148 X, Y, Carry1); 3149 llvm::Value *Carry2; 3150 llvm::Value *Sum2 = EmitOverflowIntrinsic(*this, IntrinsicId, 3151 Sum1, Carryin, Carry2); 3152 llvm::Value *CarryOut = Builder.CreateZExt(Builder.CreateOr(Carry1, Carry2), 3153 X->getType()); 3154 Builder.CreateStore(CarryOut, CarryOutPtr); 3155 return RValue::get(Sum2); 3156 } 3157 3158 case Builtin::BI__builtin_add_overflow: 3159 case Builtin::BI__builtin_sub_overflow: 3160 case Builtin::BI__builtin_mul_overflow: { 3161 const clang::Expr *LeftArg = E->getArg(0); 3162 const clang::Expr *RightArg = E->getArg(1); 3163 const clang::Expr *ResultArg = E->getArg(2); 3164 3165 clang::QualType ResultQTy = 3166 ResultArg->getType()->castAs<PointerType>()->getPointeeType(); 3167 3168 WidthAndSignedness LeftInfo = 3169 getIntegerWidthAndSignedness(CGM.getContext(), LeftArg->getType()); 3170 WidthAndSignedness RightInfo = 3171 getIntegerWidthAndSignedness(CGM.getContext(), RightArg->getType()); 3172 WidthAndSignedness ResultInfo = 3173 getIntegerWidthAndSignedness(CGM.getContext(), ResultQTy); 3174 3175 // Handle mixed-sign multiplication as a special case, because adding 3176 // runtime or backend support for our generic irgen would be too expensive. 3177 if (isSpecialMixedSignMultiply(BuiltinID, LeftInfo, RightInfo, ResultInfo)) 3178 return EmitCheckedMixedSignMultiply(*this, LeftArg, LeftInfo, RightArg, 3179 RightInfo, ResultArg, ResultQTy, 3180 ResultInfo); 3181 3182 WidthAndSignedness EncompassingInfo = 3183 EncompassingIntegerType({LeftInfo, RightInfo, ResultInfo}); 3184 3185 llvm::Type *EncompassingLLVMTy = 3186 llvm::IntegerType::get(CGM.getLLVMContext(), EncompassingInfo.Width); 3187 3188 llvm::Type *ResultLLVMTy = CGM.getTypes().ConvertType(ResultQTy); 3189 3190 llvm::Intrinsic::ID IntrinsicId; 3191 switch (BuiltinID) { 3192 default: 3193 llvm_unreachable("Unknown overflow builtin id."); 3194 case Builtin::BI__builtin_add_overflow: 3195 IntrinsicId = EncompassingInfo.Signed 3196 ? llvm::Intrinsic::sadd_with_overflow 3197 : llvm::Intrinsic::uadd_with_overflow; 3198 break; 3199 case Builtin::BI__builtin_sub_overflow: 3200 IntrinsicId = EncompassingInfo.Signed 3201 ? llvm::Intrinsic::ssub_with_overflow 3202 : llvm::Intrinsic::usub_with_overflow; 3203 break; 3204 case Builtin::BI__builtin_mul_overflow: 3205 IntrinsicId = EncompassingInfo.Signed 3206 ? llvm::Intrinsic::smul_with_overflow 3207 : llvm::Intrinsic::umul_with_overflow; 3208 break; 3209 } 3210 3211 llvm::Value *Left = EmitScalarExpr(LeftArg); 3212 llvm::Value *Right = EmitScalarExpr(RightArg); 3213 Address ResultPtr = EmitPointerWithAlignment(ResultArg); 3214 3215 // Extend each operand to the encompassing type. 3216 Left = Builder.CreateIntCast(Left, EncompassingLLVMTy, LeftInfo.Signed); 3217 Right = Builder.CreateIntCast(Right, EncompassingLLVMTy, RightInfo.Signed); 3218 3219 // Perform the operation on the extended values. 3220 llvm::Value *Overflow, *Result; 3221 Result = EmitOverflowIntrinsic(*this, IntrinsicId, Left, Right, Overflow); 3222 3223 if (EncompassingInfo.Width > ResultInfo.Width) { 3224 // The encompassing type is wider than the result type, so we need to 3225 // truncate it. 3226 llvm::Value *ResultTrunc = Builder.CreateTrunc(Result, ResultLLVMTy); 3227 3228 // To see if the truncation caused an overflow, we will extend 3229 // the result and then compare it to the original result. 3230 llvm::Value *ResultTruncExt = Builder.CreateIntCast( 3231 ResultTrunc, EncompassingLLVMTy, ResultInfo.Signed); 3232 llvm::Value *TruncationOverflow = 3233 Builder.CreateICmpNE(Result, ResultTruncExt); 3234 3235 Overflow = Builder.CreateOr(Overflow, TruncationOverflow); 3236 Result = ResultTrunc; 3237 } 3238 3239 // Finally, store the result using the pointer. 3240 bool isVolatile = 3241 ResultArg->getType()->getPointeeType().isVolatileQualified(); 3242 Builder.CreateStore(EmitToMemory(Result, ResultQTy), ResultPtr, isVolatile); 3243 3244 return RValue::get(Overflow); 3245 } 3246 3247 case Builtin::BI__builtin_uadd_overflow: 3248 case Builtin::BI__builtin_uaddl_overflow: 3249 case Builtin::BI__builtin_uaddll_overflow: 3250 case Builtin::BI__builtin_usub_overflow: 3251 case Builtin::BI__builtin_usubl_overflow: 3252 case Builtin::BI__builtin_usubll_overflow: 3253 case Builtin::BI__builtin_umul_overflow: 3254 case Builtin::BI__builtin_umull_overflow: 3255 case Builtin::BI__builtin_umulll_overflow: 3256 case Builtin::BI__builtin_sadd_overflow: 3257 case Builtin::BI__builtin_saddl_overflow: 3258 case Builtin::BI__builtin_saddll_overflow: 3259 case Builtin::BI__builtin_ssub_overflow: 3260 case Builtin::BI__builtin_ssubl_overflow: 3261 case Builtin::BI__builtin_ssubll_overflow: 3262 case Builtin::BI__builtin_smul_overflow: 3263 case Builtin::BI__builtin_smull_overflow: 3264 case Builtin::BI__builtin_smulll_overflow: { 3265 3266 // We translate all of these builtins directly to the relevant llvm IR node. 3267 3268 // Scalarize our inputs. 3269 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 3270 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 3271 Address SumOutPtr = EmitPointerWithAlignment(E->getArg(2)); 3272 3273 // Decide which of the overflow intrinsics we are lowering to: 3274 llvm::Intrinsic::ID IntrinsicId; 3275 switch (BuiltinID) { 3276 default: llvm_unreachable("Unknown overflow builtin id."); 3277 case Builtin::BI__builtin_uadd_overflow: 3278 case Builtin::BI__builtin_uaddl_overflow: 3279 case Builtin::BI__builtin_uaddll_overflow: 3280 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 3281 break; 3282 case Builtin::BI__builtin_usub_overflow: 3283 case Builtin::BI__builtin_usubl_overflow: 3284 case Builtin::BI__builtin_usubll_overflow: 3285 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 3286 break; 3287 case Builtin::BI__builtin_umul_overflow: 3288 case Builtin::BI__builtin_umull_overflow: 3289 case Builtin::BI__builtin_umulll_overflow: 3290 IntrinsicId = llvm::Intrinsic::umul_with_overflow; 3291 break; 3292 case Builtin::BI__builtin_sadd_overflow: 3293 case Builtin::BI__builtin_saddl_overflow: 3294 case Builtin::BI__builtin_saddll_overflow: 3295 IntrinsicId = llvm::Intrinsic::sadd_with_overflow; 3296 break; 3297 case Builtin::BI__builtin_ssub_overflow: 3298 case Builtin::BI__builtin_ssubl_overflow: 3299 case Builtin::BI__builtin_ssubll_overflow: 3300 IntrinsicId = llvm::Intrinsic::ssub_with_overflow; 3301 break; 3302 case Builtin::BI__builtin_smul_overflow: 3303 case Builtin::BI__builtin_smull_overflow: 3304 case Builtin::BI__builtin_smulll_overflow: 3305 IntrinsicId = llvm::Intrinsic::smul_with_overflow; 3306 break; 3307 } 3308 3309 3310 llvm::Value *Carry; 3311 llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry); 3312 Builder.CreateStore(Sum, SumOutPtr); 3313 3314 return RValue::get(Carry); 3315 } 3316 case Builtin::BI__builtin_addressof: 3317 return RValue::get(EmitLValue(E->getArg(0)).getPointer()); 3318 case Builtin::BI__builtin_operator_new: 3319 return EmitBuiltinNewDeleteCall( 3320 E->getCallee()->getType()->castAs<FunctionProtoType>(), E, false); 3321 case Builtin::BI__builtin_operator_delete: 3322 return EmitBuiltinNewDeleteCall( 3323 E->getCallee()->getType()->castAs<FunctionProtoType>(), E, true); 3324 3325 case Builtin::BI__noop: 3326 // __noop always evaluates to an integer literal zero. 3327 return RValue::get(ConstantInt::get(IntTy, 0)); 3328 case Builtin::BI__builtin_call_with_static_chain: { 3329 const CallExpr *Call = cast<CallExpr>(E->getArg(0)); 3330 const Expr *Chain = E->getArg(1); 3331 return EmitCall(Call->getCallee()->getType(), 3332 EmitCallee(Call->getCallee()), Call, ReturnValue, 3333 EmitScalarExpr(Chain)); 3334 } 3335 case Builtin::BI_InterlockedExchange8: 3336 case Builtin::BI_InterlockedExchange16: 3337 case Builtin::BI_InterlockedExchange: 3338 case Builtin::BI_InterlockedExchangePointer: 3339 return RValue::get( 3340 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E)); 3341 case Builtin::BI_InterlockedCompareExchangePointer: 3342 case Builtin::BI_InterlockedCompareExchangePointer_nf: { 3343 llvm::Type *RTy; 3344 llvm::IntegerType *IntType = 3345 IntegerType::get(getLLVMContext(), 3346 getContext().getTypeSize(E->getType())); 3347 llvm::Type *IntPtrType = IntType->getPointerTo(); 3348 3349 llvm::Value *Destination = 3350 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), IntPtrType); 3351 3352 llvm::Value *Exchange = EmitScalarExpr(E->getArg(1)); 3353 RTy = Exchange->getType(); 3354 Exchange = Builder.CreatePtrToInt(Exchange, IntType); 3355 3356 llvm::Value *Comparand = 3357 Builder.CreatePtrToInt(EmitScalarExpr(E->getArg(2)), IntType); 3358 3359 auto Ordering = 3360 BuiltinID == Builtin::BI_InterlockedCompareExchangePointer_nf ? 3361 AtomicOrdering::Monotonic : AtomicOrdering::SequentiallyConsistent; 3362 3363 auto Result = Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 3364 Ordering, Ordering); 3365 Result->setVolatile(true); 3366 3367 return RValue::get(Builder.CreateIntToPtr(Builder.CreateExtractValue(Result, 3368 0), 3369 RTy)); 3370 } 3371 case Builtin::BI_InterlockedCompareExchange8: 3372 case Builtin::BI_InterlockedCompareExchange16: 3373 case Builtin::BI_InterlockedCompareExchange: 3374 case Builtin::BI_InterlockedCompareExchange64: 3375 return RValue::get(EmitAtomicCmpXchgForMSIntrin(*this, E)); 3376 case Builtin::BI_InterlockedIncrement16: 3377 case Builtin::BI_InterlockedIncrement: 3378 return RValue::get( 3379 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E)); 3380 case Builtin::BI_InterlockedDecrement16: 3381 case Builtin::BI_InterlockedDecrement: 3382 return RValue::get( 3383 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E)); 3384 case Builtin::BI_InterlockedAnd8: 3385 case Builtin::BI_InterlockedAnd16: 3386 case Builtin::BI_InterlockedAnd: 3387 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E)); 3388 case Builtin::BI_InterlockedExchangeAdd8: 3389 case Builtin::BI_InterlockedExchangeAdd16: 3390 case Builtin::BI_InterlockedExchangeAdd: 3391 return RValue::get( 3392 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E)); 3393 case Builtin::BI_InterlockedExchangeSub8: 3394 case Builtin::BI_InterlockedExchangeSub16: 3395 case Builtin::BI_InterlockedExchangeSub: 3396 return RValue::get( 3397 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E)); 3398 case Builtin::BI_InterlockedOr8: 3399 case Builtin::BI_InterlockedOr16: 3400 case Builtin::BI_InterlockedOr: 3401 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E)); 3402 case Builtin::BI_InterlockedXor8: 3403 case Builtin::BI_InterlockedXor16: 3404 case Builtin::BI_InterlockedXor: 3405 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E)); 3406 3407 case Builtin::BI_bittest64: 3408 case Builtin::BI_bittest: 3409 case Builtin::BI_bittestandcomplement64: 3410 case Builtin::BI_bittestandcomplement: 3411 case Builtin::BI_bittestandreset64: 3412 case Builtin::BI_bittestandreset: 3413 case Builtin::BI_bittestandset64: 3414 case Builtin::BI_bittestandset: 3415 case Builtin::BI_interlockedbittestandreset: 3416 case Builtin::BI_interlockedbittestandreset64: 3417 case Builtin::BI_interlockedbittestandset64: 3418 case Builtin::BI_interlockedbittestandset: 3419 case Builtin::BI_interlockedbittestandset_acq: 3420 case Builtin::BI_interlockedbittestandset_rel: 3421 case Builtin::BI_interlockedbittestandset_nf: 3422 case Builtin::BI_interlockedbittestandreset_acq: 3423 case Builtin::BI_interlockedbittestandreset_rel: 3424 case Builtin::BI_interlockedbittestandreset_nf: 3425 return RValue::get(EmitBitTestIntrinsic(*this, BuiltinID, E)); 3426 3427 case Builtin::BI__exception_code: 3428 case Builtin::BI_exception_code: 3429 return RValue::get(EmitSEHExceptionCode()); 3430 case Builtin::BI__exception_info: 3431 case Builtin::BI_exception_info: 3432 return RValue::get(EmitSEHExceptionInfo()); 3433 case Builtin::BI__abnormal_termination: 3434 case Builtin::BI_abnormal_termination: 3435 return RValue::get(EmitSEHAbnormalTermination()); 3436 case Builtin::BI_setjmpex: 3437 if (getTarget().getTriple().isOSMSVCRT()) 3438 return EmitMSVCRTSetJmp(*this, MSVCSetJmpKind::_setjmpex, E); 3439 break; 3440 case Builtin::BI_setjmp: 3441 if (getTarget().getTriple().isOSMSVCRT()) { 3442 if (getTarget().getTriple().getArch() == llvm::Triple::x86) 3443 return EmitMSVCRTSetJmp(*this, MSVCSetJmpKind::_setjmp3, E); 3444 else if (getTarget().getTriple().getArch() == llvm::Triple::aarch64) 3445 return EmitMSVCRTSetJmp(*this, MSVCSetJmpKind::_setjmpex, E); 3446 return EmitMSVCRTSetJmp(*this, MSVCSetJmpKind::_setjmp, E); 3447 } 3448 break; 3449 3450 case Builtin::BI__GetExceptionInfo: { 3451 if (llvm::GlobalVariable *GV = 3452 CGM.getCXXABI().getThrowInfo(FD->getParamDecl(0)->getType())) 3453 return RValue::get(llvm::ConstantExpr::getBitCast(GV, CGM.Int8PtrTy)); 3454 break; 3455 } 3456 3457 case Builtin::BI__fastfail: 3458 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::__fastfail, E)); 3459 3460 case Builtin::BI__builtin_coro_size: { 3461 auto & Context = getContext(); 3462 auto SizeTy = Context.getSizeType(); 3463 auto T = Builder.getIntNTy(Context.getTypeSize(SizeTy)); 3464 Function *F = CGM.getIntrinsic(Intrinsic::coro_size, T); 3465 return RValue::get(Builder.CreateCall(F)); 3466 } 3467 3468 case Builtin::BI__builtin_coro_id: 3469 return EmitCoroutineIntrinsic(E, Intrinsic::coro_id); 3470 case Builtin::BI__builtin_coro_promise: 3471 return EmitCoroutineIntrinsic(E, Intrinsic::coro_promise); 3472 case Builtin::BI__builtin_coro_resume: 3473 return EmitCoroutineIntrinsic(E, Intrinsic::coro_resume); 3474 case Builtin::BI__builtin_coro_frame: 3475 return EmitCoroutineIntrinsic(E, Intrinsic::coro_frame); 3476 case Builtin::BI__builtin_coro_noop: 3477 return EmitCoroutineIntrinsic(E, Intrinsic::coro_noop); 3478 case Builtin::BI__builtin_coro_free: 3479 return EmitCoroutineIntrinsic(E, Intrinsic::coro_free); 3480 case Builtin::BI__builtin_coro_destroy: 3481 return EmitCoroutineIntrinsic(E, Intrinsic::coro_destroy); 3482 case Builtin::BI__builtin_coro_done: 3483 return EmitCoroutineIntrinsic(E, Intrinsic::coro_done); 3484 case Builtin::BI__builtin_coro_alloc: 3485 return EmitCoroutineIntrinsic(E, Intrinsic::coro_alloc); 3486 case Builtin::BI__builtin_coro_begin: 3487 return EmitCoroutineIntrinsic(E, Intrinsic::coro_begin); 3488 case Builtin::BI__builtin_coro_end: 3489 return EmitCoroutineIntrinsic(E, Intrinsic::coro_end); 3490 case Builtin::BI__builtin_coro_suspend: 3491 return EmitCoroutineIntrinsic(E, Intrinsic::coro_suspend); 3492 case Builtin::BI__builtin_coro_param: 3493 return EmitCoroutineIntrinsic(E, Intrinsic::coro_param); 3494 3495 // OpenCL v2.0 s6.13.16.2, Built-in pipe read and write functions 3496 case Builtin::BIread_pipe: 3497 case Builtin::BIwrite_pipe: { 3498 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 3499 *Arg1 = EmitScalarExpr(E->getArg(1)); 3500 CGOpenCLRuntime OpenCLRT(CGM); 3501 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 3502 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 3503 3504 // Type of the generic packet parameter. 3505 unsigned GenericAS = 3506 getContext().getTargetAddressSpace(LangAS::opencl_generic); 3507 llvm::Type *I8PTy = llvm::PointerType::get( 3508 llvm::Type::getInt8Ty(getLLVMContext()), GenericAS); 3509 3510 // Testing which overloaded version we should generate the call for. 3511 if (2U == E->getNumArgs()) { 3512 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_2" 3513 : "__write_pipe_2"; 3514 // Creating a generic function type to be able to call with any builtin or 3515 // user defined type. 3516 llvm::Type *ArgTys[] = {Arg0->getType(), I8PTy, Int32Ty, Int32Ty}; 3517 llvm::FunctionType *FTy = llvm::FunctionType::get( 3518 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3519 Value *BCast = Builder.CreatePointerCast(Arg1, I8PTy); 3520 return RValue::get( 3521 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3522 {Arg0, BCast, PacketSize, PacketAlign})); 3523 } else { 3524 assert(4 == E->getNumArgs() && 3525 "Illegal number of parameters to pipe function"); 3526 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_4" 3527 : "__write_pipe_4"; 3528 3529 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, I8PTy, 3530 Int32Ty, Int32Ty}; 3531 Value *Arg2 = EmitScalarExpr(E->getArg(2)), 3532 *Arg3 = EmitScalarExpr(E->getArg(3)); 3533 llvm::FunctionType *FTy = llvm::FunctionType::get( 3534 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3535 Value *BCast = Builder.CreatePointerCast(Arg3, I8PTy); 3536 // We know the third argument is an integer type, but we may need to cast 3537 // it to i32. 3538 if (Arg2->getType() != Int32Ty) 3539 Arg2 = Builder.CreateZExtOrTrunc(Arg2, Int32Ty); 3540 return RValue::get(Builder.CreateCall( 3541 CGM.CreateRuntimeFunction(FTy, Name), 3542 {Arg0, Arg1, Arg2, BCast, PacketSize, PacketAlign})); 3543 } 3544 } 3545 // OpenCL v2.0 s6.13.16 ,s9.17.3.5 - Built-in pipe reserve read and write 3546 // functions 3547 case Builtin::BIreserve_read_pipe: 3548 case Builtin::BIreserve_write_pipe: 3549 case Builtin::BIwork_group_reserve_read_pipe: 3550 case Builtin::BIwork_group_reserve_write_pipe: 3551 case Builtin::BIsub_group_reserve_read_pipe: 3552 case Builtin::BIsub_group_reserve_write_pipe: { 3553 // Composing the mangled name for the function. 3554 const char *Name; 3555 if (BuiltinID == Builtin::BIreserve_read_pipe) 3556 Name = "__reserve_read_pipe"; 3557 else if (BuiltinID == Builtin::BIreserve_write_pipe) 3558 Name = "__reserve_write_pipe"; 3559 else if (BuiltinID == Builtin::BIwork_group_reserve_read_pipe) 3560 Name = "__work_group_reserve_read_pipe"; 3561 else if (BuiltinID == Builtin::BIwork_group_reserve_write_pipe) 3562 Name = "__work_group_reserve_write_pipe"; 3563 else if (BuiltinID == Builtin::BIsub_group_reserve_read_pipe) 3564 Name = "__sub_group_reserve_read_pipe"; 3565 else 3566 Name = "__sub_group_reserve_write_pipe"; 3567 3568 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 3569 *Arg1 = EmitScalarExpr(E->getArg(1)); 3570 llvm::Type *ReservedIDTy = ConvertType(getContext().OCLReserveIDTy); 3571 CGOpenCLRuntime OpenCLRT(CGM); 3572 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 3573 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 3574 3575 // Building the generic function prototype. 3576 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty, Int32Ty}; 3577 llvm::FunctionType *FTy = llvm::FunctionType::get( 3578 ReservedIDTy, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3579 // We know the second argument is an integer type, but we may need to cast 3580 // it to i32. 3581 if (Arg1->getType() != Int32Ty) 3582 Arg1 = Builder.CreateZExtOrTrunc(Arg1, Int32Ty); 3583 return RValue::get( 3584 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3585 {Arg0, Arg1, PacketSize, PacketAlign})); 3586 } 3587 // OpenCL v2.0 s6.13.16, s9.17.3.5 - Built-in pipe commit read and write 3588 // functions 3589 case Builtin::BIcommit_read_pipe: 3590 case Builtin::BIcommit_write_pipe: 3591 case Builtin::BIwork_group_commit_read_pipe: 3592 case Builtin::BIwork_group_commit_write_pipe: 3593 case Builtin::BIsub_group_commit_read_pipe: 3594 case Builtin::BIsub_group_commit_write_pipe: { 3595 const char *Name; 3596 if (BuiltinID == Builtin::BIcommit_read_pipe) 3597 Name = "__commit_read_pipe"; 3598 else if (BuiltinID == Builtin::BIcommit_write_pipe) 3599 Name = "__commit_write_pipe"; 3600 else if (BuiltinID == Builtin::BIwork_group_commit_read_pipe) 3601 Name = "__work_group_commit_read_pipe"; 3602 else if (BuiltinID == Builtin::BIwork_group_commit_write_pipe) 3603 Name = "__work_group_commit_write_pipe"; 3604 else if (BuiltinID == Builtin::BIsub_group_commit_read_pipe) 3605 Name = "__sub_group_commit_read_pipe"; 3606 else 3607 Name = "__sub_group_commit_write_pipe"; 3608 3609 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 3610 *Arg1 = EmitScalarExpr(E->getArg(1)); 3611 CGOpenCLRuntime OpenCLRT(CGM); 3612 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 3613 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 3614 3615 // Building the generic function prototype. 3616 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, Int32Ty}; 3617 llvm::FunctionType *FTy = 3618 llvm::FunctionType::get(llvm::Type::getVoidTy(getLLVMContext()), 3619 llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3620 3621 return RValue::get( 3622 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3623 {Arg0, Arg1, PacketSize, PacketAlign})); 3624 } 3625 // OpenCL v2.0 s6.13.16.4 Built-in pipe query functions 3626 case Builtin::BIget_pipe_num_packets: 3627 case Builtin::BIget_pipe_max_packets: { 3628 const char *BaseName; 3629 const PipeType *PipeTy = E->getArg(0)->getType()->getAs<PipeType>(); 3630 if (BuiltinID == Builtin::BIget_pipe_num_packets) 3631 BaseName = "__get_pipe_num_packets"; 3632 else 3633 BaseName = "__get_pipe_max_packets"; 3634 auto Name = std::string(BaseName) + 3635 std::string(PipeTy->isReadOnly() ? "_ro" : "_wo"); 3636 3637 // Building the generic function prototype. 3638 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 3639 CGOpenCLRuntime OpenCLRT(CGM); 3640 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 3641 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 3642 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty}; 3643 llvm::FunctionType *FTy = llvm::FunctionType::get( 3644 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3645 3646 return RValue::get(Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3647 {Arg0, PacketSize, PacketAlign})); 3648 } 3649 3650 // OpenCL v2.0 s6.13.9 - Address space qualifier functions. 3651 case Builtin::BIto_global: 3652 case Builtin::BIto_local: 3653 case Builtin::BIto_private: { 3654 auto Arg0 = EmitScalarExpr(E->getArg(0)); 3655 auto NewArgT = llvm::PointerType::get(Int8Ty, 3656 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3657 auto NewRetT = llvm::PointerType::get(Int8Ty, 3658 CGM.getContext().getTargetAddressSpace( 3659 E->getType()->getPointeeType().getAddressSpace())); 3660 auto FTy = llvm::FunctionType::get(NewRetT, {NewArgT}, false); 3661 llvm::Value *NewArg; 3662 if (Arg0->getType()->getPointerAddressSpace() != 3663 NewArgT->getPointerAddressSpace()) 3664 NewArg = Builder.CreateAddrSpaceCast(Arg0, NewArgT); 3665 else 3666 NewArg = Builder.CreateBitOrPointerCast(Arg0, NewArgT); 3667 auto NewName = std::string("__") + E->getDirectCallee()->getName().str(); 3668 auto NewCall = 3669 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, NewName), {NewArg}); 3670 return RValue::get(Builder.CreateBitOrPointerCast(NewCall, 3671 ConvertType(E->getType()))); 3672 } 3673 3674 // OpenCL v2.0, s6.13.17 - Enqueue kernel function. 3675 // It contains four different overload formats specified in Table 6.13.17.1. 3676 case Builtin::BIenqueue_kernel: { 3677 StringRef Name; // Generated function call name 3678 unsigned NumArgs = E->getNumArgs(); 3679 3680 llvm::Type *QueueTy = ConvertType(getContext().OCLQueueTy); 3681 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3682 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3683 3684 llvm::Value *Queue = EmitScalarExpr(E->getArg(0)); 3685 llvm::Value *Flags = EmitScalarExpr(E->getArg(1)); 3686 LValue NDRangeL = EmitAggExprToLValue(E->getArg(2)); 3687 llvm::Value *Range = NDRangeL.getAddress().getPointer(); 3688 llvm::Type *RangeTy = NDRangeL.getAddress().getType(); 3689 3690 if (NumArgs == 4) { 3691 // The most basic form of the call with parameters: 3692 // queue_t, kernel_enqueue_flags_t, ndrange_t, block(void) 3693 Name = "__enqueue_kernel_basic"; 3694 llvm::Type *ArgTys[] = {QueueTy, Int32Ty, RangeTy, GenericVoidPtrTy, 3695 GenericVoidPtrTy}; 3696 llvm::FunctionType *FTy = llvm::FunctionType::get( 3697 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3698 3699 auto Info = 3700 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(3)); 3701 llvm::Value *Kernel = 3702 Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3703 llvm::Value *Block = 3704 Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3705 3706 AttrBuilder B; 3707 B.addAttribute(Attribute::ByVal); 3708 llvm::AttributeList ByValAttrSet = 3709 llvm::AttributeList::get(CGM.getModule().getContext(), 3U, B); 3710 3711 auto RTCall = 3712 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name, ByValAttrSet), 3713 {Queue, Flags, Range, Kernel, Block}); 3714 RTCall->setAttributes(ByValAttrSet); 3715 return RValue::get(RTCall); 3716 } 3717 assert(NumArgs >= 5 && "Invalid enqueue_kernel signature"); 3718 3719 // Create a temporary array to hold the sizes of local pointer arguments 3720 // for the block. \p First is the position of the first size argument. 3721 auto CreateArrayForSizeVar = [=](unsigned First) 3722 -> std::tuple<llvm::Value *, llvm::Value *, llvm::Value *> { 3723 llvm::APInt ArraySize(32, NumArgs - First); 3724 QualType SizeArrayTy = getContext().getConstantArrayType( 3725 getContext().getSizeType(), ArraySize, ArrayType::Normal, 3726 /*IndexTypeQuals=*/0); 3727 auto Tmp = CreateMemTemp(SizeArrayTy, "block_sizes"); 3728 llvm::Value *TmpPtr = Tmp.getPointer(); 3729 llvm::Value *TmpSize = EmitLifetimeStart( 3730 CGM.getDataLayout().getTypeAllocSize(Tmp.getElementType()), TmpPtr); 3731 llvm::Value *ElemPtr; 3732 // Each of the following arguments specifies the size of the corresponding 3733 // argument passed to the enqueued block. 3734 auto *Zero = llvm::ConstantInt::get(IntTy, 0); 3735 for (unsigned I = First; I < NumArgs; ++I) { 3736 auto *Index = llvm::ConstantInt::get(IntTy, I - First); 3737 auto *GEP = Builder.CreateGEP(TmpPtr, {Zero, Index}); 3738 if (I == First) 3739 ElemPtr = GEP; 3740 auto *V = 3741 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(I)), SizeTy); 3742 Builder.CreateAlignedStore( 3743 V, GEP, CGM.getDataLayout().getPrefTypeAlignment(SizeTy)); 3744 } 3745 return std::tie(ElemPtr, TmpSize, TmpPtr); 3746 }; 3747 3748 // Could have events and/or varargs. 3749 if (E->getArg(3)->getType()->isBlockPointerType()) { 3750 // No events passed, but has variadic arguments. 3751 Name = "__enqueue_kernel_varargs"; 3752 auto Info = 3753 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(3)); 3754 llvm::Value *Kernel = 3755 Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3756 auto *Block = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3757 llvm::Value *ElemPtr, *TmpSize, *TmpPtr; 3758 std::tie(ElemPtr, TmpSize, TmpPtr) = CreateArrayForSizeVar(4); 3759 3760 // Create a vector of the arguments, as well as a constant value to 3761 // express to the runtime the number of variadic arguments. 3762 std::vector<llvm::Value *> Args = { 3763 Queue, Flags, Range, 3764 Kernel, Block, ConstantInt::get(IntTy, NumArgs - 4), 3765 ElemPtr}; 3766 std::vector<llvm::Type *> ArgTys = { 3767 QueueTy, IntTy, RangeTy, GenericVoidPtrTy, 3768 GenericVoidPtrTy, IntTy, ElemPtr->getType()}; 3769 3770 llvm::FunctionType *FTy = llvm::FunctionType::get( 3771 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3772 auto Call = 3773 RValue::get(Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3774 llvm::ArrayRef<llvm::Value *>(Args))); 3775 if (TmpSize) 3776 EmitLifetimeEnd(TmpSize, TmpPtr); 3777 return Call; 3778 } 3779 // Any calls now have event arguments passed. 3780 if (NumArgs >= 7) { 3781 llvm::Type *EventTy = ConvertType(getContext().OCLClkEventTy); 3782 llvm::Type *EventPtrTy = EventTy->getPointerTo( 3783 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3784 3785 llvm::Value *NumEvents = 3786 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(3)), Int32Ty); 3787 llvm::Value *EventList = 3788 E->getArg(4)->getType()->isArrayType() 3789 ? EmitArrayToPointerDecay(E->getArg(4)).getPointer() 3790 : EmitScalarExpr(E->getArg(4)); 3791 llvm::Value *ClkEvent = EmitScalarExpr(E->getArg(5)); 3792 // Convert to generic address space. 3793 EventList = Builder.CreatePointerCast(EventList, EventPtrTy); 3794 ClkEvent = ClkEvent->getType()->isIntegerTy() 3795 ? Builder.CreateBitOrPointerCast(ClkEvent, EventPtrTy) 3796 : Builder.CreatePointerCast(ClkEvent, EventPtrTy); 3797 auto Info = 3798 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(6)); 3799 llvm::Value *Kernel = 3800 Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3801 llvm::Value *Block = 3802 Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3803 3804 std::vector<llvm::Type *> ArgTys = { 3805 QueueTy, Int32Ty, RangeTy, Int32Ty, 3806 EventPtrTy, EventPtrTy, GenericVoidPtrTy, GenericVoidPtrTy}; 3807 3808 std::vector<llvm::Value *> Args = {Queue, Flags, Range, NumEvents, 3809 EventList, ClkEvent, Kernel, Block}; 3810 3811 if (NumArgs == 7) { 3812 // Has events but no variadics. 3813 Name = "__enqueue_kernel_basic_events"; 3814 llvm::FunctionType *FTy = llvm::FunctionType::get( 3815 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3816 return RValue::get( 3817 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3818 llvm::ArrayRef<llvm::Value *>(Args))); 3819 } 3820 // Has event info and variadics 3821 // Pass the number of variadics to the runtime function too. 3822 Args.push_back(ConstantInt::get(Int32Ty, NumArgs - 7)); 3823 ArgTys.push_back(Int32Ty); 3824 Name = "__enqueue_kernel_events_varargs"; 3825 3826 llvm::Value *ElemPtr, *TmpSize, *TmpPtr; 3827 std::tie(ElemPtr, TmpSize, TmpPtr) = CreateArrayForSizeVar(7); 3828 Args.push_back(ElemPtr); 3829 ArgTys.push_back(ElemPtr->getType()); 3830 3831 llvm::FunctionType *FTy = llvm::FunctionType::get( 3832 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 3833 auto Call = 3834 RValue::get(Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 3835 llvm::ArrayRef<llvm::Value *>(Args))); 3836 if (TmpSize) 3837 EmitLifetimeEnd(TmpSize, TmpPtr); 3838 return Call; 3839 } 3840 LLVM_FALLTHROUGH; 3841 } 3842 // OpenCL v2.0 s6.13.17.6 - Kernel query functions need bitcast of block 3843 // parameter. 3844 case Builtin::BIget_kernel_work_group_size: { 3845 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3846 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3847 auto Info = 3848 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(0)); 3849 Value *Kernel = Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3850 Value *Arg = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3851 return RValue::get(Builder.CreateCall( 3852 CGM.CreateRuntimeFunction( 3853 llvm::FunctionType::get(IntTy, {GenericVoidPtrTy, GenericVoidPtrTy}, 3854 false), 3855 "__get_kernel_work_group_size_impl"), 3856 {Kernel, Arg})); 3857 } 3858 case Builtin::BIget_kernel_preferred_work_group_size_multiple: { 3859 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3860 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3861 auto Info = 3862 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(0)); 3863 Value *Kernel = Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3864 Value *Arg = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3865 return RValue::get(Builder.CreateCall( 3866 CGM.CreateRuntimeFunction( 3867 llvm::FunctionType::get(IntTy, {GenericVoidPtrTy, GenericVoidPtrTy}, 3868 false), 3869 "__get_kernel_preferred_work_group_size_multiple_impl"), 3870 {Kernel, Arg})); 3871 } 3872 case Builtin::BIget_kernel_max_sub_group_size_for_ndrange: 3873 case Builtin::BIget_kernel_sub_group_count_for_ndrange: { 3874 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 3875 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 3876 LValue NDRangeL = EmitAggExprToLValue(E->getArg(0)); 3877 llvm::Value *NDRange = NDRangeL.getAddress().getPointer(); 3878 auto Info = 3879 CGM.getOpenCLRuntime().emitOpenCLEnqueuedBlock(*this, E->getArg(1)); 3880 Value *Kernel = Builder.CreatePointerCast(Info.Kernel, GenericVoidPtrTy); 3881 Value *Block = Builder.CreatePointerCast(Info.BlockArg, GenericVoidPtrTy); 3882 const char *Name = 3883 BuiltinID == Builtin::BIget_kernel_max_sub_group_size_for_ndrange 3884 ? "__get_kernel_max_sub_group_size_for_ndrange_impl" 3885 : "__get_kernel_sub_group_count_for_ndrange_impl"; 3886 return RValue::get(Builder.CreateCall( 3887 CGM.CreateRuntimeFunction( 3888 llvm::FunctionType::get( 3889 IntTy, {NDRange->getType(), GenericVoidPtrTy, GenericVoidPtrTy}, 3890 false), 3891 Name), 3892 {NDRange, Kernel, Block})); 3893 } 3894 3895 case Builtin::BI__builtin_store_half: 3896 case Builtin::BI__builtin_store_halff: { 3897 Value *Val = EmitScalarExpr(E->getArg(0)); 3898 Address Address = EmitPointerWithAlignment(E->getArg(1)); 3899 Value *HalfVal = Builder.CreateFPTrunc(Val, Builder.getHalfTy()); 3900 return RValue::get(Builder.CreateStore(HalfVal, Address)); 3901 } 3902 case Builtin::BI__builtin_load_half: { 3903 Address Address = EmitPointerWithAlignment(E->getArg(0)); 3904 Value *HalfVal = Builder.CreateLoad(Address); 3905 return RValue::get(Builder.CreateFPExt(HalfVal, Builder.getDoubleTy())); 3906 } 3907 case Builtin::BI__builtin_load_halff: { 3908 Address Address = EmitPointerWithAlignment(E->getArg(0)); 3909 Value *HalfVal = Builder.CreateLoad(Address); 3910 return RValue::get(Builder.CreateFPExt(HalfVal, Builder.getFloatTy())); 3911 } 3912 case Builtin::BIprintf: 3913 if (getTarget().getTriple().isNVPTX()) 3914 return EmitNVPTXDevicePrintfCallExpr(E, ReturnValue); 3915 break; 3916 case Builtin::BI__builtin_canonicalize: 3917 case Builtin::BI__builtin_canonicalizef: 3918 case Builtin::BI__builtin_canonicalizel: 3919 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::canonicalize)); 3920 3921 case Builtin::BI__builtin_thread_pointer: { 3922 if (!getContext().getTargetInfo().isTLSSupported()) 3923 CGM.ErrorUnsupported(E, "__builtin_thread_pointer"); 3924 // Fall through - it's already mapped to the intrinsic by GCCBuiltin. 3925 break; 3926 } 3927 case Builtin::BI__builtin_os_log_format: 3928 return emitBuiltinOSLogFormat(*E); 3929 3930 case Builtin::BI__xray_customevent: { 3931 if (!ShouldXRayInstrumentFunction()) 3932 return RValue::getIgnored(); 3933 3934 if (!CGM.getCodeGenOpts().XRayInstrumentationBundle.has( 3935 XRayInstrKind::Custom)) 3936 return RValue::getIgnored(); 3937 3938 if (const auto *XRayAttr = CurFuncDecl->getAttr<XRayInstrumentAttr>()) 3939 if (XRayAttr->neverXRayInstrument() && !AlwaysEmitXRayCustomEvents()) 3940 return RValue::getIgnored(); 3941 3942 Function *F = CGM.getIntrinsic(Intrinsic::xray_customevent); 3943 auto FTy = F->getFunctionType(); 3944 auto Arg0 = E->getArg(0); 3945 auto Arg0Val = EmitScalarExpr(Arg0); 3946 auto Arg0Ty = Arg0->getType(); 3947 auto PTy0 = FTy->getParamType(0); 3948 if (PTy0 != Arg0Val->getType()) { 3949 if (Arg0Ty->isArrayType()) 3950 Arg0Val = EmitArrayToPointerDecay(Arg0).getPointer(); 3951 else 3952 Arg0Val = Builder.CreatePointerCast(Arg0Val, PTy0); 3953 } 3954 auto Arg1 = EmitScalarExpr(E->getArg(1)); 3955 auto PTy1 = FTy->getParamType(1); 3956 if (PTy1 != Arg1->getType()) 3957 Arg1 = Builder.CreateTruncOrBitCast(Arg1, PTy1); 3958 return RValue::get(Builder.CreateCall(F, {Arg0Val, Arg1})); 3959 } 3960 3961 case Builtin::BI__xray_typedevent: { 3962 // TODO: There should be a way to always emit events even if the current 3963 // function is not instrumented. Losing events in a stream can cripple 3964 // a trace. 3965 if (!ShouldXRayInstrumentFunction()) 3966 return RValue::getIgnored(); 3967 3968 if (!CGM.getCodeGenOpts().XRayInstrumentationBundle.has( 3969 XRayInstrKind::Typed)) 3970 return RValue::getIgnored(); 3971 3972 if (const auto *XRayAttr = CurFuncDecl->getAttr<XRayInstrumentAttr>()) 3973 if (XRayAttr->neverXRayInstrument() && !AlwaysEmitXRayTypedEvents()) 3974 return RValue::getIgnored(); 3975 3976 Function *F = CGM.getIntrinsic(Intrinsic::xray_typedevent); 3977 auto FTy = F->getFunctionType(); 3978 auto Arg0 = EmitScalarExpr(E->getArg(0)); 3979 auto PTy0 = FTy->getParamType(0); 3980 if (PTy0 != Arg0->getType()) 3981 Arg0 = Builder.CreateTruncOrBitCast(Arg0, PTy0); 3982 auto Arg1 = E->getArg(1); 3983 auto Arg1Val = EmitScalarExpr(Arg1); 3984 auto Arg1Ty = Arg1->getType(); 3985 auto PTy1 = FTy->getParamType(1); 3986 if (PTy1 != Arg1Val->getType()) { 3987 if (Arg1Ty->isArrayType()) 3988 Arg1Val = EmitArrayToPointerDecay(Arg1).getPointer(); 3989 else 3990 Arg1Val = Builder.CreatePointerCast(Arg1Val, PTy1); 3991 } 3992 auto Arg2 = EmitScalarExpr(E->getArg(2)); 3993 auto PTy2 = FTy->getParamType(2); 3994 if (PTy2 != Arg2->getType()) 3995 Arg2 = Builder.CreateTruncOrBitCast(Arg2, PTy2); 3996 return RValue::get(Builder.CreateCall(F, {Arg0, Arg1Val, Arg2})); 3997 } 3998 3999 case Builtin::BI__builtin_ms_va_start: 4000 case Builtin::BI__builtin_ms_va_end: 4001 return RValue::get( 4002 EmitVAStartEnd(EmitMSVAListRef(E->getArg(0)).getPointer(), 4003 BuiltinID == Builtin::BI__builtin_ms_va_start)); 4004 4005 case Builtin::BI__builtin_ms_va_copy: { 4006 // Lower this manually. We can't reliably determine whether or not any 4007 // given va_copy() is for a Win64 va_list from the calling convention 4008 // alone, because it's legal to do this from a System V ABI function. 4009 // With opaque pointer types, we won't have enough information in LLVM 4010 // IR to determine this from the argument types, either. Best to do it 4011 // now, while we have enough information. 4012 Address DestAddr = EmitMSVAListRef(E->getArg(0)); 4013 Address SrcAddr = EmitMSVAListRef(E->getArg(1)); 4014 4015 llvm::Type *BPP = Int8PtrPtrTy; 4016 4017 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), BPP, "cp"), 4018 DestAddr.getAlignment()); 4019 SrcAddr = Address(Builder.CreateBitCast(SrcAddr.getPointer(), BPP, "ap"), 4020 SrcAddr.getAlignment()); 4021 4022 Value *ArgPtr = Builder.CreateLoad(SrcAddr, "ap.val"); 4023 return RValue::get(Builder.CreateStore(ArgPtr, DestAddr)); 4024 } 4025 } 4026 4027 // If this is an alias for a lib function (e.g. __builtin_sin), emit 4028 // the call using the normal call path, but using the unmangled 4029 // version of the function name. 4030 if (getContext().BuiltinInfo.isLibFunction(BuiltinID)) 4031 return emitLibraryCall(*this, FD, E, 4032 CGM.getBuiltinLibFunction(FD, BuiltinID)); 4033 4034 // If this is a predefined lib function (e.g. malloc), emit the call 4035 // using exactly the normal call path. 4036 if (getContext().BuiltinInfo.isPredefinedLibFunction(BuiltinID)) 4037 return emitLibraryCall(*this, FD, E, 4038 cast<llvm::Constant>(EmitScalarExpr(E->getCallee()))); 4039 4040 // Check that a call to a target specific builtin has the correct target 4041 // features. 4042 // This is down here to avoid non-target specific builtins, however, if 4043 // generic builtins start to require generic target features then we 4044 // can move this up to the beginning of the function. 4045 checkTargetFeatures(E, FD); 4046 4047 if (unsigned VectorWidth = getContext().BuiltinInfo.getRequiredVectorWidth(BuiltinID)) 4048 LargestVectorWidth = std::max(LargestVectorWidth, VectorWidth); 4049 4050 // See if we have a target specific intrinsic. 4051 const char *Name = getContext().BuiltinInfo.getName(BuiltinID); 4052 Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; 4053 StringRef Prefix = 4054 llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch()); 4055 if (!Prefix.empty()) { 4056 IntrinsicID = Intrinsic::getIntrinsicForGCCBuiltin(Prefix.data(), Name); 4057 // NOTE we don't need to perform a compatibility flag check here since the 4058 // intrinsics are declared in Builtins*.def via LANGBUILTIN which filter the 4059 // MS builtins via ALL_MS_LANGUAGES and are filtered earlier. 4060 if (IntrinsicID == Intrinsic::not_intrinsic) 4061 IntrinsicID = Intrinsic::getIntrinsicForMSBuiltin(Prefix.data(), Name); 4062 } 4063 4064 if (IntrinsicID != Intrinsic::not_intrinsic) { 4065 SmallVector<Value*, 16> Args; 4066 4067 // Find out if any arguments are required to be integer constant 4068 // expressions. 4069 unsigned ICEArguments = 0; 4070 ASTContext::GetBuiltinTypeError Error; 4071 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 4072 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 4073 4074 Function *F = CGM.getIntrinsic(IntrinsicID); 4075 llvm::FunctionType *FTy = F->getFunctionType(); 4076 4077 for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) { 4078 Value *ArgValue; 4079 // If this is a normal argument, just emit it as a scalar. 4080 if ((ICEArguments & (1 << i)) == 0) { 4081 ArgValue = EmitScalarExpr(E->getArg(i)); 4082 } else { 4083 // If this is required to be a constant, constant fold it so that we 4084 // know that the generated intrinsic gets a ConstantInt. 4085 llvm::APSInt Result; 4086 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result,getContext()); 4087 assert(IsConst && "Constant arg isn't actually constant?"); 4088 (void)IsConst; 4089 ArgValue = llvm::ConstantInt::get(getLLVMContext(), Result); 4090 } 4091 4092 // If the intrinsic arg type is different from the builtin arg type 4093 // we need to do a bit cast. 4094 llvm::Type *PTy = FTy->getParamType(i); 4095 if (PTy != ArgValue->getType()) { 4096 // XXX - vector of pointers? 4097 if (auto *PtrTy = dyn_cast<llvm::PointerType>(PTy)) { 4098 if (PtrTy->getAddressSpace() != 4099 ArgValue->getType()->getPointerAddressSpace()) { 4100 ArgValue = Builder.CreateAddrSpaceCast( 4101 ArgValue, 4102 ArgValue->getType()->getPointerTo(PtrTy->getAddressSpace())); 4103 } 4104 } 4105 4106 assert(PTy->canLosslesslyBitCastTo(FTy->getParamType(i)) && 4107 "Must be able to losslessly bit cast to param"); 4108 ArgValue = Builder.CreateBitCast(ArgValue, PTy); 4109 } 4110 4111 Args.push_back(ArgValue); 4112 } 4113 4114 Value *V = Builder.CreateCall(F, Args); 4115 QualType BuiltinRetType = E->getType(); 4116 4117 llvm::Type *RetTy = VoidTy; 4118 if (!BuiltinRetType->isVoidType()) 4119 RetTy = ConvertType(BuiltinRetType); 4120 4121 if (RetTy != V->getType()) { 4122 // XXX - vector of pointers? 4123 if (auto *PtrTy = dyn_cast<llvm::PointerType>(RetTy)) { 4124 if (PtrTy->getAddressSpace() != V->getType()->getPointerAddressSpace()) { 4125 V = Builder.CreateAddrSpaceCast( 4126 V, V->getType()->getPointerTo(PtrTy->getAddressSpace())); 4127 } 4128 } 4129 4130 assert(V->getType()->canLosslesslyBitCastTo(RetTy) && 4131 "Must be able to losslessly bit cast result type"); 4132 V = Builder.CreateBitCast(V, RetTy); 4133 } 4134 4135 return RValue::get(V); 4136 } 4137 4138 // See if we have a target specific builtin that needs to be lowered. 4139 if (Value *V = EmitTargetBuiltinExpr(BuiltinID, E)) 4140 return RValue::get(V); 4141 4142 ErrorUnsupported(E, "builtin function"); 4143 4144 // Unknown builtin, for now just dump it out and return undef. 4145 return GetUndefRValue(E->getType()); 4146 } 4147 4148 static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF, 4149 unsigned BuiltinID, const CallExpr *E, 4150 llvm::Triple::ArchType Arch) { 4151 switch (Arch) { 4152 case llvm::Triple::arm: 4153 case llvm::Triple::armeb: 4154 case llvm::Triple::thumb: 4155 case llvm::Triple::thumbeb: 4156 return CGF->EmitARMBuiltinExpr(BuiltinID, E, Arch); 4157 case llvm::Triple::aarch64: 4158 case llvm::Triple::aarch64_be: 4159 return CGF->EmitAArch64BuiltinExpr(BuiltinID, E, Arch); 4160 case llvm::Triple::x86: 4161 case llvm::Triple::x86_64: 4162 return CGF->EmitX86BuiltinExpr(BuiltinID, E); 4163 case llvm::Triple::ppc: 4164 case llvm::Triple::ppc64: 4165 case llvm::Triple::ppc64le: 4166 return CGF->EmitPPCBuiltinExpr(BuiltinID, E); 4167 case llvm::Triple::r600: 4168 case llvm::Triple::amdgcn: 4169 return CGF->EmitAMDGPUBuiltinExpr(BuiltinID, E); 4170 case llvm::Triple::systemz: 4171 return CGF->EmitSystemZBuiltinExpr(BuiltinID, E); 4172 case llvm::Triple::nvptx: 4173 case llvm::Triple::nvptx64: 4174 return CGF->EmitNVPTXBuiltinExpr(BuiltinID, E); 4175 case llvm::Triple::wasm32: 4176 case llvm::Triple::wasm64: 4177 return CGF->EmitWebAssemblyBuiltinExpr(BuiltinID, E); 4178 case llvm::Triple::hexagon: 4179 return CGF->EmitHexagonBuiltinExpr(BuiltinID, E); 4180 default: 4181 return nullptr; 4182 } 4183 } 4184 4185 Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID, 4186 const CallExpr *E) { 4187 if (getContext().BuiltinInfo.isAuxBuiltinID(BuiltinID)) { 4188 assert(getContext().getAuxTargetInfo() && "Missing aux target info"); 4189 return EmitTargetArchBuiltinExpr( 4190 this, getContext().BuiltinInfo.getAuxBuiltinID(BuiltinID), E, 4191 getContext().getAuxTargetInfo()->getTriple().getArch()); 4192 } 4193 4194 return EmitTargetArchBuiltinExpr(this, BuiltinID, E, 4195 getTarget().getTriple().getArch()); 4196 } 4197 4198 static llvm::VectorType *GetNeonType(CodeGenFunction *CGF, 4199 NeonTypeFlags TypeFlags, 4200 bool HasLegalHalfType=true, 4201 bool V1Ty=false) { 4202 int IsQuad = TypeFlags.isQuad(); 4203 switch (TypeFlags.getEltType()) { 4204 case NeonTypeFlags::Int8: 4205 case NeonTypeFlags::Poly8: 4206 return llvm::VectorType::get(CGF->Int8Ty, V1Ty ? 1 : (8 << IsQuad)); 4207 case NeonTypeFlags::Int16: 4208 case NeonTypeFlags::Poly16: 4209 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 4210 case NeonTypeFlags::Float16: 4211 if (HasLegalHalfType) 4212 return llvm::VectorType::get(CGF->HalfTy, V1Ty ? 1 : (4 << IsQuad)); 4213 else 4214 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 4215 case NeonTypeFlags::Int32: 4216 return llvm::VectorType::get(CGF->Int32Ty, V1Ty ? 1 : (2 << IsQuad)); 4217 case NeonTypeFlags::Int64: 4218 case NeonTypeFlags::Poly64: 4219 return llvm::VectorType::get(CGF->Int64Ty, V1Ty ? 1 : (1 << IsQuad)); 4220 case NeonTypeFlags::Poly128: 4221 // FIXME: i128 and f128 doesn't get fully support in Clang and llvm. 4222 // There is a lot of i128 and f128 API missing. 4223 // so we use v16i8 to represent poly128 and get pattern matched. 4224 return llvm::VectorType::get(CGF->Int8Ty, 16); 4225 case NeonTypeFlags::Float32: 4226 return llvm::VectorType::get(CGF->FloatTy, V1Ty ? 1 : (2 << IsQuad)); 4227 case NeonTypeFlags::Float64: 4228 return llvm::VectorType::get(CGF->DoubleTy, V1Ty ? 1 : (1 << IsQuad)); 4229 } 4230 llvm_unreachable("Unknown vector element type!"); 4231 } 4232 4233 static llvm::VectorType *GetFloatNeonType(CodeGenFunction *CGF, 4234 NeonTypeFlags IntTypeFlags) { 4235 int IsQuad = IntTypeFlags.isQuad(); 4236 switch (IntTypeFlags.getEltType()) { 4237 case NeonTypeFlags::Int16: 4238 return llvm::VectorType::get(CGF->HalfTy, (4 << IsQuad)); 4239 case NeonTypeFlags::Int32: 4240 return llvm::VectorType::get(CGF->FloatTy, (2 << IsQuad)); 4241 case NeonTypeFlags::Int64: 4242 return llvm::VectorType::get(CGF->DoubleTy, (1 << IsQuad)); 4243 default: 4244 llvm_unreachable("Type can't be converted to floating-point!"); 4245 } 4246 } 4247 4248 Value *CodeGenFunction::EmitNeonSplat(Value *V, Constant *C) { 4249 unsigned nElts = V->getType()->getVectorNumElements(); 4250 Value* SV = llvm::ConstantVector::getSplat(nElts, C); 4251 return Builder.CreateShuffleVector(V, V, SV, "lane"); 4252 } 4253 4254 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, 4255 const char *name, 4256 unsigned shift, bool rightshift) { 4257 unsigned j = 0; 4258 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 4259 ai != ae; ++ai, ++j) 4260 if (shift > 0 && shift == j) 4261 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); 4262 else 4263 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); 4264 4265 return Builder.CreateCall(F, Ops, name); 4266 } 4267 4268 Value *CodeGenFunction::EmitNeonShiftVector(Value *V, llvm::Type *Ty, 4269 bool neg) { 4270 int SV = cast<ConstantInt>(V)->getSExtValue(); 4271 return ConstantInt::get(Ty, neg ? -SV : SV); 4272 } 4273 4274 // Right-shift a vector by a constant. 4275 Value *CodeGenFunction::EmitNeonRShiftImm(Value *Vec, Value *Shift, 4276 llvm::Type *Ty, bool usgn, 4277 const char *name) { 4278 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 4279 4280 int ShiftAmt = cast<ConstantInt>(Shift)->getSExtValue(); 4281 int EltSize = VTy->getScalarSizeInBits(); 4282 4283 Vec = Builder.CreateBitCast(Vec, Ty); 4284 4285 // lshr/ashr are undefined when the shift amount is equal to the vector 4286 // element size. 4287 if (ShiftAmt == EltSize) { 4288 if (usgn) { 4289 // Right-shifting an unsigned value by its size yields 0. 4290 return llvm::ConstantAggregateZero::get(VTy); 4291 } else { 4292 // Right-shifting a signed value by its size is equivalent 4293 // to a shift of size-1. 4294 --ShiftAmt; 4295 Shift = ConstantInt::get(VTy->getElementType(), ShiftAmt); 4296 } 4297 } 4298 4299 Shift = EmitNeonShiftVector(Shift, Ty, false); 4300 if (usgn) 4301 return Builder.CreateLShr(Vec, Shift, name); 4302 else 4303 return Builder.CreateAShr(Vec, Shift, name); 4304 } 4305 4306 enum { 4307 AddRetType = (1 << 0), 4308 Add1ArgType = (1 << 1), 4309 Add2ArgTypes = (1 << 2), 4310 4311 VectorizeRetType = (1 << 3), 4312 VectorizeArgTypes = (1 << 4), 4313 4314 InventFloatType = (1 << 5), 4315 UnsignedAlts = (1 << 6), 4316 4317 Use64BitVectors = (1 << 7), 4318 Use128BitVectors = (1 << 8), 4319 4320 Vectorize1ArgType = Add1ArgType | VectorizeArgTypes, 4321 VectorRet = AddRetType | VectorizeRetType, 4322 VectorRetGetArgs01 = 4323 AddRetType | Add2ArgTypes | VectorizeRetType | VectorizeArgTypes, 4324 FpCmpzModifiers = 4325 AddRetType | VectorizeRetType | Add1ArgType | InventFloatType 4326 }; 4327 4328 namespace { 4329 struct NeonIntrinsicInfo { 4330 const char *NameHint; 4331 unsigned BuiltinID; 4332 unsigned LLVMIntrinsic; 4333 unsigned AltLLVMIntrinsic; 4334 unsigned TypeModifier; 4335 4336 bool operator<(unsigned RHSBuiltinID) const { 4337 return BuiltinID < RHSBuiltinID; 4338 } 4339 bool operator<(const NeonIntrinsicInfo &TE) const { 4340 return BuiltinID < TE.BuiltinID; 4341 } 4342 }; 4343 } // end anonymous namespace 4344 4345 #define NEONMAP0(NameBase) \ 4346 { #NameBase, NEON::BI__builtin_neon_ ## NameBase, 0, 0, 0 } 4347 4348 #define NEONMAP1(NameBase, LLVMIntrinsic, TypeModifier) \ 4349 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 4350 Intrinsic::LLVMIntrinsic, 0, TypeModifier } 4351 4352 #define NEONMAP2(NameBase, LLVMIntrinsic, AltLLVMIntrinsic, TypeModifier) \ 4353 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 4354 Intrinsic::LLVMIntrinsic, Intrinsic::AltLLVMIntrinsic, \ 4355 TypeModifier } 4356 4357 static const NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = { 4358 NEONMAP2(vabd_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 4359 NEONMAP2(vabdq_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 4360 NEONMAP1(vabs_v, arm_neon_vabs, 0), 4361 NEONMAP1(vabsq_v, arm_neon_vabs, 0), 4362 NEONMAP0(vaddhn_v), 4363 NEONMAP1(vaesdq_v, arm_neon_aesd, 0), 4364 NEONMAP1(vaeseq_v, arm_neon_aese, 0), 4365 NEONMAP1(vaesimcq_v, arm_neon_aesimc, 0), 4366 NEONMAP1(vaesmcq_v, arm_neon_aesmc, 0), 4367 NEONMAP1(vbsl_v, arm_neon_vbsl, AddRetType), 4368 NEONMAP1(vbslq_v, arm_neon_vbsl, AddRetType), 4369 NEONMAP1(vcage_v, arm_neon_vacge, 0), 4370 NEONMAP1(vcageq_v, arm_neon_vacge, 0), 4371 NEONMAP1(vcagt_v, arm_neon_vacgt, 0), 4372 NEONMAP1(vcagtq_v, arm_neon_vacgt, 0), 4373 NEONMAP1(vcale_v, arm_neon_vacge, 0), 4374 NEONMAP1(vcaleq_v, arm_neon_vacge, 0), 4375 NEONMAP1(vcalt_v, arm_neon_vacgt, 0), 4376 NEONMAP1(vcaltq_v, arm_neon_vacgt, 0), 4377 NEONMAP0(vceqz_v), 4378 NEONMAP0(vceqzq_v), 4379 NEONMAP0(vcgez_v), 4380 NEONMAP0(vcgezq_v), 4381 NEONMAP0(vcgtz_v), 4382 NEONMAP0(vcgtzq_v), 4383 NEONMAP0(vclez_v), 4384 NEONMAP0(vclezq_v), 4385 NEONMAP1(vcls_v, arm_neon_vcls, Add1ArgType), 4386 NEONMAP1(vclsq_v, arm_neon_vcls, Add1ArgType), 4387 NEONMAP0(vcltz_v), 4388 NEONMAP0(vcltzq_v), 4389 NEONMAP1(vclz_v, ctlz, Add1ArgType), 4390 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 4391 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 4392 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 4393 NEONMAP1(vcvt_f16_f32, arm_neon_vcvtfp2hf, 0), 4394 NEONMAP0(vcvt_f16_v), 4395 NEONMAP1(vcvt_f32_f16, arm_neon_vcvthf2fp, 0), 4396 NEONMAP0(vcvt_f32_v), 4397 NEONMAP2(vcvt_n_f16_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 4398 NEONMAP2(vcvt_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 4399 NEONMAP1(vcvt_n_s16_v, arm_neon_vcvtfp2fxs, 0), 4400 NEONMAP1(vcvt_n_s32_v, arm_neon_vcvtfp2fxs, 0), 4401 NEONMAP1(vcvt_n_s64_v, arm_neon_vcvtfp2fxs, 0), 4402 NEONMAP1(vcvt_n_u16_v, arm_neon_vcvtfp2fxu, 0), 4403 NEONMAP1(vcvt_n_u32_v, arm_neon_vcvtfp2fxu, 0), 4404 NEONMAP1(vcvt_n_u64_v, arm_neon_vcvtfp2fxu, 0), 4405 NEONMAP0(vcvt_s16_v), 4406 NEONMAP0(vcvt_s32_v), 4407 NEONMAP0(vcvt_s64_v), 4408 NEONMAP0(vcvt_u16_v), 4409 NEONMAP0(vcvt_u32_v), 4410 NEONMAP0(vcvt_u64_v), 4411 NEONMAP1(vcvta_s16_v, arm_neon_vcvtas, 0), 4412 NEONMAP1(vcvta_s32_v, arm_neon_vcvtas, 0), 4413 NEONMAP1(vcvta_s64_v, arm_neon_vcvtas, 0), 4414 NEONMAP1(vcvta_u16_v, arm_neon_vcvtau, 0), 4415 NEONMAP1(vcvta_u32_v, arm_neon_vcvtau, 0), 4416 NEONMAP1(vcvta_u64_v, arm_neon_vcvtau, 0), 4417 NEONMAP1(vcvtaq_s16_v, arm_neon_vcvtas, 0), 4418 NEONMAP1(vcvtaq_s32_v, arm_neon_vcvtas, 0), 4419 NEONMAP1(vcvtaq_s64_v, arm_neon_vcvtas, 0), 4420 NEONMAP1(vcvtaq_u16_v, arm_neon_vcvtau, 0), 4421 NEONMAP1(vcvtaq_u32_v, arm_neon_vcvtau, 0), 4422 NEONMAP1(vcvtaq_u64_v, arm_neon_vcvtau, 0), 4423 NEONMAP1(vcvtm_s16_v, arm_neon_vcvtms, 0), 4424 NEONMAP1(vcvtm_s32_v, arm_neon_vcvtms, 0), 4425 NEONMAP1(vcvtm_s64_v, arm_neon_vcvtms, 0), 4426 NEONMAP1(vcvtm_u16_v, arm_neon_vcvtmu, 0), 4427 NEONMAP1(vcvtm_u32_v, arm_neon_vcvtmu, 0), 4428 NEONMAP1(vcvtm_u64_v, arm_neon_vcvtmu, 0), 4429 NEONMAP1(vcvtmq_s16_v, arm_neon_vcvtms, 0), 4430 NEONMAP1(vcvtmq_s32_v, arm_neon_vcvtms, 0), 4431 NEONMAP1(vcvtmq_s64_v, arm_neon_vcvtms, 0), 4432 NEONMAP1(vcvtmq_u16_v, arm_neon_vcvtmu, 0), 4433 NEONMAP1(vcvtmq_u32_v, arm_neon_vcvtmu, 0), 4434 NEONMAP1(vcvtmq_u64_v, arm_neon_vcvtmu, 0), 4435 NEONMAP1(vcvtn_s16_v, arm_neon_vcvtns, 0), 4436 NEONMAP1(vcvtn_s32_v, arm_neon_vcvtns, 0), 4437 NEONMAP1(vcvtn_s64_v, arm_neon_vcvtns, 0), 4438 NEONMAP1(vcvtn_u16_v, arm_neon_vcvtnu, 0), 4439 NEONMAP1(vcvtn_u32_v, arm_neon_vcvtnu, 0), 4440 NEONMAP1(vcvtn_u64_v, arm_neon_vcvtnu, 0), 4441 NEONMAP1(vcvtnq_s16_v, arm_neon_vcvtns, 0), 4442 NEONMAP1(vcvtnq_s32_v, arm_neon_vcvtns, 0), 4443 NEONMAP1(vcvtnq_s64_v, arm_neon_vcvtns, 0), 4444 NEONMAP1(vcvtnq_u16_v, arm_neon_vcvtnu, 0), 4445 NEONMAP1(vcvtnq_u32_v, arm_neon_vcvtnu, 0), 4446 NEONMAP1(vcvtnq_u64_v, arm_neon_vcvtnu, 0), 4447 NEONMAP1(vcvtp_s16_v, arm_neon_vcvtps, 0), 4448 NEONMAP1(vcvtp_s32_v, arm_neon_vcvtps, 0), 4449 NEONMAP1(vcvtp_s64_v, arm_neon_vcvtps, 0), 4450 NEONMAP1(vcvtp_u16_v, arm_neon_vcvtpu, 0), 4451 NEONMAP1(vcvtp_u32_v, arm_neon_vcvtpu, 0), 4452 NEONMAP1(vcvtp_u64_v, arm_neon_vcvtpu, 0), 4453 NEONMAP1(vcvtpq_s16_v, arm_neon_vcvtps, 0), 4454 NEONMAP1(vcvtpq_s32_v, arm_neon_vcvtps, 0), 4455 NEONMAP1(vcvtpq_s64_v, arm_neon_vcvtps, 0), 4456 NEONMAP1(vcvtpq_u16_v, arm_neon_vcvtpu, 0), 4457 NEONMAP1(vcvtpq_u32_v, arm_neon_vcvtpu, 0), 4458 NEONMAP1(vcvtpq_u64_v, arm_neon_vcvtpu, 0), 4459 NEONMAP0(vcvtq_f16_v), 4460 NEONMAP0(vcvtq_f32_v), 4461 NEONMAP2(vcvtq_n_f16_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 4462 NEONMAP2(vcvtq_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 4463 NEONMAP1(vcvtq_n_s16_v, arm_neon_vcvtfp2fxs, 0), 4464 NEONMAP1(vcvtq_n_s32_v, arm_neon_vcvtfp2fxs, 0), 4465 NEONMAP1(vcvtq_n_s64_v, arm_neon_vcvtfp2fxs, 0), 4466 NEONMAP1(vcvtq_n_u16_v, arm_neon_vcvtfp2fxu, 0), 4467 NEONMAP1(vcvtq_n_u32_v, arm_neon_vcvtfp2fxu, 0), 4468 NEONMAP1(vcvtq_n_u64_v, arm_neon_vcvtfp2fxu, 0), 4469 NEONMAP0(vcvtq_s16_v), 4470 NEONMAP0(vcvtq_s32_v), 4471 NEONMAP0(vcvtq_s64_v), 4472 NEONMAP0(vcvtq_u16_v), 4473 NEONMAP0(vcvtq_u32_v), 4474 NEONMAP0(vcvtq_u64_v), 4475 NEONMAP2(vdot_v, arm_neon_udot, arm_neon_sdot, 0), 4476 NEONMAP2(vdotq_v, arm_neon_udot, arm_neon_sdot, 0), 4477 NEONMAP0(vext_v), 4478 NEONMAP0(vextq_v), 4479 NEONMAP0(vfma_v), 4480 NEONMAP0(vfmaq_v), 4481 NEONMAP2(vhadd_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 4482 NEONMAP2(vhaddq_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 4483 NEONMAP2(vhsub_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 4484 NEONMAP2(vhsubq_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 4485 NEONMAP0(vld1_dup_v), 4486 NEONMAP1(vld1_v, arm_neon_vld1, 0), 4487 NEONMAP1(vld1_x2_v, arm_neon_vld1x2, 0), 4488 NEONMAP1(vld1_x3_v, arm_neon_vld1x3, 0), 4489 NEONMAP1(vld1_x4_v, arm_neon_vld1x4, 0), 4490 NEONMAP0(vld1q_dup_v), 4491 NEONMAP1(vld1q_v, arm_neon_vld1, 0), 4492 NEONMAP1(vld1q_x2_v, arm_neon_vld1x2, 0), 4493 NEONMAP1(vld1q_x3_v, arm_neon_vld1x3, 0), 4494 NEONMAP1(vld1q_x4_v, arm_neon_vld1x4, 0), 4495 NEONMAP1(vld2_dup_v, arm_neon_vld2dup, 0), 4496 NEONMAP1(vld2_lane_v, arm_neon_vld2lane, 0), 4497 NEONMAP1(vld2_v, arm_neon_vld2, 0), 4498 NEONMAP1(vld2q_dup_v, arm_neon_vld2dup, 0), 4499 NEONMAP1(vld2q_lane_v, arm_neon_vld2lane, 0), 4500 NEONMAP1(vld2q_v, arm_neon_vld2, 0), 4501 NEONMAP1(vld3_dup_v, arm_neon_vld3dup, 0), 4502 NEONMAP1(vld3_lane_v, arm_neon_vld3lane, 0), 4503 NEONMAP1(vld3_v, arm_neon_vld3, 0), 4504 NEONMAP1(vld3q_dup_v, arm_neon_vld3dup, 0), 4505 NEONMAP1(vld3q_lane_v, arm_neon_vld3lane, 0), 4506 NEONMAP1(vld3q_v, arm_neon_vld3, 0), 4507 NEONMAP1(vld4_dup_v, arm_neon_vld4dup, 0), 4508 NEONMAP1(vld4_lane_v, arm_neon_vld4lane, 0), 4509 NEONMAP1(vld4_v, arm_neon_vld4, 0), 4510 NEONMAP1(vld4q_dup_v, arm_neon_vld4dup, 0), 4511 NEONMAP1(vld4q_lane_v, arm_neon_vld4lane, 0), 4512 NEONMAP1(vld4q_v, arm_neon_vld4, 0), 4513 NEONMAP2(vmax_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 4514 NEONMAP1(vmaxnm_v, arm_neon_vmaxnm, Add1ArgType), 4515 NEONMAP1(vmaxnmq_v, arm_neon_vmaxnm, Add1ArgType), 4516 NEONMAP2(vmaxq_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 4517 NEONMAP2(vmin_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 4518 NEONMAP1(vminnm_v, arm_neon_vminnm, Add1ArgType), 4519 NEONMAP1(vminnmq_v, arm_neon_vminnm, Add1ArgType), 4520 NEONMAP2(vminq_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 4521 NEONMAP0(vmovl_v), 4522 NEONMAP0(vmovn_v), 4523 NEONMAP1(vmul_v, arm_neon_vmulp, Add1ArgType), 4524 NEONMAP0(vmull_v), 4525 NEONMAP1(vmulq_v, arm_neon_vmulp, Add1ArgType), 4526 NEONMAP2(vpadal_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 4527 NEONMAP2(vpadalq_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 4528 NEONMAP1(vpadd_v, arm_neon_vpadd, Add1ArgType), 4529 NEONMAP2(vpaddl_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 4530 NEONMAP2(vpaddlq_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 4531 NEONMAP1(vpaddq_v, arm_neon_vpadd, Add1ArgType), 4532 NEONMAP2(vpmax_v, arm_neon_vpmaxu, arm_neon_vpmaxs, Add1ArgType | UnsignedAlts), 4533 NEONMAP2(vpmin_v, arm_neon_vpminu, arm_neon_vpmins, Add1ArgType | UnsignedAlts), 4534 NEONMAP1(vqabs_v, arm_neon_vqabs, Add1ArgType), 4535 NEONMAP1(vqabsq_v, arm_neon_vqabs, Add1ArgType), 4536 NEONMAP2(vqadd_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 4537 NEONMAP2(vqaddq_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 4538 NEONMAP2(vqdmlal_v, arm_neon_vqdmull, arm_neon_vqadds, 0), 4539 NEONMAP2(vqdmlsl_v, arm_neon_vqdmull, arm_neon_vqsubs, 0), 4540 NEONMAP1(vqdmulh_v, arm_neon_vqdmulh, Add1ArgType), 4541 NEONMAP1(vqdmulhq_v, arm_neon_vqdmulh, Add1ArgType), 4542 NEONMAP1(vqdmull_v, arm_neon_vqdmull, Add1ArgType), 4543 NEONMAP2(vqmovn_v, arm_neon_vqmovnu, arm_neon_vqmovns, Add1ArgType | UnsignedAlts), 4544 NEONMAP1(vqmovun_v, arm_neon_vqmovnsu, Add1ArgType), 4545 NEONMAP1(vqneg_v, arm_neon_vqneg, Add1ArgType), 4546 NEONMAP1(vqnegq_v, arm_neon_vqneg, Add1ArgType), 4547 NEONMAP1(vqrdmulh_v, arm_neon_vqrdmulh, Add1ArgType), 4548 NEONMAP1(vqrdmulhq_v, arm_neon_vqrdmulh, Add1ArgType), 4549 NEONMAP2(vqrshl_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 4550 NEONMAP2(vqrshlq_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 4551 NEONMAP2(vqshl_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 4552 NEONMAP2(vqshl_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 4553 NEONMAP2(vqshlq_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 4554 NEONMAP2(vqshlq_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 4555 NEONMAP1(vqshlu_n_v, arm_neon_vqshiftsu, 0), 4556 NEONMAP1(vqshluq_n_v, arm_neon_vqshiftsu, 0), 4557 NEONMAP2(vqsub_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 4558 NEONMAP2(vqsubq_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 4559 NEONMAP1(vraddhn_v, arm_neon_vraddhn, Add1ArgType), 4560 NEONMAP2(vrecpe_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 4561 NEONMAP2(vrecpeq_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 4562 NEONMAP1(vrecps_v, arm_neon_vrecps, Add1ArgType), 4563 NEONMAP1(vrecpsq_v, arm_neon_vrecps, Add1ArgType), 4564 NEONMAP2(vrhadd_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 4565 NEONMAP2(vrhaddq_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 4566 NEONMAP1(vrnd_v, arm_neon_vrintz, Add1ArgType), 4567 NEONMAP1(vrnda_v, arm_neon_vrinta, Add1ArgType), 4568 NEONMAP1(vrndaq_v, arm_neon_vrinta, Add1ArgType), 4569 NEONMAP0(vrndi_v), 4570 NEONMAP0(vrndiq_v), 4571 NEONMAP1(vrndm_v, arm_neon_vrintm, Add1ArgType), 4572 NEONMAP1(vrndmq_v, arm_neon_vrintm, Add1ArgType), 4573 NEONMAP1(vrndn_v, arm_neon_vrintn, Add1ArgType), 4574 NEONMAP1(vrndnq_v, arm_neon_vrintn, Add1ArgType), 4575 NEONMAP1(vrndp_v, arm_neon_vrintp, Add1ArgType), 4576 NEONMAP1(vrndpq_v, arm_neon_vrintp, Add1ArgType), 4577 NEONMAP1(vrndq_v, arm_neon_vrintz, Add1ArgType), 4578 NEONMAP1(vrndx_v, arm_neon_vrintx, Add1ArgType), 4579 NEONMAP1(vrndxq_v, arm_neon_vrintx, Add1ArgType), 4580 NEONMAP2(vrshl_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 4581 NEONMAP2(vrshlq_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 4582 NEONMAP2(vrshr_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 4583 NEONMAP2(vrshrq_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 4584 NEONMAP2(vrsqrte_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 4585 NEONMAP2(vrsqrteq_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 4586 NEONMAP1(vrsqrts_v, arm_neon_vrsqrts, Add1ArgType), 4587 NEONMAP1(vrsqrtsq_v, arm_neon_vrsqrts, Add1ArgType), 4588 NEONMAP1(vrsubhn_v, arm_neon_vrsubhn, Add1ArgType), 4589 NEONMAP1(vsha1su0q_v, arm_neon_sha1su0, 0), 4590 NEONMAP1(vsha1su1q_v, arm_neon_sha1su1, 0), 4591 NEONMAP1(vsha256h2q_v, arm_neon_sha256h2, 0), 4592 NEONMAP1(vsha256hq_v, arm_neon_sha256h, 0), 4593 NEONMAP1(vsha256su0q_v, arm_neon_sha256su0, 0), 4594 NEONMAP1(vsha256su1q_v, arm_neon_sha256su1, 0), 4595 NEONMAP0(vshl_n_v), 4596 NEONMAP2(vshl_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 4597 NEONMAP0(vshll_n_v), 4598 NEONMAP0(vshlq_n_v), 4599 NEONMAP2(vshlq_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 4600 NEONMAP0(vshr_n_v), 4601 NEONMAP0(vshrn_n_v), 4602 NEONMAP0(vshrq_n_v), 4603 NEONMAP1(vst1_v, arm_neon_vst1, 0), 4604 NEONMAP1(vst1_x2_v, arm_neon_vst1x2, 0), 4605 NEONMAP1(vst1_x3_v, arm_neon_vst1x3, 0), 4606 NEONMAP1(vst1_x4_v, arm_neon_vst1x4, 0), 4607 NEONMAP1(vst1q_v, arm_neon_vst1, 0), 4608 NEONMAP1(vst1q_x2_v, arm_neon_vst1x2, 0), 4609 NEONMAP1(vst1q_x3_v, arm_neon_vst1x3, 0), 4610 NEONMAP1(vst1q_x4_v, arm_neon_vst1x4, 0), 4611 NEONMAP1(vst2_lane_v, arm_neon_vst2lane, 0), 4612 NEONMAP1(vst2_v, arm_neon_vst2, 0), 4613 NEONMAP1(vst2q_lane_v, arm_neon_vst2lane, 0), 4614 NEONMAP1(vst2q_v, arm_neon_vst2, 0), 4615 NEONMAP1(vst3_lane_v, arm_neon_vst3lane, 0), 4616 NEONMAP1(vst3_v, arm_neon_vst3, 0), 4617 NEONMAP1(vst3q_lane_v, arm_neon_vst3lane, 0), 4618 NEONMAP1(vst3q_v, arm_neon_vst3, 0), 4619 NEONMAP1(vst4_lane_v, arm_neon_vst4lane, 0), 4620 NEONMAP1(vst4_v, arm_neon_vst4, 0), 4621 NEONMAP1(vst4q_lane_v, arm_neon_vst4lane, 0), 4622 NEONMAP1(vst4q_v, arm_neon_vst4, 0), 4623 NEONMAP0(vsubhn_v), 4624 NEONMAP0(vtrn_v), 4625 NEONMAP0(vtrnq_v), 4626 NEONMAP0(vtst_v), 4627 NEONMAP0(vtstq_v), 4628 NEONMAP0(vuzp_v), 4629 NEONMAP0(vuzpq_v), 4630 NEONMAP0(vzip_v), 4631 NEONMAP0(vzipq_v) 4632 }; 4633 4634 static const NeonIntrinsicInfo AArch64SIMDIntrinsicMap[] = { 4635 NEONMAP1(vabs_v, aarch64_neon_abs, 0), 4636 NEONMAP1(vabsq_v, aarch64_neon_abs, 0), 4637 NEONMAP0(vaddhn_v), 4638 NEONMAP1(vaesdq_v, aarch64_crypto_aesd, 0), 4639 NEONMAP1(vaeseq_v, aarch64_crypto_aese, 0), 4640 NEONMAP1(vaesimcq_v, aarch64_crypto_aesimc, 0), 4641 NEONMAP1(vaesmcq_v, aarch64_crypto_aesmc, 0), 4642 NEONMAP1(vcage_v, aarch64_neon_facge, 0), 4643 NEONMAP1(vcageq_v, aarch64_neon_facge, 0), 4644 NEONMAP1(vcagt_v, aarch64_neon_facgt, 0), 4645 NEONMAP1(vcagtq_v, aarch64_neon_facgt, 0), 4646 NEONMAP1(vcale_v, aarch64_neon_facge, 0), 4647 NEONMAP1(vcaleq_v, aarch64_neon_facge, 0), 4648 NEONMAP1(vcalt_v, aarch64_neon_facgt, 0), 4649 NEONMAP1(vcaltq_v, aarch64_neon_facgt, 0), 4650 NEONMAP0(vceqz_v), 4651 NEONMAP0(vceqzq_v), 4652 NEONMAP0(vcgez_v), 4653 NEONMAP0(vcgezq_v), 4654 NEONMAP0(vcgtz_v), 4655 NEONMAP0(vcgtzq_v), 4656 NEONMAP0(vclez_v), 4657 NEONMAP0(vclezq_v), 4658 NEONMAP1(vcls_v, aarch64_neon_cls, Add1ArgType), 4659 NEONMAP1(vclsq_v, aarch64_neon_cls, Add1ArgType), 4660 NEONMAP0(vcltz_v), 4661 NEONMAP0(vcltzq_v), 4662 NEONMAP1(vclz_v, ctlz, Add1ArgType), 4663 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 4664 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 4665 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 4666 NEONMAP1(vcvt_f16_f32, aarch64_neon_vcvtfp2hf, 0), 4667 NEONMAP0(vcvt_f16_v), 4668 NEONMAP1(vcvt_f32_f16, aarch64_neon_vcvthf2fp, 0), 4669 NEONMAP0(vcvt_f32_v), 4670 NEONMAP2(vcvt_n_f16_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4671 NEONMAP2(vcvt_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4672 NEONMAP2(vcvt_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4673 NEONMAP1(vcvt_n_s16_v, aarch64_neon_vcvtfp2fxs, 0), 4674 NEONMAP1(vcvt_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 4675 NEONMAP1(vcvt_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 4676 NEONMAP1(vcvt_n_u16_v, aarch64_neon_vcvtfp2fxu, 0), 4677 NEONMAP1(vcvt_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 4678 NEONMAP1(vcvt_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 4679 NEONMAP0(vcvtq_f16_v), 4680 NEONMAP0(vcvtq_f32_v), 4681 NEONMAP2(vcvtq_n_f16_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4682 NEONMAP2(vcvtq_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4683 NEONMAP2(vcvtq_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 4684 NEONMAP1(vcvtq_n_s16_v, aarch64_neon_vcvtfp2fxs, 0), 4685 NEONMAP1(vcvtq_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 4686 NEONMAP1(vcvtq_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 4687 NEONMAP1(vcvtq_n_u16_v, aarch64_neon_vcvtfp2fxu, 0), 4688 NEONMAP1(vcvtq_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 4689 NEONMAP1(vcvtq_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 4690 NEONMAP1(vcvtx_f32_v, aarch64_neon_fcvtxn, AddRetType | Add1ArgType), 4691 NEONMAP2(vdot_v, aarch64_neon_udot, aarch64_neon_sdot, 0), 4692 NEONMAP2(vdotq_v, aarch64_neon_udot, aarch64_neon_sdot, 0), 4693 NEONMAP0(vext_v), 4694 NEONMAP0(vextq_v), 4695 NEONMAP0(vfma_v), 4696 NEONMAP0(vfmaq_v), 4697 NEONMAP1(vfmlal_high_v, aarch64_neon_fmlal2, 0), 4698 NEONMAP1(vfmlal_low_v, aarch64_neon_fmlal, 0), 4699 NEONMAP1(vfmlalq_high_v, aarch64_neon_fmlal2, 0), 4700 NEONMAP1(vfmlalq_low_v, aarch64_neon_fmlal, 0), 4701 NEONMAP1(vfmlsl_high_v, aarch64_neon_fmlsl2, 0), 4702 NEONMAP1(vfmlsl_low_v, aarch64_neon_fmlsl, 0), 4703 NEONMAP1(vfmlslq_high_v, aarch64_neon_fmlsl2, 0), 4704 NEONMAP1(vfmlslq_low_v, aarch64_neon_fmlsl, 0), 4705 NEONMAP2(vhadd_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 4706 NEONMAP2(vhaddq_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 4707 NEONMAP2(vhsub_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 4708 NEONMAP2(vhsubq_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 4709 NEONMAP1(vld1_x2_v, aarch64_neon_ld1x2, 0), 4710 NEONMAP1(vld1_x3_v, aarch64_neon_ld1x3, 0), 4711 NEONMAP1(vld1_x4_v, aarch64_neon_ld1x4, 0), 4712 NEONMAP1(vld1q_x2_v, aarch64_neon_ld1x2, 0), 4713 NEONMAP1(vld1q_x3_v, aarch64_neon_ld1x3, 0), 4714 NEONMAP1(vld1q_x4_v, aarch64_neon_ld1x4, 0), 4715 NEONMAP0(vmovl_v), 4716 NEONMAP0(vmovn_v), 4717 NEONMAP1(vmul_v, aarch64_neon_pmul, Add1ArgType), 4718 NEONMAP1(vmulq_v, aarch64_neon_pmul, Add1ArgType), 4719 NEONMAP1(vpadd_v, aarch64_neon_addp, Add1ArgType), 4720 NEONMAP2(vpaddl_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 4721 NEONMAP2(vpaddlq_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 4722 NEONMAP1(vpaddq_v, aarch64_neon_addp, Add1ArgType), 4723 NEONMAP1(vqabs_v, aarch64_neon_sqabs, Add1ArgType), 4724 NEONMAP1(vqabsq_v, aarch64_neon_sqabs, Add1ArgType), 4725 NEONMAP2(vqadd_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 4726 NEONMAP2(vqaddq_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 4727 NEONMAP2(vqdmlal_v, aarch64_neon_sqdmull, aarch64_neon_sqadd, 0), 4728 NEONMAP2(vqdmlsl_v, aarch64_neon_sqdmull, aarch64_neon_sqsub, 0), 4729 NEONMAP1(vqdmulh_v, aarch64_neon_sqdmulh, Add1ArgType), 4730 NEONMAP1(vqdmulhq_v, aarch64_neon_sqdmulh, Add1ArgType), 4731 NEONMAP1(vqdmull_v, aarch64_neon_sqdmull, Add1ArgType), 4732 NEONMAP2(vqmovn_v, aarch64_neon_uqxtn, aarch64_neon_sqxtn, Add1ArgType | UnsignedAlts), 4733 NEONMAP1(vqmovun_v, aarch64_neon_sqxtun, Add1ArgType), 4734 NEONMAP1(vqneg_v, aarch64_neon_sqneg, Add1ArgType), 4735 NEONMAP1(vqnegq_v, aarch64_neon_sqneg, Add1ArgType), 4736 NEONMAP1(vqrdmulh_v, aarch64_neon_sqrdmulh, Add1ArgType), 4737 NEONMAP1(vqrdmulhq_v, aarch64_neon_sqrdmulh, Add1ArgType), 4738 NEONMAP2(vqrshl_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 4739 NEONMAP2(vqrshlq_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 4740 NEONMAP2(vqshl_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl, UnsignedAlts), 4741 NEONMAP2(vqshl_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 4742 NEONMAP2(vqshlq_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl,UnsignedAlts), 4743 NEONMAP2(vqshlq_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 4744 NEONMAP1(vqshlu_n_v, aarch64_neon_sqshlu, 0), 4745 NEONMAP1(vqshluq_n_v, aarch64_neon_sqshlu, 0), 4746 NEONMAP2(vqsub_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 4747 NEONMAP2(vqsubq_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 4748 NEONMAP1(vraddhn_v, aarch64_neon_raddhn, Add1ArgType), 4749 NEONMAP2(vrecpe_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 4750 NEONMAP2(vrecpeq_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 4751 NEONMAP1(vrecps_v, aarch64_neon_frecps, Add1ArgType), 4752 NEONMAP1(vrecpsq_v, aarch64_neon_frecps, Add1ArgType), 4753 NEONMAP2(vrhadd_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 4754 NEONMAP2(vrhaddq_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 4755 NEONMAP0(vrndi_v), 4756 NEONMAP0(vrndiq_v), 4757 NEONMAP2(vrshl_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 4758 NEONMAP2(vrshlq_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 4759 NEONMAP2(vrshr_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 4760 NEONMAP2(vrshrq_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 4761 NEONMAP2(vrsqrte_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 4762 NEONMAP2(vrsqrteq_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 4763 NEONMAP1(vrsqrts_v, aarch64_neon_frsqrts, Add1ArgType), 4764 NEONMAP1(vrsqrtsq_v, aarch64_neon_frsqrts, Add1ArgType), 4765 NEONMAP1(vrsubhn_v, aarch64_neon_rsubhn, Add1ArgType), 4766 NEONMAP1(vsha1su0q_v, aarch64_crypto_sha1su0, 0), 4767 NEONMAP1(vsha1su1q_v, aarch64_crypto_sha1su1, 0), 4768 NEONMAP1(vsha256h2q_v, aarch64_crypto_sha256h2, 0), 4769 NEONMAP1(vsha256hq_v, aarch64_crypto_sha256h, 0), 4770 NEONMAP1(vsha256su0q_v, aarch64_crypto_sha256su0, 0), 4771 NEONMAP1(vsha256su1q_v, aarch64_crypto_sha256su1, 0), 4772 NEONMAP0(vshl_n_v), 4773 NEONMAP2(vshl_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 4774 NEONMAP0(vshll_n_v), 4775 NEONMAP0(vshlq_n_v), 4776 NEONMAP2(vshlq_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 4777 NEONMAP0(vshr_n_v), 4778 NEONMAP0(vshrn_n_v), 4779 NEONMAP0(vshrq_n_v), 4780 NEONMAP1(vst1_x2_v, aarch64_neon_st1x2, 0), 4781 NEONMAP1(vst1_x3_v, aarch64_neon_st1x3, 0), 4782 NEONMAP1(vst1_x4_v, aarch64_neon_st1x4, 0), 4783 NEONMAP1(vst1q_x2_v, aarch64_neon_st1x2, 0), 4784 NEONMAP1(vst1q_x3_v, aarch64_neon_st1x3, 0), 4785 NEONMAP1(vst1q_x4_v, aarch64_neon_st1x4, 0), 4786 NEONMAP0(vsubhn_v), 4787 NEONMAP0(vtst_v), 4788 NEONMAP0(vtstq_v), 4789 }; 4790 4791 static const NeonIntrinsicInfo AArch64SISDIntrinsicMap[] = { 4792 NEONMAP1(vabdd_f64, aarch64_sisd_fabd, Add1ArgType), 4793 NEONMAP1(vabds_f32, aarch64_sisd_fabd, Add1ArgType), 4794 NEONMAP1(vabsd_s64, aarch64_neon_abs, Add1ArgType), 4795 NEONMAP1(vaddlv_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 4796 NEONMAP1(vaddlv_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 4797 NEONMAP1(vaddlvq_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 4798 NEONMAP1(vaddlvq_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 4799 NEONMAP1(vaddv_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 4800 NEONMAP1(vaddv_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 4801 NEONMAP1(vaddv_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4802 NEONMAP1(vaddvq_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 4803 NEONMAP1(vaddvq_f64, aarch64_neon_faddv, AddRetType | Add1ArgType), 4804 NEONMAP1(vaddvq_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 4805 NEONMAP1(vaddvq_s64, aarch64_neon_saddv, AddRetType | Add1ArgType), 4806 NEONMAP1(vaddvq_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4807 NEONMAP1(vaddvq_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4808 NEONMAP1(vcaged_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 4809 NEONMAP1(vcages_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 4810 NEONMAP1(vcagtd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 4811 NEONMAP1(vcagts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 4812 NEONMAP1(vcaled_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 4813 NEONMAP1(vcales_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 4814 NEONMAP1(vcaltd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 4815 NEONMAP1(vcalts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 4816 NEONMAP1(vcvtad_s64_f64, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 4817 NEONMAP1(vcvtad_u64_f64, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 4818 NEONMAP1(vcvtas_s32_f32, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 4819 NEONMAP1(vcvtas_u32_f32, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 4820 NEONMAP1(vcvtd_n_f64_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 4821 NEONMAP1(vcvtd_n_f64_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 4822 NEONMAP1(vcvtd_n_s64_f64, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 4823 NEONMAP1(vcvtd_n_u64_f64, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 4824 NEONMAP1(vcvtmd_s64_f64, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 4825 NEONMAP1(vcvtmd_u64_f64, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 4826 NEONMAP1(vcvtms_s32_f32, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 4827 NEONMAP1(vcvtms_u32_f32, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 4828 NEONMAP1(vcvtnd_s64_f64, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 4829 NEONMAP1(vcvtnd_u64_f64, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 4830 NEONMAP1(vcvtns_s32_f32, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 4831 NEONMAP1(vcvtns_u32_f32, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 4832 NEONMAP1(vcvtpd_s64_f64, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 4833 NEONMAP1(vcvtpd_u64_f64, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 4834 NEONMAP1(vcvtps_s32_f32, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 4835 NEONMAP1(vcvtps_u32_f32, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 4836 NEONMAP1(vcvts_n_f32_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 4837 NEONMAP1(vcvts_n_f32_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 4838 NEONMAP1(vcvts_n_s32_f32, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 4839 NEONMAP1(vcvts_n_u32_f32, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 4840 NEONMAP1(vcvtxd_f32_f64, aarch64_sisd_fcvtxn, 0), 4841 NEONMAP1(vmaxnmv_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4842 NEONMAP1(vmaxnmvq_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4843 NEONMAP1(vmaxnmvq_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4844 NEONMAP1(vmaxv_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4845 NEONMAP1(vmaxv_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 4846 NEONMAP1(vmaxv_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 4847 NEONMAP1(vmaxvq_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4848 NEONMAP1(vmaxvq_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4849 NEONMAP1(vmaxvq_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 4850 NEONMAP1(vmaxvq_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 4851 NEONMAP1(vminnmv_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4852 NEONMAP1(vminnmvq_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4853 NEONMAP1(vminnmvq_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4854 NEONMAP1(vminv_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 4855 NEONMAP1(vminv_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 4856 NEONMAP1(vminv_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 4857 NEONMAP1(vminvq_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 4858 NEONMAP1(vminvq_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 4859 NEONMAP1(vminvq_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 4860 NEONMAP1(vminvq_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 4861 NEONMAP1(vmull_p64, aarch64_neon_pmull64, 0), 4862 NEONMAP1(vmulxd_f64, aarch64_neon_fmulx, Add1ArgType), 4863 NEONMAP1(vmulxs_f32, aarch64_neon_fmulx, Add1ArgType), 4864 NEONMAP1(vpaddd_s64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4865 NEONMAP1(vpaddd_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 4866 NEONMAP1(vpmaxnmqd_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4867 NEONMAP1(vpmaxnms_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 4868 NEONMAP1(vpmaxqd_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4869 NEONMAP1(vpmaxs_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 4870 NEONMAP1(vpminnmqd_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4871 NEONMAP1(vpminnms_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 4872 NEONMAP1(vpminqd_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 4873 NEONMAP1(vpmins_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 4874 NEONMAP1(vqabsb_s8, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 4875 NEONMAP1(vqabsd_s64, aarch64_neon_sqabs, Add1ArgType), 4876 NEONMAP1(vqabsh_s16, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 4877 NEONMAP1(vqabss_s32, aarch64_neon_sqabs, Add1ArgType), 4878 NEONMAP1(vqaddb_s8, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 4879 NEONMAP1(vqaddb_u8, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 4880 NEONMAP1(vqaddd_s64, aarch64_neon_sqadd, Add1ArgType), 4881 NEONMAP1(vqaddd_u64, aarch64_neon_uqadd, Add1ArgType), 4882 NEONMAP1(vqaddh_s16, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 4883 NEONMAP1(vqaddh_u16, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 4884 NEONMAP1(vqadds_s32, aarch64_neon_sqadd, Add1ArgType), 4885 NEONMAP1(vqadds_u32, aarch64_neon_uqadd, Add1ArgType), 4886 NEONMAP1(vqdmulhh_s16, aarch64_neon_sqdmulh, Vectorize1ArgType | Use64BitVectors), 4887 NEONMAP1(vqdmulhs_s32, aarch64_neon_sqdmulh, Add1ArgType), 4888 NEONMAP1(vqdmullh_s16, aarch64_neon_sqdmull, VectorRet | Use128BitVectors), 4889 NEONMAP1(vqdmulls_s32, aarch64_neon_sqdmulls_scalar, 0), 4890 NEONMAP1(vqmovnd_s64, aarch64_neon_scalar_sqxtn, AddRetType | Add1ArgType), 4891 NEONMAP1(vqmovnd_u64, aarch64_neon_scalar_uqxtn, AddRetType | Add1ArgType), 4892 NEONMAP1(vqmovnh_s16, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 4893 NEONMAP1(vqmovnh_u16, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 4894 NEONMAP1(vqmovns_s32, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 4895 NEONMAP1(vqmovns_u32, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 4896 NEONMAP1(vqmovund_s64, aarch64_neon_scalar_sqxtun, AddRetType | Add1ArgType), 4897 NEONMAP1(vqmovunh_s16, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 4898 NEONMAP1(vqmovuns_s32, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 4899 NEONMAP1(vqnegb_s8, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 4900 NEONMAP1(vqnegd_s64, aarch64_neon_sqneg, Add1ArgType), 4901 NEONMAP1(vqnegh_s16, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 4902 NEONMAP1(vqnegs_s32, aarch64_neon_sqneg, Add1ArgType), 4903 NEONMAP1(vqrdmulhh_s16, aarch64_neon_sqrdmulh, Vectorize1ArgType | Use64BitVectors), 4904 NEONMAP1(vqrdmulhs_s32, aarch64_neon_sqrdmulh, Add1ArgType), 4905 NEONMAP1(vqrshlb_s8, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 4906 NEONMAP1(vqrshlb_u8, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 4907 NEONMAP1(vqrshld_s64, aarch64_neon_sqrshl, Add1ArgType), 4908 NEONMAP1(vqrshld_u64, aarch64_neon_uqrshl, Add1ArgType), 4909 NEONMAP1(vqrshlh_s16, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 4910 NEONMAP1(vqrshlh_u16, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 4911 NEONMAP1(vqrshls_s32, aarch64_neon_sqrshl, Add1ArgType), 4912 NEONMAP1(vqrshls_u32, aarch64_neon_uqrshl, Add1ArgType), 4913 NEONMAP1(vqrshrnd_n_s64, aarch64_neon_sqrshrn, AddRetType), 4914 NEONMAP1(vqrshrnd_n_u64, aarch64_neon_uqrshrn, AddRetType), 4915 NEONMAP1(vqrshrnh_n_s16, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 4916 NEONMAP1(vqrshrnh_n_u16, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 4917 NEONMAP1(vqrshrns_n_s32, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 4918 NEONMAP1(vqrshrns_n_u32, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 4919 NEONMAP1(vqrshrund_n_s64, aarch64_neon_sqrshrun, AddRetType), 4920 NEONMAP1(vqrshrunh_n_s16, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 4921 NEONMAP1(vqrshruns_n_s32, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 4922 NEONMAP1(vqshlb_n_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4923 NEONMAP1(vqshlb_n_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4924 NEONMAP1(vqshlb_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4925 NEONMAP1(vqshlb_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4926 NEONMAP1(vqshld_s64, aarch64_neon_sqshl, Add1ArgType), 4927 NEONMAP1(vqshld_u64, aarch64_neon_uqshl, Add1ArgType), 4928 NEONMAP1(vqshlh_n_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4929 NEONMAP1(vqshlh_n_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4930 NEONMAP1(vqshlh_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 4931 NEONMAP1(vqshlh_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 4932 NEONMAP1(vqshls_n_s32, aarch64_neon_sqshl, Add1ArgType), 4933 NEONMAP1(vqshls_n_u32, aarch64_neon_uqshl, Add1ArgType), 4934 NEONMAP1(vqshls_s32, aarch64_neon_sqshl, Add1ArgType), 4935 NEONMAP1(vqshls_u32, aarch64_neon_uqshl, Add1ArgType), 4936 NEONMAP1(vqshlub_n_s8, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 4937 NEONMAP1(vqshluh_n_s16, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 4938 NEONMAP1(vqshlus_n_s32, aarch64_neon_sqshlu, Add1ArgType), 4939 NEONMAP1(vqshrnd_n_s64, aarch64_neon_sqshrn, AddRetType), 4940 NEONMAP1(vqshrnd_n_u64, aarch64_neon_uqshrn, AddRetType), 4941 NEONMAP1(vqshrnh_n_s16, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 4942 NEONMAP1(vqshrnh_n_u16, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 4943 NEONMAP1(vqshrns_n_s32, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 4944 NEONMAP1(vqshrns_n_u32, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 4945 NEONMAP1(vqshrund_n_s64, aarch64_neon_sqshrun, AddRetType), 4946 NEONMAP1(vqshrunh_n_s16, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 4947 NEONMAP1(vqshruns_n_s32, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 4948 NEONMAP1(vqsubb_s8, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 4949 NEONMAP1(vqsubb_u8, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 4950 NEONMAP1(vqsubd_s64, aarch64_neon_sqsub, Add1ArgType), 4951 NEONMAP1(vqsubd_u64, aarch64_neon_uqsub, Add1ArgType), 4952 NEONMAP1(vqsubh_s16, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 4953 NEONMAP1(vqsubh_u16, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 4954 NEONMAP1(vqsubs_s32, aarch64_neon_sqsub, Add1ArgType), 4955 NEONMAP1(vqsubs_u32, aarch64_neon_uqsub, Add1ArgType), 4956 NEONMAP1(vrecped_f64, aarch64_neon_frecpe, Add1ArgType), 4957 NEONMAP1(vrecpes_f32, aarch64_neon_frecpe, Add1ArgType), 4958 NEONMAP1(vrecpxd_f64, aarch64_neon_frecpx, Add1ArgType), 4959 NEONMAP1(vrecpxs_f32, aarch64_neon_frecpx, Add1ArgType), 4960 NEONMAP1(vrshld_s64, aarch64_neon_srshl, Add1ArgType), 4961 NEONMAP1(vrshld_u64, aarch64_neon_urshl, Add1ArgType), 4962 NEONMAP1(vrsqrted_f64, aarch64_neon_frsqrte, Add1ArgType), 4963 NEONMAP1(vrsqrtes_f32, aarch64_neon_frsqrte, Add1ArgType), 4964 NEONMAP1(vrsqrtsd_f64, aarch64_neon_frsqrts, Add1ArgType), 4965 NEONMAP1(vrsqrtss_f32, aarch64_neon_frsqrts, Add1ArgType), 4966 NEONMAP1(vsha1cq_u32, aarch64_crypto_sha1c, 0), 4967 NEONMAP1(vsha1h_u32, aarch64_crypto_sha1h, 0), 4968 NEONMAP1(vsha1mq_u32, aarch64_crypto_sha1m, 0), 4969 NEONMAP1(vsha1pq_u32, aarch64_crypto_sha1p, 0), 4970 NEONMAP1(vshld_s64, aarch64_neon_sshl, Add1ArgType), 4971 NEONMAP1(vshld_u64, aarch64_neon_ushl, Add1ArgType), 4972 NEONMAP1(vslid_n_s64, aarch64_neon_vsli, Vectorize1ArgType), 4973 NEONMAP1(vslid_n_u64, aarch64_neon_vsli, Vectorize1ArgType), 4974 NEONMAP1(vsqaddb_u8, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 4975 NEONMAP1(vsqaddd_u64, aarch64_neon_usqadd, Add1ArgType), 4976 NEONMAP1(vsqaddh_u16, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 4977 NEONMAP1(vsqadds_u32, aarch64_neon_usqadd, Add1ArgType), 4978 NEONMAP1(vsrid_n_s64, aarch64_neon_vsri, Vectorize1ArgType), 4979 NEONMAP1(vsrid_n_u64, aarch64_neon_vsri, Vectorize1ArgType), 4980 NEONMAP1(vuqaddb_s8, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 4981 NEONMAP1(vuqaddd_s64, aarch64_neon_suqadd, Add1ArgType), 4982 NEONMAP1(vuqaddh_s16, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 4983 NEONMAP1(vuqadds_s32, aarch64_neon_suqadd, Add1ArgType), 4984 // FP16 scalar intrinisics go here. 4985 NEONMAP1(vabdh_f16, aarch64_sisd_fabd, Add1ArgType), 4986 NEONMAP1(vcvtah_s32_f16, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 4987 NEONMAP1(vcvtah_s64_f16, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 4988 NEONMAP1(vcvtah_u32_f16, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 4989 NEONMAP1(vcvtah_u64_f16, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 4990 NEONMAP1(vcvth_n_f16_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 4991 NEONMAP1(vcvth_n_f16_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 4992 NEONMAP1(vcvth_n_f16_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 4993 NEONMAP1(vcvth_n_f16_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 4994 NEONMAP1(vcvth_n_s32_f16, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 4995 NEONMAP1(vcvth_n_s64_f16, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 4996 NEONMAP1(vcvth_n_u32_f16, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 4997 NEONMAP1(vcvth_n_u64_f16, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 4998 NEONMAP1(vcvtmh_s32_f16, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 4999 NEONMAP1(vcvtmh_s64_f16, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 5000 NEONMAP1(vcvtmh_u32_f16, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 5001 NEONMAP1(vcvtmh_u64_f16, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 5002 NEONMAP1(vcvtnh_s32_f16, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 5003 NEONMAP1(vcvtnh_s64_f16, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 5004 NEONMAP1(vcvtnh_u32_f16, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 5005 NEONMAP1(vcvtnh_u64_f16, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 5006 NEONMAP1(vcvtph_s32_f16, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 5007 NEONMAP1(vcvtph_s64_f16, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 5008 NEONMAP1(vcvtph_u32_f16, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 5009 NEONMAP1(vcvtph_u64_f16, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 5010 NEONMAP1(vmulxh_f16, aarch64_neon_fmulx, Add1ArgType), 5011 NEONMAP1(vrecpeh_f16, aarch64_neon_frecpe, Add1ArgType), 5012 NEONMAP1(vrecpxh_f16, aarch64_neon_frecpx, Add1ArgType), 5013 NEONMAP1(vrsqrteh_f16, aarch64_neon_frsqrte, Add1ArgType), 5014 NEONMAP1(vrsqrtsh_f16, aarch64_neon_frsqrts, Add1ArgType), 5015 }; 5016 5017 #undef NEONMAP0 5018 #undef NEONMAP1 5019 #undef NEONMAP2 5020 5021 static bool NEONSIMDIntrinsicsProvenSorted = false; 5022 5023 static bool AArch64SIMDIntrinsicsProvenSorted = false; 5024 static bool AArch64SISDIntrinsicsProvenSorted = false; 5025 5026 5027 static const NeonIntrinsicInfo * 5028 findNeonIntrinsicInMap(ArrayRef<NeonIntrinsicInfo> IntrinsicMap, 5029 unsigned BuiltinID, bool &MapProvenSorted) { 5030 5031 #ifndef NDEBUG 5032 if (!MapProvenSorted) { 5033 assert(std::is_sorted(std::begin(IntrinsicMap), std::end(IntrinsicMap))); 5034 MapProvenSorted = true; 5035 } 5036 #endif 5037 5038 const NeonIntrinsicInfo *Builtin = 5039 std::lower_bound(IntrinsicMap.begin(), IntrinsicMap.end(), BuiltinID); 5040 5041 if (Builtin != IntrinsicMap.end() && Builtin->BuiltinID == BuiltinID) 5042 return Builtin; 5043 5044 return nullptr; 5045 } 5046 5047 Function *CodeGenFunction::LookupNeonLLVMIntrinsic(unsigned IntrinsicID, 5048 unsigned Modifier, 5049 llvm::Type *ArgType, 5050 const CallExpr *E) { 5051 int VectorSize = 0; 5052 if (Modifier & Use64BitVectors) 5053 VectorSize = 64; 5054 else if (Modifier & Use128BitVectors) 5055 VectorSize = 128; 5056 5057 // Return type. 5058 SmallVector<llvm::Type *, 3> Tys; 5059 if (Modifier & AddRetType) { 5060 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 5061 if (Modifier & VectorizeRetType) 5062 Ty = llvm::VectorType::get( 5063 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); 5064 5065 Tys.push_back(Ty); 5066 } 5067 5068 // Arguments. 5069 if (Modifier & VectorizeArgTypes) { 5070 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; 5071 ArgType = llvm::VectorType::get(ArgType, Elts); 5072 } 5073 5074 if (Modifier & (Add1ArgType | Add2ArgTypes)) 5075 Tys.push_back(ArgType); 5076 5077 if (Modifier & Add2ArgTypes) 5078 Tys.push_back(ArgType); 5079 5080 if (Modifier & InventFloatType) 5081 Tys.push_back(FloatTy); 5082 5083 return CGM.getIntrinsic(IntrinsicID, Tys); 5084 } 5085 5086 static Value *EmitCommonNeonSISDBuiltinExpr(CodeGenFunction &CGF, 5087 const NeonIntrinsicInfo &SISDInfo, 5088 SmallVectorImpl<Value *> &Ops, 5089 const CallExpr *E) { 5090 unsigned BuiltinID = SISDInfo.BuiltinID; 5091 unsigned int Int = SISDInfo.LLVMIntrinsic; 5092 unsigned Modifier = SISDInfo.TypeModifier; 5093 const char *s = SISDInfo.NameHint; 5094 5095 switch (BuiltinID) { 5096 case NEON::BI__builtin_neon_vcled_s64: 5097 case NEON::BI__builtin_neon_vcled_u64: 5098 case NEON::BI__builtin_neon_vcles_f32: 5099 case NEON::BI__builtin_neon_vcled_f64: 5100 case NEON::BI__builtin_neon_vcltd_s64: 5101 case NEON::BI__builtin_neon_vcltd_u64: 5102 case NEON::BI__builtin_neon_vclts_f32: 5103 case NEON::BI__builtin_neon_vcltd_f64: 5104 case NEON::BI__builtin_neon_vcales_f32: 5105 case NEON::BI__builtin_neon_vcaled_f64: 5106 case NEON::BI__builtin_neon_vcalts_f32: 5107 case NEON::BI__builtin_neon_vcaltd_f64: 5108 // Only one direction of comparisons actually exist, cmle is actually a cmge 5109 // with swapped operands. The table gives us the right intrinsic but we 5110 // still need to do the swap. 5111 std::swap(Ops[0], Ops[1]); 5112 break; 5113 } 5114 5115 assert(Int && "Generic code assumes a valid intrinsic"); 5116 5117 // Determine the type(s) of this overloaded AArch64 intrinsic. 5118 const Expr *Arg = E->getArg(0); 5119 llvm::Type *ArgTy = CGF.ConvertType(Arg->getType()); 5120 Function *F = CGF.LookupNeonLLVMIntrinsic(Int, Modifier, ArgTy, E); 5121 5122 int j = 0; 5123 ConstantInt *C0 = ConstantInt::get(CGF.SizeTy, 0); 5124 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 5125 ai != ae; ++ai, ++j) { 5126 llvm::Type *ArgTy = ai->getType(); 5127 if (Ops[j]->getType()->getPrimitiveSizeInBits() == 5128 ArgTy->getPrimitiveSizeInBits()) 5129 continue; 5130 5131 assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy()); 5132 // The constant argument to an _n_ intrinsic always has Int32Ty, so truncate 5133 // it before inserting. 5134 Ops[j] = 5135 CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType()); 5136 Ops[j] = 5137 CGF.Builder.CreateInsertElement(UndefValue::get(ArgTy), Ops[j], C0); 5138 } 5139 5140 Value *Result = CGF.EmitNeonCall(F, Ops, s); 5141 llvm::Type *ResultType = CGF.ConvertType(E->getType()); 5142 if (ResultType->getPrimitiveSizeInBits() < 5143 Result->getType()->getPrimitiveSizeInBits()) 5144 return CGF.Builder.CreateExtractElement(Result, C0); 5145 5146 return CGF.Builder.CreateBitCast(Result, ResultType, s); 5147 } 5148 5149 Value *CodeGenFunction::EmitCommonNeonBuiltinExpr( 5150 unsigned BuiltinID, unsigned LLVMIntrinsic, unsigned AltLLVMIntrinsic, 5151 const char *NameHint, unsigned Modifier, const CallExpr *E, 5152 SmallVectorImpl<llvm::Value *> &Ops, Address PtrOp0, Address PtrOp1, 5153 llvm::Triple::ArchType Arch) { 5154 // Get the last argument, which specifies the vector type. 5155 llvm::APSInt NeonTypeConst; 5156 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 5157 if (!Arg->isIntegerConstantExpr(NeonTypeConst, getContext())) 5158 return nullptr; 5159 5160 // Determine the type of this overloaded NEON intrinsic. 5161 NeonTypeFlags Type(NeonTypeConst.getZExtValue()); 5162 bool Usgn = Type.isUnsigned(); 5163 bool Quad = Type.isQuad(); 5164 const bool HasLegalHalfType = getTarget().hasLegalHalfType(); 5165 5166 llvm::VectorType *VTy = GetNeonType(this, Type, HasLegalHalfType); 5167 llvm::Type *Ty = VTy; 5168 if (!Ty) 5169 return nullptr; 5170 5171 auto getAlignmentValue32 = [&](Address addr) -> Value* { 5172 return Builder.getInt32(addr.getAlignment().getQuantity()); 5173 }; 5174 5175 unsigned Int = LLVMIntrinsic; 5176 if ((Modifier & UnsignedAlts) && !Usgn) 5177 Int = AltLLVMIntrinsic; 5178 5179 switch (BuiltinID) { 5180 default: break; 5181 case NEON::BI__builtin_neon_vabs_v: 5182 case NEON::BI__builtin_neon_vabsq_v: 5183 if (VTy->getElementType()->isFloatingPointTy()) 5184 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, Ty), Ops, "vabs"); 5185 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), Ops, "vabs"); 5186 case NEON::BI__builtin_neon_vaddhn_v: { 5187 llvm::VectorType *SrcTy = 5188 llvm::VectorType::getExtendedElementVectorType(VTy); 5189 5190 // %sum = add <4 x i32> %lhs, %rhs 5191 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 5192 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 5193 Ops[0] = Builder.CreateAdd(Ops[0], Ops[1], "vaddhn"); 5194 5195 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 5196 Constant *ShiftAmt = 5197 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 5198 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vaddhn"); 5199 5200 // %res = trunc <4 x i32> %high to <4 x i16> 5201 return Builder.CreateTrunc(Ops[0], VTy, "vaddhn"); 5202 } 5203 case NEON::BI__builtin_neon_vcale_v: 5204 case NEON::BI__builtin_neon_vcaleq_v: 5205 case NEON::BI__builtin_neon_vcalt_v: 5206 case NEON::BI__builtin_neon_vcaltq_v: 5207 std::swap(Ops[0], Ops[1]); 5208 LLVM_FALLTHROUGH; 5209 case NEON::BI__builtin_neon_vcage_v: 5210 case NEON::BI__builtin_neon_vcageq_v: 5211 case NEON::BI__builtin_neon_vcagt_v: 5212 case NEON::BI__builtin_neon_vcagtq_v: { 5213 llvm::Type *Ty; 5214 switch (VTy->getScalarSizeInBits()) { 5215 default: llvm_unreachable("unexpected type"); 5216 case 32: 5217 Ty = FloatTy; 5218 break; 5219 case 64: 5220 Ty = DoubleTy; 5221 break; 5222 case 16: 5223 Ty = HalfTy; 5224 break; 5225 } 5226 llvm::Type *VecFlt = llvm::VectorType::get(Ty, VTy->getNumElements()); 5227 llvm::Type *Tys[] = { VTy, VecFlt }; 5228 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 5229 return EmitNeonCall(F, Ops, NameHint); 5230 } 5231 case NEON::BI__builtin_neon_vceqz_v: 5232 case NEON::BI__builtin_neon_vceqzq_v: 5233 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OEQ, 5234 ICmpInst::ICMP_EQ, "vceqz"); 5235 case NEON::BI__builtin_neon_vcgez_v: 5236 case NEON::BI__builtin_neon_vcgezq_v: 5237 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGE, 5238 ICmpInst::ICMP_SGE, "vcgez"); 5239 case NEON::BI__builtin_neon_vclez_v: 5240 case NEON::BI__builtin_neon_vclezq_v: 5241 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLE, 5242 ICmpInst::ICMP_SLE, "vclez"); 5243 case NEON::BI__builtin_neon_vcgtz_v: 5244 case NEON::BI__builtin_neon_vcgtzq_v: 5245 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGT, 5246 ICmpInst::ICMP_SGT, "vcgtz"); 5247 case NEON::BI__builtin_neon_vcltz_v: 5248 case NEON::BI__builtin_neon_vcltzq_v: 5249 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLT, 5250 ICmpInst::ICMP_SLT, "vcltz"); 5251 case NEON::BI__builtin_neon_vclz_v: 5252 case NEON::BI__builtin_neon_vclzq_v: 5253 // We generate target-independent intrinsic, which needs a second argument 5254 // for whether or not clz of zero is undefined; on ARM it isn't. 5255 Ops.push_back(Builder.getInt1(getTarget().isCLZForZeroUndef())); 5256 break; 5257 case NEON::BI__builtin_neon_vcvt_f32_v: 5258 case NEON::BI__builtin_neon_vcvtq_f32_v: 5259 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5260 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, Quad), 5261 HasLegalHalfType); 5262 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 5263 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 5264 case NEON::BI__builtin_neon_vcvt_f16_v: 5265 case NEON::BI__builtin_neon_vcvtq_f16_v: 5266 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5267 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float16, false, Quad), 5268 HasLegalHalfType); 5269 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 5270 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 5271 case NEON::BI__builtin_neon_vcvt_n_f16_v: 5272 case NEON::BI__builtin_neon_vcvt_n_f32_v: 5273 case NEON::BI__builtin_neon_vcvt_n_f64_v: 5274 case NEON::BI__builtin_neon_vcvtq_n_f16_v: 5275 case NEON::BI__builtin_neon_vcvtq_n_f32_v: 5276 case NEON::BI__builtin_neon_vcvtq_n_f64_v: { 5277 llvm::Type *Tys[2] = { GetFloatNeonType(this, Type), Ty }; 5278 Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic; 5279 Function *F = CGM.getIntrinsic(Int, Tys); 5280 return EmitNeonCall(F, Ops, "vcvt_n"); 5281 } 5282 case NEON::BI__builtin_neon_vcvt_n_s16_v: 5283 case NEON::BI__builtin_neon_vcvt_n_s32_v: 5284 case NEON::BI__builtin_neon_vcvt_n_u16_v: 5285 case NEON::BI__builtin_neon_vcvt_n_u32_v: 5286 case NEON::BI__builtin_neon_vcvt_n_s64_v: 5287 case NEON::BI__builtin_neon_vcvt_n_u64_v: 5288 case NEON::BI__builtin_neon_vcvtq_n_s16_v: 5289 case NEON::BI__builtin_neon_vcvtq_n_s32_v: 5290 case NEON::BI__builtin_neon_vcvtq_n_u16_v: 5291 case NEON::BI__builtin_neon_vcvtq_n_u32_v: 5292 case NEON::BI__builtin_neon_vcvtq_n_s64_v: 5293 case NEON::BI__builtin_neon_vcvtq_n_u64_v: { 5294 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5295 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 5296 return EmitNeonCall(F, Ops, "vcvt_n"); 5297 } 5298 case NEON::BI__builtin_neon_vcvt_s32_v: 5299 case NEON::BI__builtin_neon_vcvt_u32_v: 5300 case NEON::BI__builtin_neon_vcvt_s64_v: 5301 case NEON::BI__builtin_neon_vcvt_u64_v: 5302 case NEON::BI__builtin_neon_vcvt_s16_v: 5303 case NEON::BI__builtin_neon_vcvt_u16_v: 5304 case NEON::BI__builtin_neon_vcvtq_s32_v: 5305 case NEON::BI__builtin_neon_vcvtq_u32_v: 5306 case NEON::BI__builtin_neon_vcvtq_s64_v: 5307 case NEON::BI__builtin_neon_vcvtq_u64_v: 5308 case NEON::BI__builtin_neon_vcvtq_s16_v: 5309 case NEON::BI__builtin_neon_vcvtq_u16_v: { 5310 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 5311 return Usgn ? Builder.CreateFPToUI(Ops[0], Ty, "vcvt") 5312 : Builder.CreateFPToSI(Ops[0], Ty, "vcvt"); 5313 } 5314 case NEON::BI__builtin_neon_vcvta_s16_v: 5315 case NEON::BI__builtin_neon_vcvta_s32_v: 5316 case NEON::BI__builtin_neon_vcvta_s64_v: 5317 case NEON::BI__builtin_neon_vcvta_u16_v: 5318 case NEON::BI__builtin_neon_vcvta_u32_v: 5319 case NEON::BI__builtin_neon_vcvta_u64_v: 5320 case NEON::BI__builtin_neon_vcvtaq_s16_v: 5321 case NEON::BI__builtin_neon_vcvtaq_s32_v: 5322 case NEON::BI__builtin_neon_vcvtaq_s64_v: 5323 case NEON::BI__builtin_neon_vcvtaq_u16_v: 5324 case NEON::BI__builtin_neon_vcvtaq_u32_v: 5325 case NEON::BI__builtin_neon_vcvtaq_u64_v: 5326 case NEON::BI__builtin_neon_vcvtn_s16_v: 5327 case NEON::BI__builtin_neon_vcvtn_s32_v: 5328 case NEON::BI__builtin_neon_vcvtn_s64_v: 5329 case NEON::BI__builtin_neon_vcvtn_u16_v: 5330 case NEON::BI__builtin_neon_vcvtn_u32_v: 5331 case NEON::BI__builtin_neon_vcvtn_u64_v: 5332 case NEON::BI__builtin_neon_vcvtnq_s16_v: 5333 case NEON::BI__builtin_neon_vcvtnq_s32_v: 5334 case NEON::BI__builtin_neon_vcvtnq_s64_v: 5335 case NEON::BI__builtin_neon_vcvtnq_u16_v: 5336 case NEON::BI__builtin_neon_vcvtnq_u32_v: 5337 case NEON::BI__builtin_neon_vcvtnq_u64_v: 5338 case NEON::BI__builtin_neon_vcvtp_s16_v: 5339 case NEON::BI__builtin_neon_vcvtp_s32_v: 5340 case NEON::BI__builtin_neon_vcvtp_s64_v: 5341 case NEON::BI__builtin_neon_vcvtp_u16_v: 5342 case NEON::BI__builtin_neon_vcvtp_u32_v: 5343 case NEON::BI__builtin_neon_vcvtp_u64_v: 5344 case NEON::BI__builtin_neon_vcvtpq_s16_v: 5345 case NEON::BI__builtin_neon_vcvtpq_s32_v: 5346 case NEON::BI__builtin_neon_vcvtpq_s64_v: 5347 case NEON::BI__builtin_neon_vcvtpq_u16_v: 5348 case NEON::BI__builtin_neon_vcvtpq_u32_v: 5349 case NEON::BI__builtin_neon_vcvtpq_u64_v: 5350 case NEON::BI__builtin_neon_vcvtm_s16_v: 5351 case NEON::BI__builtin_neon_vcvtm_s32_v: 5352 case NEON::BI__builtin_neon_vcvtm_s64_v: 5353 case NEON::BI__builtin_neon_vcvtm_u16_v: 5354 case NEON::BI__builtin_neon_vcvtm_u32_v: 5355 case NEON::BI__builtin_neon_vcvtm_u64_v: 5356 case NEON::BI__builtin_neon_vcvtmq_s16_v: 5357 case NEON::BI__builtin_neon_vcvtmq_s32_v: 5358 case NEON::BI__builtin_neon_vcvtmq_s64_v: 5359 case NEON::BI__builtin_neon_vcvtmq_u16_v: 5360 case NEON::BI__builtin_neon_vcvtmq_u32_v: 5361 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 5362 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5363 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, NameHint); 5364 } 5365 case NEON::BI__builtin_neon_vext_v: 5366 case NEON::BI__builtin_neon_vextq_v: { 5367 int CV = cast<ConstantInt>(Ops[2])->getSExtValue(); 5368 SmallVector<uint32_t, 16> Indices; 5369 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 5370 Indices.push_back(i+CV); 5371 5372 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5373 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5374 return Builder.CreateShuffleVector(Ops[0], Ops[1], Indices, "vext"); 5375 } 5376 case NEON::BI__builtin_neon_vfma_v: 5377 case NEON::BI__builtin_neon_vfmaq_v: { 5378 Function *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5379 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5380 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5381 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5382 5383 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 5384 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 5385 } 5386 case NEON::BI__builtin_neon_vld1_v: 5387 case NEON::BI__builtin_neon_vld1q_v: { 5388 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 5389 Ops.push_back(getAlignmentValue32(PtrOp0)); 5390 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, "vld1"); 5391 } 5392 case NEON::BI__builtin_neon_vld1_x2_v: 5393 case NEON::BI__builtin_neon_vld1q_x2_v: 5394 case NEON::BI__builtin_neon_vld1_x3_v: 5395 case NEON::BI__builtin_neon_vld1q_x3_v: 5396 case NEON::BI__builtin_neon_vld1_x4_v: 5397 case NEON::BI__builtin_neon_vld1q_x4_v: { 5398 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 5399 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5400 llvm::Type *Tys[2] = { VTy, PTy }; 5401 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 5402 Ops[1] = Builder.CreateCall(F, Ops[1], "vld1xN"); 5403 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5404 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5405 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5406 } 5407 case NEON::BI__builtin_neon_vld2_v: 5408 case NEON::BI__builtin_neon_vld2q_v: 5409 case NEON::BI__builtin_neon_vld3_v: 5410 case NEON::BI__builtin_neon_vld3q_v: 5411 case NEON::BI__builtin_neon_vld4_v: 5412 case NEON::BI__builtin_neon_vld4q_v: 5413 case NEON::BI__builtin_neon_vld2_dup_v: 5414 case NEON::BI__builtin_neon_vld2q_dup_v: 5415 case NEON::BI__builtin_neon_vld3_dup_v: 5416 case NEON::BI__builtin_neon_vld3q_dup_v: 5417 case NEON::BI__builtin_neon_vld4_dup_v: 5418 case NEON::BI__builtin_neon_vld4q_dup_v: { 5419 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 5420 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 5421 Value *Align = getAlignmentValue32(PtrOp1); 5422 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint); 5423 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5424 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5425 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5426 } 5427 case NEON::BI__builtin_neon_vld1_dup_v: 5428 case NEON::BI__builtin_neon_vld1q_dup_v: { 5429 Value *V = UndefValue::get(Ty); 5430 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 5431 PtrOp0 = Builder.CreateBitCast(PtrOp0, Ty); 5432 LoadInst *Ld = Builder.CreateLoad(PtrOp0); 5433 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 5434 Ops[0] = Builder.CreateInsertElement(V, Ld, CI); 5435 return EmitNeonSplat(Ops[0], CI); 5436 } 5437 case NEON::BI__builtin_neon_vld2_lane_v: 5438 case NEON::BI__builtin_neon_vld2q_lane_v: 5439 case NEON::BI__builtin_neon_vld3_lane_v: 5440 case NEON::BI__builtin_neon_vld3q_lane_v: 5441 case NEON::BI__builtin_neon_vld4_lane_v: 5442 case NEON::BI__builtin_neon_vld4q_lane_v: { 5443 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 5444 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 5445 for (unsigned I = 2; I < Ops.size() - 1; ++I) 5446 Ops[I] = Builder.CreateBitCast(Ops[I], Ty); 5447 Ops.push_back(getAlignmentValue32(PtrOp1)); 5448 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), NameHint); 5449 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5450 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5451 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5452 } 5453 case NEON::BI__builtin_neon_vmovl_v: { 5454 llvm::Type *DTy =llvm::VectorType::getTruncatedElementVectorType(VTy); 5455 Ops[0] = Builder.CreateBitCast(Ops[0], DTy); 5456 if (Usgn) 5457 return Builder.CreateZExt(Ops[0], Ty, "vmovl"); 5458 return Builder.CreateSExt(Ops[0], Ty, "vmovl"); 5459 } 5460 case NEON::BI__builtin_neon_vmovn_v: { 5461 llvm::Type *QTy = llvm::VectorType::getExtendedElementVectorType(VTy); 5462 Ops[0] = Builder.CreateBitCast(Ops[0], QTy); 5463 return Builder.CreateTrunc(Ops[0], Ty, "vmovn"); 5464 } 5465 case NEON::BI__builtin_neon_vmull_v: 5466 // FIXME: the integer vmull operations could be emitted in terms of pure 5467 // LLVM IR (2 exts followed by a mul). Unfortunately LLVM has a habit of 5468 // hoisting the exts outside loops. Until global ISel comes along that can 5469 // see through such movement this leads to bad CodeGen. So we need an 5470 // intrinsic for now. 5471 Int = Usgn ? Intrinsic::arm_neon_vmullu : Intrinsic::arm_neon_vmulls; 5472 Int = Type.isPoly() ? (unsigned)Intrinsic::arm_neon_vmullp : Int; 5473 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 5474 case NEON::BI__builtin_neon_vpadal_v: 5475 case NEON::BI__builtin_neon_vpadalq_v: { 5476 // The source operand type has twice as many elements of half the size. 5477 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 5478 llvm::Type *EltTy = 5479 llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 5480 llvm::Type *NarrowTy = 5481 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 5482 llvm::Type *Tys[2] = { Ty, NarrowTy }; 5483 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, NameHint); 5484 } 5485 case NEON::BI__builtin_neon_vpaddl_v: 5486 case NEON::BI__builtin_neon_vpaddlq_v: { 5487 // The source operand type has twice as many elements of half the size. 5488 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 5489 llvm::Type *EltTy = llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 5490 llvm::Type *NarrowTy = 5491 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 5492 llvm::Type *Tys[2] = { Ty, NarrowTy }; 5493 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vpaddl"); 5494 } 5495 case NEON::BI__builtin_neon_vqdmlal_v: 5496 case NEON::BI__builtin_neon_vqdmlsl_v: { 5497 SmallVector<Value *, 2> MulOps(Ops.begin() + 1, Ops.end()); 5498 Ops[1] = 5499 EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), MulOps, "vqdmlal"); 5500 Ops.resize(2); 5501 return EmitNeonCall(CGM.getIntrinsic(AltLLVMIntrinsic, Ty), Ops, NameHint); 5502 } 5503 case NEON::BI__builtin_neon_vqshl_n_v: 5504 case NEON::BI__builtin_neon_vqshlq_n_v: 5505 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshl_n", 5506 1, false); 5507 case NEON::BI__builtin_neon_vqshlu_n_v: 5508 case NEON::BI__builtin_neon_vqshluq_n_v: 5509 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshlu_n", 5510 1, false); 5511 case NEON::BI__builtin_neon_vrecpe_v: 5512 case NEON::BI__builtin_neon_vrecpeq_v: 5513 case NEON::BI__builtin_neon_vrsqrte_v: 5514 case NEON::BI__builtin_neon_vrsqrteq_v: 5515 Int = Ty->isFPOrFPVectorTy() ? LLVMIntrinsic : AltLLVMIntrinsic; 5516 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint); 5517 case NEON::BI__builtin_neon_vrndi_v: 5518 case NEON::BI__builtin_neon_vrndiq_v: 5519 Int = Intrinsic::nearbyint; 5520 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint); 5521 case NEON::BI__builtin_neon_vrshr_n_v: 5522 case NEON::BI__builtin_neon_vrshrq_n_v: 5523 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n", 5524 1, true); 5525 case NEON::BI__builtin_neon_vshl_n_v: 5526 case NEON::BI__builtin_neon_vshlq_n_v: 5527 Ops[1] = EmitNeonShiftVector(Ops[1], Ty, false); 5528 return Builder.CreateShl(Builder.CreateBitCast(Ops[0],Ty), Ops[1], 5529 "vshl_n"); 5530 case NEON::BI__builtin_neon_vshll_n_v: { 5531 llvm::Type *SrcTy = llvm::VectorType::getTruncatedElementVectorType(VTy); 5532 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 5533 if (Usgn) 5534 Ops[0] = Builder.CreateZExt(Ops[0], VTy); 5535 else 5536 Ops[0] = Builder.CreateSExt(Ops[0], VTy); 5537 Ops[1] = EmitNeonShiftVector(Ops[1], VTy, false); 5538 return Builder.CreateShl(Ops[0], Ops[1], "vshll_n"); 5539 } 5540 case NEON::BI__builtin_neon_vshrn_n_v: { 5541 llvm::Type *SrcTy = llvm::VectorType::getExtendedElementVectorType(VTy); 5542 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 5543 Ops[1] = EmitNeonShiftVector(Ops[1], SrcTy, false); 5544 if (Usgn) 5545 Ops[0] = Builder.CreateLShr(Ops[0], Ops[1]); 5546 else 5547 Ops[0] = Builder.CreateAShr(Ops[0], Ops[1]); 5548 return Builder.CreateTrunc(Ops[0], Ty, "vshrn_n"); 5549 } 5550 case NEON::BI__builtin_neon_vshr_n_v: 5551 case NEON::BI__builtin_neon_vshrq_n_v: 5552 return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, Usgn, "vshr_n"); 5553 case NEON::BI__builtin_neon_vst1_v: 5554 case NEON::BI__builtin_neon_vst1q_v: 5555 case NEON::BI__builtin_neon_vst2_v: 5556 case NEON::BI__builtin_neon_vst2q_v: 5557 case NEON::BI__builtin_neon_vst3_v: 5558 case NEON::BI__builtin_neon_vst3q_v: 5559 case NEON::BI__builtin_neon_vst4_v: 5560 case NEON::BI__builtin_neon_vst4q_v: 5561 case NEON::BI__builtin_neon_vst2_lane_v: 5562 case NEON::BI__builtin_neon_vst2q_lane_v: 5563 case NEON::BI__builtin_neon_vst3_lane_v: 5564 case NEON::BI__builtin_neon_vst3q_lane_v: 5565 case NEON::BI__builtin_neon_vst4_lane_v: 5566 case NEON::BI__builtin_neon_vst4q_lane_v: { 5567 llvm::Type *Tys[] = {Int8PtrTy, Ty}; 5568 Ops.push_back(getAlignmentValue32(PtrOp0)); 5569 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 5570 } 5571 case NEON::BI__builtin_neon_vst1_x2_v: 5572 case NEON::BI__builtin_neon_vst1q_x2_v: 5573 case NEON::BI__builtin_neon_vst1_x3_v: 5574 case NEON::BI__builtin_neon_vst1q_x3_v: 5575 case NEON::BI__builtin_neon_vst1_x4_v: 5576 case NEON::BI__builtin_neon_vst1q_x4_v: { 5577 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 5578 // TODO: Currently in AArch32 mode the pointer operand comes first, whereas 5579 // in AArch64 it comes last. We may want to stick to one or another. 5580 if (Arch == llvm::Triple::aarch64 || Arch == llvm::Triple::aarch64_be) { 5581 llvm::Type *Tys[2] = { VTy, PTy }; 5582 std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end()); 5583 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, ""); 5584 } 5585 llvm::Type *Tys[2] = { PTy, VTy }; 5586 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, ""); 5587 } 5588 case NEON::BI__builtin_neon_vsubhn_v: { 5589 llvm::VectorType *SrcTy = 5590 llvm::VectorType::getExtendedElementVectorType(VTy); 5591 5592 // %sum = add <4 x i32> %lhs, %rhs 5593 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 5594 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 5595 Ops[0] = Builder.CreateSub(Ops[0], Ops[1], "vsubhn"); 5596 5597 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 5598 Constant *ShiftAmt = 5599 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 5600 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vsubhn"); 5601 5602 // %res = trunc <4 x i32> %high to <4 x i16> 5603 return Builder.CreateTrunc(Ops[0], VTy, "vsubhn"); 5604 } 5605 case NEON::BI__builtin_neon_vtrn_v: 5606 case NEON::BI__builtin_neon_vtrnq_v: { 5607 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 5608 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5609 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5610 Value *SV = nullptr; 5611 5612 for (unsigned vi = 0; vi != 2; ++vi) { 5613 SmallVector<uint32_t, 16> Indices; 5614 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 5615 Indices.push_back(i+vi); 5616 Indices.push_back(i+e+vi); 5617 } 5618 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 5619 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 5620 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 5621 } 5622 return SV; 5623 } 5624 case NEON::BI__builtin_neon_vtst_v: 5625 case NEON::BI__builtin_neon_vtstq_v: { 5626 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5627 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5628 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 5629 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 5630 ConstantAggregateZero::get(Ty)); 5631 return Builder.CreateSExt(Ops[0], Ty, "vtst"); 5632 } 5633 case NEON::BI__builtin_neon_vuzp_v: 5634 case NEON::BI__builtin_neon_vuzpq_v: { 5635 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 5636 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5637 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5638 Value *SV = nullptr; 5639 5640 for (unsigned vi = 0; vi != 2; ++vi) { 5641 SmallVector<uint32_t, 16> Indices; 5642 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 5643 Indices.push_back(2*i+vi); 5644 5645 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 5646 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 5647 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 5648 } 5649 return SV; 5650 } 5651 case NEON::BI__builtin_neon_vzip_v: 5652 case NEON::BI__builtin_neon_vzipq_v: { 5653 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 5654 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5655 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5656 Value *SV = nullptr; 5657 5658 for (unsigned vi = 0; vi != 2; ++vi) { 5659 SmallVector<uint32_t, 16> Indices; 5660 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 5661 Indices.push_back((i + vi*e) >> 1); 5662 Indices.push_back(((i + vi*e) >> 1)+e); 5663 } 5664 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 5665 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 5666 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 5667 } 5668 return SV; 5669 } 5670 case NEON::BI__builtin_neon_vdot_v: 5671 case NEON::BI__builtin_neon_vdotq_v: { 5672 llvm::Type *InputTy = 5673 llvm::VectorType::get(Int8Ty, Ty->getPrimitiveSizeInBits() / 8); 5674 llvm::Type *Tys[2] = { Ty, InputTy }; 5675 Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic; 5676 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vdot"); 5677 } 5678 case NEON::BI__builtin_neon_vfmlal_low_v: 5679 case NEON::BI__builtin_neon_vfmlalq_low_v: { 5680 llvm::Type *InputTy = 5681 llvm::VectorType::get(HalfTy, Ty->getPrimitiveSizeInBits() / 16); 5682 llvm::Type *Tys[2] = { Ty, InputTy }; 5683 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vfmlal_low"); 5684 } 5685 case NEON::BI__builtin_neon_vfmlsl_low_v: 5686 case NEON::BI__builtin_neon_vfmlslq_low_v: { 5687 llvm::Type *InputTy = 5688 llvm::VectorType::get(HalfTy, Ty->getPrimitiveSizeInBits() / 16); 5689 llvm::Type *Tys[2] = { Ty, InputTy }; 5690 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vfmlsl_low"); 5691 } 5692 case NEON::BI__builtin_neon_vfmlal_high_v: 5693 case NEON::BI__builtin_neon_vfmlalq_high_v: { 5694 llvm::Type *InputTy = 5695 llvm::VectorType::get(HalfTy, Ty->getPrimitiveSizeInBits() / 16); 5696 llvm::Type *Tys[2] = { Ty, InputTy }; 5697 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vfmlal_high"); 5698 } 5699 case NEON::BI__builtin_neon_vfmlsl_high_v: 5700 case NEON::BI__builtin_neon_vfmlslq_high_v: { 5701 llvm::Type *InputTy = 5702 llvm::VectorType::get(HalfTy, Ty->getPrimitiveSizeInBits() / 16); 5703 llvm::Type *Tys[2] = { Ty, InputTy }; 5704 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vfmlsl_high"); 5705 } 5706 } 5707 5708 assert(Int && "Expected valid intrinsic number"); 5709 5710 // Determine the type(s) of this overloaded AArch64 intrinsic. 5711 Function *F = LookupNeonLLVMIntrinsic(Int, Modifier, Ty, E); 5712 5713 Value *Result = EmitNeonCall(F, Ops, NameHint); 5714 llvm::Type *ResultType = ConvertType(E->getType()); 5715 // AArch64 intrinsic one-element vector type cast to 5716 // scalar type expected by the builtin 5717 return Builder.CreateBitCast(Result, ResultType, NameHint); 5718 } 5719 5720 Value *CodeGenFunction::EmitAArch64CompareBuiltinExpr( 5721 Value *Op, llvm::Type *Ty, const CmpInst::Predicate Fp, 5722 const CmpInst::Predicate Ip, const Twine &Name) { 5723 llvm::Type *OTy = Op->getType(); 5724 5725 // FIXME: this is utterly horrific. We should not be looking at previous 5726 // codegen context to find out what needs doing. Unfortunately TableGen 5727 // currently gives us exactly the same calls for vceqz_f32 and vceqz_s32 5728 // (etc). 5729 if (BitCastInst *BI = dyn_cast<BitCastInst>(Op)) 5730 OTy = BI->getOperand(0)->getType(); 5731 5732 Op = Builder.CreateBitCast(Op, OTy); 5733 if (OTy->getScalarType()->isFloatingPointTy()) { 5734 Op = Builder.CreateFCmp(Fp, Op, Constant::getNullValue(OTy)); 5735 } else { 5736 Op = Builder.CreateICmp(Ip, Op, Constant::getNullValue(OTy)); 5737 } 5738 return Builder.CreateSExt(Op, Ty, Name); 5739 } 5740 5741 static Value *packTBLDVectorList(CodeGenFunction &CGF, ArrayRef<Value *> Ops, 5742 Value *ExtOp, Value *IndexOp, 5743 llvm::Type *ResTy, unsigned IntID, 5744 const char *Name) { 5745 SmallVector<Value *, 2> TblOps; 5746 if (ExtOp) 5747 TblOps.push_back(ExtOp); 5748 5749 // Build a vector containing sequential number like (0, 1, 2, ..., 15) 5750 SmallVector<uint32_t, 16> Indices; 5751 llvm::VectorType *TblTy = cast<llvm::VectorType>(Ops[0]->getType()); 5752 for (unsigned i = 0, e = TblTy->getNumElements(); i != e; ++i) { 5753 Indices.push_back(2*i); 5754 Indices.push_back(2*i+1); 5755 } 5756 5757 int PairPos = 0, End = Ops.size() - 1; 5758 while (PairPos < End) { 5759 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 5760 Ops[PairPos+1], Indices, 5761 Name)); 5762 PairPos += 2; 5763 } 5764 5765 // If there's an odd number of 64-bit lookup table, fill the high 64-bit 5766 // of the 128-bit lookup table with zero. 5767 if (PairPos == End) { 5768 Value *ZeroTbl = ConstantAggregateZero::get(TblTy); 5769 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 5770 ZeroTbl, Indices, Name)); 5771 } 5772 5773 Function *TblF; 5774 TblOps.push_back(IndexOp); 5775 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); 5776 5777 return CGF.EmitNeonCall(TblF, TblOps, Name); 5778 } 5779 5780 Value *CodeGenFunction::GetValueForARMHint(unsigned BuiltinID) { 5781 unsigned Value; 5782 switch (BuiltinID) { 5783 default: 5784 return nullptr; 5785 case ARM::BI__builtin_arm_nop: 5786 Value = 0; 5787 break; 5788 case ARM::BI__builtin_arm_yield: 5789 case ARM::BI__yield: 5790 Value = 1; 5791 break; 5792 case ARM::BI__builtin_arm_wfe: 5793 case ARM::BI__wfe: 5794 Value = 2; 5795 break; 5796 case ARM::BI__builtin_arm_wfi: 5797 case ARM::BI__wfi: 5798 Value = 3; 5799 break; 5800 case ARM::BI__builtin_arm_sev: 5801 case ARM::BI__sev: 5802 Value = 4; 5803 break; 5804 case ARM::BI__builtin_arm_sevl: 5805 case ARM::BI__sevl: 5806 Value = 5; 5807 break; 5808 } 5809 5810 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_hint), 5811 llvm::ConstantInt::get(Int32Ty, Value)); 5812 } 5813 5814 // Generates the IR for the read/write special register builtin, 5815 // ValueType is the type of the value that is to be written or read, 5816 // RegisterType is the type of the register being written to or read from. 5817 static Value *EmitSpecialRegisterBuiltin(CodeGenFunction &CGF, 5818 const CallExpr *E, 5819 llvm::Type *RegisterType, 5820 llvm::Type *ValueType, 5821 bool IsRead, 5822 StringRef SysReg = "") { 5823 // write and register intrinsics only support 32 and 64 bit operations. 5824 assert((RegisterType->isIntegerTy(32) || RegisterType->isIntegerTy(64)) 5825 && "Unsupported size for register."); 5826 5827 CodeGen::CGBuilderTy &Builder = CGF.Builder; 5828 CodeGen::CodeGenModule &CGM = CGF.CGM; 5829 LLVMContext &Context = CGM.getLLVMContext(); 5830 5831 if (SysReg.empty()) { 5832 const Expr *SysRegStrExpr = E->getArg(0)->IgnoreParenCasts(); 5833 SysReg = cast<clang::StringLiteral>(SysRegStrExpr)->getString(); 5834 } 5835 5836 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysReg) }; 5837 llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); 5838 llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); 5839 5840 llvm::Type *Types[] = { RegisterType }; 5841 5842 bool MixedTypes = RegisterType->isIntegerTy(64) && ValueType->isIntegerTy(32); 5843 assert(!(RegisterType->isIntegerTy(32) && ValueType->isIntegerTy(64)) 5844 && "Can't fit 64-bit value in 32-bit register"); 5845 5846 if (IsRead) { 5847 llvm::Function *F = CGM.getIntrinsic(llvm::Intrinsic::read_register, Types); 5848 llvm::Value *Call = Builder.CreateCall(F, Metadata); 5849 5850 if (MixedTypes) 5851 // Read into 64 bit register and then truncate result to 32 bit. 5852 return Builder.CreateTrunc(Call, ValueType); 5853 5854 if (ValueType->isPointerTy()) 5855 // Have i32/i64 result (Call) but want to return a VoidPtrTy (i8*). 5856 return Builder.CreateIntToPtr(Call, ValueType); 5857 5858 return Call; 5859 } 5860 5861 llvm::Function *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types); 5862 llvm::Value *ArgValue = CGF.EmitScalarExpr(E->getArg(1)); 5863 if (MixedTypes) { 5864 // Extend 32 bit write value to 64 bit to pass to write. 5865 ArgValue = Builder.CreateZExt(ArgValue, RegisterType); 5866 return Builder.CreateCall(F, { Metadata, ArgValue }); 5867 } 5868 5869 if (ValueType->isPointerTy()) { 5870 // Have VoidPtrTy ArgValue but want to return an i32/i64. 5871 ArgValue = Builder.CreatePtrToInt(ArgValue, RegisterType); 5872 return Builder.CreateCall(F, { Metadata, ArgValue }); 5873 } 5874 5875 return Builder.CreateCall(F, { Metadata, ArgValue }); 5876 } 5877 5878 /// Return true if BuiltinID is an overloaded Neon intrinsic with an extra 5879 /// argument that specifies the vector type. 5880 static bool HasExtraNeonArgument(unsigned BuiltinID) { 5881 switch (BuiltinID) { 5882 default: break; 5883 case NEON::BI__builtin_neon_vget_lane_i8: 5884 case NEON::BI__builtin_neon_vget_lane_i16: 5885 case NEON::BI__builtin_neon_vget_lane_i32: 5886 case NEON::BI__builtin_neon_vget_lane_i64: 5887 case NEON::BI__builtin_neon_vget_lane_f32: 5888 case NEON::BI__builtin_neon_vgetq_lane_i8: 5889 case NEON::BI__builtin_neon_vgetq_lane_i16: 5890 case NEON::BI__builtin_neon_vgetq_lane_i32: 5891 case NEON::BI__builtin_neon_vgetq_lane_i64: 5892 case NEON::BI__builtin_neon_vgetq_lane_f32: 5893 case NEON::BI__builtin_neon_vset_lane_i8: 5894 case NEON::BI__builtin_neon_vset_lane_i16: 5895 case NEON::BI__builtin_neon_vset_lane_i32: 5896 case NEON::BI__builtin_neon_vset_lane_i64: 5897 case NEON::BI__builtin_neon_vset_lane_f32: 5898 case NEON::BI__builtin_neon_vsetq_lane_i8: 5899 case NEON::BI__builtin_neon_vsetq_lane_i16: 5900 case NEON::BI__builtin_neon_vsetq_lane_i32: 5901 case NEON::BI__builtin_neon_vsetq_lane_i64: 5902 case NEON::BI__builtin_neon_vsetq_lane_f32: 5903 case NEON::BI__builtin_neon_vsha1h_u32: 5904 case NEON::BI__builtin_neon_vsha1cq_u32: 5905 case NEON::BI__builtin_neon_vsha1pq_u32: 5906 case NEON::BI__builtin_neon_vsha1mq_u32: 5907 case clang::ARM::BI_MoveToCoprocessor: 5908 case clang::ARM::BI_MoveToCoprocessor2: 5909 return false; 5910 } 5911 return true; 5912 } 5913 5914 Value *CodeGenFunction::EmitISOVolatileLoad(const CallExpr *E) { 5915 Value *Ptr = EmitScalarExpr(E->getArg(0)); 5916 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 5917 CharUnits LoadSize = getContext().getTypeSizeInChars(ElTy); 5918 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 5919 LoadSize.getQuantity() * 8); 5920 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 5921 llvm::LoadInst *Load = 5922 Builder.CreateAlignedLoad(Ptr, LoadSize); 5923 Load->setVolatile(true); 5924 return Load; 5925 } 5926 5927 Value *CodeGenFunction::EmitISOVolatileStore(const CallExpr *E) { 5928 Value *Ptr = EmitScalarExpr(E->getArg(0)); 5929 Value *Value = EmitScalarExpr(E->getArg(1)); 5930 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 5931 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 5932 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 5933 StoreSize.getQuantity() * 8); 5934 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 5935 llvm::StoreInst *Store = 5936 Builder.CreateAlignedStore(Value, Ptr, 5937 StoreSize); 5938 Store->setVolatile(true); 5939 return Store; 5940 } 5941 5942 Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, 5943 const CallExpr *E, 5944 llvm::Triple::ArchType Arch) { 5945 if (auto Hint = GetValueForARMHint(BuiltinID)) 5946 return Hint; 5947 5948 if (BuiltinID == ARM::BI__emit) { 5949 bool IsThumb = getTarget().getTriple().getArch() == llvm::Triple::thumb; 5950 llvm::FunctionType *FTy = 5951 llvm::FunctionType::get(VoidTy, /*Variadic=*/false); 5952 5953 Expr::EvalResult Result; 5954 if (!E->getArg(0)->EvaluateAsInt(Result, CGM.getContext())) 5955 llvm_unreachable("Sema will ensure that the parameter is constant"); 5956 5957 llvm::APSInt Value = Result.Val.getInt(); 5958 uint64_t ZExtValue = Value.zextOrTrunc(IsThumb ? 16 : 32).getZExtValue(); 5959 5960 llvm::InlineAsm *Emit = 5961 IsThumb ? InlineAsm::get(FTy, ".inst.n 0x" + utohexstr(ZExtValue), "", 5962 /*SideEffects=*/true) 5963 : InlineAsm::get(FTy, ".inst 0x" + utohexstr(ZExtValue), "", 5964 /*SideEffects=*/true); 5965 5966 return Builder.CreateCall(Emit); 5967 } 5968 5969 if (BuiltinID == ARM::BI__builtin_arm_dbg) { 5970 Value *Option = EmitScalarExpr(E->getArg(0)); 5971 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_dbg), Option); 5972 } 5973 5974 if (BuiltinID == ARM::BI__builtin_arm_prefetch) { 5975 Value *Address = EmitScalarExpr(E->getArg(0)); 5976 Value *RW = EmitScalarExpr(E->getArg(1)); 5977 Value *IsData = EmitScalarExpr(E->getArg(2)); 5978 5979 // Locality is not supported on ARM target 5980 Value *Locality = llvm::ConstantInt::get(Int32Ty, 3); 5981 5982 Function *F = CGM.getIntrinsic(Intrinsic::prefetch); 5983 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 5984 } 5985 5986 if (BuiltinID == ARM::BI__builtin_arm_rbit) { 5987 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 5988 return Builder.CreateCall( 5989 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 5990 } 5991 5992 if (BuiltinID == ARM::BI__clear_cache) { 5993 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 5994 const FunctionDecl *FD = E->getDirectCallee(); 5995 Value *Ops[2]; 5996 for (unsigned i = 0; i < 2; i++) 5997 Ops[i] = EmitScalarExpr(E->getArg(i)); 5998 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 5999 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 6000 StringRef Name = FD->getName(); 6001 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 6002 } 6003 6004 if (BuiltinID == ARM::BI__builtin_arm_mcrr || 6005 BuiltinID == ARM::BI__builtin_arm_mcrr2) { 6006 Function *F; 6007 6008 switch (BuiltinID) { 6009 default: llvm_unreachable("unexpected builtin"); 6010 case ARM::BI__builtin_arm_mcrr: 6011 F = CGM.getIntrinsic(Intrinsic::arm_mcrr); 6012 break; 6013 case ARM::BI__builtin_arm_mcrr2: 6014 F = CGM.getIntrinsic(Intrinsic::arm_mcrr2); 6015 break; 6016 } 6017 6018 // MCRR{2} instruction has 5 operands but 6019 // the intrinsic has 4 because Rt and Rt2 6020 // are represented as a single unsigned 64 6021 // bit integer in the intrinsic definition 6022 // but internally it's represented as 2 32 6023 // bit integers. 6024 6025 Value *Coproc = EmitScalarExpr(E->getArg(0)); 6026 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 6027 Value *RtAndRt2 = EmitScalarExpr(E->getArg(2)); 6028 Value *CRm = EmitScalarExpr(E->getArg(3)); 6029 6030 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 6031 Value *Rt = Builder.CreateTruncOrBitCast(RtAndRt2, Int32Ty); 6032 Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); 6033 Rt2 = Builder.CreateTruncOrBitCast(Rt2, Int32Ty); 6034 6035 return Builder.CreateCall(F, {Coproc, Opc1, Rt, Rt2, CRm}); 6036 } 6037 6038 if (BuiltinID == ARM::BI__builtin_arm_mrrc || 6039 BuiltinID == ARM::BI__builtin_arm_mrrc2) { 6040 Function *F; 6041 6042 switch (BuiltinID) { 6043 default: llvm_unreachable("unexpected builtin"); 6044 case ARM::BI__builtin_arm_mrrc: 6045 F = CGM.getIntrinsic(Intrinsic::arm_mrrc); 6046 break; 6047 case ARM::BI__builtin_arm_mrrc2: 6048 F = CGM.getIntrinsic(Intrinsic::arm_mrrc2); 6049 break; 6050 } 6051 6052 Value *Coproc = EmitScalarExpr(E->getArg(0)); 6053 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 6054 Value *CRm = EmitScalarExpr(E->getArg(2)); 6055 Value *RtAndRt2 = Builder.CreateCall(F, {Coproc, Opc1, CRm}); 6056 6057 // Returns an unsigned 64 bit integer, represented 6058 // as two 32 bit integers. 6059 6060 Value *Rt = Builder.CreateExtractValue(RtAndRt2, 1); 6061 Value *Rt1 = Builder.CreateExtractValue(RtAndRt2, 0); 6062 Rt = Builder.CreateZExt(Rt, Int64Ty); 6063 Rt1 = Builder.CreateZExt(Rt1, Int64Ty); 6064 6065 Value *ShiftCast = llvm::ConstantInt::get(Int64Ty, 32); 6066 RtAndRt2 = Builder.CreateShl(Rt, ShiftCast, "shl", true); 6067 RtAndRt2 = Builder.CreateOr(RtAndRt2, Rt1); 6068 6069 return Builder.CreateBitCast(RtAndRt2, ConvertType(E->getType())); 6070 } 6071 6072 if (BuiltinID == ARM::BI__builtin_arm_ldrexd || 6073 ((BuiltinID == ARM::BI__builtin_arm_ldrex || 6074 BuiltinID == ARM::BI__builtin_arm_ldaex) && 6075 getContext().getTypeSize(E->getType()) == 64) || 6076 BuiltinID == ARM::BI__ldrexd) { 6077 Function *F; 6078 6079 switch (BuiltinID) { 6080 default: llvm_unreachable("unexpected builtin"); 6081 case ARM::BI__builtin_arm_ldaex: 6082 F = CGM.getIntrinsic(Intrinsic::arm_ldaexd); 6083 break; 6084 case ARM::BI__builtin_arm_ldrexd: 6085 case ARM::BI__builtin_arm_ldrex: 6086 case ARM::BI__ldrexd: 6087 F = CGM.getIntrinsic(Intrinsic::arm_ldrexd); 6088 break; 6089 } 6090 6091 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 6092 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 6093 "ldrexd"); 6094 6095 Value *Val0 = Builder.CreateExtractValue(Val, 1); 6096 Value *Val1 = Builder.CreateExtractValue(Val, 0); 6097 Val0 = Builder.CreateZExt(Val0, Int64Ty); 6098 Val1 = Builder.CreateZExt(Val1, Int64Ty); 6099 6100 Value *ShiftCst = llvm::ConstantInt::get(Int64Ty, 32); 6101 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 6102 Val = Builder.CreateOr(Val, Val1); 6103 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 6104 } 6105 6106 if (BuiltinID == ARM::BI__builtin_arm_ldrex || 6107 BuiltinID == ARM::BI__builtin_arm_ldaex) { 6108 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 6109 6110 QualType Ty = E->getType(); 6111 llvm::Type *RealResTy = ConvertType(Ty); 6112 llvm::Type *PtrTy = llvm::IntegerType::get( 6113 getLLVMContext(), getContext().getTypeSize(Ty))->getPointerTo(); 6114 LoadAddr = Builder.CreateBitCast(LoadAddr, PtrTy); 6115 6116 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_ldaex 6117 ? Intrinsic::arm_ldaex 6118 : Intrinsic::arm_ldrex, 6119 PtrTy); 6120 Value *Val = Builder.CreateCall(F, LoadAddr, "ldrex"); 6121 6122 if (RealResTy->isPointerTy()) 6123 return Builder.CreateIntToPtr(Val, RealResTy); 6124 else { 6125 llvm::Type *IntResTy = llvm::IntegerType::get( 6126 getLLVMContext(), CGM.getDataLayout().getTypeSizeInBits(RealResTy)); 6127 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 6128 return Builder.CreateBitCast(Val, RealResTy); 6129 } 6130 } 6131 6132 if (BuiltinID == ARM::BI__builtin_arm_strexd || 6133 ((BuiltinID == ARM::BI__builtin_arm_stlex || 6134 BuiltinID == ARM::BI__builtin_arm_strex) && 6135 getContext().getTypeSize(E->getArg(0)->getType()) == 64)) { 6136 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 6137 ? Intrinsic::arm_stlexd 6138 : Intrinsic::arm_strexd); 6139 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty); 6140 6141 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 6142 Value *Val = EmitScalarExpr(E->getArg(0)); 6143 Builder.CreateStore(Val, Tmp); 6144 6145 Address LdPtr = Builder.CreateBitCast(Tmp,llvm::PointerType::getUnqual(STy)); 6146 Val = Builder.CreateLoad(LdPtr); 6147 6148 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 6149 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 6150 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), Int8PtrTy); 6151 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "strexd"); 6152 } 6153 6154 if (BuiltinID == ARM::BI__builtin_arm_strex || 6155 BuiltinID == ARM::BI__builtin_arm_stlex) { 6156 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 6157 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 6158 6159 QualType Ty = E->getArg(0)->getType(); 6160 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 6161 getContext().getTypeSize(Ty)); 6162 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 6163 6164 if (StoreVal->getType()->isPointerTy()) 6165 StoreVal = Builder.CreatePtrToInt(StoreVal, Int32Ty); 6166 else { 6167 llvm::Type *IntTy = llvm::IntegerType::get( 6168 getLLVMContext(), 6169 CGM.getDataLayout().getTypeSizeInBits(StoreVal->getType())); 6170 StoreVal = Builder.CreateBitCast(StoreVal, IntTy); 6171 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int32Ty); 6172 } 6173 6174 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 6175 ? Intrinsic::arm_stlex 6176 : Intrinsic::arm_strex, 6177 StoreAddr->getType()); 6178 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "strex"); 6179 } 6180 6181 switch (BuiltinID) { 6182 case ARM::BI__iso_volatile_load8: 6183 case ARM::BI__iso_volatile_load16: 6184 case ARM::BI__iso_volatile_load32: 6185 case ARM::BI__iso_volatile_load64: 6186 return EmitISOVolatileLoad(E); 6187 case ARM::BI__iso_volatile_store8: 6188 case ARM::BI__iso_volatile_store16: 6189 case ARM::BI__iso_volatile_store32: 6190 case ARM::BI__iso_volatile_store64: 6191 return EmitISOVolatileStore(E); 6192 } 6193 6194 if (BuiltinID == ARM::BI__builtin_arm_clrex) { 6195 Function *F = CGM.getIntrinsic(Intrinsic::arm_clrex); 6196 return Builder.CreateCall(F); 6197 } 6198 6199 // CRC32 6200 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 6201 switch (BuiltinID) { 6202 case ARM::BI__builtin_arm_crc32b: 6203 CRCIntrinsicID = Intrinsic::arm_crc32b; break; 6204 case ARM::BI__builtin_arm_crc32cb: 6205 CRCIntrinsicID = Intrinsic::arm_crc32cb; break; 6206 case ARM::BI__builtin_arm_crc32h: 6207 CRCIntrinsicID = Intrinsic::arm_crc32h; break; 6208 case ARM::BI__builtin_arm_crc32ch: 6209 CRCIntrinsicID = Intrinsic::arm_crc32ch; break; 6210 case ARM::BI__builtin_arm_crc32w: 6211 case ARM::BI__builtin_arm_crc32d: 6212 CRCIntrinsicID = Intrinsic::arm_crc32w; break; 6213 case ARM::BI__builtin_arm_crc32cw: 6214 case ARM::BI__builtin_arm_crc32cd: 6215 CRCIntrinsicID = Intrinsic::arm_crc32cw; break; 6216 } 6217 6218 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 6219 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 6220 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 6221 6222 // crc32{c,}d intrinsics are implemnted as two calls to crc32{c,}w 6223 // intrinsics, hence we need different codegen for these cases. 6224 if (BuiltinID == ARM::BI__builtin_arm_crc32d || 6225 BuiltinID == ARM::BI__builtin_arm_crc32cd) { 6226 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 6227 Value *Arg1a = Builder.CreateTruncOrBitCast(Arg1, Int32Ty); 6228 Value *Arg1b = Builder.CreateLShr(Arg1, C1); 6229 Arg1b = Builder.CreateTruncOrBitCast(Arg1b, Int32Ty); 6230 6231 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 6232 Value *Res = Builder.CreateCall(F, {Arg0, Arg1a}); 6233 return Builder.CreateCall(F, {Res, Arg1b}); 6234 } else { 6235 Arg1 = Builder.CreateZExtOrBitCast(Arg1, Int32Ty); 6236 6237 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 6238 return Builder.CreateCall(F, {Arg0, Arg1}); 6239 } 6240 } 6241 6242 if (BuiltinID == ARM::BI__builtin_arm_rsr || 6243 BuiltinID == ARM::BI__builtin_arm_rsr64 || 6244 BuiltinID == ARM::BI__builtin_arm_rsrp || 6245 BuiltinID == ARM::BI__builtin_arm_wsr || 6246 BuiltinID == ARM::BI__builtin_arm_wsr64 || 6247 BuiltinID == ARM::BI__builtin_arm_wsrp) { 6248 6249 bool IsRead = BuiltinID == ARM::BI__builtin_arm_rsr || 6250 BuiltinID == ARM::BI__builtin_arm_rsr64 || 6251 BuiltinID == ARM::BI__builtin_arm_rsrp; 6252 6253 bool IsPointerBuiltin = BuiltinID == ARM::BI__builtin_arm_rsrp || 6254 BuiltinID == ARM::BI__builtin_arm_wsrp; 6255 6256 bool Is64Bit = BuiltinID == ARM::BI__builtin_arm_rsr64 || 6257 BuiltinID == ARM::BI__builtin_arm_wsr64; 6258 6259 llvm::Type *ValueType; 6260 llvm::Type *RegisterType; 6261 if (IsPointerBuiltin) { 6262 ValueType = VoidPtrTy; 6263 RegisterType = Int32Ty; 6264 } else if (Is64Bit) { 6265 ValueType = RegisterType = Int64Ty; 6266 } else { 6267 ValueType = RegisterType = Int32Ty; 6268 } 6269 6270 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 6271 } 6272 6273 // Find out if any arguments are required to be integer constant 6274 // expressions. 6275 unsigned ICEArguments = 0; 6276 ASTContext::GetBuiltinTypeError Error; 6277 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 6278 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 6279 6280 auto getAlignmentValue32 = [&](Address addr) -> Value* { 6281 return Builder.getInt32(addr.getAlignment().getQuantity()); 6282 }; 6283 6284 Address PtrOp0 = Address::invalid(); 6285 Address PtrOp1 = Address::invalid(); 6286 SmallVector<Value*, 4> Ops; 6287 bool HasExtraArg = HasExtraNeonArgument(BuiltinID); 6288 unsigned NumArgs = E->getNumArgs() - (HasExtraArg ? 1 : 0); 6289 for (unsigned i = 0, e = NumArgs; i != e; i++) { 6290 if (i == 0) { 6291 switch (BuiltinID) { 6292 case NEON::BI__builtin_neon_vld1_v: 6293 case NEON::BI__builtin_neon_vld1q_v: 6294 case NEON::BI__builtin_neon_vld1q_lane_v: 6295 case NEON::BI__builtin_neon_vld1_lane_v: 6296 case NEON::BI__builtin_neon_vld1_dup_v: 6297 case NEON::BI__builtin_neon_vld1q_dup_v: 6298 case NEON::BI__builtin_neon_vst1_v: 6299 case NEON::BI__builtin_neon_vst1q_v: 6300 case NEON::BI__builtin_neon_vst1q_lane_v: 6301 case NEON::BI__builtin_neon_vst1_lane_v: 6302 case NEON::BI__builtin_neon_vst2_v: 6303 case NEON::BI__builtin_neon_vst2q_v: 6304 case NEON::BI__builtin_neon_vst2_lane_v: 6305 case NEON::BI__builtin_neon_vst2q_lane_v: 6306 case NEON::BI__builtin_neon_vst3_v: 6307 case NEON::BI__builtin_neon_vst3q_v: 6308 case NEON::BI__builtin_neon_vst3_lane_v: 6309 case NEON::BI__builtin_neon_vst3q_lane_v: 6310 case NEON::BI__builtin_neon_vst4_v: 6311 case NEON::BI__builtin_neon_vst4q_v: 6312 case NEON::BI__builtin_neon_vst4_lane_v: 6313 case NEON::BI__builtin_neon_vst4q_lane_v: 6314 // Get the alignment for the argument in addition to the value; 6315 // we'll use it later. 6316 PtrOp0 = EmitPointerWithAlignment(E->getArg(0)); 6317 Ops.push_back(PtrOp0.getPointer()); 6318 continue; 6319 } 6320 } 6321 if (i == 1) { 6322 switch (BuiltinID) { 6323 case NEON::BI__builtin_neon_vld2_v: 6324 case NEON::BI__builtin_neon_vld2q_v: 6325 case NEON::BI__builtin_neon_vld3_v: 6326 case NEON::BI__builtin_neon_vld3q_v: 6327 case NEON::BI__builtin_neon_vld4_v: 6328 case NEON::BI__builtin_neon_vld4q_v: 6329 case NEON::BI__builtin_neon_vld2_lane_v: 6330 case NEON::BI__builtin_neon_vld2q_lane_v: 6331 case NEON::BI__builtin_neon_vld3_lane_v: 6332 case NEON::BI__builtin_neon_vld3q_lane_v: 6333 case NEON::BI__builtin_neon_vld4_lane_v: 6334 case NEON::BI__builtin_neon_vld4q_lane_v: 6335 case NEON::BI__builtin_neon_vld2_dup_v: 6336 case NEON::BI__builtin_neon_vld2q_dup_v: 6337 case NEON::BI__builtin_neon_vld3_dup_v: 6338 case NEON::BI__builtin_neon_vld3q_dup_v: 6339 case NEON::BI__builtin_neon_vld4_dup_v: 6340 case NEON::BI__builtin_neon_vld4q_dup_v: 6341 // Get the alignment for the argument in addition to the value; 6342 // we'll use it later. 6343 PtrOp1 = EmitPointerWithAlignment(E->getArg(1)); 6344 Ops.push_back(PtrOp1.getPointer()); 6345 continue; 6346 } 6347 } 6348 6349 if ((ICEArguments & (1 << i)) == 0) { 6350 Ops.push_back(EmitScalarExpr(E->getArg(i))); 6351 } else { 6352 // If this is required to be a constant, constant fold it so that we know 6353 // that the generated intrinsic gets a ConstantInt. 6354 llvm::APSInt Result; 6355 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 6356 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 6357 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 6358 } 6359 } 6360 6361 switch (BuiltinID) { 6362 default: break; 6363 6364 case NEON::BI__builtin_neon_vget_lane_i8: 6365 case NEON::BI__builtin_neon_vget_lane_i16: 6366 case NEON::BI__builtin_neon_vget_lane_i32: 6367 case NEON::BI__builtin_neon_vget_lane_i64: 6368 case NEON::BI__builtin_neon_vget_lane_f32: 6369 case NEON::BI__builtin_neon_vgetq_lane_i8: 6370 case NEON::BI__builtin_neon_vgetq_lane_i16: 6371 case NEON::BI__builtin_neon_vgetq_lane_i32: 6372 case NEON::BI__builtin_neon_vgetq_lane_i64: 6373 case NEON::BI__builtin_neon_vgetq_lane_f32: 6374 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane"); 6375 6376 case NEON::BI__builtin_neon_vrndns_f32: { 6377 Value *Arg = EmitScalarExpr(E->getArg(0)); 6378 llvm::Type *Tys[] = {Arg->getType()}; 6379 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vrintn, Tys); 6380 return Builder.CreateCall(F, {Arg}, "vrndn"); } 6381 6382 case NEON::BI__builtin_neon_vset_lane_i8: 6383 case NEON::BI__builtin_neon_vset_lane_i16: 6384 case NEON::BI__builtin_neon_vset_lane_i32: 6385 case NEON::BI__builtin_neon_vset_lane_i64: 6386 case NEON::BI__builtin_neon_vset_lane_f32: 6387 case NEON::BI__builtin_neon_vsetq_lane_i8: 6388 case NEON::BI__builtin_neon_vsetq_lane_i16: 6389 case NEON::BI__builtin_neon_vsetq_lane_i32: 6390 case NEON::BI__builtin_neon_vsetq_lane_i64: 6391 case NEON::BI__builtin_neon_vsetq_lane_f32: 6392 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 6393 6394 case NEON::BI__builtin_neon_vsha1h_u32: 6395 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1h), Ops, 6396 "vsha1h"); 6397 case NEON::BI__builtin_neon_vsha1cq_u32: 6398 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1c), Ops, 6399 "vsha1h"); 6400 case NEON::BI__builtin_neon_vsha1pq_u32: 6401 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1p), Ops, 6402 "vsha1h"); 6403 case NEON::BI__builtin_neon_vsha1mq_u32: 6404 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1m), Ops, 6405 "vsha1h"); 6406 6407 // The ARM _MoveToCoprocessor builtins put the input register value as 6408 // the first argument, but the LLVM intrinsic expects it as the third one. 6409 case ARM::BI_MoveToCoprocessor: 6410 case ARM::BI_MoveToCoprocessor2: { 6411 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI_MoveToCoprocessor ? 6412 Intrinsic::arm_mcr : Intrinsic::arm_mcr2); 6413 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0], 6414 Ops[3], Ops[4], Ops[5]}); 6415 } 6416 case ARM::BI_BitScanForward: 6417 case ARM::BI_BitScanForward64: 6418 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 6419 case ARM::BI_BitScanReverse: 6420 case ARM::BI_BitScanReverse64: 6421 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 6422 6423 case ARM::BI_InterlockedAnd64: 6424 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 6425 case ARM::BI_InterlockedExchange64: 6426 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 6427 case ARM::BI_InterlockedExchangeAdd64: 6428 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 6429 case ARM::BI_InterlockedExchangeSub64: 6430 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 6431 case ARM::BI_InterlockedOr64: 6432 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 6433 case ARM::BI_InterlockedXor64: 6434 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 6435 case ARM::BI_InterlockedDecrement64: 6436 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 6437 case ARM::BI_InterlockedIncrement64: 6438 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 6439 case ARM::BI_InterlockedExchangeAdd8_acq: 6440 case ARM::BI_InterlockedExchangeAdd16_acq: 6441 case ARM::BI_InterlockedExchangeAdd_acq: 6442 case ARM::BI_InterlockedExchangeAdd64_acq: 6443 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd_acq, E); 6444 case ARM::BI_InterlockedExchangeAdd8_rel: 6445 case ARM::BI_InterlockedExchangeAdd16_rel: 6446 case ARM::BI_InterlockedExchangeAdd_rel: 6447 case ARM::BI_InterlockedExchangeAdd64_rel: 6448 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd_rel, E); 6449 case ARM::BI_InterlockedExchangeAdd8_nf: 6450 case ARM::BI_InterlockedExchangeAdd16_nf: 6451 case ARM::BI_InterlockedExchangeAdd_nf: 6452 case ARM::BI_InterlockedExchangeAdd64_nf: 6453 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd_nf, E); 6454 case ARM::BI_InterlockedExchange8_acq: 6455 case ARM::BI_InterlockedExchange16_acq: 6456 case ARM::BI_InterlockedExchange_acq: 6457 case ARM::BI_InterlockedExchange64_acq: 6458 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange_acq, E); 6459 case ARM::BI_InterlockedExchange8_rel: 6460 case ARM::BI_InterlockedExchange16_rel: 6461 case ARM::BI_InterlockedExchange_rel: 6462 case ARM::BI_InterlockedExchange64_rel: 6463 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange_rel, E); 6464 case ARM::BI_InterlockedExchange8_nf: 6465 case ARM::BI_InterlockedExchange16_nf: 6466 case ARM::BI_InterlockedExchange_nf: 6467 case ARM::BI_InterlockedExchange64_nf: 6468 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange_nf, E); 6469 case ARM::BI_InterlockedCompareExchange8_acq: 6470 case ARM::BI_InterlockedCompareExchange16_acq: 6471 case ARM::BI_InterlockedCompareExchange_acq: 6472 case ARM::BI_InterlockedCompareExchange64_acq: 6473 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedCompareExchange_acq, E); 6474 case ARM::BI_InterlockedCompareExchange8_rel: 6475 case ARM::BI_InterlockedCompareExchange16_rel: 6476 case ARM::BI_InterlockedCompareExchange_rel: 6477 case ARM::BI_InterlockedCompareExchange64_rel: 6478 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedCompareExchange_rel, E); 6479 case ARM::BI_InterlockedCompareExchange8_nf: 6480 case ARM::BI_InterlockedCompareExchange16_nf: 6481 case ARM::BI_InterlockedCompareExchange_nf: 6482 case ARM::BI_InterlockedCompareExchange64_nf: 6483 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedCompareExchange_nf, E); 6484 case ARM::BI_InterlockedOr8_acq: 6485 case ARM::BI_InterlockedOr16_acq: 6486 case ARM::BI_InterlockedOr_acq: 6487 case ARM::BI_InterlockedOr64_acq: 6488 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr_acq, E); 6489 case ARM::BI_InterlockedOr8_rel: 6490 case ARM::BI_InterlockedOr16_rel: 6491 case ARM::BI_InterlockedOr_rel: 6492 case ARM::BI_InterlockedOr64_rel: 6493 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr_rel, E); 6494 case ARM::BI_InterlockedOr8_nf: 6495 case ARM::BI_InterlockedOr16_nf: 6496 case ARM::BI_InterlockedOr_nf: 6497 case ARM::BI_InterlockedOr64_nf: 6498 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr_nf, E); 6499 case ARM::BI_InterlockedXor8_acq: 6500 case ARM::BI_InterlockedXor16_acq: 6501 case ARM::BI_InterlockedXor_acq: 6502 case ARM::BI_InterlockedXor64_acq: 6503 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor_acq, E); 6504 case ARM::BI_InterlockedXor8_rel: 6505 case ARM::BI_InterlockedXor16_rel: 6506 case ARM::BI_InterlockedXor_rel: 6507 case ARM::BI_InterlockedXor64_rel: 6508 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor_rel, E); 6509 case ARM::BI_InterlockedXor8_nf: 6510 case ARM::BI_InterlockedXor16_nf: 6511 case ARM::BI_InterlockedXor_nf: 6512 case ARM::BI_InterlockedXor64_nf: 6513 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor_nf, E); 6514 case ARM::BI_InterlockedAnd8_acq: 6515 case ARM::BI_InterlockedAnd16_acq: 6516 case ARM::BI_InterlockedAnd_acq: 6517 case ARM::BI_InterlockedAnd64_acq: 6518 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd_acq, E); 6519 case ARM::BI_InterlockedAnd8_rel: 6520 case ARM::BI_InterlockedAnd16_rel: 6521 case ARM::BI_InterlockedAnd_rel: 6522 case ARM::BI_InterlockedAnd64_rel: 6523 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd_rel, E); 6524 case ARM::BI_InterlockedAnd8_nf: 6525 case ARM::BI_InterlockedAnd16_nf: 6526 case ARM::BI_InterlockedAnd_nf: 6527 case ARM::BI_InterlockedAnd64_nf: 6528 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd_nf, E); 6529 case ARM::BI_InterlockedIncrement16_acq: 6530 case ARM::BI_InterlockedIncrement_acq: 6531 case ARM::BI_InterlockedIncrement64_acq: 6532 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement_acq, E); 6533 case ARM::BI_InterlockedIncrement16_rel: 6534 case ARM::BI_InterlockedIncrement_rel: 6535 case ARM::BI_InterlockedIncrement64_rel: 6536 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement_rel, E); 6537 case ARM::BI_InterlockedIncrement16_nf: 6538 case ARM::BI_InterlockedIncrement_nf: 6539 case ARM::BI_InterlockedIncrement64_nf: 6540 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement_nf, E); 6541 case ARM::BI_InterlockedDecrement16_acq: 6542 case ARM::BI_InterlockedDecrement_acq: 6543 case ARM::BI_InterlockedDecrement64_acq: 6544 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement_acq, E); 6545 case ARM::BI_InterlockedDecrement16_rel: 6546 case ARM::BI_InterlockedDecrement_rel: 6547 case ARM::BI_InterlockedDecrement64_rel: 6548 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement_rel, E); 6549 case ARM::BI_InterlockedDecrement16_nf: 6550 case ARM::BI_InterlockedDecrement_nf: 6551 case ARM::BI_InterlockedDecrement64_nf: 6552 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement_nf, E); 6553 } 6554 6555 // Get the last argument, which specifies the vector type. 6556 assert(HasExtraArg); 6557 llvm::APSInt Result; 6558 const Expr *Arg = E->getArg(E->getNumArgs()-1); 6559 if (!Arg->isIntegerConstantExpr(Result, getContext())) 6560 return nullptr; 6561 6562 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f || 6563 BuiltinID == ARM::BI__builtin_arm_vcvtr_d) { 6564 // Determine the overloaded type of this builtin. 6565 llvm::Type *Ty; 6566 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f) 6567 Ty = FloatTy; 6568 else 6569 Ty = DoubleTy; 6570 6571 // Determine whether this is an unsigned conversion or not. 6572 bool usgn = Result.getZExtValue() == 1; 6573 unsigned Int = usgn ? Intrinsic::arm_vcvtru : Intrinsic::arm_vcvtr; 6574 6575 // Call the appropriate intrinsic. 6576 Function *F = CGM.getIntrinsic(Int, Ty); 6577 return Builder.CreateCall(F, Ops, "vcvtr"); 6578 } 6579 6580 // Determine the type of this overloaded NEON intrinsic. 6581 NeonTypeFlags Type(Result.getZExtValue()); 6582 bool usgn = Type.isUnsigned(); 6583 bool rightShift = false; 6584 6585 llvm::VectorType *VTy = GetNeonType(this, Type, 6586 getTarget().hasLegalHalfType()); 6587 llvm::Type *Ty = VTy; 6588 if (!Ty) 6589 return nullptr; 6590 6591 // Many NEON builtins have identical semantics and uses in ARM and 6592 // AArch64. Emit these in a single function. 6593 auto IntrinsicMap = makeArrayRef(ARMSIMDIntrinsicMap); 6594 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 6595 IntrinsicMap, BuiltinID, NEONSIMDIntrinsicsProvenSorted); 6596 if (Builtin) 6597 return EmitCommonNeonBuiltinExpr( 6598 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 6599 Builtin->NameHint, Builtin->TypeModifier, E, Ops, PtrOp0, PtrOp1, Arch); 6600 6601 unsigned Int; 6602 switch (BuiltinID) { 6603 default: return nullptr; 6604 case NEON::BI__builtin_neon_vld1q_lane_v: 6605 // Handle 64-bit integer elements as a special case. Use shuffles of 6606 // one-element vectors to avoid poor code for i64 in the backend. 6607 if (VTy->getElementType()->isIntegerTy(64)) { 6608 // Extract the other lane. 6609 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6610 uint32_t Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); 6611 Value *SV = llvm::ConstantVector::get(ConstantInt::get(Int32Ty, 1-Lane)); 6612 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 6613 // Load the value as a one-element vector. 6614 Ty = llvm::VectorType::get(VTy->getElementType(), 1); 6615 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 6616 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Tys); 6617 Value *Align = getAlignmentValue32(PtrOp0); 6618 Value *Ld = Builder.CreateCall(F, {Ops[0], Align}); 6619 // Combine them. 6620 uint32_t Indices[] = {1 - Lane, Lane}; 6621 SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 6622 return Builder.CreateShuffleVector(Ops[1], Ld, SV, "vld1q_lane"); 6623 } 6624 LLVM_FALLTHROUGH; 6625 case NEON::BI__builtin_neon_vld1_lane_v: { 6626 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6627 PtrOp0 = Builder.CreateElementBitCast(PtrOp0, VTy->getElementType()); 6628 Value *Ld = Builder.CreateLoad(PtrOp0); 6629 return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); 6630 } 6631 case NEON::BI__builtin_neon_vqrshrn_n_v: 6632 Int = 6633 usgn ? Intrinsic::arm_neon_vqrshiftnu : Intrinsic::arm_neon_vqrshiftns; 6634 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n", 6635 1, true); 6636 case NEON::BI__builtin_neon_vqrshrun_n_v: 6637 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqrshiftnsu, Ty), 6638 Ops, "vqrshrun_n", 1, true); 6639 case NEON::BI__builtin_neon_vqshrn_n_v: 6640 Int = usgn ? Intrinsic::arm_neon_vqshiftnu : Intrinsic::arm_neon_vqshiftns; 6641 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n", 6642 1, true); 6643 case NEON::BI__builtin_neon_vqshrun_n_v: 6644 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqshiftnsu, Ty), 6645 Ops, "vqshrun_n", 1, true); 6646 case NEON::BI__builtin_neon_vrecpe_v: 6647 case NEON::BI__builtin_neon_vrecpeq_v: 6648 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecpe, Ty), 6649 Ops, "vrecpe"); 6650 case NEON::BI__builtin_neon_vrshrn_n_v: 6651 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrshiftn, Ty), 6652 Ops, "vrshrn_n", 1, true); 6653 case NEON::BI__builtin_neon_vrsra_n_v: 6654 case NEON::BI__builtin_neon_vrsraq_n_v: 6655 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6656 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6657 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, true); 6658 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 6659 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Ty), {Ops[1], Ops[2]}); 6660 return Builder.CreateAdd(Ops[0], Ops[1], "vrsra_n"); 6661 case NEON::BI__builtin_neon_vsri_n_v: 6662 case NEON::BI__builtin_neon_vsriq_n_v: 6663 rightShift = true; 6664 LLVM_FALLTHROUGH; 6665 case NEON::BI__builtin_neon_vsli_n_v: 6666 case NEON::BI__builtin_neon_vsliq_n_v: 6667 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, rightShift); 6668 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vshiftins, Ty), 6669 Ops, "vsli_n"); 6670 case NEON::BI__builtin_neon_vsra_n_v: 6671 case NEON::BI__builtin_neon_vsraq_n_v: 6672 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6673 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 6674 return Builder.CreateAdd(Ops[0], Ops[1]); 6675 case NEON::BI__builtin_neon_vst1q_lane_v: 6676 // Handle 64-bit integer elements as a special case. Use a shuffle to get 6677 // a one-element vector and avoid poor code for i64 in the backend. 6678 if (VTy->getElementType()->isIntegerTy(64)) { 6679 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6680 Value *SV = llvm::ConstantVector::get(cast<llvm::Constant>(Ops[2])); 6681 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 6682 Ops[2] = getAlignmentValue32(PtrOp0); 6683 llvm::Type *Tys[] = {Int8PtrTy, Ops[1]->getType()}; 6684 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, 6685 Tys), Ops); 6686 } 6687 LLVM_FALLTHROUGH; 6688 case NEON::BI__builtin_neon_vst1_lane_v: { 6689 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6690 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 6691 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6692 auto St = Builder.CreateStore(Ops[1], Builder.CreateBitCast(PtrOp0, Ty)); 6693 return St; 6694 } 6695 case NEON::BI__builtin_neon_vtbl1_v: 6696 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl1), 6697 Ops, "vtbl1"); 6698 case NEON::BI__builtin_neon_vtbl2_v: 6699 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl2), 6700 Ops, "vtbl2"); 6701 case NEON::BI__builtin_neon_vtbl3_v: 6702 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl3), 6703 Ops, "vtbl3"); 6704 case NEON::BI__builtin_neon_vtbl4_v: 6705 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl4), 6706 Ops, "vtbl4"); 6707 case NEON::BI__builtin_neon_vtbx1_v: 6708 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx1), 6709 Ops, "vtbx1"); 6710 case NEON::BI__builtin_neon_vtbx2_v: 6711 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx2), 6712 Ops, "vtbx2"); 6713 case NEON::BI__builtin_neon_vtbx3_v: 6714 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx3), 6715 Ops, "vtbx3"); 6716 case NEON::BI__builtin_neon_vtbx4_v: 6717 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx4), 6718 Ops, "vtbx4"); 6719 } 6720 } 6721 6722 static Value *EmitAArch64TblBuiltinExpr(CodeGenFunction &CGF, unsigned BuiltinID, 6723 const CallExpr *E, 6724 SmallVectorImpl<Value *> &Ops, 6725 llvm::Triple::ArchType Arch) { 6726 unsigned int Int = 0; 6727 const char *s = nullptr; 6728 6729 switch (BuiltinID) { 6730 default: 6731 return nullptr; 6732 case NEON::BI__builtin_neon_vtbl1_v: 6733 case NEON::BI__builtin_neon_vqtbl1_v: 6734 case NEON::BI__builtin_neon_vqtbl1q_v: 6735 case NEON::BI__builtin_neon_vtbl2_v: 6736 case NEON::BI__builtin_neon_vqtbl2_v: 6737 case NEON::BI__builtin_neon_vqtbl2q_v: 6738 case NEON::BI__builtin_neon_vtbl3_v: 6739 case NEON::BI__builtin_neon_vqtbl3_v: 6740 case NEON::BI__builtin_neon_vqtbl3q_v: 6741 case NEON::BI__builtin_neon_vtbl4_v: 6742 case NEON::BI__builtin_neon_vqtbl4_v: 6743 case NEON::BI__builtin_neon_vqtbl4q_v: 6744 break; 6745 case NEON::BI__builtin_neon_vtbx1_v: 6746 case NEON::BI__builtin_neon_vqtbx1_v: 6747 case NEON::BI__builtin_neon_vqtbx1q_v: 6748 case NEON::BI__builtin_neon_vtbx2_v: 6749 case NEON::BI__builtin_neon_vqtbx2_v: 6750 case NEON::BI__builtin_neon_vqtbx2q_v: 6751 case NEON::BI__builtin_neon_vtbx3_v: 6752 case NEON::BI__builtin_neon_vqtbx3_v: 6753 case NEON::BI__builtin_neon_vqtbx3q_v: 6754 case NEON::BI__builtin_neon_vtbx4_v: 6755 case NEON::BI__builtin_neon_vqtbx4_v: 6756 case NEON::BI__builtin_neon_vqtbx4q_v: 6757 break; 6758 } 6759 6760 assert(E->getNumArgs() >= 3); 6761 6762 // Get the last argument, which specifies the vector type. 6763 llvm::APSInt Result; 6764 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 6765 if (!Arg->isIntegerConstantExpr(Result, CGF.getContext())) 6766 return nullptr; 6767 6768 // Determine the type of this overloaded NEON intrinsic. 6769 NeonTypeFlags Type(Result.getZExtValue()); 6770 llvm::VectorType *Ty = GetNeonType(&CGF, Type); 6771 if (!Ty) 6772 return nullptr; 6773 6774 CodeGen::CGBuilderTy &Builder = CGF.Builder; 6775 6776 // AArch64 scalar builtins are not overloaded, they do not have an extra 6777 // argument that specifies the vector type, need to handle each case. 6778 switch (BuiltinID) { 6779 case NEON::BI__builtin_neon_vtbl1_v: { 6780 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 1), nullptr, 6781 Ops[1], Ty, Intrinsic::aarch64_neon_tbl1, 6782 "vtbl1"); 6783 } 6784 case NEON::BI__builtin_neon_vtbl2_v: { 6785 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 2), nullptr, 6786 Ops[2], Ty, Intrinsic::aarch64_neon_tbl1, 6787 "vtbl1"); 6788 } 6789 case NEON::BI__builtin_neon_vtbl3_v: { 6790 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 3), nullptr, 6791 Ops[3], Ty, Intrinsic::aarch64_neon_tbl2, 6792 "vtbl2"); 6793 } 6794 case NEON::BI__builtin_neon_vtbl4_v: { 6795 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 4), nullptr, 6796 Ops[4], Ty, Intrinsic::aarch64_neon_tbl2, 6797 "vtbl2"); 6798 } 6799 case NEON::BI__builtin_neon_vtbx1_v: { 6800 Value *TblRes = 6801 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 1), nullptr, Ops[2], 6802 Ty, Intrinsic::aarch64_neon_tbl1, "vtbl1"); 6803 6804 llvm::Constant *EightV = ConstantInt::get(Ty, 8); 6805 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[2], EightV); 6806 CmpRes = Builder.CreateSExt(CmpRes, Ty); 6807 6808 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 6809 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 6810 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 6811 } 6812 case NEON::BI__builtin_neon_vtbx2_v: { 6813 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 2), Ops[0], 6814 Ops[3], Ty, Intrinsic::aarch64_neon_tbx1, 6815 "vtbx1"); 6816 } 6817 case NEON::BI__builtin_neon_vtbx3_v: { 6818 Value *TblRes = 6819 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 3), nullptr, Ops[4], 6820 Ty, Intrinsic::aarch64_neon_tbl2, "vtbl2"); 6821 6822 llvm::Constant *TwentyFourV = ConstantInt::get(Ty, 24); 6823 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[4], 6824 TwentyFourV); 6825 CmpRes = Builder.CreateSExt(CmpRes, Ty); 6826 6827 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 6828 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 6829 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 6830 } 6831 case NEON::BI__builtin_neon_vtbx4_v: { 6832 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 4), Ops[0], 6833 Ops[5], Ty, Intrinsic::aarch64_neon_tbx2, 6834 "vtbx2"); 6835 } 6836 case NEON::BI__builtin_neon_vqtbl1_v: 6837 case NEON::BI__builtin_neon_vqtbl1q_v: 6838 Int = Intrinsic::aarch64_neon_tbl1; s = "vtbl1"; break; 6839 case NEON::BI__builtin_neon_vqtbl2_v: 6840 case NEON::BI__builtin_neon_vqtbl2q_v: { 6841 Int = Intrinsic::aarch64_neon_tbl2; s = "vtbl2"; break; 6842 case NEON::BI__builtin_neon_vqtbl3_v: 6843 case NEON::BI__builtin_neon_vqtbl3q_v: 6844 Int = Intrinsic::aarch64_neon_tbl3; s = "vtbl3"; break; 6845 case NEON::BI__builtin_neon_vqtbl4_v: 6846 case NEON::BI__builtin_neon_vqtbl4q_v: 6847 Int = Intrinsic::aarch64_neon_tbl4; s = "vtbl4"; break; 6848 case NEON::BI__builtin_neon_vqtbx1_v: 6849 case NEON::BI__builtin_neon_vqtbx1q_v: 6850 Int = Intrinsic::aarch64_neon_tbx1; s = "vtbx1"; break; 6851 case NEON::BI__builtin_neon_vqtbx2_v: 6852 case NEON::BI__builtin_neon_vqtbx2q_v: 6853 Int = Intrinsic::aarch64_neon_tbx2; s = "vtbx2"; break; 6854 case NEON::BI__builtin_neon_vqtbx3_v: 6855 case NEON::BI__builtin_neon_vqtbx3q_v: 6856 Int = Intrinsic::aarch64_neon_tbx3; s = "vtbx3"; break; 6857 case NEON::BI__builtin_neon_vqtbx4_v: 6858 case NEON::BI__builtin_neon_vqtbx4q_v: 6859 Int = Intrinsic::aarch64_neon_tbx4; s = "vtbx4"; break; 6860 } 6861 } 6862 6863 if (!Int) 6864 return nullptr; 6865 6866 Function *F = CGF.CGM.getIntrinsic(Int, Ty); 6867 return CGF.EmitNeonCall(F, Ops, s); 6868 } 6869 6870 Value *CodeGenFunction::vectorWrapScalar16(Value *Op) { 6871 llvm::Type *VTy = llvm::VectorType::get(Int16Ty, 4); 6872 Op = Builder.CreateBitCast(Op, Int16Ty); 6873 Value *V = UndefValue::get(VTy); 6874 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 6875 Op = Builder.CreateInsertElement(V, Op, CI); 6876 return Op; 6877 } 6878 6879 Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, 6880 const CallExpr *E, 6881 llvm::Triple::ArchType Arch) { 6882 unsigned HintID = static_cast<unsigned>(-1); 6883 switch (BuiltinID) { 6884 default: break; 6885 case AArch64::BI__builtin_arm_nop: 6886 HintID = 0; 6887 break; 6888 case AArch64::BI__builtin_arm_yield: 6889 case AArch64::BI__yield: 6890 HintID = 1; 6891 break; 6892 case AArch64::BI__builtin_arm_wfe: 6893 case AArch64::BI__wfe: 6894 HintID = 2; 6895 break; 6896 case AArch64::BI__builtin_arm_wfi: 6897 case AArch64::BI__wfi: 6898 HintID = 3; 6899 break; 6900 case AArch64::BI__builtin_arm_sev: 6901 case AArch64::BI__sev: 6902 HintID = 4; 6903 break; 6904 case AArch64::BI__builtin_arm_sevl: 6905 case AArch64::BI__sevl: 6906 HintID = 5; 6907 break; 6908 } 6909 6910 if (HintID != static_cast<unsigned>(-1)) { 6911 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_hint); 6912 return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID)); 6913 } 6914 6915 if (BuiltinID == AArch64::BI__builtin_arm_prefetch) { 6916 Value *Address = EmitScalarExpr(E->getArg(0)); 6917 Value *RW = EmitScalarExpr(E->getArg(1)); 6918 Value *CacheLevel = EmitScalarExpr(E->getArg(2)); 6919 Value *RetentionPolicy = EmitScalarExpr(E->getArg(3)); 6920 Value *IsData = EmitScalarExpr(E->getArg(4)); 6921 6922 Value *Locality = nullptr; 6923 if (cast<llvm::ConstantInt>(RetentionPolicy)->isZero()) { 6924 // Temporal fetch, needs to convert cache level to locality. 6925 Locality = llvm::ConstantInt::get(Int32Ty, 6926 -cast<llvm::ConstantInt>(CacheLevel)->getValue() + 3); 6927 } else { 6928 // Streaming fetch. 6929 Locality = llvm::ConstantInt::get(Int32Ty, 0); 6930 } 6931 6932 // FIXME: We need AArch64 specific LLVM intrinsic if we want to specify 6933 // PLDL3STRM or PLDL2STRM. 6934 Function *F = CGM.getIntrinsic(Intrinsic::prefetch); 6935 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 6936 } 6937 6938 if (BuiltinID == AArch64::BI__builtin_arm_rbit) { 6939 assert((getContext().getTypeSize(E->getType()) == 32) && 6940 "rbit of unusual size!"); 6941 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 6942 return Builder.CreateCall( 6943 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 6944 } 6945 if (BuiltinID == AArch64::BI__builtin_arm_rbit64) { 6946 assert((getContext().getTypeSize(E->getType()) == 64) && 6947 "rbit of unusual size!"); 6948 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 6949 return Builder.CreateCall( 6950 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 6951 } 6952 6953 if (BuiltinID == AArch64::BI__clear_cache) { 6954 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 6955 const FunctionDecl *FD = E->getDirectCallee(); 6956 Value *Ops[2]; 6957 for (unsigned i = 0; i < 2; i++) 6958 Ops[i] = EmitScalarExpr(E->getArg(i)); 6959 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 6960 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 6961 StringRef Name = FD->getName(); 6962 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 6963 } 6964 6965 if ((BuiltinID == AArch64::BI__builtin_arm_ldrex || 6966 BuiltinID == AArch64::BI__builtin_arm_ldaex) && 6967 getContext().getTypeSize(E->getType()) == 128) { 6968 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 6969 ? Intrinsic::aarch64_ldaxp 6970 : Intrinsic::aarch64_ldxp); 6971 6972 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 6973 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 6974 "ldxp"); 6975 6976 Value *Val0 = Builder.CreateExtractValue(Val, 1); 6977 Value *Val1 = Builder.CreateExtractValue(Val, 0); 6978 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 6979 Val0 = Builder.CreateZExt(Val0, Int128Ty); 6980 Val1 = Builder.CreateZExt(Val1, Int128Ty); 6981 6982 Value *ShiftCst = llvm::ConstantInt::get(Int128Ty, 64); 6983 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 6984 Val = Builder.CreateOr(Val, Val1); 6985 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 6986 } else if (BuiltinID == AArch64::BI__builtin_arm_ldrex || 6987 BuiltinID == AArch64::BI__builtin_arm_ldaex) { 6988 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 6989 6990 QualType Ty = E->getType(); 6991 llvm::Type *RealResTy = ConvertType(Ty); 6992 llvm::Type *PtrTy = llvm::IntegerType::get( 6993 getLLVMContext(), getContext().getTypeSize(Ty))->getPointerTo(); 6994 LoadAddr = Builder.CreateBitCast(LoadAddr, PtrTy); 6995 6996 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 6997 ? Intrinsic::aarch64_ldaxr 6998 : Intrinsic::aarch64_ldxr, 6999 PtrTy); 7000 Value *Val = Builder.CreateCall(F, LoadAddr, "ldxr"); 7001 7002 if (RealResTy->isPointerTy()) 7003 return Builder.CreateIntToPtr(Val, RealResTy); 7004 7005 llvm::Type *IntResTy = llvm::IntegerType::get( 7006 getLLVMContext(), CGM.getDataLayout().getTypeSizeInBits(RealResTy)); 7007 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 7008 return Builder.CreateBitCast(Val, RealResTy); 7009 } 7010 7011 if ((BuiltinID == AArch64::BI__builtin_arm_strex || 7012 BuiltinID == AArch64::BI__builtin_arm_stlex) && 7013 getContext().getTypeSize(E->getArg(0)->getType()) == 128) { 7014 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 7015 ? Intrinsic::aarch64_stlxp 7016 : Intrinsic::aarch64_stxp); 7017 llvm::Type *STy = llvm::StructType::get(Int64Ty, Int64Ty); 7018 7019 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 7020 EmitAnyExprToMem(E->getArg(0), Tmp, Qualifiers(), /*init*/ true); 7021 7022 Tmp = Builder.CreateBitCast(Tmp, llvm::PointerType::getUnqual(STy)); 7023 llvm::Value *Val = Builder.CreateLoad(Tmp); 7024 7025 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 7026 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 7027 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), 7028 Int8PtrTy); 7029 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "stxp"); 7030 } 7031 7032 if (BuiltinID == AArch64::BI__builtin_arm_strex || 7033 BuiltinID == AArch64::BI__builtin_arm_stlex) { 7034 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 7035 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 7036 7037 QualType Ty = E->getArg(0)->getType(); 7038 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 7039 getContext().getTypeSize(Ty)); 7040 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 7041 7042 if (StoreVal->getType()->isPointerTy()) 7043 StoreVal = Builder.CreatePtrToInt(StoreVal, Int64Ty); 7044 else { 7045 llvm::Type *IntTy = llvm::IntegerType::get( 7046 getLLVMContext(), 7047 CGM.getDataLayout().getTypeSizeInBits(StoreVal->getType())); 7048 StoreVal = Builder.CreateBitCast(StoreVal, IntTy); 7049 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int64Ty); 7050 } 7051 7052 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 7053 ? Intrinsic::aarch64_stlxr 7054 : Intrinsic::aarch64_stxr, 7055 StoreAddr->getType()); 7056 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "stxr"); 7057 } 7058 7059 if (BuiltinID == AArch64::BI__getReg) { 7060 Expr::EvalResult Result; 7061 if (!E->getArg(0)->EvaluateAsInt(Result, CGM.getContext())) 7062 llvm_unreachable("Sema will ensure that the parameter is constant"); 7063 7064 llvm::APSInt Value = Result.Val.getInt(); 7065 LLVMContext &Context = CGM.getLLVMContext(); 7066 std::string Reg = Value == 31 ? "sp" : "x" + Value.toString(10); 7067 7068 llvm::Metadata *Ops[] = {llvm::MDString::get(Context, Reg)}; 7069 llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); 7070 llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); 7071 7072 llvm::Function *F = 7073 CGM.getIntrinsic(llvm::Intrinsic::read_register, {Int64Ty}); 7074 return Builder.CreateCall(F, Metadata); 7075 } 7076 7077 if (BuiltinID == AArch64::BI__builtin_arm_clrex) { 7078 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_clrex); 7079 return Builder.CreateCall(F); 7080 } 7081 7082 if (BuiltinID == AArch64::BI_ReadWriteBarrier) 7083 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 7084 llvm::SyncScope::SingleThread); 7085 7086 // CRC32 7087 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 7088 switch (BuiltinID) { 7089 case AArch64::BI__builtin_arm_crc32b: 7090 CRCIntrinsicID = Intrinsic::aarch64_crc32b; break; 7091 case AArch64::BI__builtin_arm_crc32cb: 7092 CRCIntrinsicID = Intrinsic::aarch64_crc32cb; break; 7093 case AArch64::BI__builtin_arm_crc32h: 7094 CRCIntrinsicID = Intrinsic::aarch64_crc32h; break; 7095 case AArch64::BI__builtin_arm_crc32ch: 7096 CRCIntrinsicID = Intrinsic::aarch64_crc32ch; break; 7097 case AArch64::BI__builtin_arm_crc32w: 7098 CRCIntrinsicID = Intrinsic::aarch64_crc32w; break; 7099 case AArch64::BI__builtin_arm_crc32cw: 7100 CRCIntrinsicID = Intrinsic::aarch64_crc32cw; break; 7101 case AArch64::BI__builtin_arm_crc32d: 7102 CRCIntrinsicID = Intrinsic::aarch64_crc32x; break; 7103 case AArch64::BI__builtin_arm_crc32cd: 7104 CRCIntrinsicID = Intrinsic::aarch64_crc32cx; break; 7105 } 7106 7107 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 7108 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 7109 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 7110 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 7111 7112 llvm::Type *DataTy = F->getFunctionType()->getParamType(1); 7113 Arg1 = Builder.CreateZExtOrBitCast(Arg1, DataTy); 7114 7115 return Builder.CreateCall(F, {Arg0, Arg1}); 7116 } 7117 7118 if (BuiltinID == AArch64::BI__builtin_arm_rsr || 7119 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 7120 BuiltinID == AArch64::BI__builtin_arm_rsrp || 7121 BuiltinID == AArch64::BI__builtin_arm_wsr || 7122 BuiltinID == AArch64::BI__builtin_arm_wsr64 || 7123 BuiltinID == AArch64::BI__builtin_arm_wsrp) { 7124 7125 bool IsRead = BuiltinID == AArch64::BI__builtin_arm_rsr || 7126 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 7127 BuiltinID == AArch64::BI__builtin_arm_rsrp; 7128 7129 bool IsPointerBuiltin = BuiltinID == AArch64::BI__builtin_arm_rsrp || 7130 BuiltinID == AArch64::BI__builtin_arm_wsrp; 7131 7132 bool Is64Bit = BuiltinID != AArch64::BI__builtin_arm_rsr && 7133 BuiltinID != AArch64::BI__builtin_arm_wsr; 7134 7135 llvm::Type *ValueType; 7136 llvm::Type *RegisterType = Int64Ty; 7137 if (IsPointerBuiltin) { 7138 ValueType = VoidPtrTy; 7139 } else if (Is64Bit) { 7140 ValueType = Int64Ty; 7141 } else { 7142 ValueType = Int32Ty; 7143 } 7144 7145 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 7146 } 7147 7148 if (BuiltinID == AArch64::BI_ReadStatusReg || 7149 BuiltinID == AArch64::BI_WriteStatusReg) { 7150 LLVMContext &Context = CGM.getLLVMContext(); 7151 7152 unsigned SysReg = 7153 E->getArg(0)->EvaluateKnownConstInt(getContext()).getZExtValue(); 7154 7155 std::string SysRegStr; 7156 llvm::raw_string_ostream(SysRegStr) << 7157 ((1 << 1) | ((SysReg >> 14) & 1)) << ":" << 7158 ((SysReg >> 11) & 7) << ":" << 7159 ((SysReg >> 7) & 15) << ":" << 7160 ((SysReg >> 3) & 15) << ":" << 7161 ( SysReg & 7); 7162 7163 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysRegStr) }; 7164 llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); 7165 llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); 7166 7167 llvm::Type *RegisterType = Int64Ty; 7168 llvm::Type *Types[] = { RegisterType }; 7169 7170 if (BuiltinID == AArch64::BI_ReadStatusReg) { 7171 llvm::Function *F = CGM.getIntrinsic(llvm::Intrinsic::read_register, Types); 7172 7173 return Builder.CreateCall(F, Metadata); 7174 } 7175 7176 llvm::Function *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types); 7177 llvm::Value *ArgValue = EmitScalarExpr(E->getArg(1)); 7178 7179 return Builder.CreateCall(F, { Metadata, ArgValue }); 7180 } 7181 7182 if (BuiltinID == AArch64::BI_AddressOfReturnAddress) { 7183 llvm::Function *F = CGM.getIntrinsic(Intrinsic::addressofreturnaddress); 7184 return Builder.CreateCall(F); 7185 } 7186 7187 // Find out if any arguments are required to be integer constant 7188 // expressions. 7189 unsigned ICEArguments = 0; 7190 ASTContext::GetBuiltinTypeError Error; 7191 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 7192 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 7193 7194 llvm::SmallVector<Value*, 4> Ops; 7195 for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; i++) { 7196 if ((ICEArguments & (1 << i)) == 0) { 7197 Ops.push_back(EmitScalarExpr(E->getArg(i))); 7198 } else { 7199 // If this is required to be a constant, constant fold it so that we know 7200 // that the generated intrinsic gets a ConstantInt. 7201 llvm::APSInt Result; 7202 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 7203 assert(IsConst && "Constant arg isn't actually constant?"); 7204 (void)IsConst; 7205 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 7206 } 7207 } 7208 7209 auto SISDMap = makeArrayRef(AArch64SISDIntrinsicMap); 7210 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 7211 SISDMap, BuiltinID, AArch64SISDIntrinsicsProvenSorted); 7212 7213 if (Builtin) { 7214 Ops.push_back(EmitScalarExpr(E->getArg(E->getNumArgs() - 1))); 7215 Value *Result = EmitCommonNeonSISDBuiltinExpr(*this, *Builtin, Ops, E); 7216 assert(Result && "SISD intrinsic should have been handled"); 7217 return Result; 7218 } 7219 7220 llvm::APSInt Result; 7221 const Expr *Arg = E->getArg(E->getNumArgs()-1); 7222 NeonTypeFlags Type(0); 7223 if (Arg->isIntegerConstantExpr(Result, getContext())) 7224 // Determine the type of this overloaded NEON intrinsic. 7225 Type = NeonTypeFlags(Result.getZExtValue()); 7226 7227 bool usgn = Type.isUnsigned(); 7228 bool quad = Type.isQuad(); 7229 7230 // Handle non-overloaded intrinsics first. 7231 switch (BuiltinID) { 7232 default: break; 7233 case NEON::BI__builtin_neon_vabsh_f16: 7234 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7235 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, HalfTy), Ops, "vabs"); 7236 case NEON::BI__builtin_neon_vldrq_p128: { 7237 llvm::Type *Int128Ty = llvm::Type::getIntNTy(getLLVMContext(), 128); 7238 llvm::Type *Int128PTy = llvm::PointerType::get(Int128Ty, 0); 7239 Value *Ptr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PTy); 7240 return Builder.CreateAlignedLoad(Int128Ty, Ptr, 7241 CharUnits::fromQuantity(16)); 7242 } 7243 case NEON::BI__builtin_neon_vstrq_p128: { 7244 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 7245 Value *Ptr = Builder.CreateBitCast(Ops[0], Int128PTy); 7246 return Builder.CreateDefaultAlignedStore(EmitScalarExpr(E->getArg(1)), Ptr); 7247 } 7248 case NEON::BI__builtin_neon_vcvts_u32_f32: 7249 case NEON::BI__builtin_neon_vcvtd_u64_f64: 7250 usgn = true; 7251 LLVM_FALLTHROUGH; 7252 case NEON::BI__builtin_neon_vcvts_s32_f32: 7253 case NEON::BI__builtin_neon_vcvtd_s64_f64: { 7254 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7255 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 7256 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 7257 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 7258 Ops[0] = Builder.CreateBitCast(Ops[0], FTy); 7259 if (usgn) 7260 return Builder.CreateFPToUI(Ops[0], InTy); 7261 return Builder.CreateFPToSI(Ops[0], InTy); 7262 } 7263 case NEON::BI__builtin_neon_vcvts_f32_u32: 7264 case NEON::BI__builtin_neon_vcvtd_f64_u64: 7265 usgn = true; 7266 LLVM_FALLTHROUGH; 7267 case NEON::BI__builtin_neon_vcvts_f32_s32: 7268 case NEON::BI__builtin_neon_vcvtd_f64_s64: { 7269 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7270 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 7271 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 7272 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 7273 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 7274 if (usgn) 7275 return Builder.CreateUIToFP(Ops[0], FTy); 7276 return Builder.CreateSIToFP(Ops[0], FTy); 7277 } 7278 case NEON::BI__builtin_neon_vcvth_f16_u16: 7279 case NEON::BI__builtin_neon_vcvth_f16_u32: 7280 case NEON::BI__builtin_neon_vcvth_f16_u64: 7281 usgn = true; 7282 LLVM_FALLTHROUGH; 7283 case NEON::BI__builtin_neon_vcvth_f16_s16: 7284 case NEON::BI__builtin_neon_vcvth_f16_s32: 7285 case NEON::BI__builtin_neon_vcvth_f16_s64: { 7286 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7287 llvm::Type *FTy = HalfTy; 7288 llvm::Type *InTy; 7289 if (Ops[0]->getType()->getPrimitiveSizeInBits() == 64) 7290 InTy = Int64Ty; 7291 else if (Ops[0]->getType()->getPrimitiveSizeInBits() == 32) 7292 InTy = Int32Ty; 7293 else 7294 InTy = Int16Ty; 7295 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 7296 if (usgn) 7297 return Builder.CreateUIToFP(Ops[0], FTy); 7298 return Builder.CreateSIToFP(Ops[0], FTy); 7299 } 7300 case NEON::BI__builtin_neon_vcvth_u16_f16: 7301 usgn = true; 7302 LLVM_FALLTHROUGH; 7303 case NEON::BI__builtin_neon_vcvth_s16_f16: { 7304 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7305 Ops[0] = Builder.CreateBitCast(Ops[0], HalfTy); 7306 if (usgn) 7307 return Builder.CreateFPToUI(Ops[0], Int16Ty); 7308 return Builder.CreateFPToSI(Ops[0], Int16Ty); 7309 } 7310 case NEON::BI__builtin_neon_vcvth_u32_f16: 7311 usgn = true; 7312 LLVM_FALLTHROUGH; 7313 case NEON::BI__builtin_neon_vcvth_s32_f16: { 7314 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7315 Ops[0] = Builder.CreateBitCast(Ops[0], HalfTy); 7316 if (usgn) 7317 return Builder.CreateFPToUI(Ops[0], Int32Ty); 7318 return Builder.CreateFPToSI(Ops[0], Int32Ty); 7319 } 7320 case NEON::BI__builtin_neon_vcvth_u64_f16: 7321 usgn = true; 7322 LLVM_FALLTHROUGH; 7323 case NEON::BI__builtin_neon_vcvth_s64_f16: { 7324 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7325 Ops[0] = Builder.CreateBitCast(Ops[0], HalfTy); 7326 if (usgn) 7327 return Builder.CreateFPToUI(Ops[0], Int64Ty); 7328 return Builder.CreateFPToSI(Ops[0], Int64Ty); 7329 } 7330 case NEON::BI__builtin_neon_vcvtah_u16_f16: 7331 case NEON::BI__builtin_neon_vcvtmh_u16_f16: 7332 case NEON::BI__builtin_neon_vcvtnh_u16_f16: 7333 case NEON::BI__builtin_neon_vcvtph_u16_f16: 7334 case NEON::BI__builtin_neon_vcvtah_s16_f16: 7335 case NEON::BI__builtin_neon_vcvtmh_s16_f16: 7336 case NEON::BI__builtin_neon_vcvtnh_s16_f16: 7337 case NEON::BI__builtin_neon_vcvtph_s16_f16: { 7338 unsigned Int; 7339 llvm::Type* InTy = Int32Ty; 7340 llvm::Type* FTy = HalfTy; 7341 llvm::Type *Tys[2] = {InTy, FTy}; 7342 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7343 switch (BuiltinID) { 7344 default: llvm_unreachable("missing builtin ID in switch!"); 7345 case NEON::BI__builtin_neon_vcvtah_u16_f16: 7346 Int = Intrinsic::aarch64_neon_fcvtau; break; 7347 case NEON::BI__builtin_neon_vcvtmh_u16_f16: 7348 Int = Intrinsic::aarch64_neon_fcvtmu; break; 7349 case NEON::BI__builtin_neon_vcvtnh_u16_f16: 7350 Int = Intrinsic::aarch64_neon_fcvtnu; break; 7351 case NEON::BI__builtin_neon_vcvtph_u16_f16: 7352 Int = Intrinsic::aarch64_neon_fcvtpu; break; 7353 case NEON::BI__builtin_neon_vcvtah_s16_f16: 7354 Int = Intrinsic::aarch64_neon_fcvtas; break; 7355 case NEON::BI__builtin_neon_vcvtmh_s16_f16: 7356 Int = Intrinsic::aarch64_neon_fcvtms; break; 7357 case NEON::BI__builtin_neon_vcvtnh_s16_f16: 7358 Int = Intrinsic::aarch64_neon_fcvtns; break; 7359 case NEON::BI__builtin_neon_vcvtph_s16_f16: 7360 Int = Intrinsic::aarch64_neon_fcvtps; break; 7361 } 7362 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "fcvt"); 7363 return Builder.CreateTrunc(Ops[0], Int16Ty); 7364 } 7365 case NEON::BI__builtin_neon_vcaleh_f16: 7366 case NEON::BI__builtin_neon_vcalth_f16: 7367 case NEON::BI__builtin_neon_vcageh_f16: 7368 case NEON::BI__builtin_neon_vcagth_f16: { 7369 unsigned Int; 7370 llvm::Type* InTy = Int32Ty; 7371 llvm::Type* FTy = HalfTy; 7372 llvm::Type *Tys[2] = {InTy, FTy}; 7373 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7374 switch (BuiltinID) { 7375 default: llvm_unreachable("missing builtin ID in switch!"); 7376 case NEON::BI__builtin_neon_vcageh_f16: 7377 Int = Intrinsic::aarch64_neon_facge; break; 7378 case NEON::BI__builtin_neon_vcagth_f16: 7379 Int = Intrinsic::aarch64_neon_facgt; break; 7380 case NEON::BI__builtin_neon_vcaleh_f16: 7381 Int = Intrinsic::aarch64_neon_facge; std::swap(Ops[0], Ops[1]); break; 7382 case NEON::BI__builtin_neon_vcalth_f16: 7383 Int = Intrinsic::aarch64_neon_facgt; std::swap(Ops[0], Ops[1]); break; 7384 } 7385 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "facg"); 7386 return Builder.CreateTrunc(Ops[0], Int16Ty); 7387 } 7388 case NEON::BI__builtin_neon_vcvth_n_s16_f16: 7389 case NEON::BI__builtin_neon_vcvth_n_u16_f16: { 7390 unsigned Int; 7391 llvm::Type* InTy = Int32Ty; 7392 llvm::Type* FTy = HalfTy; 7393 llvm::Type *Tys[2] = {InTy, FTy}; 7394 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7395 switch (BuiltinID) { 7396 default: llvm_unreachable("missing builtin ID in switch!"); 7397 case NEON::BI__builtin_neon_vcvth_n_s16_f16: 7398 Int = Intrinsic::aarch64_neon_vcvtfp2fxs; break; 7399 case NEON::BI__builtin_neon_vcvth_n_u16_f16: 7400 Int = Intrinsic::aarch64_neon_vcvtfp2fxu; break; 7401 } 7402 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "fcvth_n"); 7403 return Builder.CreateTrunc(Ops[0], Int16Ty); 7404 } 7405 case NEON::BI__builtin_neon_vcvth_n_f16_s16: 7406 case NEON::BI__builtin_neon_vcvth_n_f16_u16: { 7407 unsigned Int; 7408 llvm::Type* FTy = HalfTy; 7409 llvm::Type* InTy = Int32Ty; 7410 llvm::Type *Tys[2] = {FTy, InTy}; 7411 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7412 switch (BuiltinID) { 7413 default: llvm_unreachable("missing builtin ID in switch!"); 7414 case NEON::BI__builtin_neon_vcvth_n_f16_s16: 7415 Int = Intrinsic::aarch64_neon_vcvtfxs2fp; 7416 Ops[0] = Builder.CreateSExt(Ops[0], InTy, "sext"); 7417 break; 7418 case NEON::BI__builtin_neon_vcvth_n_f16_u16: 7419 Int = Intrinsic::aarch64_neon_vcvtfxu2fp; 7420 Ops[0] = Builder.CreateZExt(Ops[0], InTy); 7421 break; 7422 } 7423 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "fcvth_n"); 7424 } 7425 case NEON::BI__builtin_neon_vpaddd_s64: { 7426 llvm::Type *Ty = llvm::VectorType::get(Int64Ty, 2); 7427 Value *Vec = EmitScalarExpr(E->getArg(0)); 7428 // The vector is v2f64, so make sure it's bitcast to that. 7429 Vec = Builder.CreateBitCast(Vec, Ty, "v2i64"); 7430 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 7431 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 7432 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 7433 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 7434 // Pairwise addition of a v2f64 into a scalar f64. 7435 return Builder.CreateAdd(Op0, Op1, "vpaddd"); 7436 } 7437 case NEON::BI__builtin_neon_vpaddd_f64: { 7438 llvm::Type *Ty = 7439 llvm::VectorType::get(DoubleTy, 2); 7440 Value *Vec = EmitScalarExpr(E->getArg(0)); 7441 // The vector is v2f64, so make sure it's bitcast to that. 7442 Vec = Builder.CreateBitCast(Vec, Ty, "v2f64"); 7443 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 7444 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 7445 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 7446 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 7447 // Pairwise addition of a v2f64 into a scalar f64. 7448 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 7449 } 7450 case NEON::BI__builtin_neon_vpadds_f32: { 7451 llvm::Type *Ty = 7452 llvm::VectorType::get(FloatTy, 2); 7453 Value *Vec = EmitScalarExpr(E->getArg(0)); 7454 // The vector is v2f32, so make sure it's bitcast to that. 7455 Vec = Builder.CreateBitCast(Vec, Ty, "v2f32"); 7456 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 7457 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 7458 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 7459 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 7460 // Pairwise addition of a v2f32 into a scalar f32. 7461 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 7462 } 7463 case NEON::BI__builtin_neon_vceqzd_s64: 7464 case NEON::BI__builtin_neon_vceqzd_f64: 7465 case NEON::BI__builtin_neon_vceqzs_f32: 7466 case NEON::BI__builtin_neon_vceqzh_f16: 7467 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7468 return EmitAArch64CompareBuiltinExpr( 7469 Ops[0], ConvertType(E->getCallReturnType(getContext())), 7470 ICmpInst::FCMP_OEQ, ICmpInst::ICMP_EQ, "vceqz"); 7471 case NEON::BI__builtin_neon_vcgezd_s64: 7472 case NEON::BI__builtin_neon_vcgezd_f64: 7473 case NEON::BI__builtin_neon_vcgezs_f32: 7474 case NEON::BI__builtin_neon_vcgezh_f16: 7475 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7476 return EmitAArch64CompareBuiltinExpr( 7477 Ops[0], ConvertType(E->getCallReturnType(getContext())), 7478 ICmpInst::FCMP_OGE, ICmpInst::ICMP_SGE, "vcgez"); 7479 case NEON::BI__builtin_neon_vclezd_s64: 7480 case NEON::BI__builtin_neon_vclezd_f64: 7481 case NEON::BI__builtin_neon_vclezs_f32: 7482 case NEON::BI__builtin_neon_vclezh_f16: 7483 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7484 return EmitAArch64CompareBuiltinExpr( 7485 Ops[0], ConvertType(E->getCallReturnType(getContext())), 7486 ICmpInst::FCMP_OLE, ICmpInst::ICMP_SLE, "vclez"); 7487 case NEON::BI__builtin_neon_vcgtzd_s64: 7488 case NEON::BI__builtin_neon_vcgtzd_f64: 7489 case NEON::BI__builtin_neon_vcgtzs_f32: 7490 case NEON::BI__builtin_neon_vcgtzh_f16: 7491 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7492 return EmitAArch64CompareBuiltinExpr( 7493 Ops[0], ConvertType(E->getCallReturnType(getContext())), 7494 ICmpInst::FCMP_OGT, ICmpInst::ICMP_SGT, "vcgtz"); 7495 case NEON::BI__builtin_neon_vcltzd_s64: 7496 case NEON::BI__builtin_neon_vcltzd_f64: 7497 case NEON::BI__builtin_neon_vcltzs_f32: 7498 case NEON::BI__builtin_neon_vcltzh_f16: 7499 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7500 return EmitAArch64CompareBuiltinExpr( 7501 Ops[0], ConvertType(E->getCallReturnType(getContext())), 7502 ICmpInst::FCMP_OLT, ICmpInst::ICMP_SLT, "vcltz"); 7503 7504 case NEON::BI__builtin_neon_vceqzd_u64: { 7505 Ops.push_back(EmitScalarExpr(E->getArg(0))); 7506 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 7507 Ops[0] = 7508 Builder.CreateICmpEQ(Ops[0], llvm::Constant::getNullValue(Int64Ty)); 7509 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqzd"); 7510 } 7511 case NEON::BI__builtin_neon_vceqd_f64: 7512 case NEON::BI__builtin_neon_vcled_f64: 7513 case NEON::BI__builtin_neon_vcltd_f64: 7514 case NEON::BI__builtin_neon_vcged_f64: 7515 case NEON::BI__builtin_neon_vcgtd_f64: { 7516 llvm::CmpInst::Predicate P; 7517 switch (BuiltinID) { 7518 default: llvm_unreachable("missing builtin ID in switch!"); 7519 case NEON::BI__builtin_neon_vceqd_f64: P = llvm::FCmpInst::FCMP_OEQ; break; 7520 case NEON::BI__builtin_neon_vcled_f64: P = llvm::FCmpInst::FCMP_OLE; break; 7521 case NEON::BI__builtin_neon_vcltd_f64: P = llvm::FCmpInst::FCMP_OLT; break; 7522 case NEON::BI__builtin_neon_vcged_f64: P = llvm::FCmpInst::FCMP_OGE; break; 7523 case NEON::BI__builtin_neon_vcgtd_f64: P = llvm::FCmpInst::FCMP_OGT; break; 7524 } 7525 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7526 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 7527 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 7528 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 7529 return Builder.CreateSExt(Ops[0], Int64Ty, "vcmpd"); 7530 } 7531 case NEON::BI__builtin_neon_vceqs_f32: 7532 case NEON::BI__builtin_neon_vcles_f32: 7533 case NEON::BI__builtin_neon_vclts_f32: 7534 case NEON::BI__builtin_neon_vcges_f32: 7535 case NEON::BI__builtin_neon_vcgts_f32: { 7536 llvm::CmpInst::Predicate P; 7537 switch (BuiltinID) { 7538 default: llvm_unreachable("missing builtin ID in switch!"); 7539 case NEON::BI__builtin_neon_vceqs_f32: P = llvm::FCmpInst::FCMP_OEQ; break; 7540 case NEON::BI__builtin_neon_vcles_f32: P = llvm::FCmpInst::FCMP_OLE; break; 7541 case NEON::BI__builtin_neon_vclts_f32: P = llvm::FCmpInst::FCMP_OLT; break; 7542 case NEON::BI__builtin_neon_vcges_f32: P = llvm::FCmpInst::FCMP_OGE; break; 7543 case NEON::BI__builtin_neon_vcgts_f32: P = llvm::FCmpInst::FCMP_OGT; break; 7544 } 7545 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7546 Ops[0] = Builder.CreateBitCast(Ops[0], FloatTy); 7547 Ops[1] = Builder.CreateBitCast(Ops[1], FloatTy); 7548 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 7549 return Builder.CreateSExt(Ops[0], Int32Ty, "vcmpd"); 7550 } 7551 case NEON::BI__builtin_neon_vceqh_f16: 7552 case NEON::BI__builtin_neon_vcleh_f16: 7553 case NEON::BI__builtin_neon_vclth_f16: 7554 case NEON::BI__builtin_neon_vcgeh_f16: 7555 case NEON::BI__builtin_neon_vcgth_f16: { 7556 llvm::CmpInst::Predicate P; 7557 switch (BuiltinID) { 7558 default: llvm_unreachable("missing builtin ID in switch!"); 7559 case NEON::BI__builtin_neon_vceqh_f16: P = llvm::FCmpInst::FCMP_OEQ; break; 7560 case NEON::BI__builtin_neon_vcleh_f16: P = llvm::FCmpInst::FCMP_OLE; break; 7561 case NEON::BI__builtin_neon_vclth_f16: P = llvm::FCmpInst::FCMP_OLT; break; 7562 case NEON::BI__builtin_neon_vcgeh_f16: P = llvm::FCmpInst::FCMP_OGE; break; 7563 case NEON::BI__builtin_neon_vcgth_f16: P = llvm::FCmpInst::FCMP_OGT; break; 7564 } 7565 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7566 Ops[0] = Builder.CreateBitCast(Ops[0], HalfTy); 7567 Ops[1] = Builder.CreateBitCast(Ops[1], HalfTy); 7568 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 7569 return Builder.CreateSExt(Ops[0], Int16Ty, "vcmpd"); 7570 } 7571 case NEON::BI__builtin_neon_vceqd_s64: 7572 case NEON::BI__builtin_neon_vceqd_u64: 7573 case NEON::BI__builtin_neon_vcgtd_s64: 7574 case NEON::BI__builtin_neon_vcgtd_u64: 7575 case NEON::BI__builtin_neon_vcltd_s64: 7576 case NEON::BI__builtin_neon_vcltd_u64: 7577 case NEON::BI__builtin_neon_vcged_u64: 7578 case NEON::BI__builtin_neon_vcged_s64: 7579 case NEON::BI__builtin_neon_vcled_u64: 7580 case NEON::BI__builtin_neon_vcled_s64: { 7581 llvm::CmpInst::Predicate P; 7582 switch (BuiltinID) { 7583 default: llvm_unreachable("missing builtin ID in switch!"); 7584 case NEON::BI__builtin_neon_vceqd_s64: 7585 case NEON::BI__builtin_neon_vceqd_u64:P = llvm::ICmpInst::ICMP_EQ;break; 7586 case NEON::BI__builtin_neon_vcgtd_s64:P = llvm::ICmpInst::ICMP_SGT;break; 7587 case NEON::BI__builtin_neon_vcgtd_u64:P = llvm::ICmpInst::ICMP_UGT;break; 7588 case NEON::BI__builtin_neon_vcltd_s64:P = llvm::ICmpInst::ICMP_SLT;break; 7589 case NEON::BI__builtin_neon_vcltd_u64:P = llvm::ICmpInst::ICMP_ULT;break; 7590 case NEON::BI__builtin_neon_vcged_u64:P = llvm::ICmpInst::ICMP_UGE;break; 7591 case NEON::BI__builtin_neon_vcged_s64:P = llvm::ICmpInst::ICMP_SGE;break; 7592 case NEON::BI__builtin_neon_vcled_u64:P = llvm::ICmpInst::ICMP_ULE;break; 7593 case NEON::BI__builtin_neon_vcled_s64:P = llvm::ICmpInst::ICMP_SLE;break; 7594 } 7595 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7596 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 7597 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 7598 Ops[0] = Builder.CreateICmp(P, Ops[0], Ops[1]); 7599 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqd"); 7600 } 7601 case NEON::BI__builtin_neon_vtstd_s64: 7602 case NEON::BI__builtin_neon_vtstd_u64: { 7603 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7604 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 7605 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 7606 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 7607 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 7608 llvm::Constant::getNullValue(Int64Ty)); 7609 return Builder.CreateSExt(Ops[0], Int64Ty, "vtstd"); 7610 } 7611 case NEON::BI__builtin_neon_vset_lane_i8: 7612 case NEON::BI__builtin_neon_vset_lane_i16: 7613 case NEON::BI__builtin_neon_vset_lane_i32: 7614 case NEON::BI__builtin_neon_vset_lane_i64: 7615 case NEON::BI__builtin_neon_vset_lane_f32: 7616 case NEON::BI__builtin_neon_vsetq_lane_i8: 7617 case NEON::BI__builtin_neon_vsetq_lane_i16: 7618 case NEON::BI__builtin_neon_vsetq_lane_i32: 7619 case NEON::BI__builtin_neon_vsetq_lane_i64: 7620 case NEON::BI__builtin_neon_vsetq_lane_f32: 7621 Ops.push_back(EmitScalarExpr(E->getArg(2))); 7622 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 7623 case NEON::BI__builtin_neon_vset_lane_f64: 7624 // The vector type needs a cast for the v1f64 variant. 7625 Ops[1] = Builder.CreateBitCast(Ops[1], 7626 llvm::VectorType::get(DoubleTy, 1)); 7627 Ops.push_back(EmitScalarExpr(E->getArg(2))); 7628 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 7629 case NEON::BI__builtin_neon_vsetq_lane_f64: 7630 // The vector type needs a cast for the v2f64 variant. 7631 Ops[1] = Builder.CreateBitCast(Ops[1], 7632 llvm::VectorType::get(DoubleTy, 2)); 7633 Ops.push_back(EmitScalarExpr(E->getArg(2))); 7634 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 7635 7636 case NEON::BI__builtin_neon_vget_lane_i8: 7637 case NEON::BI__builtin_neon_vdupb_lane_i8: 7638 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 8)); 7639 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 7640 "vget_lane"); 7641 case NEON::BI__builtin_neon_vgetq_lane_i8: 7642 case NEON::BI__builtin_neon_vdupb_laneq_i8: 7643 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 16)); 7644 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 7645 "vgetq_lane"); 7646 case NEON::BI__builtin_neon_vget_lane_i16: 7647 case NEON::BI__builtin_neon_vduph_lane_i16: 7648 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 4)); 7649 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 7650 "vget_lane"); 7651 case NEON::BI__builtin_neon_vgetq_lane_i16: 7652 case NEON::BI__builtin_neon_vduph_laneq_i16: 7653 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 8)); 7654 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 7655 "vgetq_lane"); 7656 case NEON::BI__builtin_neon_vget_lane_i32: 7657 case NEON::BI__builtin_neon_vdups_lane_i32: 7658 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 2)); 7659 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 7660 "vget_lane"); 7661 case NEON::BI__builtin_neon_vdups_lane_f32: 7662 Ops[0] = Builder.CreateBitCast(Ops[0], 7663 llvm::VectorType::get(FloatTy, 2)); 7664 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 7665 "vdups_lane"); 7666 case NEON::BI__builtin_neon_vgetq_lane_i32: 7667 case NEON::BI__builtin_neon_vdups_laneq_i32: 7668 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 7669 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 7670 "vgetq_lane"); 7671 case NEON::BI__builtin_neon_vget_lane_i64: 7672 case NEON::BI__builtin_neon_vdupd_lane_i64: 7673 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 1)); 7674 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 7675 "vget_lane"); 7676 case NEON::BI__builtin_neon_vdupd_lane_f64: 7677 Ops[0] = Builder.CreateBitCast(Ops[0], 7678 llvm::VectorType::get(DoubleTy, 1)); 7679 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 7680 "vdupd_lane"); 7681 case NEON::BI__builtin_neon_vgetq_lane_i64: 7682 case NEON::BI__builtin_neon_vdupd_laneq_i64: 7683 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 7684 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 7685 "vgetq_lane"); 7686 case NEON::BI__builtin_neon_vget_lane_f32: 7687 Ops[0] = Builder.CreateBitCast(Ops[0], 7688 llvm::VectorType::get(FloatTy, 2)); 7689 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 7690 "vget_lane"); 7691 case NEON::BI__builtin_neon_vget_lane_f64: 7692 Ops[0] = Builder.CreateBitCast(Ops[0], 7693 llvm::VectorType::get(DoubleTy, 1)); 7694 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 7695 "vget_lane"); 7696 case NEON::BI__builtin_neon_vgetq_lane_f32: 7697 case NEON::BI__builtin_neon_vdups_laneq_f32: 7698 Ops[0] = Builder.CreateBitCast(Ops[0], 7699 llvm::VectorType::get(FloatTy, 4)); 7700 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 7701 "vgetq_lane"); 7702 case NEON::BI__builtin_neon_vgetq_lane_f64: 7703 case NEON::BI__builtin_neon_vdupd_laneq_f64: 7704 Ops[0] = Builder.CreateBitCast(Ops[0], 7705 llvm::VectorType::get(DoubleTy, 2)); 7706 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 7707 "vgetq_lane"); 7708 case NEON::BI__builtin_neon_vaddh_f16: 7709 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7710 return Builder.CreateFAdd(Ops[0], Ops[1], "vaddh"); 7711 case NEON::BI__builtin_neon_vsubh_f16: 7712 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7713 return Builder.CreateFSub(Ops[0], Ops[1], "vsubh"); 7714 case NEON::BI__builtin_neon_vmulh_f16: 7715 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7716 return Builder.CreateFMul(Ops[0], Ops[1], "vmulh"); 7717 case NEON::BI__builtin_neon_vdivh_f16: 7718 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7719 return Builder.CreateFDiv(Ops[0], Ops[1], "vdivh"); 7720 case NEON::BI__builtin_neon_vfmah_f16: { 7721 Function *F = CGM.getIntrinsic(Intrinsic::fma, HalfTy); 7722 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 7723 return Builder.CreateCall(F, 7724 {EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2)), Ops[0]}); 7725 } 7726 case NEON::BI__builtin_neon_vfmsh_f16: { 7727 Function *F = CGM.getIntrinsic(Intrinsic::fma, HalfTy); 7728 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(HalfTy); 7729 Value* Sub = Builder.CreateFSub(Zero, EmitScalarExpr(E->getArg(1)), "vsubh"); 7730 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 7731 return Builder.CreateCall(F, {Sub, EmitScalarExpr(E->getArg(2)), Ops[0]}); 7732 } 7733 case NEON::BI__builtin_neon_vaddd_s64: 7734 case NEON::BI__builtin_neon_vaddd_u64: 7735 return Builder.CreateAdd(Ops[0], EmitScalarExpr(E->getArg(1)), "vaddd"); 7736 case NEON::BI__builtin_neon_vsubd_s64: 7737 case NEON::BI__builtin_neon_vsubd_u64: 7738 return Builder.CreateSub(Ops[0], EmitScalarExpr(E->getArg(1)), "vsubd"); 7739 case NEON::BI__builtin_neon_vqdmlalh_s16: 7740 case NEON::BI__builtin_neon_vqdmlslh_s16: { 7741 SmallVector<Value *, 2> ProductOps; 7742 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 7743 ProductOps.push_back(vectorWrapScalar16(EmitScalarExpr(E->getArg(2)))); 7744 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 7745 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 7746 ProductOps, "vqdmlXl"); 7747 Constant *CI = ConstantInt::get(SizeTy, 0); 7748 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 7749 7750 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlalh_s16 7751 ? Intrinsic::aarch64_neon_sqadd 7752 : Intrinsic::aarch64_neon_sqsub; 7753 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int32Ty), Ops, "vqdmlXl"); 7754 } 7755 case NEON::BI__builtin_neon_vqshlud_n_s64: { 7756 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7757 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 7758 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqshlu, Int64Ty), 7759 Ops, "vqshlu_n"); 7760 } 7761 case NEON::BI__builtin_neon_vqshld_n_u64: 7762 case NEON::BI__builtin_neon_vqshld_n_s64: { 7763 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vqshld_n_u64 7764 ? Intrinsic::aarch64_neon_uqshl 7765 : Intrinsic::aarch64_neon_sqshl; 7766 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7767 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 7768 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vqshl_n"); 7769 } 7770 case NEON::BI__builtin_neon_vrshrd_n_u64: 7771 case NEON::BI__builtin_neon_vrshrd_n_s64: { 7772 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrshrd_n_u64 7773 ? Intrinsic::aarch64_neon_urshl 7774 : Intrinsic::aarch64_neon_srshl; 7775 Ops.push_back(EmitScalarExpr(E->getArg(1))); 7776 int SV = cast<ConstantInt>(Ops[1])->getSExtValue(); 7777 Ops[1] = ConstantInt::get(Int64Ty, -SV); 7778 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vrshr_n"); 7779 } 7780 case NEON::BI__builtin_neon_vrsrad_n_u64: 7781 case NEON::BI__builtin_neon_vrsrad_n_s64: { 7782 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrsrad_n_u64 7783 ? Intrinsic::aarch64_neon_urshl 7784 : Intrinsic::aarch64_neon_srshl; 7785 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 7786 Ops.push_back(Builder.CreateNeg(EmitScalarExpr(E->getArg(2)))); 7787 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Int64Ty), 7788 {Ops[1], Builder.CreateSExt(Ops[2], Int64Ty)}); 7789 return Builder.CreateAdd(Ops[0], Builder.CreateBitCast(Ops[1], Int64Ty)); 7790 } 7791 case NEON::BI__builtin_neon_vshld_n_s64: 7792 case NEON::BI__builtin_neon_vshld_n_u64: { 7793 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 7794 return Builder.CreateShl( 7795 Ops[0], ConstantInt::get(Int64Ty, Amt->getZExtValue()), "shld_n"); 7796 } 7797 case NEON::BI__builtin_neon_vshrd_n_s64: { 7798 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 7799 return Builder.CreateAShr( 7800 Ops[0], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 7801 Amt->getZExtValue())), 7802 "shrd_n"); 7803 } 7804 case NEON::BI__builtin_neon_vshrd_n_u64: { 7805 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 7806 uint64_t ShiftAmt = Amt->getZExtValue(); 7807 // Right-shifting an unsigned value by its size yields 0. 7808 if (ShiftAmt == 64) 7809 return ConstantInt::get(Int64Ty, 0); 7810 return Builder.CreateLShr(Ops[0], ConstantInt::get(Int64Ty, ShiftAmt), 7811 "shrd_n"); 7812 } 7813 case NEON::BI__builtin_neon_vsrad_n_s64: { 7814 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 7815 Ops[1] = Builder.CreateAShr( 7816 Ops[1], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 7817 Amt->getZExtValue())), 7818 "shrd_n"); 7819 return Builder.CreateAdd(Ops[0], Ops[1]); 7820 } 7821 case NEON::BI__builtin_neon_vsrad_n_u64: { 7822 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 7823 uint64_t ShiftAmt = Amt->getZExtValue(); 7824 // Right-shifting an unsigned value by its size yields 0. 7825 // As Op + 0 = Op, return Ops[0] directly. 7826 if (ShiftAmt == 64) 7827 return Ops[0]; 7828 Ops[1] = Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, ShiftAmt), 7829 "shrd_n"); 7830 return Builder.CreateAdd(Ops[0], Ops[1]); 7831 } 7832 case NEON::BI__builtin_neon_vqdmlalh_lane_s16: 7833 case NEON::BI__builtin_neon_vqdmlalh_laneq_s16: 7834 case NEON::BI__builtin_neon_vqdmlslh_lane_s16: 7835 case NEON::BI__builtin_neon_vqdmlslh_laneq_s16: { 7836 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 7837 "lane"); 7838 SmallVector<Value *, 2> ProductOps; 7839 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 7840 ProductOps.push_back(vectorWrapScalar16(Ops[2])); 7841 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 7842 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 7843 ProductOps, "vqdmlXl"); 7844 Constant *CI = ConstantInt::get(SizeTy, 0); 7845 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 7846 Ops.pop_back(); 7847 7848 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlalh_lane_s16 || 7849 BuiltinID == NEON::BI__builtin_neon_vqdmlalh_laneq_s16) 7850 ? Intrinsic::aarch64_neon_sqadd 7851 : Intrinsic::aarch64_neon_sqsub; 7852 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int32Ty), Ops, "vqdmlXl"); 7853 } 7854 case NEON::BI__builtin_neon_vqdmlals_s32: 7855 case NEON::BI__builtin_neon_vqdmlsls_s32: { 7856 SmallVector<Value *, 2> ProductOps; 7857 ProductOps.push_back(Ops[1]); 7858 ProductOps.push_back(EmitScalarExpr(E->getArg(2))); 7859 Ops[1] = 7860 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 7861 ProductOps, "vqdmlXl"); 7862 7863 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlals_s32 7864 ? Intrinsic::aarch64_neon_sqadd 7865 : Intrinsic::aarch64_neon_sqsub; 7866 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int64Ty), Ops, "vqdmlXl"); 7867 } 7868 case NEON::BI__builtin_neon_vqdmlals_lane_s32: 7869 case NEON::BI__builtin_neon_vqdmlals_laneq_s32: 7870 case NEON::BI__builtin_neon_vqdmlsls_lane_s32: 7871 case NEON::BI__builtin_neon_vqdmlsls_laneq_s32: { 7872 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 7873 "lane"); 7874 SmallVector<Value *, 2> ProductOps; 7875 ProductOps.push_back(Ops[1]); 7876 ProductOps.push_back(Ops[2]); 7877 Ops[1] = 7878 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 7879 ProductOps, "vqdmlXl"); 7880 Ops.pop_back(); 7881 7882 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlals_lane_s32 || 7883 BuiltinID == NEON::BI__builtin_neon_vqdmlals_laneq_s32) 7884 ? Intrinsic::aarch64_neon_sqadd 7885 : Intrinsic::aarch64_neon_sqsub; 7886 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl"); 7887 } 7888 } 7889 7890 llvm::VectorType *VTy = GetNeonType(this, Type); 7891 llvm::Type *Ty = VTy; 7892 if (!Ty) 7893 return nullptr; 7894 7895 // Not all intrinsics handled by the common case work for AArch64 yet, so only 7896 // defer to common code if it's been added to our special map. 7897 Builtin = findNeonIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID, 7898 AArch64SIMDIntrinsicsProvenSorted); 7899 7900 if (Builtin) 7901 return EmitCommonNeonBuiltinExpr( 7902 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 7903 Builtin->NameHint, Builtin->TypeModifier, E, Ops, 7904 /*never use addresses*/ Address::invalid(), Address::invalid(), Arch); 7905 7906 if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops, Arch)) 7907 return V; 7908 7909 unsigned Int; 7910 switch (BuiltinID) { 7911 default: return nullptr; 7912 case NEON::BI__builtin_neon_vbsl_v: 7913 case NEON::BI__builtin_neon_vbslq_v: { 7914 llvm::Type *BitTy = llvm::VectorType::getInteger(VTy); 7915 Ops[0] = Builder.CreateBitCast(Ops[0], BitTy, "vbsl"); 7916 Ops[1] = Builder.CreateBitCast(Ops[1], BitTy, "vbsl"); 7917 Ops[2] = Builder.CreateBitCast(Ops[2], BitTy, "vbsl"); 7918 7919 Ops[1] = Builder.CreateAnd(Ops[0], Ops[1], "vbsl"); 7920 Ops[2] = Builder.CreateAnd(Builder.CreateNot(Ops[0]), Ops[2], "vbsl"); 7921 Ops[0] = Builder.CreateOr(Ops[1], Ops[2], "vbsl"); 7922 return Builder.CreateBitCast(Ops[0], Ty); 7923 } 7924 case NEON::BI__builtin_neon_vfma_lane_v: 7925 case NEON::BI__builtin_neon_vfmaq_lane_v: { // Only used for FP types 7926 // The ARM builtins (and instructions) have the addend as the first 7927 // operand, but the 'fma' intrinsics have it last. Swap it around here. 7928 Value *Addend = Ops[0]; 7929 Value *Multiplicand = Ops[1]; 7930 Value *LaneSource = Ops[2]; 7931 Ops[0] = Multiplicand; 7932 Ops[1] = LaneSource; 7933 Ops[2] = Addend; 7934 7935 // Now adjust things to handle the lane access. 7936 llvm::Type *SourceTy = BuiltinID == NEON::BI__builtin_neon_vfmaq_lane_v ? 7937 llvm::VectorType::get(VTy->getElementType(), VTy->getNumElements() / 2) : 7938 VTy; 7939 llvm::Constant *cst = cast<Constant>(Ops[3]); 7940 Value *SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), cst); 7941 Ops[1] = Builder.CreateBitCast(Ops[1], SourceTy); 7942 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV, "lane"); 7943 7944 Ops.pop_back(); 7945 Int = Intrinsic::fma; 7946 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmla"); 7947 } 7948 case NEON::BI__builtin_neon_vfma_laneq_v: { 7949 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 7950 // v1f64 fma should be mapped to Neon scalar f64 fma 7951 if (VTy && VTy->getElementType() == DoubleTy) { 7952 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 7953 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 7954 llvm::Type *VTy = GetNeonType(this, 7955 NeonTypeFlags(NeonTypeFlags::Float64, false, true)); 7956 Ops[2] = Builder.CreateBitCast(Ops[2], VTy); 7957 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 7958 Function *F = CGM.getIntrinsic(Intrinsic::fma, DoubleTy); 7959 Value *Result = Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 7960 return Builder.CreateBitCast(Result, Ty); 7961 } 7962 Function *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 7963 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7964 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7965 7966 llvm::Type *STy = llvm::VectorType::get(VTy->getElementType(), 7967 VTy->getNumElements() * 2); 7968 Ops[2] = Builder.CreateBitCast(Ops[2], STy); 7969 Value* SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), 7970 cast<ConstantInt>(Ops[3])); 7971 Ops[2] = Builder.CreateShuffleVector(Ops[2], Ops[2], SV, "lane"); 7972 7973 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 7974 } 7975 case NEON::BI__builtin_neon_vfmaq_laneq_v: { 7976 Function *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 7977 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 7978 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 7979 7980 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 7981 Ops[2] = EmitNeonSplat(Ops[2], cast<ConstantInt>(Ops[3])); 7982 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 7983 } 7984 case NEON::BI__builtin_neon_vfmah_lane_f16: 7985 case NEON::BI__builtin_neon_vfmas_lane_f32: 7986 case NEON::BI__builtin_neon_vfmah_laneq_f16: 7987 case NEON::BI__builtin_neon_vfmas_laneq_f32: 7988 case NEON::BI__builtin_neon_vfmad_lane_f64: 7989 case NEON::BI__builtin_neon_vfmad_laneq_f64: { 7990 Ops.push_back(EmitScalarExpr(E->getArg(3))); 7991 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 7992 Function *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 7993 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 7994 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 7995 } 7996 case NEON::BI__builtin_neon_vmull_v: 7997 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 7998 Int = usgn ? Intrinsic::aarch64_neon_umull : Intrinsic::aarch64_neon_smull; 7999 if (Type.isPoly()) Int = Intrinsic::aarch64_neon_pmull; 8000 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 8001 case NEON::BI__builtin_neon_vmax_v: 8002 case NEON::BI__builtin_neon_vmaxq_v: 8003 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 8004 Int = usgn ? Intrinsic::aarch64_neon_umax : Intrinsic::aarch64_neon_smax; 8005 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmax; 8006 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmax"); 8007 case NEON::BI__builtin_neon_vmaxh_f16: { 8008 Ops.push_back(EmitScalarExpr(E->getArg(1))); 8009 Int = Intrinsic::aarch64_neon_fmax; 8010 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vmax"); 8011 } 8012 case NEON::BI__builtin_neon_vmin_v: 8013 case NEON::BI__builtin_neon_vminq_v: 8014 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 8015 Int = usgn ? Intrinsic::aarch64_neon_umin : Intrinsic::aarch64_neon_smin; 8016 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmin; 8017 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmin"); 8018 case NEON::BI__builtin_neon_vminh_f16: { 8019 Ops.push_back(EmitScalarExpr(E->getArg(1))); 8020 Int = Intrinsic::aarch64_neon_fmin; 8021 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vmin"); 8022 } 8023 case NEON::BI__builtin_neon_vabd_v: 8024 case NEON::BI__builtin_neon_vabdq_v: 8025 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 8026 Int = usgn ? Intrinsic::aarch64_neon_uabd : Intrinsic::aarch64_neon_sabd; 8027 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fabd; 8028 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vabd"); 8029 case NEON::BI__builtin_neon_vpadal_v: 8030 case NEON::BI__builtin_neon_vpadalq_v: { 8031 unsigned ArgElts = VTy->getNumElements(); 8032 llvm::IntegerType *EltTy = cast<IntegerType>(VTy->getElementType()); 8033 unsigned BitWidth = EltTy->getBitWidth(); 8034 llvm::Type *ArgTy = llvm::VectorType::get( 8035 llvm::IntegerType::get(getLLVMContext(), BitWidth/2), 2*ArgElts); 8036 llvm::Type* Tys[2] = { VTy, ArgTy }; 8037 Int = usgn ? Intrinsic::aarch64_neon_uaddlp : Intrinsic::aarch64_neon_saddlp; 8038 SmallVector<llvm::Value*, 1> TmpOps; 8039 TmpOps.push_back(Ops[1]); 8040 Function *F = CGM.getIntrinsic(Int, Tys); 8041 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vpadal"); 8042 llvm::Value *addend = Builder.CreateBitCast(Ops[0], tmp->getType()); 8043 return Builder.CreateAdd(tmp, addend); 8044 } 8045 case NEON::BI__builtin_neon_vpmin_v: 8046 case NEON::BI__builtin_neon_vpminq_v: 8047 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 8048 Int = usgn ? Intrinsic::aarch64_neon_uminp : Intrinsic::aarch64_neon_sminp; 8049 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fminp; 8050 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmin"); 8051 case NEON::BI__builtin_neon_vpmax_v: 8052 case NEON::BI__builtin_neon_vpmaxq_v: 8053 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 8054 Int = usgn ? Intrinsic::aarch64_neon_umaxp : Intrinsic::aarch64_neon_smaxp; 8055 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmaxp; 8056 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmax"); 8057 case NEON::BI__builtin_neon_vminnm_v: 8058 case NEON::BI__builtin_neon_vminnmq_v: 8059 Int = Intrinsic::aarch64_neon_fminnm; 8060 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vminnm"); 8061 case NEON::BI__builtin_neon_vminnmh_f16: 8062 Ops.push_back(EmitScalarExpr(E->getArg(1))); 8063 Int = Intrinsic::aarch64_neon_fminnm; 8064 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vminnm"); 8065 case NEON::BI__builtin_neon_vmaxnm_v: 8066 case NEON::BI__builtin_neon_vmaxnmq_v: 8067 Int = Intrinsic::aarch64_neon_fmaxnm; 8068 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmaxnm"); 8069 case NEON::BI__builtin_neon_vmaxnmh_f16: 8070 Ops.push_back(EmitScalarExpr(E->getArg(1))); 8071 Int = Intrinsic::aarch64_neon_fmaxnm; 8072 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vmaxnm"); 8073 case NEON::BI__builtin_neon_vrecpss_f32: { 8074 Ops.push_back(EmitScalarExpr(E->getArg(1))); 8075 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, FloatTy), 8076 Ops, "vrecps"); 8077 } 8078 case NEON::BI__builtin_neon_vrecpsd_f64: 8079 Ops.push_back(EmitScalarExpr(E->getArg(1))); 8080 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, DoubleTy), 8081 Ops, "vrecps"); 8082 case NEON::BI__builtin_neon_vrecpsh_f16: 8083 Ops.push_back(EmitScalarExpr(E->getArg(1))); 8084 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, HalfTy), 8085 Ops, "vrecps"); 8086 case NEON::BI__builtin_neon_vqshrun_n_v: 8087 Int = Intrinsic::aarch64_neon_sqshrun; 8088 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrun_n"); 8089 case NEON::BI__builtin_neon_vqrshrun_n_v: 8090 Int = Intrinsic::aarch64_neon_sqrshrun; 8091 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrun_n"); 8092 case NEON::BI__builtin_neon_vqshrn_n_v: 8093 Int = usgn ? Intrinsic::aarch64_neon_uqshrn : Intrinsic::aarch64_neon_sqshrn; 8094 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n"); 8095 case NEON::BI__builtin_neon_vrshrn_n_v: 8096 Int = Intrinsic::aarch64_neon_rshrn; 8097 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshrn_n"); 8098 case NEON::BI__builtin_neon_vqrshrn_n_v: 8099 Int = usgn ? Intrinsic::aarch64_neon_uqrshrn : Intrinsic::aarch64_neon_sqrshrn; 8100 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n"); 8101 case NEON::BI__builtin_neon_vrndah_f16: { 8102 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8103 Int = Intrinsic::round; 8104 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrnda"); 8105 } 8106 case NEON::BI__builtin_neon_vrnda_v: 8107 case NEON::BI__builtin_neon_vrndaq_v: { 8108 Int = Intrinsic::round; 8109 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrnda"); 8110 } 8111 case NEON::BI__builtin_neon_vrndih_f16: { 8112 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8113 Int = Intrinsic::nearbyint; 8114 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndi"); 8115 } 8116 case NEON::BI__builtin_neon_vrndmh_f16: { 8117 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8118 Int = Intrinsic::floor; 8119 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndm"); 8120 } 8121 case NEON::BI__builtin_neon_vrndm_v: 8122 case NEON::BI__builtin_neon_vrndmq_v: { 8123 Int = Intrinsic::floor; 8124 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndm"); 8125 } 8126 case NEON::BI__builtin_neon_vrndnh_f16: { 8127 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8128 Int = Intrinsic::aarch64_neon_frintn; 8129 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndn"); 8130 } 8131 case NEON::BI__builtin_neon_vrndn_v: 8132 case NEON::BI__builtin_neon_vrndnq_v: { 8133 Int = Intrinsic::aarch64_neon_frintn; 8134 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndn"); 8135 } 8136 case NEON::BI__builtin_neon_vrndns_f32: { 8137 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8138 Int = Intrinsic::aarch64_neon_frintn; 8139 return EmitNeonCall(CGM.getIntrinsic(Int, FloatTy), Ops, "vrndn"); 8140 } 8141 case NEON::BI__builtin_neon_vrndph_f16: { 8142 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8143 Int = Intrinsic::ceil; 8144 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndp"); 8145 } 8146 case NEON::BI__builtin_neon_vrndp_v: 8147 case NEON::BI__builtin_neon_vrndpq_v: { 8148 Int = Intrinsic::ceil; 8149 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndp"); 8150 } 8151 case NEON::BI__builtin_neon_vrndxh_f16: { 8152 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8153 Int = Intrinsic::rint; 8154 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndx"); 8155 } 8156 case NEON::BI__builtin_neon_vrndx_v: 8157 case NEON::BI__builtin_neon_vrndxq_v: { 8158 Int = Intrinsic::rint; 8159 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndx"); 8160 } 8161 case NEON::BI__builtin_neon_vrndh_f16: { 8162 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8163 Int = Intrinsic::trunc; 8164 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vrndz"); 8165 } 8166 case NEON::BI__builtin_neon_vrnd_v: 8167 case NEON::BI__builtin_neon_vrndq_v: { 8168 Int = Intrinsic::trunc; 8169 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndz"); 8170 } 8171 case NEON::BI__builtin_neon_vcvt_f64_v: 8172 case NEON::BI__builtin_neon_vcvtq_f64_v: 8173 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 8174 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad)); 8175 return usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 8176 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 8177 case NEON::BI__builtin_neon_vcvt_f64_f32: { 8178 assert(Type.getEltType() == NeonTypeFlags::Float64 && quad && 8179 "unexpected vcvt_f64_f32 builtin"); 8180 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float32, false, false); 8181 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 8182 8183 return Builder.CreateFPExt(Ops[0], Ty, "vcvt"); 8184 } 8185 case NEON::BI__builtin_neon_vcvt_f32_f64: { 8186 assert(Type.getEltType() == NeonTypeFlags::Float32 && 8187 "unexpected vcvt_f32_f64 builtin"); 8188 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float64, false, true); 8189 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 8190 8191 return Builder.CreateFPTrunc(Ops[0], Ty, "vcvt"); 8192 } 8193 case NEON::BI__builtin_neon_vcvt_s32_v: 8194 case NEON::BI__builtin_neon_vcvt_u32_v: 8195 case NEON::BI__builtin_neon_vcvt_s64_v: 8196 case NEON::BI__builtin_neon_vcvt_u64_v: 8197 case NEON::BI__builtin_neon_vcvt_s16_v: 8198 case NEON::BI__builtin_neon_vcvt_u16_v: 8199 case NEON::BI__builtin_neon_vcvtq_s32_v: 8200 case NEON::BI__builtin_neon_vcvtq_u32_v: 8201 case NEON::BI__builtin_neon_vcvtq_s64_v: 8202 case NEON::BI__builtin_neon_vcvtq_u64_v: 8203 case NEON::BI__builtin_neon_vcvtq_s16_v: 8204 case NEON::BI__builtin_neon_vcvtq_u16_v: { 8205 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 8206 if (usgn) 8207 return Builder.CreateFPToUI(Ops[0], Ty); 8208 return Builder.CreateFPToSI(Ops[0], Ty); 8209 } 8210 case NEON::BI__builtin_neon_vcvta_s16_v: 8211 case NEON::BI__builtin_neon_vcvta_u16_v: 8212 case NEON::BI__builtin_neon_vcvta_s32_v: 8213 case NEON::BI__builtin_neon_vcvtaq_s16_v: 8214 case NEON::BI__builtin_neon_vcvtaq_s32_v: 8215 case NEON::BI__builtin_neon_vcvta_u32_v: 8216 case NEON::BI__builtin_neon_vcvtaq_u16_v: 8217 case NEON::BI__builtin_neon_vcvtaq_u32_v: 8218 case NEON::BI__builtin_neon_vcvta_s64_v: 8219 case NEON::BI__builtin_neon_vcvtaq_s64_v: 8220 case NEON::BI__builtin_neon_vcvta_u64_v: 8221 case NEON::BI__builtin_neon_vcvtaq_u64_v: { 8222 Int = usgn ? Intrinsic::aarch64_neon_fcvtau : Intrinsic::aarch64_neon_fcvtas; 8223 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 8224 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvta"); 8225 } 8226 case NEON::BI__builtin_neon_vcvtm_s16_v: 8227 case NEON::BI__builtin_neon_vcvtm_s32_v: 8228 case NEON::BI__builtin_neon_vcvtmq_s16_v: 8229 case NEON::BI__builtin_neon_vcvtmq_s32_v: 8230 case NEON::BI__builtin_neon_vcvtm_u16_v: 8231 case NEON::BI__builtin_neon_vcvtm_u32_v: 8232 case NEON::BI__builtin_neon_vcvtmq_u16_v: 8233 case NEON::BI__builtin_neon_vcvtmq_u32_v: 8234 case NEON::BI__builtin_neon_vcvtm_s64_v: 8235 case NEON::BI__builtin_neon_vcvtmq_s64_v: 8236 case NEON::BI__builtin_neon_vcvtm_u64_v: 8237 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 8238 Int = usgn ? Intrinsic::aarch64_neon_fcvtmu : Intrinsic::aarch64_neon_fcvtms; 8239 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 8240 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtm"); 8241 } 8242 case NEON::BI__builtin_neon_vcvtn_s16_v: 8243 case NEON::BI__builtin_neon_vcvtn_s32_v: 8244 case NEON::BI__builtin_neon_vcvtnq_s16_v: 8245 case NEON::BI__builtin_neon_vcvtnq_s32_v: 8246 case NEON::BI__builtin_neon_vcvtn_u16_v: 8247 case NEON::BI__builtin_neon_vcvtn_u32_v: 8248 case NEON::BI__builtin_neon_vcvtnq_u16_v: 8249 case NEON::BI__builtin_neon_vcvtnq_u32_v: 8250 case NEON::BI__builtin_neon_vcvtn_s64_v: 8251 case NEON::BI__builtin_neon_vcvtnq_s64_v: 8252 case NEON::BI__builtin_neon_vcvtn_u64_v: 8253 case NEON::BI__builtin_neon_vcvtnq_u64_v: { 8254 Int = usgn ? Intrinsic::aarch64_neon_fcvtnu : Intrinsic::aarch64_neon_fcvtns; 8255 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 8256 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtn"); 8257 } 8258 case NEON::BI__builtin_neon_vcvtp_s16_v: 8259 case NEON::BI__builtin_neon_vcvtp_s32_v: 8260 case NEON::BI__builtin_neon_vcvtpq_s16_v: 8261 case NEON::BI__builtin_neon_vcvtpq_s32_v: 8262 case NEON::BI__builtin_neon_vcvtp_u16_v: 8263 case NEON::BI__builtin_neon_vcvtp_u32_v: 8264 case NEON::BI__builtin_neon_vcvtpq_u16_v: 8265 case NEON::BI__builtin_neon_vcvtpq_u32_v: 8266 case NEON::BI__builtin_neon_vcvtp_s64_v: 8267 case NEON::BI__builtin_neon_vcvtpq_s64_v: 8268 case NEON::BI__builtin_neon_vcvtp_u64_v: 8269 case NEON::BI__builtin_neon_vcvtpq_u64_v: { 8270 Int = usgn ? Intrinsic::aarch64_neon_fcvtpu : Intrinsic::aarch64_neon_fcvtps; 8271 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 8272 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtp"); 8273 } 8274 case NEON::BI__builtin_neon_vmulx_v: 8275 case NEON::BI__builtin_neon_vmulxq_v: { 8276 Int = Intrinsic::aarch64_neon_fmulx; 8277 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmulx"); 8278 } 8279 case NEON::BI__builtin_neon_vmulxh_lane_f16: 8280 case NEON::BI__builtin_neon_vmulxh_laneq_f16: { 8281 // vmulx_lane should be mapped to Neon scalar mulx after 8282 // extracting the scalar element 8283 Ops.push_back(EmitScalarExpr(E->getArg(2))); 8284 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 8285 Ops.pop_back(); 8286 Int = Intrinsic::aarch64_neon_fmulx; 8287 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vmulx"); 8288 } 8289 case NEON::BI__builtin_neon_vmul_lane_v: 8290 case NEON::BI__builtin_neon_vmul_laneq_v: { 8291 // v1f64 vmul_lane should be mapped to Neon scalar mul lane 8292 bool Quad = false; 8293 if (BuiltinID == NEON::BI__builtin_neon_vmul_laneq_v) 8294 Quad = true; 8295 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 8296 llvm::Type *VTy = GetNeonType(this, 8297 NeonTypeFlags(NeonTypeFlags::Float64, false, Quad)); 8298 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 8299 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 8300 Value *Result = Builder.CreateFMul(Ops[0], Ops[1]); 8301 return Builder.CreateBitCast(Result, Ty); 8302 } 8303 case NEON::BI__builtin_neon_vnegd_s64: 8304 return Builder.CreateNeg(EmitScalarExpr(E->getArg(0)), "vnegd"); 8305 case NEON::BI__builtin_neon_vnegh_f16: 8306 return Builder.CreateFNeg(EmitScalarExpr(E->getArg(0)), "vnegh"); 8307 case NEON::BI__builtin_neon_vpmaxnm_v: 8308 case NEON::BI__builtin_neon_vpmaxnmq_v: { 8309 Int = Intrinsic::aarch64_neon_fmaxnmp; 8310 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmaxnm"); 8311 } 8312 case NEON::BI__builtin_neon_vpminnm_v: 8313 case NEON::BI__builtin_neon_vpminnmq_v: { 8314 Int = Intrinsic::aarch64_neon_fminnmp; 8315 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpminnm"); 8316 } 8317 case NEON::BI__builtin_neon_vsqrth_f16: { 8318 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8319 Int = Intrinsic::sqrt; 8320 return EmitNeonCall(CGM.getIntrinsic(Int, HalfTy), Ops, "vsqrt"); 8321 } 8322 case NEON::BI__builtin_neon_vsqrt_v: 8323 case NEON::BI__builtin_neon_vsqrtq_v: { 8324 Int = Intrinsic::sqrt; 8325 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 8326 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqrt"); 8327 } 8328 case NEON::BI__builtin_neon_vrbit_v: 8329 case NEON::BI__builtin_neon_vrbitq_v: { 8330 Int = Intrinsic::aarch64_neon_rbit; 8331 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrbit"); 8332 } 8333 case NEON::BI__builtin_neon_vaddv_u8: 8334 // FIXME: These are handled by the AArch64 scalar code. 8335 usgn = true; 8336 LLVM_FALLTHROUGH; 8337 case NEON::BI__builtin_neon_vaddv_s8: { 8338 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 8339 Ty = Int32Ty; 8340 VTy = llvm::VectorType::get(Int8Ty, 8); 8341 llvm::Type *Tys[2] = { Ty, VTy }; 8342 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8343 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 8344 return Builder.CreateTrunc(Ops[0], Int8Ty); 8345 } 8346 case NEON::BI__builtin_neon_vaddv_u16: 8347 usgn = true; 8348 LLVM_FALLTHROUGH; 8349 case NEON::BI__builtin_neon_vaddv_s16: { 8350 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 8351 Ty = Int32Ty; 8352 VTy = llvm::VectorType::get(Int16Ty, 4); 8353 llvm::Type *Tys[2] = { Ty, VTy }; 8354 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8355 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 8356 return Builder.CreateTrunc(Ops[0], Int16Ty); 8357 } 8358 case NEON::BI__builtin_neon_vaddvq_u8: 8359 usgn = true; 8360 LLVM_FALLTHROUGH; 8361 case NEON::BI__builtin_neon_vaddvq_s8: { 8362 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 8363 Ty = Int32Ty; 8364 VTy = llvm::VectorType::get(Int8Ty, 16); 8365 llvm::Type *Tys[2] = { Ty, VTy }; 8366 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8367 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 8368 return Builder.CreateTrunc(Ops[0], Int8Ty); 8369 } 8370 case NEON::BI__builtin_neon_vaddvq_u16: 8371 usgn = true; 8372 LLVM_FALLTHROUGH; 8373 case NEON::BI__builtin_neon_vaddvq_s16: { 8374 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 8375 Ty = Int32Ty; 8376 VTy = llvm::VectorType::get(Int16Ty, 8); 8377 llvm::Type *Tys[2] = { Ty, VTy }; 8378 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8379 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 8380 return Builder.CreateTrunc(Ops[0], Int16Ty); 8381 } 8382 case NEON::BI__builtin_neon_vmaxv_u8: { 8383 Int = Intrinsic::aarch64_neon_umaxv; 8384 Ty = Int32Ty; 8385 VTy = llvm::VectorType::get(Int8Ty, 8); 8386 llvm::Type *Tys[2] = { Ty, VTy }; 8387 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8388 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 8389 return Builder.CreateTrunc(Ops[0], Int8Ty); 8390 } 8391 case NEON::BI__builtin_neon_vmaxv_u16: { 8392 Int = Intrinsic::aarch64_neon_umaxv; 8393 Ty = Int32Ty; 8394 VTy = llvm::VectorType::get(Int16Ty, 4); 8395 llvm::Type *Tys[2] = { Ty, VTy }; 8396 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8397 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 8398 return Builder.CreateTrunc(Ops[0], Int16Ty); 8399 } 8400 case NEON::BI__builtin_neon_vmaxvq_u8: { 8401 Int = Intrinsic::aarch64_neon_umaxv; 8402 Ty = Int32Ty; 8403 VTy = llvm::VectorType::get(Int8Ty, 16); 8404 llvm::Type *Tys[2] = { Ty, VTy }; 8405 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8406 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 8407 return Builder.CreateTrunc(Ops[0], Int8Ty); 8408 } 8409 case NEON::BI__builtin_neon_vmaxvq_u16: { 8410 Int = Intrinsic::aarch64_neon_umaxv; 8411 Ty = Int32Ty; 8412 VTy = llvm::VectorType::get(Int16Ty, 8); 8413 llvm::Type *Tys[2] = { Ty, VTy }; 8414 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8415 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 8416 return Builder.CreateTrunc(Ops[0], Int16Ty); 8417 } 8418 case NEON::BI__builtin_neon_vmaxv_s8: { 8419 Int = Intrinsic::aarch64_neon_smaxv; 8420 Ty = Int32Ty; 8421 VTy = llvm::VectorType::get(Int8Ty, 8); 8422 llvm::Type *Tys[2] = { Ty, VTy }; 8423 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8424 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 8425 return Builder.CreateTrunc(Ops[0], Int8Ty); 8426 } 8427 case NEON::BI__builtin_neon_vmaxv_s16: { 8428 Int = Intrinsic::aarch64_neon_smaxv; 8429 Ty = Int32Ty; 8430 VTy = llvm::VectorType::get(Int16Ty, 4); 8431 llvm::Type *Tys[2] = { Ty, VTy }; 8432 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8433 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 8434 return Builder.CreateTrunc(Ops[0], Int16Ty); 8435 } 8436 case NEON::BI__builtin_neon_vmaxvq_s8: { 8437 Int = Intrinsic::aarch64_neon_smaxv; 8438 Ty = Int32Ty; 8439 VTy = llvm::VectorType::get(Int8Ty, 16); 8440 llvm::Type *Tys[2] = { Ty, VTy }; 8441 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8442 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 8443 return Builder.CreateTrunc(Ops[0], Int8Ty); 8444 } 8445 case NEON::BI__builtin_neon_vmaxvq_s16: { 8446 Int = Intrinsic::aarch64_neon_smaxv; 8447 Ty = Int32Ty; 8448 VTy = llvm::VectorType::get(Int16Ty, 8); 8449 llvm::Type *Tys[2] = { Ty, VTy }; 8450 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8451 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 8452 return Builder.CreateTrunc(Ops[0], Int16Ty); 8453 } 8454 case NEON::BI__builtin_neon_vmaxv_f16: { 8455 Int = Intrinsic::aarch64_neon_fmaxv; 8456 Ty = HalfTy; 8457 VTy = llvm::VectorType::get(HalfTy, 4); 8458 llvm::Type *Tys[2] = { Ty, VTy }; 8459 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8460 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 8461 return Builder.CreateTrunc(Ops[0], HalfTy); 8462 } 8463 case NEON::BI__builtin_neon_vmaxvq_f16: { 8464 Int = Intrinsic::aarch64_neon_fmaxv; 8465 Ty = HalfTy; 8466 VTy = llvm::VectorType::get(HalfTy, 8); 8467 llvm::Type *Tys[2] = { Ty, VTy }; 8468 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8469 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 8470 return Builder.CreateTrunc(Ops[0], HalfTy); 8471 } 8472 case NEON::BI__builtin_neon_vminv_u8: { 8473 Int = Intrinsic::aarch64_neon_uminv; 8474 Ty = Int32Ty; 8475 VTy = llvm::VectorType::get(Int8Ty, 8); 8476 llvm::Type *Tys[2] = { Ty, VTy }; 8477 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8478 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 8479 return Builder.CreateTrunc(Ops[0], Int8Ty); 8480 } 8481 case NEON::BI__builtin_neon_vminv_u16: { 8482 Int = Intrinsic::aarch64_neon_uminv; 8483 Ty = Int32Ty; 8484 VTy = llvm::VectorType::get(Int16Ty, 4); 8485 llvm::Type *Tys[2] = { Ty, VTy }; 8486 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8487 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 8488 return Builder.CreateTrunc(Ops[0], Int16Ty); 8489 } 8490 case NEON::BI__builtin_neon_vminvq_u8: { 8491 Int = Intrinsic::aarch64_neon_uminv; 8492 Ty = Int32Ty; 8493 VTy = llvm::VectorType::get(Int8Ty, 16); 8494 llvm::Type *Tys[2] = { Ty, VTy }; 8495 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8496 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 8497 return Builder.CreateTrunc(Ops[0], Int8Ty); 8498 } 8499 case NEON::BI__builtin_neon_vminvq_u16: { 8500 Int = Intrinsic::aarch64_neon_uminv; 8501 Ty = Int32Ty; 8502 VTy = llvm::VectorType::get(Int16Ty, 8); 8503 llvm::Type *Tys[2] = { Ty, VTy }; 8504 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8505 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 8506 return Builder.CreateTrunc(Ops[0], Int16Ty); 8507 } 8508 case NEON::BI__builtin_neon_vminv_s8: { 8509 Int = Intrinsic::aarch64_neon_sminv; 8510 Ty = Int32Ty; 8511 VTy = llvm::VectorType::get(Int8Ty, 8); 8512 llvm::Type *Tys[2] = { Ty, VTy }; 8513 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8514 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 8515 return Builder.CreateTrunc(Ops[0], Int8Ty); 8516 } 8517 case NEON::BI__builtin_neon_vminv_s16: { 8518 Int = Intrinsic::aarch64_neon_sminv; 8519 Ty = Int32Ty; 8520 VTy = llvm::VectorType::get(Int16Ty, 4); 8521 llvm::Type *Tys[2] = { Ty, VTy }; 8522 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8523 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 8524 return Builder.CreateTrunc(Ops[0], Int16Ty); 8525 } 8526 case NEON::BI__builtin_neon_vminvq_s8: { 8527 Int = Intrinsic::aarch64_neon_sminv; 8528 Ty = Int32Ty; 8529 VTy = llvm::VectorType::get(Int8Ty, 16); 8530 llvm::Type *Tys[2] = { Ty, VTy }; 8531 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8532 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 8533 return Builder.CreateTrunc(Ops[0], Int8Ty); 8534 } 8535 case NEON::BI__builtin_neon_vminvq_s16: { 8536 Int = Intrinsic::aarch64_neon_sminv; 8537 Ty = Int32Ty; 8538 VTy = llvm::VectorType::get(Int16Ty, 8); 8539 llvm::Type *Tys[2] = { Ty, VTy }; 8540 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8541 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 8542 return Builder.CreateTrunc(Ops[0], Int16Ty); 8543 } 8544 case NEON::BI__builtin_neon_vminv_f16: { 8545 Int = Intrinsic::aarch64_neon_fminv; 8546 Ty = HalfTy; 8547 VTy = llvm::VectorType::get(HalfTy, 4); 8548 llvm::Type *Tys[2] = { Ty, VTy }; 8549 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8550 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 8551 return Builder.CreateTrunc(Ops[0], HalfTy); 8552 } 8553 case NEON::BI__builtin_neon_vminvq_f16: { 8554 Int = Intrinsic::aarch64_neon_fminv; 8555 Ty = HalfTy; 8556 VTy = llvm::VectorType::get(HalfTy, 8); 8557 llvm::Type *Tys[2] = { Ty, VTy }; 8558 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8559 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 8560 return Builder.CreateTrunc(Ops[0], HalfTy); 8561 } 8562 case NEON::BI__builtin_neon_vmaxnmv_f16: { 8563 Int = Intrinsic::aarch64_neon_fmaxnmv; 8564 Ty = HalfTy; 8565 VTy = llvm::VectorType::get(HalfTy, 4); 8566 llvm::Type *Tys[2] = { Ty, VTy }; 8567 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8568 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxnmv"); 8569 return Builder.CreateTrunc(Ops[0], HalfTy); 8570 } 8571 case NEON::BI__builtin_neon_vmaxnmvq_f16: { 8572 Int = Intrinsic::aarch64_neon_fmaxnmv; 8573 Ty = HalfTy; 8574 VTy = llvm::VectorType::get(HalfTy, 8); 8575 llvm::Type *Tys[2] = { Ty, VTy }; 8576 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8577 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxnmv"); 8578 return Builder.CreateTrunc(Ops[0], HalfTy); 8579 } 8580 case NEON::BI__builtin_neon_vminnmv_f16: { 8581 Int = Intrinsic::aarch64_neon_fminnmv; 8582 Ty = HalfTy; 8583 VTy = llvm::VectorType::get(HalfTy, 4); 8584 llvm::Type *Tys[2] = { Ty, VTy }; 8585 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8586 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminnmv"); 8587 return Builder.CreateTrunc(Ops[0], HalfTy); 8588 } 8589 case NEON::BI__builtin_neon_vminnmvq_f16: { 8590 Int = Intrinsic::aarch64_neon_fminnmv; 8591 Ty = HalfTy; 8592 VTy = llvm::VectorType::get(HalfTy, 8); 8593 llvm::Type *Tys[2] = { Ty, VTy }; 8594 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8595 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminnmv"); 8596 return Builder.CreateTrunc(Ops[0], HalfTy); 8597 } 8598 case NEON::BI__builtin_neon_vmul_n_f64: { 8599 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 8600 Value *RHS = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), DoubleTy); 8601 return Builder.CreateFMul(Ops[0], RHS); 8602 } 8603 case NEON::BI__builtin_neon_vaddlv_u8: { 8604 Int = Intrinsic::aarch64_neon_uaddlv; 8605 Ty = Int32Ty; 8606 VTy = llvm::VectorType::get(Int8Ty, 8); 8607 llvm::Type *Tys[2] = { Ty, VTy }; 8608 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8609 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 8610 return Builder.CreateTrunc(Ops[0], Int16Ty); 8611 } 8612 case NEON::BI__builtin_neon_vaddlv_u16: { 8613 Int = Intrinsic::aarch64_neon_uaddlv; 8614 Ty = Int32Ty; 8615 VTy = llvm::VectorType::get(Int16Ty, 4); 8616 llvm::Type *Tys[2] = { Ty, VTy }; 8617 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8618 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 8619 } 8620 case NEON::BI__builtin_neon_vaddlvq_u8: { 8621 Int = Intrinsic::aarch64_neon_uaddlv; 8622 Ty = Int32Ty; 8623 VTy = llvm::VectorType::get(Int8Ty, 16); 8624 llvm::Type *Tys[2] = { Ty, VTy }; 8625 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8626 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 8627 return Builder.CreateTrunc(Ops[0], Int16Ty); 8628 } 8629 case NEON::BI__builtin_neon_vaddlvq_u16: { 8630 Int = Intrinsic::aarch64_neon_uaddlv; 8631 Ty = Int32Ty; 8632 VTy = llvm::VectorType::get(Int16Ty, 8); 8633 llvm::Type *Tys[2] = { Ty, VTy }; 8634 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8635 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 8636 } 8637 case NEON::BI__builtin_neon_vaddlv_s8: { 8638 Int = Intrinsic::aarch64_neon_saddlv; 8639 Ty = Int32Ty; 8640 VTy = llvm::VectorType::get(Int8Ty, 8); 8641 llvm::Type *Tys[2] = { Ty, VTy }; 8642 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8643 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 8644 return Builder.CreateTrunc(Ops[0], Int16Ty); 8645 } 8646 case NEON::BI__builtin_neon_vaddlv_s16: { 8647 Int = Intrinsic::aarch64_neon_saddlv; 8648 Ty = Int32Ty; 8649 VTy = llvm::VectorType::get(Int16Ty, 4); 8650 llvm::Type *Tys[2] = { Ty, VTy }; 8651 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8652 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 8653 } 8654 case NEON::BI__builtin_neon_vaddlvq_s8: { 8655 Int = Intrinsic::aarch64_neon_saddlv; 8656 Ty = Int32Ty; 8657 VTy = llvm::VectorType::get(Int8Ty, 16); 8658 llvm::Type *Tys[2] = { Ty, VTy }; 8659 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8660 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 8661 return Builder.CreateTrunc(Ops[0], Int16Ty); 8662 } 8663 case NEON::BI__builtin_neon_vaddlvq_s16: { 8664 Int = Intrinsic::aarch64_neon_saddlv; 8665 Ty = Int32Ty; 8666 VTy = llvm::VectorType::get(Int16Ty, 8); 8667 llvm::Type *Tys[2] = { Ty, VTy }; 8668 Ops.push_back(EmitScalarExpr(E->getArg(0))); 8669 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 8670 } 8671 case NEON::BI__builtin_neon_vsri_n_v: 8672 case NEON::BI__builtin_neon_vsriq_n_v: { 8673 Int = Intrinsic::aarch64_neon_vsri; 8674 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 8675 return EmitNeonCall(Intrin, Ops, "vsri_n"); 8676 } 8677 case NEON::BI__builtin_neon_vsli_n_v: 8678 case NEON::BI__builtin_neon_vsliq_n_v: { 8679 Int = Intrinsic::aarch64_neon_vsli; 8680 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 8681 return EmitNeonCall(Intrin, Ops, "vsli_n"); 8682 } 8683 case NEON::BI__builtin_neon_vsra_n_v: 8684 case NEON::BI__builtin_neon_vsraq_n_v: 8685 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 8686 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 8687 return Builder.CreateAdd(Ops[0], Ops[1]); 8688 case NEON::BI__builtin_neon_vrsra_n_v: 8689 case NEON::BI__builtin_neon_vrsraq_n_v: { 8690 Int = usgn ? Intrinsic::aarch64_neon_urshl : Intrinsic::aarch64_neon_srshl; 8691 SmallVector<llvm::Value*,2> TmpOps; 8692 TmpOps.push_back(Ops[1]); 8693 TmpOps.push_back(Ops[2]); 8694 Function* F = CGM.getIntrinsic(Int, Ty); 8695 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vrshr_n", 1, true); 8696 Ops[0] = Builder.CreateBitCast(Ops[0], VTy); 8697 return Builder.CreateAdd(Ops[0], tmp); 8698 } 8699 case NEON::BI__builtin_neon_vld1_v: 8700 case NEON::BI__builtin_neon_vld1q_v: { 8701 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 8702 auto Alignment = CharUnits::fromQuantity( 8703 BuiltinID == NEON::BI__builtin_neon_vld1_v ? 8 : 16); 8704 return Builder.CreateAlignedLoad(VTy, Ops[0], Alignment); 8705 } 8706 case NEON::BI__builtin_neon_vst1_v: 8707 case NEON::BI__builtin_neon_vst1q_v: 8708 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 8709 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 8710 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8711 case NEON::BI__builtin_neon_vld1_lane_v: 8712 case NEON::BI__builtin_neon_vld1q_lane_v: { 8713 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8714 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 8715 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 8716 auto Alignment = CharUnits::fromQuantity( 8717 BuiltinID == NEON::BI__builtin_neon_vld1_lane_v ? 8 : 16); 8718 Ops[0] = 8719 Builder.CreateAlignedLoad(VTy->getElementType(), Ops[0], Alignment); 8720 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vld1_lane"); 8721 } 8722 case NEON::BI__builtin_neon_vld1_dup_v: 8723 case NEON::BI__builtin_neon_vld1q_dup_v: { 8724 Value *V = UndefValue::get(Ty); 8725 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 8726 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 8727 auto Alignment = CharUnits::fromQuantity( 8728 BuiltinID == NEON::BI__builtin_neon_vld1_dup_v ? 8 : 16); 8729 Ops[0] = 8730 Builder.CreateAlignedLoad(VTy->getElementType(), Ops[0], Alignment); 8731 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 8732 Ops[0] = Builder.CreateInsertElement(V, Ops[0], CI); 8733 return EmitNeonSplat(Ops[0], CI); 8734 } 8735 case NEON::BI__builtin_neon_vst1_lane_v: 8736 case NEON::BI__builtin_neon_vst1q_lane_v: 8737 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8738 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 8739 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 8740 return Builder.CreateDefaultAlignedStore(Ops[1], 8741 Builder.CreateBitCast(Ops[0], Ty)); 8742 case NEON::BI__builtin_neon_vld2_v: 8743 case NEON::BI__builtin_neon_vld2q_v: { 8744 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 8745 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 8746 llvm::Type *Tys[2] = { VTy, PTy }; 8747 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2, Tys); 8748 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 8749 Ops[0] = Builder.CreateBitCast(Ops[0], 8750 llvm::PointerType::getUnqual(Ops[1]->getType())); 8751 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8752 } 8753 case NEON::BI__builtin_neon_vld3_v: 8754 case NEON::BI__builtin_neon_vld3q_v: { 8755 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 8756 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 8757 llvm::Type *Tys[2] = { VTy, PTy }; 8758 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3, Tys); 8759 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 8760 Ops[0] = Builder.CreateBitCast(Ops[0], 8761 llvm::PointerType::getUnqual(Ops[1]->getType())); 8762 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8763 } 8764 case NEON::BI__builtin_neon_vld4_v: 8765 case NEON::BI__builtin_neon_vld4q_v: { 8766 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 8767 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 8768 llvm::Type *Tys[2] = { VTy, PTy }; 8769 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4, Tys); 8770 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 8771 Ops[0] = Builder.CreateBitCast(Ops[0], 8772 llvm::PointerType::getUnqual(Ops[1]->getType())); 8773 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8774 } 8775 case NEON::BI__builtin_neon_vld2_dup_v: 8776 case NEON::BI__builtin_neon_vld2q_dup_v: { 8777 llvm::Type *PTy = 8778 llvm::PointerType::getUnqual(VTy->getElementType()); 8779 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 8780 llvm::Type *Tys[2] = { VTy, PTy }; 8781 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2r, Tys); 8782 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 8783 Ops[0] = Builder.CreateBitCast(Ops[0], 8784 llvm::PointerType::getUnqual(Ops[1]->getType())); 8785 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8786 } 8787 case NEON::BI__builtin_neon_vld3_dup_v: 8788 case NEON::BI__builtin_neon_vld3q_dup_v: { 8789 llvm::Type *PTy = 8790 llvm::PointerType::getUnqual(VTy->getElementType()); 8791 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 8792 llvm::Type *Tys[2] = { VTy, PTy }; 8793 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3r, Tys); 8794 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 8795 Ops[0] = Builder.CreateBitCast(Ops[0], 8796 llvm::PointerType::getUnqual(Ops[1]->getType())); 8797 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8798 } 8799 case NEON::BI__builtin_neon_vld4_dup_v: 8800 case NEON::BI__builtin_neon_vld4q_dup_v: { 8801 llvm::Type *PTy = 8802 llvm::PointerType::getUnqual(VTy->getElementType()); 8803 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 8804 llvm::Type *Tys[2] = { VTy, PTy }; 8805 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4r, Tys); 8806 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 8807 Ops[0] = Builder.CreateBitCast(Ops[0], 8808 llvm::PointerType::getUnqual(Ops[1]->getType())); 8809 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8810 } 8811 case NEON::BI__builtin_neon_vld2_lane_v: 8812 case NEON::BI__builtin_neon_vld2q_lane_v: { 8813 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 8814 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2lane, Tys); 8815 Ops.push_back(Ops[1]); 8816 Ops.erase(Ops.begin()+1); 8817 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8818 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8819 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 8820 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld2_lane"); 8821 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 8822 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 8823 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8824 } 8825 case NEON::BI__builtin_neon_vld3_lane_v: 8826 case NEON::BI__builtin_neon_vld3q_lane_v: { 8827 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 8828 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3lane, Tys); 8829 Ops.push_back(Ops[1]); 8830 Ops.erase(Ops.begin()+1); 8831 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8832 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8833 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 8834 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 8835 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld3_lane"); 8836 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 8837 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 8838 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8839 } 8840 case NEON::BI__builtin_neon_vld4_lane_v: 8841 case NEON::BI__builtin_neon_vld4q_lane_v: { 8842 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 8843 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4lane, Tys); 8844 Ops.push_back(Ops[1]); 8845 Ops.erase(Ops.begin()+1); 8846 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8847 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8848 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 8849 Ops[4] = Builder.CreateBitCast(Ops[4], Ty); 8850 Ops[5] = Builder.CreateZExt(Ops[5], Int64Ty); 8851 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld4_lane"); 8852 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 8853 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 8854 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 8855 } 8856 case NEON::BI__builtin_neon_vst2_v: 8857 case NEON::BI__builtin_neon_vst2q_v: { 8858 Ops.push_back(Ops[0]); 8859 Ops.erase(Ops.begin()); 8860 llvm::Type *Tys[2] = { VTy, Ops[2]->getType() }; 8861 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2, Tys), 8862 Ops, ""); 8863 } 8864 case NEON::BI__builtin_neon_vst2_lane_v: 8865 case NEON::BI__builtin_neon_vst2q_lane_v: { 8866 Ops.push_back(Ops[0]); 8867 Ops.erase(Ops.begin()); 8868 Ops[2] = Builder.CreateZExt(Ops[2], Int64Ty); 8869 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 8870 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2lane, Tys), 8871 Ops, ""); 8872 } 8873 case NEON::BI__builtin_neon_vst3_v: 8874 case NEON::BI__builtin_neon_vst3q_v: { 8875 Ops.push_back(Ops[0]); 8876 Ops.erase(Ops.begin()); 8877 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 8878 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3, Tys), 8879 Ops, ""); 8880 } 8881 case NEON::BI__builtin_neon_vst3_lane_v: 8882 case NEON::BI__builtin_neon_vst3q_lane_v: { 8883 Ops.push_back(Ops[0]); 8884 Ops.erase(Ops.begin()); 8885 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 8886 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 8887 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3lane, Tys), 8888 Ops, ""); 8889 } 8890 case NEON::BI__builtin_neon_vst4_v: 8891 case NEON::BI__builtin_neon_vst4q_v: { 8892 Ops.push_back(Ops[0]); 8893 Ops.erase(Ops.begin()); 8894 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 8895 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4, Tys), 8896 Ops, ""); 8897 } 8898 case NEON::BI__builtin_neon_vst4_lane_v: 8899 case NEON::BI__builtin_neon_vst4q_lane_v: { 8900 Ops.push_back(Ops[0]); 8901 Ops.erase(Ops.begin()); 8902 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 8903 llvm::Type *Tys[2] = { VTy, Ops[5]->getType() }; 8904 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4lane, Tys), 8905 Ops, ""); 8906 } 8907 case NEON::BI__builtin_neon_vtrn_v: 8908 case NEON::BI__builtin_neon_vtrnq_v: { 8909 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 8910 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8911 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8912 Value *SV = nullptr; 8913 8914 for (unsigned vi = 0; vi != 2; ++vi) { 8915 SmallVector<uint32_t, 16> Indices; 8916 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 8917 Indices.push_back(i+vi); 8918 Indices.push_back(i+e+vi); 8919 } 8920 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 8921 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 8922 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 8923 } 8924 return SV; 8925 } 8926 case NEON::BI__builtin_neon_vuzp_v: 8927 case NEON::BI__builtin_neon_vuzpq_v: { 8928 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 8929 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8930 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8931 Value *SV = nullptr; 8932 8933 for (unsigned vi = 0; vi != 2; ++vi) { 8934 SmallVector<uint32_t, 16> Indices; 8935 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 8936 Indices.push_back(2*i+vi); 8937 8938 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 8939 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 8940 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 8941 } 8942 return SV; 8943 } 8944 case NEON::BI__builtin_neon_vzip_v: 8945 case NEON::BI__builtin_neon_vzipq_v: { 8946 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 8947 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 8948 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 8949 Value *SV = nullptr; 8950 8951 for (unsigned vi = 0; vi != 2; ++vi) { 8952 SmallVector<uint32_t, 16> Indices; 8953 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 8954 Indices.push_back((i + vi*e) >> 1); 8955 Indices.push_back(((i + vi*e) >> 1)+e); 8956 } 8957 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 8958 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 8959 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 8960 } 8961 return SV; 8962 } 8963 case NEON::BI__builtin_neon_vqtbl1q_v: { 8964 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl1, Ty), 8965 Ops, "vtbl1"); 8966 } 8967 case NEON::BI__builtin_neon_vqtbl2q_v: { 8968 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl2, Ty), 8969 Ops, "vtbl2"); 8970 } 8971 case NEON::BI__builtin_neon_vqtbl3q_v: { 8972 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl3, Ty), 8973 Ops, "vtbl3"); 8974 } 8975 case NEON::BI__builtin_neon_vqtbl4q_v: { 8976 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl4, Ty), 8977 Ops, "vtbl4"); 8978 } 8979 case NEON::BI__builtin_neon_vqtbx1q_v: { 8980 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx1, Ty), 8981 Ops, "vtbx1"); 8982 } 8983 case NEON::BI__builtin_neon_vqtbx2q_v: { 8984 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx2, Ty), 8985 Ops, "vtbx2"); 8986 } 8987 case NEON::BI__builtin_neon_vqtbx3q_v: { 8988 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx3, Ty), 8989 Ops, "vtbx3"); 8990 } 8991 case NEON::BI__builtin_neon_vqtbx4q_v: { 8992 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx4, Ty), 8993 Ops, "vtbx4"); 8994 } 8995 case NEON::BI__builtin_neon_vsqadd_v: 8996 case NEON::BI__builtin_neon_vsqaddq_v: { 8997 Int = Intrinsic::aarch64_neon_usqadd; 8998 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqadd"); 8999 } 9000 case NEON::BI__builtin_neon_vuqadd_v: 9001 case NEON::BI__builtin_neon_vuqaddq_v: { 9002 Int = Intrinsic::aarch64_neon_suqadd; 9003 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vuqadd"); 9004 } 9005 case AArch64::BI__iso_volatile_load8: 9006 case AArch64::BI__iso_volatile_load16: 9007 case AArch64::BI__iso_volatile_load32: 9008 case AArch64::BI__iso_volatile_load64: 9009 return EmitISOVolatileLoad(E); 9010 case AArch64::BI__iso_volatile_store8: 9011 case AArch64::BI__iso_volatile_store16: 9012 case AArch64::BI__iso_volatile_store32: 9013 case AArch64::BI__iso_volatile_store64: 9014 return EmitISOVolatileStore(E); 9015 case AArch64::BI_BitScanForward: 9016 case AArch64::BI_BitScanForward64: 9017 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 9018 case AArch64::BI_BitScanReverse: 9019 case AArch64::BI_BitScanReverse64: 9020 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 9021 case AArch64::BI_InterlockedAnd64: 9022 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 9023 case AArch64::BI_InterlockedExchange64: 9024 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 9025 case AArch64::BI_InterlockedExchangeAdd64: 9026 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 9027 case AArch64::BI_InterlockedExchangeSub64: 9028 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 9029 case AArch64::BI_InterlockedOr64: 9030 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 9031 case AArch64::BI_InterlockedXor64: 9032 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 9033 case AArch64::BI_InterlockedDecrement64: 9034 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 9035 case AArch64::BI_InterlockedIncrement64: 9036 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 9037 case AArch64::BI_InterlockedExchangeAdd8_acq: 9038 case AArch64::BI_InterlockedExchangeAdd16_acq: 9039 case AArch64::BI_InterlockedExchangeAdd_acq: 9040 case AArch64::BI_InterlockedExchangeAdd64_acq: 9041 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd_acq, E); 9042 case AArch64::BI_InterlockedExchangeAdd8_rel: 9043 case AArch64::BI_InterlockedExchangeAdd16_rel: 9044 case AArch64::BI_InterlockedExchangeAdd_rel: 9045 case AArch64::BI_InterlockedExchangeAdd64_rel: 9046 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd_rel, E); 9047 case AArch64::BI_InterlockedExchangeAdd8_nf: 9048 case AArch64::BI_InterlockedExchangeAdd16_nf: 9049 case AArch64::BI_InterlockedExchangeAdd_nf: 9050 case AArch64::BI_InterlockedExchangeAdd64_nf: 9051 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd_nf, E); 9052 case AArch64::BI_InterlockedExchange8_acq: 9053 case AArch64::BI_InterlockedExchange16_acq: 9054 case AArch64::BI_InterlockedExchange_acq: 9055 case AArch64::BI_InterlockedExchange64_acq: 9056 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange_acq, E); 9057 case AArch64::BI_InterlockedExchange8_rel: 9058 case AArch64::BI_InterlockedExchange16_rel: 9059 case AArch64::BI_InterlockedExchange_rel: 9060 case AArch64::BI_InterlockedExchange64_rel: 9061 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange_rel, E); 9062 case AArch64::BI_InterlockedExchange8_nf: 9063 case AArch64::BI_InterlockedExchange16_nf: 9064 case AArch64::BI_InterlockedExchange_nf: 9065 case AArch64::BI_InterlockedExchange64_nf: 9066 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange_nf, E); 9067 case AArch64::BI_InterlockedCompareExchange8_acq: 9068 case AArch64::BI_InterlockedCompareExchange16_acq: 9069 case AArch64::BI_InterlockedCompareExchange_acq: 9070 case AArch64::BI_InterlockedCompareExchange64_acq: 9071 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedCompareExchange_acq, E); 9072 case AArch64::BI_InterlockedCompareExchange8_rel: 9073 case AArch64::BI_InterlockedCompareExchange16_rel: 9074 case AArch64::BI_InterlockedCompareExchange_rel: 9075 case AArch64::BI_InterlockedCompareExchange64_rel: 9076 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedCompareExchange_rel, E); 9077 case AArch64::BI_InterlockedCompareExchange8_nf: 9078 case AArch64::BI_InterlockedCompareExchange16_nf: 9079 case AArch64::BI_InterlockedCompareExchange_nf: 9080 case AArch64::BI_InterlockedCompareExchange64_nf: 9081 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedCompareExchange_nf, E); 9082 case AArch64::BI_InterlockedOr8_acq: 9083 case AArch64::BI_InterlockedOr16_acq: 9084 case AArch64::BI_InterlockedOr_acq: 9085 case AArch64::BI_InterlockedOr64_acq: 9086 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr_acq, E); 9087 case AArch64::BI_InterlockedOr8_rel: 9088 case AArch64::BI_InterlockedOr16_rel: 9089 case AArch64::BI_InterlockedOr_rel: 9090 case AArch64::BI_InterlockedOr64_rel: 9091 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr_rel, E); 9092 case AArch64::BI_InterlockedOr8_nf: 9093 case AArch64::BI_InterlockedOr16_nf: 9094 case AArch64::BI_InterlockedOr_nf: 9095 case AArch64::BI_InterlockedOr64_nf: 9096 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr_nf, E); 9097 case AArch64::BI_InterlockedXor8_acq: 9098 case AArch64::BI_InterlockedXor16_acq: 9099 case AArch64::BI_InterlockedXor_acq: 9100 case AArch64::BI_InterlockedXor64_acq: 9101 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor_acq, E); 9102 case AArch64::BI_InterlockedXor8_rel: 9103 case AArch64::BI_InterlockedXor16_rel: 9104 case AArch64::BI_InterlockedXor_rel: 9105 case AArch64::BI_InterlockedXor64_rel: 9106 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor_rel, E); 9107 case AArch64::BI_InterlockedXor8_nf: 9108 case AArch64::BI_InterlockedXor16_nf: 9109 case AArch64::BI_InterlockedXor_nf: 9110 case AArch64::BI_InterlockedXor64_nf: 9111 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor_nf, E); 9112 case AArch64::BI_InterlockedAnd8_acq: 9113 case AArch64::BI_InterlockedAnd16_acq: 9114 case AArch64::BI_InterlockedAnd_acq: 9115 case AArch64::BI_InterlockedAnd64_acq: 9116 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd_acq, E); 9117 case AArch64::BI_InterlockedAnd8_rel: 9118 case AArch64::BI_InterlockedAnd16_rel: 9119 case AArch64::BI_InterlockedAnd_rel: 9120 case AArch64::BI_InterlockedAnd64_rel: 9121 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd_rel, E); 9122 case AArch64::BI_InterlockedAnd8_nf: 9123 case AArch64::BI_InterlockedAnd16_nf: 9124 case AArch64::BI_InterlockedAnd_nf: 9125 case AArch64::BI_InterlockedAnd64_nf: 9126 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd_nf, E); 9127 case AArch64::BI_InterlockedIncrement16_acq: 9128 case AArch64::BI_InterlockedIncrement_acq: 9129 case AArch64::BI_InterlockedIncrement64_acq: 9130 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement_acq, E); 9131 case AArch64::BI_InterlockedIncrement16_rel: 9132 case AArch64::BI_InterlockedIncrement_rel: 9133 case AArch64::BI_InterlockedIncrement64_rel: 9134 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement_rel, E); 9135 case AArch64::BI_InterlockedIncrement16_nf: 9136 case AArch64::BI_InterlockedIncrement_nf: 9137 case AArch64::BI_InterlockedIncrement64_nf: 9138 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement_nf, E); 9139 case AArch64::BI_InterlockedDecrement16_acq: 9140 case AArch64::BI_InterlockedDecrement_acq: 9141 case AArch64::BI_InterlockedDecrement64_acq: 9142 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement_acq, E); 9143 case AArch64::BI_InterlockedDecrement16_rel: 9144 case AArch64::BI_InterlockedDecrement_rel: 9145 case AArch64::BI_InterlockedDecrement64_rel: 9146 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement_rel, E); 9147 case AArch64::BI_InterlockedDecrement16_nf: 9148 case AArch64::BI_InterlockedDecrement_nf: 9149 case AArch64::BI_InterlockedDecrement64_nf: 9150 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement_nf, E); 9151 9152 case AArch64::BI_InterlockedAdd: { 9153 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 9154 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 9155 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 9156 AtomicRMWInst::Add, Arg0, Arg1, 9157 llvm::AtomicOrdering::SequentiallyConsistent); 9158 return Builder.CreateAdd(RMWI, Arg1); 9159 } 9160 } 9161 } 9162 9163 llvm::Value *CodeGenFunction:: 9164 BuildVector(ArrayRef<llvm::Value*> Ops) { 9165 assert((Ops.size() & (Ops.size() - 1)) == 0 && 9166 "Not a power-of-two sized vector!"); 9167 bool AllConstants = true; 9168 for (unsigned i = 0, e = Ops.size(); i != e && AllConstants; ++i) 9169 AllConstants &= isa<Constant>(Ops[i]); 9170 9171 // If this is a constant vector, create a ConstantVector. 9172 if (AllConstants) { 9173 SmallVector<llvm::Constant*, 16> CstOps; 9174 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 9175 CstOps.push_back(cast<Constant>(Ops[i])); 9176 return llvm::ConstantVector::get(CstOps); 9177 } 9178 9179 // Otherwise, insertelement the values to build the vector. 9180 Value *Result = 9181 llvm::UndefValue::get(llvm::VectorType::get(Ops[0]->getType(), Ops.size())); 9182 9183 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 9184 Result = Builder.CreateInsertElement(Result, Ops[i], Builder.getInt32(i)); 9185 9186 return Result; 9187 } 9188 9189 // Convert the mask from an integer type to a vector of i1. 9190 static Value *getMaskVecValue(CodeGenFunction &CGF, Value *Mask, 9191 unsigned NumElts) { 9192 9193 llvm::VectorType *MaskTy = llvm::VectorType::get(CGF.Builder.getInt1Ty(), 9194 cast<IntegerType>(Mask->getType())->getBitWidth()); 9195 Value *MaskVec = CGF.Builder.CreateBitCast(Mask, MaskTy); 9196 9197 // If we have less than 8 elements, then the starting mask was an i8 and 9198 // we need to extract down to the right number of elements. 9199 if (NumElts < 8) { 9200 uint32_t Indices[4]; 9201 for (unsigned i = 0; i != NumElts; ++i) 9202 Indices[i] = i; 9203 MaskVec = CGF.Builder.CreateShuffleVector(MaskVec, MaskVec, 9204 makeArrayRef(Indices, NumElts), 9205 "extract"); 9206 } 9207 return MaskVec; 9208 } 9209 9210 static Value *EmitX86MaskedStore(CodeGenFunction &CGF, 9211 ArrayRef<Value *> Ops, 9212 unsigned Align) { 9213 // Cast the pointer to right type. 9214 Value *Ptr = CGF.Builder.CreateBitCast(Ops[0], 9215 llvm::PointerType::getUnqual(Ops[1]->getType())); 9216 9217 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 9218 Ops[1]->getType()->getVectorNumElements()); 9219 9220 return CGF.Builder.CreateMaskedStore(Ops[1], Ptr, Align, MaskVec); 9221 } 9222 9223 static Value *EmitX86MaskedLoad(CodeGenFunction &CGF, 9224 ArrayRef<Value *> Ops, unsigned Align) { 9225 // Cast the pointer to right type. 9226 Value *Ptr = CGF.Builder.CreateBitCast(Ops[0], 9227 llvm::PointerType::getUnqual(Ops[1]->getType())); 9228 9229 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 9230 Ops[1]->getType()->getVectorNumElements()); 9231 9232 return CGF.Builder.CreateMaskedLoad(Ptr, Align, MaskVec, Ops[1]); 9233 } 9234 9235 static Value *EmitX86ExpandLoad(CodeGenFunction &CGF, 9236 ArrayRef<Value *> Ops) { 9237 llvm::Type *ResultTy = Ops[1]->getType(); 9238 llvm::Type *PtrTy = ResultTy->getVectorElementType(); 9239 9240 // Cast the pointer to element type. 9241 Value *Ptr = CGF.Builder.CreateBitCast(Ops[0], 9242 llvm::PointerType::getUnqual(PtrTy)); 9243 9244 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 9245 ResultTy->getVectorNumElements()); 9246 9247 llvm::Function *F = CGF.CGM.getIntrinsic(Intrinsic::masked_expandload, 9248 ResultTy); 9249 return CGF.Builder.CreateCall(F, { Ptr, MaskVec, Ops[1] }); 9250 } 9251 9252 static Value *EmitX86CompressExpand(CodeGenFunction &CGF, 9253 ArrayRef<Value *> Ops, 9254 bool IsCompress) { 9255 llvm::Type *ResultTy = Ops[1]->getType(); 9256 9257 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 9258 ResultTy->getVectorNumElements()); 9259 9260 Intrinsic::ID IID = IsCompress ? Intrinsic::x86_avx512_mask_compress 9261 : Intrinsic::x86_avx512_mask_expand; 9262 llvm::Function *F = CGF.CGM.getIntrinsic(IID, ResultTy); 9263 return CGF.Builder.CreateCall(F, { Ops[0], Ops[1], MaskVec }); 9264 } 9265 9266 static Value *EmitX86CompressStore(CodeGenFunction &CGF, 9267 ArrayRef<Value *> Ops) { 9268 llvm::Type *ResultTy = Ops[1]->getType(); 9269 llvm::Type *PtrTy = ResultTy->getVectorElementType(); 9270 9271 // Cast the pointer to element type. 9272 Value *Ptr = CGF.Builder.CreateBitCast(Ops[0], 9273 llvm::PointerType::getUnqual(PtrTy)); 9274 9275 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 9276 ResultTy->getVectorNumElements()); 9277 9278 llvm::Function *F = CGF.CGM.getIntrinsic(Intrinsic::masked_compressstore, 9279 ResultTy); 9280 return CGF.Builder.CreateCall(F, { Ops[1], Ptr, MaskVec }); 9281 } 9282 9283 static Value *EmitX86MaskLogic(CodeGenFunction &CGF, Instruction::BinaryOps Opc, 9284 ArrayRef<Value *> Ops, 9285 bool InvertLHS = false) { 9286 unsigned NumElts = Ops[0]->getType()->getIntegerBitWidth(); 9287 Value *LHS = getMaskVecValue(CGF, Ops[0], NumElts); 9288 Value *RHS = getMaskVecValue(CGF, Ops[1], NumElts); 9289 9290 if (InvertLHS) 9291 LHS = CGF.Builder.CreateNot(LHS); 9292 9293 return CGF.Builder.CreateBitCast(CGF.Builder.CreateBinOp(Opc, LHS, RHS), 9294 Ops[0]->getType()); 9295 } 9296 9297 static Value *EmitX86FunnelShift(CodeGenFunction &CGF, Value *Op0, Value *Op1, 9298 Value *Amt, bool IsRight) { 9299 llvm::Type *Ty = Op0->getType(); 9300 9301 // Amount may be scalar immediate, in which case create a splat vector. 9302 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 9303 // we only care about the lowest log2 bits anyway. 9304 if (Amt->getType() != Ty) { 9305 unsigned NumElts = Ty->getVectorNumElements(); 9306 Amt = CGF.Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 9307 Amt = CGF.Builder.CreateVectorSplat(NumElts, Amt); 9308 } 9309 9310 unsigned IID = IsRight ? Intrinsic::fshr : Intrinsic::fshl; 9311 Function *F = CGF.CGM.getIntrinsic(IID, Ty); 9312 return CGF.Builder.CreateCall(F, {Op0, Op1, Amt}); 9313 } 9314 9315 static Value *EmitX86vpcom(CodeGenFunction &CGF, ArrayRef<Value *> Ops, 9316 bool IsSigned) { 9317 Value *Op0 = Ops[0]; 9318 Value *Op1 = Ops[1]; 9319 llvm::Type *Ty = Op0->getType(); 9320 uint64_t Imm = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 9321 9322 CmpInst::Predicate Pred; 9323 switch (Imm) { 9324 case 0x0: 9325 Pred = IsSigned ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; 9326 break; 9327 case 0x1: 9328 Pred = IsSigned ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; 9329 break; 9330 case 0x2: 9331 Pred = IsSigned ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; 9332 break; 9333 case 0x3: 9334 Pred = IsSigned ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; 9335 break; 9336 case 0x4: 9337 Pred = ICmpInst::ICMP_EQ; 9338 break; 9339 case 0x5: 9340 Pred = ICmpInst::ICMP_NE; 9341 break; 9342 case 0x6: 9343 return llvm::Constant::getNullValue(Ty); // FALSE 9344 case 0x7: 9345 return llvm::Constant::getAllOnesValue(Ty); // TRUE 9346 default: 9347 llvm_unreachable("Unexpected XOP vpcom/vpcomu predicate"); 9348 } 9349 9350 Value *Cmp = CGF.Builder.CreateICmp(Pred, Op0, Op1); 9351 Value *Res = CGF.Builder.CreateSExt(Cmp, Ty); 9352 return Res; 9353 } 9354 9355 static Value *EmitX86Select(CodeGenFunction &CGF, 9356 Value *Mask, Value *Op0, Value *Op1) { 9357 9358 // If the mask is all ones just return first argument. 9359 if (const auto *C = dyn_cast<Constant>(Mask)) 9360 if (C->isAllOnesValue()) 9361 return Op0; 9362 9363 Mask = getMaskVecValue(CGF, Mask, Op0->getType()->getVectorNumElements()); 9364 9365 return CGF.Builder.CreateSelect(Mask, Op0, Op1); 9366 } 9367 9368 static Value *EmitX86ScalarSelect(CodeGenFunction &CGF, 9369 Value *Mask, Value *Op0, Value *Op1) { 9370 // If the mask is all ones just return first argument. 9371 if (const auto *C = dyn_cast<Constant>(Mask)) 9372 if (C->isAllOnesValue()) 9373 return Op0; 9374 9375 llvm::VectorType *MaskTy = 9376 llvm::VectorType::get(CGF.Builder.getInt1Ty(), 9377 Mask->getType()->getIntegerBitWidth()); 9378 Mask = CGF.Builder.CreateBitCast(Mask, MaskTy); 9379 Mask = CGF.Builder.CreateExtractElement(Mask, (uint64_t)0); 9380 return CGF.Builder.CreateSelect(Mask, Op0, Op1); 9381 } 9382 9383 static Value *EmitX86MaskedCompareResult(CodeGenFunction &CGF, Value *Cmp, 9384 unsigned NumElts, Value *MaskIn) { 9385 if (MaskIn) { 9386 const auto *C = dyn_cast<Constant>(MaskIn); 9387 if (!C || !C->isAllOnesValue()) 9388 Cmp = CGF.Builder.CreateAnd(Cmp, getMaskVecValue(CGF, MaskIn, NumElts)); 9389 } 9390 9391 if (NumElts < 8) { 9392 uint32_t Indices[8]; 9393 for (unsigned i = 0; i != NumElts; ++i) 9394 Indices[i] = i; 9395 for (unsigned i = NumElts; i != 8; ++i) 9396 Indices[i] = i % NumElts + NumElts; 9397 Cmp = CGF.Builder.CreateShuffleVector( 9398 Cmp, llvm::Constant::getNullValue(Cmp->getType()), Indices); 9399 } 9400 9401 return CGF.Builder.CreateBitCast(Cmp, 9402 IntegerType::get(CGF.getLLVMContext(), 9403 std::max(NumElts, 8U))); 9404 } 9405 9406 static Value *EmitX86MaskedCompare(CodeGenFunction &CGF, unsigned CC, 9407 bool Signed, ArrayRef<Value *> Ops) { 9408 assert((Ops.size() == 2 || Ops.size() == 4) && 9409 "Unexpected number of arguments"); 9410 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 9411 Value *Cmp; 9412 9413 if (CC == 3) { 9414 Cmp = Constant::getNullValue( 9415 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 9416 } else if (CC == 7) { 9417 Cmp = Constant::getAllOnesValue( 9418 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 9419 } else { 9420 ICmpInst::Predicate Pred; 9421 switch (CC) { 9422 default: llvm_unreachable("Unknown condition code"); 9423 case 0: Pred = ICmpInst::ICMP_EQ; break; 9424 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 9425 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 9426 case 4: Pred = ICmpInst::ICMP_NE; break; 9427 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 9428 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 9429 } 9430 Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 9431 } 9432 9433 Value *MaskIn = nullptr; 9434 if (Ops.size() == 4) 9435 MaskIn = Ops[3]; 9436 9437 return EmitX86MaskedCompareResult(CGF, Cmp, NumElts, MaskIn); 9438 } 9439 9440 static Value *EmitX86ConvertToMask(CodeGenFunction &CGF, Value *In) { 9441 Value *Zero = Constant::getNullValue(In->getType()); 9442 return EmitX86MaskedCompare(CGF, 1, true, { In, Zero }); 9443 } 9444 9445 static Value *EmitX86ConvertIntToFp(CodeGenFunction &CGF, 9446 ArrayRef<Value *> Ops, bool IsSigned) { 9447 unsigned Rnd = cast<llvm::ConstantInt>(Ops[3])->getZExtValue(); 9448 llvm::Type *Ty = Ops[1]->getType(); 9449 9450 Value *Res; 9451 if (Rnd != 4) { 9452 Intrinsic::ID IID = IsSigned ? Intrinsic::x86_avx512_sitofp_round 9453 : Intrinsic::x86_avx512_uitofp_round; 9454 Function *F = CGF.CGM.getIntrinsic(IID, { Ty, Ops[0]->getType() }); 9455 Res = CGF.Builder.CreateCall(F, { Ops[0], Ops[3] }); 9456 } else { 9457 Res = IsSigned ? CGF.Builder.CreateSIToFP(Ops[0], Ty) 9458 : CGF.Builder.CreateUIToFP(Ops[0], Ty); 9459 } 9460 9461 return EmitX86Select(CGF, Ops[2], Res, Ops[1]); 9462 } 9463 9464 static Value *EmitX86Abs(CodeGenFunction &CGF, ArrayRef<Value *> Ops) { 9465 9466 llvm::Type *Ty = Ops[0]->getType(); 9467 Value *Zero = llvm::Constant::getNullValue(Ty); 9468 Value *Sub = CGF.Builder.CreateSub(Zero, Ops[0]); 9469 Value *Cmp = CGF.Builder.CreateICmp(ICmpInst::ICMP_SGT, Ops[0], Zero); 9470 Value *Res = CGF.Builder.CreateSelect(Cmp, Ops[0], Sub); 9471 return Res; 9472 } 9473 9474 static Value *EmitX86MinMax(CodeGenFunction &CGF, ICmpInst::Predicate Pred, 9475 ArrayRef<Value *> Ops) { 9476 Value *Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 9477 Value *Res = CGF.Builder.CreateSelect(Cmp, Ops[0], Ops[1]); 9478 9479 assert(Ops.size() == 2); 9480 return Res; 9481 } 9482 9483 // Lowers X86 FMA intrinsics to IR. 9484 static Value *EmitX86FMAExpr(CodeGenFunction &CGF, ArrayRef<Value *> Ops, 9485 unsigned BuiltinID, bool IsAddSub) { 9486 9487 bool Subtract = false; 9488 Intrinsic::ID IID = Intrinsic::not_intrinsic; 9489 switch (BuiltinID) { 9490 default: break; 9491 case clang::X86::BI__builtin_ia32_vfmsubps512_mask3: 9492 Subtract = true; 9493 LLVM_FALLTHROUGH; 9494 case clang::X86::BI__builtin_ia32_vfmaddps512_mask: 9495 case clang::X86::BI__builtin_ia32_vfmaddps512_maskz: 9496 case clang::X86::BI__builtin_ia32_vfmaddps512_mask3: 9497 IID = llvm::Intrinsic::x86_avx512_vfmadd_ps_512; break; 9498 case clang::X86::BI__builtin_ia32_vfmsubpd512_mask3: 9499 Subtract = true; 9500 LLVM_FALLTHROUGH; 9501 case clang::X86::BI__builtin_ia32_vfmaddpd512_mask: 9502 case clang::X86::BI__builtin_ia32_vfmaddpd512_maskz: 9503 case clang::X86::BI__builtin_ia32_vfmaddpd512_mask3: 9504 IID = llvm::Intrinsic::x86_avx512_vfmadd_pd_512; break; 9505 case clang::X86::BI__builtin_ia32_vfmsubaddps512_mask3: 9506 Subtract = true; 9507 LLVM_FALLTHROUGH; 9508 case clang::X86::BI__builtin_ia32_vfmaddsubps512_mask: 9509 case clang::X86::BI__builtin_ia32_vfmaddsubps512_maskz: 9510 case clang::X86::BI__builtin_ia32_vfmaddsubps512_mask3: 9511 IID = llvm::Intrinsic::x86_avx512_vfmaddsub_ps_512; 9512 break; 9513 case clang::X86::BI__builtin_ia32_vfmsubaddpd512_mask3: 9514 Subtract = true; 9515 LLVM_FALLTHROUGH; 9516 case clang::X86::BI__builtin_ia32_vfmaddsubpd512_mask: 9517 case clang::X86::BI__builtin_ia32_vfmaddsubpd512_maskz: 9518 case clang::X86::BI__builtin_ia32_vfmaddsubpd512_mask3: 9519 IID = llvm::Intrinsic::x86_avx512_vfmaddsub_pd_512; 9520 break; 9521 } 9522 9523 Value *A = Ops[0]; 9524 Value *B = Ops[1]; 9525 Value *C = Ops[2]; 9526 9527 if (Subtract) 9528 C = CGF.Builder.CreateFNeg(C); 9529 9530 Value *Res; 9531 9532 // Only handle in case of _MM_FROUND_CUR_DIRECTION/4 (no rounding). 9533 if (IID != Intrinsic::not_intrinsic && 9534 cast<llvm::ConstantInt>(Ops.back())->getZExtValue() != (uint64_t)4) { 9535 Function *Intr = CGF.CGM.getIntrinsic(IID); 9536 Res = CGF.Builder.CreateCall(Intr, {A, B, C, Ops.back() }); 9537 } else { 9538 llvm::Type *Ty = A->getType(); 9539 Function *FMA = CGF.CGM.getIntrinsic(Intrinsic::fma, Ty); 9540 Res = CGF.Builder.CreateCall(FMA, {A, B, C} ); 9541 9542 if (IsAddSub) { 9543 // Negate even elts in C using a mask. 9544 unsigned NumElts = Ty->getVectorNumElements(); 9545 SmallVector<uint32_t, 16> Indices(NumElts); 9546 for (unsigned i = 0; i != NumElts; ++i) 9547 Indices[i] = i + (i % 2) * NumElts; 9548 9549 Value *NegC = CGF.Builder.CreateFNeg(C); 9550 Value *FMSub = CGF.Builder.CreateCall(FMA, {A, B, NegC} ); 9551 Res = CGF.Builder.CreateShuffleVector(FMSub, Res, Indices); 9552 } 9553 } 9554 9555 // Handle any required masking. 9556 Value *MaskFalseVal = nullptr; 9557 switch (BuiltinID) { 9558 case clang::X86::BI__builtin_ia32_vfmaddps512_mask: 9559 case clang::X86::BI__builtin_ia32_vfmaddpd512_mask: 9560 case clang::X86::BI__builtin_ia32_vfmaddsubps512_mask: 9561 case clang::X86::BI__builtin_ia32_vfmaddsubpd512_mask: 9562 MaskFalseVal = Ops[0]; 9563 break; 9564 case clang::X86::BI__builtin_ia32_vfmaddps512_maskz: 9565 case clang::X86::BI__builtin_ia32_vfmaddpd512_maskz: 9566 case clang::X86::BI__builtin_ia32_vfmaddsubps512_maskz: 9567 case clang::X86::BI__builtin_ia32_vfmaddsubpd512_maskz: 9568 MaskFalseVal = Constant::getNullValue(Ops[0]->getType()); 9569 break; 9570 case clang::X86::BI__builtin_ia32_vfmsubps512_mask3: 9571 case clang::X86::BI__builtin_ia32_vfmaddps512_mask3: 9572 case clang::X86::BI__builtin_ia32_vfmsubpd512_mask3: 9573 case clang::X86::BI__builtin_ia32_vfmaddpd512_mask3: 9574 case clang::X86::BI__builtin_ia32_vfmsubaddps512_mask3: 9575 case clang::X86::BI__builtin_ia32_vfmaddsubps512_mask3: 9576 case clang::X86::BI__builtin_ia32_vfmsubaddpd512_mask3: 9577 case clang::X86::BI__builtin_ia32_vfmaddsubpd512_mask3: 9578 MaskFalseVal = Ops[2]; 9579 break; 9580 } 9581 9582 if (MaskFalseVal) 9583 return EmitX86Select(CGF, Ops[3], Res, MaskFalseVal); 9584 9585 return Res; 9586 } 9587 9588 static Value * 9589 EmitScalarFMAExpr(CodeGenFunction &CGF, MutableArrayRef<Value *> Ops, 9590 Value *Upper, bool ZeroMask = false, unsigned PTIdx = 0, 9591 bool NegAcc = false) { 9592 unsigned Rnd = 4; 9593 if (Ops.size() > 4) 9594 Rnd = cast<llvm::ConstantInt>(Ops[4])->getZExtValue(); 9595 9596 if (NegAcc) 9597 Ops[2] = CGF.Builder.CreateFNeg(Ops[2]); 9598 9599 Ops[0] = CGF.Builder.CreateExtractElement(Ops[0], (uint64_t)0); 9600 Ops[1] = CGF.Builder.CreateExtractElement(Ops[1], (uint64_t)0); 9601 Ops[2] = CGF.Builder.CreateExtractElement(Ops[2], (uint64_t)0); 9602 Value *Res; 9603 if (Rnd != 4) { 9604 Intrinsic::ID IID = Ops[0]->getType()->getPrimitiveSizeInBits() == 32 ? 9605 Intrinsic::x86_avx512_vfmadd_f32 : 9606 Intrinsic::x86_avx512_vfmadd_f64; 9607 Res = CGF.Builder.CreateCall(CGF.CGM.getIntrinsic(IID), 9608 {Ops[0], Ops[1], Ops[2], Ops[4]}); 9609 } else { 9610 Function *FMA = CGF.CGM.getIntrinsic(Intrinsic::fma, Ops[0]->getType()); 9611 Res = CGF.Builder.CreateCall(FMA, Ops.slice(0, 3)); 9612 } 9613 // If we have more than 3 arguments, we need to do masking. 9614 if (Ops.size() > 3) { 9615 Value *PassThru = ZeroMask ? Constant::getNullValue(Res->getType()) 9616 : Ops[PTIdx]; 9617 9618 // If we negated the accumulator and the its the PassThru value we need to 9619 // bypass the negate. Conveniently Upper should be the same thing in this 9620 // case. 9621 if (NegAcc && PTIdx == 2) 9622 PassThru = CGF.Builder.CreateExtractElement(Upper, (uint64_t)0); 9623 9624 Res = EmitX86ScalarSelect(CGF, Ops[3], Res, PassThru); 9625 } 9626 return CGF.Builder.CreateInsertElement(Upper, Res, (uint64_t)0); 9627 } 9628 9629 static Value *EmitX86Muldq(CodeGenFunction &CGF, bool IsSigned, 9630 ArrayRef<Value *> Ops) { 9631 llvm::Type *Ty = Ops[0]->getType(); 9632 // Arguments have a vXi32 type so cast to vXi64. 9633 Ty = llvm::VectorType::get(CGF.Int64Ty, 9634 Ty->getPrimitiveSizeInBits() / 64); 9635 Value *LHS = CGF.Builder.CreateBitCast(Ops[0], Ty); 9636 Value *RHS = CGF.Builder.CreateBitCast(Ops[1], Ty); 9637 9638 if (IsSigned) { 9639 // Shift left then arithmetic shift right. 9640 Constant *ShiftAmt = ConstantInt::get(Ty, 32); 9641 LHS = CGF.Builder.CreateShl(LHS, ShiftAmt); 9642 LHS = CGF.Builder.CreateAShr(LHS, ShiftAmt); 9643 RHS = CGF.Builder.CreateShl(RHS, ShiftAmt); 9644 RHS = CGF.Builder.CreateAShr(RHS, ShiftAmt); 9645 } else { 9646 // Clear the upper bits. 9647 Constant *Mask = ConstantInt::get(Ty, 0xffffffff); 9648 LHS = CGF.Builder.CreateAnd(LHS, Mask); 9649 RHS = CGF.Builder.CreateAnd(RHS, Mask); 9650 } 9651 9652 return CGF.Builder.CreateMul(LHS, RHS); 9653 } 9654 9655 // Emit a masked pternlog intrinsic. This only exists because the header has to 9656 // use a macro and we aren't able to pass the input argument to a pternlog 9657 // builtin and a select builtin without evaluating it twice. 9658 static Value *EmitX86Ternlog(CodeGenFunction &CGF, bool ZeroMask, 9659 ArrayRef<Value *> Ops) { 9660 llvm::Type *Ty = Ops[0]->getType(); 9661 9662 unsigned VecWidth = Ty->getPrimitiveSizeInBits(); 9663 unsigned EltWidth = Ty->getScalarSizeInBits(); 9664 Intrinsic::ID IID; 9665 if (VecWidth == 128 && EltWidth == 32) 9666 IID = Intrinsic::x86_avx512_pternlog_d_128; 9667 else if (VecWidth == 256 && EltWidth == 32) 9668 IID = Intrinsic::x86_avx512_pternlog_d_256; 9669 else if (VecWidth == 512 && EltWidth == 32) 9670 IID = Intrinsic::x86_avx512_pternlog_d_512; 9671 else if (VecWidth == 128 && EltWidth == 64) 9672 IID = Intrinsic::x86_avx512_pternlog_q_128; 9673 else if (VecWidth == 256 && EltWidth == 64) 9674 IID = Intrinsic::x86_avx512_pternlog_q_256; 9675 else if (VecWidth == 512 && EltWidth == 64) 9676 IID = Intrinsic::x86_avx512_pternlog_q_512; 9677 else 9678 llvm_unreachable("Unexpected intrinsic"); 9679 9680 Value *Ternlog = CGF.Builder.CreateCall(CGF.CGM.getIntrinsic(IID), 9681 Ops.drop_back()); 9682 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(Ty) : Ops[0]; 9683 return EmitX86Select(CGF, Ops[4], Ternlog, PassThru); 9684 } 9685 9686 static Value *EmitX86SExtMask(CodeGenFunction &CGF, Value *Op, 9687 llvm::Type *DstTy) { 9688 unsigned NumberOfElements = DstTy->getVectorNumElements(); 9689 Value *Mask = getMaskVecValue(CGF, Op, NumberOfElements); 9690 return CGF.Builder.CreateSExt(Mask, DstTy, "vpmovm2"); 9691 } 9692 9693 // Emit addition or subtraction with signed/unsigned saturation. 9694 static Value *EmitX86AddSubSatExpr(CodeGenFunction &CGF, 9695 ArrayRef<Value *> Ops, bool IsSigned, 9696 bool IsAddition) { 9697 Intrinsic::ID IID = 9698 IsSigned ? (IsAddition ? Intrinsic::sadd_sat : Intrinsic::ssub_sat) 9699 : (IsAddition ? Intrinsic::uadd_sat : Intrinsic::usub_sat); 9700 llvm::Function *F = CGF.CGM.getIntrinsic(IID, Ops[0]->getType()); 9701 return CGF.Builder.CreateCall(F, {Ops[0], Ops[1]}); 9702 } 9703 9704 Value *CodeGenFunction::EmitX86CpuIs(const CallExpr *E) { 9705 const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts(); 9706 StringRef CPUStr = cast<clang::StringLiteral>(CPUExpr)->getString(); 9707 return EmitX86CpuIs(CPUStr); 9708 } 9709 9710 Value *CodeGenFunction::EmitX86CpuIs(StringRef CPUStr) { 9711 9712 llvm::Type *Int32Ty = Builder.getInt32Ty(); 9713 9714 // Matching the struct layout from the compiler-rt/libgcc structure that is 9715 // filled in: 9716 // unsigned int __cpu_vendor; 9717 // unsigned int __cpu_type; 9718 // unsigned int __cpu_subtype; 9719 // unsigned int __cpu_features[1]; 9720 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, Int32Ty, 9721 llvm::ArrayType::get(Int32Ty, 1)); 9722 9723 // Grab the global __cpu_model. 9724 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 9725 cast<llvm::GlobalValue>(CpuModel)->setDSOLocal(true); 9726 9727 // Calculate the index needed to access the correct field based on the 9728 // range. Also adjust the expected value. 9729 unsigned Index; 9730 unsigned Value; 9731 std::tie(Index, Value) = StringSwitch<std::pair<unsigned, unsigned>>(CPUStr) 9732 #define X86_VENDOR(ENUM, STRING) \ 9733 .Case(STRING, {0u, static_cast<unsigned>(llvm::X86::ENUM)}) 9734 #define X86_CPU_TYPE_COMPAT_WITH_ALIAS(ARCHNAME, ENUM, STR, ALIAS) \ 9735 .Cases(STR, ALIAS, {1u, static_cast<unsigned>(llvm::X86::ENUM)}) 9736 #define X86_CPU_TYPE_COMPAT(ARCHNAME, ENUM, STR) \ 9737 .Case(STR, {1u, static_cast<unsigned>(llvm::X86::ENUM)}) 9738 #define X86_CPU_SUBTYPE_COMPAT(ARCHNAME, ENUM, STR) \ 9739 .Case(STR, {2u, static_cast<unsigned>(llvm::X86::ENUM)}) 9740 #include "llvm/Support/X86TargetParser.def" 9741 .Default({0, 0}); 9742 assert(Value != 0 && "Invalid CPUStr passed to CpuIs"); 9743 9744 // Grab the appropriate field from __cpu_model. 9745 llvm::Value *Idxs[] = {ConstantInt::get(Int32Ty, 0), 9746 ConstantInt::get(Int32Ty, Index)}; 9747 llvm::Value *CpuValue = Builder.CreateGEP(STy, CpuModel, Idxs); 9748 CpuValue = Builder.CreateAlignedLoad(CpuValue, CharUnits::fromQuantity(4)); 9749 9750 // Check the value of the field against the requested value. 9751 return Builder.CreateICmpEQ(CpuValue, 9752 llvm::ConstantInt::get(Int32Ty, Value)); 9753 } 9754 9755 Value *CodeGenFunction::EmitX86CpuSupports(const CallExpr *E) { 9756 const Expr *FeatureExpr = E->getArg(0)->IgnoreParenCasts(); 9757 StringRef FeatureStr = cast<StringLiteral>(FeatureExpr)->getString(); 9758 return EmitX86CpuSupports(FeatureStr); 9759 } 9760 9761 uint64_t 9762 CodeGenFunction::GetX86CpuSupportsMask(ArrayRef<StringRef> FeatureStrs) { 9763 // Processor features and mapping to processor feature value. 9764 uint64_t FeaturesMask = 0; 9765 for (const StringRef &FeatureStr : FeatureStrs) { 9766 unsigned Feature = 9767 StringSwitch<unsigned>(FeatureStr) 9768 #define X86_FEATURE_COMPAT(VAL, ENUM, STR) .Case(STR, VAL) 9769 #include "llvm/Support/X86TargetParser.def" 9770 ; 9771 FeaturesMask |= (1ULL << Feature); 9772 } 9773 return FeaturesMask; 9774 } 9775 9776 Value *CodeGenFunction::EmitX86CpuSupports(ArrayRef<StringRef> FeatureStrs) { 9777 return EmitX86CpuSupports(GetX86CpuSupportsMask(FeatureStrs)); 9778 } 9779 9780 llvm::Value *CodeGenFunction::EmitX86CpuSupports(uint64_t FeaturesMask) { 9781 uint32_t Features1 = Lo_32(FeaturesMask); 9782 uint32_t Features2 = Hi_32(FeaturesMask); 9783 9784 Value *Result = Builder.getTrue(); 9785 9786 if (Features1 != 0) { 9787 // Matching the struct layout from the compiler-rt/libgcc structure that is 9788 // filled in: 9789 // unsigned int __cpu_vendor; 9790 // unsigned int __cpu_type; 9791 // unsigned int __cpu_subtype; 9792 // unsigned int __cpu_features[1]; 9793 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, Int32Ty, 9794 llvm::ArrayType::get(Int32Ty, 1)); 9795 9796 // Grab the global __cpu_model. 9797 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 9798 cast<llvm::GlobalValue>(CpuModel)->setDSOLocal(true); 9799 9800 // Grab the first (0th) element from the field __cpu_features off of the 9801 // global in the struct STy. 9802 Value *Idxs[] = {Builder.getInt32(0), Builder.getInt32(3), 9803 Builder.getInt32(0)}; 9804 Value *CpuFeatures = Builder.CreateGEP(STy, CpuModel, Idxs); 9805 Value *Features = 9806 Builder.CreateAlignedLoad(CpuFeatures, CharUnits::fromQuantity(4)); 9807 9808 // Check the value of the bit corresponding to the feature requested. 9809 Value *Mask = Builder.getInt32(Features1); 9810 Value *Bitset = Builder.CreateAnd(Features, Mask); 9811 Value *Cmp = Builder.CreateICmpEQ(Bitset, Mask); 9812 Result = Builder.CreateAnd(Result, Cmp); 9813 } 9814 9815 if (Features2 != 0) { 9816 llvm::Constant *CpuFeatures2 = CGM.CreateRuntimeVariable(Int32Ty, 9817 "__cpu_features2"); 9818 cast<llvm::GlobalValue>(CpuFeatures2)->setDSOLocal(true); 9819 9820 Value *Features = 9821 Builder.CreateAlignedLoad(CpuFeatures2, CharUnits::fromQuantity(4)); 9822 9823 // Check the value of the bit corresponding to the feature requested. 9824 Value *Mask = Builder.getInt32(Features2); 9825 Value *Bitset = Builder.CreateAnd(Features, Mask); 9826 Value *Cmp = Builder.CreateICmpEQ(Bitset, Mask); 9827 Result = Builder.CreateAnd(Result, Cmp); 9828 } 9829 9830 return Result; 9831 } 9832 9833 Value *CodeGenFunction::EmitX86CpuInit() { 9834 llvm::FunctionType *FTy = llvm::FunctionType::get(VoidTy, 9835 /*Variadic*/ false); 9836 llvm::FunctionCallee Func = 9837 CGM.CreateRuntimeFunction(FTy, "__cpu_indicator_init"); 9838 cast<llvm::GlobalValue>(Func.getCallee())->setDSOLocal(true); 9839 cast<llvm::GlobalValue>(Func.getCallee()) 9840 ->setDLLStorageClass(llvm::GlobalValue::DefaultStorageClass); 9841 return Builder.CreateCall(Func); 9842 } 9843 9844 Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, 9845 const CallExpr *E) { 9846 if (BuiltinID == X86::BI__builtin_cpu_is) 9847 return EmitX86CpuIs(E); 9848 if (BuiltinID == X86::BI__builtin_cpu_supports) 9849 return EmitX86CpuSupports(E); 9850 if (BuiltinID == X86::BI__builtin_cpu_init) 9851 return EmitX86CpuInit(); 9852 9853 SmallVector<Value*, 4> Ops; 9854 9855 // Find out if any arguments are required to be integer constant expressions. 9856 unsigned ICEArguments = 0; 9857 ASTContext::GetBuiltinTypeError Error; 9858 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 9859 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 9860 9861 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) { 9862 // If this is a normal argument, just emit it as a scalar. 9863 if ((ICEArguments & (1 << i)) == 0) { 9864 Ops.push_back(EmitScalarExpr(E->getArg(i))); 9865 continue; 9866 } 9867 9868 // If this is required to be a constant, constant fold it so that we know 9869 // that the generated intrinsic gets a ConstantInt. 9870 llvm::APSInt Result; 9871 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 9872 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 9873 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 9874 } 9875 9876 // These exist so that the builtin that takes an immediate can be bounds 9877 // checked by clang to avoid passing bad immediates to the backend. Since 9878 // AVX has a larger immediate than SSE we would need separate builtins to 9879 // do the different bounds checking. Rather than create a clang specific 9880 // SSE only builtin, this implements eight separate builtins to match gcc 9881 // implementation. 9882 auto getCmpIntrinsicCall = [this, &Ops](Intrinsic::ID ID, unsigned Imm) { 9883 Ops.push_back(llvm::ConstantInt::get(Int8Ty, Imm)); 9884 llvm::Function *F = CGM.getIntrinsic(ID); 9885 return Builder.CreateCall(F, Ops); 9886 }; 9887 9888 // For the vector forms of FP comparisons, translate the builtins directly to 9889 // IR. 9890 // TODO: The builtins could be removed if the SSE header files used vector 9891 // extension comparisons directly (vector ordered/unordered may need 9892 // additional support via __builtin_isnan()). 9893 auto getVectorFCmpIR = [this, &Ops](CmpInst::Predicate Pred) { 9894 Value *Cmp = Builder.CreateFCmp(Pred, Ops[0], Ops[1]); 9895 llvm::VectorType *FPVecTy = cast<llvm::VectorType>(Ops[0]->getType()); 9896 llvm::VectorType *IntVecTy = llvm::VectorType::getInteger(FPVecTy); 9897 Value *Sext = Builder.CreateSExt(Cmp, IntVecTy); 9898 return Builder.CreateBitCast(Sext, FPVecTy); 9899 }; 9900 9901 switch (BuiltinID) { 9902 default: return nullptr; 9903 case X86::BI_mm_prefetch: { 9904 Value *Address = Ops[0]; 9905 ConstantInt *C = cast<ConstantInt>(Ops[1]); 9906 Value *RW = ConstantInt::get(Int32Ty, (C->getZExtValue() >> 2) & 0x1); 9907 Value *Locality = ConstantInt::get(Int32Ty, C->getZExtValue() & 0x3); 9908 Value *Data = ConstantInt::get(Int32Ty, 1); 9909 Function *F = CGM.getIntrinsic(Intrinsic::prefetch); 9910 return Builder.CreateCall(F, {Address, RW, Locality, Data}); 9911 } 9912 case X86::BI_mm_clflush: { 9913 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_clflush), 9914 Ops[0]); 9915 } 9916 case X86::BI_mm_lfence: { 9917 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_lfence)); 9918 } 9919 case X86::BI_mm_mfence: { 9920 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_mfence)); 9921 } 9922 case X86::BI_mm_sfence: { 9923 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_sfence)); 9924 } 9925 case X86::BI_mm_pause: { 9926 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_pause)); 9927 } 9928 case X86::BI__rdtsc: { 9929 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_rdtsc)); 9930 } 9931 case X86::BI__builtin_ia32_rdtscp: { 9932 Value *Call = Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_rdtscp)); 9933 Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 1), 9934 Ops[0]); 9935 return Builder.CreateExtractValue(Call, 0); 9936 } 9937 case X86::BI__builtin_ia32_lzcnt_u16: 9938 case X86::BI__builtin_ia32_lzcnt_u32: 9939 case X86::BI__builtin_ia32_lzcnt_u64: { 9940 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, Ops[0]->getType()); 9941 return Builder.CreateCall(F, {Ops[0], Builder.getInt1(false)}); 9942 } 9943 case X86::BI__builtin_ia32_tzcnt_u16: 9944 case X86::BI__builtin_ia32_tzcnt_u32: 9945 case X86::BI__builtin_ia32_tzcnt_u64: { 9946 Function *F = CGM.getIntrinsic(Intrinsic::cttz, Ops[0]->getType()); 9947 return Builder.CreateCall(F, {Ops[0], Builder.getInt1(false)}); 9948 } 9949 case X86::BI__builtin_ia32_undef128: 9950 case X86::BI__builtin_ia32_undef256: 9951 case X86::BI__builtin_ia32_undef512: 9952 // The x86 definition of "undef" is not the same as the LLVM definition 9953 // (PR32176). We leave optimizing away an unnecessary zero constant to the 9954 // IR optimizer and backend. 9955 // TODO: If we had a "freeze" IR instruction to generate a fixed undef 9956 // value, we should use that here instead of a zero. 9957 return llvm::Constant::getNullValue(ConvertType(E->getType())); 9958 case X86::BI__builtin_ia32_vec_init_v8qi: 9959 case X86::BI__builtin_ia32_vec_init_v4hi: 9960 case X86::BI__builtin_ia32_vec_init_v2si: 9961 return Builder.CreateBitCast(BuildVector(Ops), 9962 llvm::Type::getX86_MMXTy(getLLVMContext())); 9963 case X86::BI__builtin_ia32_vec_ext_v2si: 9964 case X86::BI__builtin_ia32_vec_ext_v16qi: 9965 case X86::BI__builtin_ia32_vec_ext_v8hi: 9966 case X86::BI__builtin_ia32_vec_ext_v4si: 9967 case X86::BI__builtin_ia32_vec_ext_v4sf: 9968 case X86::BI__builtin_ia32_vec_ext_v2di: 9969 case X86::BI__builtin_ia32_vec_ext_v32qi: 9970 case X86::BI__builtin_ia32_vec_ext_v16hi: 9971 case X86::BI__builtin_ia32_vec_ext_v8si: 9972 case X86::BI__builtin_ia32_vec_ext_v4di: { 9973 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 9974 uint64_t Index = cast<ConstantInt>(Ops[1])->getZExtValue(); 9975 Index &= NumElts - 1; 9976 // These builtins exist so we can ensure the index is an ICE and in range. 9977 // Otherwise we could just do this in the header file. 9978 return Builder.CreateExtractElement(Ops[0], Index); 9979 } 9980 case X86::BI__builtin_ia32_vec_set_v16qi: 9981 case X86::BI__builtin_ia32_vec_set_v8hi: 9982 case X86::BI__builtin_ia32_vec_set_v4si: 9983 case X86::BI__builtin_ia32_vec_set_v2di: 9984 case X86::BI__builtin_ia32_vec_set_v32qi: 9985 case X86::BI__builtin_ia32_vec_set_v16hi: 9986 case X86::BI__builtin_ia32_vec_set_v8si: 9987 case X86::BI__builtin_ia32_vec_set_v4di: { 9988 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 9989 unsigned Index = cast<ConstantInt>(Ops[2])->getZExtValue(); 9990 Index &= NumElts - 1; 9991 // These builtins exist so we can ensure the index is an ICE and in range. 9992 // Otherwise we could just do this in the header file. 9993 return Builder.CreateInsertElement(Ops[0], Ops[1], Index); 9994 } 9995 case X86::BI_mm_setcsr: 9996 case X86::BI__builtin_ia32_ldmxcsr: { 9997 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 9998 Builder.CreateStore(Ops[0], Tmp); 9999 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_ldmxcsr), 10000 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 10001 } 10002 case X86::BI_mm_getcsr: 10003 case X86::BI__builtin_ia32_stmxcsr: { 10004 Address Tmp = CreateMemTemp(E->getType()); 10005 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_stmxcsr), 10006 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 10007 return Builder.CreateLoad(Tmp, "stmxcsr"); 10008 } 10009 case X86::BI__builtin_ia32_xsave: 10010 case X86::BI__builtin_ia32_xsave64: 10011 case X86::BI__builtin_ia32_xrstor: 10012 case X86::BI__builtin_ia32_xrstor64: 10013 case X86::BI__builtin_ia32_xsaveopt: 10014 case X86::BI__builtin_ia32_xsaveopt64: 10015 case X86::BI__builtin_ia32_xrstors: 10016 case X86::BI__builtin_ia32_xrstors64: 10017 case X86::BI__builtin_ia32_xsavec: 10018 case X86::BI__builtin_ia32_xsavec64: 10019 case X86::BI__builtin_ia32_xsaves: 10020 case X86::BI__builtin_ia32_xsaves64: 10021 case X86::BI__builtin_ia32_xsetbv: 10022 case X86::BI_xsetbv: { 10023 Intrinsic::ID ID; 10024 #define INTRINSIC_X86_XSAVE_ID(NAME) \ 10025 case X86::BI__builtin_ia32_##NAME: \ 10026 ID = Intrinsic::x86_##NAME; \ 10027 break 10028 switch (BuiltinID) { 10029 default: llvm_unreachable("Unsupported intrinsic!"); 10030 INTRINSIC_X86_XSAVE_ID(xsave); 10031 INTRINSIC_X86_XSAVE_ID(xsave64); 10032 INTRINSIC_X86_XSAVE_ID(xrstor); 10033 INTRINSIC_X86_XSAVE_ID(xrstor64); 10034 INTRINSIC_X86_XSAVE_ID(xsaveopt); 10035 INTRINSIC_X86_XSAVE_ID(xsaveopt64); 10036 INTRINSIC_X86_XSAVE_ID(xrstors); 10037 INTRINSIC_X86_XSAVE_ID(xrstors64); 10038 INTRINSIC_X86_XSAVE_ID(xsavec); 10039 INTRINSIC_X86_XSAVE_ID(xsavec64); 10040 INTRINSIC_X86_XSAVE_ID(xsaves); 10041 INTRINSIC_X86_XSAVE_ID(xsaves64); 10042 INTRINSIC_X86_XSAVE_ID(xsetbv); 10043 case X86::BI_xsetbv: 10044 ID = Intrinsic::x86_xsetbv; 10045 break; 10046 } 10047 #undef INTRINSIC_X86_XSAVE_ID 10048 Value *Mhi = Builder.CreateTrunc( 10049 Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, 32)), Int32Ty); 10050 Value *Mlo = Builder.CreateTrunc(Ops[1], Int32Ty); 10051 Ops[1] = Mhi; 10052 Ops.push_back(Mlo); 10053 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 10054 } 10055 case X86::BI__builtin_ia32_xgetbv: 10056 case X86::BI_xgetbv: 10057 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_xgetbv), Ops); 10058 case X86::BI__builtin_ia32_storedqudi128_mask: 10059 case X86::BI__builtin_ia32_storedqusi128_mask: 10060 case X86::BI__builtin_ia32_storedquhi128_mask: 10061 case X86::BI__builtin_ia32_storedquqi128_mask: 10062 case X86::BI__builtin_ia32_storeupd128_mask: 10063 case X86::BI__builtin_ia32_storeups128_mask: 10064 case X86::BI__builtin_ia32_storedqudi256_mask: 10065 case X86::BI__builtin_ia32_storedqusi256_mask: 10066 case X86::BI__builtin_ia32_storedquhi256_mask: 10067 case X86::BI__builtin_ia32_storedquqi256_mask: 10068 case X86::BI__builtin_ia32_storeupd256_mask: 10069 case X86::BI__builtin_ia32_storeups256_mask: 10070 case X86::BI__builtin_ia32_storedqudi512_mask: 10071 case X86::BI__builtin_ia32_storedqusi512_mask: 10072 case X86::BI__builtin_ia32_storedquhi512_mask: 10073 case X86::BI__builtin_ia32_storedquqi512_mask: 10074 case X86::BI__builtin_ia32_storeupd512_mask: 10075 case X86::BI__builtin_ia32_storeups512_mask: 10076 return EmitX86MaskedStore(*this, Ops, 1); 10077 10078 case X86::BI__builtin_ia32_storess128_mask: 10079 case X86::BI__builtin_ia32_storesd128_mask: { 10080 return EmitX86MaskedStore(*this, Ops, 1); 10081 } 10082 case X86::BI__builtin_ia32_vpopcntb_128: 10083 case X86::BI__builtin_ia32_vpopcntd_128: 10084 case X86::BI__builtin_ia32_vpopcntq_128: 10085 case X86::BI__builtin_ia32_vpopcntw_128: 10086 case X86::BI__builtin_ia32_vpopcntb_256: 10087 case X86::BI__builtin_ia32_vpopcntd_256: 10088 case X86::BI__builtin_ia32_vpopcntq_256: 10089 case X86::BI__builtin_ia32_vpopcntw_256: 10090 case X86::BI__builtin_ia32_vpopcntb_512: 10091 case X86::BI__builtin_ia32_vpopcntd_512: 10092 case X86::BI__builtin_ia32_vpopcntq_512: 10093 case X86::BI__builtin_ia32_vpopcntw_512: { 10094 llvm::Type *ResultType = ConvertType(E->getType()); 10095 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 10096 return Builder.CreateCall(F, Ops); 10097 } 10098 case X86::BI__builtin_ia32_cvtmask2b128: 10099 case X86::BI__builtin_ia32_cvtmask2b256: 10100 case X86::BI__builtin_ia32_cvtmask2b512: 10101 case X86::BI__builtin_ia32_cvtmask2w128: 10102 case X86::BI__builtin_ia32_cvtmask2w256: 10103 case X86::BI__builtin_ia32_cvtmask2w512: 10104 case X86::BI__builtin_ia32_cvtmask2d128: 10105 case X86::BI__builtin_ia32_cvtmask2d256: 10106 case X86::BI__builtin_ia32_cvtmask2d512: 10107 case X86::BI__builtin_ia32_cvtmask2q128: 10108 case X86::BI__builtin_ia32_cvtmask2q256: 10109 case X86::BI__builtin_ia32_cvtmask2q512: 10110 return EmitX86SExtMask(*this, Ops[0], ConvertType(E->getType())); 10111 10112 case X86::BI__builtin_ia32_cvtb2mask128: 10113 case X86::BI__builtin_ia32_cvtb2mask256: 10114 case X86::BI__builtin_ia32_cvtb2mask512: 10115 case X86::BI__builtin_ia32_cvtw2mask128: 10116 case X86::BI__builtin_ia32_cvtw2mask256: 10117 case X86::BI__builtin_ia32_cvtw2mask512: 10118 case X86::BI__builtin_ia32_cvtd2mask128: 10119 case X86::BI__builtin_ia32_cvtd2mask256: 10120 case X86::BI__builtin_ia32_cvtd2mask512: 10121 case X86::BI__builtin_ia32_cvtq2mask128: 10122 case X86::BI__builtin_ia32_cvtq2mask256: 10123 case X86::BI__builtin_ia32_cvtq2mask512: 10124 return EmitX86ConvertToMask(*this, Ops[0]); 10125 10126 case X86::BI__builtin_ia32_cvtdq2ps512_mask: 10127 case X86::BI__builtin_ia32_cvtqq2ps512_mask: 10128 case X86::BI__builtin_ia32_cvtqq2pd512_mask: 10129 return EmitX86ConvertIntToFp(*this, Ops, /*IsSigned*/true); 10130 case X86::BI__builtin_ia32_cvtudq2ps512_mask: 10131 case X86::BI__builtin_ia32_cvtuqq2ps512_mask: 10132 case X86::BI__builtin_ia32_cvtuqq2pd512_mask: 10133 return EmitX86ConvertIntToFp(*this, Ops, /*IsSigned*/false); 10134 10135 case X86::BI__builtin_ia32_vfmaddss3: 10136 case X86::BI__builtin_ia32_vfmaddsd3: 10137 case X86::BI__builtin_ia32_vfmaddss3_mask: 10138 case X86::BI__builtin_ia32_vfmaddsd3_mask: 10139 return EmitScalarFMAExpr(*this, Ops, Ops[0]); 10140 case X86::BI__builtin_ia32_vfmaddss: 10141 case X86::BI__builtin_ia32_vfmaddsd: 10142 return EmitScalarFMAExpr(*this, Ops, 10143 Constant::getNullValue(Ops[0]->getType())); 10144 case X86::BI__builtin_ia32_vfmaddss3_maskz: 10145 case X86::BI__builtin_ia32_vfmaddsd3_maskz: 10146 return EmitScalarFMAExpr(*this, Ops, Ops[0], /*ZeroMask*/true); 10147 case X86::BI__builtin_ia32_vfmaddss3_mask3: 10148 case X86::BI__builtin_ia32_vfmaddsd3_mask3: 10149 return EmitScalarFMAExpr(*this, Ops, Ops[2], /*ZeroMask*/false, 2); 10150 case X86::BI__builtin_ia32_vfmsubss3_mask3: 10151 case X86::BI__builtin_ia32_vfmsubsd3_mask3: 10152 return EmitScalarFMAExpr(*this, Ops, Ops[2], /*ZeroMask*/false, 2, 10153 /*NegAcc*/true); 10154 case X86::BI__builtin_ia32_vfmaddps: 10155 case X86::BI__builtin_ia32_vfmaddpd: 10156 case X86::BI__builtin_ia32_vfmaddps256: 10157 case X86::BI__builtin_ia32_vfmaddpd256: 10158 case X86::BI__builtin_ia32_vfmaddps512_mask: 10159 case X86::BI__builtin_ia32_vfmaddps512_maskz: 10160 case X86::BI__builtin_ia32_vfmaddps512_mask3: 10161 case X86::BI__builtin_ia32_vfmsubps512_mask3: 10162 case X86::BI__builtin_ia32_vfmaddpd512_mask: 10163 case X86::BI__builtin_ia32_vfmaddpd512_maskz: 10164 case X86::BI__builtin_ia32_vfmaddpd512_mask3: 10165 case X86::BI__builtin_ia32_vfmsubpd512_mask3: 10166 return EmitX86FMAExpr(*this, Ops, BuiltinID, /*IsAddSub*/false); 10167 case X86::BI__builtin_ia32_vfmaddsubps: 10168 case X86::BI__builtin_ia32_vfmaddsubpd: 10169 case X86::BI__builtin_ia32_vfmaddsubps256: 10170 case X86::BI__builtin_ia32_vfmaddsubpd256: 10171 case X86::BI__builtin_ia32_vfmaddsubps512_mask: 10172 case X86::BI__builtin_ia32_vfmaddsubps512_maskz: 10173 case X86::BI__builtin_ia32_vfmaddsubps512_mask3: 10174 case X86::BI__builtin_ia32_vfmsubaddps512_mask3: 10175 case X86::BI__builtin_ia32_vfmaddsubpd512_mask: 10176 case X86::BI__builtin_ia32_vfmaddsubpd512_maskz: 10177 case X86::BI__builtin_ia32_vfmaddsubpd512_mask3: 10178 case X86::BI__builtin_ia32_vfmsubaddpd512_mask3: 10179 return EmitX86FMAExpr(*this, Ops, BuiltinID, /*IsAddSub*/true); 10180 10181 case X86::BI__builtin_ia32_movdqa32store128_mask: 10182 case X86::BI__builtin_ia32_movdqa64store128_mask: 10183 case X86::BI__builtin_ia32_storeaps128_mask: 10184 case X86::BI__builtin_ia32_storeapd128_mask: 10185 case X86::BI__builtin_ia32_movdqa32store256_mask: 10186 case X86::BI__builtin_ia32_movdqa64store256_mask: 10187 case X86::BI__builtin_ia32_storeaps256_mask: 10188 case X86::BI__builtin_ia32_storeapd256_mask: 10189 case X86::BI__builtin_ia32_movdqa32store512_mask: 10190 case X86::BI__builtin_ia32_movdqa64store512_mask: 10191 case X86::BI__builtin_ia32_storeaps512_mask: 10192 case X86::BI__builtin_ia32_storeapd512_mask: { 10193 unsigned Align = 10194 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 10195 return EmitX86MaskedStore(*this, Ops, Align); 10196 } 10197 case X86::BI__builtin_ia32_loadups128_mask: 10198 case X86::BI__builtin_ia32_loadups256_mask: 10199 case X86::BI__builtin_ia32_loadups512_mask: 10200 case X86::BI__builtin_ia32_loadupd128_mask: 10201 case X86::BI__builtin_ia32_loadupd256_mask: 10202 case X86::BI__builtin_ia32_loadupd512_mask: 10203 case X86::BI__builtin_ia32_loaddquqi128_mask: 10204 case X86::BI__builtin_ia32_loaddquqi256_mask: 10205 case X86::BI__builtin_ia32_loaddquqi512_mask: 10206 case X86::BI__builtin_ia32_loaddquhi128_mask: 10207 case X86::BI__builtin_ia32_loaddquhi256_mask: 10208 case X86::BI__builtin_ia32_loaddquhi512_mask: 10209 case X86::BI__builtin_ia32_loaddqusi128_mask: 10210 case X86::BI__builtin_ia32_loaddqusi256_mask: 10211 case X86::BI__builtin_ia32_loaddqusi512_mask: 10212 case X86::BI__builtin_ia32_loaddqudi128_mask: 10213 case X86::BI__builtin_ia32_loaddqudi256_mask: 10214 case X86::BI__builtin_ia32_loaddqudi512_mask: 10215 return EmitX86MaskedLoad(*this, Ops, 1); 10216 10217 case X86::BI__builtin_ia32_loadss128_mask: 10218 case X86::BI__builtin_ia32_loadsd128_mask: 10219 return EmitX86MaskedLoad(*this, Ops, 1); 10220 10221 case X86::BI__builtin_ia32_loadaps128_mask: 10222 case X86::BI__builtin_ia32_loadaps256_mask: 10223 case X86::BI__builtin_ia32_loadaps512_mask: 10224 case X86::BI__builtin_ia32_loadapd128_mask: 10225 case X86::BI__builtin_ia32_loadapd256_mask: 10226 case X86::BI__builtin_ia32_loadapd512_mask: 10227 case X86::BI__builtin_ia32_movdqa32load128_mask: 10228 case X86::BI__builtin_ia32_movdqa32load256_mask: 10229 case X86::BI__builtin_ia32_movdqa32load512_mask: 10230 case X86::BI__builtin_ia32_movdqa64load128_mask: 10231 case X86::BI__builtin_ia32_movdqa64load256_mask: 10232 case X86::BI__builtin_ia32_movdqa64load512_mask: { 10233 unsigned Align = 10234 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 10235 return EmitX86MaskedLoad(*this, Ops, Align); 10236 } 10237 10238 case X86::BI__builtin_ia32_expandloaddf128_mask: 10239 case X86::BI__builtin_ia32_expandloaddf256_mask: 10240 case X86::BI__builtin_ia32_expandloaddf512_mask: 10241 case X86::BI__builtin_ia32_expandloadsf128_mask: 10242 case X86::BI__builtin_ia32_expandloadsf256_mask: 10243 case X86::BI__builtin_ia32_expandloadsf512_mask: 10244 case X86::BI__builtin_ia32_expandloaddi128_mask: 10245 case X86::BI__builtin_ia32_expandloaddi256_mask: 10246 case X86::BI__builtin_ia32_expandloaddi512_mask: 10247 case X86::BI__builtin_ia32_expandloadsi128_mask: 10248 case X86::BI__builtin_ia32_expandloadsi256_mask: 10249 case X86::BI__builtin_ia32_expandloadsi512_mask: 10250 case X86::BI__builtin_ia32_expandloadhi128_mask: 10251 case X86::BI__builtin_ia32_expandloadhi256_mask: 10252 case X86::BI__builtin_ia32_expandloadhi512_mask: 10253 case X86::BI__builtin_ia32_expandloadqi128_mask: 10254 case X86::BI__builtin_ia32_expandloadqi256_mask: 10255 case X86::BI__builtin_ia32_expandloadqi512_mask: 10256 return EmitX86ExpandLoad(*this, Ops); 10257 10258 case X86::BI__builtin_ia32_compressstoredf128_mask: 10259 case X86::BI__builtin_ia32_compressstoredf256_mask: 10260 case X86::BI__builtin_ia32_compressstoredf512_mask: 10261 case X86::BI__builtin_ia32_compressstoresf128_mask: 10262 case X86::BI__builtin_ia32_compressstoresf256_mask: 10263 case X86::BI__builtin_ia32_compressstoresf512_mask: 10264 case X86::BI__builtin_ia32_compressstoredi128_mask: 10265 case X86::BI__builtin_ia32_compressstoredi256_mask: 10266 case X86::BI__builtin_ia32_compressstoredi512_mask: 10267 case X86::BI__builtin_ia32_compressstoresi128_mask: 10268 case X86::BI__builtin_ia32_compressstoresi256_mask: 10269 case X86::BI__builtin_ia32_compressstoresi512_mask: 10270 case X86::BI__builtin_ia32_compressstorehi128_mask: 10271 case X86::BI__builtin_ia32_compressstorehi256_mask: 10272 case X86::BI__builtin_ia32_compressstorehi512_mask: 10273 case X86::BI__builtin_ia32_compressstoreqi128_mask: 10274 case X86::BI__builtin_ia32_compressstoreqi256_mask: 10275 case X86::BI__builtin_ia32_compressstoreqi512_mask: 10276 return EmitX86CompressStore(*this, Ops); 10277 10278 case X86::BI__builtin_ia32_expanddf128_mask: 10279 case X86::BI__builtin_ia32_expanddf256_mask: 10280 case X86::BI__builtin_ia32_expanddf512_mask: 10281 case X86::BI__builtin_ia32_expandsf128_mask: 10282 case X86::BI__builtin_ia32_expandsf256_mask: 10283 case X86::BI__builtin_ia32_expandsf512_mask: 10284 case X86::BI__builtin_ia32_expanddi128_mask: 10285 case X86::BI__builtin_ia32_expanddi256_mask: 10286 case X86::BI__builtin_ia32_expanddi512_mask: 10287 case X86::BI__builtin_ia32_expandsi128_mask: 10288 case X86::BI__builtin_ia32_expandsi256_mask: 10289 case X86::BI__builtin_ia32_expandsi512_mask: 10290 case X86::BI__builtin_ia32_expandhi128_mask: 10291 case X86::BI__builtin_ia32_expandhi256_mask: 10292 case X86::BI__builtin_ia32_expandhi512_mask: 10293 case X86::BI__builtin_ia32_expandqi128_mask: 10294 case X86::BI__builtin_ia32_expandqi256_mask: 10295 case X86::BI__builtin_ia32_expandqi512_mask: 10296 return EmitX86CompressExpand(*this, Ops, /*IsCompress*/false); 10297 10298 case X86::BI__builtin_ia32_compressdf128_mask: 10299 case X86::BI__builtin_ia32_compressdf256_mask: 10300 case X86::BI__builtin_ia32_compressdf512_mask: 10301 case X86::BI__builtin_ia32_compresssf128_mask: 10302 case X86::BI__builtin_ia32_compresssf256_mask: 10303 case X86::BI__builtin_ia32_compresssf512_mask: 10304 case X86::BI__builtin_ia32_compressdi128_mask: 10305 case X86::BI__builtin_ia32_compressdi256_mask: 10306 case X86::BI__builtin_ia32_compressdi512_mask: 10307 case X86::BI__builtin_ia32_compresssi128_mask: 10308 case X86::BI__builtin_ia32_compresssi256_mask: 10309 case X86::BI__builtin_ia32_compresssi512_mask: 10310 case X86::BI__builtin_ia32_compresshi128_mask: 10311 case X86::BI__builtin_ia32_compresshi256_mask: 10312 case X86::BI__builtin_ia32_compresshi512_mask: 10313 case X86::BI__builtin_ia32_compressqi128_mask: 10314 case X86::BI__builtin_ia32_compressqi256_mask: 10315 case X86::BI__builtin_ia32_compressqi512_mask: 10316 return EmitX86CompressExpand(*this, Ops, /*IsCompress*/true); 10317 10318 case X86::BI__builtin_ia32_gather3div2df: 10319 case X86::BI__builtin_ia32_gather3div2di: 10320 case X86::BI__builtin_ia32_gather3div4df: 10321 case X86::BI__builtin_ia32_gather3div4di: 10322 case X86::BI__builtin_ia32_gather3div4sf: 10323 case X86::BI__builtin_ia32_gather3div4si: 10324 case X86::BI__builtin_ia32_gather3div8sf: 10325 case X86::BI__builtin_ia32_gather3div8si: 10326 case X86::BI__builtin_ia32_gather3siv2df: 10327 case X86::BI__builtin_ia32_gather3siv2di: 10328 case X86::BI__builtin_ia32_gather3siv4df: 10329 case X86::BI__builtin_ia32_gather3siv4di: 10330 case X86::BI__builtin_ia32_gather3siv4sf: 10331 case X86::BI__builtin_ia32_gather3siv4si: 10332 case X86::BI__builtin_ia32_gather3siv8sf: 10333 case X86::BI__builtin_ia32_gather3siv8si: 10334 case X86::BI__builtin_ia32_gathersiv8df: 10335 case X86::BI__builtin_ia32_gathersiv16sf: 10336 case X86::BI__builtin_ia32_gatherdiv8df: 10337 case X86::BI__builtin_ia32_gatherdiv16sf: 10338 case X86::BI__builtin_ia32_gathersiv8di: 10339 case X86::BI__builtin_ia32_gathersiv16si: 10340 case X86::BI__builtin_ia32_gatherdiv8di: 10341 case X86::BI__builtin_ia32_gatherdiv16si: { 10342 Intrinsic::ID IID; 10343 switch (BuiltinID) { 10344 default: llvm_unreachable("Unexpected builtin"); 10345 case X86::BI__builtin_ia32_gather3div2df: 10346 IID = Intrinsic::x86_avx512_mask_gather3div2_df; 10347 break; 10348 case X86::BI__builtin_ia32_gather3div2di: 10349 IID = Intrinsic::x86_avx512_mask_gather3div2_di; 10350 break; 10351 case X86::BI__builtin_ia32_gather3div4df: 10352 IID = Intrinsic::x86_avx512_mask_gather3div4_df; 10353 break; 10354 case X86::BI__builtin_ia32_gather3div4di: 10355 IID = Intrinsic::x86_avx512_mask_gather3div4_di; 10356 break; 10357 case X86::BI__builtin_ia32_gather3div4sf: 10358 IID = Intrinsic::x86_avx512_mask_gather3div4_sf; 10359 break; 10360 case X86::BI__builtin_ia32_gather3div4si: 10361 IID = Intrinsic::x86_avx512_mask_gather3div4_si; 10362 break; 10363 case X86::BI__builtin_ia32_gather3div8sf: 10364 IID = Intrinsic::x86_avx512_mask_gather3div8_sf; 10365 break; 10366 case X86::BI__builtin_ia32_gather3div8si: 10367 IID = Intrinsic::x86_avx512_mask_gather3div8_si; 10368 break; 10369 case X86::BI__builtin_ia32_gather3siv2df: 10370 IID = Intrinsic::x86_avx512_mask_gather3siv2_df; 10371 break; 10372 case X86::BI__builtin_ia32_gather3siv2di: 10373 IID = Intrinsic::x86_avx512_mask_gather3siv2_di; 10374 break; 10375 case X86::BI__builtin_ia32_gather3siv4df: 10376 IID = Intrinsic::x86_avx512_mask_gather3siv4_df; 10377 break; 10378 case X86::BI__builtin_ia32_gather3siv4di: 10379 IID = Intrinsic::x86_avx512_mask_gather3siv4_di; 10380 break; 10381 case X86::BI__builtin_ia32_gather3siv4sf: 10382 IID = Intrinsic::x86_avx512_mask_gather3siv4_sf; 10383 break; 10384 case X86::BI__builtin_ia32_gather3siv4si: 10385 IID = Intrinsic::x86_avx512_mask_gather3siv4_si; 10386 break; 10387 case X86::BI__builtin_ia32_gather3siv8sf: 10388 IID = Intrinsic::x86_avx512_mask_gather3siv8_sf; 10389 break; 10390 case X86::BI__builtin_ia32_gather3siv8si: 10391 IID = Intrinsic::x86_avx512_mask_gather3siv8_si; 10392 break; 10393 case X86::BI__builtin_ia32_gathersiv8df: 10394 IID = Intrinsic::x86_avx512_mask_gather_dpd_512; 10395 break; 10396 case X86::BI__builtin_ia32_gathersiv16sf: 10397 IID = Intrinsic::x86_avx512_mask_gather_dps_512; 10398 break; 10399 case X86::BI__builtin_ia32_gatherdiv8df: 10400 IID = Intrinsic::x86_avx512_mask_gather_qpd_512; 10401 break; 10402 case X86::BI__builtin_ia32_gatherdiv16sf: 10403 IID = Intrinsic::x86_avx512_mask_gather_qps_512; 10404 break; 10405 case X86::BI__builtin_ia32_gathersiv8di: 10406 IID = Intrinsic::x86_avx512_mask_gather_dpq_512; 10407 break; 10408 case X86::BI__builtin_ia32_gathersiv16si: 10409 IID = Intrinsic::x86_avx512_mask_gather_dpi_512; 10410 break; 10411 case X86::BI__builtin_ia32_gatherdiv8di: 10412 IID = Intrinsic::x86_avx512_mask_gather_qpq_512; 10413 break; 10414 case X86::BI__builtin_ia32_gatherdiv16si: 10415 IID = Intrinsic::x86_avx512_mask_gather_qpi_512; 10416 break; 10417 } 10418 10419 unsigned MinElts = std::min(Ops[0]->getType()->getVectorNumElements(), 10420 Ops[2]->getType()->getVectorNumElements()); 10421 Ops[3] = getMaskVecValue(*this, Ops[3], MinElts); 10422 Function *Intr = CGM.getIntrinsic(IID); 10423 return Builder.CreateCall(Intr, Ops); 10424 } 10425 10426 case X86::BI__builtin_ia32_scattersiv8df: 10427 case X86::BI__builtin_ia32_scattersiv16sf: 10428 case X86::BI__builtin_ia32_scatterdiv8df: 10429 case X86::BI__builtin_ia32_scatterdiv16sf: 10430 case X86::BI__builtin_ia32_scattersiv8di: 10431 case X86::BI__builtin_ia32_scattersiv16si: 10432 case X86::BI__builtin_ia32_scatterdiv8di: 10433 case X86::BI__builtin_ia32_scatterdiv16si: 10434 case X86::BI__builtin_ia32_scatterdiv2df: 10435 case X86::BI__builtin_ia32_scatterdiv2di: 10436 case X86::BI__builtin_ia32_scatterdiv4df: 10437 case X86::BI__builtin_ia32_scatterdiv4di: 10438 case X86::BI__builtin_ia32_scatterdiv4sf: 10439 case X86::BI__builtin_ia32_scatterdiv4si: 10440 case X86::BI__builtin_ia32_scatterdiv8sf: 10441 case X86::BI__builtin_ia32_scatterdiv8si: 10442 case X86::BI__builtin_ia32_scattersiv2df: 10443 case X86::BI__builtin_ia32_scattersiv2di: 10444 case X86::BI__builtin_ia32_scattersiv4df: 10445 case X86::BI__builtin_ia32_scattersiv4di: 10446 case X86::BI__builtin_ia32_scattersiv4sf: 10447 case X86::BI__builtin_ia32_scattersiv4si: 10448 case X86::BI__builtin_ia32_scattersiv8sf: 10449 case X86::BI__builtin_ia32_scattersiv8si: { 10450 Intrinsic::ID IID; 10451 switch (BuiltinID) { 10452 default: llvm_unreachable("Unexpected builtin"); 10453 case X86::BI__builtin_ia32_scattersiv8df: 10454 IID = Intrinsic::x86_avx512_mask_scatter_dpd_512; 10455 break; 10456 case X86::BI__builtin_ia32_scattersiv16sf: 10457 IID = Intrinsic::x86_avx512_mask_scatter_dps_512; 10458 break; 10459 case X86::BI__builtin_ia32_scatterdiv8df: 10460 IID = Intrinsic::x86_avx512_mask_scatter_qpd_512; 10461 break; 10462 case X86::BI__builtin_ia32_scatterdiv16sf: 10463 IID = Intrinsic::x86_avx512_mask_scatter_qps_512; 10464 break; 10465 case X86::BI__builtin_ia32_scattersiv8di: 10466 IID = Intrinsic::x86_avx512_mask_scatter_dpq_512; 10467 break; 10468 case X86::BI__builtin_ia32_scattersiv16si: 10469 IID = Intrinsic::x86_avx512_mask_scatter_dpi_512; 10470 break; 10471 case X86::BI__builtin_ia32_scatterdiv8di: 10472 IID = Intrinsic::x86_avx512_mask_scatter_qpq_512; 10473 break; 10474 case X86::BI__builtin_ia32_scatterdiv16si: 10475 IID = Intrinsic::x86_avx512_mask_scatter_qpi_512; 10476 break; 10477 case X86::BI__builtin_ia32_scatterdiv2df: 10478 IID = Intrinsic::x86_avx512_mask_scatterdiv2_df; 10479 break; 10480 case X86::BI__builtin_ia32_scatterdiv2di: 10481 IID = Intrinsic::x86_avx512_mask_scatterdiv2_di; 10482 break; 10483 case X86::BI__builtin_ia32_scatterdiv4df: 10484 IID = Intrinsic::x86_avx512_mask_scatterdiv4_df; 10485 break; 10486 case X86::BI__builtin_ia32_scatterdiv4di: 10487 IID = Intrinsic::x86_avx512_mask_scatterdiv4_di; 10488 break; 10489 case X86::BI__builtin_ia32_scatterdiv4sf: 10490 IID = Intrinsic::x86_avx512_mask_scatterdiv4_sf; 10491 break; 10492 case X86::BI__builtin_ia32_scatterdiv4si: 10493 IID = Intrinsic::x86_avx512_mask_scatterdiv4_si; 10494 break; 10495 case X86::BI__builtin_ia32_scatterdiv8sf: 10496 IID = Intrinsic::x86_avx512_mask_scatterdiv8_sf; 10497 break; 10498 case X86::BI__builtin_ia32_scatterdiv8si: 10499 IID = Intrinsic::x86_avx512_mask_scatterdiv8_si; 10500 break; 10501 case X86::BI__builtin_ia32_scattersiv2df: 10502 IID = Intrinsic::x86_avx512_mask_scattersiv2_df; 10503 break; 10504 case X86::BI__builtin_ia32_scattersiv2di: 10505 IID = Intrinsic::x86_avx512_mask_scattersiv2_di; 10506 break; 10507 case X86::BI__builtin_ia32_scattersiv4df: 10508 IID = Intrinsic::x86_avx512_mask_scattersiv4_df; 10509 break; 10510 case X86::BI__builtin_ia32_scattersiv4di: 10511 IID = Intrinsic::x86_avx512_mask_scattersiv4_di; 10512 break; 10513 case X86::BI__builtin_ia32_scattersiv4sf: 10514 IID = Intrinsic::x86_avx512_mask_scattersiv4_sf; 10515 break; 10516 case X86::BI__builtin_ia32_scattersiv4si: 10517 IID = Intrinsic::x86_avx512_mask_scattersiv4_si; 10518 break; 10519 case X86::BI__builtin_ia32_scattersiv8sf: 10520 IID = Intrinsic::x86_avx512_mask_scattersiv8_sf; 10521 break; 10522 case X86::BI__builtin_ia32_scattersiv8si: 10523 IID = Intrinsic::x86_avx512_mask_scattersiv8_si; 10524 break; 10525 } 10526 10527 unsigned MinElts = std::min(Ops[2]->getType()->getVectorNumElements(), 10528 Ops[3]->getType()->getVectorNumElements()); 10529 Ops[1] = getMaskVecValue(*this, Ops[1], MinElts); 10530 Function *Intr = CGM.getIntrinsic(IID); 10531 return Builder.CreateCall(Intr, Ops); 10532 } 10533 10534 case X86::BI__builtin_ia32_storehps: 10535 case X86::BI__builtin_ia32_storelps: { 10536 llvm::Type *PtrTy = llvm::PointerType::getUnqual(Int64Ty); 10537 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 2); 10538 10539 // cast val v2i64 10540 Ops[1] = Builder.CreateBitCast(Ops[1], VecTy, "cast"); 10541 10542 // extract (0, 1) 10543 unsigned Index = BuiltinID == X86::BI__builtin_ia32_storelps ? 0 : 1; 10544 Ops[1] = Builder.CreateExtractElement(Ops[1], Index, "extract"); 10545 10546 // cast pointer to i64 & store 10547 Ops[0] = Builder.CreateBitCast(Ops[0], PtrTy); 10548 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 10549 } 10550 case X86::BI__builtin_ia32_vextractf128_pd256: 10551 case X86::BI__builtin_ia32_vextractf128_ps256: 10552 case X86::BI__builtin_ia32_vextractf128_si256: 10553 case X86::BI__builtin_ia32_extract128i256: 10554 case X86::BI__builtin_ia32_extractf64x4_mask: 10555 case X86::BI__builtin_ia32_extractf32x4_mask: 10556 case X86::BI__builtin_ia32_extracti64x4_mask: 10557 case X86::BI__builtin_ia32_extracti32x4_mask: 10558 case X86::BI__builtin_ia32_extractf32x8_mask: 10559 case X86::BI__builtin_ia32_extracti32x8_mask: 10560 case X86::BI__builtin_ia32_extractf32x4_256_mask: 10561 case X86::BI__builtin_ia32_extracti32x4_256_mask: 10562 case X86::BI__builtin_ia32_extractf64x2_256_mask: 10563 case X86::BI__builtin_ia32_extracti64x2_256_mask: 10564 case X86::BI__builtin_ia32_extractf64x2_512_mask: 10565 case X86::BI__builtin_ia32_extracti64x2_512_mask: { 10566 llvm::Type *DstTy = ConvertType(E->getType()); 10567 unsigned NumElts = DstTy->getVectorNumElements(); 10568 unsigned SrcNumElts = Ops[0]->getType()->getVectorNumElements(); 10569 unsigned SubVectors = SrcNumElts / NumElts; 10570 unsigned Index = cast<ConstantInt>(Ops[1])->getZExtValue(); 10571 assert(llvm::isPowerOf2_32(SubVectors) && "Expected power of 2 subvectors"); 10572 Index &= SubVectors - 1; // Remove any extra bits. 10573 Index *= NumElts; 10574 10575 uint32_t Indices[16]; 10576 for (unsigned i = 0; i != NumElts; ++i) 10577 Indices[i] = i + Index; 10578 10579 Value *Res = Builder.CreateShuffleVector(Ops[0], 10580 UndefValue::get(Ops[0]->getType()), 10581 makeArrayRef(Indices, NumElts), 10582 "extract"); 10583 10584 if (Ops.size() == 4) 10585 Res = EmitX86Select(*this, Ops[3], Res, Ops[2]); 10586 10587 return Res; 10588 } 10589 case X86::BI__builtin_ia32_vinsertf128_pd256: 10590 case X86::BI__builtin_ia32_vinsertf128_ps256: 10591 case X86::BI__builtin_ia32_vinsertf128_si256: 10592 case X86::BI__builtin_ia32_insert128i256: 10593 case X86::BI__builtin_ia32_insertf64x4: 10594 case X86::BI__builtin_ia32_insertf32x4: 10595 case X86::BI__builtin_ia32_inserti64x4: 10596 case X86::BI__builtin_ia32_inserti32x4: 10597 case X86::BI__builtin_ia32_insertf32x8: 10598 case X86::BI__builtin_ia32_inserti32x8: 10599 case X86::BI__builtin_ia32_insertf32x4_256: 10600 case X86::BI__builtin_ia32_inserti32x4_256: 10601 case X86::BI__builtin_ia32_insertf64x2_256: 10602 case X86::BI__builtin_ia32_inserti64x2_256: 10603 case X86::BI__builtin_ia32_insertf64x2_512: 10604 case X86::BI__builtin_ia32_inserti64x2_512: { 10605 unsigned DstNumElts = Ops[0]->getType()->getVectorNumElements(); 10606 unsigned SrcNumElts = Ops[1]->getType()->getVectorNumElements(); 10607 unsigned SubVectors = DstNumElts / SrcNumElts; 10608 unsigned Index = cast<ConstantInt>(Ops[2])->getZExtValue(); 10609 assert(llvm::isPowerOf2_32(SubVectors) && "Expected power of 2 subvectors"); 10610 Index &= SubVectors - 1; // Remove any extra bits. 10611 Index *= SrcNumElts; 10612 10613 uint32_t Indices[16]; 10614 for (unsigned i = 0; i != DstNumElts; ++i) 10615 Indices[i] = (i >= SrcNumElts) ? SrcNumElts + (i % SrcNumElts) : i; 10616 10617 Value *Op1 = Builder.CreateShuffleVector(Ops[1], 10618 UndefValue::get(Ops[1]->getType()), 10619 makeArrayRef(Indices, DstNumElts), 10620 "widen"); 10621 10622 for (unsigned i = 0; i != DstNumElts; ++i) { 10623 if (i >= Index && i < (Index + SrcNumElts)) 10624 Indices[i] = (i - Index) + DstNumElts; 10625 else 10626 Indices[i] = i; 10627 } 10628 10629 return Builder.CreateShuffleVector(Ops[0], Op1, 10630 makeArrayRef(Indices, DstNumElts), 10631 "insert"); 10632 } 10633 case X86::BI__builtin_ia32_pmovqd512_mask: 10634 case X86::BI__builtin_ia32_pmovwb512_mask: { 10635 Value *Res = Builder.CreateTrunc(Ops[0], Ops[1]->getType()); 10636 return EmitX86Select(*this, Ops[2], Res, Ops[1]); 10637 } 10638 case X86::BI__builtin_ia32_pmovdb512_mask: 10639 case X86::BI__builtin_ia32_pmovdw512_mask: 10640 case X86::BI__builtin_ia32_pmovqw512_mask: { 10641 if (const auto *C = dyn_cast<Constant>(Ops[2])) 10642 if (C->isAllOnesValue()) 10643 return Builder.CreateTrunc(Ops[0], Ops[1]->getType()); 10644 10645 Intrinsic::ID IID; 10646 switch (BuiltinID) { 10647 default: llvm_unreachable("Unsupported intrinsic!"); 10648 case X86::BI__builtin_ia32_pmovdb512_mask: 10649 IID = Intrinsic::x86_avx512_mask_pmov_db_512; 10650 break; 10651 case X86::BI__builtin_ia32_pmovdw512_mask: 10652 IID = Intrinsic::x86_avx512_mask_pmov_dw_512; 10653 break; 10654 case X86::BI__builtin_ia32_pmovqw512_mask: 10655 IID = Intrinsic::x86_avx512_mask_pmov_qw_512; 10656 break; 10657 } 10658 10659 Function *Intr = CGM.getIntrinsic(IID); 10660 return Builder.CreateCall(Intr, Ops); 10661 } 10662 case X86::BI__builtin_ia32_pblendw128: 10663 case X86::BI__builtin_ia32_blendpd: 10664 case X86::BI__builtin_ia32_blendps: 10665 case X86::BI__builtin_ia32_blendpd256: 10666 case X86::BI__builtin_ia32_blendps256: 10667 case X86::BI__builtin_ia32_pblendw256: 10668 case X86::BI__builtin_ia32_pblendd128: 10669 case X86::BI__builtin_ia32_pblendd256: { 10670 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 10671 unsigned Imm = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 10672 10673 uint32_t Indices[16]; 10674 // If there are more than 8 elements, the immediate is used twice so make 10675 // sure we handle that. 10676 for (unsigned i = 0; i != NumElts; ++i) 10677 Indices[i] = ((Imm >> (i % 8)) & 0x1) ? NumElts + i : i; 10678 10679 return Builder.CreateShuffleVector(Ops[0], Ops[1], 10680 makeArrayRef(Indices, NumElts), 10681 "blend"); 10682 } 10683 case X86::BI__builtin_ia32_pshuflw: 10684 case X86::BI__builtin_ia32_pshuflw256: 10685 case X86::BI__builtin_ia32_pshuflw512: { 10686 uint32_t Imm = cast<llvm::ConstantInt>(Ops[1])->getZExtValue(); 10687 llvm::Type *Ty = Ops[0]->getType(); 10688 unsigned NumElts = Ty->getVectorNumElements(); 10689 10690 // Splat the 8-bits of immediate 4 times to help the loop wrap around. 10691 Imm = (Imm & 0xff) * 0x01010101; 10692 10693 uint32_t Indices[32]; 10694 for (unsigned l = 0; l != NumElts; l += 8) { 10695 for (unsigned i = 0; i != 4; ++i) { 10696 Indices[l + i] = l + (Imm & 3); 10697 Imm >>= 2; 10698 } 10699 for (unsigned i = 4; i != 8; ++i) 10700 Indices[l + i] = l + i; 10701 } 10702 10703 return Builder.CreateShuffleVector(Ops[0], UndefValue::get(Ty), 10704 makeArrayRef(Indices, NumElts), 10705 "pshuflw"); 10706 } 10707 case X86::BI__builtin_ia32_pshufhw: 10708 case X86::BI__builtin_ia32_pshufhw256: 10709 case X86::BI__builtin_ia32_pshufhw512: { 10710 uint32_t Imm = cast<llvm::ConstantInt>(Ops[1])->getZExtValue(); 10711 llvm::Type *Ty = Ops[0]->getType(); 10712 unsigned NumElts = Ty->getVectorNumElements(); 10713 10714 // Splat the 8-bits of immediate 4 times to help the loop wrap around. 10715 Imm = (Imm & 0xff) * 0x01010101; 10716 10717 uint32_t Indices[32]; 10718 for (unsigned l = 0; l != NumElts; l += 8) { 10719 for (unsigned i = 0; i != 4; ++i) 10720 Indices[l + i] = l + i; 10721 for (unsigned i = 4; i != 8; ++i) { 10722 Indices[l + i] = l + 4 + (Imm & 3); 10723 Imm >>= 2; 10724 } 10725 } 10726 10727 return Builder.CreateShuffleVector(Ops[0], UndefValue::get(Ty), 10728 makeArrayRef(Indices, NumElts), 10729 "pshufhw"); 10730 } 10731 case X86::BI__builtin_ia32_pshufd: 10732 case X86::BI__builtin_ia32_pshufd256: 10733 case X86::BI__builtin_ia32_pshufd512: 10734 case X86::BI__builtin_ia32_vpermilpd: 10735 case X86::BI__builtin_ia32_vpermilps: 10736 case X86::BI__builtin_ia32_vpermilpd256: 10737 case X86::BI__builtin_ia32_vpermilps256: 10738 case X86::BI__builtin_ia32_vpermilpd512: 10739 case X86::BI__builtin_ia32_vpermilps512: { 10740 uint32_t Imm = cast<llvm::ConstantInt>(Ops[1])->getZExtValue(); 10741 llvm::Type *Ty = Ops[0]->getType(); 10742 unsigned NumElts = Ty->getVectorNumElements(); 10743 unsigned NumLanes = Ty->getPrimitiveSizeInBits() / 128; 10744 unsigned NumLaneElts = NumElts / NumLanes; 10745 10746 // Splat the 8-bits of immediate 4 times to help the loop wrap around. 10747 Imm = (Imm & 0xff) * 0x01010101; 10748 10749 uint32_t Indices[16]; 10750 for (unsigned l = 0; l != NumElts; l += NumLaneElts) { 10751 for (unsigned i = 0; i != NumLaneElts; ++i) { 10752 Indices[i + l] = (Imm % NumLaneElts) + l; 10753 Imm /= NumLaneElts; 10754 } 10755 } 10756 10757 return Builder.CreateShuffleVector(Ops[0], UndefValue::get(Ty), 10758 makeArrayRef(Indices, NumElts), 10759 "permil"); 10760 } 10761 case X86::BI__builtin_ia32_shufpd: 10762 case X86::BI__builtin_ia32_shufpd256: 10763 case X86::BI__builtin_ia32_shufpd512: 10764 case X86::BI__builtin_ia32_shufps: 10765 case X86::BI__builtin_ia32_shufps256: 10766 case X86::BI__builtin_ia32_shufps512: { 10767 uint32_t Imm = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 10768 llvm::Type *Ty = Ops[0]->getType(); 10769 unsigned NumElts = Ty->getVectorNumElements(); 10770 unsigned NumLanes = Ty->getPrimitiveSizeInBits() / 128; 10771 unsigned NumLaneElts = NumElts / NumLanes; 10772 10773 // Splat the 8-bits of immediate 4 times to help the loop wrap around. 10774 Imm = (Imm & 0xff) * 0x01010101; 10775 10776 uint32_t Indices[16]; 10777 for (unsigned l = 0; l != NumElts; l += NumLaneElts) { 10778 for (unsigned i = 0; i != NumLaneElts; ++i) { 10779 unsigned Index = Imm % NumLaneElts; 10780 Imm /= NumLaneElts; 10781 if (i >= (NumLaneElts / 2)) 10782 Index += NumElts; 10783 Indices[l + i] = l + Index; 10784 } 10785 } 10786 10787 return Builder.CreateShuffleVector(Ops[0], Ops[1], 10788 makeArrayRef(Indices, NumElts), 10789 "shufp"); 10790 } 10791 case X86::BI__builtin_ia32_permdi256: 10792 case X86::BI__builtin_ia32_permdf256: 10793 case X86::BI__builtin_ia32_permdi512: 10794 case X86::BI__builtin_ia32_permdf512: { 10795 unsigned Imm = cast<llvm::ConstantInt>(Ops[1])->getZExtValue(); 10796 llvm::Type *Ty = Ops[0]->getType(); 10797 unsigned NumElts = Ty->getVectorNumElements(); 10798 10799 // These intrinsics operate on 256-bit lanes of four 64-bit elements. 10800 uint32_t Indices[8]; 10801 for (unsigned l = 0; l != NumElts; l += 4) 10802 for (unsigned i = 0; i != 4; ++i) 10803 Indices[l + i] = l + ((Imm >> (2 * i)) & 0x3); 10804 10805 return Builder.CreateShuffleVector(Ops[0], UndefValue::get(Ty), 10806 makeArrayRef(Indices, NumElts), 10807 "perm"); 10808 } 10809 case X86::BI__builtin_ia32_palignr128: 10810 case X86::BI__builtin_ia32_palignr256: 10811 case X86::BI__builtin_ia32_palignr512: { 10812 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0xff; 10813 10814 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 10815 assert(NumElts % 16 == 0); 10816 10817 // If palignr is shifting the pair of vectors more than the size of two 10818 // lanes, emit zero. 10819 if (ShiftVal >= 32) 10820 return llvm::Constant::getNullValue(ConvertType(E->getType())); 10821 10822 // If palignr is shifting the pair of input vectors more than one lane, 10823 // but less than two lanes, convert to shifting in zeroes. 10824 if (ShiftVal > 16) { 10825 ShiftVal -= 16; 10826 Ops[1] = Ops[0]; 10827 Ops[0] = llvm::Constant::getNullValue(Ops[0]->getType()); 10828 } 10829 10830 uint32_t Indices[64]; 10831 // 256-bit palignr operates on 128-bit lanes so we need to handle that 10832 for (unsigned l = 0; l != NumElts; l += 16) { 10833 for (unsigned i = 0; i != 16; ++i) { 10834 unsigned Idx = ShiftVal + i; 10835 if (Idx >= 16) 10836 Idx += NumElts - 16; // End of lane, switch operand. 10837 Indices[l + i] = Idx + l; 10838 } 10839 } 10840 10841 return Builder.CreateShuffleVector(Ops[1], Ops[0], 10842 makeArrayRef(Indices, NumElts), 10843 "palignr"); 10844 } 10845 case X86::BI__builtin_ia32_alignd128: 10846 case X86::BI__builtin_ia32_alignd256: 10847 case X86::BI__builtin_ia32_alignd512: 10848 case X86::BI__builtin_ia32_alignq128: 10849 case X86::BI__builtin_ia32_alignq256: 10850 case X86::BI__builtin_ia32_alignq512: { 10851 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 10852 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0xff; 10853 10854 // Mask the shift amount to width of two vectors. 10855 ShiftVal &= (2 * NumElts) - 1; 10856 10857 uint32_t Indices[16]; 10858 for (unsigned i = 0; i != NumElts; ++i) 10859 Indices[i] = i + ShiftVal; 10860 10861 return Builder.CreateShuffleVector(Ops[1], Ops[0], 10862 makeArrayRef(Indices, NumElts), 10863 "valign"); 10864 } 10865 case X86::BI__builtin_ia32_shuf_f32x4_256: 10866 case X86::BI__builtin_ia32_shuf_f64x2_256: 10867 case X86::BI__builtin_ia32_shuf_i32x4_256: 10868 case X86::BI__builtin_ia32_shuf_i64x2_256: 10869 case X86::BI__builtin_ia32_shuf_f32x4: 10870 case X86::BI__builtin_ia32_shuf_f64x2: 10871 case X86::BI__builtin_ia32_shuf_i32x4: 10872 case X86::BI__builtin_ia32_shuf_i64x2: { 10873 unsigned Imm = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 10874 llvm::Type *Ty = Ops[0]->getType(); 10875 unsigned NumElts = Ty->getVectorNumElements(); 10876 unsigned NumLanes = Ty->getPrimitiveSizeInBits() == 512 ? 4 : 2; 10877 unsigned NumLaneElts = NumElts / NumLanes; 10878 10879 uint32_t Indices[16]; 10880 for (unsigned l = 0; l != NumElts; l += NumLaneElts) { 10881 unsigned Index = (Imm % NumLanes) * NumLaneElts; 10882 Imm /= NumLanes; // Discard the bits we just used. 10883 if (l >= (NumElts / 2)) 10884 Index += NumElts; // Switch to other source. 10885 for (unsigned i = 0; i != NumLaneElts; ++i) { 10886 Indices[l + i] = Index + i; 10887 } 10888 } 10889 10890 return Builder.CreateShuffleVector(Ops[0], Ops[1], 10891 makeArrayRef(Indices, NumElts), 10892 "shuf"); 10893 } 10894 10895 case X86::BI__builtin_ia32_vperm2f128_pd256: 10896 case X86::BI__builtin_ia32_vperm2f128_ps256: 10897 case X86::BI__builtin_ia32_vperm2f128_si256: 10898 case X86::BI__builtin_ia32_permti256: { 10899 unsigned Imm = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 10900 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 10901 10902 // This takes a very simple approach since there are two lanes and a 10903 // shuffle can have 2 inputs. So we reserve the first input for the first 10904 // lane and the second input for the second lane. This may result in 10905 // duplicate sources, but this can be dealt with in the backend. 10906 10907 Value *OutOps[2]; 10908 uint32_t Indices[8]; 10909 for (unsigned l = 0; l != 2; ++l) { 10910 // Determine the source for this lane. 10911 if (Imm & (1 << ((l * 4) + 3))) 10912 OutOps[l] = llvm::ConstantAggregateZero::get(Ops[0]->getType()); 10913 else if (Imm & (1 << ((l * 4) + 1))) 10914 OutOps[l] = Ops[1]; 10915 else 10916 OutOps[l] = Ops[0]; 10917 10918 for (unsigned i = 0; i != NumElts/2; ++i) { 10919 // Start with ith element of the source for this lane. 10920 unsigned Idx = (l * NumElts) + i; 10921 // If bit 0 of the immediate half is set, switch to the high half of 10922 // the source. 10923 if (Imm & (1 << (l * 4))) 10924 Idx += NumElts/2; 10925 Indices[(l * (NumElts/2)) + i] = Idx; 10926 } 10927 } 10928 10929 return Builder.CreateShuffleVector(OutOps[0], OutOps[1], 10930 makeArrayRef(Indices, NumElts), 10931 "vperm"); 10932 } 10933 10934 case X86::BI__builtin_ia32_pslldqi128_byteshift: 10935 case X86::BI__builtin_ia32_pslldqi256_byteshift: 10936 case X86::BI__builtin_ia32_pslldqi512_byteshift: { 10937 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() & 0xff; 10938 llvm::Type *ResultType = Ops[0]->getType(); 10939 // Builtin type is vXi64 so multiply by 8 to get bytes. 10940 unsigned NumElts = ResultType->getVectorNumElements() * 8; 10941 10942 // If pslldq is shifting the vector more than 15 bytes, emit zero. 10943 if (ShiftVal >= 16) 10944 return llvm::Constant::getNullValue(ResultType); 10945 10946 uint32_t Indices[64]; 10947 // 256/512-bit pslldq operates on 128-bit lanes so we need to handle that 10948 for (unsigned l = 0; l != NumElts; l += 16) { 10949 for (unsigned i = 0; i != 16; ++i) { 10950 unsigned Idx = NumElts + i - ShiftVal; 10951 if (Idx < NumElts) Idx -= NumElts - 16; // end of lane, switch operand. 10952 Indices[l + i] = Idx + l; 10953 } 10954 } 10955 10956 llvm::Type *VecTy = llvm::VectorType::get(Int8Ty, NumElts); 10957 Value *Cast = Builder.CreateBitCast(Ops[0], VecTy, "cast"); 10958 Value *Zero = llvm::Constant::getNullValue(VecTy); 10959 Value *SV = Builder.CreateShuffleVector(Zero, Cast, 10960 makeArrayRef(Indices, NumElts), 10961 "pslldq"); 10962 return Builder.CreateBitCast(SV, Ops[0]->getType(), "cast"); 10963 } 10964 case X86::BI__builtin_ia32_psrldqi128_byteshift: 10965 case X86::BI__builtin_ia32_psrldqi256_byteshift: 10966 case X86::BI__builtin_ia32_psrldqi512_byteshift: { 10967 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() & 0xff; 10968 llvm::Type *ResultType = Ops[0]->getType(); 10969 // Builtin type is vXi64 so multiply by 8 to get bytes. 10970 unsigned NumElts = ResultType->getVectorNumElements() * 8; 10971 10972 // If psrldq is shifting the vector more than 15 bytes, emit zero. 10973 if (ShiftVal >= 16) 10974 return llvm::Constant::getNullValue(ResultType); 10975 10976 uint32_t Indices[64]; 10977 // 256/512-bit psrldq operates on 128-bit lanes so we need to handle that 10978 for (unsigned l = 0; l != NumElts; l += 16) { 10979 for (unsigned i = 0; i != 16; ++i) { 10980 unsigned Idx = i + ShiftVal; 10981 if (Idx >= 16) Idx += NumElts - 16; // end of lane, switch operand. 10982 Indices[l + i] = Idx + l; 10983 } 10984 } 10985 10986 llvm::Type *VecTy = llvm::VectorType::get(Int8Ty, NumElts); 10987 Value *Cast = Builder.CreateBitCast(Ops[0], VecTy, "cast"); 10988 Value *Zero = llvm::Constant::getNullValue(VecTy); 10989 Value *SV = Builder.CreateShuffleVector(Cast, Zero, 10990 makeArrayRef(Indices, NumElts), 10991 "psrldq"); 10992 return Builder.CreateBitCast(SV, ResultType, "cast"); 10993 } 10994 case X86::BI__builtin_ia32_kshiftliqi: 10995 case X86::BI__builtin_ia32_kshiftlihi: 10996 case X86::BI__builtin_ia32_kshiftlisi: 10997 case X86::BI__builtin_ia32_kshiftlidi: { 10998 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() & 0xff; 10999 unsigned NumElts = Ops[0]->getType()->getIntegerBitWidth(); 11000 11001 if (ShiftVal >= NumElts) 11002 return llvm::Constant::getNullValue(Ops[0]->getType()); 11003 11004 Value *In = getMaskVecValue(*this, Ops[0], NumElts); 11005 11006 uint32_t Indices[64]; 11007 for (unsigned i = 0; i != NumElts; ++i) 11008 Indices[i] = NumElts + i - ShiftVal; 11009 11010 Value *Zero = llvm::Constant::getNullValue(In->getType()); 11011 Value *SV = Builder.CreateShuffleVector(Zero, In, 11012 makeArrayRef(Indices, NumElts), 11013 "kshiftl"); 11014 return Builder.CreateBitCast(SV, Ops[0]->getType()); 11015 } 11016 case X86::BI__builtin_ia32_kshiftriqi: 11017 case X86::BI__builtin_ia32_kshiftrihi: 11018 case X86::BI__builtin_ia32_kshiftrisi: 11019 case X86::BI__builtin_ia32_kshiftridi: { 11020 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() & 0xff; 11021 unsigned NumElts = Ops[0]->getType()->getIntegerBitWidth(); 11022 11023 if (ShiftVal >= NumElts) 11024 return llvm::Constant::getNullValue(Ops[0]->getType()); 11025 11026 Value *In = getMaskVecValue(*this, Ops[0], NumElts); 11027 11028 uint32_t Indices[64]; 11029 for (unsigned i = 0; i != NumElts; ++i) 11030 Indices[i] = i + ShiftVal; 11031 11032 Value *Zero = llvm::Constant::getNullValue(In->getType()); 11033 Value *SV = Builder.CreateShuffleVector(In, Zero, 11034 makeArrayRef(Indices, NumElts), 11035 "kshiftr"); 11036 return Builder.CreateBitCast(SV, Ops[0]->getType()); 11037 } 11038 case X86::BI__builtin_ia32_movnti: 11039 case X86::BI__builtin_ia32_movnti64: 11040 case X86::BI__builtin_ia32_movntsd: 11041 case X86::BI__builtin_ia32_movntss: { 11042 llvm::MDNode *Node = llvm::MDNode::get( 11043 getLLVMContext(), llvm::ConstantAsMetadata::get(Builder.getInt32(1))); 11044 11045 Value *Ptr = Ops[0]; 11046 Value *Src = Ops[1]; 11047 11048 // Extract the 0'th element of the source vector. 11049 if (BuiltinID == X86::BI__builtin_ia32_movntsd || 11050 BuiltinID == X86::BI__builtin_ia32_movntss) 11051 Src = Builder.CreateExtractElement(Src, (uint64_t)0, "extract"); 11052 11053 // Convert the type of the pointer to a pointer to the stored type. 11054 Value *BC = Builder.CreateBitCast( 11055 Ptr, llvm::PointerType::getUnqual(Src->getType()), "cast"); 11056 11057 // Unaligned nontemporal store of the scalar value. 11058 StoreInst *SI = Builder.CreateDefaultAlignedStore(Src, BC); 11059 SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); 11060 SI->setAlignment(1); 11061 return SI; 11062 } 11063 // Rotate is a special case of funnel shift - 1st 2 args are the same. 11064 case X86::BI__builtin_ia32_vprotb: 11065 case X86::BI__builtin_ia32_vprotw: 11066 case X86::BI__builtin_ia32_vprotd: 11067 case X86::BI__builtin_ia32_vprotq: 11068 case X86::BI__builtin_ia32_vprotbi: 11069 case X86::BI__builtin_ia32_vprotwi: 11070 case X86::BI__builtin_ia32_vprotdi: 11071 case X86::BI__builtin_ia32_vprotqi: 11072 case X86::BI__builtin_ia32_prold128: 11073 case X86::BI__builtin_ia32_prold256: 11074 case X86::BI__builtin_ia32_prold512: 11075 case X86::BI__builtin_ia32_prolq128: 11076 case X86::BI__builtin_ia32_prolq256: 11077 case X86::BI__builtin_ia32_prolq512: 11078 case X86::BI__builtin_ia32_prolvd128: 11079 case X86::BI__builtin_ia32_prolvd256: 11080 case X86::BI__builtin_ia32_prolvd512: 11081 case X86::BI__builtin_ia32_prolvq128: 11082 case X86::BI__builtin_ia32_prolvq256: 11083 case X86::BI__builtin_ia32_prolvq512: 11084 return EmitX86FunnelShift(*this, Ops[0], Ops[0], Ops[1], false); 11085 case X86::BI__builtin_ia32_prord128: 11086 case X86::BI__builtin_ia32_prord256: 11087 case X86::BI__builtin_ia32_prord512: 11088 case X86::BI__builtin_ia32_prorq128: 11089 case X86::BI__builtin_ia32_prorq256: 11090 case X86::BI__builtin_ia32_prorq512: 11091 case X86::BI__builtin_ia32_prorvd128: 11092 case X86::BI__builtin_ia32_prorvd256: 11093 case X86::BI__builtin_ia32_prorvd512: 11094 case X86::BI__builtin_ia32_prorvq128: 11095 case X86::BI__builtin_ia32_prorvq256: 11096 case X86::BI__builtin_ia32_prorvq512: 11097 return EmitX86FunnelShift(*this, Ops[0], Ops[0], Ops[1], true); 11098 case X86::BI__builtin_ia32_selectb_128: 11099 case X86::BI__builtin_ia32_selectb_256: 11100 case X86::BI__builtin_ia32_selectb_512: 11101 case X86::BI__builtin_ia32_selectw_128: 11102 case X86::BI__builtin_ia32_selectw_256: 11103 case X86::BI__builtin_ia32_selectw_512: 11104 case X86::BI__builtin_ia32_selectd_128: 11105 case X86::BI__builtin_ia32_selectd_256: 11106 case X86::BI__builtin_ia32_selectd_512: 11107 case X86::BI__builtin_ia32_selectq_128: 11108 case X86::BI__builtin_ia32_selectq_256: 11109 case X86::BI__builtin_ia32_selectq_512: 11110 case X86::BI__builtin_ia32_selectps_128: 11111 case X86::BI__builtin_ia32_selectps_256: 11112 case X86::BI__builtin_ia32_selectps_512: 11113 case X86::BI__builtin_ia32_selectpd_128: 11114 case X86::BI__builtin_ia32_selectpd_256: 11115 case X86::BI__builtin_ia32_selectpd_512: 11116 return EmitX86Select(*this, Ops[0], Ops[1], Ops[2]); 11117 case X86::BI__builtin_ia32_selectss_128: 11118 case X86::BI__builtin_ia32_selectsd_128: { 11119 Value *A = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 11120 Value *B = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 11121 A = EmitX86ScalarSelect(*this, Ops[0], A, B); 11122 return Builder.CreateInsertElement(Ops[1], A, (uint64_t)0); 11123 } 11124 case X86::BI__builtin_ia32_cmpb128_mask: 11125 case X86::BI__builtin_ia32_cmpb256_mask: 11126 case X86::BI__builtin_ia32_cmpb512_mask: 11127 case X86::BI__builtin_ia32_cmpw128_mask: 11128 case X86::BI__builtin_ia32_cmpw256_mask: 11129 case X86::BI__builtin_ia32_cmpw512_mask: 11130 case X86::BI__builtin_ia32_cmpd128_mask: 11131 case X86::BI__builtin_ia32_cmpd256_mask: 11132 case X86::BI__builtin_ia32_cmpd512_mask: 11133 case X86::BI__builtin_ia32_cmpq128_mask: 11134 case X86::BI__builtin_ia32_cmpq256_mask: 11135 case X86::BI__builtin_ia32_cmpq512_mask: { 11136 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 11137 return EmitX86MaskedCompare(*this, CC, true, Ops); 11138 } 11139 case X86::BI__builtin_ia32_ucmpb128_mask: 11140 case X86::BI__builtin_ia32_ucmpb256_mask: 11141 case X86::BI__builtin_ia32_ucmpb512_mask: 11142 case X86::BI__builtin_ia32_ucmpw128_mask: 11143 case X86::BI__builtin_ia32_ucmpw256_mask: 11144 case X86::BI__builtin_ia32_ucmpw512_mask: 11145 case X86::BI__builtin_ia32_ucmpd128_mask: 11146 case X86::BI__builtin_ia32_ucmpd256_mask: 11147 case X86::BI__builtin_ia32_ucmpd512_mask: 11148 case X86::BI__builtin_ia32_ucmpq128_mask: 11149 case X86::BI__builtin_ia32_ucmpq256_mask: 11150 case X86::BI__builtin_ia32_ucmpq512_mask: { 11151 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 11152 return EmitX86MaskedCompare(*this, CC, false, Ops); 11153 } 11154 case X86::BI__builtin_ia32_vpcomb: 11155 case X86::BI__builtin_ia32_vpcomw: 11156 case X86::BI__builtin_ia32_vpcomd: 11157 case X86::BI__builtin_ia32_vpcomq: 11158 return EmitX86vpcom(*this, Ops, true); 11159 case X86::BI__builtin_ia32_vpcomub: 11160 case X86::BI__builtin_ia32_vpcomuw: 11161 case X86::BI__builtin_ia32_vpcomud: 11162 case X86::BI__builtin_ia32_vpcomuq: 11163 return EmitX86vpcom(*this, Ops, false); 11164 11165 case X86::BI__builtin_ia32_kortestcqi: 11166 case X86::BI__builtin_ia32_kortestchi: 11167 case X86::BI__builtin_ia32_kortestcsi: 11168 case X86::BI__builtin_ia32_kortestcdi: { 11169 Value *Or = EmitX86MaskLogic(*this, Instruction::Or, Ops); 11170 Value *C = llvm::Constant::getAllOnesValue(Ops[0]->getType()); 11171 Value *Cmp = Builder.CreateICmpEQ(Or, C); 11172 return Builder.CreateZExt(Cmp, ConvertType(E->getType())); 11173 } 11174 case X86::BI__builtin_ia32_kortestzqi: 11175 case X86::BI__builtin_ia32_kortestzhi: 11176 case X86::BI__builtin_ia32_kortestzsi: 11177 case X86::BI__builtin_ia32_kortestzdi: { 11178 Value *Or = EmitX86MaskLogic(*this, Instruction::Or, Ops); 11179 Value *C = llvm::Constant::getNullValue(Ops[0]->getType()); 11180 Value *Cmp = Builder.CreateICmpEQ(Or, C); 11181 return Builder.CreateZExt(Cmp, ConvertType(E->getType())); 11182 } 11183 11184 case X86::BI__builtin_ia32_ktestcqi: 11185 case X86::BI__builtin_ia32_ktestzqi: 11186 case X86::BI__builtin_ia32_ktestchi: 11187 case X86::BI__builtin_ia32_ktestzhi: 11188 case X86::BI__builtin_ia32_ktestcsi: 11189 case X86::BI__builtin_ia32_ktestzsi: 11190 case X86::BI__builtin_ia32_ktestcdi: 11191 case X86::BI__builtin_ia32_ktestzdi: { 11192 Intrinsic::ID IID; 11193 switch (BuiltinID) { 11194 default: llvm_unreachable("Unsupported intrinsic!"); 11195 case X86::BI__builtin_ia32_ktestcqi: 11196 IID = Intrinsic::x86_avx512_ktestc_b; 11197 break; 11198 case X86::BI__builtin_ia32_ktestzqi: 11199 IID = Intrinsic::x86_avx512_ktestz_b; 11200 break; 11201 case X86::BI__builtin_ia32_ktestchi: 11202 IID = Intrinsic::x86_avx512_ktestc_w; 11203 break; 11204 case X86::BI__builtin_ia32_ktestzhi: 11205 IID = Intrinsic::x86_avx512_ktestz_w; 11206 break; 11207 case X86::BI__builtin_ia32_ktestcsi: 11208 IID = Intrinsic::x86_avx512_ktestc_d; 11209 break; 11210 case X86::BI__builtin_ia32_ktestzsi: 11211 IID = Intrinsic::x86_avx512_ktestz_d; 11212 break; 11213 case X86::BI__builtin_ia32_ktestcdi: 11214 IID = Intrinsic::x86_avx512_ktestc_q; 11215 break; 11216 case X86::BI__builtin_ia32_ktestzdi: 11217 IID = Intrinsic::x86_avx512_ktestz_q; 11218 break; 11219 } 11220 11221 unsigned NumElts = Ops[0]->getType()->getIntegerBitWidth(); 11222 Value *LHS = getMaskVecValue(*this, Ops[0], NumElts); 11223 Value *RHS = getMaskVecValue(*this, Ops[1], NumElts); 11224 Function *Intr = CGM.getIntrinsic(IID); 11225 return Builder.CreateCall(Intr, {LHS, RHS}); 11226 } 11227 11228 case X86::BI__builtin_ia32_kaddqi: 11229 case X86::BI__builtin_ia32_kaddhi: 11230 case X86::BI__builtin_ia32_kaddsi: 11231 case X86::BI__builtin_ia32_kadddi: { 11232 Intrinsic::ID IID; 11233 switch (BuiltinID) { 11234 default: llvm_unreachable("Unsupported intrinsic!"); 11235 case X86::BI__builtin_ia32_kaddqi: 11236 IID = Intrinsic::x86_avx512_kadd_b; 11237 break; 11238 case X86::BI__builtin_ia32_kaddhi: 11239 IID = Intrinsic::x86_avx512_kadd_w; 11240 break; 11241 case X86::BI__builtin_ia32_kaddsi: 11242 IID = Intrinsic::x86_avx512_kadd_d; 11243 break; 11244 case X86::BI__builtin_ia32_kadddi: 11245 IID = Intrinsic::x86_avx512_kadd_q; 11246 break; 11247 } 11248 11249 unsigned NumElts = Ops[0]->getType()->getIntegerBitWidth(); 11250 Value *LHS = getMaskVecValue(*this, Ops[0], NumElts); 11251 Value *RHS = getMaskVecValue(*this, Ops[1], NumElts); 11252 Function *Intr = CGM.getIntrinsic(IID); 11253 Value *Res = Builder.CreateCall(Intr, {LHS, RHS}); 11254 return Builder.CreateBitCast(Res, Ops[0]->getType()); 11255 } 11256 case X86::BI__builtin_ia32_kandqi: 11257 case X86::BI__builtin_ia32_kandhi: 11258 case X86::BI__builtin_ia32_kandsi: 11259 case X86::BI__builtin_ia32_kanddi: 11260 return EmitX86MaskLogic(*this, Instruction::And, Ops); 11261 case X86::BI__builtin_ia32_kandnqi: 11262 case X86::BI__builtin_ia32_kandnhi: 11263 case X86::BI__builtin_ia32_kandnsi: 11264 case X86::BI__builtin_ia32_kandndi: 11265 return EmitX86MaskLogic(*this, Instruction::And, Ops, true); 11266 case X86::BI__builtin_ia32_korqi: 11267 case X86::BI__builtin_ia32_korhi: 11268 case X86::BI__builtin_ia32_korsi: 11269 case X86::BI__builtin_ia32_kordi: 11270 return EmitX86MaskLogic(*this, Instruction::Or, Ops); 11271 case X86::BI__builtin_ia32_kxnorqi: 11272 case X86::BI__builtin_ia32_kxnorhi: 11273 case X86::BI__builtin_ia32_kxnorsi: 11274 case X86::BI__builtin_ia32_kxnordi: 11275 return EmitX86MaskLogic(*this, Instruction::Xor, Ops, true); 11276 case X86::BI__builtin_ia32_kxorqi: 11277 case X86::BI__builtin_ia32_kxorhi: 11278 case X86::BI__builtin_ia32_kxorsi: 11279 case X86::BI__builtin_ia32_kxordi: 11280 return EmitX86MaskLogic(*this, Instruction::Xor, Ops); 11281 case X86::BI__builtin_ia32_knotqi: 11282 case X86::BI__builtin_ia32_knothi: 11283 case X86::BI__builtin_ia32_knotsi: 11284 case X86::BI__builtin_ia32_knotdi: { 11285 unsigned NumElts = Ops[0]->getType()->getIntegerBitWidth(); 11286 Value *Res = getMaskVecValue(*this, Ops[0], NumElts); 11287 return Builder.CreateBitCast(Builder.CreateNot(Res), 11288 Ops[0]->getType()); 11289 } 11290 case X86::BI__builtin_ia32_kmovb: 11291 case X86::BI__builtin_ia32_kmovw: 11292 case X86::BI__builtin_ia32_kmovd: 11293 case X86::BI__builtin_ia32_kmovq: { 11294 // Bitcast to vXi1 type and then back to integer. This gets the mask 11295 // register type into the IR, but might be optimized out depending on 11296 // what's around it. 11297 unsigned NumElts = Ops[0]->getType()->getIntegerBitWidth(); 11298 Value *Res = getMaskVecValue(*this, Ops[0], NumElts); 11299 return Builder.CreateBitCast(Res, Ops[0]->getType()); 11300 } 11301 11302 case X86::BI__builtin_ia32_kunpckdi: 11303 case X86::BI__builtin_ia32_kunpcksi: 11304 case X86::BI__builtin_ia32_kunpckhi: { 11305 unsigned NumElts = Ops[0]->getType()->getIntegerBitWidth(); 11306 Value *LHS = getMaskVecValue(*this, Ops[0], NumElts); 11307 Value *RHS = getMaskVecValue(*this, Ops[1], NumElts); 11308 uint32_t Indices[64]; 11309 for (unsigned i = 0; i != NumElts; ++i) 11310 Indices[i] = i; 11311 11312 // First extract half of each vector. This gives better codegen than 11313 // doing it in a single shuffle. 11314 LHS = Builder.CreateShuffleVector(LHS, LHS, 11315 makeArrayRef(Indices, NumElts / 2)); 11316 RHS = Builder.CreateShuffleVector(RHS, RHS, 11317 makeArrayRef(Indices, NumElts / 2)); 11318 // Concat the vectors. 11319 // NOTE: Operands are swapped to match the intrinsic definition. 11320 Value *Res = Builder.CreateShuffleVector(RHS, LHS, 11321 makeArrayRef(Indices, NumElts)); 11322 return Builder.CreateBitCast(Res, Ops[0]->getType()); 11323 } 11324 11325 case X86::BI__builtin_ia32_vplzcntd_128: 11326 case X86::BI__builtin_ia32_vplzcntd_256: 11327 case X86::BI__builtin_ia32_vplzcntd_512: 11328 case X86::BI__builtin_ia32_vplzcntq_128: 11329 case X86::BI__builtin_ia32_vplzcntq_256: 11330 case X86::BI__builtin_ia32_vplzcntq_512: { 11331 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, Ops[0]->getType()); 11332 return Builder.CreateCall(F, {Ops[0],Builder.getInt1(false)}); 11333 } 11334 case X86::BI__builtin_ia32_sqrtss: 11335 case X86::BI__builtin_ia32_sqrtsd: { 11336 Value *A = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 11337 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, A->getType()); 11338 A = Builder.CreateCall(F, {A}); 11339 return Builder.CreateInsertElement(Ops[0], A, (uint64_t)0); 11340 } 11341 case X86::BI__builtin_ia32_sqrtsd_round_mask: 11342 case X86::BI__builtin_ia32_sqrtss_round_mask: { 11343 unsigned CC = cast<llvm::ConstantInt>(Ops[4])->getZExtValue(); 11344 // Support only if the rounding mode is 4 (AKA CUR_DIRECTION), 11345 // otherwise keep the intrinsic. 11346 if (CC != 4) { 11347 Intrinsic::ID IID = BuiltinID == X86::BI__builtin_ia32_sqrtsd_round_mask ? 11348 Intrinsic::x86_avx512_mask_sqrt_sd : 11349 Intrinsic::x86_avx512_mask_sqrt_ss; 11350 return Builder.CreateCall(CGM.getIntrinsic(IID), Ops); 11351 } 11352 Value *A = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 11353 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, A->getType()); 11354 A = Builder.CreateCall(F, A); 11355 Value *Src = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 11356 A = EmitX86ScalarSelect(*this, Ops[3], A, Src); 11357 return Builder.CreateInsertElement(Ops[0], A, (uint64_t)0); 11358 } 11359 case X86::BI__builtin_ia32_sqrtpd256: 11360 case X86::BI__builtin_ia32_sqrtpd: 11361 case X86::BI__builtin_ia32_sqrtps256: 11362 case X86::BI__builtin_ia32_sqrtps: 11363 case X86::BI__builtin_ia32_sqrtps512: 11364 case X86::BI__builtin_ia32_sqrtpd512: { 11365 if (Ops.size() == 2) { 11366 unsigned CC = cast<llvm::ConstantInt>(Ops[1])->getZExtValue(); 11367 // Support only if the rounding mode is 4 (AKA CUR_DIRECTION), 11368 // otherwise keep the intrinsic. 11369 if (CC != 4) { 11370 Intrinsic::ID IID = BuiltinID == X86::BI__builtin_ia32_sqrtps512 ? 11371 Intrinsic::x86_avx512_sqrt_ps_512 : 11372 Intrinsic::x86_avx512_sqrt_pd_512; 11373 return Builder.CreateCall(CGM.getIntrinsic(IID), Ops); 11374 } 11375 } 11376 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, Ops[0]->getType()); 11377 return Builder.CreateCall(F, Ops[0]); 11378 } 11379 case X86::BI__builtin_ia32_pabsb128: 11380 case X86::BI__builtin_ia32_pabsw128: 11381 case X86::BI__builtin_ia32_pabsd128: 11382 case X86::BI__builtin_ia32_pabsb256: 11383 case X86::BI__builtin_ia32_pabsw256: 11384 case X86::BI__builtin_ia32_pabsd256: 11385 case X86::BI__builtin_ia32_pabsq128: 11386 case X86::BI__builtin_ia32_pabsq256: 11387 case X86::BI__builtin_ia32_pabsb512: 11388 case X86::BI__builtin_ia32_pabsw512: 11389 case X86::BI__builtin_ia32_pabsd512: 11390 case X86::BI__builtin_ia32_pabsq512: 11391 return EmitX86Abs(*this, Ops); 11392 11393 case X86::BI__builtin_ia32_pmaxsb128: 11394 case X86::BI__builtin_ia32_pmaxsw128: 11395 case X86::BI__builtin_ia32_pmaxsd128: 11396 case X86::BI__builtin_ia32_pmaxsq128: 11397 case X86::BI__builtin_ia32_pmaxsb256: 11398 case X86::BI__builtin_ia32_pmaxsw256: 11399 case X86::BI__builtin_ia32_pmaxsd256: 11400 case X86::BI__builtin_ia32_pmaxsq256: 11401 case X86::BI__builtin_ia32_pmaxsb512: 11402 case X86::BI__builtin_ia32_pmaxsw512: 11403 case X86::BI__builtin_ia32_pmaxsd512: 11404 case X86::BI__builtin_ia32_pmaxsq512: 11405 return EmitX86MinMax(*this, ICmpInst::ICMP_SGT, Ops); 11406 case X86::BI__builtin_ia32_pmaxub128: 11407 case X86::BI__builtin_ia32_pmaxuw128: 11408 case X86::BI__builtin_ia32_pmaxud128: 11409 case X86::BI__builtin_ia32_pmaxuq128: 11410 case X86::BI__builtin_ia32_pmaxub256: 11411 case X86::BI__builtin_ia32_pmaxuw256: 11412 case X86::BI__builtin_ia32_pmaxud256: 11413 case X86::BI__builtin_ia32_pmaxuq256: 11414 case X86::BI__builtin_ia32_pmaxub512: 11415 case X86::BI__builtin_ia32_pmaxuw512: 11416 case X86::BI__builtin_ia32_pmaxud512: 11417 case X86::BI__builtin_ia32_pmaxuq512: 11418 return EmitX86MinMax(*this, ICmpInst::ICMP_UGT, Ops); 11419 case X86::BI__builtin_ia32_pminsb128: 11420 case X86::BI__builtin_ia32_pminsw128: 11421 case X86::BI__builtin_ia32_pminsd128: 11422 case X86::BI__builtin_ia32_pminsq128: 11423 case X86::BI__builtin_ia32_pminsb256: 11424 case X86::BI__builtin_ia32_pminsw256: 11425 case X86::BI__builtin_ia32_pminsd256: 11426 case X86::BI__builtin_ia32_pminsq256: 11427 case X86::BI__builtin_ia32_pminsb512: 11428 case X86::BI__builtin_ia32_pminsw512: 11429 case X86::BI__builtin_ia32_pminsd512: 11430 case X86::BI__builtin_ia32_pminsq512: 11431 return EmitX86MinMax(*this, ICmpInst::ICMP_SLT, Ops); 11432 case X86::BI__builtin_ia32_pminub128: 11433 case X86::BI__builtin_ia32_pminuw128: 11434 case X86::BI__builtin_ia32_pminud128: 11435 case X86::BI__builtin_ia32_pminuq128: 11436 case X86::BI__builtin_ia32_pminub256: 11437 case X86::BI__builtin_ia32_pminuw256: 11438 case X86::BI__builtin_ia32_pminud256: 11439 case X86::BI__builtin_ia32_pminuq256: 11440 case X86::BI__builtin_ia32_pminub512: 11441 case X86::BI__builtin_ia32_pminuw512: 11442 case X86::BI__builtin_ia32_pminud512: 11443 case X86::BI__builtin_ia32_pminuq512: 11444 return EmitX86MinMax(*this, ICmpInst::ICMP_ULT, Ops); 11445 11446 case X86::BI__builtin_ia32_pmuludq128: 11447 case X86::BI__builtin_ia32_pmuludq256: 11448 case X86::BI__builtin_ia32_pmuludq512: 11449 return EmitX86Muldq(*this, /*IsSigned*/false, Ops); 11450 11451 case X86::BI__builtin_ia32_pmuldq128: 11452 case X86::BI__builtin_ia32_pmuldq256: 11453 case X86::BI__builtin_ia32_pmuldq512: 11454 return EmitX86Muldq(*this, /*IsSigned*/true, Ops); 11455 11456 case X86::BI__builtin_ia32_pternlogd512_mask: 11457 case X86::BI__builtin_ia32_pternlogq512_mask: 11458 case X86::BI__builtin_ia32_pternlogd128_mask: 11459 case X86::BI__builtin_ia32_pternlogd256_mask: 11460 case X86::BI__builtin_ia32_pternlogq128_mask: 11461 case X86::BI__builtin_ia32_pternlogq256_mask: 11462 return EmitX86Ternlog(*this, /*ZeroMask*/false, Ops); 11463 11464 case X86::BI__builtin_ia32_pternlogd512_maskz: 11465 case X86::BI__builtin_ia32_pternlogq512_maskz: 11466 case X86::BI__builtin_ia32_pternlogd128_maskz: 11467 case X86::BI__builtin_ia32_pternlogd256_maskz: 11468 case X86::BI__builtin_ia32_pternlogq128_maskz: 11469 case X86::BI__builtin_ia32_pternlogq256_maskz: 11470 return EmitX86Ternlog(*this, /*ZeroMask*/true, Ops); 11471 11472 case X86::BI__builtin_ia32_vpshldd128: 11473 case X86::BI__builtin_ia32_vpshldd256: 11474 case X86::BI__builtin_ia32_vpshldd512: 11475 case X86::BI__builtin_ia32_vpshldq128: 11476 case X86::BI__builtin_ia32_vpshldq256: 11477 case X86::BI__builtin_ia32_vpshldq512: 11478 case X86::BI__builtin_ia32_vpshldw128: 11479 case X86::BI__builtin_ia32_vpshldw256: 11480 case X86::BI__builtin_ia32_vpshldw512: 11481 return EmitX86FunnelShift(*this, Ops[0], Ops[1], Ops[2], false); 11482 11483 case X86::BI__builtin_ia32_vpshrdd128: 11484 case X86::BI__builtin_ia32_vpshrdd256: 11485 case X86::BI__builtin_ia32_vpshrdd512: 11486 case X86::BI__builtin_ia32_vpshrdq128: 11487 case X86::BI__builtin_ia32_vpshrdq256: 11488 case X86::BI__builtin_ia32_vpshrdq512: 11489 case X86::BI__builtin_ia32_vpshrdw128: 11490 case X86::BI__builtin_ia32_vpshrdw256: 11491 case X86::BI__builtin_ia32_vpshrdw512: 11492 // Ops 0 and 1 are swapped. 11493 return EmitX86FunnelShift(*this, Ops[1], Ops[0], Ops[2], true); 11494 11495 case X86::BI__builtin_ia32_vpshldvd128: 11496 case X86::BI__builtin_ia32_vpshldvd256: 11497 case X86::BI__builtin_ia32_vpshldvd512: 11498 case X86::BI__builtin_ia32_vpshldvq128: 11499 case X86::BI__builtin_ia32_vpshldvq256: 11500 case X86::BI__builtin_ia32_vpshldvq512: 11501 case X86::BI__builtin_ia32_vpshldvw128: 11502 case X86::BI__builtin_ia32_vpshldvw256: 11503 case X86::BI__builtin_ia32_vpshldvw512: 11504 return EmitX86FunnelShift(*this, Ops[0], Ops[1], Ops[2], false); 11505 11506 case X86::BI__builtin_ia32_vpshrdvd128: 11507 case X86::BI__builtin_ia32_vpshrdvd256: 11508 case X86::BI__builtin_ia32_vpshrdvd512: 11509 case X86::BI__builtin_ia32_vpshrdvq128: 11510 case X86::BI__builtin_ia32_vpshrdvq256: 11511 case X86::BI__builtin_ia32_vpshrdvq512: 11512 case X86::BI__builtin_ia32_vpshrdvw128: 11513 case X86::BI__builtin_ia32_vpshrdvw256: 11514 case X86::BI__builtin_ia32_vpshrdvw512: 11515 // Ops 0 and 1 are swapped. 11516 return EmitX86FunnelShift(*this, Ops[1], Ops[0], Ops[2], true); 11517 11518 // 3DNow! 11519 case X86::BI__builtin_ia32_pswapdsf: 11520 case X86::BI__builtin_ia32_pswapdsi: { 11521 llvm::Type *MMXTy = llvm::Type::getX86_MMXTy(getLLVMContext()); 11522 Ops[0] = Builder.CreateBitCast(Ops[0], MMXTy, "cast"); 11523 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_3dnowa_pswapd); 11524 return Builder.CreateCall(F, Ops, "pswapd"); 11525 } 11526 case X86::BI__builtin_ia32_rdrand16_step: 11527 case X86::BI__builtin_ia32_rdrand32_step: 11528 case X86::BI__builtin_ia32_rdrand64_step: 11529 case X86::BI__builtin_ia32_rdseed16_step: 11530 case X86::BI__builtin_ia32_rdseed32_step: 11531 case X86::BI__builtin_ia32_rdseed64_step: { 11532 Intrinsic::ID ID; 11533 switch (BuiltinID) { 11534 default: llvm_unreachable("Unsupported intrinsic!"); 11535 case X86::BI__builtin_ia32_rdrand16_step: 11536 ID = Intrinsic::x86_rdrand_16; 11537 break; 11538 case X86::BI__builtin_ia32_rdrand32_step: 11539 ID = Intrinsic::x86_rdrand_32; 11540 break; 11541 case X86::BI__builtin_ia32_rdrand64_step: 11542 ID = Intrinsic::x86_rdrand_64; 11543 break; 11544 case X86::BI__builtin_ia32_rdseed16_step: 11545 ID = Intrinsic::x86_rdseed_16; 11546 break; 11547 case X86::BI__builtin_ia32_rdseed32_step: 11548 ID = Intrinsic::x86_rdseed_32; 11549 break; 11550 case X86::BI__builtin_ia32_rdseed64_step: 11551 ID = Intrinsic::x86_rdseed_64; 11552 break; 11553 } 11554 11555 Value *Call = Builder.CreateCall(CGM.getIntrinsic(ID)); 11556 Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 0), 11557 Ops[0]); 11558 return Builder.CreateExtractValue(Call, 1); 11559 } 11560 case X86::BI__builtin_ia32_addcarryx_u32: 11561 case X86::BI__builtin_ia32_addcarryx_u64: 11562 case X86::BI__builtin_ia32_subborrow_u32: 11563 case X86::BI__builtin_ia32_subborrow_u64: { 11564 Intrinsic::ID IID; 11565 switch (BuiltinID) { 11566 default: llvm_unreachable("Unsupported intrinsic!"); 11567 case X86::BI__builtin_ia32_addcarryx_u32: 11568 IID = Intrinsic::x86_addcarry_32; 11569 break; 11570 case X86::BI__builtin_ia32_addcarryx_u64: 11571 IID = Intrinsic::x86_addcarry_64; 11572 break; 11573 case X86::BI__builtin_ia32_subborrow_u32: 11574 IID = Intrinsic::x86_subborrow_32; 11575 break; 11576 case X86::BI__builtin_ia32_subborrow_u64: 11577 IID = Intrinsic::x86_subborrow_64; 11578 break; 11579 } 11580 11581 Value *Call = Builder.CreateCall(CGM.getIntrinsic(IID), 11582 { Ops[0], Ops[1], Ops[2] }); 11583 Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 1), 11584 Ops[3]); 11585 return Builder.CreateExtractValue(Call, 0); 11586 } 11587 11588 case X86::BI__builtin_ia32_fpclassps128_mask: 11589 case X86::BI__builtin_ia32_fpclassps256_mask: 11590 case X86::BI__builtin_ia32_fpclassps512_mask: 11591 case X86::BI__builtin_ia32_fpclasspd128_mask: 11592 case X86::BI__builtin_ia32_fpclasspd256_mask: 11593 case X86::BI__builtin_ia32_fpclasspd512_mask: { 11594 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 11595 Value *MaskIn = Ops[2]; 11596 Ops.erase(&Ops[2]); 11597 11598 Intrinsic::ID ID; 11599 switch (BuiltinID) { 11600 default: llvm_unreachable("Unsupported intrinsic!"); 11601 case X86::BI__builtin_ia32_fpclassps128_mask: 11602 ID = Intrinsic::x86_avx512_fpclass_ps_128; 11603 break; 11604 case X86::BI__builtin_ia32_fpclassps256_mask: 11605 ID = Intrinsic::x86_avx512_fpclass_ps_256; 11606 break; 11607 case X86::BI__builtin_ia32_fpclassps512_mask: 11608 ID = Intrinsic::x86_avx512_fpclass_ps_512; 11609 break; 11610 case X86::BI__builtin_ia32_fpclasspd128_mask: 11611 ID = Intrinsic::x86_avx512_fpclass_pd_128; 11612 break; 11613 case X86::BI__builtin_ia32_fpclasspd256_mask: 11614 ID = Intrinsic::x86_avx512_fpclass_pd_256; 11615 break; 11616 case X86::BI__builtin_ia32_fpclasspd512_mask: 11617 ID = Intrinsic::x86_avx512_fpclass_pd_512; 11618 break; 11619 } 11620 11621 Value *Fpclass = Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 11622 return EmitX86MaskedCompareResult(*this, Fpclass, NumElts, MaskIn); 11623 } 11624 11625 case X86::BI__builtin_ia32_vpmultishiftqb128: 11626 case X86::BI__builtin_ia32_vpmultishiftqb256: 11627 case X86::BI__builtin_ia32_vpmultishiftqb512: { 11628 Intrinsic::ID ID; 11629 switch (BuiltinID) { 11630 default: llvm_unreachable("Unsupported intrinsic!"); 11631 case X86::BI__builtin_ia32_vpmultishiftqb128: 11632 ID = Intrinsic::x86_avx512_pmultishift_qb_128; 11633 break; 11634 case X86::BI__builtin_ia32_vpmultishiftqb256: 11635 ID = Intrinsic::x86_avx512_pmultishift_qb_256; 11636 break; 11637 case X86::BI__builtin_ia32_vpmultishiftqb512: 11638 ID = Intrinsic::x86_avx512_pmultishift_qb_512; 11639 break; 11640 } 11641 11642 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 11643 } 11644 11645 case X86::BI__builtin_ia32_vpshufbitqmb128_mask: 11646 case X86::BI__builtin_ia32_vpshufbitqmb256_mask: 11647 case X86::BI__builtin_ia32_vpshufbitqmb512_mask: { 11648 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 11649 Value *MaskIn = Ops[2]; 11650 Ops.erase(&Ops[2]); 11651 11652 Intrinsic::ID ID; 11653 switch (BuiltinID) { 11654 default: llvm_unreachable("Unsupported intrinsic!"); 11655 case X86::BI__builtin_ia32_vpshufbitqmb128_mask: 11656 ID = Intrinsic::x86_avx512_vpshufbitqmb_128; 11657 break; 11658 case X86::BI__builtin_ia32_vpshufbitqmb256_mask: 11659 ID = Intrinsic::x86_avx512_vpshufbitqmb_256; 11660 break; 11661 case X86::BI__builtin_ia32_vpshufbitqmb512_mask: 11662 ID = Intrinsic::x86_avx512_vpshufbitqmb_512; 11663 break; 11664 } 11665 11666 Value *Shufbit = Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 11667 return EmitX86MaskedCompareResult(*this, Shufbit, NumElts, MaskIn); 11668 } 11669 11670 // packed comparison intrinsics 11671 case X86::BI__builtin_ia32_cmpeqps: 11672 case X86::BI__builtin_ia32_cmpeqpd: 11673 return getVectorFCmpIR(CmpInst::FCMP_OEQ); 11674 case X86::BI__builtin_ia32_cmpltps: 11675 case X86::BI__builtin_ia32_cmpltpd: 11676 return getVectorFCmpIR(CmpInst::FCMP_OLT); 11677 case X86::BI__builtin_ia32_cmpleps: 11678 case X86::BI__builtin_ia32_cmplepd: 11679 return getVectorFCmpIR(CmpInst::FCMP_OLE); 11680 case X86::BI__builtin_ia32_cmpunordps: 11681 case X86::BI__builtin_ia32_cmpunordpd: 11682 return getVectorFCmpIR(CmpInst::FCMP_UNO); 11683 case X86::BI__builtin_ia32_cmpneqps: 11684 case X86::BI__builtin_ia32_cmpneqpd: 11685 return getVectorFCmpIR(CmpInst::FCMP_UNE); 11686 case X86::BI__builtin_ia32_cmpnltps: 11687 case X86::BI__builtin_ia32_cmpnltpd: 11688 return getVectorFCmpIR(CmpInst::FCMP_UGE); 11689 case X86::BI__builtin_ia32_cmpnleps: 11690 case X86::BI__builtin_ia32_cmpnlepd: 11691 return getVectorFCmpIR(CmpInst::FCMP_UGT); 11692 case X86::BI__builtin_ia32_cmpordps: 11693 case X86::BI__builtin_ia32_cmpordpd: 11694 return getVectorFCmpIR(CmpInst::FCMP_ORD); 11695 case X86::BI__builtin_ia32_cmpps: 11696 case X86::BI__builtin_ia32_cmpps256: 11697 case X86::BI__builtin_ia32_cmppd: 11698 case X86::BI__builtin_ia32_cmppd256: 11699 case X86::BI__builtin_ia32_cmpps128_mask: 11700 case X86::BI__builtin_ia32_cmpps256_mask: 11701 case X86::BI__builtin_ia32_cmpps512_mask: 11702 case X86::BI__builtin_ia32_cmppd128_mask: 11703 case X86::BI__builtin_ia32_cmppd256_mask: 11704 case X86::BI__builtin_ia32_cmppd512_mask: { 11705 // Lowering vector comparisons to fcmp instructions, while 11706 // ignoring signalling behaviour requested 11707 // ignoring rounding mode requested 11708 // This is is only possible as long as FENV_ACCESS is not implemented. 11709 // See also: https://reviews.llvm.org/D45616 11710 11711 // The third argument is the comparison condition, and integer in the 11712 // range [0, 31] 11713 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x1f; 11714 11715 // Lowering to IR fcmp instruction. 11716 // Ignoring requested signaling behaviour, 11717 // e.g. both _CMP_GT_OS & _CMP_GT_OQ are translated to FCMP_OGT. 11718 FCmpInst::Predicate Pred; 11719 switch (CC) { 11720 case 0x00: Pred = FCmpInst::FCMP_OEQ; break; 11721 case 0x01: Pred = FCmpInst::FCMP_OLT; break; 11722 case 0x02: Pred = FCmpInst::FCMP_OLE; break; 11723 case 0x03: Pred = FCmpInst::FCMP_UNO; break; 11724 case 0x04: Pred = FCmpInst::FCMP_UNE; break; 11725 case 0x05: Pred = FCmpInst::FCMP_UGE; break; 11726 case 0x06: Pred = FCmpInst::FCMP_UGT; break; 11727 case 0x07: Pred = FCmpInst::FCMP_ORD; break; 11728 case 0x08: Pred = FCmpInst::FCMP_UEQ; break; 11729 case 0x09: Pred = FCmpInst::FCMP_ULT; break; 11730 case 0x0a: Pred = FCmpInst::FCMP_ULE; break; 11731 case 0x0b: Pred = FCmpInst::FCMP_FALSE; break; 11732 case 0x0c: Pred = FCmpInst::FCMP_ONE; break; 11733 case 0x0d: Pred = FCmpInst::FCMP_OGE; break; 11734 case 0x0e: Pred = FCmpInst::FCMP_OGT; break; 11735 case 0x0f: Pred = FCmpInst::FCMP_TRUE; break; 11736 case 0x10: Pred = FCmpInst::FCMP_OEQ; break; 11737 case 0x11: Pred = FCmpInst::FCMP_OLT; break; 11738 case 0x12: Pred = FCmpInst::FCMP_OLE; break; 11739 case 0x13: Pred = FCmpInst::FCMP_UNO; break; 11740 case 0x14: Pred = FCmpInst::FCMP_UNE; break; 11741 case 0x15: Pred = FCmpInst::FCMP_UGE; break; 11742 case 0x16: Pred = FCmpInst::FCMP_UGT; break; 11743 case 0x17: Pred = FCmpInst::FCMP_ORD; break; 11744 case 0x18: Pred = FCmpInst::FCMP_UEQ; break; 11745 case 0x19: Pred = FCmpInst::FCMP_ULT; break; 11746 case 0x1a: Pred = FCmpInst::FCMP_ULE; break; 11747 case 0x1b: Pred = FCmpInst::FCMP_FALSE; break; 11748 case 0x1c: Pred = FCmpInst::FCMP_ONE; break; 11749 case 0x1d: Pred = FCmpInst::FCMP_OGE; break; 11750 case 0x1e: Pred = FCmpInst::FCMP_OGT; break; 11751 case 0x1f: Pred = FCmpInst::FCMP_TRUE; break; 11752 default: llvm_unreachable("Unhandled CC"); 11753 } 11754 11755 // Builtins without the _mask suffix return a vector of integers 11756 // of the same width as the input vectors 11757 switch (BuiltinID) { 11758 case X86::BI__builtin_ia32_cmpps512_mask: 11759 case X86::BI__builtin_ia32_cmppd512_mask: 11760 case X86::BI__builtin_ia32_cmpps128_mask: 11761 case X86::BI__builtin_ia32_cmpps256_mask: 11762 case X86::BI__builtin_ia32_cmppd128_mask: 11763 case X86::BI__builtin_ia32_cmppd256_mask: { 11764 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 11765 Value *Cmp = Builder.CreateFCmp(Pred, Ops[0], Ops[1]); 11766 return EmitX86MaskedCompareResult(*this, Cmp, NumElts, Ops[3]); 11767 } 11768 default: 11769 return getVectorFCmpIR(Pred); 11770 } 11771 } 11772 11773 // SSE scalar comparison intrinsics 11774 case X86::BI__builtin_ia32_cmpeqss: 11775 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 0); 11776 case X86::BI__builtin_ia32_cmpltss: 11777 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 1); 11778 case X86::BI__builtin_ia32_cmpless: 11779 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 2); 11780 case X86::BI__builtin_ia32_cmpunordss: 11781 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 3); 11782 case X86::BI__builtin_ia32_cmpneqss: 11783 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 4); 11784 case X86::BI__builtin_ia32_cmpnltss: 11785 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 5); 11786 case X86::BI__builtin_ia32_cmpnless: 11787 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 6); 11788 case X86::BI__builtin_ia32_cmpordss: 11789 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 7); 11790 case X86::BI__builtin_ia32_cmpeqsd: 11791 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 0); 11792 case X86::BI__builtin_ia32_cmpltsd: 11793 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 1); 11794 case X86::BI__builtin_ia32_cmplesd: 11795 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 2); 11796 case X86::BI__builtin_ia32_cmpunordsd: 11797 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 3); 11798 case X86::BI__builtin_ia32_cmpneqsd: 11799 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 4); 11800 case X86::BI__builtin_ia32_cmpnltsd: 11801 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 5); 11802 case X86::BI__builtin_ia32_cmpnlesd: 11803 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 6); 11804 case X86::BI__builtin_ia32_cmpordsd: 11805 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 7); 11806 11807 case X86::BI__emul: 11808 case X86::BI__emulu: { 11809 llvm::Type *Int64Ty = llvm::IntegerType::get(getLLVMContext(), 64); 11810 bool isSigned = (BuiltinID == X86::BI__emul); 11811 Value *LHS = Builder.CreateIntCast(Ops[0], Int64Ty, isSigned); 11812 Value *RHS = Builder.CreateIntCast(Ops[1], Int64Ty, isSigned); 11813 return Builder.CreateMul(LHS, RHS, "", !isSigned, isSigned); 11814 } 11815 case X86::BI__mulh: 11816 case X86::BI__umulh: 11817 case X86::BI_mul128: 11818 case X86::BI_umul128: { 11819 llvm::Type *ResType = ConvertType(E->getType()); 11820 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 11821 11822 bool IsSigned = (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI_mul128); 11823 Value *LHS = Builder.CreateIntCast(Ops[0], Int128Ty, IsSigned); 11824 Value *RHS = Builder.CreateIntCast(Ops[1], Int128Ty, IsSigned); 11825 11826 Value *MulResult, *HigherBits; 11827 if (IsSigned) { 11828 MulResult = Builder.CreateNSWMul(LHS, RHS); 11829 HigherBits = Builder.CreateAShr(MulResult, 64); 11830 } else { 11831 MulResult = Builder.CreateNUWMul(LHS, RHS); 11832 HigherBits = Builder.CreateLShr(MulResult, 64); 11833 } 11834 HigherBits = Builder.CreateIntCast(HigherBits, ResType, IsSigned); 11835 11836 if (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI__umulh) 11837 return HigherBits; 11838 11839 Address HighBitsAddress = EmitPointerWithAlignment(E->getArg(2)); 11840 Builder.CreateStore(HigherBits, HighBitsAddress); 11841 return Builder.CreateIntCast(MulResult, ResType, IsSigned); 11842 } 11843 11844 case X86::BI__faststorefence: { 11845 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 11846 llvm::SyncScope::System); 11847 } 11848 case X86::BI__shiftleft128: 11849 case X86::BI__shiftright128: { 11850 // FIXME: Once fshl/fshr no longer add an unneeded and and cmov, do this: 11851 // llvm::Function *F = CGM.getIntrinsic( 11852 // BuiltinID == X86::BI__shiftleft128 ? Intrinsic::fshl : Intrinsic::fshr, 11853 // Int64Ty); 11854 // Ops[2] = Builder.CreateZExt(Ops[2], Int64Ty); 11855 // return Builder.CreateCall(F, Ops); 11856 llvm::Type *Int128Ty = Builder.getInt128Ty(); 11857 Value *HighPart128 = 11858 Builder.CreateShl(Builder.CreateZExt(Ops[1], Int128Ty), 64); 11859 Value *LowPart128 = Builder.CreateZExt(Ops[0], Int128Ty); 11860 Value *Val = Builder.CreateOr(HighPart128, LowPart128); 11861 Value *Amt = Builder.CreateAnd(Builder.CreateZExt(Ops[2], Int128Ty), 11862 llvm::ConstantInt::get(Int128Ty, 0x3f)); 11863 Value *Res; 11864 if (BuiltinID == X86::BI__shiftleft128) 11865 Res = Builder.CreateLShr(Builder.CreateShl(Val, Amt), 64); 11866 else 11867 Res = Builder.CreateLShr(Val, Amt); 11868 return Builder.CreateTrunc(Res, Int64Ty); 11869 } 11870 case X86::BI_ReadWriteBarrier: 11871 case X86::BI_ReadBarrier: 11872 case X86::BI_WriteBarrier: { 11873 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 11874 llvm::SyncScope::SingleThread); 11875 } 11876 case X86::BI_BitScanForward: 11877 case X86::BI_BitScanForward64: 11878 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 11879 case X86::BI_BitScanReverse: 11880 case X86::BI_BitScanReverse64: 11881 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 11882 11883 case X86::BI_InterlockedAnd64: 11884 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 11885 case X86::BI_InterlockedExchange64: 11886 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 11887 case X86::BI_InterlockedExchangeAdd64: 11888 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 11889 case X86::BI_InterlockedExchangeSub64: 11890 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 11891 case X86::BI_InterlockedOr64: 11892 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 11893 case X86::BI_InterlockedXor64: 11894 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 11895 case X86::BI_InterlockedDecrement64: 11896 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 11897 case X86::BI_InterlockedIncrement64: 11898 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 11899 case X86::BI_InterlockedCompareExchange128: { 11900 // InterlockedCompareExchange128 doesn't directly refer to 128bit ints, 11901 // instead it takes pointers to 64bit ints for Destination and 11902 // ComparandResult, and exchange is taken as two 64bit ints (high & low). 11903 // The previous value is written to ComparandResult, and success is 11904 // returned. 11905 11906 llvm::Type *Int128Ty = Builder.getInt128Ty(); 11907 llvm::Type *Int128PtrTy = Int128Ty->getPointerTo(); 11908 11909 Value *Destination = 11910 Builder.CreateBitCast(Ops[0], Int128PtrTy); 11911 Value *ExchangeHigh128 = Builder.CreateZExt(Ops[1], Int128Ty); 11912 Value *ExchangeLow128 = Builder.CreateZExt(Ops[2], Int128Ty); 11913 Address ComparandResult(Builder.CreateBitCast(Ops[3], Int128PtrTy), 11914 getContext().toCharUnitsFromBits(128)); 11915 11916 Value *Exchange = Builder.CreateOr( 11917 Builder.CreateShl(ExchangeHigh128, 64, "", false, false), 11918 ExchangeLow128); 11919 11920 Value *Comparand = Builder.CreateLoad(ComparandResult); 11921 11922 AtomicCmpXchgInst *CXI = 11923 Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 11924 AtomicOrdering::SequentiallyConsistent, 11925 AtomicOrdering::SequentiallyConsistent); 11926 CXI->setVolatile(true); 11927 11928 // Write the result back to the inout pointer. 11929 Builder.CreateStore(Builder.CreateExtractValue(CXI, 0), ComparandResult); 11930 11931 // Get the success boolean and zero extend it to i8. 11932 Value *Success = Builder.CreateExtractValue(CXI, 1); 11933 return Builder.CreateZExt(Success, ConvertType(E->getType())); 11934 } 11935 11936 case X86::BI_AddressOfReturnAddress: { 11937 Function *F = CGM.getIntrinsic(Intrinsic::addressofreturnaddress); 11938 return Builder.CreateCall(F); 11939 } 11940 case X86::BI__stosb: { 11941 // We treat __stosb as a volatile memset - it may not generate "rep stosb" 11942 // instruction, but it will create a memset that won't be optimized away. 11943 return Builder.CreateMemSet(Ops[0], Ops[1], Ops[2], 1, true); 11944 } 11945 case X86::BI__ud2: 11946 // llvm.trap makes a ud2a instruction on x86. 11947 return EmitTrapCall(Intrinsic::trap); 11948 case X86::BI__int2c: { 11949 // This syscall signals a driver assertion failure in x86 NT kernels. 11950 llvm::FunctionType *FTy = llvm::FunctionType::get(VoidTy, false); 11951 llvm::InlineAsm *IA = 11952 llvm::InlineAsm::get(FTy, "int $$0x2c", "", /*SideEffects=*/true); 11953 llvm::AttributeList NoReturnAttr = llvm::AttributeList::get( 11954 getLLVMContext(), llvm::AttributeList::FunctionIndex, 11955 llvm::Attribute::NoReturn); 11956 llvm::CallInst *CI = Builder.CreateCall(IA); 11957 CI->setAttributes(NoReturnAttr); 11958 return CI; 11959 } 11960 case X86::BI__readfsbyte: 11961 case X86::BI__readfsword: 11962 case X86::BI__readfsdword: 11963 case X86::BI__readfsqword: { 11964 llvm::Type *IntTy = ConvertType(E->getType()); 11965 Value *Ptr = 11966 Builder.CreateIntToPtr(Ops[0], llvm::PointerType::get(IntTy, 257)); 11967 LoadInst *Load = Builder.CreateAlignedLoad( 11968 IntTy, Ptr, getContext().getTypeAlignInChars(E->getType())); 11969 Load->setVolatile(true); 11970 return Load; 11971 } 11972 case X86::BI__readgsbyte: 11973 case X86::BI__readgsword: 11974 case X86::BI__readgsdword: 11975 case X86::BI__readgsqword: { 11976 llvm::Type *IntTy = ConvertType(E->getType()); 11977 Value *Ptr = 11978 Builder.CreateIntToPtr(Ops[0], llvm::PointerType::get(IntTy, 256)); 11979 LoadInst *Load = Builder.CreateAlignedLoad( 11980 IntTy, Ptr, getContext().getTypeAlignInChars(E->getType())); 11981 Load->setVolatile(true); 11982 return Load; 11983 } 11984 case X86::BI__builtin_ia32_paddsb512: 11985 case X86::BI__builtin_ia32_paddsw512: 11986 case X86::BI__builtin_ia32_paddsb256: 11987 case X86::BI__builtin_ia32_paddsw256: 11988 case X86::BI__builtin_ia32_paddsb128: 11989 case X86::BI__builtin_ia32_paddsw128: 11990 return EmitX86AddSubSatExpr(*this, Ops, true, true); 11991 case X86::BI__builtin_ia32_paddusb512: 11992 case X86::BI__builtin_ia32_paddusw512: 11993 case X86::BI__builtin_ia32_paddusb256: 11994 case X86::BI__builtin_ia32_paddusw256: 11995 case X86::BI__builtin_ia32_paddusb128: 11996 case X86::BI__builtin_ia32_paddusw128: 11997 return EmitX86AddSubSatExpr(*this, Ops, false, true); 11998 case X86::BI__builtin_ia32_psubsb512: 11999 case X86::BI__builtin_ia32_psubsw512: 12000 case X86::BI__builtin_ia32_psubsb256: 12001 case X86::BI__builtin_ia32_psubsw256: 12002 case X86::BI__builtin_ia32_psubsb128: 12003 case X86::BI__builtin_ia32_psubsw128: 12004 return EmitX86AddSubSatExpr(*this, Ops, true, false); 12005 case X86::BI__builtin_ia32_psubusb512: 12006 case X86::BI__builtin_ia32_psubusw512: 12007 case X86::BI__builtin_ia32_psubusb256: 12008 case X86::BI__builtin_ia32_psubusw256: 12009 case X86::BI__builtin_ia32_psubusb128: 12010 case X86::BI__builtin_ia32_psubusw128: 12011 return EmitX86AddSubSatExpr(*this, Ops, false, false); 12012 } 12013 } 12014 12015 Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, 12016 const CallExpr *E) { 12017 SmallVector<Value*, 4> Ops; 12018 12019 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) 12020 Ops.push_back(EmitScalarExpr(E->getArg(i))); 12021 12022 Intrinsic::ID ID = Intrinsic::not_intrinsic; 12023 12024 switch (BuiltinID) { 12025 default: return nullptr; 12026 12027 // __builtin_ppc_get_timebase is GCC 4.8+'s PowerPC-specific name for what we 12028 // call __builtin_readcyclecounter. 12029 case PPC::BI__builtin_ppc_get_timebase: 12030 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::readcyclecounter)); 12031 12032 // vec_ld, vec_xl_be, vec_lvsl, vec_lvsr 12033 case PPC::BI__builtin_altivec_lvx: 12034 case PPC::BI__builtin_altivec_lvxl: 12035 case PPC::BI__builtin_altivec_lvebx: 12036 case PPC::BI__builtin_altivec_lvehx: 12037 case PPC::BI__builtin_altivec_lvewx: 12038 case PPC::BI__builtin_altivec_lvsl: 12039 case PPC::BI__builtin_altivec_lvsr: 12040 case PPC::BI__builtin_vsx_lxvd2x: 12041 case PPC::BI__builtin_vsx_lxvw4x: 12042 case PPC::BI__builtin_vsx_lxvd2x_be: 12043 case PPC::BI__builtin_vsx_lxvw4x_be: 12044 case PPC::BI__builtin_vsx_lxvl: 12045 case PPC::BI__builtin_vsx_lxvll: 12046 { 12047 if(BuiltinID == PPC::BI__builtin_vsx_lxvl || 12048 BuiltinID == PPC::BI__builtin_vsx_lxvll){ 12049 Ops[0] = Builder.CreateBitCast(Ops[0], Int8PtrTy); 12050 }else { 12051 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 12052 Ops[0] = Builder.CreateGEP(Ops[1], Ops[0]); 12053 Ops.pop_back(); 12054 } 12055 12056 switch (BuiltinID) { 12057 default: llvm_unreachable("Unsupported ld/lvsl/lvsr intrinsic!"); 12058 case PPC::BI__builtin_altivec_lvx: 12059 ID = Intrinsic::ppc_altivec_lvx; 12060 break; 12061 case PPC::BI__builtin_altivec_lvxl: 12062 ID = Intrinsic::ppc_altivec_lvxl; 12063 break; 12064 case PPC::BI__builtin_altivec_lvebx: 12065 ID = Intrinsic::ppc_altivec_lvebx; 12066 break; 12067 case PPC::BI__builtin_altivec_lvehx: 12068 ID = Intrinsic::ppc_altivec_lvehx; 12069 break; 12070 case PPC::BI__builtin_altivec_lvewx: 12071 ID = Intrinsic::ppc_altivec_lvewx; 12072 break; 12073 case PPC::BI__builtin_altivec_lvsl: 12074 ID = Intrinsic::ppc_altivec_lvsl; 12075 break; 12076 case PPC::BI__builtin_altivec_lvsr: 12077 ID = Intrinsic::ppc_altivec_lvsr; 12078 break; 12079 case PPC::BI__builtin_vsx_lxvd2x: 12080 ID = Intrinsic::ppc_vsx_lxvd2x; 12081 break; 12082 case PPC::BI__builtin_vsx_lxvw4x: 12083 ID = Intrinsic::ppc_vsx_lxvw4x; 12084 break; 12085 case PPC::BI__builtin_vsx_lxvd2x_be: 12086 ID = Intrinsic::ppc_vsx_lxvd2x_be; 12087 break; 12088 case PPC::BI__builtin_vsx_lxvw4x_be: 12089 ID = Intrinsic::ppc_vsx_lxvw4x_be; 12090 break; 12091 case PPC::BI__builtin_vsx_lxvl: 12092 ID = Intrinsic::ppc_vsx_lxvl; 12093 break; 12094 case PPC::BI__builtin_vsx_lxvll: 12095 ID = Intrinsic::ppc_vsx_lxvll; 12096 break; 12097 } 12098 llvm::Function *F = CGM.getIntrinsic(ID); 12099 return Builder.CreateCall(F, Ops, ""); 12100 } 12101 12102 // vec_st, vec_xst_be 12103 case PPC::BI__builtin_altivec_stvx: 12104 case PPC::BI__builtin_altivec_stvxl: 12105 case PPC::BI__builtin_altivec_stvebx: 12106 case PPC::BI__builtin_altivec_stvehx: 12107 case PPC::BI__builtin_altivec_stvewx: 12108 case PPC::BI__builtin_vsx_stxvd2x: 12109 case PPC::BI__builtin_vsx_stxvw4x: 12110 case PPC::BI__builtin_vsx_stxvd2x_be: 12111 case PPC::BI__builtin_vsx_stxvw4x_be: 12112 case PPC::BI__builtin_vsx_stxvl: 12113 case PPC::BI__builtin_vsx_stxvll: 12114 { 12115 if(BuiltinID == PPC::BI__builtin_vsx_stxvl || 12116 BuiltinID == PPC::BI__builtin_vsx_stxvll ){ 12117 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 12118 }else { 12119 Ops[2] = Builder.CreateBitCast(Ops[2], Int8PtrTy); 12120 Ops[1] = Builder.CreateGEP(Ops[2], Ops[1]); 12121 Ops.pop_back(); 12122 } 12123 12124 switch (BuiltinID) { 12125 default: llvm_unreachable("Unsupported st intrinsic!"); 12126 case PPC::BI__builtin_altivec_stvx: 12127 ID = Intrinsic::ppc_altivec_stvx; 12128 break; 12129 case PPC::BI__builtin_altivec_stvxl: 12130 ID = Intrinsic::ppc_altivec_stvxl; 12131 break; 12132 case PPC::BI__builtin_altivec_stvebx: 12133 ID = Intrinsic::ppc_altivec_stvebx; 12134 break; 12135 case PPC::BI__builtin_altivec_stvehx: 12136 ID = Intrinsic::ppc_altivec_stvehx; 12137 break; 12138 case PPC::BI__builtin_altivec_stvewx: 12139 ID = Intrinsic::ppc_altivec_stvewx; 12140 break; 12141 case PPC::BI__builtin_vsx_stxvd2x: 12142 ID = Intrinsic::ppc_vsx_stxvd2x; 12143 break; 12144 case PPC::BI__builtin_vsx_stxvw4x: 12145 ID = Intrinsic::ppc_vsx_stxvw4x; 12146 break; 12147 case PPC::BI__builtin_vsx_stxvd2x_be: 12148 ID = Intrinsic::ppc_vsx_stxvd2x_be; 12149 break; 12150 case PPC::BI__builtin_vsx_stxvw4x_be: 12151 ID = Intrinsic::ppc_vsx_stxvw4x_be; 12152 break; 12153 case PPC::BI__builtin_vsx_stxvl: 12154 ID = Intrinsic::ppc_vsx_stxvl; 12155 break; 12156 case PPC::BI__builtin_vsx_stxvll: 12157 ID = Intrinsic::ppc_vsx_stxvll; 12158 break; 12159 } 12160 llvm::Function *F = CGM.getIntrinsic(ID); 12161 return Builder.CreateCall(F, Ops, ""); 12162 } 12163 // Square root 12164 case PPC::BI__builtin_vsx_xvsqrtsp: 12165 case PPC::BI__builtin_vsx_xvsqrtdp: { 12166 llvm::Type *ResultType = ConvertType(E->getType()); 12167 Value *X = EmitScalarExpr(E->getArg(0)); 12168 ID = Intrinsic::sqrt; 12169 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 12170 return Builder.CreateCall(F, X); 12171 } 12172 // Count leading zeros 12173 case PPC::BI__builtin_altivec_vclzb: 12174 case PPC::BI__builtin_altivec_vclzh: 12175 case PPC::BI__builtin_altivec_vclzw: 12176 case PPC::BI__builtin_altivec_vclzd: { 12177 llvm::Type *ResultType = ConvertType(E->getType()); 12178 Value *X = EmitScalarExpr(E->getArg(0)); 12179 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 12180 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 12181 return Builder.CreateCall(F, {X, Undef}); 12182 } 12183 case PPC::BI__builtin_altivec_vctzb: 12184 case PPC::BI__builtin_altivec_vctzh: 12185 case PPC::BI__builtin_altivec_vctzw: 12186 case PPC::BI__builtin_altivec_vctzd: { 12187 llvm::Type *ResultType = ConvertType(E->getType()); 12188 Value *X = EmitScalarExpr(E->getArg(0)); 12189 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 12190 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 12191 return Builder.CreateCall(F, {X, Undef}); 12192 } 12193 case PPC::BI__builtin_altivec_vpopcntb: 12194 case PPC::BI__builtin_altivec_vpopcnth: 12195 case PPC::BI__builtin_altivec_vpopcntw: 12196 case PPC::BI__builtin_altivec_vpopcntd: { 12197 llvm::Type *ResultType = ConvertType(E->getType()); 12198 Value *X = EmitScalarExpr(E->getArg(0)); 12199 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 12200 return Builder.CreateCall(F, X); 12201 } 12202 // Copy sign 12203 case PPC::BI__builtin_vsx_xvcpsgnsp: 12204 case PPC::BI__builtin_vsx_xvcpsgndp: { 12205 llvm::Type *ResultType = ConvertType(E->getType()); 12206 Value *X = EmitScalarExpr(E->getArg(0)); 12207 Value *Y = EmitScalarExpr(E->getArg(1)); 12208 ID = Intrinsic::copysign; 12209 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 12210 return Builder.CreateCall(F, {X, Y}); 12211 } 12212 // Rounding/truncation 12213 case PPC::BI__builtin_vsx_xvrspip: 12214 case PPC::BI__builtin_vsx_xvrdpip: 12215 case PPC::BI__builtin_vsx_xvrdpim: 12216 case PPC::BI__builtin_vsx_xvrspim: 12217 case PPC::BI__builtin_vsx_xvrdpi: 12218 case PPC::BI__builtin_vsx_xvrspi: 12219 case PPC::BI__builtin_vsx_xvrdpic: 12220 case PPC::BI__builtin_vsx_xvrspic: 12221 case PPC::BI__builtin_vsx_xvrdpiz: 12222 case PPC::BI__builtin_vsx_xvrspiz: { 12223 llvm::Type *ResultType = ConvertType(E->getType()); 12224 Value *X = EmitScalarExpr(E->getArg(0)); 12225 if (BuiltinID == PPC::BI__builtin_vsx_xvrdpim || 12226 BuiltinID == PPC::BI__builtin_vsx_xvrspim) 12227 ID = Intrinsic::floor; 12228 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpi || 12229 BuiltinID == PPC::BI__builtin_vsx_xvrspi) 12230 ID = Intrinsic::round; 12231 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpic || 12232 BuiltinID == PPC::BI__builtin_vsx_xvrspic) 12233 ID = Intrinsic::nearbyint; 12234 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpip || 12235 BuiltinID == PPC::BI__builtin_vsx_xvrspip) 12236 ID = Intrinsic::ceil; 12237 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpiz || 12238 BuiltinID == PPC::BI__builtin_vsx_xvrspiz) 12239 ID = Intrinsic::trunc; 12240 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 12241 return Builder.CreateCall(F, X); 12242 } 12243 12244 // Absolute value 12245 case PPC::BI__builtin_vsx_xvabsdp: 12246 case PPC::BI__builtin_vsx_xvabssp: { 12247 llvm::Type *ResultType = ConvertType(E->getType()); 12248 Value *X = EmitScalarExpr(E->getArg(0)); 12249 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 12250 return Builder.CreateCall(F, X); 12251 } 12252 12253 // FMA variations 12254 case PPC::BI__builtin_vsx_xvmaddadp: 12255 case PPC::BI__builtin_vsx_xvmaddasp: 12256 case PPC::BI__builtin_vsx_xvnmaddadp: 12257 case PPC::BI__builtin_vsx_xvnmaddasp: 12258 case PPC::BI__builtin_vsx_xvmsubadp: 12259 case PPC::BI__builtin_vsx_xvmsubasp: 12260 case PPC::BI__builtin_vsx_xvnmsubadp: 12261 case PPC::BI__builtin_vsx_xvnmsubasp: { 12262 llvm::Type *ResultType = ConvertType(E->getType()); 12263 Value *X = EmitScalarExpr(E->getArg(0)); 12264 Value *Y = EmitScalarExpr(E->getArg(1)); 12265 Value *Z = EmitScalarExpr(E->getArg(2)); 12266 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 12267 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 12268 switch (BuiltinID) { 12269 case PPC::BI__builtin_vsx_xvmaddadp: 12270 case PPC::BI__builtin_vsx_xvmaddasp: 12271 return Builder.CreateCall(F, {X, Y, Z}); 12272 case PPC::BI__builtin_vsx_xvnmaddadp: 12273 case PPC::BI__builtin_vsx_xvnmaddasp: 12274 return Builder.CreateFSub(Zero, 12275 Builder.CreateCall(F, {X, Y, Z}), "sub"); 12276 case PPC::BI__builtin_vsx_xvmsubadp: 12277 case PPC::BI__builtin_vsx_xvmsubasp: 12278 return Builder.CreateCall(F, 12279 {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 12280 case PPC::BI__builtin_vsx_xvnmsubadp: 12281 case PPC::BI__builtin_vsx_xvnmsubasp: 12282 Value *FsubRes = 12283 Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 12284 return Builder.CreateFSub(Zero, FsubRes, "sub"); 12285 } 12286 llvm_unreachable("Unknown FMA operation"); 12287 return nullptr; // Suppress no-return warning 12288 } 12289 12290 case PPC::BI__builtin_vsx_insertword: { 12291 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_vsx_xxinsertw); 12292 12293 // Third argument is a compile time constant int. It must be clamped to 12294 // to the range [0, 12]. 12295 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[2]); 12296 assert(ArgCI && 12297 "Third arg to xxinsertw intrinsic must be constant integer"); 12298 const int64_t MaxIndex = 12; 12299 int64_t Index = clamp(ArgCI->getSExtValue(), 0, MaxIndex); 12300 12301 // The builtin semantics don't exactly match the xxinsertw instructions 12302 // semantics (which ppc_vsx_xxinsertw follows). The builtin extracts the 12303 // word from the first argument, and inserts it in the second argument. The 12304 // instruction extracts the word from its second input register and inserts 12305 // it into its first input register, so swap the first and second arguments. 12306 std::swap(Ops[0], Ops[1]); 12307 12308 // Need to cast the second argument from a vector of unsigned int to a 12309 // vector of long long. 12310 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int64Ty, 2)); 12311 12312 if (getTarget().isLittleEndian()) { 12313 // Create a shuffle mask of (1, 0) 12314 Constant *ShuffleElts[2] = { ConstantInt::get(Int32Ty, 1), 12315 ConstantInt::get(Int32Ty, 0) 12316 }; 12317 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 12318 12319 // Reverse the double words in the vector we will extract from. 12320 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 12321 Ops[0] = Builder.CreateShuffleVector(Ops[0], Ops[0], ShuffleMask); 12322 12323 // Reverse the index. 12324 Index = MaxIndex - Index; 12325 } 12326 12327 // Intrinsic expects the first arg to be a vector of int. 12328 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 12329 Ops[2] = ConstantInt::getSigned(Int32Ty, Index); 12330 return Builder.CreateCall(F, Ops); 12331 } 12332 12333 case PPC::BI__builtin_vsx_extractuword: { 12334 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_vsx_xxextractuw); 12335 12336 // Intrinsic expects the first argument to be a vector of doublewords. 12337 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 12338 12339 // The second argument is a compile time constant int that needs to 12340 // be clamped to the range [0, 12]. 12341 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[1]); 12342 assert(ArgCI && 12343 "Second Arg to xxextractuw intrinsic must be a constant integer!"); 12344 const int64_t MaxIndex = 12; 12345 int64_t Index = clamp(ArgCI->getSExtValue(), 0, MaxIndex); 12346 12347 if (getTarget().isLittleEndian()) { 12348 // Reverse the index. 12349 Index = MaxIndex - Index; 12350 Ops[1] = ConstantInt::getSigned(Int32Ty, Index); 12351 12352 // Emit the call, then reverse the double words of the results vector. 12353 Value *Call = Builder.CreateCall(F, Ops); 12354 12355 // Create a shuffle mask of (1, 0) 12356 Constant *ShuffleElts[2] = { ConstantInt::get(Int32Ty, 1), 12357 ConstantInt::get(Int32Ty, 0) 12358 }; 12359 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 12360 12361 Value *ShuffleCall = Builder.CreateShuffleVector(Call, Call, ShuffleMask); 12362 return ShuffleCall; 12363 } else { 12364 Ops[1] = ConstantInt::getSigned(Int32Ty, Index); 12365 return Builder.CreateCall(F, Ops); 12366 } 12367 } 12368 12369 case PPC::BI__builtin_vsx_xxpermdi: { 12370 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[2]); 12371 assert(ArgCI && "Third arg must be constant integer!"); 12372 12373 unsigned Index = ArgCI->getZExtValue(); 12374 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 12375 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int64Ty, 2)); 12376 12377 // Account for endianness by treating this as just a shuffle. So we use the 12378 // same indices for both LE and BE in order to produce expected results in 12379 // both cases. 12380 unsigned ElemIdx0 = (Index & 2) >> 1; 12381 unsigned ElemIdx1 = 2 + (Index & 1); 12382 12383 Constant *ShuffleElts[2] = {ConstantInt::get(Int32Ty, ElemIdx0), 12384 ConstantInt::get(Int32Ty, ElemIdx1)}; 12385 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 12386 12387 Value *ShuffleCall = 12388 Builder.CreateShuffleVector(Ops[0], Ops[1], ShuffleMask); 12389 QualType BIRetType = E->getType(); 12390 auto RetTy = ConvertType(BIRetType); 12391 return Builder.CreateBitCast(ShuffleCall, RetTy); 12392 } 12393 12394 case PPC::BI__builtin_vsx_xxsldwi: { 12395 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[2]); 12396 assert(ArgCI && "Third argument must be a compile time constant"); 12397 unsigned Index = ArgCI->getZExtValue() & 0x3; 12398 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 12399 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int32Ty, 4)); 12400 12401 // Create a shuffle mask 12402 unsigned ElemIdx0; 12403 unsigned ElemIdx1; 12404 unsigned ElemIdx2; 12405 unsigned ElemIdx3; 12406 if (getTarget().isLittleEndian()) { 12407 // Little endian element N comes from element 8+N-Index of the 12408 // concatenated wide vector (of course, using modulo arithmetic on 12409 // the total number of elements). 12410 ElemIdx0 = (8 - Index) % 8; 12411 ElemIdx1 = (9 - Index) % 8; 12412 ElemIdx2 = (10 - Index) % 8; 12413 ElemIdx3 = (11 - Index) % 8; 12414 } else { 12415 // Big endian ElemIdx<N> = Index + N 12416 ElemIdx0 = Index; 12417 ElemIdx1 = Index + 1; 12418 ElemIdx2 = Index + 2; 12419 ElemIdx3 = Index + 3; 12420 } 12421 12422 Constant *ShuffleElts[4] = {ConstantInt::get(Int32Ty, ElemIdx0), 12423 ConstantInt::get(Int32Ty, ElemIdx1), 12424 ConstantInt::get(Int32Ty, ElemIdx2), 12425 ConstantInt::get(Int32Ty, ElemIdx3)}; 12426 12427 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 12428 Value *ShuffleCall = 12429 Builder.CreateShuffleVector(Ops[0], Ops[1], ShuffleMask); 12430 QualType BIRetType = E->getType(); 12431 auto RetTy = ConvertType(BIRetType); 12432 return Builder.CreateBitCast(ShuffleCall, RetTy); 12433 } 12434 12435 case PPC::BI__builtin_pack_vector_int128: { 12436 bool isLittleEndian = getTarget().isLittleEndian(); 12437 Value *UndefValue = 12438 llvm::UndefValue::get(llvm::VectorType::get(Ops[0]->getType(), 2)); 12439 Value *Res = Builder.CreateInsertElement( 12440 UndefValue, Ops[0], (uint64_t)(isLittleEndian ? 1 : 0)); 12441 Res = Builder.CreateInsertElement(Res, Ops[1], 12442 (uint64_t)(isLittleEndian ? 0 : 1)); 12443 return Builder.CreateBitCast(Res, ConvertType(E->getType())); 12444 } 12445 12446 case PPC::BI__builtin_unpack_vector_int128: { 12447 ConstantInt *Index = cast<ConstantInt>(Ops[1]); 12448 Value *Unpacked = Builder.CreateBitCast( 12449 Ops[0], llvm::VectorType::get(ConvertType(E->getType()), 2)); 12450 12451 if (getTarget().isLittleEndian()) 12452 Index = ConstantInt::get(Index->getType(), 1 - Index->getZExtValue()); 12453 12454 return Builder.CreateExtractElement(Unpacked, Index); 12455 } 12456 } 12457 } 12458 12459 Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID, 12460 const CallExpr *E) { 12461 switch (BuiltinID) { 12462 case AMDGPU::BI__builtin_amdgcn_div_scale: 12463 case AMDGPU::BI__builtin_amdgcn_div_scalef: { 12464 // Translate from the intrinsics's struct return to the builtin's out 12465 // argument. 12466 12467 Address FlagOutPtr = EmitPointerWithAlignment(E->getArg(3)); 12468 12469 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 12470 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 12471 llvm::Value *Z = EmitScalarExpr(E->getArg(2)); 12472 12473 llvm::Function *Callee = CGM.getIntrinsic(Intrinsic::amdgcn_div_scale, 12474 X->getType()); 12475 12476 llvm::Value *Tmp = Builder.CreateCall(Callee, {X, Y, Z}); 12477 12478 llvm::Value *Result = Builder.CreateExtractValue(Tmp, 0); 12479 llvm::Value *Flag = Builder.CreateExtractValue(Tmp, 1); 12480 12481 llvm::Type *RealFlagType 12482 = FlagOutPtr.getPointer()->getType()->getPointerElementType(); 12483 12484 llvm::Value *FlagExt = Builder.CreateZExt(Flag, RealFlagType); 12485 Builder.CreateStore(FlagExt, FlagOutPtr); 12486 return Result; 12487 } 12488 case AMDGPU::BI__builtin_amdgcn_div_fmas: 12489 case AMDGPU::BI__builtin_amdgcn_div_fmasf: { 12490 llvm::Value *Src0 = EmitScalarExpr(E->getArg(0)); 12491 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); 12492 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); 12493 llvm::Value *Src3 = EmitScalarExpr(E->getArg(3)); 12494 12495 llvm::Function *F = CGM.getIntrinsic(Intrinsic::amdgcn_div_fmas, 12496 Src0->getType()); 12497 llvm::Value *Src3ToBool = Builder.CreateIsNotNull(Src3); 12498 return Builder.CreateCall(F, {Src0, Src1, Src2, Src3ToBool}); 12499 } 12500 12501 case AMDGPU::BI__builtin_amdgcn_ds_swizzle: 12502 return emitBinaryBuiltin(*this, E, Intrinsic::amdgcn_ds_swizzle); 12503 case AMDGPU::BI__builtin_amdgcn_mov_dpp: 12504 case AMDGPU::BI__builtin_amdgcn_update_dpp: { 12505 llvm::SmallVector<llvm::Value *, 6> Args; 12506 for (unsigned I = 0; I != E->getNumArgs(); ++I) 12507 Args.push_back(EmitScalarExpr(E->getArg(I))); 12508 assert(Args.size() == 5 || Args.size() == 6); 12509 if (Args.size() == 5) 12510 Args.insert(Args.begin(), llvm::UndefValue::get(Args[0]->getType())); 12511 Function *F = 12512 CGM.getIntrinsic(Intrinsic::amdgcn_update_dpp, Args[0]->getType()); 12513 return Builder.CreateCall(F, Args); 12514 } 12515 case AMDGPU::BI__builtin_amdgcn_div_fixup: 12516 case AMDGPU::BI__builtin_amdgcn_div_fixupf: 12517 case AMDGPU::BI__builtin_amdgcn_div_fixuph: 12518 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_div_fixup); 12519 case AMDGPU::BI__builtin_amdgcn_trig_preop: 12520 case AMDGPU::BI__builtin_amdgcn_trig_preopf: 12521 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_trig_preop); 12522 case AMDGPU::BI__builtin_amdgcn_rcp: 12523 case AMDGPU::BI__builtin_amdgcn_rcpf: 12524 case AMDGPU::BI__builtin_amdgcn_rcph: 12525 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rcp); 12526 case AMDGPU::BI__builtin_amdgcn_rsq: 12527 case AMDGPU::BI__builtin_amdgcn_rsqf: 12528 case AMDGPU::BI__builtin_amdgcn_rsqh: 12529 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq); 12530 case AMDGPU::BI__builtin_amdgcn_rsq_clamp: 12531 case AMDGPU::BI__builtin_amdgcn_rsq_clampf: 12532 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq_clamp); 12533 case AMDGPU::BI__builtin_amdgcn_sinf: 12534 case AMDGPU::BI__builtin_amdgcn_sinh: 12535 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_sin); 12536 case AMDGPU::BI__builtin_amdgcn_cosf: 12537 case AMDGPU::BI__builtin_amdgcn_cosh: 12538 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_cos); 12539 case AMDGPU::BI__builtin_amdgcn_log_clampf: 12540 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_log_clamp); 12541 case AMDGPU::BI__builtin_amdgcn_ldexp: 12542 case AMDGPU::BI__builtin_amdgcn_ldexpf: 12543 case AMDGPU::BI__builtin_amdgcn_ldexph: 12544 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_ldexp); 12545 case AMDGPU::BI__builtin_amdgcn_frexp_mant: 12546 case AMDGPU::BI__builtin_amdgcn_frexp_mantf: 12547 case AMDGPU::BI__builtin_amdgcn_frexp_manth: 12548 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_frexp_mant); 12549 case AMDGPU::BI__builtin_amdgcn_frexp_exp: 12550 case AMDGPU::BI__builtin_amdgcn_frexp_expf: { 12551 Value *Src0 = EmitScalarExpr(E->getArg(0)); 12552 Function *F = CGM.getIntrinsic(Intrinsic::amdgcn_frexp_exp, 12553 { Builder.getInt32Ty(), Src0->getType() }); 12554 return Builder.CreateCall(F, Src0); 12555 } 12556 case AMDGPU::BI__builtin_amdgcn_frexp_exph: { 12557 Value *Src0 = EmitScalarExpr(E->getArg(0)); 12558 Function *F = CGM.getIntrinsic(Intrinsic::amdgcn_frexp_exp, 12559 { Builder.getInt16Ty(), Src0->getType() }); 12560 return Builder.CreateCall(F, Src0); 12561 } 12562 case AMDGPU::BI__builtin_amdgcn_fract: 12563 case AMDGPU::BI__builtin_amdgcn_fractf: 12564 case AMDGPU::BI__builtin_amdgcn_fracth: 12565 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_fract); 12566 case AMDGPU::BI__builtin_amdgcn_lerp: 12567 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_lerp); 12568 case AMDGPU::BI__builtin_amdgcn_uicmp: 12569 case AMDGPU::BI__builtin_amdgcn_uicmpl: 12570 case AMDGPU::BI__builtin_amdgcn_sicmp: 12571 case AMDGPU::BI__builtin_amdgcn_sicmpl: 12572 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_icmp); 12573 case AMDGPU::BI__builtin_amdgcn_fcmp: 12574 case AMDGPU::BI__builtin_amdgcn_fcmpf: 12575 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_fcmp); 12576 case AMDGPU::BI__builtin_amdgcn_class: 12577 case AMDGPU::BI__builtin_amdgcn_classf: 12578 case AMDGPU::BI__builtin_amdgcn_classh: 12579 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_class); 12580 case AMDGPU::BI__builtin_amdgcn_fmed3f: 12581 case AMDGPU::BI__builtin_amdgcn_fmed3h: 12582 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_fmed3); 12583 case AMDGPU::BI__builtin_amdgcn_ds_append: 12584 case AMDGPU::BI__builtin_amdgcn_ds_consume: { 12585 Intrinsic::ID Intrin = BuiltinID == AMDGPU::BI__builtin_amdgcn_ds_append ? 12586 Intrinsic::amdgcn_ds_append : Intrinsic::amdgcn_ds_consume; 12587 Value *Src0 = EmitScalarExpr(E->getArg(0)); 12588 Function *F = CGM.getIntrinsic(Intrin, { Src0->getType() }); 12589 return Builder.CreateCall(F, { Src0, Builder.getFalse() }); 12590 } 12591 case AMDGPU::BI__builtin_amdgcn_read_exec: { 12592 CallInst *CI = cast<CallInst>( 12593 EmitSpecialRegisterBuiltin(*this, E, Int64Ty, Int64Ty, true, "exec")); 12594 CI->setConvergent(); 12595 return CI; 12596 } 12597 case AMDGPU::BI__builtin_amdgcn_read_exec_lo: 12598 case AMDGPU::BI__builtin_amdgcn_read_exec_hi: { 12599 StringRef RegName = BuiltinID == AMDGPU::BI__builtin_amdgcn_read_exec_lo ? 12600 "exec_lo" : "exec_hi"; 12601 CallInst *CI = cast<CallInst>( 12602 EmitSpecialRegisterBuiltin(*this, E, Int32Ty, Int32Ty, true, RegName)); 12603 CI->setConvergent(); 12604 return CI; 12605 } 12606 // amdgcn workitem 12607 case AMDGPU::BI__builtin_amdgcn_workitem_id_x: 12608 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_x, 0, 1024); 12609 case AMDGPU::BI__builtin_amdgcn_workitem_id_y: 12610 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_y, 0, 1024); 12611 case AMDGPU::BI__builtin_amdgcn_workitem_id_z: 12612 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_z, 0, 1024); 12613 12614 // r600 intrinsics 12615 case AMDGPU::BI__builtin_r600_recipsqrt_ieee: 12616 case AMDGPU::BI__builtin_r600_recipsqrt_ieeef: 12617 return emitUnaryBuiltin(*this, E, Intrinsic::r600_recipsqrt_ieee); 12618 case AMDGPU::BI__builtin_r600_read_tidig_x: 12619 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_x, 0, 1024); 12620 case AMDGPU::BI__builtin_r600_read_tidig_y: 12621 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_y, 0, 1024); 12622 case AMDGPU::BI__builtin_r600_read_tidig_z: 12623 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_z, 0, 1024); 12624 default: 12625 return nullptr; 12626 } 12627 } 12628 12629 /// Handle a SystemZ function in which the final argument is a pointer 12630 /// to an int that receives the post-instruction CC value. At the LLVM level 12631 /// this is represented as a function that returns a {result, cc} pair. 12632 static Value *EmitSystemZIntrinsicWithCC(CodeGenFunction &CGF, 12633 unsigned IntrinsicID, 12634 const CallExpr *E) { 12635 unsigned NumArgs = E->getNumArgs() - 1; 12636 SmallVector<Value *, 8> Args(NumArgs); 12637 for (unsigned I = 0; I < NumArgs; ++I) 12638 Args[I] = CGF.EmitScalarExpr(E->getArg(I)); 12639 Address CCPtr = CGF.EmitPointerWithAlignment(E->getArg(NumArgs)); 12640 Function *F = CGF.CGM.getIntrinsic(IntrinsicID); 12641 Value *Call = CGF.Builder.CreateCall(F, Args); 12642 Value *CC = CGF.Builder.CreateExtractValue(Call, 1); 12643 CGF.Builder.CreateStore(CC, CCPtr); 12644 return CGF.Builder.CreateExtractValue(Call, 0); 12645 } 12646 12647 Value *CodeGenFunction::EmitSystemZBuiltinExpr(unsigned BuiltinID, 12648 const CallExpr *E) { 12649 switch (BuiltinID) { 12650 case SystemZ::BI__builtin_tbegin: { 12651 Value *TDB = EmitScalarExpr(E->getArg(0)); 12652 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 12653 Function *F = CGM.getIntrinsic(Intrinsic::s390_tbegin); 12654 return Builder.CreateCall(F, {TDB, Control}); 12655 } 12656 case SystemZ::BI__builtin_tbegin_nofloat: { 12657 Value *TDB = EmitScalarExpr(E->getArg(0)); 12658 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 12659 Function *F = CGM.getIntrinsic(Intrinsic::s390_tbegin_nofloat); 12660 return Builder.CreateCall(F, {TDB, Control}); 12661 } 12662 case SystemZ::BI__builtin_tbeginc: { 12663 Value *TDB = llvm::ConstantPointerNull::get(Int8PtrTy); 12664 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff08); 12665 Function *F = CGM.getIntrinsic(Intrinsic::s390_tbeginc); 12666 return Builder.CreateCall(F, {TDB, Control}); 12667 } 12668 case SystemZ::BI__builtin_tabort: { 12669 Value *Data = EmitScalarExpr(E->getArg(0)); 12670 Function *F = CGM.getIntrinsic(Intrinsic::s390_tabort); 12671 return Builder.CreateCall(F, Builder.CreateSExt(Data, Int64Ty, "tabort")); 12672 } 12673 case SystemZ::BI__builtin_non_tx_store: { 12674 Value *Address = EmitScalarExpr(E->getArg(0)); 12675 Value *Data = EmitScalarExpr(E->getArg(1)); 12676 Function *F = CGM.getIntrinsic(Intrinsic::s390_ntstg); 12677 return Builder.CreateCall(F, {Data, Address}); 12678 } 12679 12680 // Vector builtins. Note that most vector builtins are mapped automatically 12681 // to target-specific LLVM intrinsics. The ones handled specially here can 12682 // be represented via standard LLVM IR, which is preferable to enable common 12683 // LLVM optimizations. 12684 12685 case SystemZ::BI__builtin_s390_vpopctb: 12686 case SystemZ::BI__builtin_s390_vpopcth: 12687 case SystemZ::BI__builtin_s390_vpopctf: 12688 case SystemZ::BI__builtin_s390_vpopctg: { 12689 llvm::Type *ResultType = ConvertType(E->getType()); 12690 Value *X = EmitScalarExpr(E->getArg(0)); 12691 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 12692 return Builder.CreateCall(F, X); 12693 } 12694 12695 case SystemZ::BI__builtin_s390_vclzb: 12696 case SystemZ::BI__builtin_s390_vclzh: 12697 case SystemZ::BI__builtin_s390_vclzf: 12698 case SystemZ::BI__builtin_s390_vclzg: { 12699 llvm::Type *ResultType = ConvertType(E->getType()); 12700 Value *X = EmitScalarExpr(E->getArg(0)); 12701 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 12702 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 12703 return Builder.CreateCall(F, {X, Undef}); 12704 } 12705 12706 case SystemZ::BI__builtin_s390_vctzb: 12707 case SystemZ::BI__builtin_s390_vctzh: 12708 case SystemZ::BI__builtin_s390_vctzf: 12709 case SystemZ::BI__builtin_s390_vctzg: { 12710 llvm::Type *ResultType = ConvertType(E->getType()); 12711 Value *X = EmitScalarExpr(E->getArg(0)); 12712 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 12713 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 12714 return Builder.CreateCall(F, {X, Undef}); 12715 } 12716 12717 case SystemZ::BI__builtin_s390_vfsqsb: 12718 case SystemZ::BI__builtin_s390_vfsqdb: { 12719 llvm::Type *ResultType = ConvertType(E->getType()); 12720 Value *X = EmitScalarExpr(E->getArg(0)); 12721 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, ResultType); 12722 return Builder.CreateCall(F, X); 12723 } 12724 case SystemZ::BI__builtin_s390_vfmasb: 12725 case SystemZ::BI__builtin_s390_vfmadb: { 12726 llvm::Type *ResultType = ConvertType(E->getType()); 12727 Value *X = EmitScalarExpr(E->getArg(0)); 12728 Value *Y = EmitScalarExpr(E->getArg(1)); 12729 Value *Z = EmitScalarExpr(E->getArg(2)); 12730 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 12731 return Builder.CreateCall(F, {X, Y, Z}); 12732 } 12733 case SystemZ::BI__builtin_s390_vfmssb: 12734 case SystemZ::BI__builtin_s390_vfmsdb: { 12735 llvm::Type *ResultType = ConvertType(E->getType()); 12736 Value *X = EmitScalarExpr(E->getArg(0)); 12737 Value *Y = EmitScalarExpr(E->getArg(1)); 12738 Value *Z = EmitScalarExpr(E->getArg(2)); 12739 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 12740 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 12741 return Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 12742 } 12743 case SystemZ::BI__builtin_s390_vfnmasb: 12744 case SystemZ::BI__builtin_s390_vfnmadb: { 12745 llvm::Type *ResultType = ConvertType(E->getType()); 12746 Value *X = EmitScalarExpr(E->getArg(0)); 12747 Value *Y = EmitScalarExpr(E->getArg(1)); 12748 Value *Z = EmitScalarExpr(E->getArg(2)); 12749 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 12750 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 12751 return Builder.CreateFSub(Zero, Builder.CreateCall(F, {X, Y, Z}), "sub"); 12752 } 12753 case SystemZ::BI__builtin_s390_vfnmssb: 12754 case SystemZ::BI__builtin_s390_vfnmsdb: { 12755 llvm::Type *ResultType = ConvertType(E->getType()); 12756 Value *X = EmitScalarExpr(E->getArg(0)); 12757 Value *Y = EmitScalarExpr(E->getArg(1)); 12758 Value *Z = EmitScalarExpr(E->getArg(2)); 12759 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 12760 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 12761 Value *NegZ = Builder.CreateFSub(Zero, Z, "sub"); 12762 return Builder.CreateFSub(Zero, Builder.CreateCall(F, {X, Y, NegZ})); 12763 } 12764 case SystemZ::BI__builtin_s390_vflpsb: 12765 case SystemZ::BI__builtin_s390_vflpdb: { 12766 llvm::Type *ResultType = ConvertType(E->getType()); 12767 Value *X = EmitScalarExpr(E->getArg(0)); 12768 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 12769 return Builder.CreateCall(F, X); 12770 } 12771 case SystemZ::BI__builtin_s390_vflnsb: 12772 case SystemZ::BI__builtin_s390_vflndb: { 12773 llvm::Type *ResultType = ConvertType(E->getType()); 12774 Value *X = EmitScalarExpr(E->getArg(0)); 12775 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 12776 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 12777 return Builder.CreateFSub(Zero, Builder.CreateCall(F, X), "sub"); 12778 } 12779 case SystemZ::BI__builtin_s390_vfisb: 12780 case SystemZ::BI__builtin_s390_vfidb: { 12781 llvm::Type *ResultType = ConvertType(E->getType()); 12782 Value *X = EmitScalarExpr(E->getArg(0)); 12783 // Constant-fold the M4 and M5 mask arguments. 12784 llvm::APSInt M4, M5; 12785 bool IsConstM4 = E->getArg(1)->isIntegerConstantExpr(M4, getContext()); 12786 bool IsConstM5 = E->getArg(2)->isIntegerConstantExpr(M5, getContext()); 12787 assert(IsConstM4 && IsConstM5 && "Constant arg isn't actually constant?"); 12788 (void)IsConstM4; (void)IsConstM5; 12789 // Check whether this instance can be represented via a LLVM standard 12790 // intrinsic. We only support some combinations of M4 and M5. 12791 Intrinsic::ID ID = Intrinsic::not_intrinsic; 12792 switch (M4.getZExtValue()) { 12793 default: break; 12794 case 0: // IEEE-inexact exception allowed 12795 switch (M5.getZExtValue()) { 12796 default: break; 12797 case 0: ID = Intrinsic::rint; break; 12798 } 12799 break; 12800 case 4: // IEEE-inexact exception suppressed 12801 switch (M5.getZExtValue()) { 12802 default: break; 12803 case 0: ID = Intrinsic::nearbyint; break; 12804 case 1: ID = Intrinsic::round; break; 12805 case 5: ID = Intrinsic::trunc; break; 12806 case 6: ID = Intrinsic::ceil; break; 12807 case 7: ID = Intrinsic::floor; break; 12808 } 12809 break; 12810 } 12811 if (ID != Intrinsic::not_intrinsic) { 12812 Function *F = CGM.getIntrinsic(ID, ResultType); 12813 return Builder.CreateCall(F, X); 12814 } 12815 switch (BuiltinID) { 12816 case SystemZ::BI__builtin_s390_vfisb: ID = Intrinsic::s390_vfisb; break; 12817 case SystemZ::BI__builtin_s390_vfidb: ID = Intrinsic::s390_vfidb; break; 12818 default: llvm_unreachable("Unknown BuiltinID"); 12819 } 12820 Function *F = CGM.getIntrinsic(ID); 12821 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 12822 Value *M5Value = llvm::ConstantInt::get(getLLVMContext(), M5); 12823 return Builder.CreateCall(F, {X, M4Value, M5Value}); 12824 } 12825 case SystemZ::BI__builtin_s390_vfmaxsb: 12826 case SystemZ::BI__builtin_s390_vfmaxdb: { 12827 llvm::Type *ResultType = ConvertType(E->getType()); 12828 Value *X = EmitScalarExpr(E->getArg(0)); 12829 Value *Y = EmitScalarExpr(E->getArg(1)); 12830 // Constant-fold the M4 mask argument. 12831 llvm::APSInt M4; 12832 bool IsConstM4 = E->getArg(2)->isIntegerConstantExpr(M4, getContext()); 12833 assert(IsConstM4 && "Constant arg isn't actually constant?"); 12834 (void)IsConstM4; 12835 // Check whether this instance can be represented via a LLVM standard 12836 // intrinsic. We only support some values of M4. 12837 Intrinsic::ID ID = Intrinsic::not_intrinsic; 12838 switch (M4.getZExtValue()) { 12839 default: break; 12840 case 4: ID = Intrinsic::maxnum; break; 12841 } 12842 if (ID != Intrinsic::not_intrinsic) { 12843 Function *F = CGM.getIntrinsic(ID, ResultType); 12844 return Builder.CreateCall(F, {X, Y}); 12845 } 12846 switch (BuiltinID) { 12847 case SystemZ::BI__builtin_s390_vfmaxsb: ID = Intrinsic::s390_vfmaxsb; break; 12848 case SystemZ::BI__builtin_s390_vfmaxdb: ID = Intrinsic::s390_vfmaxdb; break; 12849 default: llvm_unreachable("Unknown BuiltinID"); 12850 } 12851 Function *F = CGM.getIntrinsic(ID); 12852 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 12853 return Builder.CreateCall(F, {X, Y, M4Value}); 12854 } 12855 case SystemZ::BI__builtin_s390_vfminsb: 12856 case SystemZ::BI__builtin_s390_vfmindb: { 12857 llvm::Type *ResultType = ConvertType(E->getType()); 12858 Value *X = EmitScalarExpr(E->getArg(0)); 12859 Value *Y = EmitScalarExpr(E->getArg(1)); 12860 // Constant-fold the M4 mask argument. 12861 llvm::APSInt M4; 12862 bool IsConstM4 = E->getArg(2)->isIntegerConstantExpr(M4, getContext()); 12863 assert(IsConstM4 && "Constant arg isn't actually constant?"); 12864 (void)IsConstM4; 12865 // Check whether this instance can be represented via a LLVM standard 12866 // intrinsic. We only support some values of M4. 12867 Intrinsic::ID ID = Intrinsic::not_intrinsic; 12868 switch (M4.getZExtValue()) { 12869 default: break; 12870 case 4: ID = Intrinsic::minnum; break; 12871 } 12872 if (ID != Intrinsic::not_intrinsic) { 12873 Function *F = CGM.getIntrinsic(ID, ResultType); 12874 return Builder.CreateCall(F, {X, Y}); 12875 } 12876 switch (BuiltinID) { 12877 case SystemZ::BI__builtin_s390_vfminsb: ID = Intrinsic::s390_vfminsb; break; 12878 case SystemZ::BI__builtin_s390_vfmindb: ID = Intrinsic::s390_vfmindb; break; 12879 default: llvm_unreachable("Unknown BuiltinID"); 12880 } 12881 Function *F = CGM.getIntrinsic(ID); 12882 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 12883 return Builder.CreateCall(F, {X, Y, M4Value}); 12884 } 12885 12886 // Vector intrinsics that output the post-instruction CC value. 12887 12888 #define INTRINSIC_WITH_CC(NAME) \ 12889 case SystemZ::BI__builtin_##NAME: \ 12890 return EmitSystemZIntrinsicWithCC(*this, Intrinsic::NAME, E) 12891 12892 INTRINSIC_WITH_CC(s390_vpkshs); 12893 INTRINSIC_WITH_CC(s390_vpksfs); 12894 INTRINSIC_WITH_CC(s390_vpksgs); 12895 12896 INTRINSIC_WITH_CC(s390_vpklshs); 12897 INTRINSIC_WITH_CC(s390_vpklsfs); 12898 INTRINSIC_WITH_CC(s390_vpklsgs); 12899 12900 INTRINSIC_WITH_CC(s390_vceqbs); 12901 INTRINSIC_WITH_CC(s390_vceqhs); 12902 INTRINSIC_WITH_CC(s390_vceqfs); 12903 INTRINSIC_WITH_CC(s390_vceqgs); 12904 12905 INTRINSIC_WITH_CC(s390_vchbs); 12906 INTRINSIC_WITH_CC(s390_vchhs); 12907 INTRINSIC_WITH_CC(s390_vchfs); 12908 INTRINSIC_WITH_CC(s390_vchgs); 12909 12910 INTRINSIC_WITH_CC(s390_vchlbs); 12911 INTRINSIC_WITH_CC(s390_vchlhs); 12912 INTRINSIC_WITH_CC(s390_vchlfs); 12913 INTRINSIC_WITH_CC(s390_vchlgs); 12914 12915 INTRINSIC_WITH_CC(s390_vfaebs); 12916 INTRINSIC_WITH_CC(s390_vfaehs); 12917 INTRINSIC_WITH_CC(s390_vfaefs); 12918 12919 INTRINSIC_WITH_CC(s390_vfaezbs); 12920 INTRINSIC_WITH_CC(s390_vfaezhs); 12921 INTRINSIC_WITH_CC(s390_vfaezfs); 12922 12923 INTRINSIC_WITH_CC(s390_vfeebs); 12924 INTRINSIC_WITH_CC(s390_vfeehs); 12925 INTRINSIC_WITH_CC(s390_vfeefs); 12926 12927 INTRINSIC_WITH_CC(s390_vfeezbs); 12928 INTRINSIC_WITH_CC(s390_vfeezhs); 12929 INTRINSIC_WITH_CC(s390_vfeezfs); 12930 12931 INTRINSIC_WITH_CC(s390_vfenebs); 12932 INTRINSIC_WITH_CC(s390_vfenehs); 12933 INTRINSIC_WITH_CC(s390_vfenefs); 12934 12935 INTRINSIC_WITH_CC(s390_vfenezbs); 12936 INTRINSIC_WITH_CC(s390_vfenezhs); 12937 INTRINSIC_WITH_CC(s390_vfenezfs); 12938 12939 INTRINSIC_WITH_CC(s390_vistrbs); 12940 INTRINSIC_WITH_CC(s390_vistrhs); 12941 INTRINSIC_WITH_CC(s390_vistrfs); 12942 12943 INTRINSIC_WITH_CC(s390_vstrcbs); 12944 INTRINSIC_WITH_CC(s390_vstrchs); 12945 INTRINSIC_WITH_CC(s390_vstrcfs); 12946 12947 INTRINSIC_WITH_CC(s390_vstrczbs); 12948 INTRINSIC_WITH_CC(s390_vstrczhs); 12949 INTRINSIC_WITH_CC(s390_vstrczfs); 12950 12951 INTRINSIC_WITH_CC(s390_vfcesbs); 12952 INTRINSIC_WITH_CC(s390_vfcedbs); 12953 INTRINSIC_WITH_CC(s390_vfchsbs); 12954 INTRINSIC_WITH_CC(s390_vfchdbs); 12955 INTRINSIC_WITH_CC(s390_vfchesbs); 12956 INTRINSIC_WITH_CC(s390_vfchedbs); 12957 12958 INTRINSIC_WITH_CC(s390_vftcisb); 12959 INTRINSIC_WITH_CC(s390_vftcidb); 12960 12961 #undef INTRINSIC_WITH_CC 12962 12963 default: 12964 return nullptr; 12965 } 12966 } 12967 12968 Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, 12969 const CallExpr *E) { 12970 auto MakeLdg = [&](unsigned IntrinsicID) { 12971 Value *Ptr = EmitScalarExpr(E->getArg(0)); 12972 clang::CharUnits Align = 12973 getNaturalPointeeTypeAlignment(E->getArg(0)->getType()); 12974 return Builder.CreateCall( 12975 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 12976 Ptr->getType()}), 12977 {Ptr, ConstantInt::get(Builder.getInt32Ty(), Align.getQuantity())}); 12978 }; 12979 auto MakeScopedAtomic = [&](unsigned IntrinsicID) { 12980 Value *Ptr = EmitScalarExpr(E->getArg(0)); 12981 return Builder.CreateCall( 12982 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 12983 Ptr->getType()}), 12984 {Ptr, EmitScalarExpr(E->getArg(1))}); 12985 }; 12986 switch (BuiltinID) { 12987 case NVPTX::BI__nvvm_atom_add_gen_i: 12988 case NVPTX::BI__nvvm_atom_add_gen_l: 12989 case NVPTX::BI__nvvm_atom_add_gen_ll: 12990 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Add, E); 12991 12992 case NVPTX::BI__nvvm_atom_sub_gen_i: 12993 case NVPTX::BI__nvvm_atom_sub_gen_l: 12994 case NVPTX::BI__nvvm_atom_sub_gen_ll: 12995 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Sub, E); 12996 12997 case NVPTX::BI__nvvm_atom_and_gen_i: 12998 case NVPTX::BI__nvvm_atom_and_gen_l: 12999 case NVPTX::BI__nvvm_atom_and_gen_ll: 13000 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::And, E); 13001 13002 case NVPTX::BI__nvvm_atom_or_gen_i: 13003 case NVPTX::BI__nvvm_atom_or_gen_l: 13004 case NVPTX::BI__nvvm_atom_or_gen_ll: 13005 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Or, E); 13006 13007 case NVPTX::BI__nvvm_atom_xor_gen_i: 13008 case NVPTX::BI__nvvm_atom_xor_gen_l: 13009 case NVPTX::BI__nvvm_atom_xor_gen_ll: 13010 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xor, E); 13011 13012 case NVPTX::BI__nvvm_atom_xchg_gen_i: 13013 case NVPTX::BI__nvvm_atom_xchg_gen_l: 13014 case NVPTX::BI__nvvm_atom_xchg_gen_ll: 13015 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xchg, E); 13016 13017 case NVPTX::BI__nvvm_atom_max_gen_i: 13018 case NVPTX::BI__nvvm_atom_max_gen_l: 13019 case NVPTX::BI__nvvm_atom_max_gen_ll: 13020 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Max, E); 13021 13022 case NVPTX::BI__nvvm_atom_max_gen_ui: 13023 case NVPTX::BI__nvvm_atom_max_gen_ul: 13024 case NVPTX::BI__nvvm_atom_max_gen_ull: 13025 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMax, E); 13026 13027 case NVPTX::BI__nvvm_atom_min_gen_i: 13028 case NVPTX::BI__nvvm_atom_min_gen_l: 13029 case NVPTX::BI__nvvm_atom_min_gen_ll: 13030 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Min, E); 13031 13032 case NVPTX::BI__nvvm_atom_min_gen_ui: 13033 case NVPTX::BI__nvvm_atom_min_gen_ul: 13034 case NVPTX::BI__nvvm_atom_min_gen_ull: 13035 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMin, E); 13036 13037 case NVPTX::BI__nvvm_atom_cas_gen_i: 13038 case NVPTX::BI__nvvm_atom_cas_gen_l: 13039 case NVPTX::BI__nvvm_atom_cas_gen_ll: 13040 // __nvvm_atom_cas_gen_* should return the old value rather than the 13041 // success flag. 13042 return MakeAtomicCmpXchgValue(*this, E, /*ReturnBool=*/false); 13043 13044 case NVPTX::BI__nvvm_atom_add_gen_f: { 13045 Value *Ptr = EmitScalarExpr(E->getArg(0)); 13046 Value *Val = EmitScalarExpr(E->getArg(1)); 13047 // atomicrmw only deals with integer arguments so we need to use 13048 // LLVM's nvvm_atomic_load_add_f32 intrinsic for that. 13049 Function *FnALAF32 = 13050 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f32, Ptr->getType()); 13051 return Builder.CreateCall(FnALAF32, {Ptr, Val}); 13052 } 13053 13054 case NVPTX::BI__nvvm_atom_add_gen_d: { 13055 Value *Ptr = EmitScalarExpr(E->getArg(0)); 13056 Value *Val = EmitScalarExpr(E->getArg(1)); 13057 // atomicrmw only deals with integer arguments, so we need to use 13058 // LLVM's nvvm_atomic_load_add_f64 intrinsic. 13059 Function *FnALAF64 = 13060 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f64, Ptr->getType()); 13061 return Builder.CreateCall(FnALAF64, {Ptr, Val}); 13062 } 13063 13064 case NVPTX::BI__nvvm_atom_inc_gen_ui: { 13065 Value *Ptr = EmitScalarExpr(E->getArg(0)); 13066 Value *Val = EmitScalarExpr(E->getArg(1)); 13067 Function *FnALI32 = 13068 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_inc_32, Ptr->getType()); 13069 return Builder.CreateCall(FnALI32, {Ptr, Val}); 13070 } 13071 13072 case NVPTX::BI__nvvm_atom_dec_gen_ui: { 13073 Value *Ptr = EmitScalarExpr(E->getArg(0)); 13074 Value *Val = EmitScalarExpr(E->getArg(1)); 13075 Function *FnALD32 = 13076 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_dec_32, Ptr->getType()); 13077 return Builder.CreateCall(FnALD32, {Ptr, Val}); 13078 } 13079 13080 case NVPTX::BI__nvvm_ldg_c: 13081 case NVPTX::BI__nvvm_ldg_c2: 13082 case NVPTX::BI__nvvm_ldg_c4: 13083 case NVPTX::BI__nvvm_ldg_s: 13084 case NVPTX::BI__nvvm_ldg_s2: 13085 case NVPTX::BI__nvvm_ldg_s4: 13086 case NVPTX::BI__nvvm_ldg_i: 13087 case NVPTX::BI__nvvm_ldg_i2: 13088 case NVPTX::BI__nvvm_ldg_i4: 13089 case NVPTX::BI__nvvm_ldg_l: 13090 case NVPTX::BI__nvvm_ldg_ll: 13091 case NVPTX::BI__nvvm_ldg_ll2: 13092 case NVPTX::BI__nvvm_ldg_uc: 13093 case NVPTX::BI__nvvm_ldg_uc2: 13094 case NVPTX::BI__nvvm_ldg_uc4: 13095 case NVPTX::BI__nvvm_ldg_us: 13096 case NVPTX::BI__nvvm_ldg_us2: 13097 case NVPTX::BI__nvvm_ldg_us4: 13098 case NVPTX::BI__nvvm_ldg_ui: 13099 case NVPTX::BI__nvvm_ldg_ui2: 13100 case NVPTX::BI__nvvm_ldg_ui4: 13101 case NVPTX::BI__nvvm_ldg_ul: 13102 case NVPTX::BI__nvvm_ldg_ull: 13103 case NVPTX::BI__nvvm_ldg_ull2: 13104 // PTX Interoperability section 2.2: "For a vector with an even number of 13105 // elements, its alignment is set to number of elements times the alignment 13106 // of its member: n*alignof(t)." 13107 return MakeLdg(Intrinsic::nvvm_ldg_global_i); 13108 case NVPTX::BI__nvvm_ldg_f: 13109 case NVPTX::BI__nvvm_ldg_f2: 13110 case NVPTX::BI__nvvm_ldg_f4: 13111 case NVPTX::BI__nvvm_ldg_d: 13112 case NVPTX::BI__nvvm_ldg_d2: 13113 return MakeLdg(Intrinsic::nvvm_ldg_global_f); 13114 13115 case NVPTX::BI__nvvm_atom_cta_add_gen_i: 13116 case NVPTX::BI__nvvm_atom_cta_add_gen_l: 13117 case NVPTX::BI__nvvm_atom_cta_add_gen_ll: 13118 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_cta); 13119 case NVPTX::BI__nvvm_atom_sys_add_gen_i: 13120 case NVPTX::BI__nvvm_atom_sys_add_gen_l: 13121 case NVPTX::BI__nvvm_atom_sys_add_gen_ll: 13122 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_sys); 13123 case NVPTX::BI__nvvm_atom_cta_add_gen_f: 13124 case NVPTX::BI__nvvm_atom_cta_add_gen_d: 13125 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_cta); 13126 case NVPTX::BI__nvvm_atom_sys_add_gen_f: 13127 case NVPTX::BI__nvvm_atom_sys_add_gen_d: 13128 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_sys); 13129 case NVPTX::BI__nvvm_atom_cta_xchg_gen_i: 13130 case NVPTX::BI__nvvm_atom_cta_xchg_gen_l: 13131 case NVPTX::BI__nvvm_atom_cta_xchg_gen_ll: 13132 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_cta); 13133 case NVPTX::BI__nvvm_atom_sys_xchg_gen_i: 13134 case NVPTX::BI__nvvm_atom_sys_xchg_gen_l: 13135 case NVPTX::BI__nvvm_atom_sys_xchg_gen_ll: 13136 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_sys); 13137 case NVPTX::BI__nvvm_atom_cta_max_gen_i: 13138 case NVPTX::BI__nvvm_atom_cta_max_gen_ui: 13139 case NVPTX::BI__nvvm_atom_cta_max_gen_l: 13140 case NVPTX::BI__nvvm_atom_cta_max_gen_ul: 13141 case NVPTX::BI__nvvm_atom_cta_max_gen_ll: 13142 case NVPTX::BI__nvvm_atom_cta_max_gen_ull: 13143 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_cta); 13144 case NVPTX::BI__nvvm_atom_sys_max_gen_i: 13145 case NVPTX::BI__nvvm_atom_sys_max_gen_ui: 13146 case NVPTX::BI__nvvm_atom_sys_max_gen_l: 13147 case NVPTX::BI__nvvm_atom_sys_max_gen_ul: 13148 case NVPTX::BI__nvvm_atom_sys_max_gen_ll: 13149 case NVPTX::BI__nvvm_atom_sys_max_gen_ull: 13150 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_sys); 13151 case NVPTX::BI__nvvm_atom_cta_min_gen_i: 13152 case NVPTX::BI__nvvm_atom_cta_min_gen_ui: 13153 case NVPTX::BI__nvvm_atom_cta_min_gen_l: 13154 case NVPTX::BI__nvvm_atom_cta_min_gen_ul: 13155 case NVPTX::BI__nvvm_atom_cta_min_gen_ll: 13156 case NVPTX::BI__nvvm_atom_cta_min_gen_ull: 13157 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_cta); 13158 case NVPTX::BI__nvvm_atom_sys_min_gen_i: 13159 case NVPTX::BI__nvvm_atom_sys_min_gen_ui: 13160 case NVPTX::BI__nvvm_atom_sys_min_gen_l: 13161 case NVPTX::BI__nvvm_atom_sys_min_gen_ul: 13162 case NVPTX::BI__nvvm_atom_sys_min_gen_ll: 13163 case NVPTX::BI__nvvm_atom_sys_min_gen_ull: 13164 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_sys); 13165 case NVPTX::BI__nvvm_atom_cta_inc_gen_ui: 13166 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_cta); 13167 case NVPTX::BI__nvvm_atom_cta_dec_gen_ui: 13168 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_cta); 13169 case NVPTX::BI__nvvm_atom_sys_inc_gen_ui: 13170 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_sys); 13171 case NVPTX::BI__nvvm_atom_sys_dec_gen_ui: 13172 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_sys); 13173 case NVPTX::BI__nvvm_atom_cta_and_gen_i: 13174 case NVPTX::BI__nvvm_atom_cta_and_gen_l: 13175 case NVPTX::BI__nvvm_atom_cta_and_gen_ll: 13176 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_cta); 13177 case NVPTX::BI__nvvm_atom_sys_and_gen_i: 13178 case NVPTX::BI__nvvm_atom_sys_and_gen_l: 13179 case NVPTX::BI__nvvm_atom_sys_and_gen_ll: 13180 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_sys); 13181 case NVPTX::BI__nvvm_atom_cta_or_gen_i: 13182 case NVPTX::BI__nvvm_atom_cta_or_gen_l: 13183 case NVPTX::BI__nvvm_atom_cta_or_gen_ll: 13184 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_cta); 13185 case NVPTX::BI__nvvm_atom_sys_or_gen_i: 13186 case NVPTX::BI__nvvm_atom_sys_or_gen_l: 13187 case NVPTX::BI__nvvm_atom_sys_or_gen_ll: 13188 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_sys); 13189 case NVPTX::BI__nvvm_atom_cta_xor_gen_i: 13190 case NVPTX::BI__nvvm_atom_cta_xor_gen_l: 13191 case NVPTX::BI__nvvm_atom_cta_xor_gen_ll: 13192 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_cta); 13193 case NVPTX::BI__nvvm_atom_sys_xor_gen_i: 13194 case NVPTX::BI__nvvm_atom_sys_xor_gen_l: 13195 case NVPTX::BI__nvvm_atom_sys_xor_gen_ll: 13196 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_sys); 13197 case NVPTX::BI__nvvm_atom_cta_cas_gen_i: 13198 case NVPTX::BI__nvvm_atom_cta_cas_gen_l: 13199 case NVPTX::BI__nvvm_atom_cta_cas_gen_ll: { 13200 Value *Ptr = EmitScalarExpr(E->getArg(0)); 13201 return Builder.CreateCall( 13202 CGM.getIntrinsic( 13203 Intrinsic::nvvm_atomic_cas_gen_i_cta, 13204 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 13205 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 13206 } 13207 case NVPTX::BI__nvvm_atom_sys_cas_gen_i: 13208 case NVPTX::BI__nvvm_atom_sys_cas_gen_l: 13209 case NVPTX::BI__nvvm_atom_sys_cas_gen_ll: { 13210 Value *Ptr = EmitScalarExpr(E->getArg(0)); 13211 return Builder.CreateCall( 13212 CGM.getIntrinsic( 13213 Intrinsic::nvvm_atomic_cas_gen_i_sys, 13214 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 13215 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 13216 } 13217 case NVPTX::BI__nvvm_match_all_sync_i32p: 13218 case NVPTX::BI__nvvm_match_all_sync_i64p: { 13219 Value *Mask = EmitScalarExpr(E->getArg(0)); 13220 Value *Val = EmitScalarExpr(E->getArg(1)); 13221 Address PredOutPtr = EmitPointerWithAlignment(E->getArg(2)); 13222 Value *ResultPair = Builder.CreateCall( 13223 CGM.getIntrinsic(BuiltinID == NVPTX::BI__nvvm_match_all_sync_i32p 13224 ? Intrinsic::nvvm_match_all_sync_i32p 13225 : Intrinsic::nvvm_match_all_sync_i64p), 13226 {Mask, Val}); 13227 Value *Pred = Builder.CreateZExt(Builder.CreateExtractValue(ResultPair, 1), 13228 PredOutPtr.getElementType()); 13229 Builder.CreateStore(Pred, PredOutPtr); 13230 return Builder.CreateExtractValue(ResultPair, 0); 13231 } 13232 case NVPTX::BI__hmma_m16n16k16_ld_a: 13233 case NVPTX::BI__hmma_m16n16k16_ld_b: 13234 case NVPTX::BI__hmma_m16n16k16_ld_c_f16: 13235 case NVPTX::BI__hmma_m16n16k16_ld_c_f32: 13236 case NVPTX::BI__hmma_m32n8k16_ld_a: 13237 case NVPTX::BI__hmma_m32n8k16_ld_b: 13238 case NVPTX::BI__hmma_m32n8k16_ld_c_f16: 13239 case NVPTX::BI__hmma_m32n8k16_ld_c_f32: 13240 case NVPTX::BI__hmma_m8n32k16_ld_a: 13241 case NVPTX::BI__hmma_m8n32k16_ld_b: 13242 case NVPTX::BI__hmma_m8n32k16_ld_c_f16: 13243 case NVPTX::BI__hmma_m8n32k16_ld_c_f32: { 13244 Address Dst = EmitPointerWithAlignment(E->getArg(0)); 13245 Value *Src = EmitScalarExpr(E->getArg(1)); 13246 Value *Ldm = EmitScalarExpr(E->getArg(2)); 13247 llvm::APSInt isColMajorArg; 13248 if (!E->getArg(3)->isIntegerConstantExpr(isColMajorArg, getContext())) 13249 return nullptr; 13250 bool isColMajor = isColMajorArg.getSExtValue(); 13251 unsigned IID; 13252 unsigned NumResults; 13253 switch (BuiltinID) { 13254 case NVPTX::BI__hmma_m16n16k16_ld_a: 13255 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_load_a_f16_col_stride 13256 : Intrinsic::nvvm_wmma_m16n16k16_load_a_f16_row_stride; 13257 NumResults = 8; 13258 break; 13259 case NVPTX::BI__hmma_m16n16k16_ld_b: 13260 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_load_b_f16_col_stride 13261 : Intrinsic::nvvm_wmma_m16n16k16_load_b_f16_row_stride; 13262 NumResults = 8; 13263 break; 13264 case NVPTX::BI__hmma_m16n16k16_ld_c_f16: 13265 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_load_c_f16_col_stride 13266 : Intrinsic::nvvm_wmma_m16n16k16_load_c_f16_row_stride; 13267 NumResults = 4; 13268 break; 13269 case NVPTX::BI__hmma_m16n16k16_ld_c_f32: 13270 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_load_c_f32_col_stride 13271 : Intrinsic::nvvm_wmma_m16n16k16_load_c_f32_row_stride; 13272 NumResults = 8; 13273 break; 13274 case NVPTX::BI__hmma_m32n8k16_ld_a: 13275 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_load_a_f16_col_stride 13276 : Intrinsic::nvvm_wmma_m32n8k16_load_a_f16_row_stride; 13277 NumResults = 8; 13278 break; 13279 case NVPTX::BI__hmma_m32n8k16_ld_b: 13280 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_load_b_f16_col_stride 13281 : Intrinsic::nvvm_wmma_m32n8k16_load_b_f16_row_stride; 13282 NumResults = 8; 13283 break; 13284 case NVPTX::BI__hmma_m32n8k16_ld_c_f16: 13285 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_load_c_f16_col_stride 13286 : Intrinsic::nvvm_wmma_m32n8k16_load_c_f16_row_stride; 13287 NumResults = 4; 13288 break; 13289 case NVPTX::BI__hmma_m32n8k16_ld_c_f32: 13290 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_load_c_f32_col_stride 13291 : Intrinsic::nvvm_wmma_m32n8k16_load_c_f32_row_stride; 13292 NumResults = 8; 13293 break; 13294 case NVPTX::BI__hmma_m8n32k16_ld_a: 13295 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_load_a_f16_col_stride 13296 : Intrinsic::nvvm_wmma_m8n32k16_load_a_f16_row_stride; 13297 NumResults = 8; 13298 break; 13299 case NVPTX::BI__hmma_m8n32k16_ld_b: 13300 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_load_b_f16_col_stride 13301 : Intrinsic::nvvm_wmma_m8n32k16_load_b_f16_row_stride; 13302 NumResults = 8; 13303 break; 13304 case NVPTX::BI__hmma_m8n32k16_ld_c_f16: 13305 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_load_c_f16_col_stride 13306 : Intrinsic::nvvm_wmma_m8n32k16_load_c_f16_row_stride; 13307 NumResults = 4; 13308 break; 13309 case NVPTX::BI__hmma_m8n32k16_ld_c_f32: 13310 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_load_c_f32_col_stride 13311 : Intrinsic::nvvm_wmma_m8n32k16_load_c_f32_row_stride; 13312 NumResults = 8; 13313 break; 13314 default: 13315 llvm_unreachable("Unexpected builtin ID."); 13316 } 13317 Value *Result = 13318 Builder.CreateCall(CGM.getIntrinsic(IID, Src->getType()), {Src, Ldm}); 13319 13320 // Save returned values. 13321 for (unsigned i = 0; i < NumResults; ++i) { 13322 Builder.CreateAlignedStore( 13323 Builder.CreateBitCast(Builder.CreateExtractValue(Result, i), 13324 Dst.getElementType()), 13325 Builder.CreateGEP(Dst.getPointer(), llvm::ConstantInt::get(IntTy, i)), 13326 CharUnits::fromQuantity(4)); 13327 } 13328 return Result; 13329 } 13330 13331 case NVPTX::BI__hmma_m16n16k16_st_c_f16: 13332 case NVPTX::BI__hmma_m16n16k16_st_c_f32: 13333 case NVPTX::BI__hmma_m32n8k16_st_c_f16: 13334 case NVPTX::BI__hmma_m32n8k16_st_c_f32: 13335 case NVPTX::BI__hmma_m8n32k16_st_c_f16: 13336 case NVPTX::BI__hmma_m8n32k16_st_c_f32: { 13337 Value *Dst = EmitScalarExpr(E->getArg(0)); 13338 Address Src = EmitPointerWithAlignment(E->getArg(1)); 13339 Value *Ldm = EmitScalarExpr(E->getArg(2)); 13340 llvm::APSInt isColMajorArg; 13341 if (!E->getArg(3)->isIntegerConstantExpr(isColMajorArg, getContext())) 13342 return nullptr; 13343 bool isColMajor = isColMajorArg.getSExtValue(); 13344 unsigned IID; 13345 unsigned NumResults = 8; 13346 // PTX Instructions (and LLVM intrinsics) are defined for slice _d_, yet 13347 // for some reason nvcc builtins use _c_. 13348 switch (BuiltinID) { 13349 case NVPTX::BI__hmma_m16n16k16_st_c_f16: 13350 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_store_d_f16_col_stride 13351 : Intrinsic::nvvm_wmma_m16n16k16_store_d_f16_row_stride; 13352 NumResults = 4; 13353 break; 13354 case NVPTX::BI__hmma_m16n16k16_st_c_f32: 13355 IID = isColMajor ? Intrinsic::nvvm_wmma_m16n16k16_store_d_f32_col_stride 13356 : Intrinsic::nvvm_wmma_m16n16k16_store_d_f32_row_stride; 13357 break; 13358 case NVPTX::BI__hmma_m32n8k16_st_c_f16: 13359 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_store_d_f16_col_stride 13360 : Intrinsic::nvvm_wmma_m32n8k16_store_d_f16_row_stride; 13361 NumResults = 4; 13362 break; 13363 case NVPTX::BI__hmma_m32n8k16_st_c_f32: 13364 IID = isColMajor ? Intrinsic::nvvm_wmma_m32n8k16_store_d_f32_col_stride 13365 : Intrinsic::nvvm_wmma_m32n8k16_store_d_f32_row_stride; 13366 break; 13367 case NVPTX::BI__hmma_m8n32k16_st_c_f16: 13368 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_store_d_f16_col_stride 13369 : Intrinsic::nvvm_wmma_m8n32k16_store_d_f16_row_stride; 13370 NumResults = 4; 13371 break; 13372 case NVPTX::BI__hmma_m8n32k16_st_c_f32: 13373 IID = isColMajor ? Intrinsic::nvvm_wmma_m8n32k16_store_d_f32_col_stride 13374 : Intrinsic::nvvm_wmma_m8n32k16_store_d_f32_row_stride; 13375 break; 13376 default: 13377 llvm_unreachable("Unexpected builtin ID."); 13378 } 13379 Function *Intrinsic = CGM.getIntrinsic(IID, Dst->getType()); 13380 llvm::Type *ParamType = Intrinsic->getFunctionType()->getParamType(1); 13381 SmallVector<Value *, 10> Values = {Dst}; 13382 for (unsigned i = 0; i < NumResults; ++i) { 13383 Value *V = Builder.CreateAlignedLoad( 13384 Builder.CreateGEP(Src.getPointer(), llvm::ConstantInt::get(IntTy, i)), 13385 CharUnits::fromQuantity(4)); 13386 Values.push_back(Builder.CreateBitCast(V, ParamType)); 13387 } 13388 Values.push_back(Ldm); 13389 Value *Result = Builder.CreateCall(Intrinsic, Values); 13390 return Result; 13391 } 13392 13393 // BI__hmma_m16n16k16_mma_<Dtype><CType>(d, a, b, c, layout, satf) --> 13394 // Intrinsic::nvvm_wmma_m16n16k16_mma_sync<layout A,B><DType><CType><Satf> 13395 case NVPTX::BI__hmma_m16n16k16_mma_f16f16: 13396 case NVPTX::BI__hmma_m16n16k16_mma_f32f16: 13397 case NVPTX::BI__hmma_m16n16k16_mma_f32f32: 13398 case NVPTX::BI__hmma_m16n16k16_mma_f16f32: 13399 case NVPTX::BI__hmma_m32n8k16_mma_f16f16: 13400 case NVPTX::BI__hmma_m32n8k16_mma_f32f16: 13401 case NVPTX::BI__hmma_m32n8k16_mma_f32f32: 13402 case NVPTX::BI__hmma_m32n8k16_mma_f16f32: 13403 case NVPTX::BI__hmma_m8n32k16_mma_f16f16: 13404 case NVPTX::BI__hmma_m8n32k16_mma_f32f16: 13405 case NVPTX::BI__hmma_m8n32k16_mma_f32f32: 13406 case NVPTX::BI__hmma_m8n32k16_mma_f16f32: { 13407 Address Dst = EmitPointerWithAlignment(E->getArg(0)); 13408 Address SrcA = EmitPointerWithAlignment(E->getArg(1)); 13409 Address SrcB = EmitPointerWithAlignment(E->getArg(2)); 13410 Address SrcC = EmitPointerWithAlignment(E->getArg(3)); 13411 llvm::APSInt LayoutArg; 13412 if (!E->getArg(4)->isIntegerConstantExpr(LayoutArg, getContext())) 13413 return nullptr; 13414 int Layout = LayoutArg.getSExtValue(); 13415 if (Layout < 0 || Layout > 3) 13416 return nullptr; 13417 llvm::APSInt SatfArg; 13418 if (!E->getArg(5)->isIntegerConstantExpr(SatfArg, getContext())) 13419 return nullptr; 13420 bool Satf = SatfArg.getSExtValue(); 13421 13422 // clang-format off 13423 #define MMA_VARIANTS(geom, type) {{ \ 13424 Intrinsic::nvvm_wmma_##geom##_mma_row_row_##type, \ 13425 Intrinsic::nvvm_wmma_##geom##_mma_row_row_##type##_satfinite, \ 13426 Intrinsic::nvvm_wmma_##geom##_mma_row_col_##type, \ 13427 Intrinsic::nvvm_wmma_##geom##_mma_row_col_##type##_satfinite, \ 13428 Intrinsic::nvvm_wmma_##geom##_mma_col_row_##type, \ 13429 Intrinsic::nvvm_wmma_##geom##_mma_col_row_##type##_satfinite, \ 13430 Intrinsic::nvvm_wmma_##geom##_mma_col_col_##type, \ 13431 Intrinsic::nvvm_wmma_##geom##_mma_col_col_##type##_satfinite \ 13432 }} 13433 // clang-format on 13434 13435 auto getMMAIntrinsic = [Layout, Satf](std::array<unsigned, 8> Variants) { 13436 unsigned Index = Layout * 2 + Satf; 13437 assert(Index < 8); 13438 return Variants[Index]; 13439 }; 13440 unsigned IID; 13441 unsigned NumEltsC; 13442 unsigned NumEltsD; 13443 switch (BuiltinID) { 13444 case NVPTX::BI__hmma_m16n16k16_mma_f16f16: 13445 IID = getMMAIntrinsic(MMA_VARIANTS(m16n16k16, f16_f16)); 13446 NumEltsC = 4; 13447 NumEltsD = 4; 13448 break; 13449 case NVPTX::BI__hmma_m16n16k16_mma_f32f16: 13450 IID = getMMAIntrinsic(MMA_VARIANTS(m16n16k16, f32_f16)); 13451 NumEltsC = 4; 13452 NumEltsD = 8; 13453 break; 13454 case NVPTX::BI__hmma_m16n16k16_mma_f16f32: 13455 IID = getMMAIntrinsic(MMA_VARIANTS(m16n16k16, f16_f32)); 13456 NumEltsC = 8; 13457 NumEltsD = 4; 13458 break; 13459 case NVPTX::BI__hmma_m16n16k16_mma_f32f32: 13460 IID = getMMAIntrinsic(MMA_VARIANTS(m16n16k16, f32_f32)); 13461 NumEltsC = 8; 13462 NumEltsD = 8; 13463 break; 13464 case NVPTX::BI__hmma_m32n8k16_mma_f16f16: 13465 IID = getMMAIntrinsic(MMA_VARIANTS(m32n8k16, f16_f16)); 13466 NumEltsC = 4; 13467 NumEltsD = 4; 13468 break; 13469 case NVPTX::BI__hmma_m32n8k16_mma_f32f16: 13470 IID = getMMAIntrinsic(MMA_VARIANTS(m32n8k16, f32_f16)); 13471 NumEltsC = 4; 13472 NumEltsD = 8; 13473 break; 13474 case NVPTX::BI__hmma_m32n8k16_mma_f16f32: 13475 IID = getMMAIntrinsic(MMA_VARIANTS(m32n8k16, f16_f32)); 13476 NumEltsC = 8; 13477 NumEltsD = 4; 13478 break; 13479 case NVPTX::BI__hmma_m32n8k16_mma_f32f32: 13480 IID = getMMAIntrinsic(MMA_VARIANTS(m32n8k16, f32_f32)); 13481 NumEltsC = 8; 13482 NumEltsD = 8; 13483 break; 13484 case NVPTX::BI__hmma_m8n32k16_mma_f16f16: 13485 IID = getMMAIntrinsic(MMA_VARIANTS(m8n32k16, f16_f16)); 13486 NumEltsC = 4; 13487 NumEltsD = 4; 13488 break; 13489 case NVPTX::BI__hmma_m8n32k16_mma_f32f16: 13490 IID = getMMAIntrinsic(MMA_VARIANTS(m8n32k16, f32_f16)); 13491 NumEltsC = 4; 13492 NumEltsD = 8; 13493 break; 13494 case NVPTX::BI__hmma_m8n32k16_mma_f16f32: 13495 IID = getMMAIntrinsic(MMA_VARIANTS(m8n32k16, f16_f32)); 13496 NumEltsC = 8; 13497 NumEltsD = 4; 13498 break; 13499 case NVPTX::BI__hmma_m8n32k16_mma_f32f32: 13500 IID = getMMAIntrinsic(MMA_VARIANTS(m8n32k16, f32_f32)); 13501 NumEltsC = 8; 13502 NumEltsD = 8; 13503 break; 13504 default: 13505 llvm_unreachable("Unexpected builtin ID."); 13506 } 13507 #undef MMA_VARIANTS 13508 13509 SmallVector<Value *, 24> Values; 13510 Function *Intrinsic = CGM.getIntrinsic(IID); 13511 llvm::Type *ABType = Intrinsic->getFunctionType()->getParamType(0); 13512 // Load A 13513 for (unsigned i = 0; i < 8; ++i) { 13514 Value *V = Builder.CreateAlignedLoad( 13515 Builder.CreateGEP(SrcA.getPointer(), 13516 llvm::ConstantInt::get(IntTy, i)), 13517 CharUnits::fromQuantity(4)); 13518 Values.push_back(Builder.CreateBitCast(V, ABType)); 13519 } 13520 // Load B 13521 for (unsigned i = 0; i < 8; ++i) { 13522 Value *V = Builder.CreateAlignedLoad( 13523 Builder.CreateGEP(SrcB.getPointer(), 13524 llvm::ConstantInt::get(IntTy, i)), 13525 CharUnits::fromQuantity(4)); 13526 Values.push_back(Builder.CreateBitCast(V, ABType)); 13527 } 13528 // Load C 13529 llvm::Type *CType = Intrinsic->getFunctionType()->getParamType(16); 13530 for (unsigned i = 0; i < NumEltsC; ++i) { 13531 Value *V = Builder.CreateAlignedLoad( 13532 Builder.CreateGEP(SrcC.getPointer(), 13533 llvm::ConstantInt::get(IntTy, i)), 13534 CharUnits::fromQuantity(4)); 13535 Values.push_back(Builder.CreateBitCast(V, CType)); 13536 } 13537 Value *Result = Builder.CreateCall(Intrinsic, Values); 13538 llvm::Type *DType = Dst.getElementType(); 13539 for (unsigned i = 0; i < NumEltsD; ++i) 13540 Builder.CreateAlignedStore( 13541 Builder.CreateBitCast(Builder.CreateExtractValue(Result, i), DType), 13542 Builder.CreateGEP(Dst.getPointer(), llvm::ConstantInt::get(IntTy, i)), 13543 CharUnits::fromQuantity(4)); 13544 return Result; 13545 } 13546 default: 13547 return nullptr; 13548 } 13549 } 13550 13551 Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, 13552 const CallExpr *E) { 13553 switch (BuiltinID) { 13554 case WebAssembly::BI__builtin_wasm_memory_size: { 13555 llvm::Type *ResultType = ConvertType(E->getType()); 13556 Value *I = EmitScalarExpr(E->getArg(0)); 13557 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_memory_size, ResultType); 13558 return Builder.CreateCall(Callee, I); 13559 } 13560 case WebAssembly::BI__builtin_wasm_memory_grow: { 13561 llvm::Type *ResultType = ConvertType(E->getType()); 13562 Value *Args[] = { 13563 EmitScalarExpr(E->getArg(0)), 13564 EmitScalarExpr(E->getArg(1)) 13565 }; 13566 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_memory_grow, ResultType); 13567 return Builder.CreateCall(Callee, Args); 13568 } 13569 case WebAssembly::BI__builtin_wasm_memory_init: { 13570 llvm::APSInt SegConst; 13571 if (!E->getArg(0)->isIntegerConstantExpr(SegConst, getContext())) 13572 llvm_unreachable("Constant arg isn't actually constant?"); 13573 llvm::APSInt MemConst; 13574 if (!E->getArg(1)->isIntegerConstantExpr(MemConst, getContext())) 13575 llvm_unreachable("Constant arg isn't actually constant?"); 13576 if (!MemConst.isNullValue()) 13577 ErrorUnsupported(E, "non-zero memory index"); 13578 Value *Args[] = {llvm::ConstantInt::get(getLLVMContext(), SegConst), 13579 llvm::ConstantInt::get(getLLVMContext(), MemConst), 13580 EmitScalarExpr(E->getArg(2)), EmitScalarExpr(E->getArg(3)), 13581 EmitScalarExpr(E->getArg(4))}; 13582 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_memory_init); 13583 return Builder.CreateCall(Callee, Args); 13584 } 13585 case WebAssembly::BI__builtin_wasm_data_drop: { 13586 llvm::APSInt SegConst; 13587 if (!E->getArg(0)->isIntegerConstantExpr(SegConst, getContext())) 13588 llvm_unreachable("Constant arg isn't actually constant?"); 13589 Value *Arg = llvm::ConstantInt::get(getLLVMContext(), SegConst); 13590 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_data_drop); 13591 return Builder.CreateCall(Callee, {Arg}); 13592 } 13593 case WebAssembly::BI__builtin_wasm_throw: { 13594 Value *Tag = EmitScalarExpr(E->getArg(0)); 13595 Value *Obj = EmitScalarExpr(E->getArg(1)); 13596 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_throw); 13597 return Builder.CreateCall(Callee, {Tag, Obj}); 13598 } 13599 case WebAssembly::BI__builtin_wasm_rethrow: { 13600 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_rethrow); 13601 return Builder.CreateCall(Callee); 13602 } 13603 case WebAssembly::BI__builtin_wasm_atomic_wait_i32: { 13604 Value *Addr = EmitScalarExpr(E->getArg(0)); 13605 Value *Expected = EmitScalarExpr(E->getArg(1)); 13606 Value *Timeout = EmitScalarExpr(E->getArg(2)); 13607 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_atomic_wait_i32); 13608 return Builder.CreateCall(Callee, {Addr, Expected, Timeout}); 13609 } 13610 case WebAssembly::BI__builtin_wasm_atomic_wait_i64: { 13611 Value *Addr = EmitScalarExpr(E->getArg(0)); 13612 Value *Expected = EmitScalarExpr(E->getArg(1)); 13613 Value *Timeout = EmitScalarExpr(E->getArg(2)); 13614 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_atomic_wait_i64); 13615 return Builder.CreateCall(Callee, {Addr, Expected, Timeout}); 13616 } 13617 case WebAssembly::BI__builtin_wasm_atomic_notify: { 13618 Value *Addr = EmitScalarExpr(E->getArg(0)); 13619 Value *Count = EmitScalarExpr(E->getArg(1)); 13620 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_atomic_notify); 13621 return Builder.CreateCall(Callee, {Addr, Count}); 13622 } 13623 case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i32_f32: 13624 case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i32_f64: 13625 case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i64_f32: 13626 case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i64_f64: 13627 case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i32x4_f32x4: 13628 case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i64x2_f64x2: { 13629 Value *Src = EmitScalarExpr(E->getArg(0)); 13630 llvm::Type *ResT = ConvertType(E->getType()); 13631 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_trunc_saturate_signed, 13632 {ResT, Src->getType()}); 13633 return Builder.CreateCall(Callee, {Src}); 13634 } 13635 case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i32_f32: 13636 case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i32_f64: 13637 case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i64_f32: 13638 case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i64_f64: 13639 case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i32x4_f32x4: 13640 case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i64x2_f64x2: { 13641 Value *Src = EmitScalarExpr(E->getArg(0)); 13642 llvm::Type *ResT = ConvertType(E->getType()); 13643 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_trunc_saturate_unsigned, 13644 {ResT, Src->getType()}); 13645 return Builder.CreateCall(Callee, {Src}); 13646 } 13647 case WebAssembly::BI__builtin_wasm_min_f32: 13648 case WebAssembly::BI__builtin_wasm_min_f64: 13649 case WebAssembly::BI__builtin_wasm_min_f32x4: 13650 case WebAssembly::BI__builtin_wasm_min_f64x2: { 13651 Value *LHS = EmitScalarExpr(E->getArg(0)); 13652 Value *RHS = EmitScalarExpr(E->getArg(1)); 13653 Function *Callee = CGM.getIntrinsic(Intrinsic::minimum, 13654 ConvertType(E->getType())); 13655 return Builder.CreateCall(Callee, {LHS, RHS}); 13656 } 13657 case WebAssembly::BI__builtin_wasm_max_f32: 13658 case WebAssembly::BI__builtin_wasm_max_f64: 13659 case WebAssembly::BI__builtin_wasm_max_f32x4: 13660 case WebAssembly::BI__builtin_wasm_max_f64x2: { 13661 Value *LHS = EmitScalarExpr(E->getArg(0)); 13662 Value *RHS = EmitScalarExpr(E->getArg(1)); 13663 Function *Callee = CGM.getIntrinsic(Intrinsic::maximum, 13664 ConvertType(E->getType())); 13665 return Builder.CreateCall(Callee, {LHS, RHS}); 13666 } 13667 case WebAssembly::BI__builtin_wasm_extract_lane_s_i8x16: 13668 case WebAssembly::BI__builtin_wasm_extract_lane_u_i8x16: 13669 case WebAssembly::BI__builtin_wasm_extract_lane_s_i16x8: 13670 case WebAssembly::BI__builtin_wasm_extract_lane_u_i16x8: 13671 case WebAssembly::BI__builtin_wasm_extract_lane_i32x4: 13672 case WebAssembly::BI__builtin_wasm_extract_lane_i64x2: 13673 case WebAssembly::BI__builtin_wasm_extract_lane_f32x4: 13674 case WebAssembly::BI__builtin_wasm_extract_lane_f64x2: { 13675 llvm::APSInt LaneConst; 13676 if (!E->getArg(1)->isIntegerConstantExpr(LaneConst, getContext())) 13677 llvm_unreachable("Constant arg isn't actually constant?"); 13678 Value *Vec = EmitScalarExpr(E->getArg(0)); 13679 Value *Lane = llvm::ConstantInt::get(getLLVMContext(), LaneConst); 13680 Value *Extract = Builder.CreateExtractElement(Vec, Lane); 13681 switch (BuiltinID) { 13682 case WebAssembly::BI__builtin_wasm_extract_lane_s_i8x16: 13683 case WebAssembly::BI__builtin_wasm_extract_lane_s_i16x8: 13684 return Builder.CreateSExt(Extract, ConvertType(E->getType())); 13685 case WebAssembly::BI__builtin_wasm_extract_lane_u_i8x16: 13686 case WebAssembly::BI__builtin_wasm_extract_lane_u_i16x8: 13687 return Builder.CreateZExt(Extract, ConvertType(E->getType())); 13688 case WebAssembly::BI__builtin_wasm_extract_lane_i32x4: 13689 case WebAssembly::BI__builtin_wasm_extract_lane_i64x2: 13690 case WebAssembly::BI__builtin_wasm_extract_lane_f32x4: 13691 case WebAssembly::BI__builtin_wasm_extract_lane_f64x2: 13692 return Extract; 13693 default: 13694 llvm_unreachable("unexpected builtin ID"); 13695 } 13696 } 13697 case WebAssembly::BI__builtin_wasm_replace_lane_i8x16: 13698 case WebAssembly::BI__builtin_wasm_replace_lane_i16x8: 13699 case WebAssembly::BI__builtin_wasm_replace_lane_i32x4: 13700 case WebAssembly::BI__builtin_wasm_replace_lane_i64x2: 13701 case WebAssembly::BI__builtin_wasm_replace_lane_f32x4: 13702 case WebAssembly::BI__builtin_wasm_replace_lane_f64x2: { 13703 llvm::APSInt LaneConst; 13704 if (!E->getArg(1)->isIntegerConstantExpr(LaneConst, getContext())) 13705 llvm_unreachable("Constant arg isn't actually constant?"); 13706 Value *Vec = EmitScalarExpr(E->getArg(0)); 13707 Value *Lane = llvm::ConstantInt::get(getLLVMContext(), LaneConst); 13708 Value *Val = EmitScalarExpr(E->getArg(2)); 13709 switch (BuiltinID) { 13710 case WebAssembly::BI__builtin_wasm_replace_lane_i8x16: 13711 case WebAssembly::BI__builtin_wasm_replace_lane_i16x8: { 13712 llvm::Type *ElemType = ConvertType(E->getType())->getVectorElementType(); 13713 Value *Trunc = Builder.CreateTrunc(Val, ElemType); 13714 return Builder.CreateInsertElement(Vec, Trunc, Lane); 13715 } 13716 case WebAssembly::BI__builtin_wasm_replace_lane_i32x4: 13717 case WebAssembly::BI__builtin_wasm_replace_lane_i64x2: 13718 case WebAssembly::BI__builtin_wasm_replace_lane_f32x4: 13719 case WebAssembly::BI__builtin_wasm_replace_lane_f64x2: 13720 return Builder.CreateInsertElement(Vec, Val, Lane); 13721 default: 13722 llvm_unreachable("unexpected builtin ID"); 13723 } 13724 } 13725 case WebAssembly::BI__builtin_wasm_add_saturate_s_i8x16: 13726 case WebAssembly::BI__builtin_wasm_add_saturate_u_i8x16: 13727 case WebAssembly::BI__builtin_wasm_add_saturate_s_i16x8: 13728 case WebAssembly::BI__builtin_wasm_add_saturate_u_i16x8: 13729 case WebAssembly::BI__builtin_wasm_sub_saturate_s_i8x16: 13730 case WebAssembly::BI__builtin_wasm_sub_saturate_u_i8x16: 13731 case WebAssembly::BI__builtin_wasm_sub_saturate_s_i16x8: 13732 case WebAssembly::BI__builtin_wasm_sub_saturate_u_i16x8: { 13733 unsigned IntNo; 13734 switch (BuiltinID) { 13735 case WebAssembly::BI__builtin_wasm_add_saturate_s_i8x16: 13736 case WebAssembly::BI__builtin_wasm_add_saturate_s_i16x8: 13737 IntNo = Intrinsic::sadd_sat; 13738 break; 13739 case WebAssembly::BI__builtin_wasm_add_saturate_u_i8x16: 13740 case WebAssembly::BI__builtin_wasm_add_saturate_u_i16x8: 13741 IntNo = Intrinsic::uadd_sat; 13742 break; 13743 case WebAssembly::BI__builtin_wasm_sub_saturate_s_i8x16: 13744 case WebAssembly::BI__builtin_wasm_sub_saturate_s_i16x8: 13745 IntNo = Intrinsic::wasm_sub_saturate_signed; 13746 break; 13747 case WebAssembly::BI__builtin_wasm_sub_saturate_u_i8x16: 13748 case WebAssembly::BI__builtin_wasm_sub_saturate_u_i16x8: 13749 IntNo = Intrinsic::wasm_sub_saturate_unsigned; 13750 break; 13751 default: 13752 llvm_unreachable("unexpected builtin ID"); 13753 } 13754 Value *LHS = EmitScalarExpr(E->getArg(0)); 13755 Value *RHS = EmitScalarExpr(E->getArg(1)); 13756 Function *Callee = CGM.getIntrinsic(IntNo, ConvertType(E->getType())); 13757 return Builder.CreateCall(Callee, {LHS, RHS}); 13758 } 13759 case WebAssembly::BI__builtin_wasm_bitselect: { 13760 Value *V1 = EmitScalarExpr(E->getArg(0)); 13761 Value *V2 = EmitScalarExpr(E->getArg(1)); 13762 Value *C = EmitScalarExpr(E->getArg(2)); 13763 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_bitselect, 13764 ConvertType(E->getType())); 13765 return Builder.CreateCall(Callee, {V1, V2, C}); 13766 } 13767 case WebAssembly::BI__builtin_wasm_any_true_i8x16: 13768 case WebAssembly::BI__builtin_wasm_any_true_i16x8: 13769 case WebAssembly::BI__builtin_wasm_any_true_i32x4: 13770 case WebAssembly::BI__builtin_wasm_any_true_i64x2: 13771 case WebAssembly::BI__builtin_wasm_all_true_i8x16: 13772 case WebAssembly::BI__builtin_wasm_all_true_i16x8: 13773 case WebAssembly::BI__builtin_wasm_all_true_i32x4: 13774 case WebAssembly::BI__builtin_wasm_all_true_i64x2: { 13775 unsigned IntNo; 13776 switch (BuiltinID) { 13777 case WebAssembly::BI__builtin_wasm_any_true_i8x16: 13778 case WebAssembly::BI__builtin_wasm_any_true_i16x8: 13779 case WebAssembly::BI__builtin_wasm_any_true_i32x4: 13780 case WebAssembly::BI__builtin_wasm_any_true_i64x2: 13781 IntNo = Intrinsic::wasm_anytrue; 13782 break; 13783 case WebAssembly::BI__builtin_wasm_all_true_i8x16: 13784 case WebAssembly::BI__builtin_wasm_all_true_i16x8: 13785 case WebAssembly::BI__builtin_wasm_all_true_i32x4: 13786 case WebAssembly::BI__builtin_wasm_all_true_i64x2: 13787 IntNo = Intrinsic::wasm_alltrue; 13788 break; 13789 default: 13790 llvm_unreachable("unexpected builtin ID"); 13791 } 13792 Value *Vec = EmitScalarExpr(E->getArg(0)); 13793 Function *Callee = CGM.getIntrinsic(IntNo, Vec->getType()); 13794 return Builder.CreateCall(Callee, {Vec}); 13795 } 13796 case WebAssembly::BI__builtin_wasm_abs_f32x4: 13797 case WebAssembly::BI__builtin_wasm_abs_f64x2: { 13798 Value *Vec = EmitScalarExpr(E->getArg(0)); 13799 Function *Callee = CGM.getIntrinsic(Intrinsic::fabs, Vec->getType()); 13800 return Builder.CreateCall(Callee, {Vec}); 13801 } 13802 case WebAssembly::BI__builtin_wasm_sqrt_f32x4: 13803 case WebAssembly::BI__builtin_wasm_sqrt_f64x2: { 13804 Value *Vec = EmitScalarExpr(E->getArg(0)); 13805 Function *Callee = CGM.getIntrinsic(Intrinsic::sqrt, Vec->getType()); 13806 return Builder.CreateCall(Callee, {Vec}); 13807 } 13808 13809 default: 13810 return nullptr; 13811 } 13812 } 13813 13814 Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, 13815 const CallExpr *E) { 13816 SmallVector<llvm::Value *, 4> Ops; 13817 Intrinsic::ID ID = Intrinsic::not_intrinsic; 13818 13819 auto MakeCircLd = [&](unsigned IntID, bool HasImm) { 13820 // The base pointer is passed by address, so it needs to be loaded. 13821 Address BP = EmitPointerWithAlignment(E->getArg(0)); 13822 BP = Address(Builder.CreateBitCast(BP.getPointer(), Int8PtrPtrTy), 13823 BP.getAlignment()); 13824 llvm::Value *Base = Builder.CreateLoad(BP); 13825 // Operands are Base, Increment, Modifier, Start. 13826 if (HasImm) 13827 Ops = { Base, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2)), 13828 EmitScalarExpr(E->getArg(3)) }; 13829 else 13830 Ops = { Base, EmitScalarExpr(E->getArg(1)), 13831 EmitScalarExpr(E->getArg(2)) }; 13832 13833 llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops); 13834 llvm::Value *NewBase = Builder.CreateExtractValue(Result, 1); 13835 llvm::Value *LV = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), 13836 NewBase->getType()->getPointerTo()); 13837 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 13838 // The intrinsic generates two results. The new value for the base pointer 13839 // needs to be stored. 13840 Builder.CreateAlignedStore(NewBase, LV, Dest.getAlignment()); 13841 return Builder.CreateExtractValue(Result, 0); 13842 }; 13843 13844 auto MakeCircSt = [&](unsigned IntID, bool HasImm) { 13845 // The base pointer is passed by address, so it needs to be loaded. 13846 Address BP = EmitPointerWithAlignment(E->getArg(0)); 13847 BP = Address(Builder.CreateBitCast(BP.getPointer(), Int8PtrPtrTy), 13848 BP.getAlignment()); 13849 llvm::Value *Base = Builder.CreateLoad(BP); 13850 // Operands are Base, Increment, Modifier, Value, Start. 13851 if (HasImm) 13852 Ops = { Base, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2)), 13853 EmitScalarExpr(E->getArg(3)), EmitScalarExpr(E->getArg(4)) }; 13854 else 13855 Ops = { Base, EmitScalarExpr(E->getArg(1)), 13856 EmitScalarExpr(E->getArg(2)), EmitScalarExpr(E->getArg(3)) }; 13857 13858 llvm::Value *NewBase = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops); 13859 llvm::Value *LV = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), 13860 NewBase->getType()->getPointerTo()); 13861 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 13862 // The intrinsic generates one result, which is the new value for the base 13863 // pointer. It needs to be stored. 13864 return Builder.CreateAlignedStore(NewBase, LV, Dest.getAlignment()); 13865 }; 13866 13867 // Handle the conversion of bit-reverse load intrinsics to bit code. 13868 // The intrinsic call after this function only reads from memory and the 13869 // write to memory is dealt by the store instruction. 13870 auto MakeBrevLd = [&](unsigned IntID, llvm::Type *DestTy) { 13871 // The intrinsic generates one result, which is the new value for the base 13872 // pointer. It needs to be returned. The result of the load instruction is 13873 // passed to intrinsic by address, so the value needs to be stored. 13874 llvm::Value *BaseAddress = 13875 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int8PtrTy); 13876 13877 // Expressions like &(*pt++) will be incremented per evaluation. 13878 // EmitPointerWithAlignment and EmitScalarExpr evaluates the expression 13879 // per call. 13880 Address DestAddr = EmitPointerWithAlignment(E->getArg(1)); 13881 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), Int8PtrTy), 13882 DestAddr.getAlignment()); 13883 llvm::Value *DestAddress = DestAddr.getPointer(); 13884 13885 // Operands are Base, Dest, Modifier. 13886 // The intrinsic format in LLVM IR is defined as 13887 // { ValueType, i8* } (i8*, i32). 13888 Ops = {BaseAddress, EmitScalarExpr(E->getArg(2))}; 13889 13890 llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops); 13891 // The value needs to be stored as the variable is passed by reference. 13892 llvm::Value *DestVal = Builder.CreateExtractValue(Result, 0); 13893 13894 // The store needs to be truncated to fit the destination type. 13895 // While i32 and i64 are natively supported on Hexagon, i8 and i16 needs 13896 // to be handled with stores of respective destination type. 13897 DestVal = Builder.CreateTrunc(DestVal, DestTy); 13898 13899 llvm::Value *DestForStore = 13900 Builder.CreateBitCast(DestAddress, DestVal->getType()->getPointerTo()); 13901 Builder.CreateAlignedStore(DestVal, DestForStore, DestAddr.getAlignment()); 13902 // The updated value of the base pointer is returned. 13903 return Builder.CreateExtractValue(Result, 1); 13904 }; 13905 13906 switch (BuiltinID) { 13907 case Hexagon::BI__builtin_HEXAGON_V6_vaddcarry: 13908 case Hexagon::BI__builtin_HEXAGON_V6_vaddcarry_128B: { 13909 Address Dest = EmitPointerWithAlignment(E->getArg(2)); 13910 unsigned Size; 13911 if (BuiltinID == Hexagon::BI__builtin_HEXAGON_V6_vaddcarry) { 13912 Size = 512; 13913 ID = Intrinsic::hexagon_V6_vaddcarry; 13914 } else { 13915 Size = 1024; 13916 ID = Intrinsic::hexagon_V6_vaddcarry_128B; 13917 } 13918 Dest = Builder.CreateBitCast(Dest, 13919 llvm::VectorType::get(Builder.getInt1Ty(), Size)->getPointerTo(0)); 13920 LoadInst *QLd = Builder.CreateLoad(Dest); 13921 Ops = { EmitScalarExpr(E->getArg(0)), EmitScalarExpr(E->getArg(1)), QLd }; 13922 llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 13923 llvm::Value *Vprd = Builder.CreateExtractValue(Result, 1); 13924 llvm::Value *Base = Builder.CreateBitCast(EmitScalarExpr(E->getArg(2)), 13925 Vprd->getType()->getPointerTo(0)); 13926 Builder.CreateAlignedStore(Vprd, Base, Dest.getAlignment()); 13927 return Builder.CreateExtractValue(Result, 0); 13928 } 13929 case Hexagon::BI__builtin_HEXAGON_V6_vsubcarry: 13930 case Hexagon::BI__builtin_HEXAGON_V6_vsubcarry_128B: { 13931 Address Dest = EmitPointerWithAlignment(E->getArg(2)); 13932 unsigned Size; 13933 if (BuiltinID == Hexagon::BI__builtin_HEXAGON_V6_vsubcarry) { 13934 Size = 512; 13935 ID = Intrinsic::hexagon_V6_vsubcarry; 13936 } else { 13937 Size = 1024; 13938 ID = Intrinsic::hexagon_V6_vsubcarry_128B; 13939 } 13940 Dest = Builder.CreateBitCast(Dest, 13941 llvm::VectorType::get(Builder.getInt1Ty(), Size)->getPointerTo(0)); 13942 LoadInst *QLd = Builder.CreateLoad(Dest); 13943 Ops = { EmitScalarExpr(E->getArg(0)), EmitScalarExpr(E->getArg(1)), QLd }; 13944 llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 13945 llvm::Value *Vprd = Builder.CreateExtractValue(Result, 1); 13946 llvm::Value *Base = Builder.CreateBitCast(EmitScalarExpr(E->getArg(2)), 13947 Vprd->getType()->getPointerTo(0)); 13948 Builder.CreateAlignedStore(Vprd, Base, Dest.getAlignment()); 13949 return Builder.CreateExtractValue(Result, 0); 13950 } 13951 case Hexagon::BI__builtin_HEXAGON_L2_loadrub_pci: 13952 return MakeCircLd(Intrinsic::hexagon_L2_loadrub_pci, /*HasImm*/true); 13953 case Hexagon::BI__builtin_HEXAGON_L2_loadrb_pci: 13954 return MakeCircLd(Intrinsic::hexagon_L2_loadrb_pci, /*HasImm*/true); 13955 case Hexagon::BI__builtin_HEXAGON_L2_loadruh_pci: 13956 return MakeCircLd(Intrinsic::hexagon_L2_loadruh_pci, /*HasImm*/true); 13957 case Hexagon::BI__builtin_HEXAGON_L2_loadrh_pci: 13958 return MakeCircLd(Intrinsic::hexagon_L2_loadrh_pci, /*HasImm*/true); 13959 case Hexagon::BI__builtin_HEXAGON_L2_loadri_pci: 13960 return MakeCircLd(Intrinsic::hexagon_L2_loadri_pci, /*HasImm*/true); 13961 case Hexagon::BI__builtin_HEXAGON_L2_loadrd_pci: 13962 return MakeCircLd(Intrinsic::hexagon_L2_loadrd_pci, /*HasImm*/true); 13963 case Hexagon::BI__builtin_HEXAGON_L2_loadrub_pcr: 13964 return MakeCircLd(Intrinsic::hexagon_L2_loadrub_pcr, /*HasImm*/false); 13965 case Hexagon::BI__builtin_HEXAGON_L2_loadrb_pcr: 13966 return MakeCircLd(Intrinsic::hexagon_L2_loadrb_pcr, /*HasImm*/false); 13967 case Hexagon::BI__builtin_HEXAGON_L2_loadruh_pcr: 13968 return MakeCircLd(Intrinsic::hexagon_L2_loadruh_pcr, /*HasImm*/false); 13969 case Hexagon::BI__builtin_HEXAGON_L2_loadrh_pcr: 13970 return MakeCircLd(Intrinsic::hexagon_L2_loadrh_pcr, /*HasImm*/false); 13971 case Hexagon::BI__builtin_HEXAGON_L2_loadri_pcr: 13972 return MakeCircLd(Intrinsic::hexagon_L2_loadri_pcr, /*HasImm*/false); 13973 case Hexagon::BI__builtin_HEXAGON_L2_loadrd_pcr: 13974 return MakeCircLd(Intrinsic::hexagon_L2_loadrd_pcr, /*HasImm*/false); 13975 case Hexagon::BI__builtin_HEXAGON_S2_storerb_pci: 13976 return MakeCircSt(Intrinsic::hexagon_S2_storerb_pci, /*HasImm*/true); 13977 case Hexagon::BI__builtin_HEXAGON_S2_storerh_pci: 13978 return MakeCircSt(Intrinsic::hexagon_S2_storerh_pci, /*HasImm*/true); 13979 case Hexagon::BI__builtin_HEXAGON_S2_storerf_pci: 13980 return MakeCircSt(Intrinsic::hexagon_S2_storerf_pci, /*HasImm*/true); 13981 case Hexagon::BI__builtin_HEXAGON_S2_storeri_pci: 13982 return MakeCircSt(Intrinsic::hexagon_S2_storeri_pci, /*HasImm*/true); 13983 case Hexagon::BI__builtin_HEXAGON_S2_storerd_pci: 13984 return MakeCircSt(Intrinsic::hexagon_S2_storerd_pci, /*HasImm*/true); 13985 case Hexagon::BI__builtin_HEXAGON_S2_storerb_pcr: 13986 return MakeCircSt(Intrinsic::hexagon_S2_storerb_pcr, /*HasImm*/false); 13987 case Hexagon::BI__builtin_HEXAGON_S2_storerh_pcr: 13988 return MakeCircSt(Intrinsic::hexagon_S2_storerh_pcr, /*HasImm*/false); 13989 case Hexagon::BI__builtin_HEXAGON_S2_storerf_pcr: 13990 return MakeCircSt(Intrinsic::hexagon_S2_storerf_pcr, /*HasImm*/false); 13991 case Hexagon::BI__builtin_HEXAGON_S2_storeri_pcr: 13992 return MakeCircSt(Intrinsic::hexagon_S2_storeri_pcr, /*HasImm*/false); 13993 case Hexagon::BI__builtin_HEXAGON_S2_storerd_pcr: 13994 return MakeCircSt(Intrinsic::hexagon_S2_storerd_pcr, /*HasImm*/false); 13995 case Hexagon::BI__builtin_brev_ldub: 13996 return MakeBrevLd(Intrinsic::hexagon_L2_loadrub_pbr, Int8Ty); 13997 case Hexagon::BI__builtin_brev_ldb: 13998 return MakeBrevLd(Intrinsic::hexagon_L2_loadrb_pbr, Int8Ty); 13999 case Hexagon::BI__builtin_brev_lduh: 14000 return MakeBrevLd(Intrinsic::hexagon_L2_loadruh_pbr, Int16Ty); 14001 case Hexagon::BI__builtin_brev_ldh: 14002 return MakeBrevLd(Intrinsic::hexagon_L2_loadrh_pbr, Int16Ty); 14003 case Hexagon::BI__builtin_brev_ldw: 14004 return MakeBrevLd(Intrinsic::hexagon_L2_loadri_pbr, Int32Ty); 14005 case Hexagon::BI__builtin_brev_ldd: 14006 return MakeBrevLd(Intrinsic::hexagon_L2_loadrd_pbr, Int64Ty); 14007 default: 14008 break; 14009 } // switch 14010 14011 return nullptr; 14012 } 14013