1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This contains code to emit Builtin calls as LLVM code. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "CGCXXABI.h" 15 #include "CGObjCRuntime.h" 16 #include "CGOpenCLRuntime.h" 17 #include "CodeGenFunction.h" 18 #include "CodeGenModule.h" 19 #include "TargetInfo.h" 20 #include "clang/AST/ASTContext.h" 21 #include "clang/AST/Decl.h" 22 #include "clang/Analysis/Analyses/OSLog.h" 23 #include "clang/Basic/TargetBuiltins.h" 24 #include "clang/Basic/TargetInfo.h" 25 #include "clang/CodeGen/CGFunctionInfo.h" 26 #include "llvm/ADT/StringExtras.h" 27 #include "llvm/IR/CallSite.h" 28 #include "llvm/IR/DataLayout.h" 29 #include "llvm/IR/InlineAsm.h" 30 #include "llvm/IR/Intrinsics.h" 31 #include "llvm/IR/MDBuilder.h" 32 #include <sstream> 33 34 using namespace clang; 35 using namespace CodeGen; 36 using namespace llvm; 37 38 static 39 int64_t clamp(int64_t Value, int64_t Low, int64_t High) { 40 return std::min(High, std::max(Low, Value)); 41 } 42 43 /// getBuiltinLibFunction - Given a builtin id for a function like 44 /// "__builtin_fabsf", return a Function* for "fabsf". 45 llvm::Constant *CodeGenModule::getBuiltinLibFunction(const FunctionDecl *FD, 46 unsigned BuiltinID) { 47 assert(Context.BuiltinInfo.isLibFunction(BuiltinID)); 48 49 // Get the name, skip over the __builtin_ prefix (if necessary). 50 StringRef Name; 51 GlobalDecl D(FD); 52 53 // If the builtin has been declared explicitly with an assembler label, 54 // use the mangled name. This differs from the plain label on platforms 55 // that prefix labels. 56 if (FD->hasAttr<AsmLabelAttr>()) 57 Name = getMangledName(D); 58 else 59 Name = Context.BuiltinInfo.getName(BuiltinID) + 10; 60 61 llvm::FunctionType *Ty = 62 cast<llvm::FunctionType>(getTypes().ConvertType(FD->getType())); 63 64 return GetOrCreateLLVMFunction(Name, Ty, D, /*ForVTable=*/false); 65 } 66 67 /// Emit the conversions required to turn the given value into an 68 /// integer of the given size. 69 static Value *EmitToInt(CodeGenFunction &CGF, llvm::Value *V, 70 QualType T, llvm::IntegerType *IntType) { 71 V = CGF.EmitToMemory(V, T); 72 73 if (V->getType()->isPointerTy()) 74 return CGF.Builder.CreatePtrToInt(V, IntType); 75 76 assert(V->getType() == IntType); 77 return V; 78 } 79 80 static Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V, 81 QualType T, llvm::Type *ResultType) { 82 V = CGF.EmitFromMemory(V, T); 83 84 if (ResultType->isPointerTy()) 85 return CGF.Builder.CreateIntToPtr(V, ResultType); 86 87 assert(V->getType() == ResultType); 88 return V; 89 } 90 91 /// Utility to insert an atomic instruction based on Instrinsic::ID 92 /// and the expression node. 93 static Value *MakeBinaryAtomicValue(CodeGenFunction &CGF, 94 llvm::AtomicRMWInst::BinOp Kind, 95 const CallExpr *E) { 96 QualType T = E->getType(); 97 assert(E->getArg(0)->getType()->isPointerType()); 98 assert(CGF.getContext().hasSameUnqualifiedType(T, 99 E->getArg(0)->getType()->getPointeeType())); 100 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 101 102 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 103 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 104 105 llvm::IntegerType *IntType = 106 llvm::IntegerType::get(CGF.getLLVMContext(), 107 CGF.getContext().getTypeSize(T)); 108 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 109 110 llvm::Value *Args[2]; 111 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 112 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 113 llvm::Type *ValueType = Args[1]->getType(); 114 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 115 116 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 117 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 118 return EmitFromInt(CGF, Result, T, ValueType); 119 } 120 121 static Value *EmitNontemporalStore(CodeGenFunction &CGF, const CallExpr *E) { 122 Value *Val = CGF.EmitScalarExpr(E->getArg(0)); 123 Value *Address = CGF.EmitScalarExpr(E->getArg(1)); 124 125 // Convert the type of the pointer to a pointer to the stored type. 126 Val = CGF.EmitToMemory(Val, E->getArg(0)->getType()); 127 Value *BC = CGF.Builder.CreateBitCast( 128 Address, llvm::PointerType::getUnqual(Val->getType()), "cast"); 129 LValue LV = CGF.MakeNaturalAlignAddrLValue(BC, E->getArg(0)->getType()); 130 LV.setNontemporal(true); 131 CGF.EmitStoreOfScalar(Val, LV, false); 132 return nullptr; 133 } 134 135 static Value *EmitNontemporalLoad(CodeGenFunction &CGF, const CallExpr *E) { 136 Value *Address = CGF.EmitScalarExpr(E->getArg(0)); 137 138 LValue LV = CGF.MakeNaturalAlignAddrLValue(Address, E->getType()); 139 LV.setNontemporal(true); 140 return CGF.EmitLoadOfScalar(LV, E->getExprLoc()); 141 } 142 143 static RValue EmitBinaryAtomic(CodeGenFunction &CGF, 144 llvm::AtomicRMWInst::BinOp Kind, 145 const CallExpr *E) { 146 return RValue::get(MakeBinaryAtomicValue(CGF, Kind, E)); 147 } 148 149 /// Utility to insert an atomic instruction based Instrinsic::ID and 150 /// the expression node, where the return value is the result of the 151 /// operation. 152 static RValue EmitBinaryAtomicPost(CodeGenFunction &CGF, 153 llvm::AtomicRMWInst::BinOp Kind, 154 const CallExpr *E, 155 Instruction::BinaryOps Op, 156 bool Invert = false) { 157 QualType T = E->getType(); 158 assert(E->getArg(0)->getType()->isPointerType()); 159 assert(CGF.getContext().hasSameUnqualifiedType(T, 160 E->getArg(0)->getType()->getPointeeType())); 161 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 162 163 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 164 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 165 166 llvm::IntegerType *IntType = 167 llvm::IntegerType::get(CGF.getLLVMContext(), 168 CGF.getContext().getTypeSize(T)); 169 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 170 171 llvm::Value *Args[2]; 172 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 173 llvm::Type *ValueType = Args[1]->getType(); 174 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 175 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 176 177 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 178 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 179 Result = CGF.Builder.CreateBinOp(Op, Result, Args[1]); 180 if (Invert) 181 Result = CGF.Builder.CreateBinOp(llvm::Instruction::Xor, Result, 182 llvm::ConstantInt::get(IntType, -1)); 183 Result = EmitFromInt(CGF, Result, T, ValueType); 184 return RValue::get(Result); 185 } 186 187 /// @brief Utility to insert an atomic cmpxchg instruction. 188 /// 189 /// @param CGF The current codegen function. 190 /// @param E Builtin call expression to convert to cmpxchg. 191 /// arg0 - address to operate on 192 /// arg1 - value to compare with 193 /// arg2 - new value 194 /// @param ReturnBool Specifies whether to return success flag of 195 /// cmpxchg result or the old value. 196 /// 197 /// @returns result of cmpxchg, according to ReturnBool 198 static Value *MakeAtomicCmpXchgValue(CodeGenFunction &CGF, const CallExpr *E, 199 bool ReturnBool) { 200 QualType T = ReturnBool ? E->getArg(1)->getType() : E->getType(); 201 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 202 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 203 204 llvm::IntegerType *IntType = llvm::IntegerType::get( 205 CGF.getLLVMContext(), CGF.getContext().getTypeSize(T)); 206 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 207 208 Value *Args[3]; 209 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 210 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 211 llvm::Type *ValueType = Args[1]->getType(); 212 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 213 Args[2] = EmitToInt(CGF, CGF.EmitScalarExpr(E->getArg(2)), T, IntType); 214 215 Value *Pair = CGF.Builder.CreateAtomicCmpXchg( 216 Args[0], Args[1], Args[2], llvm::AtomicOrdering::SequentiallyConsistent, 217 llvm::AtomicOrdering::SequentiallyConsistent); 218 if (ReturnBool) 219 // Extract boolean success flag and zext it to int. 220 return CGF.Builder.CreateZExt(CGF.Builder.CreateExtractValue(Pair, 1), 221 CGF.ConvertType(E->getType())); 222 else 223 // Extract old value and emit it using the same type as compare value. 224 return EmitFromInt(CGF, CGF.Builder.CreateExtractValue(Pair, 0), T, 225 ValueType); 226 } 227 228 // Emit a simple mangled intrinsic that has 1 argument and a return type 229 // matching the argument type. 230 static Value *emitUnaryBuiltin(CodeGenFunction &CGF, 231 const CallExpr *E, 232 unsigned IntrinsicID) { 233 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 234 235 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 236 return CGF.Builder.CreateCall(F, Src0); 237 } 238 239 // Emit an intrinsic that has 2 operands of the same type as its result. 240 static Value *emitBinaryBuiltin(CodeGenFunction &CGF, 241 const CallExpr *E, 242 unsigned IntrinsicID) { 243 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 244 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 245 246 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 247 return CGF.Builder.CreateCall(F, { Src0, Src1 }); 248 } 249 250 // Emit an intrinsic that has 3 operands of the same type as its result. 251 static Value *emitTernaryBuiltin(CodeGenFunction &CGF, 252 const CallExpr *E, 253 unsigned IntrinsicID) { 254 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 255 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 256 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); 257 258 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 259 return CGF.Builder.CreateCall(F, { Src0, Src1, Src2 }); 260 } 261 262 // Emit an intrinsic that has 1 float or double operand, and 1 integer. 263 static Value *emitFPIntBuiltin(CodeGenFunction &CGF, 264 const CallExpr *E, 265 unsigned IntrinsicID) { 266 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 267 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 268 269 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 270 return CGF.Builder.CreateCall(F, {Src0, Src1}); 271 } 272 273 /// EmitFAbs - Emit a call to @llvm.fabs(). 274 static Value *EmitFAbs(CodeGenFunction &CGF, Value *V) { 275 Value *F = CGF.CGM.getIntrinsic(Intrinsic::fabs, V->getType()); 276 llvm::CallInst *Call = CGF.Builder.CreateCall(F, V); 277 Call->setDoesNotAccessMemory(); 278 return Call; 279 } 280 281 /// Emit the computation of the sign bit for a floating point value. Returns 282 /// the i1 sign bit value. 283 static Value *EmitSignBit(CodeGenFunction &CGF, Value *V) { 284 LLVMContext &C = CGF.CGM.getLLVMContext(); 285 286 llvm::Type *Ty = V->getType(); 287 int Width = Ty->getPrimitiveSizeInBits(); 288 llvm::Type *IntTy = llvm::IntegerType::get(C, Width); 289 V = CGF.Builder.CreateBitCast(V, IntTy); 290 if (Ty->isPPC_FP128Ty()) { 291 // We want the sign bit of the higher-order double. The bitcast we just 292 // did works as if the double-double was stored to memory and then 293 // read as an i128. The "store" will put the higher-order double in the 294 // lower address in both little- and big-Endian modes, but the "load" 295 // will treat those bits as a different part of the i128: the low bits in 296 // little-Endian, the high bits in big-Endian. Therefore, on big-Endian 297 // we need to shift the high bits down to the low before truncating. 298 Width >>= 1; 299 if (CGF.getTarget().isBigEndian()) { 300 Value *ShiftCst = llvm::ConstantInt::get(IntTy, Width); 301 V = CGF.Builder.CreateLShr(V, ShiftCst); 302 } 303 // We are truncating value in order to extract the higher-order 304 // double, which we will be using to extract the sign from. 305 IntTy = llvm::IntegerType::get(C, Width); 306 V = CGF.Builder.CreateTrunc(V, IntTy); 307 } 308 Value *Zero = llvm::Constant::getNullValue(IntTy); 309 return CGF.Builder.CreateICmpSLT(V, Zero); 310 } 311 312 static RValue emitLibraryCall(CodeGenFunction &CGF, const FunctionDecl *FD, 313 const CallExpr *E, llvm::Constant *calleeValue) { 314 CGCallee callee = CGCallee::forDirect(calleeValue, FD); 315 return CGF.EmitCall(E->getCallee()->getType(), callee, E, ReturnValueSlot()); 316 } 317 318 /// \brief Emit a call to llvm.{sadd,uadd,ssub,usub,smul,umul}.with.overflow.* 319 /// depending on IntrinsicID. 320 /// 321 /// \arg CGF The current codegen function. 322 /// \arg IntrinsicID The ID for the Intrinsic we wish to generate. 323 /// \arg X The first argument to the llvm.*.with.overflow.*. 324 /// \arg Y The second argument to the llvm.*.with.overflow.*. 325 /// \arg Carry The carry returned by the llvm.*.with.overflow.*. 326 /// \returns The result (i.e. sum/product) returned by the intrinsic. 327 static llvm::Value *EmitOverflowIntrinsic(CodeGenFunction &CGF, 328 const llvm::Intrinsic::ID IntrinsicID, 329 llvm::Value *X, llvm::Value *Y, 330 llvm::Value *&Carry) { 331 // Make sure we have integers of the same width. 332 assert(X->getType() == Y->getType() && 333 "Arguments must be the same type. (Did you forget to make sure both " 334 "arguments have the same integer width?)"); 335 336 llvm::Value *Callee = CGF.CGM.getIntrinsic(IntrinsicID, X->getType()); 337 llvm::Value *Tmp = CGF.Builder.CreateCall(Callee, {X, Y}); 338 Carry = CGF.Builder.CreateExtractValue(Tmp, 1); 339 return CGF.Builder.CreateExtractValue(Tmp, 0); 340 } 341 342 static Value *emitRangedBuiltin(CodeGenFunction &CGF, 343 unsigned IntrinsicID, 344 int low, int high) { 345 llvm::MDBuilder MDHelper(CGF.getLLVMContext()); 346 llvm::MDNode *RNode = MDHelper.createRange(APInt(32, low), APInt(32, high)); 347 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, {}); 348 llvm::Instruction *Call = CGF.Builder.CreateCall(F); 349 Call->setMetadata(llvm::LLVMContext::MD_range, RNode); 350 return Call; 351 } 352 353 namespace { 354 struct WidthAndSignedness { 355 unsigned Width; 356 bool Signed; 357 }; 358 } 359 360 static WidthAndSignedness 361 getIntegerWidthAndSignedness(const clang::ASTContext &context, 362 const clang::QualType Type) { 363 assert(Type->isIntegerType() && "Given type is not an integer."); 364 unsigned Width = Type->isBooleanType() ? 1 : context.getTypeInfo(Type).Width; 365 bool Signed = Type->isSignedIntegerType(); 366 return {Width, Signed}; 367 } 368 369 // Given one or more integer types, this function produces an integer type that 370 // encompasses them: any value in one of the given types could be expressed in 371 // the encompassing type. 372 static struct WidthAndSignedness 373 EncompassingIntegerType(ArrayRef<struct WidthAndSignedness> Types) { 374 assert(Types.size() > 0 && "Empty list of types."); 375 376 // If any of the given types is signed, we must return a signed type. 377 bool Signed = false; 378 for (const auto &Type : Types) { 379 Signed |= Type.Signed; 380 } 381 382 // The encompassing type must have a width greater than or equal to the width 383 // of the specified types. Aditionally, if the encompassing type is signed, 384 // its width must be strictly greater than the width of any unsigned types 385 // given. 386 unsigned Width = 0; 387 for (const auto &Type : Types) { 388 unsigned MinWidth = Type.Width + (Signed && !Type.Signed); 389 if (Width < MinWidth) { 390 Width = MinWidth; 391 } 392 } 393 394 return {Width, Signed}; 395 } 396 397 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) { 398 llvm::Type *DestType = Int8PtrTy; 399 if (ArgValue->getType() != DestType) 400 ArgValue = 401 Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data()); 402 403 Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend; 404 return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue); 405 } 406 407 /// Checks if using the result of __builtin_object_size(p, @p From) in place of 408 /// __builtin_object_size(p, @p To) is correct 409 static bool areBOSTypesCompatible(int From, int To) { 410 // Note: Our __builtin_object_size implementation currently treats Type=0 and 411 // Type=2 identically. Encoding this implementation detail here may make 412 // improving __builtin_object_size difficult in the future, so it's omitted. 413 return From == To || (From == 0 && To == 1) || (From == 3 && To == 2); 414 } 415 416 static llvm::Value * 417 getDefaultBuiltinObjectSizeResult(unsigned Type, llvm::IntegerType *ResType) { 418 return ConstantInt::get(ResType, (Type & 2) ? 0 : -1, /*isSigned=*/true); 419 } 420 421 llvm::Value * 422 CodeGenFunction::evaluateOrEmitBuiltinObjectSize(const Expr *E, unsigned Type, 423 llvm::IntegerType *ResType, 424 llvm::Value *EmittedE) { 425 uint64_t ObjectSize; 426 if (!E->tryEvaluateObjectSize(ObjectSize, getContext(), Type)) 427 return emitBuiltinObjectSize(E, Type, ResType, EmittedE); 428 return ConstantInt::get(ResType, ObjectSize, /*isSigned=*/true); 429 } 430 431 /// Returns a Value corresponding to the size of the given expression. 432 /// This Value may be either of the following: 433 /// - A llvm::Argument (if E is a param with the pass_object_size attribute on 434 /// it) 435 /// - A call to the @llvm.objectsize intrinsic 436 /// 437 /// EmittedE is the result of emitting `E` as a scalar expr. If it's non-null 438 /// and we wouldn't otherwise try to reference a pass_object_size parameter, 439 /// we'll call @llvm.objectsize on EmittedE, rather than emitting E. 440 llvm::Value * 441 CodeGenFunction::emitBuiltinObjectSize(const Expr *E, unsigned Type, 442 llvm::IntegerType *ResType, 443 llvm::Value *EmittedE) { 444 // We need to reference an argument if the pointer is a parameter with the 445 // pass_object_size attribute. 446 if (auto *D = dyn_cast<DeclRefExpr>(E->IgnoreParenImpCasts())) { 447 auto *Param = dyn_cast<ParmVarDecl>(D->getDecl()); 448 auto *PS = D->getDecl()->getAttr<PassObjectSizeAttr>(); 449 if (Param != nullptr && PS != nullptr && 450 areBOSTypesCompatible(PS->getType(), Type)) { 451 auto Iter = SizeArguments.find(Param); 452 assert(Iter != SizeArguments.end()); 453 454 const ImplicitParamDecl *D = Iter->second; 455 auto DIter = LocalDeclMap.find(D); 456 assert(DIter != LocalDeclMap.end()); 457 458 return EmitLoadOfScalar(DIter->second, /*volatile=*/false, 459 getContext().getSizeType(), E->getLocStart()); 460 } 461 } 462 463 // LLVM can't handle Type=3 appropriately, and __builtin_object_size shouldn't 464 // evaluate E for side-effects. In either case, we shouldn't lower to 465 // @llvm.objectsize. 466 if (Type == 3 || (!EmittedE && E->HasSideEffects(getContext()))) 467 return getDefaultBuiltinObjectSizeResult(Type, ResType); 468 469 Value *Ptr = EmittedE ? EmittedE : EmitScalarExpr(E); 470 assert(Ptr->getType()->isPointerTy() && 471 "Non-pointer passed to __builtin_object_size?"); 472 473 // LLVM only supports 0 and 2, make sure that we pass along that as a boolean. 474 auto *CI = ConstantInt::get(Builder.getInt1Ty(), (Type & 2) >> 1); 475 Value *F = CGM.getIntrinsic(Intrinsic::objectsize, {ResType, Ptr->getType()}); 476 return Builder.CreateCall(F, {Ptr, CI}); 477 } 478 479 // Many of MSVC builtins are on both x64 and ARM; to avoid repeating code, we 480 // handle them here. 481 enum class CodeGenFunction::MSVCIntrin { 482 _BitScanForward, 483 _BitScanReverse, 484 _InterlockedAnd, 485 _InterlockedDecrement, 486 _InterlockedExchange, 487 _InterlockedExchangeAdd, 488 _InterlockedExchangeSub, 489 _InterlockedIncrement, 490 _InterlockedOr, 491 _InterlockedXor, 492 __fastfail, 493 }; 494 495 Value *CodeGenFunction::EmitMSVCBuiltinExpr(MSVCIntrin BuiltinID, 496 const CallExpr *E) { 497 switch (BuiltinID) { 498 case MSVCIntrin::_BitScanForward: 499 case MSVCIntrin::_BitScanReverse: { 500 Value *ArgValue = EmitScalarExpr(E->getArg(1)); 501 502 llvm::Type *ArgType = ArgValue->getType(); 503 llvm::Type *IndexType = 504 EmitScalarExpr(E->getArg(0))->getType()->getPointerElementType(); 505 llvm::Type *ResultType = ConvertType(E->getType()); 506 507 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 508 Value *ResZero = llvm::Constant::getNullValue(ResultType); 509 Value *ResOne = llvm::ConstantInt::get(ResultType, 1); 510 511 BasicBlock *Begin = Builder.GetInsertBlock(); 512 BasicBlock *End = createBasicBlock("bitscan_end", this->CurFn); 513 Builder.SetInsertPoint(End); 514 PHINode *Result = Builder.CreatePHI(ResultType, 2, "bitscan_result"); 515 516 Builder.SetInsertPoint(Begin); 517 Value *IsZero = Builder.CreateICmpEQ(ArgValue, ArgZero); 518 BasicBlock *NotZero = createBasicBlock("bitscan_not_zero", this->CurFn); 519 Builder.CreateCondBr(IsZero, End, NotZero); 520 Result->addIncoming(ResZero, Begin); 521 522 Builder.SetInsertPoint(NotZero); 523 Address IndexAddress = EmitPointerWithAlignment(E->getArg(0)); 524 525 if (BuiltinID == MSVCIntrin::_BitScanForward) { 526 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 527 Value *ZeroCount = Builder.CreateCall(F, {ArgValue, Builder.getTrue()}); 528 ZeroCount = Builder.CreateIntCast(ZeroCount, IndexType, false); 529 Builder.CreateStore(ZeroCount, IndexAddress, false); 530 } else { 531 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 532 Value *ArgTypeLastIndex = llvm::ConstantInt::get(IndexType, ArgWidth - 1); 533 534 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 535 Value *ZeroCount = Builder.CreateCall(F, {ArgValue, Builder.getTrue()}); 536 ZeroCount = Builder.CreateIntCast(ZeroCount, IndexType, false); 537 Value *Index = Builder.CreateNSWSub(ArgTypeLastIndex, ZeroCount); 538 Builder.CreateStore(Index, IndexAddress, false); 539 } 540 Builder.CreateBr(End); 541 Result->addIncoming(ResOne, NotZero); 542 543 Builder.SetInsertPoint(End); 544 return Result; 545 } 546 case MSVCIntrin::_InterlockedAnd: 547 return MakeBinaryAtomicValue(*this, AtomicRMWInst::And, E); 548 case MSVCIntrin::_InterlockedExchange: 549 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xchg, E); 550 case MSVCIntrin::_InterlockedExchangeAdd: 551 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Add, E); 552 case MSVCIntrin::_InterlockedExchangeSub: 553 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Sub, E); 554 case MSVCIntrin::_InterlockedOr: 555 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Or, E); 556 case MSVCIntrin::_InterlockedXor: 557 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xor, E); 558 559 case MSVCIntrin::_InterlockedDecrement: { 560 llvm::Type *IntTy = ConvertType(E->getType()); 561 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 562 AtomicRMWInst::Sub, 563 EmitScalarExpr(E->getArg(0)), 564 ConstantInt::get(IntTy, 1), 565 llvm::AtomicOrdering::SequentiallyConsistent); 566 return Builder.CreateSub(RMWI, ConstantInt::get(IntTy, 1)); 567 } 568 case MSVCIntrin::_InterlockedIncrement: { 569 llvm::Type *IntTy = ConvertType(E->getType()); 570 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 571 AtomicRMWInst::Add, 572 EmitScalarExpr(E->getArg(0)), 573 ConstantInt::get(IntTy, 1), 574 llvm::AtomicOrdering::SequentiallyConsistent); 575 return Builder.CreateAdd(RMWI, ConstantInt::get(IntTy, 1)); 576 } 577 578 case MSVCIntrin::__fastfail: { 579 // Request immediate process termination from the kernel. The instruction 580 // sequences to do this are documented on MSDN: 581 // https://msdn.microsoft.com/en-us/library/dn774154.aspx 582 llvm::Triple::ArchType ISA = getTarget().getTriple().getArch(); 583 StringRef Asm, Constraints; 584 switch (ISA) { 585 default: 586 ErrorUnsupported(E, "__fastfail call for this architecture"); 587 break; 588 case llvm::Triple::x86: 589 case llvm::Triple::x86_64: 590 Asm = "int $$0x29"; 591 Constraints = "{cx}"; 592 break; 593 case llvm::Triple::thumb: 594 Asm = "udf #251"; 595 Constraints = "{r0}"; 596 break; 597 } 598 llvm::FunctionType *FTy = llvm::FunctionType::get(VoidTy, {Int32Ty}, false); 599 llvm::InlineAsm *IA = 600 llvm::InlineAsm::get(FTy, Asm, Constraints, /*SideEffects=*/true); 601 llvm::AttributeSet NoReturnAttr = 602 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 603 llvm::Attribute::NoReturn); 604 CallSite CS = Builder.CreateCall(IA, EmitScalarExpr(E->getArg(0))); 605 CS.setAttributes(NoReturnAttr); 606 return CS.getInstruction(); 607 } 608 } 609 llvm_unreachable("Incorrect MSVC intrinsic!"); 610 } 611 612 namespace { 613 // ARC cleanup for __builtin_os_log_format 614 struct CallObjCArcUse final : EHScopeStack::Cleanup { 615 CallObjCArcUse(llvm::Value *object) : object(object) {} 616 llvm::Value *object; 617 618 void Emit(CodeGenFunction &CGF, Flags flags) override { 619 CGF.EmitARCIntrinsicUse(object); 620 } 621 }; 622 } 623 624 RValue CodeGenFunction::EmitBuiltinExpr(const FunctionDecl *FD, 625 unsigned BuiltinID, const CallExpr *E, 626 ReturnValueSlot ReturnValue) { 627 // See if we can constant fold this builtin. If so, don't emit it at all. 628 Expr::EvalResult Result; 629 if (E->EvaluateAsRValue(Result, CGM.getContext()) && 630 !Result.hasSideEffects()) { 631 if (Result.Val.isInt()) 632 return RValue::get(llvm::ConstantInt::get(getLLVMContext(), 633 Result.Val.getInt())); 634 if (Result.Val.isFloat()) 635 return RValue::get(llvm::ConstantFP::get(getLLVMContext(), 636 Result.Val.getFloat())); 637 } 638 639 switch (BuiltinID) { 640 default: break; // Handle intrinsics and libm functions below. 641 case Builtin::BI__builtin___CFStringMakeConstantString: 642 case Builtin::BI__builtin___NSStringMakeConstantString: 643 return RValue::get(CGM.EmitConstantExpr(E, E->getType(), nullptr)); 644 case Builtin::BI__builtin_stdarg_start: 645 case Builtin::BI__builtin_va_start: 646 case Builtin::BI__va_start: 647 case Builtin::BI__builtin_va_end: 648 return RValue::get( 649 EmitVAStartEnd(BuiltinID == Builtin::BI__va_start 650 ? EmitScalarExpr(E->getArg(0)) 651 : EmitVAListRef(E->getArg(0)).getPointer(), 652 BuiltinID != Builtin::BI__builtin_va_end)); 653 case Builtin::BI__builtin_va_copy: { 654 Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer(); 655 Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer(); 656 657 llvm::Type *Type = Int8PtrTy; 658 659 DstPtr = Builder.CreateBitCast(DstPtr, Type); 660 SrcPtr = Builder.CreateBitCast(SrcPtr, Type); 661 return RValue::get(Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), 662 {DstPtr, SrcPtr})); 663 } 664 case Builtin::BI__builtin_abs: 665 case Builtin::BI__builtin_labs: 666 case Builtin::BI__builtin_llabs: { 667 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 668 669 Value *NegOp = Builder.CreateNeg(ArgValue, "neg"); 670 Value *CmpResult = 671 Builder.CreateICmpSGE(ArgValue, 672 llvm::Constant::getNullValue(ArgValue->getType()), 673 "abscond"); 674 Value *Result = 675 Builder.CreateSelect(CmpResult, ArgValue, NegOp, "abs"); 676 677 return RValue::get(Result); 678 } 679 case Builtin::BI__builtin_fabs: 680 case Builtin::BI__builtin_fabsf: 681 case Builtin::BI__builtin_fabsl: { 682 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::fabs)); 683 } 684 case Builtin::BI__builtin_fmod: 685 case Builtin::BI__builtin_fmodf: 686 case Builtin::BI__builtin_fmodl: { 687 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 688 Value *Arg2 = EmitScalarExpr(E->getArg(1)); 689 Value *Result = Builder.CreateFRem(Arg1, Arg2, "fmod"); 690 return RValue::get(Result); 691 } 692 case Builtin::BI__builtin_copysign: 693 case Builtin::BI__builtin_copysignf: 694 case Builtin::BI__builtin_copysignl: { 695 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::copysign)); 696 } 697 case Builtin::BI__builtin_ceil: 698 case Builtin::BI__builtin_ceilf: 699 case Builtin::BI__builtin_ceill: { 700 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::ceil)); 701 } 702 case Builtin::BI__builtin_floor: 703 case Builtin::BI__builtin_floorf: 704 case Builtin::BI__builtin_floorl: { 705 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::floor)); 706 } 707 case Builtin::BI__builtin_trunc: 708 case Builtin::BI__builtin_truncf: 709 case Builtin::BI__builtin_truncl: { 710 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::trunc)); 711 } 712 case Builtin::BI__builtin_rint: 713 case Builtin::BI__builtin_rintf: 714 case Builtin::BI__builtin_rintl: { 715 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::rint)); 716 } 717 case Builtin::BI__builtin_nearbyint: 718 case Builtin::BI__builtin_nearbyintf: 719 case Builtin::BI__builtin_nearbyintl: { 720 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::nearbyint)); 721 } 722 case Builtin::BI__builtin_round: 723 case Builtin::BI__builtin_roundf: 724 case Builtin::BI__builtin_roundl: { 725 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::round)); 726 } 727 case Builtin::BI__builtin_fmin: 728 case Builtin::BI__builtin_fminf: 729 case Builtin::BI__builtin_fminl: { 730 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::minnum)); 731 } 732 case Builtin::BI__builtin_fmax: 733 case Builtin::BI__builtin_fmaxf: 734 case Builtin::BI__builtin_fmaxl: { 735 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::maxnum)); 736 } 737 case Builtin::BI__builtin_conj: 738 case Builtin::BI__builtin_conjf: 739 case Builtin::BI__builtin_conjl: { 740 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 741 Value *Real = ComplexVal.first; 742 Value *Imag = ComplexVal.second; 743 Value *Zero = 744 Imag->getType()->isFPOrFPVectorTy() 745 ? llvm::ConstantFP::getZeroValueForNegation(Imag->getType()) 746 : llvm::Constant::getNullValue(Imag->getType()); 747 748 Imag = Builder.CreateFSub(Zero, Imag, "sub"); 749 return RValue::getComplex(std::make_pair(Real, Imag)); 750 } 751 case Builtin::BI__builtin_creal: 752 case Builtin::BI__builtin_crealf: 753 case Builtin::BI__builtin_creall: 754 case Builtin::BIcreal: 755 case Builtin::BIcrealf: 756 case Builtin::BIcreall: { 757 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 758 return RValue::get(ComplexVal.first); 759 } 760 761 case Builtin::BI__builtin_cimag: 762 case Builtin::BI__builtin_cimagf: 763 case Builtin::BI__builtin_cimagl: 764 case Builtin::BIcimag: 765 case Builtin::BIcimagf: 766 case Builtin::BIcimagl: { 767 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 768 return RValue::get(ComplexVal.second); 769 } 770 771 case Builtin::BI__builtin_ctzs: 772 case Builtin::BI__builtin_ctz: 773 case Builtin::BI__builtin_ctzl: 774 case Builtin::BI__builtin_ctzll: { 775 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 776 777 llvm::Type *ArgType = ArgValue->getType(); 778 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 779 780 llvm::Type *ResultType = ConvertType(E->getType()); 781 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 782 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 783 if (Result->getType() != ResultType) 784 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 785 "cast"); 786 return RValue::get(Result); 787 } 788 case Builtin::BI__builtin_clzs: 789 case Builtin::BI__builtin_clz: 790 case Builtin::BI__builtin_clzl: 791 case Builtin::BI__builtin_clzll: { 792 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 793 794 llvm::Type *ArgType = ArgValue->getType(); 795 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 796 797 llvm::Type *ResultType = ConvertType(E->getType()); 798 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 799 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 800 if (Result->getType() != ResultType) 801 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 802 "cast"); 803 return RValue::get(Result); 804 } 805 case Builtin::BI__builtin_ffs: 806 case Builtin::BI__builtin_ffsl: 807 case Builtin::BI__builtin_ffsll: { 808 // ffs(x) -> x ? cttz(x) + 1 : 0 809 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 810 811 llvm::Type *ArgType = ArgValue->getType(); 812 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 813 814 llvm::Type *ResultType = ConvertType(E->getType()); 815 Value *Tmp = 816 Builder.CreateAdd(Builder.CreateCall(F, {ArgValue, Builder.getTrue()}), 817 llvm::ConstantInt::get(ArgType, 1)); 818 Value *Zero = llvm::Constant::getNullValue(ArgType); 819 Value *IsZero = Builder.CreateICmpEQ(ArgValue, Zero, "iszero"); 820 Value *Result = Builder.CreateSelect(IsZero, Zero, Tmp, "ffs"); 821 if (Result->getType() != ResultType) 822 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 823 "cast"); 824 return RValue::get(Result); 825 } 826 case Builtin::BI__builtin_parity: 827 case Builtin::BI__builtin_parityl: 828 case Builtin::BI__builtin_parityll: { 829 // parity(x) -> ctpop(x) & 1 830 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 831 832 llvm::Type *ArgType = ArgValue->getType(); 833 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 834 835 llvm::Type *ResultType = ConvertType(E->getType()); 836 Value *Tmp = Builder.CreateCall(F, ArgValue); 837 Value *Result = Builder.CreateAnd(Tmp, llvm::ConstantInt::get(ArgType, 1)); 838 if (Result->getType() != ResultType) 839 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 840 "cast"); 841 return RValue::get(Result); 842 } 843 case Builtin::BI__popcnt16: 844 case Builtin::BI__popcnt: 845 case Builtin::BI__popcnt64: 846 case Builtin::BI__builtin_popcount: 847 case Builtin::BI__builtin_popcountl: 848 case Builtin::BI__builtin_popcountll: { 849 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 850 851 llvm::Type *ArgType = ArgValue->getType(); 852 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 853 854 llvm::Type *ResultType = ConvertType(E->getType()); 855 Value *Result = Builder.CreateCall(F, ArgValue); 856 if (Result->getType() != ResultType) 857 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 858 "cast"); 859 return RValue::get(Result); 860 } 861 case Builtin::BI_rotr8: 862 case Builtin::BI_rotr16: 863 case Builtin::BI_rotr: 864 case Builtin::BI_lrotr: 865 case Builtin::BI_rotr64: { 866 Value *Val = EmitScalarExpr(E->getArg(0)); 867 Value *Shift = EmitScalarExpr(E->getArg(1)); 868 869 llvm::Type *ArgType = Val->getType(); 870 Shift = Builder.CreateIntCast(Shift, ArgType, false); 871 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 872 Value *ArgTypeSize = llvm::ConstantInt::get(ArgType, ArgWidth); 873 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 874 875 Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1); 876 Shift = Builder.CreateAnd(Shift, Mask); 877 Value *LeftShift = Builder.CreateSub(ArgTypeSize, Shift); 878 879 Value *RightShifted = Builder.CreateLShr(Val, Shift); 880 Value *LeftShifted = Builder.CreateShl(Val, LeftShift); 881 Value *Rotated = Builder.CreateOr(LeftShifted, RightShifted); 882 883 Value *ShiftIsZero = Builder.CreateICmpEQ(Shift, ArgZero); 884 Value *Result = Builder.CreateSelect(ShiftIsZero, Val, Rotated); 885 return RValue::get(Result); 886 } 887 case Builtin::BI_rotl8: 888 case Builtin::BI_rotl16: 889 case Builtin::BI_rotl: 890 case Builtin::BI_lrotl: 891 case Builtin::BI_rotl64: { 892 Value *Val = EmitScalarExpr(E->getArg(0)); 893 Value *Shift = EmitScalarExpr(E->getArg(1)); 894 895 llvm::Type *ArgType = Val->getType(); 896 Shift = Builder.CreateIntCast(Shift, ArgType, false); 897 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 898 Value *ArgTypeSize = llvm::ConstantInt::get(ArgType, ArgWidth); 899 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 900 901 Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1); 902 Shift = Builder.CreateAnd(Shift, Mask); 903 Value *RightShift = Builder.CreateSub(ArgTypeSize, Shift); 904 905 Value *LeftShifted = Builder.CreateShl(Val, Shift); 906 Value *RightShifted = Builder.CreateLShr(Val, RightShift); 907 Value *Rotated = Builder.CreateOr(LeftShifted, RightShifted); 908 909 Value *ShiftIsZero = Builder.CreateICmpEQ(Shift, ArgZero); 910 Value *Result = Builder.CreateSelect(ShiftIsZero, Val, Rotated); 911 return RValue::get(Result); 912 } 913 case Builtin::BI__builtin_unpredictable: { 914 // Always return the argument of __builtin_unpredictable. LLVM does not 915 // handle this builtin. Metadata for this builtin should be added directly 916 // to instructions such as branches or switches that use it. 917 return RValue::get(EmitScalarExpr(E->getArg(0))); 918 } 919 case Builtin::BI__builtin_expect: { 920 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 921 llvm::Type *ArgType = ArgValue->getType(); 922 923 Value *ExpectedValue = EmitScalarExpr(E->getArg(1)); 924 // Don't generate llvm.expect on -O0 as the backend won't use it for 925 // anything. 926 // Note, we still IRGen ExpectedValue because it could have side-effects. 927 if (CGM.getCodeGenOpts().OptimizationLevel == 0) 928 return RValue::get(ArgValue); 929 930 Value *FnExpect = CGM.getIntrinsic(Intrinsic::expect, ArgType); 931 Value *Result = 932 Builder.CreateCall(FnExpect, {ArgValue, ExpectedValue}, "expval"); 933 return RValue::get(Result); 934 } 935 case Builtin::BI__builtin_assume_aligned: { 936 Value *PtrValue = EmitScalarExpr(E->getArg(0)); 937 Value *OffsetValue = 938 (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : nullptr; 939 940 Value *AlignmentValue = EmitScalarExpr(E->getArg(1)); 941 ConstantInt *AlignmentCI = cast<ConstantInt>(AlignmentValue); 942 unsigned Alignment = (unsigned) AlignmentCI->getZExtValue(); 943 944 EmitAlignmentAssumption(PtrValue, Alignment, OffsetValue); 945 return RValue::get(PtrValue); 946 } 947 case Builtin::BI__assume: 948 case Builtin::BI__builtin_assume: { 949 if (E->getArg(0)->HasSideEffects(getContext())) 950 return RValue::get(nullptr); 951 952 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 953 Value *FnAssume = CGM.getIntrinsic(Intrinsic::assume); 954 return RValue::get(Builder.CreateCall(FnAssume, ArgValue)); 955 } 956 case Builtin::BI__builtin_bswap16: 957 case Builtin::BI__builtin_bswap32: 958 case Builtin::BI__builtin_bswap64: { 959 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bswap)); 960 } 961 case Builtin::BI__builtin_bitreverse8: 962 case Builtin::BI__builtin_bitreverse16: 963 case Builtin::BI__builtin_bitreverse32: 964 case Builtin::BI__builtin_bitreverse64: { 965 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bitreverse)); 966 } 967 case Builtin::BI__builtin_object_size: { 968 unsigned Type = 969 E->getArg(1)->EvaluateKnownConstInt(getContext()).getZExtValue(); 970 auto *ResType = cast<llvm::IntegerType>(ConvertType(E->getType())); 971 972 // We pass this builtin onto the optimizer so that it can figure out the 973 // object size in more complex cases. 974 return RValue::get(emitBuiltinObjectSize(E->getArg(0), Type, ResType, 975 /*EmittedE=*/nullptr)); 976 } 977 case Builtin::BI__builtin_prefetch: { 978 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); 979 // FIXME: Technically these constants should of type 'int', yes? 980 RW = (E->getNumArgs() > 1) ? EmitScalarExpr(E->getArg(1)) : 981 llvm::ConstantInt::get(Int32Ty, 0); 982 Locality = (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : 983 llvm::ConstantInt::get(Int32Ty, 3); 984 Value *Data = llvm::ConstantInt::get(Int32Ty, 1); 985 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 986 return RValue::get(Builder.CreateCall(F, {Address, RW, Locality, Data})); 987 } 988 case Builtin::BI__builtin_readcyclecounter: { 989 Value *F = CGM.getIntrinsic(Intrinsic::readcyclecounter); 990 return RValue::get(Builder.CreateCall(F)); 991 } 992 case Builtin::BI__builtin___clear_cache: { 993 Value *Begin = EmitScalarExpr(E->getArg(0)); 994 Value *End = EmitScalarExpr(E->getArg(1)); 995 Value *F = CGM.getIntrinsic(Intrinsic::clear_cache); 996 return RValue::get(Builder.CreateCall(F, {Begin, End})); 997 } 998 case Builtin::BI__builtin_trap: 999 return RValue::get(EmitTrapCall(Intrinsic::trap)); 1000 case Builtin::BI__debugbreak: 1001 return RValue::get(EmitTrapCall(Intrinsic::debugtrap)); 1002 case Builtin::BI__builtin_unreachable: { 1003 if (SanOpts.has(SanitizerKind::Unreachable)) { 1004 SanitizerScope SanScope(this); 1005 EmitCheck(std::make_pair(static_cast<llvm::Value *>(Builder.getFalse()), 1006 SanitizerKind::Unreachable), 1007 SanitizerHandler::BuiltinUnreachable, 1008 EmitCheckSourceLocation(E->getExprLoc()), None); 1009 } else 1010 Builder.CreateUnreachable(); 1011 1012 // We do need to preserve an insertion point. 1013 EmitBlock(createBasicBlock("unreachable.cont")); 1014 1015 return RValue::get(nullptr); 1016 } 1017 1018 case Builtin::BI__builtin_powi: 1019 case Builtin::BI__builtin_powif: 1020 case Builtin::BI__builtin_powil: { 1021 Value *Base = EmitScalarExpr(E->getArg(0)); 1022 Value *Exponent = EmitScalarExpr(E->getArg(1)); 1023 llvm::Type *ArgType = Base->getType(); 1024 Value *F = CGM.getIntrinsic(Intrinsic::powi, ArgType); 1025 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 1026 } 1027 1028 case Builtin::BI__builtin_isgreater: 1029 case Builtin::BI__builtin_isgreaterequal: 1030 case Builtin::BI__builtin_isless: 1031 case Builtin::BI__builtin_islessequal: 1032 case Builtin::BI__builtin_islessgreater: 1033 case Builtin::BI__builtin_isunordered: { 1034 // Ordered comparisons: we know the arguments to these are matching scalar 1035 // floating point values. 1036 Value *LHS = EmitScalarExpr(E->getArg(0)); 1037 Value *RHS = EmitScalarExpr(E->getArg(1)); 1038 1039 switch (BuiltinID) { 1040 default: llvm_unreachable("Unknown ordered comparison"); 1041 case Builtin::BI__builtin_isgreater: 1042 LHS = Builder.CreateFCmpOGT(LHS, RHS, "cmp"); 1043 break; 1044 case Builtin::BI__builtin_isgreaterequal: 1045 LHS = Builder.CreateFCmpOGE(LHS, RHS, "cmp"); 1046 break; 1047 case Builtin::BI__builtin_isless: 1048 LHS = Builder.CreateFCmpOLT(LHS, RHS, "cmp"); 1049 break; 1050 case Builtin::BI__builtin_islessequal: 1051 LHS = Builder.CreateFCmpOLE(LHS, RHS, "cmp"); 1052 break; 1053 case Builtin::BI__builtin_islessgreater: 1054 LHS = Builder.CreateFCmpONE(LHS, RHS, "cmp"); 1055 break; 1056 case Builtin::BI__builtin_isunordered: 1057 LHS = Builder.CreateFCmpUNO(LHS, RHS, "cmp"); 1058 break; 1059 } 1060 // ZExt bool to int type. 1061 return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType()))); 1062 } 1063 case Builtin::BI__builtin_isnan: { 1064 Value *V = EmitScalarExpr(E->getArg(0)); 1065 V = Builder.CreateFCmpUNO(V, V, "cmp"); 1066 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 1067 } 1068 1069 case Builtin::BIfinite: 1070 case Builtin::BI__finite: 1071 case Builtin::BIfinitef: 1072 case Builtin::BI__finitef: 1073 case Builtin::BIfinitel: 1074 case Builtin::BI__finitel: 1075 case Builtin::BI__builtin_isinf: 1076 case Builtin::BI__builtin_isfinite: { 1077 // isinf(x) --> fabs(x) == infinity 1078 // isfinite(x) --> fabs(x) != infinity 1079 // x != NaN via the ordered compare in either case. 1080 Value *V = EmitScalarExpr(E->getArg(0)); 1081 Value *Fabs = EmitFAbs(*this, V); 1082 Constant *Infinity = ConstantFP::getInfinity(V->getType()); 1083 CmpInst::Predicate Pred = (BuiltinID == Builtin::BI__builtin_isinf) 1084 ? CmpInst::FCMP_OEQ 1085 : CmpInst::FCMP_ONE; 1086 Value *FCmp = Builder.CreateFCmp(Pred, Fabs, Infinity, "cmpinf"); 1087 return RValue::get(Builder.CreateZExt(FCmp, ConvertType(E->getType()))); 1088 } 1089 1090 case Builtin::BI__builtin_isinf_sign: { 1091 // isinf_sign(x) -> fabs(x) == infinity ? (signbit(x) ? -1 : 1) : 0 1092 Value *Arg = EmitScalarExpr(E->getArg(0)); 1093 Value *AbsArg = EmitFAbs(*this, Arg); 1094 Value *IsInf = Builder.CreateFCmpOEQ( 1095 AbsArg, ConstantFP::getInfinity(Arg->getType()), "isinf"); 1096 Value *IsNeg = EmitSignBit(*this, Arg); 1097 1098 llvm::Type *IntTy = ConvertType(E->getType()); 1099 Value *Zero = Constant::getNullValue(IntTy); 1100 Value *One = ConstantInt::get(IntTy, 1); 1101 Value *NegativeOne = ConstantInt::get(IntTy, -1); 1102 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); 1103 Value *Result = Builder.CreateSelect(IsInf, SignResult, Zero); 1104 return RValue::get(Result); 1105 } 1106 1107 case Builtin::BI__builtin_isnormal: { 1108 // isnormal(x) --> x == x && fabsf(x) < infinity && fabsf(x) >= float_min 1109 Value *V = EmitScalarExpr(E->getArg(0)); 1110 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 1111 1112 Value *Abs = EmitFAbs(*this, V); 1113 Value *IsLessThanInf = 1114 Builder.CreateFCmpULT(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 1115 APFloat Smallest = APFloat::getSmallestNormalized( 1116 getContext().getFloatTypeSemantics(E->getArg(0)->getType())); 1117 Value *IsNormal = 1118 Builder.CreateFCmpUGE(Abs, ConstantFP::get(V->getContext(), Smallest), 1119 "isnormal"); 1120 V = Builder.CreateAnd(Eq, IsLessThanInf, "and"); 1121 V = Builder.CreateAnd(V, IsNormal, "and"); 1122 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 1123 } 1124 1125 case Builtin::BI__builtin_fpclassify: { 1126 Value *V = EmitScalarExpr(E->getArg(5)); 1127 llvm::Type *Ty = ConvertType(E->getArg(5)->getType()); 1128 1129 // Create Result 1130 BasicBlock *Begin = Builder.GetInsertBlock(); 1131 BasicBlock *End = createBasicBlock("fpclassify_end", this->CurFn); 1132 Builder.SetInsertPoint(End); 1133 PHINode *Result = 1134 Builder.CreatePHI(ConvertType(E->getArg(0)->getType()), 4, 1135 "fpclassify_result"); 1136 1137 // if (V==0) return FP_ZERO 1138 Builder.SetInsertPoint(Begin); 1139 Value *IsZero = Builder.CreateFCmpOEQ(V, Constant::getNullValue(Ty), 1140 "iszero"); 1141 Value *ZeroLiteral = EmitScalarExpr(E->getArg(4)); 1142 BasicBlock *NotZero = createBasicBlock("fpclassify_not_zero", this->CurFn); 1143 Builder.CreateCondBr(IsZero, End, NotZero); 1144 Result->addIncoming(ZeroLiteral, Begin); 1145 1146 // if (V != V) return FP_NAN 1147 Builder.SetInsertPoint(NotZero); 1148 Value *IsNan = Builder.CreateFCmpUNO(V, V, "cmp"); 1149 Value *NanLiteral = EmitScalarExpr(E->getArg(0)); 1150 BasicBlock *NotNan = createBasicBlock("fpclassify_not_nan", this->CurFn); 1151 Builder.CreateCondBr(IsNan, End, NotNan); 1152 Result->addIncoming(NanLiteral, NotZero); 1153 1154 // if (fabs(V) == infinity) return FP_INFINITY 1155 Builder.SetInsertPoint(NotNan); 1156 Value *VAbs = EmitFAbs(*this, V); 1157 Value *IsInf = 1158 Builder.CreateFCmpOEQ(VAbs, ConstantFP::getInfinity(V->getType()), 1159 "isinf"); 1160 Value *InfLiteral = EmitScalarExpr(E->getArg(1)); 1161 BasicBlock *NotInf = createBasicBlock("fpclassify_not_inf", this->CurFn); 1162 Builder.CreateCondBr(IsInf, End, NotInf); 1163 Result->addIncoming(InfLiteral, NotNan); 1164 1165 // if (fabs(V) >= MIN_NORMAL) return FP_NORMAL else FP_SUBNORMAL 1166 Builder.SetInsertPoint(NotInf); 1167 APFloat Smallest = APFloat::getSmallestNormalized( 1168 getContext().getFloatTypeSemantics(E->getArg(5)->getType())); 1169 Value *IsNormal = 1170 Builder.CreateFCmpUGE(VAbs, ConstantFP::get(V->getContext(), Smallest), 1171 "isnormal"); 1172 Value *NormalResult = 1173 Builder.CreateSelect(IsNormal, EmitScalarExpr(E->getArg(2)), 1174 EmitScalarExpr(E->getArg(3))); 1175 Builder.CreateBr(End); 1176 Result->addIncoming(NormalResult, NotInf); 1177 1178 // return Result 1179 Builder.SetInsertPoint(End); 1180 return RValue::get(Result); 1181 } 1182 1183 case Builtin::BIalloca: 1184 case Builtin::BI_alloca: 1185 case Builtin::BI__builtin_alloca: { 1186 Value *Size = EmitScalarExpr(E->getArg(0)); 1187 const TargetInfo &TI = getContext().getTargetInfo(); 1188 // The alignment of the alloca should correspond to __BIGGEST_ALIGNMENT__. 1189 unsigned SuitableAlignmentInBytes = 1190 CGM.getContext() 1191 .toCharUnitsFromBits(TI.getSuitableAlign()) 1192 .getQuantity(); 1193 AllocaInst *AI = Builder.CreateAlloca(Builder.getInt8Ty(), Size); 1194 AI->setAlignment(SuitableAlignmentInBytes); 1195 return RValue::get(AI); 1196 } 1197 1198 case Builtin::BI__builtin_alloca_with_align: { 1199 Value *Size = EmitScalarExpr(E->getArg(0)); 1200 Value *AlignmentInBitsValue = EmitScalarExpr(E->getArg(1)); 1201 auto *AlignmentInBitsCI = cast<ConstantInt>(AlignmentInBitsValue); 1202 unsigned AlignmentInBits = AlignmentInBitsCI->getZExtValue(); 1203 unsigned AlignmentInBytes = 1204 CGM.getContext().toCharUnitsFromBits(AlignmentInBits).getQuantity(); 1205 AllocaInst *AI = Builder.CreateAlloca(Builder.getInt8Ty(), Size); 1206 AI->setAlignment(AlignmentInBytes); 1207 return RValue::get(AI); 1208 } 1209 1210 case Builtin::BIbzero: 1211 case Builtin::BI__builtin_bzero: { 1212 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1213 Value *SizeVal = EmitScalarExpr(E->getArg(1)); 1214 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1215 E->getArg(0)->getExprLoc(), FD, 0); 1216 Builder.CreateMemSet(Dest, Builder.getInt8(0), SizeVal, false); 1217 return RValue::get(Dest.getPointer()); 1218 } 1219 case Builtin::BImemcpy: 1220 case Builtin::BI__builtin_memcpy: { 1221 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1222 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1223 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1224 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1225 E->getArg(0)->getExprLoc(), FD, 0); 1226 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 1227 E->getArg(1)->getExprLoc(), FD, 1); 1228 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 1229 return RValue::get(Dest.getPointer()); 1230 } 1231 1232 case Builtin::BI__builtin_char_memchr: 1233 BuiltinID = Builtin::BI__builtin_memchr; 1234 break; 1235 1236 case Builtin::BI__builtin___memcpy_chk: { 1237 // fold __builtin_memcpy_chk(x, y, cst1, cst2) to memcpy iff cst1<=cst2. 1238 llvm::APSInt Size, DstSize; 1239 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1240 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1241 break; 1242 if (Size.ugt(DstSize)) 1243 break; 1244 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1245 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1246 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1247 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 1248 return RValue::get(Dest.getPointer()); 1249 } 1250 1251 case Builtin::BI__builtin_objc_memmove_collectable: { 1252 Address DestAddr = EmitPointerWithAlignment(E->getArg(0)); 1253 Address SrcAddr = EmitPointerWithAlignment(E->getArg(1)); 1254 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1255 CGM.getObjCRuntime().EmitGCMemmoveCollectable(*this, 1256 DestAddr, SrcAddr, SizeVal); 1257 return RValue::get(DestAddr.getPointer()); 1258 } 1259 1260 case Builtin::BI__builtin___memmove_chk: { 1261 // fold __builtin_memmove_chk(x, y, cst1, cst2) to memmove iff cst1<=cst2. 1262 llvm::APSInt Size, DstSize; 1263 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1264 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1265 break; 1266 if (Size.ugt(DstSize)) 1267 break; 1268 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1269 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1270 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1271 Builder.CreateMemMove(Dest, Src, SizeVal, false); 1272 return RValue::get(Dest.getPointer()); 1273 } 1274 1275 case Builtin::BImemmove: 1276 case Builtin::BI__builtin_memmove: { 1277 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1278 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1279 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1280 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1281 E->getArg(0)->getExprLoc(), FD, 0); 1282 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 1283 E->getArg(1)->getExprLoc(), FD, 1); 1284 Builder.CreateMemMove(Dest, Src, SizeVal, false); 1285 return RValue::get(Dest.getPointer()); 1286 } 1287 case Builtin::BImemset: 1288 case Builtin::BI__builtin_memset: { 1289 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1290 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 1291 Builder.getInt8Ty()); 1292 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1293 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1294 E->getArg(0)->getExprLoc(), FD, 0); 1295 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 1296 return RValue::get(Dest.getPointer()); 1297 } 1298 case Builtin::BI__builtin___memset_chk: { 1299 // fold __builtin_memset_chk(x, y, cst1, cst2) to memset iff cst1<=cst2. 1300 llvm::APSInt Size, DstSize; 1301 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1302 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1303 break; 1304 if (Size.ugt(DstSize)) 1305 break; 1306 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1307 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 1308 Builder.getInt8Ty()); 1309 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1310 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 1311 return RValue::get(Dest.getPointer()); 1312 } 1313 case Builtin::BI__builtin_dwarf_cfa: { 1314 // The offset in bytes from the first argument to the CFA. 1315 // 1316 // Why on earth is this in the frontend? Is there any reason at 1317 // all that the backend can't reasonably determine this while 1318 // lowering llvm.eh.dwarf.cfa()? 1319 // 1320 // TODO: If there's a satisfactory reason, add a target hook for 1321 // this instead of hard-coding 0, which is correct for most targets. 1322 int32_t Offset = 0; 1323 1324 Value *F = CGM.getIntrinsic(Intrinsic::eh_dwarf_cfa); 1325 return RValue::get(Builder.CreateCall(F, 1326 llvm::ConstantInt::get(Int32Ty, Offset))); 1327 } 1328 case Builtin::BI__builtin_return_address: { 1329 Value *Depth = 1330 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 1331 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 1332 return RValue::get(Builder.CreateCall(F, Depth)); 1333 } 1334 case Builtin::BI_ReturnAddress: { 1335 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 1336 return RValue::get(Builder.CreateCall(F, Builder.getInt32(0))); 1337 } 1338 case Builtin::BI__builtin_frame_address: { 1339 Value *Depth = 1340 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 1341 Value *F = CGM.getIntrinsic(Intrinsic::frameaddress); 1342 return RValue::get(Builder.CreateCall(F, Depth)); 1343 } 1344 case Builtin::BI__builtin_extract_return_addr: { 1345 Value *Address = EmitScalarExpr(E->getArg(0)); 1346 Value *Result = getTargetHooks().decodeReturnAddress(*this, Address); 1347 return RValue::get(Result); 1348 } 1349 case Builtin::BI__builtin_frob_return_addr: { 1350 Value *Address = EmitScalarExpr(E->getArg(0)); 1351 Value *Result = getTargetHooks().encodeReturnAddress(*this, Address); 1352 return RValue::get(Result); 1353 } 1354 case Builtin::BI__builtin_dwarf_sp_column: { 1355 llvm::IntegerType *Ty 1356 = cast<llvm::IntegerType>(ConvertType(E->getType())); 1357 int Column = getTargetHooks().getDwarfEHStackPointer(CGM); 1358 if (Column == -1) { 1359 CGM.ErrorUnsupported(E, "__builtin_dwarf_sp_column"); 1360 return RValue::get(llvm::UndefValue::get(Ty)); 1361 } 1362 return RValue::get(llvm::ConstantInt::get(Ty, Column, true)); 1363 } 1364 case Builtin::BI__builtin_init_dwarf_reg_size_table: { 1365 Value *Address = EmitScalarExpr(E->getArg(0)); 1366 if (getTargetHooks().initDwarfEHRegSizeTable(*this, Address)) 1367 CGM.ErrorUnsupported(E, "__builtin_init_dwarf_reg_size_table"); 1368 return RValue::get(llvm::UndefValue::get(ConvertType(E->getType()))); 1369 } 1370 case Builtin::BI__builtin_eh_return: { 1371 Value *Int = EmitScalarExpr(E->getArg(0)); 1372 Value *Ptr = EmitScalarExpr(E->getArg(1)); 1373 1374 llvm::IntegerType *IntTy = cast<llvm::IntegerType>(Int->getType()); 1375 assert((IntTy->getBitWidth() == 32 || IntTy->getBitWidth() == 64) && 1376 "LLVM's __builtin_eh_return only supports 32- and 64-bit variants"); 1377 Value *F = CGM.getIntrinsic(IntTy->getBitWidth() == 32 1378 ? Intrinsic::eh_return_i32 1379 : Intrinsic::eh_return_i64); 1380 Builder.CreateCall(F, {Int, Ptr}); 1381 Builder.CreateUnreachable(); 1382 1383 // We do need to preserve an insertion point. 1384 EmitBlock(createBasicBlock("builtin_eh_return.cont")); 1385 1386 return RValue::get(nullptr); 1387 } 1388 case Builtin::BI__builtin_unwind_init: { 1389 Value *F = CGM.getIntrinsic(Intrinsic::eh_unwind_init); 1390 return RValue::get(Builder.CreateCall(F)); 1391 } 1392 case Builtin::BI__builtin_extend_pointer: { 1393 // Extends a pointer to the size of an _Unwind_Word, which is 1394 // uint64_t on all platforms. Generally this gets poked into a 1395 // register and eventually used as an address, so if the 1396 // addressing registers are wider than pointers and the platform 1397 // doesn't implicitly ignore high-order bits when doing 1398 // addressing, we need to make sure we zext / sext based on 1399 // the platform's expectations. 1400 // 1401 // See: http://gcc.gnu.org/ml/gcc-bugs/2002-02/msg00237.html 1402 1403 // Cast the pointer to intptr_t. 1404 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1405 Value *Result = Builder.CreatePtrToInt(Ptr, IntPtrTy, "extend.cast"); 1406 1407 // If that's 64 bits, we're done. 1408 if (IntPtrTy->getBitWidth() == 64) 1409 return RValue::get(Result); 1410 1411 // Otherwise, ask the codegen data what to do. 1412 if (getTargetHooks().extendPointerWithSExt()) 1413 return RValue::get(Builder.CreateSExt(Result, Int64Ty, "extend.sext")); 1414 else 1415 return RValue::get(Builder.CreateZExt(Result, Int64Ty, "extend.zext")); 1416 } 1417 case Builtin::BI__builtin_setjmp: { 1418 // Buffer is a void**. 1419 Address Buf = EmitPointerWithAlignment(E->getArg(0)); 1420 1421 // Store the frame pointer to the setjmp buffer. 1422 Value *FrameAddr = 1423 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1424 ConstantInt::get(Int32Ty, 0)); 1425 Builder.CreateStore(FrameAddr, Buf); 1426 1427 // Store the stack pointer to the setjmp buffer. 1428 Value *StackAddr = 1429 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::stacksave)); 1430 Address StackSaveSlot = 1431 Builder.CreateConstInBoundsGEP(Buf, 2, getPointerSize()); 1432 Builder.CreateStore(StackAddr, StackSaveSlot); 1433 1434 // Call LLVM's EH setjmp, which is lightweight. 1435 Value *F = CGM.getIntrinsic(Intrinsic::eh_sjlj_setjmp); 1436 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1437 return RValue::get(Builder.CreateCall(F, Buf.getPointer())); 1438 } 1439 case Builtin::BI__builtin_longjmp: { 1440 Value *Buf = EmitScalarExpr(E->getArg(0)); 1441 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1442 1443 // Call LLVM's EH longjmp, which is lightweight. 1444 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::eh_sjlj_longjmp), Buf); 1445 1446 // longjmp doesn't return; mark this as unreachable. 1447 Builder.CreateUnreachable(); 1448 1449 // We do need to preserve an insertion point. 1450 EmitBlock(createBasicBlock("longjmp.cont")); 1451 1452 return RValue::get(nullptr); 1453 } 1454 case Builtin::BI__sync_fetch_and_add: 1455 case Builtin::BI__sync_fetch_and_sub: 1456 case Builtin::BI__sync_fetch_and_or: 1457 case Builtin::BI__sync_fetch_and_and: 1458 case Builtin::BI__sync_fetch_and_xor: 1459 case Builtin::BI__sync_fetch_and_nand: 1460 case Builtin::BI__sync_add_and_fetch: 1461 case Builtin::BI__sync_sub_and_fetch: 1462 case Builtin::BI__sync_and_and_fetch: 1463 case Builtin::BI__sync_or_and_fetch: 1464 case Builtin::BI__sync_xor_and_fetch: 1465 case Builtin::BI__sync_nand_and_fetch: 1466 case Builtin::BI__sync_val_compare_and_swap: 1467 case Builtin::BI__sync_bool_compare_and_swap: 1468 case Builtin::BI__sync_lock_test_and_set: 1469 case Builtin::BI__sync_lock_release: 1470 case Builtin::BI__sync_swap: 1471 llvm_unreachable("Shouldn't make it through sema"); 1472 case Builtin::BI__sync_fetch_and_add_1: 1473 case Builtin::BI__sync_fetch_and_add_2: 1474 case Builtin::BI__sync_fetch_and_add_4: 1475 case Builtin::BI__sync_fetch_and_add_8: 1476 case Builtin::BI__sync_fetch_and_add_16: 1477 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E); 1478 case Builtin::BI__sync_fetch_and_sub_1: 1479 case Builtin::BI__sync_fetch_and_sub_2: 1480 case Builtin::BI__sync_fetch_and_sub_4: 1481 case Builtin::BI__sync_fetch_and_sub_8: 1482 case Builtin::BI__sync_fetch_and_sub_16: 1483 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E); 1484 case Builtin::BI__sync_fetch_and_or_1: 1485 case Builtin::BI__sync_fetch_and_or_2: 1486 case Builtin::BI__sync_fetch_and_or_4: 1487 case Builtin::BI__sync_fetch_and_or_8: 1488 case Builtin::BI__sync_fetch_and_or_16: 1489 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E); 1490 case Builtin::BI__sync_fetch_and_and_1: 1491 case Builtin::BI__sync_fetch_and_and_2: 1492 case Builtin::BI__sync_fetch_and_and_4: 1493 case Builtin::BI__sync_fetch_and_and_8: 1494 case Builtin::BI__sync_fetch_and_and_16: 1495 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E); 1496 case Builtin::BI__sync_fetch_and_xor_1: 1497 case Builtin::BI__sync_fetch_and_xor_2: 1498 case Builtin::BI__sync_fetch_and_xor_4: 1499 case Builtin::BI__sync_fetch_and_xor_8: 1500 case Builtin::BI__sync_fetch_and_xor_16: 1501 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E); 1502 case Builtin::BI__sync_fetch_and_nand_1: 1503 case Builtin::BI__sync_fetch_and_nand_2: 1504 case Builtin::BI__sync_fetch_and_nand_4: 1505 case Builtin::BI__sync_fetch_and_nand_8: 1506 case Builtin::BI__sync_fetch_and_nand_16: 1507 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Nand, E); 1508 1509 // Clang extensions: not overloaded yet. 1510 case Builtin::BI__sync_fetch_and_min: 1511 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E); 1512 case Builtin::BI__sync_fetch_and_max: 1513 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Max, E); 1514 case Builtin::BI__sync_fetch_and_umin: 1515 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMin, E); 1516 case Builtin::BI__sync_fetch_and_umax: 1517 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMax, E); 1518 1519 case Builtin::BI__sync_add_and_fetch_1: 1520 case Builtin::BI__sync_add_and_fetch_2: 1521 case Builtin::BI__sync_add_and_fetch_4: 1522 case Builtin::BI__sync_add_and_fetch_8: 1523 case Builtin::BI__sync_add_and_fetch_16: 1524 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Add, E, 1525 llvm::Instruction::Add); 1526 case Builtin::BI__sync_sub_and_fetch_1: 1527 case Builtin::BI__sync_sub_and_fetch_2: 1528 case Builtin::BI__sync_sub_and_fetch_4: 1529 case Builtin::BI__sync_sub_and_fetch_8: 1530 case Builtin::BI__sync_sub_and_fetch_16: 1531 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Sub, E, 1532 llvm::Instruction::Sub); 1533 case Builtin::BI__sync_and_and_fetch_1: 1534 case Builtin::BI__sync_and_and_fetch_2: 1535 case Builtin::BI__sync_and_and_fetch_4: 1536 case Builtin::BI__sync_and_and_fetch_8: 1537 case Builtin::BI__sync_and_and_fetch_16: 1538 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::And, E, 1539 llvm::Instruction::And); 1540 case Builtin::BI__sync_or_and_fetch_1: 1541 case Builtin::BI__sync_or_and_fetch_2: 1542 case Builtin::BI__sync_or_and_fetch_4: 1543 case Builtin::BI__sync_or_and_fetch_8: 1544 case Builtin::BI__sync_or_and_fetch_16: 1545 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Or, E, 1546 llvm::Instruction::Or); 1547 case Builtin::BI__sync_xor_and_fetch_1: 1548 case Builtin::BI__sync_xor_and_fetch_2: 1549 case Builtin::BI__sync_xor_and_fetch_4: 1550 case Builtin::BI__sync_xor_and_fetch_8: 1551 case Builtin::BI__sync_xor_and_fetch_16: 1552 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Xor, E, 1553 llvm::Instruction::Xor); 1554 case Builtin::BI__sync_nand_and_fetch_1: 1555 case Builtin::BI__sync_nand_and_fetch_2: 1556 case Builtin::BI__sync_nand_and_fetch_4: 1557 case Builtin::BI__sync_nand_and_fetch_8: 1558 case Builtin::BI__sync_nand_and_fetch_16: 1559 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Nand, E, 1560 llvm::Instruction::And, true); 1561 1562 case Builtin::BI__sync_val_compare_and_swap_1: 1563 case Builtin::BI__sync_val_compare_and_swap_2: 1564 case Builtin::BI__sync_val_compare_and_swap_4: 1565 case Builtin::BI__sync_val_compare_and_swap_8: 1566 case Builtin::BI__sync_val_compare_and_swap_16: 1567 return RValue::get(MakeAtomicCmpXchgValue(*this, E, false)); 1568 1569 case Builtin::BI__sync_bool_compare_and_swap_1: 1570 case Builtin::BI__sync_bool_compare_and_swap_2: 1571 case Builtin::BI__sync_bool_compare_and_swap_4: 1572 case Builtin::BI__sync_bool_compare_and_swap_8: 1573 case Builtin::BI__sync_bool_compare_and_swap_16: 1574 return RValue::get(MakeAtomicCmpXchgValue(*this, E, true)); 1575 1576 case Builtin::BI__sync_swap_1: 1577 case Builtin::BI__sync_swap_2: 1578 case Builtin::BI__sync_swap_4: 1579 case Builtin::BI__sync_swap_8: 1580 case Builtin::BI__sync_swap_16: 1581 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1582 1583 case Builtin::BI__sync_lock_test_and_set_1: 1584 case Builtin::BI__sync_lock_test_and_set_2: 1585 case Builtin::BI__sync_lock_test_and_set_4: 1586 case Builtin::BI__sync_lock_test_and_set_8: 1587 case Builtin::BI__sync_lock_test_and_set_16: 1588 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1589 1590 case Builtin::BI__sync_lock_release_1: 1591 case Builtin::BI__sync_lock_release_2: 1592 case Builtin::BI__sync_lock_release_4: 1593 case Builtin::BI__sync_lock_release_8: 1594 case Builtin::BI__sync_lock_release_16: { 1595 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1596 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 1597 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 1598 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 1599 StoreSize.getQuantity() * 8); 1600 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 1601 llvm::StoreInst *Store = 1602 Builder.CreateAlignedStore(llvm::Constant::getNullValue(ITy), Ptr, 1603 StoreSize); 1604 Store->setAtomic(llvm::AtomicOrdering::Release); 1605 return RValue::get(nullptr); 1606 } 1607 1608 case Builtin::BI__sync_synchronize: { 1609 // We assume this is supposed to correspond to a C++0x-style 1610 // sequentially-consistent fence (i.e. this is only usable for 1611 // synchonization, not device I/O or anything like that). This intrinsic 1612 // is really badly designed in the sense that in theory, there isn't 1613 // any way to safely use it... but in practice, it mostly works 1614 // to use it with non-atomic loads and stores to get acquire/release 1615 // semantics. 1616 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent); 1617 return RValue::get(nullptr); 1618 } 1619 1620 case Builtin::BI__builtin_nontemporal_load: 1621 return RValue::get(EmitNontemporalLoad(*this, E)); 1622 case Builtin::BI__builtin_nontemporal_store: 1623 return RValue::get(EmitNontemporalStore(*this, E)); 1624 case Builtin::BI__c11_atomic_is_lock_free: 1625 case Builtin::BI__atomic_is_lock_free: { 1626 // Call "bool __atomic_is_lock_free(size_t size, void *ptr)". For the 1627 // __c11 builtin, ptr is 0 (indicating a properly-aligned object), since 1628 // _Atomic(T) is always properly-aligned. 1629 const char *LibCallName = "__atomic_is_lock_free"; 1630 CallArgList Args; 1631 Args.add(RValue::get(EmitScalarExpr(E->getArg(0))), 1632 getContext().getSizeType()); 1633 if (BuiltinID == Builtin::BI__atomic_is_lock_free) 1634 Args.add(RValue::get(EmitScalarExpr(E->getArg(1))), 1635 getContext().VoidPtrTy); 1636 else 1637 Args.add(RValue::get(llvm::Constant::getNullValue(VoidPtrTy)), 1638 getContext().VoidPtrTy); 1639 const CGFunctionInfo &FuncInfo = 1640 CGM.getTypes().arrangeBuiltinFunctionCall(E->getType(), Args); 1641 llvm::FunctionType *FTy = CGM.getTypes().GetFunctionType(FuncInfo); 1642 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, LibCallName); 1643 return EmitCall(FuncInfo, CGCallee::forDirect(Func), 1644 ReturnValueSlot(), Args); 1645 } 1646 1647 case Builtin::BI__atomic_test_and_set: { 1648 // Look at the argument type to determine whether this is a volatile 1649 // operation. The parameter type is always volatile. 1650 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1651 bool Volatile = 1652 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1653 1654 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1655 unsigned AddrSpace = Ptr->getType()->getPointerAddressSpace(); 1656 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1657 Value *NewVal = Builder.getInt8(1); 1658 Value *Order = EmitScalarExpr(E->getArg(1)); 1659 if (isa<llvm::ConstantInt>(Order)) { 1660 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1661 AtomicRMWInst *Result = nullptr; 1662 switch (ord) { 1663 case 0: // memory_order_relaxed 1664 default: // invalid order 1665 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1666 llvm::AtomicOrdering::Monotonic); 1667 break; 1668 case 1: // memory_order_consume 1669 case 2: // memory_order_acquire 1670 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1671 llvm::AtomicOrdering::Acquire); 1672 break; 1673 case 3: // memory_order_release 1674 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1675 llvm::AtomicOrdering::Release); 1676 break; 1677 case 4: // memory_order_acq_rel 1678 1679 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1680 llvm::AtomicOrdering::AcquireRelease); 1681 break; 1682 case 5: // memory_order_seq_cst 1683 Result = Builder.CreateAtomicRMW( 1684 llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1685 llvm::AtomicOrdering::SequentiallyConsistent); 1686 break; 1687 } 1688 Result->setVolatile(Volatile); 1689 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1690 } 1691 1692 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1693 1694 llvm::BasicBlock *BBs[5] = { 1695 createBasicBlock("monotonic", CurFn), 1696 createBasicBlock("acquire", CurFn), 1697 createBasicBlock("release", CurFn), 1698 createBasicBlock("acqrel", CurFn), 1699 createBasicBlock("seqcst", CurFn) 1700 }; 1701 llvm::AtomicOrdering Orders[5] = { 1702 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Acquire, 1703 llvm::AtomicOrdering::Release, llvm::AtomicOrdering::AcquireRelease, 1704 llvm::AtomicOrdering::SequentiallyConsistent}; 1705 1706 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1707 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1708 1709 Builder.SetInsertPoint(ContBB); 1710 PHINode *Result = Builder.CreatePHI(Int8Ty, 5, "was_set"); 1711 1712 for (unsigned i = 0; i < 5; ++i) { 1713 Builder.SetInsertPoint(BBs[i]); 1714 AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1715 Ptr, NewVal, Orders[i]); 1716 RMW->setVolatile(Volatile); 1717 Result->addIncoming(RMW, BBs[i]); 1718 Builder.CreateBr(ContBB); 1719 } 1720 1721 SI->addCase(Builder.getInt32(0), BBs[0]); 1722 SI->addCase(Builder.getInt32(1), BBs[1]); 1723 SI->addCase(Builder.getInt32(2), BBs[1]); 1724 SI->addCase(Builder.getInt32(3), BBs[2]); 1725 SI->addCase(Builder.getInt32(4), BBs[3]); 1726 SI->addCase(Builder.getInt32(5), BBs[4]); 1727 1728 Builder.SetInsertPoint(ContBB); 1729 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1730 } 1731 1732 case Builtin::BI__atomic_clear: { 1733 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1734 bool Volatile = 1735 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1736 1737 Address Ptr = EmitPointerWithAlignment(E->getArg(0)); 1738 unsigned AddrSpace = Ptr.getPointer()->getType()->getPointerAddressSpace(); 1739 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1740 Value *NewVal = Builder.getInt8(0); 1741 Value *Order = EmitScalarExpr(E->getArg(1)); 1742 if (isa<llvm::ConstantInt>(Order)) { 1743 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1744 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1745 switch (ord) { 1746 case 0: // memory_order_relaxed 1747 default: // invalid order 1748 Store->setOrdering(llvm::AtomicOrdering::Monotonic); 1749 break; 1750 case 3: // memory_order_release 1751 Store->setOrdering(llvm::AtomicOrdering::Release); 1752 break; 1753 case 5: // memory_order_seq_cst 1754 Store->setOrdering(llvm::AtomicOrdering::SequentiallyConsistent); 1755 break; 1756 } 1757 return RValue::get(nullptr); 1758 } 1759 1760 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1761 1762 llvm::BasicBlock *BBs[3] = { 1763 createBasicBlock("monotonic", CurFn), 1764 createBasicBlock("release", CurFn), 1765 createBasicBlock("seqcst", CurFn) 1766 }; 1767 llvm::AtomicOrdering Orders[3] = { 1768 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Release, 1769 llvm::AtomicOrdering::SequentiallyConsistent}; 1770 1771 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1772 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1773 1774 for (unsigned i = 0; i < 3; ++i) { 1775 Builder.SetInsertPoint(BBs[i]); 1776 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1777 Store->setOrdering(Orders[i]); 1778 Builder.CreateBr(ContBB); 1779 } 1780 1781 SI->addCase(Builder.getInt32(0), BBs[0]); 1782 SI->addCase(Builder.getInt32(3), BBs[1]); 1783 SI->addCase(Builder.getInt32(5), BBs[2]); 1784 1785 Builder.SetInsertPoint(ContBB); 1786 return RValue::get(nullptr); 1787 } 1788 1789 case Builtin::BI__atomic_thread_fence: 1790 case Builtin::BI__atomic_signal_fence: 1791 case Builtin::BI__c11_atomic_thread_fence: 1792 case Builtin::BI__c11_atomic_signal_fence: { 1793 llvm::SynchronizationScope Scope; 1794 if (BuiltinID == Builtin::BI__atomic_signal_fence || 1795 BuiltinID == Builtin::BI__c11_atomic_signal_fence) 1796 Scope = llvm::SingleThread; 1797 else 1798 Scope = llvm::CrossThread; 1799 Value *Order = EmitScalarExpr(E->getArg(0)); 1800 if (isa<llvm::ConstantInt>(Order)) { 1801 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1802 switch (ord) { 1803 case 0: // memory_order_relaxed 1804 default: // invalid order 1805 break; 1806 case 1: // memory_order_consume 1807 case 2: // memory_order_acquire 1808 Builder.CreateFence(llvm::AtomicOrdering::Acquire, Scope); 1809 break; 1810 case 3: // memory_order_release 1811 Builder.CreateFence(llvm::AtomicOrdering::Release, Scope); 1812 break; 1813 case 4: // memory_order_acq_rel 1814 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, Scope); 1815 break; 1816 case 5: // memory_order_seq_cst 1817 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 1818 Scope); 1819 break; 1820 } 1821 return RValue::get(nullptr); 1822 } 1823 1824 llvm::BasicBlock *AcquireBB, *ReleaseBB, *AcqRelBB, *SeqCstBB; 1825 AcquireBB = createBasicBlock("acquire", CurFn); 1826 ReleaseBB = createBasicBlock("release", CurFn); 1827 AcqRelBB = createBasicBlock("acqrel", CurFn); 1828 SeqCstBB = createBasicBlock("seqcst", CurFn); 1829 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1830 1831 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1832 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, ContBB); 1833 1834 Builder.SetInsertPoint(AcquireBB); 1835 Builder.CreateFence(llvm::AtomicOrdering::Acquire, Scope); 1836 Builder.CreateBr(ContBB); 1837 SI->addCase(Builder.getInt32(1), AcquireBB); 1838 SI->addCase(Builder.getInt32(2), AcquireBB); 1839 1840 Builder.SetInsertPoint(ReleaseBB); 1841 Builder.CreateFence(llvm::AtomicOrdering::Release, Scope); 1842 Builder.CreateBr(ContBB); 1843 SI->addCase(Builder.getInt32(3), ReleaseBB); 1844 1845 Builder.SetInsertPoint(AcqRelBB); 1846 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, Scope); 1847 Builder.CreateBr(ContBB); 1848 SI->addCase(Builder.getInt32(4), AcqRelBB); 1849 1850 Builder.SetInsertPoint(SeqCstBB); 1851 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, Scope); 1852 Builder.CreateBr(ContBB); 1853 SI->addCase(Builder.getInt32(5), SeqCstBB); 1854 1855 Builder.SetInsertPoint(ContBB); 1856 return RValue::get(nullptr); 1857 } 1858 1859 // Library functions with special handling. 1860 case Builtin::BIsqrt: 1861 case Builtin::BIsqrtf: 1862 case Builtin::BIsqrtl: { 1863 // Transform a call to sqrt* into a @llvm.sqrt.* intrinsic call, but only 1864 // in finite- or unsafe-math mode (the intrinsic has different semantics 1865 // for handling negative numbers compared to the library function, so 1866 // -fmath-errno=0 is not enough). 1867 if (!FD->hasAttr<ConstAttr>()) 1868 break; 1869 if (!(CGM.getCodeGenOpts().UnsafeFPMath || 1870 CGM.getCodeGenOpts().NoNaNsFPMath)) 1871 break; 1872 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 1873 llvm::Type *ArgType = Arg0->getType(); 1874 Value *F = CGM.getIntrinsic(Intrinsic::sqrt, ArgType); 1875 return RValue::get(Builder.CreateCall(F, Arg0)); 1876 } 1877 1878 case Builtin::BI__builtin_pow: 1879 case Builtin::BI__builtin_powf: 1880 case Builtin::BI__builtin_powl: 1881 case Builtin::BIpow: 1882 case Builtin::BIpowf: 1883 case Builtin::BIpowl: { 1884 // Transform a call to pow* into a @llvm.pow.* intrinsic call. 1885 if (!FD->hasAttr<ConstAttr>()) 1886 break; 1887 Value *Base = EmitScalarExpr(E->getArg(0)); 1888 Value *Exponent = EmitScalarExpr(E->getArg(1)); 1889 llvm::Type *ArgType = Base->getType(); 1890 Value *F = CGM.getIntrinsic(Intrinsic::pow, ArgType); 1891 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 1892 } 1893 1894 case Builtin::BIfma: 1895 case Builtin::BIfmaf: 1896 case Builtin::BIfmal: 1897 case Builtin::BI__builtin_fma: 1898 case Builtin::BI__builtin_fmaf: 1899 case Builtin::BI__builtin_fmal: { 1900 // Rewrite fma to intrinsic. 1901 Value *FirstArg = EmitScalarExpr(E->getArg(0)); 1902 llvm::Type *ArgType = FirstArg->getType(); 1903 Value *F = CGM.getIntrinsic(Intrinsic::fma, ArgType); 1904 return RValue::get( 1905 Builder.CreateCall(F, {FirstArg, EmitScalarExpr(E->getArg(1)), 1906 EmitScalarExpr(E->getArg(2))})); 1907 } 1908 1909 case Builtin::BI__builtin_signbit: 1910 case Builtin::BI__builtin_signbitf: 1911 case Builtin::BI__builtin_signbitl: { 1912 return RValue::get( 1913 Builder.CreateZExt(EmitSignBit(*this, EmitScalarExpr(E->getArg(0))), 1914 ConvertType(E->getType()))); 1915 } 1916 case Builtin::BI__builtin_annotation: { 1917 llvm::Value *AnnVal = EmitScalarExpr(E->getArg(0)); 1918 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::annotation, 1919 AnnVal->getType()); 1920 1921 // Get the annotation string, go through casts. Sema requires this to be a 1922 // non-wide string literal, potentially casted, so the cast<> is safe. 1923 const Expr *AnnotationStrExpr = E->getArg(1)->IgnoreParenCasts(); 1924 StringRef Str = cast<StringLiteral>(AnnotationStrExpr)->getString(); 1925 return RValue::get(EmitAnnotationCall(F, AnnVal, Str, E->getExprLoc())); 1926 } 1927 case Builtin::BI__builtin_addcb: 1928 case Builtin::BI__builtin_addcs: 1929 case Builtin::BI__builtin_addc: 1930 case Builtin::BI__builtin_addcl: 1931 case Builtin::BI__builtin_addcll: 1932 case Builtin::BI__builtin_subcb: 1933 case Builtin::BI__builtin_subcs: 1934 case Builtin::BI__builtin_subc: 1935 case Builtin::BI__builtin_subcl: 1936 case Builtin::BI__builtin_subcll: { 1937 1938 // We translate all of these builtins from expressions of the form: 1939 // int x = ..., y = ..., carryin = ..., carryout, result; 1940 // result = __builtin_addc(x, y, carryin, &carryout); 1941 // 1942 // to LLVM IR of the form: 1943 // 1944 // %tmp1 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y) 1945 // %tmpsum1 = extractvalue {i32, i1} %tmp1, 0 1946 // %carry1 = extractvalue {i32, i1} %tmp1, 1 1947 // %tmp2 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %tmpsum1, 1948 // i32 %carryin) 1949 // %result = extractvalue {i32, i1} %tmp2, 0 1950 // %carry2 = extractvalue {i32, i1} %tmp2, 1 1951 // %tmp3 = or i1 %carry1, %carry2 1952 // %tmp4 = zext i1 %tmp3 to i32 1953 // store i32 %tmp4, i32* %carryout 1954 1955 // Scalarize our inputs. 1956 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1957 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1958 llvm::Value *Carryin = EmitScalarExpr(E->getArg(2)); 1959 Address CarryOutPtr = EmitPointerWithAlignment(E->getArg(3)); 1960 1961 // Decide if we are lowering to a uadd.with.overflow or usub.with.overflow. 1962 llvm::Intrinsic::ID IntrinsicId; 1963 switch (BuiltinID) { 1964 default: llvm_unreachable("Unknown multiprecision builtin id."); 1965 case Builtin::BI__builtin_addcb: 1966 case Builtin::BI__builtin_addcs: 1967 case Builtin::BI__builtin_addc: 1968 case Builtin::BI__builtin_addcl: 1969 case Builtin::BI__builtin_addcll: 1970 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1971 break; 1972 case Builtin::BI__builtin_subcb: 1973 case Builtin::BI__builtin_subcs: 1974 case Builtin::BI__builtin_subc: 1975 case Builtin::BI__builtin_subcl: 1976 case Builtin::BI__builtin_subcll: 1977 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1978 break; 1979 } 1980 1981 // Construct our resulting LLVM IR expression. 1982 llvm::Value *Carry1; 1983 llvm::Value *Sum1 = EmitOverflowIntrinsic(*this, IntrinsicId, 1984 X, Y, Carry1); 1985 llvm::Value *Carry2; 1986 llvm::Value *Sum2 = EmitOverflowIntrinsic(*this, IntrinsicId, 1987 Sum1, Carryin, Carry2); 1988 llvm::Value *CarryOut = Builder.CreateZExt(Builder.CreateOr(Carry1, Carry2), 1989 X->getType()); 1990 Builder.CreateStore(CarryOut, CarryOutPtr); 1991 return RValue::get(Sum2); 1992 } 1993 1994 case Builtin::BI__builtin_add_overflow: 1995 case Builtin::BI__builtin_sub_overflow: 1996 case Builtin::BI__builtin_mul_overflow: { 1997 const clang::Expr *LeftArg = E->getArg(0); 1998 const clang::Expr *RightArg = E->getArg(1); 1999 const clang::Expr *ResultArg = E->getArg(2); 2000 2001 clang::QualType ResultQTy = 2002 ResultArg->getType()->castAs<PointerType>()->getPointeeType(); 2003 2004 WidthAndSignedness LeftInfo = 2005 getIntegerWidthAndSignedness(CGM.getContext(), LeftArg->getType()); 2006 WidthAndSignedness RightInfo = 2007 getIntegerWidthAndSignedness(CGM.getContext(), RightArg->getType()); 2008 WidthAndSignedness ResultInfo = 2009 getIntegerWidthAndSignedness(CGM.getContext(), ResultQTy); 2010 WidthAndSignedness EncompassingInfo = 2011 EncompassingIntegerType({LeftInfo, RightInfo, ResultInfo}); 2012 2013 llvm::Type *EncompassingLLVMTy = 2014 llvm::IntegerType::get(CGM.getLLVMContext(), EncompassingInfo.Width); 2015 2016 llvm::Type *ResultLLVMTy = CGM.getTypes().ConvertType(ResultQTy); 2017 2018 llvm::Intrinsic::ID IntrinsicId; 2019 switch (BuiltinID) { 2020 default: 2021 llvm_unreachable("Unknown overflow builtin id."); 2022 case Builtin::BI__builtin_add_overflow: 2023 IntrinsicId = EncompassingInfo.Signed 2024 ? llvm::Intrinsic::sadd_with_overflow 2025 : llvm::Intrinsic::uadd_with_overflow; 2026 break; 2027 case Builtin::BI__builtin_sub_overflow: 2028 IntrinsicId = EncompassingInfo.Signed 2029 ? llvm::Intrinsic::ssub_with_overflow 2030 : llvm::Intrinsic::usub_with_overflow; 2031 break; 2032 case Builtin::BI__builtin_mul_overflow: 2033 IntrinsicId = EncompassingInfo.Signed 2034 ? llvm::Intrinsic::smul_with_overflow 2035 : llvm::Intrinsic::umul_with_overflow; 2036 break; 2037 } 2038 2039 llvm::Value *Left = EmitScalarExpr(LeftArg); 2040 llvm::Value *Right = EmitScalarExpr(RightArg); 2041 Address ResultPtr = EmitPointerWithAlignment(ResultArg); 2042 2043 // Extend each operand to the encompassing type. 2044 Left = Builder.CreateIntCast(Left, EncompassingLLVMTy, LeftInfo.Signed); 2045 Right = Builder.CreateIntCast(Right, EncompassingLLVMTy, RightInfo.Signed); 2046 2047 // Perform the operation on the extended values. 2048 llvm::Value *Overflow, *Result; 2049 Result = EmitOverflowIntrinsic(*this, IntrinsicId, Left, Right, Overflow); 2050 2051 if (EncompassingInfo.Width > ResultInfo.Width) { 2052 // The encompassing type is wider than the result type, so we need to 2053 // truncate it. 2054 llvm::Value *ResultTrunc = Builder.CreateTrunc(Result, ResultLLVMTy); 2055 2056 // To see if the truncation caused an overflow, we will extend 2057 // the result and then compare it to the original result. 2058 llvm::Value *ResultTruncExt = Builder.CreateIntCast( 2059 ResultTrunc, EncompassingLLVMTy, ResultInfo.Signed); 2060 llvm::Value *TruncationOverflow = 2061 Builder.CreateICmpNE(Result, ResultTruncExt); 2062 2063 Overflow = Builder.CreateOr(Overflow, TruncationOverflow); 2064 Result = ResultTrunc; 2065 } 2066 2067 // Finally, store the result using the pointer. 2068 bool isVolatile = 2069 ResultArg->getType()->getPointeeType().isVolatileQualified(); 2070 Builder.CreateStore(EmitToMemory(Result, ResultQTy), ResultPtr, isVolatile); 2071 2072 return RValue::get(Overflow); 2073 } 2074 2075 case Builtin::BI__builtin_uadd_overflow: 2076 case Builtin::BI__builtin_uaddl_overflow: 2077 case Builtin::BI__builtin_uaddll_overflow: 2078 case Builtin::BI__builtin_usub_overflow: 2079 case Builtin::BI__builtin_usubl_overflow: 2080 case Builtin::BI__builtin_usubll_overflow: 2081 case Builtin::BI__builtin_umul_overflow: 2082 case Builtin::BI__builtin_umull_overflow: 2083 case Builtin::BI__builtin_umulll_overflow: 2084 case Builtin::BI__builtin_sadd_overflow: 2085 case Builtin::BI__builtin_saddl_overflow: 2086 case Builtin::BI__builtin_saddll_overflow: 2087 case Builtin::BI__builtin_ssub_overflow: 2088 case Builtin::BI__builtin_ssubl_overflow: 2089 case Builtin::BI__builtin_ssubll_overflow: 2090 case Builtin::BI__builtin_smul_overflow: 2091 case Builtin::BI__builtin_smull_overflow: 2092 case Builtin::BI__builtin_smulll_overflow: { 2093 2094 // We translate all of these builtins directly to the relevant llvm IR node. 2095 2096 // Scalarize our inputs. 2097 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 2098 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 2099 Address SumOutPtr = EmitPointerWithAlignment(E->getArg(2)); 2100 2101 // Decide which of the overflow intrinsics we are lowering to: 2102 llvm::Intrinsic::ID IntrinsicId; 2103 switch (BuiltinID) { 2104 default: llvm_unreachable("Unknown overflow builtin id."); 2105 case Builtin::BI__builtin_uadd_overflow: 2106 case Builtin::BI__builtin_uaddl_overflow: 2107 case Builtin::BI__builtin_uaddll_overflow: 2108 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 2109 break; 2110 case Builtin::BI__builtin_usub_overflow: 2111 case Builtin::BI__builtin_usubl_overflow: 2112 case Builtin::BI__builtin_usubll_overflow: 2113 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 2114 break; 2115 case Builtin::BI__builtin_umul_overflow: 2116 case Builtin::BI__builtin_umull_overflow: 2117 case Builtin::BI__builtin_umulll_overflow: 2118 IntrinsicId = llvm::Intrinsic::umul_with_overflow; 2119 break; 2120 case Builtin::BI__builtin_sadd_overflow: 2121 case Builtin::BI__builtin_saddl_overflow: 2122 case Builtin::BI__builtin_saddll_overflow: 2123 IntrinsicId = llvm::Intrinsic::sadd_with_overflow; 2124 break; 2125 case Builtin::BI__builtin_ssub_overflow: 2126 case Builtin::BI__builtin_ssubl_overflow: 2127 case Builtin::BI__builtin_ssubll_overflow: 2128 IntrinsicId = llvm::Intrinsic::ssub_with_overflow; 2129 break; 2130 case Builtin::BI__builtin_smul_overflow: 2131 case Builtin::BI__builtin_smull_overflow: 2132 case Builtin::BI__builtin_smulll_overflow: 2133 IntrinsicId = llvm::Intrinsic::smul_with_overflow; 2134 break; 2135 } 2136 2137 2138 llvm::Value *Carry; 2139 llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry); 2140 Builder.CreateStore(Sum, SumOutPtr); 2141 2142 return RValue::get(Carry); 2143 } 2144 case Builtin::BI__builtin_addressof: 2145 return RValue::get(EmitLValue(E->getArg(0)).getPointer()); 2146 case Builtin::BI__builtin_operator_new: 2147 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 2148 E->getArg(0), false); 2149 case Builtin::BI__builtin_operator_delete: 2150 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 2151 E->getArg(0), true); 2152 case Builtin::BI__noop: 2153 // __noop always evaluates to an integer literal zero. 2154 return RValue::get(ConstantInt::get(IntTy, 0)); 2155 case Builtin::BI__builtin_call_with_static_chain: { 2156 const CallExpr *Call = cast<CallExpr>(E->getArg(0)); 2157 const Expr *Chain = E->getArg(1); 2158 return EmitCall(Call->getCallee()->getType(), 2159 EmitCallee(Call->getCallee()), Call, ReturnValue, 2160 EmitScalarExpr(Chain)); 2161 } 2162 case Builtin::BI_InterlockedExchange8: 2163 case Builtin::BI_InterlockedExchange16: 2164 case Builtin::BI_InterlockedExchange: 2165 case Builtin::BI_InterlockedExchangePointer: 2166 return RValue::get( 2167 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E)); 2168 case Builtin::BI_InterlockedCompareExchangePointer: { 2169 llvm::Type *RTy; 2170 llvm::IntegerType *IntType = 2171 IntegerType::get(getLLVMContext(), 2172 getContext().getTypeSize(E->getType())); 2173 llvm::Type *IntPtrType = IntType->getPointerTo(); 2174 2175 llvm::Value *Destination = 2176 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), IntPtrType); 2177 2178 llvm::Value *Exchange = EmitScalarExpr(E->getArg(1)); 2179 RTy = Exchange->getType(); 2180 Exchange = Builder.CreatePtrToInt(Exchange, IntType); 2181 2182 llvm::Value *Comparand = 2183 Builder.CreatePtrToInt(EmitScalarExpr(E->getArg(2)), IntType); 2184 2185 auto Result = 2186 Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 2187 AtomicOrdering::SequentiallyConsistent, 2188 AtomicOrdering::SequentiallyConsistent); 2189 Result->setVolatile(true); 2190 2191 return RValue::get(Builder.CreateIntToPtr(Builder.CreateExtractValue(Result, 2192 0), 2193 RTy)); 2194 } 2195 case Builtin::BI_InterlockedCompareExchange8: 2196 case Builtin::BI_InterlockedCompareExchange16: 2197 case Builtin::BI_InterlockedCompareExchange: 2198 case Builtin::BI_InterlockedCompareExchange64: { 2199 AtomicCmpXchgInst *CXI = Builder.CreateAtomicCmpXchg( 2200 EmitScalarExpr(E->getArg(0)), 2201 EmitScalarExpr(E->getArg(2)), 2202 EmitScalarExpr(E->getArg(1)), 2203 AtomicOrdering::SequentiallyConsistent, 2204 AtomicOrdering::SequentiallyConsistent); 2205 CXI->setVolatile(true); 2206 return RValue::get(Builder.CreateExtractValue(CXI, 0)); 2207 } 2208 case Builtin::BI_InterlockedIncrement16: 2209 case Builtin::BI_InterlockedIncrement: 2210 return RValue::get( 2211 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E)); 2212 case Builtin::BI_InterlockedDecrement16: 2213 case Builtin::BI_InterlockedDecrement: 2214 return RValue::get( 2215 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E)); 2216 case Builtin::BI_InterlockedAnd8: 2217 case Builtin::BI_InterlockedAnd16: 2218 case Builtin::BI_InterlockedAnd: 2219 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E)); 2220 case Builtin::BI_InterlockedExchangeAdd8: 2221 case Builtin::BI_InterlockedExchangeAdd16: 2222 case Builtin::BI_InterlockedExchangeAdd: 2223 return RValue::get( 2224 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E)); 2225 case Builtin::BI_InterlockedExchangeSub8: 2226 case Builtin::BI_InterlockedExchangeSub16: 2227 case Builtin::BI_InterlockedExchangeSub: 2228 return RValue::get( 2229 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E)); 2230 case Builtin::BI_InterlockedOr8: 2231 case Builtin::BI_InterlockedOr16: 2232 case Builtin::BI_InterlockedOr: 2233 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E)); 2234 case Builtin::BI_InterlockedXor8: 2235 case Builtin::BI_InterlockedXor16: 2236 case Builtin::BI_InterlockedXor: 2237 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E)); 2238 case Builtin::BI__readfsdword: { 2239 llvm::Type *IntTy = ConvertType(E->getType()); 2240 Value *IntToPtr = 2241 Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)), 2242 llvm::PointerType::get(IntTy, 257)); 2243 LoadInst *Load = Builder.CreateAlignedLoad( 2244 IntTy, IntToPtr, getContext().getTypeAlignInChars(E->getType())); 2245 Load->setVolatile(true); 2246 return RValue::get(Load); 2247 } 2248 2249 case Builtin::BI__exception_code: 2250 case Builtin::BI_exception_code: 2251 return RValue::get(EmitSEHExceptionCode()); 2252 case Builtin::BI__exception_info: 2253 case Builtin::BI_exception_info: 2254 return RValue::get(EmitSEHExceptionInfo()); 2255 case Builtin::BI__abnormal_termination: 2256 case Builtin::BI_abnormal_termination: 2257 return RValue::get(EmitSEHAbnormalTermination()); 2258 case Builtin::BI_setjmpex: { 2259 if (getTarget().getTriple().isOSMSVCRT()) { 2260 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 2261 llvm::AttributeSet ReturnsTwiceAttr = 2262 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 2263 llvm::Attribute::ReturnsTwice); 2264 llvm::Constant *SetJmpEx = CGM.CreateRuntimeFunction( 2265 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 2266 "_setjmpex", ReturnsTwiceAttr, /*Local=*/true); 2267 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 2268 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 2269 llvm::Value *FrameAddr = 2270 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2271 ConstantInt::get(Int32Ty, 0)); 2272 llvm::Value *Args[] = {Buf, FrameAddr}; 2273 llvm::CallSite CS = EmitRuntimeCallOrInvoke(SetJmpEx, Args); 2274 CS.setAttributes(ReturnsTwiceAttr); 2275 return RValue::get(CS.getInstruction()); 2276 } 2277 break; 2278 } 2279 case Builtin::BI_setjmp: { 2280 if (getTarget().getTriple().isOSMSVCRT()) { 2281 llvm::AttributeSet ReturnsTwiceAttr = 2282 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 2283 llvm::Attribute::ReturnsTwice); 2284 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 2285 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 2286 llvm::CallSite CS; 2287 if (getTarget().getTriple().getArch() == llvm::Triple::x86) { 2288 llvm::Type *ArgTypes[] = {Int8PtrTy, IntTy}; 2289 llvm::Constant *SetJmp3 = CGM.CreateRuntimeFunction( 2290 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/true), 2291 "_setjmp3", ReturnsTwiceAttr, /*Local=*/true); 2292 llvm::Value *Count = ConstantInt::get(IntTy, 0); 2293 llvm::Value *Args[] = {Buf, Count}; 2294 CS = EmitRuntimeCallOrInvoke(SetJmp3, Args); 2295 } else { 2296 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 2297 llvm::Constant *SetJmp = CGM.CreateRuntimeFunction( 2298 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 2299 "_setjmp", ReturnsTwiceAttr, /*Local=*/true); 2300 llvm::Value *FrameAddr = 2301 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2302 ConstantInt::get(Int32Ty, 0)); 2303 llvm::Value *Args[] = {Buf, FrameAddr}; 2304 CS = EmitRuntimeCallOrInvoke(SetJmp, Args); 2305 } 2306 CS.setAttributes(ReturnsTwiceAttr); 2307 return RValue::get(CS.getInstruction()); 2308 } 2309 break; 2310 } 2311 2312 case Builtin::BI__GetExceptionInfo: { 2313 if (llvm::GlobalVariable *GV = 2314 CGM.getCXXABI().getThrowInfo(FD->getParamDecl(0)->getType())) 2315 return RValue::get(llvm::ConstantExpr::getBitCast(GV, CGM.Int8PtrTy)); 2316 break; 2317 } 2318 2319 case Builtin::BI__fastfail: { 2320 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::__fastfail, E)); 2321 break; 2322 } 2323 2324 case Builtin::BI__builtin_coro_size: { 2325 auto & Context = getContext(); 2326 auto SizeTy = Context.getSizeType(); 2327 auto T = Builder.getIntNTy(Context.getTypeSize(SizeTy)); 2328 Value *F = CGM.getIntrinsic(Intrinsic::coro_size, T); 2329 return RValue::get(Builder.CreateCall(F)); 2330 } 2331 2332 case Builtin::BI__builtin_coro_id: 2333 return EmitCoroutineIntrinsic(E, Intrinsic::coro_id); 2334 case Builtin::BI__builtin_coro_promise: 2335 return EmitCoroutineIntrinsic(E, Intrinsic::coro_promise); 2336 case Builtin::BI__builtin_coro_resume: 2337 return EmitCoroutineIntrinsic(E, Intrinsic::coro_resume); 2338 case Builtin::BI__builtin_coro_frame: 2339 return EmitCoroutineIntrinsic(E, Intrinsic::coro_frame); 2340 case Builtin::BI__builtin_coro_free: 2341 return EmitCoroutineIntrinsic(E, Intrinsic::coro_free); 2342 case Builtin::BI__builtin_coro_destroy: 2343 return EmitCoroutineIntrinsic(E, Intrinsic::coro_destroy); 2344 case Builtin::BI__builtin_coro_done: 2345 return EmitCoroutineIntrinsic(E, Intrinsic::coro_done); 2346 case Builtin::BI__builtin_coro_alloc: 2347 return EmitCoroutineIntrinsic(E, Intrinsic::coro_alloc); 2348 case Builtin::BI__builtin_coro_begin: 2349 return EmitCoroutineIntrinsic(E, Intrinsic::coro_begin); 2350 case Builtin::BI__builtin_coro_end: 2351 return EmitCoroutineIntrinsic(E, Intrinsic::coro_end); 2352 case Builtin::BI__builtin_coro_suspend: 2353 return EmitCoroutineIntrinsic(E, Intrinsic::coro_suspend); 2354 case Builtin::BI__builtin_coro_param: 2355 return EmitCoroutineIntrinsic(E, Intrinsic::coro_param); 2356 2357 // OpenCL v2.0 s6.13.16.2, Built-in pipe read and write functions 2358 case Builtin::BIread_pipe: 2359 case Builtin::BIwrite_pipe: { 2360 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2361 *Arg1 = EmitScalarExpr(E->getArg(1)); 2362 CGOpenCLRuntime OpenCLRT(CGM); 2363 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2364 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2365 2366 // Type of the generic packet parameter. 2367 unsigned GenericAS = 2368 getContext().getTargetAddressSpace(LangAS::opencl_generic); 2369 llvm::Type *I8PTy = llvm::PointerType::get( 2370 llvm::Type::getInt8Ty(getLLVMContext()), GenericAS); 2371 2372 // Testing which overloaded version we should generate the call for. 2373 if (2U == E->getNumArgs()) { 2374 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_2" 2375 : "__write_pipe_2"; 2376 // Creating a generic function type to be able to call with any builtin or 2377 // user defined type. 2378 llvm::Type *ArgTys[] = {Arg0->getType(), I8PTy, Int32Ty, Int32Ty}; 2379 llvm::FunctionType *FTy = llvm::FunctionType::get( 2380 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2381 Value *BCast = Builder.CreatePointerCast(Arg1, I8PTy); 2382 return RValue::get( 2383 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2384 {Arg0, BCast, PacketSize, PacketAlign})); 2385 } else { 2386 assert(4 == E->getNumArgs() && 2387 "Illegal number of parameters to pipe function"); 2388 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_4" 2389 : "__write_pipe_4"; 2390 2391 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, I8PTy, 2392 Int32Ty, Int32Ty}; 2393 Value *Arg2 = EmitScalarExpr(E->getArg(2)), 2394 *Arg3 = EmitScalarExpr(E->getArg(3)); 2395 llvm::FunctionType *FTy = llvm::FunctionType::get( 2396 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2397 Value *BCast = Builder.CreatePointerCast(Arg3, I8PTy); 2398 // We know the third argument is an integer type, but we may need to cast 2399 // it to i32. 2400 if (Arg2->getType() != Int32Ty) 2401 Arg2 = Builder.CreateZExtOrTrunc(Arg2, Int32Ty); 2402 return RValue::get(Builder.CreateCall( 2403 CGM.CreateRuntimeFunction(FTy, Name), 2404 {Arg0, Arg1, Arg2, BCast, PacketSize, PacketAlign})); 2405 } 2406 } 2407 // OpenCL v2.0 s6.13.16 ,s9.17.3.5 - Built-in pipe reserve read and write 2408 // functions 2409 case Builtin::BIreserve_read_pipe: 2410 case Builtin::BIreserve_write_pipe: 2411 case Builtin::BIwork_group_reserve_read_pipe: 2412 case Builtin::BIwork_group_reserve_write_pipe: 2413 case Builtin::BIsub_group_reserve_read_pipe: 2414 case Builtin::BIsub_group_reserve_write_pipe: { 2415 // Composing the mangled name for the function. 2416 const char *Name; 2417 if (BuiltinID == Builtin::BIreserve_read_pipe) 2418 Name = "__reserve_read_pipe"; 2419 else if (BuiltinID == Builtin::BIreserve_write_pipe) 2420 Name = "__reserve_write_pipe"; 2421 else if (BuiltinID == Builtin::BIwork_group_reserve_read_pipe) 2422 Name = "__work_group_reserve_read_pipe"; 2423 else if (BuiltinID == Builtin::BIwork_group_reserve_write_pipe) 2424 Name = "__work_group_reserve_write_pipe"; 2425 else if (BuiltinID == Builtin::BIsub_group_reserve_read_pipe) 2426 Name = "__sub_group_reserve_read_pipe"; 2427 else 2428 Name = "__sub_group_reserve_write_pipe"; 2429 2430 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2431 *Arg1 = EmitScalarExpr(E->getArg(1)); 2432 llvm::Type *ReservedIDTy = ConvertType(getContext().OCLReserveIDTy); 2433 CGOpenCLRuntime OpenCLRT(CGM); 2434 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2435 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2436 2437 // Building the generic function prototype. 2438 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty, Int32Ty}; 2439 llvm::FunctionType *FTy = llvm::FunctionType::get( 2440 ReservedIDTy, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2441 // We know the second argument is an integer type, but we may need to cast 2442 // it to i32. 2443 if (Arg1->getType() != Int32Ty) 2444 Arg1 = Builder.CreateZExtOrTrunc(Arg1, Int32Ty); 2445 return RValue::get( 2446 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2447 {Arg0, Arg1, PacketSize, PacketAlign})); 2448 } 2449 // OpenCL v2.0 s6.13.16, s9.17.3.5 - Built-in pipe commit read and write 2450 // functions 2451 case Builtin::BIcommit_read_pipe: 2452 case Builtin::BIcommit_write_pipe: 2453 case Builtin::BIwork_group_commit_read_pipe: 2454 case Builtin::BIwork_group_commit_write_pipe: 2455 case Builtin::BIsub_group_commit_read_pipe: 2456 case Builtin::BIsub_group_commit_write_pipe: { 2457 const char *Name; 2458 if (BuiltinID == Builtin::BIcommit_read_pipe) 2459 Name = "__commit_read_pipe"; 2460 else if (BuiltinID == Builtin::BIcommit_write_pipe) 2461 Name = "__commit_write_pipe"; 2462 else if (BuiltinID == Builtin::BIwork_group_commit_read_pipe) 2463 Name = "__work_group_commit_read_pipe"; 2464 else if (BuiltinID == Builtin::BIwork_group_commit_write_pipe) 2465 Name = "__work_group_commit_write_pipe"; 2466 else if (BuiltinID == Builtin::BIsub_group_commit_read_pipe) 2467 Name = "__sub_group_commit_read_pipe"; 2468 else 2469 Name = "__sub_group_commit_write_pipe"; 2470 2471 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2472 *Arg1 = EmitScalarExpr(E->getArg(1)); 2473 CGOpenCLRuntime OpenCLRT(CGM); 2474 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2475 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2476 2477 // Building the generic function prototype. 2478 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, Int32Ty}; 2479 llvm::FunctionType *FTy = 2480 llvm::FunctionType::get(llvm::Type::getVoidTy(getLLVMContext()), 2481 llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2482 2483 return RValue::get( 2484 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2485 {Arg0, Arg1, PacketSize, PacketAlign})); 2486 } 2487 // OpenCL v2.0 s6.13.16.4 Built-in pipe query functions 2488 case Builtin::BIget_pipe_num_packets: 2489 case Builtin::BIget_pipe_max_packets: { 2490 const char *Name; 2491 if (BuiltinID == Builtin::BIget_pipe_num_packets) 2492 Name = "__get_pipe_num_packets"; 2493 else 2494 Name = "__get_pipe_max_packets"; 2495 2496 // Building the generic function prototype. 2497 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 2498 CGOpenCLRuntime OpenCLRT(CGM); 2499 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2500 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2501 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty}; 2502 llvm::FunctionType *FTy = llvm::FunctionType::get( 2503 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2504 2505 return RValue::get(Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2506 {Arg0, PacketSize, PacketAlign})); 2507 } 2508 2509 // OpenCL v2.0 s6.13.9 - Address space qualifier functions. 2510 case Builtin::BIto_global: 2511 case Builtin::BIto_local: 2512 case Builtin::BIto_private: { 2513 auto Arg0 = EmitScalarExpr(E->getArg(0)); 2514 auto NewArgT = llvm::PointerType::get(Int8Ty, 2515 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2516 auto NewRetT = llvm::PointerType::get(Int8Ty, 2517 CGM.getContext().getTargetAddressSpace( 2518 E->getType()->getPointeeType().getAddressSpace())); 2519 auto FTy = llvm::FunctionType::get(NewRetT, {NewArgT}, false); 2520 llvm::Value *NewArg; 2521 if (Arg0->getType()->getPointerAddressSpace() != 2522 NewArgT->getPointerAddressSpace()) 2523 NewArg = Builder.CreateAddrSpaceCast(Arg0, NewArgT); 2524 else 2525 NewArg = Builder.CreateBitOrPointerCast(Arg0, NewArgT); 2526 auto NewName = std::string("__") + E->getDirectCallee()->getName().str(); 2527 auto NewCall = 2528 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, NewName), {NewArg}); 2529 return RValue::get(Builder.CreateBitOrPointerCast(NewCall, 2530 ConvertType(E->getType()))); 2531 } 2532 2533 // OpenCL v2.0, s6.13.17 - Enqueue kernel function. 2534 // It contains four different overload formats specified in Table 6.13.17.1. 2535 case Builtin::BIenqueue_kernel: { 2536 StringRef Name; // Generated function call name 2537 unsigned NumArgs = E->getNumArgs(); 2538 2539 llvm::Type *QueueTy = ConvertType(getContext().OCLQueueTy); 2540 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 2541 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2542 2543 llvm::Value *Queue = EmitScalarExpr(E->getArg(0)); 2544 llvm::Value *Flags = EmitScalarExpr(E->getArg(1)); 2545 LValue NDRangeL = EmitAggExprToLValue(E->getArg(2)); 2546 llvm::Value *Range = NDRangeL.getAddress().getPointer(); 2547 llvm::Type *RangeTy = NDRangeL.getAddress().getType(); 2548 2549 if (NumArgs == 4) { 2550 // The most basic form of the call with parameters: 2551 // queue_t, kernel_enqueue_flags_t, ndrange_t, block(void) 2552 Name = "__enqueue_kernel_basic"; 2553 llvm::Type *ArgTys[] = {QueueTy, Int32Ty, RangeTy, GenericVoidPtrTy}; 2554 llvm::FunctionType *FTy = llvm::FunctionType::get( 2555 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys, 4), false); 2556 2557 llvm::Value *Block = Builder.CreatePointerCast( 2558 EmitScalarExpr(E->getArg(3)), GenericVoidPtrTy); 2559 2560 AttrBuilder B; 2561 B.addAttribute(Attribute::ByVal); 2562 AttributeSet ByValAttrSet = 2563 AttributeSet::get(CGM.getModule().getContext(), 3U, B); 2564 2565 auto RTCall = 2566 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name, ByValAttrSet), 2567 {Queue, Flags, Range, Block}); 2568 RTCall->setAttributes(ByValAttrSet); 2569 return RValue::get(RTCall); 2570 } 2571 assert(NumArgs >= 5 && "Invalid enqueue_kernel signature"); 2572 2573 // Could have events and/or vaargs. 2574 if (E->getArg(3)->getType()->isBlockPointerType()) { 2575 // No events passed, but has variadic arguments. 2576 Name = "__enqueue_kernel_vaargs"; 2577 llvm::Value *Block = Builder.CreatePointerCast( 2578 EmitScalarExpr(E->getArg(3)), GenericVoidPtrTy); 2579 // Create a vector of the arguments, as well as a constant value to 2580 // express to the runtime the number of variadic arguments. 2581 std::vector<llvm::Value *> Args = {Queue, Flags, Range, Block, 2582 ConstantInt::get(IntTy, NumArgs - 4)}; 2583 std::vector<llvm::Type *> ArgTys = {QueueTy, IntTy, RangeTy, 2584 GenericVoidPtrTy, IntTy}; 2585 2586 // Each of the following arguments specifies the size of the corresponding 2587 // argument passed to the enqueued block. 2588 for (unsigned I = 4/*Position of the first size arg*/; I < NumArgs; ++I) 2589 Args.push_back( 2590 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(I)), SizeTy)); 2591 2592 llvm::FunctionType *FTy = llvm::FunctionType::get( 2593 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), true); 2594 return RValue::get( 2595 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2596 llvm::ArrayRef<llvm::Value *>(Args))); 2597 } 2598 // Any calls now have event arguments passed. 2599 if (NumArgs >= 7) { 2600 llvm::Type *EventTy = ConvertType(getContext().OCLClkEventTy); 2601 llvm::Type *EventPtrTy = EventTy->getPointerTo( 2602 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2603 2604 llvm::Value *NumEvents = 2605 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(3)), Int32Ty); 2606 llvm::Value *EventList = 2607 E->getArg(4)->getType()->isArrayType() 2608 ? EmitArrayToPointerDecay(E->getArg(4)).getPointer() 2609 : EmitScalarExpr(E->getArg(4)); 2610 llvm::Value *ClkEvent = EmitScalarExpr(E->getArg(5)); 2611 // Convert to generic address space. 2612 EventList = Builder.CreatePointerCast(EventList, EventPtrTy); 2613 ClkEvent = Builder.CreatePointerCast(ClkEvent, EventPtrTy); 2614 llvm::Value *Block = Builder.CreatePointerCast( 2615 EmitScalarExpr(E->getArg(6)), GenericVoidPtrTy); 2616 2617 std::vector<llvm::Type *> ArgTys = { 2618 QueueTy, Int32Ty, RangeTy, Int32Ty, 2619 EventPtrTy, EventPtrTy, GenericVoidPtrTy}; 2620 2621 std::vector<llvm::Value *> Args = {Queue, Flags, Range, NumEvents, 2622 EventList, ClkEvent, Block}; 2623 2624 if (NumArgs == 7) { 2625 // Has events but no variadics. 2626 Name = "__enqueue_kernel_basic_events"; 2627 llvm::FunctionType *FTy = llvm::FunctionType::get( 2628 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2629 return RValue::get( 2630 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2631 llvm::ArrayRef<llvm::Value *>(Args))); 2632 } 2633 // Has event info and variadics 2634 // Pass the number of variadics to the runtime function too. 2635 Args.push_back(ConstantInt::get(Int32Ty, NumArgs - 7)); 2636 ArgTys.push_back(Int32Ty); 2637 Name = "__enqueue_kernel_events_vaargs"; 2638 2639 // Each of the following arguments specifies the size of the corresponding 2640 // argument passed to the enqueued block. 2641 for (unsigned I = 7/*Position of the first size arg*/; I < NumArgs; ++I) 2642 Args.push_back( 2643 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(I)), SizeTy)); 2644 2645 llvm::FunctionType *FTy = llvm::FunctionType::get( 2646 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), true); 2647 return RValue::get( 2648 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2649 llvm::ArrayRef<llvm::Value *>(Args))); 2650 } 2651 } 2652 // OpenCL v2.0 s6.13.17.6 - Kernel query functions need bitcast of block 2653 // parameter. 2654 case Builtin::BIget_kernel_work_group_size: { 2655 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 2656 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2657 Value *Arg = EmitScalarExpr(E->getArg(0)); 2658 Arg = Builder.CreatePointerCast(Arg, GenericVoidPtrTy); 2659 return RValue::get(Builder.CreateCall( 2660 CGM.CreateRuntimeFunction( 2661 llvm::FunctionType::get(IntTy, GenericVoidPtrTy, false), 2662 "__get_kernel_work_group_size_impl"), 2663 Arg)); 2664 } 2665 case Builtin::BIget_kernel_preferred_work_group_size_multiple: { 2666 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 2667 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2668 Value *Arg = EmitScalarExpr(E->getArg(0)); 2669 Arg = Builder.CreatePointerCast(Arg, GenericVoidPtrTy); 2670 return RValue::get(Builder.CreateCall( 2671 CGM.CreateRuntimeFunction( 2672 llvm::FunctionType::get(IntTy, GenericVoidPtrTy, false), 2673 "__get_kernel_preferred_work_group_multiple_impl"), 2674 Arg)); 2675 } 2676 case Builtin::BIprintf: 2677 if (getTarget().getTriple().isNVPTX()) 2678 return EmitNVPTXDevicePrintfCallExpr(E, ReturnValue); 2679 break; 2680 case Builtin::BI__builtin_canonicalize: 2681 case Builtin::BI__builtin_canonicalizef: 2682 case Builtin::BI__builtin_canonicalizel: 2683 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::canonicalize)); 2684 2685 case Builtin::BI__builtin_thread_pointer: { 2686 if (!getContext().getTargetInfo().isTLSSupported()) 2687 CGM.ErrorUnsupported(E, "__builtin_thread_pointer"); 2688 // Fall through - it's already mapped to the intrinsic by GCCBuiltin. 2689 break; 2690 } 2691 case Builtin::BI__builtin_os_log_format: { 2692 assert(E->getNumArgs() >= 2 && 2693 "__builtin_os_log_format takes at least 2 arguments"); 2694 analyze_os_log::OSLogBufferLayout Layout; 2695 analyze_os_log::computeOSLogBufferLayout(CGM.getContext(), E, Layout); 2696 Address BufAddr = EmitPointerWithAlignment(E->getArg(0)); 2697 // Ignore argument 1, the format string. It is not currently used. 2698 CharUnits Offset; 2699 Builder.CreateStore( 2700 Builder.getInt8(Layout.getSummaryByte()), 2701 Builder.CreateConstByteGEP(BufAddr, Offset++, "summary")); 2702 Builder.CreateStore( 2703 Builder.getInt8(Layout.getNumArgsByte()), 2704 Builder.CreateConstByteGEP(BufAddr, Offset++, "numArgs")); 2705 2706 llvm::SmallVector<llvm::Value *, 4> RetainableOperands; 2707 for (const auto &Item : Layout.Items) { 2708 Builder.CreateStore( 2709 Builder.getInt8(Item.getDescriptorByte()), 2710 Builder.CreateConstByteGEP(BufAddr, Offset++, "argDescriptor")); 2711 Builder.CreateStore( 2712 Builder.getInt8(Item.getSizeByte()), 2713 Builder.CreateConstByteGEP(BufAddr, Offset++, "argSize")); 2714 Address Addr = Builder.CreateConstByteGEP(BufAddr, Offset); 2715 if (const Expr *TheExpr = Item.getExpr()) { 2716 Addr = Builder.CreateElementBitCast( 2717 Addr, ConvertTypeForMem(TheExpr->getType())); 2718 // Check if this is a retainable type. 2719 if (TheExpr->getType()->isObjCRetainableType()) { 2720 assert(getEvaluationKind(TheExpr->getType()) == TEK_Scalar && 2721 "Only scalar can be a ObjC retainable type"); 2722 llvm::Value *SV = EmitScalarExpr(TheExpr, /*Ignore*/ false); 2723 RValue RV = RValue::get(SV); 2724 LValue LV = MakeAddrLValue(Addr, TheExpr->getType()); 2725 EmitStoreThroughLValue(RV, LV); 2726 // Check if the object is constant, if not, save it in 2727 // RetainableOperands. 2728 if (!isa<Constant>(SV)) 2729 RetainableOperands.push_back(SV); 2730 } else { 2731 EmitAnyExprToMem(TheExpr, Addr, Qualifiers(), /*isInit*/ true); 2732 } 2733 } else { 2734 Addr = Builder.CreateElementBitCast(Addr, Int32Ty); 2735 Builder.CreateStore( 2736 Builder.getInt32(Item.getConstValue().getQuantity()), Addr); 2737 } 2738 Offset += Item.size(); 2739 } 2740 2741 // Push a clang.arc.use cleanup for each object in RetainableOperands. The 2742 // cleanup will cause the use to appear after the final log call, keeping 2743 // the object valid while it’s held in the log buffer. Note that if there’s 2744 // a release cleanup on the object, it will already be active; since 2745 // cleanups are emitted in reverse order, the use will occur before the 2746 // object is released. 2747 if (!RetainableOperands.empty() && getLangOpts().ObjCAutoRefCount && 2748 CGM.getCodeGenOpts().OptimizationLevel != 0) 2749 for (llvm::Value *object : RetainableOperands) 2750 pushFullExprCleanup<CallObjCArcUse>(getARCCleanupKind(), object); 2751 2752 return RValue::get(BufAddr.getPointer()); 2753 } 2754 2755 case Builtin::BI__builtin_os_log_format_buffer_size: { 2756 analyze_os_log::OSLogBufferLayout Layout; 2757 analyze_os_log::computeOSLogBufferLayout(CGM.getContext(), E, Layout); 2758 return RValue::get(ConstantInt::get(ConvertType(E->getType()), 2759 Layout.size().getQuantity())); 2760 } 2761 } 2762 2763 // If this is an alias for a lib function (e.g. __builtin_sin), emit 2764 // the call using the normal call path, but using the unmangled 2765 // version of the function name. 2766 if (getContext().BuiltinInfo.isLibFunction(BuiltinID)) 2767 return emitLibraryCall(*this, FD, E, 2768 CGM.getBuiltinLibFunction(FD, BuiltinID)); 2769 2770 // If this is a predefined lib function (e.g. malloc), emit the call 2771 // using exactly the normal call path. 2772 if (getContext().BuiltinInfo.isPredefinedLibFunction(BuiltinID)) 2773 return emitLibraryCall(*this, FD, E, 2774 cast<llvm::Constant>(EmitScalarExpr(E->getCallee()))); 2775 2776 // Check that a call to a target specific builtin has the correct target 2777 // features. 2778 // This is down here to avoid non-target specific builtins, however, if 2779 // generic builtins start to require generic target features then we 2780 // can move this up to the beginning of the function. 2781 checkTargetFeatures(E, FD); 2782 2783 // See if we have a target specific intrinsic. 2784 const char *Name = getContext().BuiltinInfo.getName(BuiltinID); 2785 Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; 2786 StringRef Prefix = 2787 llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch()); 2788 if (!Prefix.empty()) { 2789 IntrinsicID = Intrinsic::getIntrinsicForGCCBuiltin(Prefix.data(), Name); 2790 // NOTE we dont need to perform a compatibility flag check here since the 2791 // intrinsics are declared in Builtins*.def via LANGBUILTIN which filter the 2792 // MS builtins via ALL_MS_LANGUAGES and are filtered earlier. 2793 if (IntrinsicID == Intrinsic::not_intrinsic) 2794 IntrinsicID = Intrinsic::getIntrinsicForMSBuiltin(Prefix.data(), Name); 2795 } 2796 2797 if (IntrinsicID != Intrinsic::not_intrinsic) { 2798 SmallVector<Value*, 16> Args; 2799 2800 // Find out if any arguments are required to be integer constant 2801 // expressions. 2802 unsigned ICEArguments = 0; 2803 ASTContext::GetBuiltinTypeError Error; 2804 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 2805 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 2806 2807 Function *F = CGM.getIntrinsic(IntrinsicID); 2808 llvm::FunctionType *FTy = F->getFunctionType(); 2809 2810 for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) { 2811 Value *ArgValue; 2812 // If this is a normal argument, just emit it as a scalar. 2813 if ((ICEArguments & (1 << i)) == 0) { 2814 ArgValue = EmitScalarExpr(E->getArg(i)); 2815 } else { 2816 // If this is required to be a constant, constant fold it so that we 2817 // know that the generated intrinsic gets a ConstantInt. 2818 llvm::APSInt Result; 2819 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result,getContext()); 2820 assert(IsConst && "Constant arg isn't actually constant?"); 2821 (void)IsConst; 2822 ArgValue = llvm::ConstantInt::get(getLLVMContext(), Result); 2823 } 2824 2825 // If the intrinsic arg type is different from the builtin arg type 2826 // we need to do a bit cast. 2827 llvm::Type *PTy = FTy->getParamType(i); 2828 if (PTy != ArgValue->getType()) { 2829 assert(PTy->canLosslesslyBitCastTo(FTy->getParamType(i)) && 2830 "Must be able to losslessly bit cast to param"); 2831 ArgValue = Builder.CreateBitCast(ArgValue, PTy); 2832 } 2833 2834 Args.push_back(ArgValue); 2835 } 2836 2837 Value *V = Builder.CreateCall(F, Args); 2838 QualType BuiltinRetType = E->getType(); 2839 2840 llvm::Type *RetTy = VoidTy; 2841 if (!BuiltinRetType->isVoidType()) 2842 RetTy = ConvertType(BuiltinRetType); 2843 2844 if (RetTy != V->getType()) { 2845 assert(V->getType()->canLosslesslyBitCastTo(RetTy) && 2846 "Must be able to losslessly bit cast result type"); 2847 V = Builder.CreateBitCast(V, RetTy); 2848 } 2849 2850 return RValue::get(V); 2851 } 2852 2853 // See if we have a target specific builtin that needs to be lowered. 2854 if (Value *V = EmitTargetBuiltinExpr(BuiltinID, E)) 2855 return RValue::get(V); 2856 2857 ErrorUnsupported(E, "builtin function"); 2858 2859 // Unknown builtin, for now just dump it out and return undef. 2860 return GetUndefRValue(E->getType()); 2861 } 2862 2863 static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF, 2864 unsigned BuiltinID, const CallExpr *E, 2865 llvm::Triple::ArchType Arch) { 2866 switch (Arch) { 2867 case llvm::Triple::arm: 2868 case llvm::Triple::armeb: 2869 case llvm::Triple::thumb: 2870 case llvm::Triple::thumbeb: 2871 return CGF->EmitARMBuiltinExpr(BuiltinID, E); 2872 case llvm::Triple::aarch64: 2873 case llvm::Triple::aarch64_be: 2874 return CGF->EmitAArch64BuiltinExpr(BuiltinID, E); 2875 case llvm::Triple::x86: 2876 case llvm::Triple::x86_64: 2877 return CGF->EmitX86BuiltinExpr(BuiltinID, E); 2878 case llvm::Triple::ppc: 2879 case llvm::Triple::ppc64: 2880 case llvm::Triple::ppc64le: 2881 return CGF->EmitPPCBuiltinExpr(BuiltinID, E); 2882 case llvm::Triple::r600: 2883 case llvm::Triple::amdgcn: 2884 return CGF->EmitAMDGPUBuiltinExpr(BuiltinID, E); 2885 case llvm::Triple::systemz: 2886 return CGF->EmitSystemZBuiltinExpr(BuiltinID, E); 2887 case llvm::Triple::nvptx: 2888 case llvm::Triple::nvptx64: 2889 return CGF->EmitNVPTXBuiltinExpr(BuiltinID, E); 2890 case llvm::Triple::wasm32: 2891 case llvm::Triple::wasm64: 2892 return CGF->EmitWebAssemblyBuiltinExpr(BuiltinID, E); 2893 default: 2894 return nullptr; 2895 } 2896 } 2897 2898 Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID, 2899 const CallExpr *E) { 2900 if (getContext().BuiltinInfo.isAuxBuiltinID(BuiltinID)) { 2901 assert(getContext().getAuxTargetInfo() && "Missing aux target info"); 2902 return EmitTargetArchBuiltinExpr( 2903 this, getContext().BuiltinInfo.getAuxBuiltinID(BuiltinID), E, 2904 getContext().getAuxTargetInfo()->getTriple().getArch()); 2905 } 2906 2907 return EmitTargetArchBuiltinExpr(this, BuiltinID, E, 2908 getTarget().getTriple().getArch()); 2909 } 2910 2911 static llvm::VectorType *GetNeonType(CodeGenFunction *CGF, 2912 NeonTypeFlags TypeFlags, 2913 bool V1Ty=false) { 2914 int IsQuad = TypeFlags.isQuad(); 2915 switch (TypeFlags.getEltType()) { 2916 case NeonTypeFlags::Int8: 2917 case NeonTypeFlags::Poly8: 2918 return llvm::VectorType::get(CGF->Int8Ty, V1Ty ? 1 : (8 << IsQuad)); 2919 case NeonTypeFlags::Int16: 2920 case NeonTypeFlags::Poly16: 2921 case NeonTypeFlags::Float16: 2922 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 2923 case NeonTypeFlags::Int32: 2924 return llvm::VectorType::get(CGF->Int32Ty, V1Ty ? 1 : (2 << IsQuad)); 2925 case NeonTypeFlags::Int64: 2926 case NeonTypeFlags::Poly64: 2927 return llvm::VectorType::get(CGF->Int64Ty, V1Ty ? 1 : (1 << IsQuad)); 2928 case NeonTypeFlags::Poly128: 2929 // FIXME: i128 and f128 doesn't get fully support in Clang and llvm. 2930 // There is a lot of i128 and f128 API missing. 2931 // so we use v16i8 to represent poly128 and get pattern matched. 2932 return llvm::VectorType::get(CGF->Int8Ty, 16); 2933 case NeonTypeFlags::Float32: 2934 return llvm::VectorType::get(CGF->FloatTy, V1Ty ? 1 : (2 << IsQuad)); 2935 case NeonTypeFlags::Float64: 2936 return llvm::VectorType::get(CGF->DoubleTy, V1Ty ? 1 : (1 << IsQuad)); 2937 } 2938 llvm_unreachable("Unknown vector element type!"); 2939 } 2940 2941 static llvm::VectorType *GetFloatNeonType(CodeGenFunction *CGF, 2942 NeonTypeFlags IntTypeFlags) { 2943 int IsQuad = IntTypeFlags.isQuad(); 2944 switch (IntTypeFlags.getEltType()) { 2945 case NeonTypeFlags::Int32: 2946 return llvm::VectorType::get(CGF->FloatTy, (2 << IsQuad)); 2947 case NeonTypeFlags::Int64: 2948 return llvm::VectorType::get(CGF->DoubleTy, (1 << IsQuad)); 2949 default: 2950 llvm_unreachable("Type can't be converted to floating-point!"); 2951 } 2952 } 2953 2954 Value *CodeGenFunction::EmitNeonSplat(Value *V, Constant *C) { 2955 unsigned nElts = V->getType()->getVectorNumElements(); 2956 Value* SV = llvm::ConstantVector::getSplat(nElts, C); 2957 return Builder.CreateShuffleVector(V, V, SV, "lane"); 2958 } 2959 2960 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, 2961 const char *name, 2962 unsigned shift, bool rightshift) { 2963 unsigned j = 0; 2964 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 2965 ai != ae; ++ai, ++j) 2966 if (shift > 0 && shift == j) 2967 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); 2968 else 2969 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); 2970 2971 return Builder.CreateCall(F, Ops, name); 2972 } 2973 2974 Value *CodeGenFunction::EmitNeonShiftVector(Value *V, llvm::Type *Ty, 2975 bool neg) { 2976 int SV = cast<ConstantInt>(V)->getSExtValue(); 2977 return ConstantInt::get(Ty, neg ? -SV : SV); 2978 } 2979 2980 // \brief Right-shift a vector by a constant. 2981 Value *CodeGenFunction::EmitNeonRShiftImm(Value *Vec, Value *Shift, 2982 llvm::Type *Ty, bool usgn, 2983 const char *name) { 2984 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 2985 2986 int ShiftAmt = cast<ConstantInt>(Shift)->getSExtValue(); 2987 int EltSize = VTy->getScalarSizeInBits(); 2988 2989 Vec = Builder.CreateBitCast(Vec, Ty); 2990 2991 // lshr/ashr are undefined when the shift amount is equal to the vector 2992 // element size. 2993 if (ShiftAmt == EltSize) { 2994 if (usgn) { 2995 // Right-shifting an unsigned value by its size yields 0. 2996 return llvm::ConstantAggregateZero::get(VTy); 2997 } else { 2998 // Right-shifting a signed value by its size is equivalent 2999 // to a shift of size-1. 3000 --ShiftAmt; 3001 Shift = ConstantInt::get(VTy->getElementType(), ShiftAmt); 3002 } 3003 } 3004 3005 Shift = EmitNeonShiftVector(Shift, Ty, false); 3006 if (usgn) 3007 return Builder.CreateLShr(Vec, Shift, name); 3008 else 3009 return Builder.CreateAShr(Vec, Shift, name); 3010 } 3011 3012 enum { 3013 AddRetType = (1 << 0), 3014 Add1ArgType = (1 << 1), 3015 Add2ArgTypes = (1 << 2), 3016 3017 VectorizeRetType = (1 << 3), 3018 VectorizeArgTypes = (1 << 4), 3019 3020 InventFloatType = (1 << 5), 3021 UnsignedAlts = (1 << 6), 3022 3023 Use64BitVectors = (1 << 7), 3024 Use128BitVectors = (1 << 8), 3025 3026 Vectorize1ArgType = Add1ArgType | VectorizeArgTypes, 3027 VectorRet = AddRetType | VectorizeRetType, 3028 VectorRetGetArgs01 = 3029 AddRetType | Add2ArgTypes | VectorizeRetType | VectorizeArgTypes, 3030 FpCmpzModifiers = 3031 AddRetType | VectorizeRetType | Add1ArgType | InventFloatType 3032 }; 3033 3034 namespace { 3035 struct NeonIntrinsicInfo { 3036 const char *NameHint; 3037 unsigned BuiltinID; 3038 unsigned LLVMIntrinsic; 3039 unsigned AltLLVMIntrinsic; 3040 unsigned TypeModifier; 3041 3042 bool operator<(unsigned RHSBuiltinID) const { 3043 return BuiltinID < RHSBuiltinID; 3044 } 3045 bool operator<(const NeonIntrinsicInfo &TE) const { 3046 return BuiltinID < TE.BuiltinID; 3047 } 3048 }; 3049 } // end anonymous namespace 3050 3051 #define NEONMAP0(NameBase) \ 3052 { #NameBase, NEON::BI__builtin_neon_ ## NameBase, 0, 0, 0 } 3053 3054 #define NEONMAP1(NameBase, LLVMIntrinsic, TypeModifier) \ 3055 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 3056 Intrinsic::LLVMIntrinsic, 0, TypeModifier } 3057 3058 #define NEONMAP2(NameBase, LLVMIntrinsic, AltLLVMIntrinsic, TypeModifier) \ 3059 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 3060 Intrinsic::LLVMIntrinsic, Intrinsic::AltLLVMIntrinsic, \ 3061 TypeModifier } 3062 3063 static const NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = { 3064 NEONMAP2(vabd_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 3065 NEONMAP2(vabdq_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 3066 NEONMAP1(vabs_v, arm_neon_vabs, 0), 3067 NEONMAP1(vabsq_v, arm_neon_vabs, 0), 3068 NEONMAP0(vaddhn_v), 3069 NEONMAP1(vaesdq_v, arm_neon_aesd, 0), 3070 NEONMAP1(vaeseq_v, arm_neon_aese, 0), 3071 NEONMAP1(vaesimcq_v, arm_neon_aesimc, 0), 3072 NEONMAP1(vaesmcq_v, arm_neon_aesmc, 0), 3073 NEONMAP1(vbsl_v, arm_neon_vbsl, AddRetType), 3074 NEONMAP1(vbslq_v, arm_neon_vbsl, AddRetType), 3075 NEONMAP1(vcage_v, arm_neon_vacge, 0), 3076 NEONMAP1(vcageq_v, arm_neon_vacge, 0), 3077 NEONMAP1(vcagt_v, arm_neon_vacgt, 0), 3078 NEONMAP1(vcagtq_v, arm_neon_vacgt, 0), 3079 NEONMAP1(vcale_v, arm_neon_vacge, 0), 3080 NEONMAP1(vcaleq_v, arm_neon_vacge, 0), 3081 NEONMAP1(vcalt_v, arm_neon_vacgt, 0), 3082 NEONMAP1(vcaltq_v, arm_neon_vacgt, 0), 3083 NEONMAP1(vcls_v, arm_neon_vcls, Add1ArgType), 3084 NEONMAP1(vclsq_v, arm_neon_vcls, Add1ArgType), 3085 NEONMAP1(vclz_v, ctlz, Add1ArgType), 3086 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 3087 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 3088 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 3089 NEONMAP1(vcvt_f16_f32, arm_neon_vcvtfp2hf, 0), 3090 NEONMAP1(vcvt_f32_f16, arm_neon_vcvthf2fp, 0), 3091 NEONMAP0(vcvt_f32_v), 3092 NEONMAP2(vcvt_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3093 NEONMAP1(vcvt_n_s32_v, arm_neon_vcvtfp2fxs, 0), 3094 NEONMAP1(vcvt_n_s64_v, arm_neon_vcvtfp2fxs, 0), 3095 NEONMAP1(vcvt_n_u32_v, arm_neon_vcvtfp2fxu, 0), 3096 NEONMAP1(vcvt_n_u64_v, arm_neon_vcvtfp2fxu, 0), 3097 NEONMAP0(vcvt_s32_v), 3098 NEONMAP0(vcvt_s64_v), 3099 NEONMAP0(vcvt_u32_v), 3100 NEONMAP0(vcvt_u64_v), 3101 NEONMAP1(vcvta_s32_v, arm_neon_vcvtas, 0), 3102 NEONMAP1(vcvta_s64_v, arm_neon_vcvtas, 0), 3103 NEONMAP1(vcvta_u32_v, arm_neon_vcvtau, 0), 3104 NEONMAP1(vcvta_u64_v, arm_neon_vcvtau, 0), 3105 NEONMAP1(vcvtaq_s32_v, arm_neon_vcvtas, 0), 3106 NEONMAP1(vcvtaq_s64_v, arm_neon_vcvtas, 0), 3107 NEONMAP1(vcvtaq_u32_v, arm_neon_vcvtau, 0), 3108 NEONMAP1(vcvtaq_u64_v, arm_neon_vcvtau, 0), 3109 NEONMAP1(vcvtm_s32_v, arm_neon_vcvtms, 0), 3110 NEONMAP1(vcvtm_s64_v, arm_neon_vcvtms, 0), 3111 NEONMAP1(vcvtm_u32_v, arm_neon_vcvtmu, 0), 3112 NEONMAP1(vcvtm_u64_v, arm_neon_vcvtmu, 0), 3113 NEONMAP1(vcvtmq_s32_v, arm_neon_vcvtms, 0), 3114 NEONMAP1(vcvtmq_s64_v, arm_neon_vcvtms, 0), 3115 NEONMAP1(vcvtmq_u32_v, arm_neon_vcvtmu, 0), 3116 NEONMAP1(vcvtmq_u64_v, arm_neon_vcvtmu, 0), 3117 NEONMAP1(vcvtn_s32_v, arm_neon_vcvtns, 0), 3118 NEONMAP1(vcvtn_s64_v, arm_neon_vcvtns, 0), 3119 NEONMAP1(vcvtn_u32_v, arm_neon_vcvtnu, 0), 3120 NEONMAP1(vcvtn_u64_v, arm_neon_vcvtnu, 0), 3121 NEONMAP1(vcvtnq_s32_v, arm_neon_vcvtns, 0), 3122 NEONMAP1(vcvtnq_s64_v, arm_neon_vcvtns, 0), 3123 NEONMAP1(vcvtnq_u32_v, arm_neon_vcvtnu, 0), 3124 NEONMAP1(vcvtnq_u64_v, arm_neon_vcvtnu, 0), 3125 NEONMAP1(vcvtp_s32_v, arm_neon_vcvtps, 0), 3126 NEONMAP1(vcvtp_s64_v, arm_neon_vcvtps, 0), 3127 NEONMAP1(vcvtp_u32_v, arm_neon_vcvtpu, 0), 3128 NEONMAP1(vcvtp_u64_v, arm_neon_vcvtpu, 0), 3129 NEONMAP1(vcvtpq_s32_v, arm_neon_vcvtps, 0), 3130 NEONMAP1(vcvtpq_s64_v, arm_neon_vcvtps, 0), 3131 NEONMAP1(vcvtpq_u32_v, arm_neon_vcvtpu, 0), 3132 NEONMAP1(vcvtpq_u64_v, arm_neon_vcvtpu, 0), 3133 NEONMAP0(vcvtq_f32_v), 3134 NEONMAP2(vcvtq_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3135 NEONMAP1(vcvtq_n_s32_v, arm_neon_vcvtfp2fxs, 0), 3136 NEONMAP1(vcvtq_n_s64_v, arm_neon_vcvtfp2fxs, 0), 3137 NEONMAP1(vcvtq_n_u32_v, arm_neon_vcvtfp2fxu, 0), 3138 NEONMAP1(vcvtq_n_u64_v, arm_neon_vcvtfp2fxu, 0), 3139 NEONMAP0(vcvtq_s32_v), 3140 NEONMAP0(vcvtq_s64_v), 3141 NEONMAP0(vcvtq_u32_v), 3142 NEONMAP0(vcvtq_u64_v), 3143 NEONMAP0(vext_v), 3144 NEONMAP0(vextq_v), 3145 NEONMAP0(vfma_v), 3146 NEONMAP0(vfmaq_v), 3147 NEONMAP2(vhadd_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 3148 NEONMAP2(vhaddq_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 3149 NEONMAP2(vhsub_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 3150 NEONMAP2(vhsubq_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 3151 NEONMAP0(vld1_dup_v), 3152 NEONMAP1(vld1_v, arm_neon_vld1, 0), 3153 NEONMAP0(vld1q_dup_v), 3154 NEONMAP1(vld1q_v, arm_neon_vld1, 0), 3155 NEONMAP1(vld2_lane_v, arm_neon_vld2lane, 0), 3156 NEONMAP1(vld2_v, arm_neon_vld2, 0), 3157 NEONMAP1(vld2q_lane_v, arm_neon_vld2lane, 0), 3158 NEONMAP1(vld2q_v, arm_neon_vld2, 0), 3159 NEONMAP1(vld3_lane_v, arm_neon_vld3lane, 0), 3160 NEONMAP1(vld3_v, arm_neon_vld3, 0), 3161 NEONMAP1(vld3q_lane_v, arm_neon_vld3lane, 0), 3162 NEONMAP1(vld3q_v, arm_neon_vld3, 0), 3163 NEONMAP1(vld4_lane_v, arm_neon_vld4lane, 0), 3164 NEONMAP1(vld4_v, arm_neon_vld4, 0), 3165 NEONMAP1(vld4q_lane_v, arm_neon_vld4lane, 0), 3166 NEONMAP1(vld4q_v, arm_neon_vld4, 0), 3167 NEONMAP2(vmax_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 3168 NEONMAP1(vmaxnm_v, arm_neon_vmaxnm, Add1ArgType), 3169 NEONMAP1(vmaxnmq_v, arm_neon_vmaxnm, Add1ArgType), 3170 NEONMAP2(vmaxq_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 3171 NEONMAP2(vmin_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 3172 NEONMAP1(vminnm_v, arm_neon_vminnm, Add1ArgType), 3173 NEONMAP1(vminnmq_v, arm_neon_vminnm, Add1ArgType), 3174 NEONMAP2(vminq_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 3175 NEONMAP0(vmovl_v), 3176 NEONMAP0(vmovn_v), 3177 NEONMAP1(vmul_v, arm_neon_vmulp, Add1ArgType), 3178 NEONMAP0(vmull_v), 3179 NEONMAP1(vmulq_v, arm_neon_vmulp, Add1ArgType), 3180 NEONMAP2(vpadal_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 3181 NEONMAP2(vpadalq_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 3182 NEONMAP1(vpadd_v, arm_neon_vpadd, Add1ArgType), 3183 NEONMAP2(vpaddl_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 3184 NEONMAP2(vpaddlq_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 3185 NEONMAP1(vpaddq_v, arm_neon_vpadd, Add1ArgType), 3186 NEONMAP2(vpmax_v, arm_neon_vpmaxu, arm_neon_vpmaxs, Add1ArgType | UnsignedAlts), 3187 NEONMAP2(vpmin_v, arm_neon_vpminu, arm_neon_vpmins, Add1ArgType | UnsignedAlts), 3188 NEONMAP1(vqabs_v, arm_neon_vqabs, Add1ArgType), 3189 NEONMAP1(vqabsq_v, arm_neon_vqabs, Add1ArgType), 3190 NEONMAP2(vqadd_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 3191 NEONMAP2(vqaddq_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 3192 NEONMAP2(vqdmlal_v, arm_neon_vqdmull, arm_neon_vqadds, 0), 3193 NEONMAP2(vqdmlsl_v, arm_neon_vqdmull, arm_neon_vqsubs, 0), 3194 NEONMAP1(vqdmulh_v, arm_neon_vqdmulh, Add1ArgType), 3195 NEONMAP1(vqdmulhq_v, arm_neon_vqdmulh, Add1ArgType), 3196 NEONMAP1(vqdmull_v, arm_neon_vqdmull, Add1ArgType), 3197 NEONMAP2(vqmovn_v, arm_neon_vqmovnu, arm_neon_vqmovns, Add1ArgType | UnsignedAlts), 3198 NEONMAP1(vqmovun_v, arm_neon_vqmovnsu, Add1ArgType), 3199 NEONMAP1(vqneg_v, arm_neon_vqneg, Add1ArgType), 3200 NEONMAP1(vqnegq_v, arm_neon_vqneg, Add1ArgType), 3201 NEONMAP1(vqrdmulh_v, arm_neon_vqrdmulh, Add1ArgType), 3202 NEONMAP1(vqrdmulhq_v, arm_neon_vqrdmulh, Add1ArgType), 3203 NEONMAP2(vqrshl_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 3204 NEONMAP2(vqrshlq_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 3205 NEONMAP2(vqshl_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 3206 NEONMAP2(vqshl_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 3207 NEONMAP2(vqshlq_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 3208 NEONMAP2(vqshlq_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 3209 NEONMAP1(vqshlu_n_v, arm_neon_vqshiftsu, 0), 3210 NEONMAP1(vqshluq_n_v, arm_neon_vqshiftsu, 0), 3211 NEONMAP2(vqsub_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 3212 NEONMAP2(vqsubq_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 3213 NEONMAP1(vraddhn_v, arm_neon_vraddhn, Add1ArgType), 3214 NEONMAP2(vrecpe_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 3215 NEONMAP2(vrecpeq_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 3216 NEONMAP1(vrecps_v, arm_neon_vrecps, Add1ArgType), 3217 NEONMAP1(vrecpsq_v, arm_neon_vrecps, Add1ArgType), 3218 NEONMAP2(vrhadd_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 3219 NEONMAP2(vrhaddq_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 3220 NEONMAP1(vrnd_v, arm_neon_vrintz, Add1ArgType), 3221 NEONMAP1(vrnda_v, arm_neon_vrinta, Add1ArgType), 3222 NEONMAP1(vrndaq_v, arm_neon_vrinta, Add1ArgType), 3223 NEONMAP1(vrndm_v, arm_neon_vrintm, Add1ArgType), 3224 NEONMAP1(vrndmq_v, arm_neon_vrintm, Add1ArgType), 3225 NEONMAP1(vrndn_v, arm_neon_vrintn, Add1ArgType), 3226 NEONMAP1(vrndnq_v, arm_neon_vrintn, Add1ArgType), 3227 NEONMAP1(vrndp_v, arm_neon_vrintp, Add1ArgType), 3228 NEONMAP1(vrndpq_v, arm_neon_vrintp, Add1ArgType), 3229 NEONMAP1(vrndq_v, arm_neon_vrintz, Add1ArgType), 3230 NEONMAP1(vrndx_v, arm_neon_vrintx, Add1ArgType), 3231 NEONMAP1(vrndxq_v, arm_neon_vrintx, Add1ArgType), 3232 NEONMAP2(vrshl_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 3233 NEONMAP2(vrshlq_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 3234 NEONMAP2(vrshr_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 3235 NEONMAP2(vrshrq_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 3236 NEONMAP2(vrsqrte_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 3237 NEONMAP2(vrsqrteq_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 3238 NEONMAP1(vrsqrts_v, arm_neon_vrsqrts, Add1ArgType), 3239 NEONMAP1(vrsqrtsq_v, arm_neon_vrsqrts, Add1ArgType), 3240 NEONMAP1(vrsubhn_v, arm_neon_vrsubhn, Add1ArgType), 3241 NEONMAP1(vsha1su0q_v, arm_neon_sha1su0, 0), 3242 NEONMAP1(vsha1su1q_v, arm_neon_sha1su1, 0), 3243 NEONMAP1(vsha256h2q_v, arm_neon_sha256h2, 0), 3244 NEONMAP1(vsha256hq_v, arm_neon_sha256h, 0), 3245 NEONMAP1(vsha256su0q_v, arm_neon_sha256su0, 0), 3246 NEONMAP1(vsha256su1q_v, arm_neon_sha256su1, 0), 3247 NEONMAP0(vshl_n_v), 3248 NEONMAP2(vshl_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 3249 NEONMAP0(vshll_n_v), 3250 NEONMAP0(vshlq_n_v), 3251 NEONMAP2(vshlq_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 3252 NEONMAP0(vshr_n_v), 3253 NEONMAP0(vshrn_n_v), 3254 NEONMAP0(vshrq_n_v), 3255 NEONMAP1(vst1_v, arm_neon_vst1, 0), 3256 NEONMAP1(vst1q_v, arm_neon_vst1, 0), 3257 NEONMAP1(vst2_lane_v, arm_neon_vst2lane, 0), 3258 NEONMAP1(vst2_v, arm_neon_vst2, 0), 3259 NEONMAP1(vst2q_lane_v, arm_neon_vst2lane, 0), 3260 NEONMAP1(vst2q_v, arm_neon_vst2, 0), 3261 NEONMAP1(vst3_lane_v, arm_neon_vst3lane, 0), 3262 NEONMAP1(vst3_v, arm_neon_vst3, 0), 3263 NEONMAP1(vst3q_lane_v, arm_neon_vst3lane, 0), 3264 NEONMAP1(vst3q_v, arm_neon_vst3, 0), 3265 NEONMAP1(vst4_lane_v, arm_neon_vst4lane, 0), 3266 NEONMAP1(vst4_v, arm_neon_vst4, 0), 3267 NEONMAP1(vst4q_lane_v, arm_neon_vst4lane, 0), 3268 NEONMAP1(vst4q_v, arm_neon_vst4, 0), 3269 NEONMAP0(vsubhn_v), 3270 NEONMAP0(vtrn_v), 3271 NEONMAP0(vtrnq_v), 3272 NEONMAP0(vtst_v), 3273 NEONMAP0(vtstq_v), 3274 NEONMAP0(vuzp_v), 3275 NEONMAP0(vuzpq_v), 3276 NEONMAP0(vzip_v), 3277 NEONMAP0(vzipq_v) 3278 }; 3279 3280 static const NeonIntrinsicInfo AArch64SIMDIntrinsicMap[] = { 3281 NEONMAP1(vabs_v, aarch64_neon_abs, 0), 3282 NEONMAP1(vabsq_v, aarch64_neon_abs, 0), 3283 NEONMAP0(vaddhn_v), 3284 NEONMAP1(vaesdq_v, aarch64_crypto_aesd, 0), 3285 NEONMAP1(vaeseq_v, aarch64_crypto_aese, 0), 3286 NEONMAP1(vaesimcq_v, aarch64_crypto_aesimc, 0), 3287 NEONMAP1(vaesmcq_v, aarch64_crypto_aesmc, 0), 3288 NEONMAP1(vcage_v, aarch64_neon_facge, 0), 3289 NEONMAP1(vcageq_v, aarch64_neon_facge, 0), 3290 NEONMAP1(vcagt_v, aarch64_neon_facgt, 0), 3291 NEONMAP1(vcagtq_v, aarch64_neon_facgt, 0), 3292 NEONMAP1(vcale_v, aarch64_neon_facge, 0), 3293 NEONMAP1(vcaleq_v, aarch64_neon_facge, 0), 3294 NEONMAP1(vcalt_v, aarch64_neon_facgt, 0), 3295 NEONMAP1(vcaltq_v, aarch64_neon_facgt, 0), 3296 NEONMAP1(vcls_v, aarch64_neon_cls, Add1ArgType), 3297 NEONMAP1(vclsq_v, aarch64_neon_cls, Add1ArgType), 3298 NEONMAP1(vclz_v, ctlz, Add1ArgType), 3299 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 3300 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 3301 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 3302 NEONMAP1(vcvt_f16_f32, aarch64_neon_vcvtfp2hf, 0), 3303 NEONMAP1(vcvt_f32_f16, aarch64_neon_vcvthf2fp, 0), 3304 NEONMAP0(vcvt_f32_v), 3305 NEONMAP2(vcvt_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3306 NEONMAP2(vcvt_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3307 NEONMAP1(vcvt_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 3308 NEONMAP1(vcvt_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 3309 NEONMAP1(vcvt_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 3310 NEONMAP1(vcvt_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 3311 NEONMAP0(vcvtq_f32_v), 3312 NEONMAP2(vcvtq_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3313 NEONMAP2(vcvtq_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3314 NEONMAP1(vcvtq_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 3315 NEONMAP1(vcvtq_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 3316 NEONMAP1(vcvtq_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 3317 NEONMAP1(vcvtq_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 3318 NEONMAP1(vcvtx_f32_v, aarch64_neon_fcvtxn, AddRetType | Add1ArgType), 3319 NEONMAP0(vext_v), 3320 NEONMAP0(vextq_v), 3321 NEONMAP0(vfma_v), 3322 NEONMAP0(vfmaq_v), 3323 NEONMAP2(vhadd_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 3324 NEONMAP2(vhaddq_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 3325 NEONMAP2(vhsub_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 3326 NEONMAP2(vhsubq_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 3327 NEONMAP0(vmovl_v), 3328 NEONMAP0(vmovn_v), 3329 NEONMAP1(vmul_v, aarch64_neon_pmul, Add1ArgType), 3330 NEONMAP1(vmulq_v, aarch64_neon_pmul, Add1ArgType), 3331 NEONMAP1(vpadd_v, aarch64_neon_addp, Add1ArgType), 3332 NEONMAP2(vpaddl_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 3333 NEONMAP2(vpaddlq_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 3334 NEONMAP1(vpaddq_v, aarch64_neon_addp, Add1ArgType), 3335 NEONMAP1(vqabs_v, aarch64_neon_sqabs, Add1ArgType), 3336 NEONMAP1(vqabsq_v, aarch64_neon_sqabs, Add1ArgType), 3337 NEONMAP2(vqadd_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 3338 NEONMAP2(vqaddq_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 3339 NEONMAP2(vqdmlal_v, aarch64_neon_sqdmull, aarch64_neon_sqadd, 0), 3340 NEONMAP2(vqdmlsl_v, aarch64_neon_sqdmull, aarch64_neon_sqsub, 0), 3341 NEONMAP1(vqdmulh_v, aarch64_neon_sqdmulh, Add1ArgType), 3342 NEONMAP1(vqdmulhq_v, aarch64_neon_sqdmulh, Add1ArgType), 3343 NEONMAP1(vqdmull_v, aarch64_neon_sqdmull, Add1ArgType), 3344 NEONMAP2(vqmovn_v, aarch64_neon_uqxtn, aarch64_neon_sqxtn, Add1ArgType | UnsignedAlts), 3345 NEONMAP1(vqmovun_v, aarch64_neon_sqxtun, Add1ArgType), 3346 NEONMAP1(vqneg_v, aarch64_neon_sqneg, Add1ArgType), 3347 NEONMAP1(vqnegq_v, aarch64_neon_sqneg, Add1ArgType), 3348 NEONMAP1(vqrdmulh_v, aarch64_neon_sqrdmulh, Add1ArgType), 3349 NEONMAP1(vqrdmulhq_v, aarch64_neon_sqrdmulh, Add1ArgType), 3350 NEONMAP2(vqrshl_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 3351 NEONMAP2(vqrshlq_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 3352 NEONMAP2(vqshl_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl, UnsignedAlts), 3353 NEONMAP2(vqshl_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 3354 NEONMAP2(vqshlq_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl,UnsignedAlts), 3355 NEONMAP2(vqshlq_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 3356 NEONMAP1(vqshlu_n_v, aarch64_neon_sqshlu, 0), 3357 NEONMAP1(vqshluq_n_v, aarch64_neon_sqshlu, 0), 3358 NEONMAP2(vqsub_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 3359 NEONMAP2(vqsubq_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 3360 NEONMAP1(vraddhn_v, aarch64_neon_raddhn, Add1ArgType), 3361 NEONMAP2(vrecpe_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 3362 NEONMAP2(vrecpeq_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 3363 NEONMAP1(vrecps_v, aarch64_neon_frecps, Add1ArgType), 3364 NEONMAP1(vrecpsq_v, aarch64_neon_frecps, Add1ArgType), 3365 NEONMAP2(vrhadd_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 3366 NEONMAP2(vrhaddq_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 3367 NEONMAP2(vrshl_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 3368 NEONMAP2(vrshlq_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 3369 NEONMAP2(vrshr_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 3370 NEONMAP2(vrshrq_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 3371 NEONMAP2(vrsqrte_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 3372 NEONMAP2(vrsqrteq_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 3373 NEONMAP1(vrsqrts_v, aarch64_neon_frsqrts, Add1ArgType), 3374 NEONMAP1(vrsqrtsq_v, aarch64_neon_frsqrts, Add1ArgType), 3375 NEONMAP1(vrsubhn_v, aarch64_neon_rsubhn, Add1ArgType), 3376 NEONMAP1(vsha1su0q_v, aarch64_crypto_sha1su0, 0), 3377 NEONMAP1(vsha1su1q_v, aarch64_crypto_sha1su1, 0), 3378 NEONMAP1(vsha256h2q_v, aarch64_crypto_sha256h2, 0), 3379 NEONMAP1(vsha256hq_v, aarch64_crypto_sha256h, 0), 3380 NEONMAP1(vsha256su0q_v, aarch64_crypto_sha256su0, 0), 3381 NEONMAP1(vsha256su1q_v, aarch64_crypto_sha256su1, 0), 3382 NEONMAP0(vshl_n_v), 3383 NEONMAP2(vshl_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 3384 NEONMAP0(vshll_n_v), 3385 NEONMAP0(vshlq_n_v), 3386 NEONMAP2(vshlq_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 3387 NEONMAP0(vshr_n_v), 3388 NEONMAP0(vshrn_n_v), 3389 NEONMAP0(vshrq_n_v), 3390 NEONMAP0(vsubhn_v), 3391 NEONMAP0(vtst_v), 3392 NEONMAP0(vtstq_v), 3393 }; 3394 3395 static const NeonIntrinsicInfo AArch64SISDIntrinsicMap[] = { 3396 NEONMAP1(vabdd_f64, aarch64_sisd_fabd, Add1ArgType), 3397 NEONMAP1(vabds_f32, aarch64_sisd_fabd, Add1ArgType), 3398 NEONMAP1(vabsd_s64, aarch64_neon_abs, Add1ArgType), 3399 NEONMAP1(vaddlv_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 3400 NEONMAP1(vaddlv_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 3401 NEONMAP1(vaddlvq_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 3402 NEONMAP1(vaddlvq_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 3403 NEONMAP1(vaddv_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 3404 NEONMAP1(vaddv_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 3405 NEONMAP1(vaddv_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3406 NEONMAP1(vaddvq_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 3407 NEONMAP1(vaddvq_f64, aarch64_neon_faddv, AddRetType | Add1ArgType), 3408 NEONMAP1(vaddvq_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 3409 NEONMAP1(vaddvq_s64, aarch64_neon_saddv, AddRetType | Add1ArgType), 3410 NEONMAP1(vaddvq_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3411 NEONMAP1(vaddvq_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3412 NEONMAP1(vcaged_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 3413 NEONMAP1(vcages_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 3414 NEONMAP1(vcagtd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 3415 NEONMAP1(vcagts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 3416 NEONMAP1(vcaled_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 3417 NEONMAP1(vcales_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 3418 NEONMAP1(vcaltd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 3419 NEONMAP1(vcalts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 3420 NEONMAP1(vcvtad_s64_f64, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 3421 NEONMAP1(vcvtad_u64_f64, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 3422 NEONMAP1(vcvtas_s32_f32, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 3423 NEONMAP1(vcvtas_u32_f32, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 3424 NEONMAP1(vcvtd_n_f64_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 3425 NEONMAP1(vcvtd_n_f64_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 3426 NEONMAP1(vcvtd_n_s64_f64, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 3427 NEONMAP1(vcvtd_n_u64_f64, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 3428 NEONMAP1(vcvtmd_s64_f64, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 3429 NEONMAP1(vcvtmd_u64_f64, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 3430 NEONMAP1(vcvtms_s32_f32, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 3431 NEONMAP1(vcvtms_u32_f32, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 3432 NEONMAP1(vcvtnd_s64_f64, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 3433 NEONMAP1(vcvtnd_u64_f64, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 3434 NEONMAP1(vcvtns_s32_f32, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 3435 NEONMAP1(vcvtns_u32_f32, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 3436 NEONMAP1(vcvtpd_s64_f64, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 3437 NEONMAP1(vcvtpd_u64_f64, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 3438 NEONMAP1(vcvtps_s32_f32, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 3439 NEONMAP1(vcvtps_u32_f32, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 3440 NEONMAP1(vcvts_n_f32_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 3441 NEONMAP1(vcvts_n_f32_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 3442 NEONMAP1(vcvts_n_s32_f32, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 3443 NEONMAP1(vcvts_n_u32_f32, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 3444 NEONMAP1(vcvtxd_f32_f64, aarch64_sisd_fcvtxn, 0), 3445 NEONMAP1(vmaxnmv_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3446 NEONMAP1(vmaxnmvq_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3447 NEONMAP1(vmaxnmvq_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3448 NEONMAP1(vmaxv_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3449 NEONMAP1(vmaxv_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 3450 NEONMAP1(vmaxv_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 3451 NEONMAP1(vmaxvq_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3452 NEONMAP1(vmaxvq_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3453 NEONMAP1(vmaxvq_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 3454 NEONMAP1(vmaxvq_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 3455 NEONMAP1(vminnmv_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3456 NEONMAP1(vminnmvq_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3457 NEONMAP1(vminnmvq_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3458 NEONMAP1(vminv_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3459 NEONMAP1(vminv_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 3460 NEONMAP1(vminv_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 3461 NEONMAP1(vminvq_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3462 NEONMAP1(vminvq_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 3463 NEONMAP1(vminvq_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 3464 NEONMAP1(vminvq_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 3465 NEONMAP1(vmull_p64, aarch64_neon_pmull64, 0), 3466 NEONMAP1(vmulxd_f64, aarch64_neon_fmulx, Add1ArgType), 3467 NEONMAP1(vmulxs_f32, aarch64_neon_fmulx, Add1ArgType), 3468 NEONMAP1(vpaddd_s64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3469 NEONMAP1(vpaddd_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3470 NEONMAP1(vpmaxnmqd_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3471 NEONMAP1(vpmaxnms_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3472 NEONMAP1(vpmaxqd_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3473 NEONMAP1(vpmaxs_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3474 NEONMAP1(vpminnmqd_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3475 NEONMAP1(vpminnms_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3476 NEONMAP1(vpminqd_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 3477 NEONMAP1(vpmins_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3478 NEONMAP1(vqabsb_s8, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 3479 NEONMAP1(vqabsd_s64, aarch64_neon_sqabs, Add1ArgType), 3480 NEONMAP1(vqabsh_s16, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 3481 NEONMAP1(vqabss_s32, aarch64_neon_sqabs, Add1ArgType), 3482 NEONMAP1(vqaddb_s8, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 3483 NEONMAP1(vqaddb_u8, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 3484 NEONMAP1(vqaddd_s64, aarch64_neon_sqadd, Add1ArgType), 3485 NEONMAP1(vqaddd_u64, aarch64_neon_uqadd, Add1ArgType), 3486 NEONMAP1(vqaddh_s16, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 3487 NEONMAP1(vqaddh_u16, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 3488 NEONMAP1(vqadds_s32, aarch64_neon_sqadd, Add1ArgType), 3489 NEONMAP1(vqadds_u32, aarch64_neon_uqadd, Add1ArgType), 3490 NEONMAP1(vqdmulhh_s16, aarch64_neon_sqdmulh, Vectorize1ArgType | Use64BitVectors), 3491 NEONMAP1(vqdmulhs_s32, aarch64_neon_sqdmulh, Add1ArgType), 3492 NEONMAP1(vqdmullh_s16, aarch64_neon_sqdmull, VectorRet | Use128BitVectors), 3493 NEONMAP1(vqdmulls_s32, aarch64_neon_sqdmulls_scalar, 0), 3494 NEONMAP1(vqmovnd_s64, aarch64_neon_scalar_sqxtn, AddRetType | Add1ArgType), 3495 NEONMAP1(vqmovnd_u64, aarch64_neon_scalar_uqxtn, AddRetType | Add1ArgType), 3496 NEONMAP1(vqmovnh_s16, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 3497 NEONMAP1(vqmovnh_u16, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 3498 NEONMAP1(vqmovns_s32, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 3499 NEONMAP1(vqmovns_u32, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 3500 NEONMAP1(vqmovund_s64, aarch64_neon_scalar_sqxtun, AddRetType | Add1ArgType), 3501 NEONMAP1(vqmovunh_s16, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 3502 NEONMAP1(vqmovuns_s32, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 3503 NEONMAP1(vqnegb_s8, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 3504 NEONMAP1(vqnegd_s64, aarch64_neon_sqneg, Add1ArgType), 3505 NEONMAP1(vqnegh_s16, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 3506 NEONMAP1(vqnegs_s32, aarch64_neon_sqneg, Add1ArgType), 3507 NEONMAP1(vqrdmulhh_s16, aarch64_neon_sqrdmulh, Vectorize1ArgType | Use64BitVectors), 3508 NEONMAP1(vqrdmulhs_s32, aarch64_neon_sqrdmulh, Add1ArgType), 3509 NEONMAP1(vqrshlb_s8, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 3510 NEONMAP1(vqrshlb_u8, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 3511 NEONMAP1(vqrshld_s64, aarch64_neon_sqrshl, Add1ArgType), 3512 NEONMAP1(vqrshld_u64, aarch64_neon_uqrshl, Add1ArgType), 3513 NEONMAP1(vqrshlh_s16, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 3514 NEONMAP1(vqrshlh_u16, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 3515 NEONMAP1(vqrshls_s32, aarch64_neon_sqrshl, Add1ArgType), 3516 NEONMAP1(vqrshls_u32, aarch64_neon_uqrshl, Add1ArgType), 3517 NEONMAP1(vqrshrnd_n_s64, aarch64_neon_sqrshrn, AddRetType), 3518 NEONMAP1(vqrshrnd_n_u64, aarch64_neon_uqrshrn, AddRetType), 3519 NEONMAP1(vqrshrnh_n_s16, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 3520 NEONMAP1(vqrshrnh_n_u16, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 3521 NEONMAP1(vqrshrns_n_s32, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 3522 NEONMAP1(vqrshrns_n_u32, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 3523 NEONMAP1(vqrshrund_n_s64, aarch64_neon_sqrshrun, AddRetType), 3524 NEONMAP1(vqrshrunh_n_s16, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 3525 NEONMAP1(vqrshruns_n_s32, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 3526 NEONMAP1(vqshlb_n_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3527 NEONMAP1(vqshlb_n_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3528 NEONMAP1(vqshlb_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3529 NEONMAP1(vqshlb_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3530 NEONMAP1(vqshld_s64, aarch64_neon_sqshl, Add1ArgType), 3531 NEONMAP1(vqshld_u64, aarch64_neon_uqshl, Add1ArgType), 3532 NEONMAP1(vqshlh_n_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3533 NEONMAP1(vqshlh_n_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3534 NEONMAP1(vqshlh_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3535 NEONMAP1(vqshlh_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3536 NEONMAP1(vqshls_n_s32, aarch64_neon_sqshl, Add1ArgType), 3537 NEONMAP1(vqshls_n_u32, aarch64_neon_uqshl, Add1ArgType), 3538 NEONMAP1(vqshls_s32, aarch64_neon_sqshl, Add1ArgType), 3539 NEONMAP1(vqshls_u32, aarch64_neon_uqshl, Add1ArgType), 3540 NEONMAP1(vqshlub_n_s8, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 3541 NEONMAP1(vqshluh_n_s16, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 3542 NEONMAP1(vqshlus_n_s32, aarch64_neon_sqshlu, Add1ArgType), 3543 NEONMAP1(vqshrnd_n_s64, aarch64_neon_sqshrn, AddRetType), 3544 NEONMAP1(vqshrnd_n_u64, aarch64_neon_uqshrn, AddRetType), 3545 NEONMAP1(vqshrnh_n_s16, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 3546 NEONMAP1(vqshrnh_n_u16, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 3547 NEONMAP1(vqshrns_n_s32, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 3548 NEONMAP1(vqshrns_n_u32, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 3549 NEONMAP1(vqshrund_n_s64, aarch64_neon_sqshrun, AddRetType), 3550 NEONMAP1(vqshrunh_n_s16, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 3551 NEONMAP1(vqshruns_n_s32, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 3552 NEONMAP1(vqsubb_s8, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 3553 NEONMAP1(vqsubb_u8, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 3554 NEONMAP1(vqsubd_s64, aarch64_neon_sqsub, Add1ArgType), 3555 NEONMAP1(vqsubd_u64, aarch64_neon_uqsub, Add1ArgType), 3556 NEONMAP1(vqsubh_s16, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 3557 NEONMAP1(vqsubh_u16, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 3558 NEONMAP1(vqsubs_s32, aarch64_neon_sqsub, Add1ArgType), 3559 NEONMAP1(vqsubs_u32, aarch64_neon_uqsub, Add1ArgType), 3560 NEONMAP1(vrecped_f64, aarch64_neon_frecpe, Add1ArgType), 3561 NEONMAP1(vrecpes_f32, aarch64_neon_frecpe, Add1ArgType), 3562 NEONMAP1(vrecpxd_f64, aarch64_neon_frecpx, Add1ArgType), 3563 NEONMAP1(vrecpxs_f32, aarch64_neon_frecpx, Add1ArgType), 3564 NEONMAP1(vrshld_s64, aarch64_neon_srshl, Add1ArgType), 3565 NEONMAP1(vrshld_u64, aarch64_neon_urshl, Add1ArgType), 3566 NEONMAP1(vrsqrted_f64, aarch64_neon_frsqrte, Add1ArgType), 3567 NEONMAP1(vrsqrtes_f32, aarch64_neon_frsqrte, Add1ArgType), 3568 NEONMAP1(vrsqrtsd_f64, aarch64_neon_frsqrts, Add1ArgType), 3569 NEONMAP1(vrsqrtss_f32, aarch64_neon_frsqrts, Add1ArgType), 3570 NEONMAP1(vsha1cq_u32, aarch64_crypto_sha1c, 0), 3571 NEONMAP1(vsha1h_u32, aarch64_crypto_sha1h, 0), 3572 NEONMAP1(vsha1mq_u32, aarch64_crypto_sha1m, 0), 3573 NEONMAP1(vsha1pq_u32, aarch64_crypto_sha1p, 0), 3574 NEONMAP1(vshld_s64, aarch64_neon_sshl, Add1ArgType), 3575 NEONMAP1(vshld_u64, aarch64_neon_ushl, Add1ArgType), 3576 NEONMAP1(vslid_n_s64, aarch64_neon_vsli, Vectorize1ArgType), 3577 NEONMAP1(vslid_n_u64, aarch64_neon_vsli, Vectorize1ArgType), 3578 NEONMAP1(vsqaddb_u8, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 3579 NEONMAP1(vsqaddd_u64, aarch64_neon_usqadd, Add1ArgType), 3580 NEONMAP1(vsqaddh_u16, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 3581 NEONMAP1(vsqadds_u32, aarch64_neon_usqadd, Add1ArgType), 3582 NEONMAP1(vsrid_n_s64, aarch64_neon_vsri, Vectorize1ArgType), 3583 NEONMAP1(vsrid_n_u64, aarch64_neon_vsri, Vectorize1ArgType), 3584 NEONMAP1(vuqaddb_s8, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 3585 NEONMAP1(vuqaddd_s64, aarch64_neon_suqadd, Add1ArgType), 3586 NEONMAP1(vuqaddh_s16, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 3587 NEONMAP1(vuqadds_s32, aarch64_neon_suqadd, Add1ArgType), 3588 }; 3589 3590 #undef NEONMAP0 3591 #undef NEONMAP1 3592 #undef NEONMAP2 3593 3594 static bool NEONSIMDIntrinsicsProvenSorted = false; 3595 3596 static bool AArch64SIMDIntrinsicsProvenSorted = false; 3597 static bool AArch64SISDIntrinsicsProvenSorted = false; 3598 3599 3600 static const NeonIntrinsicInfo * 3601 findNeonIntrinsicInMap(ArrayRef<NeonIntrinsicInfo> IntrinsicMap, 3602 unsigned BuiltinID, bool &MapProvenSorted) { 3603 3604 #ifndef NDEBUG 3605 if (!MapProvenSorted) { 3606 assert(std::is_sorted(std::begin(IntrinsicMap), std::end(IntrinsicMap))); 3607 MapProvenSorted = true; 3608 } 3609 #endif 3610 3611 const NeonIntrinsicInfo *Builtin = 3612 std::lower_bound(IntrinsicMap.begin(), IntrinsicMap.end(), BuiltinID); 3613 3614 if (Builtin != IntrinsicMap.end() && Builtin->BuiltinID == BuiltinID) 3615 return Builtin; 3616 3617 return nullptr; 3618 } 3619 3620 Function *CodeGenFunction::LookupNeonLLVMIntrinsic(unsigned IntrinsicID, 3621 unsigned Modifier, 3622 llvm::Type *ArgType, 3623 const CallExpr *E) { 3624 int VectorSize = 0; 3625 if (Modifier & Use64BitVectors) 3626 VectorSize = 64; 3627 else if (Modifier & Use128BitVectors) 3628 VectorSize = 128; 3629 3630 // Return type. 3631 SmallVector<llvm::Type *, 3> Tys; 3632 if (Modifier & AddRetType) { 3633 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 3634 if (Modifier & VectorizeRetType) 3635 Ty = llvm::VectorType::get( 3636 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); 3637 3638 Tys.push_back(Ty); 3639 } 3640 3641 // Arguments. 3642 if (Modifier & VectorizeArgTypes) { 3643 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; 3644 ArgType = llvm::VectorType::get(ArgType, Elts); 3645 } 3646 3647 if (Modifier & (Add1ArgType | Add2ArgTypes)) 3648 Tys.push_back(ArgType); 3649 3650 if (Modifier & Add2ArgTypes) 3651 Tys.push_back(ArgType); 3652 3653 if (Modifier & InventFloatType) 3654 Tys.push_back(FloatTy); 3655 3656 return CGM.getIntrinsic(IntrinsicID, Tys); 3657 } 3658 3659 static Value *EmitCommonNeonSISDBuiltinExpr(CodeGenFunction &CGF, 3660 const NeonIntrinsicInfo &SISDInfo, 3661 SmallVectorImpl<Value *> &Ops, 3662 const CallExpr *E) { 3663 unsigned BuiltinID = SISDInfo.BuiltinID; 3664 unsigned int Int = SISDInfo.LLVMIntrinsic; 3665 unsigned Modifier = SISDInfo.TypeModifier; 3666 const char *s = SISDInfo.NameHint; 3667 3668 switch (BuiltinID) { 3669 case NEON::BI__builtin_neon_vcled_s64: 3670 case NEON::BI__builtin_neon_vcled_u64: 3671 case NEON::BI__builtin_neon_vcles_f32: 3672 case NEON::BI__builtin_neon_vcled_f64: 3673 case NEON::BI__builtin_neon_vcltd_s64: 3674 case NEON::BI__builtin_neon_vcltd_u64: 3675 case NEON::BI__builtin_neon_vclts_f32: 3676 case NEON::BI__builtin_neon_vcltd_f64: 3677 case NEON::BI__builtin_neon_vcales_f32: 3678 case NEON::BI__builtin_neon_vcaled_f64: 3679 case NEON::BI__builtin_neon_vcalts_f32: 3680 case NEON::BI__builtin_neon_vcaltd_f64: 3681 // Only one direction of comparisons actually exist, cmle is actually a cmge 3682 // with swapped operands. The table gives us the right intrinsic but we 3683 // still need to do the swap. 3684 std::swap(Ops[0], Ops[1]); 3685 break; 3686 } 3687 3688 assert(Int && "Generic code assumes a valid intrinsic"); 3689 3690 // Determine the type(s) of this overloaded AArch64 intrinsic. 3691 const Expr *Arg = E->getArg(0); 3692 llvm::Type *ArgTy = CGF.ConvertType(Arg->getType()); 3693 Function *F = CGF.LookupNeonLLVMIntrinsic(Int, Modifier, ArgTy, E); 3694 3695 int j = 0; 3696 ConstantInt *C0 = ConstantInt::get(CGF.SizeTy, 0); 3697 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 3698 ai != ae; ++ai, ++j) { 3699 llvm::Type *ArgTy = ai->getType(); 3700 if (Ops[j]->getType()->getPrimitiveSizeInBits() == 3701 ArgTy->getPrimitiveSizeInBits()) 3702 continue; 3703 3704 assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy()); 3705 // The constant argument to an _n_ intrinsic always has Int32Ty, so truncate 3706 // it before inserting. 3707 Ops[j] = 3708 CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType()); 3709 Ops[j] = 3710 CGF.Builder.CreateInsertElement(UndefValue::get(ArgTy), Ops[j], C0); 3711 } 3712 3713 Value *Result = CGF.EmitNeonCall(F, Ops, s); 3714 llvm::Type *ResultType = CGF.ConvertType(E->getType()); 3715 if (ResultType->getPrimitiveSizeInBits() < 3716 Result->getType()->getPrimitiveSizeInBits()) 3717 return CGF.Builder.CreateExtractElement(Result, C0); 3718 3719 return CGF.Builder.CreateBitCast(Result, ResultType, s); 3720 } 3721 3722 Value *CodeGenFunction::EmitCommonNeonBuiltinExpr( 3723 unsigned BuiltinID, unsigned LLVMIntrinsic, unsigned AltLLVMIntrinsic, 3724 const char *NameHint, unsigned Modifier, const CallExpr *E, 3725 SmallVectorImpl<llvm::Value *> &Ops, Address PtrOp0, Address PtrOp1) { 3726 // Get the last argument, which specifies the vector type. 3727 llvm::APSInt NeonTypeConst; 3728 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 3729 if (!Arg->isIntegerConstantExpr(NeonTypeConst, getContext())) 3730 return nullptr; 3731 3732 // Determine the type of this overloaded NEON intrinsic. 3733 NeonTypeFlags Type(NeonTypeConst.getZExtValue()); 3734 bool Usgn = Type.isUnsigned(); 3735 bool Quad = Type.isQuad(); 3736 3737 llvm::VectorType *VTy = GetNeonType(this, Type); 3738 llvm::Type *Ty = VTy; 3739 if (!Ty) 3740 return nullptr; 3741 3742 auto getAlignmentValue32 = [&](Address addr) -> Value* { 3743 return Builder.getInt32(addr.getAlignment().getQuantity()); 3744 }; 3745 3746 unsigned Int = LLVMIntrinsic; 3747 if ((Modifier & UnsignedAlts) && !Usgn) 3748 Int = AltLLVMIntrinsic; 3749 3750 switch (BuiltinID) { 3751 default: break; 3752 case NEON::BI__builtin_neon_vabs_v: 3753 case NEON::BI__builtin_neon_vabsq_v: 3754 if (VTy->getElementType()->isFloatingPointTy()) 3755 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, Ty), Ops, "vabs"); 3756 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), Ops, "vabs"); 3757 case NEON::BI__builtin_neon_vaddhn_v: { 3758 llvm::VectorType *SrcTy = 3759 llvm::VectorType::getExtendedElementVectorType(VTy); 3760 3761 // %sum = add <4 x i32> %lhs, %rhs 3762 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3763 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 3764 Ops[0] = Builder.CreateAdd(Ops[0], Ops[1], "vaddhn"); 3765 3766 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 3767 Constant *ShiftAmt = 3768 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 3769 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vaddhn"); 3770 3771 // %res = trunc <4 x i32> %high to <4 x i16> 3772 return Builder.CreateTrunc(Ops[0], VTy, "vaddhn"); 3773 } 3774 case NEON::BI__builtin_neon_vcale_v: 3775 case NEON::BI__builtin_neon_vcaleq_v: 3776 case NEON::BI__builtin_neon_vcalt_v: 3777 case NEON::BI__builtin_neon_vcaltq_v: 3778 std::swap(Ops[0], Ops[1]); 3779 case NEON::BI__builtin_neon_vcage_v: 3780 case NEON::BI__builtin_neon_vcageq_v: 3781 case NEON::BI__builtin_neon_vcagt_v: 3782 case NEON::BI__builtin_neon_vcagtq_v: { 3783 llvm::Type *VecFlt = llvm::VectorType::get( 3784 VTy->getScalarSizeInBits() == 32 ? FloatTy : DoubleTy, 3785 VTy->getNumElements()); 3786 llvm::Type *Tys[] = { VTy, VecFlt }; 3787 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3788 return EmitNeonCall(F, Ops, NameHint); 3789 } 3790 case NEON::BI__builtin_neon_vclz_v: 3791 case NEON::BI__builtin_neon_vclzq_v: 3792 // We generate target-independent intrinsic, which needs a second argument 3793 // for whether or not clz of zero is undefined; on ARM it isn't. 3794 Ops.push_back(Builder.getInt1(getTarget().isCLZForZeroUndef())); 3795 break; 3796 case NEON::BI__builtin_neon_vcvt_f32_v: 3797 case NEON::BI__builtin_neon_vcvtq_f32_v: 3798 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3799 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, Quad)); 3800 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 3801 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 3802 case NEON::BI__builtin_neon_vcvt_n_f32_v: 3803 case NEON::BI__builtin_neon_vcvt_n_f64_v: 3804 case NEON::BI__builtin_neon_vcvtq_n_f32_v: 3805 case NEON::BI__builtin_neon_vcvtq_n_f64_v: { 3806 llvm::Type *Tys[2] = { GetFloatNeonType(this, Type), Ty }; 3807 Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic; 3808 Function *F = CGM.getIntrinsic(Int, Tys); 3809 return EmitNeonCall(F, Ops, "vcvt_n"); 3810 } 3811 case NEON::BI__builtin_neon_vcvt_n_s32_v: 3812 case NEON::BI__builtin_neon_vcvt_n_u32_v: 3813 case NEON::BI__builtin_neon_vcvt_n_s64_v: 3814 case NEON::BI__builtin_neon_vcvt_n_u64_v: 3815 case NEON::BI__builtin_neon_vcvtq_n_s32_v: 3816 case NEON::BI__builtin_neon_vcvtq_n_u32_v: 3817 case NEON::BI__builtin_neon_vcvtq_n_s64_v: 3818 case NEON::BI__builtin_neon_vcvtq_n_u64_v: { 3819 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 3820 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3821 return EmitNeonCall(F, Ops, "vcvt_n"); 3822 } 3823 case NEON::BI__builtin_neon_vcvt_s32_v: 3824 case NEON::BI__builtin_neon_vcvt_u32_v: 3825 case NEON::BI__builtin_neon_vcvt_s64_v: 3826 case NEON::BI__builtin_neon_vcvt_u64_v: 3827 case NEON::BI__builtin_neon_vcvtq_s32_v: 3828 case NEON::BI__builtin_neon_vcvtq_u32_v: 3829 case NEON::BI__builtin_neon_vcvtq_s64_v: 3830 case NEON::BI__builtin_neon_vcvtq_u64_v: { 3831 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 3832 return Usgn ? Builder.CreateFPToUI(Ops[0], Ty, "vcvt") 3833 : Builder.CreateFPToSI(Ops[0], Ty, "vcvt"); 3834 } 3835 case NEON::BI__builtin_neon_vcvta_s32_v: 3836 case NEON::BI__builtin_neon_vcvta_s64_v: 3837 case NEON::BI__builtin_neon_vcvta_u32_v: 3838 case NEON::BI__builtin_neon_vcvta_u64_v: 3839 case NEON::BI__builtin_neon_vcvtaq_s32_v: 3840 case NEON::BI__builtin_neon_vcvtaq_s64_v: 3841 case NEON::BI__builtin_neon_vcvtaq_u32_v: 3842 case NEON::BI__builtin_neon_vcvtaq_u64_v: 3843 case NEON::BI__builtin_neon_vcvtn_s32_v: 3844 case NEON::BI__builtin_neon_vcvtn_s64_v: 3845 case NEON::BI__builtin_neon_vcvtn_u32_v: 3846 case NEON::BI__builtin_neon_vcvtn_u64_v: 3847 case NEON::BI__builtin_neon_vcvtnq_s32_v: 3848 case NEON::BI__builtin_neon_vcvtnq_s64_v: 3849 case NEON::BI__builtin_neon_vcvtnq_u32_v: 3850 case NEON::BI__builtin_neon_vcvtnq_u64_v: 3851 case NEON::BI__builtin_neon_vcvtp_s32_v: 3852 case NEON::BI__builtin_neon_vcvtp_s64_v: 3853 case NEON::BI__builtin_neon_vcvtp_u32_v: 3854 case NEON::BI__builtin_neon_vcvtp_u64_v: 3855 case NEON::BI__builtin_neon_vcvtpq_s32_v: 3856 case NEON::BI__builtin_neon_vcvtpq_s64_v: 3857 case NEON::BI__builtin_neon_vcvtpq_u32_v: 3858 case NEON::BI__builtin_neon_vcvtpq_u64_v: 3859 case NEON::BI__builtin_neon_vcvtm_s32_v: 3860 case NEON::BI__builtin_neon_vcvtm_s64_v: 3861 case NEON::BI__builtin_neon_vcvtm_u32_v: 3862 case NEON::BI__builtin_neon_vcvtm_u64_v: 3863 case NEON::BI__builtin_neon_vcvtmq_s32_v: 3864 case NEON::BI__builtin_neon_vcvtmq_s64_v: 3865 case NEON::BI__builtin_neon_vcvtmq_u32_v: 3866 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 3867 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 3868 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, NameHint); 3869 } 3870 case NEON::BI__builtin_neon_vext_v: 3871 case NEON::BI__builtin_neon_vextq_v: { 3872 int CV = cast<ConstantInt>(Ops[2])->getSExtValue(); 3873 SmallVector<uint32_t, 16> Indices; 3874 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 3875 Indices.push_back(i+CV); 3876 3877 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3878 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3879 return Builder.CreateShuffleVector(Ops[0], Ops[1], Indices, "vext"); 3880 } 3881 case NEON::BI__builtin_neon_vfma_v: 3882 case NEON::BI__builtin_neon_vfmaq_v: { 3883 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 3884 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3885 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3886 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3887 3888 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 3889 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 3890 } 3891 case NEON::BI__builtin_neon_vld1_v: 3892 case NEON::BI__builtin_neon_vld1q_v: { 3893 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3894 Ops.push_back(getAlignmentValue32(PtrOp0)); 3895 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, "vld1"); 3896 } 3897 case NEON::BI__builtin_neon_vld2_v: 3898 case NEON::BI__builtin_neon_vld2q_v: 3899 case NEON::BI__builtin_neon_vld3_v: 3900 case NEON::BI__builtin_neon_vld3q_v: 3901 case NEON::BI__builtin_neon_vld4_v: 3902 case NEON::BI__builtin_neon_vld4q_v: { 3903 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3904 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3905 Value *Align = getAlignmentValue32(PtrOp1); 3906 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint); 3907 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3908 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3909 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3910 } 3911 case NEON::BI__builtin_neon_vld1_dup_v: 3912 case NEON::BI__builtin_neon_vld1q_dup_v: { 3913 Value *V = UndefValue::get(Ty); 3914 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 3915 PtrOp0 = Builder.CreateBitCast(PtrOp0, Ty); 3916 LoadInst *Ld = Builder.CreateLoad(PtrOp0); 3917 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 3918 Ops[0] = Builder.CreateInsertElement(V, Ld, CI); 3919 return EmitNeonSplat(Ops[0], CI); 3920 } 3921 case NEON::BI__builtin_neon_vld2_lane_v: 3922 case NEON::BI__builtin_neon_vld2q_lane_v: 3923 case NEON::BI__builtin_neon_vld3_lane_v: 3924 case NEON::BI__builtin_neon_vld3q_lane_v: 3925 case NEON::BI__builtin_neon_vld4_lane_v: 3926 case NEON::BI__builtin_neon_vld4q_lane_v: { 3927 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3928 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3929 for (unsigned I = 2; I < Ops.size() - 1; ++I) 3930 Ops[I] = Builder.CreateBitCast(Ops[I], Ty); 3931 Ops.push_back(getAlignmentValue32(PtrOp1)); 3932 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), NameHint); 3933 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3934 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3935 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3936 } 3937 case NEON::BI__builtin_neon_vmovl_v: { 3938 llvm::Type *DTy =llvm::VectorType::getTruncatedElementVectorType(VTy); 3939 Ops[0] = Builder.CreateBitCast(Ops[0], DTy); 3940 if (Usgn) 3941 return Builder.CreateZExt(Ops[0], Ty, "vmovl"); 3942 return Builder.CreateSExt(Ops[0], Ty, "vmovl"); 3943 } 3944 case NEON::BI__builtin_neon_vmovn_v: { 3945 llvm::Type *QTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3946 Ops[0] = Builder.CreateBitCast(Ops[0], QTy); 3947 return Builder.CreateTrunc(Ops[0], Ty, "vmovn"); 3948 } 3949 case NEON::BI__builtin_neon_vmull_v: 3950 // FIXME: the integer vmull operations could be emitted in terms of pure 3951 // LLVM IR (2 exts followed by a mul). Unfortunately LLVM has a habit of 3952 // hoisting the exts outside loops. Until global ISel comes along that can 3953 // see through such movement this leads to bad CodeGen. So we need an 3954 // intrinsic for now. 3955 Int = Usgn ? Intrinsic::arm_neon_vmullu : Intrinsic::arm_neon_vmulls; 3956 Int = Type.isPoly() ? (unsigned)Intrinsic::arm_neon_vmullp : Int; 3957 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 3958 case NEON::BI__builtin_neon_vpadal_v: 3959 case NEON::BI__builtin_neon_vpadalq_v: { 3960 // The source operand type has twice as many elements of half the size. 3961 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3962 llvm::Type *EltTy = 3963 llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3964 llvm::Type *NarrowTy = 3965 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3966 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3967 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, NameHint); 3968 } 3969 case NEON::BI__builtin_neon_vpaddl_v: 3970 case NEON::BI__builtin_neon_vpaddlq_v: { 3971 // The source operand type has twice as many elements of half the size. 3972 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3973 llvm::Type *EltTy = llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3974 llvm::Type *NarrowTy = 3975 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3976 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3977 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vpaddl"); 3978 } 3979 case NEON::BI__builtin_neon_vqdmlal_v: 3980 case NEON::BI__builtin_neon_vqdmlsl_v: { 3981 SmallVector<Value *, 2> MulOps(Ops.begin() + 1, Ops.end()); 3982 Ops[1] = 3983 EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), MulOps, "vqdmlal"); 3984 Ops.resize(2); 3985 return EmitNeonCall(CGM.getIntrinsic(AltLLVMIntrinsic, Ty), Ops, NameHint); 3986 } 3987 case NEON::BI__builtin_neon_vqshl_n_v: 3988 case NEON::BI__builtin_neon_vqshlq_n_v: 3989 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshl_n", 3990 1, false); 3991 case NEON::BI__builtin_neon_vqshlu_n_v: 3992 case NEON::BI__builtin_neon_vqshluq_n_v: 3993 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshlu_n", 3994 1, false); 3995 case NEON::BI__builtin_neon_vrecpe_v: 3996 case NEON::BI__builtin_neon_vrecpeq_v: 3997 case NEON::BI__builtin_neon_vrsqrte_v: 3998 case NEON::BI__builtin_neon_vrsqrteq_v: 3999 Int = Ty->isFPOrFPVectorTy() ? LLVMIntrinsic : AltLLVMIntrinsic; 4000 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint); 4001 4002 case NEON::BI__builtin_neon_vrshr_n_v: 4003 case NEON::BI__builtin_neon_vrshrq_n_v: 4004 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n", 4005 1, true); 4006 case NEON::BI__builtin_neon_vshl_n_v: 4007 case NEON::BI__builtin_neon_vshlq_n_v: 4008 Ops[1] = EmitNeonShiftVector(Ops[1], Ty, false); 4009 return Builder.CreateShl(Builder.CreateBitCast(Ops[0],Ty), Ops[1], 4010 "vshl_n"); 4011 case NEON::BI__builtin_neon_vshll_n_v: { 4012 llvm::Type *SrcTy = llvm::VectorType::getTruncatedElementVectorType(VTy); 4013 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4014 if (Usgn) 4015 Ops[0] = Builder.CreateZExt(Ops[0], VTy); 4016 else 4017 Ops[0] = Builder.CreateSExt(Ops[0], VTy); 4018 Ops[1] = EmitNeonShiftVector(Ops[1], VTy, false); 4019 return Builder.CreateShl(Ops[0], Ops[1], "vshll_n"); 4020 } 4021 case NEON::BI__builtin_neon_vshrn_n_v: { 4022 llvm::Type *SrcTy = llvm::VectorType::getExtendedElementVectorType(VTy); 4023 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4024 Ops[1] = EmitNeonShiftVector(Ops[1], SrcTy, false); 4025 if (Usgn) 4026 Ops[0] = Builder.CreateLShr(Ops[0], Ops[1]); 4027 else 4028 Ops[0] = Builder.CreateAShr(Ops[0], Ops[1]); 4029 return Builder.CreateTrunc(Ops[0], Ty, "vshrn_n"); 4030 } 4031 case NEON::BI__builtin_neon_vshr_n_v: 4032 case NEON::BI__builtin_neon_vshrq_n_v: 4033 return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, Usgn, "vshr_n"); 4034 case NEON::BI__builtin_neon_vst1_v: 4035 case NEON::BI__builtin_neon_vst1q_v: 4036 case NEON::BI__builtin_neon_vst2_v: 4037 case NEON::BI__builtin_neon_vst2q_v: 4038 case NEON::BI__builtin_neon_vst3_v: 4039 case NEON::BI__builtin_neon_vst3q_v: 4040 case NEON::BI__builtin_neon_vst4_v: 4041 case NEON::BI__builtin_neon_vst4q_v: 4042 case NEON::BI__builtin_neon_vst2_lane_v: 4043 case NEON::BI__builtin_neon_vst2q_lane_v: 4044 case NEON::BI__builtin_neon_vst3_lane_v: 4045 case NEON::BI__builtin_neon_vst3q_lane_v: 4046 case NEON::BI__builtin_neon_vst4_lane_v: 4047 case NEON::BI__builtin_neon_vst4q_lane_v: { 4048 llvm::Type *Tys[] = {Int8PtrTy, Ty}; 4049 Ops.push_back(getAlignmentValue32(PtrOp0)); 4050 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 4051 } 4052 case NEON::BI__builtin_neon_vsubhn_v: { 4053 llvm::VectorType *SrcTy = 4054 llvm::VectorType::getExtendedElementVectorType(VTy); 4055 4056 // %sum = add <4 x i32> %lhs, %rhs 4057 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4058 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 4059 Ops[0] = Builder.CreateSub(Ops[0], Ops[1], "vsubhn"); 4060 4061 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 4062 Constant *ShiftAmt = 4063 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 4064 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vsubhn"); 4065 4066 // %res = trunc <4 x i32> %high to <4 x i16> 4067 return Builder.CreateTrunc(Ops[0], VTy, "vsubhn"); 4068 } 4069 case NEON::BI__builtin_neon_vtrn_v: 4070 case NEON::BI__builtin_neon_vtrnq_v: { 4071 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4072 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4073 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4074 Value *SV = nullptr; 4075 4076 for (unsigned vi = 0; vi != 2; ++vi) { 4077 SmallVector<uint32_t, 16> Indices; 4078 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 4079 Indices.push_back(i+vi); 4080 Indices.push_back(i+e+vi); 4081 } 4082 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4083 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 4084 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4085 } 4086 return SV; 4087 } 4088 case NEON::BI__builtin_neon_vtst_v: 4089 case NEON::BI__builtin_neon_vtstq_v: { 4090 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4091 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4092 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 4093 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 4094 ConstantAggregateZero::get(Ty)); 4095 return Builder.CreateSExt(Ops[0], Ty, "vtst"); 4096 } 4097 case NEON::BI__builtin_neon_vuzp_v: 4098 case NEON::BI__builtin_neon_vuzpq_v: { 4099 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4100 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4101 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4102 Value *SV = nullptr; 4103 4104 for (unsigned vi = 0; vi != 2; ++vi) { 4105 SmallVector<uint32_t, 16> Indices; 4106 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 4107 Indices.push_back(2*i+vi); 4108 4109 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4110 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 4111 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4112 } 4113 return SV; 4114 } 4115 case NEON::BI__builtin_neon_vzip_v: 4116 case NEON::BI__builtin_neon_vzipq_v: { 4117 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4118 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4119 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4120 Value *SV = nullptr; 4121 4122 for (unsigned vi = 0; vi != 2; ++vi) { 4123 SmallVector<uint32_t, 16> Indices; 4124 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 4125 Indices.push_back((i + vi*e) >> 1); 4126 Indices.push_back(((i + vi*e) >> 1)+e); 4127 } 4128 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4129 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 4130 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4131 } 4132 return SV; 4133 } 4134 } 4135 4136 assert(Int && "Expected valid intrinsic number"); 4137 4138 // Determine the type(s) of this overloaded AArch64 intrinsic. 4139 Function *F = LookupNeonLLVMIntrinsic(Int, Modifier, Ty, E); 4140 4141 Value *Result = EmitNeonCall(F, Ops, NameHint); 4142 llvm::Type *ResultType = ConvertType(E->getType()); 4143 // AArch64 intrinsic one-element vector type cast to 4144 // scalar type expected by the builtin 4145 return Builder.CreateBitCast(Result, ResultType, NameHint); 4146 } 4147 4148 Value *CodeGenFunction::EmitAArch64CompareBuiltinExpr( 4149 Value *Op, llvm::Type *Ty, const CmpInst::Predicate Fp, 4150 const CmpInst::Predicate Ip, const Twine &Name) { 4151 llvm::Type *OTy = Op->getType(); 4152 4153 // FIXME: this is utterly horrific. We should not be looking at previous 4154 // codegen context to find out what needs doing. Unfortunately TableGen 4155 // currently gives us exactly the same calls for vceqz_f32 and vceqz_s32 4156 // (etc). 4157 if (BitCastInst *BI = dyn_cast<BitCastInst>(Op)) 4158 OTy = BI->getOperand(0)->getType(); 4159 4160 Op = Builder.CreateBitCast(Op, OTy); 4161 if (OTy->getScalarType()->isFloatingPointTy()) { 4162 Op = Builder.CreateFCmp(Fp, Op, Constant::getNullValue(OTy)); 4163 } else { 4164 Op = Builder.CreateICmp(Ip, Op, Constant::getNullValue(OTy)); 4165 } 4166 return Builder.CreateSExt(Op, Ty, Name); 4167 } 4168 4169 static Value *packTBLDVectorList(CodeGenFunction &CGF, ArrayRef<Value *> Ops, 4170 Value *ExtOp, Value *IndexOp, 4171 llvm::Type *ResTy, unsigned IntID, 4172 const char *Name) { 4173 SmallVector<Value *, 2> TblOps; 4174 if (ExtOp) 4175 TblOps.push_back(ExtOp); 4176 4177 // Build a vector containing sequential number like (0, 1, 2, ..., 15) 4178 SmallVector<uint32_t, 16> Indices; 4179 llvm::VectorType *TblTy = cast<llvm::VectorType>(Ops[0]->getType()); 4180 for (unsigned i = 0, e = TblTy->getNumElements(); i != e; ++i) { 4181 Indices.push_back(2*i); 4182 Indices.push_back(2*i+1); 4183 } 4184 4185 int PairPos = 0, End = Ops.size() - 1; 4186 while (PairPos < End) { 4187 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 4188 Ops[PairPos+1], Indices, 4189 Name)); 4190 PairPos += 2; 4191 } 4192 4193 // If there's an odd number of 64-bit lookup table, fill the high 64-bit 4194 // of the 128-bit lookup table with zero. 4195 if (PairPos == End) { 4196 Value *ZeroTbl = ConstantAggregateZero::get(TblTy); 4197 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 4198 ZeroTbl, Indices, Name)); 4199 } 4200 4201 Function *TblF; 4202 TblOps.push_back(IndexOp); 4203 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); 4204 4205 return CGF.EmitNeonCall(TblF, TblOps, Name); 4206 } 4207 4208 Value *CodeGenFunction::GetValueForARMHint(unsigned BuiltinID) { 4209 unsigned Value; 4210 switch (BuiltinID) { 4211 default: 4212 return nullptr; 4213 case ARM::BI__builtin_arm_nop: 4214 Value = 0; 4215 break; 4216 case ARM::BI__builtin_arm_yield: 4217 case ARM::BI__yield: 4218 Value = 1; 4219 break; 4220 case ARM::BI__builtin_arm_wfe: 4221 case ARM::BI__wfe: 4222 Value = 2; 4223 break; 4224 case ARM::BI__builtin_arm_wfi: 4225 case ARM::BI__wfi: 4226 Value = 3; 4227 break; 4228 case ARM::BI__builtin_arm_sev: 4229 case ARM::BI__sev: 4230 Value = 4; 4231 break; 4232 case ARM::BI__builtin_arm_sevl: 4233 case ARM::BI__sevl: 4234 Value = 5; 4235 break; 4236 } 4237 4238 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_hint), 4239 llvm::ConstantInt::get(Int32Ty, Value)); 4240 } 4241 4242 // Generates the IR for the read/write special register builtin, 4243 // ValueType is the type of the value that is to be written or read, 4244 // RegisterType is the type of the register being written to or read from. 4245 static Value *EmitSpecialRegisterBuiltin(CodeGenFunction &CGF, 4246 const CallExpr *E, 4247 llvm::Type *RegisterType, 4248 llvm::Type *ValueType, 4249 bool IsRead, 4250 StringRef SysReg = "") { 4251 // write and register intrinsics only support 32 and 64 bit operations. 4252 assert((RegisterType->isIntegerTy(32) || RegisterType->isIntegerTy(64)) 4253 && "Unsupported size for register."); 4254 4255 CodeGen::CGBuilderTy &Builder = CGF.Builder; 4256 CodeGen::CodeGenModule &CGM = CGF.CGM; 4257 LLVMContext &Context = CGM.getLLVMContext(); 4258 4259 if (SysReg.empty()) { 4260 const Expr *SysRegStrExpr = E->getArg(0)->IgnoreParenCasts(); 4261 SysReg = cast<clang::StringLiteral>(SysRegStrExpr)->getString(); 4262 } 4263 4264 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysReg) }; 4265 llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); 4266 llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); 4267 4268 llvm::Type *Types[] = { RegisterType }; 4269 4270 bool MixedTypes = RegisterType->isIntegerTy(64) && ValueType->isIntegerTy(32); 4271 assert(!(RegisterType->isIntegerTy(32) && ValueType->isIntegerTy(64)) 4272 && "Can't fit 64-bit value in 32-bit register"); 4273 4274 if (IsRead) { 4275 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::read_register, Types); 4276 llvm::Value *Call = Builder.CreateCall(F, Metadata); 4277 4278 if (MixedTypes) 4279 // Read into 64 bit register and then truncate result to 32 bit. 4280 return Builder.CreateTrunc(Call, ValueType); 4281 4282 if (ValueType->isPointerTy()) 4283 // Have i32/i64 result (Call) but want to return a VoidPtrTy (i8*). 4284 return Builder.CreateIntToPtr(Call, ValueType); 4285 4286 return Call; 4287 } 4288 4289 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types); 4290 llvm::Value *ArgValue = CGF.EmitScalarExpr(E->getArg(1)); 4291 if (MixedTypes) { 4292 // Extend 32 bit write value to 64 bit to pass to write. 4293 ArgValue = Builder.CreateZExt(ArgValue, RegisterType); 4294 return Builder.CreateCall(F, { Metadata, ArgValue }); 4295 } 4296 4297 if (ValueType->isPointerTy()) { 4298 // Have VoidPtrTy ArgValue but want to return an i32/i64. 4299 ArgValue = Builder.CreatePtrToInt(ArgValue, RegisterType); 4300 return Builder.CreateCall(F, { Metadata, ArgValue }); 4301 } 4302 4303 return Builder.CreateCall(F, { Metadata, ArgValue }); 4304 } 4305 4306 /// Return true if BuiltinID is an overloaded Neon intrinsic with an extra 4307 /// argument that specifies the vector type. 4308 static bool HasExtraNeonArgument(unsigned BuiltinID) { 4309 switch (BuiltinID) { 4310 default: break; 4311 case NEON::BI__builtin_neon_vget_lane_i8: 4312 case NEON::BI__builtin_neon_vget_lane_i16: 4313 case NEON::BI__builtin_neon_vget_lane_i32: 4314 case NEON::BI__builtin_neon_vget_lane_i64: 4315 case NEON::BI__builtin_neon_vget_lane_f32: 4316 case NEON::BI__builtin_neon_vgetq_lane_i8: 4317 case NEON::BI__builtin_neon_vgetq_lane_i16: 4318 case NEON::BI__builtin_neon_vgetq_lane_i32: 4319 case NEON::BI__builtin_neon_vgetq_lane_i64: 4320 case NEON::BI__builtin_neon_vgetq_lane_f32: 4321 case NEON::BI__builtin_neon_vset_lane_i8: 4322 case NEON::BI__builtin_neon_vset_lane_i16: 4323 case NEON::BI__builtin_neon_vset_lane_i32: 4324 case NEON::BI__builtin_neon_vset_lane_i64: 4325 case NEON::BI__builtin_neon_vset_lane_f32: 4326 case NEON::BI__builtin_neon_vsetq_lane_i8: 4327 case NEON::BI__builtin_neon_vsetq_lane_i16: 4328 case NEON::BI__builtin_neon_vsetq_lane_i32: 4329 case NEON::BI__builtin_neon_vsetq_lane_i64: 4330 case NEON::BI__builtin_neon_vsetq_lane_f32: 4331 case NEON::BI__builtin_neon_vsha1h_u32: 4332 case NEON::BI__builtin_neon_vsha1cq_u32: 4333 case NEON::BI__builtin_neon_vsha1pq_u32: 4334 case NEON::BI__builtin_neon_vsha1mq_u32: 4335 case ARM::BI_MoveToCoprocessor: 4336 case ARM::BI_MoveToCoprocessor2: 4337 return false; 4338 } 4339 return true; 4340 } 4341 4342 Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, 4343 const CallExpr *E) { 4344 if (auto Hint = GetValueForARMHint(BuiltinID)) 4345 return Hint; 4346 4347 if (BuiltinID == ARM::BI__emit) { 4348 bool IsThumb = getTarget().getTriple().getArch() == llvm::Triple::thumb; 4349 llvm::FunctionType *FTy = 4350 llvm::FunctionType::get(VoidTy, /*Variadic=*/false); 4351 4352 APSInt Value; 4353 if (!E->getArg(0)->EvaluateAsInt(Value, CGM.getContext())) 4354 llvm_unreachable("Sema will ensure that the parameter is constant"); 4355 4356 uint64_t ZExtValue = Value.zextOrTrunc(IsThumb ? 16 : 32).getZExtValue(); 4357 4358 llvm::InlineAsm *Emit = 4359 IsThumb ? InlineAsm::get(FTy, ".inst.n 0x" + utohexstr(ZExtValue), "", 4360 /*SideEffects=*/true) 4361 : InlineAsm::get(FTy, ".inst 0x" + utohexstr(ZExtValue), "", 4362 /*SideEffects=*/true); 4363 4364 return Builder.CreateCall(Emit); 4365 } 4366 4367 if (BuiltinID == ARM::BI__builtin_arm_dbg) { 4368 Value *Option = EmitScalarExpr(E->getArg(0)); 4369 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_dbg), Option); 4370 } 4371 4372 if (BuiltinID == ARM::BI__builtin_arm_prefetch) { 4373 Value *Address = EmitScalarExpr(E->getArg(0)); 4374 Value *RW = EmitScalarExpr(E->getArg(1)); 4375 Value *IsData = EmitScalarExpr(E->getArg(2)); 4376 4377 // Locality is not supported on ARM target 4378 Value *Locality = llvm::ConstantInt::get(Int32Ty, 3); 4379 4380 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 4381 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 4382 } 4383 4384 if (BuiltinID == ARM::BI__builtin_arm_rbit) { 4385 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 4386 return Builder.CreateCall( 4387 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 4388 } 4389 4390 if (BuiltinID == ARM::BI__clear_cache) { 4391 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 4392 const FunctionDecl *FD = E->getDirectCallee(); 4393 Value *Ops[2]; 4394 for (unsigned i = 0; i < 2; i++) 4395 Ops[i] = EmitScalarExpr(E->getArg(i)); 4396 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 4397 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 4398 StringRef Name = FD->getName(); 4399 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 4400 } 4401 4402 if (BuiltinID == ARM::BI__builtin_arm_mcrr || 4403 BuiltinID == ARM::BI__builtin_arm_mcrr2) { 4404 Function *F; 4405 4406 switch (BuiltinID) { 4407 default: llvm_unreachable("unexpected builtin"); 4408 case ARM::BI__builtin_arm_mcrr: 4409 F = CGM.getIntrinsic(Intrinsic::arm_mcrr); 4410 break; 4411 case ARM::BI__builtin_arm_mcrr2: 4412 F = CGM.getIntrinsic(Intrinsic::arm_mcrr2); 4413 break; 4414 } 4415 4416 // MCRR{2} instruction has 5 operands but 4417 // the intrinsic has 4 because Rt and Rt2 4418 // are represented as a single unsigned 64 4419 // bit integer in the intrinsic definition 4420 // but internally it's represented as 2 32 4421 // bit integers. 4422 4423 Value *Coproc = EmitScalarExpr(E->getArg(0)); 4424 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 4425 Value *RtAndRt2 = EmitScalarExpr(E->getArg(2)); 4426 Value *CRm = EmitScalarExpr(E->getArg(3)); 4427 4428 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 4429 Value *Rt = Builder.CreateTruncOrBitCast(RtAndRt2, Int32Ty); 4430 Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); 4431 Rt2 = Builder.CreateTruncOrBitCast(Rt2, Int32Ty); 4432 4433 return Builder.CreateCall(F, {Coproc, Opc1, Rt, Rt2, CRm}); 4434 } 4435 4436 if (BuiltinID == ARM::BI__builtin_arm_mrrc || 4437 BuiltinID == ARM::BI__builtin_arm_mrrc2) { 4438 Function *F; 4439 4440 switch (BuiltinID) { 4441 default: llvm_unreachable("unexpected builtin"); 4442 case ARM::BI__builtin_arm_mrrc: 4443 F = CGM.getIntrinsic(Intrinsic::arm_mrrc); 4444 break; 4445 case ARM::BI__builtin_arm_mrrc2: 4446 F = CGM.getIntrinsic(Intrinsic::arm_mrrc2); 4447 break; 4448 } 4449 4450 Value *Coproc = EmitScalarExpr(E->getArg(0)); 4451 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 4452 Value *CRm = EmitScalarExpr(E->getArg(2)); 4453 Value *RtAndRt2 = Builder.CreateCall(F, {Coproc, Opc1, CRm}); 4454 4455 // Returns an unsigned 64 bit integer, represented 4456 // as two 32 bit integers. 4457 4458 Value *Rt = Builder.CreateExtractValue(RtAndRt2, 1); 4459 Value *Rt1 = Builder.CreateExtractValue(RtAndRt2, 0); 4460 Rt = Builder.CreateZExt(Rt, Int64Ty); 4461 Rt1 = Builder.CreateZExt(Rt1, Int64Ty); 4462 4463 Value *ShiftCast = llvm::ConstantInt::get(Int64Ty, 32); 4464 RtAndRt2 = Builder.CreateShl(Rt, ShiftCast, "shl", true); 4465 RtAndRt2 = Builder.CreateOr(RtAndRt2, Rt1); 4466 4467 return Builder.CreateBitCast(RtAndRt2, ConvertType(E->getType())); 4468 } 4469 4470 if (BuiltinID == ARM::BI__builtin_arm_ldrexd || 4471 ((BuiltinID == ARM::BI__builtin_arm_ldrex || 4472 BuiltinID == ARM::BI__builtin_arm_ldaex) && 4473 getContext().getTypeSize(E->getType()) == 64) || 4474 BuiltinID == ARM::BI__ldrexd) { 4475 Function *F; 4476 4477 switch (BuiltinID) { 4478 default: llvm_unreachable("unexpected builtin"); 4479 case ARM::BI__builtin_arm_ldaex: 4480 F = CGM.getIntrinsic(Intrinsic::arm_ldaexd); 4481 break; 4482 case ARM::BI__builtin_arm_ldrexd: 4483 case ARM::BI__builtin_arm_ldrex: 4484 case ARM::BI__ldrexd: 4485 F = CGM.getIntrinsic(Intrinsic::arm_ldrexd); 4486 break; 4487 } 4488 4489 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 4490 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 4491 "ldrexd"); 4492 4493 Value *Val0 = Builder.CreateExtractValue(Val, 1); 4494 Value *Val1 = Builder.CreateExtractValue(Val, 0); 4495 Val0 = Builder.CreateZExt(Val0, Int64Ty); 4496 Val1 = Builder.CreateZExt(Val1, Int64Ty); 4497 4498 Value *ShiftCst = llvm::ConstantInt::get(Int64Ty, 32); 4499 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 4500 Val = Builder.CreateOr(Val, Val1); 4501 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 4502 } 4503 4504 if (BuiltinID == ARM::BI__builtin_arm_ldrex || 4505 BuiltinID == ARM::BI__builtin_arm_ldaex) { 4506 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 4507 4508 QualType Ty = E->getType(); 4509 llvm::Type *RealResTy = ConvertType(Ty); 4510 llvm::Type *PtrTy = llvm::IntegerType::get( 4511 getLLVMContext(), getContext().getTypeSize(Ty))->getPointerTo(); 4512 LoadAddr = Builder.CreateBitCast(LoadAddr, PtrTy); 4513 4514 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_ldaex 4515 ? Intrinsic::arm_ldaex 4516 : Intrinsic::arm_ldrex, 4517 PtrTy); 4518 Value *Val = Builder.CreateCall(F, LoadAddr, "ldrex"); 4519 4520 if (RealResTy->isPointerTy()) 4521 return Builder.CreateIntToPtr(Val, RealResTy); 4522 else { 4523 llvm::Type *IntResTy = llvm::IntegerType::get( 4524 getLLVMContext(), CGM.getDataLayout().getTypeSizeInBits(RealResTy)); 4525 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 4526 return Builder.CreateBitCast(Val, RealResTy); 4527 } 4528 } 4529 4530 if (BuiltinID == ARM::BI__builtin_arm_strexd || 4531 ((BuiltinID == ARM::BI__builtin_arm_stlex || 4532 BuiltinID == ARM::BI__builtin_arm_strex) && 4533 getContext().getTypeSize(E->getArg(0)->getType()) == 64)) { 4534 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 4535 ? Intrinsic::arm_stlexd 4536 : Intrinsic::arm_strexd); 4537 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, nullptr); 4538 4539 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 4540 Value *Val = EmitScalarExpr(E->getArg(0)); 4541 Builder.CreateStore(Val, Tmp); 4542 4543 Address LdPtr = Builder.CreateBitCast(Tmp,llvm::PointerType::getUnqual(STy)); 4544 Val = Builder.CreateLoad(LdPtr); 4545 4546 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 4547 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 4548 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), Int8PtrTy); 4549 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "strexd"); 4550 } 4551 4552 if (BuiltinID == ARM::BI__builtin_arm_strex || 4553 BuiltinID == ARM::BI__builtin_arm_stlex) { 4554 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 4555 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 4556 4557 QualType Ty = E->getArg(0)->getType(); 4558 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 4559 getContext().getTypeSize(Ty)); 4560 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 4561 4562 if (StoreVal->getType()->isPointerTy()) 4563 StoreVal = Builder.CreatePtrToInt(StoreVal, Int32Ty); 4564 else { 4565 llvm::Type *IntTy = llvm::IntegerType::get( 4566 getLLVMContext(), 4567 CGM.getDataLayout().getTypeSizeInBits(StoreVal->getType())); 4568 StoreVal = Builder.CreateBitCast(StoreVal, IntTy); 4569 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int32Ty); 4570 } 4571 4572 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 4573 ? Intrinsic::arm_stlex 4574 : Intrinsic::arm_strex, 4575 StoreAddr->getType()); 4576 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "strex"); 4577 } 4578 4579 switch (BuiltinID) { 4580 case ARM::BI__iso_volatile_load8: 4581 case ARM::BI__iso_volatile_load16: 4582 case ARM::BI__iso_volatile_load32: 4583 case ARM::BI__iso_volatile_load64: { 4584 Value *Ptr = EmitScalarExpr(E->getArg(0)); 4585 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 4586 CharUnits LoadSize = getContext().getTypeSizeInChars(ElTy); 4587 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 4588 LoadSize.getQuantity() * 8); 4589 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 4590 llvm::LoadInst *Load = 4591 Builder.CreateAlignedLoad(Ptr, LoadSize); 4592 Load->setVolatile(true); 4593 return Load; 4594 } 4595 case ARM::BI__iso_volatile_store8: 4596 case ARM::BI__iso_volatile_store16: 4597 case ARM::BI__iso_volatile_store32: 4598 case ARM::BI__iso_volatile_store64: { 4599 Value *Ptr = EmitScalarExpr(E->getArg(0)); 4600 Value *Value = EmitScalarExpr(E->getArg(1)); 4601 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 4602 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 4603 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 4604 StoreSize.getQuantity() * 8); 4605 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 4606 llvm::StoreInst *Store = 4607 Builder.CreateAlignedStore(Value, Ptr, 4608 StoreSize); 4609 Store->setVolatile(true); 4610 return Store; 4611 } 4612 } 4613 4614 if (BuiltinID == ARM::BI__builtin_arm_clrex) { 4615 Function *F = CGM.getIntrinsic(Intrinsic::arm_clrex); 4616 return Builder.CreateCall(F); 4617 } 4618 4619 // CRC32 4620 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 4621 switch (BuiltinID) { 4622 case ARM::BI__builtin_arm_crc32b: 4623 CRCIntrinsicID = Intrinsic::arm_crc32b; break; 4624 case ARM::BI__builtin_arm_crc32cb: 4625 CRCIntrinsicID = Intrinsic::arm_crc32cb; break; 4626 case ARM::BI__builtin_arm_crc32h: 4627 CRCIntrinsicID = Intrinsic::arm_crc32h; break; 4628 case ARM::BI__builtin_arm_crc32ch: 4629 CRCIntrinsicID = Intrinsic::arm_crc32ch; break; 4630 case ARM::BI__builtin_arm_crc32w: 4631 case ARM::BI__builtin_arm_crc32d: 4632 CRCIntrinsicID = Intrinsic::arm_crc32w; break; 4633 case ARM::BI__builtin_arm_crc32cw: 4634 case ARM::BI__builtin_arm_crc32cd: 4635 CRCIntrinsicID = Intrinsic::arm_crc32cw; break; 4636 } 4637 4638 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 4639 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 4640 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 4641 4642 // crc32{c,}d intrinsics are implemnted as two calls to crc32{c,}w 4643 // intrinsics, hence we need different codegen for these cases. 4644 if (BuiltinID == ARM::BI__builtin_arm_crc32d || 4645 BuiltinID == ARM::BI__builtin_arm_crc32cd) { 4646 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 4647 Value *Arg1a = Builder.CreateTruncOrBitCast(Arg1, Int32Ty); 4648 Value *Arg1b = Builder.CreateLShr(Arg1, C1); 4649 Arg1b = Builder.CreateTruncOrBitCast(Arg1b, Int32Ty); 4650 4651 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 4652 Value *Res = Builder.CreateCall(F, {Arg0, Arg1a}); 4653 return Builder.CreateCall(F, {Res, Arg1b}); 4654 } else { 4655 Arg1 = Builder.CreateZExtOrBitCast(Arg1, Int32Ty); 4656 4657 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 4658 return Builder.CreateCall(F, {Arg0, Arg1}); 4659 } 4660 } 4661 4662 if (BuiltinID == ARM::BI__builtin_arm_rsr || 4663 BuiltinID == ARM::BI__builtin_arm_rsr64 || 4664 BuiltinID == ARM::BI__builtin_arm_rsrp || 4665 BuiltinID == ARM::BI__builtin_arm_wsr || 4666 BuiltinID == ARM::BI__builtin_arm_wsr64 || 4667 BuiltinID == ARM::BI__builtin_arm_wsrp) { 4668 4669 bool IsRead = BuiltinID == ARM::BI__builtin_arm_rsr || 4670 BuiltinID == ARM::BI__builtin_arm_rsr64 || 4671 BuiltinID == ARM::BI__builtin_arm_rsrp; 4672 4673 bool IsPointerBuiltin = BuiltinID == ARM::BI__builtin_arm_rsrp || 4674 BuiltinID == ARM::BI__builtin_arm_wsrp; 4675 4676 bool Is64Bit = BuiltinID == ARM::BI__builtin_arm_rsr64 || 4677 BuiltinID == ARM::BI__builtin_arm_wsr64; 4678 4679 llvm::Type *ValueType; 4680 llvm::Type *RegisterType; 4681 if (IsPointerBuiltin) { 4682 ValueType = VoidPtrTy; 4683 RegisterType = Int32Ty; 4684 } else if (Is64Bit) { 4685 ValueType = RegisterType = Int64Ty; 4686 } else { 4687 ValueType = RegisterType = Int32Ty; 4688 } 4689 4690 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 4691 } 4692 4693 // Find out if any arguments are required to be integer constant 4694 // expressions. 4695 unsigned ICEArguments = 0; 4696 ASTContext::GetBuiltinTypeError Error; 4697 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 4698 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 4699 4700 auto getAlignmentValue32 = [&](Address addr) -> Value* { 4701 return Builder.getInt32(addr.getAlignment().getQuantity()); 4702 }; 4703 4704 Address PtrOp0 = Address::invalid(); 4705 Address PtrOp1 = Address::invalid(); 4706 SmallVector<Value*, 4> Ops; 4707 bool HasExtraArg = HasExtraNeonArgument(BuiltinID); 4708 unsigned NumArgs = E->getNumArgs() - (HasExtraArg ? 1 : 0); 4709 for (unsigned i = 0, e = NumArgs; i != e; i++) { 4710 if (i == 0) { 4711 switch (BuiltinID) { 4712 case NEON::BI__builtin_neon_vld1_v: 4713 case NEON::BI__builtin_neon_vld1q_v: 4714 case NEON::BI__builtin_neon_vld1q_lane_v: 4715 case NEON::BI__builtin_neon_vld1_lane_v: 4716 case NEON::BI__builtin_neon_vld1_dup_v: 4717 case NEON::BI__builtin_neon_vld1q_dup_v: 4718 case NEON::BI__builtin_neon_vst1_v: 4719 case NEON::BI__builtin_neon_vst1q_v: 4720 case NEON::BI__builtin_neon_vst1q_lane_v: 4721 case NEON::BI__builtin_neon_vst1_lane_v: 4722 case NEON::BI__builtin_neon_vst2_v: 4723 case NEON::BI__builtin_neon_vst2q_v: 4724 case NEON::BI__builtin_neon_vst2_lane_v: 4725 case NEON::BI__builtin_neon_vst2q_lane_v: 4726 case NEON::BI__builtin_neon_vst3_v: 4727 case NEON::BI__builtin_neon_vst3q_v: 4728 case NEON::BI__builtin_neon_vst3_lane_v: 4729 case NEON::BI__builtin_neon_vst3q_lane_v: 4730 case NEON::BI__builtin_neon_vst4_v: 4731 case NEON::BI__builtin_neon_vst4q_v: 4732 case NEON::BI__builtin_neon_vst4_lane_v: 4733 case NEON::BI__builtin_neon_vst4q_lane_v: 4734 // Get the alignment for the argument in addition to the value; 4735 // we'll use it later. 4736 PtrOp0 = EmitPointerWithAlignment(E->getArg(0)); 4737 Ops.push_back(PtrOp0.getPointer()); 4738 continue; 4739 } 4740 } 4741 if (i == 1) { 4742 switch (BuiltinID) { 4743 case NEON::BI__builtin_neon_vld2_v: 4744 case NEON::BI__builtin_neon_vld2q_v: 4745 case NEON::BI__builtin_neon_vld3_v: 4746 case NEON::BI__builtin_neon_vld3q_v: 4747 case NEON::BI__builtin_neon_vld4_v: 4748 case NEON::BI__builtin_neon_vld4q_v: 4749 case NEON::BI__builtin_neon_vld2_lane_v: 4750 case NEON::BI__builtin_neon_vld2q_lane_v: 4751 case NEON::BI__builtin_neon_vld3_lane_v: 4752 case NEON::BI__builtin_neon_vld3q_lane_v: 4753 case NEON::BI__builtin_neon_vld4_lane_v: 4754 case NEON::BI__builtin_neon_vld4q_lane_v: 4755 case NEON::BI__builtin_neon_vld2_dup_v: 4756 case NEON::BI__builtin_neon_vld3_dup_v: 4757 case NEON::BI__builtin_neon_vld4_dup_v: 4758 // Get the alignment for the argument in addition to the value; 4759 // we'll use it later. 4760 PtrOp1 = EmitPointerWithAlignment(E->getArg(1)); 4761 Ops.push_back(PtrOp1.getPointer()); 4762 continue; 4763 } 4764 } 4765 4766 if ((ICEArguments & (1 << i)) == 0) { 4767 Ops.push_back(EmitScalarExpr(E->getArg(i))); 4768 } else { 4769 // If this is required to be a constant, constant fold it so that we know 4770 // that the generated intrinsic gets a ConstantInt. 4771 llvm::APSInt Result; 4772 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 4773 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 4774 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 4775 } 4776 } 4777 4778 switch (BuiltinID) { 4779 default: break; 4780 4781 case NEON::BI__builtin_neon_vget_lane_i8: 4782 case NEON::BI__builtin_neon_vget_lane_i16: 4783 case NEON::BI__builtin_neon_vget_lane_i32: 4784 case NEON::BI__builtin_neon_vget_lane_i64: 4785 case NEON::BI__builtin_neon_vget_lane_f32: 4786 case NEON::BI__builtin_neon_vgetq_lane_i8: 4787 case NEON::BI__builtin_neon_vgetq_lane_i16: 4788 case NEON::BI__builtin_neon_vgetq_lane_i32: 4789 case NEON::BI__builtin_neon_vgetq_lane_i64: 4790 case NEON::BI__builtin_neon_vgetq_lane_f32: 4791 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane"); 4792 4793 case NEON::BI__builtin_neon_vset_lane_i8: 4794 case NEON::BI__builtin_neon_vset_lane_i16: 4795 case NEON::BI__builtin_neon_vset_lane_i32: 4796 case NEON::BI__builtin_neon_vset_lane_i64: 4797 case NEON::BI__builtin_neon_vset_lane_f32: 4798 case NEON::BI__builtin_neon_vsetq_lane_i8: 4799 case NEON::BI__builtin_neon_vsetq_lane_i16: 4800 case NEON::BI__builtin_neon_vsetq_lane_i32: 4801 case NEON::BI__builtin_neon_vsetq_lane_i64: 4802 case NEON::BI__builtin_neon_vsetq_lane_f32: 4803 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4804 4805 case NEON::BI__builtin_neon_vsha1h_u32: 4806 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1h), Ops, 4807 "vsha1h"); 4808 case NEON::BI__builtin_neon_vsha1cq_u32: 4809 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1c), Ops, 4810 "vsha1h"); 4811 case NEON::BI__builtin_neon_vsha1pq_u32: 4812 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1p), Ops, 4813 "vsha1h"); 4814 case NEON::BI__builtin_neon_vsha1mq_u32: 4815 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1m), Ops, 4816 "vsha1h"); 4817 4818 // The ARM _MoveToCoprocessor builtins put the input register value as 4819 // the first argument, but the LLVM intrinsic expects it as the third one. 4820 case ARM::BI_MoveToCoprocessor: 4821 case ARM::BI_MoveToCoprocessor2: { 4822 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI_MoveToCoprocessor ? 4823 Intrinsic::arm_mcr : Intrinsic::arm_mcr2); 4824 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0], 4825 Ops[3], Ops[4], Ops[5]}); 4826 } 4827 case ARM::BI_BitScanForward: 4828 case ARM::BI_BitScanForward64: 4829 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 4830 case ARM::BI_BitScanReverse: 4831 case ARM::BI_BitScanReverse64: 4832 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 4833 4834 case ARM::BI_InterlockedAnd64: 4835 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 4836 case ARM::BI_InterlockedExchange64: 4837 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 4838 case ARM::BI_InterlockedExchangeAdd64: 4839 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 4840 case ARM::BI_InterlockedExchangeSub64: 4841 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 4842 case ARM::BI_InterlockedOr64: 4843 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 4844 case ARM::BI_InterlockedXor64: 4845 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 4846 case ARM::BI_InterlockedDecrement64: 4847 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 4848 case ARM::BI_InterlockedIncrement64: 4849 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 4850 } 4851 4852 // Get the last argument, which specifies the vector type. 4853 assert(HasExtraArg); 4854 llvm::APSInt Result; 4855 const Expr *Arg = E->getArg(E->getNumArgs()-1); 4856 if (!Arg->isIntegerConstantExpr(Result, getContext())) 4857 return nullptr; 4858 4859 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f || 4860 BuiltinID == ARM::BI__builtin_arm_vcvtr_d) { 4861 // Determine the overloaded type of this builtin. 4862 llvm::Type *Ty; 4863 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f) 4864 Ty = FloatTy; 4865 else 4866 Ty = DoubleTy; 4867 4868 // Determine whether this is an unsigned conversion or not. 4869 bool usgn = Result.getZExtValue() == 1; 4870 unsigned Int = usgn ? Intrinsic::arm_vcvtru : Intrinsic::arm_vcvtr; 4871 4872 // Call the appropriate intrinsic. 4873 Function *F = CGM.getIntrinsic(Int, Ty); 4874 return Builder.CreateCall(F, Ops, "vcvtr"); 4875 } 4876 4877 // Determine the type of this overloaded NEON intrinsic. 4878 NeonTypeFlags Type(Result.getZExtValue()); 4879 bool usgn = Type.isUnsigned(); 4880 bool rightShift = false; 4881 4882 llvm::VectorType *VTy = GetNeonType(this, Type); 4883 llvm::Type *Ty = VTy; 4884 if (!Ty) 4885 return nullptr; 4886 4887 // Many NEON builtins have identical semantics and uses in ARM and 4888 // AArch64. Emit these in a single function. 4889 auto IntrinsicMap = makeArrayRef(ARMSIMDIntrinsicMap); 4890 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 4891 IntrinsicMap, BuiltinID, NEONSIMDIntrinsicsProvenSorted); 4892 if (Builtin) 4893 return EmitCommonNeonBuiltinExpr( 4894 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 4895 Builtin->NameHint, Builtin->TypeModifier, E, Ops, PtrOp0, PtrOp1); 4896 4897 unsigned Int; 4898 switch (BuiltinID) { 4899 default: return nullptr; 4900 case NEON::BI__builtin_neon_vld1q_lane_v: 4901 // Handle 64-bit integer elements as a special case. Use shuffles of 4902 // one-element vectors to avoid poor code for i64 in the backend. 4903 if (VTy->getElementType()->isIntegerTy(64)) { 4904 // Extract the other lane. 4905 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4906 uint32_t Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); 4907 Value *SV = llvm::ConstantVector::get(ConstantInt::get(Int32Ty, 1-Lane)); 4908 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 4909 // Load the value as a one-element vector. 4910 Ty = llvm::VectorType::get(VTy->getElementType(), 1); 4911 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4912 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Tys); 4913 Value *Align = getAlignmentValue32(PtrOp0); 4914 Value *Ld = Builder.CreateCall(F, {Ops[0], Align}); 4915 // Combine them. 4916 uint32_t Indices[] = {1 - Lane, Lane}; 4917 SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 4918 return Builder.CreateShuffleVector(Ops[1], Ld, SV, "vld1q_lane"); 4919 } 4920 // fall through 4921 case NEON::BI__builtin_neon_vld1_lane_v: { 4922 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4923 PtrOp0 = Builder.CreateElementBitCast(PtrOp0, VTy->getElementType()); 4924 Value *Ld = Builder.CreateLoad(PtrOp0); 4925 return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); 4926 } 4927 case NEON::BI__builtin_neon_vld2_dup_v: 4928 case NEON::BI__builtin_neon_vld3_dup_v: 4929 case NEON::BI__builtin_neon_vld4_dup_v: { 4930 // Handle 64-bit elements as a special-case. There is no "dup" needed. 4931 if (VTy->getElementType()->getPrimitiveSizeInBits() == 64) { 4932 switch (BuiltinID) { 4933 case NEON::BI__builtin_neon_vld2_dup_v: 4934 Int = Intrinsic::arm_neon_vld2; 4935 break; 4936 case NEON::BI__builtin_neon_vld3_dup_v: 4937 Int = Intrinsic::arm_neon_vld3; 4938 break; 4939 case NEON::BI__builtin_neon_vld4_dup_v: 4940 Int = Intrinsic::arm_neon_vld4; 4941 break; 4942 default: llvm_unreachable("unknown vld_dup intrinsic?"); 4943 } 4944 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4945 Function *F = CGM.getIntrinsic(Int, Tys); 4946 llvm::Value *Align = getAlignmentValue32(PtrOp1); 4947 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, "vld_dup"); 4948 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4949 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4950 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4951 } 4952 switch (BuiltinID) { 4953 case NEON::BI__builtin_neon_vld2_dup_v: 4954 Int = Intrinsic::arm_neon_vld2lane; 4955 break; 4956 case NEON::BI__builtin_neon_vld3_dup_v: 4957 Int = Intrinsic::arm_neon_vld3lane; 4958 break; 4959 case NEON::BI__builtin_neon_vld4_dup_v: 4960 Int = Intrinsic::arm_neon_vld4lane; 4961 break; 4962 default: llvm_unreachable("unknown vld_dup intrinsic?"); 4963 } 4964 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4965 Function *F = CGM.getIntrinsic(Int, Tys); 4966 llvm::StructType *STy = cast<llvm::StructType>(F->getReturnType()); 4967 4968 SmallVector<Value*, 6> Args; 4969 Args.push_back(Ops[1]); 4970 Args.append(STy->getNumElements(), UndefValue::get(Ty)); 4971 4972 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 4973 Args.push_back(CI); 4974 Args.push_back(getAlignmentValue32(PtrOp1)); 4975 4976 Ops[1] = Builder.CreateCall(F, Args, "vld_dup"); 4977 // splat lane 0 to all elts in each vector of the result. 4978 for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { 4979 Value *Val = Builder.CreateExtractValue(Ops[1], i); 4980 Value *Elt = Builder.CreateBitCast(Val, Ty); 4981 Elt = EmitNeonSplat(Elt, CI); 4982 Elt = Builder.CreateBitCast(Elt, Val->getType()); 4983 Ops[1] = Builder.CreateInsertValue(Ops[1], Elt, i); 4984 } 4985 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4986 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4987 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4988 } 4989 case NEON::BI__builtin_neon_vqrshrn_n_v: 4990 Int = 4991 usgn ? Intrinsic::arm_neon_vqrshiftnu : Intrinsic::arm_neon_vqrshiftns; 4992 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n", 4993 1, true); 4994 case NEON::BI__builtin_neon_vqrshrun_n_v: 4995 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqrshiftnsu, Ty), 4996 Ops, "vqrshrun_n", 1, true); 4997 case NEON::BI__builtin_neon_vqshrn_n_v: 4998 Int = usgn ? Intrinsic::arm_neon_vqshiftnu : Intrinsic::arm_neon_vqshiftns; 4999 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n", 5000 1, true); 5001 case NEON::BI__builtin_neon_vqshrun_n_v: 5002 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqshiftnsu, Ty), 5003 Ops, "vqshrun_n", 1, true); 5004 case NEON::BI__builtin_neon_vrecpe_v: 5005 case NEON::BI__builtin_neon_vrecpeq_v: 5006 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecpe, Ty), 5007 Ops, "vrecpe"); 5008 case NEON::BI__builtin_neon_vrshrn_n_v: 5009 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrshiftn, Ty), 5010 Ops, "vrshrn_n", 1, true); 5011 case NEON::BI__builtin_neon_vrsra_n_v: 5012 case NEON::BI__builtin_neon_vrsraq_n_v: 5013 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5014 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5015 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, true); 5016 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 5017 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Ty), {Ops[1], Ops[2]}); 5018 return Builder.CreateAdd(Ops[0], Ops[1], "vrsra_n"); 5019 case NEON::BI__builtin_neon_vsri_n_v: 5020 case NEON::BI__builtin_neon_vsriq_n_v: 5021 rightShift = true; 5022 case NEON::BI__builtin_neon_vsli_n_v: 5023 case NEON::BI__builtin_neon_vsliq_n_v: 5024 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, rightShift); 5025 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vshiftins, Ty), 5026 Ops, "vsli_n"); 5027 case NEON::BI__builtin_neon_vsra_n_v: 5028 case NEON::BI__builtin_neon_vsraq_n_v: 5029 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5030 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 5031 return Builder.CreateAdd(Ops[0], Ops[1]); 5032 case NEON::BI__builtin_neon_vst1q_lane_v: 5033 // Handle 64-bit integer elements as a special case. Use a shuffle to get 5034 // a one-element vector and avoid poor code for i64 in the backend. 5035 if (VTy->getElementType()->isIntegerTy(64)) { 5036 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5037 Value *SV = llvm::ConstantVector::get(cast<llvm::Constant>(Ops[2])); 5038 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 5039 Ops[2] = getAlignmentValue32(PtrOp0); 5040 llvm::Type *Tys[] = {Int8PtrTy, Ops[1]->getType()}; 5041 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, 5042 Tys), Ops); 5043 } 5044 // fall through 5045 case NEON::BI__builtin_neon_vst1_lane_v: { 5046 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5047 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 5048 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5049 auto St = Builder.CreateStore(Ops[1], Builder.CreateBitCast(PtrOp0, Ty)); 5050 return St; 5051 } 5052 case NEON::BI__builtin_neon_vtbl1_v: 5053 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl1), 5054 Ops, "vtbl1"); 5055 case NEON::BI__builtin_neon_vtbl2_v: 5056 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl2), 5057 Ops, "vtbl2"); 5058 case NEON::BI__builtin_neon_vtbl3_v: 5059 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl3), 5060 Ops, "vtbl3"); 5061 case NEON::BI__builtin_neon_vtbl4_v: 5062 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl4), 5063 Ops, "vtbl4"); 5064 case NEON::BI__builtin_neon_vtbx1_v: 5065 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx1), 5066 Ops, "vtbx1"); 5067 case NEON::BI__builtin_neon_vtbx2_v: 5068 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx2), 5069 Ops, "vtbx2"); 5070 case NEON::BI__builtin_neon_vtbx3_v: 5071 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx3), 5072 Ops, "vtbx3"); 5073 case NEON::BI__builtin_neon_vtbx4_v: 5074 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx4), 5075 Ops, "vtbx4"); 5076 } 5077 } 5078 5079 static Value *EmitAArch64TblBuiltinExpr(CodeGenFunction &CGF, unsigned BuiltinID, 5080 const CallExpr *E, 5081 SmallVectorImpl<Value *> &Ops) { 5082 unsigned int Int = 0; 5083 const char *s = nullptr; 5084 5085 switch (BuiltinID) { 5086 default: 5087 return nullptr; 5088 case NEON::BI__builtin_neon_vtbl1_v: 5089 case NEON::BI__builtin_neon_vqtbl1_v: 5090 case NEON::BI__builtin_neon_vqtbl1q_v: 5091 case NEON::BI__builtin_neon_vtbl2_v: 5092 case NEON::BI__builtin_neon_vqtbl2_v: 5093 case NEON::BI__builtin_neon_vqtbl2q_v: 5094 case NEON::BI__builtin_neon_vtbl3_v: 5095 case NEON::BI__builtin_neon_vqtbl3_v: 5096 case NEON::BI__builtin_neon_vqtbl3q_v: 5097 case NEON::BI__builtin_neon_vtbl4_v: 5098 case NEON::BI__builtin_neon_vqtbl4_v: 5099 case NEON::BI__builtin_neon_vqtbl4q_v: 5100 break; 5101 case NEON::BI__builtin_neon_vtbx1_v: 5102 case NEON::BI__builtin_neon_vqtbx1_v: 5103 case NEON::BI__builtin_neon_vqtbx1q_v: 5104 case NEON::BI__builtin_neon_vtbx2_v: 5105 case NEON::BI__builtin_neon_vqtbx2_v: 5106 case NEON::BI__builtin_neon_vqtbx2q_v: 5107 case NEON::BI__builtin_neon_vtbx3_v: 5108 case NEON::BI__builtin_neon_vqtbx3_v: 5109 case NEON::BI__builtin_neon_vqtbx3q_v: 5110 case NEON::BI__builtin_neon_vtbx4_v: 5111 case NEON::BI__builtin_neon_vqtbx4_v: 5112 case NEON::BI__builtin_neon_vqtbx4q_v: 5113 break; 5114 } 5115 5116 assert(E->getNumArgs() >= 3); 5117 5118 // Get the last argument, which specifies the vector type. 5119 llvm::APSInt Result; 5120 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 5121 if (!Arg->isIntegerConstantExpr(Result, CGF.getContext())) 5122 return nullptr; 5123 5124 // Determine the type of this overloaded NEON intrinsic. 5125 NeonTypeFlags Type(Result.getZExtValue()); 5126 llvm::VectorType *Ty = GetNeonType(&CGF, Type); 5127 if (!Ty) 5128 return nullptr; 5129 5130 CodeGen::CGBuilderTy &Builder = CGF.Builder; 5131 5132 // AArch64 scalar builtins are not overloaded, they do not have an extra 5133 // argument that specifies the vector type, need to handle each case. 5134 switch (BuiltinID) { 5135 case NEON::BI__builtin_neon_vtbl1_v: { 5136 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 1), nullptr, 5137 Ops[1], Ty, Intrinsic::aarch64_neon_tbl1, 5138 "vtbl1"); 5139 } 5140 case NEON::BI__builtin_neon_vtbl2_v: { 5141 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 2), nullptr, 5142 Ops[2], Ty, Intrinsic::aarch64_neon_tbl1, 5143 "vtbl1"); 5144 } 5145 case NEON::BI__builtin_neon_vtbl3_v: { 5146 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 3), nullptr, 5147 Ops[3], Ty, Intrinsic::aarch64_neon_tbl2, 5148 "vtbl2"); 5149 } 5150 case NEON::BI__builtin_neon_vtbl4_v: { 5151 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 4), nullptr, 5152 Ops[4], Ty, Intrinsic::aarch64_neon_tbl2, 5153 "vtbl2"); 5154 } 5155 case NEON::BI__builtin_neon_vtbx1_v: { 5156 Value *TblRes = 5157 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 1), nullptr, Ops[2], 5158 Ty, Intrinsic::aarch64_neon_tbl1, "vtbl1"); 5159 5160 llvm::Constant *EightV = ConstantInt::get(Ty, 8); 5161 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[2], EightV); 5162 CmpRes = Builder.CreateSExt(CmpRes, Ty); 5163 5164 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 5165 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 5166 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 5167 } 5168 case NEON::BI__builtin_neon_vtbx2_v: { 5169 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 2), Ops[0], 5170 Ops[3], Ty, Intrinsic::aarch64_neon_tbx1, 5171 "vtbx1"); 5172 } 5173 case NEON::BI__builtin_neon_vtbx3_v: { 5174 Value *TblRes = 5175 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 3), nullptr, Ops[4], 5176 Ty, Intrinsic::aarch64_neon_tbl2, "vtbl2"); 5177 5178 llvm::Constant *TwentyFourV = ConstantInt::get(Ty, 24); 5179 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[4], 5180 TwentyFourV); 5181 CmpRes = Builder.CreateSExt(CmpRes, Ty); 5182 5183 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 5184 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 5185 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 5186 } 5187 case NEON::BI__builtin_neon_vtbx4_v: { 5188 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 4), Ops[0], 5189 Ops[5], Ty, Intrinsic::aarch64_neon_tbx2, 5190 "vtbx2"); 5191 } 5192 case NEON::BI__builtin_neon_vqtbl1_v: 5193 case NEON::BI__builtin_neon_vqtbl1q_v: 5194 Int = Intrinsic::aarch64_neon_tbl1; s = "vtbl1"; break; 5195 case NEON::BI__builtin_neon_vqtbl2_v: 5196 case NEON::BI__builtin_neon_vqtbl2q_v: { 5197 Int = Intrinsic::aarch64_neon_tbl2; s = "vtbl2"; break; 5198 case NEON::BI__builtin_neon_vqtbl3_v: 5199 case NEON::BI__builtin_neon_vqtbl3q_v: 5200 Int = Intrinsic::aarch64_neon_tbl3; s = "vtbl3"; break; 5201 case NEON::BI__builtin_neon_vqtbl4_v: 5202 case NEON::BI__builtin_neon_vqtbl4q_v: 5203 Int = Intrinsic::aarch64_neon_tbl4; s = "vtbl4"; break; 5204 case NEON::BI__builtin_neon_vqtbx1_v: 5205 case NEON::BI__builtin_neon_vqtbx1q_v: 5206 Int = Intrinsic::aarch64_neon_tbx1; s = "vtbx1"; break; 5207 case NEON::BI__builtin_neon_vqtbx2_v: 5208 case NEON::BI__builtin_neon_vqtbx2q_v: 5209 Int = Intrinsic::aarch64_neon_tbx2; s = "vtbx2"; break; 5210 case NEON::BI__builtin_neon_vqtbx3_v: 5211 case NEON::BI__builtin_neon_vqtbx3q_v: 5212 Int = Intrinsic::aarch64_neon_tbx3; s = "vtbx3"; break; 5213 case NEON::BI__builtin_neon_vqtbx4_v: 5214 case NEON::BI__builtin_neon_vqtbx4q_v: 5215 Int = Intrinsic::aarch64_neon_tbx4; s = "vtbx4"; break; 5216 } 5217 } 5218 5219 if (!Int) 5220 return nullptr; 5221 5222 Function *F = CGF.CGM.getIntrinsic(Int, Ty); 5223 return CGF.EmitNeonCall(F, Ops, s); 5224 } 5225 5226 Value *CodeGenFunction::vectorWrapScalar16(Value *Op) { 5227 llvm::Type *VTy = llvm::VectorType::get(Int16Ty, 4); 5228 Op = Builder.CreateBitCast(Op, Int16Ty); 5229 Value *V = UndefValue::get(VTy); 5230 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 5231 Op = Builder.CreateInsertElement(V, Op, CI); 5232 return Op; 5233 } 5234 5235 Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, 5236 const CallExpr *E) { 5237 unsigned HintID = static_cast<unsigned>(-1); 5238 switch (BuiltinID) { 5239 default: break; 5240 case AArch64::BI__builtin_arm_nop: 5241 HintID = 0; 5242 break; 5243 case AArch64::BI__builtin_arm_yield: 5244 HintID = 1; 5245 break; 5246 case AArch64::BI__builtin_arm_wfe: 5247 HintID = 2; 5248 break; 5249 case AArch64::BI__builtin_arm_wfi: 5250 HintID = 3; 5251 break; 5252 case AArch64::BI__builtin_arm_sev: 5253 HintID = 4; 5254 break; 5255 case AArch64::BI__builtin_arm_sevl: 5256 HintID = 5; 5257 break; 5258 } 5259 5260 if (HintID != static_cast<unsigned>(-1)) { 5261 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_hint); 5262 return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID)); 5263 } 5264 5265 if (BuiltinID == AArch64::BI__builtin_arm_prefetch) { 5266 Value *Address = EmitScalarExpr(E->getArg(0)); 5267 Value *RW = EmitScalarExpr(E->getArg(1)); 5268 Value *CacheLevel = EmitScalarExpr(E->getArg(2)); 5269 Value *RetentionPolicy = EmitScalarExpr(E->getArg(3)); 5270 Value *IsData = EmitScalarExpr(E->getArg(4)); 5271 5272 Value *Locality = nullptr; 5273 if (cast<llvm::ConstantInt>(RetentionPolicy)->isZero()) { 5274 // Temporal fetch, needs to convert cache level to locality. 5275 Locality = llvm::ConstantInt::get(Int32Ty, 5276 -cast<llvm::ConstantInt>(CacheLevel)->getValue() + 3); 5277 } else { 5278 // Streaming fetch. 5279 Locality = llvm::ConstantInt::get(Int32Ty, 0); 5280 } 5281 5282 // FIXME: We need AArch64 specific LLVM intrinsic if we want to specify 5283 // PLDL3STRM or PLDL2STRM. 5284 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 5285 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 5286 } 5287 5288 if (BuiltinID == AArch64::BI__builtin_arm_rbit) { 5289 assert((getContext().getTypeSize(E->getType()) == 32) && 5290 "rbit of unusual size!"); 5291 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 5292 return Builder.CreateCall( 5293 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 5294 } 5295 if (BuiltinID == AArch64::BI__builtin_arm_rbit64) { 5296 assert((getContext().getTypeSize(E->getType()) == 64) && 5297 "rbit of unusual size!"); 5298 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 5299 return Builder.CreateCall( 5300 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 5301 } 5302 5303 if (BuiltinID == AArch64::BI__clear_cache) { 5304 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 5305 const FunctionDecl *FD = E->getDirectCallee(); 5306 Value *Ops[2]; 5307 for (unsigned i = 0; i < 2; i++) 5308 Ops[i] = EmitScalarExpr(E->getArg(i)); 5309 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 5310 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 5311 StringRef Name = FD->getName(); 5312 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 5313 } 5314 5315 if ((BuiltinID == AArch64::BI__builtin_arm_ldrex || 5316 BuiltinID == AArch64::BI__builtin_arm_ldaex) && 5317 getContext().getTypeSize(E->getType()) == 128) { 5318 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 5319 ? Intrinsic::aarch64_ldaxp 5320 : Intrinsic::aarch64_ldxp); 5321 5322 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 5323 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 5324 "ldxp"); 5325 5326 Value *Val0 = Builder.CreateExtractValue(Val, 1); 5327 Value *Val1 = Builder.CreateExtractValue(Val, 0); 5328 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 5329 Val0 = Builder.CreateZExt(Val0, Int128Ty); 5330 Val1 = Builder.CreateZExt(Val1, Int128Ty); 5331 5332 Value *ShiftCst = llvm::ConstantInt::get(Int128Ty, 64); 5333 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 5334 Val = Builder.CreateOr(Val, Val1); 5335 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 5336 } else if (BuiltinID == AArch64::BI__builtin_arm_ldrex || 5337 BuiltinID == AArch64::BI__builtin_arm_ldaex) { 5338 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 5339 5340 QualType Ty = E->getType(); 5341 llvm::Type *RealResTy = ConvertType(Ty); 5342 llvm::Type *PtrTy = llvm::IntegerType::get( 5343 getLLVMContext(), getContext().getTypeSize(Ty))->getPointerTo(); 5344 LoadAddr = Builder.CreateBitCast(LoadAddr, PtrTy); 5345 5346 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 5347 ? Intrinsic::aarch64_ldaxr 5348 : Intrinsic::aarch64_ldxr, 5349 PtrTy); 5350 Value *Val = Builder.CreateCall(F, LoadAddr, "ldxr"); 5351 5352 if (RealResTy->isPointerTy()) 5353 return Builder.CreateIntToPtr(Val, RealResTy); 5354 5355 llvm::Type *IntResTy = llvm::IntegerType::get( 5356 getLLVMContext(), CGM.getDataLayout().getTypeSizeInBits(RealResTy)); 5357 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 5358 return Builder.CreateBitCast(Val, RealResTy); 5359 } 5360 5361 if ((BuiltinID == AArch64::BI__builtin_arm_strex || 5362 BuiltinID == AArch64::BI__builtin_arm_stlex) && 5363 getContext().getTypeSize(E->getArg(0)->getType()) == 128) { 5364 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 5365 ? Intrinsic::aarch64_stlxp 5366 : Intrinsic::aarch64_stxp); 5367 llvm::Type *STy = llvm::StructType::get(Int64Ty, Int64Ty, nullptr); 5368 5369 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 5370 EmitAnyExprToMem(E->getArg(0), Tmp, Qualifiers(), /*init*/ true); 5371 5372 Tmp = Builder.CreateBitCast(Tmp, llvm::PointerType::getUnqual(STy)); 5373 llvm::Value *Val = Builder.CreateLoad(Tmp); 5374 5375 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 5376 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 5377 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), 5378 Int8PtrTy); 5379 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "stxp"); 5380 } 5381 5382 if (BuiltinID == AArch64::BI__builtin_arm_strex || 5383 BuiltinID == AArch64::BI__builtin_arm_stlex) { 5384 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 5385 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 5386 5387 QualType Ty = E->getArg(0)->getType(); 5388 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 5389 getContext().getTypeSize(Ty)); 5390 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 5391 5392 if (StoreVal->getType()->isPointerTy()) 5393 StoreVal = Builder.CreatePtrToInt(StoreVal, Int64Ty); 5394 else { 5395 llvm::Type *IntTy = llvm::IntegerType::get( 5396 getLLVMContext(), 5397 CGM.getDataLayout().getTypeSizeInBits(StoreVal->getType())); 5398 StoreVal = Builder.CreateBitCast(StoreVal, IntTy); 5399 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int64Ty); 5400 } 5401 5402 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 5403 ? Intrinsic::aarch64_stlxr 5404 : Intrinsic::aarch64_stxr, 5405 StoreAddr->getType()); 5406 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "stxr"); 5407 } 5408 5409 if (BuiltinID == AArch64::BI__builtin_arm_clrex) { 5410 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_clrex); 5411 return Builder.CreateCall(F); 5412 } 5413 5414 // CRC32 5415 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 5416 switch (BuiltinID) { 5417 case AArch64::BI__builtin_arm_crc32b: 5418 CRCIntrinsicID = Intrinsic::aarch64_crc32b; break; 5419 case AArch64::BI__builtin_arm_crc32cb: 5420 CRCIntrinsicID = Intrinsic::aarch64_crc32cb; break; 5421 case AArch64::BI__builtin_arm_crc32h: 5422 CRCIntrinsicID = Intrinsic::aarch64_crc32h; break; 5423 case AArch64::BI__builtin_arm_crc32ch: 5424 CRCIntrinsicID = Intrinsic::aarch64_crc32ch; break; 5425 case AArch64::BI__builtin_arm_crc32w: 5426 CRCIntrinsicID = Intrinsic::aarch64_crc32w; break; 5427 case AArch64::BI__builtin_arm_crc32cw: 5428 CRCIntrinsicID = Intrinsic::aarch64_crc32cw; break; 5429 case AArch64::BI__builtin_arm_crc32d: 5430 CRCIntrinsicID = Intrinsic::aarch64_crc32x; break; 5431 case AArch64::BI__builtin_arm_crc32cd: 5432 CRCIntrinsicID = Intrinsic::aarch64_crc32cx; break; 5433 } 5434 5435 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 5436 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 5437 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 5438 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 5439 5440 llvm::Type *DataTy = F->getFunctionType()->getParamType(1); 5441 Arg1 = Builder.CreateZExtOrBitCast(Arg1, DataTy); 5442 5443 return Builder.CreateCall(F, {Arg0, Arg1}); 5444 } 5445 5446 if (BuiltinID == AArch64::BI__builtin_arm_rsr || 5447 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 5448 BuiltinID == AArch64::BI__builtin_arm_rsrp || 5449 BuiltinID == AArch64::BI__builtin_arm_wsr || 5450 BuiltinID == AArch64::BI__builtin_arm_wsr64 || 5451 BuiltinID == AArch64::BI__builtin_arm_wsrp) { 5452 5453 bool IsRead = BuiltinID == AArch64::BI__builtin_arm_rsr || 5454 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 5455 BuiltinID == AArch64::BI__builtin_arm_rsrp; 5456 5457 bool IsPointerBuiltin = BuiltinID == AArch64::BI__builtin_arm_rsrp || 5458 BuiltinID == AArch64::BI__builtin_arm_wsrp; 5459 5460 bool Is64Bit = BuiltinID != AArch64::BI__builtin_arm_rsr && 5461 BuiltinID != AArch64::BI__builtin_arm_wsr; 5462 5463 llvm::Type *ValueType; 5464 llvm::Type *RegisterType = Int64Ty; 5465 if (IsPointerBuiltin) { 5466 ValueType = VoidPtrTy; 5467 } else if (Is64Bit) { 5468 ValueType = Int64Ty; 5469 } else { 5470 ValueType = Int32Ty; 5471 } 5472 5473 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 5474 } 5475 5476 // Find out if any arguments are required to be integer constant 5477 // expressions. 5478 unsigned ICEArguments = 0; 5479 ASTContext::GetBuiltinTypeError Error; 5480 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 5481 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 5482 5483 llvm::SmallVector<Value*, 4> Ops; 5484 for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; i++) { 5485 if ((ICEArguments & (1 << i)) == 0) { 5486 Ops.push_back(EmitScalarExpr(E->getArg(i))); 5487 } else { 5488 // If this is required to be a constant, constant fold it so that we know 5489 // that the generated intrinsic gets a ConstantInt. 5490 llvm::APSInt Result; 5491 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 5492 assert(IsConst && "Constant arg isn't actually constant?"); 5493 (void)IsConst; 5494 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 5495 } 5496 } 5497 5498 auto SISDMap = makeArrayRef(AArch64SISDIntrinsicMap); 5499 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 5500 SISDMap, BuiltinID, AArch64SISDIntrinsicsProvenSorted); 5501 5502 if (Builtin) { 5503 Ops.push_back(EmitScalarExpr(E->getArg(E->getNumArgs() - 1))); 5504 Value *Result = EmitCommonNeonSISDBuiltinExpr(*this, *Builtin, Ops, E); 5505 assert(Result && "SISD intrinsic should have been handled"); 5506 return Result; 5507 } 5508 5509 llvm::APSInt Result; 5510 const Expr *Arg = E->getArg(E->getNumArgs()-1); 5511 NeonTypeFlags Type(0); 5512 if (Arg->isIntegerConstantExpr(Result, getContext())) 5513 // Determine the type of this overloaded NEON intrinsic. 5514 Type = NeonTypeFlags(Result.getZExtValue()); 5515 5516 bool usgn = Type.isUnsigned(); 5517 bool quad = Type.isQuad(); 5518 5519 // Handle non-overloaded intrinsics first. 5520 switch (BuiltinID) { 5521 default: break; 5522 case NEON::BI__builtin_neon_vldrq_p128: { 5523 llvm::Type *Int128Ty = llvm::Type::getIntNTy(getLLVMContext(), 128); 5524 llvm::Type *Int128PTy = llvm::PointerType::get(Int128Ty, 0); 5525 Value *Ptr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PTy); 5526 return Builder.CreateAlignedLoad(Int128Ty, Ptr, 5527 CharUnits::fromQuantity(16)); 5528 } 5529 case NEON::BI__builtin_neon_vstrq_p128: { 5530 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 5531 Value *Ptr = Builder.CreateBitCast(Ops[0], Int128PTy); 5532 return Builder.CreateDefaultAlignedStore(EmitScalarExpr(E->getArg(1)), Ptr); 5533 } 5534 case NEON::BI__builtin_neon_vcvts_u32_f32: 5535 case NEON::BI__builtin_neon_vcvtd_u64_f64: 5536 usgn = true; 5537 // FALL THROUGH 5538 case NEON::BI__builtin_neon_vcvts_s32_f32: 5539 case NEON::BI__builtin_neon_vcvtd_s64_f64: { 5540 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5541 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 5542 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 5543 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 5544 Ops[0] = Builder.CreateBitCast(Ops[0], FTy); 5545 if (usgn) 5546 return Builder.CreateFPToUI(Ops[0], InTy); 5547 return Builder.CreateFPToSI(Ops[0], InTy); 5548 } 5549 case NEON::BI__builtin_neon_vcvts_f32_u32: 5550 case NEON::BI__builtin_neon_vcvtd_f64_u64: 5551 usgn = true; 5552 // FALL THROUGH 5553 case NEON::BI__builtin_neon_vcvts_f32_s32: 5554 case NEON::BI__builtin_neon_vcvtd_f64_s64: { 5555 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5556 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 5557 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 5558 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 5559 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 5560 if (usgn) 5561 return Builder.CreateUIToFP(Ops[0], FTy); 5562 return Builder.CreateSIToFP(Ops[0], FTy); 5563 } 5564 case NEON::BI__builtin_neon_vpaddd_s64: { 5565 llvm::Type *Ty = llvm::VectorType::get(Int64Ty, 2); 5566 Value *Vec = EmitScalarExpr(E->getArg(0)); 5567 // The vector is v2f64, so make sure it's bitcast to that. 5568 Vec = Builder.CreateBitCast(Vec, Ty, "v2i64"); 5569 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 5570 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 5571 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 5572 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 5573 // Pairwise addition of a v2f64 into a scalar f64. 5574 return Builder.CreateAdd(Op0, Op1, "vpaddd"); 5575 } 5576 case NEON::BI__builtin_neon_vpaddd_f64: { 5577 llvm::Type *Ty = 5578 llvm::VectorType::get(DoubleTy, 2); 5579 Value *Vec = EmitScalarExpr(E->getArg(0)); 5580 // The vector is v2f64, so make sure it's bitcast to that. 5581 Vec = Builder.CreateBitCast(Vec, Ty, "v2f64"); 5582 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 5583 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 5584 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 5585 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 5586 // Pairwise addition of a v2f64 into a scalar f64. 5587 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 5588 } 5589 case NEON::BI__builtin_neon_vpadds_f32: { 5590 llvm::Type *Ty = 5591 llvm::VectorType::get(FloatTy, 2); 5592 Value *Vec = EmitScalarExpr(E->getArg(0)); 5593 // The vector is v2f32, so make sure it's bitcast to that. 5594 Vec = Builder.CreateBitCast(Vec, Ty, "v2f32"); 5595 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 5596 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 5597 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 5598 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 5599 // Pairwise addition of a v2f32 into a scalar f32. 5600 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 5601 } 5602 case NEON::BI__builtin_neon_vceqzd_s64: 5603 case NEON::BI__builtin_neon_vceqzd_f64: 5604 case NEON::BI__builtin_neon_vceqzs_f32: 5605 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5606 return EmitAArch64CompareBuiltinExpr( 5607 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5608 ICmpInst::FCMP_OEQ, ICmpInst::ICMP_EQ, "vceqz"); 5609 case NEON::BI__builtin_neon_vcgezd_s64: 5610 case NEON::BI__builtin_neon_vcgezd_f64: 5611 case NEON::BI__builtin_neon_vcgezs_f32: 5612 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5613 return EmitAArch64CompareBuiltinExpr( 5614 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5615 ICmpInst::FCMP_OGE, ICmpInst::ICMP_SGE, "vcgez"); 5616 case NEON::BI__builtin_neon_vclezd_s64: 5617 case NEON::BI__builtin_neon_vclezd_f64: 5618 case NEON::BI__builtin_neon_vclezs_f32: 5619 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5620 return EmitAArch64CompareBuiltinExpr( 5621 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5622 ICmpInst::FCMP_OLE, ICmpInst::ICMP_SLE, "vclez"); 5623 case NEON::BI__builtin_neon_vcgtzd_s64: 5624 case NEON::BI__builtin_neon_vcgtzd_f64: 5625 case NEON::BI__builtin_neon_vcgtzs_f32: 5626 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5627 return EmitAArch64CompareBuiltinExpr( 5628 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5629 ICmpInst::FCMP_OGT, ICmpInst::ICMP_SGT, "vcgtz"); 5630 case NEON::BI__builtin_neon_vcltzd_s64: 5631 case NEON::BI__builtin_neon_vcltzd_f64: 5632 case NEON::BI__builtin_neon_vcltzs_f32: 5633 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5634 return EmitAArch64CompareBuiltinExpr( 5635 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5636 ICmpInst::FCMP_OLT, ICmpInst::ICMP_SLT, "vcltz"); 5637 5638 case NEON::BI__builtin_neon_vceqzd_u64: { 5639 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5640 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 5641 Ops[0] = 5642 Builder.CreateICmpEQ(Ops[0], llvm::Constant::getNullValue(Int64Ty)); 5643 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqzd"); 5644 } 5645 case NEON::BI__builtin_neon_vceqd_f64: 5646 case NEON::BI__builtin_neon_vcled_f64: 5647 case NEON::BI__builtin_neon_vcltd_f64: 5648 case NEON::BI__builtin_neon_vcged_f64: 5649 case NEON::BI__builtin_neon_vcgtd_f64: { 5650 llvm::CmpInst::Predicate P; 5651 switch (BuiltinID) { 5652 default: llvm_unreachable("missing builtin ID in switch!"); 5653 case NEON::BI__builtin_neon_vceqd_f64: P = llvm::FCmpInst::FCMP_OEQ; break; 5654 case NEON::BI__builtin_neon_vcled_f64: P = llvm::FCmpInst::FCMP_OLE; break; 5655 case NEON::BI__builtin_neon_vcltd_f64: P = llvm::FCmpInst::FCMP_OLT; break; 5656 case NEON::BI__builtin_neon_vcged_f64: P = llvm::FCmpInst::FCMP_OGE; break; 5657 case NEON::BI__builtin_neon_vcgtd_f64: P = llvm::FCmpInst::FCMP_OGT; break; 5658 } 5659 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5660 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5661 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 5662 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 5663 return Builder.CreateSExt(Ops[0], Int64Ty, "vcmpd"); 5664 } 5665 case NEON::BI__builtin_neon_vceqs_f32: 5666 case NEON::BI__builtin_neon_vcles_f32: 5667 case NEON::BI__builtin_neon_vclts_f32: 5668 case NEON::BI__builtin_neon_vcges_f32: 5669 case NEON::BI__builtin_neon_vcgts_f32: { 5670 llvm::CmpInst::Predicate P; 5671 switch (BuiltinID) { 5672 default: llvm_unreachable("missing builtin ID in switch!"); 5673 case NEON::BI__builtin_neon_vceqs_f32: P = llvm::FCmpInst::FCMP_OEQ; break; 5674 case NEON::BI__builtin_neon_vcles_f32: P = llvm::FCmpInst::FCMP_OLE; break; 5675 case NEON::BI__builtin_neon_vclts_f32: P = llvm::FCmpInst::FCMP_OLT; break; 5676 case NEON::BI__builtin_neon_vcges_f32: P = llvm::FCmpInst::FCMP_OGE; break; 5677 case NEON::BI__builtin_neon_vcgts_f32: P = llvm::FCmpInst::FCMP_OGT; break; 5678 } 5679 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5680 Ops[0] = Builder.CreateBitCast(Ops[0], FloatTy); 5681 Ops[1] = Builder.CreateBitCast(Ops[1], FloatTy); 5682 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 5683 return Builder.CreateSExt(Ops[0], Int32Ty, "vcmpd"); 5684 } 5685 case NEON::BI__builtin_neon_vceqd_s64: 5686 case NEON::BI__builtin_neon_vceqd_u64: 5687 case NEON::BI__builtin_neon_vcgtd_s64: 5688 case NEON::BI__builtin_neon_vcgtd_u64: 5689 case NEON::BI__builtin_neon_vcltd_s64: 5690 case NEON::BI__builtin_neon_vcltd_u64: 5691 case NEON::BI__builtin_neon_vcged_u64: 5692 case NEON::BI__builtin_neon_vcged_s64: 5693 case NEON::BI__builtin_neon_vcled_u64: 5694 case NEON::BI__builtin_neon_vcled_s64: { 5695 llvm::CmpInst::Predicate P; 5696 switch (BuiltinID) { 5697 default: llvm_unreachable("missing builtin ID in switch!"); 5698 case NEON::BI__builtin_neon_vceqd_s64: 5699 case NEON::BI__builtin_neon_vceqd_u64:P = llvm::ICmpInst::ICMP_EQ;break; 5700 case NEON::BI__builtin_neon_vcgtd_s64:P = llvm::ICmpInst::ICMP_SGT;break; 5701 case NEON::BI__builtin_neon_vcgtd_u64:P = llvm::ICmpInst::ICMP_UGT;break; 5702 case NEON::BI__builtin_neon_vcltd_s64:P = llvm::ICmpInst::ICMP_SLT;break; 5703 case NEON::BI__builtin_neon_vcltd_u64:P = llvm::ICmpInst::ICMP_ULT;break; 5704 case NEON::BI__builtin_neon_vcged_u64:P = llvm::ICmpInst::ICMP_UGE;break; 5705 case NEON::BI__builtin_neon_vcged_s64:P = llvm::ICmpInst::ICMP_SGE;break; 5706 case NEON::BI__builtin_neon_vcled_u64:P = llvm::ICmpInst::ICMP_ULE;break; 5707 case NEON::BI__builtin_neon_vcled_s64:P = llvm::ICmpInst::ICMP_SLE;break; 5708 } 5709 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5710 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 5711 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 5712 Ops[0] = Builder.CreateICmp(P, Ops[0], Ops[1]); 5713 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqd"); 5714 } 5715 case NEON::BI__builtin_neon_vtstd_s64: 5716 case NEON::BI__builtin_neon_vtstd_u64: { 5717 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5718 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 5719 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 5720 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 5721 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 5722 llvm::Constant::getNullValue(Int64Ty)); 5723 return Builder.CreateSExt(Ops[0], Int64Ty, "vtstd"); 5724 } 5725 case NEON::BI__builtin_neon_vset_lane_i8: 5726 case NEON::BI__builtin_neon_vset_lane_i16: 5727 case NEON::BI__builtin_neon_vset_lane_i32: 5728 case NEON::BI__builtin_neon_vset_lane_i64: 5729 case NEON::BI__builtin_neon_vset_lane_f32: 5730 case NEON::BI__builtin_neon_vsetq_lane_i8: 5731 case NEON::BI__builtin_neon_vsetq_lane_i16: 5732 case NEON::BI__builtin_neon_vsetq_lane_i32: 5733 case NEON::BI__builtin_neon_vsetq_lane_i64: 5734 case NEON::BI__builtin_neon_vsetq_lane_f32: 5735 Ops.push_back(EmitScalarExpr(E->getArg(2))); 5736 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5737 case NEON::BI__builtin_neon_vset_lane_f64: 5738 // The vector type needs a cast for the v1f64 variant. 5739 Ops[1] = Builder.CreateBitCast(Ops[1], 5740 llvm::VectorType::get(DoubleTy, 1)); 5741 Ops.push_back(EmitScalarExpr(E->getArg(2))); 5742 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5743 case NEON::BI__builtin_neon_vsetq_lane_f64: 5744 // The vector type needs a cast for the v2f64 variant. 5745 Ops[1] = Builder.CreateBitCast(Ops[1], 5746 llvm::VectorType::get(DoubleTy, 2)); 5747 Ops.push_back(EmitScalarExpr(E->getArg(2))); 5748 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5749 5750 case NEON::BI__builtin_neon_vget_lane_i8: 5751 case NEON::BI__builtin_neon_vdupb_lane_i8: 5752 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 8)); 5753 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5754 "vget_lane"); 5755 case NEON::BI__builtin_neon_vgetq_lane_i8: 5756 case NEON::BI__builtin_neon_vdupb_laneq_i8: 5757 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 16)); 5758 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5759 "vgetq_lane"); 5760 case NEON::BI__builtin_neon_vget_lane_i16: 5761 case NEON::BI__builtin_neon_vduph_lane_i16: 5762 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 4)); 5763 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5764 "vget_lane"); 5765 case NEON::BI__builtin_neon_vgetq_lane_i16: 5766 case NEON::BI__builtin_neon_vduph_laneq_i16: 5767 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 8)); 5768 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5769 "vgetq_lane"); 5770 case NEON::BI__builtin_neon_vget_lane_i32: 5771 case NEON::BI__builtin_neon_vdups_lane_i32: 5772 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 2)); 5773 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5774 "vget_lane"); 5775 case NEON::BI__builtin_neon_vdups_lane_f32: 5776 Ops[0] = Builder.CreateBitCast(Ops[0], 5777 llvm::VectorType::get(FloatTy, 2)); 5778 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5779 "vdups_lane"); 5780 case NEON::BI__builtin_neon_vgetq_lane_i32: 5781 case NEON::BI__builtin_neon_vdups_laneq_i32: 5782 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 5783 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5784 "vgetq_lane"); 5785 case NEON::BI__builtin_neon_vget_lane_i64: 5786 case NEON::BI__builtin_neon_vdupd_lane_i64: 5787 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 1)); 5788 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5789 "vget_lane"); 5790 case NEON::BI__builtin_neon_vdupd_lane_f64: 5791 Ops[0] = Builder.CreateBitCast(Ops[0], 5792 llvm::VectorType::get(DoubleTy, 1)); 5793 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5794 "vdupd_lane"); 5795 case NEON::BI__builtin_neon_vgetq_lane_i64: 5796 case NEON::BI__builtin_neon_vdupd_laneq_i64: 5797 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 5798 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5799 "vgetq_lane"); 5800 case NEON::BI__builtin_neon_vget_lane_f32: 5801 Ops[0] = Builder.CreateBitCast(Ops[0], 5802 llvm::VectorType::get(FloatTy, 2)); 5803 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5804 "vget_lane"); 5805 case NEON::BI__builtin_neon_vget_lane_f64: 5806 Ops[0] = Builder.CreateBitCast(Ops[0], 5807 llvm::VectorType::get(DoubleTy, 1)); 5808 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5809 "vget_lane"); 5810 case NEON::BI__builtin_neon_vgetq_lane_f32: 5811 case NEON::BI__builtin_neon_vdups_laneq_f32: 5812 Ops[0] = Builder.CreateBitCast(Ops[0], 5813 llvm::VectorType::get(FloatTy, 4)); 5814 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5815 "vgetq_lane"); 5816 case NEON::BI__builtin_neon_vgetq_lane_f64: 5817 case NEON::BI__builtin_neon_vdupd_laneq_f64: 5818 Ops[0] = Builder.CreateBitCast(Ops[0], 5819 llvm::VectorType::get(DoubleTy, 2)); 5820 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5821 "vgetq_lane"); 5822 case NEON::BI__builtin_neon_vaddd_s64: 5823 case NEON::BI__builtin_neon_vaddd_u64: 5824 return Builder.CreateAdd(Ops[0], EmitScalarExpr(E->getArg(1)), "vaddd"); 5825 case NEON::BI__builtin_neon_vsubd_s64: 5826 case NEON::BI__builtin_neon_vsubd_u64: 5827 return Builder.CreateSub(Ops[0], EmitScalarExpr(E->getArg(1)), "vsubd"); 5828 case NEON::BI__builtin_neon_vqdmlalh_s16: 5829 case NEON::BI__builtin_neon_vqdmlslh_s16: { 5830 SmallVector<Value *, 2> ProductOps; 5831 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 5832 ProductOps.push_back(vectorWrapScalar16(EmitScalarExpr(E->getArg(2)))); 5833 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 5834 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 5835 ProductOps, "vqdmlXl"); 5836 Constant *CI = ConstantInt::get(SizeTy, 0); 5837 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 5838 5839 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlalh_s16 5840 ? Intrinsic::aarch64_neon_sqadd 5841 : Intrinsic::aarch64_neon_sqsub; 5842 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int32Ty), Ops, "vqdmlXl"); 5843 } 5844 case NEON::BI__builtin_neon_vqshlud_n_s64: { 5845 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5846 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 5847 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqshlu, Int64Ty), 5848 Ops, "vqshlu_n"); 5849 } 5850 case NEON::BI__builtin_neon_vqshld_n_u64: 5851 case NEON::BI__builtin_neon_vqshld_n_s64: { 5852 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vqshld_n_u64 5853 ? Intrinsic::aarch64_neon_uqshl 5854 : Intrinsic::aarch64_neon_sqshl; 5855 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5856 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 5857 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vqshl_n"); 5858 } 5859 case NEON::BI__builtin_neon_vrshrd_n_u64: 5860 case NEON::BI__builtin_neon_vrshrd_n_s64: { 5861 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrshrd_n_u64 5862 ? Intrinsic::aarch64_neon_urshl 5863 : Intrinsic::aarch64_neon_srshl; 5864 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5865 int SV = cast<ConstantInt>(Ops[1])->getSExtValue(); 5866 Ops[1] = ConstantInt::get(Int64Ty, -SV); 5867 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vrshr_n"); 5868 } 5869 case NEON::BI__builtin_neon_vrsrad_n_u64: 5870 case NEON::BI__builtin_neon_vrsrad_n_s64: { 5871 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrsrad_n_u64 5872 ? Intrinsic::aarch64_neon_urshl 5873 : Intrinsic::aarch64_neon_srshl; 5874 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 5875 Ops.push_back(Builder.CreateNeg(EmitScalarExpr(E->getArg(2)))); 5876 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Int64Ty), 5877 {Ops[1], Builder.CreateSExt(Ops[2], Int64Ty)}); 5878 return Builder.CreateAdd(Ops[0], Builder.CreateBitCast(Ops[1], Int64Ty)); 5879 } 5880 case NEON::BI__builtin_neon_vshld_n_s64: 5881 case NEON::BI__builtin_neon_vshld_n_u64: { 5882 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 5883 return Builder.CreateShl( 5884 Ops[0], ConstantInt::get(Int64Ty, Amt->getZExtValue()), "shld_n"); 5885 } 5886 case NEON::BI__builtin_neon_vshrd_n_s64: { 5887 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 5888 return Builder.CreateAShr( 5889 Ops[0], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 5890 Amt->getZExtValue())), 5891 "shrd_n"); 5892 } 5893 case NEON::BI__builtin_neon_vshrd_n_u64: { 5894 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 5895 uint64_t ShiftAmt = Amt->getZExtValue(); 5896 // Right-shifting an unsigned value by its size yields 0. 5897 if (ShiftAmt == 64) 5898 return ConstantInt::get(Int64Ty, 0); 5899 return Builder.CreateLShr(Ops[0], ConstantInt::get(Int64Ty, ShiftAmt), 5900 "shrd_n"); 5901 } 5902 case NEON::BI__builtin_neon_vsrad_n_s64: { 5903 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 5904 Ops[1] = Builder.CreateAShr( 5905 Ops[1], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 5906 Amt->getZExtValue())), 5907 "shrd_n"); 5908 return Builder.CreateAdd(Ops[0], Ops[1]); 5909 } 5910 case NEON::BI__builtin_neon_vsrad_n_u64: { 5911 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 5912 uint64_t ShiftAmt = Amt->getZExtValue(); 5913 // Right-shifting an unsigned value by its size yields 0. 5914 // As Op + 0 = Op, return Ops[0] directly. 5915 if (ShiftAmt == 64) 5916 return Ops[0]; 5917 Ops[1] = Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, ShiftAmt), 5918 "shrd_n"); 5919 return Builder.CreateAdd(Ops[0], Ops[1]); 5920 } 5921 case NEON::BI__builtin_neon_vqdmlalh_lane_s16: 5922 case NEON::BI__builtin_neon_vqdmlalh_laneq_s16: 5923 case NEON::BI__builtin_neon_vqdmlslh_lane_s16: 5924 case NEON::BI__builtin_neon_vqdmlslh_laneq_s16: { 5925 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 5926 "lane"); 5927 SmallVector<Value *, 2> ProductOps; 5928 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 5929 ProductOps.push_back(vectorWrapScalar16(Ops[2])); 5930 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 5931 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 5932 ProductOps, "vqdmlXl"); 5933 Constant *CI = ConstantInt::get(SizeTy, 0); 5934 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 5935 Ops.pop_back(); 5936 5937 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlalh_lane_s16 || 5938 BuiltinID == NEON::BI__builtin_neon_vqdmlalh_laneq_s16) 5939 ? Intrinsic::aarch64_neon_sqadd 5940 : Intrinsic::aarch64_neon_sqsub; 5941 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int32Ty), Ops, "vqdmlXl"); 5942 } 5943 case NEON::BI__builtin_neon_vqdmlals_s32: 5944 case NEON::BI__builtin_neon_vqdmlsls_s32: { 5945 SmallVector<Value *, 2> ProductOps; 5946 ProductOps.push_back(Ops[1]); 5947 ProductOps.push_back(EmitScalarExpr(E->getArg(2))); 5948 Ops[1] = 5949 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 5950 ProductOps, "vqdmlXl"); 5951 5952 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlals_s32 5953 ? Intrinsic::aarch64_neon_sqadd 5954 : Intrinsic::aarch64_neon_sqsub; 5955 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int64Ty), Ops, "vqdmlXl"); 5956 } 5957 case NEON::BI__builtin_neon_vqdmlals_lane_s32: 5958 case NEON::BI__builtin_neon_vqdmlals_laneq_s32: 5959 case NEON::BI__builtin_neon_vqdmlsls_lane_s32: 5960 case NEON::BI__builtin_neon_vqdmlsls_laneq_s32: { 5961 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 5962 "lane"); 5963 SmallVector<Value *, 2> ProductOps; 5964 ProductOps.push_back(Ops[1]); 5965 ProductOps.push_back(Ops[2]); 5966 Ops[1] = 5967 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 5968 ProductOps, "vqdmlXl"); 5969 Ops.pop_back(); 5970 5971 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlals_lane_s32 || 5972 BuiltinID == NEON::BI__builtin_neon_vqdmlals_laneq_s32) 5973 ? Intrinsic::aarch64_neon_sqadd 5974 : Intrinsic::aarch64_neon_sqsub; 5975 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl"); 5976 } 5977 } 5978 5979 llvm::VectorType *VTy = GetNeonType(this, Type); 5980 llvm::Type *Ty = VTy; 5981 if (!Ty) 5982 return nullptr; 5983 5984 // Not all intrinsics handled by the common case work for AArch64 yet, so only 5985 // defer to common code if it's been added to our special map. 5986 Builtin = findNeonIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID, 5987 AArch64SIMDIntrinsicsProvenSorted); 5988 5989 if (Builtin) 5990 return EmitCommonNeonBuiltinExpr( 5991 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 5992 Builtin->NameHint, Builtin->TypeModifier, E, Ops, 5993 /*never use addresses*/ Address::invalid(), Address::invalid()); 5994 5995 if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops)) 5996 return V; 5997 5998 unsigned Int; 5999 switch (BuiltinID) { 6000 default: return nullptr; 6001 case NEON::BI__builtin_neon_vbsl_v: 6002 case NEON::BI__builtin_neon_vbslq_v: { 6003 llvm::Type *BitTy = llvm::VectorType::getInteger(VTy); 6004 Ops[0] = Builder.CreateBitCast(Ops[0], BitTy, "vbsl"); 6005 Ops[1] = Builder.CreateBitCast(Ops[1], BitTy, "vbsl"); 6006 Ops[2] = Builder.CreateBitCast(Ops[2], BitTy, "vbsl"); 6007 6008 Ops[1] = Builder.CreateAnd(Ops[0], Ops[1], "vbsl"); 6009 Ops[2] = Builder.CreateAnd(Builder.CreateNot(Ops[0]), Ops[2], "vbsl"); 6010 Ops[0] = Builder.CreateOr(Ops[1], Ops[2], "vbsl"); 6011 return Builder.CreateBitCast(Ops[0], Ty); 6012 } 6013 case NEON::BI__builtin_neon_vfma_lane_v: 6014 case NEON::BI__builtin_neon_vfmaq_lane_v: { // Only used for FP types 6015 // The ARM builtins (and instructions) have the addend as the first 6016 // operand, but the 'fma' intrinsics have it last. Swap it around here. 6017 Value *Addend = Ops[0]; 6018 Value *Multiplicand = Ops[1]; 6019 Value *LaneSource = Ops[2]; 6020 Ops[0] = Multiplicand; 6021 Ops[1] = LaneSource; 6022 Ops[2] = Addend; 6023 6024 // Now adjust things to handle the lane access. 6025 llvm::Type *SourceTy = BuiltinID == NEON::BI__builtin_neon_vfmaq_lane_v ? 6026 llvm::VectorType::get(VTy->getElementType(), VTy->getNumElements() / 2) : 6027 VTy; 6028 llvm::Constant *cst = cast<Constant>(Ops[3]); 6029 Value *SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), cst); 6030 Ops[1] = Builder.CreateBitCast(Ops[1], SourceTy); 6031 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV, "lane"); 6032 6033 Ops.pop_back(); 6034 Int = Intrinsic::fma; 6035 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmla"); 6036 } 6037 case NEON::BI__builtin_neon_vfma_laneq_v: { 6038 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 6039 // v1f64 fma should be mapped to Neon scalar f64 fma 6040 if (VTy && VTy->getElementType() == DoubleTy) { 6041 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 6042 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 6043 llvm::Type *VTy = GetNeonType(this, 6044 NeonTypeFlags(NeonTypeFlags::Float64, false, true)); 6045 Ops[2] = Builder.CreateBitCast(Ops[2], VTy); 6046 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 6047 Value *F = CGM.getIntrinsic(Intrinsic::fma, DoubleTy); 6048 Value *Result = Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 6049 return Builder.CreateBitCast(Result, Ty); 6050 } 6051 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 6052 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6053 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6054 6055 llvm::Type *STy = llvm::VectorType::get(VTy->getElementType(), 6056 VTy->getNumElements() * 2); 6057 Ops[2] = Builder.CreateBitCast(Ops[2], STy); 6058 Value* SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), 6059 cast<ConstantInt>(Ops[3])); 6060 Ops[2] = Builder.CreateShuffleVector(Ops[2], Ops[2], SV, "lane"); 6061 6062 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 6063 } 6064 case NEON::BI__builtin_neon_vfmaq_laneq_v: { 6065 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 6066 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6067 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6068 6069 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6070 Ops[2] = EmitNeonSplat(Ops[2], cast<ConstantInt>(Ops[3])); 6071 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 6072 } 6073 case NEON::BI__builtin_neon_vfmas_lane_f32: 6074 case NEON::BI__builtin_neon_vfmas_laneq_f32: 6075 case NEON::BI__builtin_neon_vfmad_lane_f64: 6076 case NEON::BI__builtin_neon_vfmad_laneq_f64: { 6077 Ops.push_back(EmitScalarExpr(E->getArg(3))); 6078 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 6079 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 6080 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 6081 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 6082 } 6083 case NEON::BI__builtin_neon_vmull_v: 6084 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6085 Int = usgn ? Intrinsic::aarch64_neon_umull : Intrinsic::aarch64_neon_smull; 6086 if (Type.isPoly()) Int = Intrinsic::aarch64_neon_pmull; 6087 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 6088 case NEON::BI__builtin_neon_vmax_v: 6089 case NEON::BI__builtin_neon_vmaxq_v: 6090 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6091 Int = usgn ? Intrinsic::aarch64_neon_umax : Intrinsic::aarch64_neon_smax; 6092 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmax; 6093 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmax"); 6094 case NEON::BI__builtin_neon_vmin_v: 6095 case NEON::BI__builtin_neon_vminq_v: 6096 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6097 Int = usgn ? Intrinsic::aarch64_neon_umin : Intrinsic::aarch64_neon_smin; 6098 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmin; 6099 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmin"); 6100 case NEON::BI__builtin_neon_vabd_v: 6101 case NEON::BI__builtin_neon_vabdq_v: 6102 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6103 Int = usgn ? Intrinsic::aarch64_neon_uabd : Intrinsic::aarch64_neon_sabd; 6104 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fabd; 6105 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vabd"); 6106 case NEON::BI__builtin_neon_vpadal_v: 6107 case NEON::BI__builtin_neon_vpadalq_v: { 6108 unsigned ArgElts = VTy->getNumElements(); 6109 llvm::IntegerType *EltTy = cast<IntegerType>(VTy->getElementType()); 6110 unsigned BitWidth = EltTy->getBitWidth(); 6111 llvm::Type *ArgTy = llvm::VectorType::get( 6112 llvm::IntegerType::get(getLLVMContext(), BitWidth/2), 2*ArgElts); 6113 llvm::Type* Tys[2] = { VTy, ArgTy }; 6114 Int = usgn ? Intrinsic::aarch64_neon_uaddlp : Intrinsic::aarch64_neon_saddlp; 6115 SmallVector<llvm::Value*, 1> TmpOps; 6116 TmpOps.push_back(Ops[1]); 6117 Function *F = CGM.getIntrinsic(Int, Tys); 6118 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vpadal"); 6119 llvm::Value *addend = Builder.CreateBitCast(Ops[0], tmp->getType()); 6120 return Builder.CreateAdd(tmp, addend); 6121 } 6122 case NEON::BI__builtin_neon_vpmin_v: 6123 case NEON::BI__builtin_neon_vpminq_v: 6124 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6125 Int = usgn ? Intrinsic::aarch64_neon_uminp : Intrinsic::aarch64_neon_sminp; 6126 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fminp; 6127 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmin"); 6128 case NEON::BI__builtin_neon_vpmax_v: 6129 case NEON::BI__builtin_neon_vpmaxq_v: 6130 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6131 Int = usgn ? Intrinsic::aarch64_neon_umaxp : Intrinsic::aarch64_neon_smaxp; 6132 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmaxp; 6133 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmax"); 6134 case NEON::BI__builtin_neon_vminnm_v: 6135 case NEON::BI__builtin_neon_vminnmq_v: 6136 Int = Intrinsic::aarch64_neon_fminnm; 6137 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vminnm"); 6138 case NEON::BI__builtin_neon_vmaxnm_v: 6139 case NEON::BI__builtin_neon_vmaxnmq_v: 6140 Int = Intrinsic::aarch64_neon_fmaxnm; 6141 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmaxnm"); 6142 case NEON::BI__builtin_neon_vrecpss_f32: { 6143 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6144 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, FloatTy), 6145 Ops, "vrecps"); 6146 } 6147 case NEON::BI__builtin_neon_vrecpsd_f64: { 6148 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6149 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, DoubleTy), 6150 Ops, "vrecps"); 6151 } 6152 case NEON::BI__builtin_neon_vqshrun_n_v: 6153 Int = Intrinsic::aarch64_neon_sqshrun; 6154 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrun_n"); 6155 case NEON::BI__builtin_neon_vqrshrun_n_v: 6156 Int = Intrinsic::aarch64_neon_sqrshrun; 6157 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrun_n"); 6158 case NEON::BI__builtin_neon_vqshrn_n_v: 6159 Int = usgn ? Intrinsic::aarch64_neon_uqshrn : Intrinsic::aarch64_neon_sqshrn; 6160 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n"); 6161 case NEON::BI__builtin_neon_vrshrn_n_v: 6162 Int = Intrinsic::aarch64_neon_rshrn; 6163 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshrn_n"); 6164 case NEON::BI__builtin_neon_vqrshrn_n_v: 6165 Int = usgn ? Intrinsic::aarch64_neon_uqrshrn : Intrinsic::aarch64_neon_sqrshrn; 6166 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n"); 6167 case NEON::BI__builtin_neon_vrnda_v: 6168 case NEON::BI__builtin_neon_vrndaq_v: { 6169 Int = Intrinsic::round; 6170 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrnda"); 6171 } 6172 case NEON::BI__builtin_neon_vrndi_v: 6173 case NEON::BI__builtin_neon_vrndiq_v: { 6174 Int = Intrinsic::nearbyint; 6175 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndi"); 6176 } 6177 case NEON::BI__builtin_neon_vrndm_v: 6178 case NEON::BI__builtin_neon_vrndmq_v: { 6179 Int = Intrinsic::floor; 6180 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndm"); 6181 } 6182 case NEON::BI__builtin_neon_vrndn_v: 6183 case NEON::BI__builtin_neon_vrndnq_v: { 6184 Int = Intrinsic::aarch64_neon_frintn; 6185 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndn"); 6186 } 6187 case NEON::BI__builtin_neon_vrndp_v: 6188 case NEON::BI__builtin_neon_vrndpq_v: { 6189 Int = Intrinsic::ceil; 6190 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndp"); 6191 } 6192 case NEON::BI__builtin_neon_vrndx_v: 6193 case NEON::BI__builtin_neon_vrndxq_v: { 6194 Int = Intrinsic::rint; 6195 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndx"); 6196 } 6197 case NEON::BI__builtin_neon_vrnd_v: 6198 case NEON::BI__builtin_neon_vrndq_v: { 6199 Int = Intrinsic::trunc; 6200 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndz"); 6201 } 6202 case NEON::BI__builtin_neon_vceqz_v: 6203 case NEON::BI__builtin_neon_vceqzq_v: 6204 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OEQ, 6205 ICmpInst::ICMP_EQ, "vceqz"); 6206 case NEON::BI__builtin_neon_vcgez_v: 6207 case NEON::BI__builtin_neon_vcgezq_v: 6208 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGE, 6209 ICmpInst::ICMP_SGE, "vcgez"); 6210 case NEON::BI__builtin_neon_vclez_v: 6211 case NEON::BI__builtin_neon_vclezq_v: 6212 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLE, 6213 ICmpInst::ICMP_SLE, "vclez"); 6214 case NEON::BI__builtin_neon_vcgtz_v: 6215 case NEON::BI__builtin_neon_vcgtzq_v: 6216 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGT, 6217 ICmpInst::ICMP_SGT, "vcgtz"); 6218 case NEON::BI__builtin_neon_vcltz_v: 6219 case NEON::BI__builtin_neon_vcltzq_v: 6220 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLT, 6221 ICmpInst::ICMP_SLT, "vcltz"); 6222 case NEON::BI__builtin_neon_vcvt_f64_v: 6223 case NEON::BI__builtin_neon_vcvtq_f64_v: 6224 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6225 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad)); 6226 return usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 6227 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 6228 case NEON::BI__builtin_neon_vcvt_f64_f32: { 6229 assert(Type.getEltType() == NeonTypeFlags::Float64 && quad && 6230 "unexpected vcvt_f64_f32 builtin"); 6231 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float32, false, false); 6232 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 6233 6234 return Builder.CreateFPExt(Ops[0], Ty, "vcvt"); 6235 } 6236 case NEON::BI__builtin_neon_vcvt_f32_f64: { 6237 assert(Type.getEltType() == NeonTypeFlags::Float32 && 6238 "unexpected vcvt_f32_f64 builtin"); 6239 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float64, false, true); 6240 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 6241 6242 return Builder.CreateFPTrunc(Ops[0], Ty, "vcvt"); 6243 } 6244 case NEON::BI__builtin_neon_vcvt_s32_v: 6245 case NEON::BI__builtin_neon_vcvt_u32_v: 6246 case NEON::BI__builtin_neon_vcvt_s64_v: 6247 case NEON::BI__builtin_neon_vcvt_u64_v: 6248 case NEON::BI__builtin_neon_vcvtq_s32_v: 6249 case NEON::BI__builtin_neon_vcvtq_u32_v: 6250 case NEON::BI__builtin_neon_vcvtq_s64_v: 6251 case NEON::BI__builtin_neon_vcvtq_u64_v: { 6252 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 6253 if (usgn) 6254 return Builder.CreateFPToUI(Ops[0], Ty); 6255 return Builder.CreateFPToSI(Ops[0], Ty); 6256 } 6257 case NEON::BI__builtin_neon_vcvta_s32_v: 6258 case NEON::BI__builtin_neon_vcvtaq_s32_v: 6259 case NEON::BI__builtin_neon_vcvta_u32_v: 6260 case NEON::BI__builtin_neon_vcvtaq_u32_v: 6261 case NEON::BI__builtin_neon_vcvta_s64_v: 6262 case NEON::BI__builtin_neon_vcvtaq_s64_v: 6263 case NEON::BI__builtin_neon_vcvta_u64_v: 6264 case NEON::BI__builtin_neon_vcvtaq_u64_v: { 6265 Int = usgn ? Intrinsic::aarch64_neon_fcvtau : Intrinsic::aarch64_neon_fcvtas; 6266 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6267 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvta"); 6268 } 6269 case NEON::BI__builtin_neon_vcvtm_s32_v: 6270 case NEON::BI__builtin_neon_vcvtmq_s32_v: 6271 case NEON::BI__builtin_neon_vcvtm_u32_v: 6272 case NEON::BI__builtin_neon_vcvtmq_u32_v: 6273 case NEON::BI__builtin_neon_vcvtm_s64_v: 6274 case NEON::BI__builtin_neon_vcvtmq_s64_v: 6275 case NEON::BI__builtin_neon_vcvtm_u64_v: 6276 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 6277 Int = usgn ? Intrinsic::aarch64_neon_fcvtmu : Intrinsic::aarch64_neon_fcvtms; 6278 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6279 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtm"); 6280 } 6281 case NEON::BI__builtin_neon_vcvtn_s32_v: 6282 case NEON::BI__builtin_neon_vcvtnq_s32_v: 6283 case NEON::BI__builtin_neon_vcvtn_u32_v: 6284 case NEON::BI__builtin_neon_vcvtnq_u32_v: 6285 case NEON::BI__builtin_neon_vcvtn_s64_v: 6286 case NEON::BI__builtin_neon_vcvtnq_s64_v: 6287 case NEON::BI__builtin_neon_vcvtn_u64_v: 6288 case NEON::BI__builtin_neon_vcvtnq_u64_v: { 6289 Int = usgn ? Intrinsic::aarch64_neon_fcvtnu : Intrinsic::aarch64_neon_fcvtns; 6290 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6291 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtn"); 6292 } 6293 case NEON::BI__builtin_neon_vcvtp_s32_v: 6294 case NEON::BI__builtin_neon_vcvtpq_s32_v: 6295 case NEON::BI__builtin_neon_vcvtp_u32_v: 6296 case NEON::BI__builtin_neon_vcvtpq_u32_v: 6297 case NEON::BI__builtin_neon_vcvtp_s64_v: 6298 case NEON::BI__builtin_neon_vcvtpq_s64_v: 6299 case NEON::BI__builtin_neon_vcvtp_u64_v: 6300 case NEON::BI__builtin_neon_vcvtpq_u64_v: { 6301 Int = usgn ? Intrinsic::aarch64_neon_fcvtpu : Intrinsic::aarch64_neon_fcvtps; 6302 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6303 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtp"); 6304 } 6305 case NEON::BI__builtin_neon_vmulx_v: 6306 case NEON::BI__builtin_neon_vmulxq_v: { 6307 Int = Intrinsic::aarch64_neon_fmulx; 6308 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmulx"); 6309 } 6310 case NEON::BI__builtin_neon_vmul_lane_v: 6311 case NEON::BI__builtin_neon_vmul_laneq_v: { 6312 // v1f64 vmul_lane should be mapped to Neon scalar mul lane 6313 bool Quad = false; 6314 if (BuiltinID == NEON::BI__builtin_neon_vmul_laneq_v) 6315 Quad = true; 6316 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 6317 llvm::Type *VTy = GetNeonType(this, 6318 NeonTypeFlags(NeonTypeFlags::Float64, false, Quad)); 6319 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 6320 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 6321 Value *Result = Builder.CreateFMul(Ops[0], Ops[1]); 6322 return Builder.CreateBitCast(Result, Ty); 6323 } 6324 case NEON::BI__builtin_neon_vnegd_s64: 6325 return Builder.CreateNeg(EmitScalarExpr(E->getArg(0)), "vnegd"); 6326 case NEON::BI__builtin_neon_vpmaxnm_v: 6327 case NEON::BI__builtin_neon_vpmaxnmq_v: { 6328 Int = Intrinsic::aarch64_neon_fmaxnmp; 6329 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmaxnm"); 6330 } 6331 case NEON::BI__builtin_neon_vpminnm_v: 6332 case NEON::BI__builtin_neon_vpminnmq_v: { 6333 Int = Intrinsic::aarch64_neon_fminnmp; 6334 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpminnm"); 6335 } 6336 case NEON::BI__builtin_neon_vsqrt_v: 6337 case NEON::BI__builtin_neon_vsqrtq_v: { 6338 Int = Intrinsic::sqrt; 6339 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6340 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqrt"); 6341 } 6342 case NEON::BI__builtin_neon_vrbit_v: 6343 case NEON::BI__builtin_neon_vrbitq_v: { 6344 Int = Intrinsic::aarch64_neon_rbit; 6345 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrbit"); 6346 } 6347 case NEON::BI__builtin_neon_vaddv_u8: 6348 // FIXME: These are handled by the AArch64 scalar code. 6349 usgn = true; 6350 // FALLTHROUGH 6351 case NEON::BI__builtin_neon_vaddv_s8: { 6352 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6353 Ty = Int32Ty; 6354 VTy = llvm::VectorType::get(Int8Ty, 8); 6355 llvm::Type *Tys[2] = { Ty, VTy }; 6356 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6357 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6358 return Builder.CreateTrunc(Ops[0], Int8Ty); 6359 } 6360 case NEON::BI__builtin_neon_vaddv_u16: 6361 usgn = true; 6362 // FALLTHROUGH 6363 case NEON::BI__builtin_neon_vaddv_s16: { 6364 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6365 Ty = Int32Ty; 6366 VTy = llvm::VectorType::get(Int16Ty, 4); 6367 llvm::Type *Tys[2] = { Ty, VTy }; 6368 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6369 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6370 return Builder.CreateTrunc(Ops[0], Int16Ty); 6371 } 6372 case NEON::BI__builtin_neon_vaddvq_u8: 6373 usgn = true; 6374 // FALLTHROUGH 6375 case NEON::BI__builtin_neon_vaddvq_s8: { 6376 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6377 Ty = Int32Ty; 6378 VTy = llvm::VectorType::get(Int8Ty, 16); 6379 llvm::Type *Tys[2] = { Ty, VTy }; 6380 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6381 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6382 return Builder.CreateTrunc(Ops[0], Int8Ty); 6383 } 6384 case NEON::BI__builtin_neon_vaddvq_u16: 6385 usgn = true; 6386 // FALLTHROUGH 6387 case NEON::BI__builtin_neon_vaddvq_s16: { 6388 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6389 Ty = Int32Ty; 6390 VTy = llvm::VectorType::get(Int16Ty, 8); 6391 llvm::Type *Tys[2] = { Ty, VTy }; 6392 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6393 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6394 return Builder.CreateTrunc(Ops[0], Int16Ty); 6395 } 6396 case NEON::BI__builtin_neon_vmaxv_u8: { 6397 Int = Intrinsic::aarch64_neon_umaxv; 6398 Ty = Int32Ty; 6399 VTy = llvm::VectorType::get(Int8Ty, 8); 6400 llvm::Type *Tys[2] = { Ty, VTy }; 6401 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6402 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6403 return Builder.CreateTrunc(Ops[0], Int8Ty); 6404 } 6405 case NEON::BI__builtin_neon_vmaxv_u16: { 6406 Int = Intrinsic::aarch64_neon_umaxv; 6407 Ty = Int32Ty; 6408 VTy = llvm::VectorType::get(Int16Ty, 4); 6409 llvm::Type *Tys[2] = { Ty, VTy }; 6410 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6411 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6412 return Builder.CreateTrunc(Ops[0], Int16Ty); 6413 } 6414 case NEON::BI__builtin_neon_vmaxvq_u8: { 6415 Int = Intrinsic::aarch64_neon_umaxv; 6416 Ty = Int32Ty; 6417 VTy = llvm::VectorType::get(Int8Ty, 16); 6418 llvm::Type *Tys[2] = { Ty, VTy }; 6419 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6420 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6421 return Builder.CreateTrunc(Ops[0], Int8Ty); 6422 } 6423 case NEON::BI__builtin_neon_vmaxvq_u16: { 6424 Int = Intrinsic::aarch64_neon_umaxv; 6425 Ty = Int32Ty; 6426 VTy = llvm::VectorType::get(Int16Ty, 8); 6427 llvm::Type *Tys[2] = { Ty, VTy }; 6428 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6429 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6430 return Builder.CreateTrunc(Ops[0], Int16Ty); 6431 } 6432 case NEON::BI__builtin_neon_vmaxv_s8: { 6433 Int = Intrinsic::aarch64_neon_smaxv; 6434 Ty = Int32Ty; 6435 VTy = llvm::VectorType::get(Int8Ty, 8); 6436 llvm::Type *Tys[2] = { Ty, VTy }; 6437 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6438 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6439 return Builder.CreateTrunc(Ops[0], Int8Ty); 6440 } 6441 case NEON::BI__builtin_neon_vmaxv_s16: { 6442 Int = Intrinsic::aarch64_neon_smaxv; 6443 Ty = Int32Ty; 6444 VTy = llvm::VectorType::get(Int16Ty, 4); 6445 llvm::Type *Tys[2] = { Ty, VTy }; 6446 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6447 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6448 return Builder.CreateTrunc(Ops[0], Int16Ty); 6449 } 6450 case NEON::BI__builtin_neon_vmaxvq_s8: { 6451 Int = Intrinsic::aarch64_neon_smaxv; 6452 Ty = Int32Ty; 6453 VTy = llvm::VectorType::get(Int8Ty, 16); 6454 llvm::Type *Tys[2] = { Ty, VTy }; 6455 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6456 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6457 return Builder.CreateTrunc(Ops[0], Int8Ty); 6458 } 6459 case NEON::BI__builtin_neon_vmaxvq_s16: { 6460 Int = Intrinsic::aarch64_neon_smaxv; 6461 Ty = Int32Ty; 6462 VTy = llvm::VectorType::get(Int16Ty, 8); 6463 llvm::Type *Tys[2] = { Ty, VTy }; 6464 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6465 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6466 return Builder.CreateTrunc(Ops[0], Int16Ty); 6467 } 6468 case NEON::BI__builtin_neon_vminv_u8: { 6469 Int = Intrinsic::aarch64_neon_uminv; 6470 Ty = Int32Ty; 6471 VTy = llvm::VectorType::get(Int8Ty, 8); 6472 llvm::Type *Tys[2] = { Ty, VTy }; 6473 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6474 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6475 return Builder.CreateTrunc(Ops[0], Int8Ty); 6476 } 6477 case NEON::BI__builtin_neon_vminv_u16: { 6478 Int = Intrinsic::aarch64_neon_uminv; 6479 Ty = Int32Ty; 6480 VTy = llvm::VectorType::get(Int16Ty, 4); 6481 llvm::Type *Tys[2] = { Ty, VTy }; 6482 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6483 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6484 return Builder.CreateTrunc(Ops[0], Int16Ty); 6485 } 6486 case NEON::BI__builtin_neon_vminvq_u8: { 6487 Int = Intrinsic::aarch64_neon_uminv; 6488 Ty = Int32Ty; 6489 VTy = llvm::VectorType::get(Int8Ty, 16); 6490 llvm::Type *Tys[2] = { Ty, VTy }; 6491 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6492 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6493 return Builder.CreateTrunc(Ops[0], Int8Ty); 6494 } 6495 case NEON::BI__builtin_neon_vminvq_u16: { 6496 Int = Intrinsic::aarch64_neon_uminv; 6497 Ty = Int32Ty; 6498 VTy = llvm::VectorType::get(Int16Ty, 8); 6499 llvm::Type *Tys[2] = { Ty, VTy }; 6500 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6501 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6502 return Builder.CreateTrunc(Ops[0], Int16Ty); 6503 } 6504 case NEON::BI__builtin_neon_vminv_s8: { 6505 Int = Intrinsic::aarch64_neon_sminv; 6506 Ty = Int32Ty; 6507 VTy = llvm::VectorType::get(Int8Ty, 8); 6508 llvm::Type *Tys[2] = { Ty, VTy }; 6509 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6510 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6511 return Builder.CreateTrunc(Ops[0], Int8Ty); 6512 } 6513 case NEON::BI__builtin_neon_vminv_s16: { 6514 Int = Intrinsic::aarch64_neon_sminv; 6515 Ty = Int32Ty; 6516 VTy = llvm::VectorType::get(Int16Ty, 4); 6517 llvm::Type *Tys[2] = { Ty, VTy }; 6518 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6519 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6520 return Builder.CreateTrunc(Ops[0], Int16Ty); 6521 } 6522 case NEON::BI__builtin_neon_vminvq_s8: { 6523 Int = Intrinsic::aarch64_neon_sminv; 6524 Ty = Int32Ty; 6525 VTy = llvm::VectorType::get(Int8Ty, 16); 6526 llvm::Type *Tys[2] = { Ty, VTy }; 6527 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6528 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6529 return Builder.CreateTrunc(Ops[0], Int8Ty); 6530 } 6531 case NEON::BI__builtin_neon_vminvq_s16: { 6532 Int = Intrinsic::aarch64_neon_sminv; 6533 Ty = Int32Ty; 6534 VTy = llvm::VectorType::get(Int16Ty, 8); 6535 llvm::Type *Tys[2] = { Ty, VTy }; 6536 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6537 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6538 return Builder.CreateTrunc(Ops[0], Int16Ty); 6539 } 6540 case NEON::BI__builtin_neon_vmul_n_f64: { 6541 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 6542 Value *RHS = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), DoubleTy); 6543 return Builder.CreateFMul(Ops[0], RHS); 6544 } 6545 case NEON::BI__builtin_neon_vaddlv_u8: { 6546 Int = Intrinsic::aarch64_neon_uaddlv; 6547 Ty = Int32Ty; 6548 VTy = llvm::VectorType::get(Int8Ty, 8); 6549 llvm::Type *Tys[2] = { Ty, VTy }; 6550 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6551 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6552 return Builder.CreateTrunc(Ops[0], Int16Ty); 6553 } 6554 case NEON::BI__builtin_neon_vaddlv_u16: { 6555 Int = Intrinsic::aarch64_neon_uaddlv; 6556 Ty = Int32Ty; 6557 VTy = llvm::VectorType::get(Int16Ty, 4); 6558 llvm::Type *Tys[2] = { Ty, VTy }; 6559 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6560 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6561 } 6562 case NEON::BI__builtin_neon_vaddlvq_u8: { 6563 Int = Intrinsic::aarch64_neon_uaddlv; 6564 Ty = Int32Ty; 6565 VTy = llvm::VectorType::get(Int8Ty, 16); 6566 llvm::Type *Tys[2] = { Ty, VTy }; 6567 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6568 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6569 return Builder.CreateTrunc(Ops[0], Int16Ty); 6570 } 6571 case NEON::BI__builtin_neon_vaddlvq_u16: { 6572 Int = Intrinsic::aarch64_neon_uaddlv; 6573 Ty = Int32Ty; 6574 VTy = llvm::VectorType::get(Int16Ty, 8); 6575 llvm::Type *Tys[2] = { Ty, VTy }; 6576 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6577 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6578 } 6579 case NEON::BI__builtin_neon_vaddlv_s8: { 6580 Int = Intrinsic::aarch64_neon_saddlv; 6581 Ty = Int32Ty; 6582 VTy = llvm::VectorType::get(Int8Ty, 8); 6583 llvm::Type *Tys[2] = { Ty, VTy }; 6584 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6585 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6586 return Builder.CreateTrunc(Ops[0], Int16Ty); 6587 } 6588 case NEON::BI__builtin_neon_vaddlv_s16: { 6589 Int = Intrinsic::aarch64_neon_saddlv; 6590 Ty = Int32Ty; 6591 VTy = llvm::VectorType::get(Int16Ty, 4); 6592 llvm::Type *Tys[2] = { Ty, VTy }; 6593 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6594 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6595 } 6596 case NEON::BI__builtin_neon_vaddlvq_s8: { 6597 Int = Intrinsic::aarch64_neon_saddlv; 6598 Ty = Int32Ty; 6599 VTy = llvm::VectorType::get(Int8Ty, 16); 6600 llvm::Type *Tys[2] = { Ty, VTy }; 6601 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6602 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6603 return Builder.CreateTrunc(Ops[0], Int16Ty); 6604 } 6605 case NEON::BI__builtin_neon_vaddlvq_s16: { 6606 Int = Intrinsic::aarch64_neon_saddlv; 6607 Ty = Int32Ty; 6608 VTy = llvm::VectorType::get(Int16Ty, 8); 6609 llvm::Type *Tys[2] = { Ty, VTy }; 6610 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6611 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6612 } 6613 case NEON::BI__builtin_neon_vsri_n_v: 6614 case NEON::BI__builtin_neon_vsriq_n_v: { 6615 Int = Intrinsic::aarch64_neon_vsri; 6616 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 6617 return EmitNeonCall(Intrin, Ops, "vsri_n"); 6618 } 6619 case NEON::BI__builtin_neon_vsli_n_v: 6620 case NEON::BI__builtin_neon_vsliq_n_v: { 6621 Int = Intrinsic::aarch64_neon_vsli; 6622 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 6623 return EmitNeonCall(Intrin, Ops, "vsli_n"); 6624 } 6625 case NEON::BI__builtin_neon_vsra_n_v: 6626 case NEON::BI__builtin_neon_vsraq_n_v: 6627 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6628 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 6629 return Builder.CreateAdd(Ops[0], Ops[1]); 6630 case NEON::BI__builtin_neon_vrsra_n_v: 6631 case NEON::BI__builtin_neon_vrsraq_n_v: { 6632 Int = usgn ? Intrinsic::aarch64_neon_urshl : Intrinsic::aarch64_neon_srshl; 6633 SmallVector<llvm::Value*,2> TmpOps; 6634 TmpOps.push_back(Ops[1]); 6635 TmpOps.push_back(Ops[2]); 6636 Function* F = CGM.getIntrinsic(Int, Ty); 6637 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vrshr_n", 1, true); 6638 Ops[0] = Builder.CreateBitCast(Ops[0], VTy); 6639 return Builder.CreateAdd(Ops[0], tmp); 6640 } 6641 // FIXME: Sharing loads & stores with 32-bit is complicated by the absence 6642 // of an Align parameter here. 6643 case NEON::BI__builtin_neon_vld1_x2_v: 6644 case NEON::BI__builtin_neon_vld1q_x2_v: 6645 case NEON::BI__builtin_neon_vld1_x3_v: 6646 case NEON::BI__builtin_neon_vld1q_x3_v: 6647 case NEON::BI__builtin_neon_vld1_x4_v: 6648 case NEON::BI__builtin_neon_vld1q_x4_v: { 6649 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 6650 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6651 llvm::Type *Tys[2] = { VTy, PTy }; 6652 unsigned Int; 6653 switch (BuiltinID) { 6654 case NEON::BI__builtin_neon_vld1_x2_v: 6655 case NEON::BI__builtin_neon_vld1q_x2_v: 6656 Int = Intrinsic::aarch64_neon_ld1x2; 6657 break; 6658 case NEON::BI__builtin_neon_vld1_x3_v: 6659 case NEON::BI__builtin_neon_vld1q_x3_v: 6660 Int = Intrinsic::aarch64_neon_ld1x3; 6661 break; 6662 case NEON::BI__builtin_neon_vld1_x4_v: 6663 case NEON::BI__builtin_neon_vld1q_x4_v: 6664 Int = Intrinsic::aarch64_neon_ld1x4; 6665 break; 6666 } 6667 Function *F = CGM.getIntrinsic(Int, Tys); 6668 Ops[1] = Builder.CreateCall(F, Ops[1], "vld1xN"); 6669 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6670 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6671 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6672 } 6673 case NEON::BI__builtin_neon_vst1_x2_v: 6674 case NEON::BI__builtin_neon_vst1q_x2_v: 6675 case NEON::BI__builtin_neon_vst1_x3_v: 6676 case NEON::BI__builtin_neon_vst1q_x3_v: 6677 case NEON::BI__builtin_neon_vst1_x4_v: 6678 case NEON::BI__builtin_neon_vst1q_x4_v: { 6679 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 6680 llvm::Type *Tys[2] = { VTy, PTy }; 6681 unsigned Int; 6682 switch (BuiltinID) { 6683 case NEON::BI__builtin_neon_vst1_x2_v: 6684 case NEON::BI__builtin_neon_vst1q_x2_v: 6685 Int = Intrinsic::aarch64_neon_st1x2; 6686 break; 6687 case NEON::BI__builtin_neon_vst1_x3_v: 6688 case NEON::BI__builtin_neon_vst1q_x3_v: 6689 Int = Intrinsic::aarch64_neon_st1x3; 6690 break; 6691 case NEON::BI__builtin_neon_vst1_x4_v: 6692 case NEON::BI__builtin_neon_vst1q_x4_v: 6693 Int = Intrinsic::aarch64_neon_st1x4; 6694 break; 6695 } 6696 std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end()); 6697 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 6698 } 6699 case NEON::BI__builtin_neon_vld1_v: 6700 case NEON::BI__builtin_neon_vld1q_v: { 6701 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 6702 auto Alignment = CharUnits::fromQuantity( 6703 BuiltinID == NEON::BI__builtin_neon_vld1_v ? 8 : 16); 6704 return Builder.CreateAlignedLoad(VTy, Ops[0], Alignment); 6705 } 6706 case NEON::BI__builtin_neon_vst1_v: 6707 case NEON::BI__builtin_neon_vst1q_v: 6708 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 6709 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 6710 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6711 case NEON::BI__builtin_neon_vld1_lane_v: 6712 case NEON::BI__builtin_neon_vld1q_lane_v: { 6713 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6714 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 6715 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6716 auto Alignment = CharUnits::fromQuantity( 6717 BuiltinID == NEON::BI__builtin_neon_vld1_lane_v ? 8 : 16); 6718 Ops[0] = 6719 Builder.CreateAlignedLoad(VTy->getElementType(), Ops[0], Alignment); 6720 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vld1_lane"); 6721 } 6722 case NEON::BI__builtin_neon_vld1_dup_v: 6723 case NEON::BI__builtin_neon_vld1q_dup_v: { 6724 Value *V = UndefValue::get(Ty); 6725 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 6726 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6727 auto Alignment = CharUnits::fromQuantity( 6728 BuiltinID == NEON::BI__builtin_neon_vld1_dup_v ? 8 : 16); 6729 Ops[0] = 6730 Builder.CreateAlignedLoad(VTy->getElementType(), Ops[0], Alignment); 6731 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 6732 Ops[0] = Builder.CreateInsertElement(V, Ops[0], CI); 6733 return EmitNeonSplat(Ops[0], CI); 6734 } 6735 case NEON::BI__builtin_neon_vst1_lane_v: 6736 case NEON::BI__builtin_neon_vst1q_lane_v: 6737 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6738 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 6739 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6740 return Builder.CreateDefaultAlignedStore(Ops[1], 6741 Builder.CreateBitCast(Ops[0], Ty)); 6742 case NEON::BI__builtin_neon_vld2_v: 6743 case NEON::BI__builtin_neon_vld2q_v: { 6744 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 6745 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6746 llvm::Type *Tys[2] = { VTy, PTy }; 6747 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2, Tys); 6748 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 6749 Ops[0] = Builder.CreateBitCast(Ops[0], 6750 llvm::PointerType::getUnqual(Ops[1]->getType())); 6751 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6752 } 6753 case NEON::BI__builtin_neon_vld3_v: 6754 case NEON::BI__builtin_neon_vld3q_v: { 6755 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 6756 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6757 llvm::Type *Tys[2] = { VTy, PTy }; 6758 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3, Tys); 6759 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 6760 Ops[0] = Builder.CreateBitCast(Ops[0], 6761 llvm::PointerType::getUnqual(Ops[1]->getType())); 6762 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6763 } 6764 case NEON::BI__builtin_neon_vld4_v: 6765 case NEON::BI__builtin_neon_vld4q_v: { 6766 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 6767 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6768 llvm::Type *Tys[2] = { VTy, PTy }; 6769 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4, Tys); 6770 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 6771 Ops[0] = Builder.CreateBitCast(Ops[0], 6772 llvm::PointerType::getUnqual(Ops[1]->getType())); 6773 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6774 } 6775 case NEON::BI__builtin_neon_vld2_dup_v: 6776 case NEON::BI__builtin_neon_vld2q_dup_v: { 6777 llvm::Type *PTy = 6778 llvm::PointerType::getUnqual(VTy->getElementType()); 6779 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6780 llvm::Type *Tys[2] = { VTy, PTy }; 6781 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2r, Tys); 6782 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 6783 Ops[0] = Builder.CreateBitCast(Ops[0], 6784 llvm::PointerType::getUnqual(Ops[1]->getType())); 6785 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6786 } 6787 case NEON::BI__builtin_neon_vld3_dup_v: 6788 case NEON::BI__builtin_neon_vld3q_dup_v: { 6789 llvm::Type *PTy = 6790 llvm::PointerType::getUnqual(VTy->getElementType()); 6791 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6792 llvm::Type *Tys[2] = { VTy, PTy }; 6793 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3r, Tys); 6794 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 6795 Ops[0] = Builder.CreateBitCast(Ops[0], 6796 llvm::PointerType::getUnqual(Ops[1]->getType())); 6797 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6798 } 6799 case NEON::BI__builtin_neon_vld4_dup_v: 6800 case NEON::BI__builtin_neon_vld4q_dup_v: { 6801 llvm::Type *PTy = 6802 llvm::PointerType::getUnqual(VTy->getElementType()); 6803 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6804 llvm::Type *Tys[2] = { VTy, PTy }; 6805 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4r, Tys); 6806 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 6807 Ops[0] = Builder.CreateBitCast(Ops[0], 6808 llvm::PointerType::getUnqual(Ops[1]->getType())); 6809 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6810 } 6811 case NEON::BI__builtin_neon_vld2_lane_v: 6812 case NEON::BI__builtin_neon_vld2q_lane_v: { 6813 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 6814 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2lane, Tys); 6815 Ops.push_back(Ops[1]); 6816 Ops.erase(Ops.begin()+1); 6817 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6818 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6819 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 6820 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld2_lane"); 6821 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6822 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6823 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6824 } 6825 case NEON::BI__builtin_neon_vld3_lane_v: 6826 case NEON::BI__builtin_neon_vld3q_lane_v: { 6827 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 6828 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3lane, Tys); 6829 Ops.push_back(Ops[1]); 6830 Ops.erase(Ops.begin()+1); 6831 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6832 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6833 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 6834 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 6835 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld3_lane"); 6836 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6837 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6838 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6839 } 6840 case NEON::BI__builtin_neon_vld4_lane_v: 6841 case NEON::BI__builtin_neon_vld4q_lane_v: { 6842 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 6843 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4lane, Tys); 6844 Ops.push_back(Ops[1]); 6845 Ops.erase(Ops.begin()+1); 6846 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6847 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6848 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 6849 Ops[4] = Builder.CreateBitCast(Ops[4], Ty); 6850 Ops[5] = Builder.CreateZExt(Ops[5], Int64Ty); 6851 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld4_lane"); 6852 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6853 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6854 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6855 } 6856 case NEON::BI__builtin_neon_vst2_v: 6857 case NEON::BI__builtin_neon_vst2q_v: { 6858 Ops.push_back(Ops[0]); 6859 Ops.erase(Ops.begin()); 6860 llvm::Type *Tys[2] = { VTy, Ops[2]->getType() }; 6861 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2, Tys), 6862 Ops, ""); 6863 } 6864 case NEON::BI__builtin_neon_vst2_lane_v: 6865 case NEON::BI__builtin_neon_vst2q_lane_v: { 6866 Ops.push_back(Ops[0]); 6867 Ops.erase(Ops.begin()); 6868 Ops[2] = Builder.CreateZExt(Ops[2], Int64Ty); 6869 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 6870 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2lane, Tys), 6871 Ops, ""); 6872 } 6873 case NEON::BI__builtin_neon_vst3_v: 6874 case NEON::BI__builtin_neon_vst3q_v: { 6875 Ops.push_back(Ops[0]); 6876 Ops.erase(Ops.begin()); 6877 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 6878 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3, Tys), 6879 Ops, ""); 6880 } 6881 case NEON::BI__builtin_neon_vst3_lane_v: 6882 case NEON::BI__builtin_neon_vst3q_lane_v: { 6883 Ops.push_back(Ops[0]); 6884 Ops.erase(Ops.begin()); 6885 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 6886 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 6887 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3lane, Tys), 6888 Ops, ""); 6889 } 6890 case NEON::BI__builtin_neon_vst4_v: 6891 case NEON::BI__builtin_neon_vst4q_v: { 6892 Ops.push_back(Ops[0]); 6893 Ops.erase(Ops.begin()); 6894 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 6895 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4, Tys), 6896 Ops, ""); 6897 } 6898 case NEON::BI__builtin_neon_vst4_lane_v: 6899 case NEON::BI__builtin_neon_vst4q_lane_v: { 6900 Ops.push_back(Ops[0]); 6901 Ops.erase(Ops.begin()); 6902 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 6903 llvm::Type *Tys[2] = { VTy, Ops[5]->getType() }; 6904 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4lane, Tys), 6905 Ops, ""); 6906 } 6907 case NEON::BI__builtin_neon_vtrn_v: 6908 case NEON::BI__builtin_neon_vtrnq_v: { 6909 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 6910 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6911 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6912 Value *SV = nullptr; 6913 6914 for (unsigned vi = 0; vi != 2; ++vi) { 6915 SmallVector<uint32_t, 16> Indices; 6916 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 6917 Indices.push_back(i+vi); 6918 Indices.push_back(i+e+vi); 6919 } 6920 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6921 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 6922 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6923 } 6924 return SV; 6925 } 6926 case NEON::BI__builtin_neon_vuzp_v: 6927 case NEON::BI__builtin_neon_vuzpq_v: { 6928 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 6929 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6930 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6931 Value *SV = nullptr; 6932 6933 for (unsigned vi = 0; vi != 2; ++vi) { 6934 SmallVector<uint32_t, 16> Indices; 6935 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 6936 Indices.push_back(2*i+vi); 6937 6938 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6939 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 6940 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6941 } 6942 return SV; 6943 } 6944 case NEON::BI__builtin_neon_vzip_v: 6945 case NEON::BI__builtin_neon_vzipq_v: { 6946 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 6947 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6948 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6949 Value *SV = nullptr; 6950 6951 for (unsigned vi = 0; vi != 2; ++vi) { 6952 SmallVector<uint32_t, 16> Indices; 6953 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 6954 Indices.push_back((i + vi*e) >> 1); 6955 Indices.push_back(((i + vi*e) >> 1)+e); 6956 } 6957 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6958 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 6959 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6960 } 6961 return SV; 6962 } 6963 case NEON::BI__builtin_neon_vqtbl1q_v: { 6964 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl1, Ty), 6965 Ops, "vtbl1"); 6966 } 6967 case NEON::BI__builtin_neon_vqtbl2q_v: { 6968 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl2, Ty), 6969 Ops, "vtbl2"); 6970 } 6971 case NEON::BI__builtin_neon_vqtbl3q_v: { 6972 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl3, Ty), 6973 Ops, "vtbl3"); 6974 } 6975 case NEON::BI__builtin_neon_vqtbl4q_v: { 6976 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl4, Ty), 6977 Ops, "vtbl4"); 6978 } 6979 case NEON::BI__builtin_neon_vqtbx1q_v: { 6980 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx1, Ty), 6981 Ops, "vtbx1"); 6982 } 6983 case NEON::BI__builtin_neon_vqtbx2q_v: { 6984 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx2, Ty), 6985 Ops, "vtbx2"); 6986 } 6987 case NEON::BI__builtin_neon_vqtbx3q_v: { 6988 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx3, Ty), 6989 Ops, "vtbx3"); 6990 } 6991 case NEON::BI__builtin_neon_vqtbx4q_v: { 6992 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx4, Ty), 6993 Ops, "vtbx4"); 6994 } 6995 case NEON::BI__builtin_neon_vsqadd_v: 6996 case NEON::BI__builtin_neon_vsqaddq_v: { 6997 Int = Intrinsic::aarch64_neon_usqadd; 6998 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqadd"); 6999 } 7000 case NEON::BI__builtin_neon_vuqadd_v: 7001 case NEON::BI__builtin_neon_vuqaddq_v: { 7002 Int = Intrinsic::aarch64_neon_suqadd; 7003 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vuqadd"); 7004 } 7005 } 7006 } 7007 7008 llvm::Value *CodeGenFunction:: 7009 BuildVector(ArrayRef<llvm::Value*> Ops) { 7010 assert((Ops.size() & (Ops.size() - 1)) == 0 && 7011 "Not a power-of-two sized vector!"); 7012 bool AllConstants = true; 7013 for (unsigned i = 0, e = Ops.size(); i != e && AllConstants; ++i) 7014 AllConstants &= isa<Constant>(Ops[i]); 7015 7016 // If this is a constant vector, create a ConstantVector. 7017 if (AllConstants) { 7018 SmallVector<llvm::Constant*, 16> CstOps; 7019 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 7020 CstOps.push_back(cast<Constant>(Ops[i])); 7021 return llvm::ConstantVector::get(CstOps); 7022 } 7023 7024 // Otherwise, insertelement the values to build the vector. 7025 Value *Result = 7026 llvm::UndefValue::get(llvm::VectorType::get(Ops[0]->getType(), Ops.size())); 7027 7028 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 7029 Result = Builder.CreateInsertElement(Result, Ops[i], Builder.getInt32(i)); 7030 7031 return Result; 7032 } 7033 7034 // Convert the mask from an integer type to a vector of i1. 7035 static Value *getMaskVecValue(CodeGenFunction &CGF, Value *Mask, 7036 unsigned NumElts) { 7037 7038 llvm::VectorType *MaskTy = llvm::VectorType::get(CGF.Builder.getInt1Ty(), 7039 cast<IntegerType>(Mask->getType())->getBitWidth()); 7040 Value *MaskVec = CGF.Builder.CreateBitCast(Mask, MaskTy); 7041 7042 // If we have less than 8 elements, then the starting mask was an i8 and 7043 // we need to extract down to the right number of elements. 7044 if (NumElts < 8) { 7045 uint32_t Indices[4]; 7046 for (unsigned i = 0; i != NumElts; ++i) 7047 Indices[i] = i; 7048 MaskVec = CGF.Builder.CreateShuffleVector(MaskVec, MaskVec, 7049 makeArrayRef(Indices, NumElts), 7050 "extract"); 7051 } 7052 return MaskVec; 7053 } 7054 7055 static Value *EmitX86MaskedStore(CodeGenFunction &CGF, 7056 SmallVectorImpl<Value *> &Ops, 7057 unsigned Align) { 7058 // Cast the pointer to right type. 7059 Ops[0] = CGF.Builder.CreateBitCast(Ops[0], 7060 llvm::PointerType::getUnqual(Ops[1]->getType())); 7061 7062 // If the mask is all ones just emit a regular store. 7063 if (const auto *C = dyn_cast<Constant>(Ops[2])) 7064 if (C->isAllOnesValue()) 7065 return CGF.Builder.CreateAlignedStore(Ops[1], Ops[0], Align); 7066 7067 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 7068 Ops[1]->getType()->getVectorNumElements()); 7069 7070 return CGF.Builder.CreateMaskedStore(Ops[1], Ops[0], Align, MaskVec); 7071 } 7072 7073 static Value *EmitX86MaskedLoad(CodeGenFunction &CGF, 7074 SmallVectorImpl<Value *> &Ops, unsigned Align) { 7075 // Cast the pointer to right type. 7076 Ops[0] = CGF.Builder.CreateBitCast(Ops[0], 7077 llvm::PointerType::getUnqual(Ops[1]->getType())); 7078 7079 // If the mask is all ones just emit a regular store. 7080 if (const auto *C = dyn_cast<Constant>(Ops[2])) 7081 if (C->isAllOnesValue()) 7082 return CGF.Builder.CreateAlignedLoad(Ops[0], Align); 7083 7084 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 7085 Ops[1]->getType()->getVectorNumElements()); 7086 7087 return CGF.Builder.CreateMaskedLoad(Ops[0], Align, MaskVec, Ops[1]); 7088 } 7089 7090 static Value *EmitX86SubVectorBroadcast(CodeGenFunction &CGF, 7091 SmallVectorImpl<Value *> &Ops, 7092 llvm::Type *DstTy, 7093 unsigned SrcSizeInBits, 7094 unsigned Align) { 7095 // Load the subvector. 7096 Ops[0] = CGF.Builder.CreateAlignedLoad(Ops[0], Align); 7097 7098 // Create broadcast mask. 7099 unsigned NumDstElts = DstTy->getVectorNumElements(); 7100 unsigned NumSrcElts = SrcSizeInBits / DstTy->getScalarSizeInBits(); 7101 7102 SmallVector<uint32_t, 8> Mask; 7103 for (unsigned i = 0; i != NumDstElts; i += NumSrcElts) 7104 for (unsigned j = 0; j != NumSrcElts; ++j) 7105 Mask.push_back(j); 7106 7107 return CGF.Builder.CreateShuffleVector(Ops[0], Ops[0], Mask, "subvecbcst"); 7108 } 7109 7110 static Value *EmitX86Select(CodeGenFunction &CGF, 7111 Value *Mask, Value *Op0, Value *Op1) { 7112 7113 // If the mask is all ones just return first argument. 7114 if (const auto *C = dyn_cast<Constant>(Mask)) 7115 if (C->isAllOnesValue()) 7116 return Op0; 7117 7118 Mask = getMaskVecValue(CGF, Mask, Op0->getType()->getVectorNumElements()); 7119 7120 return CGF.Builder.CreateSelect(Mask, Op0, Op1); 7121 } 7122 7123 static Value *EmitX86MaskedCompare(CodeGenFunction &CGF, unsigned CC, 7124 bool Signed, SmallVectorImpl<Value *> &Ops) { 7125 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 7126 Value *Cmp; 7127 7128 if (CC == 3) { 7129 Cmp = Constant::getNullValue( 7130 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 7131 } else if (CC == 7) { 7132 Cmp = Constant::getAllOnesValue( 7133 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 7134 } else { 7135 ICmpInst::Predicate Pred; 7136 switch (CC) { 7137 default: llvm_unreachable("Unknown condition code"); 7138 case 0: Pred = ICmpInst::ICMP_EQ; break; 7139 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 7140 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 7141 case 4: Pred = ICmpInst::ICMP_NE; break; 7142 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 7143 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 7144 } 7145 Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 7146 } 7147 7148 const auto *C = dyn_cast<Constant>(Ops.back()); 7149 if (!C || !C->isAllOnesValue()) 7150 Cmp = CGF.Builder.CreateAnd(Cmp, getMaskVecValue(CGF, Ops.back(), NumElts)); 7151 7152 if (NumElts < 8) { 7153 uint32_t Indices[8]; 7154 for (unsigned i = 0; i != NumElts; ++i) 7155 Indices[i] = i; 7156 for (unsigned i = NumElts; i != 8; ++i) 7157 Indices[i] = i % NumElts + NumElts; 7158 Cmp = CGF.Builder.CreateShuffleVector( 7159 Cmp, llvm::Constant::getNullValue(Cmp->getType()), Indices); 7160 } 7161 return CGF.Builder.CreateBitCast(Cmp, 7162 IntegerType::get(CGF.getLLVMContext(), 7163 std::max(NumElts, 8U))); 7164 } 7165 7166 static Value *EmitX86MinMax(CodeGenFunction &CGF, ICmpInst::Predicate Pred, 7167 ArrayRef<Value *> Ops) { 7168 Value *Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 7169 Value *Res = CGF.Builder.CreateSelect(Cmp, Ops[0], Ops[1]); 7170 7171 if (Ops.size() == 2) 7172 return Res; 7173 7174 assert(Ops.size() == 4); 7175 return EmitX86Select(CGF, Ops[3], Res, Ops[2]); 7176 } 7177 7178 Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, 7179 const CallExpr *E) { 7180 if (BuiltinID == X86::BI__builtin_ms_va_start || 7181 BuiltinID == X86::BI__builtin_ms_va_end) 7182 return EmitVAStartEnd(EmitMSVAListRef(E->getArg(0)).getPointer(), 7183 BuiltinID == X86::BI__builtin_ms_va_start); 7184 if (BuiltinID == X86::BI__builtin_ms_va_copy) { 7185 // Lower this manually. We can't reliably determine whether or not any 7186 // given va_copy() is for a Win64 va_list from the calling convention 7187 // alone, because it's legal to do this from a System V ABI function. 7188 // With opaque pointer types, we won't have enough information in LLVM 7189 // IR to determine this from the argument types, either. Best to do it 7190 // now, while we have enough information. 7191 Address DestAddr = EmitMSVAListRef(E->getArg(0)); 7192 Address SrcAddr = EmitMSVAListRef(E->getArg(1)); 7193 7194 llvm::Type *BPP = Int8PtrPtrTy; 7195 7196 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), BPP, "cp"), 7197 DestAddr.getAlignment()); 7198 SrcAddr = Address(Builder.CreateBitCast(SrcAddr.getPointer(), BPP, "ap"), 7199 SrcAddr.getAlignment()); 7200 7201 Value *ArgPtr = Builder.CreateLoad(SrcAddr, "ap.val"); 7202 return Builder.CreateStore(ArgPtr, DestAddr); 7203 } 7204 7205 SmallVector<Value*, 4> Ops; 7206 7207 // Find out if any arguments are required to be integer constant expressions. 7208 unsigned ICEArguments = 0; 7209 ASTContext::GetBuiltinTypeError Error; 7210 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 7211 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 7212 7213 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) { 7214 // If this is a normal argument, just emit it as a scalar. 7215 if ((ICEArguments & (1 << i)) == 0) { 7216 Ops.push_back(EmitScalarExpr(E->getArg(i))); 7217 continue; 7218 } 7219 7220 // If this is required to be a constant, constant fold it so that we know 7221 // that the generated intrinsic gets a ConstantInt. 7222 llvm::APSInt Result; 7223 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 7224 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 7225 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 7226 } 7227 7228 // These exist so that the builtin that takes an immediate can be bounds 7229 // checked by clang to avoid passing bad immediates to the backend. Since 7230 // AVX has a larger immediate than SSE we would need separate builtins to 7231 // do the different bounds checking. Rather than create a clang specific 7232 // SSE only builtin, this implements eight separate builtins to match gcc 7233 // implementation. 7234 auto getCmpIntrinsicCall = [this, &Ops](Intrinsic::ID ID, unsigned Imm) { 7235 Ops.push_back(llvm::ConstantInt::get(Int8Ty, Imm)); 7236 llvm::Function *F = CGM.getIntrinsic(ID); 7237 return Builder.CreateCall(F, Ops); 7238 }; 7239 7240 // For the vector forms of FP comparisons, translate the builtins directly to 7241 // IR. 7242 // TODO: The builtins could be removed if the SSE header files used vector 7243 // extension comparisons directly (vector ordered/unordered may need 7244 // additional support via __builtin_isnan()). 7245 auto getVectorFCmpIR = [this, &Ops](CmpInst::Predicate Pred) { 7246 Value *Cmp = Builder.CreateFCmp(Pred, Ops[0], Ops[1]); 7247 llvm::VectorType *FPVecTy = cast<llvm::VectorType>(Ops[0]->getType()); 7248 llvm::VectorType *IntVecTy = llvm::VectorType::getInteger(FPVecTy); 7249 Value *Sext = Builder.CreateSExt(Cmp, IntVecTy); 7250 return Builder.CreateBitCast(Sext, FPVecTy); 7251 }; 7252 7253 switch (BuiltinID) { 7254 default: return nullptr; 7255 case X86::BI__builtin_cpu_supports: { 7256 const Expr *FeatureExpr = E->getArg(0)->IgnoreParenCasts(); 7257 StringRef FeatureStr = cast<StringLiteral>(FeatureExpr)->getString(); 7258 7259 // TODO: When/if this becomes more than x86 specific then use a TargetInfo 7260 // based mapping. 7261 // Processor features and mapping to processor feature value. 7262 enum X86Features { 7263 CMOV = 0, 7264 MMX, 7265 POPCNT, 7266 SSE, 7267 SSE2, 7268 SSE3, 7269 SSSE3, 7270 SSE4_1, 7271 SSE4_2, 7272 AVX, 7273 AVX2, 7274 SSE4_A, 7275 FMA4, 7276 XOP, 7277 FMA, 7278 AVX512F, 7279 BMI, 7280 BMI2, 7281 AES, 7282 PCLMUL, 7283 AVX512VL, 7284 AVX512BW, 7285 AVX512DQ, 7286 AVX512CD, 7287 AVX512ER, 7288 AVX512PF, 7289 AVX512VBMI, 7290 AVX512IFMA, 7291 MAX 7292 }; 7293 7294 X86Features Feature = StringSwitch<X86Features>(FeatureStr) 7295 .Case("cmov", X86Features::CMOV) 7296 .Case("mmx", X86Features::MMX) 7297 .Case("popcnt", X86Features::POPCNT) 7298 .Case("sse", X86Features::SSE) 7299 .Case("sse2", X86Features::SSE2) 7300 .Case("sse3", X86Features::SSE3) 7301 .Case("ssse3", X86Features::SSSE3) 7302 .Case("sse4.1", X86Features::SSE4_1) 7303 .Case("sse4.2", X86Features::SSE4_2) 7304 .Case("avx", X86Features::AVX) 7305 .Case("avx2", X86Features::AVX2) 7306 .Case("sse4a", X86Features::SSE4_A) 7307 .Case("fma4", X86Features::FMA4) 7308 .Case("xop", X86Features::XOP) 7309 .Case("fma", X86Features::FMA) 7310 .Case("avx512f", X86Features::AVX512F) 7311 .Case("bmi", X86Features::BMI) 7312 .Case("bmi2", X86Features::BMI2) 7313 .Case("aes", X86Features::AES) 7314 .Case("pclmul", X86Features::PCLMUL) 7315 .Case("avx512vl", X86Features::AVX512VL) 7316 .Case("avx512bw", X86Features::AVX512BW) 7317 .Case("avx512dq", X86Features::AVX512DQ) 7318 .Case("avx512cd", X86Features::AVX512CD) 7319 .Case("avx512er", X86Features::AVX512ER) 7320 .Case("avx512pf", X86Features::AVX512PF) 7321 .Case("avx512vbmi", X86Features::AVX512VBMI) 7322 .Case("avx512ifma", X86Features::AVX512IFMA) 7323 .Default(X86Features::MAX); 7324 assert(Feature != X86Features::MAX && "Invalid feature!"); 7325 7326 // Matching the struct layout from the compiler-rt/libgcc structure that is 7327 // filled in: 7328 // unsigned int __cpu_vendor; 7329 // unsigned int __cpu_type; 7330 // unsigned int __cpu_subtype; 7331 // unsigned int __cpu_features[1]; 7332 llvm::Type *STy = llvm::StructType::get( 7333 Int32Ty, Int32Ty, Int32Ty, llvm::ArrayType::get(Int32Ty, 1), nullptr); 7334 7335 // Grab the global __cpu_model. 7336 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 7337 7338 // Grab the first (0th) element from the field __cpu_features off of the 7339 // global in the struct STy. 7340 Value *Idxs[] = { 7341 ConstantInt::get(Int32Ty, 0), 7342 ConstantInt::get(Int32Ty, 3), 7343 ConstantInt::get(Int32Ty, 0) 7344 }; 7345 Value *CpuFeatures = Builder.CreateGEP(STy, CpuModel, Idxs); 7346 Value *Features = Builder.CreateAlignedLoad(CpuFeatures, 7347 CharUnits::fromQuantity(4)); 7348 7349 // Check the value of the bit corresponding to the feature requested. 7350 Value *Bitset = Builder.CreateAnd( 7351 Features, llvm::ConstantInt::get(Int32Ty, 1ULL << Feature)); 7352 return Builder.CreateICmpNE(Bitset, llvm::ConstantInt::get(Int32Ty, 0)); 7353 } 7354 case X86::BI_mm_prefetch: { 7355 Value *Address = Ops[0]; 7356 Value *RW = ConstantInt::get(Int32Ty, 0); 7357 Value *Locality = Ops[1]; 7358 Value *Data = ConstantInt::get(Int32Ty, 1); 7359 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 7360 return Builder.CreateCall(F, {Address, RW, Locality, Data}); 7361 } 7362 case X86::BI_mm_clflush: { 7363 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_clflush), 7364 Ops[0]); 7365 } 7366 case X86::BI_mm_lfence: { 7367 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_lfence)); 7368 } 7369 case X86::BI_mm_mfence: { 7370 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_mfence)); 7371 } 7372 case X86::BI_mm_sfence: { 7373 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_sfence)); 7374 } 7375 case X86::BI_mm_pause: { 7376 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_pause)); 7377 } 7378 case X86::BI__rdtsc: { 7379 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_rdtsc)); 7380 } 7381 case X86::BI__builtin_ia32_undef128: 7382 case X86::BI__builtin_ia32_undef256: 7383 case X86::BI__builtin_ia32_undef512: 7384 return UndefValue::get(ConvertType(E->getType())); 7385 case X86::BI__builtin_ia32_vec_init_v8qi: 7386 case X86::BI__builtin_ia32_vec_init_v4hi: 7387 case X86::BI__builtin_ia32_vec_init_v2si: 7388 return Builder.CreateBitCast(BuildVector(Ops), 7389 llvm::Type::getX86_MMXTy(getLLVMContext())); 7390 case X86::BI__builtin_ia32_vec_ext_v2si: 7391 return Builder.CreateExtractElement(Ops[0], 7392 llvm::ConstantInt::get(Ops[1]->getType(), 0)); 7393 case X86::BI_mm_setcsr: 7394 case X86::BI__builtin_ia32_ldmxcsr: { 7395 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 7396 Builder.CreateStore(Ops[0], Tmp); 7397 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_ldmxcsr), 7398 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 7399 } 7400 case X86::BI_mm_getcsr: 7401 case X86::BI__builtin_ia32_stmxcsr: { 7402 Address Tmp = CreateMemTemp(E->getType()); 7403 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_stmxcsr), 7404 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 7405 return Builder.CreateLoad(Tmp, "stmxcsr"); 7406 } 7407 case X86::BI__builtin_ia32_xsave: 7408 case X86::BI__builtin_ia32_xsave64: 7409 case X86::BI__builtin_ia32_xrstor: 7410 case X86::BI__builtin_ia32_xrstor64: 7411 case X86::BI__builtin_ia32_xsaveopt: 7412 case X86::BI__builtin_ia32_xsaveopt64: 7413 case X86::BI__builtin_ia32_xrstors: 7414 case X86::BI__builtin_ia32_xrstors64: 7415 case X86::BI__builtin_ia32_xsavec: 7416 case X86::BI__builtin_ia32_xsavec64: 7417 case X86::BI__builtin_ia32_xsaves: 7418 case X86::BI__builtin_ia32_xsaves64: { 7419 Intrinsic::ID ID; 7420 #define INTRINSIC_X86_XSAVE_ID(NAME) \ 7421 case X86::BI__builtin_ia32_##NAME: \ 7422 ID = Intrinsic::x86_##NAME; \ 7423 break 7424 switch (BuiltinID) { 7425 default: llvm_unreachable("Unsupported intrinsic!"); 7426 INTRINSIC_X86_XSAVE_ID(xsave); 7427 INTRINSIC_X86_XSAVE_ID(xsave64); 7428 INTRINSIC_X86_XSAVE_ID(xrstor); 7429 INTRINSIC_X86_XSAVE_ID(xrstor64); 7430 INTRINSIC_X86_XSAVE_ID(xsaveopt); 7431 INTRINSIC_X86_XSAVE_ID(xsaveopt64); 7432 INTRINSIC_X86_XSAVE_ID(xrstors); 7433 INTRINSIC_X86_XSAVE_ID(xrstors64); 7434 INTRINSIC_X86_XSAVE_ID(xsavec); 7435 INTRINSIC_X86_XSAVE_ID(xsavec64); 7436 INTRINSIC_X86_XSAVE_ID(xsaves); 7437 INTRINSIC_X86_XSAVE_ID(xsaves64); 7438 } 7439 #undef INTRINSIC_X86_XSAVE_ID 7440 Value *Mhi = Builder.CreateTrunc( 7441 Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, 32)), Int32Ty); 7442 Value *Mlo = Builder.CreateTrunc(Ops[1], Int32Ty); 7443 Ops[1] = Mhi; 7444 Ops.push_back(Mlo); 7445 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 7446 } 7447 case X86::BI__builtin_ia32_storedqudi128_mask: 7448 case X86::BI__builtin_ia32_storedqusi128_mask: 7449 case X86::BI__builtin_ia32_storedquhi128_mask: 7450 case X86::BI__builtin_ia32_storedquqi128_mask: 7451 case X86::BI__builtin_ia32_storeupd128_mask: 7452 case X86::BI__builtin_ia32_storeups128_mask: 7453 case X86::BI__builtin_ia32_storedqudi256_mask: 7454 case X86::BI__builtin_ia32_storedqusi256_mask: 7455 case X86::BI__builtin_ia32_storedquhi256_mask: 7456 case X86::BI__builtin_ia32_storedquqi256_mask: 7457 case X86::BI__builtin_ia32_storeupd256_mask: 7458 case X86::BI__builtin_ia32_storeups256_mask: 7459 case X86::BI__builtin_ia32_storedqudi512_mask: 7460 case X86::BI__builtin_ia32_storedqusi512_mask: 7461 case X86::BI__builtin_ia32_storedquhi512_mask: 7462 case X86::BI__builtin_ia32_storedquqi512_mask: 7463 case X86::BI__builtin_ia32_storeupd512_mask: 7464 case X86::BI__builtin_ia32_storeups512_mask: 7465 return EmitX86MaskedStore(*this, Ops, 1); 7466 7467 case X86::BI__builtin_ia32_storess128_mask: 7468 case X86::BI__builtin_ia32_storesd128_mask: { 7469 return EmitX86MaskedStore(*this, Ops, 16); 7470 } 7471 case X86::BI__builtin_ia32_movdqa32store128_mask: 7472 case X86::BI__builtin_ia32_movdqa64store128_mask: 7473 case X86::BI__builtin_ia32_storeaps128_mask: 7474 case X86::BI__builtin_ia32_storeapd128_mask: 7475 case X86::BI__builtin_ia32_movdqa32store256_mask: 7476 case X86::BI__builtin_ia32_movdqa64store256_mask: 7477 case X86::BI__builtin_ia32_storeaps256_mask: 7478 case X86::BI__builtin_ia32_storeapd256_mask: 7479 case X86::BI__builtin_ia32_movdqa32store512_mask: 7480 case X86::BI__builtin_ia32_movdqa64store512_mask: 7481 case X86::BI__builtin_ia32_storeaps512_mask: 7482 case X86::BI__builtin_ia32_storeapd512_mask: { 7483 unsigned Align = 7484 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 7485 return EmitX86MaskedStore(*this, Ops, Align); 7486 } 7487 case X86::BI__builtin_ia32_loadups128_mask: 7488 case X86::BI__builtin_ia32_loadups256_mask: 7489 case X86::BI__builtin_ia32_loadups512_mask: 7490 case X86::BI__builtin_ia32_loadupd128_mask: 7491 case X86::BI__builtin_ia32_loadupd256_mask: 7492 case X86::BI__builtin_ia32_loadupd512_mask: 7493 case X86::BI__builtin_ia32_loaddquqi128_mask: 7494 case X86::BI__builtin_ia32_loaddquqi256_mask: 7495 case X86::BI__builtin_ia32_loaddquqi512_mask: 7496 case X86::BI__builtin_ia32_loaddquhi128_mask: 7497 case X86::BI__builtin_ia32_loaddquhi256_mask: 7498 case X86::BI__builtin_ia32_loaddquhi512_mask: 7499 case X86::BI__builtin_ia32_loaddqusi128_mask: 7500 case X86::BI__builtin_ia32_loaddqusi256_mask: 7501 case X86::BI__builtin_ia32_loaddqusi512_mask: 7502 case X86::BI__builtin_ia32_loaddqudi128_mask: 7503 case X86::BI__builtin_ia32_loaddqudi256_mask: 7504 case X86::BI__builtin_ia32_loaddqudi512_mask: 7505 return EmitX86MaskedLoad(*this, Ops, 1); 7506 7507 case X86::BI__builtin_ia32_loadss128_mask: 7508 case X86::BI__builtin_ia32_loadsd128_mask: 7509 return EmitX86MaskedLoad(*this, Ops, 16); 7510 7511 case X86::BI__builtin_ia32_loadaps128_mask: 7512 case X86::BI__builtin_ia32_loadaps256_mask: 7513 case X86::BI__builtin_ia32_loadaps512_mask: 7514 case X86::BI__builtin_ia32_loadapd128_mask: 7515 case X86::BI__builtin_ia32_loadapd256_mask: 7516 case X86::BI__builtin_ia32_loadapd512_mask: 7517 case X86::BI__builtin_ia32_movdqa32load128_mask: 7518 case X86::BI__builtin_ia32_movdqa32load256_mask: 7519 case X86::BI__builtin_ia32_movdqa32load512_mask: 7520 case X86::BI__builtin_ia32_movdqa64load128_mask: 7521 case X86::BI__builtin_ia32_movdqa64load256_mask: 7522 case X86::BI__builtin_ia32_movdqa64load512_mask: { 7523 unsigned Align = 7524 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 7525 return EmitX86MaskedLoad(*this, Ops, Align); 7526 } 7527 7528 case X86::BI__builtin_ia32_vbroadcastf128_pd256: 7529 case X86::BI__builtin_ia32_vbroadcastf128_ps256: { 7530 llvm::Type *DstTy = ConvertType(E->getType()); 7531 return EmitX86SubVectorBroadcast(*this, Ops, DstTy, 128, 1); 7532 } 7533 7534 case X86::BI__builtin_ia32_storehps: 7535 case X86::BI__builtin_ia32_storelps: { 7536 llvm::Type *PtrTy = llvm::PointerType::getUnqual(Int64Ty); 7537 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 2); 7538 7539 // cast val v2i64 7540 Ops[1] = Builder.CreateBitCast(Ops[1], VecTy, "cast"); 7541 7542 // extract (0, 1) 7543 unsigned Index = BuiltinID == X86::BI__builtin_ia32_storelps ? 0 : 1; 7544 llvm::Value *Idx = llvm::ConstantInt::get(SizeTy, Index); 7545 Ops[1] = Builder.CreateExtractElement(Ops[1], Idx, "extract"); 7546 7547 // cast pointer to i64 & store 7548 Ops[0] = Builder.CreateBitCast(Ops[0], PtrTy); 7549 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7550 } 7551 case X86::BI__builtin_ia32_palignr128: 7552 case X86::BI__builtin_ia32_palignr256: 7553 case X86::BI__builtin_ia32_palignr512_mask: { 7554 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 7555 7556 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 7557 assert(NumElts % 16 == 0); 7558 7559 // If palignr is shifting the pair of vectors more than the size of two 7560 // lanes, emit zero. 7561 if (ShiftVal >= 32) 7562 return llvm::Constant::getNullValue(ConvertType(E->getType())); 7563 7564 // If palignr is shifting the pair of input vectors more than one lane, 7565 // but less than two lanes, convert to shifting in zeroes. 7566 if (ShiftVal > 16) { 7567 ShiftVal -= 16; 7568 Ops[1] = Ops[0]; 7569 Ops[0] = llvm::Constant::getNullValue(Ops[0]->getType()); 7570 } 7571 7572 uint32_t Indices[64]; 7573 // 256-bit palignr operates on 128-bit lanes so we need to handle that 7574 for (unsigned l = 0; l != NumElts; l += 16) { 7575 for (unsigned i = 0; i != 16; ++i) { 7576 unsigned Idx = ShiftVal + i; 7577 if (Idx >= 16) 7578 Idx += NumElts - 16; // End of lane, switch operand. 7579 Indices[l + i] = Idx + l; 7580 } 7581 } 7582 7583 Value *Align = Builder.CreateShuffleVector(Ops[1], Ops[0], 7584 makeArrayRef(Indices, NumElts), 7585 "palignr"); 7586 7587 // If this isn't a masked builtin, just return the align operation. 7588 if (Ops.size() == 3) 7589 return Align; 7590 7591 return EmitX86Select(*this, Ops[4], Align, Ops[3]); 7592 } 7593 7594 case X86::BI__builtin_ia32_movnti: 7595 case X86::BI__builtin_ia32_movnti64: 7596 case X86::BI__builtin_ia32_movntsd: 7597 case X86::BI__builtin_ia32_movntss: { 7598 llvm::MDNode *Node = llvm::MDNode::get( 7599 getLLVMContext(), llvm::ConstantAsMetadata::get(Builder.getInt32(1))); 7600 7601 Value *Ptr = Ops[0]; 7602 Value *Src = Ops[1]; 7603 7604 // Extract the 0'th element of the source vector. 7605 if (BuiltinID == X86::BI__builtin_ia32_movntsd || 7606 BuiltinID == X86::BI__builtin_ia32_movntss) 7607 Src = Builder.CreateExtractElement(Src, (uint64_t)0, "extract"); 7608 7609 // Convert the type of the pointer to a pointer to the stored type. 7610 Value *BC = Builder.CreateBitCast( 7611 Ptr, llvm::PointerType::getUnqual(Src->getType()), "cast"); 7612 7613 // Unaligned nontemporal store of the scalar value. 7614 StoreInst *SI = Builder.CreateDefaultAlignedStore(Src, BC); 7615 SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); 7616 SI->setAlignment(1); 7617 return SI; 7618 } 7619 7620 case X86::BI__builtin_ia32_selectb_128: 7621 case X86::BI__builtin_ia32_selectb_256: 7622 case X86::BI__builtin_ia32_selectb_512: 7623 case X86::BI__builtin_ia32_selectw_128: 7624 case X86::BI__builtin_ia32_selectw_256: 7625 case X86::BI__builtin_ia32_selectw_512: 7626 case X86::BI__builtin_ia32_selectd_128: 7627 case X86::BI__builtin_ia32_selectd_256: 7628 case X86::BI__builtin_ia32_selectd_512: 7629 case X86::BI__builtin_ia32_selectq_128: 7630 case X86::BI__builtin_ia32_selectq_256: 7631 case X86::BI__builtin_ia32_selectq_512: 7632 case X86::BI__builtin_ia32_selectps_128: 7633 case X86::BI__builtin_ia32_selectps_256: 7634 case X86::BI__builtin_ia32_selectps_512: 7635 case X86::BI__builtin_ia32_selectpd_128: 7636 case X86::BI__builtin_ia32_selectpd_256: 7637 case X86::BI__builtin_ia32_selectpd_512: 7638 return EmitX86Select(*this, Ops[0], Ops[1], Ops[2]); 7639 case X86::BI__builtin_ia32_pcmpeqb128_mask: 7640 case X86::BI__builtin_ia32_pcmpeqb256_mask: 7641 case X86::BI__builtin_ia32_pcmpeqb512_mask: 7642 case X86::BI__builtin_ia32_pcmpeqw128_mask: 7643 case X86::BI__builtin_ia32_pcmpeqw256_mask: 7644 case X86::BI__builtin_ia32_pcmpeqw512_mask: 7645 case X86::BI__builtin_ia32_pcmpeqd128_mask: 7646 case X86::BI__builtin_ia32_pcmpeqd256_mask: 7647 case X86::BI__builtin_ia32_pcmpeqd512_mask: 7648 case X86::BI__builtin_ia32_pcmpeqq128_mask: 7649 case X86::BI__builtin_ia32_pcmpeqq256_mask: 7650 case X86::BI__builtin_ia32_pcmpeqq512_mask: 7651 return EmitX86MaskedCompare(*this, 0, false, Ops); 7652 case X86::BI__builtin_ia32_pcmpgtb128_mask: 7653 case X86::BI__builtin_ia32_pcmpgtb256_mask: 7654 case X86::BI__builtin_ia32_pcmpgtb512_mask: 7655 case X86::BI__builtin_ia32_pcmpgtw128_mask: 7656 case X86::BI__builtin_ia32_pcmpgtw256_mask: 7657 case X86::BI__builtin_ia32_pcmpgtw512_mask: 7658 case X86::BI__builtin_ia32_pcmpgtd128_mask: 7659 case X86::BI__builtin_ia32_pcmpgtd256_mask: 7660 case X86::BI__builtin_ia32_pcmpgtd512_mask: 7661 case X86::BI__builtin_ia32_pcmpgtq128_mask: 7662 case X86::BI__builtin_ia32_pcmpgtq256_mask: 7663 case X86::BI__builtin_ia32_pcmpgtq512_mask: 7664 return EmitX86MaskedCompare(*this, 6, true, Ops); 7665 case X86::BI__builtin_ia32_cmpb128_mask: 7666 case X86::BI__builtin_ia32_cmpb256_mask: 7667 case X86::BI__builtin_ia32_cmpb512_mask: 7668 case X86::BI__builtin_ia32_cmpw128_mask: 7669 case X86::BI__builtin_ia32_cmpw256_mask: 7670 case X86::BI__builtin_ia32_cmpw512_mask: 7671 case X86::BI__builtin_ia32_cmpd128_mask: 7672 case X86::BI__builtin_ia32_cmpd256_mask: 7673 case X86::BI__builtin_ia32_cmpd512_mask: 7674 case X86::BI__builtin_ia32_cmpq128_mask: 7675 case X86::BI__builtin_ia32_cmpq256_mask: 7676 case X86::BI__builtin_ia32_cmpq512_mask: { 7677 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 7678 return EmitX86MaskedCompare(*this, CC, true, Ops); 7679 } 7680 case X86::BI__builtin_ia32_ucmpb128_mask: 7681 case X86::BI__builtin_ia32_ucmpb256_mask: 7682 case X86::BI__builtin_ia32_ucmpb512_mask: 7683 case X86::BI__builtin_ia32_ucmpw128_mask: 7684 case X86::BI__builtin_ia32_ucmpw256_mask: 7685 case X86::BI__builtin_ia32_ucmpw512_mask: 7686 case X86::BI__builtin_ia32_ucmpd128_mask: 7687 case X86::BI__builtin_ia32_ucmpd256_mask: 7688 case X86::BI__builtin_ia32_ucmpd512_mask: 7689 case X86::BI__builtin_ia32_ucmpq128_mask: 7690 case X86::BI__builtin_ia32_ucmpq256_mask: 7691 case X86::BI__builtin_ia32_ucmpq512_mask: { 7692 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 7693 return EmitX86MaskedCompare(*this, CC, false, Ops); 7694 } 7695 7696 case X86::BI__builtin_ia32_vplzcntd_128_mask: 7697 case X86::BI__builtin_ia32_vplzcntd_256_mask: 7698 case X86::BI__builtin_ia32_vplzcntd_512_mask: 7699 case X86::BI__builtin_ia32_vplzcntq_128_mask: 7700 case X86::BI__builtin_ia32_vplzcntq_256_mask: 7701 case X86::BI__builtin_ia32_vplzcntq_512_mask: { 7702 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, Ops[0]->getType()); 7703 return EmitX86Select(*this, Ops[2], 7704 Builder.CreateCall(F, {Ops[0],Builder.getInt1(false)}), 7705 Ops[1]); 7706 } 7707 7708 case X86::BI__builtin_ia32_pmaxsb128: 7709 case X86::BI__builtin_ia32_pmaxsw128: 7710 case X86::BI__builtin_ia32_pmaxsd128: 7711 case X86::BI__builtin_ia32_pmaxsq128_mask: 7712 case X86::BI__builtin_ia32_pmaxsb256: 7713 case X86::BI__builtin_ia32_pmaxsw256: 7714 case X86::BI__builtin_ia32_pmaxsd256: 7715 case X86::BI__builtin_ia32_pmaxsq256_mask: 7716 case X86::BI__builtin_ia32_pmaxsb512_mask: 7717 case X86::BI__builtin_ia32_pmaxsw512_mask: 7718 case X86::BI__builtin_ia32_pmaxsd512_mask: 7719 case X86::BI__builtin_ia32_pmaxsq512_mask: 7720 return EmitX86MinMax(*this, ICmpInst::ICMP_SGT, Ops); 7721 case X86::BI__builtin_ia32_pmaxub128: 7722 case X86::BI__builtin_ia32_pmaxuw128: 7723 case X86::BI__builtin_ia32_pmaxud128: 7724 case X86::BI__builtin_ia32_pmaxuq128_mask: 7725 case X86::BI__builtin_ia32_pmaxub256: 7726 case X86::BI__builtin_ia32_pmaxuw256: 7727 case X86::BI__builtin_ia32_pmaxud256: 7728 case X86::BI__builtin_ia32_pmaxuq256_mask: 7729 case X86::BI__builtin_ia32_pmaxub512_mask: 7730 case X86::BI__builtin_ia32_pmaxuw512_mask: 7731 case X86::BI__builtin_ia32_pmaxud512_mask: 7732 case X86::BI__builtin_ia32_pmaxuq512_mask: 7733 return EmitX86MinMax(*this, ICmpInst::ICMP_UGT, Ops); 7734 case X86::BI__builtin_ia32_pminsb128: 7735 case X86::BI__builtin_ia32_pminsw128: 7736 case X86::BI__builtin_ia32_pminsd128: 7737 case X86::BI__builtin_ia32_pminsq128_mask: 7738 case X86::BI__builtin_ia32_pminsb256: 7739 case X86::BI__builtin_ia32_pminsw256: 7740 case X86::BI__builtin_ia32_pminsd256: 7741 case X86::BI__builtin_ia32_pminsq256_mask: 7742 case X86::BI__builtin_ia32_pminsb512_mask: 7743 case X86::BI__builtin_ia32_pminsw512_mask: 7744 case X86::BI__builtin_ia32_pminsd512_mask: 7745 case X86::BI__builtin_ia32_pminsq512_mask: 7746 return EmitX86MinMax(*this, ICmpInst::ICMP_SLT, Ops); 7747 case X86::BI__builtin_ia32_pminub128: 7748 case X86::BI__builtin_ia32_pminuw128: 7749 case X86::BI__builtin_ia32_pminud128: 7750 case X86::BI__builtin_ia32_pminuq128_mask: 7751 case X86::BI__builtin_ia32_pminub256: 7752 case X86::BI__builtin_ia32_pminuw256: 7753 case X86::BI__builtin_ia32_pminud256: 7754 case X86::BI__builtin_ia32_pminuq256_mask: 7755 case X86::BI__builtin_ia32_pminub512_mask: 7756 case X86::BI__builtin_ia32_pminuw512_mask: 7757 case X86::BI__builtin_ia32_pminud512_mask: 7758 case X86::BI__builtin_ia32_pminuq512_mask: 7759 return EmitX86MinMax(*this, ICmpInst::ICMP_ULT, Ops); 7760 7761 // 3DNow! 7762 case X86::BI__builtin_ia32_pswapdsf: 7763 case X86::BI__builtin_ia32_pswapdsi: { 7764 llvm::Type *MMXTy = llvm::Type::getX86_MMXTy(getLLVMContext()); 7765 Ops[0] = Builder.CreateBitCast(Ops[0], MMXTy, "cast"); 7766 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_3dnowa_pswapd); 7767 return Builder.CreateCall(F, Ops, "pswapd"); 7768 } 7769 case X86::BI__builtin_ia32_rdrand16_step: 7770 case X86::BI__builtin_ia32_rdrand32_step: 7771 case X86::BI__builtin_ia32_rdrand64_step: 7772 case X86::BI__builtin_ia32_rdseed16_step: 7773 case X86::BI__builtin_ia32_rdseed32_step: 7774 case X86::BI__builtin_ia32_rdseed64_step: { 7775 Intrinsic::ID ID; 7776 switch (BuiltinID) { 7777 default: llvm_unreachable("Unsupported intrinsic!"); 7778 case X86::BI__builtin_ia32_rdrand16_step: 7779 ID = Intrinsic::x86_rdrand_16; 7780 break; 7781 case X86::BI__builtin_ia32_rdrand32_step: 7782 ID = Intrinsic::x86_rdrand_32; 7783 break; 7784 case X86::BI__builtin_ia32_rdrand64_step: 7785 ID = Intrinsic::x86_rdrand_64; 7786 break; 7787 case X86::BI__builtin_ia32_rdseed16_step: 7788 ID = Intrinsic::x86_rdseed_16; 7789 break; 7790 case X86::BI__builtin_ia32_rdseed32_step: 7791 ID = Intrinsic::x86_rdseed_32; 7792 break; 7793 case X86::BI__builtin_ia32_rdseed64_step: 7794 ID = Intrinsic::x86_rdseed_64; 7795 break; 7796 } 7797 7798 Value *Call = Builder.CreateCall(CGM.getIntrinsic(ID)); 7799 Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 0), 7800 Ops[0]); 7801 return Builder.CreateExtractValue(Call, 1); 7802 } 7803 7804 // SSE packed comparison intrinsics 7805 case X86::BI__builtin_ia32_cmpeqps: 7806 case X86::BI__builtin_ia32_cmpeqpd: 7807 return getVectorFCmpIR(CmpInst::FCMP_OEQ); 7808 case X86::BI__builtin_ia32_cmpltps: 7809 case X86::BI__builtin_ia32_cmpltpd: 7810 return getVectorFCmpIR(CmpInst::FCMP_OLT); 7811 case X86::BI__builtin_ia32_cmpleps: 7812 case X86::BI__builtin_ia32_cmplepd: 7813 return getVectorFCmpIR(CmpInst::FCMP_OLE); 7814 case X86::BI__builtin_ia32_cmpunordps: 7815 case X86::BI__builtin_ia32_cmpunordpd: 7816 return getVectorFCmpIR(CmpInst::FCMP_UNO); 7817 case X86::BI__builtin_ia32_cmpneqps: 7818 case X86::BI__builtin_ia32_cmpneqpd: 7819 return getVectorFCmpIR(CmpInst::FCMP_UNE); 7820 case X86::BI__builtin_ia32_cmpnltps: 7821 case X86::BI__builtin_ia32_cmpnltpd: 7822 return getVectorFCmpIR(CmpInst::FCMP_UGE); 7823 case X86::BI__builtin_ia32_cmpnleps: 7824 case X86::BI__builtin_ia32_cmpnlepd: 7825 return getVectorFCmpIR(CmpInst::FCMP_UGT); 7826 case X86::BI__builtin_ia32_cmpordps: 7827 case X86::BI__builtin_ia32_cmpordpd: 7828 return getVectorFCmpIR(CmpInst::FCMP_ORD); 7829 case X86::BI__builtin_ia32_cmpps: 7830 case X86::BI__builtin_ia32_cmpps256: 7831 case X86::BI__builtin_ia32_cmppd: 7832 case X86::BI__builtin_ia32_cmppd256: { 7833 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 7834 // If this one of the SSE immediates, we can use native IR. 7835 if (CC < 8) { 7836 FCmpInst::Predicate Pred; 7837 switch (CC) { 7838 case 0: Pred = FCmpInst::FCMP_OEQ; break; 7839 case 1: Pred = FCmpInst::FCMP_OLT; break; 7840 case 2: Pred = FCmpInst::FCMP_OLE; break; 7841 case 3: Pred = FCmpInst::FCMP_UNO; break; 7842 case 4: Pred = FCmpInst::FCMP_UNE; break; 7843 case 5: Pred = FCmpInst::FCMP_UGE; break; 7844 case 6: Pred = FCmpInst::FCMP_UGT; break; 7845 case 7: Pred = FCmpInst::FCMP_ORD; break; 7846 } 7847 return getVectorFCmpIR(Pred); 7848 } 7849 7850 // We can't handle 8-31 immediates with native IR, use the intrinsic. 7851 Intrinsic::ID ID; 7852 switch (BuiltinID) { 7853 default: llvm_unreachable("Unsupported intrinsic!"); 7854 case X86::BI__builtin_ia32_cmpps: 7855 ID = Intrinsic::x86_sse_cmp_ps; 7856 break; 7857 case X86::BI__builtin_ia32_cmpps256: 7858 ID = Intrinsic::x86_avx_cmp_ps_256; 7859 break; 7860 case X86::BI__builtin_ia32_cmppd: 7861 ID = Intrinsic::x86_sse2_cmp_pd; 7862 break; 7863 case X86::BI__builtin_ia32_cmppd256: 7864 ID = Intrinsic::x86_avx_cmp_pd_256; 7865 break; 7866 } 7867 7868 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 7869 } 7870 7871 // SSE scalar comparison intrinsics 7872 case X86::BI__builtin_ia32_cmpeqss: 7873 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 0); 7874 case X86::BI__builtin_ia32_cmpltss: 7875 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 1); 7876 case X86::BI__builtin_ia32_cmpless: 7877 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 2); 7878 case X86::BI__builtin_ia32_cmpunordss: 7879 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 3); 7880 case X86::BI__builtin_ia32_cmpneqss: 7881 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 4); 7882 case X86::BI__builtin_ia32_cmpnltss: 7883 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 5); 7884 case X86::BI__builtin_ia32_cmpnless: 7885 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 6); 7886 case X86::BI__builtin_ia32_cmpordss: 7887 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 7); 7888 case X86::BI__builtin_ia32_cmpeqsd: 7889 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 0); 7890 case X86::BI__builtin_ia32_cmpltsd: 7891 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 1); 7892 case X86::BI__builtin_ia32_cmplesd: 7893 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 2); 7894 case X86::BI__builtin_ia32_cmpunordsd: 7895 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 3); 7896 case X86::BI__builtin_ia32_cmpneqsd: 7897 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 4); 7898 case X86::BI__builtin_ia32_cmpnltsd: 7899 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 5); 7900 case X86::BI__builtin_ia32_cmpnlesd: 7901 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 6); 7902 case X86::BI__builtin_ia32_cmpordsd: 7903 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 7); 7904 7905 case X86::BI__emul: 7906 case X86::BI__emulu: { 7907 llvm::Type *Int64Ty = llvm::IntegerType::get(getLLVMContext(), 64); 7908 bool isSigned = (BuiltinID == X86::BI__emul); 7909 Value *LHS = Builder.CreateIntCast(Ops[0], Int64Ty, isSigned); 7910 Value *RHS = Builder.CreateIntCast(Ops[1], Int64Ty, isSigned); 7911 return Builder.CreateMul(LHS, RHS, "", !isSigned, isSigned); 7912 } 7913 case X86::BI__mulh: 7914 case X86::BI__umulh: 7915 case X86::BI_mul128: 7916 case X86::BI_umul128: { 7917 llvm::Type *ResType = ConvertType(E->getType()); 7918 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 7919 7920 bool IsSigned = (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI_mul128); 7921 Value *LHS = Builder.CreateIntCast(Ops[0], Int128Ty, IsSigned); 7922 Value *RHS = Builder.CreateIntCast(Ops[1], Int128Ty, IsSigned); 7923 7924 Value *MulResult, *HigherBits; 7925 if (IsSigned) { 7926 MulResult = Builder.CreateNSWMul(LHS, RHS); 7927 HigherBits = Builder.CreateAShr(MulResult, 64); 7928 } else { 7929 MulResult = Builder.CreateNUWMul(LHS, RHS); 7930 HigherBits = Builder.CreateLShr(MulResult, 64); 7931 } 7932 HigherBits = Builder.CreateIntCast(HigherBits, ResType, IsSigned); 7933 7934 if (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI__umulh) 7935 return HigherBits; 7936 7937 Address HighBitsAddress = EmitPointerWithAlignment(E->getArg(2)); 7938 Builder.CreateStore(HigherBits, HighBitsAddress); 7939 return Builder.CreateIntCast(MulResult, ResType, IsSigned); 7940 } 7941 7942 case X86::BI__faststorefence: { 7943 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 7944 llvm::CrossThread); 7945 } 7946 case X86::BI_ReadWriteBarrier: 7947 case X86::BI_ReadBarrier: 7948 case X86::BI_WriteBarrier: { 7949 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 7950 llvm::SingleThread); 7951 } 7952 case X86::BI_BitScanForward: 7953 case X86::BI_BitScanForward64: 7954 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 7955 case X86::BI_BitScanReverse: 7956 case X86::BI_BitScanReverse64: 7957 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 7958 7959 case X86::BI_InterlockedAnd64: 7960 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 7961 case X86::BI_InterlockedExchange64: 7962 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 7963 case X86::BI_InterlockedExchangeAdd64: 7964 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 7965 case X86::BI_InterlockedExchangeSub64: 7966 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 7967 case X86::BI_InterlockedOr64: 7968 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 7969 case X86::BI_InterlockedXor64: 7970 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 7971 case X86::BI_InterlockedDecrement64: 7972 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 7973 case X86::BI_InterlockedIncrement64: 7974 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 7975 7976 case X86::BI_AddressOfReturnAddress: { 7977 Value *F = CGM.getIntrinsic(Intrinsic::addressofreturnaddress); 7978 return Builder.CreateCall(F); 7979 } 7980 case X86::BI__stosb: { 7981 // We treat __stosb as a volatile memset - it may not generate "rep stosb" 7982 // instruction, but it will create a memset that won't be optimized away. 7983 return Builder.CreateMemSet(Ops[0], Ops[1], Ops[2], 1, true); 7984 } 7985 } 7986 } 7987 7988 7989 Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, 7990 const CallExpr *E) { 7991 SmallVector<Value*, 4> Ops; 7992 7993 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) 7994 Ops.push_back(EmitScalarExpr(E->getArg(i))); 7995 7996 Intrinsic::ID ID = Intrinsic::not_intrinsic; 7997 7998 switch (BuiltinID) { 7999 default: return nullptr; 8000 8001 // __builtin_ppc_get_timebase is GCC 4.8+'s PowerPC-specific name for what we 8002 // call __builtin_readcyclecounter. 8003 case PPC::BI__builtin_ppc_get_timebase: 8004 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::readcyclecounter)); 8005 8006 // vec_ld, vec_xl_be, vec_lvsl, vec_lvsr 8007 case PPC::BI__builtin_altivec_lvx: 8008 case PPC::BI__builtin_altivec_lvxl: 8009 case PPC::BI__builtin_altivec_lvebx: 8010 case PPC::BI__builtin_altivec_lvehx: 8011 case PPC::BI__builtin_altivec_lvewx: 8012 case PPC::BI__builtin_altivec_lvsl: 8013 case PPC::BI__builtin_altivec_lvsr: 8014 case PPC::BI__builtin_vsx_lxvd2x: 8015 case PPC::BI__builtin_vsx_lxvw4x: 8016 case PPC::BI__builtin_vsx_lxvd2x_be: 8017 case PPC::BI__builtin_vsx_lxvw4x_be: 8018 case PPC::BI__builtin_vsx_lxvl: 8019 case PPC::BI__builtin_vsx_lxvll: 8020 { 8021 if(BuiltinID == PPC::BI__builtin_vsx_lxvl || 8022 BuiltinID == PPC::BI__builtin_vsx_lxvll){ 8023 Ops[0] = Builder.CreateBitCast(Ops[0], Int8PtrTy); 8024 }else { 8025 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 8026 Ops[0] = Builder.CreateGEP(Ops[1], Ops[0]); 8027 Ops.pop_back(); 8028 } 8029 8030 switch (BuiltinID) { 8031 default: llvm_unreachable("Unsupported ld/lvsl/lvsr intrinsic!"); 8032 case PPC::BI__builtin_altivec_lvx: 8033 ID = Intrinsic::ppc_altivec_lvx; 8034 break; 8035 case PPC::BI__builtin_altivec_lvxl: 8036 ID = Intrinsic::ppc_altivec_lvxl; 8037 break; 8038 case PPC::BI__builtin_altivec_lvebx: 8039 ID = Intrinsic::ppc_altivec_lvebx; 8040 break; 8041 case PPC::BI__builtin_altivec_lvehx: 8042 ID = Intrinsic::ppc_altivec_lvehx; 8043 break; 8044 case PPC::BI__builtin_altivec_lvewx: 8045 ID = Intrinsic::ppc_altivec_lvewx; 8046 break; 8047 case PPC::BI__builtin_altivec_lvsl: 8048 ID = Intrinsic::ppc_altivec_lvsl; 8049 break; 8050 case PPC::BI__builtin_altivec_lvsr: 8051 ID = Intrinsic::ppc_altivec_lvsr; 8052 break; 8053 case PPC::BI__builtin_vsx_lxvd2x: 8054 ID = Intrinsic::ppc_vsx_lxvd2x; 8055 break; 8056 case PPC::BI__builtin_vsx_lxvw4x: 8057 ID = Intrinsic::ppc_vsx_lxvw4x; 8058 break; 8059 case PPC::BI__builtin_vsx_lxvd2x_be: 8060 ID = Intrinsic::ppc_vsx_lxvd2x_be; 8061 break; 8062 case PPC::BI__builtin_vsx_lxvw4x_be: 8063 ID = Intrinsic::ppc_vsx_lxvw4x_be; 8064 break; 8065 case PPC::BI__builtin_vsx_lxvl: 8066 ID = Intrinsic::ppc_vsx_lxvl; 8067 break; 8068 case PPC::BI__builtin_vsx_lxvll: 8069 ID = Intrinsic::ppc_vsx_lxvll; 8070 break; 8071 } 8072 llvm::Function *F = CGM.getIntrinsic(ID); 8073 return Builder.CreateCall(F, Ops, ""); 8074 } 8075 8076 // vec_st, vec_xst_be 8077 case PPC::BI__builtin_altivec_stvx: 8078 case PPC::BI__builtin_altivec_stvxl: 8079 case PPC::BI__builtin_altivec_stvebx: 8080 case PPC::BI__builtin_altivec_stvehx: 8081 case PPC::BI__builtin_altivec_stvewx: 8082 case PPC::BI__builtin_vsx_stxvd2x: 8083 case PPC::BI__builtin_vsx_stxvw4x: 8084 case PPC::BI__builtin_vsx_stxvd2x_be: 8085 case PPC::BI__builtin_vsx_stxvw4x_be: 8086 case PPC::BI__builtin_vsx_stxvl: 8087 case PPC::BI__builtin_vsx_stxvll: 8088 { 8089 if(BuiltinID == PPC::BI__builtin_vsx_stxvl || 8090 BuiltinID == PPC::BI__builtin_vsx_stxvll ){ 8091 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 8092 }else { 8093 Ops[2] = Builder.CreateBitCast(Ops[2], Int8PtrTy); 8094 Ops[1] = Builder.CreateGEP(Ops[2], Ops[1]); 8095 Ops.pop_back(); 8096 } 8097 8098 switch (BuiltinID) { 8099 default: llvm_unreachable("Unsupported st intrinsic!"); 8100 case PPC::BI__builtin_altivec_stvx: 8101 ID = Intrinsic::ppc_altivec_stvx; 8102 break; 8103 case PPC::BI__builtin_altivec_stvxl: 8104 ID = Intrinsic::ppc_altivec_stvxl; 8105 break; 8106 case PPC::BI__builtin_altivec_stvebx: 8107 ID = Intrinsic::ppc_altivec_stvebx; 8108 break; 8109 case PPC::BI__builtin_altivec_stvehx: 8110 ID = Intrinsic::ppc_altivec_stvehx; 8111 break; 8112 case PPC::BI__builtin_altivec_stvewx: 8113 ID = Intrinsic::ppc_altivec_stvewx; 8114 break; 8115 case PPC::BI__builtin_vsx_stxvd2x: 8116 ID = Intrinsic::ppc_vsx_stxvd2x; 8117 break; 8118 case PPC::BI__builtin_vsx_stxvw4x: 8119 ID = Intrinsic::ppc_vsx_stxvw4x; 8120 break; 8121 case PPC::BI__builtin_vsx_stxvd2x_be: 8122 ID = Intrinsic::ppc_vsx_stxvd2x_be; 8123 break; 8124 case PPC::BI__builtin_vsx_stxvw4x_be: 8125 ID = Intrinsic::ppc_vsx_stxvw4x_be; 8126 break; 8127 case PPC::BI__builtin_vsx_stxvl: 8128 ID = Intrinsic::ppc_vsx_stxvl; 8129 break; 8130 case PPC::BI__builtin_vsx_stxvll: 8131 ID = Intrinsic::ppc_vsx_stxvll; 8132 break; 8133 } 8134 llvm::Function *F = CGM.getIntrinsic(ID); 8135 return Builder.CreateCall(F, Ops, ""); 8136 } 8137 // Square root 8138 case PPC::BI__builtin_vsx_xvsqrtsp: 8139 case PPC::BI__builtin_vsx_xvsqrtdp: { 8140 llvm::Type *ResultType = ConvertType(E->getType()); 8141 Value *X = EmitScalarExpr(E->getArg(0)); 8142 ID = Intrinsic::sqrt; 8143 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 8144 return Builder.CreateCall(F, X); 8145 } 8146 // Count leading zeros 8147 case PPC::BI__builtin_altivec_vclzb: 8148 case PPC::BI__builtin_altivec_vclzh: 8149 case PPC::BI__builtin_altivec_vclzw: 8150 case PPC::BI__builtin_altivec_vclzd: { 8151 llvm::Type *ResultType = ConvertType(E->getType()); 8152 Value *X = EmitScalarExpr(E->getArg(0)); 8153 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 8154 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 8155 return Builder.CreateCall(F, {X, Undef}); 8156 } 8157 case PPC::BI__builtin_altivec_vctzb: 8158 case PPC::BI__builtin_altivec_vctzh: 8159 case PPC::BI__builtin_altivec_vctzw: 8160 case PPC::BI__builtin_altivec_vctzd: { 8161 llvm::Type *ResultType = ConvertType(E->getType()); 8162 Value *X = EmitScalarExpr(E->getArg(0)); 8163 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 8164 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 8165 return Builder.CreateCall(F, {X, Undef}); 8166 } 8167 case PPC::BI__builtin_altivec_vpopcntb: 8168 case PPC::BI__builtin_altivec_vpopcnth: 8169 case PPC::BI__builtin_altivec_vpopcntw: 8170 case PPC::BI__builtin_altivec_vpopcntd: { 8171 llvm::Type *ResultType = ConvertType(E->getType()); 8172 Value *X = EmitScalarExpr(E->getArg(0)); 8173 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 8174 return Builder.CreateCall(F, X); 8175 } 8176 // Copy sign 8177 case PPC::BI__builtin_vsx_xvcpsgnsp: 8178 case PPC::BI__builtin_vsx_xvcpsgndp: { 8179 llvm::Type *ResultType = ConvertType(E->getType()); 8180 Value *X = EmitScalarExpr(E->getArg(0)); 8181 Value *Y = EmitScalarExpr(E->getArg(1)); 8182 ID = Intrinsic::copysign; 8183 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 8184 return Builder.CreateCall(F, {X, Y}); 8185 } 8186 // Rounding/truncation 8187 case PPC::BI__builtin_vsx_xvrspip: 8188 case PPC::BI__builtin_vsx_xvrdpip: 8189 case PPC::BI__builtin_vsx_xvrdpim: 8190 case PPC::BI__builtin_vsx_xvrspim: 8191 case PPC::BI__builtin_vsx_xvrdpi: 8192 case PPC::BI__builtin_vsx_xvrspi: 8193 case PPC::BI__builtin_vsx_xvrdpic: 8194 case PPC::BI__builtin_vsx_xvrspic: 8195 case PPC::BI__builtin_vsx_xvrdpiz: 8196 case PPC::BI__builtin_vsx_xvrspiz: { 8197 llvm::Type *ResultType = ConvertType(E->getType()); 8198 Value *X = EmitScalarExpr(E->getArg(0)); 8199 if (BuiltinID == PPC::BI__builtin_vsx_xvrdpim || 8200 BuiltinID == PPC::BI__builtin_vsx_xvrspim) 8201 ID = Intrinsic::floor; 8202 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpi || 8203 BuiltinID == PPC::BI__builtin_vsx_xvrspi) 8204 ID = Intrinsic::round; 8205 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpic || 8206 BuiltinID == PPC::BI__builtin_vsx_xvrspic) 8207 ID = Intrinsic::nearbyint; 8208 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpip || 8209 BuiltinID == PPC::BI__builtin_vsx_xvrspip) 8210 ID = Intrinsic::ceil; 8211 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpiz || 8212 BuiltinID == PPC::BI__builtin_vsx_xvrspiz) 8213 ID = Intrinsic::trunc; 8214 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 8215 return Builder.CreateCall(F, X); 8216 } 8217 8218 // Absolute value 8219 case PPC::BI__builtin_vsx_xvabsdp: 8220 case PPC::BI__builtin_vsx_xvabssp: { 8221 llvm::Type *ResultType = ConvertType(E->getType()); 8222 Value *X = EmitScalarExpr(E->getArg(0)); 8223 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 8224 return Builder.CreateCall(F, X); 8225 } 8226 8227 // FMA variations 8228 case PPC::BI__builtin_vsx_xvmaddadp: 8229 case PPC::BI__builtin_vsx_xvmaddasp: 8230 case PPC::BI__builtin_vsx_xvnmaddadp: 8231 case PPC::BI__builtin_vsx_xvnmaddasp: 8232 case PPC::BI__builtin_vsx_xvmsubadp: 8233 case PPC::BI__builtin_vsx_xvmsubasp: 8234 case PPC::BI__builtin_vsx_xvnmsubadp: 8235 case PPC::BI__builtin_vsx_xvnmsubasp: { 8236 llvm::Type *ResultType = ConvertType(E->getType()); 8237 Value *X = EmitScalarExpr(E->getArg(0)); 8238 Value *Y = EmitScalarExpr(E->getArg(1)); 8239 Value *Z = EmitScalarExpr(E->getArg(2)); 8240 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 8241 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 8242 switch (BuiltinID) { 8243 case PPC::BI__builtin_vsx_xvmaddadp: 8244 case PPC::BI__builtin_vsx_xvmaddasp: 8245 return Builder.CreateCall(F, {X, Y, Z}); 8246 case PPC::BI__builtin_vsx_xvnmaddadp: 8247 case PPC::BI__builtin_vsx_xvnmaddasp: 8248 return Builder.CreateFSub(Zero, 8249 Builder.CreateCall(F, {X, Y, Z}), "sub"); 8250 case PPC::BI__builtin_vsx_xvmsubadp: 8251 case PPC::BI__builtin_vsx_xvmsubasp: 8252 return Builder.CreateCall(F, 8253 {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 8254 case PPC::BI__builtin_vsx_xvnmsubadp: 8255 case PPC::BI__builtin_vsx_xvnmsubasp: 8256 Value *FsubRes = 8257 Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 8258 return Builder.CreateFSub(Zero, FsubRes, "sub"); 8259 } 8260 llvm_unreachable("Unknown FMA operation"); 8261 return nullptr; // Suppress no-return warning 8262 } 8263 8264 case PPC::BI__builtin_vsx_insertword: { 8265 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_vsx_xxinsertw); 8266 8267 // Third argument is a compile time constant int. It must be clamped to 8268 // to the range [0, 12]. 8269 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[2]); 8270 assert(ArgCI && 8271 "Third arg to xxinsertw intrinsic must be constant integer"); 8272 const int64_t MaxIndex = 12; 8273 int64_t Index = clamp(ArgCI->getSExtValue(), 0, MaxIndex); 8274 8275 // The builtin semantics don't exactly match the xxinsertw instructions 8276 // semantics (which ppc_vsx_xxinsertw follows). The builtin extracts the 8277 // word from the first argument, and inserts it in the second argument. The 8278 // instruction extracts the word from its second input register and inserts 8279 // it into its first input register, so swap the first and second arguments. 8280 std::swap(Ops[0], Ops[1]); 8281 8282 // Need to cast the second argument from a vector of unsigned int to a 8283 // vector of long long. 8284 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int64Ty, 2)); 8285 8286 if (getTarget().isLittleEndian()) { 8287 // Create a shuffle mask of (1, 0) 8288 Constant *ShuffleElts[2] = { ConstantInt::get(Int32Ty, 1), 8289 ConstantInt::get(Int32Ty, 0) 8290 }; 8291 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 8292 8293 // Reverse the double words in the vector we will extract from. 8294 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 8295 Ops[0] = Builder.CreateShuffleVector(Ops[0], Ops[0], ShuffleMask); 8296 8297 // Reverse the index. 8298 Index = MaxIndex - Index; 8299 } 8300 8301 // Intrinsic expects the first arg to be a vector of int. 8302 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 8303 Ops[2] = ConstantInt::getSigned(Int32Ty, Index); 8304 return Builder.CreateCall(F, Ops); 8305 } 8306 8307 case PPC::BI__builtin_vsx_extractuword: { 8308 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_vsx_xxextractuw); 8309 8310 // Intrinsic expects the first argument to be a vector of doublewords. 8311 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 8312 8313 // The second argument is a compile time constant int that needs to 8314 // be clamped to the range [0, 12]. 8315 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[1]); 8316 assert(ArgCI && 8317 "Second Arg to xxextractuw intrinsic must be a constant integer!"); 8318 const int64_t MaxIndex = 12; 8319 int64_t Index = clamp(ArgCI->getSExtValue(), 0, MaxIndex); 8320 8321 if (getTarget().isLittleEndian()) { 8322 // Reverse the index. 8323 Index = MaxIndex - Index; 8324 Ops[1] = ConstantInt::getSigned(Int32Ty, Index); 8325 8326 // Emit the call, then reverse the double words of the results vector. 8327 Value *Call = Builder.CreateCall(F, Ops); 8328 8329 // Create a shuffle mask of (1, 0) 8330 Constant *ShuffleElts[2] = { ConstantInt::get(Int32Ty, 1), 8331 ConstantInt::get(Int32Ty, 0) 8332 }; 8333 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 8334 8335 Value *ShuffleCall = Builder.CreateShuffleVector(Call, Call, ShuffleMask); 8336 return ShuffleCall; 8337 } else { 8338 Ops[1] = ConstantInt::getSigned(Int32Ty, Index); 8339 return Builder.CreateCall(F, Ops); 8340 } 8341 } 8342 } 8343 } 8344 8345 Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID, 8346 const CallExpr *E) { 8347 switch (BuiltinID) { 8348 case AMDGPU::BI__builtin_amdgcn_div_scale: 8349 case AMDGPU::BI__builtin_amdgcn_div_scalef: { 8350 // Translate from the intrinsics's struct return to the builtin's out 8351 // argument. 8352 8353 Address FlagOutPtr = EmitPointerWithAlignment(E->getArg(3)); 8354 8355 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 8356 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 8357 llvm::Value *Z = EmitScalarExpr(E->getArg(2)); 8358 8359 llvm::Value *Callee = CGM.getIntrinsic(Intrinsic::amdgcn_div_scale, 8360 X->getType()); 8361 8362 llvm::Value *Tmp = Builder.CreateCall(Callee, {X, Y, Z}); 8363 8364 llvm::Value *Result = Builder.CreateExtractValue(Tmp, 0); 8365 llvm::Value *Flag = Builder.CreateExtractValue(Tmp, 1); 8366 8367 llvm::Type *RealFlagType 8368 = FlagOutPtr.getPointer()->getType()->getPointerElementType(); 8369 8370 llvm::Value *FlagExt = Builder.CreateZExt(Flag, RealFlagType); 8371 Builder.CreateStore(FlagExt, FlagOutPtr); 8372 return Result; 8373 } 8374 case AMDGPU::BI__builtin_amdgcn_div_fmas: 8375 case AMDGPU::BI__builtin_amdgcn_div_fmasf: { 8376 llvm::Value *Src0 = EmitScalarExpr(E->getArg(0)); 8377 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); 8378 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); 8379 llvm::Value *Src3 = EmitScalarExpr(E->getArg(3)); 8380 8381 llvm::Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_div_fmas, 8382 Src0->getType()); 8383 llvm::Value *Src3ToBool = Builder.CreateIsNotNull(Src3); 8384 return Builder.CreateCall(F, {Src0, Src1, Src2, Src3ToBool}); 8385 } 8386 8387 case AMDGPU::BI__builtin_amdgcn_ds_swizzle: 8388 return emitBinaryBuiltin(*this, E, Intrinsic::amdgcn_ds_swizzle); 8389 case AMDGPU::BI__builtin_amdgcn_div_fixup: 8390 case AMDGPU::BI__builtin_amdgcn_div_fixupf: 8391 case AMDGPU::BI__builtin_amdgcn_div_fixuph: 8392 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_div_fixup); 8393 case AMDGPU::BI__builtin_amdgcn_trig_preop: 8394 case AMDGPU::BI__builtin_amdgcn_trig_preopf: 8395 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_trig_preop); 8396 case AMDGPU::BI__builtin_amdgcn_rcp: 8397 case AMDGPU::BI__builtin_amdgcn_rcpf: 8398 case AMDGPU::BI__builtin_amdgcn_rcph: 8399 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rcp); 8400 case AMDGPU::BI__builtin_amdgcn_rsq: 8401 case AMDGPU::BI__builtin_amdgcn_rsqf: 8402 case AMDGPU::BI__builtin_amdgcn_rsqh: 8403 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq); 8404 case AMDGPU::BI__builtin_amdgcn_rsq_clamp: 8405 case AMDGPU::BI__builtin_amdgcn_rsq_clampf: 8406 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq_clamp); 8407 case AMDGPU::BI__builtin_amdgcn_sinf: 8408 case AMDGPU::BI__builtin_amdgcn_sinh: 8409 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_sin); 8410 case AMDGPU::BI__builtin_amdgcn_cosf: 8411 case AMDGPU::BI__builtin_amdgcn_cosh: 8412 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_cos); 8413 case AMDGPU::BI__builtin_amdgcn_log_clampf: 8414 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_log_clamp); 8415 case AMDGPU::BI__builtin_amdgcn_ldexp: 8416 case AMDGPU::BI__builtin_amdgcn_ldexpf: 8417 case AMDGPU::BI__builtin_amdgcn_ldexph: 8418 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_ldexp); 8419 case AMDGPU::BI__builtin_amdgcn_frexp_mant: 8420 case AMDGPU::BI__builtin_amdgcn_frexp_mantf: 8421 case AMDGPU::BI__builtin_amdgcn_frexp_manth: 8422 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_frexp_mant); 8423 case AMDGPU::BI__builtin_amdgcn_frexp_exp: 8424 case AMDGPU::BI__builtin_amdgcn_frexp_expf: { 8425 Value *Src0 = EmitScalarExpr(E->getArg(0)); 8426 Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_frexp_exp, 8427 { Builder.getInt32Ty(), Src0->getType() }); 8428 return Builder.CreateCall(F, Src0); 8429 } 8430 case AMDGPU::BI__builtin_amdgcn_frexp_exph: { 8431 Value *Src0 = EmitScalarExpr(E->getArg(0)); 8432 Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_frexp_exp, 8433 { Builder.getInt16Ty(), Src0->getType() }); 8434 return Builder.CreateCall(F, Src0); 8435 } 8436 case AMDGPU::BI__builtin_amdgcn_fract: 8437 case AMDGPU::BI__builtin_amdgcn_fractf: 8438 case AMDGPU::BI__builtin_amdgcn_fracth: 8439 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_fract); 8440 case AMDGPU::BI__builtin_amdgcn_lerp: 8441 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_lerp); 8442 case AMDGPU::BI__builtin_amdgcn_uicmp: 8443 case AMDGPU::BI__builtin_amdgcn_uicmpl: 8444 case AMDGPU::BI__builtin_amdgcn_sicmp: 8445 case AMDGPU::BI__builtin_amdgcn_sicmpl: 8446 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_icmp); 8447 case AMDGPU::BI__builtin_amdgcn_fcmp: 8448 case AMDGPU::BI__builtin_amdgcn_fcmpf: 8449 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_fcmp); 8450 case AMDGPU::BI__builtin_amdgcn_class: 8451 case AMDGPU::BI__builtin_amdgcn_classf: 8452 case AMDGPU::BI__builtin_amdgcn_classh: 8453 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_class); 8454 case AMDGPU::BI__builtin_amdgcn_fmed3f: 8455 case AMDGPU::BI__builtin_amdgcn_fmed3h: 8456 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_fmed3); 8457 case AMDGPU::BI__builtin_amdgcn_read_exec: { 8458 CallInst *CI = cast<CallInst>( 8459 EmitSpecialRegisterBuiltin(*this, E, Int64Ty, Int64Ty, true, "exec")); 8460 CI->setConvergent(); 8461 return CI; 8462 } 8463 8464 // amdgcn workitem 8465 case AMDGPU::BI__builtin_amdgcn_workitem_id_x: 8466 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_x, 0, 1024); 8467 case AMDGPU::BI__builtin_amdgcn_workitem_id_y: 8468 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_y, 0, 1024); 8469 case AMDGPU::BI__builtin_amdgcn_workitem_id_z: 8470 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_z, 0, 1024); 8471 8472 // r600 intrinsics 8473 case AMDGPU::BI__builtin_r600_recipsqrt_ieee: 8474 case AMDGPU::BI__builtin_r600_recipsqrt_ieeef: 8475 return emitUnaryBuiltin(*this, E, Intrinsic::r600_recipsqrt_ieee); 8476 case AMDGPU::BI__builtin_r600_read_tidig_x: 8477 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_x, 0, 1024); 8478 case AMDGPU::BI__builtin_r600_read_tidig_y: 8479 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_y, 0, 1024); 8480 case AMDGPU::BI__builtin_r600_read_tidig_z: 8481 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_z, 0, 1024); 8482 default: 8483 return nullptr; 8484 } 8485 } 8486 8487 /// Handle a SystemZ function in which the final argument is a pointer 8488 /// to an int that receives the post-instruction CC value. At the LLVM level 8489 /// this is represented as a function that returns a {result, cc} pair. 8490 static Value *EmitSystemZIntrinsicWithCC(CodeGenFunction &CGF, 8491 unsigned IntrinsicID, 8492 const CallExpr *E) { 8493 unsigned NumArgs = E->getNumArgs() - 1; 8494 SmallVector<Value *, 8> Args(NumArgs); 8495 for (unsigned I = 0; I < NumArgs; ++I) 8496 Args[I] = CGF.EmitScalarExpr(E->getArg(I)); 8497 Address CCPtr = CGF.EmitPointerWithAlignment(E->getArg(NumArgs)); 8498 Value *F = CGF.CGM.getIntrinsic(IntrinsicID); 8499 Value *Call = CGF.Builder.CreateCall(F, Args); 8500 Value *CC = CGF.Builder.CreateExtractValue(Call, 1); 8501 CGF.Builder.CreateStore(CC, CCPtr); 8502 return CGF.Builder.CreateExtractValue(Call, 0); 8503 } 8504 8505 Value *CodeGenFunction::EmitSystemZBuiltinExpr(unsigned BuiltinID, 8506 const CallExpr *E) { 8507 switch (BuiltinID) { 8508 case SystemZ::BI__builtin_tbegin: { 8509 Value *TDB = EmitScalarExpr(E->getArg(0)); 8510 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 8511 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin); 8512 return Builder.CreateCall(F, {TDB, Control}); 8513 } 8514 case SystemZ::BI__builtin_tbegin_nofloat: { 8515 Value *TDB = EmitScalarExpr(E->getArg(0)); 8516 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 8517 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin_nofloat); 8518 return Builder.CreateCall(F, {TDB, Control}); 8519 } 8520 case SystemZ::BI__builtin_tbeginc: { 8521 Value *TDB = llvm::ConstantPointerNull::get(Int8PtrTy); 8522 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff08); 8523 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbeginc); 8524 return Builder.CreateCall(F, {TDB, Control}); 8525 } 8526 case SystemZ::BI__builtin_tabort: { 8527 Value *Data = EmitScalarExpr(E->getArg(0)); 8528 Value *F = CGM.getIntrinsic(Intrinsic::s390_tabort); 8529 return Builder.CreateCall(F, Builder.CreateSExt(Data, Int64Ty, "tabort")); 8530 } 8531 case SystemZ::BI__builtin_non_tx_store: { 8532 Value *Address = EmitScalarExpr(E->getArg(0)); 8533 Value *Data = EmitScalarExpr(E->getArg(1)); 8534 Value *F = CGM.getIntrinsic(Intrinsic::s390_ntstg); 8535 return Builder.CreateCall(F, {Data, Address}); 8536 } 8537 8538 // Vector builtins. Note that most vector builtins are mapped automatically 8539 // to target-specific LLVM intrinsics. The ones handled specially here can 8540 // be represented via standard LLVM IR, which is preferable to enable common 8541 // LLVM optimizations. 8542 8543 case SystemZ::BI__builtin_s390_vpopctb: 8544 case SystemZ::BI__builtin_s390_vpopcth: 8545 case SystemZ::BI__builtin_s390_vpopctf: 8546 case SystemZ::BI__builtin_s390_vpopctg: { 8547 llvm::Type *ResultType = ConvertType(E->getType()); 8548 Value *X = EmitScalarExpr(E->getArg(0)); 8549 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 8550 return Builder.CreateCall(F, X); 8551 } 8552 8553 case SystemZ::BI__builtin_s390_vclzb: 8554 case SystemZ::BI__builtin_s390_vclzh: 8555 case SystemZ::BI__builtin_s390_vclzf: 8556 case SystemZ::BI__builtin_s390_vclzg: { 8557 llvm::Type *ResultType = ConvertType(E->getType()); 8558 Value *X = EmitScalarExpr(E->getArg(0)); 8559 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 8560 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 8561 return Builder.CreateCall(F, {X, Undef}); 8562 } 8563 8564 case SystemZ::BI__builtin_s390_vctzb: 8565 case SystemZ::BI__builtin_s390_vctzh: 8566 case SystemZ::BI__builtin_s390_vctzf: 8567 case SystemZ::BI__builtin_s390_vctzg: { 8568 llvm::Type *ResultType = ConvertType(E->getType()); 8569 Value *X = EmitScalarExpr(E->getArg(0)); 8570 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 8571 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 8572 return Builder.CreateCall(F, {X, Undef}); 8573 } 8574 8575 case SystemZ::BI__builtin_s390_vfsqdb: { 8576 llvm::Type *ResultType = ConvertType(E->getType()); 8577 Value *X = EmitScalarExpr(E->getArg(0)); 8578 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, ResultType); 8579 return Builder.CreateCall(F, X); 8580 } 8581 case SystemZ::BI__builtin_s390_vfmadb: { 8582 llvm::Type *ResultType = ConvertType(E->getType()); 8583 Value *X = EmitScalarExpr(E->getArg(0)); 8584 Value *Y = EmitScalarExpr(E->getArg(1)); 8585 Value *Z = EmitScalarExpr(E->getArg(2)); 8586 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 8587 return Builder.CreateCall(F, {X, Y, Z}); 8588 } 8589 case SystemZ::BI__builtin_s390_vfmsdb: { 8590 llvm::Type *ResultType = ConvertType(E->getType()); 8591 Value *X = EmitScalarExpr(E->getArg(0)); 8592 Value *Y = EmitScalarExpr(E->getArg(1)); 8593 Value *Z = EmitScalarExpr(E->getArg(2)); 8594 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 8595 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 8596 return Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 8597 } 8598 case SystemZ::BI__builtin_s390_vflpdb: { 8599 llvm::Type *ResultType = ConvertType(E->getType()); 8600 Value *X = EmitScalarExpr(E->getArg(0)); 8601 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 8602 return Builder.CreateCall(F, X); 8603 } 8604 case SystemZ::BI__builtin_s390_vflndb: { 8605 llvm::Type *ResultType = ConvertType(E->getType()); 8606 Value *X = EmitScalarExpr(E->getArg(0)); 8607 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 8608 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 8609 return Builder.CreateFSub(Zero, Builder.CreateCall(F, X), "sub"); 8610 } 8611 case SystemZ::BI__builtin_s390_vfidb: { 8612 llvm::Type *ResultType = ConvertType(E->getType()); 8613 Value *X = EmitScalarExpr(E->getArg(0)); 8614 // Constant-fold the M4 and M5 mask arguments. 8615 llvm::APSInt M4, M5; 8616 bool IsConstM4 = E->getArg(1)->isIntegerConstantExpr(M4, getContext()); 8617 bool IsConstM5 = E->getArg(2)->isIntegerConstantExpr(M5, getContext()); 8618 assert(IsConstM4 && IsConstM5 && "Constant arg isn't actually constant?"); 8619 (void)IsConstM4; (void)IsConstM5; 8620 // Check whether this instance of vfidb can be represented via a LLVM 8621 // standard intrinsic. We only support some combinations of M4 and M5. 8622 Intrinsic::ID ID = Intrinsic::not_intrinsic; 8623 switch (M4.getZExtValue()) { 8624 default: break; 8625 case 0: // IEEE-inexact exception allowed 8626 switch (M5.getZExtValue()) { 8627 default: break; 8628 case 0: ID = Intrinsic::rint; break; 8629 } 8630 break; 8631 case 4: // IEEE-inexact exception suppressed 8632 switch (M5.getZExtValue()) { 8633 default: break; 8634 case 0: ID = Intrinsic::nearbyint; break; 8635 case 1: ID = Intrinsic::round; break; 8636 case 5: ID = Intrinsic::trunc; break; 8637 case 6: ID = Intrinsic::ceil; break; 8638 case 7: ID = Intrinsic::floor; break; 8639 } 8640 break; 8641 } 8642 if (ID != Intrinsic::not_intrinsic) { 8643 Function *F = CGM.getIntrinsic(ID, ResultType); 8644 return Builder.CreateCall(F, X); 8645 } 8646 Function *F = CGM.getIntrinsic(Intrinsic::s390_vfidb); 8647 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 8648 Value *M5Value = llvm::ConstantInt::get(getLLVMContext(), M5); 8649 return Builder.CreateCall(F, {X, M4Value, M5Value}); 8650 } 8651 8652 // Vector intrisincs that output the post-instruction CC value. 8653 8654 #define INTRINSIC_WITH_CC(NAME) \ 8655 case SystemZ::BI__builtin_##NAME: \ 8656 return EmitSystemZIntrinsicWithCC(*this, Intrinsic::NAME, E) 8657 8658 INTRINSIC_WITH_CC(s390_vpkshs); 8659 INTRINSIC_WITH_CC(s390_vpksfs); 8660 INTRINSIC_WITH_CC(s390_vpksgs); 8661 8662 INTRINSIC_WITH_CC(s390_vpklshs); 8663 INTRINSIC_WITH_CC(s390_vpklsfs); 8664 INTRINSIC_WITH_CC(s390_vpklsgs); 8665 8666 INTRINSIC_WITH_CC(s390_vceqbs); 8667 INTRINSIC_WITH_CC(s390_vceqhs); 8668 INTRINSIC_WITH_CC(s390_vceqfs); 8669 INTRINSIC_WITH_CC(s390_vceqgs); 8670 8671 INTRINSIC_WITH_CC(s390_vchbs); 8672 INTRINSIC_WITH_CC(s390_vchhs); 8673 INTRINSIC_WITH_CC(s390_vchfs); 8674 INTRINSIC_WITH_CC(s390_vchgs); 8675 8676 INTRINSIC_WITH_CC(s390_vchlbs); 8677 INTRINSIC_WITH_CC(s390_vchlhs); 8678 INTRINSIC_WITH_CC(s390_vchlfs); 8679 INTRINSIC_WITH_CC(s390_vchlgs); 8680 8681 INTRINSIC_WITH_CC(s390_vfaebs); 8682 INTRINSIC_WITH_CC(s390_vfaehs); 8683 INTRINSIC_WITH_CC(s390_vfaefs); 8684 8685 INTRINSIC_WITH_CC(s390_vfaezbs); 8686 INTRINSIC_WITH_CC(s390_vfaezhs); 8687 INTRINSIC_WITH_CC(s390_vfaezfs); 8688 8689 INTRINSIC_WITH_CC(s390_vfeebs); 8690 INTRINSIC_WITH_CC(s390_vfeehs); 8691 INTRINSIC_WITH_CC(s390_vfeefs); 8692 8693 INTRINSIC_WITH_CC(s390_vfeezbs); 8694 INTRINSIC_WITH_CC(s390_vfeezhs); 8695 INTRINSIC_WITH_CC(s390_vfeezfs); 8696 8697 INTRINSIC_WITH_CC(s390_vfenebs); 8698 INTRINSIC_WITH_CC(s390_vfenehs); 8699 INTRINSIC_WITH_CC(s390_vfenefs); 8700 8701 INTRINSIC_WITH_CC(s390_vfenezbs); 8702 INTRINSIC_WITH_CC(s390_vfenezhs); 8703 INTRINSIC_WITH_CC(s390_vfenezfs); 8704 8705 INTRINSIC_WITH_CC(s390_vistrbs); 8706 INTRINSIC_WITH_CC(s390_vistrhs); 8707 INTRINSIC_WITH_CC(s390_vistrfs); 8708 8709 INTRINSIC_WITH_CC(s390_vstrcbs); 8710 INTRINSIC_WITH_CC(s390_vstrchs); 8711 INTRINSIC_WITH_CC(s390_vstrcfs); 8712 8713 INTRINSIC_WITH_CC(s390_vstrczbs); 8714 INTRINSIC_WITH_CC(s390_vstrczhs); 8715 INTRINSIC_WITH_CC(s390_vstrczfs); 8716 8717 INTRINSIC_WITH_CC(s390_vfcedbs); 8718 INTRINSIC_WITH_CC(s390_vfchdbs); 8719 INTRINSIC_WITH_CC(s390_vfchedbs); 8720 8721 INTRINSIC_WITH_CC(s390_vftcidb); 8722 8723 #undef INTRINSIC_WITH_CC 8724 8725 default: 8726 return nullptr; 8727 } 8728 } 8729 8730 Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, 8731 const CallExpr *E) { 8732 auto MakeLdg = [&](unsigned IntrinsicID) { 8733 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8734 AlignmentSource AlignSource; 8735 clang::CharUnits Align = 8736 getNaturalPointeeTypeAlignment(E->getArg(0)->getType(), &AlignSource); 8737 return Builder.CreateCall( 8738 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 8739 Ptr->getType()}), 8740 {Ptr, ConstantInt::get(Builder.getInt32Ty(), Align.getQuantity())}); 8741 }; 8742 auto MakeScopedAtomic = [&](unsigned IntrinsicID) { 8743 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8744 return Builder.CreateCall( 8745 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 8746 Ptr->getType()}), 8747 {Ptr, EmitScalarExpr(E->getArg(1))}); 8748 }; 8749 switch (BuiltinID) { 8750 case NVPTX::BI__nvvm_atom_add_gen_i: 8751 case NVPTX::BI__nvvm_atom_add_gen_l: 8752 case NVPTX::BI__nvvm_atom_add_gen_ll: 8753 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Add, E); 8754 8755 case NVPTX::BI__nvvm_atom_sub_gen_i: 8756 case NVPTX::BI__nvvm_atom_sub_gen_l: 8757 case NVPTX::BI__nvvm_atom_sub_gen_ll: 8758 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Sub, E); 8759 8760 case NVPTX::BI__nvvm_atom_and_gen_i: 8761 case NVPTX::BI__nvvm_atom_and_gen_l: 8762 case NVPTX::BI__nvvm_atom_and_gen_ll: 8763 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::And, E); 8764 8765 case NVPTX::BI__nvvm_atom_or_gen_i: 8766 case NVPTX::BI__nvvm_atom_or_gen_l: 8767 case NVPTX::BI__nvvm_atom_or_gen_ll: 8768 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Or, E); 8769 8770 case NVPTX::BI__nvvm_atom_xor_gen_i: 8771 case NVPTX::BI__nvvm_atom_xor_gen_l: 8772 case NVPTX::BI__nvvm_atom_xor_gen_ll: 8773 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xor, E); 8774 8775 case NVPTX::BI__nvvm_atom_xchg_gen_i: 8776 case NVPTX::BI__nvvm_atom_xchg_gen_l: 8777 case NVPTX::BI__nvvm_atom_xchg_gen_ll: 8778 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xchg, E); 8779 8780 case NVPTX::BI__nvvm_atom_max_gen_i: 8781 case NVPTX::BI__nvvm_atom_max_gen_l: 8782 case NVPTX::BI__nvvm_atom_max_gen_ll: 8783 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Max, E); 8784 8785 case NVPTX::BI__nvvm_atom_max_gen_ui: 8786 case NVPTX::BI__nvvm_atom_max_gen_ul: 8787 case NVPTX::BI__nvvm_atom_max_gen_ull: 8788 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMax, E); 8789 8790 case NVPTX::BI__nvvm_atom_min_gen_i: 8791 case NVPTX::BI__nvvm_atom_min_gen_l: 8792 case NVPTX::BI__nvvm_atom_min_gen_ll: 8793 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Min, E); 8794 8795 case NVPTX::BI__nvvm_atom_min_gen_ui: 8796 case NVPTX::BI__nvvm_atom_min_gen_ul: 8797 case NVPTX::BI__nvvm_atom_min_gen_ull: 8798 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMin, E); 8799 8800 case NVPTX::BI__nvvm_atom_cas_gen_i: 8801 case NVPTX::BI__nvvm_atom_cas_gen_l: 8802 case NVPTX::BI__nvvm_atom_cas_gen_ll: 8803 // __nvvm_atom_cas_gen_* should return the old value rather than the 8804 // success flag. 8805 return MakeAtomicCmpXchgValue(*this, E, /*ReturnBool=*/false); 8806 8807 case NVPTX::BI__nvvm_atom_add_gen_f: { 8808 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8809 Value *Val = EmitScalarExpr(E->getArg(1)); 8810 // atomicrmw only deals with integer arguments so we need to use 8811 // LLVM's nvvm_atomic_load_add_f32 intrinsic for that. 8812 Value *FnALAF32 = 8813 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f32, Ptr->getType()); 8814 return Builder.CreateCall(FnALAF32, {Ptr, Val}); 8815 } 8816 8817 case NVPTX::BI__nvvm_atom_inc_gen_ui: { 8818 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8819 Value *Val = EmitScalarExpr(E->getArg(1)); 8820 Value *FnALI32 = 8821 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_inc_32, Ptr->getType()); 8822 return Builder.CreateCall(FnALI32, {Ptr, Val}); 8823 } 8824 8825 case NVPTX::BI__nvvm_atom_dec_gen_ui: { 8826 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8827 Value *Val = EmitScalarExpr(E->getArg(1)); 8828 Value *FnALD32 = 8829 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_dec_32, Ptr->getType()); 8830 return Builder.CreateCall(FnALD32, {Ptr, Val}); 8831 } 8832 8833 case NVPTX::BI__nvvm_ldg_c: 8834 case NVPTX::BI__nvvm_ldg_c2: 8835 case NVPTX::BI__nvvm_ldg_c4: 8836 case NVPTX::BI__nvvm_ldg_s: 8837 case NVPTX::BI__nvvm_ldg_s2: 8838 case NVPTX::BI__nvvm_ldg_s4: 8839 case NVPTX::BI__nvvm_ldg_i: 8840 case NVPTX::BI__nvvm_ldg_i2: 8841 case NVPTX::BI__nvvm_ldg_i4: 8842 case NVPTX::BI__nvvm_ldg_l: 8843 case NVPTX::BI__nvvm_ldg_ll: 8844 case NVPTX::BI__nvvm_ldg_ll2: 8845 case NVPTX::BI__nvvm_ldg_uc: 8846 case NVPTX::BI__nvvm_ldg_uc2: 8847 case NVPTX::BI__nvvm_ldg_uc4: 8848 case NVPTX::BI__nvvm_ldg_us: 8849 case NVPTX::BI__nvvm_ldg_us2: 8850 case NVPTX::BI__nvvm_ldg_us4: 8851 case NVPTX::BI__nvvm_ldg_ui: 8852 case NVPTX::BI__nvvm_ldg_ui2: 8853 case NVPTX::BI__nvvm_ldg_ui4: 8854 case NVPTX::BI__nvvm_ldg_ul: 8855 case NVPTX::BI__nvvm_ldg_ull: 8856 case NVPTX::BI__nvvm_ldg_ull2: 8857 // PTX Interoperability section 2.2: "For a vector with an even number of 8858 // elements, its alignment is set to number of elements times the alignment 8859 // of its member: n*alignof(t)." 8860 return MakeLdg(Intrinsic::nvvm_ldg_global_i); 8861 case NVPTX::BI__nvvm_ldg_f: 8862 case NVPTX::BI__nvvm_ldg_f2: 8863 case NVPTX::BI__nvvm_ldg_f4: 8864 case NVPTX::BI__nvvm_ldg_d: 8865 case NVPTX::BI__nvvm_ldg_d2: 8866 return MakeLdg(Intrinsic::nvvm_ldg_global_f); 8867 8868 case NVPTX::BI__nvvm_atom_cta_add_gen_i: 8869 case NVPTX::BI__nvvm_atom_cta_add_gen_l: 8870 case NVPTX::BI__nvvm_atom_cta_add_gen_ll: 8871 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_cta); 8872 case NVPTX::BI__nvvm_atom_sys_add_gen_i: 8873 case NVPTX::BI__nvvm_atom_sys_add_gen_l: 8874 case NVPTX::BI__nvvm_atom_sys_add_gen_ll: 8875 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_sys); 8876 case NVPTX::BI__nvvm_atom_cta_add_gen_f: 8877 case NVPTX::BI__nvvm_atom_cta_add_gen_d: 8878 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_cta); 8879 case NVPTX::BI__nvvm_atom_sys_add_gen_f: 8880 case NVPTX::BI__nvvm_atom_sys_add_gen_d: 8881 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_sys); 8882 case NVPTX::BI__nvvm_atom_cta_xchg_gen_i: 8883 case NVPTX::BI__nvvm_atom_cta_xchg_gen_l: 8884 case NVPTX::BI__nvvm_atom_cta_xchg_gen_ll: 8885 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_cta); 8886 case NVPTX::BI__nvvm_atom_sys_xchg_gen_i: 8887 case NVPTX::BI__nvvm_atom_sys_xchg_gen_l: 8888 case NVPTX::BI__nvvm_atom_sys_xchg_gen_ll: 8889 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_sys); 8890 case NVPTX::BI__nvvm_atom_cta_max_gen_i: 8891 case NVPTX::BI__nvvm_atom_cta_max_gen_ui: 8892 case NVPTX::BI__nvvm_atom_cta_max_gen_l: 8893 case NVPTX::BI__nvvm_atom_cta_max_gen_ul: 8894 case NVPTX::BI__nvvm_atom_cta_max_gen_ll: 8895 case NVPTX::BI__nvvm_atom_cta_max_gen_ull: 8896 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_cta); 8897 case NVPTX::BI__nvvm_atom_sys_max_gen_i: 8898 case NVPTX::BI__nvvm_atom_sys_max_gen_ui: 8899 case NVPTX::BI__nvvm_atom_sys_max_gen_l: 8900 case NVPTX::BI__nvvm_atom_sys_max_gen_ul: 8901 case NVPTX::BI__nvvm_atom_sys_max_gen_ll: 8902 case NVPTX::BI__nvvm_atom_sys_max_gen_ull: 8903 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_sys); 8904 case NVPTX::BI__nvvm_atom_cta_min_gen_i: 8905 case NVPTX::BI__nvvm_atom_cta_min_gen_ui: 8906 case NVPTX::BI__nvvm_atom_cta_min_gen_l: 8907 case NVPTX::BI__nvvm_atom_cta_min_gen_ul: 8908 case NVPTX::BI__nvvm_atom_cta_min_gen_ll: 8909 case NVPTX::BI__nvvm_atom_cta_min_gen_ull: 8910 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_cta); 8911 case NVPTX::BI__nvvm_atom_sys_min_gen_i: 8912 case NVPTX::BI__nvvm_atom_sys_min_gen_ui: 8913 case NVPTX::BI__nvvm_atom_sys_min_gen_l: 8914 case NVPTX::BI__nvvm_atom_sys_min_gen_ul: 8915 case NVPTX::BI__nvvm_atom_sys_min_gen_ll: 8916 case NVPTX::BI__nvvm_atom_sys_min_gen_ull: 8917 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_sys); 8918 case NVPTX::BI__nvvm_atom_cta_inc_gen_ui: 8919 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_cta); 8920 case NVPTX::BI__nvvm_atom_cta_dec_gen_ui: 8921 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_cta); 8922 case NVPTX::BI__nvvm_atom_sys_inc_gen_ui: 8923 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_sys); 8924 case NVPTX::BI__nvvm_atom_sys_dec_gen_ui: 8925 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_sys); 8926 case NVPTX::BI__nvvm_atom_cta_and_gen_i: 8927 case NVPTX::BI__nvvm_atom_cta_and_gen_l: 8928 case NVPTX::BI__nvvm_atom_cta_and_gen_ll: 8929 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_cta); 8930 case NVPTX::BI__nvvm_atom_sys_and_gen_i: 8931 case NVPTX::BI__nvvm_atom_sys_and_gen_l: 8932 case NVPTX::BI__nvvm_atom_sys_and_gen_ll: 8933 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_sys); 8934 case NVPTX::BI__nvvm_atom_cta_or_gen_i: 8935 case NVPTX::BI__nvvm_atom_cta_or_gen_l: 8936 case NVPTX::BI__nvvm_atom_cta_or_gen_ll: 8937 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_cta); 8938 case NVPTX::BI__nvvm_atom_sys_or_gen_i: 8939 case NVPTX::BI__nvvm_atom_sys_or_gen_l: 8940 case NVPTX::BI__nvvm_atom_sys_or_gen_ll: 8941 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_sys); 8942 case NVPTX::BI__nvvm_atom_cta_xor_gen_i: 8943 case NVPTX::BI__nvvm_atom_cta_xor_gen_l: 8944 case NVPTX::BI__nvvm_atom_cta_xor_gen_ll: 8945 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_cta); 8946 case NVPTX::BI__nvvm_atom_sys_xor_gen_i: 8947 case NVPTX::BI__nvvm_atom_sys_xor_gen_l: 8948 case NVPTX::BI__nvvm_atom_sys_xor_gen_ll: 8949 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_sys); 8950 case NVPTX::BI__nvvm_atom_cta_cas_gen_i: 8951 case NVPTX::BI__nvvm_atom_cta_cas_gen_l: 8952 case NVPTX::BI__nvvm_atom_cta_cas_gen_ll: { 8953 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8954 return Builder.CreateCall( 8955 CGM.getIntrinsic( 8956 Intrinsic::nvvm_atomic_cas_gen_i_cta, 8957 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 8958 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 8959 } 8960 case NVPTX::BI__nvvm_atom_sys_cas_gen_i: 8961 case NVPTX::BI__nvvm_atom_sys_cas_gen_l: 8962 case NVPTX::BI__nvvm_atom_sys_cas_gen_ll: { 8963 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8964 return Builder.CreateCall( 8965 CGM.getIntrinsic( 8966 Intrinsic::nvvm_atomic_cas_gen_i_sys, 8967 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 8968 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 8969 } 8970 default: 8971 return nullptr; 8972 } 8973 } 8974 8975 Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, 8976 const CallExpr *E) { 8977 switch (BuiltinID) { 8978 case WebAssembly::BI__builtin_wasm_current_memory: { 8979 llvm::Type *ResultType = ConvertType(E->getType()); 8980 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_current_memory, ResultType); 8981 return Builder.CreateCall(Callee); 8982 } 8983 case WebAssembly::BI__builtin_wasm_grow_memory: { 8984 Value *X = EmitScalarExpr(E->getArg(0)); 8985 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_grow_memory, X->getType()); 8986 return Builder.CreateCall(Callee, X); 8987 } 8988 8989 default: 8990 return nullptr; 8991 } 8992 } 8993