1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This contains code to emit Builtin calls as LLVM code. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "CodeGenFunction.h" 15 #include "CGCXXABI.h" 16 #include "CGObjCRuntime.h" 17 #include "CGOpenCLRuntime.h" 18 #include "CodeGenModule.h" 19 #include "TargetInfo.h" 20 #include "clang/AST/ASTContext.h" 21 #include "clang/AST/Decl.h" 22 #include "clang/Basic/TargetBuiltins.h" 23 #include "clang/Basic/TargetInfo.h" 24 #include "clang/CodeGen/CGFunctionInfo.h" 25 #include "llvm/ADT/StringExtras.h" 26 #include "llvm/IR/CallSite.h" 27 #include "llvm/IR/DataLayout.h" 28 #include "llvm/IR/InlineAsm.h" 29 #include "llvm/IR/Intrinsics.h" 30 #include "llvm/IR/MDBuilder.h" 31 #include <sstream> 32 33 using namespace clang; 34 using namespace CodeGen; 35 using namespace llvm; 36 37 /// getBuiltinLibFunction - Given a builtin id for a function like 38 /// "__builtin_fabsf", return a Function* for "fabsf". 39 llvm::Value *CodeGenModule::getBuiltinLibFunction(const FunctionDecl *FD, 40 unsigned BuiltinID) { 41 assert(Context.BuiltinInfo.isLibFunction(BuiltinID)); 42 43 // Get the name, skip over the __builtin_ prefix (if necessary). 44 StringRef Name; 45 GlobalDecl D(FD); 46 47 // If the builtin has been declared explicitly with an assembler label, 48 // use the mangled name. This differs from the plain label on platforms 49 // that prefix labels. 50 if (FD->hasAttr<AsmLabelAttr>()) 51 Name = getMangledName(D); 52 else 53 Name = Context.BuiltinInfo.getName(BuiltinID) + 10; 54 55 llvm::FunctionType *Ty = 56 cast<llvm::FunctionType>(getTypes().ConvertType(FD->getType())); 57 58 return GetOrCreateLLVMFunction(Name, Ty, D, /*ForVTable=*/false); 59 } 60 61 /// Emit the conversions required to turn the given value into an 62 /// integer of the given size. 63 static Value *EmitToInt(CodeGenFunction &CGF, llvm::Value *V, 64 QualType T, llvm::IntegerType *IntType) { 65 V = CGF.EmitToMemory(V, T); 66 67 if (V->getType()->isPointerTy()) 68 return CGF.Builder.CreatePtrToInt(V, IntType); 69 70 assert(V->getType() == IntType); 71 return V; 72 } 73 74 static Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V, 75 QualType T, llvm::Type *ResultType) { 76 V = CGF.EmitFromMemory(V, T); 77 78 if (ResultType->isPointerTy()) 79 return CGF.Builder.CreateIntToPtr(V, ResultType); 80 81 assert(V->getType() == ResultType); 82 return V; 83 } 84 85 /// Utility to insert an atomic instruction based on Instrinsic::ID 86 /// and the expression node. 87 static Value *MakeBinaryAtomicValue(CodeGenFunction &CGF, 88 llvm::AtomicRMWInst::BinOp Kind, 89 const CallExpr *E) { 90 QualType T = E->getType(); 91 assert(E->getArg(0)->getType()->isPointerType()); 92 assert(CGF.getContext().hasSameUnqualifiedType(T, 93 E->getArg(0)->getType()->getPointeeType())); 94 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 95 96 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 97 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 98 99 llvm::IntegerType *IntType = 100 llvm::IntegerType::get(CGF.getLLVMContext(), 101 CGF.getContext().getTypeSize(T)); 102 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 103 104 llvm::Value *Args[2]; 105 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 106 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 107 llvm::Type *ValueType = Args[1]->getType(); 108 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 109 110 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 111 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 112 return EmitFromInt(CGF, Result, T, ValueType); 113 } 114 115 static Value *EmitNontemporalStore(CodeGenFunction &CGF, const CallExpr *E) { 116 Value *Val = CGF.EmitScalarExpr(E->getArg(0)); 117 Value *Address = CGF.EmitScalarExpr(E->getArg(1)); 118 119 // Convert the type of the pointer to a pointer to the stored type. 120 Val = CGF.EmitToMemory(Val, E->getArg(0)->getType()); 121 Value *BC = CGF.Builder.CreateBitCast( 122 Address, llvm::PointerType::getUnqual(Val->getType()), "cast"); 123 LValue LV = CGF.MakeNaturalAlignAddrLValue(BC, E->getArg(0)->getType()); 124 LV.setNontemporal(true); 125 CGF.EmitStoreOfScalar(Val, LV, false); 126 return nullptr; 127 } 128 129 static Value *EmitNontemporalLoad(CodeGenFunction &CGF, const CallExpr *E) { 130 Value *Address = CGF.EmitScalarExpr(E->getArg(0)); 131 132 LValue LV = CGF.MakeNaturalAlignAddrLValue(Address, E->getType()); 133 LV.setNontemporal(true); 134 return CGF.EmitLoadOfScalar(LV, E->getExprLoc()); 135 } 136 137 static RValue EmitBinaryAtomic(CodeGenFunction &CGF, 138 llvm::AtomicRMWInst::BinOp Kind, 139 const CallExpr *E) { 140 return RValue::get(MakeBinaryAtomicValue(CGF, Kind, E)); 141 } 142 143 /// Utility to insert an atomic instruction based Instrinsic::ID and 144 /// the expression node, where the return value is the result of the 145 /// operation. 146 static RValue EmitBinaryAtomicPost(CodeGenFunction &CGF, 147 llvm::AtomicRMWInst::BinOp Kind, 148 const CallExpr *E, 149 Instruction::BinaryOps Op, 150 bool Invert = false) { 151 QualType T = E->getType(); 152 assert(E->getArg(0)->getType()->isPointerType()); 153 assert(CGF.getContext().hasSameUnqualifiedType(T, 154 E->getArg(0)->getType()->getPointeeType())); 155 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 156 157 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 158 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 159 160 llvm::IntegerType *IntType = 161 llvm::IntegerType::get(CGF.getLLVMContext(), 162 CGF.getContext().getTypeSize(T)); 163 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 164 165 llvm::Value *Args[2]; 166 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 167 llvm::Type *ValueType = Args[1]->getType(); 168 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 169 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 170 171 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 172 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 173 Result = CGF.Builder.CreateBinOp(Op, Result, Args[1]); 174 if (Invert) 175 Result = CGF.Builder.CreateBinOp(llvm::Instruction::Xor, Result, 176 llvm::ConstantInt::get(IntType, -1)); 177 Result = EmitFromInt(CGF, Result, T, ValueType); 178 return RValue::get(Result); 179 } 180 181 /// @brief Utility to insert an atomic cmpxchg instruction. 182 /// 183 /// @param CGF The current codegen function. 184 /// @param E Builtin call expression to convert to cmpxchg. 185 /// arg0 - address to operate on 186 /// arg1 - value to compare with 187 /// arg2 - new value 188 /// @param ReturnBool Specifies whether to return success flag of 189 /// cmpxchg result or the old value. 190 /// 191 /// @returns result of cmpxchg, according to ReturnBool 192 static Value *MakeAtomicCmpXchgValue(CodeGenFunction &CGF, const CallExpr *E, 193 bool ReturnBool) { 194 QualType T = ReturnBool ? E->getArg(1)->getType() : E->getType(); 195 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 196 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 197 198 llvm::IntegerType *IntType = llvm::IntegerType::get( 199 CGF.getLLVMContext(), CGF.getContext().getTypeSize(T)); 200 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 201 202 Value *Args[3]; 203 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 204 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 205 llvm::Type *ValueType = Args[1]->getType(); 206 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 207 Args[2] = EmitToInt(CGF, CGF.EmitScalarExpr(E->getArg(2)), T, IntType); 208 209 Value *Pair = CGF.Builder.CreateAtomicCmpXchg( 210 Args[0], Args[1], Args[2], llvm::AtomicOrdering::SequentiallyConsistent, 211 llvm::AtomicOrdering::SequentiallyConsistent); 212 if (ReturnBool) 213 // Extract boolean success flag and zext it to int. 214 return CGF.Builder.CreateZExt(CGF.Builder.CreateExtractValue(Pair, 1), 215 CGF.ConvertType(E->getType())); 216 else 217 // Extract old value and emit it using the same type as compare value. 218 return EmitFromInt(CGF, CGF.Builder.CreateExtractValue(Pair, 0), T, 219 ValueType); 220 } 221 222 // Emit a simple mangled intrinsic that has 1 argument and a return type 223 // matching the argument type. 224 static Value *emitUnaryBuiltin(CodeGenFunction &CGF, 225 const CallExpr *E, 226 unsigned IntrinsicID) { 227 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 228 229 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 230 return CGF.Builder.CreateCall(F, Src0); 231 } 232 233 // Emit an intrinsic that has 2 operands of the same type as its result. 234 static Value *emitBinaryBuiltin(CodeGenFunction &CGF, 235 const CallExpr *E, 236 unsigned IntrinsicID) { 237 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 238 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 239 240 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 241 return CGF.Builder.CreateCall(F, { Src0, Src1 }); 242 } 243 244 // Emit an intrinsic that has 3 operands of the same type as its result. 245 static Value *emitTernaryBuiltin(CodeGenFunction &CGF, 246 const CallExpr *E, 247 unsigned IntrinsicID) { 248 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 249 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 250 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); 251 252 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 253 return CGF.Builder.CreateCall(F, { Src0, Src1, Src2 }); 254 } 255 256 // Emit an intrinsic that has 1 float or double operand, and 1 integer. 257 static Value *emitFPIntBuiltin(CodeGenFunction &CGF, 258 const CallExpr *E, 259 unsigned IntrinsicID) { 260 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 261 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 262 263 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 264 return CGF.Builder.CreateCall(F, {Src0, Src1}); 265 } 266 267 /// EmitFAbs - Emit a call to @llvm.fabs(). 268 static Value *EmitFAbs(CodeGenFunction &CGF, Value *V) { 269 Value *F = CGF.CGM.getIntrinsic(Intrinsic::fabs, V->getType()); 270 llvm::CallInst *Call = CGF.Builder.CreateCall(F, V); 271 Call->setDoesNotAccessMemory(); 272 return Call; 273 } 274 275 /// Emit the computation of the sign bit for a floating point value. Returns 276 /// the i1 sign bit value. 277 static Value *EmitSignBit(CodeGenFunction &CGF, Value *V) { 278 LLVMContext &C = CGF.CGM.getLLVMContext(); 279 280 llvm::Type *Ty = V->getType(); 281 int Width = Ty->getPrimitiveSizeInBits(); 282 llvm::Type *IntTy = llvm::IntegerType::get(C, Width); 283 V = CGF.Builder.CreateBitCast(V, IntTy); 284 if (Ty->isPPC_FP128Ty()) { 285 // We want the sign bit of the higher-order double. The bitcast we just 286 // did works as if the double-double was stored to memory and then 287 // read as an i128. The "store" will put the higher-order double in the 288 // lower address in both little- and big-Endian modes, but the "load" 289 // will treat those bits as a different part of the i128: the low bits in 290 // little-Endian, the high bits in big-Endian. Therefore, on big-Endian 291 // we need to shift the high bits down to the low before truncating. 292 Width >>= 1; 293 if (CGF.getTarget().isBigEndian()) { 294 Value *ShiftCst = llvm::ConstantInt::get(IntTy, Width); 295 V = CGF.Builder.CreateLShr(V, ShiftCst); 296 } 297 // We are truncating value in order to extract the higher-order 298 // double, which we will be using to extract the sign from. 299 IntTy = llvm::IntegerType::get(C, Width); 300 V = CGF.Builder.CreateTrunc(V, IntTy); 301 } 302 Value *Zero = llvm::Constant::getNullValue(IntTy); 303 return CGF.Builder.CreateICmpSLT(V, Zero); 304 } 305 306 static RValue emitLibraryCall(CodeGenFunction &CGF, const FunctionDecl *Fn, 307 const CallExpr *E, llvm::Value *calleeValue) { 308 return CGF.EmitCall(E->getCallee()->getType(), calleeValue, E, 309 ReturnValueSlot(), Fn); 310 } 311 312 /// \brief Emit a call to llvm.{sadd,uadd,ssub,usub,smul,umul}.with.overflow.* 313 /// depending on IntrinsicID. 314 /// 315 /// \arg CGF The current codegen function. 316 /// \arg IntrinsicID The ID for the Intrinsic we wish to generate. 317 /// \arg X The first argument to the llvm.*.with.overflow.*. 318 /// \arg Y The second argument to the llvm.*.with.overflow.*. 319 /// \arg Carry The carry returned by the llvm.*.with.overflow.*. 320 /// \returns The result (i.e. sum/product) returned by the intrinsic. 321 static llvm::Value *EmitOverflowIntrinsic(CodeGenFunction &CGF, 322 const llvm::Intrinsic::ID IntrinsicID, 323 llvm::Value *X, llvm::Value *Y, 324 llvm::Value *&Carry) { 325 // Make sure we have integers of the same width. 326 assert(X->getType() == Y->getType() && 327 "Arguments must be the same type. (Did you forget to make sure both " 328 "arguments have the same integer width?)"); 329 330 llvm::Value *Callee = CGF.CGM.getIntrinsic(IntrinsicID, X->getType()); 331 llvm::Value *Tmp = CGF.Builder.CreateCall(Callee, {X, Y}); 332 Carry = CGF.Builder.CreateExtractValue(Tmp, 1); 333 return CGF.Builder.CreateExtractValue(Tmp, 0); 334 } 335 336 static Value *emitRangedBuiltin(CodeGenFunction &CGF, 337 unsigned IntrinsicID, 338 int low, int high) { 339 llvm::MDBuilder MDHelper(CGF.getLLVMContext()); 340 llvm::MDNode *RNode = MDHelper.createRange(APInt(32, low), APInt(32, high)); 341 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, {}); 342 llvm::Instruction *Call = CGF.Builder.CreateCall(F); 343 Call->setMetadata(llvm::LLVMContext::MD_range, RNode); 344 return Call; 345 } 346 347 namespace { 348 struct WidthAndSignedness { 349 unsigned Width; 350 bool Signed; 351 }; 352 } 353 354 static WidthAndSignedness 355 getIntegerWidthAndSignedness(const clang::ASTContext &context, 356 const clang::QualType Type) { 357 assert(Type->isIntegerType() && "Given type is not an integer."); 358 unsigned Width = Type->isBooleanType() ? 1 : context.getTypeInfo(Type).Width; 359 bool Signed = Type->isSignedIntegerType(); 360 return {Width, Signed}; 361 } 362 363 // Given one or more integer types, this function produces an integer type that 364 // encompasses them: any value in one of the given types could be expressed in 365 // the encompassing type. 366 static struct WidthAndSignedness 367 EncompassingIntegerType(ArrayRef<struct WidthAndSignedness> Types) { 368 assert(Types.size() > 0 && "Empty list of types."); 369 370 // If any of the given types is signed, we must return a signed type. 371 bool Signed = false; 372 for (const auto &Type : Types) { 373 Signed |= Type.Signed; 374 } 375 376 // The encompassing type must have a width greater than or equal to the width 377 // of the specified types. Aditionally, if the encompassing type is signed, 378 // its width must be strictly greater than the width of any unsigned types 379 // given. 380 unsigned Width = 0; 381 for (const auto &Type : Types) { 382 unsigned MinWidth = Type.Width + (Signed && !Type.Signed); 383 if (Width < MinWidth) { 384 Width = MinWidth; 385 } 386 } 387 388 return {Width, Signed}; 389 } 390 391 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) { 392 llvm::Type *DestType = Int8PtrTy; 393 if (ArgValue->getType() != DestType) 394 ArgValue = 395 Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data()); 396 397 Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend; 398 return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue); 399 } 400 401 /// Checks if using the result of __builtin_object_size(p, @p From) in place of 402 /// __builtin_object_size(p, @p To) is correct 403 static bool areBOSTypesCompatible(int From, int To) { 404 // Note: Our __builtin_object_size implementation currently treats Type=0 and 405 // Type=2 identically. Encoding this implementation detail here may make 406 // improving __builtin_object_size difficult in the future, so it's omitted. 407 return From == To || (From == 0 && To == 1) || (From == 3 && To == 2); 408 } 409 410 static llvm::Value * 411 getDefaultBuiltinObjectSizeResult(unsigned Type, llvm::IntegerType *ResType) { 412 return ConstantInt::get(ResType, (Type & 2) ? 0 : -1, /*isSigned=*/true); 413 } 414 415 llvm::Value * 416 CodeGenFunction::evaluateOrEmitBuiltinObjectSize(const Expr *E, unsigned Type, 417 llvm::IntegerType *ResType) { 418 uint64_t ObjectSize; 419 if (!E->tryEvaluateObjectSize(ObjectSize, getContext(), Type)) 420 return emitBuiltinObjectSize(E, Type, ResType); 421 return ConstantInt::get(ResType, ObjectSize, /*isSigned=*/true); 422 } 423 424 /// Returns a Value corresponding to the size of the given expression. 425 /// This Value may be either of the following: 426 /// - A llvm::Argument (if E is a param with the pass_object_size attribute on 427 /// it) 428 /// - A call to the @llvm.objectsize intrinsic 429 llvm::Value * 430 CodeGenFunction::emitBuiltinObjectSize(const Expr *E, unsigned Type, 431 llvm::IntegerType *ResType) { 432 // We need to reference an argument if the pointer is a parameter with the 433 // pass_object_size attribute. 434 if (auto *D = dyn_cast<DeclRefExpr>(E->IgnoreParenImpCasts())) { 435 auto *Param = dyn_cast<ParmVarDecl>(D->getDecl()); 436 auto *PS = D->getDecl()->getAttr<PassObjectSizeAttr>(); 437 if (Param != nullptr && PS != nullptr && 438 areBOSTypesCompatible(PS->getType(), Type)) { 439 auto Iter = SizeArguments.find(Param); 440 assert(Iter != SizeArguments.end()); 441 442 const ImplicitParamDecl *D = Iter->second; 443 auto DIter = LocalDeclMap.find(D); 444 assert(DIter != LocalDeclMap.end()); 445 446 return EmitLoadOfScalar(DIter->second, /*volatile=*/false, 447 getContext().getSizeType(), E->getLocStart()); 448 } 449 } 450 451 // LLVM can't handle Type=3 appropriately, and __builtin_object_size shouldn't 452 // evaluate E for side-effects. In either case, we shouldn't lower to 453 // @llvm.objectsize. 454 if (Type == 3 || E->HasSideEffects(getContext())) 455 return getDefaultBuiltinObjectSizeResult(Type, ResType); 456 457 // LLVM only supports 0 and 2, make sure that we pass along that 458 // as a boolean. 459 auto *CI = ConstantInt::get(Builder.getInt1Ty(), (Type & 2) >> 1); 460 // FIXME: Get right address space. 461 llvm::Type *Tys[] = {ResType, Builder.getInt8PtrTy(0)}; 462 Value *F = CGM.getIntrinsic(Intrinsic::objectsize, Tys); 463 return Builder.CreateCall(F, {EmitScalarExpr(E), CI}); 464 } 465 466 RValue CodeGenFunction::EmitBuiltinExpr(const FunctionDecl *FD, 467 unsigned BuiltinID, const CallExpr *E, 468 ReturnValueSlot ReturnValue) { 469 // See if we can constant fold this builtin. If so, don't emit it at all. 470 Expr::EvalResult Result; 471 if (E->EvaluateAsRValue(Result, CGM.getContext()) && 472 !Result.hasSideEffects()) { 473 if (Result.Val.isInt()) 474 return RValue::get(llvm::ConstantInt::get(getLLVMContext(), 475 Result.Val.getInt())); 476 if (Result.Val.isFloat()) 477 return RValue::get(llvm::ConstantFP::get(getLLVMContext(), 478 Result.Val.getFloat())); 479 } 480 481 switch (BuiltinID) { 482 default: break; // Handle intrinsics and libm functions below. 483 case Builtin::BI__builtin___CFStringMakeConstantString: 484 case Builtin::BI__builtin___NSStringMakeConstantString: 485 return RValue::get(CGM.EmitConstantExpr(E, E->getType(), nullptr)); 486 case Builtin::BI__builtin_stdarg_start: 487 case Builtin::BI__builtin_va_start: 488 case Builtin::BI__va_start: 489 case Builtin::BI__builtin_va_end: 490 return RValue::get( 491 EmitVAStartEnd(BuiltinID == Builtin::BI__va_start 492 ? EmitScalarExpr(E->getArg(0)) 493 : EmitVAListRef(E->getArg(0)).getPointer(), 494 BuiltinID != Builtin::BI__builtin_va_end)); 495 case Builtin::BI__builtin_va_copy: { 496 Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer(); 497 Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer(); 498 499 llvm::Type *Type = Int8PtrTy; 500 501 DstPtr = Builder.CreateBitCast(DstPtr, Type); 502 SrcPtr = Builder.CreateBitCast(SrcPtr, Type); 503 return RValue::get(Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), 504 {DstPtr, SrcPtr})); 505 } 506 case Builtin::BI__builtin_abs: 507 case Builtin::BI__builtin_labs: 508 case Builtin::BI__builtin_llabs: { 509 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 510 511 Value *NegOp = Builder.CreateNeg(ArgValue, "neg"); 512 Value *CmpResult = 513 Builder.CreateICmpSGE(ArgValue, 514 llvm::Constant::getNullValue(ArgValue->getType()), 515 "abscond"); 516 Value *Result = 517 Builder.CreateSelect(CmpResult, ArgValue, NegOp, "abs"); 518 519 return RValue::get(Result); 520 } 521 case Builtin::BI__builtin_fabs: 522 case Builtin::BI__builtin_fabsf: 523 case Builtin::BI__builtin_fabsl: { 524 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::fabs)); 525 } 526 case Builtin::BI__builtin_fmod: 527 case Builtin::BI__builtin_fmodf: 528 case Builtin::BI__builtin_fmodl: { 529 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 530 Value *Arg2 = EmitScalarExpr(E->getArg(1)); 531 Value *Result = Builder.CreateFRem(Arg1, Arg2, "fmod"); 532 return RValue::get(Result); 533 } 534 case Builtin::BI__builtin_copysign: 535 case Builtin::BI__builtin_copysignf: 536 case Builtin::BI__builtin_copysignl: { 537 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::copysign)); 538 } 539 case Builtin::BI__builtin_ceil: 540 case Builtin::BI__builtin_ceilf: 541 case Builtin::BI__builtin_ceill: { 542 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::ceil)); 543 } 544 case Builtin::BI__builtin_floor: 545 case Builtin::BI__builtin_floorf: 546 case Builtin::BI__builtin_floorl: { 547 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::floor)); 548 } 549 case Builtin::BI__builtin_trunc: 550 case Builtin::BI__builtin_truncf: 551 case Builtin::BI__builtin_truncl: { 552 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::trunc)); 553 } 554 case Builtin::BI__builtin_rint: 555 case Builtin::BI__builtin_rintf: 556 case Builtin::BI__builtin_rintl: { 557 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::rint)); 558 } 559 case Builtin::BI__builtin_nearbyint: 560 case Builtin::BI__builtin_nearbyintf: 561 case Builtin::BI__builtin_nearbyintl: { 562 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::nearbyint)); 563 } 564 case Builtin::BI__builtin_round: 565 case Builtin::BI__builtin_roundf: 566 case Builtin::BI__builtin_roundl: { 567 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::round)); 568 } 569 case Builtin::BI__builtin_fmin: 570 case Builtin::BI__builtin_fminf: 571 case Builtin::BI__builtin_fminl: { 572 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::minnum)); 573 } 574 case Builtin::BI__builtin_fmax: 575 case Builtin::BI__builtin_fmaxf: 576 case Builtin::BI__builtin_fmaxl: { 577 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::maxnum)); 578 } 579 case Builtin::BI__builtin_conj: 580 case Builtin::BI__builtin_conjf: 581 case Builtin::BI__builtin_conjl: { 582 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 583 Value *Real = ComplexVal.first; 584 Value *Imag = ComplexVal.second; 585 Value *Zero = 586 Imag->getType()->isFPOrFPVectorTy() 587 ? llvm::ConstantFP::getZeroValueForNegation(Imag->getType()) 588 : llvm::Constant::getNullValue(Imag->getType()); 589 590 Imag = Builder.CreateFSub(Zero, Imag, "sub"); 591 return RValue::getComplex(std::make_pair(Real, Imag)); 592 } 593 case Builtin::BI__builtin_creal: 594 case Builtin::BI__builtin_crealf: 595 case Builtin::BI__builtin_creall: 596 case Builtin::BIcreal: 597 case Builtin::BIcrealf: 598 case Builtin::BIcreall: { 599 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 600 return RValue::get(ComplexVal.first); 601 } 602 603 case Builtin::BI__builtin_cimag: 604 case Builtin::BI__builtin_cimagf: 605 case Builtin::BI__builtin_cimagl: 606 case Builtin::BIcimag: 607 case Builtin::BIcimagf: 608 case Builtin::BIcimagl: { 609 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 610 return RValue::get(ComplexVal.second); 611 } 612 613 case Builtin::BI__builtin_ctzs: 614 case Builtin::BI__builtin_ctz: 615 case Builtin::BI__builtin_ctzl: 616 case Builtin::BI__builtin_ctzll: { 617 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 618 619 llvm::Type *ArgType = ArgValue->getType(); 620 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 621 622 llvm::Type *ResultType = ConvertType(E->getType()); 623 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 624 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 625 if (Result->getType() != ResultType) 626 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 627 "cast"); 628 return RValue::get(Result); 629 } 630 case Builtin::BI__builtin_clzs: 631 case Builtin::BI__builtin_clz: 632 case Builtin::BI__builtin_clzl: 633 case Builtin::BI__builtin_clzll: { 634 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 635 636 llvm::Type *ArgType = ArgValue->getType(); 637 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 638 639 llvm::Type *ResultType = ConvertType(E->getType()); 640 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 641 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 642 if (Result->getType() != ResultType) 643 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 644 "cast"); 645 return RValue::get(Result); 646 } 647 case Builtin::BI__builtin_ffs: 648 case Builtin::BI__builtin_ffsl: 649 case Builtin::BI__builtin_ffsll: { 650 // ffs(x) -> x ? cttz(x) + 1 : 0 651 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 652 653 llvm::Type *ArgType = ArgValue->getType(); 654 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 655 656 llvm::Type *ResultType = ConvertType(E->getType()); 657 Value *Tmp = 658 Builder.CreateAdd(Builder.CreateCall(F, {ArgValue, Builder.getTrue()}), 659 llvm::ConstantInt::get(ArgType, 1)); 660 Value *Zero = llvm::Constant::getNullValue(ArgType); 661 Value *IsZero = Builder.CreateICmpEQ(ArgValue, Zero, "iszero"); 662 Value *Result = Builder.CreateSelect(IsZero, Zero, Tmp, "ffs"); 663 if (Result->getType() != ResultType) 664 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 665 "cast"); 666 return RValue::get(Result); 667 } 668 case Builtin::BI__builtin_parity: 669 case Builtin::BI__builtin_parityl: 670 case Builtin::BI__builtin_parityll: { 671 // parity(x) -> ctpop(x) & 1 672 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 673 674 llvm::Type *ArgType = ArgValue->getType(); 675 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 676 677 llvm::Type *ResultType = ConvertType(E->getType()); 678 Value *Tmp = Builder.CreateCall(F, ArgValue); 679 Value *Result = Builder.CreateAnd(Tmp, llvm::ConstantInt::get(ArgType, 1)); 680 if (Result->getType() != ResultType) 681 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 682 "cast"); 683 return RValue::get(Result); 684 } 685 case Builtin::BI__popcnt16: 686 case Builtin::BI__popcnt: 687 case Builtin::BI__popcnt64: 688 case Builtin::BI__builtin_popcount: 689 case Builtin::BI__builtin_popcountl: 690 case Builtin::BI__builtin_popcountll: { 691 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 692 693 llvm::Type *ArgType = ArgValue->getType(); 694 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 695 696 llvm::Type *ResultType = ConvertType(E->getType()); 697 Value *Result = Builder.CreateCall(F, ArgValue); 698 if (Result->getType() != ResultType) 699 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 700 "cast"); 701 return RValue::get(Result); 702 } 703 case Builtin::BI_rotr8: 704 case Builtin::BI_rotr16: 705 case Builtin::BI_rotr: 706 case Builtin::BI_lrotr: 707 case Builtin::BI_rotr64: { 708 Value *Val = EmitScalarExpr(E->getArg(0)); 709 Value *Shift = EmitScalarExpr(E->getArg(1)); 710 711 llvm::Type *ArgType = Val->getType(); 712 Shift = Builder.CreateIntCast(Shift, ArgType, false); 713 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 714 Value *ArgTypeSize = llvm::ConstantInt::get(ArgType, ArgWidth); 715 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 716 717 Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1); 718 Shift = Builder.CreateAnd(Shift, Mask); 719 Value *LeftShift = Builder.CreateSub(ArgTypeSize, Shift); 720 721 Value *RightShifted = Builder.CreateLShr(Val, Shift); 722 Value *LeftShifted = Builder.CreateShl(Val, LeftShift); 723 Value *Rotated = Builder.CreateOr(LeftShifted, RightShifted); 724 725 Value *ShiftIsZero = Builder.CreateICmpEQ(Shift, ArgZero); 726 Value *Result = Builder.CreateSelect(ShiftIsZero, Val, Rotated); 727 return RValue::get(Result); 728 } 729 case Builtin::BI_rotl8: 730 case Builtin::BI_rotl16: 731 case Builtin::BI_rotl: 732 case Builtin::BI_lrotl: 733 case Builtin::BI_rotl64: { 734 Value *Val = EmitScalarExpr(E->getArg(0)); 735 Value *Shift = EmitScalarExpr(E->getArg(1)); 736 737 llvm::Type *ArgType = Val->getType(); 738 Shift = Builder.CreateIntCast(Shift, ArgType, false); 739 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 740 Value *ArgTypeSize = llvm::ConstantInt::get(ArgType, ArgWidth); 741 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 742 743 Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1); 744 Shift = Builder.CreateAnd(Shift, Mask); 745 Value *RightShift = Builder.CreateSub(ArgTypeSize, Shift); 746 747 Value *LeftShifted = Builder.CreateShl(Val, Shift); 748 Value *RightShifted = Builder.CreateLShr(Val, RightShift); 749 Value *Rotated = Builder.CreateOr(LeftShifted, RightShifted); 750 751 Value *ShiftIsZero = Builder.CreateICmpEQ(Shift, ArgZero); 752 Value *Result = Builder.CreateSelect(ShiftIsZero, Val, Rotated); 753 return RValue::get(Result); 754 } 755 case Builtin::BI__builtin_unpredictable: { 756 // Always return the argument of __builtin_unpredictable. LLVM does not 757 // handle this builtin. Metadata for this builtin should be added directly 758 // to instructions such as branches or switches that use it. 759 return RValue::get(EmitScalarExpr(E->getArg(0))); 760 } 761 case Builtin::BI__builtin_expect: { 762 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 763 llvm::Type *ArgType = ArgValue->getType(); 764 765 Value *ExpectedValue = EmitScalarExpr(E->getArg(1)); 766 // Don't generate llvm.expect on -O0 as the backend won't use it for 767 // anything. 768 // Note, we still IRGen ExpectedValue because it could have side-effects. 769 if (CGM.getCodeGenOpts().OptimizationLevel == 0) 770 return RValue::get(ArgValue); 771 772 Value *FnExpect = CGM.getIntrinsic(Intrinsic::expect, ArgType); 773 Value *Result = 774 Builder.CreateCall(FnExpect, {ArgValue, ExpectedValue}, "expval"); 775 return RValue::get(Result); 776 } 777 case Builtin::BI__builtin_assume_aligned: { 778 Value *PtrValue = EmitScalarExpr(E->getArg(0)); 779 Value *OffsetValue = 780 (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : nullptr; 781 782 Value *AlignmentValue = EmitScalarExpr(E->getArg(1)); 783 ConstantInt *AlignmentCI = cast<ConstantInt>(AlignmentValue); 784 unsigned Alignment = (unsigned) AlignmentCI->getZExtValue(); 785 786 EmitAlignmentAssumption(PtrValue, Alignment, OffsetValue); 787 return RValue::get(PtrValue); 788 } 789 case Builtin::BI__assume: 790 case Builtin::BI__builtin_assume: { 791 if (E->getArg(0)->HasSideEffects(getContext())) 792 return RValue::get(nullptr); 793 794 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 795 Value *FnAssume = CGM.getIntrinsic(Intrinsic::assume); 796 return RValue::get(Builder.CreateCall(FnAssume, ArgValue)); 797 } 798 case Builtin::BI__builtin_bswap16: 799 case Builtin::BI__builtin_bswap32: 800 case Builtin::BI__builtin_bswap64: { 801 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bswap)); 802 } 803 case Builtin::BI__builtin_bitreverse8: 804 case Builtin::BI__builtin_bitreverse16: 805 case Builtin::BI__builtin_bitreverse32: 806 case Builtin::BI__builtin_bitreverse64: { 807 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bitreverse)); 808 } 809 case Builtin::BI__builtin_object_size: { 810 unsigned Type = 811 E->getArg(1)->EvaluateKnownConstInt(getContext()).getZExtValue(); 812 auto *ResType = cast<llvm::IntegerType>(ConvertType(E->getType())); 813 814 // We pass this builtin onto the optimizer so that it can figure out the 815 // object size in more complex cases. 816 return RValue::get(emitBuiltinObjectSize(E->getArg(0), Type, ResType)); 817 } 818 case Builtin::BI__builtin_prefetch: { 819 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); 820 // FIXME: Technically these constants should of type 'int', yes? 821 RW = (E->getNumArgs() > 1) ? EmitScalarExpr(E->getArg(1)) : 822 llvm::ConstantInt::get(Int32Ty, 0); 823 Locality = (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : 824 llvm::ConstantInt::get(Int32Ty, 3); 825 Value *Data = llvm::ConstantInt::get(Int32Ty, 1); 826 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 827 return RValue::get(Builder.CreateCall(F, {Address, RW, Locality, Data})); 828 } 829 case Builtin::BI__builtin_readcyclecounter: { 830 Value *F = CGM.getIntrinsic(Intrinsic::readcyclecounter); 831 return RValue::get(Builder.CreateCall(F)); 832 } 833 case Builtin::BI__builtin___clear_cache: { 834 Value *Begin = EmitScalarExpr(E->getArg(0)); 835 Value *End = EmitScalarExpr(E->getArg(1)); 836 Value *F = CGM.getIntrinsic(Intrinsic::clear_cache); 837 return RValue::get(Builder.CreateCall(F, {Begin, End})); 838 } 839 case Builtin::BI__builtin_trap: 840 return RValue::get(EmitTrapCall(Intrinsic::trap)); 841 case Builtin::BI__debugbreak: 842 return RValue::get(EmitTrapCall(Intrinsic::debugtrap)); 843 case Builtin::BI__builtin_unreachable: { 844 if (SanOpts.has(SanitizerKind::Unreachable)) { 845 SanitizerScope SanScope(this); 846 EmitCheck(std::make_pair(static_cast<llvm::Value *>(Builder.getFalse()), 847 SanitizerKind::Unreachable), 848 "builtin_unreachable", EmitCheckSourceLocation(E->getExprLoc()), 849 None); 850 } else 851 Builder.CreateUnreachable(); 852 853 // We do need to preserve an insertion point. 854 EmitBlock(createBasicBlock("unreachable.cont")); 855 856 return RValue::get(nullptr); 857 } 858 859 case Builtin::BI__builtin_powi: 860 case Builtin::BI__builtin_powif: 861 case Builtin::BI__builtin_powil: { 862 Value *Base = EmitScalarExpr(E->getArg(0)); 863 Value *Exponent = EmitScalarExpr(E->getArg(1)); 864 llvm::Type *ArgType = Base->getType(); 865 Value *F = CGM.getIntrinsic(Intrinsic::powi, ArgType); 866 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 867 } 868 869 case Builtin::BI__builtin_isgreater: 870 case Builtin::BI__builtin_isgreaterequal: 871 case Builtin::BI__builtin_isless: 872 case Builtin::BI__builtin_islessequal: 873 case Builtin::BI__builtin_islessgreater: 874 case Builtin::BI__builtin_isunordered: { 875 // Ordered comparisons: we know the arguments to these are matching scalar 876 // floating point values. 877 Value *LHS = EmitScalarExpr(E->getArg(0)); 878 Value *RHS = EmitScalarExpr(E->getArg(1)); 879 880 switch (BuiltinID) { 881 default: llvm_unreachable("Unknown ordered comparison"); 882 case Builtin::BI__builtin_isgreater: 883 LHS = Builder.CreateFCmpOGT(LHS, RHS, "cmp"); 884 break; 885 case Builtin::BI__builtin_isgreaterequal: 886 LHS = Builder.CreateFCmpOGE(LHS, RHS, "cmp"); 887 break; 888 case Builtin::BI__builtin_isless: 889 LHS = Builder.CreateFCmpOLT(LHS, RHS, "cmp"); 890 break; 891 case Builtin::BI__builtin_islessequal: 892 LHS = Builder.CreateFCmpOLE(LHS, RHS, "cmp"); 893 break; 894 case Builtin::BI__builtin_islessgreater: 895 LHS = Builder.CreateFCmpONE(LHS, RHS, "cmp"); 896 break; 897 case Builtin::BI__builtin_isunordered: 898 LHS = Builder.CreateFCmpUNO(LHS, RHS, "cmp"); 899 break; 900 } 901 // ZExt bool to int type. 902 return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType()))); 903 } 904 case Builtin::BI__builtin_isnan: { 905 Value *V = EmitScalarExpr(E->getArg(0)); 906 V = Builder.CreateFCmpUNO(V, V, "cmp"); 907 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 908 } 909 910 case Builtin::BIfinite: 911 case Builtin::BI__finite: 912 case Builtin::BIfinitef: 913 case Builtin::BI__finitef: 914 case Builtin::BIfinitel: 915 case Builtin::BI__finitel: 916 case Builtin::BI__builtin_isinf: 917 case Builtin::BI__builtin_isfinite: { 918 // isinf(x) --> fabs(x) == infinity 919 // isfinite(x) --> fabs(x) != infinity 920 // x != NaN via the ordered compare in either case. 921 Value *V = EmitScalarExpr(E->getArg(0)); 922 Value *Fabs = EmitFAbs(*this, V); 923 Constant *Infinity = ConstantFP::getInfinity(V->getType()); 924 CmpInst::Predicate Pred = (BuiltinID == Builtin::BI__builtin_isinf) 925 ? CmpInst::FCMP_OEQ 926 : CmpInst::FCMP_ONE; 927 Value *FCmp = Builder.CreateFCmp(Pred, Fabs, Infinity, "cmpinf"); 928 return RValue::get(Builder.CreateZExt(FCmp, ConvertType(E->getType()))); 929 } 930 931 case Builtin::BI__builtin_isinf_sign: { 932 // isinf_sign(x) -> fabs(x) == infinity ? (signbit(x) ? -1 : 1) : 0 933 Value *Arg = EmitScalarExpr(E->getArg(0)); 934 Value *AbsArg = EmitFAbs(*this, Arg); 935 Value *IsInf = Builder.CreateFCmpOEQ( 936 AbsArg, ConstantFP::getInfinity(Arg->getType()), "isinf"); 937 Value *IsNeg = EmitSignBit(*this, Arg); 938 939 llvm::Type *IntTy = ConvertType(E->getType()); 940 Value *Zero = Constant::getNullValue(IntTy); 941 Value *One = ConstantInt::get(IntTy, 1); 942 Value *NegativeOne = ConstantInt::get(IntTy, -1); 943 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); 944 Value *Result = Builder.CreateSelect(IsInf, SignResult, Zero); 945 return RValue::get(Result); 946 } 947 948 case Builtin::BI__builtin_isnormal: { 949 // isnormal(x) --> x == x && fabsf(x) < infinity && fabsf(x) >= float_min 950 Value *V = EmitScalarExpr(E->getArg(0)); 951 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 952 953 Value *Abs = EmitFAbs(*this, V); 954 Value *IsLessThanInf = 955 Builder.CreateFCmpULT(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 956 APFloat Smallest = APFloat::getSmallestNormalized( 957 getContext().getFloatTypeSemantics(E->getArg(0)->getType())); 958 Value *IsNormal = 959 Builder.CreateFCmpUGE(Abs, ConstantFP::get(V->getContext(), Smallest), 960 "isnormal"); 961 V = Builder.CreateAnd(Eq, IsLessThanInf, "and"); 962 V = Builder.CreateAnd(V, IsNormal, "and"); 963 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 964 } 965 966 case Builtin::BI__builtin_fpclassify: { 967 Value *V = EmitScalarExpr(E->getArg(5)); 968 llvm::Type *Ty = ConvertType(E->getArg(5)->getType()); 969 970 // Create Result 971 BasicBlock *Begin = Builder.GetInsertBlock(); 972 BasicBlock *End = createBasicBlock("fpclassify_end", this->CurFn); 973 Builder.SetInsertPoint(End); 974 PHINode *Result = 975 Builder.CreatePHI(ConvertType(E->getArg(0)->getType()), 4, 976 "fpclassify_result"); 977 978 // if (V==0) return FP_ZERO 979 Builder.SetInsertPoint(Begin); 980 Value *IsZero = Builder.CreateFCmpOEQ(V, Constant::getNullValue(Ty), 981 "iszero"); 982 Value *ZeroLiteral = EmitScalarExpr(E->getArg(4)); 983 BasicBlock *NotZero = createBasicBlock("fpclassify_not_zero", this->CurFn); 984 Builder.CreateCondBr(IsZero, End, NotZero); 985 Result->addIncoming(ZeroLiteral, Begin); 986 987 // if (V != V) return FP_NAN 988 Builder.SetInsertPoint(NotZero); 989 Value *IsNan = Builder.CreateFCmpUNO(V, V, "cmp"); 990 Value *NanLiteral = EmitScalarExpr(E->getArg(0)); 991 BasicBlock *NotNan = createBasicBlock("fpclassify_not_nan", this->CurFn); 992 Builder.CreateCondBr(IsNan, End, NotNan); 993 Result->addIncoming(NanLiteral, NotZero); 994 995 // if (fabs(V) == infinity) return FP_INFINITY 996 Builder.SetInsertPoint(NotNan); 997 Value *VAbs = EmitFAbs(*this, V); 998 Value *IsInf = 999 Builder.CreateFCmpOEQ(VAbs, ConstantFP::getInfinity(V->getType()), 1000 "isinf"); 1001 Value *InfLiteral = EmitScalarExpr(E->getArg(1)); 1002 BasicBlock *NotInf = createBasicBlock("fpclassify_not_inf", this->CurFn); 1003 Builder.CreateCondBr(IsInf, End, NotInf); 1004 Result->addIncoming(InfLiteral, NotNan); 1005 1006 // if (fabs(V) >= MIN_NORMAL) return FP_NORMAL else FP_SUBNORMAL 1007 Builder.SetInsertPoint(NotInf); 1008 APFloat Smallest = APFloat::getSmallestNormalized( 1009 getContext().getFloatTypeSemantics(E->getArg(5)->getType())); 1010 Value *IsNormal = 1011 Builder.CreateFCmpUGE(VAbs, ConstantFP::get(V->getContext(), Smallest), 1012 "isnormal"); 1013 Value *NormalResult = 1014 Builder.CreateSelect(IsNormal, EmitScalarExpr(E->getArg(2)), 1015 EmitScalarExpr(E->getArg(3))); 1016 Builder.CreateBr(End); 1017 Result->addIncoming(NormalResult, NotInf); 1018 1019 // return Result 1020 Builder.SetInsertPoint(End); 1021 return RValue::get(Result); 1022 } 1023 1024 case Builtin::BIalloca: 1025 case Builtin::BI_alloca: 1026 case Builtin::BI__builtin_alloca: { 1027 Value *Size = EmitScalarExpr(E->getArg(0)); 1028 return RValue::get(Builder.CreateAlloca(Builder.getInt8Ty(), Size)); 1029 } 1030 case Builtin::BIbzero: 1031 case Builtin::BI__builtin_bzero: { 1032 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1033 Value *SizeVal = EmitScalarExpr(E->getArg(1)); 1034 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1035 E->getArg(0)->getExprLoc(), FD, 0); 1036 Builder.CreateMemSet(Dest, Builder.getInt8(0), SizeVal, false); 1037 return RValue::get(Dest.getPointer()); 1038 } 1039 case Builtin::BImemcpy: 1040 case Builtin::BI__builtin_memcpy: { 1041 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1042 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1043 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1044 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1045 E->getArg(0)->getExprLoc(), FD, 0); 1046 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 1047 E->getArg(1)->getExprLoc(), FD, 1); 1048 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 1049 return RValue::get(Dest.getPointer()); 1050 } 1051 1052 case Builtin::BI__builtin___memcpy_chk: { 1053 // fold __builtin_memcpy_chk(x, y, cst1, cst2) to memcpy iff cst1<=cst2. 1054 llvm::APSInt Size, DstSize; 1055 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1056 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1057 break; 1058 if (Size.ugt(DstSize)) 1059 break; 1060 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1061 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1062 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1063 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 1064 return RValue::get(Dest.getPointer()); 1065 } 1066 1067 case Builtin::BI__builtin_objc_memmove_collectable: { 1068 Address DestAddr = EmitPointerWithAlignment(E->getArg(0)); 1069 Address SrcAddr = EmitPointerWithAlignment(E->getArg(1)); 1070 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1071 CGM.getObjCRuntime().EmitGCMemmoveCollectable(*this, 1072 DestAddr, SrcAddr, SizeVal); 1073 return RValue::get(DestAddr.getPointer()); 1074 } 1075 1076 case Builtin::BI__builtin___memmove_chk: { 1077 // fold __builtin_memmove_chk(x, y, cst1, cst2) to memmove iff cst1<=cst2. 1078 llvm::APSInt Size, DstSize; 1079 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1080 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1081 break; 1082 if (Size.ugt(DstSize)) 1083 break; 1084 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1085 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1086 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1087 Builder.CreateMemMove(Dest, Src, SizeVal, false); 1088 return RValue::get(Dest.getPointer()); 1089 } 1090 1091 case Builtin::BImemmove: 1092 case Builtin::BI__builtin_memmove: { 1093 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1094 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1095 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1096 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1097 E->getArg(0)->getExprLoc(), FD, 0); 1098 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 1099 E->getArg(1)->getExprLoc(), FD, 1); 1100 Builder.CreateMemMove(Dest, Src, SizeVal, false); 1101 return RValue::get(Dest.getPointer()); 1102 } 1103 case Builtin::BImemset: 1104 case Builtin::BI__builtin_memset: { 1105 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1106 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 1107 Builder.getInt8Ty()); 1108 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1109 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1110 E->getArg(0)->getExprLoc(), FD, 0); 1111 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 1112 return RValue::get(Dest.getPointer()); 1113 } 1114 case Builtin::BI__builtin___memset_chk: { 1115 // fold __builtin_memset_chk(x, y, cst1, cst2) to memset iff cst1<=cst2. 1116 llvm::APSInt Size, DstSize; 1117 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1118 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1119 break; 1120 if (Size.ugt(DstSize)) 1121 break; 1122 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1123 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 1124 Builder.getInt8Ty()); 1125 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1126 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 1127 return RValue::get(Dest.getPointer()); 1128 } 1129 case Builtin::BI__builtin_dwarf_cfa: { 1130 // The offset in bytes from the first argument to the CFA. 1131 // 1132 // Why on earth is this in the frontend? Is there any reason at 1133 // all that the backend can't reasonably determine this while 1134 // lowering llvm.eh.dwarf.cfa()? 1135 // 1136 // TODO: If there's a satisfactory reason, add a target hook for 1137 // this instead of hard-coding 0, which is correct for most targets. 1138 int32_t Offset = 0; 1139 1140 Value *F = CGM.getIntrinsic(Intrinsic::eh_dwarf_cfa); 1141 return RValue::get(Builder.CreateCall(F, 1142 llvm::ConstantInt::get(Int32Ty, Offset))); 1143 } 1144 case Builtin::BI__builtin_return_address: { 1145 Value *Depth = 1146 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 1147 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 1148 return RValue::get(Builder.CreateCall(F, Depth)); 1149 } 1150 case Builtin::BI__builtin_frame_address: { 1151 Value *Depth = 1152 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 1153 Value *F = CGM.getIntrinsic(Intrinsic::frameaddress); 1154 return RValue::get(Builder.CreateCall(F, Depth)); 1155 } 1156 case Builtin::BI__builtin_extract_return_addr: { 1157 Value *Address = EmitScalarExpr(E->getArg(0)); 1158 Value *Result = getTargetHooks().decodeReturnAddress(*this, Address); 1159 return RValue::get(Result); 1160 } 1161 case Builtin::BI__builtin_frob_return_addr: { 1162 Value *Address = EmitScalarExpr(E->getArg(0)); 1163 Value *Result = getTargetHooks().encodeReturnAddress(*this, Address); 1164 return RValue::get(Result); 1165 } 1166 case Builtin::BI__builtin_dwarf_sp_column: { 1167 llvm::IntegerType *Ty 1168 = cast<llvm::IntegerType>(ConvertType(E->getType())); 1169 int Column = getTargetHooks().getDwarfEHStackPointer(CGM); 1170 if (Column == -1) { 1171 CGM.ErrorUnsupported(E, "__builtin_dwarf_sp_column"); 1172 return RValue::get(llvm::UndefValue::get(Ty)); 1173 } 1174 return RValue::get(llvm::ConstantInt::get(Ty, Column, true)); 1175 } 1176 case Builtin::BI__builtin_init_dwarf_reg_size_table: { 1177 Value *Address = EmitScalarExpr(E->getArg(0)); 1178 if (getTargetHooks().initDwarfEHRegSizeTable(*this, Address)) 1179 CGM.ErrorUnsupported(E, "__builtin_init_dwarf_reg_size_table"); 1180 return RValue::get(llvm::UndefValue::get(ConvertType(E->getType()))); 1181 } 1182 case Builtin::BI__builtin_eh_return: { 1183 Value *Int = EmitScalarExpr(E->getArg(0)); 1184 Value *Ptr = EmitScalarExpr(E->getArg(1)); 1185 1186 llvm::IntegerType *IntTy = cast<llvm::IntegerType>(Int->getType()); 1187 assert((IntTy->getBitWidth() == 32 || IntTy->getBitWidth() == 64) && 1188 "LLVM's __builtin_eh_return only supports 32- and 64-bit variants"); 1189 Value *F = CGM.getIntrinsic(IntTy->getBitWidth() == 32 1190 ? Intrinsic::eh_return_i32 1191 : Intrinsic::eh_return_i64); 1192 Builder.CreateCall(F, {Int, Ptr}); 1193 Builder.CreateUnreachable(); 1194 1195 // We do need to preserve an insertion point. 1196 EmitBlock(createBasicBlock("builtin_eh_return.cont")); 1197 1198 return RValue::get(nullptr); 1199 } 1200 case Builtin::BI__builtin_unwind_init: { 1201 Value *F = CGM.getIntrinsic(Intrinsic::eh_unwind_init); 1202 return RValue::get(Builder.CreateCall(F)); 1203 } 1204 case Builtin::BI__builtin_extend_pointer: { 1205 // Extends a pointer to the size of an _Unwind_Word, which is 1206 // uint64_t on all platforms. Generally this gets poked into a 1207 // register and eventually used as an address, so if the 1208 // addressing registers are wider than pointers and the platform 1209 // doesn't implicitly ignore high-order bits when doing 1210 // addressing, we need to make sure we zext / sext based on 1211 // the platform's expectations. 1212 // 1213 // See: http://gcc.gnu.org/ml/gcc-bugs/2002-02/msg00237.html 1214 1215 // Cast the pointer to intptr_t. 1216 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1217 Value *Result = Builder.CreatePtrToInt(Ptr, IntPtrTy, "extend.cast"); 1218 1219 // If that's 64 bits, we're done. 1220 if (IntPtrTy->getBitWidth() == 64) 1221 return RValue::get(Result); 1222 1223 // Otherwise, ask the codegen data what to do. 1224 if (getTargetHooks().extendPointerWithSExt()) 1225 return RValue::get(Builder.CreateSExt(Result, Int64Ty, "extend.sext")); 1226 else 1227 return RValue::get(Builder.CreateZExt(Result, Int64Ty, "extend.zext")); 1228 } 1229 case Builtin::BI__builtin_setjmp: { 1230 // Buffer is a void**. 1231 Address Buf = EmitPointerWithAlignment(E->getArg(0)); 1232 1233 // Store the frame pointer to the setjmp buffer. 1234 Value *FrameAddr = 1235 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1236 ConstantInt::get(Int32Ty, 0)); 1237 Builder.CreateStore(FrameAddr, Buf); 1238 1239 // Store the stack pointer to the setjmp buffer. 1240 Value *StackAddr = 1241 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::stacksave)); 1242 Address StackSaveSlot = 1243 Builder.CreateConstInBoundsGEP(Buf, 2, getPointerSize()); 1244 Builder.CreateStore(StackAddr, StackSaveSlot); 1245 1246 // Call LLVM's EH setjmp, which is lightweight. 1247 Value *F = CGM.getIntrinsic(Intrinsic::eh_sjlj_setjmp); 1248 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1249 return RValue::get(Builder.CreateCall(F, Buf.getPointer())); 1250 } 1251 case Builtin::BI__builtin_longjmp: { 1252 Value *Buf = EmitScalarExpr(E->getArg(0)); 1253 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1254 1255 // Call LLVM's EH longjmp, which is lightweight. 1256 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::eh_sjlj_longjmp), Buf); 1257 1258 // longjmp doesn't return; mark this as unreachable. 1259 Builder.CreateUnreachable(); 1260 1261 // We do need to preserve an insertion point. 1262 EmitBlock(createBasicBlock("longjmp.cont")); 1263 1264 return RValue::get(nullptr); 1265 } 1266 case Builtin::BI__sync_fetch_and_add: 1267 case Builtin::BI__sync_fetch_and_sub: 1268 case Builtin::BI__sync_fetch_and_or: 1269 case Builtin::BI__sync_fetch_and_and: 1270 case Builtin::BI__sync_fetch_and_xor: 1271 case Builtin::BI__sync_fetch_and_nand: 1272 case Builtin::BI__sync_add_and_fetch: 1273 case Builtin::BI__sync_sub_and_fetch: 1274 case Builtin::BI__sync_and_and_fetch: 1275 case Builtin::BI__sync_or_and_fetch: 1276 case Builtin::BI__sync_xor_and_fetch: 1277 case Builtin::BI__sync_nand_and_fetch: 1278 case Builtin::BI__sync_val_compare_and_swap: 1279 case Builtin::BI__sync_bool_compare_and_swap: 1280 case Builtin::BI__sync_lock_test_and_set: 1281 case Builtin::BI__sync_lock_release: 1282 case Builtin::BI__sync_swap: 1283 llvm_unreachable("Shouldn't make it through sema"); 1284 case Builtin::BI__sync_fetch_and_add_1: 1285 case Builtin::BI__sync_fetch_and_add_2: 1286 case Builtin::BI__sync_fetch_and_add_4: 1287 case Builtin::BI__sync_fetch_and_add_8: 1288 case Builtin::BI__sync_fetch_and_add_16: 1289 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E); 1290 case Builtin::BI__sync_fetch_and_sub_1: 1291 case Builtin::BI__sync_fetch_and_sub_2: 1292 case Builtin::BI__sync_fetch_and_sub_4: 1293 case Builtin::BI__sync_fetch_and_sub_8: 1294 case Builtin::BI__sync_fetch_and_sub_16: 1295 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E); 1296 case Builtin::BI__sync_fetch_and_or_1: 1297 case Builtin::BI__sync_fetch_and_or_2: 1298 case Builtin::BI__sync_fetch_and_or_4: 1299 case Builtin::BI__sync_fetch_and_or_8: 1300 case Builtin::BI__sync_fetch_and_or_16: 1301 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E); 1302 case Builtin::BI__sync_fetch_and_and_1: 1303 case Builtin::BI__sync_fetch_and_and_2: 1304 case Builtin::BI__sync_fetch_and_and_4: 1305 case Builtin::BI__sync_fetch_and_and_8: 1306 case Builtin::BI__sync_fetch_and_and_16: 1307 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E); 1308 case Builtin::BI__sync_fetch_and_xor_1: 1309 case Builtin::BI__sync_fetch_and_xor_2: 1310 case Builtin::BI__sync_fetch_and_xor_4: 1311 case Builtin::BI__sync_fetch_and_xor_8: 1312 case Builtin::BI__sync_fetch_and_xor_16: 1313 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E); 1314 case Builtin::BI__sync_fetch_and_nand_1: 1315 case Builtin::BI__sync_fetch_and_nand_2: 1316 case Builtin::BI__sync_fetch_and_nand_4: 1317 case Builtin::BI__sync_fetch_and_nand_8: 1318 case Builtin::BI__sync_fetch_and_nand_16: 1319 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Nand, E); 1320 1321 // Clang extensions: not overloaded yet. 1322 case Builtin::BI__sync_fetch_and_min: 1323 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E); 1324 case Builtin::BI__sync_fetch_and_max: 1325 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Max, E); 1326 case Builtin::BI__sync_fetch_and_umin: 1327 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMin, E); 1328 case Builtin::BI__sync_fetch_and_umax: 1329 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMax, E); 1330 1331 case Builtin::BI__sync_add_and_fetch_1: 1332 case Builtin::BI__sync_add_and_fetch_2: 1333 case Builtin::BI__sync_add_and_fetch_4: 1334 case Builtin::BI__sync_add_and_fetch_8: 1335 case Builtin::BI__sync_add_and_fetch_16: 1336 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Add, E, 1337 llvm::Instruction::Add); 1338 case Builtin::BI__sync_sub_and_fetch_1: 1339 case Builtin::BI__sync_sub_and_fetch_2: 1340 case Builtin::BI__sync_sub_and_fetch_4: 1341 case Builtin::BI__sync_sub_and_fetch_8: 1342 case Builtin::BI__sync_sub_and_fetch_16: 1343 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Sub, E, 1344 llvm::Instruction::Sub); 1345 case Builtin::BI__sync_and_and_fetch_1: 1346 case Builtin::BI__sync_and_and_fetch_2: 1347 case Builtin::BI__sync_and_and_fetch_4: 1348 case Builtin::BI__sync_and_and_fetch_8: 1349 case Builtin::BI__sync_and_and_fetch_16: 1350 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::And, E, 1351 llvm::Instruction::And); 1352 case Builtin::BI__sync_or_and_fetch_1: 1353 case Builtin::BI__sync_or_and_fetch_2: 1354 case Builtin::BI__sync_or_and_fetch_4: 1355 case Builtin::BI__sync_or_and_fetch_8: 1356 case Builtin::BI__sync_or_and_fetch_16: 1357 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Or, E, 1358 llvm::Instruction::Or); 1359 case Builtin::BI__sync_xor_and_fetch_1: 1360 case Builtin::BI__sync_xor_and_fetch_2: 1361 case Builtin::BI__sync_xor_and_fetch_4: 1362 case Builtin::BI__sync_xor_and_fetch_8: 1363 case Builtin::BI__sync_xor_and_fetch_16: 1364 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Xor, E, 1365 llvm::Instruction::Xor); 1366 case Builtin::BI__sync_nand_and_fetch_1: 1367 case Builtin::BI__sync_nand_and_fetch_2: 1368 case Builtin::BI__sync_nand_and_fetch_4: 1369 case Builtin::BI__sync_nand_and_fetch_8: 1370 case Builtin::BI__sync_nand_and_fetch_16: 1371 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Nand, E, 1372 llvm::Instruction::And, true); 1373 1374 case Builtin::BI__sync_val_compare_and_swap_1: 1375 case Builtin::BI__sync_val_compare_and_swap_2: 1376 case Builtin::BI__sync_val_compare_and_swap_4: 1377 case Builtin::BI__sync_val_compare_and_swap_8: 1378 case Builtin::BI__sync_val_compare_and_swap_16: 1379 return RValue::get(MakeAtomicCmpXchgValue(*this, E, false)); 1380 1381 case Builtin::BI__sync_bool_compare_and_swap_1: 1382 case Builtin::BI__sync_bool_compare_and_swap_2: 1383 case Builtin::BI__sync_bool_compare_and_swap_4: 1384 case Builtin::BI__sync_bool_compare_and_swap_8: 1385 case Builtin::BI__sync_bool_compare_and_swap_16: 1386 return RValue::get(MakeAtomicCmpXchgValue(*this, E, true)); 1387 1388 case Builtin::BI__sync_swap_1: 1389 case Builtin::BI__sync_swap_2: 1390 case Builtin::BI__sync_swap_4: 1391 case Builtin::BI__sync_swap_8: 1392 case Builtin::BI__sync_swap_16: 1393 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1394 1395 case Builtin::BI__sync_lock_test_and_set_1: 1396 case Builtin::BI__sync_lock_test_and_set_2: 1397 case Builtin::BI__sync_lock_test_and_set_4: 1398 case Builtin::BI__sync_lock_test_and_set_8: 1399 case Builtin::BI__sync_lock_test_and_set_16: 1400 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1401 1402 case Builtin::BI__sync_lock_release_1: 1403 case Builtin::BI__sync_lock_release_2: 1404 case Builtin::BI__sync_lock_release_4: 1405 case Builtin::BI__sync_lock_release_8: 1406 case Builtin::BI__sync_lock_release_16: { 1407 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1408 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 1409 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 1410 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 1411 StoreSize.getQuantity() * 8); 1412 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 1413 llvm::StoreInst *Store = 1414 Builder.CreateAlignedStore(llvm::Constant::getNullValue(ITy), Ptr, 1415 StoreSize); 1416 Store->setAtomic(llvm::AtomicOrdering::Release); 1417 return RValue::get(nullptr); 1418 } 1419 1420 case Builtin::BI__sync_synchronize: { 1421 // We assume this is supposed to correspond to a C++0x-style 1422 // sequentially-consistent fence (i.e. this is only usable for 1423 // synchonization, not device I/O or anything like that). This intrinsic 1424 // is really badly designed in the sense that in theory, there isn't 1425 // any way to safely use it... but in practice, it mostly works 1426 // to use it with non-atomic loads and stores to get acquire/release 1427 // semantics. 1428 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent); 1429 return RValue::get(nullptr); 1430 } 1431 1432 case Builtin::BI__builtin_nontemporal_load: 1433 return RValue::get(EmitNontemporalLoad(*this, E)); 1434 case Builtin::BI__builtin_nontemporal_store: 1435 return RValue::get(EmitNontemporalStore(*this, E)); 1436 case Builtin::BI__c11_atomic_is_lock_free: 1437 case Builtin::BI__atomic_is_lock_free: { 1438 // Call "bool __atomic_is_lock_free(size_t size, void *ptr)". For the 1439 // __c11 builtin, ptr is 0 (indicating a properly-aligned object), since 1440 // _Atomic(T) is always properly-aligned. 1441 const char *LibCallName = "__atomic_is_lock_free"; 1442 CallArgList Args; 1443 Args.add(RValue::get(EmitScalarExpr(E->getArg(0))), 1444 getContext().getSizeType()); 1445 if (BuiltinID == Builtin::BI__atomic_is_lock_free) 1446 Args.add(RValue::get(EmitScalarExpr(E->getArg(1))), 1447 getContext().VoidPtrTy); 1448 else 1449 Args.add(RValue::get(llvm::Constant::getNullValue(VoidPtrTy)), 1450 getContext().VoidPtrTy); 1451 const CGFunctionInfo &FuncInfo = 1452 CGM.getTypes().arrangeBuiltinFunctionCall(E->getType(), Args); 1453 llvm::FunctionType *FTy = CGM.getTypes().GetFunctionType(FuncInfo); 1454 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, LibCallName); 1455 return EmitCall(FuncInfo, Func, ReturnValueSlot(), Args); 1456 } 1457 1458 case Builtin::BI__atomic_test_and_set: { 1459 // Look at the argument type to determine whether this is a volatile 1460 // operation. The parameter type is always volatile. 1461 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1462 bool Volatile = 1463 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1464 1465 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1466 unsigned AddrSpace = Ptr->getType()->getPointerAddressSpace(); 1467 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1468 Value *NewVal = Builder.getInt8(1); 1469 Value *Order = EmitScalarExpr(E->getArg(1)); 1470 if (isa<llvm::ConstantInt>(Order)) { 1471 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1472 AtomicRMWInst *Result = nullptr; 1473 switch (ord) { 1474 case 0: // memory_order_relaxed 1475 default: // invalid order 1476 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1477 llvm::AtomicOrdering::Monotonic); 1478 break; 1479 case 1: // memory_order_consume 1480 case 2: // memory_order_acquire 1481 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1482 llvm::AtomicOrdering::Acquire); 1483 break; 1484 case 3: // memory_order_release 1485 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1486 llvm::AtomicOrdering::Release); 1487 break; 1488 case 4: // memory_order_acq_rel 1489 1490 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1491 llvm::AtomicOrdering::AcquireRelease); 1492 break; 1493 case 5: // memory_order_seq_cst 1494 Result = Builder.CreateAtomicRMW( 1495 llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1496 llvm::AtomicOrdering::SequentiallyConsistent); 1497 break; 1498 } 1499 Result->setVolatile(Volatile); 1500 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1501 } 1502 1503 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1504 1505 llvm::BasicBlock *BBs[5] = { 1506 createBasicBlock("monotonic", CurFn), 1507 createBasicBlock("acquire", CurFn), 1508 createBasicBlock("release", CurFn), 1509 createBasicBlock("acqrel", CurFn), 1510 createBasicBlock("seqcst", CurFn) 1511 }; 1512 llvm::AtomicOrdering Orders[5] = { 1513 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Acquire, 1514 llvm::AtomicOrdering::Release, llvm::AtomicOrdering::AcquireRelease, 1515 llvm::AtomicOrdering::SequentiallyConsistent}; 1516 1517 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1518 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1519 1520 Builder.SetInsertPoint(ContBB); 1521 PHINode *Result = Builder.CreatePHI(Int8Ty, 5, "was_set"); 1522 1523 for (unsigned i = 0; i < 5; ++i) { 1524 Builder.SetInsertPoint(BBs[i]); 1525 AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1526 Ptr, NewVal, Orders[i]); 1527 RMW->setVolatile(Volatile); 1528 Result->addIncoming(RMW, BBs[i]); 1529 Builder.CreateBr(ContBB); 1530 } 1531 1532 SI->addCase(Builder.getInt32(0), BBs[0]); 1533 SI->addCase(Builder.getInt32(1), BBs[1]); 1534 SI->addCase(Builder.getInt32(2), BBs[1]); 1535 SI->addCase(Builder.getInt32(3), BBs[2]); 1536 SI->addCase(Builder.getInt32(4), BBs[3]); 1537 SI->addCase(Builder.getInt32(5), BBs[4]); 1538 1539 Builder.SetInsertPoint(ContBB); 1540 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1541 } 1542 1543 case Builtin::BI__atomic_clear: { 1544 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1545 bool Volatile = 1546 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1547 1548 Address Ptr = EmitPointerWithAlignment(E->getArg(0)); 1549 unsigned AddrSpace = Ptr.getPointer()->getType()->getPointerAddressSpace(); 1550 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1551 Value *NewVal = Builder.getInt8(0); 1552 Value *Order = EmitScalarExpr(E->getArg(1)); 1553 if (isa<llvm::ConstantInt>(Order)) { 1554 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1555 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1556 switch (ord) { 1557 case 0: // memory_order_relaxed 1558 default: // invalid order 1559 Store->setOrdering(llvm::AtomicOrdering::Monotonic); 1560 break; 1561 case 3: // memory_order_release 1562 Store->setOrdering(llvm::AtomicOrdering::Release); 1563 break; 1564 case 5: // memory_order_seq_cst 1565 Store->setOrdering(llvm::AtomicOrdering::SequentiallyConsistent); 1566 break; 1567 } 1568 return RValue::get(nullptr); 1569 } 1570 1571 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1572 1573 llvm::BasicBlock *BBs[3] = { 1574 createBasicBlock("monotonic", CurFn), 1575 createBasicBlock("release", CurFn), 1576 createBasicBlock("seqcst", CurFn) 1577 }; 1578 llvm::AtomicOrdering Orders[3] = { 1579 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Release, 1580 llvm::AtomicOrdering::SequentiallyConsistent}; 1581 1582 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1583 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1584 1585 for (unsigned i = 0; i < 3; ++i) { 1586 Builder.SetInsertPoint(BBs[i]); 1587 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1588 Store->setOrdering(Orders[i]); 1589 Builder.CreateBr(ContBB); 1590 } 1591 1592 SI->addCase(Builder.getInt32(0), BBs[0]); 1593 SI->addCase(Builder.getInt32(3), BBs[1]); 1594 SI->addCase(Builder.getInt32(5), BBs[2]); 1595 1596 Builder.SetInsertPoint(ContBB); 1597 return RValue::get(nullptr); 1598 } 1599 1600 case Builtin::BI__atomic_thread_fence: 1601 case Builtin::BI__atomic_signal_fence: 1602 case Builtin::BI__c11_atomic_thread_fence: 1603 case Builtin::BI__c11_atomic_signal_fence: { 1604 llvm::SynchronizationScope Scope; 1605 if (BuiltinID == Builtin::BI__atomic_signal_fence || 1606 BuiltinID == Builtin::BI__c11_atomic_signal_fence) 1607 Scope = llvm::SingleThread; 1608 else 1609 Scope = llvm::CrossThread; 1610 Value *Order = EmitScalarExpr(E->getArg(0)); 1611 if (isa<llvm::ConstantInt>(Order)) { 1612 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1613 switch (ord) { 1614 case 0: // memory_order_relaxed 1615 default: // invalid order 1616 break; 1617 case 1: // memory_order_consume 1618 case 2: // memory_order_acquire 1619 Builder.CreateFence(llvm::AtomicOrdering::Acquire, Scope); 1620 break; 1621 case 3: // memory_order_release 1622 Builder.CreateFence(llvm::AtomicOrdering::Release, Scope); 1623 break; 1624 case 4: // memory_order_acq_rel 1625 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, Scope); 1626 break; 1627 case 5: // memory_order_seq_cst 1628 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 1629 Scope); 1630 break; 1631 } 1632 return RValue::get(nullptr); 1633 } 1634 1635 llvm::BasicBlock *AcquireBB, *ReleaseBB, *AcqRelBB, *SeqCstBB; 1636 AcquireBB = createBasicBlock("acquire", CurFn); 1637 ReleaseBB = createBasicBlock("release", CurFn); 1638 AcqRelBB = createBasicBlock("acqrel", CurFn); 1639 SeqCstBB = createBasicBlock("seqcst", CurFn); 1640 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1641 1642 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1643 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, ContBB); 1644 1645 Builder.SetInsertPoint(AcquireBB); 1646 Builder.CreateFence(llvm::AtomicOrdering::Acquire, Scope); 1647 Builder.CreateBr(ContBB); 1648 SI->addCase(Builder.getInt32(1), AcquireBB); 1649 SI->addCase(Builder.getInt32(2), AcquireBB); 1650 1651 Builder.SetInsertPoint(ReleaseBB); 1652 Builder.CreateFence(llvm::AtomicOrdering::Release, Scope); 1653 Builder.CreateBr(ContBB); 1654 SI->addCase(Builder.getInt32(3), ReleaseBB); 1655 1656 Builder.SetInsertPoint(AcqRelBB); 1657 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, Scope); 1658 Builder.CreateBr(ContBB); 1659 SI->addCase(Builder.getInt32(4), AcqRelBB); 1660 1661 Builder.SetInsertPoint(SeqCstBB); 1662 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, Scope); 1663 Builder.CreateBr(ContBB); 1664 SI->addCase(Builder.getInt32(5), SeqCstBB); 1665 1666 Builder.SetInsertPoint(ContBB); 1667 return RValue::get(nullptr); 1668 } 1669 1670 // Library functions with special handling. 1671 case Builtin::BIsqrt: 1672 case Builtin::BIsqrtf: 1673 case Builtin::BIsqrtl: { 1674 // Transform a call to sqrt* into a @llvm.sqrt.* intrinsic call, but only 1675 // in finite- or unsafe-math mode (the intrinsic has different semantics 1676 // for handling negative numbers compared to the library function, so 1677 // -fmath-errno=0 is not enough). 1678 if (!FD->hasAttr<ConstAttr>()) 1679 break; 1680 if (!(CGM.getCodeGenOpts().UnsafeFPMath || 1681 CGM.getCodeGenOpts().NoNaNsFPMath)) 1682 break; 1683 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 1684 llvm::Type *ArgType = Arg0->getType(); 1685 Value *F = CGM.getIntrinsic(Intrinsic::sqrt, ArgType); 1686 return RValue::get(Builder.CreateCall(F, Arg0)); 1687 } 1688 1689 case Builtin::BI__builtin_pow: 1690 case Builtin::BI__builtin_powf: 1691 case Builtin::BI__builtin_powl: 1692 case Builtin::BIpow: 1693 case Builtin::BIpowf: 1694 case Builtin::BIpowl: { 1695 // Transform a call to pow* into a @llvm.pow.* intrinsic call. 1696 if (!FD->hasAttr<ConstAttr>()) 1697 break; 1698 Value *Base = EmitScalarExpr(E->getArg(0)); 1699 Value *Exponent = EmitScalarExpr(E->getArg(1)); 1700 llvm::Type *ArgType = Base->getType(); 1701 Value *F = CGM.getIntrinsic(Intrinsic::pow, ArgType); 1702 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 1703 } 1704 1705 case Builtin::BIfma: 1706 case Builtin::BIfmaf: 1707 case Builtin::BIfmal: 1708 case Builtin::BI__builtin_fma: 1709 case Builtin::BI__builtin_fmaf: 1710 case Builtin::BI__builtin_fmal: { 1711 // Rewrite fma to intrinsic. 1712 Value *FirstArg = EmitScalarExpr(E->getArg(0)); 1713 llvm::Type *ArgType = FirstArg->getType(); 1714 Value *F = CGM.getIntrinsic(Intrinsic::fma, ArgType); 1715 return RValue::get( 1716 Builder.CreateCall(F, {FirstArg, EmitScalarExpr(E->getArg(1)), 1717 EmitScalarExpr(E->getArg(2))})); 1718 } 1719 1720 case Builtin::BI__builtin_signbit: 1721 case Builtin::BI__builtin_signbitf: 1722 case Builtin::BI__builtin_signbitl: { 1723 return RValue::get( 1724 Builder.CreateZExt(EmitSignBit(*this, EmitScalarExpr(E->getArg(0))), 1725 ConvertType(E->getType()))); 1726 } 1727 case Builtin::BI__builtin_annotation: { 1728 llvm::Value *AnnVal = EmitScalarExpr(E->getArg(0)); 1729 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::annotation, 1730 AnnVal->getType()); 1731 1732 // Get the annotation string, go through casts. Sema requires this to be a 1733 // non-wide string literal, potentially casted, so the cast<> is safe. 1734 const Expr *AnnotationStrExpr = E->getArg(1)->IgnoreParenCasts(); 1735 StringRef Str = cast<StringLiteral>(AnnotationStrExpr)->getString(); 1736 return RValue::get(EmitAnnotationCall(F, AnnVal, Str, E->getExprLoc())); 1737 } 1738 case Builtin::BI__builtin_addcb: 1739 case Builtin::BI__builtin_addcs: 1740 case Builtin::BI__builtin_addc: 1741 case Builtin::BI__builtin_addcl: 1742 case Builtin::BI__builtin_addcll: 1743 case Builtin::BI__builtin_subcb: 1744 case Builtin::BI__builtin_subcs: 1745 case Builtin::BI__builtin_subc: 1746 case Builtin::BI__builtin_subcl: 1747 case Builtin::BI__builtin_subcll: { 1748 1749 // We translate all of these builtins from expressions of the form: 1750 // int x = ..., y = ..., carryin = ..., carryout, result; 1751 // result = __builtin_addc(x, y, carryin, &carryout); 1752 // 1753 // to LLVM IR of the form: 1754 // 1755 // %tmp1 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y) 1756 // %tmpsum1 = extractvalue {i32, i1} %tmp1, 0 1757 // %carry1 = extractvalue {i32, i1} %tmp1, 1 1758 // %tmp2 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %tmpsum1, 1759 // i32 %carryin) 1760 // %result = extractvalue {i32, i1} %tmp2, 0 1761 // %carry2 = extractvalue {i32, i1} %tmp2, 1 1762 // %tmp3 = or i1 %carry1, %carry2 1763 // %tmp4 = zext i1 %tmp3 to i32 1764 // store i32 %tmp4, i32* %carryout 1765 1766 // Scalarize our inputs. 1767 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1768 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1769 llvm::Value *Carryin = EmitScalarExpr(E->getArg(2)); 1770 Address CarryOutPtr = EmitPointerWithAlignment(E->getArg(3)); 1771 1772 // Decide if we are lowering to a uadd.with.overflow or usub.with.overflow. 1773 llvm::Intrinsic::ID IntrinsicId; 1774 switch (BuiltinID) { 1775 default: llvm_unreachable("Unknown multiprecision builtin id."); 1776 case Builtin::BI__builtin_addcb: 1777 case Builtin::BI__builtin_addcs: 1778 case Builtin::BI__builtin_addc: 1779 case Builtin::BI__builtin_addcl: 1780 case Builtin::BI__builtin_addcll: 1781 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1782 break; 1783 case Builtin::BI__builtin_subcb: 1784 case Builtin::BI__builtin_subcs: 1785 case Builtin::BI__builtin_subc: 1786 case Builtin::BI__builtin_subcl: 1787 case Builtin::BI__builtin_subcll: 1788 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1789 break; 1790 } 1791 1792 // Construct our resulting LLVM IR expression. 1793 llvm::Value *Carry1; 1794 llvm::Value *Sum1 = EmitOverflowIntrinsic(*this, IntrinsicId, 1795 X, Y, Carry1); 1796 llvm::Value *Carry2; 1797 llvm::Value *Sum2 = EmitOverflowIntrinsic(*this, IntrinsicId, 1798 Sum1, Carryin, Carry2); 1799 llvm::Value *CarryOut = Builder.CreateZExt(Builder.CreateOr(Carry1, Carry2), 1800 X->getType()); 1801 Builder.CreateStore(CarryOut, CarryOutPtr); 1802 return RValue::get(Sum2); 1803 } 1804 1805 case Builtin::BI__builtin_add_overflow: 1806 case Builtin::BI__builtin_sub_overflow: 1807 case Builtin::BI__builtin_mul_overflow: { 1808 const clang::Expr *LeftArg = E->getArg(0); 1809 const clang::Expr *RightArg = E->getArg(1); 1810 const clang::Expr *ResultArg = E->getArg(2); 1811 1812 clang::QualType ResultQTy = 1813 ResultArg->getType()->castAs<PointerType>()->getPointeeType(); 1814 1815 WidthAndSignedness LeftInfo = 1816 getIntegerWidthAndSignedness(CGM.getContext(), LeftArg->getType()); 1817 WidthAndSignedness RightInfo = 1818 getIntegerWidthAndSignedness(CGM.getContext(), RightArg->getType()); 1819 WidthAndSignedness ResultInfo = 1820 getIntegerWidthAndSignedness(CGM.getContext(), ResultQTy); 1821 WidthAndSignedness EncompassingInfo = 1822 EncompassingIntegerType({LeftInfo, RightInfo, ResultInfo}); 1823 1824 llvm::Type *EncompassingLLVMTy = 1825 llvm::IntegerType::get(CGM.getLLVMContext(), EncompassingInfo.Width); 1826 1827 llvm::Type *ResultLLVMTy = CGM.getTypes().ConvertType(ResultQTy); 1828 1829 llvm::Intrinsic::ID IntrinsicId; 1830 switch (BuiltinID) { 1831 default: 1832 llvm_unreachable("Unknown overflow builtin id."); 1833 case Builtin::BI__builtin_add_overflow: 1834 IntrinsicId = EncompassingInfo.Signed 1835 ? llvm::Intrinsic::sadd_with_overflow 1836 : llvm::Intrinsic::uadd_with_overflow; 1837 break; 1838 case Builtin::BI__builtin_sub_overflow: 1839 IntrinsicId = EncompassingInfo.Signed 1840 ? llvm::Intrinsic::ssub_with_overflow 1841 : llvm::Intrinsic::usub_with_overflow; 1842 break; 1843 case Builtin::BI__builtin_mul_overflow: 1844 IntrinsicId = EncompassingInfo.Signed 1845 ? llvm::Intrinsic::smul_with_overflow 1846 : llvm::Intrinsic::umul_with_overflow; 1847 break; 1848 } 1849 1850 llvm::Value *Left = EmitScalarExpr(LeftArg); 1851 llvm::Value *Right = EmitScalarExpr(RightArg); 1852 Address ResultPtr = EmitPointerWithAlignment(ResultArg); 1853 1854 // Extend each operand to the encompassing type. 1855 Left = Builder.CreateIntCast(Left, EncompassingLLVMTy, LeftInfo.Signed); 1856 Right = Builder.CreateIntCast(Right, EncompassingLLVMTy, RightInfo.Signed); 1857 1858 // Perform the operation on the extended values. 1859 llvm::Value *Overflow, *Result; 1860 Result = EmitOverflowIntrinsic(*this, IntrinsicId, Left, Right, Overflow); 1861 1862 if (EncompassingInfo.Width > ResultInfo.Width) { 1863 // The encompassing type is wider than the result type, so we need to 1864 // truncate it. 1865 llvm::Value *ResultTrunc = Builder.CreateTrunc(Result, ResultLLVMTy); 1866 1867 // To see if the truncation caused an overflow, we will extend 1868 // the result and then compare it to the original result. 1869 llvm::Value *ResultTruncExt = Builder.CreateIntCast( 1870 ResultTrunc, EncompassingLLVMTy, ResultInfo.Signed); 1871 llvm::Value *TruncationOverflow = 1872 Builder.CreateICmpNE(Result, ResultTruncExt); 1873 1874 Overflow = Builder.CreateOr(Overflow, TruncationOverflow); 1875 Result = ResultTrunc; 1876 } 1877 1878 // Finally, store the result using the pointer. 1879 bool isVolatile = 1880 ResultArg->getType()->getPointeeType().isVolatileQualified(); 1881 Builder.CreateStore(EmitToMemory(Result, ResultQTy), ResultPtr, isVolatile); 1882 1883 return RValue::get(Overflow); 1884 } 1885 1886 case Builtin::BI__builtin_uadd_overflow: 1887 case Builtin::BI__builtin_uaddl_overflow: 1888 case Builtin::BI__builtin_uaddll_overflow: 1889 case Builtin::BI__builtin_usub_overflow: 1890 case Builtin::BI__builtin_usubl_overflow: 1891 case Builtin::BI__builtin_usubll_overflow: 1892 case Builtin::BI__builtin_umul_overflow: 1893 case Builtin::BI__builtin_umull_overflow: 1894 case Builtin::BI__builtin_umulll_overflow: 1895 case Builtin::BI__builtin_sadd_overflow: 1896 case Builtin::BI__builtin_saddl_overflow: 1897 case Builtin::BI__builtin_saddll_overflow: 1898 case Builtin::BI__builtin_ssub_overflow: 1899 case Builtin::BI__builtin_ssubl_overflow: 1900 case Builtin::BI__builtin_ssubll_overflow: 1901 case Builtin::BI__builtin_smul_overflow: 1902 case Builtin::BI__builtin_smull_overflow: 1903 case Builtin::BI__builtin_smulll_overflow: { 1904 1905 // We translate all of these builtins directly to the relevant llvm IR node. 1906 1907 // Scalarize our inputs. 1908 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1909 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1910 Address SumOutPtr = EmitPointerWithAlignment(E->getArg(2)); 1911 1912 // Decide which of the overflow intrinsics we are lowering to: 1913 llvm::Intrinsic::ID IntrinsicId; 1914 switch (BuiltinID) { 1915 default: llvm_unreachable("Unknown overflow builtin id."); 1916 case Builtin::BI__builtin_uadd_overflow: 1917 case Builtin::BI__builtin_uaddl_overflow: 1918 case Builtin::BI__builtin_uaddll_overflow: 1919 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1920 break; 1921 case Builtin::BI__builtin_usub_overflow: 1922 case Builtin::BI__builtin_usubl_overflow: 1923 case Builtin::BI__builtin_usubll_overflow: 1924 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1925 break; 1926 case Builtin::BI__builtin_umul_overflow: 1927 case Builtin::BI__builtin_umull_overflow: 1928 case Builtin::BI__builtin_umulll_overflow: 1929 IntrinsicId = llvm::Intrinsic::umul_with_overflow; 1930 break; 1931 case Builtin::BI__builtin_sadd_overflow: 1932 case Builtin::BI__builtin_saddl_overflow: 1933 case Builtin::BI__builtin_saddll_overflow: 1934 IntrinsicId = llvm::Intrinsic::sadd_with_overflow; 1935 break; 1936 case Builtin::BI__builtin_ssub_overflow: 1937 case Builtin::BI__builtin_ssubl_overflow: 1938 case Builtin::BI__builtin_ssubll_overflow: 1939 IntrinsicId = llvm::Intrinsic::ssub_with_overflow; 1940 break; 1941 case Builtin::BI__builtin_smul_overflow: 1942 case Builtin::BI__builtin_smull_overflow: 1943 case Builtin::BI__builtin_smulll_overflow: 1944 IntrinsicId = llvm::Intrinsic::smul_with_overflow; 1945 break; 1946 } 1947 1948 1949 llvm::Value *Carry; 1950 llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry); 1951 Builder.CreateStore(Sum, SumOutPtr); 1952 1953 return RValue::get(Carry); 1954 } 1955 case Builtin::BI__builtin_addressof: 1956 return RValue::get(EmitLValue(E->getArg(0)).getPointer()); 1957 case Builtin::BI__builtin_operator_new: 1958 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 1959 E->getArg(0), false); 1960 case Builtin::BI__builtin_operator_delete: 1961 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 1962 E->getArg(0), true); 1963 case Builtin::BI__noop: 1964 // __noop always evaluates to an integer literal zero. 1965 return RValue::get(ConstantInt::get(IntTy, 0)); 1966 case Builtin::BI__builtin_call_with_static_chain: { 1967 const CallExpr *Call = cast<CallExpr>(E->getArg(0)); 1968 const Expr *Chain = E->getArg(1); 1969 return EmitCall(Call->getCallee()->getType(), 1970 EmitScalarExpr(Call->getCallee()), Call, ReturnValue, 1971 Call->getCalleeDecl(), EmitScalarExpr(Chain)); 1972 } 1973 case Builtin::BI_InterlockedExchange8: 1974 case Builtin::BI_InterlockedExchange16: 1975 case Builtin::BI_InterlockedExchange: 1976 case Builtin::BI_InterlockedExchangePointer: 1977 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1978 case Builtin::BI_InterlockedCompareExchangePointer: { 1979 llvm::Type *RTy; 1980 llvm::IntegerType *IntType = 1981 IntegerType::get(getLLVMContext(), 1982 getContext().getTypeSize(E->getType())); 1983 llvm::Type *IntPtrType = IntType->getPointerTo(); 1984 1985 llvm::Value *Destination = 1986 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), IntPtrType); 1987 1988 llvm::Value *Exchange = EmitScalarExpr(E->getArg(1)); 1989 RTy = Exchange->getType(); 1990 Exchange = Builder.CreatePtrToInt(Exchange, IntType); 1991 1992 llvm::Value *Comparand = 1993 Builder.CreatePtrToInt(EmitScalarExpr(E->getArg(2)), IntType); 1994 1995 auto Result = 1996 Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 1997 AtomicOrdering::SequentiallyConsistent, 1998 AtomicOrdering::SequentiallyConsistent); 1999 Result->setVolatile(true); 2000 2001 return RValue::get(Builder.CreateIntToPtr(Builder.CreateExtractValue(Result, 2002 0), 2003 RTy)); 2004 } 2005 case Builtin::BI_InterlockedCompareExchange8: 2006 case Builtin::BI_InterlockedCompareExchange16: 2007 case Builtin::BI_InterlockedCompareExchange: 2008 case Builtin::BI_InterlockedCompareExchange64: { 2009 AtomicCmpXchgInst *CXI = Builder.CreateAtomicCmpXchg( 2010 EmitScalarExpr(E->getArg(0)), 2011 EmitScalarExpr(E->getArg(2)), 2012 EmitScalarExpr(E->getArg(1)), 2013 AtomicOrdering::SequentiallyConsistent, 2014 AtomicOrdering::SequentiallyConsistent); 2015 CXI->setVolatile(true); 2016 return RValue::get(Builder.CreateExtractValue(CXI, 0)); 2017 } 2018 case Builtin::BI_InterlockedIncrement16: 2019 case Builtin::BI_InterlockedIncrement: { 2020 llvm::Type *IntTy = ConvertType(E->getType()); 2021 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 2022 AtomicRMWInst::Add, 2023 EmitScalarExpr(E->getArg(0)), 2024 ConstantInt::get(IntTy, 1), 2025 llvm::AtomicOrdering::SequentiallyConsistent); 2026 return RValue::get(Builder.CreateAdd(RMWI, ConstantInt::get(IntTy, 1))); 2027 } 2028 case Builtin::BI_InterlockedDecrement16: 2029 case Builtin::BI_InterlockedDecrement: { 2030 llvm::Type *IntTy = ConvertType(E->getType()); 2031 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 2032 AtomicRMWInst::Sub, 2033 EmitScalarExpr(E->getArg(0)), 2034 ConstantInt::get(IntTy, 1), 2035 llvm::AtomicOrdering::SequentiallyConsistent); 2036 return RValue::get(Builder.CreateSub(RMWI, ConstantInt::get(IntTy, 1))); 2037 } 2038 case Builtin::BI_InterlockedAnd8: 2039 case Builtin::BI_InterlockedAnd16: 2040 case Builtin::BI_InterlockedAnd: 2041 return EmitBinaryAtomic(*this, AtomicRMWInst::And, E); 2042 case Builtin::BI_InterlockedExchangeAdd8: 2043 case Builtin::BI_InterlockedExchangeAdd16: 2044 case Builtin::BI_InterlockedExchangeAdd: 2045 return EmitBinaryAtomic(*this, AtomicRMWInst::Add, E); 2046 case Builtin::BI_InterlockedExchangeSub8: 2047 case Builtin::BI_InterlockedExchangeSub16: 2048 case Builtin::BI_InterlockedExchangeSub: 2049 return EmitBinaryAtomic(*this, AtomicRMWInst::Sub, E); 2050 case Builtin::BI_InterlockedOr8: 2051 case Builtin::BI_InterlockedOr16: 2052 case Builtin::BI_InterlockedOr: 2053 return EmitBinaryAtomic(*this, AtomicRMWInst::Or, E); 2054 case Builtin::BI_InterlockedXor8: 2055 case Builtin::BI_InterlockedXor16: 2056 case Builtin::BI_InterlockedXor: 2057 return EmitBinaryAtomic(*this, AtomicRMWInst::Xor, E); 2058 case Builtin::BI__readfsdword: { 2059 llvm::Type *IntTy = ConvertType(E->getType()); 2060 Value *IntToPtr = 2061 Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)), 2062 llvm::PointerType::get(IntTy, 257)); 2063 LoadInst *Load = 2064 Builder.CreateDefaultAlignedLoad(IntToPtr, /*isVolatile=*/true); 2065 return RValue::get(Load); 2066 } 2067 2068 case Builtin::BI__exception_code: 2069 case Builtin::BI_exception_code: 2070 return RValue::get(EmitSEHExceptionCode()); 2071 case Builtin::BI__exception_info: 2072 case Builtin::BI_exception_info: 2073 return RValue::get(EmitSEHExceptionInfo()); 2074 case Builtin::BI__abnormal_termination: 2075 case Builtin::BI_abnormal_termination: 2076 return RValue::get(EmitSEHAbnormalTermination()); 2077 case Builtin::BI_setjmpex: { 2078 if (getTarget().getTriple().isOSMSVCRT()) { 2079 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 2080 llvm::AttributeSet ReturnsTwiceAttr = 2081 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 2082 llvm::Attribute::ReturnsTwice); 2083 llvm::Constant *SetJmpEx = CGM.CreateRuntimeFunction( 2084 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 2085 "_setjmpex", ReturnsTwiceAttr); 2086 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 2087 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 2088 llvm::Value *FrameAddr = 2089 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2090 ConstantInt::get(Int32Ty, 0)); 2091 llvm::Value *Args[] = {Buf, FrameAddr}; 2092 llvm::CallSite CS = EmitRuntimeCallOrInvoke(SetJmpEx, Args); 2093 CS.setAttributes(ReturnsTwiceAttr); 2094 return RValue::get(CS.getInstruction()); 2095 } 2096 break; 2097 } 2098 case Builtin::BI_setjmp: { 2099 if (getTarget().getTriple().isOSMSVCRT()) { 2100 llvm::AttributeSet ReturnsTwiceAttr = 2101 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 2102 llvm::Attribute::ReturnsTwice); 2103 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 2104 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 2105 llvm::CallSite CS; 2106 if (getTarget().getTriple().getArch() == llvm::Triple::x86) { 2107 llvm::Type *ArgTypes[] = {Int8PtrTy, IntTy}; 2108 llvm::Constant *SetJmp3 = CGM.CreateRuntimeFunction( 2109 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/true), 2110 "_setjmp3", ReturnsTwiceAttr); 2111 llvm::Value *Count = ConstantInt::get(IntTy, 0); 2112 llvm::Value *Args[] = {Buf, Count}; 2113 CS = EmitRuntimeCallOrInvoke(SetJmp3, Args); 2114 } else { 2115 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 2116 llvm::Constant *SetJmp = CGM.CreateRuntimeFunction( 2117 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 2118 "_setjmp", ReturnsTwiceAttr); 2119 llvm::Value *FrameAddr = 2120 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2121 ConstantInt::get(Int32Ty, 0)); 2122 llvm::Value *Args[] = {Buf, FrameAddr}; 2123 CS = EmitRuntimeCallOrInvoke(SetJmp, Args); 2124 } 2125 CS.setAttributes(ReturnsTwiceAttr); 2126 return RValue::get(CS.getInstruction()); 2127 } 2128 break; 2129 } 2130 2131 case Builtin::BI__GetExceptionInfo: { 2132 if (llvm::GlobalVariable *GV = 2133 CGM.getCXXABI().getThrowInfo(FD->getParamDecl(0)->getType())) 2134 return RValue::get(llvm::ConstantExpr::getBitCast(GV, CGM.Int8PtrTy)); 2135 break; 2136 } 2137 2138 case Builtin::BI__builtin_coro_size: { 2139 auto & Context = getContext(); 2140 auto SizeTy = Context.getSizeType(); 2141 auto T = Builder.getIntNTy(Context.getTypeSize(SizeTy)); 2142 Value *F = CGM.getIntrinsic(Intrinsic::coro_size, T); 2143 return RValue::get(Builder.CreateCall(F)); 2144 } 2145 2146 case Builtin::BI__builtin_coro_id: 2147 return EmitCoroutineIntrinsic(E, Intrinsic::coro_id); 2148 case Builtin::BI__builtin_coro_promise: 2149 return EmitCoroutineIntrinsic(E, Intrinsic::coro_promise); 2150 case Builtin::BI__builtin_coro_resume: 2151 return EmitCoroutineIntrinsic(E, Intrinsic::coro_resume); 2152 case Builtin::BI__builtin_coro_frame: 2153 return EmitCoroutineIntrinsic(E, Intrinsic::coro_frame); 2154 case Builtin::BI__builtin_coro_free: 2155 return EmitCoroutineIntrinsic(E, Intrinsic::coro_free); 2156 case Builtin::BI__builtin_coro_destroy: 2157 return EmitCoroutineIntrinsic(E, Intrinsic::coro_destroy); 2158 case Builtin::BI__builtin_coro_done: 2159 return EmitCoroutineIntrinsic(E, Intrinsic::coro_done); 2160 case Builtin::BI__builtin_coro_alloc: 2161 return EmitCoroutineIntrinsic(E, Intrinsic::coro_alloc); 2162 case Builtin::BI__builtin_coro_begin: 2163 return EmitCoroutineIntrinsic(E, Intrinsic::coro_begin); 2164 case Builtin::BI__builtin_coro_end: 2165 return EmitCoroutineIntrinsic(E, Intrinsic::coro_end); 2166 case Builtin::BI__builtin_coro_suspend: 2167 return EmitCoroutineIntrinsic(E, Intrinsic::coro_suspend); 2168 case Builtin::BI__builtin_coro_param: 2169 return EmitCoroutineIntrinsic(E, Intrinsic::coro_param); 2170 2171 // OpenCL v2.0 s6.13.16.2, Built-in pipe read and write functions 2172 case Builtin::BIread_pipe: 2173 case Builtin::BIwrite_pipe: { 2174 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2175 *Arg1 = EmitScalarExpr(E->getArg(1)); 2176 CGOpenCLRuntime OpenCLRT(CGM); 2177 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2178 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2179 2180 // Type of the generic packet parameter. 2181 unsigned GenericAS = 2182 getContext().getTargetAddressSpace(LangAS::opencl_generic); 2183 llvm::Type *I8PTy = llvm::PointerType::get( 2184 llvm::Type::getInt8Ty(getLLVMContext()), GenericAS); 2185 2186 // Testing which overloaded version we should generate the call for. 2187 if (2U == E->getNumArgs()) { 2188 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_2" 2189 : "__write_pipe_2"; 2190 // Creating a generic function type to be able to call with any builtin or 2191 // user defined type. 2192 llvm::Type *ArgTys[] = {Arg0->getType(), I8PTy, Int32Ty, Int32Ty}; 2193 llvm::FunctionType *FTy = llvm::FunctionType::get( 2194 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2195 Value *BCast = Builder.CreatePointerCast(Arg1, I8PTy); 2196 return RValue::get( 2197 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2198 {Arg0, BCast, PacketSize, PacketAlign})); 2199 } else { 2200 assert(4 == E->getNumArgs() && 2201 "Illegal number of parameters to pipe function"); 2202 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_4" 2203 : "__write_pipe_4"; 2204 2205 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, I8PTy, 2206 Int32Ty, Int32Ty}; 2207 Value *Arg2 = EmitScalarExpr(E->getArg(2)), 2208 *Arg3 = EmitScalarExpr(E->getArg(3)); 2209 llvm::FunctionType *FTy = llvm::FunctionType::get( 2210 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2211 Value *BCast = Builder.CreatePointerCast(Arg3, I8PTy); 2212 // We know the third argument is an integer type, but we may need to cast 2213 // it to i32. 2214 if (Arg2->getType() != Int32Ty) 2215 Arg2 = Builder.CreateZExtOrTrunc(Arg2, Int32Ty); 2216 return RValue::get(Builder.CreateCall( 2217 CGM.CreateRuntimeFunction(FTy, Name), 2218 {Arg0, Arg1, Arg2, BCast, PacketSize, PacketAlign})); 2219 } 2220 } 2221 // OpenCL v2.0 s6.13.16 ,s9.17.3.5 - Built-in pipe reserve read and write 2222 // functions 2223 case Builtin::BIreserve_read_pipe: 2224 case Builtin::BIreserve_write_pipe: 2225 case Builtin::BIwork_group_reserve_read_pipe: 2226 case Builtin::BIwork_group_reserve_write_pipe: 2227 case Builtin::BIsub_group_reserve_read_pipe: 2228 case Builtin::BIsub_group_reserve_write_pipe: { 2229 // Composing the mangled name for the function. 2230 const char *Name; 2231 if (BuiltinID == Builtin::BIreserve_read_pipe) 2232 Name = "__reserve_read_pipe"; 2233 else if (BuiltinID == Builtin::BIreserve_write_pipe) 2234 Name = "__reserve_write_pipe"; 2235 else if (BuiltinID == Builtin::BIwork_group_reserve_read_pipe) 2236 Name = "__work_group_reserve_read_pipe"; 2237 else if (BuiltinID == Builtin::BIwork_group_reserve_write_pipe) 2238 Name = "__work_group_reserve_write_pipe"; 2239 else if (BuiltinID == Builtin::BIsub_group_reserve_read_pipe) 2240 Name = "__sub_group_reserve_read_pipe"; 2241 else 2242 Name = "__sub_group_reserve_write_pipe"; 2243 2244 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2245 *Arg1 = EmitScalarExpr(E->getArg(1)); 2246 llvm::Type *ReservedIDTy = ConvertType(getContext().OCLReserveIDTy); 2247 CGOpenCLRuntime OpenCLRT(CGM); 2248 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2249 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2250 2251 // Building the generic function prototype. 2252 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty, Int32Ty}; 2253 llvm::FunctionType *FTy = llvm::FunctionType::get( 2254 ReservedIDTy, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2255 // We know the second argument is an integer type, but we may need to cast 2256 // it to i32. 2257 if (Arg1->getType() != Int32Ty) 2258 Arg1 = Builder.CreateZExtOrTrunc(Arg1, Int32Ty); 2259 return RValue::get( 2260 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2261 {Arg0, Arg1, PacketSize, PacketAlign})); 2262 } 2263 // OpenCL v2.0 s6.13.16, s9.17.3.5 - Built-in pipe commit read and write 2264 // functions 2265 case Builtin::BIcommit_read_pipe: 2266 case Builtin::BIcommit_write_pipe: 2267 case Builtin::BIwork_group_commit_read_pipe: 2268 case Builtin::BIwork_group_commit_write_pipe: 2269 case Builtin::BIsub_group_commit_read_pipe: 2270 case Builtin::BIsub_group_commit_write_pipe: { 2271 const char *Name; 2272 if (BuiltinID == Builtin::BIcommit_read_pipe) 2273 Name = "__commit_read_pipe"; 2274 else if (BuiltinID == Builtin::BIcommit_write_pipe) 2275 Name = "__commit_write_pipe"; 2276 else if (BuiltinID == Builtin::BIwork_group_commit_read_pipe) 2277 Name = "__work_group_commit_read_pipe"; 2278 else if (BuiltinID == Builtin::BIwork_group_commit_write_pipe) 2279 Name = "__work_group_commit_write_pipe"; 2280 else if (BuiltinID == Builtin::BIsub_group_commit_read_pipe) 2281 Name = "__sub_group_commit_read_pipe"; 2282 else 2283 Name = "__sub_group_commit_write_pipe"; 2284 2285 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2286 *Arg1 = EmitScalarExpr(E->getArg(1)); 2287 CGOpenCLRuntime OpenCLRT(CGM); 2288 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2289 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2290 2291 // Building the generic function prototype. 2292 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, Int32Ty}; 2293 llvm::FunctionType *FTy = 2294 llvm::FunctionType::get(llvm::Type::getVoidTy(getLLVMContext()), 2295 llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2296 2297 return RValue::get( 2298 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2299 {Arg0, Arg1, PacketSize, PacketAlign})); 2300 } 2301 // OpenCL v2.0 s6.13.16.4 Built-in pipe query functions 2302 case Builtin::BIget_pipe_num_packets: 2303 case Builtin::BIget_pipe_max_packets: { 2304 const char *Name; 2305 if (BuiltinID == Builtin::BIget_pipe_num_packets) 2306 Name = "__get_pipe_num_packets"; 2307 else 2308 Name = "__get_pipe_max_packets"; 2309 2310 // Building the generic function prototype. 2311 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 2312 CGOpenCLRuntime OpenCLRT(CGM); 2313 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2314 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2315 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty}; 2316 llvm::FunctionType *FTy = llvm::FunctionType::get( 2317 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2318 2319 return RValue::get(Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2320 {Arg0, PacketSize, PacketAlign})); 2321 } 2322 2323 // OpenCL v2.0 s6.13.9 - Address space qualifier functions. 2324 case Builtin::BIto_global: 2325 case Builtin::BIto_local: 2326 case Builtin::BIto_private: { 2327 auto Arg0 = EmitScalarExpr(E->getArg(0)); 2328 auto NewArgT = llvm::PointerType::get(Int8Ty, 2329 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2330 auto NewRetT = llvm::PointerType::get(Int8Ty, 2331 CGM.getContext().getTargetAddressSpace( 2332 E->getType()->getPointeeType().getAddressSpace())); 2333 auto FTy = llvm::FunctionType::get(NewRetT, {NewArgT}, false); 2334 llvm::Value *NewArg; 2335 if (Arg0->getType()->getPointerAddressSpace() != 2336 NewArgT->getPointerAddressSpace()) 2337 NewArg = Builder.CreateAddrSpaceCast(Arg0, NewArgT); 2338 else 2339 NewArg = Builder.CreateBitOrPointerCast(Arg0, NewArgT); 2340 auto NewName = std::string("__") + E->getDirectCallee()->getName().str(); 2341 auto NewCall = 2342 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, NewName), {NewArg}); 2343 return RValue::get(Builder.CreateBitOrPointerCast(NewCall, 2344 ConvertType(E->getType()))); 2345 } 2346 2347 // OpenCL v2.0, s6.13.17 - Enqueue kernel function. 2348 // It contains four different overload formats specified in Table 6.13.17.1. 2349 case Builtin::BIenqueue_kernel: { 2350 StringRef Name; // Generated function call name 2351 unsigned NumArgs = E->getNumArgs(); 2352 2353 llvm::Type *QueueTy = ConvertType(getContext().OCLQueueTy); 2354 llvm::Type *RangeTy = ConvertType(getContext().OCLNDRangeTy); 2355 2356 llvm::Value *Queue = EmitScalarExpr(E->getArg(0)); 2357 llvm::Value *Flags = EmitScalarExpr(E->getArg(1)); 2358 llvm::Value *Range = EmitScalarExpr(E->getArg(2)); 2359 2360 if (NumArgs == 4) { 2361 // The most basic form of the call with parameters: 2362 // queue_t, kernel_enqueue_flags_t, ndrange_t, block(void) 2363 Name = "__enqueue_kernel_basic"; 2364 llvm::Type *ArgTys[] = {QueueTy, Int32Ty, RangeTy, Int8PtrTy}; 2365 llvm::FunctionType *FTy = llvm::FunctionType::get( 2366 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys, 4), false); 2367 2368 llvm::Value *Block = 2369 Builder.CreateBitCast(EmitScalarExpr(E->getArg(3)), Int8PtrTy); 2370 2371 return RValue::get(Builder.CreateCall( 2372 CGM.CreateRuntimeFunction(FTy, Name), {Queue, Flags, Range, Block})); 2373 } 2374 assert(NumArgs >= 5 && "Invalid enqueue_kernel signature"); 2375 2376 // Could have events and/or vaargs. 2377 if (E->getArg(3)->getType()->isBlockPointerType()) { 2378 // No events passed, but has variadic arguments. 2379 Name = "__enqueue_kernel_vaargs"; 2380 llvm::Value *Block = 2381 Builder.CreateBitCast(EmitScalarExpr(E->getArg(3)), Int8PtrTy); 2382 // Create a vector of the arguments, as well as a constant value to 2383 // express to the runtime the number of variadic arguments. 2384 std::vector<llvm::Value *> Args = {Queue, Flags, Range, Block, 2385 ConstantInt::get(IntTy, NumArgs - 4)}; 2386 std::vector<llvm::Type *> ArgTys = {QueueTy, IntTy, RangeTy, Int8PtrTy, 2387 IntTy}; 2388 2389 // Add the variadics. 2390 for (unsigned I = 4; I < NumArgs; ++I) { 2391 llvm::Value *ArgSize = EmitScalarExpr(E->getArg(I)); 2392 unsigned TypeSizeInBytes = 2393 getContext() 2394 .getTypeSizeInChars(E->getArg(I)->getType()) 2395 .getQuantity(); 2396 Args.push_back(TypeSizeInBytes < 4 2397 ? Builder.CreateZExt(ArgSize, Int32Ty) 2398 : ArgSize); 2399 } 2400 2401 llvm::FunctionType *FTy = llvm::FunctionType::get( 2402 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), true); 2403 return RValue::get( 2404 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2405 llvm::ArrayRef<llvm::Value *>(Args))); 2406 } 2407 // Any calls now have event arguments passed. 2408 if (NumArgs >= 7) { 2409 llvm::Type *EventTy = ConvertType(getContext().OCLClkEventTy); 2410 unsigned AS4 = 2411 E->getArg(4)->getType()->isArrayType() 2412 ? E->getArg(4)->getType().getAddressSpace() 2413 : E->getArg(4)->getType()->getPointeeType().getAddressSpace(); 2414 llvm::Type *EventPtrAS4Ty = 2415 EventTy->getPointerTo(CGM.getContext().getTargetAddressSpace(AS4)); 2416 unsigned AS5 = 2417 E->getArg(5)->getType()->getPointeeType().getAddressSpace(); 2418 llvm::Type *EventPtrAS5Ty = 2419 EventTy->getPointerTo(CGM.getContext().getTargetAddressSpace(AS5)); 2420 2421 llvm::Value *NumEvents = EmitScalarExpr(E->getArg(3)); 2422 llvm::Value *EventList = 2423 E->getArg(4)->getType()->isArrayType() 2424 ? EmitArrayToPointerDecay(E->getArg(4)).getPointer() 2425 : EmitScalarExpr(E->getArg(4)); 2426 llvm::Value *ClkEvent = EmitScalarExpr(E->getArg(5)); 2427 llvm::Value *Block = 2428 Builder.CreateBitCast(EmitScalarExpr(E->getArg(6)), Int8PtrTy); 2429 2430 std::vector<llvm::Type *> ArgTys = { 2431 QueueTy, Int32Ty, RangeTy, Int32Ty, 2432 EventPtrAS4Ty, EventPtrAS5Ty, Int8PtrTy}; 2433 std::vector<llvm::Value *> Args = {Queue, Flags, Range, NumEvents, 2434 EventList, ClkEvent, Block}; 2435 2436 if (NumArgs == 7) { 2437 // Has events but no variadics. 2438 Name = "__enqueue_kernel_basic_events"; 2439 llvm::FunctionType *FTy = llvm::FunctionType::get( 2440 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2441 return RValue::get( 2442 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2443 llvm::ArrayRef<llvm::Value *>(Args))); 2444 } 2445 // Has event info and variadics 2446 // Pass the number of variadics to the runtime function too. 2447 Args.push_back(ConstantInt::get(Int32Ty, NumArgs - 7)); 2448 ArgTys.push_back(Int32Ty); 2449 Name = "__enqueue_kernel_events_vaargs"; 2450 2451 // Add the variadics. 2452 for (unsigned I = 7; I < NumArgs; ++I) { 2453 llvm::Value *ArgSize = EmitScalarExpr(E->getArg(I)); 2454 unsigned TypeSizeInBytes = 2455 getContext() 2456 .getTypeSizeInChars(E->getArg(I)->getType()) 2457 .getQuantity(); 2458 Args.push_back(TypeSizeInBytes < 4 2459 ? Builder.CreateZExt(ArgSize, Int32Ty) 2460 : ArgSize); 2461 } 2462 llvm::FunctionType *FTy = llvm::FunctionType::get( 2463 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), true); 2464 return RValue::get( 2465 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2466 llvm::ArrayRef<llvm::Value *>(Args))); 2467 } 2468 } 2469 // OpenCL v2.0 s6.13.17.6 - Kernel query functions need bitcast of block 2470 // parameter. 2471 case Builtin::BIget_kernel_work_group_size: { 2472 Value *Arg = EmitScalarExpr(E->getArg(0)); 2473 Arg = Builder.CreateBitCast(Arg, Int8PtrTy); 2474 return RValue::get( 2475 Builder.CreateCall(CGM.CreateRuntimeFunction( 2476 llvm::FunctionType::get(IntTy, Int8PtrTy, false), 2477 "__get_kernel_work_group_size_impl"), 2478 Arg)); 2479 } 2480 case Builtin::BIget_kernel_preferred_work_group_size_multiple: { 2481 Value *Arg = EmitScalarExpr(E->getArg(0)); 2482 Arg = Builder.CreateBitCast(Arg, Int8PtrTy); 2483 return RValue::get(Builder.CreateCall( 2484 CGM.CreateRuntimeFunction( 2485 llvm::FunctionType::get(IntTy, Int8PtrTy, false), 2486 "__get_kernel_preferred_work_group_multiple_impl"), 2487 Arg)); 2488 } 2489 case Builtin::BIprintf: 2490 if (getLangOpts().CUDA && getLangOpts().CUDAIsDevice) 2491 return EmitCUDADevicePrintfCallExpr(E, ReturnValue); 2492 break; 2493 case Builtin::BI__builtin_canonicalize: 2494 case Builtin::BI__builtin_canonicalizef: 2495 case Builtin::BI__builtin_canonicalizel: 2496 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::canonicalize)); 2497 2498 case Builtin::BI__builtin_thread_pointer: { 2499 if (!getContext().getTargetInfo().isTLSSupported()) 2500 CGM.ErrorUnsupported(E, "__builtin_thread_pointer"); 2501 // Fall through - it's already mapped to the intrinsic by GCCBuiltin. 2502 break; 2503 } 2504 } 2505 2506 // If this is an alias for a lib function (e.g. __builtin_sin), emit 2507 // the call using the normal call path, but using the unmangled 2508 // version of the function name. 2509 if (getContext().BuiltinInfo.isLibFunction(BuiltinID)) 2510 return emitLibraryCall(*this, FD, E, 2511 CGM.getBuiltinLibFunction(FD, BuiltinID)); 2512 2513 // If this is a predefined lib function (e.g. malloc), emit the call 2514 // using exactly the normal call path. 2515 if (getContext().BuiltinInfo.isPredefinedLibFunction(BuiltinID)) 2516 return emitLibraryCall(*this, FD, E, EmitScalarExpr(E->getCallee())); 2517 2518 // Check that a call to a target specific builtin has the correct target 2519 // features. 2520 // This is down here to avoid non-target specific builtins, however, if 2521 // generic builtins start to require generic target features then we 2522 // can move this up to the beginning of the function. 2523 checkTargetFeatures(E, FD); 2524 2525 // See if we have a target specific intrinsic. 2526 const char *Name = getContext().BuiltinInfo.getName(BuiltinID); 2527 Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; 2528 StringRef Prefix = 2529 llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch()); 2530 if (!Prefix.empty()) { 2531 IntrinsicID = Intrinsic::getIntrinsicForGCCBuiltin(Prefix.data(), Name); 2532 // NOTE we dont need to perform a compatibility flag check here since the 2533 // intrinsics are declared in Builtins*.def via LANGBUILTIN which filter the 2534 // MS builtins via ALL_MS_LANGUAGES and are filtered earlier. 2535 if (IntrinsicID == Intrinsic::not_intrinsic) 2536 IntrinsicID = Intrinsic::getIntrinsicForMSBuiltin(Prefix.data(), Name); 2537 } 2538 2539 if (IntrinsicID != Intrinsic::not_intrinsic) { 2540 SmallVector<Value*, 16> Args; 2541 2542 // Find out if any arguments are required to be integer constant 2543 // expressions. 2544 unsigned ICEArguments = 0; 2545 ASTContext::GetBuiltinTypeError Error; 2546 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 2547 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 2548 2549 Function *F = CGM.getIntrinsic(IntrinsicID); 2550 llvm::FunctionType *FTy = F->getFunctionType(); 2551 2552 for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) { 2553 Value *ArgValue; 2554 // If this is a normal argument, just emit it as a scalar. 2555 if ((ICEArguments & (1 << i)) == 0) { 2556 ArgValue = EmitScalarExpr(E->getArg(i)); 2557 } else { 2558 // If this is required to be a constant, constant fold it so that we 2559 // know that the generated intrinsic gets a ConstantInt. 2560 llvm::APSInt Result; 2561 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result,getContext()); 2562 assert(IsConst && "Constant arg isn't actually constant?"); 2563 (void)IsConst; 2564 ArgValue = llvm::ConstantInt::get(getLLVMContext(), Result); 2565 } 2566 2567 // If the intrinsic arg type is different from the builtin arg type 2568 // we need to do a bit cast. 2569 llvm::Type *PTy = FTy->getParamType(i); 2570 if (PTy != ArgValue->getType()) { 2571 assert(PTy->canLosslesslyBitCastTo(FTy->getParamType(i)) && 2572 "Must be able to losslessly bit cast to param"); 2573 ArgValue = Builder.CreateBitCast(ArgValue, PTy); 2574 } 2575 2576 Args.push_back(ArgValue); 2577 } 2578 2579 Value *V = Builder.CreateCall(F, Args); 2580 QualType BuiltinRetType = E->getType(); 2581 2582 llvm::Type *RetTy = VoidTy; 2583 if (!BuiltinRetType->isVoidType()) 2584 RetTy = ConvertType(BuiltinRetType); 2585 2586 if (RetTy != V->getType()) { 2587 assert(V->getType()->canLosslesslyBitCastTo(RetTy) && 2588 "Must be able to losslessly bit cast result type"); 2589 V = Builder.CreateBitCast(V, RetTy); 2590 } 2591 2592 return RValue::get(V); 2593 } 2594 2595 // See if we have a target specific builtin that needs to be lowered. 2596 if (Value *V = EmitTargetBuiltinExpr(BuiltinID, E)) 2597 return RValue::get(V); 2598 2599 ErrorUnsupported(E, "builtin function"); 2600 2601 // Unknown builtin, for now just dump it out and return undef. 2602 return GetUndefRValue(E->getType()); 2603 } 2604 2605 static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF, 2606 unsigned BuiltinID, const CallExpr *E, 2607 llvm::Triple::ArchType Arch) { 2608 switch (Arch) { 2609 case llvm::Triple::arm: 2610 case llvm::Triple::armeb: 2611 case llvm::Triple::thumb: 2612 case llvm::Triple::thumbeb: 2613 return CGF->EmitARMBuiltinExpr(BuiltinID, E); 2614 case llvm::Triple::aarch64: 2615 case llvm::Triple::aarch64_be: 2616 return CGF->EmitAArch64BuiltinExpr(BuiltinID, E); 2617 case llvm::Triple::x86: 2618 case llvm::Triple::x86_64: 2619 return CGF->EmitX86BuiltinExpr(BuiltinID, E); 2620 case llvm::Triple::ppc: 2621 case llvm::Triple::ppc64: 2622 case llvm::Triple::ppc64le: 2623 return CGF->EmitPPCBuiltinExpr(BuiltinID, E); 2624 case llvm::Triple::r600: 2625 case llvm::Triple::amdgcn: 2626 return CGF->EmitAMDGPUBuiltinExpr(BuiltinID, E); 2627 case llvm::Triple::systemz: 2628 return CGF->EmitSystemZBuiltinExpr(BuiltinID, E); 2629 case llvm::Triple::nvptx: 2630 case llvm::Triple::nvptx64: 2631 return CGF->EmitNVPTXBuiltinExpr(BuiltinID, E); 2632 case llvm::Triple::wasm32: 2633 case llvm::Triple::wasm64: 2634 return CGF->EmitWebAssemblyBuiltinExpr(BuiltinID, E); 2635 default: 2636 return nullptr; 2637 } 2638 } 2639 2640 Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID, 2641 const CallExpr *E) { 2642 if (getContext().BuiltinInfo.isAuxBuiltinID(BuiltinID)) { 2643 assert(getContext().getAuxTargetInfo() && "Missing aux target info"); 2644 return EmitTargetArchBuiltinExpr( 2645 this, getContext().BuiltinInfo.getAuxBuiltinID(BuiltinID), E, 2646 getContext().getAuxTargetInfo()->getTriple().getArch()); 2647 } 2648 2649 return EmitTargetArchBuiltinExpr(this, BuiltinID, E, 2650 getTarget().getTriple().getArch()); 2651 } 2652 2653 static llvm::VectorType *GetNeonType(CodeGenFunction *CGF, 2654 NeonTypeFlags TypeFlags, 2655 bool V1Ty=false) { 2656 int IsQuad = TypeFlags.isQuad(); 2657 switch (TypeFlags.getEltType()) { 2658 case NeonTypeFlags::Int8: 2659 case NeonTypeFlags::Poly8: 2660 return llvm::VectorType::get(CGF->Int8Ty, V1Ty ? 1 : (8 << IsQuad)); 2661 case NeonTypeFlags::Int16: 2662 case NeonTypeFlags::Poly16: 2663 case NeonTypeFlags::Float16: 2664 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 2665 case NeonTypeFlags::Int32: 2666 return llvm::VectorType::get(CGF->Int32Ty, V1Ty ? 1 : (2 << IsQuad)); 2667 case NeonTypeFlags::Int64: 2668 case NeonTypeFlags::Poly64: 2669 return llvm::VectorType::get(CGF->Int64Ty, V1Ty ? 1 : (1 << IsQuad)); 2670 case NeonTypeFlags::Poly128: 2671 // FIXME: i128 and f128 doesn't get fully support in Clang and llvm. 2672 // There is a lot of i128 and f128 API missing. 2673 // so we use v16i8 to represent poly128 and get pattern matched. 2674 return llvm::VectorType::get(CGF->Int8Ty, 16); 2675 case NeonTypeFlags::Float32: 2676 return llvm::VectorType::get(CGF->FloatTy, V1Ty ? 1 : (2 << IsQuad)); 2677 case NeonTypeFlags::Float64: 2678 return llvm::VectorType::get(CGF->DoubleTy, V1Ty ? 1 : (1 << IsQuad)); 2679 } 2680 llvm_unreachable("Unknown vector element type!"); 2681 } 2682 2683 static llvm::VectorType *GetFloatNeonType(CodeGenFunction *CGF, 2684 NeonTypeFlags IntTypeFlags) { 2685 int IsQuad = IntTypeFlags.isQuad(); 2686 switch (IntTypeFlags.getEltType()) { 2687 case NeonTypeFlags::Int32: 2688 return llvm::VectorType::get(CGF->FloatTy, (2 << IsQuad)); 2689 case NeonTypeFlags::Int64: 2690 return llvm::VectorType::get(CGF->DoubleTy, (1 << IsQuad)); 2691 default: 2692 llvm_unreachable("Type can't be converted to floating-point!"); 2693 } 2694 } 2695 2696 Value *CodeGenFunction::EmitNeonSplat(Value *V, Constant *C) { 2697 unsigned nElts = V->getType()->getVectorNumElements(); 2698 Value* SV = llvm::ConstantVector::getSplat(nElts, C); 2699 return Builder.CreateShuffleVector(V, V, SV, "lane"); 2700 } 2701 2702 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, 2703 const char *name, 2704 unsigned shift, bool rightshift) { 2705 unsigned j = 0; 2706 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 2707 ai != ae; ++ai, ++j) 2708 if (shift > 0 && shift == j) 2709 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); 2710 else 2711 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); 2712 2713 return Builder.CreateCall(F, Ops, name); 2714 } 2715 2716 Value *CodeGenFunction::EmitNeonShiftVector(Value *V, llvm::Type *Ty, 2717 bool neg) { 2718 int SV = cast<ConstantInt>(V)->getSExtValue(); 2719 return ConstantInt::get(Ty, neg ? -SV : SV); 2720 } 2721 2722 // \brief Right-shift a vector by a constant. 2723 Value *CodeGenFunction::EmitNeonRShiftImm(Value *Vec, Value *Shift, 2724 llvm::Type *Ty, bool usgn, 2725 const char *name) { 2726 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 2727 2728 int ShiftAmt = cast<ConstantInt>(Shift)->getSExtValue(); 2729 int EltSize = VTy->getScalarSizeInBits(); 2730 2731 Vec = Builder.CreateBitCast(Vec, Ty); 2732 2733 // lshr/ashr are undefined when the shift amount is equal to the vector 2734 // element size. 2735 if (ShiftAmt == EltSize) { 2736 if (usgn) { 2737 // Right-shifting an unsigned value by its size yields 0. 2738 return llvm::ConstantAggregateZero::get(VTy); 2739 } else { 2740 // Right-shifting a signed value by its size is equivalent 2741 // to a shift of size-1. 2742 --ShiftAmt; 2743 Shift = ConstantInt::get(VTy->getElementType(), ShiftAmt); 2744 } 2745 } 2746 2747 Shift = EmitNeonShiftVector(Shift, Ty, false); 2748 if (usgn) 2749 return Builder.CreateLShr(Vec, Shift, name); 2750 else 2751 return Builder.CreateAShr(Vec, Shift, name); 2752 } 2753 2754 enum { 2755 AddRetType = (1 << 0), 2756 Add1ArgType = (1 << 1), 2757 Add2ArgTypes = (1 << 2), 2758 2759 VectorizeRetType = (1 << 3), 2760 VectorizeArgTypes = (1 << 4), 2761 2762 InventFloatType = (1 << 5), 2763 UnsignedAlts = (1 << 6), 2764 2765 Use64BitVectors = (1 << 7), 2766 Use128BitVectors = (1 << 8), 2767 2768 Vectorize1ArgType = Add1ArgType | VectorizeArgTypes, 2769 VectorRet = AddRetType | VectorizeRetType, 2770 VectorRetGetArgs01 = 2771 AddRetType | Add2ArgTypes | VectorizeRetType | VectorizeArgTypes, 2772 FpCmpzModifiers = 2773 AddRetType | VectorizeRetType | Add1ArgType | InventFloatType 2774 }; 2775 2776 namespace { 2777 struct NeonIntrinsicInfo { 2778 const char *NameHint; 2779 unsigned BuiltinID; 2780 unsigned LLVMIntrinsic; 2781 unsigned AltLLVMIntrinsic; 2782 unsigned TypeModifier; 2783 2784 bool operator<(unsigned RHSBuiltinID) const { 2785 return BuiltinID < RHSBuiltinID; 2786 } 2787 bool operator<(const NeonIntrinsicInfo &TE) const { 2788 return BuiltinID < TE.BuiltinID; 2789 } 2790 }; 2791 } // end anonymous namespace 2792 2793 #define NEONMAP0(NameBase) \ 2794 { #NameBase, NEON::BI__builtin_neon_ ## NameBase, 0, 0, 0 } 2795 2796 #define NEONMAP1(NameBase, LLVMIntrinsic, TypeModifier) \ 2797 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 2798 Intrinsic::LLVMIntrinsic, 0, TypeModifier } 2799 2800 #define NEONMAP2(NameBase, LLVMIntrinsic, AltLLVMIntrinsic, TypeModifier) \ 2801 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 2802 Intrinsic::LLVMIntrinsic, Intrinsic::AltLLVMIntrinsic, \ 2803 TypeModifier } 2804 2805 static const NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = { 2806 NEONMAP2(vabd_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 2807 NEONMAP2(vabdq_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 2808 NEONMAP1(vabs_v, arm_neon_vabs, 0), 2809 NEONMAP1(vabsq_v, arm_neon_vabs, 0), 2810 NEONMAP0(vaddhn_v), 2811 NEONMAP1(vaesdq_v, arm_neon_aesd, 0), 2812 NEONMAP1(vaeseq_v, arm_neon_aese, 0), 2813 NEONMAP1(vaesimcq_v, arm_neon_aesimc, 0), 2814 NEONMAP1(vaesmcq_v, arm_neon_aesmc, 0), 2815 NEONMAP1(vbsl_v, arm_neon_vbsl, AddRetType), 2816 NEONMAP1(vbslq_v, arm_neon_vbsl, AddRetType), 2817 NEONMAP1(vcage_v, arm_neon_vacge, 0), 2818 NEONMAP1(vcageq_v, arm_neon_vacge, 0), 2819 NEONMAP1(vcagt_v, arm_neon_vacgt, 0), 2820 NEONMAP1(vcagtq_v, arm_neon_vacgt, 0), 2821 NEONMAP1(vcale_v, arm_neon_vacge, 0), 2822 NEONMAP1(vcaleq_v, arm_neon_vacge, 0), 2823 NEONMAP1(vcalt_v, arm_neon_vacgt, 0), 2824 NEONMAP1(vcaltq_v, arm_neon_vacgt, 0), 2825 NEONMAP1(vcls_v, arm_neon_vcls, Add1ArgType), 2826 NEONMAP1(vclsq_v, arm_neon_vcls, Add1ArgType), 2827 NEONMAP1(vclz_v, ctlz, Add1ArgType), 2828 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 2829 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 2830 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 2831 NEONMAP1(vcvt_f16_f32, arm_neon_vcvtfp2hf, 0), 2832 NEONMAP1(vcvt_f32_f16, arm_neon_vcvthf2fp, 0), 2833 NEONMAP0(vcvt_f32_v), 2834 NEONMAP2(vcvt_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 2835 NEONMAP1(vcvt_n_s32_v, arm_neon_vcvtfp2fxs, 0), 2836 NEONMAP1(vcvt_n_s64_v, arm_neon_vcvtfp2fxs, 0), 2837 NEONMAP1(vcvt_n_u32_v, arm_neon_vcvtfp2fxu, 0), 2838 NEONMAP1(vcvt_n_u64_v, arm_neon_vcvtfp2fxu, 0), 2839 NEONMAP0(vcvt_s32_v), 2840 NEONMAP0(vcvt_s64_v), 2841 NEONMAP0(vcvt_u32_v), 2842 NEONMAP0(vcvt_u64_v), 2843 NEONMAP1(vcvta_s32_v, arm_neon_vcvtas, 0), 2844 NEONMAP1(vcvta_s64_v, arm_neon_vcvtas, 0), 2845 NEONMAP1(vcvta_u32_v, arm_neon_vcvtau, 0), 2846 NEONMAP1(vcvta_u64_v, arm_neon_vcvtau, 0), 2847 NEONMAP1(vcvtaq_s32_v, arm_neon_vcvtas, 0), 2848 NEONMAP1(vcvtaq_s64_v, arm_neon_vcvtas, 0), 2849 NEONMAP1(vcvtaq_u32_v, arm_neon_vcvtau, 0), 2850 NEONMAP1(vcvtaq_u64_v, arm_neon_vcvtau, 0), 2851 NEONMAP1(vcvtm_s32_v, arm_neon_vcvtms, 0), 2852 NEONMAP1(vcvtm_s64_v, arm_neon_vcvtms, 0), 2853 NEONMAP1(vcvtm_u32_v, arm_neon_vcvtmu, 0), 2854 NEONMAP1(vcvtm_u64_v, arm_neon_vcvtmu, 0), 2855 NEONMAP1(vcvtmq_s32_v, arm_neon_vcvtms, 0), 2856 NEONMAP1(vcvtmq_s64_v, arm_neon_vcvtms, 0), 2857 NEONMAP1(vcvtmq_u32_v, arm_neon_vcvtmu, 0), 2858 NEONMAP1(vcvtmq_u64_v, arm_neon_vcvtmu, 0), 2859 NEONMAP1(vcvtn_s32_v, arm_neon_vcvtns, 0), 2860 NEONMAP1(vcvtn_s64_v, arm_neon_vcvtns, 0), 2861 NEONMAP1(vcvtn_u32_v, arm_neon_vcvtnu, 0), 2862 NEONMAP1(vcvtn_u64_v, arm_neon_vcvtnu, 0), 2863 NEONMAP1(vcvtnq_s32_v, arm_neon_vcvtns, 0), 2864 NEONMAP1(vcvtnq_s64_v, arm_neon_vcvtns, 0), 2865 NEONMAP1(vcvtnq_u32_v, arm_neon_vcvtnu, 0), 2866 NEONMAP1(vcvtnq_u64_v, arm_neon_vcvtnu, 0), 2867 NEONMAP1(vcvtp_s32_v, arm_neon_vcvtps, 0), 2868 NEONMAP1(vcvtp_s64_v, arm_neon_vcvtps, 0), 2869 NEONMAP1(vcvtp_u32_v, arm_neon_vcvtpu, 0), 2870 NEONMAP1(vcvtp_u64_v, arm_neon_vcvtpu, 0), 2871 NEONMAP1(vcvtpq_s32_v, arm_neon_vcvtps, 0), 2872 NEONMAP1(vcvtpq_s64_v, arm_neon_vcvtps, 0), 2873 NEONMAP1(vcvtpq_u32_v, arm_neon_vcvtpu, 0), 2874 NEONMAP1(vcvtpq_u64_v, arm_neon_vcvtpu, 0), 2875 NEONMAP0(vcvtq_f32_v), 2876 NEONMAP2(vcvtq_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 2877 NEONMAP1(vcvtq_n_s32_v, arm_neon_vcvtfp2fxs, 0), 2878 NEONMAP1(vcvtq_n_s64_v, arm_neon_vcvtfp2fxs, 0), 2879 NEONMAP1(vcvtq_n_u32_v, arm_neon_vcvtfp2fxu, 0), 2880 NEONMAP1(vcvtq_n_u64_v, arm_neon_vcvtfp2fxu, 0), 2881 NEONMAP0(vcvtq_s32_v), 2882 NEONMAP0(vcvtq_s64_v), 2883 NEONMAP0(vcvtq_u32_v), 2884 NEONMAP0(vcvtq_u64_v), 2885 NEONMAP0(vext_v), 2886 NEONMAP0(vextq_v), 2887 NEONMAP0(vfma_v), 2888 NEONMAP0(vfmaq_v), 2889 NEONMAP2(vhadd_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 2890 NEONMAP2(vhaddq_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 2891 NEONMAP2(vhsub_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 2892 NEONMAP2(vhsubq_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 2893 NEONMAP0(vld1_dup_v), 2894 NEONMAP1(vld1_v, arm_neon_vld1, 0), 2895 NEONMAP0(vld1q_dup_v), 2896 NEONMAP1(vld1q_v, arm_neon_vld1, 0), 2897 NEONMAP1(vld2_lane_v, arm_neon_vld2lane, 0), 2898 NEONMAP1(vld2_v, arm_neon_vld2, 0), 2899 NEONMAP1(vld2q_lane_v, arm_neon_vld2lane, 0), 2900 NEONMAP1(vld2q_v, arm_neon_vld2, 0), 2901 NEONMAP1(vld3_lane_v, arm_neon_vld3lane, 0), 2902 NEONMAP1(vld3_v, arm_neon_vld3, 0), 2903 NEONMAP1(vld3q_lane_v, arm_neon_vld3lane, 0), 2904 NEONMAP1(vld3q_v, arm_neon_vld3, 0), 2905 NEONMAP1(vld4_lane_v, arm_neon_vld4lane, 0), 2906 NEONMAP1(vld4_v, arm_neon_vld4, 0), 2907 NEONMAP1(vld4q_lane_v, arm_neon_vld4lane, 0), 2908 NEONMAP1(vld4q_v, arm_neon_vld4, 0), 2909 NEONMAP2(vmax_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 2910 NEONMAP1(vmaxnm_v, arm_neon_vmaxnm, Add1ArgType), 2911 NEONMAP1(vmaxnmq_v, arm_neon_vmaxnm, Add1ArgType), 2912 NEONMAP2(vmaxq_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 2913 NEONMAP2(vmin_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 2914 NEONMAP1(vminnm_v, arm_neon_vminnm, Add1ArgType), 2915 NEONMAP1(vminnmq_v, arm_neon_vminnm, Add1ArgType), 2916 NEONMAP2(vminq_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 2917 NEONMAP0(vmovl_v), 2918 NEONMAP0(vmovn_v), 2919 NEONMAP1(vmul_v, arm_neon_vmulp, Add1ArgType), 2920 NEONMAP0(vmull_v), 2921 NEONMAP1(vmulq_v, arm_neon_vmulp, Add1ArgType), 2922 NEONMAP2(vpadal_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 2923 NEONMAP2(vpadalq_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 2924 NEONMAP1(vpadd_v, arm_neon_vpadd, Add1ArgType), 2925 NEONMAP2(vpaddl_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 2926 NEONMAP2(vpaddlq_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 2927 NEONMAP1(vpaddq_v, arm_neon_vpadd, Add1ArgType), 2928 NEONMAP2(vpmax_v, arm_neon_vpmaxu, arm_neon_vpmaxs, Add1ArgType | UnsignedAlts), 2929 NEONMAP2(vpmin_v, arm_neon_vpminu, arm_neon_vpmins, Add1ArgType | UnsignedAlts), 2930 NEONMAP1(vqabs_v, arm_neon_vqabs, Add1ArgType), 2931 NEONMAP1(vqabsq_v, arm_neon_vqabs, Add1ArgType), 2932 NEONMAP2(vqadd_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 2933 NEONMAP2(vqaddq_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 2934 NEONMAP2(vqdmlal_v, arm_neon_vqdmull, arm_neon_vqadds, 0), 2935 NEONMAP2(vqdmlsl_v, arm_neon_vqdmull, arm_neon_vqsubs, 0), 2936 NEONMAP1(vqdmulh_v, arm_neon_vqdmulh, Add1ArgType), 2937 NEONMAP1(vqdmulhq_v, arm_neon_vqdmulh, Add1ArgType), 2938 NEONMAP1(vqdmull_v, arm_neon_vqdmull, Add1ArgType), 2939 NEONMAP2(vqmovn_v, arm_neon_vqmovnu, arm_neon_vqmovns, Add1ArgType | UnsignedAlts), 2940 NEONMAP1(vqmovun_v, arm_neon_vqmovnsu, Add1ArgType), 2941 NEONMAP1(vqneg_v, arm_neon_vqneg, Add1ArgType), 2942 NEONMAP1(vqnegq_v, arm_neon_vqneg, Add1ArgType), 2943 NEONMAP1(vqrdmulh_v, arm_neon_vqrdmulh, Add1ArgType), 2944 NEONMAP1(vqrdmulhq_v, arm_neon_vqrdmulh, Add1ArgType), 2945 NEONMAP2(vqrshl_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 2946 NEONMAP2(vqrshlq_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 2947 NEONMAP2(vqshl_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 2948 NEONMAP2(vqshl_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 2949 NEONMAP2(vqshlq_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 2950 NEONMAP2(vqshlq_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 2951 NEONMAP1(vqshlu_n_v, arm_neon_vqshiftsu, 0), 2952 NEONMAP1(vqshluq_n_v, arm_neon_vqshiftsu, 0), 2953 NEONMAP2(vqsub_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 2954 NEONMAP2(vqsubq_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 2955 NEONMAP1(vraddhn_v, arm_neon_vraddhn, Add1ArgType), 2956 NEONMAP2(vrecpe_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 2957 NEONMAP2(vrecpeq_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 2958 NEONMAP1(vrecps_v, arm_neon_vrecps, Add1ArgType), 2959 NEONMAP1(vrecpsq_v, arm_neon_vrecps, Add1ArgType), 2960 NEONMAP2(vrhadd_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 2961 NEONMAP2(vrhaddq_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 2962 NEONMAP1(vrnd_v, arm_neon_vrintz, Add1ArgType), 2963 NEONMAP1(vrnda_v, arm_neon_vrinta, Add1ArgType), 2964 NEONMAP1(vrndaq_v, arm_neon_vrinta, Add1ArgType), 2965 NEONMAP1(vrndm_v, arm_neon_vrintm, Add1ArgType), 2966 NEONMAP1(vrndmq_v, arm_neon_vrintm, Add1ArgType), 2967 NEONMAP1(vrndn_v, arm_neon_vrintn, Add1ArgType), 2968 NEONMAP1(vrndnq_v, arm_neon_vrintn, Add1ArgType), 2969 NEONMAP1(vrndp_v, arm_neon_vrintp, Add1ArgType), 2970 NEONMAP1(vrndpq_v, arm_neon_vrintp, Add1ArgType), 2971 NEONMAP1(vrndq_v, arm_neon_vrintz, Add1ArgType), 2972 NEONMAP1(vrndx_v, arm_neon_vrintx, Add1ArgType), 2973 NEONMAP1(vrndxq_v, arm_neon_vrintx, Add1ArgType), 2974 NEONMAP2(vrshl_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 2975 NEONMAP2(vrshlq_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 2976 NEONMAP2(vrshr_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 2977 NEONMAP2(vrshrq_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 2978 NEONMAP2(vrsqrte_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 2979 NEONMAP2(vrsqrteq_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 2980 NEONMAP1(vrsqrts_v, arm_neon_vrsqrts, Add1ArgType), 2981 NEONMAP1(vrsqrtsq_v, arm_neon_vrsqrts, Add1ArgType), 2982 NEONMAP1(vrsubhn_v, arm_neon_vrsubhn, Add1ArgType), 2983 NEONMAP1(vsha1su0q_v, arm_neon_sha1su0, 0), 2984 NEONMAP1(vsha1su1q_v, arm_neon_sha1su1, 0), 2985 NEONMAP1(vsha256h2q_v, arm_neon_sha256h2, 0), 2986 NEONMAP1(vsha256hq_v, arm_neon_sha256h, 0), 2987 NEONMAP1(vsha256su0q_v, arm_neon_sha256su0, 0), 2988 NEONMAP1(vsha256su1q_v, arm_neon_sha256su1, 0), 2989 NEONMAP0(vshl_n_v), 2990 NEONMAP2(vshl_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 2991 NEONMAP0(vshll_n_v), 2992 NEONMAP0(vshlq_n_v), 2993 NEONMAP2(vshlq_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 2994 NEONMAP0(vshr_n_v), 2995 NEONMAP0(vshrn_n_v), 2996 NEONMAP0(vshrq_n_v), 2997 NEONMAP1(vst1_v, arm_neon_vst1, 0), 2998 NEONMAP1(vst1q_v, arm_neon_vst1, 0), 2999 NEONMAP1(vst2_lane_v, arm_neon_vst2lane, 0), 3000 NEONMAP1(vst2_v, arm_neon_vst2, 0), 3001 NEONMAP1(vst2q_lane_v, arm_neon_vst2lane, 0), 3002 NEONMAP1(vst2q_v, arm_neon_vst2, 0), 3003 NEONMAP1(vst3_lane_v, arm_neon_vst3lane, 0), 3004 NEONMAP1(vst3_v, arm_neon_vst3, 0), 3005 NEONMAP1(vst3q_lane_v, arm_neon_vst3lane, 0), 3006 NEONMAP1(vst3q_v, arm_neon_vst3, 0), 3007 NEONMAP1(vst4_lane_v, arm_neon_vst4lane, 0), 3008 NEONMAP1(vst4_v, arm_neon_vst4, 0), 3009 NEONMAP1(vst4q_lane_v, arm_neon_vst4lane, 0), 3010 NEONMAP1(vst4q_v, arm_neon_vst4, 0), 3011 NEONMAP0(vsubhn_v), 3012 NEONMAP0(vtrn_v), 3013 NEONMAP0(vtrnq_v), 3014 NEONMAP0(vtst_v), 3015 NEONMAP0(vtstq_v), 3016 NEONMAP0(vuzp_v), 3017 NEONMAP0(vuzpq_v), 3018 NEONMAP0(vzip_v), 3019 NEONMAP0(vzipq_v) 3020 }; 3021 3022 static const NeonIntrinsicInfo AArch64SIMDIntrinsicMap[] = { 3023 NEONMAP1(vabs_v, aarch64_neon_abs, 0), 3024 NEONMAP1(vabsq_v, aarch64_neon_abs, 0), 3025 NEONMAP0(vaddhn_v), 3026 NEONMAP1(vaesdq_v, aarch64_crypto_aesd, 0), 3027 NEONMAP1(vaeseq_v, aarch64_crypto_aese, 0), 3028 NEONMAP1(vaesimcq_v, aarch64_crypto_aesimc, 0), 3029 NEONMAP1(vaesmcq_v, aarch64_crypto_aesmc, 0), 3030 NEONMAP1(vcage_v, aarch64_neon_facge, 0), 3031 NEONMAP1(vcageq_v, aarch64_neon_facge, 0), 3032 NEONMAP1(vcagt_v, aarch64_neon_facgt, 0), 3033 NEONMAP1(vcagtq_v, aarch64_neon_facgt, 0), 3034 NEONMAP1(vcale_v, aarch64_neon_facge, 0), 3035 NEONMAP1(vcaleq_v, aarch64_neon_facge, 0), 3036 NEONMAP1(vcalt_v, aarch64_neon_facgt, 0), 3037 NEONMAP1(vcaltq_v, aarch64_neon_facgt, 0), 3038 NEONMAP1(vcls_v, aarch64_neon_cls, Add1ArgType), 3039 NEONMAP1(vclsq_v, aarch64_neon_cls, Add1ArgType), 3040 NEONMAP1(vclz_v, ctlz, Add1ArgType), 3041 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 3042 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 3043 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 3044 NEONMAP1(vcvt_f16_f32, aarch64_neon_vcvtfp2hf, 0), 3045 NEONMAP1(vcvt_f32_f16, aarch64_neon_vcvthf2fp, 0), 3046 NEONMAP0(vcvt_f32_v), 3047 NEONMAP2(vcvt_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3048 NEONMAP2(vcvt_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3049 NEONMAP1(vcvt_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 3050 NEONMAP1(vcvt_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 3051 NEONMAP1(vcvt_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 3052 NEONMAP1(vcvt_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 3053 NEONMAP0(vcvtq_f32_v), 3054 NEONMAP2(vcvtq_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3055 NEONMAP2(vcvtq_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3056 NEONMAP1(vcvtq_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 3057 NEONMAP1(vcvtq_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 3058 NEONMAP1(vcvtq_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 3059 NEONMAP1(vcvtq_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 3060 NEONMAP1(vcvtx_f32_v, aarch64_neon_fcvtxn, AddRetType | Add1ArgType), 3061 NEONMAP0(vext_v), 3062 NEONMAP0(vextq_v), 3063 NEONMAP0(vfma_v), 3064 NEONMAP0(vfmaq_v), 3065 NEONMAP2(vhadd_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 3066 NEONMAP2(vhaddq_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 3067 NEONMAP2(vhsub_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 3068 NEONMAP2(vhsubq_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 3069 NEONMAP0(vmovl_v), 3070 NEONMAP0(vmovn_v), 3071 NEONMAP1(vmul_v, aarch64_neon_pmul, Add1ArgType), 3072 NEONMAP1(vmulq_v, aarch64_neon_pmul, Add1ArgType), 3073 NEONMAP1(vpadd_v, aarch64_neon_addp, Add1ArgType), 3074 NEONMAP2(vpaddl_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 3075 NEONMAP2(vpaddlq_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 3076 NEONMAP1(vpaddq_v, aarch64_neon_addp, Add1ArgType), 3077 NEONMAP1(vqabs_v, aarch64_neon_sqabs, Add1ArgType), 3078 NEONMAP1(vqabsq_v, aarch64_neon_sqabs, Add1ArgType), 3079 NEONMAP2(vqadd_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 3080 NEONMAP2(vqaddq_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 3081 NEONMAP2(vqdmlal_v, aarch64_neon_sqdmull, aarch64_neon_sqadd, 0), 3082 NEONMAP2(vqdmlsl_v, aarch64_neon_sqdmull, aarch64_neon_sqsub, 0), 3083 NEONMAP1(vqdmulh_v, aarch64_neon_sqdmulh, Add1ArgType), 3084 NEONMAP1(vqdmulhq_v, aarch64_neon_sqdmulh, Add1ArgType), 3085 NEONMAP1(vqdmull_v, aarch64_neon_sqdmull, Add1ArgType), 3086 NEONMAP2(vqmovn_v, aarch64_neon_uqxtn, aarch64_neon_sqxtn, Add1ArgType | UnsignedAlts), 3087 NEONMAP1(vqmovun_v, aarch64_neon_sqxtun, Add1ArgType), 3088 NEONMAP1(vqneg_v, aarch64_neon_sqneg, Add1ArgType), 3089 NEONMAP1(vqnegq_v, aarch64_neon_sqneg, Add1ArgType), 3090 NEONMAP1(vqrdmulh_v, aarch64_neon_sqrdmulh, Add1ArgType), 3091 NEONMAP1(vqrdmulhq_v, aarch64_neon_sqrdmulh, Add1ArgType), 3092 NEONMAP2(vqrshl_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 3093 NEONMAP2(vqrshlq_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 3094 NEONMAP2(vqshl_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl, UnsignedAlts), 3095 NEONMAP2(vqshl_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 3096 NEONMAP2(vqshlq_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl,UnsignedAlts), 3097 NEONMAP2(vqshlq_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 3098 NEONMAP1(vqshlu_n_v, aarch64_neon_sqshlu, 0), 3099 NEONMAP1(vqshluq_n_v, aarch64_neon_sqshlu, 0), 3100 NEONMAP2(vqsub_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 3101 NEONMAP2(vqsubq_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 3102 NEONMAP1(vraddhn_v, aarch64_neon_raddhn, Add1ArgType), 3103 NEONMAP2(vrecpe_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 3104 NEONMAP2(vrecpeq_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 3105 NEONMAP1(vrecps_v, aarch64_neon_frecps, Add1ArgType), 3106 NEONMAP1(vrecpsq_v, aarch64_neon_frecps, Add1ArgType), 3107 NEONMAP2(vrhadd_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 3108 NEONMAP2(vrhaddq_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 3109 NEONMAP2(vrshl_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 3110 NEONMAP2(vrshlq_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 3111 NEONMAP2(vrshr_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 3112 NEONMAP2(vrshrq_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 3113 NEONMAP2(vrsqrte_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 3114 NEONMAP2(vrsqrteq_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 3115 NEONMAP1(vrsqrts_v, aarch64_neon_frsqrts, Add1ArgType), 3116 NEONMAP1(vrsqrtsq_v, aarch64_neon_frsqrts, Add1ArgType), 3117 NEONMAP1(vrsubhn_v, aarch64_neon_rsubhn, Add1ArgType), 3118 NEONMAP1(vsha1su0q_v, aarch64_crypto_sha1su0, 0), 3119 NEONMAP1(vsha1su1q_v, aarch64_crypto_sha1su1, 0), 3120 NEONMAP1(vsha256h2q_v, aarch64_crypto_sha256h2, 0), 3121 NEONMAP1(vsha256hq_v, aarch64_crypto_sha256h, 0), 3122 NEONMAP1(vsha256su0q_v, aarch64_crypto_sha256su0, 0), 3123 NEONMAP1(vsha256su1q_v, aarch64_crypto_sha256su1, 0), 3124 NEONMAP0(vshl_n_v), 3125 NEONMAP2(vshl_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 3126 NEONMAP0(vshll_n_v), 3127 NEONMAP0(vshlq_n_v), 3128 NEONMAP2(vshlq_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 3129 NEONMAP0(vshr_n_v), 3130 NEONMAP0(vshrn_n_v), 3131 NEONMAP0(vshrq_n_v), 3132 NEONMAP0(vsubhn_v), 3133 NEONMAP0(vtst_v), 3134 NEONMAP0(vtstq_v), 3135 }; 3136 3137 static const NeonIntrinsicInfo AArch64SISDIntrinsicMap[] = { 3138 NEONMAP1(vabdd_f64, aarch64_sisd_fabd, Add1ArgType), 3139 NEONMAP1(vabds_f32, aarch64_sisd_fabd, Add1ArgType), 3140 NEONMAP1(vabsd_s64, aarch64_neon_abs, Add1ArgType), 3141 NEONMAP1(vaddlv_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 3142 NEONMAP1(vaddlv_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 3143 NEONMAP1(vaddlvq_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 3144 NEONMAP1(vaddlvq_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 3145 NEONMAP1(vaddv_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 3146 NEONMAP1(vaddv_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 3147 NEONMAP1(vaddv_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3148 NEONMAP1(vaddvq_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 3149 NEONMAP1(vaddvq_f64, aarch64_neon_faddv, AddRetType | Add1ArgType), 3150 NEONMAP1(vaddvq_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 3151 NEONMAP1(vaddvq_s64, aarch64_neon_saddv, AddRetType | Add1ArgType), 3152 NEONMAP1(vaddvq_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3153 NEONMAP1(vaddvq_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3154 NEONMAP1(vcaged_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 3155 NEONMAP1(vcages_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 3156 NEONMAP1(vcagtd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 3157 NEONMAP1(vcagts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 3158 NEONMAP1(vcaled_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 3159 NEONMAP1(vcales_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 3160 NEONMAP1(vcaltd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 3161 NEONMAP1(vcalts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 3162 NEONMAP1(vcvtad_s64_f64, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 3163 NEONMAP1(vcvtad_u64_f64, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 3164 NEONMAP1(vcvtas_s32_f32, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 3165 NEONMAP1(vcvtas_u32_f32, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 3166 NEONMAP1(vcvtd_n_f64_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 3167 NEONMAP1(vcvtd_n_f64_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 3168 NEONMAP1(vcvtd_n_s64_f64, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 3169 NEONMAP1(vcvtd_n_u64_f64, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 3170 NEONMAP1(vcvtmd_s64_f64, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 3171 NEONMAP1(vcvtmd_u64_f64, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 3172 NEONMAP1(vcvtms_s32_f32, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 3173 NEONMAP1(vcvtms_u32_f32, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 3174 NEONMAP1(vcvtnd_s64_f64, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 3175 NEONMAP1(vcvtnd_u64_f64, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 3176 NEONMAP1(vcvtns_s32_f32, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 3177 NEONMAP1(vcvtns_u32_f32, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 3178 NEONMAP1(vcvtpd_s64_f64, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 3179 NEONMAP1(vcvtpd_u64_f64, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 3180 NEONMAP1(vcvtps_s32_f32, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 3181 NEONMAP1(vcvtps_u32_f32, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 3182 NEONMAP1(vcvts_n_f32_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 3183 NEONMAP1(vcvts_n_f32_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 3184 NEONMAP1(vcvts_n_s32_f32, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 3185 NEONMAP1(vcvts_n_u32_f32, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 3186 NEONMAP1(vcvtxd_f32_f64, aarch64_sisd_fcvtxn, 0), 3187 NEONMAP1(vmaxnmv_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3188 NEONMAP1(vmaxnmvq_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3189 NEONMAP1(vmaxnmvq_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3190 NEONMAP1(vmaxv_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3191 NEONMAP1(vmaxv_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 3192 NEONMAP1(vmaxv_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 3193 NEONMAP1(vmaxvq_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3194 NEONMAP1(vmaxvq_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3195 NEONMAP1(vmaxvq_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 3196 NEONMAP1(vmaxvq_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 3197 NEONMAP1(vminnmv_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3198 NEONMAP1(vminnmvq_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3199 NEONMAP1(vminnmvq_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3200 NEONMAP1(vminv_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3201 NEONMAP1(vminv_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 3202 NEONMAP1(vminv_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 3203 NEONMAP1(vminvq_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3204 NEONMAP1(vminvq_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 3205 NEONMAP1(vminvq_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 3206 NEONMAP1(vminvq_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 3207 NEONMAP1(vmull_p64, aarch64_neon_pmull64, 0), 3208 NEONMAP1(vmulxd_f64, aarch64_neon_fmulx, Add1ArgType), 3209 NEONMAP1(vmulxs_f32, aarch64_neon_fmulx, Add1ArgType), 3210 NEONMAP1(vpaddd_s64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3211 NEONMAP1(vpaddd_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3212 NEONMAP1(vpmaxnmqd_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3213 NEONMAP1(vpmaxnms_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3214 NEONMAP1(vpmaxqd_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3215 NEONMAP1(vpmaxs_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3216 NEONMAP1(vpminnmqd_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3217 NEONMAP1(vpminnms_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3218 NEONMAP1(vpminqd_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 3219 NEONMAP1(vpmins_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3220 NEONMAP1(vqabsb_s8, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 3221 NEONMAP1(vqabsd_s64, aarch64_neon_sqabs, Add1ArgType), 3222 NEONMAP1(vqabsh_s16, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 3223 NEONMAP1(vqabss_s32, aarch64_neon_sqabs, Add1ArgType), 3224 NEONMAP1(vqaddb_s8, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 3225 NEONMAP1(vqaddb_u8, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 3226 NEONMAP1(vqaddd_s64, aarch64_neon_sqadd, Add1ArgType), 3227 NEONMAP1(vqaddd_u64, aarch64_neon_uqadd, Add1ArgType), 3228 NEONMAP1(vqaddh_s16, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 3229 NEONMAP1(vqaddh_u16, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 3230 NEONMAP1(vqadds_s32, aarch64_neon_sqadd, Add1ArgType), 3231 NEONMAP1(vqadds_u32, aarch64_neon_uqadd, Add1ArgType), 3232 NEONMAP1(vqdmulhh_s16, aarch64_neon_sqdmulh, Vectorize1ArgType | Use64BitVectors), 3233 NEONMAP1(vqdmulhs_s32, aarch64_neon_sqdmulh, Add1ArgType), 3234 NEONMAP1(vqdmullh_s16, aarch64_neon_sqdmull, VectorRet | Use128BitVectors), 3235 NEONMAP1(vqdmulls_s32, aarch64_neon_sqdmulls_scalar, 0), 3236 NEONMAP1(vqmovnd_s64, aarch64_neon_scalar_sqxtn, AddRetType | Add1ArgType), 3237 NEONMAP1(vqmovnd_u64, aarch64_neon_scalar_uqxtn, AddRetType | Add1ArgType), 3238 NEONMAP1(vqmovnh_s16, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 3239 NEONMAP1(vqmovnh_u16, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 3240 NEONMAP1(vqmovns_s32, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 3241 NEONMAP1(vqmovns_u32, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 3242 NEONMAP1(vqmovund_s64, aarch64_neon_scalar_sqxtun, AddRetType | Add1ArgType), 3243 NEONMAP1(vqmovunh_s16, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 3244 NEONMAP1(vqmovuns_s32, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 3245 NEONMAP1(vqnegb_s8, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 3246 NEONMAP1(vqnegd_s64, aarch64_neon_sqneg, Add1ArgType), 3247 NEONMAP1(vqnegh_s16, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 3248 NEONMAP1(vqnegs_s32, aarch64_neon_sqneg, Add1ArgType), 3249 NEONMAP1(vqrdmulhh_s16, aarch64_neon_sqrdmulh, Vectorize1ArgType | Use64BitVectors), 3250 NEONMAP1(vqrdmulhs_s32, aarch64_neon_sqrdmulh, Add1ArgType), 3251 NEONMAP1(vqrshlb_s8, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 3252 NEONMAP1(vqrshlb_u8, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 3253 NEONMAP1(vqrshld_s64, aarch64_neon_sqrshl, Add1ArgType), 3254 NEONMAP1(vqrshld_u64, aarch64_neon_uqrshl, Add1ArgType), 3255 NEONMAP1(vqrshlh_s16, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 3256 NEONMAP1(vqrshlh_u16, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 3257 NEONMAP1(vqrshls_s32, aarch64_neon_sqrshl, Add1ArgType), 3258 NEONMAP1(vqrshls_u32, aarch64_neon_uqrshl, Add1ArgType), 3259 NEONMAP1(vqrshrnd_n_s64, aarch64_neon_sqrshrn, AddRetType), 3260 NEONMAP1(vqrshrnd_n_u64, aarch64_neon_uqrshrn, AddRetType), 3261 NEONMAP1(vqrshrnh_n_s16, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 3262 NEONMAP1(vqrshrnh_n_u16, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 3263 NEONMAP1(vqrshrns_n_s32, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 3264 NEONMAP1(vqrshrns_n_u32, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 3265 NEONMAP1(vqrshrund_n_s64, aarch64_neon_sqrshrun, AddRetType), 3266 NEONMAP1(vqrshrunh_n_s16, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 3267 NEONMAP1(vqrshruns_n_s32, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 3268 NEONMAP1(vqshlb_n_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3269 NEONMAP1(vqshlb_n_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3270 NEONMAP1(vqshlb_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3271 NEONMAP1(vqshlb_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3272 NEONMAP1(vqshld_s64, aarch64_neon_sqshl, Add1ArgType), 3273 NEONMAP1(vqshld_u64, aarch64_neon_uqshl, Add1ArgType), 3274 NEONMAP1(vqshlh_n_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3275 NEONMAP1(vqshlh_n_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3276 NEONMAP1(vqshlh_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3277 NEONMAP1(vqshlh_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3278 NEONMAP1(vqshls_n_s32, aarch64_neon_sqshl, Add1ArgType), 3279 NEONMAP1(vqshls_n_u32, aarch64_neon_uqshl, Add1ArgType), 3280 NEONMAP1(vqshls_s32, aarch64_neon_sqshl, Add1ArgType), 3281 NEONMAP1(vqshls_u32, aarch64_neon_uqshl, Add1ArgType), 3282 NEONMAP1(vqshlub_n_s8, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 3283 NEONMAP1(vqshluh_n_s16, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 3284 NEONMAP1(vqshlus_n_s32, aarch64_neon_sqshlu, Add1ArgType), 3285 NEONMAP1(vqshrnd_n_s64, aarch64_neon_sqshrn, AddRetType), 3286 NEONMAP1(vqshrnd_n_u64, aarch64_neon_uqshrn, AddRetType), 3287 NEONMAP1(vqshrnh_n_s16, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 3288 NEONMAP1(vqshrnh_n_u16, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 3289 NEONMAP1(vqshrns_n_s32, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 3290 NEONMAP1(vqshrns_n_u32, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 3291 NEONMAP1(vqshrund_n_s64, aarch64_neon_sqshrun, AddRetType), 3292 NEONMAP1(vqshrunh_n_s16, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 3293 NEONMAP1(vqshruns_n_s32, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 3294 NEONMAP1(vqsubb_s8, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 3295 NEONMAP1(vqsubb_u8, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 3296 NEONMAP1(vqsubd_s64, aarch64_neon_sqsub, Add1ArgType), 3297 NEONMAP1(vqsubd_u64, aarch64_neon_uqsub, Add1ArgType), 3298 NEONMAP1(vqsubh_s16, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 3299 NEONMAP1(vqsubh_u16, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 3300 NEONMAP1(vqsubs_s32, aarch64_neon_sqsub, Add1ArgType), 3301 NEONMAP1(vqsubs_u32, aarch64_neon_uqsub, Add1ArgType), 3302 NEONMAP1(vrecped_f64, aarch64_neon_frecpe, Add1ArgType), 3303 NEONMAP1(vrecpes_f32, aarch64_neon_frecpe, Add1ArgType), 3304 NEONMAP1(vrecpxd_f64, aarch64_neon_frecpx, Add1ArgType), 3305 NEONMAP1(vrecpxs_f32, aarch64_neon_frecpx, Add1ArgType), 3306 NEONMAP1(vrshld_s64, aarch64_neon_srshl, Add1ArgType), 3307 NEONMAP1(vrshld_u64, aarch64_neon_urshl, Add1ArgType), 3308 NEONMAP1(vrsqrted_f64, aarch64_neon_frsqrte, Add1ArgType), 3309 NEONMAP1(vrsqrtes_f32, aarch64_neon_frsqrte, Add1ArgType), 3310 NEONMAP1(vrsqrtsd_f64, aarch64_neon_frsqrts, Add1ArgType), 3311 NEONMAP1(vrsqrtss_f32, aarch64_neon_frsqrts, Add1ArgType), 3312 NEONMAP1(vsha1cq_u32, aarch64_crypto_sha1c, 0), 3313 NEONMAP1(vsha1h_u32, aarch64_crypto_sha1h, 0), 3314 NEONMAP1(vsha1mq_u32, aarch64_crypto_sha1m, 0), 3315 NEONMAP1(vsha1pq_u32, aarch64_crypto_sha1p, 0), 3316 NEONMAP1(vshld_s64, aarch64_neon_sshl, Add1ArgType), 3317 NEONMAP1(vshld_u64, aarch64_neon_ushl, Add1ArgType), 3318 NEONMAP1(vslid_n_s64, aarch64_neon_vsli, Vectorize1ArgType), 3319 NEONMAP1(vslid_n_u64, aarch64_neon_vsli, Vectorize1ArgType), 3320 NEONMAP1(vsqaddb_u8, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 3321 NEONMAP1(vsqaddd_u64, aarch64_neon_usqadd, Add1ArgType), 3322 NEONMAP1(vsqaddh_u16, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 3323 NEONMAP1(vsqadds_u32, aarch64_neon_usqadd, Add1ArgType), 3324 NEONMAP1(vsrid_n_s64, aarch64_neon_vsri, Vectorize1ArgType), 3325 NEONMAP1(vsrid_n_u64, aarch64_neon_vsri, Vectorize1ArgType), 3326 NEONMAP1(vuqaddb_s8, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 3327 NEONMAP1(vuqaddd_s64, aarch64_neon_suqadd, Add1ArgType), 3328 NEONMAP1(vuqaddh_s16, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 3329 NEONMAP1(vuqadds_s32, aarch64_neon_suqadd, Add1ArgType), 3330 }; 3331 3332 #undef NEONMAP0 3333 #undef NEONMAP1 3334 #undef NEONMAP2 3335 3336 static bool NEONSIMDIntrinsicsProvenSorted = false; 3337 3338 static bool AArch64SIMDIntrinsicsProvenSorted = false; 3339 static bool AArch64SISDIntrinsicsProvenSorted = false; 3340 3341 3342 static const NeonIntrinsicInfo * 3343 findNeonIntrinsicInMap(ArrayRef<NeonIntrinsicInfo> IntrinsicMap, 3344 unsigned BuiltinID, bool &MapProvenSorted) { 3345 3346 #ifndef NDEBUG 3347 if (!MapProvenSorted) { 3348 assert(std::is_sorted(std::begin(IntrinsicMap), std::end(IntrinsicMap))); 3349 MapProvenSorted = true; 3350 } 3351 #endif 3352 3353 const NeonIntrinsicInfo *Builtin = 3354 std::lower_bound(IntrinsicMap.begin(), IntrinsicMap.end(), BuiltinID); 3355 3356 if (Builtin != IntrinsicMap.end() && Builtin->BuiltinID == BuiltinID) 3357 return Builtin; 3358 3359 return nullptr; 3360 } 3361 3362 Function *CodeGenFunction::LookupNeonLLVMIntrinsic(unsigned IntrinsicID, 3363 unsigned Modifier, 3364 llvm::Type *ArgType, 3365 const CallExpr *E) { 3366 int VectorSize = 0; 3367 if (Modifier & Use64BitVectors) 3368 VectorSize = 64; 3369 else if (Modifier & Use128BitVectors) 3370 VectorSize = 128; 3371 3372 // Return type. 3373 SmallVector<llvm::Type *, 3> Tys; 3374 if (Modifier & AddRetType) { 3375 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 3376 if (Modifier & VectorizeRetType) 3377 Ty = llvm::VectorType::get( 3378 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); 3379 3380 Tys.push_back(Ty); 3381 } 3382 3383 // Arguments. 3384 if (Modifier & VectorizeArgTypes) { 3385 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; 3386 ArgType = llvm::VectorType::get(ArgType, Elts); 3387 } 3388 3389 if (Modifier & (Add1ArgType | Add2ArgTypes)) 3390 Tys.push_back(ArgType); 3391 3392 if (Modifier & Add2ArgTypes) 3393 Tys.push_back(ArgType); 3394 3395 if (Modifier & InventFloatType) 3396 Tys.push_back(FloatTy); 3397 3398 return CGM.getIntrinsic(IntrinsicID, Tys); 3399 } 3400 3401 static Value *EmitCommonNeonSISDBuiltinExpr(CodeGenFunction &CGF, 3402 const NeonIntrinsicInfo &SISDInfo, 3403 SmallVectorImpl<Value *> &Ops, 3404 const CallExpr *E) { 3405 unsigned BuiltinID = SISDInfo.BuiltinID; 3406 unsigned int Int = SISDInfo.LLVMIntrinsic; 3407 unsigned Modifier = SISDInfo.TypeModifier; 3408 const char *s = SISDInfo.NameHint; 3409 3410 switch (BuiltinID) { 3411 case NEON::BI__builtin_neon_vcled_s64: 3412 case NEON::BI__builtin_neon_vcled_u64: 3413 case NEON::BI__builtin_neon_vcles_f32: 3414 case NEON::BI__builtin_neon_vcled_f64: 3415 case NEON::BI__builtin_neon_vcltd_s64: 3416 case NEON::BI__builtin_neon_vcltd_u64: 3417 case NEON::BI__builtin_neon_vclts_f32: 3418 case NEON::BI__builtin_neon_vcltd_f64: 3419 case NEON::BI__builtin_neon_vcales_f32: 3420 case NEON::BI__builtin_neon_vcaled_f64: 3421 case NEON::BI__builtin_neon_vcalts_f32: 3422 case NEON::BI__builtin_neon_vcaltd_f64: 3423 // Only one direction of comparisons actually exist, cmle is actually a cmge 3424 // with swapped operands. The table gives us the right intrinsic but we 3425 // still need to do the swap. 3426 std::swap(Ops[0], Ops[1]); 3427 break; 3428 } 3429 3430 assert(Int && "Generic code assumes a valid intrinsic"); 3431 3432 // Determine the type(s) of this overloaded AArch64 intrinsic. 3433 const Expr *Arg = E->getArg(0); 3434 llvm::Type *ArgTy = CGF.ConvertType(Arg->getType()); 3435 Function *F = CGF.LookupNeonLLVMIntrinsic(Int, Modifier, ArgTy, E); 3436 3437 int j = 0; 3438 ConstantInt *C0 = ConstantInt::get(CGF.SizeTy, 0); 3439 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 3440 ai != ae; ++ai, ++j) { 3441 llvm::Type *ArgTy = ai->getType(); 3442 if (Ops[j]->getType()->getPrimitiveSizeInBits() == 3443 ArgTy->getPrimitiveSizeInBits()) 3444 continue; 3445 3446 assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy()); 3447 // The constant argument to an _n_ intrinsic always has Int32Ty, so truncate 3448 // it before inserting. 3449 Ops[j] = 3450 CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType()); 3451 Ops[j] = 3452 CGF.Builder.CreateInsertElement(UndefValue::get(ArgTy), Ops[j], C0); 3453 } 3454 3455 Value *Result = CGF.EmitNeonCall(F, Ops, s); 3456 llvm::Type *ResultType = CGF.ConvertType(E->getType()); 3457 if (ResultType->getPrimitiveSizeInBits() < 3458 Result->getType()->getPrimitiveSizeInBits()) 3459 return CGF.Builder.CreateExtractElement(Result, C0); 3460 3461 return CGF.Builder.CreateBitCast(Result, ResultType, s); 3462 } 3463 3464 Value *CodeGenFunction::EmitCommonNeonBuiltinExpr( 3465 unsigned BuiltinID, unsigned LLVMIntrinsic, unsigned AltLLVMIntrinsic, 3466 const char *NameHint, unsigned Modifier, const CallExpr *E, 3467 SmallVectorImpl<llvm::Value *> &Ops, Address PtrOp0, Address PtrOp1) { 3468 // Get the last argument, which specifies the vector type. 3469 llvm::APSInt NeonTypeConst; 3470 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 3471 if (!Arg->isIntegerConstantExpr(NeonTypeConst, getContext())) 3472 return nullptr; 3473 3474 // Determine the type of this overloaded NEON intrinsic. 3475 NeonTypeFlags Type(NeonTypeConst.getZExtValue()); 3476 bool Usgn = Type.isUnsigned(); 3477 bool Quad = Type.isQuad(); 3478 3479 llvm::VectorType *VTy = GetNeonType(this, Type); 3480 llvm::Type *Ty = VTy; 3481 if (!Ty) 3482 return nullptr; 3483 3484 auto getAlignmentValue32 = [&](Address addr) -> Value* { 3485 return Builder.getInt32(addr.getAlignment().getQuantity()); 3486 }; 3487 3488 unsigned Int = LLVMIntrinsic; 3489 if ((Modifier & UnsignedAlts) && !Usgn) 3490 Int = AltLLVMIntrinsic; 3491 3492 switch (BuiltinID) { 3493 default: break; 3494 case NEON::BI__builtin_neon_vabs_v: 3495 case NEON::BI__builtin_neon_vabsq_v: 3496 if (VTy->getElementType()->isFloatingPointTy()) 3497 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, Ty), Ops, "vabs"); 3498 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), Ops, "vabs"); 3499 case NEON::BI__builtin_neon_vaddhn_v: { 3500 llvm::VectorType *SrcTy = 3501 llvm::VectorType::getExtendedElementVectorType(VTy); 3502 3503 // %sum = add <4 x i32> %lhs, %rhs 3504 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3505 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 3506 Ops[0] = Builder.CreateAdd(Ops[0], Ops[1], "vaddhn"); 3507 3508 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 3509 Constant *ShiftAmt = 3510 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 3511 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vaddhn"); 3512 3513 // %res = trunc <4 x i32> %high to <4 x i16> 3514 return Builder.CreateTrunc(Ops[0], VTy, "vaddhn"); 3515 } 3516 case NEON::BI__builtin_neon_vcale_v: 3517 case NEON::BI__builtin_neon_vcaleq_v: 3518 case NEON::BI__builtin_neon_vcalt_v: 3519 case NEON::BI__builtin_neon_vcaltq_v: 3520 std::swap(Ops[0], Ops[1]); 3521 case NEON::BI__builtin_neon_vcage_v: 3522 case NEON::BI__builtin_neon_vcageq_v: 3523 case NEON::BI__builtin_neon_vcagt_v: 3524 case NEON::BI__builtin_neon_vcagtq_v: { 3525 llvm::Type *VecFlt = llvm::VectorType::get( 3526 VTy->getScalarSizeInBits() == 32 ? FloatTy : DoubleTy, 3527 VTy->getNumElements()); 3528 llvm::Type *Tys[] = { VTy, VecFlt }; 3529 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3530 return EmitNeonCall(F, Ops, NameHint); 3531 } 3532 case NEON::BI__builtin_neon_vclz_v: 3533 case NEON::BI__builtin_neon_vclzq_v: 3534 // We generate target-independent intrinsic, which needs a second argument 3535 // for whether or not clz of zero is undefined; on ARM it isn't. 3536 Ops.push_back(Builder.getInt1(getTarget().isCLZForZeroUndef())); 3537 break; 3538 case NEON::BI__builtin_neon_vcvt_f32_v: 3539 case NEON::BI__builtin_neon_vcvtq_f32_v: 3540 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3541 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, Quad)); 3542 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 3543 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 3544 case NEON::BI__builtin_neon_vcvt_n_f32_v: 3545 case NEON::BI__builtin_neon_vcvt_n_f64_v: 3546 case NEON::BI__builtin_neon_vcvtq_n_f32_v: 3547 case NEON::BI__builtin_neon_vcvtq_n_f64_v: { 3548 llvm::Type *Tys[2] = { GetFloatNeonType(this, Type), Ty }; 3549 Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic; 3550 Function *F = CGM.getIntrinsic(Int, Tys); 3551 return EmitNeonCall(F, Ops, "vcvt_n"); 3552 } 3553 case NEON::BI__builtin_neon_vcvt_n_s32_v: 3554 case NEON::BI__builtin_neon_vcvt_n_u32_v: 3555 case NEON::BI__builtin_neon_vcvt_n_s64_v: 3556 case NEON::BI__builtin_neon_vcvt_n_u64_v: 3557 case NEON::BI__builtin_neon_vcvtq_n_s32_v: 3558 case NEON::BI__builtin_neon_vcvtq_n_u32_v: 3559 case NEON::BI__builtin_neon_vcvtq_n_s64_v: 3560 case NEON::BI__builtin_neon_vcvtq_n_u64_v: { 3561 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 3562 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3563 return EmitNeonCall(F, Ops, "vcvt_n"); 3564 } 3565 case NEON::BI__builtin_neon_vcvt_s32_v: 3566 case NEON::BI__builtin_neon_vcvt_u32_v: 3567 case NEON::BI__builtin_neon_vcvt_s64_v: 3568 case NEON::BI__builtin_neon_vcvt_u64_v: 3569 case NEON::BI__builtin_neon_vcvtq_s32_v: 3570 case NEON::BI__builtin_neon_vcvtq_u32_v: 3571 case NEON::BI__builtin_neon_vcvtq_s64_v: 3572 case NEON::BI__builtin_neon_vcvtq_u64_v: { 3573 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 3574 return Usgn ? Builder.CreateFPToUI(Ops[0], Ty, "vcvt") 3575 : Builder.CreateFPToSI(Ops[0], Ty, "vcvt"); 3576 } 3577 case NEON::BI__builtin_neon_vcvta_s32_v: 3578 case NEON::BI__builtin_neon_vcvta_s64_v: 3579 case NEON::BI__builtin_neon_vcvta_u32_v: 3580 case NEON::BI__builtin_neon_vcvta_u64_v: 3581 case NEON::BI__builtin_neon_vcvtaq_s32_v: 3582 case NEON::BI__builtin_neon_vcvtaq_s64_v: 3583 case NEON::BI__builtin_neon_vcvtaq_u32_v: 3584 case NEON::BI__builtin_neon_vcvtaq_u64_v: 3585 case NEON::BI__builtin_neon_vcvtn_s32_v: 3586 case NEON::BI__builtin_neon_vcvtn_s64_v: 3587 case NEON::BI__builtin_neon_vcvtn_u32_v: 3588 case NEON::BI__builtin_neon_vcvtn_u64_v: 3589 case NEON::BI__builtin_neon_vcvtnq_s32_v: 3590 case NEON::BI__builtin_neon_vcvtnq_s64_v: 3591 case NEON::BI__builtin_neon_vcvtnq_u32_v: 3592 case NEON::BI__builtin_neon_vcvtnq_u64_v: 3593 case NEON::BI__builtin_neon_vcvtp_s32_v: 3594 case NEON::BI__builtin_neon_vcvtp_s64_v: 3595 case NEON::BI__builtin_neon_vcvtp_u32_v: 3596 case NEON::BI__builtin_neon_vcvtp_u64_v: 3597 case NEON::BI__builtin_neon_vcvtpq_s32_v: 3598 case NEON::BI__builtin_neon_vcvtpq_s64_v: 3599 case NEON::BI__builtin_neon_vcvtpq_u32_v: 3600 case NEON::BI__builtin_neon_vcvtpq_u64_v: 3601 case NEON::BI__builtin_neon_vcvtm_s32_v: 3602 case NEON::BI__builtin_neon_vcvtm_s64_v: 3603 case NEON::BI__builtin_neon_vcvtm_u32_v: 3604 case NEON::BI__builtin_neon_vcvtm_u64_v: 3605 case NEON::BI__builtin_neon_vcvtmq_s32_v: 3606 case NEON::BI__builtin_neon_vcvtmq_s64_v: 3607 case NEON::BI__builtin_neon_vcvtmq_u32_v: 3608 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 3609 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 3610 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, NameHint); 3611 } 3612 case NEON::BI__builtin_neon_vext_v: 3613 case NEON::BI__builtin_neon_vextq_v: { 3614 int CV = cast<ConstantInt>(Ops[2])->getSExtValue(); 3615 SmallVector<uint32_t, 16> Indices; 3616 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 3617 Indices.push_back(i+CV); 3618 3619 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3620 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3621 return Builder.CreateShuffleVector(Ops[0], Ops[1], Indices, "vext"); 3622 } 3623 case NEON::BI__builtin_neon_vfma_v: 3624 case NEON::BI__builtin_neon_vfmaq_v: { 3625 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 3626 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3627 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3628 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3629 3630 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 3631 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 3632 } 3633 case NEON::BI__builtin_neon_vld1_v: 3634 case NEON::BI__builtin_neon_vld1q_v: { 3635 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3636 Ops.push_back(getAlignmentValue32(PtrOp0)); 3637 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, "vld1"); 3638 } 3639 case NEON::BI__builtin_neon_vld2_v: 3640 case NEON::BI__builtin_neon_vld2q_v: 3641 case NEON::BI__builtin_neon_vld3_v: 3642 case NEON::BI__builtin_neon_vld3q_v: 3643 case NEON::BI__builtin_neon_vld4_v: 3644 case NEON::BI__builtin_neon_vld4q_v: { 3645 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3646 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3647 Value *Align = getAlignmentValue32(PtrOp1); 3648 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint); 3649 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3650 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3651 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3652 } 3653 case NEON::BI__builtin_neon_vld1_dup_v: 3654 case NEON::BI__builtin_neon_vld1q_dup_v: { 3655 Value *V = UndefValue::get(Ty); 3656 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 3657 PtrOp0 = Builder.CreateBitCast(PtrOp0, Ty); 3658 LoadInst *Ld = Builder.CreateLoad(PtrOp0); 3659 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 3660 Ops[0] = Builder.CreateInsertElement(V, Ld, CI); 3661 return EmitNeonSplat(Ops[0], CI); 3662 } 3663 case NEON::BI__builtin_neon_vld2_lane_v: 3664 case NEON::BI__builtin_neon_vld2q_lane_v: 3665 case NEON::BI__builtin_neon_vld3_lane_v: 3666 case NEON::BI__builtin_neon_vld3q_lane_v: 3667 case NEON::BI__builtin_neon_vld4_lane_v: 3668 case NEON::BI__builtin_neon_vld4q_lane_v: { 3669 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3670 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3671 for (unsigned I = 2; I < Ops.size() - 1; ++I) 3672 Ops[I] = Builder.CreateBitCast(Ops[I], Ty); 3673 Ops.push_back(getAlignmentValue32(PtrOp1)); 3674 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), NameHint); 3675 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3676 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3677 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3678 } 3679 case NEON::BI__builtin_neon_vmovl_v: { 3680 llvm::Type *DTy =llvm::VectorType::getTruncatedElementVectorType(VTy); 3681 Ops[0] = Builder.CreateBitCast(Ops[0], DTy); 3682 if (Usgn) 3683 return Builder.CreateZExt(Ops[0], Ty, "vmovl"); 3684 return Builder.CreateSExt(Ops[0], Ty, "vmovl"); 3685 } 3686 case NEON::BI__builtin_neon_vmovn_v: { 3687 llvm::Type *QTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3688 Ops[0] = Builder.CreateBitCast(Ops[0], QTy); 3689 return Builder.CreateTrunc(Ops[0], Ty, "vmovn"); 3690 } 3691 case NEON::BI__builtin_neon_vmull_v: 3692 // FIXME: the integer vmull operations could be emitted in terms of pure 3693 // LLVM IR (2 exts followed by a mul). Unfortunately LLVM has a habit of 3694 // hoisting the exts outside loops. Until global ISel comes along that can 3695 // see through such movement this leads to bad CodeGen. So we need an 3696 // intrinsic for now. 3697 Int = Usgn ? Intrinsic::arm_neon_vmullu : Intrinsic::arm_neon_vmulls; 3698 Int = Type.isPoly() ? (unsigned)Intrinsic::arm_neon_vmullp : Int; 3699 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 3700 case NEON::BI__builtin_neon_vpadal_v: 3701 case NEON::BI__builtin_neon_vpadalq_v: { 3702 // The source operand type has twice as many elements of half the size. 3703 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3704 llvm::Type *EltTy = 3705 llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3706 llvm::Type *NarrowTy = 3707 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3708 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3709 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, NameHint); 3710 } 3711 case NEON::BI__builtin_neon_vpaddl_v: 3712 case NEON::BI__builtin_neon_vpaddlq_v: { 3713 // The source operand type has twice as many elements of half the size. 3714 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3715 llvm::Type *EltTy = llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3716 llvm::Type *NarrowTy = 3717 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3718 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3719 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vpaddl"); 3720 } 3721 case NEON::BI__builtin_neon_vqdmlal_v: 3722 case NEON::BI__builtin_neon_vqdmlsl_v: { 3723 SmallVector<Value *, 2> MulOps(Ops.begin() + 1, Ops.end()); 3724 Ops[1] = 3725 EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), MulOps, "vqdmlal"); 3726 Ops.resize(2); 3727 return EmitNeonCall(CGM.getIntrinsic(AltLLVMIntrinsic, Ty), Ops, NameHint); 3728 } 3729 case NEON::BI__builtin_neon_vqshl_n_v: 3730 case NEON::BI__builtin_neon_vqshlq_n_v: 3731 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshl_n", 3732 1, false); 3733 case NEON::BI__builtin_neon_vqshlu_n_v: 3734 case NEON::BI__builtin_neon_vqshluq_n_v: 3735 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshlu_n", 3736 1, false); 3737 case NEON::BI__builtin_neon_vrecpe_v: 3738 case NEON::BI__builtin_neon_vrecpeq_v: 3739 case NEON::BI__builtin_neon_vrsqrte_v: 3740 case NEON::BI__builtin_neon_vrsqrteq_v: 3741 Int = Ty->isFPOrFPVectorTy() ? LLVMIntrinsic : AltLLVMIntrinsic; 3742 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint); 3743 3744 case NEON::BI__builtin_neon_vrshr_n_v: 3745 case NEON::BI__builtin_neon_vrshrq_n_v: 3746 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n", 3747 1, true); 3748 case NEON::BI__builtin_neon_vshl_n_v: 3749 case NEON::BI__builtin_neon_vshlq_n_v: 3750 Ops[1] = EmitNeonShiftVector(Ops[1], Ty, false); 3751 return Builder.CreateShl(Builder.CreateBitCast(Ops[0],Ty), Ops[1], 3752 "vshl_n"); 3753 case NEON::BI__builtin_neon_vshll_n_v: { 3754 llvm::Type *SrcTy = llvm::VectorType::getTruncatedElementVectorType(VTy); 3755 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3756 if (Usgn) 3757 Ops[0] = Builder.CreateZExt(Ops[0], VTy); 3758 else 3759 Ops[0] = Builder.CreateSExt(Ops[0], VTy); 3760 Ops[1] = EmitNeonShiftVector(Ops[1], VTy, false); 3761 return Builder.CreateShl(Ops[0], Ops[1], "vshll_n"); 3762 } 3763 case NEON::BI__builtin_neon_vshrn_n_v: { 3764 llvm::Type *SrcTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3765 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3766 Ops[1] = EmitNeonShiftVector(Ops[1], SrcTy, false); 3767 if (Usgn) 3768 Ops[0] = Builder.CreateLShr(Ops[0], Ops[1]); 3769 else 3770 Ops[0] = Builder.CreateAShr(Ops[0], Ops[1]); 3771 return Builder.CreateTrunc(Ops[0], Ty, "vshrn_n"); 3772 } 3773 case NEON::BI__builtin_neon_vshr_n_v: 3774 case NEON::BI__builtin_neon_vshrq_n_v: 3775 return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, Usgn, "vshr_n"); 3776 case NEON::BI__builtin_neon_vst1_v: 3777 case NEON::BI__builtin_neon_vst1q_v: 3778 case NEON::BI__builtin_neon_vst2_v: 3779 case NEON::BI__builtin_neon_vst2q_v: 3780 case NEON::BI__builtin_neon_vst3_v: 3781 case NEON::BI__builtin_neon_vst3q_v: 3782 case NEON::BI__builtin_neon_vst4_v: 3783 case NEON::BI__builtin_neon_vst4q_v: 3784 case NEON::BI__builtin_neon_vst2_lane_v: 3785 case NEON::BI__builtin_neon_vst2q_lane_v: 3786 case NEON::BI__builtin_neon_vst3_lane_v: 3787 case NEON::BI__builtin_neon_vst3q_lane_v: 3788 case NEON::BI__builtin_neon_vst4_lane_v: 3789 case NEON::BI__builtin_neon_vst4q_lane_v: { 3790 llvm::Type *Tys[] = {Int8PtrTy, Ty}; 3791 Ops.push_back(getAlignmentValue32(PtrOp0)); 3792 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 3793 } 3794 case NEON::BI__builtin_neon_vsubhn_v: { 3795 llvm::VectorType *SrcTy = 3796 llvm::VectorType::getExtendedElementVectorType(VTy); 3797 3798 // %sum = add <4 x i32> %lhs, %rhs 3799 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3800 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 3801 Ops[0] = Builder.CreateSub(Ops[0], Ops[1], "vsubhn"); 3802 3803 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 3804 Constant *ShiftAmt = 3805 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 3806 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vsubhn"); 3807 3808 // %res = trunc <4 x i32> %high to <4 x i16> 3809 return Builder.CreateTrunc(Ops[0], VTy, "vsubhn"); 3810 } 3811 case NEON::BI__builtin_neon_vtrn_v: 3812 case NEON::BI__builtin_neon_vtrnq_v: { 3813 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3814 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3815 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3816 Value *SV = nullptr; 3817 3818 for (unsigned vi = 0; vi != 2; ++vi) { 3819 SmallVector<uint32_t, 16> Indices; 3820 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 3821 Indices.push_back(i+vi); 3822 Indices.push_back(i+e+vi); 3823 } 3824 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3825 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 3826 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3827 } 3828 return SV; 3829 } 3830 case NEON::BI__builtin_neon_vtst_v: 3831 case NEON::BI__builtin_neon_vtstq_v: { 3832 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3833 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3834 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 3835 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 3836 ConstantAggregateZero::get(Ty)); 3837 return Builder.CreateSExt(Ops[0], Ty, "vtst"); 3838 } 3839 case NEON::BI__builtin_neon_vuzp_v: 3840 case NEON::BI__builtin_neon_vuzpq_v: { 3841 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3842 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3843 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3844 Value *SV = nullptr; 3845 3846 for (unsigned vi = 0; vi != 2; ++vi) { 3847 SmallVector<uint32_t, 16> Indices; 3848 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 3849 Indices.push_back(2*i+vi); 3850 3851 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3852 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 3853 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3854 } 3855 return SV; 3856 } 3857 case NEON::BI__builtin_neon_vzip_v: 3858 case NEON::BI__builtin_neon_vzipq_v: { 3859 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3860 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3861 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3862 Value *SV = nullptr; 3863 3864 for (unsigned vi = 0; vi != 2; ++vi) { 3865 SmallVector<uint32_t, 16> Indices; 3866 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 3867 Indices.push_back((i + vi*e) >> 1); 3868 Indices.push_back(((i + vi*e) >> 1)+e); 3869 } 3870 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3871 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 3872 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3873 } 3874 return SV; 3875 } 3876 } 3877 3878 assert(Int && "Expected valid intrinsic number"); 3879 3880 // Determine the type(s) of this overloaded AArch64 intrinsic. 3881 Function *F = LookupNeonLLVMIntrinsic(Int, Modifier, Ty, E); 3882 3883 Value *Result = EmitNeonCall(F, Ops, NameHint); 3884 llvm::Type *ResultType = ConvertType(E->getType()); 3885 // AArch64 intrinsic one-element vector type cast to 3886 // scalar type expected by the builtin 3887 return Builder.CreateBitCast(Result, ResultType, NameHint); 3888 } 3889 3890 Value *CodeGenFunction::EmitAArch64CompareBuiltinExpr( 3891 Value *Op, llvm::Type *Ty, const CmpInst::Predicate Fp, 3892 const CmpInst::Predicate Ip, const Twine &Name) { 3893 llvm::Type *OTy = Op->getType(); 3894 3895 // FIXME: this is utterly horrific. We should not be looking at previous 3896 // codegen context to find out what needs doing. Unfortunately TableGen 3897 // currently gives us exactly the same calls for vceqz_f32 and vceqz_s32 3898 // (etc). 3899 if (BitCastInst *BI = dyn_cast<BitCastInst>(Op)) 3900 OTy = BI->getOperand(0)->getType(); 3901 3902 Op = Builder.CreateBitCast(Op, OTy); 3903 if (OTy->getScalarType()->isFloatingPointTy()) { 3904 Op = Builder.CreateFCmp(Fp, Op, Constant::getNullValue(OTy)); 3905 } else { 3906 Op = Builder.CreateICmp(Ip, Op, Constant::getNullValue(OTy)); 3907 } 3908 return Builder.CreateSExt(Op, Ty, Name); 3909 } 3910 3911 static Value *packTBLDVectorList(CodeGenFunction &CGF, ArrayRef<Value *> Ops, 3912 Value *ExtOp, Value *IndexOp, 3913 llvm::Type *ResTy, unsigned IntID, 3914 const char *Name) { 3915 SmallVector<Value *, 2> TblOps; 3916 if (ExtOp) 3917 TblOps.push_back(ExtOp); 3918 3919 // Build a vector containing sequential number like (0, 1, 2, ..., 15) 3920 SmallVector<uint32_t, 16> Indices; 3921 llvm::VectorType *TblTy = cast<llvm::VectorType>(Ops[0]->getType()); 3922 for (unsigned i = 0, e = TblTy->getNumElements(); i != e; ++i) { 3923 Indices.push_back(2*i); 3924 Indices.push_back(2*i+1); 3925 } 3926 3927 int PairPos = 0, End = Ops.size() - 1; 3928 while (PairPos < End) { 3929 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 3930 Ops[PairPos+1], Indices, 3931 Name)); 3932 PairPos += 2; 3933 } 3934 3935 // If there's an odd number of 64-bit lookup table, fill the high 64-bit 3936 // of the 128-bit lookup table with zero. 3937 if (PairPos == End) { 3938 Value *ZeroTbl = ConstantAggregateZero::get(TblTy); 3939 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 3940 ZeroTbl, Indices, Name)); 3941 } 3942 3943 Function *TblF; 3944 TblOps.push_back(IndexOp); 3945 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); 3946 3947 return CGF.EmitNeonCall(TblF, TblOps, Name); 3948 } 3949 3950 Value *CodeGenFunction::GetValueForARMHint(unsigned BuiltinID) { 3951 unsigned Value; 3952 switch (BuiltinID) { 3953 default: 3954 return nullptr; 3955 case ARM::BI__builtin_arm_nop: 3956 Value = 0; 3957 break; 3958 case ARM::BI__builtin_arm_yield: 3959 case ARM::BI__yield: 3960 Value = 1; 3961 break; 3962 case ARM::BI__builtin_arm_wfe: 3963 case ARM::BI__wfe: 3964 Value = 2; 3965 break; 3966 case ARM::BI__builtin_arm_wfi: 3967 case ARM::BI__wfi: 3968 Value = 3; 3969 break; 3970 case ARM::BI__builtin_arm_sev: 3971 case ARM::BI__sev: 3972 Value = 4; 3973 break; 3974 case ARM::BI__builtin_arm_sevl: 3975 case ARM::BI__sevl: 3976 Value = 5; 3977 break; 3978 } 3979 3980 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_hint), 3981 llvm::ConstantInt::get(Int32Ty, Value)); 3982 } 3983 3984 // Generates the IR for the read/write special register builtin, 3985 // ValueType is the type of the value that is to be written or read, 3986 // RegisterType is the type of the register being written to or read from. 3987 static Value *EmitSpecialRegisterBuiltin(CodeGenFunction &CGF, 3988 const CallExpr *E, 3989 llvm::Type *RegisterType, 3990 llvm::Type *ValueType, 3991 bool IsRead, 3992 StringRef SysReg = "") { 3993 // write and register intrinsics only support 32 and 64 bit operations. 3994 assert((RegisterType->isIntegerTy(32) || RegisterType->isIntegerTy(64)) 3995 && "Unsupported size for register."); 3996 3997 CodeGen::CGBuilderTy &Builder = CGF.Builder; 3998 CodeGen::CodeGenModule &CGM = CGF.CGM; 3999 LLVMContext &Context = CGM.getLLVMContext(); 4000 4001 if (SysReg.empty()) { 4002 const Expr *SysRegStrExpr = E->getArg(0)->IgnoreParenCasts(); 4003 SysReg = cast<StringLiteral>(SysRegStrExpr)->getString(); 4004 } 4005 4006 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysReg) }; 4007 llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); 4008 llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); 4009 4010 llvm::Type *Types[] = { RegisterType }; 4011 4012 bool MixedTypes = RegisterType->isIntegerTy(64) && ValueType->isIntegerTy(32); 4013 assert(!(RegisterType->isIntegerTy(32) && ValueType->isIntegerTy(64)) 4014 && "Can't fit 64-bit value in 32-bit register"); 4015 4016 if (IsRead) { 4017 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::read_register, Types); 4018 llvm::Value *Call = Builder.CreateCall(F, Metadata); 4019 4020 if (MixedTypes) 4021 // Read into 64 bit register and then truncate result to 32 bit. 4022 return Builder.CreateTrunc(Call, ValueType); 4023 4024 if (ValueType->isPointerTy()) 4025 // Have i32/i64 result (Call) but want to return a VoidPtrTy (i8*). 4026 return Builder.CreateIntToPtr(Call, ValueType); 4027 4028 return Call; 4029 } 4030 4031 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types); 4032 llvm::Value *ArgValue = CGF.EmitScalarExpr(E->getArg(1)); 4033 if (MixedTypes) { 4034 // Extend 32 bit write value to 64 bit to pass to write. 4035 ArgValue = Builder.CreateZExt(ArgValue, RegisterType); 4036 return Builder.CreateCall(F, { Metadata, ArgValue }); 4037 } 4038 4039 if (ValueType->isPointerTy()) { 4040 // Have VoidPtrTy ArgValue but want to return an i32/i64. 4041 ArgValue = Builder.CreatePtrToInt(ArgValue, RegisterType); 4042 return Builder.CreateCall(F, { Metadata, ArgValue }); 4043 } 4044 4045 return Builder.CreateCall(F, { Metadata, ArgValue }); 4046 } 4047 4048 /// Return true if BuiltinID is an overloaded Neon intrinsic with an extra 4049 /// argument that specifies the vector type. 4050 static bool HasExtraNeonArgument(unsigned BuiltinID) { 4051 switch (BuiltinID) { 4052 default: break; 4053 case NEON::BI__builtin_neon_vget_lane_i8: 4054 case NEON::BI__builtin_neon_vget_lane_i16: 4055 case NEON::BI__builtin_neon_vget_lane_i32: 4056 case NEON::BI__builtin_neon_vget_lane_i64: 4057 case NEON::BI__builtin_neon_vget_lane_f32: 4058 case NEON::BI__builtin_neon_vgetq_lane_i8: 4059 case NEON::BI__builtin_neon_vgetq_lane_i16: 4060 case NEON::BI__builtin_neon_vgetq_lane_i32: 4061 case NEON::BI__builtin_neon_vgetq_lane_i64: 4062 case NEON::BI__builtin_neon_vgetq_lane_f32: 4063 case NEON::BI__builtin_neon_vset_lane_i8: 4064 case NEON::BI__builtin_neon_vset_lane_i16: 4065 case NEON::BI__builtin_neon_vset_lane_i32: 4066 case NEON::BI__builtin_neon_vset_lane_i64: 4067 case NEON::BI__builtin_neon_vset_lane_f32: 4068 case NEON::BI__builtin_neon_vsetq_lane_i8: 4069 case NEON::BI__builtin_neon_vsetq_lane_i16: 4070 case NEON::BI__builtin_neon_vsetq_lane_i32: 4071 case NEON::BI__builtin_neon_vsetq_lane_i64: 4072 case NEON::BI__builtin_neon_vsetq_lane_f32: 4073 case NEON::BI__builtin_neon_vsha1h_u32: 4074 case NEON::BI__builtin_neon_vsha1cq_u32: 4075 case NEON::BI__builtin_neon_vsha1pq_u32: 4076 case NEON::BI__builtin_neon_vsha1mq_u32: 4077 case ARM::BI_MoveToCoprocessor: 4078 case ARM::BI_MoveToCoprocessor2: 4079 return false; 4080 } 4081 return true; 4082 } 4083 4084 Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, 4085 const CallExpr *E) { 4086 if (auto Hint = GetValueForARMHint(BuiltinID)) 4087 return Hint; 4088 4089 if (BuiltinID == ARM::BI__emit) { 4090 bool IsThumb = getTarget().getTriple().getArch() == llvm::Triple::thumb; 4091 llvm::FunctionType *FTy = 4092 llvm::FunctionType::get(VoidTy, /*Variadic=*/false); 4093 4094 APSInt Value; 4095 if (!E->getArg(0)->EvaluateAsInt(Value, CGM.getContext())) 4096 llvm_unreachable("Sema will ensure that the parameter is constant"); 4097 4098 uint64_t ZExtValue = Value.zextOrTrunc(IsThumb ? 16 : 32).getZExtValue(); 4099 4100 llvm::InlineAsm *Emit = 4101 IsThumb ? InlineAsm::get(FTy, ".inst.n 0x" + utohexstr(ZExtValue), "", 4102 /*SideEffects=*/true) 4103 : InlineAsm::get(FTy, ".inst 0x" + utohexstr(ZExtValue), "", 4104 /*SideEffects=*/true); 4105 4106 return Builder.CreateCall(Emit); 4107 } 4108 4109 if (BuiltinID == ARM::BI__builtin_arm_dbg) { 4110 Value *Option = EmitScalarExpr(E->getArg(0)); 4111 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_dbg), Option); 4112 } 4113 4114 if (BuiltinID == ARM::BI__builtin_arm_prefetch) { 4115 Value *Address = EmitScalarExpr(E->getArg(0)); 4116 Value *RW = EmitScalarExpr(E->getArg(1)); 4117 Value *IsData = EmitScalarExpr(E->getArg(2)); 4118 4119 // Locality is not supported on ARM target 4120 Value *Locality = llvm::ConstantInt::get(Int32Ty, 3); 4121 4122 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 4123 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 4124 } 4125 4126 if (BuiltinID == ARM::BI__builtin_arm_rbit) { 4127 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_rbit), 4128 EmitScalarExpr(E->getArg(0)), 4129 "rbit"); 4130 } 4131 4132 if (BuiltinID == ARM::BI__clear_cache) { 4133 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 4134 const FunctionDecl *FD = E->getDirectCallee(); 4135 Value *Ops[2]; 4136 for (unsigned i = 0; i < 2; i++) 4137 Ops[i] = EmitScalarExpr(E->getArg(i)); 4138 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 4139 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 4140 StringRef Name = FD->getName(); 4141 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 4142 } 4143 4144 if (BuiltinID == ARM::BI__builtin_arm_mcrr || 4145 BuiltinID == ARM::BI__builtin_arm_mcrr2) { 4146 Function *F; 4147 4148 switch (BuiltinID) { 4149 default: llvm_unreachable("unexpected builtin"); 4150 case ARM::BI__builtin_arm_mcrr: 4151 F = CGM.getIntrinsic(Intrinsic::arm_mcrr); 4152 break; 4153 case ARM::BI__builtin_arm_mcrr2: 4154 F = CGM.getIntrinsic(Intrinsic::arm_mcrr2); 4155 break; 4156 } 4157 4158 // MCRR{2} instruction has 5 operands but 4159 // the intrinsic has 4 because Rt and Rt2 4160 // are represented as a single unsigned 64 4161 // bit integer in the intrinsic definition 4162 // but internally it's represented as 2 32 4163 // bit integers. 4164 4165 Value *Coproc = EmitScalarExpr(E->getArg(0)); 4166 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 4167 Value *RtAndRt2 = EmitScalarExpr(E->getArg(2)); 4168 Value *CRm = EmitScalarExpr(E->getArg(3)); 4169 4170 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 4171 Value *Rt = Builder.CreateTruncOrBitCast(RtAndRt2, Int32Ty); 4172 Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); 4173 Rt2 = Builder.CreateTruncOrBitCast(Rt2, Int32Ty); 4174 4175 return Builder.CreateCall(F, {Coproc, Opc1, Rt, Rt2, CRm}); 4176 } 4177 4178 if (BuiltinID == ARM::BI__builtin_arm_mrrc || 4179 BuiltinID == ARM::BI__builtin_arm_mrrc2) { 4180 Function *F; 4181 4182 switch (BuiltinID) { 4183 default: llvm_unreachable("unexpected builtin"); 4184 case ARM::BI__builtin_arm_mrrc: 4185 F = CGM.getIntrinsic(Intrinsic::arm_mrrc); 4186 break; 4187 case ARM::BI__builtin_arm_mrrc2: 4188 F = CGM.getIntrinsic(Intrinsic::arm_mrrc2); 4189 break; 4190 } 4191 4192 Value *Coproc = EmitScalarExpr(E->getArg(0)); 4193 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 4194 Value *CRm = EmitScalarExpr(E->getArg(2)); 4195 Value *RtAndRt2 = Builder.CreateCall(F, {Coproc, Opc1, CRm}); 4196 4197 // Returns an unsigned 64 bit integer, represented 4198 // as two 32 bit integers. 4199 4200 Value *Rt = Builder.CreateExtractValue(RtAndRt2, 1); 4201 Value *Rt1 = Builder.CreateExtractValue(RtAndRt2, 0); 4202 Rt = Builder.CreateZExt(Rt, Int64Ty); 4203 Rt1 = Builder.CreateZExt(Rt1, Int64Ty); 4204 4205 Value *ShiftCast = llvm::ConstantInt::get(Int64Ty, 32); 4206 RtAndRt2 = Builder.CreateShl(Rt, ShiftCast, "shl", true); 4207 RtAndRt2 = Builder.CreateOr(RtAndRt2, Rt1); 4208 4209 return Builder.CreateBitCast(RtAndRt2, ConvertType(E->getType())); 4210 } 4211 4212 if (BuiltinID == ARM::BI__builtin_arm_ldrexd || 4213 ((BuiltinID == ARM::BI__builtin_arm_ldrex || 4214 BuiltinID == ARM::BI__builtin_arm_ldaex) && 4215 getContext().getTypeSize(E->getType()) == 64) || 4216 BuiltinID == ARM::BI__ldrexd) { 4217 Function *F; 4218 4219 switch (BuiltinID) { 4220 default: llvm_unreachable("unexpected builtin"); 4221 case ARM::BI__builtin_arm_ldaex: 4222 F = CGM.getIntrinsic(Intrinsic::arm_ldaexd); 4223 break; 4224 case ARM::BI__builtin_arm_ldrexd: 4225 case ARM::BI__builtin_arm_ldrex: 4226 case ARM::BI__ldrexd: 4227 F = CGM.getIntrinsic(Intrinsic::arm_ldrexd); 4228 break; 4229 } 4230 4231 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 4232 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 4233 "ldrexd"); 4234 4235 Value *Val0 = Builder.CreateExtractValue(Val, 1); 4236 Value *Val1 = Builder.CreateExtractValue(Val, 0); 4237 Val0 = Builder.CreateZExt(Val0, Int64Ty); 4238 Val1 = Builder.CreateZExt(Val1, Int64Ty); 4239 4240 Value *ShiftCst = llvm::ConstantInt::get(Int64Ty, 32); 4241 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 4242 Val = Builder.CreateOr(Val, Val1); 4243 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 4244 } 4245 4246 if (BuiltinID == ARM::BI__builtin_arm_ldrex || 4247 BuiltinID == ARM::BI__builtin_arm_ldaex) { 4248 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 4249 4250 QualType Ty = E->getType(); 4251 llvm::Type *RealResTy = ConvertType(Ty); 4252 llvm::Type *IntResTy = llvm::IntegerType::get(getLLVMContext(), 4253 getContext().getTypeSize(Ty)); 4254 LoadAddr = Builder.CreateBitCast(LoadAddr, IntResTy->getPointerTo()); 4255 4256 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_ldaex 4257 ? Intrinsic::arm_ldaex 4258 : Intrinsic::arm_ldrex, 4259 LoadAddr->getType()); 4260 Value *Val = Builder.CreateCall(F, LoadAddr, "ldrex"); 4261 4262 if (RealResTy->isPointerTy()) 4263 return Builder.CreateIntToPtr(Val, RealResTy); 4264 else { 4265 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 4266 return Builder.CreateBitCast(Val, RealResTy); 4267 } 4268 } 4269 4270 if (BuiltinID == ARM::BI__builtin_arm_strexd || 4271 ((BuiltinID == ARM::BI__builtin_arm_stlex || 4272 BuiltinID == ARM::BI__builtin_arm_strex) && 4273 getContext().getTypeSize(E->getArg(0)->getType()) == 64)) { 4274 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 4275 ? Intrinsic::arm_stlexd 4276 : Intrinsic::arm_strexd); 4277 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, nullptr); 4278 4279 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 4280 Value *Val = EmitScalarExpr(E->getArg(0)); 4281 Builder.CreateStore(Val, Tmp); 4282 4283 Address LdPtr = Builder.CreateBitCast(Tmp,llvm::PointerType::getUnqual(STy)); 4284 Val = Builder.CreateLoad(LdPtr); 4285 4286 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 4287 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 4288 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), Int8PtrTy); 4289 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "strexd"); 4290 } 4291 4292 if (BuiltinID == ARM::BI__builtin_arm_strex || 4293 BuiltinID == ARM::BI__builtin_arm_stlex) { 4294 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 4295 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 4296 4297 QualType Ty = E->getArg(0)->getType(); 4298 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 4299 getContext().getTypeSize(Ty)); 4300 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 4301 4302 if (StoreVal->getType()->isPointerTy()) 4303 StoreVal = Builder.CreatePtrToInt(StoreVal, Int32Ty); 4304 else { 4305 StoreVal = Builder.CreateBitCast(StoreVal, StoreTy); 4306 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int32Ty); 4307 } 4308 4309 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 4310 ? Intrinsic::arm_stlex 4311 : Intrinsic::arm_strex, 4312 StoreAddr->getType()); 4313 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "strex"); 4314 } 4315 4316 switch (BuiltinID) { 4317 case ARM::BI__iso_volatile_load8: 4318 case ARM::BI__iso_volatile_load16: 4319 case ARM::BI__iso_volatile_load32: 4320 case ARM::BI__iso_volatile_load64: { 4321 Value *Ptr = EmitScalarExpr(E->getArg(0)); 4322 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 4323 CharUnits LoadSize = getContext().getTypeSizeInChars(ElTy); 4324 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 4325 LoadSize.getQuantity() * 8); 4326 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 4327 llvm::LoadInst *Load = 4328 Builder.CreateAlignedLoad(Ptr, LoadSize); 4329 Load->setVolatile(true); 4330 return Load; 4331 } 4332 case ARM::BI__iso_volatile_store8: 4333 case ARM::BI__iso_volatile_store16: 4334 case ARM::BI__iso_volatile_store32: 4335 case ARM::BI__iso_volatile_store64: { 4336 Value *Ptr = EmitScalarExpr(E->getArg(0)); 4337 Value *Value = EmitScalarExpr(E->getArg(1)); 4338 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 4339 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 4340 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 4341 StoreSize.getQuantity() * 8); 4342 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 4343 llvm::StoreInst *Store = 4344 Builder.CreateAlignedStore(Value, Ptr, 4345 StoreSize); 4346 Store->setVolatile(true); 4347 return Store; 4348 } 4349 } 4350 4351 if (BuiltinID == ARM::BI__builtin_arm_clrex) { 4352 Function *F = CGM.getIntrinsic(Intrinsic::arm_clrex); 4353 return Builder.CreateCall(F); 4354 } 4355 4356 // CRC32 4357 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 4358 switch (BuiltinID) { 4359 case ARM::BI__builtin_arm_crc32b: 4360 CRCIntrinsicID = Intrinsic::arm_crc32b; break; 4361 case ARM::BI__builtin_arm_crc32cb: 4362 CRCIntrinsicID = Intrinsic::arm_crc32cb; break; 4363 case ARM::BI__builtin_arm_crc32h: 4364 CRCIntrinsicID = Intrinsic::arm_crc32h; break; 4365 case ARM::BI__builtin_arm_crc32ch: 4366 CRCIntrinsicID = Intrinsic::arm_crc32ch; break; 4367 case ARM::BI__builtin_arm_crc32w: 4368 case ARM::BI__builtin_arm_crc32d: 4369 CRCIntrinsicID = Intrinsic::arm_crc32w; break; 4370 case ARM::BI__builtin_arm_crc32cw: 4371 case ARM::BI__builtin_arm_crc32cd: 4372 CRCIntrinsicID = Intrinsic::arm_crc32cw; break; 4373 } 4374 4375 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 4376 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 4377 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 4378 4379 // crc32{c,}d intrinsics are implemnted as two calls to crc32{c,}w 4380 // intrinsics, hence we need different codegen for these cases. 4381 if (BuiltinID == ARM::BI__builtin_arm_crc32d || 4382 BuiltinID == ARM::BI__builtin_arm_crc32cd) { 4383 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 4384 Value *Arg1a = Builder.CreateTruncOrBitCast(Arg1, Int32Ty); 4385 Value *Arg1b = Builder.CreateLShr(Arg1, C1); 4386 Arg1b = Builder.CreateTruncOrBitCast(Arg1b, Int32Ty); 4387 4388 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 4389 Value *Res = Builder.CreateCall(F, {Arg0, Arg1a}); 4390 return Builder.CreateCall(F, {Res, Arg1b}); 4391 } else { 4392 Arg1 = Builder.CreateZExtOrBitCast(Arg1, Int32Ty); 4393 4394 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 4395 return Builder.CreateCall(F, {Arg0, Arg1}); 4396 } 4397 } 4398 4399 if (BuiltinID == ARM::BI__builtin_arm_rsr || 4400 BuiltinID == ARM::BI__builtin_arm_rsr64 || 4401 BuiltinID == ARM::BI__builtin_arm_rsrp || 4402 BuiltinID == ARM::BI__builtin_arm_wsr || 4403 BuiltinID == ARM::BI__builtin_arm_wsr64 || 4404 BuiltinID == ARM::BI__builtin_arm_wsrp) { 4405 4406 bool IsRead = BuiltinID == ARM::BI__builtin_arm_rsr || 4407 BuiltinID == ARM::BI__builtin_arm_rsr64 || 4408 BuiltinID == ARM::BI__builtin_arm_rsrp; 4409 4410 bool IsPointerBuiltin = BuiltinID == ARM::BI__builtin_arm_rsrp || 4411 BuiltinID == ARM::BI__builtin_arm_wsrp; 4412 4413 bool Is64Bit = BuiltinID == ARM::BI__builtin_arm_rsr64 || 4414 BuiltinID == ARM::BI__builtin_arm_wsr64; 4415 4416 llvm::Type *ValueType; 4417 llvm::Type *RegisterType; 4418 if (IsPointerBuiltin) { 4419 ValueType = VoidPtrTy; 4420 RegisterType = Int32Ty; 4421 } else if (Is64Bit) { 4422 ValueType = RegisterType = Int64Ty; 4423 } else { 4424 ValueType = RegisterType = Int32Ty; 4425 } 4426 4427 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 4428 } 4429 4430 // Find out if any arguments are required to be integer constant 4431 // expressions. 4432 unsigned ICEArguments = 0; 4433 ASTContext::GetBuiltinTypeError Error; 4434 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 4435 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 4436 4437 auto getAlignmentValue32 = [&](Address addr) -> Value* { 4438 return Builder.getInt32(addr.getAlignment().getQuantity()); 4439 }; 4440 4441 Address PtrOp0 = Address::invalid(); 4442 Address PtrOp1 = Address::invalid(); 4443 SmallVector<Value*, 4> Ops; 4444 bool HasExtraArg = HasExtraNeonArgument(BuiltinID); 4445 unsigned NumArgs = E->getNumArgs() - (HasExtraArg ? 1 : 0); 4446 for (unsigned i = 0, e = NumArgs; i != e; i++) { 4447 if (i == 0) { 4448 switch (BuiltinID) { 4449 case NEON::BI__builtin_neon_vld1_v: 4450 case NEON::BI__builtin_neon_vld1q_v: 4451 case NEON::BI__builtin_neon_vld1q_lane_v: 4452 case NEON::BI__builtin_neon_vld1_lane_v: 4453 case NEON::BI__builtin_neon_vld1_dup_v: 4454 case NEON::BI__builtin_neon_vld1q_dup_v: 4455 case NEON::BI__builtin_neon_vst1_v: 4456 case NEON::BI__builtin_neon_vst1q_v: 4457 case NEON::BI__builtin_neon_vst1q_lane_v: 4458 case NEON::BI__builtin_neon_vst1_lane_v: 4459 case NEON::BI__builtin_neon_vst2_v: 4460 case NEON::BI__builtin_neon_vst2q_v: 4461 case NEON::BI__builtin_neon_vst2_lane_v: 4462 case NEON::BI__builtin_neon_vst2q_lane_v: 4463 case NEON::BI__builtin_neon_vst3_v: 4464 case NEON::BI__builtin_neon_vst3q_v: 4465 case NEON::BI__builtin_neon_vst3_lane_v: 4466 case NEON::BI__builtin_neon_vst3q_lane_v: 4467 case NEON::BI__builtin_neon_vst4_v: 4468 case NEON::BI__builtin_neon_vst4q_v: 4469 case NEON::BI__builtin_neon_vst4_lane_v: 4470 case NEON::BI__builtin_neon_vst4q_lane_v: 4471 // Get the alignment for the argument in addition to the value; 4472 // we'll use it later. 4473 PtrOp0 = EmitPointerWithAlignment(E->getArg(0)); 4474 Ops.push_back(PtrOp0.getPointer()); 4475 continue; 4476 } 4477 } 4478 if (i == 1) { 4479 switch (BuiltinID) { 4480 case NEON::BI__builtin_neon_vld2_v: 4481 case NEON::BI__builtin_neon_vld2q_v: 4482 case NEON::BI__builtin_neon_vld3_v: 4483 case NEON::BI__builtin_neon_vld3q_v: 4484 case NEON::BI__builtin_neon_vld4_v: 4485 case NEON::BI__builtin_neon_vld4q_v: 4486 case NEON::BI__builtin_neon_vld2_lane_v: 4487 case NEON::BI__builtin_neon_vld2q_lane_v: 4488 case NEON::BI__builtin_neon_vld3_lane_v: 4489 case NEON::BI__builtin_neon_vld3q_lane_v: 4490 case NEON::BI__builtin_neon_vld4_lane_v: 4491 case NEON::BI__builtin_neon_vld4q_lane_v: 4492 case NEON::BI__builtin_neon_vld2_dup_v: 4493 case NEON::BI__builtin_neon_vld3_dup_v: 4494 case NEON::BI__builtin_neon_vld4_dup_v: 4495 // Get the alignment for the argument in addition to the value; 4496 // we'll use it later. 4497 PtrOp1 = EmitPointerWithAlignment(E->getArg(1)); 4498 Ops.push_back(PtrOp1.getPointer()); 4499 continue; 4500 } 4501 } 4502 4503 if ((ICEArguments & (1 << i)) == 0) { 4504 Ops.push_back(EmitScalarExpr(E->getArg(i))); 4505 } else { 4506 // If this is required to be a constant, constant fold it so that we know 4507 // that the generated intrinsic gets a ConstantInt. 4508 llvm::APSInt Result; 4509 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 4510 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 4511 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 4512 } 4513 } 4514 4515 switch (BuiltinID) { 4516 default: break; 4517 4518 case NEON::BI__builtin_neon_vget_lane_i8: 4519 case NEON::BI__builtin_neon_vget_lane_i16: 4520 case NEON::BI__builtin_neon_vget_lane_i32: 4521 case NEON::BI__builtin_neon_vget_lane_i64: 4522 case NEON::BI__builtin_neon_vget_lane_f32: 4523 case NEON::BI__builtin_neon_vgetq_lane_i8: 4524 case NEON::BI__builtin_neon_vgetq_lane_i16: 4525 case NEON::BI__builtin_neon_vgetq_lane_i32: 4526 case NEON::BI__builtin_neon_vgetq_lane_i64: 4527 case NEON::BI__builtin_neon_vgetq_lane_f32: 4528 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane"); 4529 4530 case NEON::BI__builtin_neon_vset_lane_i8: 4531 case NEON::BI__builtin_neon_vset_lane_i16: 4532 case NEON::BI__builtin_neon_vset_lane_i32: 4533 case NEON::BI__builtin_neon_vset_lane_i64: 4534 case NEON::BI__builtin_neon_vset_lane_f32: 4535 case NEON::BI__builtin_neon_vsetq_lane_i8: 4536 case NEON::BI__builtin_neon_vsetq_lane_i16: 4537 case NEON::BI__builtin_neon_vsetq_lane_i32: 4538 case NEON::BI__builtin_neon_vsetq_lane_i64: 4539 case NEON::BI__builtin_neon_vsetq_lane_f32: 4540 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4541 4542 case NEON::BI__builtin_neon_vsha1h_u32: 4543 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1h), Ops, 4544 "vsha1h"); 4545 case NEON::BI__builtin_neon_vsha1cq_u32: 4546 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1c), Ops, 4547 "vsha1h"); 4548 case NEON::BI__builtin_neon_vsha1pq_u32: 4549 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1p), Ops, 4550 "vsha1h"); 4551 case NEON::BI__builtin_neon_vsha1mq_u32: 4552 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1m), Ops, 4553 "vsha1h"); 4554 4555 // The ARM _MoveToCoprocessor builtins put the input register value as 4556 // the first argument, but the LLVM intrinsic expects it as the third one. 4557 case ARM::BI_MoveToCoprocessor: 4558 case ARM::BI_MoveToCoprocessor2: { 4559 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI_MoveToCoprocessor ? 4560 Intrinsic::arm_mcr : Intrinsic::arm_mcr2); 4561 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0], 4562 Ops[3], Ops[4], Ops[5]}); 4563 } 4564 } 4565 4566 // Get the last argument, which specifies the vector type. 4567 assert(HasExtraArg); 4568 llvm::APSInt Result; 4569 const Expr *Arg = E->getArg(E->getNumArgs()-1); 4570 if (!Arg->isIntegerConstantExpr(Result, getContext())) 4571 return nullptr; 4572 4573 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f || 4574 BuiltinID == ARM::BI__builtin_arm_vcvtr_d) { 4575 // Determine the overloaded type of this builtin. 4576 llvm::Type *Ty; 4577 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f) 4578 Ty = FloatTy; 4579 else 4580 Ty = DoubleTy; 4581 4582 // Determine whether this is an unsigned conversion or not. 4583 bool usgn = Result.getZExtValue() == 1; 4584 unsigned Int = usgn ? Intrinsic::arm_vcvtru : Intrinsic::arm_vcvtr; 4585 4586 // Call the appropriate intrinsic. 4587 Function *F = CGM.getIntrinsic(Int, Ty); 4588 return Builder.CreateCall(F, Ops, "vcvtr"); 4589 } 4590 4591 // Determine the type of this overloaded NEON intrinsic. 4592 NeonTypeFlags Type(Result.getZExtValue()); 4593 bool usgn = Type.isUnsigned(); 4594 bool rightShift = false; 4595 4596 llvm::VectorType *VTy = GetNeonType(this, Type); 4597 llvm::Type *Ty = VTy; 4598 if (!Ty) 4599 return nullptr; 4600 4601 // Many NEON builtins have identical semantics and uses in ARM and 4602 // AArch64. Emit these in a single function. 4603 auto IntrinsicMap = makeArrayRef(ARMSIMDIntrinsicMap); 4604 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 4605 IntrinsicMap, BuiltinID, NEONSIMDIntrinsicsProvenSorted); 4606 if (Builtin) 4607 return EmitCommonNeonBuiltinExpr( 4608 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 4609 Builtin->NameHint, Builtin->TypeModifier, E, Ops, PtrOp0, PtrOp1); 4610 4611 unsigned Int; 4612 switch (BuiltinID) { 4613 default: return nullptr; 4614 case NEON::BI__builtin_neon_vld1q_lane_v: 4615 // Handle 64-bit integer elements as a special case. Use shuffles of 4616 // one-element vectors to avoid poor code for i64 in the backend. 4617 if (VTy->getElementType()->isIntegerTy(64)) { 4618 // Extract the other lane. 4619 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4620 uint32_t Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); 4621 Value *SV = llvm::ConstantVector::get(ConstantInt::get(Int32Ty, 1-Lane)); 4622 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 4623 // Load the value as a one-element vector. 4624 Ty = llvm::VectorType::get(VTy->getElementType(), 1); 4625 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4626 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Tys); 4627 Value *Align = getAlignmentValue32(PtrOp0); 4628 Value *Ld = Builder.CreateCall(F, {Ops[0], Align}); 4629 // Combine them. 4630 uint32_t Indices[] = {1 - Lane, Lane}; 4631 SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 4632 return Builder.CreateShuffleVector(Ops[1], Ld, SV, "vld1q_lane"); 4633 } 4634 // fall through 4635 case NEON::BI__builtin_neon_vld1_lane_v: { 4636 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4637 PtrOp0 = Builder.CreateElementBitCast(PtrOp0, VTy->getElementType()); 4638 Value *Ld = Builder.CreateLoad(PtrOp0); 4639 return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); 4640 } 4641 case NEON::BI__builtin_neon_vld2_dup_v: 4642 case NEON::BI__builtin_neon_vld3_dup_v: 4643 case NEON::BI__builtin_neon_vld4_dup_v: { 4644 // Handle 64-bit elements as a special-case. There is no "dup" needed. 4645 if (VTy->getElementType()->getPrimitiveSizeInBits() == 64) { 4646 switch (BuiltinID) { 4647 case NEON::BI__builtin_neon_vld2_dup_v: 4648 Int = Intrinsic::arm_neon_vld2; 4649 break; 4650 case NEON::BI__builtin_neon_vld3_dup_v: 4651 Int = Intrinsic::arm_neon_vld3; 4652 break; 4653 case NEON::BI__builtin_neon_vld4_dup_v: 4654 Int = Intrinsic::arm_neon_vld4; 4655 break; 4656 default: llvm_unreachable("unknown vld_dup intrinsic?"); 4657 } 4658 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4659 Function *F = CGM.getIntrinsic(Int, Tys); 4660 llvm::Value *Align = getAlignmentValue32(PtrOp1); 4661 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, "vld_dup"); 4662 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4663 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4664 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4665 } 4666 switch (BuiltinID) { 4667 case NEON::BI__builtin_neon_vld2_dup_v: 4668 Int = Intrinsic::arm_neon_vld2lane; 4669 break; 4670 case NEON::BI__builtin_neon_vld3_dup_v: 4671 Int = Intrinsic::arm_neon_vld3lane; 4672 break; 4673 case NEON::BI__builtin_neon_vld4_dup_v: 4674 Int = Intrinsic::arm_neon_vld4lane; 4675 break; 4676 default: llvm_unreachable("unknown vld_dup intrinsic?"); 4677 } 4678 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4679 Function *F = CGM.getIntrinsic(Int, Tys); 4680 llvm::StructType *STy = cast<llvm::StructType>(F->getReturnType()); 4681 4682 SmallVector<Value*, 6> Args; 4683 Args.push_back(Ops[1]); 4684 Args.append(STy->getNumElements(), UndefValue::get(Ty)); 4685 4686 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 4687 Args.push_back(CI); 4688 Args.push_back(getAlignmentValue32(PtrOp1)); 4689 4690 Ops[1] = Builder.CreateCall(F, Args, "vld_dup"); 4691 // splat lane 0 to all elts in each vector of the result. 4692 for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { 4693 Value *Val = Builder.CreateExtractValue(Ops[1], i); 4694 Value *Elt = Builder.CreateBitCast(Val, Ty); 4695 Elt = EmitNeonSplat(Elt, CI); 4696 Elt = Builder.CreateBitCast(Elt, Val->getType()); 4697 Ops[1] = Builder.CreateInsertValue(Ops[1], Elt, i); 4698 } 4699 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4700 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4701 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4702 } 4703 case NEON::BI__builtin_neon_vqrshrn_n_v: 4704 Int = 4705 usgn ? Intrinsic::arm_neon_vqrshiftnu : Intrinsic::arm_neon_vqrshiftns; 4706 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n", 4707 1, true); 4708 case NEON::BI__builtin_neon_vqrshrun_n_v: 4709 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqrshiftnsu, Ty), 4710 Ops, "vqrshrun_n", 1, true); 4711 case NEON::BI__builtin_neon_vqshrn_n_v: 4712 Int = usgn ? Intrinsic::arm_neon_vqshiftnu : Intrinsic::arm_neon_vqshiftns; 4713 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n", 4714 1, true); 4715 case NEON::BI__builtin_neon_vqshrun_n_v: 4716 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqshiftnsu, Ty), 4717 Ops, "vqshrun_n", 1, true); 4718 case NEON::BI__builtin_neon_vrecpe_v: 4719 case NEON::BI__builtin_neon_vrecpeq_v: 4720 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecpe, Ty), 4721 Ops, "vrecpe"); 4722 case NEON::BI__builtin_neon_vrshrn_n_v: 4723 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrshiftn, Ty), 4724 Ops, "vrshrn_n", 1, true); 4725 case NEON::BI__builtin_neon_vrsra_n_v: 4726 case NEON::BI__builtin_neon_vrsraq_n_v: 4727 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4728 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4729 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, true); 4730 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 4731 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Ty), {Ops[1], Ops[2]}); 4732 return Builder.CreateAdd(Ops[0], Ops[1], "vrsra_n"); 4733 case NEON::BI__builtin_neon_vsri_n_v: 4734 case NEON::BI__builtin_neon_vsriq_n_v: 4735 rightShift = true; 4736 case NEON::BI__builtin_neon_vsli_n_v: 4737 case NEON::BI__builtin_neon_vsliq_n_v: 4738 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, rightShift); 4739 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vshiftins, Ty), 4740 Ops, "vsli_n"); 4741 case NEON::BI__builtin_neon_vsra_n_v: 4742 case NEON::BI__builtin_neon_vsraq_n_v: 4743 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4744 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 4745 return Builder.CreateAdd(Ops[0], Ops[1]); 4746 case NEON::BI__builtin_neon_vst1q_lane_v: 4747 // Handle 64-bit integer elements as a special case. Use a shuffle to get 4748 // a one-element vector and avoid poor code for i64 in the backend. 4749 if (VTy->getElementType()->isIntegerTy(64)) { 4750 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4751 Value *SV = llvm::ConstantVector::get(cast<llvm::Constant>(Ops[2])); 4752 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 4753 Ops[2] = getAlignmentValue32(PtrOp0); 4754 llvm::Type *Tys[] = {Int8PtrTy, Ops[1]->getType()}; 4755 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, 4756 Tys), Ops); 4757 } 4758 // fall through 4759 case NEON::BI__builtin_neon_vst1_lane_v: { 4760 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4761 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 4762 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4763 auto St = Builder.CreateStore(Ops[1], Builder.CreateBitCast(PtrOp0, Ty)); 4764 return St; 4765 } 4766 case NEON::BI__builtin_neon_vtbl1_v: 4767 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl1), 4768 Ops, "vtbl1"); 4769 case NEON::BI__builtin_neon_vtbl2_v: 4770 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl2), 4771 Ops, "vtbl2"); 4772 case NEON::BI__builtin_neon_vtbl3_v: 4773 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl3), 4774 Ops, "vtbl3"); 4775 case NEON::BI__builtin_neon_vtbl4_v: 4776 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl4), 4777 Ops, "vtbl4"); 4778 case NEON::BI__builtin_neon_vtbx1_v: 4779 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx1), 4780 Ops, "vtbx1"); 4781 case NEON::BI__builtin_neon_vtbx2_v: 4782 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx2), 4783 Ops, "vtbx2"); 4784 case NEON::BI__builtin_neon_vtbx3_v: 4785 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx3), 4786 Ops, "vtbx3"); 4787 case NEON::BI__builtin_neon_vtbx4_v: 4788 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx4), 4789 Ops, "vtbx4"); 4790 } 4791 } 4792 4793 static Value *EmitAArch64TblBuiltinExpr(CodeGenFunction &CGF, unsigned BuiltinID, 4794 const CallExpr *E, 4795 SmallVectorImpl<Value *> &Ops) { 4796 unsigned int Int = 0; 4797 const char *s = nullptr; 4798 4799 switch (BuiltinID) { 4800 default: 4801 return nullptr; 4802 case NEON::BI__builtin_neon_vtbl1_v: 4803 case NEON::BI__builtin_neon_vqtbl1_v: 4804 case NEON::BI__builtin_neon_vqtbl1q_v: 4805 case NEON::BI__builtin_neon_vtbl2_v: 4806 case NEON::BI__builtin_neon_vqtbl2_v: 4807 case NEON::BI__builtin_neon_vqtbl2q_v: 4808 case NEON::BI__builtin_neon_vtbl3_v: 4809 case NEON::BI__builtin_neon_vqtbl3_v: 4810 case NEON::BI__builtin_neon_vqtbl3q_v: 4811 case NEON::BI__builtin_neon_vtbl4_v: 4812 case NEON::BI__builtin_neon_vqtbl4_v: 4813 case NEON::BI__builtin_neon_vqtbl4q_v: 4814 break; 4815 case NEON::BI__builtin_neon_vtbx1_v: 4816 case NEON::BI__builtin_neon_vqtbx1_v: 4817 case NEON::BI__builtin_neon_vqtbx1q_v: 4818 case NEON::BI__builtin_neon_vtbx2_v: 4819 case NEON::BI__builtin_neon_vqtbx2_v: 4820 case NEON::BI__builtin_neon_vqtbx2q_v: 4821 case NEON::BI__builtin_neon_vtbx3_v: 4822 case NEON::BI__builtin_neon_vqtbx3_v: 4823 case NEON::BI__builtin_neon_vqtbx3q_v: 4824 case NEON::BI__builtin_neon_vtbx4_v: 4825 case NEON::BI__builtin_neon_vqtbx4_v: 4826 case NEON::BI__builtin_neon_vqtbx4q_v: 4827 break; 4828 } 4829 4830 assert(E->getNumArgs() >= 3); 4831 4832 // Get the last argument, which specifies the vector type. 4833 llvm::APSInt Result; 4834 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 4835 if (!Arg->isIntegerConstantExpr(Result, CGF.getContext())) 4836 return nullptr; 4837 4838 // Determine the type of this overloaded NEON intrinsic. 4839 NeonTypeFlags Type(Result.getZExtValue()); 4840 llvm::VectorType *Ty = GetNeonType(&CGF, Type); 4841 if (!Ty) 4842 return nullptr; 4843 4844 CodeGen::CGBuilderTy &Builder = CGF.Builder; 4845 4846 // AArch64 scalar builtins are not overloaded, they do not have an extra 4847 // argument that specifies the vector type, need to handle each case. 4848 switch (BuiltinID) { 4849 case NEON::BI__builtin_neon_vtbl1_v: { 4850 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 1), nullptr, 4851 Ops[1], Ty, Intrinsic::aarch64_neon_tbl1, 4852 "vtbl1"); 4853 } 4854 case NEON::BI__builtin_neon_vtbl2_v: { 4855 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 2), nullptr, 4856 Ops[2], Ty, Intrinsic::aarch64_neon_tbl1, 4857 "vtbl1"); 4858 } 4859 case NEON::BI__builtin_neon_vtbl3_v: { 4860 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 3), nullptr, 4861 Ops[3], Ty, Intrinsic::aarch64_neon_tbl2, 4862 "vtbl2"); 4863 } 4864 case NEON::BI__builtin_neon_vtbl4_v: { 4865 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 4), nullptr, 4866 Ops[4], Ty, Intrinsic::aarch64_neon_tbl2, 4867 "vtbl2"); 4868 } 4869 case NEON::BI__builtin_neon_vtbx1_v: { 4870 Value *TblRes = 4871 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 1), nullptr, Ops[2], 4872 Ty, Intrinsic::aarch64_neon_tbl1, "vtbl1"); 4873 4874 llvm::Constant *EightV = ConstantInt::get(Ty, 8); 4875 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[2], EightV); 4876 CmpRes = Builder.CreateSExt(CmpRes, Ty); 4877 4878 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 4879 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 4880 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 4881 } 4882 case NEON::BI__builtin_neon_vtbx2_v: { 4883 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 2), Ops[0], 4884 Ops[3], Ty, Intrinsic::aarch64_neon_tbx1, 4885 "vtbx1"); 4886 } 4887 case NEON::BI__builtin_neon_vtbx3_v: { 4888 Value *TblRes = 4889 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 3), nullptr, Ops[4], 4890 Ty, Intrinsic::aarch64_neon_tbl2, "vtbl2"); 4891 4892 llvm::Constant *TwentyFourV = ConstantInt::get(Ty, 24); 4893 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[4], 4894 TwentyFourV); 4895 CmpRes = Builder.CreateSExt(CmpRes, Ty); 4896 4897 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 4898 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 4899 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 4900 } 4901 case NEON::BI__builtin_neon_vtbx4_v: { 4902 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 4), Ops[0], 4903 Ops[5], Ty, Intrinsic::aarch64_neon_tbx2, 4904 "vtbx2"); 4905 } 4906 case NEON::BI__builtin_neon_vqtbl1_v: 4907 case NEON::BI__builtin_neon_vqtbl1q_v: 4908 Int = Intrinsic::aarch64_neon_tbl1; s = "vtbl1"; break; 4909 case NEON::BI__builtin_neon_vqtbl2_v: 4910 case NEON::BI__builtin_neon_vqtbl2q_v: { 4911 Int = Intrinsic::aarch64_neon_tbl2; s = "vtbl2"; break; 4912 case NEON::BI__builtin_neon_vqtbl3_v: 4913 case NEON::BI__builtin_neon_vqtbl3q_v: 4914 Int = Intrinsic::aarch64_neon_tbl3; s = "vtbl3"; break; 4915 case NEON::BI__builtin_neon_vqtbl4_v: 4916 case NEON::BI__builtin_neon_vqtbl4q_v: 4917 Int = Intrinsic::aarch64_neon_tbl4; s = "vtbl4"; break; 4918 case NEON::BI__builtin_neon_vqtbx1_v: 4919 case NEON::BI__builtin_neon_vqtbx1q_v: 4920 Int = Intrinsic::aarch64_neon_tbx1; s = "vtbx1"; break; 4921 case NEON::BI__builtin_neon_vqtbx2_v: 4922 case NEON::BI__builtin_neon_vqtbx2q_v: 4923 Int = Intrinsic::aarch64_neon_tbx2; s = "vtbx2"; break; 4924 case NEON::BI__builtin_neon_vqtbx3_v: 4925 case NEON::BI__builtin_neon_vqtbx3q_v: 4926 Int = Intrinsic::aarch64_neon_tbx3; s = "vtbx3"; break; 4927 case NEON::BI__builtin_neon_vqtbx4_v: 4928 case NEON::BI__builtin_neon_vqtbx4q_v: 4929 Int = Intrinsic::aarch64_neon_tbx4; s = "vtbx4"; break; 4930 } 4931 } 4932 4933 if (!Int) 4934 return nullptr; 4935 4936 Function *F = CGF.CGM.getIntrinsic(Int, Ty); 4937 return CGF.EmitNeonCall(F, Ops, s); 4938 } 4939 4940 Value *CodeGenFunction::vectorWrapScalar16(Value *Op) { 4941 llvm::Type *VTy = llvm::VectorType::get(Int16Ty, 4); 4942 Op = Builder.CreateBitCast(Op, Int16Ty); 4943 Value *V = UndefValue::get(VTy); 4944 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 4945 Op = Builder.CreateInsertElement(V, Op, CI); 4946 return Op; 4947 } 4948 4949 Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, 4950 const CallExpr *E) { 4951 unsigned HintID = static_cast<unsigned>(-1); 4952 switch (BuiltinID) { 4953 default: break; 4954 case AArch64::BI__builtin_arm_nop: 4955 HintID = 0; 4956 break; 4957 case AArch64::BI__builtin_arm_yield: 4958 HintID = 1; 4959 break; 4960 case AArch64::BI__builtin_arm_wfe: 4961 HintID = 2; 4962 break; 4963 case AArch64::BI__builtin_arm_wfi: 4964 HintID = 3; 4965 break; 4966 case AArch64::BI__builtin_arm_sev: 4967 HintID = 4; 4968 break; 4969 case AArch64::BI__builtin_arm_sevl: 4970 HintID = 5; 4971 break; 4972 } 4973 4974 if (HintID != static_cast<unsigned>(-1)) { 4975 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_hint); 4976 return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID)); 4977 } 4978 4979 if (BuiltinID == AArch64::BI__builtin_arm_prefetch) { 4980 Value *Address = EmitScalarExpr(E->getArg(0)); 4981 Value *RW = EmitScalarExpr(E->getArg(1)); 4982 Value *CacheLevel = EmitScalarExpr(E->getArg(2)); 4983 Value *RetentionPolicy = EmitScalarExpr(E->getArg(3)); 4984 Value *IsData = EmitScalarExpr(E->getArg(4)); 4985 4986 Value *Locality = nullptr; 4987 if (cast<llvm::ConstantInt>(RetentionPolicy)->isZero()) { 4988 // Temporal fetch, needs to convert cache level to locality. 4989 Locality = llvm::ConstantInt::get(Int32Ty, 4990 -cast<llvm::ConstantInt>(CacheLevel)->getValue() + 3); 4991 } else { 4992 // Streaming fetch. 4993 Locality = llvm::ConstantInt::get(Int32Ty, 0); 4994 } 4995 4996 // FIXME: We need AArch64 specific LLVM intrinsic if we want to specify 4997 // PLDL3STRM or PLDL2STRM. 4998 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 4999 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 5000 } 5001 5002 if (BuiltinID == AArch64::BI__builtin_arm_rbit) { 5003 assert((getContext().getTypeSize(E->getType()) == 32) && 5004 "rbit of unusual size!"); 5005 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 5006 return Builder.CreateCall( 5007 CGM.getIntrinsic(Intrinsic::aarch64_rbit, Arg->getType()), Arg, "rbit"); 5008 } 5009 if (BuiltinID == AArch64::BI__builtin_arm_rbit64) { 5010 assert((getContext().getTypeSize(E->getType()) == 64) && 5011 "rbit of unusual size!"); 5012 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 5013 return Builder.CreateCall( 5014 CGM.getIntrinsic(Intrinsic::aarch64_rbit, Arg->getType()), Arg, "rbit"); 5015 } 5016 5017 if (BuiltinID == AArch64::BI__clear_cache) { 5018 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 5019 const FunctionDecl *FD = E->getDirectCallee(); 5020 Value *Ops[2]; 5021 for (unsigned i = 0; i < 2; i++) 5022 Ops[i] = EmitScalarExpr(E->getArg(i)); 5023 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 5024 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 5025 StringRef Name = FD->getName(); 5026 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 5027 } 5028 5029 if ((BuiltinID == AArch64::BI__builtin_arm_ldrex || 5030 BuiltinID == AArch64::BI__builtin_arm_ldaex) && 5031 getContext().getTypeSize(E->getType()) == 128) { 5032 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 5033 ? Intrinsic::aarch64_ldaxp 5034 : Intrinsic::aarch64_ldxp); 5035 5036 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 5037 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 5038 "ldxp"); 5039 5040 Value *Val0 = Builder.CreateExtractValue(Val, 1); 5041 Value *Val1 = Builder.CreateExtractValue(Val, 0); 5042 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 5043 Val0 = Builder.CreateZExt(Val0, Int128Ty); 5044 Val1 = Builder.CreateZExt(Val1, Int128Ty); 5045 5046 Value *ShiftCst = llvm::ConstantInt::get(Int128Ty, 64); 5047 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 5048 Val = Builder.CreateOr(Val, Val1); 5049 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 5050 } else if (BuiltinID == AArch64::BI__builtin_arm_ldrex || 5051 BuiltinID == AArch64::BI__builtin_arm_ldaex) { 5052 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 5053 5054 QualType Ty = E->getType(); 5055 llvm::Type *RealResTy = ConvertType(Ty); 5056 llvm::Type *IntResTy = llvm::IntegerType::get(getLLVMContext(), 5057 getContext().getTypeSize(Ty)); 5058 LoadAddr = Builder.CreateBitCast(LoadAddr, IntResTy->getPointerTo()); 5059 5060 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 5061 ? Intrinsic::aarch64_ldaxr 5062 : Intrinsic::aarch64_ldxr, 5063 LoadAddr->getType()); 5064 Value *Val = Builder.CreateCall(F, LoadAddr, "ldxr"); 5065 5066 if (RealResTy->isPointerTy()) 5067 return Builder.CreateIntToPtr(Val, RealResTy); 5068 5069 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 5070 return Builder.CreateBitCast(Val, RealResTy); 5071 } 5072 5073 if ((BuiltinID == AArch64::BI__builtin_arm_strex || 5074 BuiltinID == AArch64::BI__builtin_arm_stlex) && 5075 getContext().getTypeSize(E->getArg(0)->getType()) == 128) { 5076 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 5077 ? Intrinsic::aarch64_stlxp 5078 : Intrinsic::aarch64_stxp); 5079 llvm::Type *STy = llvm::StructType::get(Int64Ty, Int64Ty, nullptr); 5080 5081 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 5082 EmitAnyExprToMem(E->getArg(0), Tmp, Qualifiers(), /*init*/ true); 5083 5084 Tmp = Builder.CreateBitCast(Tmp, llvm::PointerType::getUnqual(STy)); 5085 llvm::Value *Val = Builder.CreateLoad(Tmp); 5086 5087 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 5088 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 5089 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), 5090 Int8PtrTy); 5091 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "stxp"); 5092 } 5093 5094 if (BuiltinID == AArch64::BI__builtin_arm_strex || 5095 BuiltinID == AArch64::BI__builtin_arm_stlex) { 5096 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 5097 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 5098 5099 QualType Ty = E->getArg(0)->getType(); 5100 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 5101 getContext().getTypeSize(Ty)); 5102 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 5103 5104 if (StoreVal->getType()->isPointerTy()) 5105 StoreVal = Builder.CreatePtrToInt(StoreVal, Int64Ty); 5106 else { 5107 StoreVal = Builder.CreateBitCast(StoreVal, StoreTy); 5108 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int64Ty); 5109 } 5110 5111 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 5112 ? Intrinsic::aarch64_stlxr 5113 : Intrinsic::aarch64_stxr, 5114 StoreAddr->getType()); 5115 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "stxr"); 5116 } 5117 5118 if (BuiltinID == AArch64::BI__builtin_arm_clrex) { 5119 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_clrex); 5120 return Builder.CreateCall(F); 5121 } 5122 5123 // CRC32 5124 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 5125 switch (BuiltinID) { 5126 case AArch64::BI__builtin_arm_crc32b: 5127 CRCIntrinsicID = Intrinsic::aarch64_crc32b; break; 5128 case AArch64::BI__builtin_arm_crc32cb: 5129 CRCIntrinsicID = Intrinsic::aarch64_crc32cb; break; 5130 case AArch64::BI__builtin_arm_crc32h: 5131 CRCIntrinsicID = Intrinsic::aarch64_crc32h; break; 5132 case AArch64::BI__builtin_arm_crc32ch: 5133 CRCIntrinsicID = Intrinsic::aarch64_crc32ch; break; 5134 case AArch64::BI__builtin_arm_crc32w: 5135 CRCIntrinsicID = Intrinsic::aarch64_crc32w; break; 5136 case AArch64::BI__builtin_arm_crc32cw: 5137 CRCIntrinsicID = Intrinsic::aarch64_crc32cw; break; 5138 case AArch64::BI__builtin_arm_crc32d: 5139 CRCIntrinsicID = Intrinsic::aarch64_crc32x; break; 5140 case AArch64::BI__builtin_arm_crc32cd: 5141 CRCIntrinsicID = Intrinsic::aarch64_crc32cx; break; 5142 } 5143 5144 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 5145 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 5146 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 5147 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 5148 5149 llvm::Type *DataTy = F->getFunctionType()->getParamType(1); 5150 Arg1 = Builder.CreateZExtOrBitCast(Arg1, DataTy); 5151 5152 return Builder.CreateCall(F, {Arg0, Arg1}); 5153 } 5154 5155 if (BuiltinID == AArch64::BI__builtin_arm_rsr || 5156 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 5157 BuiltinID == AArch64::BI__builtin_arm_rsrp || 5158 BuiltinID == AArch64::BI__builtin_arm_wsr || 5159 BuiltinID == AArch64::BI__builtin_arm_wsr64 || 5160 BuiltinID == AArch64::BI__builtin_arm_wsrp) { 5161 5162 bool IsRead = BuiltinID == AArch64::BI__builtin_arm_rsr || 5163 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 5164 BuiltinID == AArch64::BI__builtin_arm_rsrp; 5165 5166 bool IsPointerBuiltin = BuiltinID == AArch64::BI__builtin_arm_rsrp || 5167 BuiltinID == AArch64::BI__builtin_arm_wsrp; 5168 5169 bool Is64Bit = BuiltinID != AArch64::BI__builtin_arm_rsr && 5170 BuiltinID != AArch64::BI__builtin_arm_wsr; 5171 5172 llvm::Type *ValueType; 5173 llvm::Type *RegisterType = Int64Ty; 5174 if (IsPointerBuiltin) { 5175 ValueType = VoidPtrTy; 5176 } else if (Is64Bit) { 5177 ValueType = Int64Ty; 5178 } else { 5179 ValueType = Int32Ty; 5180 } 5181 5182 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 5183 } 5184 5185 // Find out if any arguments are required to be integer constant 5186 // expressions. 5187 unsigned ICEArguments = 0; 5188 ASTContext::GetBuiltinTypeError Error; 5189 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 5190 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 5191 5192 llvm::SmallVector<Value*, 4> Ops; 5193 for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; i++) { 5194 if ((ICEArguments & (1 << i)) == 0) { 5195 Ops.push_back(EmitScalarExpr(E->getArg(i))); 5196 } else { 5197 // If this is required to be a constant, constant fold it so that we know 5198 // that the generated intrinsic gets a ConstantInt. 5199 llvm::APSInt Result; 5200 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 5201 assert(IsConst && "Constant arg isn't actually constant?"); 5202 (void)IsConst; 5203 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 5204 } 5205 } 5206 5207 auto SISDMap = makeArrayRef(AArch64SISDIntrinsicMap); 5208 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 5209 SISDMap, BuiltinID, AArch64SISDIntrinsicsProvenSorted); 5210 5211 if (Builtin) { 5212 Ops.push_back(EmitScalarExpr(E->getArg(E->getNumArgs() - 1))); 5213 Value *Result = EmitCommonNeonSISDBuiltinExpr(*this, *Builtin, Ops, E); 5214 assert(Result && "SISD intrinsic should have been handled"); 5215 return Result; 5216 } 5217 5218 llvm::APSInt Result; 5219 const Expr *Arg = E->getArg(E->getNumArgs()-1); 5220 NeonTypeFlags Type(0); 5221 if (Arg->isIntegerConstantExpr(Result, getContext())) 5222 // Determine the type of this overloaded NEON intrinsic. 5223 Type = NeonTypeFlags(Result.getZExtValue()); 5224 5225 bool usgn = Type.isUnsigned(); 5226 bool quad = Type.isQuad(); 5227 5228 // Handle non-overloaded intrinsics first. 5229 switch (BuiltinID) { 5230 default: break; 5231 case NEON::BI__builtin_neon_vldrq_p128: { 5232 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 5233 Value *Ptr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PTy); 5234 return Builder.CreateDefaultAlignedLoad(Ptr); 5235 } 5236 case NEON::BI__builtin_neon_vstrq_p128: { 5237 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 5238 Value *Ptr = Builder.CreateBitCast(Ops[0], Int128PTy); 5239 return Builder.CreateDefaultAlignedStore(EmitScalarExpr(E->getArg(1)), Ptr); 5240 } 5241 case NEON::BI__builtin_neon_vcvts_u32_f32: 5242 case NEON::BI__builtin_neon_vcvtd_u64_f64: 5243 usgn = true; 5244 // FALL THROUGH 5245 case NEON::BI__builtin_neon_vcvts_s32_f32: 5246 case NEON::BI__builtin_neon_vcvtd_s64_f64: { 5247 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5248 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 5249 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 5250 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 5251 Ops[0] = Builder.CreateBitCast(Ops[0], FTy); 5252 if (usgn) 5253 return Builder.CreateFPToUI(Ops[0], InTy); 5254 return Builder.CreateFPToSI(Ops[0], InTy); 5255 } 5256 case NEON::BI__builtin_neon_vcvts_f32_u32: 5257 case NEON::BI__builtin_neon_vcvtd_f64_u64: 5258 usgn = true; 5259 // FALL THROUGH 5260 case NEON::BI__builtin_neon_vcvts_f32_s32: 5261 case NEON::BI__builtin_neon_vcvtd_f64_s64: { 5262 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5263 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 5264 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 5265 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 5266 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 5267 if (usgn) 5268 return Builder.CreateUIToFP(Ops[0], FTy); 5269 return Builder.CreateSIToFP(Ops[0], FTy); 5270 } 5271 case NEON::BI__builtin_neon_vpaddd_s64: { 5272 llvm::Type *Ty = llvm::VectorType::get(Int64Ty, 2); 5273 Value *Vec = EmitScalarExpr(E->getArg(0)); 5274 // The vector is v2f64, so make sure it's bitcast to that. 5275 Vec = Builder.CreateBitCast(Vec, Ty, "v2i64"); 5276 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 5277 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 5278 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 5279 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 5280 // Pairwise addition of a v2f64 into a scalar f64. 5281 return Builder.CreateAdd(Op0, Op1, "vpaddd"); 5282 } 5283 case NEON::BI__builtin_neon_vpaddd_f64: { 5284 llvm::Type *Ty = 5285 llvm::VectorType::get(DoubleTy, 2); 5286 Value *Vec = EmitScalarExpr(E->getArg(0)); 5287 // The vector is v2f64, so make sure it's bitcast to that. 5288 Vec = Builder.CreateBitCast(Vec, Ty, "v2f64"); 5289 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 5290 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 5291 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 5292 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 5293 // Pairwise addition of a v2f64 into a scalar f64. 5294 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 5295 } 5296 case NEON::BI__builtin_neon_vpadds_f32: { 5297 llvm::Type *Ty = 5298 llvm::VectorType::get(FloatTy, 2); 5299 Value *Vec = EmitScalarExpr(E->getArg(0)); 5300 // The vector is v2f32, so make sure it's bitcast to that. 5301 Vec = Builder.CreateBitCast(Vec, Ty, "v2f32"); 5302 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 5303 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 5304 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 5305 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 5306 // Pairwise addition of a v2f32 into a scalar f32. 5307 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 5308 } 5309 case NEON::BI__builtin_neon_vceqzd_s64: 5310 case NEON::BI__builtin_neon_vceqzd_f64: 5311 case NEON::BI__builtin_neon_vceqzs_f32: 5312 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5313 return EmitAArch64CompareBuiltinExpr( 5314 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5315 ICmpInst::FCMP_OEQ, ICmpInst::ICMP_EQ, "vceqz"); 5316 case NEON::BI__builtin_neon_vcgezd_s64: 5317 case NEON::BI__builtin_neon_vcgezd_f64: 5318 case NEON::BI__builtin_neon_vcgezs_f32: 5319 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5320 return EmitAArch64CompareBuiltinExpr( 5321 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5322 ICmpInst::FCMP_OGE, ICmpInst::ICMP_SGE, "vcgez"); 5323 case NEON::BI__builtin_neon_vclezd_s64: 5324 case NEON::BI__builtin_neon_vclezd_f64: 5325 case NEON::BI__builtin_neon_vclezs_f32: 5326 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5327 return EmitAArch64CompareBuiltinExpr( 5328 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5329 ICmpInst::FCMP_OLE, ICmpInst::ICMP_SLE, "vclez"); 5330 case NEON::BI__builtin_neon_vcgtzd_s64: 5331 case NEON::BI__builtin_neon_vcgtzd_f64: 5332 case NEON::BI__builtin_neon_vcgtzs_f32: 5333 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5334 return EmitAArch64CompareBuiltinExpr( 5335 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5336 ICmpInst::FCMP_OGT, ICmpInst::ICMP_SGT, "vcgtz"); 5337 case NEON::BI__builtin_neon_vcltzd_s64: 5338 case NEON::BI__builtin_neon_vcltzd_f64: 5339 case NEON::BI__builtin_neon_vcltzs_f32: 5340 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5341 return EmitAArch64CompareBuiltinExpr( 5342 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5343 ICmpInst::FCMP_OLT, ICmpInst::ICMP_SLT, "vcltz"); 5344 5345 case NEON::BI__builtin_neon_vceqzd_u64: { 5346 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5347 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 5348 Ops[0] = 5349 Builder.CreateICmpEQ(Ops[0], llvm::Constant::getNullValue(Int64Ty)); 5350 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqzd"); 5351 } 5352 case NEON::BI__builtin_neon_vceqd_f64: 5353 case NEON::BI__builtin_neon_vcled_f64: 5354 case NEON::BI__builtin_neon_vcltd_f64: 5355 case NEON::BI__builtin_neon_vcged_f64: 5356 case NEON::BI__builtin_neon_vcgtd_f64: { 5357 llvm::CmpInst::Predicate P; 5358 switch (BuiltinID) { 5359 default: llvm_unreachable("missing builtin ID in switch!"); 5360 case NEON::BI__builtin_neon_vceqd_f64: P = llvm::FCmpInst::FCMP_OEQ; break; 5361 case NEON::BI__builtin_neon_vcled_f64: P = llvm::FCmpInst::FCMP_OLE; break; 5362 case NEON::BI__builtin_neon_vcltd_f64: P = llvm::FCmpInst::FCMP_OLT; break; 5363 case NEON::BI__builtin_neon_vcged_f64: P = llvm::FCmpInst::FCMP_OGE; break; 5364 case NEON::BI__builtin_neon_vcgtd_f64: P = llvm::FCmpInst::FCMP_OGT; break; 5365 } 5366 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5367 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5368 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 5369 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 5370 return Builder.CreateSExt(Ops[0], Int64Ty, "vcmpd"); 5371 } 5372 case NEON::BI__builtin_neon_vceqs_f32: 5373 case NEON::BI__builtin_neon_vcles_f32: 5374 case NEON::BI__builtin_neon_vclts_f32: 5375 case NEON::BI__builtin_neon_vcges_f32: 5376 case NEON::BI__builtin_neon_vcgts_f32: { 5377 llvm::CmpInst::Predicate P; 5378 switch (BuiltinID) { 5379 default: llvm_unreachable("missing builtin ID in switch!"); 5380 case NEON::BI__builtin_neon_vceqs_f32: P = llvm::FCmpInst::FCMP_OEQ; break; 5381 case NEON::BI__builtin_neon_vcles_f32: P = llvm::FCmpInst::FCMP_OLE; break; 5382 case NEON::BI__builtin_neon_vclts_f32: P = llvm::FCmpInst::FCMP_OLT; break; 5383 case NEON::BI__builtin_neon_vcges_f32: P = llvm::FCmpInst::FCMP_OGE; break; 5384 case NEON::BI__builtin_neon_vcgts_f32: P = llvm::FCmpInst::FCMP_OGT; break; 5385 } 5386 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5387 Ops[0] = Builder.CreateBitCast(Ops[0], FloatTy); 5388 Ops[1] = Builder.CreateBitCast(Ops[1], FloatTy); 5389 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 5390 return Builder.CreateSExt(Ops[0], Int32Ty, "vcmpd"); 5391 } 5392 case NEON::BI__builtin_neon_vceqd_s64: 5393 case NEON::BI__builtin_neon_vceqd_u64: 5394 case NEON::BI__builtin_neon_vcgtd_s64: 5395 case NEON::BI__builtin_neon_vcgtd_u64: 5396 case NEON::BI__builtin_neon_vcltd_s64: 5397 case NEON::BI__builtin_neon_vcltd_u64: 5398 case NEON::BI__builtin_neon_vcged_u64: 5399 case NEON::BI__builtin_neon_vcged_s64: 5400 case NEON::BI__builtin_neon_vcled_u64: 5401 case NEON::BI__builtin_neon_vcled_s64: { 5402 llvm::CmpInst::Predicate P; 5403 switch (BuiltinID) { 5404 default: llvm_unreachable("missing builtin ID in switch!"); 5405 case NEON::BI__builtin_neon_vceqd_s64: 5406 case NEON::BI__builtin_neon_vceqd_u64:P = llvm::ICmpInst::ICMP_EQ;break; 5407 case NEON::BI__builtin_neon_vcgtd_s64:P = llvm::ICmpInst::ICMP_SGT;break; 5408 case NEON::BI__builtin_neon_vcgtd_u64:P = llvm::ICmpInst::ICMP_UGT;break; 5409 case NEON::BI__builtin_neon_vcltd_s64:P = llvm::ICmpInst::ICMP_SLT;break; 5410 case NEON::BI__builtin_neon_vcltd_u64:P = llvm::ICmpInst::ICMP_ULT;break; 5411 case NEON::BI__builtin_neon_vcged_u64:P = llvm::ICmpInst::ICMP_UGE;break; 5412 case NEON::BI__builtin_neon_vcged_s64:P = llvm::ICmpInst::ICMP_SGE;break; 5413 case NEON::BI__builtin_neon_vcled_u64:P = llvm::ICmpInst::ICMP_ULE;break; 5414 case NEON::BI__builtin_neon_vcled_s64:P = llvm::ICmpInst::ICMP_SLE;break; 5415 } 5416 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5417 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 5418 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 5419 Ops[0] = Builder.CreateICmp(P, Ops[0], Ops[1]); 5420 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqd"); 5421 } 5422 case NEON::BI__builtin_neon_vtstd_s64: 5423 case NEON::BI__builtin_neon_vtstd_u64: { 5424 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5425 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 5426 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 5427 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 5428 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 5429 llvm::Constant::getNullValue(Int64Ty)); 5430 return Builder.CreateSExt(Ops[0], Int64Ty, "vtstd"); 5431 } 5432 case NEON::BI__builtin_neon_vset_lane_i8: 5433 case NEON::BI__builtin_neon_vset_lane_i16: 5434 case NEON::BI__builtin_neon_vset_lane_i32: 5435 case NEON::BI__builtin_neon_vset_lane_i64: 5436 case NEON::BI__builtin_neon_vset_lane_f32: 5437 case NEON::BI__builtin_neon_vsetq_lane_i8: 5438 case NEON::BI__builtin_neon_vsetq_lane_i16: 5439 case NEON::BI__builtin_neon_vsetq_lane_i32: 5440 case NEON::BI__builtin_neon_vsetq_lane_i64: 5441 case NEON::BI__builtin_neon_vsetq_lane_f32: 5442 Ops.push_back(EmitScalarExpr(E->getArg(2))); 5443 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5444 case NEON::BI__builtin_neon_vset_lane_f64: 5445 // The vector type needs a cast for the v1f64 variant. 5446 Ops[1] = Builder.CreateBitCast(Ops[1], 5447 llvm::VectorType::get(DoubleTy, 1)); 5448 Ops.push_back(EmitScalarExpr(E->getArg(2))); 5449 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5450 case NEON::BI__builtin_neon_vsetq_lane_f64: 5451 // The vector type needs a cast for the v2f64 variant. 5452 Ops[1] = Builder.CreateBitCast(Ops[1], 5453 llvm::VectorType::get(DoubleTy, 2)); 5454 Ops.push_back(EmitScalarExpr(E->getArg(2))); 5455 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5456 5457 case NEON::BI__builtin_neon_vget_lane_i8: 5458 case NEON::BI__builtin_neon_vdupb_lane_i8: 5459 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 8)); 5460 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5461 "vget_lane"); 5462 case NEON::BI__builtin_neon_vgetq_lane_i8: 5463 case NEON::BI__builtin_neon_vdupb_laneq_i8: 5464 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 16)); 5465 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5466 "vgetq_lane"); 5467 case NEON::BI__builtin_neon_vget_lane_i16: 5468 case NEON::BI__builtin_neon_vduph_lane_i16: 5469 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 4)); 5470 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5471 "vget_lane"); 5472 case NEON::BI__builtin_neon_vgetq_lane_i16: 5473 case NEON::BI__builtin_neon_vduph_laneq_i16: 5474 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 8)); 5475 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5476 "vgetq_lane"); 5477 case NEON::BI__builtin_neon_vget_lane_i32: 5478 case NEON::BI__builtin_neon_vdups_lane_i32: 5479 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 2)); 5480 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5481 "vget_lane"); 5482 case NEON::BI__builtin_neon_vdups_lane_f32: 5483 Ops[0] = Builder.CreateBitCast(Ops[0], 5484 llvm::VectorType::get(FloatTy, 2)); 5485 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5486 "vdups_lane"); 5487 case NEON::BI__builtin_neon_vgetq_lane_i32: 5488 case NEON::BI__builtin_neon_vdups_laneq_i32: 5489 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 5490 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5491 "vgetq_lane"); 5492 case NEON::BI__builtin_neon_vget_lane_i64: 5493 case NEON::BI__builtin_neon_vdupd_lane_i64: 5494 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 1)); 5495 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5496 "vget_lane"); 5497 case NEON::BI__builtin_neon_vdupd_lane_f64: 5498 Ops[0] = Builder.CreateBitCast(Ops[0], 5499 llvm::VectorType::get(DoubleTy, 1)); 5500 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5501 "vdupd_lane"); 5502 case NEON::BI__builtin_neon_vgetq_lane_i64: 5503 case NEON::BI__builtin_neon_vdupd_laneq_i64: 5504 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 5505 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5506 "vgetq_lane"); 5507 case NEON::BI__builtin_neon_vget_lane_f32: 5508 Ops[0] = Builder.CreateBitCast(Ops[0], 5509 llvm::VectorType::get(FloatTy, 2)); 5510 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5511 "vget_lane"); 5512 case NEON::BI__builtin_neon_vget_lane_f64: 5513 Ops[0] = Builder.CreateBitCast(Ops[0], 5514 llvm::VectorType::get(DoubleTy, 1)); 5515 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5516 "vget_lane"); 5517 case NEON::BI__builtin_neon_vgetq_lane_f32: 5518 case NEON::BI__builtin_neon_vdups_laneq_f32: 5519 Ops[0] = Builder.CreateBitCast(Ops[0], 5520 llvm::VectorType::get(FloatTy, 4)); 5521 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5522 "vgetq_lane"); 5523 case NEON::BI__builtin_neon_vgetq_lane_f64: 5524 case NEON::BI__builtin_neon_vdupd_laneq_f64: 5525 Ops[0] = Builder.CreateBitCast(Ops[0], 5526 llvm::VectorType::get(DoubleTy, 2)); 5527 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5528 "vgetq_lane"); 5529 case NEON::BI__builtin_neon_vaddd_s64: 5530 case NEON::BI__builtin_neon_vaddd_u64: 5531 return Builder.CreateAdd(Ops[0], EmitScalarExpr(E->getArg(1)), "vaddd"); 5532 case NEON::BI__builtin_neon_vsubd_s64: 5533 case NEON::BI__builtin_neon_vsubd_u64: 5534 return Builder.CreateSub(Ops[0], EmitScalarExpr(E->getArg(1)), "vsubd"); 5535 case NEON::BI__builtin_neon_vqdmlalh_s16: 5536 case NEON::BI__builtin_neon_vqdmlslh_s16: { 5537 SmallVector<Value *, 2> ProductOps; 5538 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 5539 ProductOps.push_back(vectorWrapScalar16(EmitScalarExpr(E->getArg(2)))); 5540 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 5541 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 5542 ProductOps, "vqdmlXl"); 5543 Constant *CI = ConstantInt::get(SizeTy, 0); 5544 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 5545 5546 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlalh_s16 5547 ? Intrinsic::aarch64_neon_sqadd 5548 : Intrinsic::aarch64_neon_sqsub; 5549 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int32Ty), Ops, "vqdmlXl"); 5550 } 5551 case NEON::BI__builtin_neon_vqshlud_n_s64: { 5552 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5553 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 5554 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqshlu, Int64Ty), 5555 Ops, "vqshlu_n"); 5556 } 5557 case NEON::BI__builtin_neon_vqshld_n_u64: 5558 case NEON::BI__builtin_neon_vqshld_n_s64: { 5559 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vqshld_n_u64 5560 ? Intrinsic::aarch64_neon_uqshl 5561 : Intrinsic::aarch64_neon_sqshl; 5562 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5563 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 5564 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vqshl_n"); 5565 } 5566 case NEON::BI__builtin_neon_vrshrd_n_u64: 5567 case NEON::BI__builtin_neon_vrshrd_n_s64: { 5568 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrshrd_n_u64 5569 ? Intrinsic::aarch64_neon_urshl 5570 : Intrinsic::aarch64_neon_srshl; 5571 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5572 int SV = cast<ConstantInt>(Ops[1])->getSExtValue(); 5573 Ops[1] = ConstantInt::get(Int64Ty, -SV); 5574 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vrshr_n"); 5575 } 5576 case NEON::BI__builtin_neon_vrsrad_n_u64: 5577 case NEON::BI__builtin_neon_vrsrad_n_s64: { 5578 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrsrad_n_u64 5579 ? Intrinsic::aarch64_neon_urshl 5580 : Intrinsic::aarch64_neon_srshl; 5581 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 5582 Ops.push_back(Builder.CreateNeg(EmitScalarExpr(E->getArg(2)))); 5583 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Int64Ty), 5584 {Ops[1], Builder.CreateSExt(Ops[2], Int64Ty)}); 5585 return Builder.CreateAdd(Ops[0], Builder.CreateBitCast(Ops[1], Int64Ty)); 5586 } 5587 case NEON::BI__builtin_neon_vshld_n_s64: 5588 case NEON::BI__builtin_neon_vshld_n_u64: { 5589 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 5590 return Builder.CreateShl( 5591 Ops[0], ConstantInt::get(Int64Ty, Amt->getZExtValue()), "shld_n"); 5592 } 5593 case NEON::BI__builtin_neon_vshrd_n_s64: { 5594 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 5595 return Builder.CreateAShr( 5596 Ops[0], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 5597 Amt->getZExtValue())), 5598 "shrd_n"); 5599 } 5600 case NEON::BI__builtin_neon_vshrd_n_u64: { 5601 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 5602 uint64_t ShiftAmt = Amt->getZExtValue(); 5603 // Right-shifting an unsigned value by its size yields 0. 5604 if (ShiftAmt == 64) 5605 return ConstantInt::get(Int64Ty, 0); 5606 return Builder.CreateLShr(Ops[0], ConstantInt::get(Int64Ty, ShiftAmt), 5607 "shrd_n"); 5608 } 5609 case NEON::BI__builtin_neon_vsrad_n_s64: { 5610 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 5611 Ops[1] = Builder.CreateAShr( 5612 Ops[1], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 5613 Amt->getZExtValue())), 5614 "shrd_n"); 5615 return Builder.CreateAdd(Ops[0], Ops[1]); 5616 } 5617 case NEON::BI__builtin_neon_vsrad_n_u64: { 5618 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 5619 uint64_t ShiftAmt = Amt->getZExtValue(); 5620 // Right-shifting an unsigned value by its size yields 0. 5621 // As Op + 0 = Op, return Ops[0] directly. 5622 if (ShiftAmt == 64) 5623 return Ops[0]; 5624 Ops[1] = Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, ShiftAmt), 5625 "shrd_n"); 5626 return Builder.CreateAdd(Ops[0], Ops[1]); 5627 } 5628 case NEON::BI__builtin_neon_vqdmlalh_lane_s16: 5629 case NEON::BI__builtin_neon_vqdmlalh_laneq_s16: 5630 case NEON::BI__builtin_neon_vqdmlslh_lane_s16: 5631 case NEON::BI__builtin_neon_vqdmlslh_laneq_s16: { 5632 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 5633 "lane"); 5634 SmallVector<Value *, 2> ProductOps; 5635 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 5636 ProductOps.push_back(vectorWrapScalar16(Ops[2])); 5637 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 5638 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 5639 ProductOps, "vqdmlXl"); 5640 Constant *CI = ConstantInt::get(SizeTy, 0); 5641 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 5642 Ops.pop_back(); 5643 5644 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlalh_lane_s16 || 5645 BuiltinID == NEON::BI__builtin_neon_vqdmlalh_laneq_s16) 5646 ? Intrinsic::aarch64_neon_sqadd 5647 : Intrinsic::aarch64_neon_sqsub; 5648 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int32Ty), Ops, "vqdmlXl"); 5649 } 5650 case NEON::BI__builtin_neon_vqdmlals_s32: 5651 case NEON::BI__builtin_neon_vqdmlsls_s32: { 5652 SmallVector<Value *, 2> ProductOps; 5653 ProductOps.push_back(Ops[1]); 5654 ProductOps.push_back(EmitScalarExpr(E->getArg(2))); 5655 Ops[1] = 5656 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 5657 ProductOps, "vqdmlXl"); 5658 5659 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlals_s32 5660 ? Intrinsic::aarch64_neon_sqadd 5661 : Intrinsic::aarch64_neon_sqsub; 5662 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int64Ty), Ops, "vqdmlXl"); 5663 } 5664 case NEON::BI__builtin_neon_vqdmlals_lane_s32: 5665 case NEON::BI__builtin_neon_vqdmlals_laneq_s32: 5666 case NEON::BI__builtin_neon_vqdmlsls_lane_s32: 5667 case NEON::BI__builtin_neon_vqdmlsls_laneq_s32: { 5668 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 5669 "lane"); 5670 SmallVector<Value *, 2> ProductOps; 5671 ProductOps.push_back(Ops[1]); 5672 ProductOps.push_back(Ops[2]); 5673 Ops[1] = 5674 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 5675 ProductOps, "vqdmlXl"); 5676 Ops.pop_back(); 5677 5678 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlals_lane_s32 || 5679 BuiltinID == NEON::BI__builtin_neon_vqdmlals_laneq_s32) 5680 ? Intrinsic::aarch64_neon_sqadd 5681 : Intrinsic::aarch64_neon_sqsub; 5682 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl"); 5683 } 5684 } 5685 5686 llvm::VectorType *VTy = GetNeonType(this, Type); 5687 llvm::Type *Ty = VTy; 5688 if (!Ty) 5689 return nullptr; 5690 5691 // Not all intrinsics handled by the common case work for AArch64 yet, so only 5692 // defer to common code if it's been added to our special map. 5693 Builtin = findNeonIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID, 5694 AArch64SIMDIntrinsicsProvenSorted); 5695 5696 if (Builtin) 5697 return EmitCommonNeonBuiltinExpr( 5698 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 5699 Builtin->NameHint, Builtin->TypeModifier, E, Ops, 5700 /*never use addresses*/ Address::invalid(), Address::invalid()); 5701 5702 if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops)) 5703 return V; 5704 5705 unsigned Int; 5706 switch (BuiltinID) { 5707 default: return nullptr; 5708 case NEON::BI__builtin_neon_vbsl_v: 5709 case NEON::BI__builtin_neon_vbslq_v: { 5710 llvm::Type *BitTy = llvm::VectorType::getInteger(VTy); 5711 Ops[0] = Builder.CreateBitCast(Ops[0], BitTy, "vbsl"); 5712 Ops[1] = Builder.CreateBitCast(Ops[1], BitTy, "vbsl"); 5713 Ops[2] = Builder.CreateBitCast(Ops[2], BitTy, "vbsl"); 5714 5715 Ops[1] = Builder.CreateAnd(Ops[0], Ops[1], "vbsl"); 5716 Ops[2] = Builder.CreateAnd(Builder.CreateNot(Ops[0]), Ops[2], "vbsl"); 5717 Ops[0] = Builder.CreateOr(Ops[1], Ops[2], "vbsl"); 5718 return Builder.CreateBitCast(Ops[0], Ty); 5719 } 5720 case NEON::BI__builtin_neon_vfma_lane_v: 5721 case NEON::BI__builtin_neon_vfmaq_lane_v: { // Only used for FP types 5722 // The ARM builtins (and instructions) have the addend as the first 5723 // operand, but the 'fma' intrinsics have it last. Swap it around here. 5724 Value *Addend = Ops[0]; 5725 Value *Multiplicand = Ops[1]; 5726 Value *LaneSource = Ops[2]; 5727 Ops[0] = Multiplicand; 5728 Ops[1] = LaneSource; 5729 Ops[2] = Addend; 5730 5731 // Now adjust things to handle the lane access. 5732 llvm::Type *SourceTy = BuiltinID == NEON::BI__builtin_neon_vfmaq_lane_v ? 5733 llvm::VectorType::get(VTy->getElementType(), VTy->getNumElements() / 2) : 5734 VTy; 5735 llvm::Constant *cst = cast<Constant>(Ops[3]); 5736 Value *SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), cst); 5737 Ops[1] = Builder.CreateBitCast(Ops[1], SourceTy); 5738 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV, "lane"); 5739 5740 Ops.pop_back(); 5741 Int = Intrinsic::fma; 5742 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmla"); 5743 } 5744 case NEON::BI__builtin_neon_vfma_laneq_v: { 5745 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 5746 // v1f64 fma should be mapped to Neon scalar f64 fma 5747 if (VTy && VTy->getElementType() == DoubleTy) { 5748 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5749 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 5750 llvm::Type *VTy = GetNeonType(this, 5751 NeonTypeFlags(NeonTypeFlags::Float64, false, true)); 5752 Ops[2] = Builder.CreateBitCast(Ops[2], VTy); 5753 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 5754 Value *F = CGM.getIntrinsic(Intrinsic::fma, DoubleTy); 5755 Value *Result = Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 5756 return Builder.CreateBitCast(Result, Ty); 5757 } 5758 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5759 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5760 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5761 5762 llvm::Type *STy = llvm::VectorType::get(VTy->getElementType(), 5763 VTy->getNumElements() * 2); 5764 Ops[2] = Builder.CreateBitCast(Ops[2], STy); 5765 Value* SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), 5766 cast<ConstantInt>(Ops[3])); 5767 Ops[2] = Builder.CreateShuffleVector(Ops[2], Ops[2], SV, "lane"); 5768 5769 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 5770 } 5771 case NEON::BI__builtin_neon_vfmaq_laneq_v: { 5772 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5773 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5774 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5775 5776 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5777 Ops[2] = EmitNeonSplat(Ops[2], cast<ConstantInt>(Ops[3])); 5778 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 5779 } 5780 case NEON::BI__builtin_neon_vfmas_lane_f32: 5781 case NEON::BI__builtin_neon_vfmas_laneq_f32: 5782 case NEON::BI__builtin_neon_vfmad_lane_f64: 5783 case NEON::BI__builtin_neon_vfmad_laneq_f64: { 5784 Ops.push_back(EmitScalarExpr(E->getArg(3))); 5785 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 5786 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5787 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 5788 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 5789 } 5790 case NEON::BI__builtin_neon_vmull_v: 5791 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5792 Int = usgn ? Intrinsic::aarch64_neon_umull : Intrinsic::aarch64_neon_smull; 5793 if (Type.isPoly()) Int = Intrinsic::aarch64_neon_pmull; 5794 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 5795 case NEON::BI__builtin_neon_vmax_v: 5796 case NEON::BI__builtin_neon_vmaxq_v: 5797 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5798 Int = usgn ? Intrinsic::aarch64_neon_umax : Intrinsic::aarch64_neon_smax; 5799 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmax; 5800 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmax"); 5801 case NEON::BI__builtin_neon_vmin_v: 5802 case NEON::BI__builtin_neon_vminq_v: 5803 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5804 Int = usgn ? Intrinsic::aarch64_neon_umin : Intrinsic::aarch64_neon_smin; 5805 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmin; 5806 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmin"); 5807 case NEON::BI__builtin_neon_vabd_v: 5808 case NEON::BI__builtin_neon_vabdq_v: 5809 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5810 Int = usgn ? Intrinsic::aarch64_neon_uabd : Intrinsic::aarch64_neon_sabd; 5811 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fabd; 5812 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vabd"); 5813 case NEON::BI__builtin_neon_vpadal_v: 5814 case NEON::BI__builtin_neon_vpadalq_v: { 5815 unsigned ArgElts = VTy->getNumElements(); 5816 llvm::IntegerType *EltTy = cast<IntegerType>(VTy->getElementType()); 5817 unsigned BitWidth = EltTy->getBitWidth(); 5818 llvm::Type *ArgTy = llvm::VectorType::get( 5819 llvm::IntegerType::get(getLLVMContext(), BitWidth/2), 2*ArgElts); 5820 llvm::Type* Tys[2] = { VTy, ArgTy }; 5821 Int = usgn ? Intrinsic::aarch64_neon_uaddlp : Intrinsic::aarch64_neon_saddlp; 5822 SmallVector<llvm::Value*, 1> TmpOps; 5823 TmpOps.push_back(Ops[1]); 5824 Function *F = CGM.getIntrinsic(Int, Tys); 5825 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vpadal"); 5826 llvm::Value *addend = Builder.CreateBitCast(Ops[0], tmp->getType()); 5827 return Builder.CreateAdd(tmp, addend); 5828 } 5829 case NEON::BI__builtin_neon_vpmin_v: 5830 case NEON::BI__builtin_neon_vpminq_v: 5831 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5832 Int = usgn ? Intrinsic::aarch64_neon_uminp : Intrinsic::aarch64_neon_sminp; 5833 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fminp; 5834 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmin"); 5835 case NEON::BI__builtin_neon_vpmax_v: 5836 case NEON::BI__builtin_neon_vpmaxq_v: 5837 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5838 Int = usgn ? Intrinsic::aarch64_neon_umaxp : Intrinsic::aarch64_neon_smaxp; 5839 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmaxp; 5840 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmax"); 5841 case NEON::BI__builtin_neon_vminnm_v: 5842 case NEON::BI__builtin_neon_vminnmq_v: 5843 Int = Intrinsic::aarch64_neon_fminnm; 5844 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vminnm"); 5845 case NEON::BI__builtin_neon_vmaxnm_v: 5846 case NEON::BI__builtin_neon_vmaxnmq_v: 5847 Int = Intrinsic::aarch64_neon_fmaxnm; 5848 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmaxnm"); 5849 case NEON::BI__builtin_neon_vrecpss_f32: { 5850 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5851 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, FloatTy), 5852 Ops, "vrecps"); 5853 } 5854 case NEON::BI__builtin_neon_vrecpsd_f64: { 5855 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5856 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, DoubleTy), 5857 Ops, "vrecps"); 5858 } 5859 case NEON::BI__builtin_neon_vqshrun_n_v: 5860 Int = Intrinsic::aarch64_neon_sqshrun; 5861 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrun_n"); 5862 case NEON::BI__builtin_neon_vqrshrun_n_v: 5863 Int = Intrinsic::aarch64_neon_sqrshrun; 5864 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrun_n"); 5865 case NEON::BI__builtin_neon_vqshrn_n_v: 5866 Int = usgn ? Intrinsic::aarch64_neon_uqshrn : Intrinsic::aarch64_neon_sqshrn; 5867 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n"); 5868 case NEON::BI__builtin_neon_vrshrn_n_v: 5869 Int = Intrinsic::aarch64_neon_rshrn; 5870 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshrn_n"); 5871 case NEON::BI__builtin_neon_vqrshrn_n_v: 5872 Int = usgn ? Intrinsic::aarch64_neon_uqrshrn : Intrinsic::aarch64_neon_sqrshrn; 5873 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n"); 5874 case NEON::BI__builtin_neon_vrnda_v: 5875 case NEON::BI__builtin_neon_vrndaq_v: { 5876 Int = Intrinsic::round; 5877 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrnda"); 5878 } 5879 case NEON::BI__builtin_neon_vrndi_v: 5880 case NEON::BI__builtin_neon_vrndiq_v: { 5881 Int = Intrinsic::nearbyint; 5882 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndi"); 5883 } 5884 case NEON::BI__builtin_neon_vrndm_v: 5885 case NEON::BI__builtin_neon_vrndmq_v: { 5886 Int = Intrinsic::floor; 5887 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndm"); 5888 } 5889 case NEON::BI__builtin_neon_vrndn_v: 5890 case NEON::BI__builtin_neon_vrndnq_v: { 5891 Int = Intrinsic::aarch64_neon_frintn; 5892 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndn"); 5893 } 5894 case NEON::BI__builtin_neon_vrndp_v: 5895 case NEON::BI__builtin_neon_vrndpq_v: { 5896 Int = Intrinsic::ceil; 5897 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndp"); 5898 } 5899 case NEON::BI__builtin_neon_vrndx_v: 5900 case NEON::BI__builtin_neon_vrndxq_v: { 5901 Int = Intrinsic::rint; 5902 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndx"); 5903 } 5904 case NEON::BI__builtin_neon_vrnd_v: 5905 case NEON::BI__builtin_neon_vrndq_v: { 5906 Int = Intrinsic::trunc; 5907 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndz"); 5908 } 5909 case NEON::BI__builtin_neon_vceqz_v: 5910 case NEON::BI__builtin_neon_vceqzq_v: 5911 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OEQ, 5912 ICmpInst::ICMP_EQ, "vceqz"); 5913 case NEON::BI__builtin_neon_vcgez_v: 5914 case NEON::BI__builtin_neon_vcgezq_v: 5915 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGE, 5916 ICmpInst::ICMP_SGE, "vcgez"); 5917 case NEON::BI__builtin_neon_vclez_v: 5918 case NEON::BI__builtin_neon_vclezq_v: 5919 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLE, 5920 ICmpInst::ICMP_SLE, "vclez"); 5921 case NEON::BI__builtin_neon_vcgtz_v: 5922 case NEON::BI__builtin_neon_vcgtzq_v: 5923 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGT, 5924 ICmpInst::ICMP_SGT, "vcgtz"); 5925 case NEON::BI__builtin_neon_vcltz_v: 5926 case NEON::BI__builtin_neon_vcltzq_v: 5927 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLT, 5928 ICmpInst::ICMP_SLT, "vcltz"); 5929 case NEON::BI__builtin_neon_vcvt_f64_v: 5930 case NEON::BI__builtin_neon_vcvtq_f64_v: 5931 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5932 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad)); 5933 return usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 5934 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 5935 case NEON::BI__builtin_neon_vcvt_f64_f32: { 5936 assert(Type.getEltType() == NeonTypeFlags::Float64 && quad && 5937 "unexpected vcvt_f64_f32 builtin"); 5938 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float32, false, false); 5939 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 5940 5941 return Builder.CreateFPExt(Ops[0], Ty, "vcvt"); 5942 } 5943 case NEON::BI__builtin_neon_vcvt_f32_f64: { 5944 assert(Type.getEltType() == NeonTypeFlags::Float32 && 5945 "unexpected vcvt_f32_f64 builtin"); 5946 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float64, false, true); 5947 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 5948 5949 return Builder.CreateFPTrunc(Ops[0], Ty, "vcvt"); 5950 } 5951 case NEON::BI__builtin_neon_vcvt_s32_v: 5952 case NEON::BI__builtin_neon_vcvt_u32_v: 5953 case NEON::BI__builtin_neon_vcvt_s64_v: 5954 case NEON::BI__builtin_neon_vcvt_u64_v: 5955 case NEON::BI__builtin_neon_vcvtq_s32_v: 5956 case NEON::BI__builtin_neon_vcvtq_u32_v: 5957 case NEON::BI__builtin_neon_vcvtq_s64_v: 5958 case NEON::BI__builtin_neon_vcvtq_u64_v: { 5959 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 5960 if (usgn) 5961 return Builder.CreateFPToUI(Ops[0], Ty); 5962 return Builder.CreateFPToSI(Ops[0], Ty); 5963 } 5964 case NEON::BI__builtin_neon_vcvta_s32_v: 5965 case NEON::BI__builtin_neon_vcvtaq_s32_v: 5966 case NEON::BI__builtin_neon_vcvta_u32_v: 5967 case NEON::BI__builtin_neon_vcvtaq_u32_v: 5968 case NEON::BI__builtin_neon_vcvta_s64_v: 5969 case NEON::BI__builtin_neon_vcvtaq_s64_v: 5970 case NEON::BI__builtin_neon_vcvta_u64_v: 5971 case NEON::BI__builtin_neon_vcvtaq_u64_v: { 5972 Int = usgn ? Intrinsic::aarch64_neon_fcvtau : Intrinsic::aarch64_neon_fcvtas; 5973 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5974 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvta"); 5975 } 5976 case NEON::BI__builtin_neon_vcvtm_s32_v: 5977 case NEON::BI__builtin_neon_vcvtmq_s32_v: 5978 case NEON::BI__builtin_neon_vcvtm_u32_v: 5979 case NEON::BI__builtin_neon_vcvtmq_u32_v: 5980 case NEON::BI__builtin_neon_vcvtm_s64_v: 5981 case NEON::BI__builtin_neon_vcvtmq_s64_v: 5982 case NEON::BI__builtin_neon_vcvtm_u64_v: 5983 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 5984 Int = usgn ? Intrinsic::aarch64_neon_fcvtmu : Intrinsic::aarch64_neon_fcvtms; 5985 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5986 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtm"); 5987 } 5988 case NEON::BI__builtin_neon_vcvtn_s32_v: 5989 case NEON::BI__builtin_neon_vcvtnq_s32_v: 5990 case NEON::BI__builtin_neon_vcvtn_u32_v: 5991 case NEON::BI__builtin_neon_vcvtnq_u32_v: 5992 case NEON::BI__builtin_neon_vcvtn_s64_v: 5993 case NEON::BI__builtin_neon_vcvtnq_s64_v: 5994 case NEON::BI__builtin_neon_vcvtn_u64_v: 5995 case NEON::BI__builtin_neon_vcvtnq_u64_v: { 5996 Int = usgn ? Intrinsic::aarch64_neon_fcvtnu : Intrinsic::aarch64_neon_fcvtns; 5997 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5998 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtn"); 5999 } 6000 case NEON::BI__builtin_neon_vcvtp_s32_v: 6001 case NEON::BI__builtin_neon_vcvtpq_s32_v: 6002 case NEON::BI__builtin_neon_vcvtp_u32_v: 6003 case NEON::BI__builtin_neon_vcvtpq_u32_v: 6004 case NEON::BI__builtin_neon_vcvtp_s64_v: 6005 case NEON::BI__builtin_neon_vcvtpq_s64_v: 6006 case NEON::BI__builtin_neon_vcvtp_u64_v: 6007 case NEON::BI__builtin_neon_vcvtpq_u64_v: { 6008 Int = usgn ? Intrinsic::aarch64_neon_fcvtpu : Intrinsic::aarch64_neon_fcvtps; 6009 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6010 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtp"); 6011 } 6012 case NEON::BI__builtin_neon_vmulx_v: 6013 case NEON::BI__builtin_neon_vmulxq_v: { 6014 Int = Intrinsic::aarch64_neon_fmulx; 6015 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmulx"); 6016 } 6017 case NEON::BI__builtin_neon_vmul_lane_v: 6018 case NEON::BI__builtin_neon_vmul_laneq_v: { 6019 // v1f64 vmul_lane should be mapped to Neon scalar mul lane 6020 bool Quad = false; 6021 if (BuiltinID == NEON::BI__builtin_neon_vmul_laneq_v) 6022 Quad = true; 6023 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 6024 llvm::Type *VTy = GetNeonType(this, 6025 NeonTypeFlags(NeonTypeFlags::Float64, false, Quad)); 6026 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 6027 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 6028 Value *Result = Builder.CreateFMul(Ops[0], Ops[1]); 6029 return Builder.CreateBitCast(Result, Ty); 6030 } 6031 case NEON::BI__builtin_neon_vnegd_s64: 6032 return Builder.CreateNeg(EmitScalarExpr(E->getArg(0)), "vnegd"); 6033 case NEON::BI__builtin_neon_vpmaxnm_v: 6034 case NEON::BI__builtin_neon_vpmaxnmq_v: { 6035 Int = Intrinsic::aarch64_neon_fmaxnmp; 6036 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmaxnm"); 6037 } 6038 case NEON::BI__builtin_neon_vpminnm_v: 6039 case NEON::BI__builtin_neon_vpminnmq_v: { 6040 Int = Intrinsic::aarch64_neon_fminnmp; 6041 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpminnm"); 6042 } 6043 case NEON::BI__builtin_neon_vsqrt_v: 6044 case NEON::BI__builtin_neon_vsqrtq_v: { 6045 Int = Intrinsic::sqrt; 6046 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6047 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqrt"); 6048 } 6049 case NEON::BI__builtin_neon_vrbit_v: 6050 case NEON::BI__builtin_neon_vrbitq_v: { 6051 Int = Intrinsic::aarch64_neon_rbit; 6052 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrbit"); 6053 } 6054 case NEON::BI__builtin_neon_vaddv_u8: 6055 // FIXME: These are handled by the AArch64 scalar code. 6056 usgn = true; 6057 // FALLTHROUGH 6058 case NEON::BI__builtin_neon_vaddv_s8: { 6059 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6060 Ty = Int32Ty; 6061 VTy = llvm::VectorType::get(Int8Ty, 8); 6062 llvm::Type *Tys[2] = { Ty, VTy }; 6063 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6064 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6065 return Builder.CreateTrunc(Ops[0], Int8Ty); 6066 } 6067 case NEON::BI__builtin_neon_vaddv_u16: 6068 usgn = true; 6069 // FALLTHROUGH 6070 case NEON::BI__builtin_neon_vaddv_s16: { 6071 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6072 Ty = Int32Ty; 6073 VTy = llvm::VectorType::get(Int16Ty, 4); 6074 llvm::Type *Tys[2] = { Ty, VTy }; 6075 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6076 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6077 return Builder.CreateTrunc(Ops[0], Int16Ty); 6078 } 6079 case NEON::BI__builtin_neon_vaddvq_u8: 6080 usgn = true; 6081 // FALLTHROUGH 6082 case NEON::BI__builtin_neon_vaddvq_s8: { 6083 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6084 Ty = Int32Ty; 6085 VTy = llvm::VectorType::get(Int8Ty, 16); 6086 llvm::Type *Tys[2] = { Ty, VTy }; 6087 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6088 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6089 return Builder.CreateTrunc(Ops[0], Int8Ty); 6090 } 6091 case NEON::BI__builtin_neon_vaddvq_u16: 6092 usgn = true; 6093 // FALLTHROUGH 6094 case NEON::BI__builtin_neon_vaddvq_s16: { 6095 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6096 Ty = Int32Ty; 6097 VTy = llvm::VectorType::get(Int16Ty, 8); 6098 llvm::Type *Tys[2] = { Ty, VTy }; 6099 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6100 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6101 return Builder.CreateTrunc(Ops[0], Int16Ty); 6102 } 6103 case NEON::BI__builtin_neon_vmaxv_u8: { 6104 Int = Intrinsic::aarch64_neon_umaxv; 6105 Ty = Int32Ty; 6106 VTy = llvm::VectorType::get(Int8Ty, 8); 6107 llvm::Type *Tys[2] = { Ty, VTy }; 6108 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6109 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6110 return Builder.CreateTrunc(Ops[0], Int8Ty); 6111 } 6112 case NEON::BI__builtin_neon_vmaxv_u16: { 6113 Int = Intrinsic::aarch64_neon_umaxv; 6114 Ty = Int32Ty; 6115 VTy = llvm::VectorType::get(Int16Ty, 4); 6116 llvm::Type *Tys[2] = { Ty, VTy }; 6117 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6118 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6119 return Builder.CreateTrunc(Ops[0], Int16Ty); 6120 } 6121 case NEON::BI__builtin_neon_vmaxvq_u8: { 6122 Int = Intrinsic::aarch64_neon_umaxv; 6123 Ty = Int32Ty; 6124 VTy = llvm::VectorType::get(Int8Ty, 16); 6125 llvm::Type *Tys[2] = { Ty, VTy }; 6126 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6127 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6128 return Builder.CreateTrunc(Ops[0], Int8Ty); 6129 } 6130 case NEON::BI__builtin_neon_vmaxvq_u16: { 6131 Int = Intrinsic::aarch64_neon_umaxv; 6132 Ty = Int32Ty; 6133 VTy = llvm::VectorType::get(Int16Ty, 8); 6134 llvm::Type *Tys[2] = { Ty, VTy }; 6135 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6136 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6137 return Builder.CreateTrunc(Ops[0], Int16Ty); 6138 } 6139 case NEON::BI__builtin_neon_vmaxv_s8: { 6140 Int = Intrinsic::aarch64_neon_smaxv; 6141 Ty = Int32Ty; 6142 VTy = llvm::VectorType::get(Int8Ty, 8); 6143 llvm::Type *Tys[2] = { Ty, VTy }; 6144 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6145 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6146 return Builder.CreateTrunc(Ops[0], Int8Ty); 6147 } 6148 case NEON::BI__builtin_neon_vmaxv_s16: { 6149 Int = Intrinsic::aarch64_neon_smaxv; 6150 Ty = Int32Ty; 6151 VTy = llvm::VectorType::get(Int16Ty, 4); 6152 llvm::Type *Tys[2] = { Ty, VTy }; 6153 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6154 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6155 return Builder.CreateTrunc(Ops[0], Int16Ty); 6156 } 6157 case NEON::BI__builtin_neon_vmaxvq_s8: { 6158 Int = Intrinsic::aarch64_neon_smaxv; 6159 Ty = Int32Ty; 6160 VTy = llvm::VectorType::get(Int8Ty, 16); 6161 llvm::Type *Tys[2] = { Ty, VTy }; 6162 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6163 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6164 return Builder.CreateTrunc(Ops[0], Int8Ty); 6165 } 6166 case NEON::BI__builtin_neon_vmaxvq_s16: { 6167 Int = Intrinsic::aarch64_neon_smaxv; 6168 Ty = Int32Ty; 6169 VTy = llvm::VectorType::get(Int16Ty, 8); 6170 llvm::Type *Tys[2] = { Ty, VTy }; 6171 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6172 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6173 return Builder.CreateTrunc(Ops[0], Int16Ty); 6174 } 6175 case NEON::BI__builtin_neon_vminv_u8: { 6176 Int = Intrinsic::aarch64_neon_uminv; 6177 Ty = Int32Ty; 6178 VTy = llvm::VectorType::get(Int8Ty, 8); 6179 llvm::Type *Tys[2] = { Ty, VTy }; 6180 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6181 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6182 return Builder.CreateTrunc(Ops[0], Int8Ty); 6183 } 6184 case NEON::BI__builtin_neon_vminv_u16: { 6185 Int = Intrinsic::aarch64_neon_uminv; 6186 Ty = Int32Ty; 6187 VTy = llvm::VectorType::get(Int16Ty, 4); 6188 llvm::Type *Tys[2] = { Ty, VTy }; 6189 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6190 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6191 return Builder.CreateTrunc(Ops[0], Int16Ty); 6192 } 6193 case NEON::BI__builtin_neon_vminvq_u8: { 6194 Int = Intrinsic::aarch64_neon_uminv; 6195 Ty = Int32Ty; 6196 VTy = llvm::VectorType::get(Int8Ty, 16); 6197 llvm::Type *Tys[2] = { Ty, VTy }; 6198 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6199 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6200 return Builder.CreateTrunc(Ops[0], Int8Ty); 6201 } 6202 case NEON::BI__builtin_neon_vminvq_u16: { 6203 Int = Intrinsic::aarch64_neon_uminv; 6204 Ty = Int32Ty; 6205 VTy = llvm::VectorType::get(Int16Ty, 8); 6206 llvm::Type *Tys[2] = { Ty, VTy }; 6207 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6208 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6209 return Builder.CreateTrunc(Ops[0], Int16Ty); 6210 } 6211 case NEON::BI__builtin_neon_vminv_s8: { 6212 Int = Intrinsic::aarch64_neon_sminv; 6213 Ty = Int32Ty; 6214 VTy = llvm::VectorType::get(Int8Ty, 8); 6215 llvm::Type *Tys[2] = { Ty, VTy }; 6216 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6217 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6218 return Builder.CreateTrunc(Ops[0], Int8Ty); 6219 } 6220 case NEON::BI__builtin_neon_vminv_s16: { 6221 Int = Intrinsic::aarch64_neon_sminv; 6222 Ty = Int32Ty; 6223 VTy = llvm::VectorType::get(Int16Ty, 4); 6224 llvm::Type *Tys[2] = { Ty, VTy }; 6225 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6226 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6227 return Builder.CreateTrunc(Ops[0], Int16Ty); 6228 } 6229 case NEON::BI__builtin_neon_vminvq_s8: { 6230 Int = Intrinsic::aarch64_neon_sminv; 6231 Ty = Int32Ty; 6232 VTy = llvm::VectorType::get(Int8Ty, 16); 6233 llvm::Type *Tys[2] = { Ty, VTy }; 6234 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6235 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6236 return Builder.CreateTrunc(Ops[0], Int8Ty); 6237 } 6238 case NEON::BI__builtin_neon_vminvq_s16: { 6239 Int = Intrinsic::aarch64_neon_sminv; 6240 Ty = Int32Ty; 6241 VTy = llvm::VectorType::get(Int16Ty, 8); 6242 llvm::Type *Tys[2] = { Ty, VTy }; 6243 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6244 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6245 return Builder.CreateTrunc(Ops[0], Int16Ty); 6246 } 6247 case NEON::BI__builtin_neon_vmul_n_f64: { 6248 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 6249 Value *RHS = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), DoubleTy); 6250 return Builder.CreateFMul(Ops[0], RHS); 6251 } 6252 case NEON::BI__builtin_neon_vaddlv_u8: { 6253 Int = Intrinsic::aarch64_neon_uaddlv; 6254 Ty = Int32Ty; 6255 VTy = llvm::VectorType::get(Int8Ty, 8); 6256 llvm::Type *Tys[2] = { Ty, VTy }; 6257 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6258 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6259 return Builder.CreateTrunc(Ops[0], Int16Ty); 6260 } 6261 case NEON::BI__builtin_neon_vaddlv_u16: { 6262 Int = Intrinsic::aarch64_neon_uaddlv; 6263 Ty = Int32Ty; 6264 VTy = llvm::VectorType::get(Int16Ty, 4); 6265 llvm::Type *Tys[2] = { Ty, VTy }; 6266 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6267 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6268 } 6269 case NEON::BI__builtin_neon_vaddlvq_u8: { 6270 Int = Intrinsic::aarch64_neon_uaddlv; 6271 Ty = Int32Ty; 6272 VTy = llvm::VectorType::get(Int8Ty, 16); 6273 llvm::Type *Tys[2] = { Ty, VTy }; 6274 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6275 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6276 return Builder.CreateTrunc(Ops[0], Int16Ty); 6277 } 6278 case NEON::BI__builtin_neon_vaddlvq_u16: { 6279 Int = Intrinsic::aarch64_neon_uaddlv; 6280 Ty = Int32Ty; 6281 VTy = llvm::VectorType::get(Int16Ty, 8); 6282 llvm::Type *Tys[2] = { Ty, VTy }; 6283 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6284 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6285 } 6286 case NEON::BI__builtin_neon_vaddlv_s8: { 6287 Int = Intrinsic::aarch64_neon_saddlv; 6288 Ty = Int32Ty; 6289 VTy = llvm::VectorType::get(Int8Ty, 8); 6290 llvm::Type *Tys[2] = { Ty, VTy }; 6291 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6292 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6293 return Builder.CreateTrunc(Ops[0], Int16Ty); 6294 } 6295 case NEON::BI__builtin_neon_vaddlv_s16: { 6296 Int = Intrinsic::aarch64_neon_saddlv; 6297 Ty = Int32Ty; 6298 VTy = llvm::VectorType::get(Int16Ty, 4); 6299 llvm::Type *Tys[2] = { Ty, VTy }; 6300 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6301 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6302 } 6303 case NEON::BI__builtin_neon_vaddlvq_s8: { 6304 Int = Intrinsic::aarch64_neon_saddlv; 6305 Ty = Int32Ty; 6306 VTy = llvm::VectorType::get(Int8Ty, 16); 6307 llvm::Type *Tys[2] = { Ty, VTy }; 6308 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6309 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6310 return Builder.CreateTrunc(Ops[0], Int16Ty); 6311 } 6312 case NEON::BI__builtin_neon_vaddlvq_s16: { 6313 Int = Intrinsic::aarch64_neon_saddlv; 6314 Ty = Int32Ty; 6315 VTy = llvm::VectorType::get(Int16Ty, 8); 6316 llvm::Type *Tys[2] = { Ty, VTy }; 6317 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6318 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6319 } 6320 case NEON::BI__builtin_neon_vsri_n_v: 6321 case NEON::BI__builtin_neon_vsriq_n_v: { 6322 Int = Intrinsic::aarch64_neon_vsri; 6323 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 6324 return EmitNeonCall(Intrin, Ops, "vsri_n"); 6325 } 6326 case NEON::BI__builtin_neon_vsli_n_v: 6327 case NEON::BI__builtin_neon_vsliq_n_v: { 6328 Int = Intrinsic::aarch64_neon_vsli; 6329 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 6330 return EmitNeonCall(Intrin, Ops, "vsli_n"); 6331 } 6332 case NEON::BI__builtin_neon_vsra_n_v: 6333 case NEON::BI__builtin_neon_vsraq_n_v: 6334 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6335 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 6336 return Builder.CreateAdd(Ops[0], Ops[1]); 6337 case NEON::BI__builtin_neon_vrsra_n_v: 6338 case NEON::BI__builtin_neon_vrsraq_n_v: { 6339 Int = usgn ? Intrinsic::aarch64_neon_urshl : Intrinsic::aarch64_neon_srshl; 6340 SmallVector<llvm::Value*,2> TmpOps; 6341 TmpOps.push_back(Ops[1]); 6342 TmpOps.push_back(Ops[2]); 6343 Function* F = CGM.getIntrinsic(Int, Ty); 6344 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vrshr_n", 1, true); 6345 Ops[0] = Builder.CreateBitCast(Ops[0], VTy); 6346 return Builder.CreateAdd(Ops[0], tmp); 6347 } 6348 // FIXME: Sharing loads & stores with 32-bit is complicated by the absence 6349 // of an Align parameter here. 6350 case NEON::BI__builtin_neon_vld1_x2_v: 6351 case NEON::BI__builtin_neon_vld1q_x2_v: 6352 case NEON::BI__builtin_neon_vld1_x3_v: 6353 case NEON::BI__builtin_neon_vld1q_x3_v: 6354 case NEON::BI__builtin_neon_vld1_x4_v: 6355 case NEON::BI__builtin_neon_vld1q_x4_v: { 6356 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 6357 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6358 llvm::Type *Tys[2] = { VTy, PTy }; 6359 unsigned Int; 6360 switch (BuiltinID) { 6361 case NEON::BI__builtin_neon_vld1_x2_v: 6362 case NEON::BI__builtin_neon_vld1q_x2_v: 6363 Int = Intrinsic::aarch64_neon_ld1x2; 6364 break; 6365 case NEON::BI__builtin_neon_vld1_x3_v: 6366 case NEON::BI__builtin_neon_vld1q_x3_v: 6367 Int = Intrinsic::aarch64_neon_ld1x3; 6368 break; 6369 case NEON::BI__builtin_neon_vld1_x4_v: 6370 case NEON::BI__builtin_neon_vld1q_x4_v: 6371 Int = Intrinsic::aarch64_neon_ld1x4; 6372 break; 6373 } 6374 Function *F = CGM.getIntrinsic(Int, Tys); 6375 Ops[1] = Builder.CreateCall(F, Ops[1], "vld1xN"); 6376 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6377 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6378 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6379 } 6380 case NEON::BI__builtin_neon_vst1_x2_v: 6381 case NEON::BI__builtin_neon_vst1q_x2_v: 6382 case NEON::BI__builtin_neon_vst1_x3_v: 6383 case NEON::BI__builtin_neon_vst1q_x3_v: 6384 case NEON::BI__builtin_neon_vst1_x4_v: 6385 case NEON::BI__builtin_neon_vst1q_x4_v: { 6386 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 6387 llvm::Type *Tys[2] = { VTy, PTy }; 6388 unsigned Int; 6389 switch (BuiltinID) { 6390 case NEON::BI__builtin_neon_vst1_x2_v: 6391 case NEON::BI__builtin_neon_vst1q_x2_v: 6392 Int = Intrinsic::aarch64_neon_st1x2; 6393 break; 6394 case NEON::BI__builtin_neon_vst1_x3_v: 6395 case NEON::BI__builtin_neon_vst1q_x3_v: 6396 Int = Intrinsic::aarch64_neon_st1x3; 6397 break; 6398 case NEON::BI__builtin_neon_vst1_x4_v: 6399 case NEON::BI__builtin_neon_vst1q_x4_v: 6400 Int = Intrinsic::aarch64_neon_st1x4; 6401 break; 6402 } 6403 std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end()); 6404 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 6405 } 6406 case NEON::BI__builtin_neon_vld1_v: 6407 case NEON::BI__builtin_neon_vld1q_v: 6408 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 6409 return Builder.CreateDefaultAlignedLoad(Ops[0]); 6410 case NEON::BI__builtin_neon_vst1_v: 6411 case NEON::BI__builtin_neon_vst1q_v: 6412 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 6413 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 6414 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6415 case NEON::BI__builtin_neon_vld1_lane_v: 6416 case NEON::BI__builtin_neon_vld1q_lane_v: 6417 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6418 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 6419 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6420 Ops[0] = Builder.CreateDefaultAlignedLoad(Ops[0]); 6421 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vld1_lane"); 6422 case NEON::BI__builtin_neon_vld1_dup_v: 6423 case NEON::BI__builtin_neon_vld1q_dup_v: { 6424 Value *V = UndefValue::get(Ty); 6425 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 6426 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6427 Ops[0] = Builder.CreateDefaultAlignedLoad(Ops[0]); 6428 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 6429 Ops[0] = Builder.CreateInsertElement(V, Ops[0], CI); 6430 return EmitNeonSplat(Ops[0], CI); 6431 } 6432 case NEON::BI__builtin_neon_vst1_lane_v: 6433 case NEON::BI__builtin_neon_vst1q_lane_v: 6434 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6435 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 6436 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6437 return Builder.CreateDefaultAlignedStore(Ops[1], 6438 Builder.CreateBitCast(Ops[0], Ty)); 6439 case NEON::BI__builtin_neon_vld2_v: 6440 case NEON::BI__builtin_neon_vld2q_v: { 6441 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 6442 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6443 llvm::Type *Tys[2] = { VTy, PTy }; 6444 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2, Tys); 6445 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 6446 Ops[0] = Builder.CreateBitCast(Ops[0], 6447 llvm::PointerType::getUnqual(Ops[1]->getType())); 6448 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6449 } 6450 case NEON::BI__builtin_neon_vld3_v: 6451 case NEON::BI__builtin_neon_vld3q_v: { 6452 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 6453 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6454 llvm::Type *Tys[2] = { VTy, PTy }; 6455 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3, Tys); 6456 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 6457 Ops[0] = Builder.CreateBitCast(Ops[0], 6458 llvm::PointerType::getUnqual(Ops[1]->getType())); 6459 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6460 } 6461 case NEON::BI__builtin_neon_vld4_v: 6462 case NEON::BI__builtin_neon_vld4q_v: { 6463 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 6464 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6465 llvm::Type *Tys[2] = { VTy, PTy }; 6466 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4, Tys); 6467 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 6468 Ops[0] = Builder.CreateBitCast(Ops[0], 6469 llvm::PointerType::getUnqual(Ops[1]->getType())); 6470 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6471 } 6472 case NEON::BI__builtin_neon_vld2_dup_v: 6473 case NEON::BI__builtin_neon_vld2q_dup_v: { 6474 llvm::Type *PTy = 6475 llvm::PointerType::getUnqual(VTy->getElementType()); 6476 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6477 llvm::Type *Tys[2] = { VTy, PTy }; 6478 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2r, Tys); 6479 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 6480 Ops[0] = Builder.CreateBitCast(Ops[0], 6481 llvm::PointerType::getUnqual(Ops[1]->getType())); 6482 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6483 } 6484 case NEON::BI__builtin_neon_vld3_dup_v: 6485 case NEON::BI__builtin_neon_vld3q_dup_v: { 6486 llvm::Type *PTy = 6487 llvm::PointerType::getUnqual(VTy->getElementType()); 6488 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6489 llvm::Type *Tys[2] = { VTy, PTy }; 6490 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3r, Tys); 6491 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 6492 Ops[0] = Builder.CreateBitCast(Ops[0], 6493 llvm::PointerType::getUnqual(Ops[1]->getType())); 6494 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6495 } 6496 case NEON::BI__builtin_neon_vld4_dup_v: 6497 case NEON::BI__builtin_neon_vld4q_dup_v: { 6498 llvm::Type *PTy = 6499 llvm::PointerType::getUnqual(VTy->getElementType()); 6500 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6501 llvm::Type *Tys[2] = { VTy, PTy }; 6502 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4r, Tys); 6503 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 6504 Ops[0] = Builder.CreateBitCast(Ops[0], 6505 llvm::PointerType::getUnqual(Ops[1]->getType())); 6506 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6507 } 6508 case NEON::BI__builtin_neon_vld2_lane_v: 6509 case NEON::BI__builtin_neon_vld2q_lane_v: { 6510 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 6511 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2lane, Tys); 6512 Ops.push_back(Ops[1]); 6513 Ops.erase(Ops.begin()+1); 6514 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6515 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6516 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 6517 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld2_lane"); 6518 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6519 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6520 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6521 } 6522 case NEON::BI__builtin_neon_vld3_lane_v: 6523 case NEON::BI__builtin_neon_vld3q_lane_v: { 6524 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 6525 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3lane, Tys); 6526 Ops.push_back(Ops[1]); 6527 Ops.erase(Ops.begin()+1); 6528 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6529 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6530 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 6531 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 6532 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld3_lane"); 6533 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6534 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6535 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6536 } 6537 case NEON::BI__builtin_neon_vld4_lane_v: 6538 case NEON::BI__builtin_neon_vld4q_lane_v: { 6539 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 6540 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4lane, Tys); 6541 Ops.push_back(Ops[1]); 6542 Ops.erase(Ops.begin()+1); 6543 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6544 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6545 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 6546 Ops[4] = Builder.CreateBitCast(Ops[4], Ty); 6547 Ops[5] = Builder.CreateZExt(Ops[5], Int64Ty); 6548 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld4_lane"); 6549 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6550 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6551 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6552 } 6553 case NEON::BI__builtin_neon_vst2_v: 6554 case NEON::BI__builtin_neon_vst2q_v: { 6555 Ops.push_back(Ops[0]); 6556 Ops.erase(Ops.begin()); 6557 llvm::Type *Tys[2] = { VTy, Ops[2]->getType() }; 6558 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2, Tys), 6559 Ops, ""); 6560 } 6561 case NEON::BI__builtin_neon_vst2_lane_v: 6562 case NEON::BI__builtin_neon_vst2q_lane_v: { 6563 Ops.push_back(Ops[0]); 6564 Ops.erase(Ops.begin()); 6565 Ops[2] = Builder.CreateZExt(Ops[2], Int64Ty); 6566 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 6567 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2lane, Tys), 6568 Ops, ""); 6569 } 6570 case NEON::BI__builtin_neon_vst3_v: 6571 case NEON::BI__builtin_neon_vst3q_v: { 6572 Ops.push_back(Ops[0]); 6573 Ops.erase(Ops.begin()); 6574 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 6575 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3, Tys), 6576 Ops, ""); 6577 } 6578 case NEON::BI__builtin_neon_vst3_lane_v: 6579 case NEON::BI__builtin_neon_vst3q_lane_v: { 6580 Ops.push_back(Ops[0]); 6581 Ops.erase(Ops.begin()); 6582 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 6583 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 6584 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3lane, Tys), 6585 Ops, ""); 6586 } 6587 case NEON::BI__builtin_neon_vst4_v: 6588 case NEON::BI__builtin_neon_vst4q_v: { 6589 Ops.push_back(Ops[0]); 6590 Ops.erase(Ops.begin()); 6591 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 6592 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4, Tys), 6593 Ops, ""); 6594 } 6595 case NEON::BI__builtin_neon_vst4_lane_v: 6596 case NEON::BI__builtin_neon_vst4q_lane_v: { 6597 Ops.push_back(Ops[0]); 6598 Ops.erase(Ops.begin()); 6599 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 6600 llvm::Type *Tys[2] = { VTy, Ops[5]->getType() }; 6601 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4lane, Tys), 6602 Ops, ""); 6603 } 6604 case NEON::BI__builtin_neon_vtrn_v: 6605 case NEON::BI__builtin_neon_vtrnq_v: { 6606 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 6607 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6608 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6609 Value *SV = nullptr; 6610 6611 for (unsigned vi = 0; vi != 2; ++vi) { 6612 SmallVector<uint32_t, 16> Indices; 6613 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 6614 Indices.push_back(i+vi); 6615 Indices.push_back(i+e+vi); 6616 } 6617 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6618 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 6619 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6620 } 6621 return SV; 6622 } 6623 case NEON::BI__builtin_neon_vuzp_v: 6624 case NEON::BI__builtin_neon_vuzpq_v: { 6625 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 6626 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6627 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6628 Value *SV = nullptr; 6629 6630 for (unsigned vi = 0; vi != 2; ++vi) { 6631 SmallVector<uint32_t, 16> Indices; 6632 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 6633 Indices.push_back(2*i+vi); 6634 6635 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6636 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 6637 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6638 } 6639 return SV; 6640 } 6641 case NEON::BI__builtin_neon_vzip_v: 6642 case NEON::BI__builtin_neon_vzipq_v: { 6643 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 6644 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6645 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6646 Value *SV = nullptr; 6647 6648 for (unsigned vi = 0; vi != 2; ++vi) { 6649 SmallVector<uint32_t, 16> Indices; 6650 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 6651 Indices.push_back((i + vi*e) >> 1); 6652 Indices.push_back(((i + vi*e) >> 1)+e); 6653 } 6654 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6655 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 6656 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6657 } 6658 return SV; 6659 } 6660 case NEON::BI__builtin_neon_vqtbl1q_v: { 6661 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl1, Ty), 6662 Ops, "vtbl1"); 6663 } 6664 case NEON::BI__builtin_neon_vqtbl2q_v: { 6665 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl2, Ty), 6666 Ops, "vtbl2"); 6667 } 6668 case NEON::BI__builtin_neon_vqtbl3q_v: { 6669 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl3, Ty), 6670 Ops, "vtbl3"); 6671 } 6672 case NEON::BI__builtin_neon_vqtbl4q_v: { 6673 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl4, Ty), 6674 Ops, "vtbl4"); 6675 } 6676 case NEON::BI__builtin_neon_vqtbx1q_v: { 6677 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx1, Ty), 6678 Ops, "vtbx1"); 6679 } 6680 case NEON::BI__builtin_neon_vqtbx2q_v: { 6681 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx2, Ty), 6682 Ops, "vtbx2"); 6683 } 6684 case NEON::BI__builtin_neon_vqtbx3q_v: { 6685 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx3, Ty), 6686 Ops, "vtbx3"); 6687 } 6688 case NEON::BI__builtin_neon_vqtbx4q_v: { 6689 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx4, Ty), 6690 Ops, "vtbx4"); 6691 } 6692 case NEON::BI__builtin_neon_vsqadd_v: 6693 case NEON::BI__builtin_neon_vsqaddq_v: { 6694 Int = Intrinsic::aarch64_neon_usqadd; 6695 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqadd"); 6696 } 6697 case NEON::BI__builtin_neon_vuqadd_v: 6698 case NEON::BI__builtin_neon_vuqaddq_v: { 6699 Int = Intrinsic::aarch64_neon_suqadd; 6700 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vuqadd"); 6701 } 6702 } 6703 } 6704 6705 llvm::Value *CodeGenFunction:: 6706 BuildVector(ArrayRef<llvm::Value*> Ops) { 6707 assert((Ops.size() & (Ops.size() - 1)) == 0 && 6708 "Not a power-of-two sized vector!"); 6709 bool AllConstants = true; 6710 for (unsigned i = 0, e = Ops.size(); i != e && AllConstants; ++i) 6711 AllConstants &= isa<Constant>(Ops[i]); 6712 6713 // If this is a constant vector, create a ConstantVector. 6714 if (AllConstants) { 6715 SmallVector<llvm::Constant*, 16> CstOps; 6716 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 6717 CstOps.push_back(cast<Constant>(Ops[i])); 6718 return llvm::ConstantVector::get(CstOps); 6719 } 6720 6721 // Otherwise, insertelement the values to build the vector. 6722 Value *Result = 6723 llvm::UndefValue::get(llvm::VectorType::get(Ops[0]->getType(), Ops.size())); 6724 6725 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 6726 Result = Builder.CreateInsertElement(Result, Ops[i], Builder.getInt32(i)); 6727 6728 return Result; 6729 } 6730 6731 // Convert the mask from an integer type to a vector of i1. 6732 static Value *getMaskVecValue(CodeGenFunction &CGF, Value *Mask, 6733 unsigned NumElts) { 6734 6735 llvm::VectorType *MaskTy = llvm::VectorType::get(CGF.Builder.getInt1Ty(), 6736 cast<IntegerType>(Mask->getType())->getBitWidth()); 6737 Value *MaskVec = CGF.Builder.CreateBitCast(Mask, MaskTy); 6738 6739 // If we have less than 8 elements, then the starting mask was an i8 and 6740 // we need to extract down to the right number of elements. 6741 if (NumElts < 8) { 6742 uint32_t Indices[4]; 6743 for (unsigned i = 0; i != NumElts; ++i) 6744 Indices[i] = i; 6745 MaskVec = CGF.Builder.CreateShuffleVector(MaskVec, MaskVec, 6746 makeArrayRef(Indices, NumElts), 6747 "extract"); 6748 } 6749 return MaskVec; 6750 } 6751 6752 static Value *EmitX86MaskedStore(CodeGenFunction &CGF, 6753 SmallVectorImpl<Value *> &Ops, 6754 unsigned Align) { 6755 // Cast the pointer to right type. 6756 Ops[0] = CGF.Builder.CreateBitCast(Ops[0], 6757 llvm::PointerType::getUnqual(Ops[1]->getType())); 6758 6759 // If the mask is all ones just emit a regular store. 6760 if (const auto *C = dyn_cast<Constant>(Ops[2])) 6761 if (C->isAllOnesValue()) 6762 return CGF.Builder.CreateAlignedStore(Ops[1], Ops[0], Align); 6763 6764 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 6765 Ops[1]->getType()->getVectorNumElements()); 6766 6767 return CGF.Builder.CreateMaskedStore(Ops[1], Ops[0], Align, MaskVec); 6768 } 6769 6770 static Value *EmitX86MaskedLoad(CodeGenFunction &CGF, 6771 SmallVectorImpl<Value *> &Ops, unsigned Align) { 6772 // Cast the pointer to right type. 6773 Ops[0] = CGF.Builder.CreateBitCast(Ops[0], 6774 llvm::PointerType::getUnqual(Ops[1]->getType())); 6775 6776 // If the mask is all ones just emit a regular store. 6777 if (const auto *C = dyn_cast<Constant>(Ops[2])) 6778 if (C->isAllOnesValue()) 6779 return CGF.Builder.CreateAlignedLoad(Ops[0], Align); 6780 6781 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 6782 Ops[1]->getType()->getVectorNumElements()); 6783 6784 return CGF.Builder.CreateMaskedLoad(Ops[0], Align, MaskVec, Ops[1]); 6785 } 6786 6787 static Value *EmitX86SubVectorBroadcast(CodeGenFunction &CGF, 6788 SmallVectorImpl<Value *> &Ops, 6789 llvm::Type *DstTy, 6790 unsigned SrcSizeInBits, 6791 unsigned Align) { 6792 // Load the subvector. 6793 Ops[0] = CGF.Builder.CreateAlignedLoad(Ops[0], Align); 6794 6795 // Create broadcast mask. 6796 unsigned NumDstElts = DstTy->getVectorNumElements(); 6797 unsigned NumSrcElts = SrcSizeInBits / DstTy->getScalarSizeInBits(); 6798 6799 SmallVector<uint32_t, 8> Mask; 6800 for (unsigned i = 0; i != NumDstElts; i += NumSrcElts) 6801 for (unsigned j = 0; j != NumSrcElts; ++j) 6802 Mask.push_back(j); 6803 6804 return CGF.Builder.CreateShuffleVector(Ops[0], Ops[0], Mask, "subvecbcst"); 6805 } 6806 6807 static Value *EmitX86Select(CodeGenFunction &CGF, 6808 Value *Mask, Value *Op0, Value *Op1) { 6809 6810 // If the mask is all ones just return first argument. 6811 if (const auto *C = dyn_cast<Constant>(Mask)) 6812 if (C->isAllOnesValue()) 6813 return Op0; 6814 6815 Mask = getMaskVecValue(CGF, Mask, Op0->getType()->getVectorNumElements()); 6816 6817 return CGF.Builder.CreateSelect(Mask, Op0, Op1); 6818 } 6819 6820 static Value *EmitX86MaskedCompare(CodeGenFunction &CGF, unsigned CC, 6821 bool Signed, SmallVectorImpl<Value *> &Ops) { 6822 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 6823 Value *Cmp; 6824 6825 if (CC == 3) { 6826 Cmp = Constant::getNullValue( 6827 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 6828 } else if (CC == 7) { 6829 Cmp = Constant::getAllOnesValue( 6830 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 6831 } else { 6832 ICmpInst::Predicate Pred; 6833 switch (CC) { 6834 default: llvm_unreachable("Unknown condition code"); 6835 case 0: Pred = ICmpInst::ICMP_EQ; break; 6836 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 6837 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 6838 case 4: Pred = ICmpInst::ICMP_NE; break; 6839 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 6840 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 6841 } 6842 Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 6843 } 6844 6845 const auto *C = dyn_cast<Constant>(Ops.back()); 6846 if (!C || !C->isAllOnesValue()) 6847 Cmp = CGF.Builder.CreateAnd(Cmp, getMaskVecValue(CGF, Ops.back(), NumElts)); 6848 6849 if (NumElts < 8) { 6850 uint32_t Indices[8]; 6851 for (unsigned i = 0; i != NumElts; ++i) 6852 Indices[i] = i; 6853 for (unsigned i = NumElts; i != 8; ++i) 6854 Indices[i] = i % NumElts + NumElts; 6855 Cmp = CGF.Builder.CreateShuffleVector( 6856 Cmp, llvm::Constant::getNullValue(Cmp->getType()), Indices); 6857 } 6858 return CGF.Builder.CreateBitCast(Cmp, 6859 IntegerType::get(CGF.getLLVMContext(), 6860 std::max(NumElts, 8U))); 6861 } 6862 6863 Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, 6864 const CallExpr *E) { 6865 if (BuiltinID == X86::BI__builtin_ms_va_start || 6866 BuiltinID == X86::BI__builtin_ms_va_end) 6867 return EmitVAStartEnd(EmitMSVAListRef(E->getArg(0)).getPointer(), 6868 BuiltinID == X86::BI__builtin_ms_va_start); 6869 if (BuiltinID == X86::BI__builtin_ms_va_copy) { 6870 // Lower this manually. We can't reliably determine whether or not any 6871 // given va_copy() is for a Win64 va_list from the calling convention 6872 // alone, because it's legal to do this from a System V ABI function. 6873 // With opaque pointer types, we won't have enough information in LLVM 6874 // IR to determine this from the argument types, either. Best to do it 6875 // now, while we have enough information. 6876 Address DestAddr = EmitMSVAListRef(E->getArg(0)); 6877 Address SrcAddr = EmitMSVAListRef(E->getArg(1)); 6878 6879 llvm::Type *BPP = Int8PtrPtrTy; 6880 6881 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), BPP, "cp"), 6882 DestAddr.getAlignment()); 6883 SrcAddr = Address(Builder.CreateBitCast(SrcAddr.getPointer(), BPP, "ap"), 6884 SrcAddr.getAlignment()); 6885 6886 Value *ArgPtr = Builder.CreateLoad(SrcAddr, "ap.val"); 6887 return Builder.CreateStore(ArgPtr, DestAddr); 6888 } 6889 6890 SmallVector<Value*, 4> Ops; 6891 6892 // Find out if any arguments are required to be integer constant expressions. 6893 unsigned ICEArguments = 0; 6894 ASTContext::GetBuiltinTypeError Error; 6895 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 6896 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 6897 6898 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) { 6899 // If this is a normal argument, just emit it as a scalar. 6900 if ((ICEArguments & (1 << i)) == 0) { 6901 Ops.push_back(EmitScalarExpr(E->getArg(i))); 6902 continue; 6903 } 6904 6905 // If this is required to be a constant, constant fold it so that we know 6906 // that the generated intrinsic gets a ConstantInt. 6907 llvm::APSInt Result; 6908 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 6909 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 6910 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 6911 } 6912 6913 // These exist so that the builtin that takes an immediate can be bounds 6914 // checked by clang to avoid passing bad immediates to the backend. Since 6915 // AVX has a larger immediate than SSE we would need separate builtins to 6916 // do the different bounds checking. Rather than create a clang specific 6917 // SSE only builtin, this implements eight separate builtins to match gcc 6918 // implementation. 6919 auto getCmpIntrinsicCall = [this, &Ops](Intrinsic::ID ID, unsigned Imm) { 6920 Ops.push_back(llvm::ConstantInt::get(Int8Ty, Imm)); 6921 llvm::Function *F = CGM.getIntrinsic(ID); 6922 return Builder.CreateCall(F, Ops); 6923 }; 6924 6925 // For the vector forms of FP comparisons, translate the builtins directly to 6926 // IR. 6927 // TODO: The builtins could be removed if the SSE header files used vector 6928 // extension comparisons directly (vector ordered/unordered may need 6929 // additional support via __builtin_isnan()). 6930 auto getVectorFCmpIR = [this, &Ops](CmpInst::Predicate Pred) { 6931 Value *Cmp = Builder.CreateFCmp(Pred, Ops[0], Ops[1]); 6932 llvm::VectorType *FPVecTy = cast<llvm::VectorType>(Ops[0]->getType()); 6933 llvm::VectorType *IntVecTy = llvm::VectorType::getInteger(FPVecTy); 6934 Value *Sext = Builder.CreateSExt(Cmp, IntVecTy); 6935 return Builder.CreateBitCast(Sext, FPVecTy); 6936 }; 6937 6938 switch (BuiltinID) { 6939 default: return nullptr; 6940 case X86::BI__builtin_cpu_supports: { 6941 const Expr *FeatureExpr = E->getArg(0)->IgnoreParenCasts(); 6942 StringRef FeatureStr = cast<StringLiteral>(FeatureExpr)->getString(); 6943 6944 // TODO: When/if this becomes more than x86 specific then use a TargetInfo 6945 // based mapping. 6946 // Processor features and mapping to processor feature value. 6947 enum X86Features { 6948 CMOV = 0, 6949 MMX, 6950 POPCNT, 6951 SSE, 6952 SSE2, 6953 SSE3, 6954 SSSE3, 6955 SSE4_1, 6956 SSE4_2, 6957 AVX, 6958 AVX2, 6959 SSE4_A, 6960 FMA4, 6961 XOP, 6962 FMA, 6963 AVX512F, 6964 BMI, 6965 BMI2, 6966 AES, 6967 PCLMUL, 6968 AVX512VL, 6969 AVX512BW, 6970 AVX512DQ, 6971 AVX512CD, 6972 AVX512ER, 6973 AVX512PF, 6974 AVX512VBMI, 6975 AVX512IFMA, 6976 MAX 6977 }; 6978 6979 X86Features Feature = StringSwitch<X86Features>(FeatureStr) 6980 .Case("cmov", X86Features::CMOV) 6981 .Case("mmx", X86Features::MMX) 6982 .Case("popcnt", X86Features::POPCNT) 6983 .Case("sse", X86Features::SSE) 6984 .Case("sse2", X86Features::SSE2) 6985 .Case("sse3", X86Features::SSE3) 6986 .Case("ssse3", X86Features::SSSE3) 6987 .Case("sse4.1", X86Features::SSE4_1) 6988 .Case("sse4.2", X86Features::SSE4_2) 6989 .Case("avx", X86Features::AVX) 6990 .Case("avx2", X86Features::AVX2) 6991 .Case("sse4a", X86Features::SSE4_A) 6992 .Case("fma4", X86Features::FMA4) 6993 .Case("xop", X86Features::XOP) 6994 .Case("fma", X86Features::FMA) 6995 .Case("avx512f", X86Features::AVX512F) 6996 .Case("bmi", X86Features::BMI) 6997 .Case("bmi2", X86Features::BMI2) 6998 .Case("aes", X86Features::AES) 6999 .Case("pclmul", X86Features::PCLMUL) 7000 .Case("avx512vl", X86Features::AVX512VL) 7001 .Case("avx512bw", X86Features::AVX512BW) 7002 .Case("avx512dq", X86Features::AVX512DQ) 7003 .Case("avx512cd", X86Features::AVX512CD) 7004 .Case("avx512er", X86Features::AVX512ER) 7005 .Case("avx512pf", X86Features::AVX512PF) 7006 .Case("avx512vbmi", X86Features::AVX512VBMI) 7007 .Case("avx512ifma", X86Features::AVX512IFMA) 7008 .Default(X86Features::MAX); 7009 assert(Feature != X86Features::MAX && "Invalid feature!"); 7010 7011 // Matching the struct layout from the compiler-rt/libgcc structure that is 7012 // filled in: 7013 // unsigned int __cpu_vendor; 7014 // unsigned int __cpu_type; 7015 // unsigned int __cpu_subtype; 7016 // unsigned int __cpu_features[1]; 7017 llvm::Type *STy = llvm::StructType::get( 7018 Int32Ty, Int32Ty, Int32Ty, llvm::ArrayType::get(Int32Ty, 1), nullptr); 7019 7020 // Grab the global __cpu_model. 7021 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 7022 7023 // Grab the first (0th) element from the field __cpu_features off of the 7024 // global in the struct STy. 7025 Value *Idxs[] = { 7026 ConstantInt::get(Int32Ty, 0), 7027 ConstantInt::get(Int32Ty, 3), 7028 ConstantInt::get(Int32Ty, 0) 7029 }; 7030 Value *CpuFeatures = Builder.CreateGEP(STy, CpuModel, Idxs); 7031 Value *Features = Builder.CreateAlignedLoad(CpuFeatures, 7032 CharUnits::fromQuantity(4)); 7033 7034 // Check the value of the bit corresponding to the feature requested. 7035 Value *Bitset = Builder.CreateAnd( 7036 Features, llvm::ConstantInt::get(Int32Ty, 1ULL << Feature)); 7037 return Builder.CreateICmpNE(Bitset, llvm::ConstantInt::get(Int32Ty, 0)); 7038 } 7039 case X86::BI_mm_prefetch: { 7040 Value *Address = Ops[0]; 7041 Value *RW = ConstantInt::get(Int32Ty, 0); 7042 Value *Locality = Ops[1]; 7043 Value *Data = ConstantInt::get(Int32Ty, 1); 7044 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 7045 return Builder.CreateCall(F, {Address, RW, Locality, Data}); 7046 } 7047 case X86::BI_mm_clflush: { 7048 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_clflush), 7049 Ops[0]); 7050 } 7051 case X86::BI_mm_lfence: { 7052 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_lfence)); 7053 } 7054 case X86::BI_mm_mfence: { 7055 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_mfence)); 7056 } 7057 case X86::BI_mm_sfence: { 7058 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_sfence)); 7059 } 7060 case X86::BI_mm_pause: { 7061 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_pause)); 7062 } 7063 case X86::BI__rdtsc: { 7064 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_rdtsc)); 7065 } 7066 case X86::BI__builtin_ia32_undef128: 7067 case X86::BI__builtin_ia32_undef256: 7068 case X86::BI__builtin_ia32_undef512: 7069 return UndefValue::get(ConvertType(E->getType())); 7070 case X86::BI__builtin_ia32_vec_init_v8qi: 7071 case X86::BI__builtin_ia32_vec_init_v4hi: 7072 case X86::BI__builtin_ia32_vec_init_v2si: 7073 return Builder.CreateBitCast(BuildVector(Ops), 7074 llvm::Type::getX86_MMXTy(getLLVMContext())); 7075 case X86::BI__builtin_ia32_vec_ext_v2si: 7076 return Builder.CreateExtractElement(Ops[0], 7077 llvm::ConstantInt::get(Ops[1]->getType(), 0)); 7078 case X86::BI_mm_setcsr: 7079 case X86::BI__builtin_ia32_ldmxcsr: { 7080 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 7081 Builder.CreateStore(Ops[0], Tmp); 7082 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_ldmxcsr), 7083 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 7084 } 7085 case X86::BI_mm_getcsr: 7086 case X86::BI__builtin_ia32_stmxcsr: { 7087 Address Tmp = CreateMemTemp(E->getType()); 7088 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_stmxcsr), 7089 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 7090 return Builder.CreateLoad(Tmp, "stmxcsr"); 7091 } 7092 case X86::BI__builtin_ia32_xsave: 7093 case X86::BI__builtin_ia32_xsave64: 7094 case X86::BI__builtin_ia32_xrstor: 7095 case X86::BI__builtin_ia32_xrstor64: 7096 case X86::BI__builtin_ia32_xsaveopt: 7097 case X86::BI__builtin_ia32_xsaveopt64: 7098 case X86::BI__builtin_ia32_xrstors: 7099 case X86::BI__builtin_ia32_xrstors64: 7100 case X86::BI__builtin_ia32_xsavec: 7101 case X86::BI__builtin_ia32_xsavec64: 7102 case X86::BI__builtin_ia32_xsaves: 7103 case X86::BI__builtin_ia32_xsaves64: { 7104 Intrinsic::ID ID; 7105 #define INTRINSIC_X86_XSAVE_ID(NAME) \ 7106 case X86::BI__builtin_ia32_##NAME: \ 7107 ID = Intrinsic::x86_##NAME; \ 7108 break 7109 switch (BuiltinID) { 7110 default: llvm_unreachable("Unsupported intrinsic!"); 7111 INTRINSIC_X86_XSAVE_ID(xsave); 7112 INTRINSIC_X86_XSAVE_ID(xsave64); 7113 INTRINSIC_X86_XSAVE_ID(xrstor); 7114 INTRINSIC_X86_XSAVE_ID(xrstor64); 7115 INTRINSIC_X86_XSAVE_ID(xsaveopt); 7116 INTRINSIC_X86_XSAVE_ID(xsaveopt64); 7117 INTRINSIC_X86_XSAVE_ID(xrstors); 7118 INTRINSIC_X86_XSAVE_ID(xrstors64); 7119 INTRINSIC_X86_XSAVE_ID(xsavec); 7120 INTRINSIC_X86_XSAVE_ID(xsavec64); 7121 INTRINSIC_X86_XSAVE_ID(xsaves); 7122 INTRINSIC_X86_XSAVE_ID(xsaves64); 7123 } 7124 #undef INTRINSIC_X86_XSAVE_ID 7125 Value *Mhi = Builder.CreateTrunc( 7126 Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, 32)), Int32Ty); 7127 Value *Mlo = Builder.CreateTrunc(Ops[1], Int32Ty); 7128 Ops[1] = Mhi; 7129 Ops.push_back(Mlo); 7130 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 7131 } 7132 case X86::BI__builtin_ia32_storedqudi128_mask: 7133 case X86::BI__builtin_ia32_storedqusi128_mask: 7134 case X86::BI__builtin_ia32_storedquhi128_mask: 7135 case X86::BI__builtin_ia32_storedquqi128_mask: 7136 case X86::BI__builtin_ia32_storeupd128_mask: 7137 case X86::BI__builtin_ia32_storeups128_mask: 7138 case X86::BI__builtin_ia32_storedqudi256_mask: 7139 case X86::BI__builtin_ia32_storedqusi256_mask: 7140 case X86::BI__builtin_ia32_storedquhi256_mask: 7141 case X86::BI__builtin_ia32_storedquqi256_mask: 7142 case X86::BI__builtin_ia32_storeupd256_mask: 7143 case X86::BI__builtin_ia32_storeups256_mask: 7144 case X86::BI__builtin_ia32_storedqudi512_mask: 7145 case X86::BI__builtin_ia32_storedqusi512_mask: 7146 case X86::BI__builtin_ia32_storedquhi512_mask: 7147 case X86::BI__builtin_ia32_storedquqi512_mask: 7148 case X86::BI__builtin_ia32_storeupd512_mask: 7149 case X86::BI__builtin_ia32_storeups512_mask: 7150 return EmitX86MaskedStore(*this, Ops, 1); 7151 7152 case X86::BI__builtin_ia32_movdqa32store128_mask: 7153 case X86::BI__builtin_ia32_movdqa64store128_mask: 7154 case X86::BI__builtin_ia32_storeaps128_mask: 7155 case X86::BI__builtin_ia32_storeapd128_mask: 7156 case X86::BI__builtin_ia32_movdqa32store256_mask: 7157 case X86::BI__builtin_ia32_movdqa64store256_mask: 7158 case X86::BI__builtin_ia32_storeaps256_mask: 7159 case X86::BI__builtin_ia32_storeapd256_mask: 7160 case X86::BI__builtin_ia32_movdqa32store512_mask: 7161 case X86::BI__builtin_ia32_movdqa64store512_mask: 7162 case X86::BI__builtin_ia32_storeaps512_mask: 7163 case X86::BI__builtin_ia32_storeapd512_mask: { 7164 unsigned Align = 7165 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 7166 return EmitX86MaskedStore(*this, Ops, Align); 7167 } 7168 case X86::BI__builtin_ia32_loadups128_mask: 7169 case X86::BI__builtin_ia32_loadups256_mask: 7170 case X86::BI__builtin_ia32_loadups512_mask: 7171 case X86::BI__builtin_ia32_loadupd128_mask: 7172 case X86::BI__builtin_ia32_loadupd256_mask: 7173 case X86::BI__builtin_ia32_loadupd512_mask: 7174 case X86::BI__builtin_ia32_loaddquqi128_mask: 7175 case X86::BI__builtin_ia32_loaddquqi256_mask: 7176 case X86::BI__builtin_ia32_loaddquqi512_mask: 7177 case X86::BI__builtin_ia32_loaddquhi128_mask: 7178 case X86::BI__builtin_ia32_loaddquhi256_mask: 7179 case X86::BI__builtin_ia32_loaddquhi512_mask: 7180 case X86::BI__builtin_ia32_loaddqusi128_mask: 7181 case X86::BI__builtin_ia32_loaddqusi256_mask: 7182 case X86::BI__builtin_ia32_loaddqusi512_mask: 7183 case X86::BI__builtin_ia32_loaddqudi128_mask: 7184 case X86::BI__builtin_ia32_loaddqudi256_mask: 7185 case X86::BI__builtin_ia32_loaddqudi512_mask: 7186 return EmitX86MaskedLoad(*this, Ops, 1); 7187 7188 case X86::BI__builtin_ia32_loadaps128_mask: 7189 case X86::BI__builtin_ia32_loadaps256_mask: 7190 case X86::BI__builtin_ia32_loadaps512_mask: 7191 case X86::BI__builtin_ia32_loadapd128_mask: 7192 case X86::BI__builtin_ia32_loadapd256_mask: 7193 case X86::BI__builtin_ia32_loadapd512_mask: 7194 case X86::BI__builtin_ia32_movdqa32load128_mask: 7195 case X86::BI__builtin_ia32_movdqa32load256_mask: 7196 case X86::BI__builtin_ia32_movdqa32load512_mask: 7197 case X86::BI__builtin_ia32_movdqa64load128_mask: 7198 case X86::BI__builtin_ia32_movdqa64load256_mask: 7199 case X86::BI__builtin_ia32_movdqa64load512_mask: { 7200 unsigned Align = 7201 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 7202 return EmitX86MaskedLoad(*this, Ops, Align); 7203 } 7204 7205 case X86::BI__builtin_ia32_vbroadcastf128_pd256: 7206 case X86::BI__builtin_ia32_vbroadcastf128_ps256: { 7207 llvm::Type *DstTy = ConvertType(E->getType()); 7208 return EmitX86SubVectorBroadcast(*this, Ops, DstTy, 128, 1); 7209 } 7210 7211 case X86::BI__builtin_ia32_storehps: 7212 case X86::BI__builtin_ia32_storelps: { 7213 llvm::Type *PtrTy = llvm::PointerType::getUnqual(Int64Ty); 7214 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 2); 7215 7216 // cast val v2i64 7217 Ops[1] = Builder.CreateBitCast(Ops[1], VecTy, "cast"); 7218 7219 // extract (0, 1) 7220 unsigned Index = BuiltinID == X86::BI__builtin_ia32_storelps ? 0 : 1; 7221 llvm::Value *Idx = llvm::ConstantInt::get(SizeTy, Index); 7222 Ops[1] = Builder.CreateExtractElement(Ops[1], Idx, "extract"); 7223 7224 // cast pointer to i64 & store 7225 Ops[0] = Builder.CreateBitCast(Ops[0], PtrTy); 7226 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7227 } 7228 case X86::BI__builtin_ia32_palignr128: 7229 case X86::BI__builtin_ia32_palignr256: 7230 case X86::BI__builtin_ia32_palignr128_mask: 7231 case X86::BI__builtin_ia32_palignr256_mask: 7232 case X86::BI__builtin_ia32_palignr512_mask: { 7233 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 7234 7235 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 7236 assert(NumElts % 16 == 0); 7237 7238 // If palignr is shifting the pair of vectors more than the size of two 7239 // lanes, emit zero. 7240 if (ShiftVal >= 32) 7241 return llvm::Constant::getNullValue(ConvertType(E->getType())); 7242 7243 // If palignr is shifting the pair of input vectors more than one lane, 7244 // but less than two lanes, convert to shifting in zeroes. 7245 if (ShiftVal > 16) { 7246 ShiftVal -= 16; 7247 Ops[1] = Ops[0]; 7248 Ops[0] = llvm::Constant::getNullValue(Ops[0]->getType()); 7249 } 7250 7251 uint32_t Indices[64]; 7252 // 256-bit palignr operates on 128-bit lanes so we need to handle that 7253 for (unsigned l = 0; l != NumElts; l += 16) { 7254 for (unsigned i = 0; i != 16; ++i) { 7255 unsigned Idx = ShiftVal + i; 7256 if (Idx >= 16) 7257 Idx += NumElts - 16; // End of lane, switch operand. 7258 Indices[l + i] = Idx + l; 7259 } 7260 } 7261 7262 Value *Align = Builder.CreateShuffleVector(Ops[1], Ops[0], 7263 makeArrayRef(Indices, NumElts), 7264 "palignr"); 7265 7266 // If this isn't a masked builtin, just return the align operation. 7267 if (Ops.size() == 3) 7268 return Align; 7269 7270 return EmitX86Select(*this, Ops[4], Align, Ops[3]); 7271 } 7272 7273 case X86::BI__builtin_ia32_movnti: 7274 case X86::BI__builtin_ia32_movnti64: { 7275 llvm::MDNode *Node = llvm::MDNode::get( 7276 getLLVMContext(), llvm::ConstantAsMetadata::get(Builder.getInt32(1))); 7277 7278 // Convert the type of the pointer to a pointer to the stored type. 7279 Value *BC = Builder.CreateBitCast(Ops[0], 7280 llvm::PointerType::getUnqual(Ops[1]->getType()), 7281 "cast"); 7282 StoreInst *SI = Builder.CreateDefaultAlignedStore(Ops[1], BC); 7283 SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); 7284 7285 // No alignment for scalar intrinsic store. 7286 SI->setAlignment(1); 7287 return SI; 7288 } 7289 case X86::BI__builtin_ia32_movntsd: 7290 case X86::BI__builtin_ia32_movntss: { 7291 llvm::MDNode *Node = llvm::MDNode::get( 7292 getLLVMContext(), llvm::ConstantAsMetadata::get(Builder.getInt32(1))); 7293 7294 // Extract the 0'th element of the source vector. 7295 Value *Scl = Builder.CreateExtractElement(Ops[1], (uint64_t)0, "extract"); 7296 7297 // Convert the type of the pointer to a pointer to the stored type. 7298 Value *BC = Builder.CreateBitCast(Ops[0], 7299 llvm::PointerType::getUnqual(Scl->getType()), 7300 "cast"); 7301 7302 // Unaligned nontemporal store of the scalar value. 7303 StoreInst *SI = Builder.CreateDefaultAlignedStore(Scl, BC); 7304 SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); 7305 SI->setAlignment(1); 7306 return SI; 7307 } 7308 7309 case X86::BI__builtin_ia32_selectb_128: 7310 case X86::BI__builtin_ia32_selectb_256: 7311 case X86::BI__builtin_ia32_selectb_512: 7312 case X86::BI__builtin_ia32_selectw_128: 7313 case X86::BI__builtin_ia32_selectw_256: 7314 case X86::BI__builtin_ia32_selectw_512: 7315 case X86::BI__builtin_ia32_selectd_128: 7316 case X86::BI__builtin_ia32_selectd_256: 7317 case X86::BI__builtin_ia32_selectd_512: 7318 case X86::BI__builtin_ia32_selectq_128: 7319 case X86::BI__builtin_ia32_selectq_256: 7320 case X86::BI__builtin_ia32_selectq_512: 7321 case X86::BI__builtin_ia32_selectps_128: 7322 case X86::BI__builtin_ia32_selectps_256: 7323 case X86::BI__builtin_ia32_selectps_512: 7324 case X86::BI__builtin_ia32_selectpd_128: 7325 case X86::BI__builtin_ia32_selectpd_256: 7326 case X86::BI__builtin_ia32_selectpd_512: 7327 return EmitX86Select(*this, Ops[0], Ops[1], Ops[2]); 7328 case X86::BI__builtin_ia32_pcmpeqb128_mask: 7329 case X86::BI__builtin_ia32_pcmpeqb256_mask: 7330 case X86::BI__builtin_ia32_pcmpeqb512_mask: 7331 case X86::BI__builtin_ia32_pcmpeqw128_mask: 7332 case X86::BI__builtin_ia32_pcmpeqw256_mask: 7333 case X86::BI__builtin_ia32_pcmpeqw512_mask: 7334 case X86::BI__builtin_ia32_pcmpeqd128_mask: 7335 case X86::BI__builtin_ia32_pcmpeqd256_mask: 7336 case X86::BI__builtin_ia32_pcmpeqd512_mask: 7337 case X86::BI__builtin_ia32_pcmpeqq128_mask: 7338 case X86::BI__builtin_ia32_pcmpeqq256_mask: 7339 case X86::BI__builtin_ia32_pcmpeqq512_mask: 7340 return EmitX86MaskedCompare(*this, 0, false, Ops); 7341 case X86::BI__builtin_ia32_pcmpgtb128_mask: 7342 case X86::BI__builtin_ia32_pcmpgtb256_mask: 7343 case X86::BI__builtin_ia32_pcmpgtb512_mask: 7344 case X86::BI__builtin_ia32_pcmpgtw128_mask: 7345 case X86::BI__builtin_ia32_pcmpgtw256_mask: 7346 case X86::BI__builtin_ia32_pcmpgtw512_mask: 7347 case X86::BI__builtin_ia32_pcmpgtd128_mask: 7348 case X86::BI__builtin_ia32_pcmpgtd256_mask: 7349 case X86::BI__builtin_ia32_pcmpgtd512_mask: 7350 case X86::BI__builtin_ia32_pcmpgtq128_mask: 7351 case X86::BI__builtin_ia32_pcmpgtq256_mask: 7352 case X86::BI__builtin_ia32_pcmpgtq512_mask: 7353 return EmitX86MaskedCompare(*this, 6, true, Ops); 7354 case X86::BI__builtin_ia32_cmpb128_mask: 7355 case X86::BI__builtin_ia32_cmpb256_mask: 7356 case X86::BI__builtin_ia32_cmpb512_mask: 7357 case X86::BI__builtin_ia32_cmpw128_mask: 7358 case X86::BI__builtin_ia32_cmpw256_mask: 7359 case X86::BI__builtin_ia32_cmpw512_mask: 7360 case X86::BI__builtin_ia32_cmpd128_mask: 7361 case X86::BI__builtin_ia32_cmpd256_mask: 7362 case X86::BI__builtin_ia32_cmpd512_mask: 7363 case X86::BI__builtin_ia32_cmpq128_mask: 7364 case X86::BI__builtin_ia32_cmpq256_mask: 7365 case X86::BI__builtin_ia32_cmpq512_mask: { 7366 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 7367 return EmitX86MaskedCompare(*this, CC, true, Ops); 7368 } 7369 case X86::BI__builtin_ia32_ucmpb128_mask: 7370 case X86::BI__builtin_ia32_ucmpb256_mask: 7371 case X86::BI__builtin_ia32_ucmpb512_mask: 7372 case X86::BI__builtin_ia32_ucmpw128_mask: 7373 case X86::BI__builtin_ia32_ucmpw256_mask: 7374 case X86::BI__builtin_ia32_ucmpw512_mask: 7375 case X86::BI__builtin_ia32_ucmpd128_mask: 7376 case X86::BI__builtin_ia32_ucmpd256_mask: 7377 case X86::BI__builtin_ia32_ucmpd512_mask: 7378 case X86::BI__builtin_ia32_ucmpq128_mask: 7379 case X86::BI__builtin_ia32_ucmpq256_mask: 7380 case X86::BI__builtin_ia32_ucmpq512_mask: { 7381 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 7382 return EmitX86MaskedCompare(*this, CC, false, Ops); 7383 } 7384 7385 case X86::BI__builtin_ia32_vplzcntd_128_mask: 7386 case X86::BI__builtin_ia32_vplzcntd_256_mask: 7387 case X86::BI__builtin_ia32_vplzcntd_512_mask: 7388 case X86::BI__builtin_ia32_vplzcntq_128_mask: 7389 case X86::BI__builtin_ia32_vplzcntq_256_mask: 7390 case X86::BI__builtin_ia32_vplzcntq_512_mask: { 7391 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, Ops[0]->getType()); 7392 return EmitX86Select(*this, Ops[2], 7393 Builder.CreateCall(F, {Ops[0],Builder.getInt1(false)}), 7394 Ops[1]); 7395 } 7396 7397 // TODO: Handle 64/512-bit vector widths of min/max. 7398 case X86::BI__builtin_ia32_pmaxsb128: 7399 case X86::BI__builtin_ia32_pmaxsw128: 7400 case X86::BI__builtin_ia32_pmaxsd128: 7401 case X86::BI__builtin_ia32_pmaxsb256: 7402 case X86::BI__builtin_ia32_pmaxsw256: 7403 case X86::BI__builtin_ia32_pmaxsd256: { 7404 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_SGT, Ops[0], Ops[1]); 7405 return Builder.CreateSelect(Cmp, Ops[0], Ops[1]); 7406 } 7407 case X86::BI__builtin_ia32_pmaxub128: 7408 case X86::BI__builtin_ia32_pmaxuw128: 7409 case X86::BI__builtin_ia32_pmaxud128: 7410 case X86::BI__builtin_ia32_pmaxub256: 7411 case X86::BI__builtin_ia32_pmaxuw256: 7412 case X86::BI__builtin_ia32_pmaxud256: { 7413 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_UGT, Ops[0], Ops[1]); 7414 return Builder.CreateSelect(Cmp, Ops[0], Ops[1]); 7415 } 7416 case X86::BI__builtin_ia32_pminsb128: 7417 case X86::BI__builtin_ia32_pminsw128: 7418 case X86::BI__builtin_ia32_pminsd128: 7419 case X86::BI__builtin_ia32_pminsb256: 7420 case X86::BI__builtin_ia32_pminsw256: 7421 case X86::BI__builtin_ia32_pminsd256: { 7422 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_SLT, Ops[0], Ops[1]); 7423 return Builder.CreateSelect(Cmp, Ops[0], Ops[1]); 7424 } 7425 case X86::BI__builtin_ia32_pminub128: 7426 case X86::BI__builtin_ia32_pminuw128: 7427 case X86::BI__builtin_ia32_pminud128: 7428 case X86::BI__builtin_ia32_pminub256: 7429 case X86::BI__builtin_ia32_pminuw256: 7430 case X86::BI__builtin_ia32_pminud256: { 7431 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_ULT, Ops[0], Ops[1]); 7432 return Builder.CreateSelect(Cmp, Ops[0], Ops[1]); 7433 } 7434 7435 // 3DNow! 7436 case X86::BI__builtin_ia32_pswapdsf: 7437 case X86::BI__builtin_ia32_pswapdsi: { 7438 llvm::Type *MMXTy = llvm::Type::getX86_MMXTy(getLLVMContext()); 7439 Ops[0] = Builder.CreateBitCast(Ops[0], MMXTy, "cast"); 7440 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_3dnowa_pswapd); 7441 return Builder.CreateCall(F, Ops, "pswapd"); 7442 } 7443 case X86::BI__builtin_ia32_rdrand16_step: 7444 case X86::BI__builtin_ia32_rdrand32_step: 7445 case X86::BI__builtin_ia32_rdrand64_step: 7446 case X86::BI__builtin_ia32_rdseed16_step: 7447 case X86::BI__builtin_ia32_rdseed32_step: 7448 case X86::BI__builtin_ia32_rdseed64_step: { 7449 Intrinsic::ID ID; 7450 switch (BuiltinID) { 7451 default: llvm_unreachable("Unsupported intrinsic!"); 7452 case X86::BI__builtin_ia32_rdrand16_step: 7453 ID = Intrinsic::x86_rdrand_16; 7454 break; 7455 case X86::BI__builtin_ia32_rdrand32_step: 7456 ID = Intrinsic::x86_rdrand_32; 7457 break; 7458 case X86::BI__builtin_ia32_rdrand64_step: 7459 ID = Intrinsic::x86_rdrand_64; 7460 break; 7461 case X86::BI__builtin_ia32_rdseed16_step: 7462 ID = Intrinsic::x86_rdseed_16; 7463 break; 7464 case X86::BI__builtin_ia32_rdseed32_step: 7465 ID = Intrinsic::x86_rdseed_32; 7466 break; 7467 case X86::BI__builtin_ia32_rdseed64_step: 7468 ID = Intrinsic::x86_rdseed_64; 7469 break; 7470 } 7471 7472 Value *Call = Builder.CreateCall(CGM.getIntrinsic(ID)); 7473 Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 0), 7474 Ops[0]); 7475 return Builder.CreateExtractValue(Call, 1); 7476 } 7477 7478 // SSE packed comparison intrinsics 7479 case X86::BI__builtin_ia32_cmpeqps: 7480 case X86::BI__builtin_ia32_cmpeqpd: 7481 return getVectorFCmpIR(CmpInst::FCMP_OEQ); 7482 case X86::BI__builtin_ia32_cmpltps: 7483 case X86::BI__builtin_ia32_cmpltpd: 7484 return getVectorFCmpIR(CmpInst::FCMP_OLT); 7485 case X86::BI__builtin_ia32_cmpleps: 7486 case X86::BI__builtin_ia32_cmplepd: 7487 return getVectorFCmpIR(CmpInst::FCMP_OLE); 7488 case X86::BI__builtin_ia32_cmpunordps: 7489 case X86::BI__builtin_ia32_cmpunordpd: 7490 return getVectorFCmpIR(CmpInst::FCMP_UNO); 7491 case X86::BI__builtin_ia32_cmpneqps: 7492 case X86::BI__builtin_ia32_cmpneqpd: 7493 return getVectorFCmpIR(CmpInst::FCMP_UNE); 7494 case X86::BI__builtin_ia32_cmpnltps: 7495 case X86::BI__builtin_ia32_cmpnltpd: 7496 return getVectorFCmpIR(CmpInst::FCMP_UGE); 7497 case X86::BI__builtin_ia32_cmpnleps: 7498 case X86::BI__builtin_ia32_cmpnlepd: 7499 return getVectorFCmpIR(CmpInst::FCMP_UGT); 7500 case X86::BI__builtin_ia32_cmpordps: 7501 case X86::BI__builtin_ia32_cmpordpd: 7502 return getVectorFCmpIR(CmpInst::FCMP_ORD); 7503 case X86::BI__builtin_ia32_cmpps: 7504 case X86::BI__builtin_ia32_cmpps256: 7505 case X86::BI__builtin_ia32_cmppd: 7506 case X86::BI__builtin_ia32_cmppd256: { 7507 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 7508 // If this one of the SSE immediates, we can use native IR. 7509 if (CC < 8) { 7510 FCmpInst::Predicate Pred; 7511 switch (CC) { 7512 case 0: Pred = FCmpInst::FCMP_OEQ; break; 7513 case 1: Pred = FCmpInst::FCMP_OLT; break; 7514 case 2: Pred = FCmpInst::FCMP_OLE; break; 7515 case 3: Pred = FCmpInst::FCMP_UNO; break; 7516 case 4: Pred = FCmpInst::FCMP_UNE; break; 7517 case 5: Pred = FCmpInst::FCMP_UGE; break; 7518 case 6: Pred = FCmpInst::FCMP_UGT; break; 7519 case 7: Pred = FCmpInst::FCMP_ORD; break; 7520 } 7521 return getVectorFCmpIR(Pred); 7522 } 7523 7524 // We can't handle 8-31 immediates with native IR, use the intrinsic. 7525 Intrinsic::ID ID; 7526 switch (BuiltinID) { 7527 default: llvm_unreachable("Unsupported intrinsic!"); 7528 case X86::BI__builtin_ia32_cmpps: 7529 ID = Intrinsic::x86_sse_cmp_ps; 7530 break; 7531 case X86::BI__builtin_ia32_cmpps256: 7532 ID = Intrinsic::x86_avx_cmp_ps_256; 7533 break; 7534 case X86::BI__builtin_ia32_cmppd: 7535 ID = Intrinsic::x86_sse2_cmp_pd; 7536 break; 7537 case X86::BI__builtin_ia32_cmppd256: 7538 ID = Intrinsic::x86_avx_cmp_pd_256; 7539 break; 7540 } 7541 7542 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 7543 } 7544 7545 // SSE scalar comparison intrinsics 7546 case X86::BI__builtin_ia32_cmpeqss: 7547 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 0); 7548 case X86::BI__builtin_ia32_cmpltss: 7549 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 1); 7550 case X86::BI__builtin_ia32_cmpless: 7551 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 2); 7552 case X86::BI__builtin_ia32_cmpunordss: 7553 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 3); 7554 case X86::BI__builtin_ia32_cmpneqss: 7555 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 4); 7556 case X86::BI__builtin_ia32_cmpnltss: 7557 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 5); 7558 case X86::BI__builtin_ia32_cmpnless: 7559 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 6); 7560 case X86::BI__builtin_ia32_cmpordss: 7561 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 7); 7562 case X86::BI__builtin_ia32_cmpeqsd: 7563 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 0); 7564 case X86::BI__builtin_ia32_cmpltsd: 7565 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 1); 7566 case X86::BI__builtin_ia32_cmplesd: 7567 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 2); 7568 case X86::BI__builtin_ia32_cmpunordsd: 7569 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 3); 7570 case X86::BI__builtin_ia32_cmpneqsd: 7571 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 4); 7572 case X86::BI__builtin_ia32_cmpnltsd: 7573 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 5); 7574 case X86::BI__builtin_ia32_cmpnlesd: 7575 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 6); 7576 case X86::BI__builtin_ia32_cmpordsd: 7577 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 7); 7578 7579 case X86::BI__emul: 7580 case X86::BI__emulu: { 7581 llvm::Type *Int64Ty = llvm::IntegerType::get(getLLVMContext(), 64); 7582 bool isSigned = (BuiltinID == X86::BI__emul); 7583 Value *LHS = Builder.CreateIntCast(Ops[0], Int64Ty, isSigned); 7584 Value *RHS = Builder.CreateIntCast(Ops[1], Int64Ty, isSigned); 7585 return Builder.CreateMul(LHS, RHS, "", !isSigned, isSigned); 7586 } 7587 case X86::BI__mulh: 7588 case X86::BI__umulh: 7589 case X86::BI_mul128: 7590 case X86::BI_umul128: { 7591 llvm::Type *ResType = ConvertType(E->getType()); 7592 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 7593 7594 bool IsSigned = (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI_mul128); 7595 Value *LHS = Builder.CreateIntCast(Ops[0], Int128Ty, IsSigned); 7596 Value *RHS = Builder.CreateIntCast(Ops[1], Int128Ty, IsSigned); 7597 7598 Value *MulResult, *HigherBits; 7599 if (IsSigned) { 7600 MulResult = Builder.CreateNSWMul(LHS, RHS); 7601 HigherBits = Builder.CreateAShr(MulResult, 64); 7602 } else { 7603 MulResult = Builder.CreateNUWMul(LHS, RHS); 7604 HigherBits = Builder.CreateLShr(MulResult, 64); 7605 } 7606 HigherBits = Builder.CreateIntCast(HigherBits, ResType, IsSigned); 7607 7608 if (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI__umulh) 7609 return HigherBits; 7610 7611 Address HighBitsAddress = EmitPointerWithAlignment(E->getArg(2)); 7612 Builder.CreateStore(HigherBits, HighBitsAddress); 7613 return Builder.CreateIntCast(MulResult, ResType, IsSigned); 7614 } 7615 7616 case X86::BI__faststorefence: { 7617 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 7618 llvm::CrossThread); 7619 } 7620 case X86::BI_ReadWriteBarrier: 7621 case X86::BI_ReadBarrier: 7622 case X86::BI_WriteBarrier: { 7623 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 7624 llvm::SingleThread); 7625 } 7626 } 7627 } 7628 7629 7630 Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, 7631 const CallExpr *E) { 7632 SmallVector<Value*, 4> Ops; 7633 7634 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) 7635 Ops.push_back(EmitScalarExpr(E->getArg(i))); 7636 7637 Intrinsic::ID ID = Intrinsic::not_intrinsic; 7638 7639 switch (BuiltinID) { 7640 default: return nullptr; 7641 7642 // __builtin_ppc_get_timebase is GCC 4.8+'s PowerPC-specific name for what we 7643 // call __builtin_readcyclecounter. 7644 case PPC::BI__builtin_ppc_get_timebase: 7645 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::readcyclecounter)); 7646 7647 // vec_ld, vec_lvsl, vec_lvsr 7648 case PPC::BI__builtin_altivec_lvx: 7649 case PPC::BI__builtin_altivec_lvxl: 7650 case PPC::BI__builtin_altivec_lvebx: 7651 case PPC::BI__builtin_altivec_lvehx: 7652 case PPC::BI__builtin_altivec_lvewx: 7653 case PPC::BI__builtin_altivec_lvsl: 7654 case PPC::BI__builtin_altivec_lvsr: 7655 case PPC::BI__builtin_vsx_lxvd2x: 7656 case PPC::BI__builtin_vsx_lxvw4x: 7657 { 7658 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 7659 7660 Ops[0] = Builder.CreateGEP(Ops[1], Ops[0]); 7661 Ops.pop_back(); 7662 7663 switch (BuiltinID) { 7664 default: llvm_unreachable("Unsupported ld/lvsl/lvsr intrinsic!"); 7665 case PPC::BI__builtin_altivec_lvx: 7666 ID = Intrinsic::ppc_altivec_lvx; 7667 break; 7668 case PPC::BI__builtin_altivec_lvxl: 7669 ID = Intrinsic::ppc_altivec_lvxl; 7670 break; 7671 case PPC::BI__builtin_altivec_lvebx: 7672 ID = Intrinsic::ppc_altivec_lvebx; 7673 break; 7674 case PPC::BI__builtin_altivec_lvehx: 7675 ID = Intrinsic::ppc_altivec_lvehx; 7676 break; 7677 case PPC::BI__builtin_altivec_lvewx: 7678 ID = Intrinsic::ppc_altivec_lvewx; 7679 break; 7680 case PPC::BI__builtin_altivec_lvsl: 7681 ID = Intrinsic::ppc_altivec_lvsl; 7682 break; 7683 case PPC::BI__builtin_altivec_lvsr: 7684 ID = Intrinsic::ppc_altivec_lvsr; 7685 break; 7686 case PPC::BI__builtin_vsx_lxvd2x: 7687 ID = Intrinsic::ppc_vsx_lxvd2x; 7688 break; 7689 case PPC::BI__builtin_vsx_lxvw4x: 7690 ID = Intrinsic::ppc_vsx_lxvw4x; 7691 break; 7692 } 7693 llvm::Function *F = CGM.getIntrinsic(ID); 7694 return Builder.CreateCall(F, Ops, ""); 7695 } 7696 7697 // vec_st 7698 case PPC::BI__builtin_altivec_stvx: 7699 case PPC::BI__builtin_altivec_stvxl: 7700 case PPC::BI__builtin_altivec_stvebx: 7701 case PPC::BI__builtin_altivec_stvehx: 7702 case PPC::BI__builtin_altivec_stvewx: 7703 case PPC::BI__builtin_vsx_stxvd2x: 7704 case PPC::BI__builtin_vsx_stxvw4x: 7705 { 7706 Ops[2] = Builder.CreateBitCast(Ops[2], Int8PtrTy); 7707 Ops[1] = Builder.CreateGEP(Ops[2], Ops[1]); 7708 Ops.pop_back(); 7709 7710 switch (BuiltinID) { 7711 default: llvm_unreachable("Unsupported st intrinsic!"); 7712 case PPC::BI__builtin_altivec_stvx: 7713 ID = Intrinsic::ppc_altivec_stvx; 7714 break; 7715 case PPC::BI__builtin_altivec_stvxl: 7716 ID = Intrinsic::ppc_altivec_stvxl; 7717 break; 7718 case PPC::BI__builtin_altivec_stvebx: 7719 ID = Intrinsic::ppc_altivec_stvebx; 7720 break; 7721 case PPC::BI__builtin_altivec_stvehx: 7722 ID = Intrinsic::ppc_altivec_stvehx; 7723 break; 7724 case PPC::BI__builtin_altivec_stvewx: 7725 ID = Intrinsic::ppc_altivec_stvewx; 7726 break; 7727 case PPC::BI__builtin_vsx_stxvd2x: 7728 ID = Intrinsic::ppc_vsx_stxvd2x; 7729 break; 7730 case PPC::BI__builtin_vsx_stxvw4x: 7731 ID = Intrinsic::ppc_vsx_stxvw4x; 7732 break; 7733 } 7734 llvm::Function *F = CGM.getIntrinsic(ID); 7735 return Builder.CreateCall(F, Ops, ""); 7736 } 7737 // Square root 7738 case PPC::BI__builtin_vsx_xvsqrtsp: 7739 case PPC::BI__builtin_vsx_xvsqrtdp: { 7740 llvm::Type *ResultType = ConvertType(E->getType()); 7741 Value *X = EmitScalarExpr(E->getArg(0)); 7742 ID = Intrinsic::sqrt; 7743 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 7744 return Builder.CreateCall(F, X); 7745 } 7746 // Count leading zeros 7747 case PPC::BI__builtin_altivec_vclzb: 7748 case PPC::BI__builtin_altivec_vclzh: 7749 case PPC::BI__builtin_altivec_vclzw: 7750 case PPC::BI__builtin_altivec_vclzd: { 7751 llvm::Type *ResultType = ConvertType(E->getType()); 7752 Value *X = EmitScalarExpr(E->getArg(0)); 7753 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 7754 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 7755 return Builder.CreateCall(F, {X, Undef}); 7756 } 7757 case PPC::BI__builtin_altivec_vctzb: 7758 case PPC::BI__builtin_altivec_vctzh: 7759 case PPC::BI__builtin_altivec_vctzw: 7760 case PPC::BI__builtin_altivec_vctzd: { 7761 llvm::Type *ResultType = ConvertType(E->getType()); 7762 Value *X = EmitScalarExpr(E->getArg(0)); 7763 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 7764 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 7765 return Builder.CreateCall(F, {X, Undef}); 7766 } 7767 case PPC::BI__builtin_altivec_vpopcntb: 7768 case PPC::BI__builtin_altivec_vpopcnth: 7769 case PPC::BI__builtin_altivec_vpopcntw: 7770 case PPC::BI__builtin_altivec_vpopcntd: { 7771 llvm::Type *ResultType = ConvertType(E->getType()); 7772 Value *X = EmitScalarExpr(E->getArg(0)); 7773 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 7774 return Builder.CreateCall(F, X); 7775 } 7776 // Copy sign 7777 case PPC::BI__builtin_vsx_xvcpsgnsp: 7778 case PPC::BI__builtin_vsx_xvcpsgndp: { 7779 llvm::Type *ResultType = ConvertType(E->getType()); 7780 Value *X = EmitScalarExpr(E->getArg(0)); 7781 Value *Y = EmitScalarExpr(E->getArg(1)); 7782 ID = Intrinsic::copysign; 7783 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 7784 return Builder.CreateCall(F, {X, Y}); 7785 } 7786 // Rounding/truncation 7787 case PPC::BI__builtin_vsx_xvrspip: 7788 case PPC::BI__builtin_vsx_xvrdpip: 7789 case PPC::BI__builtin_vsx_xvrdpim: 7790 case PPC::BI__builtin_vsx_xvrspim: 7791 case PPC::BI__builtin_vsx_xvrdpi: 7792 case PPC::BI__builtin_vsx_xvrspi: 7793 case PPC::BI__builtin_vsx_xvrdpic: 7794 case PPC::BI__builtin_vsx_xvrspic: 7795 case PPC::BI__builtin_vsx_xvrdpiz: 7796 case PPC::BI__builtin_vsx_xvrspiz: { 7797 llvm::Type *ResultType = ConvertType(E->getType()); 7798 Value *X = EmitScalarExpr(E->getArg(0)); 7799 if (BuiltinID == PPC::BI__builtin_vsx_xvrdpim || 7800 BuiltinID == PPC::BI__builtin_vsx_xvrspim) 7801 ID = Intrinsic::floor; 7802 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpi || 7803 BuiltinID == PPC::BI__builtin_vsx_xvrspi) 7804 ID = Intrinsic::round; 7805 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpic || 7806 BuiltinID == PPC::BI__builtin_vsx_xvrspic) 7807 ID = Intrinsic::nearbyint; 7808 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpip || 7809 BuiltinID == PPC::BI__builtin_vsx_xvrspip) 7810 ID = Intrinsic::ceil; 7811 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpiz || 7812 BuiltinID == PPC::BI__builtin_vsx_xvrspiz) 7813 ID = Intrinsic::trunc; 7814 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 7815 return Builder.CreateCall(F, X); 7816 } 7817 7818 // Absolute value 7819 case PPC::BI__builtin_vsx_xvabsdp: 7820 case PPC::BI__builtin_vsx_xvabssp: { 7821 llvm::Type *ResultType = ConvertType(E->getType()); 7822 Value *X = EmitScalarExpr(E->getArg(0)); 7823 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 7824 return Builder.CreateCall(F, X); 7825 } 7826 7827 // FMA variations 7828 case PPC::BI__builtin_vsx_xvmaddadp: 7829 case PPC::BI__builtin_vsx_xvmaddasp: 7830 case PPC::BI__builtin_vsx_xvnmaddadp: 7831 case PPC::BI__builtin_vsx_xvnmaddasp: 7832 case PPC::BI__builtin_vsx_xvmsubadp: 7833 case PPC::BI__builtin_vsx_xvmsubasp: 7834 case PPC::BI__builtin_vsx_xvnmsubadp: 7835 case PPC::BI__builtin_vsx_xvnmsubasp: { 7836 llvm::Type *ResultType = ConvertType(E->getType()); 7837 Value *X = EmitScalarExpr(E->getArg(0)); 7838 Value *Y = EmitScalarExpr(E->getArg(1)); 7839 Value *Z = EmitScalarExpr(E->getArg(2)); 7840 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 7841 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 7842 switch (BuiltinID) { 7843 case PPC::BI__builtin_vsx_xvmaddadp: 7844 case PPC::BI__builtin_vsx_xvmaddasp: 7845 return Builder.CreateCall(F, {X, Y, Z}); 7846 case PPC::BI__builtin_vsx_xvnmaddadp: 7847 case PPC::BI__builtin_vsx_xvnmaddasp: 7848 return Builder.CreateFSub(Zero, 7849 Builder.CreateCall(F, {X, Y, Z}), "sub"); 7850 case PPC::BI__builtin_vsx_xvmsubadp: 7851 case PPC::BI__builtin_vsx_xvmsubasp: 7852 return Builder.CreateCall(F, 7853 {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 7854 case PPC::BI__builtin_vsx_xvnmsubadp: 7855 case PPC::BI__builtin_vsx_xvnmsubasp: 7856 Value *FsubRes = 7857 Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 7858 return Builder.CreateFSub(Zero, FsubRes, "sub"); 7859 } 7860 llvm_unreachable("Unknown FMA operation"); 7861 return nullptr; // Suppress no-return warning 7862 } 7863 } 7864 } 7865 7866 Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID, 7867 const CallExpr *E) { 7868 switch (BuiltinID) { 7869 case AMDGPU::BI__builtin_amdgcn_div_scale: 7870 case AMDGPU::BI__builtin_amdgcn_div_scalef: { 7871 // Translate from the intrinsics's struct return to the builtin's out 7872 // argument. 7873 7874 Address FlagOutPtr = EmitPointerWithAlignment(E->getArg(3)); 7875 7876 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 7877 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 7878 llvm::Value *Z = EmitScalarExpr(E->getArg(2)); 7879 7880 llvm::Value *Callee = CGM.getIntrinsic(Intrinsic::amdgcn_div_scale, 7881 X->getType()); 7882 7883 llvm::Value *Tmp = Builder.CreateCall(Callee, {X, Y, Z}); 7884 7885 llvm::Value *Result = Builder.CreateExtractValue(Tmp, 0); 7886 llvm::Value *Flag = Builder.CreateExtractValue(Tmp, 1); 7887 7888 llvm::Type *RealFlagType 7889 = FlagOutPtr.getPointer()->getType()->getPointerElementType(); 7890 7891 llvm::Value *FlagExt = Builder.CreateZExt(Flag, RealFlagType); 7892 Builder.CreateStore(FlagExt, FlagOutPtr); 7893 return Result; 7894 } 7895 case AMDGPU::BI__builtin_amdgcn_div_fmas: 7896 case AMDGPU::BI__builtin_amdgcn_div_fmasf: { 7897 llvm::Value *Src0 = EmitScalarExpr(E->getArg(0)); 7898 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); 7899 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); 7900 llvm::Value *Src3 = EmitScalarExpr(E->getArg(3)); 7901 7902 llvm::Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_div_fmas, 7903 Src0->getType()); 7904 llvm::Value *Src3ToBool = Builder.CreateIsNotNull(Src3); 7905 return Builder.CreateCall(F, {Src0, Src1, Src2, Src3ToBool}); 7906 } 7907 7908 case AMDGPU::BI__builtin_amdgcn_ds_swizzle: 7909 return emitBinaryBuiltin(*this, E, Intrinsic::amdgcn_ds_swizzle); 7910 case AMDGPU::BI__builtin_amdgcn_div_fixup: 7911 case AMDGPU::BI__builtin_amdgcn_div_fixupf: 7912 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_div_fixup); 7913 case AMDGPU::BI__builtin_amdgcn_trig_preop: 7914 case AMDGPU::BI__builtin_amdgcn_trig_preopf: 7915 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_trig_preop); 7916 case AMDGPU::BI__builtin_amdgcn_rcp: 7917 case AMDGPU::BI__builtin_amdgcn_rcpf: 7918 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rcp); 7919 case AMDGPU::BI__builtin_amdgcn_rsq: 7920 case AMDGPU::BI__builtin_amdgcn_rsqf: 7921 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq); 7922 case AMDGPU::BI__builtin_amdgcn_rsq_clamp: 7923 case AMDGPU::BI__builtin_amdgcn_rsq_clampf: 7924 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq_clamp); 7925 case AMDGPU::BI__builtin_amdgcn_sinf: 7926 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_sin); 7927 case AMDGPU::BI__builtin_amdgcn_cosf: 7928 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_cos); 7929 case AMDGPU::BI__builtin_amdgcn_log_clampf: 7930 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_log_clamp); 7931 case AMDGPU::BI__builtin_amdgcn_ldexp: 7932 case AMDGPU::BI__builtin_amdgcn_ldexpf: 7933 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_ldexp); 7934 case AMDGPU::BI__builtin_amdgcn_frexp_mant: 7935 case AMDGPU::BI__builtin_amdgcn_frexp_mantf: { 7936 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_frexp_mant); 7937 } 7938 case AMDGPU::BI__builtin_amdgcn_frexp_exp: 7939 case AMDGPU::BI__builtin_amdgcn_frexp_expf: { 7940 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_frexp_exp); 7941 } 7942 case AMDGPU::BI__builtin_amdgcn_fract: 7943 case AMDGPU::BI__builtin_amdgcn_fractf: 7944 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_fract); 7945 case AMDGPU::BI__builtin_amdgcn_lerp: 7946 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_lerp); 7947 case AMDGPU::BI__builtin_amdgcn_uicmp: 7948 case AMDGPU::BI__builtin_amdgcn_uicmpl: 7949 case AMDGPU::BI__builtin_amdgcn_sicmp: 7950 case AMDGPU::BI__builtin_amdgcn_sicmpl: 7951 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_icmp); 7952 case AMDGPU::BI__builtin_amdgcn_fcmp: 7953 case AMDGPU::BI__builtin_amdgcn_fcmpf: 7954 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_fcmp); 7955 case AMDGPU::BI__builtin_amdgcn_class: 7956 case AMDGPU::BI__builtin_amdgcn_classf: 7957 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_class); 7958 7959 case AMDGPU::BI__builtin_amdgcn_read_exec: { 7960 CallInst *CI = cast<CallInst>( 7961 EmitSpecialRegisterBuiltin(*this, E, Int64Ty, Int64Ty, true, "exec")); 7962 CI->setConvergent(); 7963 return CI; 7964 } 7965 7966 // amdgcn workitem 7967 case AMDGPU::BI__builtin_amdgcn_workitem_id_x: 7968 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_x, 0, 1024); 7969 case AMDGPU::BI__builtin_amdgcn_workitem_id_y: 7970 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_y, 0, 1024); 7971 case AMDGPU::BI__builtin_amdgcn_workitem_id_z: 7972 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_z, 0, 1024); 7973 7974 // r600 intrinsics 7975 case AMDGPU::BI__builtin_r600_recipsqrt_ieee: 7976 case AMDGPU::BI__builtin_r600_recipsqrt_ieeef: 7977 return emitUnaryBuiltin(*this, E, Intrinsic::r600_recipsqrt_ieee); 7978 case AMDGPU::BI__builtin_r600_read_tidig_x: 7979 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_x, 0, 1024); 7980 case AMDGPU::BI__builtin_r600_read_tidig_y: 7981 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_y, 0, 1024); 7982 case AMDGPU::BI__builtin_r600_read_tidig_z: 7983 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_z, 0, 1024); 7984 default: 7985 return nullptr; 7986 } 7987 } 7988 7989 /// Handle a SystemZ function in which the final argument is a pointer 7990 /// to an int that receives the post-instruction CC value. At the LLVM level 7991 /// this is represented as a function that returns a {result, cc} pair. 7992 static Value *EmitSystemZIntrinsicWithCC(CodeGenFunction &CGF, 7993 unsigned IntrinsicID, 7994 const CallExpr *E) { 7995 unsigned NumArgs = E->getNumArgs() - 1; 7996 SmallVector<Value *, 8> Args(NumArgs); 7997 for (unsigned I = 0; I < NumArgs; ++I) 7998 Args[I] = CGF.EmitScalarExpr(E->getArg(I)); 7999 Address CCPtr = CGF.EmitPointerWithAlignment(E->getArg(NumArgs)); 8000 Value *F = CGF.CGM.getIntrinsic(IntrinsicID); 8001 Value *Call = CGF.Builder.CreateCall(F, Args); 8002 Value *CC = CGF.Builder.CreateExtractValue(Call, 1); 8003 CGF.Builder.CreateStore(CC, CCPtr); 8004 return CGF.Builder.CreateExtractValue(Call, 0); 8005 } 8006 8007 Value *CodeGenFunction::EmitSystemZBuiltinExpr(unsigned BuiltinID, 8008 const CallExpr *E) { 8009 switch (BuiltinID) { 8010 case SystemZ::BI__builtin_tbegin: { 8011 Value *TDB = EmitScalarExpr(E->getArg(0)); 8012 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 8013 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin); 8014 return Builder.CreateCall(F, {TDB, Control}); 8015 } 8016 case SystemZ::BI__builtin_tbegin_nofloat: { 8017 Value *TDB = EmitScalarExpr(E->getArg(0)); 8018 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 8019 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin_nofloat); 8020 return Builder.CreateCall(F, {TDB, Control}); 8021 } 8022 case SystemZ::BI__builtin_tbeginc: { 8023 Value *TDB = llvm::ConstantPointerNull::get(Int8PtrTy); 8024 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff08); 8025 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbeginc); 8026 return Builder.CreateCall(F, {TDB, Control}); 8027 } 8028 case SystemZ::BI__builtin_tabort: { 8029 Value *Data = EmitScalarExpr(E->getArg(0)); 8030 Value *F = CGM.getIntrinsic(Intrinsic::s390_tabort); 8031 return Builder.CreateCall(F, Builder.CreateSExt(Data, Int64Ty, "tabort")); 8032 } 8033 case SystemZ::BI__builtin_non_tx_store: { 8034 Value *Address = EmitScalarExpr(E->getArg(0)); 8035 Value *Data = EmitScalarExpr(E->getArg(1)); 8036 Value *F = CGM.getIntrinsic(Intrinsic::s390_ntstg); 8037 return Builder.CreateCall(F, {Data, Address}); 8038 } 8039 8040 // Vector builtins. Note that most vector builtins are mapped automatically 8041 // to target-specific LLVM intrinsics. The ones handled specially here can 8042 // be represented via standard LLVM IR, which is preferable to enable common 8043 // LLVM optimizations. 8044 8045 case SystemZ::BI__builtin_s390_vpopctb: 8046 case SystemZ::BI__builtin_s390_vpopcth: 8047 case SystemZ::BI__builtin_s390_vpopctf: 8048 case SystemZ::BI__builtin_s390_vpopctg: { 8049 llvm::Type *ResultType = ConvertType(E->getType()); 8050 Value *X = EmitScalarExpr(E->getArg(0)); 8051 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 8052 return Builder.CreateCall(F, X); 8053 } 8054 8055 case SystemZ::BI__builtin_s390_vclzb: 8056 case SystemZ::BI__builtin_s390_vclzh: 8057 case SystemZ::BI__builtin_s390_vclzf: 8058 case SystemZ::BI__builtin_s390_vclzg: { 8059 llvm::Type *ResultType = ConvertType(E->getType()); 8060 Value *X = EmitScalarExpr(E->getArg(0)); 8061 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 8062 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 8063 return Builder.CreateCall(F, {X, Undef}); 8064 } 8065 8066 case SystemZ::BI__builtin_s390_vctzb: 8067 case SystemZ::BI__builtin_s390_vctzh: 8068 case SystemZ::BI__builtin_s390_vctzf: 8069 case SystemZ::BI__builtin_s390_vctzg: { 8070 llvm::Type *ResultType = ConvertType(E->getType()); 8071 Value *X = EmitScalarExpr(E->getArg(0)); 8072 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 8073 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 8074 return Builder.CreateCall(F, {X, Undef}); 8075 } 8076 8077 case SystemZ::BI__builtin_s390_vfsqdb: { 8078 llvm::Type *ResultType = ConvertType(E->getType()); 8079 Value *X = EmitScalarExpr(E->getArg(0)); 8080 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, ResultType); 8081 return Builder.CreateCall(F, X); 8082 } 8083 case SystemZ::BI__builtin_s390_vfmadb: { 8084 llvm::Type *ResultType = ConvertType(E->getType()); 8085 Value *X = EmitScalarExpr(E->getArg(0)); 8086 Value *Y = EmitScalarExpr(E->getArg(1)); 8087 Value *Z = EmitScalarExpr(E->getArg(2)); 8088 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 8089 return Builder.CreateCall(F, {X, Y, Z}); 8090 } 8091 case SystemZ::BI__builtin_s390_vfmsdb: { 8092 llvm::Type *ResultType = ConvertType(E->getType()); 8093 Value *X = EmitScalarExpr(E->getArg(0)); 8094 Value *Y = EmitScalarExpr(E->getArg(1)); 8095 Value *Z = EmitScalarExpr(E->getArg(2)); 8096 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 8097 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 8098 return Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 8099 } 8100 case SystemZ::BI__builtin_s390_vflpdb: { 8101 llvm::Type *ResultType = ConvertType(E->getType()); 8102 Value *X = EmitScalarExpr(E->getArg(0)); 8103 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 8104 return Builder.CreateCall(F, X); 8105 } 8106 case SystemZ::BI__builtin_s390_vflndb: { 8107 llvm::Type *ResultType = ConvertType(E->getType()); 8108 Value *X = EmitScalarExpr(E->getArg(0)); 8109 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 8110 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 8111 return Builder.CreateFSub(Zero, Builder.CreateCall(F, X), "sub"); 8112 } 8113 case SystemZ::BI__builtin_s390_vfidb: { 8114 llvm::Type *ResultType = ConvertType(E->getType()); 8115 Value *X = EmitScalarExpr(E->getArg(0)); 8116 // Constant-fold the M4 and M5 mask arguments. 8117 llvm::APSInt M4, M5; 8118 bool IsConstM4 = E->getArg(1)->isIntegerConstantExpr(M4, getContext()); 8119 bool IsConstM5 = E->getArg(2)->isIntegerConstantExpr(M5, getContext()); 8120 assert(IsConstM4 && IsConstM5 && "Constant arg isn't actually constant?"); 8121 (void)IsConstM4; (void)IsConstM5; 8122 // Check whether this instance of vfidb can be represented via a LLVM 8123 // standard intrinsic. We only support some combinations of M4 and M5. 8124 Intrinsic::ID ID = Intrinsic::not_intrinsic; 8125 switch (M4.getZExtValue()) { 8126 default: break; 8127 case 0: // IEEE-inexact exception allowed 8128 switch (M5.getZExtValue()) { 8129 default: break; 8130 case 0: ID = Intrinsic::rint; break; 8131 } 8132 break; 8133 case 4: // IEEE-inexact exception suppressed 8134 switch (M5.getZExtValue()) { 8135 default: break; 8136 case 0: ID = Intrinsic::nearbyint; break; 8137 case 1: ID = Intrinsic::round; break; 8138 case 5: ID = Intrinsic::trunc; break; 8139 case 6: ID = Intrinsic::ceil; break; 8140 case 7: ID = Intrinsic::floor; break; 8141 } 8142 break; 8143 } 8144 if (ID != Intrinsic::not_intrinsic) { 8145 Function *F = CGM.getIntrinsic(ID, ResultType); 8146 return Builder.CreateCall(F, X); 8147 } 8148 Function *F = CGM.getIntrinsic(Intrinsic::s390_vfidb); 8149 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 8150 Value *M5Value = llvm::ConstantInt::get(getLLVMContext(), M5); 8151 return Builder.CreateCall(F, {X, M4Value, M5Value}); 8152 } 8153 8154 // Vector intrisincs that output the post-instruction CC value. 8155 8156 #define INTRINSIC_WITH_CC(NAME) \ 8157 case SystemZ::BI__builtin_##NAME: \ 8158 return EmitSystemZIntrinsicWithCC(*this, Intrinsic::NAME, E) 8159 8160 INTRINSIC_WITH_CC(s390_vpkshs); 8161 INTRINSIC_WITH_CC(s390_vpksfs); 8162 INTRINSIC_WITH_CC(s390_vpksgs); 8163 8164 INTRINSIC_WITH_CC(s390_vpklshs); 8165 INTRINSIC_WITH_CC(s390_vpklsfs); 8166 INTRINSIC_WITH_CC(s390_vpklsgs); 8167 8168 INTRINSIC_WITH_CC(s390_vceqbs); 8169 INTRINSIC_WITH_CC(s390_vceqhs); 8170 INTRINSIC_WITH_CC(s390_vceqfs); 8171 INTRINSIC_WITH_CC(s390_vceqgs); 8172 8173 INTRINSIC_WITH_CC(s390_vchbs); 8174 INTRINSIC_WITH_CC(s390_vchhs); 8175 INTRINSIC_WITH_CC(s390_vchfs); 8176 INTRINSIC_WITH_CC(s390_vchgs); 8177 8178 INTRINSIC_WITH_CC(s390_vchlbs); 8179 INTRINSIC_WITH_CC(s390_vchlhs); 8180 INTRINSIC_WITH_CC(s390_vchlfs); 8181 INTRINSIC_WITH_CC(s390_vchlgs); 8182 8183 INTRINSIC_WITH_CC(s390_vfaebs); 8184 INTRINSIC_WITH_CC(s390_vfaehs); 8185 INTRINSIC_WITH_CC(s390_vfaefs); 8186 8187 INTRINSIC_WITH_CC(s390_vfaezbs); 8188 INTRINSIC_WITH_CC(s390_vfaezhs); 8189 INTRINSIC_WITH_CC(s390_vfaezfs); 8190 8191 INTRINSIC_WITH_CC(s390_vfeebs); 8192 INTRINSIC_WITH_CC(s390_vfeehs); 8193 INTRINSIC_WITH_CC(s390_vfeefs); 8194 8195 INTRINSIC_WITH_CC(s390_vfeezbs); 8196 INTRINSIC_WITH_CC(s390_vfeezhs); 8197 INTRINSIC_WITH_CC(s390_vfeezfs); 8198 8199 INTRINSIC_WITH_CC(s390_vfenebs); 8200 INTRINSIC_WITH_CC(s390_vfenehs); 8201 INTRINSIC_WITH_CC(s390_vfenefs); 8202 8203 INTRINSIC_WITH_CC(s390_vfenezbs); 8204 INTRINSIC_WITH_CC(s390_vfenezhs); 8205 INTRINSIC_WITH_CC(s390_vfenezfs); 8206 8207 INTRINSIC_WITH_CC(s390_vistrbs); 8208 INTRINSIC_WITH_CC(s390_vistrhs); 8209 INTRINSIC_WITH_CC(s390_vistrfs); 8210 8211 INTRINSIC_WITH_CC(s390_vstrcbs); 8212 INTRINSIC_WITH_CC(s390_vstrchs); 8213 INTRINSIC_WITH_CC(s390_vstrcfs); 8214 8215 INTRINSIC_WITH_CC(s390_vstrczbs); 8216 INTRINSIC_WITH_CC(s390_vstrczhs); 8217 INTRINSIC_WITH_CC(s390_vstrczfs); 8218 8219 INTRINSIC_WITH_CC(s390_vfcedbs); 8220 INTRINSIC_WITH_CC(s390_vfchdbs); 8221 INTRINSIC_WITH_CC(s390_vfchedbs); 8222 8223 INTRINSIC_WITH_CC(s390_vftcidb); 8224 8225 #undef INTRINSIC_WITH_CC 8226 8227 default: 8228 return nullptr; 8229 } 8230 } 8231 8232 Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, 8233 const CallExpr *E) { 8234 auto MakeLdg = [&](unsigned IntrinsicID) { 8235 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8236 AlignmentSource AlignSource; 8237 clang::CharUnits Align = 8238 getNaturalPointeeTypeAlignment(E->getArg(0)->getType(), &AlignSource); 8239 return Builder.CreateCall( 8240 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 8241 Ptr->getType()}), 8242 {Ptr, ConstantInt::get(Builder.getInt32Ty(), Align.getQuantity())}); 8243 }; 8244 auto MakeScopedAtomic = [&](unsigned IntrinsicID) { 8245 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8246 return Builder.CreateCall( 8247 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 8248 Ptr->getType()}), 8249 {Ptr, EmitScalarExpr(E->getArg(1))}); 8250 }; 8251 switch (BuiltinID) { 8252 case NVPTX::BI__nvvm_atom_add_gen_i: 8253 case NVPTX::BI__nvvm_atom_add_gen_l: 8254 case NVPTX::BI__nvvm_atom_add_gen_ll: 8255 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Add, E); 8256 8257 case NVPTX::BI__nvvm_atom_sub_gen_i: 8258 case NVPTX::BI__nvvm_atom_sub_gen_l: 8259 case NVPTX::BI__nvvm_atom_sub_gen_ll: 8260 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Sub, E); 8261 8262 case NVPTX::BI__nvvm_atom_and_gen_i: 8263 case NVPTX::BI__nvvm_atom_and_gen_l: 8264 case NVPTX::BI__nvvm_atom_and_gen_ll: 8265 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::And, E); 8266 8267 case NVPTX::BI__nvvm_atom_or_gen_i: 8268 case NVPTX::BI__nvvm_atom_or_gen_l: 8269 case NVPTX::BI__nvvm_atom_or_gen_ll: 8270 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Or, E); 8271 8272 case NVPTX::BI__nvvm_atom_xor_gen_i: 8273 case NVPTX::BI__nvvm_atom_xor_gen_l: 8274 case NVPTX::BI__nvvm_atom_xor_gen_ll: 8275 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xor, E); 8276 8277 case NVPTX::BI__nvvm_atom_xchg_gen_i: 8278 case NVPTX::BI__nvvm_atom_xchg_gen_l: 8279 case NVPTX::BI__nvvm_atom_xchg_gen_ll: 8280 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xchg, E); 8281 8282 case NVPTX::BI__nvvm_atom_max_gen_i: 8283 case NVPTX::BI__nvvm_atom_max_gen_l: 8284 case NVPTX::BI__nvvm_atom_max_gen_ll: 8285 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Max, E); 8286 8287 case NVPTX::BI__nvvm_atom_max_gen_ui: 8288 case NVPTX::BI__nvvm_atom_max_gen_ul: 8289 case NVPTX::BI__nvvm_atom_max_gen_ull: 8290 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMax, E); 8291 8292 case NVPTX::BI__nvvm_atom_min_gen_i: 8293 case NVPTX::BI__nvvm_atom_min_gen_l: 8294 case NVPTX::BI__nvvm_atom_min_gen_ll: 8295 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Min, E); 8296 8297 case NVPTX::BI__nvvm_atom_min_gen_ui: 8298 case NVPTX::BI__nvvm_atom_min_gen_ul: 8299 case NVPTX::BI__nvvm_atom_min_gen_ull: 8300 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMin, E); 8301 8302 case NVPTX::BI__nvvm_atom_cas_gen_i: 8303 case NVPTX::BI__nvvm_atom_cas_gen_l: 8304 case NVPTX::BI__nvvm_atom_cas_gen_ll: 8305 // __nvvm_atom_cas_gen_* should return the old value rather than the 8306 // success flag. 8307 return MakeAtomicCmpXchgValue(*this, E, /*ReturnBool=*/false); 8308 8309 case NVPTX::BI__nvvm_atom_add_gen_f: { 8310 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8311 Value *Val = EmitScalarExpr(E->getArg(1)); 8312 // atomicrmw only deals with integer arguments so we need to use 8313 // LLVM's nvvm_atomic_load_add_f32 intrinsic for that. 8314 Value *FnALAF32 = 8315 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f32, Ptr->getType()); 8316 return Builder.CreateCall(FnALAF32, {Ptr, Val}); 8317 } 8318 8319 case NVPTX::BI__nvvm_atom_inc_gen_ui: { 8320 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8321 Value *Val = EmitScalarExpr(E->getArg(1)); 8322 Value *FnALI32 = 8323 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_inc_32, Ptr->getType()); 8324 return Builder.CreateCall(FnALI32, {Ptr, Val}); 8325 } 8326 8327 case NVPTX::BI__nvvm_atom_dec_gen_ui: { 8328 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8329 Value *Val = EmitScalarExpr(E->getArg(1)); 8330 Value *FnALD32 = 8331 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_dec_32, Ptr->getType()); 8332 return Builder.CreateCall(FnALD32, {Ptr, Val}); 8333 } 8334 8335 case NVPTX::BI__nvvm_ldg_c: 8336 case NVPTX::BI__nvvm_ldg_c2: 8337 case NVPTX::BI__nvvm_ldg_c4: 8338 case NVPTX::BI__nvvm_ldg_s: 8339 case NVPTX::BI__nvvm_ldg_s2: 8340 case NVPTX::BI__nvvm_ldg_s4: 8341 case NVPTX::BI__nvvm_ldg_i: 8342 case NVPTX::BI__nvvm_ldg_i2: 8343 case NVPTX::BI__nvvm_ldg_i4: 8344 case NVPTX::BI__nvvm_ldg_l: 8345 case NVPTX::BI__nvvm_ldg_ll: 8346 case NVPTX::BI__nvvm_ldg_ll2: 8347 case NVPTX::BI__nvvm_ldg_uc: 8348 case NVPTX::BI__nvvm_ldg_uc2: 8349 case NVPTX::BI__nvvm_ldg_uc4: 8350 case NVPTX::BI__nvvm_ldg_us: 8351 case NVPTX::BI__nvvm_ldg_us2: 8352 case NVPTX::BI__nvvm_ldg_us4: 8353 case NVPTX::BI__nvvm_ldg_ui: 8354 case NVPTX::BI__nvvm_ldg_ui2: 8355 case NVPTX::BI__nvvm_ldg_ui4: 8356 case NVPTX::BI__nvvm_ldg_ul: 8357 case NVPTX::BI__nvvm_ldg_ull: 8358 case NVPTX::BI__nvvm_ldg_ull2: 8359 // PTX Interoperability section 2.2: "For a vector with an even number of 8360 // elements, its alignment is set to number of elements times the alignment 8361 // of its member: n*alignof(t)." 8362 return MakeLdg(Intrinsic::nvvm_ldg_global_i); 8363 case NVPTX::BI__nvvm_ldg_f: 8364 case NVPTX::BI__nvvm_ldg_f2: 8365 case NVPTX::BI__nvvm_ldg_f4: 8366 case NVPTX::BI__nvvm_ldg_d: 8367 case NVPTX::BI__nvvm_ldg_d2: 8368 return MakeLdg(Intrinsic::nvvm_ldg_global_f); 8369 8370 case NVPTX::BI__nvvm_atom_cta_add_gen_i: 8371 case NVPTX::BI__nvvm_atom_cta_add_gen_l: 8372 case NVPTX::BI__nvvm_atom_cta_add_gen_ll: 8373 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_cta); 8374 case NVPTX::BI__nvvm_atom_sys_add_gen_i: 8375 case NVPTX::BI__nvvm_atom_sys_add_gen_l: 8376 case NVPTX::BI__nvvm_atom_sys_add_gen_ll: 8377 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_sys); 8378 case NVPTX::BI__nvvm_atom_cta_add_gen_f: 8379 case NVPTX::BI__nvvm_atom_cta_add_gen_d: 8380 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_cta); 8381 case NVPTX::BI__nvvm_atom_sys_add_gen_f: 8382 case NVPTX::BI__nvvm_atom_sys_add_gen_d: 8383 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_sys); 8384 case NVPTX::BI__nvvm_atom_cta_xchg_gen_i: 8385 case NVPTX::BI__nvvm_atom_cta_xchg_gen_l: 8386 case NVPTX::BI__nvvm_atom_cta_xchg_gen_ll: 8387 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_cta); 8388 case NVPTX::BI__nvvm_atom_sys_xchg_gen_i: 8389 case NVPTX::BI__nvvm_atom_sys_xchg_gen_l: 8390 case NVPTX::BI__nvvm_atom_sys_xchg_gen_ll: 8391 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_sys); 8392 case NVPTX::BI__nvvm_atom_cta_max_gen_i: 8393 case NVPTX::BI__nvvm_atom_cta_max_gen_ui: 8394 case NVPTX::BI__nvvm_atom_cta_max_gen_l: 8395 case NVPTX::BI__nvvm_atom_cta_max_gen_ul: 8396 case NVPTX::BI__nvvm_atom_cta_max_gen_ll: 8397 case NVPTX::BI__nvvm_atom_cta_max_gen_ull: 8398 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_cta); 8399 case NVPTX::BI__nvvm_atom_sys_max_gen_i: 8400 case NVPTX::BI__nvvm_atom_sys_max_gen_ui: 8401 case NVPTX::BI__nvvm_atom_sys_max_gen_l: 8402 case NVPTX::BI__nvvm_atom_sys_max_gen_ul: 8403 case NVPTX::BI__nvvm_atom_sys_max_gen_ll: 8404 case NVPTX::BI__nvvm_atom_sys_max_gen_ull: 8405 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_sys); 8406 case NVPTX::BI__nvvm_atom_cta_min_gen_i: 8407 case NVPTX::BI__nvvm_atom_cta_min_gen_ui: 8408 case NVPTX::BI__nvvm_atom_cta_min_gen_l: 8409 case NVPTX::BI__nvvm_atom_cta_min_gen_ul: 8410 case NVPTX::BI__nvvm_atom_cta_min_gen_ll: 8411 case NVPTX::BI__nvvm_atom_cta_min_gen_ull: 8412 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_cta); 8413 case NVPTX::BI__nvvm_atom_sys_min_gen_i: 8414 case NVPTX::BI__nvvm_atom_sys_min_gen_ui: 8415 case NVPTX::BI__nvvm_atom_sys_min_gen_l: 8416 case NVPTX::BI__nvvm_atom_sys_min_gen_ul: 8417 case NVPTX::BI__nvvm_atom_sys_min_gen_ll: 8418 case NVPTX::BI__nvvm_atom_sys_min_gen_ull: 8419 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_sys); 8420 case NVPTX::BI__nvvm_atom_cta_inc_gen_ui: 8421 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_cta); 8422 case NVPTX::BI__nvvm_atom_cta_dec_gen_ui: 8423 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_cta); 8424 case NVPTX::BI__nvvm_atom_sys_inc_gen_ui: 8425 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_sys); 8426 case NVPTX::BI__nvvm_atom_sys_dec_gen_ui: 8427 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_sys); 8428 case NVPTX::BI__nvvm_atom_cta_and_gen_i: 8429 case NVPTX::BI__nvvm_atom_cta_and_gen_l: 8430 case NVPTX::BI__nvvm_atom_cta_and_gen_ll: 8431 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_cta); 8432 case NVPTX::BI__nvvm_atom_sys_and_gen_i: 8433 case NVPTX::BI__nvvm_atom_sys_and_gen_l: 8434 case NVPTX::BI__nvvm_atom_sys_and_gen_ll: 8435 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_sys); 8436 case NVPTX::BI__nvvm_atom_cta_or_gen_i: 8437 case NVPTX::BI__nvvm_atom_cta_or_gen_l: 8438 case NVPTX::BI__nvvm_atom_cta_or_gen_ll: 8439 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_cta); 8440 case NVPTX::BI__nvvm_atom_sys_or_gen_i: 8441 case NVPTX::BI__nvvm_atom_sys_or_gen_l: 8442 case NVPTX::BI__nvvm_atom_sys_or_gen_ll: 8443 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_sys); 8444 case NVPTX::BI__nvvm_atom_cta_xor_gen_i: 8445 case NVPTX::BI__nvvm_atom_cta_xor_gen_l: 8446 case NVPTX::BI__nvvm_atom_cta_xor_gen_ll: 8447 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_cta); 8448 case NVPTX::BI__nvvm_atom_sys_xor_gen_i: 8449 case NVPTX::BI__nvvm_atom_sys_xor_gen_l: 8450 case NVPTX::BI__nvvm_atom_sys_xor_gen_ll: 8451 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_sys); 8452 case NVPTX::BI__nvvm_atom_cta_cas_gen_i: 8453 case NVPTX::BI__nvvm_atom_cta_cas_gen_l: 8454 case NVPTX::BI__nvvm_atom_cta_cas_gen_ll: { 8455 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8456 return Builder.CreateCall( 8457 CGM.getIntrinsic( 8458 Intrinsic::nvvm_atomic_cas_gen_i_cta, 8459 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 8460 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 8461 } 8462 case NVPTX::BI__nvvm_atom_sys_cas_gen_i: 8463 case NVPTX::BI__nvvm_atom_sys_cas_gen_l: 8464 case NVPTX::BI__nvvm_atom_sys_cas_gen_ll: { 8465 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8466 return Builder.CreateCall( 8467 CGM.getIntrinsic( 8468 Intrinsic::nvvm_atomic_cas_gen_i_sys, 8469 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 8470 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 8471 } 8472 default: 8473 return nullptr; 8474 } 8475 } 8476 8477 Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, 8478 const CallExpr *E) { 8479 switch (BuiltinID) { 8480 case WebAssembly::BI__builtin_wasm_current_memory: { 8481 llvm::Type *ResultType = ConvertType(E->getType()); 8482 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_current_memory, ResultType); 8483 return Builder.CreateCall(Callee); 8484 } 8485 case WebAssembly::BI__builtin_wasm_grow_memory: { 8486 Value *X = EmitScalarExpr(E->getArg(0)); 8487 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_grow_memory, X->getType()); 8488 return Builder.CreateCall(Callee, X); 8489 } 8490 8491 default: 8492 return nullptr; 8493 } 8494 } 8495