1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This contains code to emit Builtin calls as LLVM code. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "CodeGenFunction.h" 15 #include "CGCXXABI.h" 16 #include "CGObjCRuntime.h" 17 #include "CodeGenModule.h" 18 #include "TargetInfo.h" 19 #include "clang/AST/ASTContext.h" 20 #include "clang/AST/Decl.h" 21 #include "clang/Basic/TargetBuiltins.h" 22 #include "clang/Basic/TargetInfo.h" 23 #include "clang/CodeGen/CGFunctionInfo.h" 24 #include "clang/Sema/SemaDiagnostic.h" 25 #include "llvm/ADT/StringExtras.h" 26 #include "llvm/IR/CallSite.h" 27 #include "llvm/IR/DataLayout.h" 28 #include "llvm/IR/InlineAsm.h" 29 #include "llvm/IR/Intrinsics.h" 30 #include <sstream> 31 32 using namespace clang; 33 using namespace CodeGen; 34 using namespace llvm; 35 36 /// getBuiltinLibFunction - Given a builtin id for a function like 37 /// "__builtin_fabsf", return a Function* for "fabsf". 38 llvm::Value *CodeGenModule::getBuiltinLibFunction(const FunctionDecl *FD, 39 unsigned BuiltinID) { 40 assert(Context.BuiltinInfo.isLibFunction(BuiltinID)); 41 42 // Get the name, skip over the __builtin_ prefix (if necessary). 43 StringRef Name; 44 GlobalDecl D(FD); 45 46 // If the builtin has been declared explicitly with an assembler label, 47 // use the mangled name. This differs from the plain label on platforms 48 // that prefix labels. 49 if (FD->hasAttr<AsmLabelAttr>()) 50 Name = getMangledName(D); 51 else 52 Name = Context.BuiltinInfo.getName(BuiltinID) + 10; 53 54 llvm::FunctionType *Ty = 55 cast<llvm::FunctionType>(getTypes().ConvertType(FD->getType())); 56 57 return GetOrCreateLLVMFunction(Name, Ty, D, /*ForVTable=*/false); 58 } 59 60 /// Emit the conversions required to turn the given value into an 61 /// integer of the given size. 62 static Value *EmitToInt(CodeGenFunction &CGF, llvm::Value *V, 63 QualType T, llvm::IntegerType *IntType) { 64 V = CGF.EmitToMemory(V, T); 65 66 if (V->getType()->isPointerTy()) 67 return CGF.Builder.CreatePtrToInt(V, IntType); 68 69 assert(V->getType() == IntType); 70 return V; 71 } 72 73 static Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V, 74 QualType T, llvm::Type *ResultType) { 75 V = CGF.EmitFromMemory(V, T); 76 77 if (ResultType->isPointerTy()) 78 return CGF.Builder.CreateIntToPtr(V, ResultType); 79 80 assert(V->getType() == ResultType); 81 return V; 82 } 83 84 /// Utility to insert an atomic instruction based on Instrinsic::ID 85 /// and the expression node. 86 static Value *MakeBinaryAtomicValue(CodeGenFunction &CGF, 87 llvm::AtomicRMWInst::BinOp Kind, 88 const CallExpr *E) { 89 QualType T = E->getType(); 90 assert(E->getArg(0)->getType()->isPointerType()); 91 assert(CGF.getContext().hasSameUnqualifiedType(T, 92 E->getArg(0)->getType()->getPointeeType())); 93 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 94 95 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 96 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 97 98 llvm::IntegerType *IntType = 99 llvm::IntegerType::get(CGF.getLLVMContext(), 100 CGF.getContext().getTypeSize(T)); 101 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 102 103 llvm::Value *Args[2]; 104 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 105 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 106 llvm::Type *ValueType = Args[1]->getType(); 107 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 108 109 llvm::Value *Result = 110 CGF.Builder.CreateAtomicRMW(Kind, Args[0], Args[1], 111 llvm::SequentiallyConsistent); 112 return EmitFromInt(CGF, Result, T, ValueType); 113 } 114 115 static Value *EmitNontemporalStore(CodeGenFunction &CGF, const CallExpr *E) { 116 Value *Val = CGF.EmitScalarExpr(E->getArg(0)); 117 Value *Address = CGF.EmitScalarExpr(E->getArg(1)); 118 119 // Convert the type of the pointer to a pointer to the stored type. 120 Val = CGF.EmitToMemory(Val, E->getArg(0)->getType()); 121 Value *BC = CGF.Builder.CreateBitCast( 122 Address, llvm::PointerType::getUnqual(Val->getType()), "cast"); 123 LValue LV = CGF.MakeNaturalAlignAddrLValue(BC, E->getArg(0)->getType()); 124 LV.setNontemporal(true); 125 CGF.EmitStoreOfScalar(Val, LV, false); 126 return nullptr; 127 } 128 129 static Value *EmitNontemporalLoad(CodeGenFunction &CGF, const CallExpr *E) { 130 Value *Address = CGF.EmitScalarExpr(E->getArg(0)); 131 132 LValue LV = CGF.MakeNaturalAlignAddrLValue(Address, E->getType()); 133 LV.setNontemporal(true); 134 return CGF.EmitLoadOfScalar(LV, E->getExprLoc()); 135 } 136 137 static RValue EmitBinaryAtomic(CodeGenFunction &CGF, 138 llvm::AtomicRMWInst::BinOp Kind, 139 const CallExpr *E) { 140 return RValue::get(MakeBinaryAtomicValue(CGF, Kind, E)); 141 } 142 143 /// Utility to insert an atomic instruction based Instrinsic::ID and 144 /// the expression node, where the return value is the result of the 145 /// operation. 146 static RValue EmitBinaryAtomicPost(CodeGenFunction &CGF, 147 llvm::AtomicRMWInst::BinOp Kind, 148 const CallExpr *E, 149 Instruction::BinaryOps Op, 150 bool Invert = false) { 151 QualType T = E->getType(); 152 assert(E->getArg(0)->getType()->isPointerType()); 153 assert(CGF.getContext().hasSameUnqualifiedType(T, 154 E->getArg(0)->getType()->getPointeeType())); 155 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 156 157 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 158 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 159 160 llvm::IntegerType *IntType = 161 llvm::IntegerType::get(CGF.getLLVMContext(), 162 CGF.getContext().getTypeSize(T)); 163 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 164 165 llvm::Value *Args[2]; 166 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 167 llvm::Type *ValueType = Args[1]->getType(); 168 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 169 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 170 171 llvm::Value *Result = 172 CGF.Builder.CreateAtomicRMW(Kind, Args[0], Args[1], 173 llvm::SequentiallyConsistent); 174 Result = CGF.Builder.CreateBinOp(Op, Result, Args[1]); 175 if (Invert) 176 Result = CGF.Builder.CreateBinOp(llvm::Instruction::Xor, Result, 177 llvm::ConstantInt::get(IntType, -1)); 178 Result = EmitFromInt(CGF, Result, T, ValueType); 179 return RValue::get(Result); 180 } 181 182 /// @brief Utility to insert an atomic cmpxchg instruction. 183 /// 184 /// @param CGF The current codegen function. 185 /// @param E Builtin call expression to convert to cmpxchg. 186 /// arg0 - address to operate on 187 /// arg1 - value to compare with 188 /// arg2 - new value 189 /// @param ReturnBool Specifies whether to return success flag of 190 /// cmpxchg result or the old value. 191 /// 192 /// @returns result of cmpxchg, according to ReturnBool 193 static Value *MakeAtomicCmpXchgValue(CodeGenFunction &CGF, const CallExpr *E, 194 bool ReturnBool) { 195 QualType T = ReturnBool ? E->getArg(1)->getType() : E->getType(); 196 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 197 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 198 199 llvm::IntegerType *IntType = llvm::IntegerType::get( 200 CGF.getLLVMContext(), CGF.getContext().getTypeSize(T)); 201 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 202 203 Value *Args[3]; 204 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 205 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 206 llvm::Type *ValueType = Args[1]->getType(); 207 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 208 Args[2] = EmitToInt(CGF, CGF.EmitScalarExpr(E->getArg(2)), T, IntType); 209 210 Value *Pair = CGF.Builder.CreateAtomicCmpXchg(Args[0], Args[1], Args[2], 211 llvm::SequentiallyConsistent, 212 llvm::SequentiallyConsistent); 213 if (ReturnBool) 214 // Extract boolean success flag and zext it to int. 215 return CGF.Builder.CreateZExt(CGF.Builder.CreateExtractValue(Pair, 1), 216 CGF.ConvertType(E->getType())); 217 else 218 // Extract old value and emit it using the same type as compare value. 219 return EmitFromInt(CGF, CGF.Builder.CreateExtractValue(Pair, 0), T, 220 ValueType); 221 } 222 223 /// EmitFAbs - Emit a call to @llvm.fabs(). 224 static Value *EmitFAbs(CodeGenFunction &CGF, Value *V) { 225 Value *F = CGF.CGM.getIntrinsic(Intrinsic::fabs, V->getType()); 226 llvm::CallInst *Call = CGF.Builder.CreateCall(F, V); 227 Call->setDoesNotAccessMemory(); 228 return Call; 229 } 230 231 /// Emit the computation of the sign bit for a floating point value. Returns 232 /// the i1 sign bit value. 233 static Value *EmitSignBit(CodeGenFunction &CGF, Value *V) { 234 LLVMContext &C = CGF.CGM.getLLVMContext(); 235 236 llvm::Type *Ty = V->getType(); 237 int Width = Ty->getPrimitiveSizeInBits(); 238 llvm::Type *IntTy = llvm::IntegerType::get(C, Width); 239 V = CGF.Builder.CreateBitCast(V, IntTy); 240 if (Ty->isPPC_FP128Ty()) { 241 // We want the sign bit of the higher-order double. The bitcast we just 242 // did works as if the double-double was stored to memory and then 243 // read as an i128. The "store" will put the higher-order double in the 244 // lower address in both little- and big-Endian modes, but the "load" 245 // will treat those bits as a different part of the i128: the low bits in 246 // little-Endian, the high bits in big-Endian. Therefore, on big-Endian 247 // we need to shift the high bits down to the low before truncating. 248 Width >>= 1; 249 if (CGF.getTarget().isBigEndian()) { 250 Value *ShiftCst = llvm::ConstantInt::get(IntTy, Width); 251 V = CGF.Builder.CreateLShr(V, ShiftCst); 252 } 253 // We are truncating value in order to extract the higher-order 254 // double, which we will be using to extract the sign from. 255 IntTy = llvm::IntegerType::get(C, Width); 256 V = CGF.Builder.CreateTrunc(V, IntTy); 257 } 258 Value *Zero = llvm::Constant::getNullValue(IntTy); 259 return CGF.Builder.CreateICmpSLT(V, Zero); 260 } 261 262 static RValue emitLibraryCall(CodeGenFunction &CGF, const FunctionDecl *Fn, 263 const CallExpr *E, llvm::Value *calleeValue) { 264 return CGF.EmitCall(E->getCallee()->getType(), calleeValue, E, 265 ReturnValueSlot(), Fn); 266 } 267 268 /// \brief Emit a call to llvm.{sadd,uadd,ssub,usub,smul,umul}.with.overflow.* 269 /// depending on IntrinsicID. 270 /// 271 /// \arg CGF The current codegen function. 272 /// \arg IntrinsicID The ID for the Intrinsic we wish to generate. 273 /// \arg X The first argument to the llvm.*.with.overflow.*. 274 /// \arg Y The second argument to the llvm.*.with.overflow.*. 275 /// \arg Carry The carry returned by the llvm.*.with.overflow.*. 276 /// \returns The result (i.e. sum/product) returned by the intrinsic. 277 static llvm::Value *EmitOverflowIntrinsic(CodeGenFunction &CGF, 278 const llvm::Intrinsic::ID IntrinsicID, 279 llvm::Value *X, llvm::Value *Y, 280 llvm::Value *&Carry) { 281 // Make sure we have integers of the same width. 282 assert(X->getType() == Y->getType() && 283 "Arguments must be the same type. (Did you forget to make sure both " 284 "arguments have the same integer width?)"); 285 286 llvm::Value *Callee = CGF.CGM.getIntrinsic(IntrinsicID, X->getType()); 287 llvm::Value *Tmp = CGF.Builder.CreateCall(Callee, {X, Y}); 288 Carry = CGF.Builder.CreateExtractValue(Tmp, 1); 289 return CGF.Builder.CreateExtractValue(Tmp, 0); 290 } 291 292 namespace { 293 struct WidthAndSignedness { 294 unsigned Width; 295 bool Signed; 296 }; 297 } 298 299 static WidthAndSignedness 300 getIntegerWidthAndSignedness(const clang::ASTContext &context, 301 const clang::QualType Type) { 302 assert(Type->isIntegerType() && "Given type is not an integer."); 303 unsigned Width = Type->isBooleanType() ? 1 : context.getTypeInfo(Type).Width; 304 bool Signed = Type->isSignedIntegerType(); 305 return {Width, Signed}; 306 } 307 308 // Given one or more integer types, this function produces an integer type that 309 // encompasses them: any value in one of the given types could be expressed in 310 // the encompassing type. 311 static struct WidthAndSignedness 312 EncompassingIntegerType(ArrayRef<struct WidthAndSignedness> Types) { 313 assert(Types.size() > 0 && "Empty list of types."); 314 315 // If any of the given types is signed, we must return a signed type. 316 bool Signed = false; 317 for (const auto &Type : Types) { 318 Signed |= Type.Signed; 319 } 320 321 // The encompassing type must have a width greater than or equal to the width 322 // of the specified types. Aditionally, if the encompassing type is signed, 323 // its width must be strictly greater than the width of any unsigned types 324 // given. 325 unsigned Width = 0; 326 for (const auto &Type : Types) { 327 unsigned MinWidth = Type.Width + (Signed && !Type.Signed); 328 if (Width < MinWidth) { 329 Width = MinWidth; 330 } 331 } 332 333 return {Width, Signed}; 334 } 335 336 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) { 337 llvm::Type *DestType = Int8PtrTy; 338 if (ArgValue->getType() != DestType) 339 ArgValue = 340 Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data()); 341 342 Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend; 343 return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue); 344 } 345 346 // Returns true if we have a valid set of target features. 347 bool CodeGenFunction::checkBuiltinTargetFeatures( 348 const FunctionDecl *TargetDecl) { 349 // Early exit if this is an indirect call. 350 if (!TargetDecl) 351 return true; 352 353 // Get the current enclosing function if it exists. If it doesn't 354 // we can't check the target features anyhow. 355 const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(CurFuncDecl); 356 if (!FD) return true; 357 358 unsigned BuiltinID = TargetDecl->getBuiltinID(); 359 const char *FeatureList = 360 CGM.getContext().BuiltinInfo.getRequiredFeatures(BuiltinID); 361 362 if (!FeatureList || StringRef(FeatureList) == "") 363 return true; 364 365 StringRef TargetCPU = Target.getTargetOpts().CPU; 366 llvm::StringMap<bool> FeatureMap; 367 368 if (const auto *TD = FD->getAttr<TargetAttr>()) { 369 // If we have a TargetAttr build up the feature map based on that. 370 TargetAttr::ParsedTargetAttr ParsedAttr = TD->parse(); 371 372 // Make a copy of the features as passed on the command line into the 373 // beginning of the additional features from the function to override. 374 ParsedAttr.first.insert(ParsedAttr.first.begin(), 375 Target.getTargetOpts().FeaturesAsWritten.begin(), 376 Target.getTargetOpts().FeaturesAsWritten.end()); 377 378 if (ParsedAttr.second != "") 379 TargetCPU = ParsedAttr.second; 380 381 // Now populate the feature map, first with the TargetCPU which is either 382 // the default or a new one from the target attribute string. Then we'll use 383 // the passed in features (FeaturesAsWritten) along with the new ones from 384 // the attribute. 385 Target.initFeatureMap(FeatureMap, CGM.getDiags(), TargetCPU, 386 ParsedAttr.first); 387 } else { 388 Target.initFeatureMap(FeatureMap, CGM.getDiags(), TargetCPU, 389 Target.getTargetOpts().Features); 390 } 391 392 // If we have at least one of the features in the feature list return 393 // true, otherwise return false. 394 SmallVector<StringRef, 1> AttrFeatures; 395 StringRef(FeatureList).split(AttrFeatures, ","); 396 return std::all_of(AttrFeatures.begin(), AttrFeatures.end(), 397 [&](StringRef &Feature) { 398 SmallVector<StringRef, 1> OrFeatures; 399 Feature.split(OrFeatures, "|"); 400 return std::any_of(OrFeatures.begin(), OrFeatures.end(), 401 [&](StringRef &Feature) { 402 return FeatureMap[Feature]; 403 }); 404 }); 405 } 406 407 RValue CodeGenFunction::EmitBuiltinExpr(const FunctionDecl *FD, 408 unsigned BuiltinID, const CallExpr *E, 409 ReturnValueSlot ReturnValue) { 410 // See if we can constant fold this builtin. If so, don't emit it at all. 411 Expr::EvalResult Result; 412 if (E->EvaluateAsRValue(Result, CGM.getContext()) && 413 !Result.hasSideEffects()) { 414 if (Result.Val.isInt()) 415 return RValue::get(llvm::ConstantInt::get(getLLVMContext(), 416 Result.Val.getInt())); 417 if (Result.Val.isFloat()) 418 return RValue::get(llvm::ConstantFP::get(getLLVMContext(), 419 Result.Val.getFloat())); 420 } 421 422 switch (BuiltinID) { 423 default: break; // Handle intrinsics and libm functions below. 424 case Builtin::BI__builtin___CFStringMakeConstantString: 425 case Builtin::BI__builtin___NSStringMakeConstantString: 426 return RValue::get(CGM.EmitConstantExpr(E, E->getType(), nullptr)); 427 case Builtin::BI__builtin_stdarg_start: 428 case Builtin::BI__builtin_va_start: 429 case Builtin::BI__va_start: 430 case Builtin::BI__builtin_va_end: 431 return RValue::get( 432 EmitVAStartEnd(BuiltinID == Builtin::BI__va_start 433 ? EmitScalarExpr(E->getArg(0)) 434 : EmitVAListRef(E->getArg(0)).getPointer(), 435 BuiltinID != Builtin::BI__builtin_va_end)); 436 case Builtin::BI__builtin_va_copy: { 437 Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer(); 438 Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer(); 439 440 llvm::Type *Type = Int8PtrTy; 441 442 DstPtr = Builder.CreateBitCast(DstPtr, Type); 443 SrcPtr = Builder.CreateBitCast(SrcPtr, Type); 444 return RValue::get(Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), 445 {DstPtr, SrcPtr})); 446 } 447 case Builtin::BI__builtin_abs: 448 case Builtin::BI__builtin_labs: 449 case Builtin::BI__builtin_llabs: { 450 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 451 452 Value *NegOp = Builder.CreateNeg(ArgValue, "neg"); 453 Value *CmpResult = 454 Builder.CreateICmpSGE(ArgValue, 455 llvm::Constant::getNullValue(ArgValue->getType()), 456 "abscond"); 457 Value *Result = 458 Builder.CreateSelect(CmpResult, ArgValue, NegOp, "abs"); 459 460 return RValue::get(Result); 461 } 462 case Builtin::BI__builtin_fabs: 463 case Builtin::BI__builtin_fabsf: 464 case Builtin::BI__builtin_fabsl: { 465 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 466 Value *Result = EmitFAbs(*this, Arg1); 467 return RValue::get(Result); 468 } 469 case Builtin::BI__builtin_fmod: 470 case Builtin::BI__builtin_fmodf: 471 case Builtin::BI__builtin_fmodl: { 472 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 473 Value *Arg2 = EmitScalarExpr(E->getArg(1)); 474 Value *Result = Builder.CreateFRem(Arg1, Arg2, "fmod"); 475 return RValue::get(Result); 476 } 477 478 case Builtin::BI__builtin_conj: 479 case Builtin::BI__builtin_conjf: 480 case Builtin::BI__builtin_conjl: { 481 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 482 Value *Real = ComplexVal.first; 483 Value *Imag = ComplexVal.second; 484 Value *Zero = 485 Imag->getType()->isFPOrFPVectorTy() 486 ? llvm::ConstantFP::getZeroValueForNegation(Imag->getType()) 487 : llvm::Constant::getNullValue(Imag->getType()); 488 489 Imag = Builder.CreateFSub(Zero, Imag, "sub"); 490 return RValue::getComplex(std::make_pair(Real, Imag)); 491 } 492 case Builtin::BI__builtin_creal: 493 case Builtin::BI__builtin_crealf: 494 case Builtin::BI__builtin_creall: 495 case Builtin::BIcreal: 496 case Builtin::BIcrealf: 497 case Builtin::BIcreall: { 498 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 499 return RValue::get(ComplexVal.first); 500 } 501 502 case Builtin::BI__builtin_cimag: 503 case Builtin::BI__builtin_cimagf: 504 case Builtin::BI__builtin_cimagl: 505 case Builtin::BIcimag: 506 case Builtin::BIcimagf: 507 case Builtin::BIcimagl: { 508 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 509 return RValue::get(ComplexVal.second); 510 } 511 512 case Builtin::BI__builtin_ctzs: 513 case Builtin::BI__builtin_ctz: 514 case Builtin::BI__builtin_ctzl: 515 case Builtin::BI__builtin_ctzll: { 516 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 517 518 llvm::Type *ArgType = ArgValue->getType(); 519 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 520 521 llvm::Type *ResultType = ConvertType(E->getType()); 522 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 523 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 524 if (Result->getType() != ResultType) 525 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 526 "cast"); 527 return RValue::get(Result); 528 } 529 case Builtin::BI__builtin_clzs: 530 case Builtin::BI__builtin_clz: 531 case Builtin::BI__builtin_clzl: 532 case Builtin::BI__builtin_clzll: { 533 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 534 535 llvm::Type *ArgType = ArgValue->getType(); 536 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 537 538 llvm::Type *ResultType = ConvertType(E->getType()); 539 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 540 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 541 if (Result->getType() != ResultType) 542 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 543 "cast"); 544 return RValue::get(Result); 545 } 546 case Builtin::BI__builtin_ffs: 547 case Builtin::BI__builtin_ffsl: 548 case Builtin::BI__builtin_ffsll: { 549 // ffs(x) -> x ? cttz(x) + 1 : 0 550 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 551 552 llvm::Type *ArgType = ArgValue->getType(); 553 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 554 555 llvm::Type *ResultType = ConvertType(E->getType()); 556 Value *Tmp = 557 Builder.CreateAdd(Builder.CreateCall(F, {ArgValue, Builder.getTrue()}), 558 llvm::ConstantInt::get(ArgType, 1)); 559 Value *Zero = llvm::Constant::getNullValue(ArgType); 560 Value *IsZero = Builder.CreateICmpEQ(ArgValue, Zero, "iszero"); 561 Value *Result = Builder.CreateSelect(IsZero, Zero, Tmp, "ffs"); 562 if (Result->getType() != ResultType) 563 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 564 "cast"); 565 return RValue::get(Result); 566 } 567 case Builtin::BI__builtin_parity: 568 case Builtin::BI__builtin_parityl: 569 case Builtin::BI__builtin_parityll: { 570 // parity(x) -> ctpop(x) & 1 571 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 572 573 llvm::Type *ArgType = ArgValue->getType(); 574 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 575 576 llvm::Type *ResultType = ConvertType(E->getType()); 577 Value *Tmp = Builder.CreateCall(F, ArgValue); 578 Value *Result = Builder.CreateAnd(Tmp, llvm::ConstantInt::get(ArgType, 1)); 579 if (Result->getType() != ResultType) 580 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 581 "cast"); 582 return RValue::get(Result); 583 } 584 case Builtin::BI__builtin_popcount: 585 case Builtin::BI__builtin_popcountl: 586 case Builtin::BI__builtin_popcountll: { 587 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 588 589 llvm::Type *ArgType = ArgValue->getType(); 590 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 591 592 llvm::Type *ResultType = ConvertType(E->getType()); 593 Value *Result = Builder.CreateCall(F, ArgValue); 594 if (Result->getType() != ResultType) 595 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 596 "cast"); 597 return RValue::get(Result); 598 } 599 case Builtin::BI__builtin_unpredictable: { 600 // Always return the argument of __builtin_unpredictable. LLVM does not 601 // handle this builtin. Metadata for this builtin should be added directly 602 // to instructions such as branches or switches that use it. 603 return RValue::get(EmitScalarExpr(E->getArg(0))); 604 } 605 case Builtin::BI__builtin_expect: { 606 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 607 llvm::Type *ArgType = ArgValue->getType(); 608 609 Value *ExpectedValue = EmitScalarExpr(E->getArg(1)); 610 // Don't generate llvm.expect on -O0 as the backend won't use it for 611 // anything. 612 // Note, we still IRGen ExpectedValue because it could have side-effects. 613 if (CGM.getCodeGenOpts().OptimizationLevel == 0) 614 return RValue::get(ArgValue); 615 616 Value *FnExpect = CGM.getIntrinsic(Intrinsic::expect, ArgType); 617 Value *Result = 618 Builder.CreateCall(FnExpect, {ArgValue, ExpectedValue}, "expval"); 619 return RValue::get(Result); 620 } 621 case Builtin::BI__builtin_assume_aligned: { 622 Value *PtrValue = EmitScalarExpr(E->getArg(0)); 623 Value *OffsetValue = 624 (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : nullptr; 625 626 Value *AlignmentValue = EmitScalarExpr(E->getArg(1)); 627 ConstantInt *AlignmentCI = cast<ConstantInt>(AlignmentValue); 628 unsigned Alignment = (unsigned) AlignmentCI->getZExtValue(); 629 630 EmitAlignmentAssumption(PtrValue, Alignment, OffsetValue); 631 return RValue::get(PtrValue); 632 } 633 case Builtin::BI__assume: 634 case Builtin::BI__builtin_assume: { 635 if (E->getArg(0)->HasSideEffects(getContext())) 636 return RValue::get(nullptr); 637 638 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 639 Value *FnAssume = CGM.getIntrinsic(Intrinsic::assume); 640 return RValue::get(Builder.CreateCall(FnAssume, ArgValue)); 641 } 642 case Builtin::BI__builtin_bswap16: 643 case Builtin::BI__builtin_bswap32: 644 case Builtin::BI__builtin_bswap64: { 645 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 646 llvm::Type *ArgType = ArgValue->getType(); 647 Value *F = CGM.getIntrinsic(Intrinsic::bswap, ArgType); 648 return RValue::get(Builder.CreateCall(F, ArgValue)); 649 } 650 case Builtin::BI__builtin_object_size: { 651 // We rely on constant folding to deal with expressions with side effects. 652 assert(!E->getArg(0)->HasSideEffects(getContext()) && 653 "should have been constant folded"); 654 655 // We pass this builtin onto the optimizer so that it can 656 // figure out the object size in more complex cases. 657 llvm::Type *ResType = ConvertType(E->getType()); 658 659 // LLVM only supports 0 and 2, make sure that we pass along that 660 // as a boolean. 661 Value *Ty = EmitScalarExpr(E->getArg(1)); 662 ConstantInt *CI = dyn_cast<ConstantInt>(Ty); 663 assert(CI); 664 uint64_t val = CI->getZExtValue(); 665 CI = ConstantInt::get(Builder.getInt1Ty(), (val & 0x2) >> 1); 666 // FIXME: Get right address space. 667 llvm::Type *Tys[] = { ResType, Builder.getInt8PtrTy(0) }; 668 Value *F = CGM.getIntrinsic(Intrinsic::objectsize, Tys); 669 return RValue::get( 670 Builder.CreateCall(F, {EmitScalarExpr(E->getArg(0)), CI})); 671 } 672 case Builtin::BI__builtin_prefetch: { 673 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); 674 // FIXME: Technically these constants should of type 'int', yes? 675 RW = (E->getNumArgs() > 1) ? EmitScalarExpr(E->getArg(1)) : 676 llvm::ConstantInt::get(Int32Ty, 0); 677 Locality = (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : 678 llvm::ConstantInt::get(Int32Ty, 3); 679 Value *Data = llvm::ConstantInt::get(Int32Ty, 1); 680 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 681 return RValue::get(Builder.CreateCall(F, {Address, RW, Locality, Data})); 682 } 683 case Builtin::BI__builtin_readcyclecounter: { 684 Value *F = CGM.getIntrinsic(Intrinsic::readcyclecounter); 685 return RValue::get(Builder.CreateCall(F)); 686 } 687 case Builtin::BI__builtin___clear_cache: { 688 Value *Begin = EmitScalarExpr(E->getArg(0)); 689 Value *End = EmitScalarExpr(E->getArg(1)); 690 Value *F = CGM.getIntrinsic(Intrinsic::clear_cache); 691 return RValue::get(Builder.CreateCall(F, {Begin, End})); 692 } 693 case Builtin::BI__builtin_trap: 694 return RValue::get(EmitTrapCall(Intrinsic::trap)); 695 case Builtin::BI__debugbreak: 696 return RValue::get(EmitTrapCall(Intrinsic::debugtrap)); 697 case Builtin::BI__builtin_unreachable: { 698 if (SanOpts.has(SanitizerKind::Unreachable)) { 699 SanitizerScope SanScope(this); 700 EmitCheck(std::make_pair(static_cast<llvm::Value *>(Builder.getFalse()), 701 SanitizerKind::Unreachable), 702 "builtin_unreachable", EmitCheckSourceLocation(E->getExprLoc()), 703 None); 704 } else 705 Builder.CreateUnreachable(); 706 707 // We do need to preserve an insertion point. 708 EmitBlock(createBasicBlock("unreachable.cont")); 709 710 return RValue::get(nullptr); 711 } 712 713 case Builtin::BI__builtin_powi: 714 case Builtin::BI__builtin_powif: 715 case Builtin::BI__builtin_powil: { 716 Value *Base = EmitScalarExpr(E->getArg(0)); 717 Value *Exponent = EmitScalarExpr(E->getArg(1)); 718 llvm::Type *ArgType = Base->getType(); 719 Value *F = CGM.getIntrinsic(Intrinsic::powi, ArgType); 720 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 721 } 722 723 case Builtin::BI__builtin_isgreater: 724 case Builtin::BI__builtin_isgreaterequal: 725 case Builtin::BI__builtin_isless: 726 case Builtin::BI__builtin_islessequal: 727 case Builtin::BI__builtin_islessgreater: 728 case Builtin::BI__builtin_isunordered: { 729 // Ordered comparisons: we know the arguments to these are matching scalar 730 // floating point values. 731 Value *LHS = EmitScalarExpr(E->getArg(0)); 732 Value *RHS = EmitScalarExpr(E->getArg(1)); 733 734 switch (BuiltinID) { 735 default: llvm_unreachable("Unknown ordered comparison"); 736 case Builtin::BI__builtin_isgreater: 737 LHS = Builder.CreateFCmpOGT(LHS, RHS, "cmp"); 738 break; 739 case Builtin::BI__builtin_isgreaterequal: 740 LHS = Builder.CreateFCmpOGE(LHS, RHS, "cmp"); 741 break; 742 case Builtin::BI__builtin_isless: 743 LHS = Builder.CreateFCmpOLT(LHS, RHS, "cmp"); 744 break; 745 case Builtin::BI__builtin_islessequal: 746 LHS = Builder.CreateFCmpOLE(LHS, RHS, "cmp"); 747 break; 748 case Builtin::BI__builtin_islessgreater: 749 LHS = Builder.CreateFCmpONE(LHS, RHS, "cmp"); 750 break; 751 case Builtin::BI__builtin_isunordered: 752 LHS = Builder.CreateFCmpUNO(LHS, RHS, "cmp"); 753 break; 754 } 755 // ZExt bool to int type. 756 return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType()))); 757 } 758 case Builtin::BI__builtin_isnan: { 759 Value *V = EmitScalarExpr(E->getArg(0)); 760 V = Builder.CreateFCmpUNO(V, V, "cmp"); 761 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 762 } 763 764 case Builtin::BI__builtin_isinf: { 765 // isinf(x) --> fabs(x) == infinity 766 Value *V = EmitScalarExpr(E->getArg(0)); 767 V = EmitFAbs(*this, V); 768 769 V = Builder.CreateFCmpOEQ(V, ConstantFP::getInfinity(V->getType()),"isinf"); 770 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 771 } 772 773 case Builtin::BI__builtin_isinf_sign: { 774 // isinf_sign(x) -> fabs(x) == infinity ? (signbit(x) ? -1 : 1) : 0 775 Value *Arg = EmitScalarExpr(E->getArg(0)); 776 Value *AbsArg = EmitFAbs(*this, Arg); 777 Value *IsInf = Builder.CreateFCmpOEQ( 778 AbsArg, ConstantFP::getInfinity(Arg->getType()), "isinf"); 779 Value *IsNeg = EmitSignBit(*this, Arg); 780 781 llvm::Type *IntTy = ConvertType(E->getType()); 782 Value *Zero = Constant::getNullValue(IntTy); 783 Value *One = ConstantInt::get(IntTy, 1); 784 Value *NegativeOne = ConstantInt::get(IntTy, -1); 785 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); 786 Value *Result = Builder.CreateSelect(IsInf, SignResult, Zero); 787 return RValue::get(Result); 788 } 789 790 case Builtin::BI__builtin_isnormal: { 791 // isnormal(x) --> x == x && fabsf(x) < infinity && fabsf(x) >= float_min 792 Value *V = EmitScalarExpr(E->getArg(0)); 793 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 794 795 Value *Abs = EmitFAbs(*this, V); 796 Value *IsLessThanInf = 797 Builder.CreateFCmpULT(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 798 APFloat Smallest = APFloat::getSmallestNormalized( 799 getContext().getFloatTypeSemantics(E->getArg(0)->getType())); 800 Value *IsNormal = 801 Builder.CreateFCmpUGE(Abs, ConstantFP::get(V->getContext(), Smallest), 802 "isnormal"); 803 V = Builder.CreateAnd(Eq, IsLessThanInf, "and"); 804 V = Builder.CreateAnd(V, IsNormal, "and"); 805 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 806 } 807 808 case Builtin::BI__builtin_isfinite: { 809 // isfinite(x) --> x == x && fabs(x) != infinity; 810 Value *V = EmitScalarExpr(E->getArg(0)); 811 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 812 813 Value *Abs = EmitFAbs(*this, V); 814 Value *IsNotInf = 815 Builder.CreateFCmpUNE(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 816 817 V = Builder.CreateAnd(Eq, IsNotInf, "and"); 818 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 819 } 820 821 case Builtin::BI__builtin_fpclassify: { 822 Value *V = EmitScalarExpr(E->getArg(5)); 823 llvm::Type *Ty = ConvertType(E->getArg(5)->getType()); 824 825 // Create Result 826 BasicBlock *Begin = Builder.GetInsertBlock(); 827 BasicBlock *End = createBasicBlock("fpclassify_end", this->CurFn); 828 Builder.SetInsertPoint(End); 829 PHINode *Result = 830 Builder.CreatePHI(ConvertType(E->getArg(0)->getType()), 4, 831 "fpclassify_result"); 832 833 // if (V==0) return FP_ZERO 834 Builder.SetInsertPoint(Begin); 835 Value *IsZero = Builder.CreateFCmpOEQ(V, Constant::getNullValue(Ty), 836 "iszero"); 837 Value *ZeroLiteral = EmitScalarExpr(E->getArg(4)); 838 BasicBlock *NotZero = createBasicBlock("fpclassify_not_zero", this->CurFn); 839 Builder.CreateCondBr(IsZero, End, NotZero); 840 Result->addIncoming(ZeroLiteral, Begin); 841 842 // if (V != V) return FP_NAN 843 Builder.SetInsertPoint(NotZero); 844 Value *IsNan = Builder.CreateFCmpUNO(V, V, "cmp"); 845 Value *NanLiteral = EmitScalarExpr(E->getArg(0)); 846 BasicBlock *NotNan = createBasicBlock("fpclassify_not_nan", this->CurFn); 847 Builder.CreateCondBr(IsNan, End, NotNan); 848 Result->addIncoming(NanLiteral, NotZero); 849 850 // if (fabs(V) == infinity) return FP_INFINITY 851 Builder.SetInsertPoint(NotNan); 852 Value *VAbs = EmitFAbs(*this, V); 853 Value *IsInf = 854 Builder.CreateFCmpOEQ(VAbs, ConstantFP::getInfinity(V->getType()), 855 "isinf"); 856 Value *InfLiteral = EmitScalarExpr(E->getArg(1)); 857 BasicBlock *NotInf = createBasicBlock("fpclassify_not_inf", this->CurFn); 858 Builder.CreateCondBr(IsInf, End, NotInf); 859 Result->addIncoming(InfLiteral, NotNan); 860 861 // if (fabs(V) >= MIN_NORMAL) return FP_NORMAL else FP_SUBNORMAL 862 Builder.SetInsertPoint(NotInf); 863 APFloat Smallest = APFloat::getSmallestNormalized( 864 getContext().getFloatTypeSemantics(E->getArg(5)->getType())); 865 Value *IsNormal = 866 Builder.CreateFCmpUGE(VAbs, ConstantFP::get(V->getContext(), Smallest), 867 "isnormal"); 868 Value *NormalResult = 869 Builder.CreateSelect(IsNormal, EmitScalarExpr(E->getArg(2)), 870 EmitScalarExpr(E->getArg(3))); 871 Builder.CreateBr(End); 872 Result->addIncoming(NormalResult, NotInf); 873 874 // return Result 875 Builder.SetInsertPoint(End); 876 return RValue::get(Result); 877 } 878 879 case Builtin::BIalloca: 880 case Builtin::BI_alloca: 881 case Builtin::BI__builtin_alloca: { 882 Value *Size = EmitScalarExpr(E->getArg(0)); 883 return RValue::get(Builder.CreateAlloca(Builder.getInt8Ty(), Size)); 884 } 885 case Builtin::BIbzero: 886 case Builtin::BI__builtin_bzero: { 887 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 888 Value *SizeVal = EmitScalarExpr(E->getArg(1)); 889 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 890 E->getArg(0)->getExprLoc(), FD, 0); 891 Builder.CreateMemSet(Dest, Builder.getInt8(0), SizeVal, false); 892 return RValue::get(Dest.getPointer()); 893 } 894 case Builtin::BImemcpy: 895 case Builtin::BI__builtin_memcpy: { 896 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 897 Address Src = EmitPointerWithAlignment(E->getArg(1)); 898 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 899 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 900 E->getArg(0)->getExprLoc(), FD, 0); 901 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 902 E->getArg(1)->getExprLoc(), FD, 1); 903 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 904 return RValue::get(Dest.getPointer()); 905 } 906 907 case Builtin::BI__builtin___memcpy_chk: { 908 // fold __builtin_memcpy_chk(x, y, cst1, cst2) to memcpy iff cst1<=cst2. 909 llvm::APSInt Size, DstSize; 910 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 911 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 912 break; 913 if (Size.ugt(DstSize)) 914 break; 915 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 916 Address Src = EmitPointerWithAlignment(E->getArg(1)); 917 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 918 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 919 return RValue::get(Dest.getPointer()); 920 } 921 922 case Builtin::BI__builtin_objc_memmove_collectable: { 923 Address DestAddr = EmitPointerWithAlignment(E->getArg(0)); 924 Address SrcAddr = EmitPointerWithAlignment(E->getArg(1)); 925 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 926 CGM.getObjCRuntime().EmitGCMemmoveCollectable(*this, 927 DestAddr, SrcAddr, SizeVal); 928 return RValue::get(DestAddr.getPointer()); 929 } 930 931 case Builtin::BI__builtin___memmove_chk: { 932 // fold __builtin_memmove_chk(x, y, cst1, cst2) to memmove iff cst1<=cst2. 933 llvm::APSInt Size, DstSize; 934 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 935 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 936 break; 937 if (Size.ugt(DstSize)) 938 break; 939 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 940 Address Src = EmitPointerWithAlignment(E->getArg(1)); 941 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 942 Builder.CreateMemMove(Dest, Src, SizeVal, false); 943 return RValue::get(Dest.getPointer()); 944 } 945 946 case Builtin::BImemmove: 947 case Builtin::BI__builtin_memmove: { 948 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 949 Address Src = EmitPointerWithAlignment(E->getArg(1)); 950 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 951 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 952 E->getArg(0)->getExprLoc(), FD, 0); 953 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 954 E->getArg(1)->getExprLoc(), FD, 1); 955 Builder.CreateMemMove(Dest, Src, SizeVal, false); 956 return RValue::get(Dest.getPointer()); 957 } 958 case Builtin::BImemset: 959 case Builtin::BI__builtin_memset: { 960 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 961 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 962 Builder.getInt8Ty()); 963 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 964 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 965 E->getArg(0)->getExprLoc(), FD, 0); 966 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 967 return RValue::get(Dest.getPointer()); 968 } 969 case Builtin::BI__builtin___memset_chk: { 970 // fold __builtin_memset_chk(x, y, cst1, cst2) to memset iff cst1<=cst2. 971 llvm::APSInt Size, DstSize; 972 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 973 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 974 break; 975 if (Size.ugt(DstSize)) 976 break; 977 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 978 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 979 Builder.getInt8Ty()); 980 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 981 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 982 return RValue::get(Dest.getPointer()); 983 } 984 case Builtin::BI__builtin_dwarf_cfa: { 985 // The offset in bytes from the first argument to the CFA. 986 // 987 // Why on earth is this in the frontend? Is there any reason at 988 // all that the backend can't reasonably determine this while 989 // lowering llvm.eh.dwarf.cfa()? 990 // 991 // TODO: If there's a satisfactory reason, add a target hook for 992 // this instead of hard-coding 0, which is correct for most targets. 993 int32_t Offset = 0; 994 995 Value *F = CGM.getIntrinsic(Intrinsic::eh_dwarf_cfa); 996 return RValue::get(Builder.CreateCall(F, 997 llvm::ConstantInt::get(Int32Ty, Offset))); 998 } 999 case Builtin::BI__builtin_return_address: { 1000 Value *Depth = 1001 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 1002 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 1003 return RValue::get(Builder.CreateCall(F, Depth)); 1004 } 1005 case Builtin::BI__builtin_frame_address: { 1006 Value *Depth = 1007 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 1008 Value *F = CGM.getIntrinsic(Intrinsic::frameaddress); 1009 return RValue::get(Builder.CreateCall(F, Depth)); 1010 } 1011 case Builtin::BI__builtin_extract_return_addr: { 1012 Value *Address = EmitScalarExpr(E->getArg(0)); 1013 Value *Result = getTargetHooks().decodeReturnAddress(*this, Address); 1014 return RValue::get(Result); 1015 } 1016 case Builtin::BI__builtin_frob_return_addr: { 1017 Value *Address = EmitScalarExpr(E->getArg(0)); 1018 Value *Result = getTargetHooks().encodeReturnAddress(*this, Address); 1019 return RValue::get(Result); 1020 } 1021 case Builtin::BI__builtin_dwarf_sp_column: { 1022 llvm::IntegerType *Ty 1023 = cast<llvm::IntegerType>(ConvertType(E->getType())); 1024 int Column = getTargetHooks().getDwarfEHStackPointer(CGM); 1025 if (Column == -1) { 1026 CGM.ErrorUnsupported(E, "__builtin_dwarf_sp_column"); 1027 return RValue::get(llvm::UndefValue::get(Ty)); 1028 } 1029 return RValue::get(llvm::ConstantInt::get(Ty, Column, true)); 1030 } 1031 case Builtin::BI__builtin_init_dwarf_reg_size_table: { 1032 Value *Address = EmitScalarExpr(E->getArg(0)); 1033 if (getTargetHooks().initDwarfEHRegSizeTable(*this, Address)) 1034 CGM.ErrorUnsupported(E, "__builtin_init_dwarf_reg_size_table"); 1035 return RValue::get(llvm::UndefValue::get(ConvertType(E->getType()))); 1036 } 1037 case Builtin::BI__builtin_eh_return: { 1038 Value *Int = EmitScalarExpr(E->getArg(0)); 1039 Value *Ptr = EmitScalarExpr(E->getArg(1)); 1040 1041 llvm::IntegerType *IntTy = cast<llvm::IntegerType>(Int->getType()); 1042 assert((IntTy->getBitWidth() == 32 || IntTy->getBitWidth() == 64) && 1043 "LLVM's __builtin_eh_return only supports 32- and 64-bit variants"); 1044 Value *F = CGM.getIntrinsic(IntTy->getBitWidth() == 32 1045 ? Intrinsic::eh_return_i32 1046 : Intrinsic::eh_return_i64); 1047 Builder.CreateCall(F, {Int, Ptr}); 1048 Builder.CreateUnreachable(); 1049 1050 // We do need to preserve an insertion point. 1051 EmitBlock(createBasicBlock("builtin_eh_return.cont")); 1052 1053 return RValue::get(nullptr); 1054 } 1055 case Builtin::BI__builtin_unwind_init: { 1056 Value *F = CGM.getIntrinsic(Intrinsic::eh_unwind_init); 1057 return RValue::get(Builder.CreateCall(F)); 1058 } 1059 case Builtin::BI__builtin_extend_pointer: { 1060 // Extends a pointer to the size of an _Unwind_Word, which is 1061 // uint64_t on all platforms. Generally this gets poked into a 1062 // register and eventually used as an address, so if the 1063 // addressing registers are wider than pointers and the platform 1064 // doesn't implicitly ignore high-order bits when doing 1065 // addressing, we need to make sure we zext / sext based on 1066 // the platform's expectations. 1067 // 1068 // See: http://gcc.gnu.org/ml/gcc-bugs/2002-02/msg00237.html 1069 1070 // Cast the pointer to intptr_t. 1071 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1072 Value *Result = Builder.CreatePtrToInt(Ptr, IntPtrTy, "extend.cast"); 1073 1074 // If that's 64 bits, we're done. 1075 if (IntPtrTy->getBitWidth() == 64) 1076 return RValue::get(Result); 1077 1078 // Otherwise, ask the codegen data what to do. 1079 if (getTargetHooks().extendPointerWithSExt()) 1080 return RValue::get(Builder.CreateSExt(Result, Int64Ty, "extend.sext")); 1081 else 1082 return RValue::get(Builder.CreateZExt(Result, Int64Ty, "extend.zext")); 1083 } 1084 case Builtin::BI__builtin_setjmp: { 1085 // Buffer is a void**. 1086 Address Buf = EmitPointerWithAlignment(E->getArg(0)); 1087 1088 // Store the frame pointer to the setjmp buffer. 1089 Value *FrameAddr = 1090 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1091 ConstantInt::get(Int32Ty, 0)); 1092 Builder.CreateStore(FrameAddr, Buf); 1093 1094 // Store the stack pointer to the setjmp buffer. 1095 Value *StackAddr = 1096 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::stacksave)); 1097 Address StackSaveSlot = 1098 Builder.CreateConstInBoundsGEP(Buf, 2, getPointerSize()); 1099 Builder.CreateStore(StackAddr, StackSaveSlot); 1100 1101 // Call LLVM's EH setjmp, which is lightweight. 1102 Value *F = CGM.getIntrinsic(Intrinsic::eh_sjlj_setjmp); 1103 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1104 return RValue::get(Builder.CreateCall(F, Buf.getPointer())); 1105 } 1106 case Builtin::BI__builtin_longjmp: { 1107 Value *Buf = EmitScalarExpr(E->getArg(0)); 1108 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1109 1110 // Call LLVM's EH longjmp, which is lightweight. 1111 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::eh_sjlj_longjmp), Buf); 1112 1113 // longjmp doesn't return; mark this as unreachable. 1114 Builder.CreateUnreachable(); 1115 1116 // We do need to preserve an insertion point. 1117 EmitBlock(createBasicBlock("longjmp.cont")); 1118 1119 return RValue::get(nullptr); 1120 } 1121 case Builtin::BI__sync_fetch_and_add: 1122 case Builtin::BI__sync_fetch_and_sub: 1123 case Builtin::BI__sync_fetch_and_or: 1124 case Builtin::BI__sync_fetch_and_and: 1125 case Builtin::BI__sync_fetch_and_xor: 1126 case Builtin::BI__sync_fetch_and_nand: 1127 case Builtin::BI__sync_add_and_fetch: 1128 case Builtin::BI__sync_sub_and_fetch: 1129 case Builtin::BI__sync_and_and_fetch: 1130 case Builtin::BI__sync_or_and_fetch: 1131 case Builtin::BI__sync_xor_and_fetch: 1132 case Builtin::BI__sync_nand_and_fetch: 1133 case Builtin::BI__sync_val_compare_and_swap: 1134 case Builtin::BI__sync_bool_compare_and_swap: 1135 case Builtin::BI__sync_lock_test_and_set: 1136 case Builtin::BI__sync_lock_release: 1137 case Builtin::BI__sync_swap: 1138 llvm_unreachable("Shouldn't make it through sema"); 1139 case Builtin::BI__sync_fetch_and_add_1: 1140 case Builtin::BI__sync_fetch_and_add_2: 1141 case Builtin::BI__sync_fetch_and_add_4: 1142 case Builtin::BI__sync_fetch_and_add_8: 1143 case Builtin::BI__sync_fetch_and_add_16: 1144 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E); 1145 case Builtin::BI__sync_fetch_and_sub_1: 1146 case Builtin::BI__sync_fetch_and_sub_2: 1147 case Builtin::BI__sync_fetch_and_sub_4: 1148 case Builtin::BI__sync_fetch_and_sub_8: 1149 case Builtin::BI__sync_fetch_and_sub_16: 1150 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E); 1151 case Builtin::BI__sync_fetch_and_or_1: 1152 case Builtin::BI__sync_fetch_and_or_2: 1153 case Builtin::BI__sync_fetch_and_or_4: 1154 case Builtin::BI__sync_fetch_and_or_8: 1155 case Builtin::BI__sync_fetch_and_or_16: 1156 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E); 1157 case Builtin::BI__sync_fetch_and_and_1: 1158 case Builtin::BI__sync_fetch_and_and_2: 1159 case Builtin::BI__sync_fetch_and_and_4: 1160 case Builtin::BI__sync_fetch_and_and_8: 1161 case Builtin::BI__sync_fetch_and_and_16: 1162 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E); 1163 case Builtin::BI__sync_fetch_and_xor_1: 1164 case Builtin::BI__sync_fetch_and_xor_2: 1165 case Builtin::BI__sync_fetch_and_xor_4: 1166 case Builtin::BI__sync_fetch_and_xor_8: 1167 case Builtin::BI__sync_fetch_and_xor_16: 1168 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E); 1169 case Builtin::BI__sync_fetch_and_nand_1: 1170 case Builtin::BI__sync_fetch_and_nand_2: 1171 case Builtin::BI__sync_fetch_and_nand_4: 1172 case Builtin::BI__sync_fetch_and_nand_8: 1173 case Builtin::BI__sync_fetch_and_nand_16: 1174 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Nand, E); 1175 1176 // Clang extensions: not overloaded yet. 1177 case Builtin::BI__sync_fetch_and_min: 1178 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E); 1179 case Builtin::BI__sync_fetch_and_max: 1180 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Max, E); 1181 case Builtin::BI__sync_fetch_and_umin: 1182 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMin, E); 1183 case Builtin::BI__sync_fetch_and_umax: 1184 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMax, E); 1185 1186 case Builtin::BI__sync_add_and_fetch_1: 1187 case Builtin::BI__sync_add_and_fetch_2: 1188 case Builtin::BI__sync_add_and_fetch_4: 1189 case Builtin::BI__sync_add_and_fetch_8: 1190 case Builtin::BI__sync_add_and_fetch_16: 1191 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Add, E, 1192 llvm::Instruction::Add); 1193 case Builtin::BI__sync_sub_and_fetch_1: 1194 case Builtin::BI__sync_sub_and_fetch_2: 1195 case Builtin::BI__sync_sub_and_fetch_4: 1196 case Builtin::BI__sync_sub_and_fetch_8: 1197 case Builtin::BI__sync_sub_and_fetch_16: 1198 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Sub, E, 1199 llvm::Instruction::Sub); 1200 case Builtin::BI__sync_and_and_fetch_1: 1201 case Builtin::BI__sync_and_and_fetch_2: 1202 case Builtin::BI__sync_and_and_fetch_4: 1203 case Builtin::BI__sync_and_and_fetch_8: 1204 case Builtin::BI__sync_and_and_fetch_16: 1205 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::And, E, 1206 llvm::Instruction::And); 1207 case Builtin::BI__sync_or_and_fetch_1: 1208 case Builtin::BI__sync_or_and_fetch_2: 1209 case Builtin::BI__sync_or_and_fetch_4: 1210 case Builtin::BI__sync_or_and_fetch_8: 1211 case Builtin::BI__sync_or_and_fetch_16: 1212 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Or, E, 1213 llvm::Instruction::Or); 1214 case Builtin::BI__sync_xor_and_fetch_1: 1215 case Builtin::BI__sync_xor_and_fetch_2: 1216 case Builtin::BI__sync_xor_and_fetch_4: 1217 case Builtin::BI__sync_xor_and_fetch_8: 1218 case Builtin::BI__sync_xor_and_fetch_16: 1219 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Xor, E, 1220 llvm::Instruction::Xor); 1221 case Builtin::BI__sync_nand_and_fetch_1: 1222 case Builtin::BI__sync_nand_and_fetch_2: 1223 case Builtin::BI__sync_nand_and_fetch_4: 1224 case Builtin::BI__sync_nand_and_fetch_8: 1225 case Builtin::BI__sync_nand_and_fetch_16: 1226 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Nand, E, 1227 llvm::Instruction::And, true); 1228 1229 case Builtin::BI__sync_val_compare_and_swap_1: 1230 case Builtin::BI__sync_val_compare_and_swap_2: 1231 case Builtin::BI__sync_val_compare_and_swap_4: 1232 case Builtin::BI__sync_val_compare_and_swap_8: 1233 case Builtin::BI__sync_val_compare_and_swap_16: 1234 return RValue::get(MakeAtomicCmpXchgValue(*this, E, false)); 1235 1236 case Builtin::BI__sync_bool_compare_and_swap_1: 1237 case Builtin::BI__sync_bool_compare_and_swap_2: 1238 case Builtin::BI__sync_bool_compare_and_swap_4: 1239 case Builtin::BI__sync_bool_compare_and_swap_8: 1240 case Builtin::BI__sync_bool_compare_and_swap_16: 1241 return RValue::get(MakeAtomicCmpXchgValue(*this, E, true)); 1242 1243 case Builtin::BI__sync_swap_1: 1244 case Builtin::BI__sync_swap_2: 1245 case Builtin::BI__sync_swap_4: 1246 case Builtin::BI__sync_swap_8: 1247 case Builtin::BI__sync_swap_16: 1248 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1249 1250 case Builtin::BI__sync_lock_test_and_set_1: 1251 case Builtin::BI__sync_lock_test_and_set_2: 1252 case Builtin::BI__sync_lock_test_and_set_4: 1253 case Builtin::BI__sync_lock_test_and_set_8: 1254 case Builtin::BI__sync_lock_test_and_set_16: 1255 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1256 1257 case Builtin::BI__sync_lock_release_1: 1258 case Builtin::BI__sync_lock_release_2: 1259 case Builtin::BI__sync_lock_release_4: 1260 case Builtin::BI__sync_lock_release_8: 1261 case Builtin::BI__sync_lock_release_16: { 1262 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1263 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 1264 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 1265 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 1266 StoreSize.getQuantity() * 8); 1267 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 1268 llvm::StoreInst *Store = 1269 Builder.CreateAlignedStore(llvm::Constant::getNullValue(ITy), Ptr, 1270 StoreSize); 1271 Store->setAtomic(llvm::Release); 1272 return RValue::get(nullptr); 1273 } 1274 1275 case Builtin::BI__sync_synchronize: { 1276 // We assume this is supposed to correspond to a C++0x-style 1277 // sequentially-consistent fence (i.e. this is only usable for 1278 // synchonization, not device I/O or anything like that). This intrinsic 1279 // is really badly designed in the sense that in theory, there isn't 1280 // any way to safely use it... but in practice, it mostly works 1281 // to use it with non-atomic loads and stores to get acquire/release 1282 // semantics. 1283 Builder.CreateFence(llvm::SequentiallyConsistent); 1284 return RValue::get(nullptr); 1285 } 1286 1287 case Builtin::BI__builtin_nontemporal_load: 1288 return RValue::get(EmitNontemporalLoad(*this, E)); 1289 case Builtin::BI__builtin_nontemporal_store: 1290 return RValue::get(EmitNontemporalStore(*this, E)); 1291 case Builtin::BI__c11_atomic_is_lock_free: 1292 case Builtin::BI__atomic_is_lock_free: { 1293 // Call "bool __atomic_is_lock_free(size_t size, void *ptr)". For the 1294 // __c11 builtin, ptr is 0 (indicating a properly-aligned object), since 1295 // _Atomic(T) is always properly-aligned. 1296 const char *LibCallName = "__atomic_is_lock_free"; 1297 CallArgList Args; 1298 Args.add(RValue::get(EmitScalarExpr(E->getArg(0))), 1299 getContext().getSizeType()); 1300 if (BuiltinID == Builtin::BI__atomic_is_lock_free) 1301 Args.add(RValue::get(EmitScalarExpr(E->getArg(1))), 1302 getContext().VoidPtrTy); 1303 else 1304 Args.add(RValue::get(llvm::Constant::getNullValue(VoidPtrTy)), 1305 getContext().VoidPtrTy); 1306 const CGFunctionInfo &FuncInfo = 1307 CGM.getTypes().arrangeFreeFunctionCall(E->getType(), Args, 1308 FunctionType::ExtInfo(), 1309 RequiredArgs::All); 1310 llvm::FunctionType *FTy = CGM.getTypes().GetFunctionType(FuncInfo); 1311 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, LibCallName); 1312 return EmitCall(FuncInfo, Func, ReturnValueSlot(), Args); 1313 } 1314 1315 case Builtin::BI__atomic_test_and_set: { 1316 // Look at the argument type to determine whether this is a volatile 1317 // operation. The parameter type is always volatile. 1318 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1319 bool Volatile = 1320 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1321 1322 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1323 unsigned AddrSpace = Ptr->getType()->getPointerAddressSpace(); 1324 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1325 Value *NewVal = Builder.getInt8(1); 1326 Value *Order = EmitScalarExpr(E->getArg(1)); 1327 if (isa<llvm::ConstantInt>(Order)) { 1328 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1329 AtomicRMWInst *Result = nullptr; 1330 switch (ord) { 1331 case 0: // memory_order_relaxed 1332 default: // invalid order 1333 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1334 Ptr, NewVal, 1335 llvm::Monotonic); 1336 break; 1337 case 1: // memory_order_consume 1338 case 2: // memory_order_acquire 1339 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1340 Ptr, NewVal, 1341 llvm::Acquire); 1342 break; 1343 case 3: // memory_order_release 1344 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1345 Ptr, NewVal, 1346 llvm::Release); 1347 break; 1348 case 4: // memory_order_acq_rel 1349 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1350 Ptr, NewVal, 1351 llvm::AcquireRelease); 1352 break; 1353 case 5: // memory_order_seq_cst 1354 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1355 Ptr, NewVal, 1356 llvm::SequentiallyConsistent); 1357 break; 1358 } 1359 Result->setVolatile(Volatile); 1360 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1361 } 1362 1363 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1364 1365 llvm::BasicBlock *BBs[5] = { 1366 createBasicBlock("monotonic", CurFn), 1367 createBasicBlock("acquire", CurFn), 1368 createBasicBlock("release", CurFn), 1369 createBasicBlock("acqrel", CurFn), 1370 createBasicBlock("seqcst", CurFn) 1371 }; 1372 llvm::AtomicOrdering Orders[5] = { 1373 llvm::Monotonic, llvm::Acquire, llvm::Release, 1374 llvm::AcquireRelease, llvm::SequentiallyConsistent 1375 }; 1376 1377 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1378 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1379 1380 Builder.SetInsertPoint(ContBB); 1381 PHINode *Result = Builder.CreatePHI(Int8Ty, 5, "was_set"); 1382 1383 for (unsigned i = 0; i < 5; ++i) { 1384 Builder.SetInsertPoint(BBs[i]); 1385 AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1386 Ptr, NewVal, Orders[i]); 1387 RMW->setVolatile(Volatile); 1388 Result->addIncoming(RMW, BBs[i]); 1389 Builder.CreateBr(ContBB); 1390 } 1391 1392 SI->addCase(Builder.getInt32(0), BBs[0]); 1393 SI->addCase(Builder.getInt32(1), BBs[1]); 1394 SI->addCase(Builder.getInt32(2), BBs[1]); 1395 SI->addCase(Builder.getInt32(3), BBs[2]); 1396 SI->addCase(Builder.getInt32(4), BBs[3]); 1397 SI->addCase(Builder.getInt32(5), BBs[4]); 1398 1399 Builder.SetInsertPoint(ContBB); 1400 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1401 } 1402 1403 case Builtin::BI__atomic_clear: { 1404 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1405 bool Volatile = 1406 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1407 1408 Address Ptr = EmitPointerWithAlignment(E->getArg(0)); 1409 unsigned AddrSpace = Ptr.getPointer()->getType()->getPointerAddressSpace(); 1410 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1411 Value *NewVal = Builder.getInt8(0); 1412 Value *Order = EmitScalarExpr(E->getArg(1)); 1413 if (isa<llvm::ConstantInt>(Order)) { 1414 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1415 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1416 switch (ord) { 1417 case 0: // memory_order_relaxed 1418 default: // invalid order 1419 Store->setOrdering(llvm::Monotonic); 1420 break; 1421 case 3: // memory_order_release 1422 Store->setOrdering(llvm::Release); 1423 break; 1424 case 5: // memory_order_seq_cst 1425 Store->setOrdering(llvm::SequentiallyConsistent); 1426 break; 1427 } 1428 return RValue::get(nullptr); 1429 } 1430 1431 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1432 1433 llvm::BasicBlock *BBs[3] = { 1434 createBasicBlock("monotonic", CurFn), 1435 createBasicBlock("release", CurFn), 1436 createBasicBlock("seqcst", CurFn) 1437 }; 1438 llvm::AtomicOrdering Orders[3] = { 1439 llvm::Monotonic, llvm::Release, llvm::SequentiallyConsistent 1440 }; 1441 1442 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1443 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1444 1445 for (unsigned i = 0; i < 3; ++i) { 1446 Builder.SetInsertPoint(BBs[i]); 1447 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1448 Store->setOrdering(Orders[i]); 1449 Builder.CreateBr(ContBB); 1450 } 1451 1452 SI->addCase(Builder.getInt32(0), BBs[0]); 1453 SI->addCase(Builder.getInt32(3), BBs[1]); 1454 SI->addCase(Builder.getInt32(5), BBs[2]); 1455 1456 Builder.SetInsertPoint(ContBB); 1457 return RValue::get(nullptr); 1458 } 1459 1460 case Builtin::BI__atomic_thread_fence: 1461 case Builtin::BI__atomic_signal_fence: 1462 case Builtin::BI__c11_atomic_thread_fence: 1463 case Builtin::BI__c11_atomic_signal_fence: { 1464 llvm::SynchronizationScope Scope; 1465 if (BuiltinID == Builtin::BI__atomic_signal_fence || 1466 BuiltinID == Builtin::BI__c11_atomic_signal_fence) 1467 Scope = llvm::SingleThread; 1468 else 1469 Scope = llvm::CrossThread; 1470 Value *Order = EmitScalarExpr(E->getArg(0)); 1471 if (isa<llvm::ConstantInt>(Order)) { 1472 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1473 switch (ord) { 1474 case 0: // memory_order_relaxed 1475 default: // invalid order 1476 break; 1477 case 1: // memory_order_consume 1478 case 2: // memory_order_acquire 1479 Builder.CreateFence(llvm::Acquire, Scope); 1480 break; 1481 case 3: // memory_order_release 1482 Builder.CreateFence(llvm::Release, Scope); 1483 break; 1484 case 4: // memory_order_acq_rel 1485 Builder.CreateFence(llvm::AcquireRelease, Scope); 1486 break; 1487 case 5: // memory_order_seq_cst 1488 Builder.CreateFence(llvm::SequentiallyConsistent, Scope); 1489 break; 1490 } 1491 return RValue::get(nullptr); 1492 } 1493 1494 llvm::BasicBlock *AcquireBB, *ReleaseBB, *AcqRelBB, *SeqCstBB; 1495 AcquireBB = createBasicBlock("acquire", CurFn); 1496 ReleaseBB = createBasicBlock("release", CurFn); 1497 AcqRelBB = createBasicBlock("acqrel", CurFn); 1498 SeqCstBB = createBasicBlock("seqcst", CurFn); 1499 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1500 1501 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1502 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, ContBB); 1503 1504 Builder.SetInsertPoint(AcquireBB); 1505 Builder.CreateFence(llvm::Acquire, Scope); 1506 Builder.CreateBr(ContBB); 1507 SI->addCase(Builder.getInt32(1), AcquireBB); 1508 SI->addCase(Builder.getInt32(2), AcquireBB); 1509 1510 Builder.SetInsertPoint(ReleaseBB); 1511 Builder.CreateFence(llvm::Release, Scope); 1512 Builder.CreateBr(ContBB); 1513 SI->addCase(Builder.getInt32(3), ReleaseBB); 1514 1515 Builder.SetInsertPoint(AcqRelBB); 1516 Builder.CreateFence(llvm::AcquireRelease, Scope); 1517 Builder.CreateBr(ContBB); 1518 SI->addCase(Builder.getInt32(4), AcqRelBB); 1519 1520 Builder.SetInsertPoint(SeqCstBB); 1521 Builder.CreateFence(llvm::SequentiallyConsistent, Scope); 1522 Builder.CreateBr(ContBB); 1523 SI->addCase(Builder.getInt32(5), SeqCstBB); 1524 1525 Builder.SetInsertPoint(ContBB); 1526 return RValue::get(nullptr); 1527 } 1528 1529 // Library functions with special handling. 1530 case Builtin::BIsqrt: 1531 case Builtin::BIsqrtf: 1532 case Builtin::BIsqrtl: { 1533 // Transform a call to sqrt* into a @llvm.sqrt.* intrinsic call, but only 1534 // in finite- or unsafe-math mode (the intrinsic has different semantics 1535 // for handling negative numbers compared to the library function, so 1536 // -fmath-errno=0 is not enough). 1537 if (!FD->hasAttr<ConstAttr>()) 1538 break; 1539 if (!(CGM.getCodeGenOpts().UnsafeFPMath || 1540 CGM.getCodeGenOpts().NoNaNsFPMath)) 1541 break; 1542 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 1543 llvm::Type *ArgType = Arg0->getType(); 1544 Value *F = CGM.getIntrinsic(Intrinsic::sqrt, ArgType); 1545 return RValue::get(Builder.CreateCall(F, Arg0)); 1546 } 1547 1548 case Builtin::BI__builtin_pow: 1549 case Builtin::BI__builtin_powf: 1550 case Builtin::BI__builtin_powl: 1551 case Builtin::BIpow: 1552 case Builtin::BIpowf: 1553 case Builtin::BIpowl: { 1554 // Transform a call to pow* into a @llvm.pow.* intrinsic call. 1555 if (!FD->hasAttr<ConstAttr>()) 1556 break; 1557 Value *Base = EmitScalarExpr(E->getArg(0)); 1558 Value *Exponent = EmitScalarExpr(E->getArg(1)); 1559 llvm::Type *ArgType = Base->getType(); 1560 Value *F = CGM.getIntrinsic(Intrinsic::pow, ArgType); 1561 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 1562 } 1563 1564 case Builtin::BIfma: 1565 case Builtin::BIfmaf: 1566 case Builtin::BIfmal: 1567 case Builtin::BI__builtin_fma: 1568 case Builtin::BI__builtin_fmaf: 1569 case Builtin::BI__builtin_fmal: { 1570 // Rewrite fma to intrinsic. 1571 Value *FirstArg = EmitScalarExpr(E->getArg(0)); 1572 llvm::Type *ArgType = FirstArg->getType(); 1573 Value *F = CGM.getIntrinsic(Intrinsic::fma, ArgType); 1574 return RValue::get( 1575 Builder.CreateCall(F, {FirstArg, EmitScalarExpr(E->getArg(1)), 1576 EmitScalarExpr(E->getArg(2))})); 1577 } 1578 1579 case Builtin::BI__builtin_signbit: 1580 case Builtin::BI__builtin_signbitf: 1581 case Builtin::BI__builtin_signbitl: { 1582 return RValue::get( 1583 Builder.CreateZExt(EmitSignBit(*this, EmitScalarExpr(E->getArg(0))), 1584 ConvertType(E->getType()))); 1585 } 1586 case Builtin::BI__builtin_annotation: { 1587 llvm::Value *AnnVal = EmitScalarExpr(E->getArg(0)); 1588 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::annotation, 1589 AnnVal->getType()); 1590 1591 // Get the annotation string, go through casts. Sema requires this to be a 1592 // non-wide string literal, potentially casted, so the cast<> is safe. 1593 const Expr *AnnotationStrExpr = E->getArg(1)->IgnoreParenCasts(); 1594 StringRef Str = cast<StringLiteral>(AnnotationStrExpr)->getString(); 1595 return RValue::get(EmitAnnotationCall(F, AnnVal, Str, E->getExprLoc())); 1596 } 1597 case Builtin::BI__builtin_addcb: 1598 case Builtin::BI__builtin_addcs: 1599 case Builtin::BI__builtin_addc: 1600 case Builtin::BI__builtin_addcl: 1601 case Builtin::BI__builtin_addcll: 1602 case Builtin::BI__builtin_subcb: 1603 case Builtin::BI__builtin_subcs: 1604 case Builtin::BI__builtin_subc: 1605 case Builtin::BI__builtin_subcl: 1606 case Builtin::BI__builtin_subcll: { 1607 1608 // We translate all of these builtins from expressions of the form: 1609 // int x = ..., y = ..., carryin = ..., carryout, result; 1610 // result = __builtin_addc(x, y, carryin, &carryout); 1611 // 1612 // to LLVM IR of the form: 1613 // 1614 // %tmp1 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y) 1615 // %tmpsum1 = extractvalue {i32, i1} %tmp1, 0 1616 // %carry1 = extractvalue {i32, i1} %tmp1, 1 1617 // %tmp2 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %tmpsum1, 1618 // i32 %carryin) 1619 // %result = extractvalue {i32, i1} %tmp2, 0 1620 // %carry2 = extractvalue {i32, i1} %tmp2, 1 1621 // %tmp3 = or i1 %carry1, %carry2 1622 // %tmp4 = zext i1 %tmp3 to i32 1623 // store i32 %tmp4, i32* %carryout 1624 1625 // Scalarize our inputs. 1626 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1627 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1628 llvm::Value *Carryin = EmitScalarExpr(E->getArg(2)); 1629 Address CarryOutPtr = EmitPointerWithAlignment(E->getArg(3)); 1630 1631 // Decide if we are lowering to a uadd.with.overflow or usub.with.overflow. 1632 llvm::Intrinsic::ID IntrinsicId; 1633 switch (BuiltinID) { 1634 default: llvm_unreachable("Unknown multiprecision builtin id."); 1635 case Builtin::BI__builtin_addcb: 1636 case Builtin::BI__builtin_addcs: 1637 case Builtin::BI__builtin_addc: 1638 case Builtin::BI__builtin_addcl: 1639 case Builtin::BI__builtin_addcll: 1640 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1641 break; 1642 case Builtin::BI__builtin_subcb: 1643 case Builtin::BI__builtin_subcs: 1644 case Builtin::BI__builtin_subc: 1645 case Builtin::BI__builtin_subcl: 1646 case Builtin::BI__builtin_subcll: 1647 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1648 break; 1649 } 1650 1651 // Construct our resulting LLVM IR expression. 1652 llvm::Value *Carry1; 1653 llvm::Value *Sum1 = EmitOverflowIntrinsic(*this, IntrinsicId, 1654 X, Y, Carry1); 1655 llvm::Value *Carry2; 1656 llvm::Value *Sum2 = EmitOverflowIntrinsic(*this, IntrinsicId, 1657 Sum1, Carryin, Carry2); 1658 llvm::Value *CarryOut = Builder.CreateZExt(Builder.CreateOr(Carry1, Carry2), 1659 X->getType()); 1660 Builder.CreateStore(CarryOut, CarryOutPtr); 1661 return RValue::get(Sum2); 1662 } 1663 1664 case Builtin::BI__builtin_add_overflow: 1665 case Builtin::BI__builtin_sub_overflow: 1666 case Builtin::BI__builtin_mul_overflow: { 1667 const clang::Expr *LeftArg = E->getArg(0); 1668 const clang::Expr *RightArg = E->getArg(1); 1669 const clang::Expr *ResultArg = E->getArg(2); 1670 1671 clang::QualType ResultQTy = 1672 ResultArg->getType()->castAs<PointerType>()->getPointeeType(); 1673 1674 WidthAndSignedness LeftInfo = 1675 getIntegerWidthAndSignedness(CGM.getContext(), LeftArg->getType()); 1676 WidthAndSignedness RightInfo = 1677 getIntegerWidthAndSignedness(CGM.getContext(), RightArg->getType()); 1678 WidthAndSignedness ResultInfo = 1679 getIntegerWidthAndSignedness(CGM.getContext(), ResultQTy); 1680 WidthAndSignedness EncompassingInfo = 1681 EncompassingIntegerType({LeftInfo, RightInfo, ResultInfo}); 1682 1683 llvm::Type *EncompassingLLVMTy = 1684 llvm::IntegerType::get(CGM.getLLVMContext(), EncompassingInfo.Width); 1685 1686 llvm::Type *ResultLLVMTy = CGM.getTypes().ConvertType(ResultQTy); 1687 1688 llvm::Intrinsic::ID IntrinsicId; 1689 switch (BuiltinID) { 1690 default: 1691 llvm_unreachable("Unknown overflow builtin id."); 1692 case Builtin::BI__builtin_add_overflow: 1693 IntrinsicId = EncompassingInfo.Signed 1694 ? llvm::Intrinsic::sadd_with_overflow 1695 : llvm::Intrinsic::uadd_with_overflow; 1696 break; 1697 case Builtin::BI__builtin_sub_overflow: 1698 IntrinsicId = EncompassingInfo.Signed 1699 ? llvm::Intrinsic::ssub_with_overflow 1700 : llvm::Intrinsic::usub_with_overflow; 1701 break; 1702 case Builtin::BI__builtin_mul_overflow: 1703 IntrinsicId = EncompassingInfo.Signed 1704 ? llvm::Intrinsic::smul_with_overflow 1705 : llvm::Intrinsic::umul_with_overflow; 1706 break; 1707 } 1708 1709 llvm::Value *Left = EmitScalarExpr(LeftArg); 1710 llvm::Value *Right = EmitScalarExpr(RightArg); 1711 Address ResultPtr = EmitPointerWithAlignment(ResultArg); 1712 1713 // Extend each operand to the encompassing type. 1714 Left = Builder.CreateIntCast(Left, EncompassingLLVMTy, LeftInfo.Signed); 1715 Right = Builder.CreateIntCast(Right, EncompassingLLVMTy, RightInfo.Signed); 1716 1717 // Perform the operation on the extended values. 1718 llvm::Value *Overflow, *Result; 1719 Result = EmitOverflowIntrinsic(*this, IntrinsicId, Left, Right, Overflow); 1720 1721 if (EncompassingInfo.Width > ResultInfo.Width) { 1722 // The encompassing type is wider than the result type, so we need to 1723 // truncate it. 1724 llvm::Value *ResultTrunc = Builder.CreateTrunc(Result, ResultLLVMTy); 1725 1726 // To see if the truncation caused an overflow, we will extend 1727 // the result and then compare it to the original result. 1728 llvm::Value *ResultTruncExt = Builder.CreateIntCast( 1729 ResultTrunc, EncompassingLLVMTy, ResultInfo.Signed); 1730 llvm::Value *TruncationOverflow = 1731 Builder.CreateICmpNE(Result, ResultTruncExt); 1732 1733 Overflow = Builder.CreateOr(Overflow, TruncationOverflow); 1734 Result = ResultTrunc; 1735 } 1736 1737 // Finally, store the result using the pointer. 1738 bool isVolatile = 1739 ResultArg->getType()->getPointeeType().isVolatileQualified(); 1740 Builder.CreateStore(EmitToMemory(Result, ResultQTy), ResultPtr, isVolatile); 1741 1742 return RValue::get(Overflow); 1743 } 1744 1745 case Builtin::BI__builtin_uadd_overflow: 1746 case Builtin::BI__builtin_uaddl_overflow: 1747 case Builtin::BI__builtin_uaddll_overflow: 1748 case Builtin::BI__builtin_usub_overflow: 1749 case Builtin::BI__builtin_usubl_overflow: 1750 case Builtin::BI__builtin_usubll_overflow: 1751 case Builtin::BI__builtin_umul_overflow: 1752 case Builtin::BI__builtin_umull_overflow: 1753 case Builtin::BI__builtin_umulll_overflow: 1754 case Builtin::BI__builtin_sadd_overflow: 1755 case Builtin::BI__builtin_saddl_overflow: 1756 case Builtin::BI__builtin_saddll_overflow: 1757 case Builtin::BI__builtin_ssub_overflow: 1758 case Builtin::BI__builtin_ssubl_overflow: 1759 case Builtin::BI__builtin_ssubll_overflow: 1760 case Builtin::BI__builtin_smul_overflow: 1761 case Builtin::BI__builtin_smull_overflow: 1762 case Builtin::BI__builtin_smulll_overflow: { 1763 1764 // We translate all of these builtins directly to the relevant llvm IR node. 1765 1766 // Scalarize our inputs. 1767 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1768 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1769 Address SumOutPtr = EmitPointerWithAlignment(E->getArg(2)); 1770 1771 // Decide which of the overflow intrinsics we are lowering to: 1772 llvm::Intrinsic::ID IntrinsicId; 1773 switch (BuiltinID) { 1774 default: llvm_unreachable("Unknown overflow builtin id."); 1775 case Builtin::BI__builtin_uadd_overflow: 1776 case Builtin::BI__builtin_uaddl_overflow: 1777 case Builtin::BI__builtin_uaddll_overflow: 1778 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1779 break; 1780 case Builtin::BI__builtin_usub_overflow: 1781 case Builtin::BI__builtin_usubl_overflow: 1782 case Builtin::BI__builtin_usubll_overflow: 1783 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1784 break; 1785 case Builtin::BI__builtin_umul_overflow: 1786 case Builtin::BI__builtin_umull_overflow: 1787 case Builtin::BI__builtin_umulll_overflow: 1788 IntrinsicId = llvm::Intrinsic::umul_with_overflow; 1789 break; 1790 case Builtin::BI__builtin_sadd_overflow: 1791 case Builtin::BI__builtin_saddl_overflow: 1792 case Builtin::BI__builtin_saddll_overflow: 1793 IntrinsicId = llvm::Intrinsic::sadd_with_overflow; 1794 break; 1795 case Builtin::BI__builtin_ssub_overflow: 1796 case Builtin::BI__builtin_ssubl_overflow: 1797 case Builtin::BI__builtin_ssubll_overflow: 1798 IntrinsicId = llvm::Intrinsic::ssub_with_overflow; 1799 break; 1800 case Builtin::BI__builtin_smul_overflow: 1801 case Builtin::BI__builtin_smull_overflow: 1802 case Builtin::BI__builtin_smulll_overflow: 1803 IntrinsicId = llvm::Intrinsic::smul_with_overflow; 1804 break; 1805 } 1806 1807 1808 llvm::Value *Carry; 1809 llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry); 1810 Builder.CreateStore(Sum, SumOutPtr); 1811 1812 return RValue::get(Carry); 1813 } 1814 case Builtin::BI__builtin_addressof: 1815 return RValue::get(EmitLValue(E->getArg(0)).getPointer()); 1816 case Builtin::BI__builtin_operator_new: 1817 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 1818 E->getArg(0), false); 1819 case Builtin::BI__builtin_operator_delete: 1820 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 1821 E->getArg(0), true); 1822 case Builtin::BI__noop: 1823 // __noop always evaluates to an integer literal zero. 1824 return RValue::get(ConstantInt::get(IntTy, 0)); 1825 case Builtin::BI__builtin_call_with_static_chain: { 1826 const CallExpr *Call = cast<CallExpr>(E->getArg(0)); 1827 const Expr *Chain = E->getArg(1); 1828 return EmitCall(Call->getCallee()->getType(), 1829 EmitScalarExpr(Call->getCallee()), Call, ReturnValue, 1830 Call->getCalleeDecl(), EmitScalarExpr(Chain)); 1831 } 1832 case Builtin::BI_InterlockedExchange: 1833 case Builtin::BI_InterlockedExchangePointer: 1834 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1835 case Builtin::BI_InterlockedCompareExchangePointer: { 1836 llvm::Type *RTy; 1837 llvm::IntegerType *IntType = 1838 IntegerType::get(getLLVMContext(), 1839 getContext().getTypeSize(E->getType())); 1840 llvm::Type *IntPtrType = IntType->getPointerTo(); 1841 1842 llvm::Value *Destination = 1843 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), IntPtrType); 1844 1845 llvm::Value *Exchange = EmitScalarExpr(E->getArg(1)); 1846 RTy = Exchange->getType(); 1847 Exchange = Builder.CreatePtrToInt(Exchange, IntType); 1848 1849 llvm::Value *Comparand = 1850 Builder.CreatePtrToInt(EmitScalarExpr(E->getArg(2)), IntType); 1851 1852 auto Result = Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 1853 SequentiallyConsistent, 1854 SequentiallyConsistent); 1855 Result->setVolatile(true); 1856 1857 return RValue::get(Builder.CreateIntToPtr(Builder.CreateExtractValue(Result, 1858 0), 1859 RTy)); 1860 } 1861 case Builtin::BI_InterlockedCompareExchange: { 1862 AtomicCmpXchgInst *CXI = Builder.CreateAtomicCmpXchg( 1863 EmitScalarExpr(E->getArg(0)), 1864 EmitScalarExpr(E->getArg(2)), 1865 EmitScalarExpr(E->getArg(1)), 1866 SequentiallyConsistent, 1867 SequentiallyConsistent); 1868 CXI->setVolatile(true); 1869 return RValue::get(Builder.CreateExtractValue(CXI, 0)); 1870 } 1871 case Builtin::BI_InterlockedIncrement: { 1872 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 1873 AtomicRMWInst::Add, 1874 EmitScalarExpr(E->getArg(0)), 1875 ConstantInt::get(Int32Ty, 1), 1876 llvm::SequentiallyConsistent); 1877 RMWI->setVolatile(true); 1878 return RValue::get(Builder.CreateAdd(RMWI, ConstantInt::get(Int32Ty, 1))); 1879 } 1880 case Builtin::BI_InterlockedDecrement: { 1881 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 1882 AtomicRMWInst::Sub, 1883 EmitScalarExpr(E->getArg(0)), 1884 ConstantInt::get(Int32Ty, 1), 1885 llvm::SequentiallyConsistent); 1886 RMWI->setVolatile(true); 1887 return RValue::get(Builder.CreateSub(RMWI, ConstantInt::get(Int32Ty, 1))); 1888 } 1889 case Builtin::BI_InterlockedExchangeAdd: { 1890 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 1891 AtomicRMWInst::Add, 1892 EmitScalarExpr(E->getArg(0)), 1893 EmitScalarExpr(E->getArg(1)), 1894 llvm::SequentiallyConsistent); 1895 RMWI->setVolatile(true); 1896 return RValue::get(RMWI); 1897 } 1898 case Builtin::BI__readfsdword: { 1899 Value *IntToPtr = 1900 Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)), 1901 llvm::PointerType::get(CGM.Int32Ty, 257)); 1902 LoadInst *Load = 1903 Builder.CreateAlignedLoad(IntToPtr, /*Align=*/4, /*isVolatile=*/true); 1904 return RValue::get(Load); 1905 } 1906 1907 case Builtin::BI__exception_code: 1908 case Builtin::BI_exception_code: 1909 return RValue::get(EmitSEHExceptionCode()); 1910 case Builtin::BI__exception_info: 1911 case Builtin::BI_exception_info: 1912 return RValue::get(EmitSEHExceptionInfo()); 1913 case Builtin::BI__abnormal_termination: 1914 case Builtin::BI_abnormal_termination: 1915 return RValue::get(EmitSEHAbnormalTermination()); 1916 case Builtin::BI_setjmpex: { 1917 if (getTarget().getTriple().isOSMSVCRT()) { 1918 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 1919 llvm::AttributeSet ReturnsTwiceAttr = 1920 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 1921 llvm::Attribute::ReturnsTwice); 1922 llvm::Constant *SetJmpEx = CGM.CreateRuntimeFunction( 1923 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 1924 "_setjmpex", ReturnsTwiceAttr); 1925 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 1926 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 1927 llvm::Value *FrameAddr = 1928 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1929 ConstantInt::get(Int32Ty, 0)); 1930 llvm::Value *Args[] = {Buf, FrameAddr}; 1931 llvm::CallSite CS = EmitRuntimeCallOrInvoke(SetJmpEx, Args); 1932 CS.setAttributes(ReturnsTwiceAttr); 1933 return RValue::get(CS.getInstruction()); 1934 } 1935 break; 1936 } 1937 case Builtin::BI_setjmp: { 1938 if (getTarget().getTriple().isOSMSVCRT()) { 1939 llvm::AttributeSet ReturnsTwiceAttr = 1940 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 1941 llvm::Attribute::ReturnsTwice); 1942 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 1943 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 1944 llvm::CallSite CS; 1945 if (getTarget().getTriple().getArch() == llvm::Triple::x86) { 1946 llvm::Type *ArgTypes[] = {Int8PtrTy, IntTy}; 1947 llvm::Constant *SetJmp3 = CGM.CreateRuntimeFunction( 1948 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/true), 1949 "_setjmp3", ReturnsTwiceAttr); 1950 llvm::Value *Count = ConstantInt::get(IntTy, 0); 1951 llvm::Value *Args[] = {Buf, Count}; 1952 CS = EmitRuntimeCallOrInvoke(SetJmp3, Args); 1953 } else { 1954 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 1955 llvm::Constant *SetJmp = CGM.CreateRuntimeFunction( 1956 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 1957 "_setjmp", ReturnsTwiceAttr); 1958 llvm::Value *FrameAddr = 1959 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1960 ConstantInt::get(Int32Ty, 0)); 1961 llvm::Value *Args[] = {Buf, FrameAddr}; 1962 CS = EmitRuntimeCallOrInvoke(SetJmp, Args); 1963 } 1964 CS.setAttributes(ReturnsTwiceAttr); 1965 return RValue::get(CS.getInstruction()); 1966 } 1967 break; 1968 } 1969 1970 case Builtin::BI__GetExceptionInfo: { 1971 if (llvm::GlobalVariable *GV = 1972 CGM.getCXXABI().getThrowInfo(FD->getParamDecl(0)->getType())) 1973 return RValue::get(llvm::ConstantExpr::getBitCast(GV, CGM.Int8PtrTy)); 1974 break; 1975 } 1976 } 1977 1978 // If this is an alias for a lib function (e.g. __builtin_sin), emit 1979 // the call using the normal call path, but using the unmangled 1980 // version of the function name. 1981 if (getContext().BuiltinInfo.isLibFunction(BuiltinID)) 1982 return emitLibraryCall(*this, FD, E, 1983 CGM.getBuiltinLibFunction(FD, BuiltinID)); 1984 1985 // If this is a predefined lib function (e.g. malloc), emit the call 1986 // using exactly the normal call path. 1987 if (getContext().BuiltinInfo.isPredefinedLibFunction(BuiltinID)) 1988 return emitLibraryCall(*this, FD, E, EmitScalarExpr(E->getCallee())); 1989 1990 // Check that a call to a target specific builtin has the correct target 1991 // features. 1992 // This is down here to avoid non-target specific builtins, however, if 1993 // generic builtins start to require generic target features then we 1994 // can move this up to the beginning of the function. 1995 if (!checkBuiltinTargetFeatures(FD)) 1996 CGM.getDiags().Report(E->getLocStart(), diag::err_builtin_needs_feature) 1997 << FD->getDeclName() 1998 << CGM.getContext().BuiltinInfo.getRequiredFeatures(BuiltinID); 1999 2000 // See if we have a target specific intrinsic. 2001 const char *Name = getContext().BuiltinInfo.getName(BuiltinID); 2002 Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; 2003 if (const char *Prefix = 2004 llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch())) { 2005 IntrinsicID = Intrinsic::getIntrinsicForGCCBuiltin(Prefix, Name); 2006 // NOTE we dont need to perform a compatibility flag check here since the 2007 // intrinsics are declared in Builtins*.def via LANGBUILTIN which filter the 2008 // MS builtins via ALL_MS_LANGUAGES and are filtered earlier. 2009 if (IntrinsicID == Intrinsic::not_intrinsic) 2010 IntrinsicID = Intrinsic::getIntrinsicForMSBuiltin(Prefix, Name); 2011 } 2012 2013 if (IntrinsicID != Intrinsic::not_intrinsic) { 2014 SmallVector<Value*, 16> Args; 2015 2016 // Find out if any arguments are required to be integer constant 2017 // expressions. 2018 unsigned ICEArguments = 0; 2019 ASTContext::GetBuiltinTypeError Error; 2020 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 2021 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 2022 2023 Function *F = CGM.getIntrinsic(IntrinsicID); 2024 llvm::FunctionType *FTy = F->getFunctionType(); 2025 2026 for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) { 2027 Value *ArgValue; 2028 // If this is a normal argument, just emit it as a scalar. 2029 if ((ICEArguments & (1 << i)) == 0) { 2030 ArgValue = EmitScalarExpr(E->getArg(i)); 2031 } else { 2032 // If this is required to be a constant, constant fold it so that we 2033 // know that the generated intrinsic gets a ConstantInt. 2034 llvm::APSInt Result; 2035 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result,getContext()); 2036 assert(IsConst && "Constant arg isn't actually constant?"); 2037 (void)IsConst; 2038 ArgValue = llvm::ConstantInt::get(getLLVMContext(), Result); 2039 } 2040 2041 // If the intrinsic arg type is different from the builtin arg type 2042 // we need to do a bit cast. 2043 llvm::Type *PTy = FTy->getParamType(i); 2044 if (PTy != ArgValue->getType()) { 2045 assert(PTy->canLosslesslyBitCastTo(FTy->getParamType(i)) && 2046 "Must be able to losslessly bit cast to param"); 2047 ArgValue = Builder.CreateBitCast(ArgValue, PTy); 2048 } 2049 2050 Args.push_back(ArgValue); 2051 } 2052 2053 Value *V = Builder.CreateCall(F, Args); 2054 QualType BuiltinRetType = E->getType(); 2055 2056 llvm::Type *RetTy = VoidTy; 2057 if (!BuiltinRetType->isVoidType()) 2058 RetTy = ConvertType(BuiltinRetType); 2059 2060 if (RetTy != V->getType()) { 2061 assert(V->getType()->canLosslesslyBitCastTo(RetTy) && 2062 "Must be able to losslessly bit cast result type"); 2063 V = Builder.CreateBitCast(V, RetTy); 2064 } 2065 2066 return RValue::get(V); 2067 } 2068 2069 // See if we have a target specific builtin that needs to be lowered. 2070 if (Value *V = EmitTargetBuiltinExpr(BuiltinID, E)) 2071 return RValue::get(V); 2072 2073 ErrorUnsupported(E, "builtin function"); 2074 2075 // Unknown builtin, for now just dump it out and return undef. 2076 return GetUndefRValue(E->getType()); 2077 } 2078 2079 static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF, 2080 unsigned BuiltinID, const CallExpr *E, 2081 llvm::Triple::ArchType Arch) { 2082 switch (Arch) { 2083 case llvm::Triple::arm: 2084 case llvm::Triple::armeb: 2085 case llvm::Triple::thumb: 2086 case llvm::Triple::thumbeb: 2087 return CGF->EmitARMBuiltinExpr(BuiltinID, E); 2088 case llvm::Triple::aarch64: 2089 case llvm::Triple::aarch64_be: 2090 return CGF->EmitAArch64BuiltinExpr(BuiltinID, E); 2091 case llvm::Triple::x86: 2092 case llvm::Triple::x86_64: 2093 return CGF->EmitX86BuiltinExpr(BuiltinID, E); 2094 case llvm::Triple::ppc: 2095 case llvm::Triple::ppc64: 2096 case llvm::Triple::ppc64le: 2097 return CGF->EmitPPCBuiltinExpr(BuiltinID, E); 2098 case llvm::Triple::r600: 2099 case llvm::Triple::amdgcn: 2100 return CGF->EmitAMDGPUBuiltinExpr(BuiltinID, E); 2101 case llvm::Triple::systemz: 2102 return CGF->EmitSystemZBuiltinExpr(BuiltinID, E); 2103 case llvm::Triple::nvptx: 2104 case llvm::Triple::nvptx64: 2105 return CGF->EmitNVPTXBuiltinExpr(BuiltinID, E); 2106 case llvm::Triple::wasm32: 2107 case llvm::Triple::wasm64: 2108 return CGF->EmitWebAssemblyBuiltinExpr(BuiltinID, E); 2109 default: 2110 return nullptr; 2111 } 2112 } 2113 2114 Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID, 2115 const CallExpr *E) { 2116 if (getContext().BuiltinInfo.isAuxBuiltinID(BuiltinID)) { 2117 assert(getContext().getAuxTargetInfo() && "Missing aux target info"); 2118 return EmitTargetArchBuiltinExpr( 2119 this, getContext().BuiltinInfo.getAuxBuiltinID(BuiltinID), E, 2120 getContext().getAuxTargetInfo()->getTriple().getArch()); 2121 } 2122 2123 return EmitTargetArchBuiltinExpr(this, BuiltinID, E, 2124 getTarget().getTriple().getArch()); 2125 } 2126 2127 static llvm::VectorType *GetNeonType(CodeGenFunction *CGF, 2128 NeonTypeFlags TypeFlags, 2129 bool V1Ty=false) { 2130 int IsQuad = TypeFlags.isQuad(); 2131 switch (TypeFlags.getEltType()) { 2132 case NeonTypeFlags::Int8: 2133 case NeonTypeFlags::Poly8: 2134 return llvm::VectorType::get(CGF->Int8Ty, V1Ty ? 1 : (8 << IsQuad)); 2135 case NeonTypeFlags::Int16: 2136 case NeonTypeFlags::Poly16: 2137 case NeonTypeFlags::Float16: 2138 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 2139 case NeonTypeFlags::Int32: 2140 return llvm::VectorType::get(CGF->Int32Ty, V1Ty ? 1 : (2 << IsQuad)); 2141 case NeonTypeFlags::Int64: 2142 case NeonTypeFlags::Poly64: 2143 return llvm::VectorType::get(CGF->Int64Ty, V1Ty ? 1 : (1 << IsQuad)); 2144 case NeonTypeFlags::Poly128: 2145 // FIXME: i128 and f128 doesn't get fully support in Clang and llvm. 2146 // There is a lot of i128 and f128 API missing. 2147 // so we use v16i8 to represent poly128 and get pattern matched. 2148 return llvm::VectorType::get(CGF->Int8Ty, 16); 2149 case NeonTypeFlags::Float32: 2150 return llvm::VectorType::get(CGF->FloatTy, V1Ty ? 1 : (2 << IsQuad)); 2151 case NeonTypeFlags::Float64: 2152 return llvm::VectorType::get(CGF->DoubleTy, V1Ty ? 1 : (1 << IsQuad)); 2153 } 2154 llvm_unreachable("Unknown vector element type!"); 2155 } 2156 2157 static llvm::VectorType *GetFloatNeonType(CodeGenFunction *CGF, 2158 NeonTypeFlags IntTypeFlags) { 2159 int IsQuad = IntTypeFlags.isQuad(); 2160 switch (IntTypeFlags.getEltType()) { 2161 case NeonTypeFlags::Int32: 2162 return llvm::VectorType::get(CGF->FloatTy, (2 << IsQuad)); 2163 case NeonTypeFlags::Int64: 2164 return llvm::VectorType::get(CGF->DoubleTy, (1 << IsQuad)); 2165 default: 2166 llvm_unreachable("Type can't be converted to floating-point!"); 2167 } 2168 } 2169 2170 Value *CodeGenFunction::EmitNeonSplat(Value *V, Constant *C) { 2171 unsigned nElts = cast<llvm::VectorType>(V->getType())->getNumElements(); 2172 Value* SV = llvm::ConstantVector::getSplat(nElts, C); 2173 return Builder.CreateShuffleVector(V, V, SV, "lane"); 2174 } 2175 2176 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, 2177 const char *name, 2178 unsigned shift, bool rightshift) { 2179 unsigned j = 0; 2180 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 2181 ai != ae; ++ai, ++j) 2182 if (shift > 0 && shift == j) 2183 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); 2184 else 2185 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); 2186 2187 return Builder.CreateCall(F, Ops, name); 2188 } 2189 2190 Value *CodeGenFunction::EmitNeonShiftVector(Value *V, llvm::Type *Ty, 2191 bool neg) { 2192 int SV = cast<ConstantInt>(V)->getSExtValue(); 2193 return ConstantInt::get(Ty, neg ? -SV : SV); 2194 } 2195 2196 // \brief Right-shift a vector by a constant. 2197 Value *CodeGenFunction::EmitNeonRShiftImm(Value *Vec, Value *Shift, 2198 llvm::Type *Ty, bool usgn, 2199 const char *name) { 2200 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 2201 2202 int ShiftAmt = cast<ConstantInt>(Shift)->getSExtValue(); 2203 int EltSize = VTy->getScalarSizeInBits(); 2204 2205 Vec = Builder.CreateBitCast(Vec, Ty); 2206 2207 // lshr/ashr are undefined when the shift amount is equal to the vector 2208 // element size. 2209 if (ShiftAmt == EltSize) { 2210 if (usgn) { 2211 // Right-shifting an unsigned value by its size yields 0. 2212 return llvm::ConstantAggregateZero::get(VTy); 2213 } else { 2214 // Right-shifting a signed value by its size is equivalent 2215 // to a shift of size-1. 2216 --ShiftAmt; 2217 Shift = ConstantInt::get(VTy->getElementType(), ShiftAmt); 2218 } 2219 } 2220 2221 Shift = EmitNeonShiftVector(Shift, Ty, false); 2222 if (usgn) 2223 return Builder.CreateLShr(Vec, Shift, name); 2224 else 2225 return Builder.CreateAShr(Vec, Shift, name); 2226 } 2227 2228 enum { 2229 AddRetType = (1 << 0), 2230 Add1ArgType = (1 << 1), 2231 Add2ArgTypes = (1 << 2), 2232 2233 VectorizeRetType = (1 << 3), 2234 VectorizeArgTypes = (1 << 4), 2235 2236 InventFloatType = (1 << 5), 2237 UnsignedAlts = (1 << 6), 2238 2239 Use64BitVectors = (1 << 7), 2240 Use128BitVectors = (1 << 8), 2241 2242 Vectorize1ArgType = Add1ArgType | VectorizeArgTypes, 2243 VectorRet = AddRetType | VectorizeRetType, 2244 VectorRetGetArgs01 = 2245 AddRetType | Add2ArgTypes | VectorizeRetType | VectorizeArgTypes, 2246 FpCmpzModifiers = 2247 AddRetType | VectorizeRetType | Add1ArgType | InventFloatType 2248 }; 2249 2250 namespace { 2251 struct NeonIntrinsicInfo { 2252 unsigned BuiltinID; 2253 unsigned LLVMIntrinsic; 2254 unsigned AltLLVMIntrinsic; 2255 const char *NameHint; 2256 unsigned TypeModifier; 2257 2258 bool operator<(unsigned RHSBuiltinID) const { 2259 return BuiltinID < RHSBuiltinID; 2260 } 2261 }; 2262 } // end anonymous namespace 2263 2264 #define NEONMAP0(NameBase) \ 2265 { NEON::BI__builtin_neon_ ## NameBase, 0, 0, #NameBase, 0 } 2266 2267 #define NEONMAP1(NameBase, LLVMIntrinsic, TypeModifier) \ 2268 { NEON:: BI__builtin_neon_ ## NameBase, \ 2269 Intrinsic::LLVMIntrinsic, 0, #NameBase, TypeModifier } 2270 2271 #define NEONMAP2(NameBase, LLVMIntrinsic, AltLLVMIntrinsic, TypeModifier) \ 2272 { NEON:: BI__builtin_neon_ ## NameBase, \ 2273 Intrinsic::LLVMIntrinsic, Intrinsic::AltLLVMIntrinsic, \ 2274 #NameBase, TypeModifier } 2275 2276 static const NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = { 2277 NEONMAP2(vabd_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 2278 NEONMAP2(vabdq_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 2279 NEONMAP1(vabs_v, arm_neon_vabs, 0), 2280 NEONMAP1(vabsq_v, arm_neon_vabs, 0), 2281 NEONMAP0(vaddhn_v), 2282 NEONMAP1(vaesdq_v, arm_neon_aesd, 0), 2283 NEONMAP1(vaeseq_v, arm_neon_aese, 0), 2284 NEONMAP1(vaesimcq_v, arm_neon_aesimc, 0), 2285 NEONMAP1(vaesmcq_v, arm_neon_aesmc, 0), 2286 NEONMAP1(vbsl_v, arm_neon_vbsl, AddRetType), 2287 NEONMAP1(vbslq_v, arm_neon_vbsl, AddRetType), 2288 NEONMAP1(vcage_v, arm_neon_vacge, 0), 2289 NEONMAP1(vcageq_v, arm_neon_vacge, 0), 2290 NEONMAP1(vcagt_v, arm_neon_vacgt, 0), 2291 NEONMAP1(vcagtq_v, arm_neon_vacgt, 0), 2292 NEONMAP1(vcale_v, arm_neon_vacge, 0), 2293 NEONMAP1(vcaleq_v, arm_neon_vacge, 0), 2294 NEONMAP1(vcalt_v, arm_neon_vacgt, 0), 2295 NEONMAP1(vcaltq_v, arm_neon_vacgt, 0), 2296 NEONMAP1(vcls_v, arm_neon_vcls, Add1ArgType), 2297 NEONMAP1(vclsq_v, arm_neon_vcls, Add1ArgType), 2298 NEONMAP1(vclz_v, ctlz, Add1ArgType), 2299 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 2300 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 2301 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 2302 NEONMAP1(vcvt_f16_f32, arm_neon_vcvtfp2hf, 0), 2303 NEONMAP1(vcvt_f32_f16, arm_neon_vcvthf2fp, 0), 2304 NEONMAP0(vcvt_f32_v), 2305 NEONMAP2(vcvt_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 2306 NEONMAP1(vcvt_n_s32_v, arm_neon_vcvtfp2fxs, 0), 2307 NEONMAP1(vcvt_n_s64_v, arm_neon_vcvtfp2fxs, 0), 2308 NEONMAP1(vcvt_n_u32_v, arm_neon_vcvtfp2fxu, 0), 2309 NEONMAP1(vcvt_n_u64_v, arm_neon_vcvtfp2fxu, 0), 2310 NEONMAP0(vcvt_s32_v), 2311 NEONMAP0(vcvt_s64_v), 2312 NEONMAP0(vcvt_u32_v), 2313 NEONMAP0(vcvt_u64_v), 2314 NEONMAP1(vcvta_s32_v, arm_neon_vcvtas, 0), 2315 NEONMAP1(vcvta_s64_v, arm_neon_vcvtas, 0), 2316 NEONMAP1(vcvta_u32_v, arm_neon_vcvtau, 0), 2317 NEONMAP1(vcvta_u64_v, arm_neon_vcvtau, 0), 2318 NEONMAP1(vcvtaq_s32_v, arm_neon_vcvtas, 0), 2319 NEONMAP1(vcvtaq_s64_v, arm_neon_vcvtas, 0), 2320 NEONMAP1(vcvtaq_u32_v, arm_neon_vcvtau, 0), 2321 NEONMAP1(vcvtaq_u64_v, arm_neon_vcvtau, 0), 2322 NEONMAP1(vcvtm_s32_v, arm_neon_vcvtms, 0), 2323 NEONMAP1(vcvtm_s64_v, arm_neon_vcvtms, 0), 2324 NEONMAP1(vcvtm_u32_v, arm_neon_vcvtmu, 0), 2325 NEONMAP1(vcvtm_u64_v, arm_neon_vcvtmu, 0), 2326 NEONMAP1(vcvtmq_s32_v, arm_neon_vcvtms, 0), 2327 NEONMAP1(vcvtmq_s64_v, arm_neon_vcvtms, 0), 2328 NEONMAP1(vcvtmq_u32_v, arm_neon_vcvtmu, 0), 2329 NEONMAP1(vcvtmq_u64_v, arm_neon_vcvtmu, 0), 2330 NEONMAP1(vcvtn_s32_v, arm_neon_vcvtns, 0), 2331 NEONMAP1(vcvtn_s64_v, arm_neon_vcvtns, 0), 2332 NEONMAP1(vcvtn_u32_v, arm_neon_vcvtnu, 0), 2333 NEONMAP1(vcvtn_u64_v, arm_neon_vcvtnu, 0), 2334 NEONMAP1(vcvtnq_s32_v, arm_neon_vcvtns, 0), 2335 NEONMAP1(vcvtnq_s64_v, arm_neon_vcvtns, 0), 2336 NEONMAP1(vcvtnq_u32_v, arm_neon_vcvtnu, 0), 2337 NEONMAP1(vcvtnq_u64_v, arm_neon_vcvtnu, 0), 2338 NEONMAP1(vcvtp_s32_v, arm_neon_vcvtps, 0), 2339 NEONMAP1(vcvtp_s64_v, arm_neon_vcvtps, 0), 2340 NEONMAP1(vcvtp_u32_v, arm_neon_vcvtpu, 0), 2341 NEONMAP1(vcvtp_u64_v, arm_neon_vcvtpu, 0), 2342 NEONMAP1(vcvtpq_s32_v, arm_neon_vcvtps, 0), 2343 NEONMAP1(vcvtpq_s64_v, arm_neon_vcvtps, 0), 2344 NEONMAP1(vcvtpq_u32_v, arm_neon_vcvtpu, 0), 2345 NEONMAP1(vcvtpq_u64_v, arm_neon_vcvtpu, 0), 2346 NEONMAP0(vcvtq_f32_v), 2347 NEONMAP2(vcvtq_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 2348 NEONMAP1(vcvtq_n_s32_v, arm_neon_vcvtfp2fxs, 0), 2349 NEONMAP1(vcvtq_n_s64_v, arm_neon_vcvtfp2fxs, 0), 2350 NEONMAP1(vcvtq_n_u32_v, arm_neon_vcvtfp2fxu, 0), 2351 NEONMAP1(vcvtq_n_u64_v, arm_neon_vcvtfp2fxu, 0), 2352 NEONMAP0(vcvtq_s32_v), 2353 NEONMAP0(vcvtq_s64_v), 2354 NEONMAP0(vcvtq_u32_v), 2355 NEONMAP0(vcvtq_u64_v), 2356 NEONMAP0(vext_v), 2357 NEONMAP0(vextq_v), 2358 NEONMAP0(vfma_v), 2359 NEONMAP0(vfmaq_v), 2360 NEONMAP2(vhadd_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 2361 NEONMAP2(vhaddq_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 2362 NEONMAP2(vhsub_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 2363 NEONMAP2(vhsubq_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 2364 NEONMAP0(vld1_dup_v), 2365 NEONMAP1(vld1_v, arm_neon_vld1, 0), 2366 NEONMAP0(vld1q_dup_v), 2367 NEONMAP1(vld1q_v, arm_neon_vld1, 0), 2368 NEONMAP1(vld2_lane_v, arm_neon_vld2lane, 0), 2369 NEONMAP1(vld2_v, arm_neon_vld2, 0), 2370 NEONMAP1(vld2q_lane_v, arm_neon_vld2lane, 0), 2371 NEONMAP1(vld2q_v, arm_neon_vld2, 0), 2372 NEONMAP1(vld3_lane_v, arm_neon_vld3lane, 0), 2373 NEONMAP1(vld3_v, arm_neon_vld3, 0), 2374 NEONMAP1(vld3q_lane_v, arm_neon_vld3lane, 0), 2375 NEONMAP1(vld3q_v, arm_neon_vld3, 0), 2376 NEONMAP1(vld4_lane_v, arm_neon_vld4lane, 0), 2377 NEONMAP1(vld4_v, arm_neon_vld4, 0), 2378 NEONMAP1(vld4q_lane_v, arm_neon_vld4lane, 0), 2379 NEONMAP1(vld4q_v, arm_neon_vld4, 0), 2380 NEONMAP2(vmax_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 2381 NEONMAP1(vmaxnm_v, arm_neon_vmaxnm, Add1ArgType), 2382 NEONMAP1(vmaxnmq_v, arm_neon_vmaxnm, Add1ArgType), 2383 NEONMAP2(vmaxq_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 2384 NEONMAP2(vmin_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 2385 NEONMAP1(vminnm_v, arm_neon_vminnm, Add1ArgType), 2386 NEONMAP1(vminnmq_v, arm_neon_vminnm, Add1ArgType), 2387 NEONMAP2(vminq_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 2388 NEONMAP0(vmovl_v), 2389 NEONMAP0(vmovn_v), 2390 NEONMAP1(vmul_v, arm_neon_vmulp, Add1ArgType), 2391 NEONMAP0(vmull_v), 2392 NEONMAP1(vmulq_v, arm_neon_vmulp, Add1ArgType), 2393 NEONMAP2(vpadal_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 2394 NEONMAP2(vpadalq_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 2395 NEONMAP1(vpadd_v, arm_neon_vpadd, Add1ArgType), 2396 NEONMAP2(vpaddl_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 2397 NEONMAP2(vpaddlq_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 2398 NEONMAP1(vpaddq_v, arm_neon_vpadd, Add1ArgType), 2399 NEONMAP2(vpmax_v, arm_neon_vpmaxu, arm_neon_vpmaxs, Add1ArgType | UnsignedAlts), 2400 NEONMAP2(vpmin_v, arm_neon_vpminu, arm_neon_vpmins, Add1ArgType | UnsignedAlts), 2401 NEONMAP1(vqabs_v, arm_neon_vqabs, Add1ArgType), 2402 NEONMAP1(vqabsq_v, arm_neon_vqabs, Add1ArgType), 2403 NEONMAP2(vqadd_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 2404 NEONMAP2(vqaddq_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 2405 NEONMAP2(vqdmlal_v, arm_neon_vqdmull, arm_neon_vqadds, 0), 2406 NEONMAP2(vqdmlsl_v, arm_neon_vqdmull, arm_neon_vqsubs, 0), 2407 NEONMAP1(vqdmulh_v, arm_neon_vqdmulh, Add1ArgType), 2408 NEONMAP1(vqdmulhq_v, arm_neon_vqdmulh, Add1ArgType), 2409 NEONMAP1(vqdmull_v, arm_neon_vqdmull, Add1ArgType), 2410 NEONMAP2(vqmovn_v, arm_neon_vqmovnu, arm_neon_vqmovns, Add1ArgType | UnsignedAlts), 2411 NEONMAP1(vqmovun_v, arm_neon_vqmovnsu, Add1ArgType), 2412 NEONMAP1(vqneg_v, arm_neon_vqneg, Add1ArgType), 2413 NEONMAP1(vqnegq_v, arm_neon_vqneg, Add1ArgType), 2414 NEONMAP1(vqrdmulh_v, arm_neon_vqrdmulh, Add1ArgType), 2415 NEONMAP1(vqrdmulhq_v, arm_neon_vqrdmulh, Add1ArgType), 2416 NEONMAP2(vqrshl_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 2417 NEONMAP2(vqrshlq_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 2418 NEONMAP2(vqshl_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 2419 NEONMAP2(vqshl_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 2420 NEONMAP2(vqshlq_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 2421 NEONMAP2(vqshlq_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 2422 NEONMAP1(vqshlu_n_v, arm_neon_vqshiftsu, 0), 2423 NEONMAP1(vqshluq_n_v, arm_neon_vqshiftsu, 0), 2424 NEONMAP2(vqsub_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 2425 NEONMAP2(vqsubq_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 2426 NEONMAP1(vraddhn_v, arm_neon_vraddhn, Add1ArgType), 2427 NEONMAP2(vrecpe_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 2428 NEONMAP2(vrecpeq_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 2429 NEONMAP1(vrecps_v, arm_neon_vrecps, Add1ArgType), 2430 NEONMAP1(vrecpsq_v, arm_neon_vrecps, Add1ArgType), 2431 NEONMAP2(vrhadd_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 2432 NEONMAP2(vrhaddq_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 2433 NEONMAP1(vrnd_v, arm_neon_vrintz, Add1ArgType), 2434 NEONMAP1(vrnda_v, arm_neon_vrinta, Add1ArgType), 2435 NEONMAP1(vrndaq_v, arm_neon_vrinta, Add1ArgType), 2436 NEONMAP1(vrndm_v, arm_neon_vrintm, Add1ArgType), 2437 NEONMAP1(vrndmq_v, arm_neon_vrintm, Add1ArgType), 2438 NEONMAP1(vrndn_v, arm_neon_vrintn, Add1ArgType), 2439 NEONMAP1(vrndnq_v, arm_neon_vrintn, Add1ArgType), 2440 NEONMAP1(vrndp_v, arm_neon_vrintp, Add1ArgType), 2441 NEONMAP1(vrndpq_v, arm_neon_vrintp, Add1ArgType), 2442 NEONMAP1(vrndq_v, arm_neon_vrintz, Add1ArgType), 2443 NEONMAP1(vrndx_v, arm_neon_vrintx, Add1ArgType), 2444 NEONMAP1(vrndxq_v, arm_neon_vrintx, Add1ArgType), 2445 NEONMAP2(vrshl_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 2446 NEONMAP2(vrshlq_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 2447 NEONMAP2(vrshr_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 2448 NEONMAP2(vrshrq_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 2449 NEONMAP2(vrsqrte_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 2450 NEONMAP2(vrsqrteq_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 2451 NEONMAP1(vrsqrts_v, arm_neon_vrsqrts, Add1ArgType), 2452 NEONMAP1(vrsqrtsq_v, arm_neon_vrsqrts, Add1ArgType), 2453 NEONMAP1(vrsubhn_v, arm_neon_vrsubhn, Add1ArgType), 2454 NEONMAP1(vsha1su0q_v, arm_neon_sha1su0, 0), 2455 NEONMAP1(vsha1su1q_v, arm_neon_sha1su1, 0), 2456 NEONMAP1(vsha256h2q_v, arm_neon_sha256h2, 0), 2457 NEONMAP1(vsha256hq_v, arm_neon_sha256h, 0), 2458 NEONMAP1(vsha256su0q_v, arm_neon_sha256su0, 0), 2459 NEONMAP1(vsha256su1q_v, arm_neon_sha256su1, 0), 2460 NEONMAP0(vshl_n_v), 2461 NEONMAP2(vshl_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 2462 NEONMAP0(vshll_n_v), 2463 NEONMAP0(vshlq_n_v), 2464 NEONMAP2(vshlq_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 2465 NEONMAP0(vshr_n_v), 2466 NEONMAP0(vshrn_n_v), 2467 NEONMAP0(vshrq_n_v), 2468 NEONMAP1(vst1_v, arm_neon_vst1, 0), 2469 NEONMAP1(vst1q_v, arm_neon_vst1, 0), 2470 NEONMAP1(vst2_lane_v, arm_neon_vst2lane, 0), 2471 NEONMAP1(vst2_v, arm_neon_vst2, 0), 2472 NEONMAP1(vst2q_lane_v, arm_neon_vst2lane, 0), 2473 NEONMAP1(vst2q_v, arm_neon_vst2, 0), 2474 NEONMAP1(vst3_lane_v, arm_neon_vst3lane, 0), 2475 NEONMAP1(vst3_v, arm_neon_vst3, 0), 2476 NEONMAP1(vst3q_lane_v, arm_neon_vst3lane, 0), 2477 NEONMAP1(vst3q_v, arm_neon_vst3, 0), 2478 NEONMAP1(vst4_lane_v, arm_neon_vst4lane, 0), 2479 NEONMAP1(vst4_v, arm_neon_vst4, 0), 2480 NEONMAP1(vst4q_lane_v, arm_neon_vst4lane, 0), 2481 NEONMAP1(vst4q_v, arm_neon_vst4, 0), 2482 NEONMAP0(vsubhn_v), 2483 NEONMAP0(vtrn_v), 2484 NEONMAP0(vtrnq_v), 2485 NEONMAP0(vtst_v), 2486 NEONMAP0(vtstq_v), 2487 NEONMAP0(vuzp_v), 2488 NEONMAP0(vuzpq_v), 2489 NEONMAP0(vzip_v), 2490 NEONMAP0(vzipq_v) 2491 }; 2492 2493 static const NeonIntrinsicInfo AArch64SIMDIntrinsicMap[] = { 2494 NEONMAP1(vabs_v, aarch64_neon_abs, 0), 2495 NEONMAP1(vabsq_v, aarch64_neon_abs, 0), 2496 NEONMAP0(vaddhn_v), 2497 NEONMAP1(vaesdq_v, aarch64_crypto_aesd, 0), 2498 NEONMAP1(vaeseq_v, aarch64_crypto_aese, 0), 2499 NEONMAP1(vaesimcq_v, aarch64_crypto_aesimc, 0), 2500 NEONMAP1(vaesmcq_v, aarch64_crypto_aesmc, 0), 2501 NEONMAP1(vcage_v, aarch64_neon_facge, 0), 2502 NEONMAP1(vcageq_v, aarch64_neon_facge, 0), 2503 NEONMAP1(vcagt_v, aarch64_neon_facgt, 0), 2504 NEONMAP1(vcagtq_v, aarch64_neon_facgt, 0), 2505 NEONMAP1(vcale_v, aarch64_neon_facge, 0), 2506 NEONMAP1(vcaleq_v, aarch64_neon_facge, 0), 2507 NEONMAP1(vcalt_v, aarch64_neon_facgt, 0), 2508 NEONMAP1(vcaltq_v, aarch64_neon_facgt, 0), 2509 NEONMAP1(vcls_v, aarch64_neon_cls, Add1ArgType), 2510 NEONMAP1(vclsq_v, aarch64_neon_cls, Add1ArgType), 2511 NEONMAP1(vclz_v, ctlz, Add1ArgType), 2512 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 2513 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 2514 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 2515 NEONMAP1(vcvt_f16_f32, aarch64_neon_vcvtfp2hf, 0), 2516 NEONMAP1(vcvt_f32_f16, aarch64_neon_vcvthf2fp, 0), 2517 NEONMAP0(vcvt_f32_v), 2518 NEONMAP2(vcvt_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2519 NEONMAP2(vcvt_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2520 NEONMAP1(vcvt_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 2521 NEONMAP1(vcvt_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 2522 NEONMAP1(vcvt_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 2523 NEONMAP1(vcvt_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 2524 NEONMAP0(vcvtq_f32_v), 2525 NEONMAP2(vcvtq_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2526 NEONMAP2(vcvtq_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2527 NEONMAP1(vcvtq_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 2528 NEONMAP1(vcvtq_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 2529 NEONMAP1(vcvtq_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 2530 NEONMAP1(vcvtq_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 2531 NEONMAP1(vcvtx_f32_v, aarch64_neon_fcvtxn, AddRetType | Add1ArgType), 2532 NEONMAP0(vext_v), 2533 NEONMAP0(vextq_v), 2534 NEONMAP0(vfma_v), 2535 NEONMAP0(vfmaq_v), 2536 NEONMAP2(vhadd_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 2537 NEONMAP2(vhaddq_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 2538 NEONMAP2(vhsub_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 2539 NEONMAP2(vhsubq_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 2540 NEONMAP0(vmovl_v), 2541 NEONMAP0(vmovn_v), 2542 NEONMAP1(vmul_v, aarch64_neon_pmul, Add1ArgType), 2543 NEONMAP1(vmulq_v, aarch64_neon_pmul, Add1ArgType), 2544 NEONMAP1(vpadd_v, aarch64_neon_addp, Add1ArgType), 2545 NEONMAP2(vpaddl_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 2546 NEONMAP2(vpaddlq_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 2547 NEONMAP1(vpaddq_v, aarch64_neon_addp, Add1ArgType), 2548 NEONMAP1(vqabs_v, aarch64_neon_sqabs, Add1ArgType), 2549 NEONMAP1(vqabsq_v, aarch64_neon_sqabs, Add1ArgType), 2550 NEONMAP2(vqadd_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 2551 NEONMAP2(vqaddq_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 2552 NEONMAP2(vqdmlal_v, aarch64_neon_sqdmull, aarch64_neon_sqadd, 0), 2553 NEONMAP2(vqdmlsl_v, aarch64_neon_sqdmull, aarch64_neon_sqsub, 0), 2554 NEONMAP1(vqdmulh_v, aarch64_neon_sqdmulh, Add1ArgType), 2555 NEONMAP1(vqdmulhq_v, aarch64_neon_sqdmulh, Add1ArgType), 2556 NEONMAP1(vqdmull_v, aarch64_neon_sqdmull, Add1ArgType), 2557 NEONMAP2(vqmovn_v, aarch64_neon_uqxtn, aarch64_neon_sqxtn, Add1ArgType | UnsignedAlts), 2558 NEONMAP1(vqmovun_v, aarch64_neon_sqxtun, Add1ArgType), 2559 NEONMAP1(vqneg_v, aarch64_neon_sqneg, Add1ArgType), 2560 NEONMAP1(vqnegq_v, aarch64_neon_sqneg, Add1ArgType), 2561 NEONMAP1(vqrdmulh_v, aarch64_neon_sqrdmulh, Add1ArgType), 2562 NEONMAP1(vqrdmulhq_v, aarch64_neon_sqrdmulh, Add1ArgType), 2563 NEONMAP2(vqrshl_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 2564 NEONMAP2(vqrshlq_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 2565 NEONMAP2(vqshl_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl, UnsignedAlts), 2566 NEONMAP2(vqshl_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 2567 NEONMAP2(vqshlq_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl,UnsignedAlts), 2568 NEONMAP2(vqshlq_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 2569 NEONMAP1(vqshlu_n_v, aarch64_neon_sqshlu, 0), 2570 NEONMAP1(vqshluq_n_v, aarch64_neon_sqshlu, 0), 2571 NEONMAP2(vqsub_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 2572 NEONMAP2(vqsubq_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 2573 NEONMAP1(vraddhn_v, aarch64_neon_raddhn, Add1ArgType), 2574 NEONMAP2(vrecpe_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 2575 NEONMAP2(vrecpeq_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 2576 NEONMAP1(vrecps_v, aarch64_neon_frecps, Add1ArgType), 2577 NEONMAP1(vrecpsq_v, aarch64_neon_frecps, Add1ArgType), 2578 NEONMAP2(vrhadd_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 2579 NEONMAP2(vrhaddq_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 2580 NEONMAP2(vrshl_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 2581 NEONMAP2(vrshlq_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 2582 NEONMAP2(vrshr_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 2583 NEONMAP2(vrshrq_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 2584 NEONMAP2(vrsqrte_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 2585 NEONMAP2(vrsqrteq_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 2586 NEONMAP1(vrsqrts_v, aarch64_neon_frsqrts, Add1ArgType), 2587 NEONMAP1(vrsqrtsq_v, aarch64_neon_frsqrts, Add1ArgType), 2588 NEONMAP1(vrsubhn_v, aarch64_neon_rsubhn, Add1ArgType), 2589 NEONMAP1(vsha1su0q_v, aarch64_crypto_sha1su0, 0), 2590 NEONMAP1(vsha1su1q_v, aarch64_crypto_sha1su1, 0), 2591 NEONMAP1(vsha256h2q_v, aarch64_crypto_sha256h2, 0), 2592 NEONMAP1(vsha256hq_v, aarch64_crypto_sha256h, 0), 2593 NEONMAP1(vsha256su0q_v, aarch64_crypto_sha256su0, 0), 2594 NEONMAP1(vsha256su1q_v, aarch64_crypto_sha256su1, 0), 2595 NEONMAP0(vshl_n_v), 2596 NEONMAP2(vshl_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 2597 NEONMAP0(vshll_n_v), 2598 NEONMAP0(vshlq_n_v), 2599 NEONMAP2(vshlq_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 2600 NEONMAP0(vshr_n_v), 2601 NEONMAP0(vshrn_n_v), 2602 NEONMAP0(vshrq_n_v), 2603 NEONMAP0(vsubhn_v), 2604 NEONMAP0(vtst_v), 2605 NEONMAP0(vtstq_v), 2606 }; 2607 2608 static const NeonIntrinsicInfo AArch64SISDIntrinsicMap[] = { 2609 NEONMAP1(vabdd_f64, aarch64_sisd_fabd, Add1ArgType), 2610 NEONMAP1(vabds_f32, aarch64_sisd_fabd, Add1ArgType), 2611 NEONMAP1(vabsd_s64, aarch64_neon_abs, Add1ArgType), 2612 NEONMAP1(vaddlv_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 2613 NEONMAP1(vaddlv_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 2614 NEONMAP1(vaddlvq_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 2615 NEONMAP1(vaddlvq_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 2616 NEONMAP1(vaddv_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 2617 NEONMAP1(vaddv_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 2618 NEONMAP1(vaddv_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2619 NEONMAP1(vaddvq_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 2620 NEONMAP1(vaddvq_f64, aarch64_neon_faddv, AddRetType | Add1ArgType), 2621 NEONMAP1(vaddvq_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 2622 NEONMAP1(vaddvq_s64, aarch64_neon_saddv, AddRetType | Add1ArgType), 2623 NEONMAP1(vaddvq_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2624 NEONMAP1(vaddvq_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2625 NEONMAP1(vcaged_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 2626 NEONMAP1(vcages_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 2627 NEONMAP1(vcagtd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 2628 NEONMAP1(vcagts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 2629 NEONMAP1(vcaled_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 2630 NEONMAP1(vcales_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 2631 NEONMAP1(vcaltd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 2632 NEONMAP1(vcalts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 2633 NEONMAP1(vcvtad_s64_f64, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 2634 NEONMAP1(vcvtad_u64_f64, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 2635 NEONMAP1(vcvtas_s32_f32, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 2636 NEONMAP1(vcvtas_u32_f32, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 2637 NEONMAP1(vcvtd_n_f64_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 2638 NEONMAP1(vcvtd_n_f64_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 2639 NEONMAP1(vcvtd_n_s64_f64, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 2640 NEONMAP1(vcvtd_n_u64_f64, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 2641 NEONMAP1(vcvtmd_s64_f64, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 2642 NEONMAP1(vcvtmd_u64_f64, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 2643 NEONMAP1(vcvtms_s32_f32, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 2644 NEONMAP1(vcvtms_u32_f32, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 2645 NEONMAP1(vcvtnd_s64_f64, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 2646 NEONMAP1(vcvtnd_u64_f64, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 2647 NEONMAP1(vcvtns_s32_f32, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 2648 NEONMAP1(vcvtns_u32_f32, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 2649 NEONMAP1(vcvtpd_s64_f64, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 2650 NEONMAP1(vcvtpd_u64_f64, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 2651 NEONMAP1(vcvtps_s32_f32, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 2652 NEONMAP1(vcvtps_u32_f32, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 2653 NEONMAP1(vcvts_n_f32_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 2654 NEONMAP1(vcvts_n_f32_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 2655 NEONMAP1(vcvts_n_s32_f32, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 2656 NEONMAP1(vcvts_n_u32_f32, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 2657 NEONMAP1(vcvtxd_f32_f64, aarch64_sisd_fcvtxn, 0), 2658 NEONMAP1(vmaxnmv_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2659 NEONMAP1(vmaxnmvq_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2660 NEONMAP1(vmaxnmvq_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2661 NEONMAP1(vmaxv_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2662 NEONMAP1(vmaxv_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 2663 NEONMAP1(vmaxv_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 2664 NEONMAP1(vmaxvq_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2665 NEONMAP1(vmaxvq_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2666 NEONMAP1(vmaxvq_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 2667 NEONMAP1(vmaxvq_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 2668 NEONMAP1(vminnmv_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2669 NEONMAP1(vminnmvq_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2670 NEONMAP1(vminnmvq_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2671 NEONMAP1(vminv_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 2672 NEONMAP1(vminv_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 2673 NEONMAP1(vminv_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 2674 NEONMAP1(vminvq_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 2675 NEONMAP1(vminvq_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 2676 NEONMAP1(vminvq_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 2677 NEONMAP1(vminvq_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 2678 NEONMAP1(vmull_p64, aarch64_neon_pmull64, 0), 2679 NEONMAP1(vmulxd_f64, aarch64_neon_fmulx, Add1ArgType), 2680 NEONMAP1(vmulxs_f32, aarch64_neon_fmulx, Add1ArgType), 2681 NEONMAP1(vpaddd_s64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2682 NEONMAP1(vpaddd_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2683 NEONMAP1(vpmaxnmqd_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2684 NEONMAP1(vpmaxnms_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2685 NEONMAP1(vpmaxqd_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2686 NEONMAP1(vpmaxs_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2687 NEONMAP1(vpminnmqd_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2688 NEONMAP1(vpminnms_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2689 NEONMAP1(vpminqd_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 2690 NEONMAP1(vpmins_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 2691 NEONMAP1(vqabsb_s8, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 2692 NEONMAP1(vqabsd_s64, aarch64_neon_sqabs, Add1ArgType), 2693 NEONMAP1(vqabsh_s16, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 2694 NEONMAP1(vqabss_s32, aarch64_neon_sqabs, Add1ArgType), 2695 NEONMAP1(vqaddb_s8, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 2696 NEONMAP1(vqaddb_u8, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 2697 NEONMAP1(vqaddd_s64, aarch64_neon_sqadd, Add1ArgType), 2698 NEONMAP1(vqaddd_u64, aarch64_neon_uqadd, Add1ArgType), 2699 NEONMAP1(vqaddh_s16, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 2700 NEONMAP1(vqaddh_u16, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 2701 NEONMAP1(vqadds_s32, aarch64_neon_sqadd, Add1ArgType), 2702 NEONMAP1(vqadds_u32, aarch64_neon_uqadd, Add1ArgType), 2703 NEONMAP1(vqdmulhh_s16, aarch64_neon_sqdmulh, Vectorize1ArgType | Use64BitVectors), 2704 NEONMAP1(vqdmulhs_s32, aarch64_neon_sqdmulh, Add1ArgType), 2705 NEONMAP1(vqdmullh_s16, aarch64_neon_sqdmull, VectorRet | Use128BitVectors), 2706 NEONMAP1(vqdmulls_s32, aarch64_neon_sqdmulls_scalar, 0), 2707 NEONMAP1(vqmovnd_s64, aarch64_neon_scalar_sqxtn, AddRetType | Add1ArgType), 2708 NEONMAP1(vqmovnd_u64, aarch64_neon_scalar_uqxtn, AddRetType | Add1ArgType), 2709 NEONMAP1(vqmovnh_s16, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 2710 NEONMAP1(vqmovnh_u16, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 2711 NEONMAP1(vqmovns_s32, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 2712 NEONMAP1(vqmovns_u32, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 2713 NEONMAP1(vqmovund_s64, aarch64_neon_scalar_sqxtun, AddRetType | Add1ArgType), 2714 NEONMAP1(vqmovunh_s16, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 2715 NEONMAP1(vqmovuns_s32, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 2716 NEONMAP1(vqnegb_s8, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 2717 NEONMAP1(vqnegd_s64, aarch64_neon_sqneg, Add1ArgType), 2718 NEONMAP1(vqnegh_s16, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 2719 NEONMAP1(vqnegs_s32, aarch64_neon_sqneg, Add1ArgType), 2720 NEONMAP1(vqrdmulhh_s16, aarch64_neon_sqrdmulh, Vectorize1ArgType | Use64BitVectors), 2721 NEONMAP1(vqrdmulhs_s32, aarch64_neon_sqrdmulh, Add1ArgType), 2722 NEONMAP1(vqrshlb_s8, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 2723 NEONMAP1(vqrshlb_u8, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 2724 NEONMAP1(vqrshld_s64, aarch64_neon_sqrshl, Add1ArgType), 2725 NEONMAP1(vqrshld_u64, aarch64_neon_uqrshl, Add1ArgType), 2726 NEONMAP1(vqrshlh_s16, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 2727 NEONMAP1(vqrshlh_u16, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 2728 NEONMAP1(vqrshls_s32, aarch64_neon_sqrshl, Add1ArgType), 2729 NEONMAP1(vqrshls_u32, aarch64_neon_uqrshl, Add1ArgType), 2730 NEONMAP1(vqrshrnd_n_s64, aarch64_neon_sqrshrn, AddRetType), 2731 NEONMAP1(vqrshrnd_n_u64, aarch64_neon_uqrshrn, AddRetType), 2732 NEONMAP1(vqrshrnh_n_s16, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 2733 NEONMAP1(vqrshrnh_n_u16, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 2734 NEONMAP1(vqrshrns_n_s32, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 2735 NEONMAP1(vqrshrns_n_u32, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 2736 NEONMAP1(vqrshrund_n_s64, aarch64_neon_sqrshrun, AddRetType), 2737 NEONMAP1(vqrshrunh_n_s16, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 2738 NEONMAP1(vqrshruns_n_s32, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 2739 NEONMAP1(vqshlb_n_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2740 NEONMAP1(vqshlb_n_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2741 NEONMAP1(vqshlb_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2742 NEONMAP1(vqshlb_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2743 NEONMAP1(vqshld_s64, aarch64_neon_sqshl, Add1ArgType), 2744 NEONMAP1(vqshld_u64, aarch64_neon_uqshl, Add1ArgType), 2745 NEONMAP1(vqshlh_n_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2746 NEONMAP1(vqshlh_n_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2747 NEONMAP1(vqshlh_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2748 NEONMAP1(vqshlh_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2749 NEONMAP1(vqshls_n_s32, aarch64_neon_sqshl, Add1ArgType), 2750 NEONMAP1(vqshls_n_u32, aarch64_neon_uqshl, Add1ArgType), 2751 NEONMAP1(vqshls_s32, aarch64_neon_sqshl, Add1ArgType), 2752 NEONMAP1(vqshls_u32, aarch64_neon_uqshl, Add1ArgType), 2753 NEONMAP1(vqshlub_n_s8, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 2754 NEONMAP1(vqshluh_n_s16, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 2755 NEONMAP1(vqshlus_n_s32, aarch64_neon_sqshlu, Add1ArgType), 2756 NEONMAP1(vqshrnd_n_s64, aarch64_neon_sqshrn, AddRetType), 2757 NEONMAP1(vqshrnd_n_u64, aarch64_neon_uqshrn, AddRetType), 2758 NEONMAP1(vqshrnh_n_s16, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 2759 NEONMAP1(vqshrnh_n_u16, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 2760 NEONMAP1(vqshrns_n_s32, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 2761 NEONMAP1(vqshrns_n_u32, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 2762 NEONMAP1(vqshrund_n_s64, aarch64_neon_sqshrun, AddRetType), 2763 NEONMAP1(vqshrunh_n_s16, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 2764 NEONMAP1(vqshruns_n_s32, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 2765 NEONMAP1(vqsubb_s8, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 2766 NEONMAP1(vqsubb_u8, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 2767 NEONMAP1(vqsubd_s64, aarch64_neon_sqsub, Add1ArgType), 2768 NEONMAP1(vqsubd_u64, aarch64_neon_uqsub, Add1ArgType), 2769 NEONMAP1(vqsubh_s16, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 2770 NEONMAP1(vqsubh_u16, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 2771 NEONMAP1(vqsubs_s32, aarch64_neon_sqsub, Add1ArgType), 2772 NEONMAP1(vqsubs_u32, aarch64_neon_uqsub, Add1ArgType), 2773 NEONMAP1(vrecped_f64, aarch64_neon_frecpe, Add1ArgType), 2774 NEONMAP1(vrecpes_f32, aarch64_neon_frecpe, Add1ArgType), 2775 NEONMAP1(vrecpxd_f64, aarch64_neon_frecpx, Add1ArgType), 2776 NEONMAP1(vrecpxs_f32, aarch64_neon_frecpx, Add1ArgType), 2777 NEONMAP1(vrshld_s64, aarch64_neon_srshl, Add1ArgType), 2778 NEONMAP1(vrshld_u64, aarch64_neon_urshl, Add1ArgType), 2779 NEONMAP1(vrsqrted_f64, aarch64_neon_frsqrte, Add1ArgType), 2780 NEONMAP1(vrsqrtes_f32, aarch64_neon_frsqrte, Add1ArgType), 2781 NEONMAP1(vrsqrtsd_f64, aarch64_neon_frsqrts, Add1ArgType), 2782 NEONMAP1(vrsqrtss_f32, aarch64_neon_frsqrts, Add1ArgType), 2783 NEONMAP1(vsha1cq_u32, aarch64_crypto_sha1c, 0), 2784 NEONMAP1(vsha1h_u32, aarch64_crypto_sha1h, 0), 2785 NEONMAP1(vsha1mq_u32, aarch64_crypto_sha1m, 0), 2786 NEONMAP1(vsha1pq_u32, aarch64_crypto_sha1p, 0), 2787 NEONMAP1(vshld_s64, aarch64_neon_sshl, Add1ArgType), 2788 NEONMAP1(vshld_u64, aarch64_neon_ushl, Add1ArgType), 2789 NEONMAP1(vslid_n_s64, aarch64_neon_vsli, Vectorize1ArgType), 2790 NEONMAP1(vslid_n_u64, aarch64_neon_vsli, Vectorize1ArgType), 2791 NEONMAP1(vsqaddb_u8, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 2792 NEONMAP1(vsqaddd_u64, aarch64_neon_usqadd, Add1ArgType), 2793 NEONMAP1(vsqaddh_u16, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 2794 NEONMAP1(vsqadds_u32, aarch64_neon_usqadd, Add1ArgType), 2795 NEONMAP1(vsrid_n_s64, aarch64_neon_vsri, Vectorize1ArgType), 2796 NEONMAP1(vsrid_n_u64, aarch64_neon_vsri, Vectorize1ArgType), 2797 NEONMAP1(vuqaddb_s8, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 2798 NEONMAP1(vuqaddd_s64, aarch64_neon_suqadd, Add1ArgType), 2799 NEONMAP1(vuqaddh_s16, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 2800 NEONMAP1(vuqadds_s32, aarch64_neon_suqadd, Add1ArgType), 2801 }; 2802 2803 #undef NEONMAP0 2804 #undef NEONMAP1 2805 #undef NEONMAP2 2806 2807 static bool NEONSIMDIntrinsicsProvenSorted = false; 2808 2809 static bool AArch64SIMDIntrinsicsProvenSorted = false; 2810 static bool AArch64SISDIntrinsicsProvenSorted = false; 2811 2812 2813 static const NeonIntrinsicInfo * 2814 findNeonIntrinsicInMap(ArrayRef<NeonIntrinsicInfo> IntrinsicMap, 2815 unsigned BuiltinID, bool &MapProvenSorted) { 2816 2817 #ifndef NDEBUG 2818 if (!MapProvenSorted) { 2819 // FIXME: use std::is_sorted once C++11 is allowed 2820 for (unsigned i = 0; i < IntrinsicMap.size() - 1; ++i) 2821 assert(IntrinsicMap[i].BuiltinID <= IntrinsicMap[i + 1].BuiltinID); 2822 MapProvenSorted = true; 2823 } 2824 #endif 2825 2826 const NeonIntrinsicInfo *Builtin = 2827 std::lower_bound(IntrinsicMap.begin(), IntrinsicMap.end(), BuiltinID); 2828 2829 if (Builtin != IntrinsicMap.end() && Builtin->BuiltinID == BuiltinID) 2830 return Builtin; 2831 2832 return nullptr; 2833 } 2834 2835 Function *CodeGenFunction::LookupNeonLLVMIntrinsic(unsigned IntrinsicID, 2836 unsigned Modifier, 2837 llvm::Type *ArgType, 2838 const CallExpr *E) { 2839 int VectorSize = 0; 2840 if (Modifier & Use64BitVectors) 2841 VectorSize = 64; 2842 else if (Modifier & Use128BitVectors) 2843 VectorSize = 128; 2844 2845 // Return type. 2846 SmallVector<llvm::Type *, 3> Tys; 2847 if (Modifier & AddRetType) { 2848 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 2849 if (Modifier & VectorizeRetType) 2850 Ty = llvm::VectorType::get( 2851 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); 2852 2853 Tys.push_back(Ty); 2854 } 2855 2856 // Arguments. 2857 if (Modifier & VectorizeArgTypes) { 2858 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; 2859 ArgType = llvm::VectorType::get(ArgType, Elts); 2860 } 2861 2862 if (Modifier & (Add1ArgType | Add2ArgTypes)) 2863 Tys.push_back(ArgType); 2864 2865 if (Modifier & Add2ArgTypes) 2866 Tys.push_back(ArgType); 2867 2868 if (Modifier & InventFloatType) 2869 Tys.push_back(FloatTy); 2870 2871 return CGM.getIntrinsic(IntrinsicID, Tys); 2872 } 2873 2874 static Value *EmitCommonNeonSISDBuiltinExpr(CodeGenFunction &CGF, 2875 const NeonIntrinsicInfo &SISDInfo, 2876 SmallVectorImpl<Value *> &Ops, 2877 const CallExpr *E) { 2878 unsigned BuiltinID = SISDInfo.BuiltinID; 2879 unsigned int Int = SISDInfo.LLVMIntrinsic; 2880 unsigned Modifier = SISDInfo.TypeModifier; 2881 const char *s = SISDInfo.NameHint; 2882 2883 switch (BuiltinID) { 2884 case NEON::BI__builtin_neon_vcled_s64: 2885 case NEON::BI__builtin_neon_vcled_u64: 2886 case NEON::BI__builtin_neon_vcles_f32: 2887 case NEON::BI__builtin_neon_vcled_f64: 2888 case NEON::BI__builtin_neon_vcltd_s64: 2889 case NEON::BI__builtin_neon_vcltd_u64: 2890 case NEON::BI__builtin_neon_vclts_f32: 2891 case NEON::BI__builtin_neon_vcltd_f64: 2892 case NEON::BI__builtin_neon_vcales_f32: 2893 case NEON::BI__builtin_neon_vcaled_f64: 2894 case NEON::BI__builtin_neon_vcalts_f32: 2895 case NEON::BI__builtin_neon_vcaltd_f64: 2896 // Only one direction of comparisons actually exist, cmle is actually a cmge 2897 // with swapped operands. The table gives us the right intrinsic but we 2898 // still need to do the swap. 2899 std::swap(Ops[0], Ops[1]); 2900 break; 2901 } 2902 2903 assert(Int && "Generic code assumes a valid intrinsic"); 2904 2905 // Determine the type(s) of this overloaded AArch64 intrinsic. 2906 const Expr *Arg = E->getArg(0); 2907 llvm::Type *ArgTy = CGF.ConvertType(Arg->getType()); 2908 Function *F = CGF.LookupNeonLLVMIntrinsic(Int, Modifier, ArgTy, E); 2909 2910 int j = 0; 2911 ConstantInt *C0 = ConstantInt::get(CGF.SizeTy, 0); 2912 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 2913 ai != ae; ++ai, ++j) { 2914 llvm::Type *ArgTy = ai->getType(); 2915 if (Ops[j]->getType()->getPrimitiveSizeInBits() == 2916 ArgTy->getPrimitiveSizeInBits()) 2917 continue; 2918 2919 assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy()); 2920 // The constant argument to an _n_ intrinsic always has Int32Ty, so truncate 2921 // it before inserting. 2922 Ops[j] = 2923 CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType()); 2924 Ops[j] = 2925 CGF.Builder.CreateInsertElement(UndefValue::get(ArgTy), Ops[j], C0); 2926 } 2927 2928 Value *Result = CGF.EmitNeonCall(F, Ops, s); 2929 llvm::Type *ResultType = CGF.ConvertType(E->getType()); 2930 if (ResultType->getPrimitiveSizeInBits() < 2931 Result->getType()->getPrimitiveSizeInBits()) 2932 return CGF.Builder.CreateExtractElement(Result, C0); 2933 2934 return CGF.Builder.CreateBitCast(Result, ResultType, s); 2935 } 2936 2937 Value *CodeGenFunction::EmitCommonNeonBuiltinExpr( 2938 unsigned BuiltinID, unsigned LLVMIntrinsic, unsigned AltLLVMIntrinsic, 2939 const char *NameHint, unsigned Modifier, const CallExpr *E, 2940 SmallVectorImpl<llvm::Value *> &Ops, Address PtrOp0, Address PtrOp1) { 2941 // Get the last argument, which specifies the vector type. 2942 llvm::APSInt NeonTypeConst; 2943 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 2944 if (!Arg->isIntegerConstantExpr(NeonTypeConst, getContext())) 2945 return nullptr; 2946 2947 // Determine the type of this overloaded NEON intrinsic. 2948 NeonTypeFlags Type(NeonTypeConst.getZExtValue()); 2949 bool Usgn = Type.isUnsigned(); 2950 bool Quad = Type.isQuad(); 2951 2952 llvm::VectorType *VTy = GetNeonType(this, Type); 2953 llvm::Type *Ty = VTy; 2954 if (!Ty) 2955 return nullptr; 2956 2957 auto getAlignmentValue32 = [&](Address addr) -> Value* { 2958 return Builder.getInt32(addr.getAlignment().getQuantity()); 2959 }; 2960 2961 unsigned Int = LLVMIntrinsic; 2962 if ((Modifier & UnsignedAlts) && !Usgn) 2963 Int = AltLLVMIntrinsic; 2964 2965 switch (BuiltinID) { 2966 default: break; 2967 case NEON::BI__builtin_neon_vabs_v: 2968 case NEON::BI__builtin_neon_vabsq_v: 2969 if (VTy->getElementType()->isFloatingPointTy()) 2970 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, Ty), Ops, "vabs"); 2971 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), Ops, "vabs"); 2972 case NEON::BI__builtin_neon_vaddhn_v: { 2973 llvm::VectorType *SrcTy = 2974 llvm::VectorType::getExtendedElementVectorType(VTy); 2975 2976 // %sum = add <4 x i32> %lhs, %rhs 2977 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 2978 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 2979 Ops[0] = Builder.CreateAdd(Ops[0], Ops[1], "vaddhn"); 2980 2981 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 2982 Constant *ShiftAmt = 2983 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 2984 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vaddhn"); 2985 2986 // %res = trunc <4 x i32> %high to <4 x i16> 2987 return Builder.CreateTrunc(Ops[0], VTy, "vaddhn"); 2988 } 2989 case NEON::BI__builtin_neon_vcale_v: 2990 case NEON::BI__builtin_neon_vcaleq_v: 2991 case NEON::BI__builtin_neon_vcalt_v: 2992 case NEON::BI__builtin_neon_vcaltq_v: 2993 std::swap(Ops[0], Ops[1]); 2994 case NEON::BI__builtin_neon_vcage_v: 2995 case NEON::BI__builtin_neon_vcageq_v: 2996 case NEON::BI__builtin_neon_vcagt_v: 2997 case NEON::BI__builtin_neon_vcagtq_v: { 2998 llvm::Type *VecFlt = llvm::VectorType::get( 2999 VTy->getScalarSizeInBits() == 32 ? FloatTy : DoubleTy, 3000 VTy->getNumElements()); 3001 llvm::Type *Tys[] = { VTy, VecFlt }; 3002 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3003 return EmitNeonCall(F, Ops, NameHint); 3004 } 3005 case NEON::BI__builtin_neon_vclz_v: 3006 case NEON::BI__builtin_neon_vclzq_v: 3007 // We generate target-independent intrinsic, which needs a second argument 3008 // for whether or not clz of zero is undefined; on ARM it isn't. 3009 Ops.push_back(Builder.getInt1(getTarget().isCLZForZeroUndef())); 3010 break; 3011 case NEON::BI__builtin_neon_vcvt_f32_v: 3012 case NEON::BI__builtin_neon_vcvtq_f32_v: 3013 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3014 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, Quad)); 3015 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 3016 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 3017 case NEON::BI__builtin_neon_vcvt_n_f32_v: 3018 case NEON::BI__builtin_neon_vcvt_n_f64_v: 3019 case NEON::BI__builtin_neon_vcvtq_n_f32_v: 3020 case NEON::BI__builtin_neon_vcvtq_n_f64_v: { 3021 llvm::Type *Tys[2] = { GetFloatNeonType(this, Type), Ty }; 3022 Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic; 3023 Function *F = CGM.getIntrinsic(Int, Tys); 3024 return EmitNeonCall(F, Ops, "vcvt_n"); 3025 } 3026 case NEON::BI__builtin_neon_vcvt_n_s32_v: 3027 case NEON::BI__builtin_neon_vcvt_n_u32_v: 3028 case NEON::BI__builtin_neon_vcvt_n_s64_v: 3029 case NEON::BI__builtin_neon_vcvt_n_u64_v: 3030 case NEON::BI__builtin_neon_vcvtq_n_s32_v: 3031 case NEON::BI__builtin_neon_vcvtq_n_u32_v: 3032 case NEON::BI__builtin_neon_vcvtq_n_s64_v: 3033 case NEON::BI__builtin_neon_vcvtq_n_u64_v: { 3034 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 3035 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3036 return EmitNeonCall(F, Ops, "vcvt_n"); 3037 } 3038 case NEON::BI__builtin_neon_vcvt_s32_v: 3039 case NEON::BI__builtin_neon_vcvt_u32_v: 3040 case NEON::BI__builtin_neon_vcvt_s64_v: 3041 case NEON::BI__builtin_neon_vcvt_u64_v: 3042 case NEON::BI__builtin_neon_vcvtq_s32_v: 3043 case NEON::BI__builtin_neon_vcvtq_u32_v: 3044 case NEON::BI__builtin_neon_vcvtq_s64_v: 3045 case NEON::BI__builtin_neon_vcvtq_u64_v: { 3046 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 3047 return Usgn ? Builder.CreateFPToUI(Ops[0], Ty, "vcvt") 3048 : Builder.CreateFPToSI(Ops[0], Ty, "vcvt"); 3049 } 3050 case NEON::BI__builtin_neon_vcvta_s32_v: 3051 case NEON::BI__builtin_neon_vcvta_s64_v: 3052 case NEON::BI__builtin_neon_vcvta_u32_v: 3053 case NEON::BI__builtin_neon_vcvta_u64_v: 3054 case NEON::BI__builtin_neon_vcvtaq_s32_v: 3055 case NEON::BI__builtin_neon_vcvtaq_s64_v: 3056 case NEON::BI__builtin_neon_vcvtaq_u32_v: 3057 case NEON::BI__builtin_neon_vcvtaq_u64_v: 3058 case NEON::BI__builtin_neon_vcvtn_s32_v: 3059 case NEON::BI__builtin_neon_vcvtn_s64_v: 3060 case NEON::BI__builtin_neon_vcvtn_u32_v: 3061 case NEON::BI__builtin_neon_vcvtn_u64_v: 3062 case NEON::BI__builtin_neon_vcvtnq_s32_v: 3063 case NEON::BI__builtin_neon_vcvtnq_s64_v: 3064 case NEON::BI__builtin_neon_vcvtnq_u32_v: 3065 case NEON::BI__builtin_neon_vcvtnq_u64_v: 3066 case NEON::BI__builtin_neon_vcvtp_s32_v: 3067 case NEON::BI__builtin_neon_vcvtp_s64_v: 3068 case NEON::BI__builtin_neon_vcvtp_u32_v: 3069 case NEON::BI__builtin_neon_vcvtp_u64_v: 3070 case NEON::BI__builtin_neon_vcvtpq_s32_v: 3071 case NEON::BI__builtin_neon_vcvtpq_s64_v: 3072 case NEON::BI__builtin_neon_vcvtpq_u32_v: 3073 case NEON::BI__builtin_neon_vcvtpq_u64_v: 3074 case NEON::BI__builtin_neon_vcvtm_s32_v: 3075 case NEON::BI__builtin_neon_vcvtm_s64_v: 3076 case NEON::BI__builtin_neon_vcvtm_u32_v: 3077 case NEON::BI__builtin_neon_vcvtm_u64_v: 3078 case NEON::BI__builtin_neon_vcvtmq_s32_v: 3079 case NEON::BI__builtin_neon_vcvtmq_s64_v: 3080 case NEON::BI__builtin_neon_vcvtmq_u32_v: 3081 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 3082 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 3083 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, NameHint); 3084 } 3085 case NEON::BI__builtin_neon_vext_v: 3086 case NEON::BI__builtin_neon_vextq_v: { 3087 int CV = cast<ConstantInt>(Ops[2])->getSExtValue(); 3088 SmallVector<Constant*, 16> Indices; 3089 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 3090 Indices.push_back(ConstantInt::get(Int32Ty, i+CV)); 3091 3092 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3093 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3094 Value *SV = llvm::ConstantVector::get(Indices); 3095 return Builder.CreateShuffleVector(Ops[0], Ops[1], SV, "vext"); 3096 } 3097 case NEON::BI__builtin_neon_vfma_v: 3098 case NEON::BI__builtin_neon_vfmaq_v: { 3099 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 3100 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3101 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3102 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3103 3104 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 3105 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 3106 } 3107 case NEON::BI__builtin_neon_vld1_v: 3108 case NEON::BI__builtin_neon_vld1q_v: { 3109 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3110 Ops.push_back(getAlignmentValue32(PtrOp0)); 3111 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, "vld1"); 3112 } 3113 case NEON::BI__builtin_neon_vld2_v: 3114 case NEON::BI__builtin_neon_vld2q_v: 3115 case NEON::BI__builtin_neon_vld3_v: 3116 case NEON::BI__builtin_neon_vld3q_v: 3117 case NEON::BI__builtin_neon_vld4_v: 3118 case NEON::BI__builtin_neon_vld4q_v: { 3119 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3120 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3121 Value *Align = getAlignmentValue32(PtrOp1); 3122 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint); 3123 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3124 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3125 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3126 } 3127 case NEON::BI__builtin_neon_vld1_dup_v: 3128 case NEON::BI__builtin_neon_vld1q_dup_v: { 3129 Value *V = UndefValue::get(Ty); 3130 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 3131 PtrOp0 = Builder.CreateBitCast(PtrOp0, Ty); 3132 LoadInst *Ld = Builder.CreateLoad(PtrOp0); 3133 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 3134 Ops[0] = Builder.CreateInsertElement(V, Ld, CI); 3135 return EmitNeonSplat(Ops[0], CI); 3136 } 3137 case NEON::BI__builtin_neon_vld2_lane_v: 3138 case NEON::BI__builtin_neon_vld2q_lane_v: 3139 case NEON::BI__builtin_neon_vld3_lane_v: 3140 case NEON::BI__builtin_neon_vld3q_lane_v: 3141 case NEON::BI__builtin_neon_vld4_lane_v: 3142 case NEON::BI__builtin_neon_vld4q_lane_v: { 3143 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3144 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3145 for (unsigned I = 2; I < Ops.size() - 1; ++I) 3146 Ops[I] = Builder.CreateBitCast(Ops[I], Ty); 3147 Ops.push_back(getAlignmentValue32(PtrOp1)); 3148 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), NameHint); 3149 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3150 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3151 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3152 } 3153 case NEON::BI__builtin_neon_vmovl_v: { 3154 llvm::Type *DTy =llvm::VectorType::getTruncatedElementVectorType(VTy); 3155 Ops[0] = Builder.CreateBitCast(Ops[0], DTy); 3156 if (Usgn) 3157 return Builder.CreateZExt(Ops[0], Ty, "vmovl"); 3158 return Builder.CreateSExt(Ops[0], Ty, "vmovl"); 3159 } 3160 case NEON::BI__builtin_neon_vmovn_v: { 3161 llvm::Type *QTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3162 Ops[0] = Builder.CreateBitCast(Ops[0], QTy); 3163 return Builder.CreateTrunc(Ops[0], Ty, "vmovn"); 3164 } 3165 case NEON::BI__builtin_neon_vmull_v: 3166 // FIXME: the integer vmull operations could be emitted in terms of pure 3167 // LLVM IR (2 exts followed by a mul). Unfortunately LLVM has a habit of 3168 // hoisting the exts outside loops. Until global ISel comes along that can 3169 // see through such movement this leads to bad CodeGen. So we need an 3170 // intrinsic for now. 3171 Int = Usgn ? Intrinsic::arm_neon_vmullu : Intrinsic::arm_neon_vmulls; 3172 Int = Type.isPoly() ? (unsigned)Intrinsic::arm_neon_vmullp : Int; 3173 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 3174 case NEON::BI__builtin_neon_vpadal_v: 3175 case NEON::BI__builtin_neon_vpadalq_v: { 3176 // The source operand type has twice as many elements of half the size. 3177 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3178 llvm::Type *EltTy = 3179 llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3180 llvm::Type *NarrowTy = 3181 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3182 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3183 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, NameHint); 3184 } 3185 case NEON::BI__builtin_neon_vpaddl_v: 3186 case NEON::BI__builtin_neon_vpaddlq_v: { 3187 // The source operand type has twice as many elements of half the size. 3188 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3189 llvm::Type *EltTy = llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3190 llvm::Type *NarrowTy = 3191 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3192 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3193 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vpaddl"); 3194 } 3195 case NEON::BI__builtin_neon_vqdmlal_v: 3196 case NEON::BI__builtin_neon_vqdmlsl_v: { 3197 SmallVector<Value *, 2> MulOps(Ops.begin() + 1, Ops.end()); 3198 Ops[1] = 3199 EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), MulOps, "vqdmlal"); 3200 Ops.resize(2); 3201 return EmitNeonCall(CGM.getIntrinsic(AltLLVMIntrinsic, Ty), Ops, NameHint); 3202 } 3203 case NEON::BI__builtin_neon_vqshl_n_v: 3204 case NEON::BI__builtin_neon_vqshlq_n_v: 3205 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshl_n", 3206 1, false); 3207 case NEON::BI__builtin_neon_vqshlu_n_v: 3208 case NEON::BI__builtin_neon_vqshluq_n_v: 3209 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshlu_n", 3210 1, false); 3211 case NEON::BI__builtin_neon_vrecpe_v: 3212 case NEON::BI__builtin_neon_vrecpeq_v: 3213 case NEON::BI__builtin_neon_vrsqrte_v: 3214 case NEON::BI__builtin_neon_vrsqrteq_v: 3215 Int = Ty->isFPOrFPVectorTy() ? LLVMIntrinsic : AltLLVMIntrinsic; 3216 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint); 3217 3218 case NEON::BI__builtin_neon_vrshr_n_v: 3219 case NEON::BI__builtin_neon_vrshrq_n_v: 3220 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n", 3221 1, true); 3222 case NEON::BI__builtin_neon_vshl_n_v: 3223 case NEON::BI__builtin_neon_vshlq_n_v: 3224 Ops[1] = EmitNeonShiftVector(Ops[1], Ty, false); 3225 return Builder.CreateShl(Builder.CreateBitCast(Ops[0],Ty), Ops[1], 3226 "vshl_n"); 3227 case NEON::BI__builtin_neon_vshll_n_v: { 3228 llvm::Type *SrcTy = llvm::VectorType::getTruncatedElementVectorType(VTy); 3229 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3230 if (Usgn) 3231 Ops[0] = Builder.CreateZExt(Ops[0], VTy); 3232 else 3233 Ops[0] = Builder.CreateSExt(Ops[0], VTy); 3234 Ops[1] = EmitNeonShiftVector(Ops[1], VTy, false); 3235 return Builder.CreateShl(Ops[0], Ops[1], "vshll_n"); 3236 } 3237 case NEON::BI__builtin_neon_vshrn_n_v: { 3238 llvm::Type *SrcTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3239 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3240 Ops[1] = EmitNeonShiftVector(Ops[1], SrcTy, false); 3241 if (Usgn) 3242 Ops[0] = Builder.CreateLShr(Ops[0], Ops[1]); 3243 else 3244 Ops[0] = Builder.CreateAShr(Ops[0], Ops[1]); 3245 return Builder.CreateTrunc(Ops[0], Ty, "vshrn_n"); 3246 } 3247 case NEON::BI__builtin_neon_vshr_n_v: 3248 case NEON::BI__builtin_neon_vshrq_n_v: 3249 return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, Usgn, "vshr_n"); 3250 case NEON::BI__builtin_neon_vst1_v: 3251 case NEON::BI__builtin_neon_vst1q_v: 3252 case NEON::BI__builtin_neon_vst2_v: 3253 case NEON::BI__builtin_neon_vst2q_v: 3254 case NEON::BI__builtin_neon_vst3_v: 3255 case NEON::BI__builtin_neon_vst3q_v: 3256 case NEON::BI__builtin_neon_vst4_v: 3257 case NEON::BI__builtin_neon_vst4q_v: 3258 case NEON::BI__builtin_neon_vst2_lane_v: 3259 case NEON::BI__builtin_neon_vst2q_lane_v: 3260 case NEON::BI__builtin_neon_vst3_lane_v: 3261 case NEON::BI__builtin_neon_vst3q_lane_v: 3262 case NEON::BI__builtin_neon_vst4_lane_v: 3263 case NEON::BI__builtin_neon_vst4q_lane_v: { 3264 llvm::Type *Tys[] = {Int8PtrTy, Ty}; 3265 Ops.push_back(getAlignmentValue32(PtrOp0)); 3266 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 3267 } 3268 case NEON::BI__builtin_neon_vsubhn_v: { 3269 llvm::VectorType *SrcTy = 3270 llvm::VectorType::getExtendedElementVectorType(VTy); 3271 3272 // %sum = add <4 x i32> %lhs, %rhs 3273 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3274 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 3275 Ops[0] = Builder.CreateSub(Ops[0], Ops[1], "vsubhn"); 3276 3277 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 3278 Constant *ShiftAmt = 3279 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 3280 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vsubhn"); 3281 3282 // %res = trunc <4 x i32> %high to <4 x i16> 3283 return Builder.CreateTrunc(Ops[0], VTy, "vsubhn"); 3284 } 3285 case NEON::BI__builtin_neon_vtrn_v: 3286 case NEON::BI__builtin_neon_vtrnq_v: { 3287 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3288 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3289 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3290 Value *SV = nullptr; 3291 3292 for (unsigned vi = 0; vi != 2; ++vi) { 3293 SmallVector<Constant*, 16> Indices; 3294 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 3295 Indices.push_back(Builder.getInt32(i+vi)); 3296 Indices.push_back(Builder.getInt32(i+e+vi)); 3297 } 3298 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3299 SV = llvm::ConstantVector::get(Indices); 3300 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vtrn"); 3301 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3302 } 3303 return SV; 3304 } 3305 case NEON::BI__builtin_neon_vtst_v: 3306 case NEON::BI__builtin_neon_vtstq_v: { 3307 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3308 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3309 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 3310 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 3311 ConstantAggregateZero::get(Ty)); 3312 return Builder.CreateSExt(Ops[0], Ty, "vtst"); 3313 } 3314 case NEON::BI__builtin_neon_vuzp_v: 3315 case NEON::BI__builtin_neon_vuzpq_v: { 3316 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3317 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3318 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3319 Value *SV = nullptr; 3320 3321 for (unsigned vi = 0; vi != 2; ++vi) { 3322 SmallVector<Constant*, 16> Indices; 3323 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 3324 Indices.push_back(ConstantInt::get(Int32Ty, 2*i+vi)); 3325 3326 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3327 SV = llvm::ConstantVector::get(Indices); 3328 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vuzp"); 3329 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3330 } 3331 return SV; 3332 } 3333 case NEON::BI__builtin_neon_vzip_v: 3334 case NEON::BI__builtin_neon_vzipq_v: { 3335 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3336 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3337 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3338 Value *SV = nullptr; 3339 3340 for (unsigned vi = 0; vi != 2; ++vi) { 3341 SmallVector<Constant*, 16> Indices; 3342 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 3343 Indices.push_back(ConstantInt::get(Int32Ty, (i + vi*e) >> 1)); 3344 Indices.push_back(ConstantInt::get(Int32Ty, ((i + vi*e) >> 1)+e)); 3345 } 3346 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3347 SV = llvm::ConstantVector::get(Indices); 3348 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vzip"); 3349 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3350 } 3351 return SV; 3352 } 3353 } 3354 3355 assert(Int && "Expected valid intrinsic number"); 3356 3357 // Determine the type(s) of this overloaded AArch64 intrinsic. 3358 Function *F = LookupNeonLLVMIntrinsic(Int, Modifier, Ty, E); 3359 3360 Value *Result = EmitNeonCall(F, Ops, NameHint); 3361 llvm::Type *ResultType = ConvertType(E->getType()); 3362 // AArch64 intrinsic one-element vector type cast to 3363 // scalar type expected by the builtin 3364 return Builder.CreateBitCast(Result, ResultType, NameHint); 3365 } 3366 3367 Value *CodeGenFunction::EmitAArch64CompareBuiltinExpr( 3368 Value *Op, llvm::Type *Ty, const CmpInst::Predicate Fp, 3369 const CmpInst::Predicate Ip, const Twine &Name) { 3370 llvm::Type *OTy = Op->getType(); 3371 3372 // FIXME: this is utterly horrific. We should not be looking at previous 3373 // codegen context to find out what needs doing. Unfortunately TableGen 3374 // currently gives us exactly the same calls for vceqz_f32 and vceqz_s32 3375 // (etc). 3376 if (BitCastInst *BI = dyn_cast<BitCastInst>(Op)) 3377 OTy = BI->getOperand(0)->getType(); 3378 3379 Op = Builder.CreateBitCast(Op, OTy); 3380 if (OTy->getScalarType()->isFloatingPointTy()) { 3381 Op = Builder.CreateFCmp(Fp, Op, Constant::getNullValue(OTy)); 3382 } else { 3383 Op = Builder.CreateICmp(Ip, Op, Constant::getNullValue(OTy)); 3384 } 3385 return Builder.CreateSExt(Op, Ty, Name); 3386 } 3387 3388 static Value *packTBLDVectorList(CodeGenFunction &CGF, ArrayRef<Value *> Ops, 3389 Value *ExtOp, Value *IndexOp, 3390 llvm::Type *ResTy, unsigned IntID, 3391 const char *Name) { 3392 SmallVector<Value *, 2> TblOps; 3393 if (ExtOp) 3394 TblOps.push_back(ExtOp); 3395 3396 // Build a vector containing sequential number like (0, 1, 2, ..., 15) 3397 SmallVector<Constant*, 16> Indices; 3398 llvm::VectorType *TblTy = cast<llvm::VectorType>(Ops[0]->getType()); 3399 for (unsigned i = 0, e = TblTy->getNumElements(); i != e; ++i) { 3400 Indices.push_back(ConstantInt::get(CGF.Int32Ty, 2*i)); 3401 Indices.push_back(ConstantInt::get(CGF.Int32Ty, 2*i+1)); 3402 } 3403 Value *SV = llvm::ConstantVector::get(Indices); 3404 3405 int PairPos = 0, End = Ops.size() - 1; 3406 while (PairPos < End) { 3407 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 3408 Ops[PairPos+1], SV, Name)); 3409 PairPos += 2; 3410 } 3411 3412 // If there's an odd number of 64-bit lookup table, fill the high 64-bit 3413 // of the 128-bit lookup table with zero. 3414 if (PairPos == End) { 3415 Value *ZeroTbl = ConstantAggregateZero::get(TblTy); 3416 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 3417 ZeroTbl, SV, Name)); 3418 } 3419 3420 Function *TblF; 3421 TblOps.push_back(IndexOp); 3422 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); 3423 3424 return CGF.EmitNeonCall(TblF, TblOps, Name); 3425 } 3426 3427 Value *CodeGenFunction::GetValueForARMHint(unsigned BuiltinID) { 3428 unsigned Value; 3429 switch (BuiltinID) { 3430 default: 3431 return nullptr; 3432 case ARM::BI__builtin_arm_nop: 3433 Value = 0; 3434 break; 3435 case ARM::BI__builtin_arm_yield: 3436 case ARM::BI__yield: 3437 Value = 1; 3438 break; 3439 case ARM::BI__builtin_arm_wfe: 3440 case ARM::BI__wfe: 3441 Value = 2; 3442 break; 3443 case ARM::BI__builtin_arm_wfi: 3444 case ARM::BI__wfi: 3445 Value = 3; 3446 break; 3447 case ARM::BI__builtin_arm_sev: 3448 case ARM::BI__sev: 3449 Value = 4; 3450 break; 3451 case ARM::BI__builtin_arm_sevl: 3452 case ARM::BI__sevl: 3453 Value = 5; 3454 break; 3455 } 3456 3457 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_hint), 3458 llvm::ConstantInt::get(Int32Ty, Value)); 3459 } 3460 3461 // Generates the IR for the read/write special register builtin, 3462 // ValueType is the type of the value that is to be written or read, 3463 // RegisterType is the type of the register being written to or read from. 3464 static Value *EmitSpecialRegisterBuiltin(CodeGenFunction &CGF, 3465 const CallExpr *E, 3466 llvm::Type *RegisterType, 3467 llvm::Type *ValueType, bool IsRead) { 3468 // write and register intrinsics only support 32 and 64 bit operations. 3469 assert((RegisterType->isIntegerTy(32) || RegisterType->isIntegerTy(64)) 3470 && "Unsupported size for register."); 3471 3472 CodeGen::CGBuilderTy &Builder = CGF.Builder; 3473 CodeGen::CodeGenModule &CGM = CGF.CGM; 3474 LLVMContext &Context = CGM.getLLVMContext(); 3475 3476 const Expr *SysRegStrExpr = E->getArg(0)->IgnoreParenCasts(); 3477 StringRef SysReg = cast<StringLiteral>(SysRegStrExpr)->getString(); 3478 3479 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysReg) }; 3480 llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); 3481 llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); 3482 3483 llvm::Type *Types[] = { RegisterType }; 3484 3485 bool MixedTypes = RegisterType->isIntegerTy(64) && ValueType->isIntegerTy(32); 3486 assert(!(RegisterType->isIntegerTy(32) && ValueType->isIntegerTy(64)) 3487 && "Can't fit 64-bit value in 32-bit register"); 3488 3489 if (IsRead) { 3490 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::read_register, Types); 3491 llvm::Value *Call = Builder.CreateCall(F, Metadata); 3492 3493 if (MixedTypes) 3494 // Read into 64 bit register and then truncate result to 32 bit. 3495 return Builder.CreateTrunc(Call, ValueType); 3496 3497 if (ValueType->isPointerTy()) 3498 // Have i32/i64 result (Call) but want to return a VoidPtrTy (i8*). 3499 return Builder.CreateIntToPtr(Call, ValueType); 3500 3501 return Call; 3502 } 3503 3504 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types); 3505 llvm::Value *ArgValue = CGF.EmitScalarExpr(E->getArg(1)); 3506 if (MixedTypes) { 3507 // Extend 32 bit write value to 64 bit to pass to write. 3508 ArgValue = Builder.CreateZExt(ArgValue, RegisterType); 3509 return Builder.CreateCall(F, { Metadata, ArgValue }); 3510 } 3511 3512 if (ValueType->isPointerTy()) { 3513 // Have VoidPtrTy ArgValue but want to return an i32/i64. 3514 ArgValue = Builder.CreatePtrToInt(ArgValue, RegisterType); 3515 return Builder.CreateCall(F, { Metadata, ArgValue }); 3516 } 3517 3518 return Builder.CreateCall(F, { Metadata, ArgValue }); 3519 } 3520 3521 /// Return true if BuiltinID is an overloaded Neon intrinsic with an extra 3522 /// argument that specifies the vector type. 3523 static bool HasExtraNeonArgument(unsigned BuiltinID) { 3524 switch (BuiltinID) { 3525 default: break; 3526 case NEON::BI__builtin_neon_vget_lane_i8: 3527 case NEON::BI__builtin_neon_vget_lane_i16: 3528 case NEON::BI__builtin_neon_vget_lane_i32: 3529 case NEON::BI__builtin_neon_vget_lane_i64: 3530 case NEON::BI__builtin_neon_vget_lane_f32: 3531 case NEON::BI__builtin_neon_vgetq_lane_i8: 3532 case NEON::BI__builtin_neon_vgetq_lane_i16: 3533 case NEON::BI__builtin_neon_vgetq_lane_i32: 3534 case NEON::BI__builtin_neon_vgetq_lane_i64: 3535 case NEON::BI__builtin_neon_vgetq_lane_f32: 3536 case NEON::BI__builtin_neon_vset_lane_i8: 3537 case NEON::BI__builtin_neon_vset_lane_i16: 3538 case NEON::BI__builtin_neon_vset_lane_i32: 3539 case NEON::BI__builtin_neon_vset_lane_i64: 3540 case NEON::BI__builtin_neon_vset_lane_f32: 3541 case NEON::BI__builtin_neon_vsetq_lane_i8: 3542 case NEON::BI__builtin_neon_vsetq_lane_i16: 3543 case NEON::BI__builtin_neon_vsetq_lane_i32: 3544 case NEON::BI__builtin_neon_vsetq_lane_i64: 3545 case NEON::BI__builtin_neon_vsetq_lane_f32: 3546 case NEON::BI__builtin_neon_vsha1h_u32: 3547 case NEON::BI__builtin_neon_vsha1cq_u32: 3548 case NEON::BI__builtin_neon_vsha1pq_u32: 3549 case NEON::BI__builtin_neon_vsha1mq_u32: 3550 case ARM::BI_MoveToCoprocessor: 3551 case ARM::BI_MoveToCoprocessor2: 3552 return false; 3553 } 3554 return true; 3555 } 3556 3557 Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, 3558 const CallExpr *E) { 3559 if (auto Hint = GetValueForARMHint(BuiltinID)) 3560 return Hint; 3561 3562 if (BuiltinID == ARM::BI__emit) { 3563 bool IsThumb = getTarget().getTriple().getArch() == llvm::Triple::thumb; 3564 llvm::FunctionType *FTy = 3565 llvm::FunctionType::get(VoidTy, /*Variadic=*/false); 3566 3567 APSInt Value; 3568 if (!E->getArg(0)->EvaluateAsInt(Value, CGM.getContext())) 3569 llvm_unreachable("Sema will ensure that the parameter is constant"); 3570 3571 uint64_t ZExtValue = Value.zextOrTrunc(IsThumb ? 16 : 32).getZExtValue(); 3572 3573 llvm::InlineAsm *Emit = 3574 IsThumb ? InlineAsm::get(FTy, ".inst.n 0x" + utohexstr(ZExtValue), "", 3575 /*SideEffects=*/true) 3576 : InlineAsm::get(FTy, ".inst 0x" + utohexstr(ZExtValue), "", 3577 /*SideEffects=*/true); 3578 3579 return Builder.CreateCall(Emit); 3580 } 3581 3582 if (BuiltinID == ARM::BI__builtin_arm_dbg) { 3583 Value *Option = EmitScalarExpr(E->getArg(0)); 3584 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_dbg), Option); 3585 } 3586 3587 if (BuiltinID == ARM::BI__builtin_arm_prefetch) { 3588 Value *Address = EmitScalarExpr(E->getArg(0)); 3589 Value *RW = EmitScalarExpr(E->getArg(1)); 3590 Value *IsData = EmitScalarExpr(E->getArg(2)); 3591 3592 // Locality is not supported on ARM target 3593 Value *Locality = llvm::ConstantInt::get(Int32Ty, 3); 3594 3595 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 3596 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 3597 } 3598 3599 if (BuiltinID == ARM::BI__builtin_arm_rbit) { 3600 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_rbit), 3601 EmitScalarExpr(E->getArg(0)), 3602 "rbit"); 3603 } 3604 3605 if (BuiltinID == ARM::BI__clear_cache) { 3606 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 3607 const FunctionDecl *FD = E->getDirectCallee(); 3608 Value *Ops[2]; 3609 for (unsigned i = 0; i < 2; i++) 3610 Ops[i] = EmitScalarExpr(E->getArg(i)); 3611 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 3612 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 3613 StringRef Name = FD->getName(); 3614 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 3615 } 3616 3617 if (BuiltinID == ARM::BI__builtin_arm_ldrexd || 3618 ((BuiltinID == ARM::BI__builtin_arm_ldrex || 3619 BuiltinID == ARM::BI__builtin_arm_ldaex) && 3620 getContext().getTypeSize(E->getType()) == 64) || 3621 BuiltinID == ARM::BI__ldrexd) { 3622 Function *F; 3623 3624 switch (BuiltinID) { 3625 default: llvm_unreachable("unexpected builtin"); 3626 case ARM::BI__builtin_arm_ldaex: 3627 F = CGM.getIntrinsic(Intrinsic::arm_ldaexd); 3628 break; 3629 case ARM::BI__builtin_arm_ldrexd: 3630 case ARM::BI__builtin_arm_ldrex: 3631 case ARM::BI__ldrexd: 3632 F = CGM.getIntrinsic(Intrinsic::arm_ldrexd); 3633 break; 3634 } 3635 3636 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 3637 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 3638 "ldrexd"); 3639 3640 Value *Val0 = Builder.CreateExtractValue(Val, 1); 3641 Value *Val1 = Builder.CreateExtractValue(Val, 0); 3642 Val0 = Builder.CreateZExt(Val0, Int64Ty); 3643 Val1 = Builder.CreateZExt(Val1, Int64Ty); 3644 3645 Value *ShiftCst = llvm::ConstantInt::get(Int64Ty, 32); 3646 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 3647 Val = Builder.CreateOr(Val, Val1); 3648 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 3649 } 3650 3651 if (BuiltinID == ARM::BI__builtin_arm_ldrex || 3652 BuiltinID == ARM::BI__builtin_arm_ldaex) { 3653 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 3654 3655 QualType Ty = E->getType(); 3656 llvm::Type *RealResTy = ConvertType(Ty); 3657 llvm::Type *IntResTy = llvm::IntegerType::get(getLLVMContext(), 3658 getContext().getTypeSize(Ty)); 3659 LoadAddr = Builder.CreateBitCast(LoadAddr, IntResTy->getPointerTo()); 3660 3661 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_ldaex 3662 ? Intrinsic::arm_ldaex 3663 : Intrinsic::arm_ldrex, 3664 LoadAddr->getType()); 3665 Value *Val = Builder.CreateCall(F, LoadAddr, "ldrex"); 3666 3667 if (RealResTy->isPointerTy()) 3668 return Builder.CreateIntToPtr(Val, RealResTy); 3669 else { 3670 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 3671 return Builder.CreateBitCast(Val, RealResTy); 3672 } 3673 } 3674 3675 if (BuiltinID == ARM::BI__builtin_arm_strexd || 3676 ((BuiltinID == ARM::BI__builtin_arm_stlex || 3677 BuiltinID == ARM::BI__builtin_arm_strex) && 3678 getContext().getTypeSize(E->getArg(0)->getType()) == 64)) { 3679 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 3680 ? Intrinsic::arm_stlexd 3681 : Intrinsic::arm_strexd); 3682 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, nullptr); 3683 3684 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 3685 Value *Val = EmitScalarExpr(E->getArg(0)); 3686 Builder.CreateStore(Val, Tmp); 3687 3688 Address LdPtr = Builder.CreateBitCast(Tmp,llvm::PointerType::getUnqual(STy)); 3689 Val = Builder.CreateLoad(LdPtr); 3690 3691 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 3692 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 3693 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), Int8PtrTy); 3694 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "strexd"); 3695 } 3696 3697 if (BuiltinID == ARM::BI__builtin_arm_strex || 3698 BuiltinID == ARM::BI__builtin_arm_stlex) { 3699 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 3700 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 3701 3702 QualType Ty = E->getArg(0)->getType(); 3703 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 3704 getContext().getTypeSize(Ty)); 3705 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 3706 3707 if (StoreVal->getType()->isPointerTy()) 3708 StoreVal = Builder.CreatePtrToInt(StoreVal, Int32Ty); 3709 else { 3710 StoreVal = Builder.CreateBitCast(StoreVal, StoreTy); 3711 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int32Ty); 3712 } 3713 3714 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 3715 ? Intrinsic::arm_stlex 3716 : Intrinsic::arm_strex, 3717 StoreAddr->getType()); 3718 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "strex"); 3719 } 3720 3721 if (BuiltinID == ARM::BI__builtin_arm_clrex) { 3722 Function *F = CGM.getIntrinsic(Intrinsic::arm_clrex); 3723 return Builder.CreateCall(F); 3724 } 3725 3726 // CRC32 3727 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 3728 switch (BuiltinID) { 3729 case ARM::BI__builtin_arm_crc32b: 3730 CRCIntrinsicID = Intrinsic::arm_crc32b; break; 3731 case ARM::BI__builtin_arm_crc32cb: 3732 CRCIntrinsicID = Intrinsic::arm_crc32cb; break; 3733 case ARM::BI__builtin_arm_crc32h: 3734 CRCIntrinsicID = Intrinsic::arm_crc32h; break; 3735 case ARM::BI__builtin_arm_crc32ch: 3736 CRCIntrinsicID = Intrinsic::arm_crc32ch; break; 3737 case ARM::BI__builtin_arm_crc32w: 3738 case ARM::BI__builtin_arm_crc32d: 3739 CRCIntrinsicID = Intrinsic::arm_crc32w; break; 3740 case ARM::BI__builtin_arm_crc32cw: 3741 case ARM::BI__builtin_arm_crc32cd: 3742 CRCIntrinsicID = Intrinsic::arm_crc32cw; break; 3743 } 3744 3745 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 3746 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 3747 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 3748 3749 // crc32{c,}d intrinsics are implemnted as two calls to crc32{c,}w 3750 // intrinsics, hence we need different codegen for these cases. 3751 if (BuiltinID == ARM::BI__builtin_arm_crc32d || 3752 BuiltinID == ARM::BI__builtin_arm_crc32cd) { 3753 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 3754 Value *Arg1a = Builder.CreateTruncOrBitCast(Arg1, Int32Ty); 3755 Value *Arg1b = Builder.CreateLShr(Arg1, C1); 3756 Arg1b = Builder.CreateTruncOrBitCast(Arg1b, Int32Ty); 3757 3758 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 3759 Value *Res = Builder.CreateCall(F, {Arg0, Arg1a}); 3760 return Builder.CreateCall(F, {Res, Arg1b}); 3761 } else { 3762 Arg1 = Builder.CreateZExtOrBitCast(Arg1, Int32Ty); 3763 3764 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 3765 return Builder.CreateCall(F, {Arg0, Arg1}); 3766 } 3767 } 3768 3769 if (BuiltinID == ARM::BI__builtin_arm_rsr || 3770 BuiltinID == ARM::BI__builtin_arm_rsr64 || 3771 BuiltinID == ARM::BI__builtin_arm_rsrp || 3772 BuiltinID == ARM::BI__builtin_arm_wsr || 3773 BuiltinID == ARM::BI__builtin_arm_wsr64 || 3774 BuiltinID == ARM::BI__builtin_arm_wsrp) { 3775 3776 bool IsRead = BuiltinID == ARM::BI__builtin_arm_rsr || 3777 BuiltinID == ARM::BI__builtin_arm_rsr64 || 3778 BuiltinID == ARM::BI__builtin_arm_rsrp; 3779 3780 bool IsPointerBuiltin = BuiltinID == ARM::BI__builtin_arm_rsrp || 3781 BuiltinID == ARM::BI__builtin_arm_wsrp; 3782 3783 bool Is64Bit = BuiltinID == ARM::BI__builtin_arm_rsr64 || 3784 BuiltinID == ARM::BI__builtin_arm_wsr64; 3785 3786 llvm::Type *ValueType; 3787 llvm::Type *RegisterType; 3788 if (IsPointerBuiltin) { 3789 ValueType = VoidPtrTy; 3790 RegisterType = Int32Ty; 3791 } else if (Is64Bit) { 3792 ValueType = RegisterType = Int64Ty; 3793 } else { 3794 ValueType = RegisterType = Int32Ty; 3795 } 3796 3797 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 3798 } 3799 3800 // Find out if any arguments are required to be integer constant 3801 // expressions. 3802 unsigned ICEArguments = 0; 3803 ASTContext::GetBuiltinTypeError Error; 3804 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 3805 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 3806 3807 auto getAlignmentValue32 = [&](Address addr) -> Value* { 3808 return Builder.getInt32(addr.getAlignment().getQuantity()); 3809 }; 3810 3811 Address PtrOp0 = Address::invalid(); 3812 Address PtrOp1 = Address::invalid(); 3813 SmallVector<Value*, 4> Ops; 3814 bool HasExtraArg = HasExtraNeonArgument(BuiltinID); 3815 unsigned NumArgs = E->getNumArgs() - (HasExtraArg ? 1 : 0); 3816 for (unsigned i = 0, e = NumArgs; i != e; i++) { 3817 if (i == 0) { 3818 switch (BuiltinID) { 3819 case NEON::BI__builtin_neon_vld1_v: 3820 case NEON::BI__builtin_neon_vld1q_v: 3821 case NEON::BI__builtin_neon_vld1q_lane_v: 3822 case NEON::BI__builtin_neon_vld1_lane_v: 3823 case NEON::BI__builtin_neon_vld1_dup_v: 3824 case NEON::BI__builtin_neon_vld1q_dup_v: 3825 case NEON::BI__builtin_neon_vst1_v: 3826 case NEON::BI__builtin_neon_vst1q_v: 3827 case NEON::BI__builtin_neon_vst1q_lane_v: 3828 case NEON::BI__builtin_neon_vst1_lane_v: 3829 case NEON::BI__builtin_neon_vst2_v: 3830 case NEON::BI__builtin_neon_vst2q_v: 3831 case NEON::BI__builtin_neon_vst2_lane_v: 3832 case NEON::BI__builtin_neon_vst2q_lane_v: 3833 case NEON::BI__builtin_neon_vst3_v: 3834 case NEON::BI__builtin_neon_vst3q_v: 3835 case NEON::BI__builtin_neon_vst3_lane_v: 3836 case NEON::BI__builtin_neon_vst3q_lane_v: 3837 case NEON::BI__builtin_neon_vst4_v: 3838 case NEON::BI__builtin_neon_vst4q_v: 3839 case NEON::BI__builtin_neon_vst4_lane_v: 3840 case NEON::BI__builtin_neon_vst4q_lane_v: 3841 // Get the alignment for the argument in addition to the value; 3842 // we'll use it later. 3843 PtrOp0 = EmitPointerWithAlignment(E->getArg(0)); 3844 Ops.push_back(PtrOp0.getPointer()); 3845 continue; 3846 } 3847 } 3848 if (i == 1) { 3849 switch (BuiltinID) { 3850 case NEON::BI__builtin_neon_vld2_v: 3851 case NEON::BI__builtin_neon_vld2q_v: 3852 case NEON::BI__builtin_neon_vld3_v: 3853 case NEON::BI__builtin_neon_vld3q_v: 3854 case NEON::BI__builtin_neon_vld4_v: 3855 case NEON::BI__builtin_neon_vld4q_v: 3856 case NEON::BI__builtin_neon_vld2_lane_v: 3857 case NEON::BI__builtin_neon_vld2q_lane_v: 3858 case NEON::BI__builtin_neon_vld3_lane_v: 3859 case NEON::BI__builtin_neon_vld3q_lane_v: 3860 case NEON::BI__builtin_neon_vld4_lane_v: 3861 case NEON::BI__builtin_neon_vld4q_lane_v: 3862 case NEON::BI__builtin_neon_vld2_dup_v: 3863 case NEON::BI__builtin_neon_vld3_dup_v: 3864 case NEON::BI__builtin_neon_vld4_dup_v: 3865 // Get the alignment for the argument in addition to the value; 3866 // we'll use it later. 3867 PtrOp1 = EmitPointerWithAlignment(E->getArg(1)); 3868 Ops.push_back(PtrOp1.getPointer()); 3869 continue; 3870 } 3871 } 3872 3873 if ((ICEArguments & (1 << i)) == 0) { 3874 Ops.push_back(EmitScalarExpr(E->getArg(i))); 3875 } else { 3876 // If this is required to be a constant, constant fold it so that we know 3877 // that the generated intrinsic gets a ConstantInt. 3878 llvm::APSInt Result; 3879 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 3880 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 3881 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 3882 } 3883 } 3884 3885 switch (BuiltinID) { 3886 default: break; 3887 3888 case NEON::BI__builtin_neon_vget_lane_i8: 3889 case NEON::BI__builtin_neon_vget_lane_i16: 3890 case NEON::BI__builtin_neon_vget_lane_i32: 3891 case NEON::BI__builtin_neon_vget_lane_i64: 3892 case NEON::BI__builtin_neon_vget_lane_f32: 3893 case NEON::BI__builtin_neon_vgetq_lane_i8: 3894 case NEON::BI__builtin_neon_vgetq_lane_i16: 3895 case NEON::BI__builtin_neon_vgetq_lane_i32: 3896 case NEON::BI__builtin_neon_vgetq_lane_i64: 3897 case NEON::BI__builtin_neon_vgetq_lane_f32: 3898 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane"); 3899 3900 case NEON::BI__builtin_neon_vset_lane_i8: 3901 case NEON::BI__builtin_neon_vset_lane_i16: 3902 case NEON::BI__builtin_neon_vset_lane_i32: 3903 case NEON::BI__builtin_neon_vset_lane_i64: 3904 case NEON::BI__builtin_neon_vset_lane_f32: 3905 case NEON::BI__builtin_neon_vsetq_lane_i8: 3906 case NEON::BI__builtin_neon_vsetq_lane_i16: 3907 case NEON::BI__builtin_neon_vsetq_lane_i32: 3908 case NEON::BI__builtin_neon_vsetq_lane_i64: 3909 case NEON::BI__builtin_neon_vsetq_lane_f32: 3910 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 3911 3912 case NEON::BI__builtin_neon_vsha1h_u32: 3913 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1h), Ops, 3914 "vsha1h"); 3915 case NEON::BI__builtin_neon_vsha1cq_u32: 3916 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1c), Ops, 3917 "vsha1h"); 3918 case NEON::BI__builtin_neon_vsha1pq_u32: 3919 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1p), Ops, 3920 "vsha1h"); 3921 case NEON::BI__builtin_neon_vsha1mq_u32: 3922 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1m), Ops, 3923 "vsha1h"); 3924 3925 // The ARM _MoveToCoprocessor builtins put the input register value as 3926 // the first argument, but the LLVM intrinsic expects it as the third one. 3927 case ARM::BI_MoveToCoprocessor: 3928 case ARM::BI_MoveToCoprocessor2: { 3929 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI_MoveToCoprocessor ? 3930 Intrinsic::arm_mcr : Intrinsic::arm_mcr2); 3931 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0], 3932 Ops[3], Ops[4], Ops[5]}); 3933 } 3934 } 3935 3936 // Get the last argument, which specifies the vector type. 3937 assert(HasExtraArg); 3938 llvm::APSInt Result; 3939 const Expr *Arg = E->getArg(E->getNumArgs()-1); 3940 if (!Arg->isIntegerConstantExpr(Result, getContext())) 3941 return nullptr; 3942 3943 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f || 3944 BuiltinID == ARM::BI__builtin_arm_vcvtr_d) { 3945 // Determine the overloaded type of this builtin. 3946 llvm::Type *Ty; 3947 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f) 3948 Ty = FloatTy; 3949 else 3950 Ty = DoubleTy; 3951 3952 // Determine whether this is an unsigned conversion or not. 3953 bool usgn = Result.getZExtValue() == 1; 3954 unsigned Int = usgn ? Intrinsic::arm_vcvtru : Intrinsic::arm_vcvtr; 3955 3956 // Call the appropriate intrinsic. 3957 Function *F = CGM.getIntrinsic(Int, Ty); 3958 return Builder.CreateCall(F, Ops, "vcvtr"); 3959 } 3960 3961 // Determine the type of this overloaded NEON intrinsic. 3962 NeonTypeFlags Type(Result.getZExtValue()); 3963 bool usgn = Type.isUnsigned(); 3964 bool rightShift = false; 3965 3966 llvm::VectorType *VTy = GetNeonType(this, Type); 3967 llvm::Type *Ty = VTy; 3968 if (!Ty) 3969 return nullptr; 3970 3971 // Many NEON builtins have identical semantics and uses in ARM and 3972 // AArch64. Emit these in a single function. 3973 auto IntrinsicMap = makeArrayRef(ARMSIMDIntrinsicMap); 3974 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 3975 IntrinsicMap, BuiltinID, NEONSIMDIntrinsicsProvenSorted); 3976 if (Builtin) 3977 return EmitCommonNeonBuiltinExpr( 3978 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 3979 Builtin->NameHint, Builtin->TypeModifier, E, Ops, PtrOp0, PtrOp1); 3980 3981 unsigned Int; 3982 switch (BuiltinID) { 3983 default: return nullptr; 3984 case NEON::BI__builtin_neon_vld1q_lane_v: 3985 // Handle 64-bit integer elements as a special case. Use shuffles of 3986 // one-element vectors to avoid poor code for i64 in the backend. 3987 if (VTy->getElementType()->isIntegerTy(64)) { 3988 // Extract the other lane. 3989 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3990 uint32_t Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); 3991 Value *SV = llvm::ConstantVector::get(ConstantInt::get(Int32Ty, 1-Lane)); 3992 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 3993 // Load the value as a one-element vector. 3994 Ty = llvm::VectorType::get(VTy->getElementType(), 1); 3995 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3996 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Tys); 3997 Value *Align = getAlignmentValue32(PtrOp0); 3998 Value *Ld = Builder.CreateCall(F, {Ops[0], Align}); 3999 // Combine them. 4000 uint32_t Indices[] = {1 - Lane, Lane}; 4001 SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 4002 return Builder.CreateShuffleVector(Ops[1], Ld, SV, "vld1q_lane"); 4003 } 4004 // fall through 4005 case NEON::BI__builtin_neon_vld1_lane_v: { 4006 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4007 PtrOp0 = Builder.CreateElementBitCast(PtrOp0, VTy->getElementType()); 4008 Value *Ld = Builder.CreateLoad(PtrOp0); 4009 return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); 4010 } 4011 case NEON::BI__builtin_neon_vld2_dup_v: 4012 case NEON::BI__builtin_neon_vld3_dup_v: 4013 case NEON::BI__builtin_neon_vld4_dup_v: { 4014 // Handle 64-bit elements as a special-case. There is no "dup" needed. 4015 if (VTy->getElementType()->getPrimitiveSizeInBits() == 64) { 4016 switch (BuiltinID) { 4017 case NEON::BI__builtin_neon_vld2_dup_v: 4018 Int = Intrinsic::arm_neon_vld2; 4019 break; 4020 case NEON::BI__builtin_neon_vld3_dup_v: 4021 Int = Intrinsic::arm_neon_vld3; 4022 break; 4023 case NEON::BI__builtin_neon_vld4_dup_v: 4024 Int = Intrinsic::arm_neon_vld4; 4025 break; 4026 default: llvm_unreachable("unknown vld_dup intrinsic?"); 4027 } 4028 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4029 Function *F = CGM.getIntrinsic(Int, Tys); 4030 llvm::Value *Align = getAlignmentValue32(PtrOp1); 4031 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, "vld_dup"); 4032 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4033 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4034 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4035 } 4036 switch (BuiltinID) { 4037 case NEON::BI__builtin_neon_vld2_dup_v: 4038 Int = Intrinsic::arm_neon_vld2lane; 4039 break; 4040 case NEON::BI__builtin_neon_vld3_dup_v: 4041 Int = Intrinsic::arm_neon_vld3lane; 4042 break; 4043 case NEON::BI__builtin_neon_vld4_dup_v: 4044 Int = Intrinsic::arm_neon_vld4lane; 4045 break; 4046 default: llvm_unreachable("unknown vld_dup intrinsic?"); 4047 } 4048 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4049 Function *F = CGM.getIntrinsic(Int, Tys); 4050 llvm::StructType *STy = cast<llvm::StructType>(F->getReturnType()); 4051 4052 SmallVector<Value*, 6> Args; 4053 Args.push_back(Ops[1]); 4054 Args.append(STy->getNumElements(), UndefValue::get(Ty)); 4055 4056 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 4057 Args.push_back(CI); 4058 Args.push_back(getAlignmentValue32(PtrOp1)); 4059 4060 Ops[1] = Builder.CreateCall(F, Args, "vld_dup"); 4061 // splat lane 0 to all elts in each vector of the result. 4062 for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { 4063 Value *Val = Builder.CreateExtractValue(Ops[1], i); 4064 Value *Elt = Builder.CreateBitCast(Val, Ty); 4065 Elt = EmitNeonSplat(Elt, CI); 4066 Elt = Builder.CreateBitCast(Elt, Val->getType()); 4067 Ops[1] = Builder.CreateInsertValue(Ops[1], Elt, i); 4068 } 4069 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4070 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4071 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4072 } 4073 case NEON::BI__builtin_neon_vqrshrn_n_v: 4074 Int = 4075 usgn ? Intrinsic::arm_neon_vqrshiftnu : Intrinsic::arm_neon_vqrshiftns; 4076 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n", 4077 1, true); 4078 case NEON::BI__builtin_neon_vqrshrun_n_v: 4079 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqrshiftnsu, Ty), 4080 Ops, "vqrshrun_n", 1, true); 4081 case NEON::BI__builtin_neon_vqshrn_n_v: 4082 Int = usgn ? Intrinsic::arm_neon_vqshiftnu : Intrinsic::arm_neon_vqshiftns; 4083 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n", 4084 1, true); 4085 case NEON::BI__builtin_neon_vqshrun_n_v: 4086 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqshiftnsu, Ty), 4087 Ops, "vqshrun_n", 1, true); 4088 case NEON::BI__builtin_neon_vrecpe_v: 4089 case NEON::BI__builtin_neon_vrecpeq_v: 4090 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecpe, Ty), 4091 Ops, "vrecpe"); 4092 case NEON::BI__builtin_neon_vrshrn_n_v: 4093 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrshiftn, Ty), 4094 Ops, "vrshrn_n", 1, true); 4095 case NEON::BI__builtin_neon_vrsra_n_v: 4096 case NEON::BI__builtin_neon_vrsraq_n_v: 4097 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4098 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4099 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, true); 4100 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 4101 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Ty), {Ops[1], Ops[2]}); 4102 return Builder.CreateAdd(Ops[0], Ops[1], "vrsra_n"); 4103 case NEON::BI__builtin_neon_vsri_n_v: 4104 case NEON::BI__builtin_neon_vsriq_n_v: 4105 rightShift = true; 4106 case NEON::BI__builtin_neon_vsli_n_v: 4107 case NEON::BI__builtin_neon_vsliq_n_v: 4108 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, rightShift); 4109 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vshiftins, Ty), 4110 Ops, "vsli_n"); 4111 case NEON::BI__builtin_neon_vsra_n_v: 4112 case NEON::BI__builtin_neon_vsraq_n_v: 4113 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4114 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 4115 return Builder.CreateAdd(Ops[0], Ops[1]); 4116 case NEON::BI__builtin_neon_vst1q_lane_v: 4117 // Handle 64-bit integer elements as a special case. Use a shuffle to get 4118 // a one-element vector and avoid poor code for i64 in the backend. 4119 if (VTy->getElementType()->isIntegerTy(64)) { 4120 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4121 Value *SV = llvm::ConstantVector::get(cast<llvm::Constant>(Ops[2])); 4122 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 4123 Ops[2] = getAlignmentValue32(PtrOp0); 4124 llvm::Type *Tys[] = {Int8PtrTy, Ops[1]->getType()}; 4125 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, 4126 Tys), Ops); 4127 } 4128 // fall through 4129 case NEON::BI__builtin_neon_vst1_lane_v: { 4130 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4131 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 4132 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4133 auto St = Builder.CreateStore(Ops[1], Builder.CreateBitCast(PtrOp0, Ty)); 4134 return St; 4135 } 4136 case NEON::BI__builtin_neon_vtbl1_v: 4137 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl1), 4138 Ops, "vtbl1"); 4139 case NEON::BI__builtin_neon_vtbl2_v: 4140 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl2), 4141 Ops, "vtbl2"); 4142 case NEON::BI__builtin_neon_vtbl3_v: 4143 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl3), 4144 Ops, "vtbl3"); 4145 case NEON::BI__builtin_neon_vtbl4_v: 4146 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl4), 4147 Ops, "vtbl4"); 4148 case NEON::BI__builtin_neon_vtbx1_v: 4149 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx1), 4150 Ops, "vtbx1"); 4151 case NEON::BI__builtin_neon_vtbx2_v: 4152 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx2), 4153 Ops, "vtbx2"); 4154 case NEON::BI__builtin_neon_vtbx3_v: 4155 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx3), 4156 Ops, "vtbx3"); 4157 case NEON::BI__builtin_neon_vtbx4_v: 4158 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx4), 4159 Ops, "vtbx4"); 4160 } 4161 } 4162 4163 static Value *EmitAArch64TblBuiltinExpr(CodeGenFunction &CGF, unsigned BuiltinID, 4164 const CallExpr *E, 4165 SmallVectorImpl<Value *> &Ops) { 4166 unsigned int Int = 0; 4167 const char *s = nullptr; 4168 4169 switch (BuiltinID) { 4170 default: 4171 return nullptr; 4172 case NEON::BI__builtin_neon_vtbl1_v: 4173 case NEON::BI__builtin_neon_vqtbl1_v: 4174 case NEON::BI__builtin_neon_vqtbl1q_v: 4175 case NEON::BI__builtin_neon_vtbl2_v: 4176 case NEON::BI__builtin_neon_vqtbl2_v: 4177 case NEON::BI__builtin_neon_vqtbl2q_v: 4178 case NEON::BI__builtin_neon_vtbl3_v: 4179 case NEON::BI__builtin_neon_vqtbl3_v: 4180 case NEON::BI__builtin_neon_vqtbl3q_v: 4181 case NEON::BI__builtin_neon_vtbl4_v: 4182 case NEON::BI__builtin_neon_vqtbl4_v: 4183 case NEON::BI__builtin_neon_vqtbl4q_v: 4184 break; 4185 case NEON::BI__builtin_neon_vtbx1_v: 4186 case NEON::BI__builtin_neon_vqtbx1_v: 4187 case NEON::BI__builtin_neon_vqtbx1q_v: 4188 case NEON::BI__builtin_neon_vtbx2_v: 4189 case NEON::BI__builtin_neon_vqtbx2_v: 4190 case NEON::BI__builtin_neon_vqtbx2q_v: 4191 case NEON::BI__builtin_neon_vtbx3_v: 4192 case NEON::BI__builtin_neon_vqtbx3_v: 4193 case NEON::BI__builtin_neon_vqtbx3q_v: 4194 case NEON::BI__builtin_neon_vtbx4_v: 4195 case NEON::BI__builtin_neon_vqtbx4_v: 4196 case NEON::BI__builtin_neon_vqtbx4q_v: 4197 break; 4198 } 4199 4200 assert(E->getNumArgs() >= 3); 4201 4202 // Get the last argument, which specifies the vector type. 4203 llvm::APSInt Result; 4204 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 4205 if (!Arg->isIntegerConstantExpr(Result, CGF.getContext())) 4206 return nullptr; 4207 4208 // Determine the type of this overloaded NEON intrinsic. 4209 NeonTypeFlags Type(Result.getZExtValue()); 4210 llvm::VectorType *Ty = GetNeonType(&CGF, Type); 4211 if (!Ty) 4212 return nullptr; 4213 4214 CodeGen::CGBuilderTy &Builder = CGF.Builder; 4215 4216 // AArch64 scalar builtins are not overloaded, they do not have an extra 4217 // argument that specifies the vector type, need to handle each case. 4218 switch (BuiltinID) { 4219 case NEON::BI__builtin_neon_vtbl1_v: { 4220 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 1), nullptr, 4221 Ops[1], Ty, Intrinsic::aarch64_neon_tbl1, 4222 "vtbl1"); 4223 } 4224 case NEON::BI__builtin_neon_vtbl2_v: { 4225 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 2), nullptr, 4226 Ops[2], Ty, Intrinsic::aarch64_neon_tbl1, 4227 "vtbl1"); 4228 } 4229 case NEON::BI__builtin_neon_vtbl3_v: { 4230 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 3), nullptr, 4231 Ops[3], Ty, Intrinsic::aarch64_neon_tbl2, 4232 "vtbl2"); 4233 } 4234 case NEON::BI__builtin_neon_vtbl4_v: { 4235 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 4), nullptr, 4236 Ops[4], Ty, Intrinsic::aarch64_neon_tbl2, 4237 "vtbl2"); 4238 } 4239 case NEON::BI__builtin_neon_vtbx1_v: { 4240 Value *TblRes = 4241 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 1), nullptr, Ops[2], 4242 Ty, Intrinsic::aarch64_neon_tbl1, "vtbl1"); 4243 4244 llvm::Constant *EightV = ConstantInt::get(Ty, 8); 4245 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[2], EightV); 4246 CmpRes = Builder.CreateSExt(CmpRes, Ty); 4247 4248 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 4249 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 4250 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 4251 } 4252 case NEON::BI__builtin_neon_vtbx2_v: { 4253 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 2), Ops[0], 4254 Ops[3], Ty, Intrinsic::aarch64_neon_tbx1, 4255 "vtbx1"); 4256 } 4257 case NEON::BI__builtin_neon_vtbx3_v: { 4258 Value *TblRes = 4259 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 3), nullptr, Ops[4], 4260 Ty, Intrinsic::aarch64_neon_tbl2, "vtbl2"); 4261 4262 llvm::Constant *TwentyFourV = ConstantInt::get(Ty, 24); 4263 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[4], 4264 TwentyFourV); 4265 CmpRes = Builder.CreateSExt(CmpRes, Ty); 4266 4267 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 4268 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 4269 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 4270 } 4271 case NEON::BI__builtin_neon_vtbx4_v: { 4272 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 4), Ops[0], 4273 Ops[5], Ty, Intrinsic::aarch64_neon_tbx2, 4274 "vtbx2"); 4275 } 4276 case NEON::BI__builtin_neon_vqtbl1_v: 4277 case NEON::BI__builtin_neon_vqtbl1q_v: 4278 Int = Intrinsic::aarch64_neon_tbl1; s = "vtbl1"; break; 4279 case NEON::BI__builtin_neon_vqtbl2_v: 4280 case NEON::BI__builtin_neon_vqtbl2q_v: { 4281 Int = Intrinsic::aarch64_neon_tbl2; s = "vtbl2"; break; 4282 case NEON::BI__builtin_neon_vqtbl3_v: 4283 case NEON::BI__builtin_neon_vqtbl3q_v: 4284 Int = Intrinsic::aarch64_neon_tbl3; s = "vtbl3"; break; 4285 case NEON::BI__builtin_neon_vqtbl4_v: 4286 case NEON::BI__builtin_neon_vqtbl4q_v: 4287 Int = Intrinsic::aarch64_neon_tbl4; s = "vtbl4"; break; 4288 case NEON::BI__builtin_neon_vqtbx1_v: 4289 case NEON::BI__builtin_neon_vqtbx1q_v: 4290 Int = Intrinsic::aarch64_neon_tbx1; s = "vtbx1"; break; 4291 case NEON::BI__builtin_neon_vqtbx2_v: 4292 case NEON::BI__builtin_neon_vqtbx2q_v: 4293 Int = Intrinsic::aarch64_neon_tbx2; s = "vtbx2"; break; 4294 case NEON::BI__builtin_neon_vqtbx3_v: 4295 case NEON::BI__builtin_neon_vqtbx3q_v: 4296 Int = Intrinsic::aarch64_neon_tbx3; s = "vtbx3"; break; 4297 case NEON::BI__builtin_neon_vqtbx4_v: 4298 case NEON::BI__builtin_neon_vqtbx4q_v: 4299 Int = Intrinsic::aarch64_neon_tbx4; s = "vtbx4"; break; 4300 } 4301 } 4302 4303 if (!Int) 4304 return nullptr; 4305 4306 Function *F = CGF.CGM.getIntrinsic(Int, Ty); 4307 return CGF.EmitNeonCall(F, Ops, s); 4308 } 4309 4310 Value *CodeGenFunction::vectorWrapScalar16(Value *Op) { 4311 llvm::Type *VTy = llvm::VectorType::get(Int16Ty, 4); 4312 Op = Builder.CreateBitCast(Op, Int16Ty); 4313 Value *V = UndefValue::get(VTy); 4314 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 4315 Op = Builder.CreateInsertElement(V, Op, CI); 4316 return Op; 4317 } 4318 4319 Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, 4320 const CallExpr *E) { 4321 unsigned HintID = static_cast<unsigned>(-1); 4322 switch (BuiltinID) { 4323 default: break; 4324 case AArch64::BI__builtin_arm_nop: 4325 HintID = 0; 4326 break; 4327 case AArch64::BI__builtin_arm_yield: 4328 HintID = 1; 4329 break; 4330 case AArch64::BI__builtin_arm_wfe: 4331 HintID = 2; 4332 break; 4333 case AArch64::BI__builtin_arm_wfi: 4334 HintID = 3; 4335 break; 4336 case AArch64::BI__builtin_arm_sev: 4337 HintID = 4; 4338 break; 4339 case AArch64::BI__builtin_arm_sevl: 4340 HintID = 5; 4341 break; 4342 } 4343 4344 if (HintID != static_cast<unsigned>(-1)) { 4345 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_hint); 4346 return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID)); 4347 } 4348 4349 if (BuiltinID == AArch64::BI__builtin_arm_prefetch) { 4350 Value *Address = EmitScalarExpr(E->getArg(0)); 4351 Value *RW = EmitScalarExpr(E->getArg(1)); 4352 Value *CacheLevel = EmitScalarExpr(E->getArg(2)); 4353 Value *RetentionPolicy = EmitScalarExpr(E->getArg(3)); 4354 Value *IsData = EmitScalarExpr(E->getArg(4)); 4355 4356 Value *Locality = nullptr; 4357 if (cast<llvm::ConstantInt>(RetentionPolicy)->isZero()) { 4358 // Temporal fetch, needs to convert cache level to locality. 4359 Locality = llvm::ConstantInt::get(Int32Ty, 4360 -cast<llvm::ConstantInt>(CacheLevel)->getValue() + 3); 4361 } else { 4362 // Streaming fetch. 4363 Locality = llvm::ConstantInt::get(Int32Ty, 0); 4364 } 4365 4366 // FIXME: We need AArch64 specific LLVM intrinsic if we want to specify 4367 // PLDL3STRM or PLDL2STRM. 4368 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 4369 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 4370 } 4371 4372 if (BuiltinID == AArch64::BI__builtin_arm_rbit) { 4373 assert((getContext().getTypeSize(E->getType()) == 32) && 4374 "rbit of unusual size!"); 4375 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 4376 return Builder.CreateCall( 4377 CGM.getIntrinsic(Intrinsic::aarch64_rbit, Arg->getType()), Arg, "rbit"); 4378 } 4379 if (BuiltinID == AArch64::BI__builtin_arm_rbit64) { 4380 assert((getContext().getTypeSize(E->getType()) == 64) && 4381 "rbit of unusual size!"); 4382 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 4383 return Builder.CreateCall( 4384 CGM.getIntrinsic(Intrinsic::aarch64_rbit, Arg->getType()), Arg, "rbit"); 4385 } 4386 4387 if (BuiltinID == AArch64::BI__clear_cache) { 4388 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 4389 const FunctionDecl *FD = E->getDirectCallee(); 4390 Value *Ops[2]; 4391 for (unsigned i = 0; i < 2; i++) 4392 Ops[i] = EmitScalarExpr(E->getArg(i)); 4393 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 4394 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 4395 StringRef Name = FD->getName(); 4396 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 4397 } 4398 4399 if ((BuiltinID == AArch64::BI__builtin_arm_ldrex || 4400 BuiltinID == AArch64::BI__builtin_arm_ldaex) && 4401 getContext().getTypeSize(E->getType()) == 128) { 4402 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 4403 ? Intrinsic::aarch64_ldaxp 4404 : Intrinsic::aarch64_ldxp); 4405 4406 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 4407 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 4408 "ldxp"); 4409 4410 Value *Val0 = Builder.CreateExtractValue(Val, 1); 4411 Value *Val1 = Builder.CreateExtractValue(Val, 0); 4412 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 4413 Val0 = Builder.CreateZExt(Val0, Int128Ty); 4414 Val1 = Builder.CreateZExt(Val1, Int128Ty); 4415 4416 Value *ShiftCst = llvm::ConstantInt::get(Int128Ty, 64); 4417 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 4418 Val = Builder.CreateOr(Val, Val1); 4419 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 4420 } else if (BuiltinID == AArch64::BI__builtin_arm_ldrex || 4421 BuiltinID == AArch64::BI__builtin_arm_ldaex) { 4422 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 4423 4424 QualType Ty = E->getType(); 4425 llvm::Type *RealResTy = ConvertType(Ty); 4426 llvm::Type *IntResTy = llvm::IntegerType::get(getLLVMContext(), 4427 getContext().getTypeSize(Ty)); 4428 LoadAddr = Builder.CreateBitCast(LoadAddr, IntResTy->getPointerTo()); 4429 4430 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 4431 ? Intrinsic::aarch64_ldaxr 4432 : Intrinsic::aarch64_ldxr, 4433 LoadAddr->getType()); 4434 Value *Val = Builder.CreateCall(F, LoadAddr, "ldxr"); 4435 4436 if (RealResTy->isPointerTy()) 4437 return Builder.CreateIntToPtr(Val, RealResTy); 4438 4439 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 4440 return Builder.CreateBitCast(Val, RealResTy); 4441 } 4442 4443 if ((BuiltinID == AArch64::BI__builtin_arm_strex || 4444 BuiltinID == AArch64::BI__builtin_arm_stlex) && 4445 getContext().getTypeSize(E->getArg(0)->getType()) == 128) { 4446 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 4447 ? Intrinsic::aarch64_stlxp 4448 : Intrinsic::aarch64_stxp); 4449 llvm::Type *STy = llvm::StructType::get(Int64Ty, Int64Ty, nullptr); 4450 4451 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 4452 EmitAnyExprToMem(E->getArg(0), Tmp, Qualifiers(), /*init*/ true); 4453 4454 Tmp = Builder.CreateBitCast(Tmp, llvm::PointerType::getUnqual(STy)); 4455 llvm::Value *Val = Builder.CreateLoad(Tmp); 4456 4457 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 4458 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 4459 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), 4460 Int8PtrTy); 4461 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "stxp"); 4462 } 4463 4464 if (BuiltinID == AArch64::BI__builtin_arm_strex || 4465 BuiltinID == AArch64::BI__builtin_arm_stlex) { 4466 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 4467 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 4468 4469 QualType Ty = E->getArg(0)->getType(); 4470 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 4471 getContext().getTypeSize(Ty)); 4472 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 4473 4474 if (StoreVal->getType()->isPointerTy()) 4475 StoreVal = Builder.CreatePtrToInt(StoreVal, Int64Ty); 4476 else { 4477 StoreVal = Builder.CreateBitCast(StoreVal, StoreTy); 4478 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int64Ty); 4479 } 4480 4481 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 4482 ? Intrinsic::aarch64_stlxr 4483 : Intrinsic::aarch64_stxr, 4484 StoreAddr->getType()); 4485 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "stxr"); 4486 } 4487 4488 if (BuiltinID == AArch64::BI__builtin_arm_clrex) { 4489 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_clrex); 4490 return Builder.CreateCall(F); 4491 } 4492 4493 if (BuiltinID == AArch64::BI__builtin_thread_pointer) { 4494 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_thread_pointer); 4495 return Builder.CreateCall(F); 4496 } 4497 4498 // CRC32 4499 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 4500 switch (BuiltinID) { 4501 case AArch64::BI__builtin_arm_crc32b: 4502 CRCIntrinsicID = Intrinsic::aarch64_crc32b; break; 4503 case AArch64::BI__builtin_arm_crc32cb: 4504 CRCIntrinsicID = Intrinsic::aarch64_crc32cb; break; 4505 case AArch64::BI__builtin_arm_crc32h: 4506 CRCIntrinsicID = Intrinsic::aarch64_crc32h; break; 4507 case AArch64::BI__builtin_arm_crc32ch: 4508 CRCIntrinsicID = Intrinsic::aarch64_crc32ch; break; 4509 case AArch64::BI__builtin_arm_crc32w: 4510 CRCIntrinsicID = Intrinsic::aarch64_crc32w; break; 4511 case AArch64::BI__builtin_arm_crc32cw: 4512 CRCIntrinsicID = Intrinsic::aarch64_crc32cw; break; 4513 case AArch64::BI__builtin_arm_crc32d: 4514 CRCIntrinsicID = Intrinsic::aarch64_crc32x; break; 4515 case AArch64::BI__builtin_arm_crc32cd: 4516 CRCIntrinsicID = Intrinsic::aarch64_crc32cx; break; 4517 } 4518 4519 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 4520 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 4521 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 4522 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 4523 4524 llvm::Type *DataTy = F->getFunctionType()->getParamType(1); 4525 Arg1 = Builder.CreateZExtOrBitCast(Arg1, DataTy); 4526 4527 return Builder.CreateCall(F, {Arg0, Arg1}); 4528 } 4529 4530 if (BuiltinID == AArch64::BI__builtin_arm_rsr || 4531 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 4532 BuiltinID == AArch64::BI__builtin_arm_rsrp || 4533 BuiltinID == AArch64::BI__builtin_arm_wsr || 4534 BuiltinID == AArch64::BI__builtin_arm_wsr64 || 4535 BuiltinID == AArch64::BI__builtin_arm_wsrp) { 4536 4537 bool IsRead = BuiltinID == AArch64::BI__builtin_arm_rsr || 4538 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 4539 BuiltinID == AArch64::BI__builtin_arm_rsrp; 4540 4541 bool IsPointerBuiltin = BuiltinID == AArch64::BI__builtin_arm_rsrp || 4542 BuiltinID == AArch64::BI__builtin_arm_wsrp; 4543 4544 bool Is64Bit = BuiltinID != AArch64::BI__builtin_arm_rsr && 4545 BuiltinID != AArch64::BI__builtin_arm_wsr; 4546 4547 llvm::Type *ValueType; 4548 llvm::Type *RegisterType = Int64Ty; 4549 if (IsPointerBuiltin) { 4550 ValueType = VoidPtrTy; 4551 } else if (Is64Bit) { 4552 ValueType = Int64Ty; 4553 } else { 4554 ValueType = Int32Ty; 4555 } 4556 4557 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 4558 } 4559 4560 // Find out if any arguments are required to be integer constant 4561 // expressions. 4562 unsigned ICEArguments = 0; 4563 ASTContext::GetBuiltinTypeError Error; 4564 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 4565 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 4566 4567 llvm::SmallVector<Value*, 4> Ops; 4568 for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; i++) { 4569 if ((ICEArguments & (1 << i)) == 0) { 4570 Ops.push_back(EmitScalarExpr(E->getArg(i))); 4571 } else { 4572 // If this is required to be a constant, constant fold it so that we know 4573 // that the generated intrinsic gets a ConstantInt. 4574 llvm::APSInt Result; 4575 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 4576 assert(IsConst && "Constant arg isn't actually constant?"); 4577 (void)IsConst; 4578 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 4579 } 4580 } 4581 4582 auto SISDMap = makeArrayRef(AArch64SISDIntrinsicMap); 4583 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 4584 SISDMap, BuiltinID, AArch64SISDIntrinsicsProvenSorted); 4585 4586 if (Builtin) { 4587 Ops.push_back(EmitScalarExpr(E->getArg(E->getNumArgs() - 1))); 4588 Value *Result = EmitCommonNeonSISDBuiltinExpr(*this, *Builtin, Ops, E); 4589 assert(Result && "SISD intrinsic should have been handled"); 4590 return Result; 4591 } 4592 4593 llvm::APSInt Result; 4594 const Expr *Arg = E->getArg(E->getNumArgs()-1); 4595 NeonTypeFlags Type(0); 4596 if (Arg->isIntegerConstantExpr(Result, getContext())) 4597 // Determine the type of this overloaded NEON intrinsic. 4598 Type = NeonTypeFlags(Result.getZExtValue()); 4599 4600 bool usgn = Type.isUnsigned(); 4601 bool quad = Type.isQuad(); 4602 4603 // Handle non-overloaded intrinsics first. 4604 switch (BuiltinID) { 4605 default: break; 4606 case NEON::BI__builtin_neon_vldrq_p128: { 4607 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 4608 Value *Ptr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PTy); 4609 return Builder.CreateDefaultAlignedLoad(Ptr); 4610 } 4611 case NEON::BI__builtin_neon_vstrq_p128: { 4612 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 4613 Value *Ptr = Builder.CreateBitCast(Ops[0], Int128PTy); 4614 return Builder.CreateDefaultAlignedStore(EmitScalarExpr(E->getArg(1)), Ptr); 4615 } 4616 case NEON::BI__builtin_neon_vcvts_u32_f32: 4617 case NEON::BI__builtin_neon_vcvtd_u64_f64: 4618 usgn = true; 4619 // FALL THROUGH 4620 case NEON::BI__builtin_neon_vcvts_s32_f32: 4621 case NEON::BI__builtin_neon_vcvtd_s64_f64: { 4622 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4623 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 4624 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 4625 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 4626 Ops[0] = Builder.CreateBitCast(Ops[0], FTy); 4627 if (usgn) 4628 return Builder.CreateFPToUI(Ops[0], InTy); 4629 return Builder.CreateFPToSI(Ops[0], InTy); 4630 } 4631 case NEON::BI__builtin_neon_vcvts_f32_u32: 4632 case NEON::BI__builtin_neon_vcvtd_f64_u64: 4633 usgn = true; 4634 // FALL THROUGH 4635 case NEON::BI__builtin_neon_vcvts_f32_s32: 4636 case NEON::BI__builtin_neon_vcvtd_f64_s64: { 4637 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4638 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 4639 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 4640 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 4641 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 4642 if (usgn) 4643 return Builder.CreateUIToFP(Ops[0], FTy); 4644 return Builder.CreateSIToFP(Ops[0], FTy); 4645 } 4646 case NEON::BI__builtin_neon_vpaddd_s64: { 4647 llvm::Type *Ty = llvm::VectorType::get(Int64Ty, 2); 4648 Value *Vec = EmitScalarExpr(E->getArg(0)); 4649 // The vector is v2f64, so make sure it's bitcast to that. 4650 Vec = Builder.CreateBitCast(Vec, Ty, "v2i64"); 4651 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 4652 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 4653 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 4654 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 4655 // Pairwise addition of a v2f64 into a scalar f64. 4656 return Builder.CreateAdd(Op0, Op1, "vpaddd"); 4657 } 4658 case NEON::BI__builtin_neon_vpaddd_f64: { 4659 llvm::Type *Ty = 4660 llvm::VectorType::get(DoubleTy, 2); 4661 Value *Vec = EmitScalarExpr(E->getArg(0)); 4662 // The vector is v2f64, so make sure it's bitcast to that. 4663 Vec = Builder.CreateBitCast(Vec, Ty, "v2f64"); 4664 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 4665 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 4666 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 4667 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 4668 // Pairwise addition of a v2f64 into a scalar f64. 4669 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 4670 } 4671 case NEON::BI__builtin_neon_vpadds_f32: { 4672 llvm::Type *Ty = 4673 llvm::VectorType::get(FloatTy, 2); 4674 Value *Vec = EmitScalarExpr(E->getArg(0)); 4675 // The vector is v2f32, so make sure it's bitcast to that. 4676 Vec = Builder.CreateBitCast(Vec, Ty, "v2f32"); 4677 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 4678 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 4679 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 4680 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 4681 // Pairwise addition of a v2f32 into a scalar f32. 4682 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 4683 } 4684 case NEON::BI__builtin_neon_vceqzd_s64: 4685 case NEON::BI__builtin_neon_vceqzd_f64: 4686 case NEON::BI__builtin_neon_vceqzs_f32: 4687 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4688 return EmitAArch64CompareBuiltinExpr( 4689 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4690 ICmpInst::FCMP_OEQ, ICmpInst::ICMP_EQ, "vceqz"); 4691 case NEON::BI__builtin_neon_vcgezd_s64: 4692 case NEON::BI__builtin_neon_vcgezd_f64: 4693 case NEON::BI__builtin_neon_vcgezs_f32: 4694 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4695 return EmitAArch64CompareBuiltinExpr( 4696 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4697 ICmpInst::FCMP_OGE, ICmpInst::ICMP_SGE, "vcgez"); 4698 case NEON::BI__builtin_neon_vclezd_s64: 4699 case NEON::BI__builtin_neon_vclezd_f64: 4700 case NEON::BI__builtin_neon_vclezs_f32: 4701 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4702 return EmitAArch64CompareBuiltinExpr( 4703 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4704 ICmpInst::FCMP_OLE, ICmpInst::ICMP_SLE, "vclez"); 4705 case NEON::BI__builtin_neon_vcgtzd_s64: 4706 case NEON::BI__builtin_neon_vcgtzd_f64: 4707 case NEON::BI__builtin_neon_vcgtzs_f32: 4708 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4709 return EmitAArch64CompareBuiltinExpr( 4710 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4711 ICmpInst::FCMP_OGT, ICmpInst::ICMP_SGT, "vcgtz"); 4712 case NEON::BI__builtin_neon_vcltzd_s64: 4713 case NEON::BI__builtin_neon_vcltzd_f64: 4714 case NEON::BI__builtin_neon_vcltzs_f32: 4715 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4716 return EmitAArch64CompareBuiltinExpr( 4717 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4718 ICmpInst::FCMP_OLT, ICmpInst::ICMP_SLT, "vcltz"); 4719 4720 case NEON::BI__builtin_neon_vceqzd_u64: { 4721 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4722 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 4723 Ops[0] = 4724 Builder.CreateICmpEQ(Ops[0], llvm::Constant::getNullValue(Int64Ty)); 4725 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqzd"); 4726 } 4727 case NEON::BI__builtin_neon_vceqd_f64: 4728 case NEON::BI__builtin_neon_vcled_f64: 4729 case NEON::BI__builtin_neon_vcltd_f64: 4730 case NEON::BI__builtin_neon_vcged_f64: 4731 case NEON::BI__builtin_neon_vcgtd_f64: { 4732 llvm::CmpInst::Predicate P; 4733 switch (BuiltinID) { 4734 default: llvm_unreachable("missing builtin ID in switch!"); 4735 case NEON::BI__builtin_neon_vceqd_f64: P = llvm::FCmpInst::FCMP_OEQ; break; 4736 case NEON::BI__builtin_neon_vcled_f64: P = llvm::FCmpInst::FCMP_OLE; break; 4737 case NEON::BI__builtin_neon_vcltd_f64: P = llvm::FCmpInst::FCMP_OLT; break; 4738 case NEON::BI__builtin_neon_vcged_f64: P = llvm::FCmpInst::FCMP_OGE; break; 4739 case NEON::BI__builtin_neon_vcgtd_f64: P = llvm::FCmpInst::FCMP_OGT; break; 4740 } 4741 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4742 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 4743 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 4744 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 4745 return Builder.CreateSExt(Ops[0], Int64Ty, "vcmpd"); 4746 } 4747 case NEON::BI__builtin_neon_vceqs_f32: 4748 case NEON::BI__builtin_neon_vcles_f32: 4749 case NEON::BI__builtin_neon_vclts_f32: 4750 case NEON::BI__builtin_neon_vcges_f32: 4751 case NEON::BI__builtin_neon_vcgts_f32: { 4752 llvm::CmpInst::Predicate P; 4753 switch (BuiltinID) { 4754 default: llvm_unreachable("missing builtin ID in switch!"); 4755 case NEON::BI__builtin_neon_vceqs_f32: P = llvm::FCmpInst::FCMP_OEQ; break; 4756 case NEON::BI__builtin_neon_vcles_f32: P = llvm::FCmpInst::FCMP_OLE; break; 4757 case NEON::BI__builtin_neon_vclts_f32: P = llvm::FCmpInst::FCMP_OLT; break; 4758 case NEON::BI__builtin_neon_vcges_f32: P = llvm::FCmpInst::FCMP_OGE; break; 4759 case NEON::BI__builtin_neon_vcgts_f32: P = llvm::FCmpInst::FCMP_OGT; break; 4760 } 4761 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4762 Ops[0] = Builder.CreateBitCast(Ops[0], FloatTy); 4763 Ops[1] = Builder.CreateBitCast(Ops[1], FloatTy); 4764 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 4765 return Builder.CreateSExt(Ops[0], Int32Ty, "vcmpd"); 4766 } 4767 case NEON::BI__builtin_neon_vceqd_s64: 4768 case NEON::BI__builtin_neon_vceqd_u64: 4769 case NEON::BI__builtin_neon_vcgtd_s64: 4770 case NEON::BI__builtin_neon_vcgtd_u64: 4771 case NEON::BI__builtin_neon_vcltd_s64: 4772 case NEON::BI__builtin_neon_vcltd_u64: 4773 case NEON::BI__builtin_neon_vcged_u64: 4774 case NEON::BI__builtin_neon_vcged_s64: 4775 case NEON::BI__builtin_neon_vcled_u64: 4776 case NEON::BI__builtin_neon_vcled_s64: { 4777 llvm::CmpInst::Predicate P; 4778 switch (BuiltinID) { 4779 default: llvm_unreachable("missing builtin ID in switch!"); 4780 case NEON::BI__builtin_neon_vceqd_s64: 4781 case NEON::BI__builtin_neon_vceqd_u64:P = llvm::ICmpInst::ICMP_EQ;break; 4782 case NEON::BI__builtin_neon_vcgtd_s64:P = llvm::ICmpInst::ICMP_SGT;break; 4783 case NEON::BI__builtin_neon_vcgtd_u64:P = llvm::ICmpInst::ICMP_UGT;break; 4784 case NEON::BI__builtin_neon_vcltd_s64:P = llvm::ICmpInst::ICMP_SLT;break; 4785 case NEON::BI__builtin_neon_vcltd_u64:P = llvm::ICmpInst::ICMP_ULT;break; 4786 case NEON::BI__builtin_neon_vcged_u64:P = llvm::ICmpInst::ICMP_UGE;break; 4787 case NEON::BI__builtin_neon_vcged_s64:P = llvm::ICmpInst::ICMP_SGE;break; 4788 case NEON::BI__builtin_neon_vcled_u64:P = llvm::ICmpInst::ICMP_ULE;break; 4789 case NEON::BI__builtin_neon_vcled_s64:P = llvm::ICmpInst::ICMP_SLE;break; 4790 } 4791 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4792 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 4793 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 4794 Ops[0] = Builder.CreateICmp(P, Ops[0], Ops[1]); 4795 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqd"); 4796 } 4797 case NEON::BI__builtin_neon_vtstd_s64: 4798 case NEON::BI__builtin_neon_vtstd_u64: { 4799 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4800 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 4801 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 4802 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 4803 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 4804 llvm::Constant::getNullValue(Int64Ty)); 4805 return Builder.CreateSExt(Ops[0], Int64Ty, "vtstd"); 4806 } 4807 case NEON::BI__builtin_neon_vset_lane_i8: 4808 case NEON::BI__builtin_neon_vset_lane_i16: 4809 case NEON::BI__builtin_neon_vset_lane_i32: 4810 case NEON::BI__builtin_neon_vset_lane_i64: 4811 case NEON::BI__builtin_neon_vset_lane_f32: 4812 case NEON::BI__builtin_neon_vsetq_lane_i8: 4813 case NEON::BI__builtin_neon_vsetq_lane_i16: 4814 case NEON::BI__builtin_neon_vsetq_lane_i32: 4815 case NEON::BI__builtin_neon_vsetq_lane_i64: 4816 case NEON::BI__builtin_neon_vsetq_lane_f32: 4817 Ops.push_back(EmitScalarExpr(E->getArg(2))); 4818 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4819 case NEON::BI__builtin_neon_vset_lane_f64: 4820 // The vector type needs a cast for the v1f64 variant. 4821 Ops[1] = Builder.CreateBitCast(Ops[1], 4822 llvm::VectorType::get(DoubleTy, 1)); 4823 Ops.push_back(EmitScalarExpr(E->getArg(2))); 4824 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4825 case NEON::BI__builtin_neon_vsetq_lane_f64: 4826 // The vector type needs a cast for the v2f64 variant. 4827 Ops[1] = Builder.CreateBitCast(Ops[1], 4828 llvm::VectorType::get(DoubleTy, 2)); 4829 Ops.push_back(EmitScalarExpr(E->getArg(2))); 4830 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4831 4832 case NEON::BI__builtin_neon_vget_lane_i8: 4833 case NEON::BI__builtin_neon_vdupb_lane_i8: 4834 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 8)); 4835 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4836 "vget_lane"); 4837 case NEON::BI__builtin_neon_vgetq_lane_i8: 4838 case NEON::BI__builtin_neon_vdupb_laneq_i8: 4839 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 16)); 4840 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4841 "vgetq_lane"); 4842 case NEON::BI__builtin_neon_vget_lane_i16: 4843 case NEON::BI__builtin_neon_vduph_lane_i16: 4844 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 4)); 4845 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4846 "vget_lane"); 4847 case NEON::BI__builtin_neon_vgetq_lane_i16: 4848 case NEON::BI__builtin_neon_vduph_laneq_i16: 4849 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 8)); 4850 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4851 "vgetq_lane"); 4852 case NEON::BI__builtin_neon_vget_lane_i32: 4853 case NEON::BI__builtin_neon_vdups_lane_i32: 4854 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 2)); 4855 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4856 "vget_lane"); 4857 case NEON::BI__builtin_neon_vdups_lane_f32: 4858 Ops[0] = Builder.CreateBitCast(Ops[0], 4859 llvm::VectorType::get(FloatTy, 2)); 4860 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4861 "vdups_lane"); 4862 case NEON::BI__builtin_neon_vgetq_lane_i32: 4863 case NEON::BI__builtin_neon_vdups_laneq_i32: 4864 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 4865 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4866 "vgetq_lane"); 4867 case NEON::BI__builtin_neon_vget_lane_i64: 4868 case NEON::BI__builtin_neon_vdupd_lane_i64: 4869 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 1)); 4870 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4871 "vget_lane"); 4872 case NEON::BI__builtin_neon_vdupd_lane_f64: 4873 Ops[0] = Builder.CreateBitCast(Ops[0], 4874 llvm::VectorType::get(DoubleTy, 1)); 4875 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4876 "vdupd_lane"); 4877 case NEON::BI__builtin_neon_vgetq_lane_i64: 4878 case NEON::BI__builtin_neon_vdupd_laneq_i64: 4879 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 4880 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4881 "vgetq_lane"); 4882 case NEON::BI__builtin_neon_vget_lane_f32: 4883 Ops[0] = Builder.CreateBitCast(Ops[0], 4884 llvm::VectorType::get(FloatTy, 2)); 4885 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4886 "vget_lane"); 4887 case NEON::BI__builtin_neon_vget_lane_f64: 4888 Ops[0] = Builder.CreateBitCast(Ops[0], 4889 llvm::VectorType::get(DoubleTy, 1)); 4890 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4891 "vget_lane"); 4892 case NEON::BI__builtin_neon_vgetq_lane_f32: 4893 case NEON::BI__builtin_neon_vdups_laneq_f32: 4894 Ops[0] = Builder.CreateBitCast(Ops[0], 4895 llvm::VectorType::get(FloatTy, 4)); 4896 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4897 "vgetq_lane"); 4898 case NEON::BI__builtin_neon_vgetq_lane_f64: 4899 case NEON::BI__builtin_neon_vdupd_laneq_f64: 4900 Ops[0] = Builder.CreateBitCast(Ops[0], 4901 llvm::VectorType::get(DoubleTy, 2)); 4902 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4903 "vgetq_lane"); 4904 case NEON::BI__builtin_neon_vaddd_s64: 4905 case NEON::BI__builtin_neon_vaddd_u64: 4906 return Builder.CreateAdd(Ops[0], EmitScalarExpr(E->getArg(1)), "vaddd"); 4907 case NEON::BI__builtin_neon_vsubd_s64: 4908 case NEON::BI__builtin_neon_vsubd_u64: 4909 return Builder.CreateSub(Ops[0], EmitScalarExpr(E->getArg(1)), "vsubd"); 4910 case NEON::BI__builtin_neon_vqdmlalh_s16: 4911 case NEON::BI__builtin_neon_vqdmlslh_s16: { 4912 SmallVector<Value *, 2> ProductOps; 4913 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 4914 ProductOps.push_back(vectorWrapScalar16(EmitScalarExpr(E->getArg(2)))); 4915 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 4916 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 4917 ProductOps, "vqdmlXl"); 4918 Constant *CI = ConstantInt::get(SizeTy, 0); 4919 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 4920 4921 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlalh_s16 4922 ? Intrinsic::aarch64_neon_sqadd 4923 : Intrinsic::aarch64_neon_sqsub; 4924 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int32Ty), Ops, "vqdmlXl"); 4925 } 4926 case NEON::BI__builtin_neon_vqshlud_n_s64: { 4927 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4928 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 4929 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqshlu, Int64Ty), 4930 Ops, "vqshlu_n"); 4931 } 4932 case NEON::BI__builtin_neon_vqshld_n_u64: 4933 case NEON::BI__builtin_neon_vqshld_n_s64: { 4934 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vqshld_n_u64 4935 ? Intrinsic::aarch64_neon_uqshl 4936 : Intrinsic::aarch64_neon_sqshl; 4937 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4938 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 4939 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vqshl_n"); 4940 } 4941 case NEON::BI__builtin_neon_vrshrd_n_u64: 4942 case NEON::BI__builtin_neon_vrshrd_n_s64: { 4943 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrshrd_n_u64 4944 ? Intrinsic::aarch64_neon_urshl 4945 : Intrinsic::aarch64_neon_srshl; 4946 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4947 int SV = cast<ConstantInt>(Ops[1])->getSExtValue(); 4948 Ops[1] = ConstantInt::get(Int64Ty, -SV); 4949 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vrshr_n"); 4950 } 4951 case NEON::BI__builtin_neon_vrsrad_n_u64: 4952 case NEON::BI__builtin_neon_vrsrad_n_s64: { 4953 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrsrad_n_u64 4954 ? Intrinsic::aarch64_neon_urshl 4955 : Intrinsic::aarch64_neon_srshl; 4956 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 4957 Ops.push_back(Builder.CreateNeg(EmitScalarExpr(E->getArg(2)))); 4958 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Int64Ty), 4959 {Ops[1], Builder.CreateSExt(Ops[2], Int64Ty)}); 4960 return Builder.CreateAdd(Ops[0], Builder.CreateBitCast(Ops[1], Int64Ty)); 4961 } 4962 case NEON::BI__builtin_neon_vshld_n_s64: 4963 case NEON::BI__builtin_neon_vshld_n_u64: { 4964 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 4965 return Builder.CreateShl( 4966 Ops[0], ConstantInt::get(Int64Ty, Amt->getZExtValue()), "shld_n"); 4967 } 4968 case NEON::BI__builtin_neon_vshrd_n_s64: { 4969 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 4970 return Builder.CreateAShr( 4971 Ops[0], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 4972 Amt->getZExtValue())), 4973 "shrd_n"); 4974 } 4975 case NEON::BI__builtin_neon_vshrd_n_u64: { 4976 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 4977 uint64_t ShiftAmt = Amt->getZExtValue(); 4978 // Right-shifting an unsigned value by its size yields 0. 4979 if (ShiftAmt == 64) 4980 return ConstantInt::get(Int64Ty, 0); 4981 return Builder.CreateLShr(Ops[0], ConstantInt::get(Int64Ty, ShiftAmt), 4982 "shrd_n"); 4983 } 4984 case NEON::BI__builtin_neon_vsrad_n_s64: { 4985 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 4986 Ops[1] = Builder.CreateAShr( 4987 Ops[1], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 4988 Amt->getZExtValue())), 4989 "shrd_n"); 4990 return Builder.CreateAdd(Ops[0], Ops[1]); 4991 } 4992 case NEON::BI__builtin_neon_vsrad_n_u64: { 4993 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 4994 uint64_t ShiftAmt = Amt->getZExtValue(); 4995 // Right-shifting an unsigned value by its size yields 0. 4996 // As Op + 0 = Op, return Ops[0] directly. 4997 if (ShiftAmt == 64) 4998 return Ops[0]; 4999 Ops[1] = Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, ShiftAmt), 5000 "shrd_n"); 5001 return Builder.CreateAdd(Ops[0], Ops[1]); 5002 } 5003 case NEON::BI__builtin_neon_vqdmlalh_lane_s16: 5004 case NEON::BI__builtin_neon_vqdmlalh_laneq_s16: 5005 case NEON::BI__builtin_neon_vqdmlslh_lane_s16: 5006 case NEON::BI__builtin_neon_vqdmlslh_laneq_s16: { 5007 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 5008 "lane"); 5009 SmallVector<Value *, 2> ProductOps; 5010 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 5011 ProductOps.push_back(vectorWrapScalar16(Ops[2])); 5012 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 5013 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 5014 ProductOps, "vqdmlXl"); 5015 Constant *CI = ConstantInt::get(SizeTy, 0); 5016 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 5017 Ops.pop_back(); 5018 5019 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlalh_lane_s16 || 5020 BuiltinID == NEON::BI__builtin_neon_vqdmlalh_laneq_s16) 5021 ? Intrinsic::aarch64_neon_sqadd 5022 : Intrinsic::aarch64_neon_sqsub; 5023 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int32Ty), Ops, "vqdmlXl"); 5024 } 5025 case NEON::BI__builtin_neon_vqdmlals_s32: 5026 case NEON::BI__builtin_neon_vqdmlsls_s32: { 5027 SmallVector<Value *, 2> ProductOps; 5028 ProductOps.push_back(Ops[1]); 5029 ProductOps.push_back(EmitScalarExpr(E->getArg(2))); 5030 Ops[1] = 5031 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 5032 ProductOps, "vqdmlXl"); 5033 5034 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlals_s32 5035 ? Intrinsic::aarch64_neon_sqadd 5036 : Intrinsic::aarch64_neon_sqsub; 5037 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int64Ty), Ops, "vqdmlXl"); 5038 } 5039 case NEON::BI__builtin_neon_vqdmlals_lane_s32: 5040 case NEON::BI__builtin_neon_vqdmlals_laneq_s32: 5041 case NEON::BI__builtin_neon_vqdmlsls_lane_s32: 5042 case NEON::BI__builtin_neon_vqdmlsls_laneq_s32: { 5043 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 5044 "lane"); 5045 SmallVector<Value *, 2> ProductOps; 5046 ProductOps.push_back(Ops[1]); 5047 ProductOps.push_back(Ops[2]); 5048 Ops[1] = 5049 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 5050 ProductOps, "vqdmlXl"); 5051 Ops.pop_back(); 5052 5053 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlals_lane_s32 || 5054 BuiltinID == NEON::BI__builtin_neon_vqdmlals_laneq_s32) 5055 ? Intrinsic::aarch64_neon_sqadd 5056 : Intrinsic::aarch64_neon_sqsub; 5057 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl"); 5058 } 5059 } 5060 5061 llvm::VectorType *VTy = GetNeonType(this, Type); 5062 llvm::Type *Ty = VTy; 5063 if (!Ty) 5064 return nullptr; 5065 5066 // Not all intrinsics handled by the common case work for AArch64 yet, so only 5067 // defer to common code if it's been added to our special map. 5068 Builtin = findNeonIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID, 5069 AArch64SIMDIntrinsicsProvenSorted); 5070 5071 if (Builtin) 5072 return EmitCommonNeonBuiltinExpr( 5073 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 5074 Builtin->NameHint, Builtin->TypeModifier, E, Ops, 5075 /*never use addresses*/ Address::invalid(), Address::invalid()); 5076 5077 if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops)) 5078 return V; 5079 5080 unsigned Int; 5081 switch (BuiltinID) { 5082 default: return nullptr; 5083 case NEON::BI__builtin_neon_vbsl_v: 5084 case NEON::BI__builtin_neon_vbslq_v: { 5085 llvm::Type *BitTy = llvm::VectorType::getInteger(VTy); 5086 Ops[0] = Builder.CreateBitCast(Ops[0], BitTy, "vbsl"); 5087 Ops[1] = Builder.CreateBitCast(Ops[1], BitTy, "vbsl"); 5088 Ops[2] = Builder.CreateBitCast(Ops[2], BitTy, "vbsl"); 5089 5090 Ops[1] = Builder.CreateAnd(Ops[0], Ops[1], "vbsl"); 5091 Ops[2] = Builder.CreateAnd(Builder.CreateNot(Ops[0]), Ops[2], "vbsl"); 5092 Ops[0] = Builder.CreateOr(Ops[1], Ops[2], "vbsl"); 5093 return Builder.CreateBitCast(Ops[0], Ty); 5094 } 5095 case NEON::BI__builtin_neon_vfma_lane_v: 5096 case NEON::BI__builtin_neon_vfmaq_lane_v: { // Only used for FP types 5097 // The ARM builtins (and instructions) have the addend as the first 5098 // operand, but the 'fma' intrinsics have it last. Swap it around here. 5099 Value *Addend = Ops[0]; 5100 Value *Multiplicand = Ops[1]; 5101 Value *LaneSource = Ops[2]; 5102 Ops[0] = Multiplicand; 5103 Ops[1] = LaneSource; 5104 Ops[2] = Addend; 5105 5106 // Now adjust things to handle the lane access. 5107 llvm::Type *SourceTy = BuiltinID == NEON::BI__builtin_neon_vfmaq_lane_v ? 5108 llvm::VectorType::get(VTy->getElementType(), VTy->getNumElements() / 2) : 5109 VTy; 5110 llvm::Constant *cst = cast<Constant>(Ops[3]); 5111 Value *SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), cst); 5112 Ops[1] = Builder.CreateBitCast(Ops[1], SourceTy); 5113 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV, "lane"); 5114 5115 Ops.pop_back(); 5116 Int = Intrinsic::fma; 5117 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmla"); 5118 } 5119 case NEON::BI__builtin_neon_vfma_laneq_v: { 5120 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 5121 // v1f64 fma should be mapped to Neon scalar f64 fma 5122 if (VTy && VTy->getElementType() == DoubleTy) { 5123 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5124 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 5125 llvm::Type *VTy = GetNeonType(this, 5126 NeonTypeFlags(NeonTypeFlags::Float64, false, true)); 5127 Ops[2] = Builder.CreateBitCast(Ops[2], VTy); 5128 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 5129 Value *F = CGM.getIntrinsic(Intrinsic::fma, DoubleTy); 5130 Value *Result = Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 5131 return Builder.CreateBitCast(Result, Ty); 5132 } 5133 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5134 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5135 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5136 5137 llvm::Type *STy = llvm::VectorType::get(VTy->getElementType(), 5138 VTy->getNumElements() * 2); 5139 Ops[2] = Builder.CreateBitCast(Ops[2], STy); 5140 Value* SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), 5141 cast<ConstantInt>(Ops[3])); 5142 Ops[2] = Builder.CreateShuffleVector(Ops[2], Ops[2], SV, "lane"); 5143 5144 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 5145 } 5146 case NEON::BI__builtin_neon_vfmaq_laneq_v: { 5147 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5148 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5149 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5150 5151 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5152 Ops[2] = EmitNeonSplat(Ops[2], cast<ConstantInt>(Ops[3])); 5153 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 5154 } 5155 case NEON::BI__builtin_neon_vfmas_lane_f32: 5156 case NEON::BI__builtin_neon_vfmas_laneq_f32: 5157 case NEON::BI__builtin_neon_vfmad_lane_f64: 5158 case NEON::BI__builtin_neon_vfmad_laneq_f64: { 5159 Ops.push_back(EmitScalarExpr(E->getArg(3))); 5160 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 5161 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5162 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 5163 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 5164 } 5165 case NEON::BI__builtin_neon_vfms_v: 5166 case NEON::BI__builtin_neon_vfmsq_v: { // Only used for FP types 5167 // FIXME: probably remove when we no longer support aarch64_simd.h 5168 // (arm_neon.h delegates to vfma). 5169 5170 // The ARM builtins (and instructions) have the addend as the first 5171 // operand, but the 'fma' intrinsics have it last. Swap it around here. 5172 Value *Subtrahend = Ops[0]; 5173 Value *Multiplicand = Ops[2]; 5174 Ops[0] = Multiplicand; 5175 Ops[2] = Subtrahend; 5176 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 5177 Ops[1] = Builder.CreateFNeg(Ops[1]); 5178 Int = Intrinsic::fma; 5179 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmls"); 5180 } 5181 case NEON::BI__builtin_neon_vmull_v: 5182 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5183 Int = usgn ? Intrinsic::aarch64_neon_umull : Intrinsic::aarch64_neon_smull; 5184 if (Type.isPoly()) Int = Intrinsic::aarch64_neon_pmull; 5185 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 5186 case NEON::BI__builtin_neon_vmax_v: 5187 case NEON::BI__builtin_neon_vmaxq_v: 5188 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5189 Int = usgn ? Intrinsic::aarch64_neon_umax : Intrinsic::aarch64_neon_smax; 5190 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmax; 5191 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmax"); 5192 case NEON::BI__builtin_neon_vmin_v: 5193 case NEON::BI__builtin_neon_vminq_v: 5194 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5195 Int = usgn ? Intrinsic::aarch64_neon_umin : Intrinsic::aarch64_neon_smin; 5196 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmin; 5197 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmin"); 5198 case NEON::BI__builtin_neon_vabd_v: 5199 case NEON::BI__builtin_neon_vabdq_v: 5200 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5201 Int = usgn ? Intrinsic::aarch64_neon_uabd : Intrinsic::aarch64_neon_sabd; 5202 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fabd; 5203 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vabd"); 5204 case NEON::BI__builtin_neon_vpadal_v: 5205 case NEON::BI__builtin_neon_vpadalq_v: { 5206 unsigned ArgElts = VTy->getNumElements(); 5207 llvm::IntegerType *EltTy = cast<IntegerType>(VTy->getElementType()); 5208 unsigned BitWidth = EltTy->getBitWidth(); 5209 llvm::Type *ArgTy = llvm::VectorType::get( 5210 llvm::IntegerType::get(getLLVMContext(), BitWidth/2), 2*ArgElts); 5211 llvm::Type* Tys[2] = { VTy, ArgTy }; 5212 Int = usgn ? Intrinsic::aarch64_neon_uaddlp : Intrinsic::aarch64_neon_saddlp; 5213 SmallVector<llvm::Value*, 1> TmpOps; 5214 TmpOps.push_back(Ops[1]); 5215 Function *F = CGM.getIntrinsic(Int, Tys); 5216 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vpadal"); 5217 llvm::Value *addend = Builder.CreateBitCast(Ops[0], tmp->getType()); 5218 return Builder.CreateAdd(tmp, addend); 5219 } 5220 case NEON::BI__builtin_neon_vpmin_v: 5221 case NEON::BI__builtin_neon_vpminq_v: 5222 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5223 Int = usgn ? Intrinsic::aarch64_neon_uminp : Intrinsic::aarch64_neon_sminp; 5224 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fminp; 5225 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmin"); 5226 case NEON::BI__builtin_neon_vpmax_v: 5227 case NEON::BI__builtin_neon_vpmaxq_v: 5228 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5229 Int = usgn ? Intrinsic::aarch64_neon_umaxp : Intrinsic::aarch64_neon_smaxp; 5230 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmaxp; 5231 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmax"); 5232 case NEON::BI__builtin_neon_vminnm_v: 5233 case NEON::BI__builtin_neon_vminnmq_v: 5234 Int = Intrinsic::aarch64_neon_fminnm; 5235 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vminnm"); 5236 case NEON::BI__builtin_neon_vmaxnm_v: 5237 case NEON::BI__builtin_neon_vmaxnmq_v: 5238 Int = Intrinsic::aarch64_neon_fmaxnm; 5239 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmaxnm"); 5240 case NEON::BI__builtin_neon_vrecpss_f32: { 5241 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5242 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, FloatTy), 5243 Ops, "vrecps"); 5244 } 5245 case NEON::BI__builtin_neon_vrecpsd_f64: { 5246 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5247 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, DoubleTy), 5248 Ops, "vrecps"); 5249 } 5250 case NEON::BI__builtin_neon_vqshrun_n_v: 5251 Int = Intrinsic::aarch64_neon_sqshrun; 5252 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrun_n"); 5253 case NEON::BI__builtin_neon_vqrshrun_n_v: 5254 Int = Intrinsic::aarch64_neon_sqrshrun; 5255 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrun_n"); 5256 case NEON::BI__builtin_neon_vqshrn_n_v: 5257 Int = usgn ? Intrinsic::aarch64_neon_uqshrn : Intrinsic::aarch64_neon_sqshrn; 5258 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n"); 5259 case NEON::BI__builtin_neon_vrshrn_n_v: 5260 Int = Intrinsic::aarch64_neon_rshrn; 5261 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshrn_n"); 5262 case NEON::BI__builtin_neon_vqrshrn_n_v: 5263 Int = usgn ? Intrinsic::aarch64_neon_uqrshrn : Intrinsic::aarch64_neon_sqrshrn; 5264 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n"); 5265 case NEON::BI__builtin_neon_vrnda_v: 5266 case NEON::BI__builtin_neon_vrndaq_v: { 5267 Int = Intrinsic::round; 5268 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrnda"); 5269 } 5270 case NEON::BI__builtin_neon_vrndi_v: 5271 case NEON::BI__builtin_neon_vrndiq_v: { 5272 Int = Intrinsic::nearbyint; 5273 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndi"); 5274 } 5275 case NEON::BI__builtin_neon_vrndm_v: 5276 case NEON::BI__builtin_neon_vrndmq_v: { 5277 Int = Intrinsic::floor; 5278 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndm"); 5279 } 5280 case NEON::BI__builtin_neon_vrndn_v: 5281 case NEON::BI__builtin_neon_vrndnq_v: { 5282 Int = Intrinsic::aarch64_neon_frintn; 5283 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndn"); 5284 } 5285 case NEON::BI__builtin_neon_vrndp_v: 5286 case NEON::BI__builtin_neon_vrndpq_v: { 5287 Int = Intrinsic::ceil; 5288 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndp"); 5289 } 5290 case NEON::BI__builtin_neon_vrndx_v: 5291 case NEON::BI__builtin_neon_vrndxq_v: { 5292 Int = Intrinsic::rint; 5293 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndx"); 5294 } 5295 case NEON::BI__builtin_neon_vrnd_v: 5296 case NEON::BI__builtin_neon_vrndq_v: { 5297 Int = Intrinsic::trunc; 5298 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndz"); 5299 } 5300 case NEON::BI__builtin_neon_vceqz_v: 5301 case NEON::BI__builtin_neon_vceqzq_v: 5302 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OEQ, 5303 ICmpInst::ICMP_EQ, "vceqz"); 5304 case NEON::BI__builtin_neon_vcgez_v: 5305 case NEON::BI__builtin_neon_vcgezq_v: 5306 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGE, 5307 ICmpInst::ICMP_SGE, "vcgez"); 5308 case NEON::BI__builtin_neon_vclez_v: 5309 case NEON::BI__builtin_neon_vclezq_v: 5310 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLE, 5311 ICmpInst::ICMP_SLE, "vclez"); 5312 case NEON::BI__builtin_neon_vcgtz_v: 5313 case NEON::BI__builtin_neon_vcgtzq_v: 5314 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGT, 5315 ICmpInst::ICMP_SGT, "vcgtz"); 5316 case NEON::BI__builtin_neon_vcltz_v: 5317 case NEON::BI__builtin_neon_vcltzq_v: 5318 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLT, 5319 ICmpInst::ICMP_SLT, "vcltz"); 5320 case NEON::BI__builtin_neon_vcvt_f64_v: 5321 case NEON::BI__builtin_neon_vcvtq_f64_v: 5322 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5323 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad)); 5324 return usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 5325 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 5326 case NEON::BI__builtin_neon_vcvt_f64_f32: { 5327 assert(Type.getEltType() == NeonTypeFlags::Float64 && quad && 5328 "unexpected vcvt_f64_f32 builtin"); 5329 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float32, false, false); 5330 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 5331 5332 return Builder.CreateFPExt(Ops[0], Ty, "vcvt"); 5333 } 5334 case NEON::BI__builtin_neon_vcvt_f32_f64: { 5335 assert(Type.getEltType() == NeonTypeFlags::Float32 && 5336 "unexpected vcvt_f32_f64 builtin"); 5337 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float64, false, true); 5338 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 5339 5340 return Builder.CreateFPTrunc(Ops[0], Ty, "vcvt"); 5341 } 5342 case NEON::BI__builtin_neon_vcvt_s32_v: 5343 case NEON::BI__builtin_neon_vcvt_u32_v: 5344 case NEON::BI__builtin_neon_vcvt_s64_v: 5345 case NEON::BI__builtin_neon_vcvt_u64_v: 5346 case NEON::BI__builtin_neon_vcvtq_s32_v: 5347 case NEON::BI__builtin_neon_vcvtq_u32_v: 5348 case NEON::BI__builtin_neon_vcvtq_s64_v: 5349 case NEON::BI__builtin_neon_vcvtq_u64_v: { 5350 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 5351 if (usgn) 5352 return Builder.CreateFPToUI(Ops[0], Ty); 5353 return Builder.CreateFPToSI(Ops[0], Ty); 5354 } 5355 case NEON::BI__builtin_neon_vcvta_s32_v: 5356 case NEON::BI__builtin_neon_vcvtaq_s32_v: 5357 case NEON::BI__builtin_neon_vcvta_u32_v: 5358 case NEON::BI__builtin_neon_vcvtaq_u32_v: 5359 case NEON::BI__builtin_neon_vcvta_s64_v: 5360 case NEON::BI__builtin_neon_vcvtaq_s64_v: 5361 case NEON::BI__builtin_neon_vcvta_u64_v: 5362 case NEON::BI__builtin_neon_vcvtaq_u64_v: { 5363 Int = usgn ? Intrinsic::aarch64_neon_fcvtau : Intrinsic::aarch64_neon_fcvtas; 5364 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5365 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvta"); 5366 } 5367 case NEON::BI__builtin_neon_vcvtm_s32_v: 5368 case NEON::BI__builtin_neon_vcvtmq_s32_v: 5369 case NEON::BI__builtin_neon_vcvtm_u32_v: 5370 case NEON::BI__builtin_neon_vcvtmq_u32_v: 5371 case NEON::BI__builtin_neon_vcvtm_s64_v: 5372 case NEON::BI__builtin_neon_vcvtmq_s64_v: 5373 case NEON::BI__builtin_neon_vcvtm_u64_v: 5374 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 5375 Int = usgn ? Intrinsic::aarch64_neon_fcvtmu : Intrinsic::aarch64_neon_fcvtms; 5376 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5377 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtm"); 5378 } 5379 case NEON::BI__builtin_neon_vcvtn_s32_v: 5380 case NEON::BI__builtin_neon_vcvtnq_s32_v: 5381 case NEON::BI__builtin_neon_vcvtn_u32_v: 5382 case NEON::BI__builtin_neon_vcvtnq_u32_v: 5383 case NEON::BI__builtin_neon_vcvtn_s64_v: 5384 case NEON::BI__builtin_neon_vcvtnq_s64_v: 5385 case NEON::BI__builtin_neon_vcvtn_u64_v: 5386 case NEON::BI__builtin_neon_vcvtnq_u64_v: { 5387 Int = usgn ? Intrinsic::aarch64_neon_fcvtnu : Intrinsic::aarch64_neon_fcvtns; 5388 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5389 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtn"); 5390 } 5391 case NEON::BI__builtin_neon_vcvtp_s32_v: 5392 case NEON::BI__builtin_neon_vcvtpq_s32_v: 5393 case NEON::BI__builtin_neon_vcvtp_u32_v: 5394 case NEON::BI__builtin_neon_vcvtpq_u32_v: 5395 case NEON::BI__builtin_neon_vcvtp_s64_v: 5396 case NEON::BI__builtin_neon_vcvtpq_s64_v: 5397 case NEON::BI__builtin_neon_vcvtp_u64_v: 5398 case NEON::BI__builtin_neon_vcvtpq_u64_v: { 5399 Int = usgn ? Intrinsic::aarch64_neon_fcvtpu : Intrinsic::aarch64_neon_fcvtps; 5400 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5401 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtp"); 5402 } 5403 case NEON::BI__builtin_neon_vmulx_v: 5404 case NEON::BI__builtin_neon_vmulxq_v: { 5405 Int = Intrinsic::aarch64_neon_fmulx; 5406 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmulx"); 5407 } 5408 case NEON::BI__builtin_neon_vmul_lane_v: 5409 case NEON::BI__builtin_neon_vmul_laneq_v: { 5410 // v1f64 vmul_lane should be mapped to Neon scalar mul lane 5411 bool Quad = false; 5412 if (BuiltinID == NEON::BI__builtin_neon_vmul_laneq_v) 5413 Quad = true; 5414 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5415 llvm::Type *VTy = GetNeonType(this, 5416 NeonTypeFlags(NeonTypeFlags::Float64, false, Quad)); 5417 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 5418 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 5419 Value *Result = Builder.CreateFMul(Ops[0], Ops[1]); 5420 return Builder.CreateBitCast(Result, Ty); 5421 } 5422 case NEON::BI__builtin_neon_vnegd_s64: 5423 return Builder.CreateNeg(EmitScalarExpr(E->getArg(0)), "vnegd"); 5424 case NEON::BI__builtin_neon_vpmaxnm_v: 5425 case NEON::BI__builtin_neon_vpmaxnmq_v: { 5426 Int = Intrinsic::aarch64_neon_fmaxnmp; 5427 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmaxnm"); 5428 } 5429 case NEON::BI__builtin_neon_vpminnm_v: 5430 case NEON::BI__builtin_neon_vpminnmq_v: { 5431 Int = Intrinsic::aarch64_neon_fminnmp; 5432 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpminnm"); 5433 } 5434 case NEON::BI__builtin_neon_vsqrt_v: 5435 case NEON::BI__builtin_neon_vsqrtq_v: { 5436 Int = Intrinsic::sqrt; 5437 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5438 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqrt"); 5439 } 5440 case NEON::BI__builtin_neon_vrbit_v: 5441 case NEON::BI__builtin_neon_vrbitq_v: { 5442 Int = Intrinsic::aarch64_neon_rbit; 5443 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrbit"); 5444 } 5445 case NEON::BI__builtin_neon_vaddv_u8: 5446 // FIXME: These are handled by the AArch64 scalar code. 5447 usgn = true; 5448 // FALLTHROUGH 5449 case NEON::BI__builtin_neon_vaddv_s8: { 5450 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5451 Ty = Int32Ty; 5452 VTy = llvm::VectorType::get(Int8Ty, 8); 5453 llvm::Type *Tys[2] = { Ty, VTy }; 5454 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5455 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5456 return Builder.CreateTrunc(Ops[0], Int8Ty); 5457 } 5458 case NEON::BI__builtin_neon_vaddv_u16: 5459 usgn = true; 5460 // FALLTHROUGH 5461 case NEON::BI__builtin_neon_vaddv_s16: { 5462 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5463 Ty = Int32Ty; 5464 VTy = llvm::VectorType::get(Int16Ty, 4); 5465 llvm::Type *Tys[2] = { Ty, VTy }; 5466 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5467 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5468 return Builder.CreateTrunc(Ops[0], Int16Ty); 5469 } 5470 case NEON::BI__builtin_neon_vaddvq_u8: 5471 usgn = true; 5472 // FALLTHROUGH 5473 case NEON::BI__builtin_neon_vaddvq_s8: { 5474 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5475 Ty = Int32Ty; 5476 VTy = llvm::VectorType::get(Int8Ty, 16); 5477 llvm::Type *Tys[2] = { Ty, VTy }; 5478 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5479 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5480 return Builder.CreateTrunc(Ops[0], Int8Ty); 5481 } 5482 case NEON::BI__builtin_neon_vaddvq_u16: 5483 usgn = true; 5484 // FALLTHROUGH 5485 case NEON::BI__builtin_neon_vaddvq_s16: { 5486 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5487 Ty = Int32Ty; 5488 VTy = llvm::VectorType::get(Int16Ty, 8); 5489 llvm::Type *Tys[2] = { Ty, VTy }; 5490 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5491 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5492 return Builder.CreateTrunc(Ops[0], Int16Ty); 5493 } 5494 case NEON::BI__builtin_neon_vmaxv_u8: { 5495 Int = Intrinsic::aarch64_neon_umaxv; 5496 Ty = Int32Ty; 5497 VTy = llvm::VectorType::get(Int8Ty, 8); 5498 llvm::Type *Tys[2] = { Ty, VTy }; 5499 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5500 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5501 return Builder.CreateTrunc(Ops[0], Int8Ty); 5502 } 5503 case NEON::BI__builtin_neon_vmaxv_u16: { 5504 Int = Intrinsic::aarch64_neon_umaxv; 5505 Ty = Int32Ty; 5506 VTy = llvm::VectorType::get(Int16Ty, 4); 5507 llvm::Type *Tys[2] = { Ty, VTy }; 5508 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5509 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5510 return Builder.CreateTrunc(Ops[0], Int16Ty); 5511 } 5512 case NEON::BI__builtin_neon_vmaxvq_u8: { 5513 Int = Intrinsic::aarch64_neon_umaxv; 5514 Ty = Int32Ty; 5515 VTy = llvm::VectorType::get(Int8Ty, 16); 5516 llvm::Type *Tys[2] = { Ty, VTy }; 5517 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5518 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5519 return Builder.CreateTrunc(Ops[0], Int8Ty); 5520 } 5521 case NEON::BI__builtin_neon_vmaxvq_u16: { 5522 Int = Intrinsic::aarch64_neon_umaxv; 5523 Ty = Int32Ty; 5524 VTy = llvm::VectorType::get(Int16Ty, 8); 5525 llvm::Type *Tys[2] = { Ty, VTy }; 5526 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5527 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5528 return Builder.CreateTrunc(Ops[0], Int16Ty); 5529 } 5530 case NEON::BI__builtin_neon_vmaxv_s8: { 5531 Int = Intrinsic::aarch64_neon_smaxv; 5532 Ty = Int32Ty; 5533 VTy = llvm::VectorType::get(Int8Ty, 8); 5534 llvm::Type *Tys[2] = { Ty, VTy }; 5535 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5536 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5537 return Builder.CreateTrunc(Ops[0], Int8Ty); 5538 } 5539 case NEON::BI__builtin_neon_vmaxv_s16: { 5540 Int = Intrinsic::aarch64_neon_smaxv; 5541 Ty = Int32Ty; 5542 VTy = llvm::VectorType::get(Int16Ty, 4); 5543 llvm::Type *Tys[2] = { Ty, VTy }; 5544 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5545 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5546 return Builder.CreateTrunc(Ops[0], Int16Ty); 5547 } 5548 case NEON::BI__builtin_neon_vmaxvq_s8: { 5549 Int = Intrinsic::aarch64_neon_smaxv; 5550 Ty = Int32Ty; 5551 VTy = llvm::VectorType::get(Int8Ty, 16); 5552 llvm::Type *Tys[2] = { Ty, VTy }; 5553 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5554 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5555 return Builder.CreateTrunc(Ops[0], Int8Ty); 5556 } 5557 case NEON::BI__builtin_neon_vmaxvq_s16: { 5558 Int = Intrinsic::aarch64_neon_smaxv; 5559 Ty = Int32Ty; 5560 VTy = llvm::VectorType::get(Int16Ty, 8); 5561 llvm::Type *Tys[2] = { Ty, VTy }; 5562 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5563 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5564 return Builder.CreateTrunc(Ops[0], Int16Ty); 5565 } 5566 case NEON::BI__builtin_neon_vminv_u8: { 5567 Int = Intrinsic::aarch64_neon_uminv; 5568 Ty = Int32Ty; 5569 VTy = llvm::VectorType::get(Int8Ty, 8); 5570 llvm::Type *Tys[2] = { Ty, VTy }; 5571 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5572 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5573 return Builder.CreateTrunc(Ops[0], Int8Ty); 5574 } 5575 case NEON::BI__builtin_neon_vminv_u16: { 5576 Int = Intrinsic::aarch64_neon_uminv; 5577 Ty = Int32Ty; 5578 VTy = llvm::VectorType::get(Int16Ty, 4); 5579 llvm::Type *Tys[2] = { Ty, VTy }; 5580 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5581 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5582 return Builder.CreateTrunc(Ops[0], Int16Ty); 5583 } 5584 case NEON::BI__builtin_neon_vminvq_u8: { 5585 Int = Intrinsic::aarch64_neon_uminv; 5586 Ty = Int32Ty; 5587 VTy = llvm::VectorType::get(Int8Ty, 16); 5588 llvm::Type *Tys[2] = { Ty, VTy }; 5589 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5590 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5591 return Builder.CreateTrunc(Ops[0], Int8Ty); 5592 } 5593 case NEON::BI__builtin_neon_vminvq_u16: { 5594 Int = Intrinsic::aarch64_neon_uminv; 5595 Ty = Int32Ty; 5596 VTy = llvm::VectorType::get(Int16Ty, 8); 5597 llvm::Type *Tys[2] = { Ty, VTy }; 5598 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5599 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5600 return Builder.CreateTrunc(Ops[0], Int16Ty); 5601 } 5602 case NEON::BI__builtin_neon_vminv_s8: { 5603 Int = Intrinsic::aarch64_neon_sminv; 5604 Ty = Int32Ty; 5605 VTy = llvm::VectorType::get(Int8Ty, 8); 5606 llvm::Type *Tys[2] = { Ty, VTy }; 5607 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5608 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5609 return Builder.CreateTrunc(Ops[0], Int8Ty); 5610 } 5611 case NEON::BI__builtin_neon_vminv_s16: { 5612 Int = Intrinsic::aarch64_neon_sminv; 5613 Ty = Int32Ty; 5614 VTy = llvm::VectorType::get(Int16Ty, 4); 5615 llvm::Type *Tys[2] = { Ty, VTy }; 5616 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5617 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5618 return Builder.CreateTrunc(Ops[0], Int16Ty); 5619 } 5620 case NEON::BI__builtin_neon_vminvq_s8: { 5621 Int = Intrinsic::aarch64_neon_sminv; 5622 Ty = Int32Ty; 5623 VTy = llvm::VectorType::get(Int8Ty, 16); 5624 llvm::Type *Tys[2] = { Ty, VTy }; 5625 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5626 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5627 return Builder.CreateTrunc(Ops[0], Int8Ty); 5628 } 5629 case NEON::BI__builtin_neon_vminvq_s16: { 5630 Int = Intrinsic::aarch64_neon_sminv; 5631 Ty = Int32Ty; 5632 VTy = llvm::VectorType::get(Int16Ty, 8); 5633 llvm::Type *Tys[2] = { Ty, VTy }; 5634 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5635 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5636 return Builder.CreateTrunc(Ops[0], Int16Ty); 5637 } 5638 case NEON::BI__builtin_neon_vmul_n_f64: { 5639 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5640 Value *RHS = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), DoubleTy); 5641 return Builder.CreateFMul(Ops[0], RHS); 5642 } 5643 case NEON::BI__builtin_neon_vaddlv_u8: { 5644 Int = Intrinsic::aarch64_neon_uaddlv; 5645 Ty = Int32Ty; 5646 VTy = llvm::VectorType::get(Int8Ty, 8); 5647 llvm::Type *Tys[2] = { Ty, VTy }; 5648 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5649 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5650 return Builder.CreateTrunc(Ops[0], Int16Ty); 5651 } 5652 case NEON::BI__builtin_neon_vaddlv_u16: { 5653 Int = Intrinsic::aarch64_neon_uaddlv; 5654 Ty = Int32Ty; 5655 VTy = llvm::VectorType::get(Int16Ty, 4); 5656 llvm::Type *Tys[2] = { Ty, VTy }; 5657 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5658 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5659 } 5660 case NEON::BI__builtin_neon_vaddlvq_u8: { 5661 Int = Intrinsic::aarch64_neon_uaddlv; 5662 Ty = Int32Ty; 5663 VTy = llvm::VectorType::get(Int8Ty, 16); 5664 llvm::Type *Tys[2] = { Ty, VTy }; 5665 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5666 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5667 return Builder.CreateTrunc(Ops[0], Int16Ty); 5668 } 5669 case NEON::BI__builtin_neon_vaddlvq_u16: { 5670 Int = Intrinsic::aarch64_neon_uaddlv; 5671 Ty = Int32Ty; 5672 VTy = llvm::VectorType::get(Int16Ty, 8); 5673 llvm::Type *Tys[2] = { Ty, VTy }; 5674 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5675 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5676 } 5677 case NEON::BI__builtin_neon_vaddlv_s8: { 5678 Int = Intrinsic::aarch64_neon_saddlv; 5679 Ty = Int32Ty; 5680 VTy = llvm::VectorType::get(Int8Ty, 8); 5681 llvm::Type *Tys[2] = { Ty, VTy }; 5682 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5683 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5684 return Builder.CreateTrunc(Ops[0], Int16Ty); 5685 } 5686 case NEON::BI__builtin_neon_vaddlv_s16: { 5687 Int = Intrinsic::aarch64_neon_saddlv; 5688 Ty = Int32Ty; 5689 VTy = llvm::VectorType::get(Int16Ty, 4); 5690 llvm::Type *Tys[2] = { Ty, VTy }; 5691 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5692 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5693 } 5694 case NEON::BI__builtin_neon_vaddlvq_s8: { 5695 Int = Intrinsic::aarch64_neon_saddlv; 5696 Ty = Int32Ty; 5697 VTy = llvm::VectorType::get(Int8Ty, 16); 5698 llvm::Type *Tys[2] = { Ty, VTy }; 5699 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5700 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5701 return Builder.CreateTrunc(Ops[0], Int16Ty); 5702 } 5703 case NEON::BI__builtin_neon_vaddlvq_s16: { 5704 Int = Intrinsic::aarch64_neon_saddlv; 5705 Ty = Int32Ty; 5706 VTy = llvm::VectorType::get(Int16Ty, 8); 5707 llvm::Type *Tys[2] = { Ty, VTy }; 5708 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5709 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5710 } 5711 case NEON::BI__builtin_neon_vsri_n_v: 5712 case NEON::BI__builtin_neon_vsriq_n_v: { 5713 Int = Intrinsic::aarch64_neon_vsri; 5714 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 5715 return EmitNeonCall(Intrin, Ops, "vsri_n"); 5716 } 5717 case NEON::BI__builtin_neon_vsli_n_v: 5718 case NEON::BI__builtin_neon_vsliq_n_v: { 5719 Int = Intrinsic::aarch64_neon_vsli; 5720 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 5721 return EmitNeonCall(Intrin, Ops, "vsli_n"); 5722 } 5723 case NEON::BI__builtin_neon_vsra_n_v: 5724 case NEON::BI__builtin_neon_vsraq_n_v: 5725 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5726 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 5727 return Builder.CreateAdd(Ops[0], Ops[1]); 5728 case NEON::BI__builtin_neon_vrsra_n_v: 5729 case NEON::BI__builtin_neon_vrsraq_n_v: { 5730 Int = usgn ? Intrinsic::aarch64_neon_urshl : Intrinsic::aarch64_neon_srshl; 5731 SmallVector<llvm::Value*,2> TmpOps; 5732 TmpOps.push_back(Ops[1]); 5733 TmpOps.push_back(Ops[2]); 5734 Function* F = CGM.getIntrinsic(Int, Ty); 5735 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vrshr_n", 1, true); 5736 Ops[0] = Builder.CreateBitCast(Ops[0], VTy); 5737 return Builder.CreateAdd(Ops[0], tmp); 5738 } 5739 // FIXME: Sharing loads & stores with 32-bit is complicated by the absence 5740 // of an Align parameter here. 5741 case NEON::BI__builtin_neon_vld1_x2_v: 5742 case NEON::BI__builtin_neon_vld1q_x2_v: 5743 case NEON::BI__builtin_neon_vld1_x3_v: 5744 case NEON::BI__builtin_neon_vld1q_x3_v: 5745 case NEON::BI__builtin_neon_vld1_x4_v: 5746 case NEON::BI__builtin_neon_vld1q_x4_v: { 5747 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 5748 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5749 llvm::Type *Tys[2] = { VTy, PTy }; 5750 unsigned Int; 5751 switch (BuiltinID) { 5752 case NEON::BI__builtin_neon_vld1_x2_v: 5753 case NEON::BI__builtin_neon_vld1q_x2_v: 5754 Int = Intrinsic::aarch64_neon_ld1x2; 5755 break; 5756 case NEON::BI__builtin_neon_vld1_x3_v: 5757 case NEON::BI__builtin_neon_vld1q_x3_v: 5758 Int = Intrinsic::aarch64_neon_ld1x3; 5759 break; 5760 case NEON::BI__builtin_neon_vld1_x4_v: 5761 case NEON::BI__builtin_neon_vld1q_x4_v: 5762 Int = Intrinsic::aarch64_neon_ld1x4; 5763 break; 5764 } 5765 Function *F = CGM.getIntrinsic(Int, Tys); 5766 Ops[1] = Builder.CreateCall(F, Ops[1], "vld1xN"); 5767 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5768 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5769 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5770 } 5771 case NEON::BI__builtin_neon_vst1_x2_v: 5772 case NEON::BI__builtin_neon_vst1q_x2_v: 5773 case NEON::BI__builtin_neon_vst1_x3_v: 5774 case NEON::BI__builtin_neon_vst1q_x3_v: 5775 case NEON::BI__builtin_neon_vst1_x4_v: 5776 case NEON::BI__builtin_neon_vst1q_x4_v: { 5777 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 5778 llvm::Type *Tys[2] = { VTy, PTy }; 5779 unsigned Int; 5780 switch (BuiltinID) { 5781 case NEON::BI__builtin_neon_vst1_x2_v: 5782 case NEON::BI__builtin_neon_vst1q_x2_v: 5783 Int = Intrinsic::aarch64_neon_st1x2; 5784 break; 5785 case NEON::BI__builtin_neon_vst1_x3_v: 5786 case NEON::BI__builtin_neon_vst1q_x3_v: 5787 Int = Intrinsic::aarch64_neon_st1x3; 5788 break; 5789 case NEON::BI__builtin_neon_vst1_x4_v: 5790 case NEON::BI__builtin_neon_vst1q_x4_v: 5791 Int = Intrinsic::aarch64_neon_st1x4; 5792 break; 5793 } 5794 std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end()); 5795 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 5796 } 5797 case NEON::BI__builtin_neon_vld1_v: 5798 case NEON::BI__builtin_neon_vld1q_v: 5799 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 5800 return Builder.CreateDefaultAlignedLoad(Ops[0]); 5801 case NEON::BI__builtin_neon_vst1_v: 5802 case NEON::BI__builtin_neon_vst1q_v: 5803 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 5804 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 5805 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5806 case NEON::BI__builtin_neon_vld1_lane_v: 5807 case NEON::BI__builtin_neon_vld1q_lane_v: 5808 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5809 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 5810 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5811 Ops[0] = Builder.CreateDefaultAlignedLoad(Ops[0]); 5812 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vld1_lane"); 5813 case NEON::BI__builtin_neon_vld1_dup_v: 5814 case NEON::BI__builtin_neon_vld1q_dup_v: { 5815 Value *V = UndefValue::get(Ty); 5816 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 5817 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5818 Ops[0] = Builder.CreateDefaultAlignedLoad(Ops[0]); 5819 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 5820 Ops[0] = Builder.CreateInsertElement(V, Ops[0], CI); 5821 return EmitNeonSplat(Ops[0], CI); 5822 } 5823 case NEON::BI__builtin_neon_vst1_lane_v: 5824 case NEON::BI__builtin_neon_vst1q_lane_v: 5825 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5826 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 5827 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5828 return Builder.CreateDefaultAlignedStore(Ops[1], 5829 Builder.CreateBitCast(Ops[0], Ty)); 5830 case NEON::BI__builtin_neon_vld2_v: 5831 case NEON::BI__builtin_neon_vld2q_v: { 5832 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 5833 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5834 llvm::Type *Tys[2] = { VTy, PTy }; 5835 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2, Tys); 5836 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 5837 Ops[0] = Builder.CreateBitCast(Ops[0], 5838 llvm::PointerType::getUnqual(Ops[1]->getType())); 5839 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5840 } 5841 case NEON::BI__builtin_neon_vld3_v: 5842 case NEON::BI__builtin_neon_vld3q_v: { 5843 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 5844 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5845 llvm::Type *Tys[2] = { VTy, PTy }; 5846 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3, Tys); 5847 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 5848 Ops[0] = Builder.CreateBitCast(Ops[0], 5849 llvm::PointerType::getUnqual(Ops[1]->getType())); 5850 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5851 } 5852 case NEON::BI__builtin_neon_vld4_v: 5853 case NEON::BI__builtin_neon_vld4q_v: { 5854 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 5855 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5856 llvm::Type *Tys[2] = { VTy, PTy }; 5857 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4, Tys); 5858 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 5859 Ops[0] = Builder.CreateBitCast(Ops[0], 5860 llvm::PointerType::getUnqual(Ops[1]->getType())); 5861 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5862 } 5863 case NEON::BI__builtin_neon_vld2_dup_v: 5864 case NEON::BI__builtin_neon_vld2q_dup_v: { 5865 llvm::Type *PTy = 5866 llvm::PointerType::getUnqual(VTy->getElementType()); 5867 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5868 llvm::Type *Tys[2] = { VTy, PTy }; 5869 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2r, Tys); 5870 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 5871 Ops[0] = Builder.CreateBitCast(Ops[0], 5872 llvm::PointerType::getUnqual(Ops[1]->getType())); 5873 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5874 } 5875 case NEON::BI__builtin_neon_vld3_dup_v: 5876 case NEON::BI__builtin_neon_vld3q_dup_v: { 5877 llvm::Type *PTy = 5878 llvm::PointerType::getUnqual(VTy->getElementType()); 5879 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5880 llvm::Type *Tys[2] = { VTy, PTy }; 5881 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3r, Tys); 5882 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 5883 Ops[0] = Builder.CreateBitCast(Ops[0], 5884 llvm::PointerType::getUnqual(Ops[1]->getType())); 5885 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5886 } 5887 case NEON::BI__builtin_neon_vld4_dup_v: 5888 case NEON::BI__builtin_neon_vld4q_dup_v: { 5889 llvm::Type *PTy = 5890 llvm::PointerType::getUnqual(VTy->getElementType()); 5891 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5892 llvm::Type *Tys[2] = { VTy, PTy }; 5893 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4r, Tys); 5894 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 5895 Ops[0] = Builder.CreateBitCast(Ops[0], 5896 llvm::PointerType::getUnqual(Ops[1]->getType())); 5897 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5898 } 5899 case NEON::BI__builtin_neon_vld2_lane_v: 5900 case NEON::BI__builtin_neon_vld2q_lane_v: { 5901 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 5902 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2lane, Tys); 5903 Ops.push_back(Ops[1]); 5904 Ops.erase(Ops.begin()+1); 5905 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5906 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5907 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 5908 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld2_lane"); 5909 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5910 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5911 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5912 } 5913 case NEON::BI__builtin_neon_vld3_lane_v: 5914 case NEON::BI__builtin_neon_vld3q_lane_v: { 5915 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 5916 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3lane, Tys); 5917 Ops.push_back(Ops[1]); 5918 Ops.erase(Ops.begin()+1); 5919 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5920 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5921 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 5922 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 5923 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld3_lane"); 5924 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5925 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5926 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5927 } 5928 case NEON::BI__builtin_neon_vld4_lane_v: 5929 case NEON::BI__builtin_neon_vld4q_lane_v: { 5930 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 5931 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4lane, Tys); 5932 Ops.push_back(Ops[1]); 5933 Ops.erase(Ops.begin()+1); 5934 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5935 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5936 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 5937 Ops[4] = Builder.CreateBitCast(Ops[4], Ty); 5938 Ops[5] = Builder.CreateZExt(Ops[5], Int64Ty); 5939 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld4_lane"); 5940 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5941 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5942 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5943 } 5944 case NEON::BI__builtin_neon_vst2_v: 5945 case NEON::BI__builtin_neon_vst2q_v: { 5946 Ops.push_back(Ops[0]); 5947 Ops.erase(Ops.begin()); 5948 llvm::Type *Tys[2] = { VTy, Ops[2]->getType() }; 5949 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2, Tys), 5950 Ops, ""); 5951 } 5952 case NEON::BI__builtin_neon_vst2_lane_v: 5953 case NEON::BI__builtin_neon_vst2q_lane_v: { 5954 Ops.push_back(Ops[0]); 5955 Ops.erase(Ops.begin()); 5956 Ops[2] = Builder.CreateZExt(Ops[2], Int64Ty); 5957 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 5958 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2lane, Tys), 5959 Ops, ""); 5960 } 5961 case NEON::BI__builtin_neon_vst3_v: 5962 case NEON::BI__builtin_neon_vst3q_v: { 5963 Ops.push_back(Ops[0]); 5964 Ops.erase(Ops.begin()); 5965 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 5966 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3, Tys), 5967 Ops, ""); 5968 } 5969 case NEON::BI__builtin_neon_vst3_lane_v: 5970 case NEON::BI__builtin_neon_vst3q_lane_v: { 5971 Ops.push_back(Ops[0]); 5972 Ops.erase(Ops.begin()); 5973 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 5974 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 5975 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3lane, Tys), 5976 Ops, ""); 5977 } 5978 case NEON::BI__builtin_neon_vst4_v: 5979 case NEON::BI__builtin_neon_vst4q_v: { 5980 Ops.push_back(Ops[0]); 5981 Ops.erase(Ops.begin()); 5982 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 5983 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4, Tys), 5984 Ops, ""); 5985 } 5986 case NEON::BI__builtin_neon_vst4_lane_v: 5987 case NEON::BI__builtin_neon_vst4q_lane_v: { 5988 Ops.push_back(Ops[0]); 5989 Ops.erase(Ops.begin()); 5990 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 5991 llvm::Type *Tys[2] = { VTy, Ops[5]->getType() }; 5992 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4lane, Tys), 5993 Ops, ""); 5994 } 5995 case NEON::BI__builtin_neon_vtrn_v: 5996 case NEON::BI__builtin_neon_vtrnq_v: { 5997 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 5998 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5999 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6000 Value *SV = nullptr; 6001 6002 for (unsigned vi = 0; vi != 2; ++vi) { 6003 SmallVector<Constant*, 16> Indices; 6004 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 6005 Indices.push_back(ConstantInt::get(Int32Ty, i+vi)); 6006 Indices.push_back(ConstantInt::get(Int32Ty, i+e+vi)); 6007 } 6008 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6009 SV = llvm::ConstantVector::get(Indices); 6010 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vtrn"); 6011 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6012 } 6013 return SV; 6014 } 6015 case NEON::BI__builtin_neon_vuzp_v: 6016 case NEON::BI__builtin_neon_vuzpq_v: { 6017 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 6018 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6019 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6020 Value *SV = nullptr; 6021 6022 for (unsigned vi = 0; vi != 2; ++vi) { 6023 SmallVector<Constant*, 16> Indices; 6024 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 6025 Indices.push_back(ConstantInt::get(Int32Ty, 2*i+vi)); 6026 6027 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6028 SV = llvm::ConstantVector::get(Indices); 6029 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vuzp"); 6030 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6031 } 6032 return SV; 6033 } 6034 case NEON::BI__builtin_neon_vzip_v: 6035 case NEON::BI__builtin_neon_vzipq_v: { 6036 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 6037 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6038 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6039 Value *SV = nullptr; 6040 6041 for (unsigned vi = 0; vi != 2; ++vi) { 6042 SmallVector<Constant*, 16> Indices; 6043 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 6044 Indices.push_back(ConstantInt::get(Int32Ty, (i + vi*e) >> 1)); 6045 Indices.push_back(ConstantInt::get(Int32Ty, ((i + vi*e) >> 1)+e)); 6046 } 6047 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6048 SV = llvm::ConstantVector::get(Indices); 6049 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vzip"); 6050 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6051 } 6052 return SV; 6053 } 6054 case NEON::BI__builtin_neon_vqtbl1q_v: { 6055 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl1, Ty), 6056 Ops, "vtbl1"); 6057 } 6058 case NEON::BI__builtin_neon_vqtbl2q_v: { 6059 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl2, Ty), 6060 Ops, "vtbl2"); 6061 } 6062 case NEON::BI__builtin_neon_vqtbl3q_v: { 6063 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl3, Ty), 6064 Ops, "vtbl3"); 6065 } 6066 case NEON::BI__builtin_neon_vqtbl4q_v: { 6067 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl4, Ty), 6068 Ops, "vtbl4"); 6069 } 6070 case NEON::BI__builtin_neon_vqtbx1q_v: { 6071 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx1, Ty), 6072 Ops, "vtbx1"); 6073 } 6074 case NEON::BI__builtin_neon_vqtbx2q_v: { 6075 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx2, Ty), 6076 Ops, "vtbx2"); 6077 } 6078 case NEON::BI__builtin_neon_vqtbx3q_v: { 6079 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx3, Ty), 6080 Ops, "vtbx3"); 6081 } 6082 case NEON::BI__builtin_neon_vqtbx4q_v: { 6083 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx4, Ty), 6084 Ops, "vtbx4"); 6085 } 6086 case NEON::BI__builtin_neon_vsqadd_v: 6087 case NEON::BI__builtin_neon_vsqaddq_v: { 6088 Int = Intrinsic::aarch64_neon_usqadd; 6089 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqadd"); 6090 } 6091 case NEON::BI__builtin_neon_vuqadd_v: 6092 case NEON::BI__builtin_neon_vuqaddq_v: { 6093 Int = Intrinsic::aarch64_neon_suqadd; 6094 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vuqadd"); 6095 } 6096 } 6097 } 6098 6099 llvm::Value *CodeGenFunction:: 6100 BuildVector(ArrayRef<llvm::Value*> Ops) { 6101 assert((Ops.size() & (Ops.size() - 1)) == 0 && 6102 "Not a power-of-two sized vector!"); 6103 bool AllConstants = true; 6104 for (unsigned i = 0, e = Ops.size(); i != e && AllConstants; ++i) 6105 AllConstants &= isa<Constant>(Ops[i]); 6106 6107 // If this is a constant vector, create a ConstantVector. 6108 if (AllConstants) { 6109 SmallVector<llvm::Constant*, 16> CstOps; 6110 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 6111 CstOps.push_back(cast<Constant>(Ops[i])); 6112 return llvm::ConstantVector::get(CstOps); 6113 } 6114 6115 // Otherwise, insertelement the values to build the vector. 6116 Value *Result = 6117 llvm::UndefValue::get(llvm::VectorType::get(Ops[0]->getType(), Ops.size())); 6118 6119 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 6120 Result = Builder.CreateInsertElement(Result, Ops[i], Builder.getInt32(i)); 6121 6122 return Result; 6123 } 6124 6125 Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, 6126 const CallExpr *E) { 6127 if (BuiltinID == X86::BI__builtin_ms_va_start || 6128 BuiltinID == X86::BI__builtin_ms_va_end) 6129 return EmitVAStartEnd(EmitMSVAListRef(E->getArg(0)).getPointer(), 6130 BuiltinID == X86::BI__builtin_ms_va_start); 6131 if (BuiltinID == X86::BI__builtin_ms_va_copy) { 6132 // Lower this manually. We can't reliably determine whether or not any 6133 // given va_copy() is for a Win64 va_list from the calling convention 6134 // alone, because it's legal to do this from a System V ABI function. 6135 // With opaque pointer types, we won't have enough information in LLVM 6136 // IR to determine this from the argument types, either. Best to do it 6137 // now, while we have enough information. 6138 Address DestAddr = EmitMSVAListRef(E->getArg(0)); 6139 Address SrcAddr = EmitMSVAListRef(E->getArg(1)); 6140 6141 llvm::Type *BPP = Int8PtrPtrTy; 6142 6143 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), BPP, "cp"), 6144 DestAddr.getAlignment()); 6145 SrcAddr = Address(Builder.CreateBitCast(SrcAddr.getPointer(), BPP, "ap"), 6146 SrcAddr.getAlignment()); 6147 6148 Value *ArgPtr = Builder.CreateLoad(SrcAddr, "ap.val"); 6149 return Builder.CreateStore(ArgPtr, DestAddr); 6150 } 6151 6152 SmallVector<Value*, 4> Ops; 6153 6154 // Find out if any arguments are required to be integer constant expressions. 6155 unsigned ICEArguments = 0; 6156 ASTContext::GetBuiltinTypeError Error; 6157 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 6158 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 6159 6160 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) { 6161 // If this is a normal argument, just emit it as a scalar. 6162 if ((ICEArguments & (1 << i)) == 0) { 6163 Ops.push_back(EmitScalarExpr(E->getArg(i))); 6164 continue; 6165 } 6166 6167 // If this is required to be a constant, constant fold it so that we know 6168 // that the generated intrinsic gets a ConstantInt. 6169 llvm::APSInt Result; 6170 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 6171 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 6172 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 6173 } 6174 6175 switch (BuiltinID) { 6176 default: return nullptr; 6177 case X86::BI__builtin_cpu_supports: { 6178 const Expr *FeatureExpr = E->getArg(0)->IgnoreParenCasts(); 6179 StringRef FeatureStr = cast<StringLiteral>(FeatureExpr)->getString(); 6180 6181 // TODO: When/if this becomes more than x86 specific then use a TargetInfo 6182 // based mapping. 6183 // Processor features and mapping to processor feature value. 6184 enum X86Features { 6185 CMOV = 0, 6186 MMX, 6187 POPCNT, 6188 SSE, 6189 SSE2, 6190 SSE3, 6191 SSSE3, 6192 SSE4_1, 6193 SSE4_2, 6194 AVX, 6195 AVX2, 6196 SSE4_A, 6197 FMA4, 6198 XOP, 6199 FMA, 6200 AVX512F, 6201 BMI, 6202 BMI2, 6203 MAX 6204 }; 6205 6206 X86Features Feature = StringSwitch<X86Features>(FeatureStr) 6207 .Case("cmov", X86Features::CMOV) 6208 .Case("mmx", X86Features::MMX) 6209 .Case("popcnt", X86Features::POPCNT) 6210 .Case("sse", X86Features::SSE) 6211 .Case("sse2", X86Features::SSE2) 6212 .Case("sse3", X86Features::SSE3) 6213 .Case("sse4.1", X86Features::SSE4_1) 6214 .Case("sse4.2", X86Features::SSE4_2) 6215 .Case("avx", X86Features::AVX) 6216 .Case("avx2", X86Features::AVX2) 6217 .Case("sse4a", X86Features::SSE4_A) 6218 .Case("fma4", X86Features::FMA4) 6219 .Case("xop", X86Features::XOP) 6220 .Case("fma", X86Features::FMA) 6221 .Case("avx512f", X86Features::AVX512F) 6222 .Case("bmi", X86Features::BMI) 6223 .Case("bmi2", X86Features::BMI2) 6224 .Default(X86Features::MAX); 6225 assert(Feature != X86Features::MAX && "Invalid feature!"); 6226 6227 // Matching the struct layout from the compiler-rt/libgcc structure that is 6228 // filled in: 6229 // unsigned int __cpu_vendor; 6230 // unsigned int __cpu_type; 6231 // unsigned int __cpu_subtype; 6232 // unsigned int __cpu_features[1]; 6233 llvm::Type *STy = llvm::StructType::get( 6234 Int32Ty, Int32Ty, Int32Ty, llvm::ArrayType::get(Int32Ty, 1), nullptr); 6235 6236 // Grab the global __cpu_model. 6237 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 6238 6239 // Grab the first (0th) element from the field __cpu_features off of the 6240 // global in the struct STy. 6241 Value *Idxs[] = { 6242 ConstantInt::get(Int32Ty, 0), 6243 ConstantInt::get(Int32Ty, 3), 6244 ConstantInt::get(Int32Ty, 0) 6245 }; 6246 Value *CpuFeatures = Builder.CreateGEP(STy, CpuModel, Idxs); 6247 Value *Features = Builder.CreateAlignedLoad(CpuFeatures, 6248 CharUnits::fromQuantity(4)); 6249 6250 // Check the value of the bit corresponding to the feature requested. 6251 Value *Bitset = Builder.CreateAnd( 6252 Features, llvm::ConstantInt::get(Int32Ty, 1 << Feature)); 6253 return Builder.CreateICmpNE(Bitset, llvm::ConstantInt::get(Int32Ty, 0)); 6254 } 6255 case X86::BI_mm_prefetch: { 6256 Value *Address = Ops[0]; 6257 Value *RW = ConstantInt::get(Int32Ty, 0); 6258 Value *Locality = Ops[1]; 6259 Value *Data = ConstantInt::get(Int32Ty, 1); 6260 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 6261 return Builder.CreateCall(F, {Address, RW, Locality, Data}); 6262 } 6263 case X86::BI__builtin_ia32_undef128: 6264 case X86::BI__builtin_ia32_undef256: 6265 case X86::BI__builtin_ia32_undef512: 6266 return UndefValue::get(ConvertType(E->getType())); 6267 case X86::BI__builtin_ia32_vec_init_v8qi: 6268 case X86::BI__builtin_ia32_vec_init_v4hi: 6269 case X86::BI__builtin_ia32_vec_init_v2si: 6270 return Builder.CreateBitCast(BuildVector(Ops), 6271 llvm::Type::getX86_MMXTy(getLLVMContext())); 6272 case X86::BI__builtin_ia32_vec_ext_v2si: 6273 return Builder.CreateExtractElement(Ops[0], 6274 llvm::ConstantInt::get(Ops[1]->getType(), 0)); 6275 case X86::BI__builtin_ia32_ldmxcsr: { 6276 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 6277 Builder.CreateStore(Ops[0], Tmp); 6278 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_ldmxcsr), 6279 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 6280 } 6281 case X86::BI__builtin_ia32_stmxcsr: { 6282 Address Tmp = CreateMemTemp(E->getType()); 6283 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_stmxcsr), 6284 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 6285 return Builder.CreateLoad(Tmp, "stmxcsr"); 6286 } 6287 case X86::BI__builtin_ia32_xsave: 6288 case X86::BI__builtin_ia32_xsave64: 6289 case X86::BI__builtin_ia32_xrstor: 6290 case X86::BI__builtin_ia32_xrstor64: 6291 case X86::BI__builtin_ia32_xsaveopt: 6292 case X86::BI__builtin_ia32_xsaveopt64: 6293 case X86::BI__builtin_ia32_xrstors: 6294 case X86::BI__builtin_ia32_xrstors64: 6295 case X86::BI__builtin_ia32_xsavec: 6296 case X86::BI__builtin_ia32_xsavec64: 6297 case X86::BI__builtin_ia32_xsaves: 6298 case X86::BI__builtin_ia32_xsaves64: { 6299 Intrinsic::ID ID; 6300 #define INTRINSIC_X86_XSAVE_ID(NAME) \ 6301 case X86::BI__builtin_ia32_##NAME: \ 6302 ID = Intrinsic::x86_##NAME; \ 6303 break 6304 switch (BuiltinID) { 6305 default: llvm_unreachable("Unsupported intrinsic!"); 6306 INTRINSIC_X86_XSAVE_ID(xsave); 6307 INTRINSIC_X86_XSAVE_ID(xsave64); 6308 INTRINSIC_X86_XSAVE_ID(xrstor); 6309 INTRINSIC_X86_XSAVE_ID(xrstor64); 6310 INTRINSIC_X86_XSAVE_ID(xsaveopt); 6311 INTRINSIC_X86_XSAVE_ID(xsaveopt64); 6312 INTRINSIC_X86_XSAVE_ID(xrstors); 6313 INTRINSIC_X86_XSAVE_ID(xrstors64); 6314 INTRINSIC_X86_XSAVE_ID(xsavec); 6315 INTRINSIC_X86_XSAVE_ID(xsavec64); 6316 INTRINSIC_X86_XSAVE_ID(xsaves); 6317 INTRINSIC_X86_XSAVE_ID(xsaves64); 6318 } 6319 #undef INTRINSIC_X86_XSAVE_ID 6320 Value *Mhi = Builder.CreateTrunc( 6321 Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, 32)), Int32Ty); 6322 Value *Mlo = Builder.CreateTrunc(Ops[1], Int32Ty); 6323 Ops[1] = Mhi; 6324 Ops.push_back(Mlo); 6325 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 6326 } 6327 case X86::BI__builtin_ia32_storehps: 6328 case X86::BI__builtin_ia32_storelps: { 6329 llvm::Type *PtrTy = llvm::PointerType::getUnqual(Int64Ty); 6330 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 2); 6331 6332 // cast val v2i64 6333 Ops[1] = Builder.CreateBitCast(Ops[1], VecTy, "cast"); 6334 6335 // extract (0, 1) 6336 unsigned Index = BuiltinID == X86::BI__builtin_ia32_storelps ? 0 : 1; 6337 llvm::Value *Idx = llvm::ConstantInt::get(SizeTy, Index); 6338 Ops[1] = Builder.CreateExtractElement(Ops[1], Idx, "extract"); 6339 6340 // cast pointer to i64 & store 6341 Ops[0] = Builder.CreateBitCast(Ops[0], PtrTy); 6342 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6343 } 6344 case X86::BI__builtin_ia32_palignr128: 6345 case X86::BI__builtin_ia32_palignr256: { 6346 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 6347 6348 unsigned NumElts = 6349 cast<llvm::VectorType>(Ops[0]->getType())->getNumElements(); 6350 assert(NumElts % 16 == 0); 6351 unsigned NumLanes = NumElts / 16; 6352 unsigned NumLaneElts = NumElts / NumLanes; 6353 6354 // If palignr is shifting the pair of vectors more than the size of two 6355 // lanes, emit zero. 6356 if (ShiftVal >= (2 * NumLaneElts)) 6357 return llvm::Constant::getNullValue(ConvertType(E->getType())); 6358 6359 // If palignr is shifting the pair of input vectors more than one lane, 6360 // but less than two lanes, convert to shifting in zeroes. 6361 if (ShiftVal > NumLaneElts) { 6362 ShiftVal -= NumLaneElts; 6363 Ops[1] = Ops[0]; 6364 Ops[0] = llvm::Constant::getNullValue(Ops[0]->getType()); 6365 } 6366 6367 uint32_t Indices[32]; 6368 // 256-bit palignr operates on 128-bit lanes so we need to handle that 6369 for (unsigned l = 0; l != NumElts; l += NumLaneElts) { 6370 for (unsigned i = 0; i != NumLaneElts; ++i) { 6371 unsigned Idx = ShiftVal + i; 6372 if (Idx >= NumLaneElts) 6373 Idx += NumElts - NumLaneElts; // End of lane, switch operand. 6374 Indices[l + i] = Idx + l; 6375 } 6376 } 6377 6378 Value *SV = llvm::ConstantDataVector::get(getLLVMContext(), 6379 makeArrayRef(Indices, NumElts)); 6380 return Builder.CreateShuffleVector(Ops[1], Ops[0], SV, "palignr"); 6381 } 6382 case X86::BI__builtin_ia32_pslldqi256: { 6383 // Shift value is in bits so divide by 8. 6384 unsigned shiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() >> 3; 6385 6386 // If pslldq is shifting the vector more than 15 bytes, emit zero. 6387 if (shiftVal >= 16) 6388 return llvm::Constant::getNullValue(ConvertType(E->getType())); 6389 6390 uint32_t Indices[32]; 6391 // 256-bit pslldq operates on 128-bit lanes so we need to handle that 6392 for (unsigned l = 0; l != 32; l += 16) { 6393 for (unsigned i = 0; i != 16; ++i) { 6394 unsigned Idx = 32 + i - shiftVal; 6395 if (Idx < 32) Idx -= 16; // end of lane, switch operand. 6396 Indices[l + i] = Idx + l; 6397 } 6398 } 6399 6400 llvm::Type *VecTy = llvm::VectorType::get(Int8Ty, 32); 6401 Ops[0] = Builder.CreateBitCast(Ops[0], VecTy, "cast"); 6402 Value *Zero = llvm::Constant::getNullValue(VecTy); 6403 6404 Value *SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 6405 SV = Builder.CreateShuffleVector(Zero, Ops[0], SV, "pslldq"); 6406 llvm::Type *ResultType = ConvertType(E->getType()); 6407 return Builder.CreateBitCast(SV, ResultType, "cast"); 6408 } 6409 case X86::BI__builtin_ia32_psrldqi256: { 6410 // Shift value is in bits so divide by 8. 6411 unsigned shiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() >> 3; 6412 6413 // If psrldq is shifting the vector more than 15 bytes, emit zero. 6414 if (shiftVal >= 16) 6415 return llvm::Constant::getNullValue(ConvertType(E->getType())); 6416 6417 uint32_t Indices[32]; 6418 // 256-bit psrldq operates on 128-bit lanes so we need to handle that 6419 for (unsigned l = 0; l != 32; l += 16) { 6420 for (unsigned i = 0; i != 16; ++i) { 6421 unsigned Idx = i + shiftVal; 6422 if (Idx >= 16) Idx += 16; // end of lane, switch operand. 6423 Indices[l + i] = Idx + l; 6424 } 6425 } 6426 6427 llvm::Type *VecTy = llvm::VectorType::get(Int8Ty, 32); 6428 Ops[0] = Builder.CreateBitCast(Ops[0], VecTy, "cast"); 6429 Value *Zero = llvm::Constant::getNullValue(VecTy); 6430 6431 Value *SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 6432 SV = Builder.CreateShuffleVector(Ops[0], Zero, SV, "psrldq"); 6433 llvm::Type *ResultType = ConvertType(E->getType()); 6434 return Builder.CreateBitCast(SV, ResultType, "cast"); 6435 } 6436 case X86::BI__builtin_ia32_movntps: 6437 case X86::BI__builtin_ia32_movntps256: 6438 case X86::BI__builtin_ia32_movntpd: 6439 case X86::BI__builtin_ia32_movntpd256: 6440 case X86::BI__builtin_ia32_movntdq: 6441 case X86::BI__builtin_ia32_movntdq256: 6442 case X86::BI__builtin_ia32_movnti: 6443 case X86::BI__builtin_ia32_movnti64: { 6444 llvm::MDNode *Node = llvm::MDNode::get( 6445 getLLVMContext(), llvm::ConstantAsMetadata::get(Builder.getInt32(1))); 6446 6447 // Convert the type of the pointer to a pointer to the stored type. 6448 Value *BC = Builder.CreateBitCast(Ops[0], 6449 llvm::PointerType::getUnqual(Ops[1]->getType()), 6450 "cast"); 6451 StoreInst *SI = Builder.CreateDefaultAlignedStore(Ops[1], BC); 6452 SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); 6453 6454 // If the operand is an integer, we can't assume alignment. Otherwise, 6455 // assume natural alignment. 6456 QualType ArgTy = E->getArg(1)->getType(); 6457 unsigned Align; 6458 if (ArgTy->isIntegerType()) 6459 Align = 1; 6460 else 6461 Align = getContext().getTypeSizeInChars(ArgTy).getQuantity(); 6462 SI->setAlignment(Align); 6463 return SI; 6464 } 6465 // 3DNow! 6466 case X86::BI__builtin_ia32_pswapdsf: 6467 case X86::BI__builtin_ia32_pswapdsi: { 6468 llvm::Type *MMXTy = llvm::Type::getX86_MMXTy(getLLVMContext()); 6469 Ops[0] = Builder.CreateBitCast(Ops[0], MMXTy, "cast"); 6470 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_3dnowa_pswapd); 6471 return Builder.CreateCall(F, Ops, "pswapd"); 6472 } 6473 case X86::BI__builtin_ia32_rdrand16_step: 6474 case X86::BI__builtin_ia32_rdrand32_step: 6475 case X86::BI__builtin_ia32_rdrand64_step: 6476 case X86::BI__builtin_ia32_rdseed16_step: 6477 case X86::BI__builtin_ia32_rdseed32_step: 6478 case X86::BI__builtin_ia32_rdseed64_step: { 6479 Intrinsic::ID ID; 6480 switch (BuiltinID) { 6481 default: llvm_unreachable("Unsupported intrinsic!"); 6482 case X86::BI__builtin_ia32_rdrand16_step: 6483 ID = Intrinsic::x86_rdrand_16; 6484 break; 6485 case X86::BI__builtin_ia32_rdrand32_step: 6486 ID = Intrinsic::x86_rdrand_32; 6487 break; 6488 case X86::BI__builtin_ia32_rdrand64_step: 6489 ID = Intrinsic::x86_rdrand_64; 6490 break; 6491 case X86::BI__builtin_ia32_rdseed16_step: 6492 ID = Intrinsic::x86_rdseed_16; 6493 break; 6494 case X86::BI__builtin_ia32_rdseed32_step: 6495 ID = Intrinsic::x86_rdseed_32; 6496 break; 6497 case X86::BI__builtin_ia32_rdseed64_step: 6498 ID = Intrinsic::x86_rdseed_64; 6499 break; 6500 } 6501 6502 Value *Call = Builder.CreateCall(CGM.getIntrinsic(ID)); 6503 Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 0), 6504 Ops[0]); 6505 return Builder.CreateExtractValue(Call, 1); 6506 } 6507 // SSE comparison intrisics 6508 case X86::BI__builtin_ia32_cmpeqps: 6509 case X86::BI__builtin_ia32_cmpltps: 6510 case X86::BI__builtin_ia32_cmpleps: 6511 case X86::BI__builtin_ia32_cmpunordps: 6512 case X86::BI__builtin_ia32_cmpneqps: 6513 case X86::BI__builtin_ia32_cmpnltps: 6514 case X86::BI__builtin_ia32_cmpnleps: 6515 case X86::BI__builtin_ia32_cmpordps: 6516 case X86::BI__builtin_ia32_cmpeqss: 6517 case X86::BI__builtin_ia32_cmpltss: 6518 case X86::BI__builtin_ia32_cmpless: 6519 case X86::BI__builtin_ia32_cmpunordss: 6520 case X86::BI__builtin_ia32_cmpneqss: 6521 case X86::BI__builtin_ia32_cmpnltss: 6522 case X86::BI__builtin_ia32_cmpnless: 6523 case X86::BI__builtin_ia32_cmpordss: 6524 case X86::BI__builtin_ia32_cmpeqpd: 6525 case X86::BI__builtin_ia32_cmpltpd: 6526 case X86::BI__builtin_ia32_cmplepd: 6527 case X86::BI__builtin_ia32_cmpunordpd: 6528 case X86::BI__builtin_ia32_cmpneqpd: 6529 case X86::BI__builtin_ia32_cmpnltpd: 6530 case X86::BI__builtin_ia32_cmpnlepd: 6531 case X86::BI__builtin_ia32_cmpordpd: 6532 case X86::BI__builtin_ia32_cmpeqsd: 6533 case X86::BI__builtin_ia32_cmpltsd: 6534 case X86::BI__builtin_ia32_cmplesd: 6535 case X86::BI__builtin_ia32_cmpunordsd: 6536 case X86::BI__builtin_ia32_cmpneqsd: 6537 case X86::BI__builtin_ia32_cmpnltsd: 6538 case X86::BI__builtin_ia32_cmpnlesd: 6539 case X86::BI__builtin_ia32_cmpordsd: 6540 // These exist so that the builtin that takes an immediate can be bounds 6541 // checked by clang to avoid passing bad immediates to the backend. Since 6542 // AVX has a larger immediate than SSE we would need separate builtins to 6543 // do the different bounds checking. Rather than create a clang specific 6544 // SSE only builtin, this implements eight separate builtins to match gcc 6545 // implementation. 6546 6547 // Choose the immediate. 6548 unsigned Imm; 6549 switch (BuiltinID) { 6550 default: llvm_unreachable("Unsupported intrinsic!"); 6551 case X86::BI__builtin_ia32_cmpeqps: 6552 case X86::BI__builtin_ia32_cmpeqss: 6553 case X86::BI__builtin_ia32_cmpeqpd: 6554 case X86::BI__builtin_ia32_cmpeqsd: 6555 Imm = 0; 6556 break; 6557 case X86::BI__builtin_ia32_cmpltps: 6558 case X86::BI__builtin_ia32_cmpltss: 6559 case X86::BI__builtin_ia32_cmpltpd: 6560 case X86::BI__builtin_ia32_cmpltsd: 6561 Imm = 1; 6562 break; 6563 case X86::BI__builtin_ia32_cmpleps: 6564 case X86::BI__builtin_ia32_cmpless: 6565 case X86::BI__builtin_ia32_cmplepd: 6566 case X86::BI__builtin_ia32_cmplesd: 6567 Imm = 2; 6568 break; 6569 case X86::BI__builtin_ia32_cmpunordps: 6570 case X86::BI__builtin_ia32_cmpunordss: 6571 case X86::BI__builtin_ia32_cmpunordpd: 6572 case X86::BI__builtin_ia32_cmpunordsd: 6573 Imm = 3; 6574 break; 6575 case X86::BI__builtin_ia32_cmpneqps: 6576 case X86::BI__builtin_ia32_cmpneqss: 6577 case X86::BI__builtin_ia32_cmpneqpd: 6578 case X86::BI__builtin_ia32_cmpneqsd: 6579 Imm = 4; 6580 break; 6581 case X86::BI__builtin_ia32_cmpnltps: 6582 case X86::BI__builtin_ia32_cmpnltss: 6583 case X86::BI__builtin_ia32_cmpnltpd: 6584 case X86::BI__builtin_ia32_cmpnltsd: 6585 Imm = 5; 6586 break; 6587 case X86::BI__builtin_ia32_cmpnleps: 6588 case X86::BI__builtin_ia32_cmpnless: 6589 case X86::BI__builtin_ia32_cmpnlepd: 6590 case X86::BI__builtin_ia32_cmpnlesd: 6591 Imm = 6; 6592 break; 6593 case X86::BI__builtin_ia32_cmpordps: 6594 case X86::BI__builtin_ia32_cmpordss: 6595 case X86::BI__builtin_ia32_cmpordpd: 6596 case X86::BI__builtin_ia32_cmpordsd: 6597 Imm = 7; 6598 break; 6599 } 6600 6601 // Choose the intrinsic ID. 6602 const char *name; 6603 Intrinsic::ID ID; 6604 switch (BuiltinID) { 6605 default: llvm_unreachable("Unsupported intrinsic!"); 6606 case X86::BI__builtin_ia32_cmpeqps: 6607 case X86::BI__builtin_ia32_cmpltps: 6608 case X86::BI__builtin_ia32_cmpleps: 6609 case X86::BI__builtin_ia32_cmpunordps: 6610 case X86::BI__builtin_ia32_cmpneqps: 6611 case X86::BI__builtin_ia32_cmpnltps: 6612 case X86::BI__builtin_ia32_cmpnleps: 6613 case X86::BI__builtin_ia32_cmpordps: 6614 name = "cmpps"; 6615 ID = Intrinsic::x86_sse_cmp_ps; 6616 break; 6617 case X86::BI__builtin_ia32_cmpeqss: 6618 case X86::BI__builtin_ia32_cmpltss: 6619 case X86::BI__builtin_ia32_cmpless: 6620 case X86::BI__builtin_ia32_cmpunordss: 6621 case X86::BI__builtin_ia32_cmpneqss: 6622 case X86::BI__builtin_ia32_cmpnltss: 6623 case X86::BI__builtin_ia32_cmpnless: 6624 case X86::BI__builtin_ia32_cmpordss: 6625 name = "cmpss"; 6626 ID = Intrinsic::x86_sse_cmp_ss; 6627 break; 6628 case X86::BI__builtin_ia32_cmpeqpd: 6629 case X86::BI__builtin_ia32_cmpltpd: 6630 case X86::BI__builtin_ia32_cmplepd: 6631 case X86::BI__builtin_ia32_cmpunordpd: 6632 case X86::BI__builtin_ia32_cmpneqpd: 6633 case X86::BI__builtin_ia32_cmpnltpd: 6634 case X86::BI__builtin_ia32_cmpnlepd: 6635 case X86::BI__builtin_ia32_cmpordpd: 6636 name = "cmppd"; 6637 ID = Intrinsic::x86_sse2_cmp_pd; 6638 break; 6639 case X86::BI__builtin_ia32_cmpeqsd: 6640 case X86::BI__builtin_ia32_cmpltsd: 6641 case X86::BI__builtin_ia32_cmplesd: 6642 case X86::BI__builtin_ia32_cmpunordsd: 6643 case X86::BI__builtin_ia32_cmpneqsd: 6644 case X86::BI__builtin_ia32_cmpnltsd: 6645 case X86::BI__builtin_ia32_cmpnlesd: 6646 case X86::BI__builtin_ia32_cmpordsd: 6647 name = "cmpsd"; 6648 ID = Intrinsic::x86_sse2_cmp_sd; 6649 break; 6650 } 6651 6652 Ops.push_back(llvm::ConstantInt::get(Int8Ty, Imm)); 6653 llvm::Function *F = CGM.getIntrinsic(ID); 6654 return Builder.CreateCall(F, Ops, name); 6655 } 6656 } 6657 6658 6659 Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, 6660 const CallExpr *E) { 6661 SmallVector<Value*, 4> Ops; 6662 6663 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) 6664 Ops.push_back(EmitScalarExpr(E->getArg(i))); 6665 6666 Intrinsic::ID ID = Intrinsic::not_intrinsic; 6667 6668 switch (BuiltinID) { 6669 default: return nullptr; 6670 6671 // __builtin_ppc_get_timebase is GCC 4.8+'s PowerPC-specific name for what we 6672 // call __builtin_readcyclecounter. 6673 case PPC::BI__builtin_ppc_get_timebase: 6674 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::readcyclecounter)); 6675 6676 // vec_ld, vec_lvsl, vec_lvsr 6677 case PPC::BI__builtin_altivec_lvx: 6678 case PPC::BI__builtin_altivec_lvxl: 6679 case PPC::BI__builtin_altivec_lvebx: 6680 case PPC::BI__builtin_altivec_lvehx: 6681 case PPC::BI__builtin_altivec_lvewx: 6682 case PPC::BI__builtin_altivec_lvsl: 6683 case PPC::BI__builtin_altivec_lvsr: 6684 case PPC::BI__builtin_vsx_lxvd2x: 6685 case PPC::BI__builtin_vsx_lxvw4x: 6686 { 6687 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 6688 6689 Ops[0] = Builder.CreateGEP(Ops[1], Ops[0]); 6690 Ops.pop_back(); 6691 6692 switch (BuiltinID) { 6693 default: llvm_unreachable("Unsupported ld/lvsl/lvsr intrinsic!"); 6694 case PPC::BI__builtin_altivec_lvx: 6695 ID = Intrinsic::ppc_altivec_lvx; 6696 break; 6697 case PPC::BI__builtin_altivec_lvxl: 6698 ID = Intrinsic::ppc_altivec_lvxl; 6699 break; 6700 case PPC::BI__builtin_altivec_lvebx: 6701 ID = Intrinsic::ppc_altivec_lvebx; 6702 break; 6703 case PPC::BI__builtin_altivec_lvehx: 6704 ID = Intrinsic::ppc_altivec_lvehx; 6705 break; 6706 case PPC::BI__builtin_altivec_lvewx: 6707 ID = Intrinsic::ppc_altivec_lvewx; 6708 break; 6709 case PPC::BI__builtin_altivec_lvsl: 6710 ID = Intrinsic::ppc_altivec_lvsl; 6711 break; 6712 case PPC::BI__builtin_altivec_lvsr: 6713 ID = Intrinsic::ppc_altivec_lvsr; 6714 break; 6715 case PPC::BI__builtin_vsx_lxvd2x: 6716 ID = Intrinsic::ppc_vsx_lxvd2x; 6717 break; 6718 case PPC::BI__builtin_vsx_lxvw4x: 6719 ID = Intrinsic::ppc_vsx_lxvw4x; 6720 break; 6721 } 6722 llvm::Function *F = CGM.getIntrinsic(ID); 6723 return Builder.CreateCall(F, Ops, ""); 6724 } 6725 6726 // vec_st 6727 case PPC::BI__builtin_altivec_stvx: 6728 case PPC::BI__builtin_altivec_stvxl: 6729 case PPC::BI__builtin_altivec_stvebx: 6730 case PPC::BI__builtin_altivec_stvehx: 6731 case PPC::BI__builtin_altivec_stvewx: 6732 case PPC::BI__builtin_vsx_stxvd2x: 6733 case PPC::BI__builtin_vsx_stxvw4x: 6734 { 6735 Ops[2] = Builder.CreateBitCast(Ops[2], Int8PtrTy); 6736 Ops[1] = Builder.CreateGEP(Ops[2], Ops[1]); 6737 Ops.pop_back(); 6738 6739 switch (BuiltinID) { 6740 default: llvm_unreachable("Unsupported st intrinsic!"); 6741 case PPC::BI__builtin_altivec_stvx: 6742 ID = Intrinsic::ppc_altivec_stvx; 6743 break; 6744 case PPC::BI__builtin_altivec_stvxl: 6745 ID = Intrinsic::ppc_altivec_stvxl; 6746 break; 6747 case PPC::BI__builtin_altivec_stvebx: 6748 ID = Intrinsic::ppc_altivec_stvebx; 6749 break; 6750 case PPC::BI__builtin_altivec_stvehx: 6751 ID = Intrinsic::ppc_altivec_stvehx; 6752 break; 6753 case PPC::BI__builtin_altivec_stvewx: 6754 ID = Intrinsic::ppc_altivec_stvewx; 6755 break; 6756 case PPC::BI__builtin_vsx_stxvd2x: 6757 ID = Intrinsic::ppc_vsx_stxvd2x; 6758 break; 6759 case PPC::BI__builtin_vsx_stxvw4x: 6760 ID = Intrinsic::ppc_vsx_stxvw4x; 6761 break; 6762 } 6763 llvm::Function *F = CGM.getIntrinsic(ID); 6764 return Builder.CreateCall(F, Ops, ""); 6765 } 6766 // Square root 6767 case PPC::BI__builtin_vsx_xvsqrtsp: 6768 case PPC::BI__builtin_vsx_xvsqrtdp: { 6769 llvm::Type *ResultType = ConvertType(E->getType()); 6770 Value *X = EmitScalarExpr(E->getArg(0)); 6771 ID = Intrinsic::sqrt; 6772 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 6773 return Builder.CreateCall(F, X); 6774 } 6775 // Count leading zeros 6776 case PPC::BI__builtin_altivec_vclzb: 6777 case PPC::BI__builtin_altivec_vclzh: 6778 case PPC::BI__builtin_altivec_vclzw: 6779 case PPC::BI__builtin_altivec_vclzd: { 6780 llvm::Type *ResultType = ConvertType(E->getType()); 6781 Value *X = EmitScalarExpr(E->getArg(0)); 6782 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 6783 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 6784 return Builder.CreateCall(F, {X, Undef}); 6785 } 6786 // Copy sign 6787 case PPC::BI__builtin_vsx_xvcpsgnsp: 6788 case PPC::BI__builtin_vsx_xvcpsgndp: { 6789 llvm::Type *ResultType = ConvertType(E->getType()); 6790 Value *X = EmitScalarExpr(E->getArg(0)); 6791 Value *Y = EmitScalarExpr(E->getArg(1)); 6792 ID = Intrinsic::copysign; 6793 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 6794 return Builder.CreateCall(F, {X, Y}); 6795 } 6796 // Rounding/truncation 6797 case PPC::BI__builtin_vsx_xvrspip: 6798 case PPC::BI__builtin_vsx_xvrdpip: 6799 case PPC::BI__builtin_vsx_xvrdpim: 6800 case PPC::BI__builtin_vsx_xvrspim: 6801 case PPC::BI__builtin_vsx_xvrdpi: 6802 case PPC::BI__builtin_vsx_xvrspi: 6803 case PPC::BI__builtin_vsx_xvrdpic: 6804 case PPC::BI__builtin_vsx_xvrspic: 6805 case PPC::BI__builtin_vsx_xvrdpiz: 6806 case PPC::BI__builtin_vsx_xvrspiz: { 6807 llvm::Type *ResultType = ConvertType(E->getType()); 6808 Value *X = EmitScalarExpr(E->getArg(0)); 6809 if (BuiltinID == PPC::BI__builtin_vsx_xvrdpim || 6810 BuiltinID == PPC::BI__builtin_vsx_xvrspim) 6811 ID = Intrinsic::floor; 6812 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpi || 6813 BuiltinID == PPC::BI__builtin_vsx_xvrspi) 6814 ID = Intrinsic::round; 6815 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpic || 6816 BuiltinID == PPC::BI__builtin_vsx_xvrspic) 6817 ID = Intrinsic::nearbyint; 6818 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpip || 6819 BuiltinID == PPC::BI__builtin_vsx_xvrspip) 6820 ID = Intrinsic::ceil; 6821 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpiz || 6822 BuiltinID == PPC::BI__builtin_vsx_xvrspiz) 6823 ID = Intrinsic::trunc; 6824 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 6825 return Builder.CreateCall(F, X); 6826 } 6827 // FMA variations 6828 case PPC::BI__builtin_vsx_xvmaddadp: 6829 case PPC::BI__builtin_vsx_xvmaddasp: 6830 case PPC::BI__builtin_vsx_xvnmaddadp: 6831 case PPC::BI__builtin_vsx_xvnmaddasp: 6832 case PPC::BI__builtin_vsx_xvmsubadp: 6833 case PPC::BI__builtin_vsx_xvmsubasp: 6834 case PPC::BI__builtin_vsx_xvnmsubadp: 6835 case PPC::BI__builtin_vsx_xvnmsubasp: { 6836 llvm::Type *ResultType = ConvertType(E->getType()); 6837 Value *X = EmitScalarExpr(E->getArg(0)); 6838 Value *Y = EmitScalarExpr(E->getArg(1)); 6839 Value *Z = EmitScalarExpr(E->getArg(2)); 6840 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 6841 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 6842 switch (BuiltinID) { 6843 case PPC::BI__builtin_vsx_xvmaddadp: 6844 case PPC::BI__builtin_vsx_xvmaddasp: 6845 return Builder.CreateCall(F, {X, Y, Z}); 6846 case PPC::BI__builtin_vsx_xvnmaddadp: 6847 case PPC::BI__builtin_vsx_xvnmaddasp: 6848 return Builder.CreateFSub(Zero, 6849 Builder.CreateCall(F, {X, Y, Z}), "sub"); 6850 case PPC::BI__builtin_vsx_xvmsubadp: 6851 case PPC::BI__builtin_vsx_xvmsubasp: 6852 return Builder.CreateCall(F, 6853 {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 6854 case PPC::BI__builtin_vsx_xvnmsubadp: 6855 case PPC::BI__builtin_vsx_xvnmsubasp: 6856 Value *FsubRes = 6857 Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 6858 return Builder.CreateFSub(Zero, FsubRes, "sub"); 6859 } 6860 llvm_unreachable("Unknown FMA operation"); 6861 return nullptr; // Suppress no-return warning 6862 } 6863 } 6864 } 6865 6866 // Emit an intrinsic that has 1 float or double. 6867 static Value *emitUnaryFPBuiltin(CodeGenFunction &CGF, 6868 const CallExpr *E, 6869 unsigned IntrinsicID) { 6870 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 6871 6872 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 6873 return CGF.Builder.CreateCall(F, Src0); 6874 } 6875 6876 // Emit an intrinsic that has 3 float or double operands. 6877 static Value *emitTernaryFPBuiltin(CodeGenFunction &CGF, 6878 const CallExpr *E, 6879 unsigned IntrinsicID) { 6880 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 6881 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 6882 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); 6883 6884 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 6885 return CGF.Builder.CreateCall(F, {Src0, Src1, Src2}); 6886 } 6887 6888 // Emit an intrinsic that has 1 float or double operand, and 1 integer. 6889 static Value *emitFPIntBuiltin(CodeGenFunction &CGF, 6890 const CallExpr *E, 6891 unsigned IntrinsicID) { 6892 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 6893 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 6894 6895 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 6896 return CGF.Builder.CreateCall(F, {Src0, Src1}); 6897 } 6898 6899 Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID, 6900 const CallExpr *E) { 6901 switch (BuiltinID) { 6902 case AMDGPU::BI__builtin_amdgpu_div_scale: 6903 case AMDGPU::BI__builtin_amdgpu_div_scalef: { 6904 // Translate from the intrinsics's struct return to the builtin's out 6905 // argument. 6906 6907 Address FlagOutPtr = EmitPointerWithAlignment(E->getArg(3)); 6908 6909 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 6910 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 6911 llvm::Value *Z = EmitScalarExpr(E->getArg(2)); 6912 6913 llvm::Value *Callee = CGM.getIntrinsic(Intrinsic::AMDGPU_div_scale, 6914 X->getType()); 6915 6916 llvm::Value *Tmp = Builder.CreateCall(Callee, {X, Y, Z}); 6917 6918 llvm::Value *Result = Builder.CreateExtractValue(Tmp, 0); 6919 llvm::Value *Flag = Builder.CreateExtractValue(Tmp, 1); 6920 6921 llvm::Type *RealFlagType 6922 = FlagOutPtr.getPointer()->getType()->getPointerElementType(); 6923 6924 llvm::Value *FlagExt = Builder.CreateZExt(Flag, RealFlagType); 6925 Builder.CreateStore(FlagExt, FlagOutPtr); 6926 return Result; 6927 } 6928 case AMDGPU::BI__builtin_amdgpu_div_fmas: 6929 case AMDGPU::BI__builtin_amdgpu_div_fmasf: { 6930 llvm::Value *Src0 = EmitScalarExpr(E->getArg(0)); 6931 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); 6932 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); 6933 llvm::Value *Src3 = EmitScalarExpr(E->getArg(3)); 6934 6935 llvm::Value *F = CGM.getIntrinsic(Intrinsic::AMDGPU_div_fmas, 6936 Src0->getType()); 6937 llvm::Value *Src3ToBool = Builder.CreateIsNotNull(Src3); 6938 return Builder.CreateCall(F, {Src0, Src1, Src2, Src3ToBool}); 6939 } 6940 case AMDGPU::BI__builtin_amdgpu_div_fixup: 6941 case AMDGPU::BI__builtin_amdgpu_div_fixupf: 6942 return emitTernaryFPBuiltin(*this, E, Intrinsic::AMDGPU_div_fixup); 6943 case AMDGPU::BI__builtin_amdgpu_trig_preop: 6944 case AMDGPU::BI__builtin_amdgpu_trig_preopf: 6945 return emitFPIntBuiltin(*this, E, Intrinsic::AMDGPU_trig_preop); 6946 case AMDGPU::BI__builtin_amdgpu_rcp: 6947 case AMDGPU::BI__builtin_amdgpu_rcpf: 6948 return emitUnaryFPBuiltin(*this, E, Intrinsic::AMDGPU_rcp); 6949 case AMDGPU::BI__builtin_amdgpu_rsq: 6950 case AMDGPU::BI__builtin_amdgpu_rsqf: 6951 return emitUnaryFPBuiltin(*this, E, Intrinsic::AMDGPU_rsq); 6952 case AMDGPU::BI__builtin_amdgpu_rsq_clamped: 6953 case AMDGPU::BI__builtin_amdgpu_rsq_clampedf: 6954 return emitUnaryFPBuiltin(*this, E, Intrinsic::AMDGPU_rsq_clamped); 6955 case AMDGPU::BI__builtin_amdgpu_ldexp: 6956 case AMDGPU::BI__builtin_amdgpu_ldexpf: 6957 return emitFPIntBuiltin(*this, E, Intrinsic::AMDGPU_ldexp); 6958 case AMDGPU::BI__builtin_amdgpu_class: 6959 case AMDGPU::BI__builtin_amdgpu_classf: 6960 return emitFPIntBuiltin(*this, E, Intrinsic::AMDGPU_class); 6961 default: 6962 return nullptr; 6963 } 6964 } 6965 6966 /// Handle a SystemZ function in which the final argument is a pointer 6967 /// to an int that receives the post-instruction CC value. At the LLVM level 6968 /// this is represented as a function that returns a {result, cc} pair. 6969 static Value *EmitSystemZIntrinsicWithCC(CodeGenFunction &CGF, 6970 unsigned IntrinsicID, 6971 const CallExpr *E) { 6972 unsigned NumArgs = E->getNumArgs() - 1; 6973 SmallVector<Value *, 8> Args(NumArgs); 6974 for (unsigned I = 0; I < NumArgs; ++I) 6975 Args[I] = CGF.EmitScalarExpr(E->getArg(I)); 6976 Address CCPtr = CGF.EmitPointerWithAlignment(E->getArg(NumArgs)); 6977 Value *F = CGF.CGM.getIntrinsic(IntrinsicID); 6978 Value *Call = CGF.Builder.CreateCall(F, Args); 6979 Value *CC = CGF.Builder.CreateExtractValue(Call, 1); 6980 CGF.Builder.CreateStore(CC, CCPtr); 6981 return CGF.Builder.CreateExtractValue(Call, 0); 6982 } 6983 6984 Value *CodeGenFunction::EmitSystemZBuiltinExpr(unsigned BuiltinID, 6985 const CallExpr *E) { 6986 switch (BuiltinID) { 6987 case SystemZ::BI__builtin_tbegin: { 6988 Value *TDB = EmitScalarExpr(E->getArg(0)); 6989 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 6990 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin); 6991 return Builder.CreateCall(F, {TDB, Control}); 6992 } 6993 case SystemZ::BI__builtin_tbegin_nofloat: { 6994 Value *TDB = EmitScalarExpr(E->getArg(0)); 6995 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 6996 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin_nofloat); 6997 return Builder.CreateCall(F, {TDB, Control}); 6998 } 6999 case SystemZ::BI__builtin_tbeginc: { 7000 Value *TDB = llvm::ConstantPointerNull::get(Int8PtrTy); 7001 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff08); 7002 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbeginc); 7003 return Builder.CreateCall(F, {TDB, Control}); 7004 } 7005 case SystemZ::BI__builtin_tabort: { 7006 Value *Data = EmitScalarExpr(E->getArg(0)); 7007 Value *F = CGM.getIntrinsic(Intrinsic::s390_tabort); 7008 return Builder.CreateCall(F, Builder.CreateSExt(Data, Int64Ty, "tabort")); 7009 } 7010 case SystemZ::BI__builtin_non_tx_store: { 7011 Value *Address = EmitScalarExpr(E->getArg(0)); 7012 Value *Data = EmitScalarExpr(E->getArg(1)); 7013 Value *F = CGM.getIntrinsic(Intrinsic::s390_ntstg); 7014 return Builder.CreateCall(F, {Data, Address}); 7015 } 7016 7017 // Vector builtins. Note that most vector builtins are mapped automatically 7018 // to target-specific LLVM intrinsics. The ones handled specially here can 7019 // be represented via standard LLVM IR, which is preferable to enable common 7020 // LLVM optimizations. 7021 7022 case SystemZ::BI__builtin_s390_vpopctb: 7023 case SystemZ::BI__builtin_s390_vpopcth: 7024 case SystemZ::BI__builtin_s390_vpopctf: 7025 case SystemZ::BI__builtin_s390_vpopctg: { 7026 llvm::Type *ResultType = ConvertType(E->getType()); 7027 Value *X = EmitScalarExpr(E->getArg(0)); 7028 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 7029 return Builder.CreateCall(F, X); 7030 } 7031 7032 case SystemZ::BI__builtin_s390_vclzb: 7033 case SystemZ::BI__builtin_s390_vclzh: 7034 case SystemZ::BI__builtin_s390_vclzf: 7035 case SystemZ::BI__builtin_s390_vclzg: { 7036 llvm::Type *ResultType = ConvertType(E->getType()); 7037 Value *X = EmitScalarExpr(E->getArg(0)); 7038 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 7039 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 7040 return Builder.CreateCall(F, {X, Undef}); 7041 } 7042 7043 case SystemZ::BI__builtin_s390_vctzb: 7044 case SystemZ::BI__builtin_s390_vctzh: 7045 case SystemZ::BI__builtin_s390_vctzf: 7046 case SystemZ::BI__builtin_s390_vctzg: { 7047 llvm::Type *ResultType = ConvertType(E->getType()); 7048 Value *X = EmitScalarExpr(E->getArg(0)); 7049 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 7050 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 7051 return Builder.CreateCall(F, {X, Undef}); 7052 } 7053 7054 case SystemZ::BI__builtin_s390_vfsqdb: { 7055 llvm::Type *ResultType = ConvertType(E->getType()); 7056 Value *X = EmitScalarExpr(E->getArg(0)); 7057 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, ResultType); 7058 return Builder.CreateCall(F, X); 7059 } 7060 case SystemZ::BI__builtin_s390_vfmadb: { 7061 llvm::Type *ResultType = ConvertType(E->getType()); 7062 Value *X = EmitScalarExpr(E->getArg(0)); 7063 Value *Y = EmitScalarExpr(E->getArg(1)); 7064 Value *Z = EmitScalarExpr(E->getArg(2)); 7065 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 7066 return Builder.CreateCall(F, {X, Y, Z}); 7067 } 7068 case SystemZ::BI__builtin_s390_vfmsdb: { 7069 llvm::Type *ResultType = ConvertType(E->getType()); 7070 Value *X = EmitScalarExpr(E->getArg(0)); 7071 Value *Y = EmitScalarExpr(E->getArg(1)); 7072 Value *Z = EmitScalarExpr(E->getArg(2)); 7073 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 7074 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 7075 return Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 7076 } 7077 case SystemZ::BI__builtin_s390_vflpdb: { 7078 llvm::Type *ResultType = ConvertType(E->getType()); 7079 Value *X = EmitScalarExpr(E->getArg(0)); 7080 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 7081 return Builder.CreateCall(F, X); 7082 } 7083 case SystemZ::BI__builtin_s390_vflndb: { 7084 llvm::Type *ResultType = ConvertType(E->getType()); 7085 Value *X = EmitScalarExpr(E->getArg(0)); 7086 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 7087 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 7088 return Builder.CreateFSub(Zero, Builder.CreateCall(F, X), "sub"); 7089 } 7090 case SystemZ::BI__builtin_s390_vfidb: { 7091 llvm::Type *ResultType = ConvertType(E->getType()); 7092 Value *X = EmitScalarExpr(E->getArg(0)); 7093 // Constant-fold the M4 and M5 mask arguments. 7094 llvm::APSInt M4, M5; 7095 bool IsConstM4 = E->getArg(1)->isIntegerConstantExpr(M4, getContext()); 7096 bool IsConstM5 = E->getArg(2)->isIntegerConstantExpr(M5, getContext()); 7097 assert(IsConstM4 && IsConstM5 && "Constant arg isn't actually constant?"); 7098 (void)IsConstM4; (void)IsConstM5; 7099 // Check whether this instance of vfidb can be represented via a LLVM 7100 // standard intrinsic. We only support some combinations of M4 and M5. 7101 Intrinsic::ID ID = Intrinsic::not_intrinsic; 7102 switch (M4.getZExtValue()) { 7103 default: break; 7104 case 0: // IEEE-inexact exception allowed 7105 switch (M5.getZExtValue()) { 7106 default: break; 7107 case 0: ID = Intrinsic::rint; break; 7108 } 7109 break; 7110 case 4: // IEEE-inexact exception suppressed 7111 switch (M5.getZExtValue()) { 7112 default: break; 7113 case 0: ID = Intrinsic::nearbyint; break; 7114 case 1: ID = Intrinsic::round; break; 7115 case 5: ID = Intrinsic::trunc; break; 7116 case 6: ID = Intrinsic::ceil; break; 7117 case 7: ID = Intrinsic::floor; break; 7118 } 7119 break; 7120 } 7121 if (ID != Intrinsic::not_intrinsic) { 7122 Function *F = CGM.getIntrinsic(ID, ResultType); 7123 return Builder.CreateCall(F, X); 7124 } 7125 Function *F = CGM.getIntrinsic(Intrinsic::s390_vfidb); 7126 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 7127 Value *M5Value = llvm::ConstantInt::get(getLLVMContext(), M5); 7128 return Builder.CreateCall(F, {X, M4Value, M5Value}); 7129 } 7130 7131 // Vector intrisincs that output the post-instruction CC value. 7132 7133 #define INTRINSIC_WITH_CC(NAME) \ 7134 case SystemZ::BI__builtin_##NAME: \ 7135 return EmitSystemZIntrinsicWithCC(*this, Intrinsic::NAME, E) 7136 7137 INTRINSIC_WITH_CC(s390_vpkshs); 7138 INTRINSIC_WITH_CC(s390_vpksfs); 7139 INTRINSIC_WITH_CC(s390_vpksgs); 7140 7141 INTRINSIC_WITH_CC(s390_vpklshs); 7142 INTRINSIC_WITH_CC(s390_vpklsfs); 7143 INTRINSIC_WITH_CC(s390_vpklsgs); 7144 7145 INTRINSIC_WITH_CC(s390_vceqbs); 7146 INTRINSIC_WITH_CC(s390_vceqhs); 7147 INTRINSIC_WITH_CC(s390_vceqfs); 7148 INTRINSIC_WITH_CC(s390_vceqgs); 7149 7150 INTRINSIC_WITH_CC(s390_vchbs); 7151 INTRINSIC_WITH_CC(s390_vchhs); 7152 INTRINSIC_WITH_CC(s390_vchfs); 7153 INTRINSIC_WITH_CC(s390_vchgs); 7154 7155 INTRINSIC_WITH_CC(s390_vchlbs); 7156 INTRINSIC_WITH_CC(s390_vchlhs); 7157 INTRINSIC_WITH_CC(s390_vchlfs); 7158 INTRINSIC_WITH_CC(s390_vchlgs); 7159 7160 INTRINSIC_WITH_CC(s390_vfaebs); 7161 INTRINSIC_WITH_CC(s390_vfaehs); 7162 INTRINSIC_WITH_CC(s390_vfaefs); 7163 7164 INTRINSIC_WITH_CC(s390_vfaezbs); 7165 INTRINSIC_WITH_CC(s390_vfaezhs); 7166 INTRINSIC_WITH_CC(s390_vfaezfs); 7167 7168 INTRINSIC_WITH_CC(s390_vfeebs); 7169 INTRINSIC_WITH_CC(s390_vfeehs); 7170 INTRINSIC_WITH_CC(s390_vfeefs); 7171 7172 INTRINSIC_WITH_CC(s390_vfeezbs); 7173 INTRINSIC_WITH_CC(s390_vfeezhs); 7174 INTRINSIC_WITH_CC(s390_vfeezfs); 7175 7176 INTRINSIC_WITH_CC(s390_vfenebs); 7177 INTRINSIC_WITH_CC(s390_vfenehs); 7178 INTRINSIC_WITH_CC(s390_vfenefs); 7179 7180 INTRINSIC_WITH_CC(s390_vfenezbs); 7181 INTRINSIC_WITH_CC(s390_vfenezhs); 7182 INTRINSIC_WITH_CC(s390_vfenezfs); 7183 7184 INTRINSIC_WITH_CC(s390_vistrbs); 7185 INTRINSIC_WITH_CC(s390_vistrhs); 7186 INTRINSIC_WITH_CC(s390_vistrfs); 7187 7188 INTRINSIC_WITH_CC(s390_vstrcbs); 7189 INTRINSIC_WITH_CC(s390_vstrchs); 7190 INTRINSIC_WITH_CC(s390_vstrcfs); 7191 7192 INTRINSIC_WITH_CC(s390_vstrczbs); 7193 INTRINSIC_WITH_CC(s390_vstrczhs); 7194 INTRINSIC_WITH_CC(s390_vstrczfs); 7195 7196 INTRINSIC_WITH_CC(s390_vfcedbs); 7197 INTRINSIC_WITH_CC(s390_vfchdbs); 7198 INTRINSIC_WITH_CC(s390_vfchedbs); 7199 7200 INTRINSIC_WITH_CC(s390_vftcidb); 7201 7202 #undef INTRINSIC_WITH_CC 7203 7204 default: 7205 return nullptr; 7206 } 7207 } 7208 7209 Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, 7210 const CallExpr *E) { 7211 switch (BuiltinID) { 7212 case NVPTX::BI__nvvm_atom_add_gen_i: 7213 case NVPTX::BI__nvvm_atom_add_gen_l: 7214 case NVPTX::BI__nvvm_atom_add_gen_ll: 7215 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Add, E); 7216 7217 case NVPTX::BI__nvvm_atom_sub_gen_i: 7218 case NVPTX::BI__nvvm_atom_sub_gen_l: 7219 case NVPTX::BI__nvvm_atom_sub_gen_ll: 7220 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Sub, E); 7221 7222 case NVPTX::BI__nvvm_atom_and_gen_i: 7223 case NVPTX::BI__nvvm_atom_and_gen_l: 7224 case NVPTX::BI__nvvm_atom_and_gen_ll: 7225 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::And, E); 7226 7227 case NVPTX::BI__nvvm_atom_or_gen_i: 7228 case NVPTX::BI__nvvm_atom_or_gen_l: 7229 case NVPTX::BI__nvvm_atom_or_gen_ll: 7230 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Or, E); 7231 7232 case NVPTX::BI__nvvm_atom_xor_gen_i: 7233 case NVPTX::BI__nvvm_atom_xor_gen_l: 7234 case NVPTX::BI__nvvm_atom_xor_gen_ll: 7235 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xor, E); 7236 7237 case NVPTX::BI__nvvm_atom_xchg_gen_i: 7238 case NVPTX::BI__nvvm_atom_xchg_gen_l: 7239 case NVPTX::BI__nvvm_atom_xchg_gen_ll: 7240 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xchg, E); 7241 7242 case NVPTX::BI__nvvm_atom_max_gen_i: 7243 case NVPTX::BI__nvvm_atom_max_gen_l: 7244 case NVPTX::BI__nvvm_atom_max_gen_ll: 7245 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Max, E); 7246 7247 case NVPTX::BI__nvvm_atom_max_gen_ui: 7248 case NVPTX::BI__nvvm_atom_max_gen_ul: 7249 case NVPTX::BI__nvvm_atom_max_gen_ull: 7250 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMax, E); 7251 7252 case NVPTX::BI__nvvm_atom_min_gen_i: 7253 case NVPTX::BI__nvvm_atom_min_gen_l: 7254 case NVPTX::BI__nvvm_atom_min_gen_ll: 7255 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Min, E); 7256 7257 case NVPTX::BI__nvvm_atom_min_gen_ui: 7258 case NVPTX::BI__nvvm_atom_min_gen_ul: 7259 case NVPTX::BI__nvvm_atom_min_gen_ull: 7260 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMin, E); 7261 7262 case NVPTX::BI__nvvm_atom_cas_gen_i: 7263 case NVPTX::BI__nvvm_atom_cas_gen_l: 7264 case NVPTX::BI__nvvm_atom_cas_gen_ll: 7265 // __nvvm_atom_cas_gen_* should return the old value rather than the 7266 // success flag. 7267 return MakeAtomicCmpXchgValue(*this, E, /*ReturnBool=*/false); 7268 7269 case NVPTX::BI__nvvm_atom_add_gen_f: { 7270 Value *Ptr = EmitScalarExpr(E->getArg(0)); 7271 Value *Val = EmitScalarExpr(E->getArg(1)); 7272 // atomicrmw only deals with integer arguments so we need to use 7273 // LLVM's nvvm_atomic_load_add_f32 intrinsic for that. 7274 Value *FnALAF32 = 7275 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f32, Ptr->getType()); 7276 return Builder.CreateCall(FnALAF32, {Ptr, Val}); 7277 } 7278 7279 default: 7280 return nullptr; 7281 } 7282 } 7283 7284 Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, 7285 const CallExpr *E) { 7286 switch (BuiltinID) { 7287 case WebAssembly::BI__builtin_wasm_memory_size: { 7288 llvm::Type *ResultType = ConvertType(E->getType()); 7289 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_memory_size, ResultType); 7290 return Builder.CreateCall(Callee); 7291 } 7292 case WebAssembly::BI__builtin_wasm_grow_memory: { 7293 Value *X = EmitScalarExpr(E->getArg(0)); 7294 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_grow_memory, X->getType()); 7295 return Builder.CreateCall(Callee, X); 7296 } 7297 7298 default: 7299 return nullptr; 7300 } 7301 } 7302