1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This contains code to emit Builtin calls as LLVM code. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "CodeGenFunction.h" 15 #include "CGCXXABI.h" 16 #include "CGObjCRuntime.h" 17 #include "CodeGenModule.h" 18 #include "TargetInfo.h" 19 #include "clang/AST/ASTContext.h" 20 #include "clang/AST/Decl.h" 21 #include "clang/Basic/TargetBuiltins.h" 22 #include "clang/Basic/TargetInfo.h" 23 #include "clang/CodeGen/CGFunctionInfo.h" 24 #include "clang/Sema/SemaDiagnostic.h" 25 #include "llvm/ADT/StringExtras.h" 26 #include "llvm/IR/CallSite.h" 27 #include "llvm/IR/DataLayout.h" 28 #include "llvm/IR/InlineAsm.h" 29 #include "llvm/IR/Intrinsics.h" 30 #include <sstream> 31 32 using namespace clang; 33 using namespace CodeGen; 34 using namespace llvm; 35 36 /// getBuiltinLibFunction - Given a builtin id for a function like 37 /// "__builtin_fabsf", return a Function* for "fabsf". 38 llvm::Value *CodeGenModule::getBuiltinLibFunction(const FunctionDecl *FD, 39 unsigned BuiltinID) { 40 assert(Context.BuiltinInfo.isLibFunction(BuiltinID)); 41 42 // Get the name, skip over the __builtin_ prefix (if necessary). 43 StringRef Name; 44 GlobalDecl D(FD); 45 46 // If the builtin has been declared explicitly with an assembler label, 47 // use the mangled name. This differs from the plain label on platforms 48 // that prefix labels. 49 if (FD->hasAttr<AsmLabelAttr>()) 50 Name = getMangledName(D); 51 else 52 Name = Context.BuiltinInfo.getName(BuiltinID) + 10; 53 54 llvm::FunctionType *Ty = 55 cast<llvm::FunctionType>(getTypes().ConvertType(FD->getType())); 56 57 return GetOrCreateLLVMFunction(Name, Ty, D, /*ForVTable=*/false); 58 } 59 60 /// Emit the conversions required to turn the given value into an 61 /// integer of the given size. 62 static Value *EmitToInt(CodeGenFunction &CGF, llvm::Value *V, 63 QualType T, llvm::IntegerType *IntType) { 64 V = CGF.EmitToMemory(V, T); 65 66 if (V->getType()->isPointerTy()) 67 return CGF.Builder.CreatePtrToInt(V, IntType); 68 69 assert(V->getType() == IntType); 70 return V; 71 } 72 73 static Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V, 74 QualType T, llvm::Type *ResultType) { 75 V = CGF.EmitFromMemory(V, T); 76 77 if (ResultType->isPointerTy()) 78 return CGF.Builder.CreateIntToPtr(V, ResultType); 79 80 assert(V->getType() == ResultType); 81 return V; 82 } 83 84 /// Utility to insert an atomic instruction based on Instrinsic::ID 85 /// and the expression node. 86 static Value *MakeBinaryAtomicValue(CodeGenFunction &CGF, 87 llvm::AtomicRMWInst::BinOp Kind, 88 const CallExpr *E) { 89 QualType T = E->getType(); 90 assert(E->getArg(0)->getType()->isPointerType()); 91 assert(CGF.getContext().hasSameUnqualifiedType(T, 92 E->getArg(0)->getType()->getPointeeType())); 93 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 94 95 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 96 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 97 98 llvm::IntegerType *IntType = 99 llvm::IntegerType::get(CGF.getLLVMContext(), 100 CGF.getContext().getTypeSize(T)); 101 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 102 103 llvm::Value *Args[2]; 104 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 105 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 106 llvm::Type *ValueType = Args[1]->getType(); 107 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 108 109 llvm::Value *Result = 110 CGF.Builder.CreateAtomicRMW(Kind, Args[0], Args[1], 111 llvm::SequentiallyConsistent); 112 return EmitFromInt(CGF, Result, T, ValueType); 113 } 114 115 static Value *EmitNontemporalStore(CodeGenFunction &CGF, const CallExpr *E) { 116 Value *Val = CGF.EmitScalarExpr(E->getArg(0)); 117 Value *Address = CGF.EmitScalarExpr(E->getArg(1)); 118 119 // Convert the type of the pointer to a pointer to the stored type. 120 Val = CGF.EmitToMemory(Val, E->getArg(0)->getType()); 121 Value *BC = CGF.Builder.CreateBitCast( 122 Address, llvm::PointerType::getUnqual(Val->getType()), "cast"); 123 LValue LV = CGF.MakeNaturalAlignAddrLValue(BC, E->getArg(0)->getType()); 124 LV.setNontemporal(true); 125 CGF.EmitStoreOfScalar(Val, LV, false); 126 return nullptr; 127 } 128 129 static Value *EmitNontemporalLoad(CodeGenFunction &CGF, const CallExpr *E) { 130 Value *Address = CGF.EmitScalarExpr(E->getArg(0)); 131 132 LValue LV = CGF.MakeNaturalAlignAddrLValue(Address, E->getType()); 133 LV.setNontemporal(true); 134 return CGF.EmitLoadOfScalar(LV, E->getExprLoc()); 135 } 136 137 static RValue EmitBinaryAtomic(CodeGenFunction &CGF, 138 llvm::AtomicRMWInst::BinOp Kind, 139 const CallExpr *E) { 140 return RValue::get(MakeBinaryAtomicValue(CGF, Kind, E)); 141 } 142 143 /// Utility to insert an atomic instruction based Instrinsic::ID and 144 /// the expression node, where the return value is the result of the 145 /// operation. 146 static RValue EmitBinaryAtomicPost(CodeGenFunction &CGF, 147 llvm::AtomicRMWInst::BinOp Kind, 148 const CallExpr *E, 149 Instruction::BinaryOps Op, 150 bool Invert = false) { 151 QualType T = E->getType(); 152 assert(E->getArg(0)->getType()->isPointerType()); 153 assert(CGF.getContext().hasSameUnqualifiedType(T, 154 E->getArg(0)->getType()->getPointeeType())); 155 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 156 157 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 158 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 159 160 llvm::IntegerType *IntType = 161 llvm::IntegerType::get(CGF.getLLVMContext(), 162 CGF.getContext().getTypeSize(T)); 163 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 164 165 llvm::Value *Args[2]; 166 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 167 llvm::Type *ValueType = Args[1]->getType(); 168 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 169 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 170 171 llvm::Value *Result = 172 CGF.Builder.CreateAtomicRMW(Kind, Args[0], Args[1], 173 llvm::SequentiallyConsistent); 174 Result = CGF.Builder.CreateBinOp(Op, Result, Args[1]); 175 if (Invert) 176 Result = CGF.Builder.CreateBinOp(llvm::Instruction::Xor, Result, 177 llvm::ConstantInt::get(IntType, -1)); 178 Result = EmitFromInt(CGF, Result, T, ValueType); 179 return RValue::get(Result); 180 } 181 182 /// @brief Utility to insert an atomic cmpxchg instruction. 183 /// 184 /// @param CGF The current codegen function. 185 /// @param E Builtin call expression to convert to cmpxchg. 186 /// arg0 - address to operate on 187 /// arg1 - value to compare with 188 /// arg2 - new value 189 /// @param ReturnBool Specifies whether to return success flag of 190 /// cmpxchg result or the old value. 191 /// 192 /// @returns result of cmpxchg, according to ReturnBool 193 static Value *MakeAtomicCmpXchgValue(CodeGenFunction &CGF, const CallExpr *E, 194 bool ReturnBool) { 195 QualType T = ReturnBool ? E->getArg(1)->getType() : E->getType(); 196 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 197 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 198 199 llvm::IntegerType *IntType = llvm::IntegerType::get( 200 CGF.getLLVMContext(), CGF.getContext().getTypeSize(T)); 201 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 202 203 Value *Args[3]; 204 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 205 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 206 llvm::Type *ValueType = Args[1]->getType(); 207 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 208 Args[2] = EmitToInt(CGF, CGF.EmitScalarExpr(E->getArg(2)), T, IntType); 209 210 Value *Pair = CGF.Builder.CreateAtomicCmpXchg(Args[0], Args[1], Args[2], 211 llvm::SequentiallyConsistent, 212 llvm::SequentiallyConsistent); 213 if (ReturnBool) 214 // Extract boolean success flag and zext it to int. 215 return CGF.Builder.CreateZExt(CGF.Builder.CreateExtractValue(Pair, 1), 216 CGF.ConvertType(E->getType())); 217 else 218 // Extract old value and emit it using the same type as compare value. 219 return EmitFromInt(CGF, CGF.Builder.CreateExtractValue(Pair, 0), T, 220 ValueType); 221 } 222 223 /// EmitFAbs - Emit a call to @llvm.fabs(). 224 static Value *EmitFAbs(CodeGenFunction &CGF, Value *V) { 225 Value *F = CGF.CGM.getIntrinsic(Intrinsic::fabs, V->getType()); 226 llvm::CallInst *Call = CGF.Builder.CreateCall(F, V); 227 Call->setDoesNotAccessMemory(); 228 return Call; 229 } 230 231 /// Emit the computation of the sign bit for a floating point value. Returns 232 /// the i1 sign bit value. 233 static Value *EmitSignBit(CodeGenFunction &CGF, Value *V) { 234 LLVMContext &C = CGF.CGM.getLLVMContext(); 235 236 llvm::Type *Ty = V->getType(); 237 int Width = Ty->getPrimitiveSizeInBits(); 238 llvm::Type *IntTy = llvm::IntegerType::get(C, Width); 239 V = CGF.Builder.CreateBitCast(V, IntTy); 240 if (Ty->isPPC_FP128Ty()) { 241 // The higher-order double comes first, and so we need to truncate the 242 // pair to extract the overall sign. The order of the pair is the same 243 // in both little- and big-Endian modes. 244 Width >>= 1; 245 IntTy = llvm::IntegerType::get(C, Width); 246 V = CGF.Builder.CreateTrunc(V, IntTy); 247 } 248 Value *Zero = llvm::Constant::getNullValue(IntTy); 249 return CGF.Builder.CreateICmpSLT(V, Zero); 250 } 251 252 static RValue emitLibraryCall(CodeGenFunction &CGF, const FunctionDecl *Fn, 253 const CallExpr *E, llvm::Value *calleeValue) { 254 return CGF.EmitCall(E->getCallee()->getType(), calleeValue, E, 255 ReturnValueSlot(), Fn); 256 } 257 258 /// \brief Emit a call to llvm.{sadd,uadd,ssub,usub,smul,umul}.with.overflow.* 259 /// depending on IntrinsicID. 260 /// 261 /// \arg CGF The current codegen function. 262 /// \arg IntrinsicID The ID for the Intrinsic we wish to generate. 263 /// \arg X The first argument to the llvm.*.with.overflow.*. 264 /// \arg Y The second argument to the llvm.*.with.overflow.*. 265 /// \arg Carry The carry returned by the llvm.*.with.overflow.*. 266 /// \returns The result (i.e. sum/product) returned by the intrinsic. 267 static llvm::Value *EmitOverflowIntrinsic(CodeGenFunction &CGF, 268 const llvm::Intrinsic::ID IntrinsicID, 269 llvm::Value *X, llvm::Value *Y, 270 llvm::Value *&Carry) { 271 // Make sure we have integers of the same width. 272 assert(X->getType() == Y->getType() && 273 "Arguments must be the same type. (Did you forget to make sure both " 274 "arguments have the same integer width?)"); 275 276 llvm::Value *Callee = CGF.CGM.getIntrinsic(IntrinsicID, X->getType()); 277 llvm::Value *Tmp = CGF.Builder.CreateCall(Callee, {X, Y}); 278 Carry = CGF.Builder.CreateExtractValue(Tmp, 1); 279 return CGF.Builder.CreateExtractValue(Tmp, 0); 280 } 281 282 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) { 283 llvm::Type *DestType = Int8PtrTy; 284 if (ArgValue->getType() != DestType) 285 ArgValue = 286 Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data()); 287 288 Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend; 289 return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue); 290 } 291 292 // Returns true if we have a valid set of target features. 293 bool CodeGenFunction::checkBuiltinTargetFeatures( 294 const FunctionDecl *TargetDecl) { 295 // Early exit if this is an indirect call. 296 if (!TargetDecl) 297 return true; 298 299 // Get the current enclosing function if it exists. If it doesn't 300 // we can't check the target features anyhow. 301 const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(CurFuncDecl); 302 if (!FD) return true; 303 304 unsigned BuiltinID = TargetDecl->getBuiltinID(); 305 const char *FeatureList = 306 CGM.getContext().BuiltinInfo.getRequiredFeatures(BuiltinID); 307 308 if (!FeatureList || StringRef(FeatureList) == "") 309 return true; 310 311 StringRef TargetCPU = Target.getTargetOpts().CPU; 312 llvm::StringMap<bool> FeatureMap; 313 314 if (const auto *TD = FD->getAttr<TargetAttr>()) { 315 // If we have a TargetAttr build up the feature map based on that. 316 TargetAttr::ParsedTargetAttr ParsedAttr = TD->parse(); 317 318 // Make a copy of the features as passed on the command line into the 319 // beginning of the additional features from the function to override. 320 ParsedAttr.first.insert(ParsedAttr.first.begin(), 321 Target.getTargetOpts().FeaturesAsWritten.begin(), 322 Target.getTargetOpts().FeaturesAsWritten.end()); 323 324 if (ParsedAttr.second != "") 325 TargetCPU = ParsedAttr.second; 326 327 // Now populate the feature map, first with the TargetCPU which is either 328 // the default or a new one from the target attribute string. Then we'll use 329 // the passed in features (FeaturesAsWritten) along with the new ones from 330 // the attribute. 331 Target.initFeatureMap(FeatureMap, CGM.getDiags(), TargetCPU, 332 ParsedAttr.first); 333 } else { 334 Target.initFeatureMap(FeatureMap, CGM.getDiags(), TargetCPU, 335 Target.getTargetOpts().Features); 336 } 337 338 // If we have at least one of the features in the feature list return 339 // true, otherwise return false. 340 SmallVector<StringRef, 1> AttrFeatures; 341 StringRef(FeatureList).split(AttrFeatures, ","); 342 return std::all_of(AttrFeatures.begin(), AttrFeatures.end(), 343 [&](StringRef &Feature) { 344 SmallVector<StringRef, 1> OrFeatures; 345 Feature.split(OrFeatures, "|"); 346 return std::any_of(OrFeatures.begin(), OrFeatures.end(), 347 [&](StringRef &Feature) { 348 return FeatureMap[Feature]; 349 }); 350 }); 351 } 352 353 RValue CodeGenFunction::EmitBuiltinExpr(const FunctionDecl *FD, 354 unsigned BuiltinID, const CallExpr *E, 355 ReturnValueSlot ReturnValue) { 356 // See if we can constant fold this builtin. If so, don't emit it at all. 357 Expr::EvalResult Result; 358 if (E->EvaluateAsRValue(Result, CGM.getContext()) && 359 !Result.hasSideEffects()) { 360 if (Result.Val.isInt()) 361 return RValue::get(llvm::ConstantInt::get(getLLVMContext(), 362 Result.Val.getInt())); 363 if (Result.Val.isFloat()) 364 return RValue::get(llvm::ConstantFP::get(getLLVMContext(), 365 Result.Val.getFloat())); 366 } 367 368 switch (BuiltinID) { 369 default: break; // Handle intrinsics and libm functions below. 370 case Builtin::BI__builtin___CFStringMakeConstantString: 371 case Builtin::BI__builtin___NSStringMakeConstantString: 372 return RValue::get(CGM.EmitConstantExpr(E, E->getType(), nullptr)); 373 case Builtin::BI__builtin_stdarg_start: 374 case Builtin::BI__builtin_va_start: 375 case Builtin::BI__va_start: 376 case Builtin::BI__builtin_va_end: 377 return RValue::get( 378 EmitVAStartEnd(BuiltinID == Builtin::BI__va_start 379 ? EmitScalarExpr(E->getArg(0)) 380 : EmitVAListRef(E->getArg(0)).getPointer(), 381 BuiltinID != Builtin::BI__builtin_va_end)); 382 case Builtin::BI__builtin_va_copy: { 383 Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer(); 384 Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer(); 385 386 llvm::Type *Type = Int8PtrTy; 387 388 DstPtr = Builder.CreateBitCast(DstPtr, Type); 389 SrcPtr = Builder.CreateBitCast(SrcPtr, Type); 390 return RValue::get(Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), 391 {DstPtr, SrcPtr})); 392 } 393 case Builtin::BI__builtin_abs: 394 case Builtin::BI__builtin_labs: 395 case Builtin::BI__builtin_llabs: { 396 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 397 398 Value *NegOp = Builder.CreateNeg(ArgValue, "neg"); 399 Value *CmpResult = 400 Builder.CreateICmpSGE(ArgValue, 401 llvm::Constant::getNullValue(ArgValue->getType()), 402 "abscond"); 403 Value *Result = 404 Builder.CreateSelect(CmpResult, ArgValue, NegOp, "abs"); 405 406 return RValue::get(Result); 407 } 408 case Builtin::BI__builtin_fabs: 409 case Builtin::BI__builtin_fabsf: 410 case Builtin::BI__builtin_fabsl: { 411 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 412 Value *Result = EmitFAbs(*this, Arg1); 413 return RValue::get(Result); 414 } 415 case Builtin::BI__builtin_fmod: 416 case Builtin::BI__builtin_fmodf: 417 case Builtin::BI__builtin_fmodl: { 418 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 419 Value *Arg2 = EmitScalarExpr(E->getArg(1)); 420 Value *Result = Builder.CreateFRem(Arg1, Arg2, "fmod"); 421 return RValue::get(Result); 422 } 423 424 case Builtin::BI__builtin_conj: 425 case Builtin::BI__builtin_conjf: 426 case Builtin::BI__builtin_conjl: { 427 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 428 Value *Real = ComplexVal.first; 429 Value *Imag = ComplexVal.second; 430 Value *Zero = 431 Imag->getType()->isFPOrFPVectorTy() 432 ? llvm::ConstantFP::getZeroValueForNegation(Imag->getType()) 433 : llvm::Constant::getNullValue(Imag->getType()); 434 435 Imag = Builder.CreateFSub(Zero, Imag, "sub"); 436 return RValue::getComplex(std::make_pair(Real, Imag)); 437 } 438 case Builtin::BI__builtin_creal: 439 case Builtin::BI__builtin_crealf: 440 case Builtin::BI__builtin_creall: 441 case Builtin::BIcreal: 442 case Builtin::BIcrealf: 443 case Builtin::BIcreall: { 444 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 445 return RValue::get(ComplexVal.first); 446 } 447 448 case Builtin::BI__builtin_cimag: 449 case Builtin::BI__builtin_cimagf: 450 case Builtin::BI__builtin_cimagl: 451 case Builtin::BIcimag: 452 case Builtin::BIcimagf: 453 case Builtin::BIcimagl: { 454 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 455 return RValue::get(ComplexVal.second); 456 } 457 458 case Builtin::BI__builtin_ctzs: 459 case Builtin::BI__builtin_ctz: 460 case Builtin::BI__builtin_ctzl: 461 case Builtin::BI__builtin_ctzll: { 462 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 463 464 llvm::Type *ArgType = ArgValue->getType(); 465 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 466 467 llvm::Type *ResultType = ConvertType(E->getType()); 468 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 469 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 470 if (Result->getType() != ResultType) 471 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 472 "cast"); 473 return RValue::get(Result); 474 } 475 case Builtin::BI__builtin_clzs: 476 case Builtin::BI__builtin_clz: 477 case Builtin::BI__builtin_clzl: 478 case Builtin::BI__builtin_clzll: { 479 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 480 481 llvm::Type *ArgType = ArgValue->getType(); 482 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 483 484 llvm::Type *ResultType = ConvertType(E->getType()); 485 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 486 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 487 if (Result->getType() != ResultType) 488 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 489 "cast"); 490 return RValue::get(Result); 491 } 492 case Builtin::BI__builtin_ffs: 493 case Builtin::BI__builtin_ffsl: 494 case Builtin::BI__builtin_ffsll: { 495 // ffs(x) -> x ? cttz(x) + 1 : 0 496 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 497 498 llvm::Type *ArgType = ArgValue->getType(); 499 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 500 501 llvm::Type *ResultType = ConvertType(E->getType()); 502 Value *Tmp = 503 Builder.CreateAdd(Builder.CreateCall(F, {ArgValue, Builder.getTrue()}), 504 llvm::ConstantInt::get(ArgType, 1)); 505 Value *Zero = llvm::Constant::getNullValue(ArgType); 506 Value *IsZero = Builder.CreateICmpEQ(ArgValue, Zero, "iszero"); 507 Value *Result = Builder.CreateSelect(IsZero, Zero, Tmp, "ffs"); 508 if (Result->getType() != ResultType) 509 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 510 "cast"); 511 return RValue::get(Result); 512 } 513 case Builtin::BI__builtin_parity: 514 case Builtin::BI__builtin_parityl: 515 case Builtin::BI__builtin_parityll: { 516 // parity(x) -> ctpop(x) & 1 517 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 518 519 llvm::Type *ArgType = ArgValue->getType(); 520 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 521 522 llvm::Type *ResultType = ConvertType(E->getType()); 523 Value *Tmp = Builder.CreateCall(F, ArgValue); 524 Value *Result = Builder.CreateAnd(Tmp, llvm::ConstantInt::get(ArgType, 1)); 525 if (Result->getType() != ResultType) 526 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 527 "cast"); 528 return RValue::get(Result); 529 } 530 case Builtin::BI__builtin_popcount: 531 case Builtin::BI__builtin_popcountl: 532 case Builtin::BI__builtin_popcountll: { 533 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 534 535 llvm::Type *ArgType = ArgValue->getType(); 536 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 537 538 llvm::Type *ResultType = ConvertType(E->getType()); 539 Value *Result = Builder.CreateCall(F, ArgValue); 540 if (Result->getType() != ResultType) 541 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 542 "cast"); 543 return RValue::get(Result); 544 } 545 case Builtin::BI__builtin_unpredictable: { 546 // Always return the argument of __builtin_unpredictable. LLVM does not 547 // handle this builtin. Metadata for this builtin should be added directly 548 // to instructions such as branches or switches that use it. 549 return RValue::get(EmitScalarExpr(E->getArg(0))); 550 } 551 case Builtin::BI__builtin_expect: { 552 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 553 llvm::Type *ArgType = ArgValue->getType(); 554 555 Value *ExpectedValue = EmitScalarExpr(E->getArg(1)); 556 // Don't generate llvm.expect on -O0 as the backend won't use it for 557 // anything. 558 // Note, we still IRGen ExpectedValue because it could have side-effects. 559 if (CGM.getCodeGenOpts().OptimizationLevel == 0) 560 return RValue::get(ArgValue); 561 562 Value *FnExpect = CGM.getIntrinsic(Intrinsic::expect, ArgType); 563 Value *Result = 564 Builder.CreateCall(FnExpect, {ArgValue, ExpectedValue}, "expval"); 565 return RValue::get(Result); 566 } 567 case Builtin::BI__builtin_assume_aligned: { 568 Value *PtrValue = EmitScalarExpr(E->getArg(0)); 569 Value *OffsetValue = 570 (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : nullptr; 571 572 Value *AlignmentValue = EmitScalarExpr(E->getArg(1)); 573 ConstantInt *AlignmentCI = cast<ConstantInt>(AlignmentValue); 574 unsigned Alignment = (unsigned) AlignmentCI->getZExtValue(); 575 576 EmitAlignmentAssumption(PtrValue, Alignment, OffsetValue); 577 return RValue::get(PtrValue); 578 } 579 case Builtin::BI__assume: 580 case Builtin::BI__builtin_assume: { 581 if (E->getArg(0)->HasSideEffects(getContext())) 582 return RValue::get(nullptr); 583 584 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 585 Value *FnAssume = CGM.getIntrinsic(Intrinsic::assume); 586 return RValue::get(Builder.CreateCall(FnAssume, ArgValue)); 587 } 588 case Builtin::BI__builtin_bswap16: 589 case Builtin::BI__builtin_bswap32: 590 case Builtin::BI__builtin_bswap64: { 591 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 592 llvm::Type *ArgType = ArgValue->getType(); 593 Value *F = CGM.getIntrinsic(Intrinsic::bswap, ArgType); 594 return RValue::get(Builder.CreateCall(F, ArgValue)); 595 } 596 case Builtin::BI__builtin_object_size: { 597 // We rely on constant folding to deal with expressions with side effects. 598 assert(!E->getArg(0)->HasSideEffects(getContext()) && 599 "should have been constant folded"); 600 601 // We pass this builtin onto the optimizer so that it can 602 // figure out the object size in more complex cases. 603 llvm::Type *ResType = ConvertType(E->getType()); 604 605 // LLVM only supports 0 and 2, make sure that we pass along that 606 // as a boolean. 607 Value *Ty = EmitScalarExpr(E->getArg(1)); 608 ConstantInt *CI = dyn_cast<ConstantInt>(Ty); 609 assert(CI); 610 uint64_t val = CI->getZExtValue(); 611 CI = ConstantInt::get(Builder.getInt1Ty(), (val & 0x2) >> 1); 612 // FIXME: Get right address space. 613 llvm::Type *Tys[] = { ResType, Builder.getInt8PtrTy(0) }; 614 Value *F = CGM.getIntrinsic(Intrinsic::objectsize, Tys); 615 return RValue::get( 616 Builder.CreateCall(F, {EmitScalarExpr(E->getArg(0)), CI})); 617 } 618 case Builtin::BI__builtin_prefetch: { 619 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); 620 // FIXME: Technically these constants should of type 'int', yes? 621 RW = (E->getNumArgs() > 1) ? EmitScalarExpr(E->getArg(1)) : 622 llvm::ConstantInt::get(Int32Ty, 0); 623 Locality = (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : 624 llvm::ConstantInt::get(Int32Ty, 3); 625 Value *Data = llvm::ConstantInt::get(Int32Ty, 1); 626 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 627 return RValue::get(Builder.CreateCall(F, {Address, RW, Locality, Data})); 628 } 629 case Builtin::BI__builtin_readcyclecounter: { 630 Value *F = CGM.getIntrinsic(Intrinsic::readcyclecounter); 631 return RValue::get(Builder.CreateCall(F)); 632 } 633 case Builtin::BI__builtin___clear_cache: { 634 Value *Begin = EmitScalarExpr(E->getArg(0)); 635 Value *End = EmitScalarExpr(E->getArg(1)); 636 Value *F = CGM.getIntrinsic(Intrinsic::clear_cache); 637 return RValue::get(Builder.CreateCall(F, {Begin, End})); 638 } 639 case Builtin::BI__builtin_trap: 640 return RValue::get(EmitTrapCall(Intrinsic::trap)); 641 case Builtin::BI__debugbreak: 642 return RValue::get(EmitTrapCall(Intrinsic::debugtrap)); 643 case Builtin::BI__builtin_unreachable: { 644 if (SanOpts.has(SanitizerKind::Unreachable)) { 645 SanitizerScope SanScope(this); 646 EmitCheck(std::make_pair(static_cast<llvm::Value *>(Builder.getFalse()), 647 SanitizerKind::Unreachable), 648 "builtin_unreachable", EmitCheckSourceLocation(E->getExprLoc()), 649 None); 650 } else 651 Builder.CreateUnreachable(); 652 653 // We do need to preserve an insertion point. 654 EmitBlock(createBasicBlock("unreachable.cont")); 655 656 return RValue::get(nullptr); 657 } 658 659 case Builtin::BI__builtin_powi: 660 case Builtin::BI__builtin_powif: 661 case Builtin::BI__builtin_powil: { 662 Value *Base = EmitScalarExpr(E->getArg(0)); 663 Value *Exponent = EmitScalarExpr(E->getArg(1)); 664 llvm::Type *ArgType = Base->getType(); 665 Value *F = CGM.getIntrinsic(Intrinsic::powi, ArgType); 666 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 667 } 668 669 case Builtin::BI__builtin_isgreater: 670 case Builtin::BI__builtin_isgreaterequal: 671 case Builtin::BI__builtin_isless: 672 case Builtin::BI__builtin_islessequal: 673 case Builtin::BI__builtin_islessgreater: 674 case Builtin::BI__builtin_isunordered: { 675 // Ordered comparisons: we know the arguments to these are matching scalar 676 // floating point values. 677 Value *LHS = EmitScalarExpr(E->getArg(0)); 678 Value *RHS = EmitScalarExpr(E->getArg(1)); 679 680 switch (BuiltinID) { 681 default: llvm_unreachable("Unknown ordered comparison"); 682 case Builtin::BI__builtin_isgreater: 683 LHS = Builder.CreateFCmpOGT(LHS, RHS, "cmp"); 684 break; 685 case Builtin::BI__builtin_isgreaterequal: 686 LHS = Builder.CreateFCmpOGE(LHS, RHS, "cmp"); 687 break; 688 case Builtin::BI__builtin_isless: 689 LHS = Builder.CreateFCmpOLT(LHS, RHS, "cmp"); 690 break; 691 case Builtin::BI__builtin_islessequal: 692 LHS = Builder.CreateFCmpOLE(LHS, RHS, "cmp"); 693 break; 694 case Builtin::BI__builtin_islessgreater: 695 LHS = Builder.CreateFCmpONE(LHS, RHS, "cmp"); 696 break; 697 case Builtin::BI__builtin_isunordered: 698 LHS = Builder.CreateFCmpUNO(LHS, RHS, "cmp"); 699 break; 700 } 701 // ZExt bool to int type. 702 return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType()))); 703 } 704 case Builtin::BI__builtin_isnan: { 705 Value *V = EmitScalarExpr(E->getArg(0)); 706 V = Builder.CreateFCmpUNO(V, V, "cmp"); 707 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 708 } 709 710 case Builtin::BI__builtin_isinf: { 711 // isinf(x) --> fabs(x) == infinity 712 Value *V = EmitScalarExpr(E->getArg(0)); 713 V = EmitFAbs(*this, V); 714 715 V = Builder.CreateFCmpOEQ(V, ConstantFP::getInfinity(V->getType()),"isinf"); 716 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 717 } 718 719 case Builtin::BI__builtin_isinf_sign: { 720 // isinf_sign(x) -> fabs(x) == infinity ? (signbit(x) ? -1 : 1) : 0 721 Value *Arg = EmitScalarExpr(E->getArg(0)); 722 Value *AbsArg = EmitFAbs(*this, Arg); 723 Value *IsInf = Builder.CreateFCmpOEQ( 724 AbsArg, ConstantFP::getInfinity(Arg->getType()), "isinf"); 725 Value *IsNeg = EmitSignBit(*this, Arg); 726 727 llvm::Type *IntTy = ConvertType(E->getType()); 728 Value *Zero = Constant::getNullValue(IntTy); 729 Value *One = ConstantInt::get(IntTy, 1); 730 Value *NegativeOne = ConstantInt::get(IntTy, -1); 731 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); 732 Value *Result = Builder.CreateSelect(IsInf, SignResult, Zero); 733 return RValue::get(Result); 734 } 735 736 case Builtin::BI__builtin_isnormal: { 737 // isnormal(x) --> x == x && fabsf(x) < infinity && fabsf(x) >= float_min 738 Value *V = EmitScalarExpr(E->getArg(0)); 739 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 740 741 Value *Abs = EmitFAbs(*this, V); 742 Value *IsLessThanInf = 743 Builder.CreateFCmpULT(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 744 APFloat Smallest = APFloat::getSmallestNormalized( 745 getContext().getFloatTypeSemantics(E->getArg(0)->getType())); 746 Value *IsNormal = 747 Builder.CreateFCmpUGE(Abs, ConstantFP::get(V->getContext(), Smallest), 748 "isnormal"); 749 V = Builder.CreateAnd(Eq, IsLessThanInf, "and"); 750 V = Builder.CreateAnd(V, IsNormal, "and"); 751 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 752 } 753 754 case Builtin::BI__builtin_isfinite: { 755 // isfinite(x) --> x == x && fabs(x) != infinity; 756 Value *V = EmitScalarExpr(E->getArg(0)); 757 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 758 759 Value *Abs = EmitFAbs(*this, V); 760 Value *IsNotInf = 761 Builder.CreateFCmpUNE(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 762 763 V = Builder.CreateAnd(Eq, IsNotInf, "and"); 764 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 765 } 766 767 case Builtin::BI__builtin_fpclassify: { 768 Value *V = EmitScalarExpr(E->getArg(5)); 769 llvm::Type *Ty = ConvertType(E->getArg(5)->getType()); 770 771 // Create Result 772 BasicBlock *Begin = Builder.GetInsertBlock(); 773 BasicBlock *End = createBasicBlock("fpclassify_end", this->CurFn); 774 Builder.SetInsertPoint(End); 775 PHINode *Result = 776 Builder.CreatePHI(ConvertType(E->getArg(0)->getType()), 4, 777 "fpclassify_result"); 778 779 // if (V==0) return FP_ZERO 780 Builder.SetInsertPoint(Begin); 781 Value *IsZero = Builder.CreateFCmpOEQ(V, Constant::getNullValue(Ty), 782 "iszero"); 783 Value *ZeroLiteral = EmitScalarExpr(E->getArg(4)); 784 BasicBlock *NotZero = createBasicBlock("fpclassify_not_zero", this->CurFn); 785 Builder.CreateCondBr(IsZero, End, NotZero); 786 Result->addIncoming(ZeroLiteral, Begin); 787 788 // if (V != V) return FP_NAN 789 Builder.SetInsertPoint(NotZero); 790 Value *IsNan = Builder.CreateFCmpUNO(V, V, "cmp"); 791 Value *NanLiteral = EmitScalarExpr(E->getArg(0)); 792 BasicBlock *NotNan = createBasicBlock("fpclassify_not_nan", this->CurFn); 793 Builder.CreateCondBr(IsNan, End, NotNan); 794 Result->addIncoming(NanLiteral, NotZero); 795 796 // if (fabs(V) == infinity) return FP_INFINITY 797 Builder.SetInsertPoint(NotNan); 798 Value *VAbs = EmitFAbs(*this, V); 799 Value *IsInf = 800 Builder.CreateFCmpOEQ(VAbs, ConstantFP::getInfinity(V->getType()), 801 "isinf"); 802 Value *InfLiteral = EmitScalarExpr(E->getArg(1)); 803 BasicBlock *NotInf = createBasicBlock("fpclassify_not_inf", this->CurFn); 804 Builder.CreateCondBr(IsInf, End, NotInf); 805 Result->addIncoming(InfLiteral, NotNan); 806 807 // if (fabs(V) >= MIN_NORMAL) return FP_NORMAL else FP_SUBNORMAL 808 Builder.SetInsertPoint(NotInf); 809 APFloat Smallest = APFloat::getSmallestNormalized( 810 getContext().getFloatTypeSemantics(E->getArg(5)->getType())); 811 Value *IsNormal = 812 Builder.CreateFCmpUGE(VAbs, ConstantFP::get(V->getContext(), Smallest), 813 "isnormal"); 814 Value *NormalResult = 815 Builder.CreateSelect(IsNormal, EmitScalarExpr(E->getArg(2)), 816 EmitScalarExpr(E->getArg(3))); 817 Builder.CreateBr(End); 818 Result->addIncoming(NormalResult, NotInf); 819 820 // return Result 821 Builder.SetInsertPoint(End); 822 return RValue::get(Result); 823 } 824 825 case Builtin::BIalloca: 826 case Builtin::BI_alloca: 827 case Builtin::BI__builtin_alloca: { 828 Value *Size = EmitScalarExpr(E->getArg(0)); 829 return RValue::get(Builder.CreateAlloca(Builder.getInt8Ty(), Size)); 830 } 831 case Builtin::BIbzero: 832 case Builtin::BI__builtin_bzero: { 833 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 834 Value *SizeVal = EmitScalarExpr(E->getArg(1)); 835 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 836 E->getArg(0)->getExprLoc(), FD, 0); 837 Builder.CreateMemSet(Dest, Builder.getInt8(0), SizeVal, false); 838 return RValue::get(Dest.getPointer()); 839 } 840 case Builtin::BImemcpy: 841 case Builtin::BI__builtin_memcpy: { 842 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 843 Address Src = EmitPointerWithAlignment(E->getArg(1)); 844 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 845 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 846 E->getArg(0)->getExprLoc(), FD, 0); 847 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 848 E->getArg(1)->getExprLoc(), FD, 1); 849 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 850 return RValue::get(Dest.getPointer()); 851 } 852 853 case Builtin::BI__builtin___memcpy_chk: { 854 // fold __builtin_memcpy_chk(x, y, cst1, cst2) to memcpy iff cst1<=cst2. 855 llvm::APSInt Size, DstSize; 856 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 857 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 858 break; 859 if (Size.ugt(DstSize)) 860 break; 861 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 862 Address Src = EmitPointerWithAlignment(E->getArg(1)); 863 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 864 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 865 return RValue::get(Dest.getPointer()); 866 } 867 868 case Builtin::BI__builtin_objc_memmove_collectable: { 869 Address DestAddr = EmitPointerWithAlignment(E->getArg(0)); 870 Address SrcAddr = EmitPointerWithAlignment(E->getArg(1)); 871 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 872 CGM.getObjCRuntime().EmitGCMemmoveCollectable(*this, 873 DestAddr, SrcAddr, SizeVal); 874 return RValue::get(DestAddr.getPointer()); 875 } 876 877 case Builtin::BI__builtin___memmove_chk: { 878 // fold __builtin_memmove_chk(x, y, cst1, cst2) to memmove iff cst1<=cst2. 879 llvm::APSInt Size, DstSize; 880 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 881 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 882 break; 883 if (Size.ugt(DstSize)) 884 break; 885 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 886 Address Src = EmitPointerWithAlignment(E->getArg(1)); 887 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 888 Builder.CreateMemMove(Dest, Src, SizeVal, false); 889 return RValue::get(Dest.getPointer()); 890 } 891 892 case Builtin::BImemmove: 893 case Builtin::BI__builtin_memmove: { 894 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 895 Address Src = EmitPointerWithAlignment(E->getArg(1)); 896 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 897 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 898 E->getArg(0)->getExprLoc(), FD, 0); 899 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 900 E->getArg(1)->getExprLoc(), FD, 1); 901 Builder.CreateMemMove(Dest, Src, SizeVal, false); 902 return RValue::get(Dest.getPointer()); 903 } 904 case Builtin::BImemset: 905 case Builtin::BI__builtin_memset: { 906 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 907 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 908 Builder.getInt8Ty()); 909 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 910 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 911 E->getArg(0)->getExprLoc(), FD, 0); 912 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 913 return RValue::get(Dest.getPointer()); 914 } 915 case Builtin::BI__builtin___memset_chk: { 916 // fold __builtin_memset_chk(x, y, cst1, cst2) to memset iff cst1<=cst2. 917 llvm::APSInt Size, DstSize; 918 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 919 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 920 break; 921 if (Size.ugt(DstSize)) 922 break; 923 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 924 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 925 Builder.getInt8Ty()); 926 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 927 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 928 return RValue::get(Dest.getPointer()); 929 } 930 case Builtin::BI__builtin_dwarf_cfa: { 931 // The offset in bytes from the first argument to the CFA. 932 // 933 // Why on earth is this in the frontend? Is there any reason at 934 // all that the backend can't reasonably determine this while 935 // lowering llvm.eh.dwarf.cfa()? 936 // 937 // TODO: If there's a satisfactory reason, add a target hook for 938 // this instead of hard-coding 0, which is correct for most targets. 939 int32_t Offset = 0; 940 941 Value *F = CGM.getIntrinsic(Intrinsic::eh_dwarf_cfa); 942 return RValue::get(Builder.CreateCall(F, 943 llvm::ConstantInt::get(Int32Ty, Offset))); 944 } 945 case Builtin::BI__builtin_return_address: { 946 Value *Depth = 947 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 948 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 949 return RValue::get(Builder.CreateCall(F, Depth)); 950 } 951 case Builtin::BI__builtin_frame_address: { 952 Value *Depth = 953 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 954 Value *F = CGM.getIntrinsic(Intrinsic::frameaddress); 955 return RValue::get(Builder.CreateCall(F, Depth)); 956 } 957 case Builtin::BI__builtin_extract_return_addr: { 958 Value *Address = EmitScalarExpr(E->getArg(0)); 959 Value *Result = getTargetHooks().decodeReturnAddress(*this, Address); 960 return RValue::get(Result); 961 } 962 case Builtin::BI__builtin_frob_return_addr: { 963 Value *Address = EmitScalarExpr(E->getArg(0)); 964 Value *Result = getTargetHooks().encodeReturnAddress(*this, Address); 965 return RValue::get(Result); 966 } 967 case Builtin::BI__builtin_dwarf_sp_column: { 968 llvm::IntegerType *Ty 969 = cast<llvm::IntegerType>(ConvertType(E->getType())); 970 int Column = getTargetHooks().getDwarfEHStackPointer(CGM); 971 if (Column == -1) { 972 CGM.ErrorUnsupported(E, "__builtin_dwarf_sp_column"); 973 return RValue::get(llvm::UndefValue::get(Ty)); 974 } 975 return RValue::get(llvm::ConstantInt::get(Ty, Column, true)); 976 } 977 case Builtin::BI__builtin_init_dwarf_reg_size_table: { 978 Value *Address = EmitScalarExpr(E->getArg(0)); 979 if (getTargetHooks().initDwarfEHRegSizeTable(*this, Address)) 980 CGM.ErrorUnsupported(E, "__builtin_init_dwarf_reg_size_table"); 981 return RValue::get(llvm::UndefValue::get(ConvertType(E->getType()))); 982 } 983 case Builtin::BI__builtin_eh_return: { 984 Value *Int = EmitScalarExpr(E->getArg(0)); 985 Value *Ptr = EmitScalarExpr(E->getArg(1)); 986 987 llvm::IntegerType *IntTy = cast<llvm::IntegerType>(Int->getType()); 988 assert((IntTy->getBitWidth() == 32 || IntTy->getBitWidth() == 64) && 989 "LLVM's __builtin_eh_return only supports 32- and 64-bit variants"); 990 Value *F = CGM.getIntrinsic(IntTy->getBitWidth() == 32 991 ? Intrinsic::eh_return_i32 992 : Intrinsic::eh_return_i64); 993 Builder.CreateCall(F, {Int, Ptr}); 994 Builder.CreateUnreachable(); 995 996 // We do need to preserve an insertion point. 997 EmitBlock(createBasicBlock("builtin_eh_return.cont")); 998 999 return RValue::get(nullptr); 1000 } 1001 case Builtin::BI__builtin_unwind_init: { 1002 Value *F = CGM.getIntrinsic(Intrinsic::eh_unwind_init); 1003 return RValue::get(Builder.CreateCall(F)); 1004 } 1005 case Builtin::BI__builtin_extend_pointer: { 1006 // Extends a pointer to the size of an _Unwind_Word, which is 1007 // uint64_t on all platforms. Generally this gets poked into a 1008 // register and eventually used as an address, so if the 1009 // addressing registers are wider than pointers and the platform 1010 // doesn't implicitly ignore high-order bits when doing 1011 // addressing, we need to make sure we zext / sext based on 1012 // the platform's expectations. 1013 // 1014 // See: http://gcc.gnu.org/ml/gcc-bugs/2002-02/msg00237.html 1015 1016 // Cast the pointer to intptr_t. 1017 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1018 Value *Result = Builder.CreatePtrToInt(Ptr, IntPtrTy, "extend.cast"); 1019 1020 // If that's 64 bits, we're done. 1021 if (IntPtrTy->getBitWidth() == 64) 1022 return RValue::get(Result); 1023 1024 // Otherwise, ask the codegen data what to do. 1025 if (getTargetHooks().extendPointerWithSExt()) 1026 return RValue::get(Builder.CreateSExt(Result, Int64Ty, "extend.sext")); 1027 else 1028 return RValue::get(Builder.CreateZExt(Result, Int64Ty, "extend.zext")); 1029 } 1030 case Builtin::BI__builtin_setjmp: { 1031 // Buffer is a void**. 1032 Address Buf = EmitPointerWithAlignment(E->getArg(0)); 1033 1034 // Store the frame pointer to the setjmp buffer. 1035 Value *FrameAddr = 1036 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1037 ConstantInt::get(Int32Ty, 0)); 1038 Builder.CreateStore(FrameAddr, Buf); 1039 1040 // Store the stack pointer to the setjmp buffer. 1041 Value *StackAddr = 1042 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::stacksave)); 1043 Address StackSaveSlot = 1044 Builder.CreateConstInBoundsGEP(Buf, 2, getPointerSize()); 1045 Builder.CreateStore(StackAddr, StackSaveSlot); 1046 1047 // Call LLVM's EH setjmp, which is lightweight. 1048 Value *F = CGM.getIntrinsic(Intrinsic::eh_sjlj_setjmp); 1049 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1050 return RValue::get(Builder.CreateCall(F, Buf.getPointer())); 1051 } 1052 case Builtin::BI__builtin_longjmp: { 1053 Value *Buf = EmitScalarExpr(E->getArg(0)); 1054 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1055 1056 // Call LLVM's EH longjmp, which is lightweight. 1057 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::eh_sjlj_longjmp), Buf); 1058 1059 // longjmp doesn't return; mark this as unreachable. 1060 Builder.CreateUnreachable(); 1061 1062 // We do need to preserve an insertion point. 1063 EmitBlock(createBasicBlock("longjmp.cont")); 1064 1065 return RValue::get(nullptr); 1066 } 1067 case Builtin::BI__sync_fetch_and_add: 1068 case Builtin::BI__sync_fetch_and_sub: 1069 case Builtin::BI__sync_fetch_and_or: 1070 case Builtin::BI__sync_fetch_and_and: 1071 case Builtin::BI__sync_fetch_and_xor: 1072 case Builtin::BI__sync_fetch_and_nand: 1073 case Builtin::BI__sync_add_and_fetch: 1074 case Builtin::BI__sync_sub_and_fetch: 1075 case Builtin::BI__sync_and_and_fetch: 1076 case Builtin::BI__sync_or_and_fetch: 1077 case Builtin::BI__sync_xor_and_fetch: 1078 case Builtin::BI__sync_nand_and_fetch: 1079 case Builtin::BI__sync_val_compare_and_swap: 1080 case Builtin::BI__sync_bool_compare_and_swap: 1081 case Builtin::BI__sync_lock_test_and_set: 1082 case Builtin::BI__sync_lock_release: 1083 case Builtin::BI__sync_swap: 1084 llvm_unreachable("Shouldn't make it through sema"); 1085 case Builtin::BI__sync_fetch_and_add_1: 1086 case Builtin::BI__sync_fetch_and_add_2: 1087 case Builtin::BI__sync_fetch_and_add_4: 1088 case Builtin::BI__sync_fetch_and_add_8: 1089 case Builtin::BI__sync_fetch_and_add_16: 1090 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E); 1091 case Builtin::BI__sync_fetch_and_sub_1: 1092 case Builtin::BI__sync_fetch_and_sub_2: 1093 case Builtin::BI__sync_fetch_and_sub_4: 1094 case Builtin::BI__sync_fetch_and_sub_8: 1095 case Builtin::BI__sync_fetch_and_sub_16: 1096 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E); 1097 case Builtin::BI__sync_fetch_and_or_1: 1098 case Builtin::BI__sync_fetch_and_or_2: 1099 case Builtin::BI__sync_fetch_and_or_4: 1100 case Builtin::BI__sync_fetch_and_or_8: 1101 case Builtin::BI__sync_fetch_and_or_16: 1102 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E); 1103 case Builtin::BI__sync_fetch_and_and_1: 1104 case Builtin::BI__sync_fetch_and_and_2: 1105 case Builtin::BI__sync_fetch_and_and_4: 1106 case Builtin::BI__sync_fetch_and_and_8: 1107 case Builtin::BI__sync_fetch_and_and_16: 1108 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E); 1109 case Builtin::BI__sync_fetch_and_xor_1: 1110 case Builtin::BI__sync_fetch_and_xor_2: 1111 case Builtin::BI__sync_fetch_and_xor_4: 1112 case Builtin::BI__sync_fetch_and_xor_8: 1113 case Builtin::BI__sync_fetch_and_xor_16: 1114 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E); 1115 case Builtin::BI__sync_fetch_and_nand_1: 1116 case Builtin::BI__sync_fetch_and_nand_2: 1117 case Builtin::BI__sync_fetch_and_nand_4: 1118 case Builtin::BI__sync_fetch_and_nand_8: 1119 case Builtin::BI__sync_fetch_and_nand_16: 1120 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Nand, E); 1121 1122 // Clang extensions: not overloaded yet. 1123 case Builtin::BI__sync_fetch_and_min: 1124 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E); 1125 case Builtin::BI__sync_fetch_and_max: 1126 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Max, E); 1127 case Builtin::BI__sync_fetch_and_umin: 1128 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMin, E); 1129 case Builtin::BI__sync_fetch_and_umax: 1130 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMax, E); 1131 1132 case Builtin::BI__sync_add_and_fetch_1: 1133 case Builtin::BI__sync_add_and_fetch_2: 1134 case Builtin::BI__sync_add_and_fetch_4: 1135 case Builtin::BI__sync_add_and_fetch_8: 1136 case Builtin::BI__sync_add_and_fetch_16: 1137 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Add, E, 1138 llvm::Instruction::Add); 1139 case Builtin::BI__sync_sub_and_fetch_1: 1140 case Builtin::BI__sync_sub_and_fetch_2: 1141 case Builtin::BI__sync_sub_and_fetch_4: 1142 case Builtin::BI__sync_sub_and_fetch_8: 1143 case Builtin::BI__sync_sub_and_fetch_16: 1144 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Sub, E, 1145 llvm::Instruction::Sub); 1146 case Builtin::BI__sync_and_and_fetch_1: 1147 case Builtin::BI__sync_and_and_fetch_2: 1148 case Builtin::BI__sync_and_and_fetch_4: 1149 case Builtin::BI__sync_and_and_fetch_8: 1150 case Builtin::BI__sync_and_and_fetch_16: 1151 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::And, E, 1152 llvm::Instruction::And); 1153 case Builtin::BI__sync_or_and_fetch_1: 1154 case Builtin::BI__sync_or_and_fetch_2: 1155 case Builtin::BI__sync_or_and_fetch_4: 1156 case Builtin::BI__sync_or_and_fetch_8: 1157 case Builtin::BI__sync_or_and_fetch_16: 1158 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Or, E, 1159 llvm::Instruction::Or); 1160 case Builtin::BI__sync_xor_and_fetch_1: 1161 case Builtin::BI__sync_xor_and_fetch_2: 1162 case Builtin::BI__sync_xor_and_fetch_4: 1163 case Builtin::BI__sync_xor_and_fetch_8: 1164 case Builtin::BI__sync_xor_and_fetch_16: 1165 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Xor, E, 1166 llvm::Instruction::Xor); 1167 case Builtin::BI__sync_nand_and_fetch_1: 1168 case Builtin::BI__sync_nand_and_fetch_2: 1169 case Builtin::BI__sync_nand_and_fetch_4: 1170 case Builtin::BI__sync_nand_and_fetch_8: 1171 case Builtin::BI__sync_nand_and_fetch_16: 1172 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Nand, E, 1173 llvm::Instruction::And, true); 1174 1175 case Builtin::BI__sync_val_compare_and_swap_1: 1176 case Builtin::BI__sync_val_compare_and_swap_2: 1177 case Builtin::BI__sync_val_compare_and_swap_4: 1178 case Builtin::BI__sync_val_compare_and_swap_8: 1179 case Builtin::BI__sync_val_compare_and_swap_16: 1180 return RValue::get(MakeAtomicCmpXchgValue(*this, E, false)); 1181 1182 case Builtin::BI__sync_bool_compare_and_swap_1: 1183 case Builtin::BI__sync_bool_compare_and_swap_2: 1184 case Builtin::BI__sync_bool_compare_and_swap_4: 1185 case Builtin::BI__sync_bool_compare_and_swap_8: 1186 case Builtin::BI__sync_bool_compare_and_swap_16: 1187 return RValue::get(MakeAtomicCmpXchgValue(*this, E, true)); 1188 1189 case Builtin::BI__sync_swap_1: 1190 case Builtin::BI__sync_swap_2: 1191 case Builtin::BI__sync_swap_4: 1192 case Builtin::BI__sync_swap_8: 1193 case Builtin::BI__sync_swap_16: 1194 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1195 1196 case Builtin::BI__sync_lock_test_and_set_1: 1197 case Builtin::BI__sync_lock_test_and_set_2: 1198 case Builtin::BI__sync_lock_test_and_set_4: 1199 case Builtin::BI__sync_lock_test_and_set_8: 1200 case Builtin::BI__sync_lock_test_and_set_16: 1201 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1202 1203 case Builtin::BI__sync_lock_release_1: 1204 case Builtin::BI__sync_lock_release_2: 1205 case Builtin::BI__sync_lock_release_4: 1206 case Builtin::BI__sync_lock_release_8: 1207 case Builtin::BI__sync_lock_release_16: { 1208 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1209 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 1210 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 1211 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 1212 StoreSize.getQuantity() * 8); 1213 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 1214 llvm::StoreInst *Store = 1215 Builder.CreateAlignedStore(llvm::Constant::getNullValue(ITy), Ptr, 1216 StoreSize); 1217 Store->setAtomic(llvm::Release); 1218 return RValue::get(nullptr); 1219 } 1220 1221 case Builtin::BI__sync_synchronize: { 1222 // We assume this is supposed to correspond to a C++0x-style 1223 // sequentially-consistent fence (i.e. this is only usable for 1224 // synchonization, not device I/O or anything like that). This intrinsic 1225 // is really badly designed in the sense that in theory, there isn't 1226 // any way to safely use it... but in practice, it mostly works 1227 // to use it with non-atomic loads and stores to get acquire/release 1228 // semantics. 1229 Builder.CreateFence(llvm::SequentiallyConsistent); 1230 return RValue::get(nullptr); 1231 } 1232 1233 case Builtin::BI__builtin_nontemporal_load: 1234 return RValue::get(EmitNontemporalLoad(*this, E)); 1235 case Builtin::BI__builtin_nontemporal_store: 1236 return RValue::get(EmitNontemporalStore(*this, E)); 1237 case Builtin::BI__c11_atomic_is_lock_free: 1238 case Builtin::BI__atomic_is_lock_free: { 1239 // Call "bool __atomic_is_lock_free(size_t size, void *ptr)". For the 1240 // __c11 builtin, ptr is 0 (indicating a properly-aligned object), since 1241 // _Atomic(T) is always properly-aligned. 1242 const char *LibCallName = "__atomic_is_lock_free"; 1243 CallArgList Args; 1244 Args.add(RValue::get(EmitScalarExpr(E->getArg(0))), 1245 getContext().getSizeType()); 1246 if (BuiltinID == Builtin::BI__atomic_is_lock_free) 1247 Args.add(RValue::get(EmitScalarExpr(E->getArg(1))), 1248 getContext().VoidPtrTy); 1249 else 1250 Args.add(RValue::get(llvm::Constant::getNullValue(VoidPtrTy)), 1251 getContext().VoidPtrTy); 1252 const CGFunctionInfo &FuncInfo = 1253 CGM.getTypes().arrangeFreeFunctionCall(E->getType(), Args, 1254 FunctionType::ExtInfo(), 1255 RequiredArgs::All); 1256 llvm::FunctionType *FTy = CGM.getTypes().GetFunctionType(FuncInfo); 1257 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, LibCallName); 1258 return EmitCall(FuncInfo, Func, ReturnValueSlot(), Args); 1259 } 1260 1261 case Builtin::BI__atomic_test_and_set: { 1262 // Look at the argument type to determine whether this is a volatile 1263 // operation. The parameter type is always volatile. 1264 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1265 bool Volatile = 1266 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1267 1268 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1269 unsigned AddrSpace = Ptr->getType()->getPointerAddressSpace(); 1270 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1271 Value *NewVal = Builder.getInt8(1); 1272 Value *Order = EmitScalarExpr(E->getArg(1)); 1273 if (isa<llvm::ConstantInt>(Order)) { 1274 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1275 AtomicRMWInst *Result = nullptr; 1276 switch (ord) { 1277 case 0: // memory_order_relaxed 1278 default: // invalid order 1279 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1280 Ptr, NewVal, 1281 llvm::Monotonic); 1282 break; 1283 case 1: // memory_order_consume 1284 case 2: // memory_order_acquire 1285 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1286 Ptr, NewVal, 1287 llvm::Acquire); 1288 break; 1289 case 3: // memory_order_release 1290 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1291 Ptr, NewVal, 1292 llvm::Release); 1293 break; 1294 case 4: // memory_order_acq_rel 1295 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1296 Ptr, NewVal, 1297 llvm::AcquireRelease); 1298 break; 1299 case 5: // memory_order_seq_cst 1300 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1301 Ptr, NewVal, 1302 llvm::SequentiallyConsistent); 1303 break; 1304 } 1305 Result->setVolatile(Volatile); 1306 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1307 } 1308 1309 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1310 1311 llvm::BasicBlock *BBs[5] = { 1312 createBasicBlock("monotonic", CurFn), 1313 createBasicBlock("acquire", CurFn), 1314 createBasicBlock("release", CurFn), 1315 createBasicBlock("acqrel", CurFn), 1316 createBasicBlock("seqcst", CurFn) 1317 }; 1318 llvm::AtomicOrdering Orders[5] = { 1319 llvm::Monotonic, llvm::Acquire, llvm::Release, 1320 llvm::AcquireRelease, llvm::SequentiallyConsistent 1321 }; 1322 1323 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1324 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1325 1326 Builder.SetInsertPoint(ContBB); 1327 PHINode *Result = Builder.CreatePHI(Int8Ty, 5, "was_set"); 1328 1329 for (unsigned i = 0; i < 5; ++i) { 1330 Builder.SetInsertPoint(BBs[i]); 1331 AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1332 Ptr, NewVal, Orders[i]); 1333 RMW->setVolatile(Volatile); 1334 Result->addIncoming(RMW, BBs[i]); 1335 Builder.CreateBr(ContBB); 1336 } 1337 1338 SI->addCase(Builder.getInt32(0), BBs[0]); 1339 SI->addCase(Builder.getInt32(1), BBs[1]); 1340 SI->addCase(Builder.getInt32(2), BBs[1]); 1341 SI->addCase(Builder.getInt32(3), BBs[2]); 1342 SI->addCase(Builder.getInt32(4), BBs[3]); 1343 SI->addCase(Builder.getInt32(5), BBs[4]); 1344 1345 Builder.SetInsertPoint(ContBB); 1346 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1347 } 1348 1349 case Builtin::BI__atomic_clear: { 1350 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1351 bool Volatile = 1352 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1353 1354 Address Ptr = EmitPointerWithAlignment(E->getArg(0)); 1355 unsigned AddrSpace = Ptr.getPointer()->getType()->getPointerAddressSpace(); 1356 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1357 Value *NewVal = Builder.getInt8(0); 1358 Value *Order = EmitScalarExpr(E->getArg(1)); 1359 if (isa<llvm::ConstantInt>(Order)) { 1360 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1361 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1362 switch (ord) { 1363 case 0: // memory_order_relaxed 1364 default: // invalid order 1365 Store->setOrdering(llvm::Monotonic); 1366 break; 1367 case 3: // memory_order_release 1368 Store->setOrdering(llvm::Release); 1369 break; 1370 case 5: // memory_order_seq_cst 1371 Store->setOrdering(llvm::SequentiallyConsistent); 1372 break; 1373 } 1374 return RValue::get(nullptr); 1375 } 1376 1377 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1378 1379 llvm::BasicBlock *BBs[3] = { 1380 createBasicBlock("monotonic", CurFn), 1381 createBasicBlock("release", CurFn), 1382 createBasicBlock("seqcst", CurFn) 1383 }; 1384 llvm::AtomicOrdering Orders[3] = { 1385 llvm::Monotonic, llvm::Release, llvm::SequentiallyConsistent 1386 }; 1387 1388 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1389 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1390 1391 for (unsigned i = 0; i < 3; ++i) { 1392 Builder.SetInsertPoint(BBs[i]); 1393 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1394 Store->setOrdering(Orders[i]); 1395 Builder.CreateBr(ContBB); 1396 } 1397 1398 SI->addCase(Builder.getInt32(0), BBs[0]); 1399 SI->addCase(Builder.getInt32(3), BBs[1]); 1400 SI->addCase(Builder.getInt32(5), BBs[2]); 1401 1402 Builder.SetInsertPoint(ContBB); 1403 return RValue::get(nullptr); 1404 } 1405 1406 case Builtin::BI__atomic_thread_fence: 1407 case Builtin::BI__atomic_signal_fence: 1408 case Builtin::BI__c11_atomic_thread_fence: 1409 case Builtin::BI__c11_atomic_signal_fence: { 1410 llvm::SynchronizationScope Scope; 1411 if (BuiltinID == Builtin::BI__atomic_signal_fence || 1412 BuiltinID == Builtin::BI__c11_atomic_signal_fence) 1413 Scope = llvm::SingleThread; 1414 else 1415 Scope = llvm::CrossThread; 1416 Value *Order = EmitScalarExpr(E->getArg(0)); 1417 if (isa<llvm::ConstantInt>(Order)) { 1418 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1419 switch (ord) { 1420 case 0: // memory_order_relaxed 1421 default: // invalid order 1422 break; 1423 case 1: // memory_order_consume 1424 case 2: // memory_order_acquire 1425 Builder.CreateFence(llvm::Acquire, Scope); 1426 break; 1427 case 3: // memory_order_release 1428 Builder.CreateFence(llvm::Release, Scope); 1429 break; 1430 case 4: // memory_order_acq_rel 1431 Builder.CreateFence(llvm::AcquireRelease, Scope); 1432 break; 1433 case 5: // memory_order_seq_cst 1434 Builder.CreateFence(llvm::SequentiallyConsistent, Scope); 1435 break; 1436 } 1437 return RValue::get(nullptr); 1438 } 1439 1440 llvm::BasicBlock *AcquireBB, *ReleaseBB, *AcqRelBB, *SeqCstBB; 1441 AcquireBB = createBasicBlock("acquire", CurFn); 1442 ReleaseBB = createBasicBlock("release", CurFn); 1443 AcqRelBB = createBasicBlock("acqrel", CurFn); 1444 SeqCstBB = createBasicBlock("seqcst", CurFn); 1445 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1446 1447 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1448 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, ContBB); 1449 1450 Builder.SetInsertPoint(AcquireBB); 1451 Builder.CreateFence(llvm::Acquire, Scope); 1452 Builder.CreateBr(ContBB); 1453 SI->addCase(Builder.getInt32(1), AcquireBB); 1454 SI->addCase(Builder.getInt32(2), AcquireBB); 1455 1456 Builder.SetInsertPoint(ReleaseBB); 1457 Builder.CreateFence(llvm::Release, Scope); 1458 Builder.CreateBr(ContBB); 1459 SI->addCase(Builder.getInt32(3), ReleaseBB); 1460 1461 Builder.SetInsertPoint(AcqRelBB); 1462 Builder.CreateFence(llvm::AcquireRelease, Scope); 1463 Builder.CreateBr(ContBB); 1464 SI->addCase(Builder.getInt32(4), AcqRelBB); 1465 1466 Builder.SetInsertPoint(SeqCstBB); 1467 Builder.CreateFence(llvm::SequentiallyConsistent, Scope); 1468 Builder.CreateBr(ContBB); 1469 SI->addCase(Builder.getInt32(5), SeqCstBB); 1470 1471 Builder.SetInsertPoint(ContBB); 1472 return RValue::get(nullptr); 1473 } 1474 1475 // Library functions with special handling. 1476 case Builtin::BIsqrt: 1477 case Builtin::BIsqrtf: 1478 case Builtin::BIsqrtl: { 1479 // Transform a call to sqrt* into a @llvm.sqrt.* intrinsic call, but only 1480 // in finite- or unsafe-math mode (the intrinsic has different semantics 1481 // for handling negative numbers compared to the library function, so 1482 // -fmath-errno=0 is not enough). 1483 if (!FD->hasAttr<ConstAttr>()) 1484 break; 1485 if (!(CGM.getCodeGenOpts().UnsafeFPMath || 1486 CGM.getCodeGenOpts().NoNaNsFPMath)) 1487 break; 1488 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 1489 llvm::Type *ArgType = Arg0->getType(); 1490 Value *F = CGM.getIntrinsic(Intrinsic::sqrt, ArgType); 1491 return RValue::get(Builder.CreateCall(F, Arg0)); 1492 } 1493 1494 case Builtin::BI__builtin_pow: 1495 case Builtin::BI__builtin_powf: 1496 case Builtin::BI__builtin_powl: 1497 case Builtin::BIpow: 1498 case Builtin::BIpowf: 1499 case Builtin::BIpowl: { 1500 // Transform a call to pow* into a @llvm.pow.* intrinsic call. 1501 if (!FD->hasAttr<ConstAttr>()) 1502 break; 1503 Value *Base = EmitScalarExpr(E->getArg(0)); 1504 Value *Exponent = EmitScalarExpr(E->getArg(1)); 1505 llvm::Type *ArgType = Base->getType(); 1506 Value *F = CGM.getIntrinsic(Intrinsic::pow, ArgType); 1507 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 1508 } 1509 1510 case Builtin::BIfma: 1511 case Builtin::BIfmaf: 1512 case Builtin::BIfmal: 1513 case Builtin::BI__builtin_fma: 1514 case Builtin::BI__builtin_fmaf: 1515 case Builtin::BI__builtin_fmal: { 1516 // Rewrite fma to intrinsic. 1517 Value *FirstArg = EmitScalarExpr(E->getArg(0)); 1518 llvm::Type *ArgType = FirstArg->getType(); 1519 Value *F = CGM.getIntrinsic(Intrinsic::fma, ArgType); 1520 return RValue::get( 1521 Builder.CreateCall(F, {FirstArg, EmitScalarExpr(E->getArg(1)), 1522 EmitScalarExpr(E->getArg(2))})); 1523 } 1524 1525 case Builtin::BI__builtin_signbit: 1526 case Builtin::BI__builtin_signbitf: 1527 case Builtin::BI__builtin_signbitl: { 1528 return RValue::get( 1529 Builder.CreateZExt(EmitSignBit(*this, EmitScalarExpr(E->getArg(0))), 1530 ConvertType(E->getType()))); 1531 } 1532 case Builtin::BI__builtin_annotation: { 1533 llvm::Value *AnnVal = EmitScalarExpr(E->getArg(0)); 1534 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::annotation, 1535 AnnVal->getType()); 1536 1537 // Get the annotation string, go through casts. Sema requires this to be a 1538 // non-wide string literal, potentially casted, so the cast<> is safe. 1539 const Expr *AnnotationStrExpr = E->getArg(1)->IgnoreParenCasts(); 1540 StringRef Str = cast<StringLiteral>(AnnotationStrExpr)->getString(); 1541 return RValue::get(EmitAnnotationCall(F, AnnVal, Str, E->getExprLoc())); 1542 } 1543 case Builtin::BI__builtin_addcb: 1544 case Builtin::BI__builtin_addcs: 1545 case Builtin::BI__builtin_addc: 1546 case Builtin::BI__builtin_addcl: 1547 case Builtin::BI__builtin_addcll: 1548 case Builtin::BI__builtin_subcb: 1549 case Builtin::BI__builtin_subcs: 1550 case Builtin::BI__builtin_subc: 1551 case Builtin::BI__builtin_subcl: 1552 case Builtin::BI__builtin_subcll: { 1553 1554 // We translate all of these builtins from expressions of the form: 1555 // int x = ..., y = ..., carryin = ..., carryout, result; 1556 // result = __builtin_addc(x, y, carryin, &carryout); 1557 // 1558 // to LLVM IR of the form: 1559 // 1560 // %tmp1 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y) 1561 // %tmpsum1 = extractvalue {i32, i1} %tmp1, 0 1562 // %carry1 = extractvalue {i32, i1} %tmp1, 1 1563 // %tmp2 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %tmpsum1, 1564 // i32 %carryin) 1565 // %result = extractvalue {i32, i1} %tmp2, 0 1566 // %carry2 = extractvalue {i32, i1} %tmp2, 1 1567 // %tmp3 = or i1 %carry1, %carry2 1568 // %tmp4 = zext i1 %tmp3 to i32 1569 // store i32 %tmp4, i32* %carryout 1570 1571 // Scalarize our inputs. 1572 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1573 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1574 llvm::Value *Carryin = EmitScalarExpr(E->getArg(2)); 1575 Address CarryOutPtr = EmitPointerWithAlignment(E->getArg(3)); 1576 1577 // Decide if we are lowering to a uadd.with.overflow or usub.with.overflow. 1578 llvm::Intrinsic::ID IntrinsicId; 1579 switch (BuiltinID) { 1580 default: llvm_unreachable("Unknown multiprecision builtin id."); 1581 case Builtin::BI__builtin_addcb: 1582 case Builtin::BI__builtin_addcs: 1583 case Builtin::BI__builtin_addc: 1584 case Builtin::BI__builtin_addcl: 1585 case Builtin::BI__builtin_addcll: 1586 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1587 break; 1588 case Builtin::BI__builtin_subcb: 1589 case Builtin::BI__builtin_subcs: 1590 case Builtin::BI__builtin_subc: 1591 case Builtin::BI__builtin_subcl: 1592 case Builtin::BI__builtin_subcll: 1593 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1594 break; 1595 } 1596 1597 // Construct our resulting LLVM IR expression. 1598 llvm::Value *Carry1; 1599 llvm::Value *Sum1 = EmitOverflowIntrinsic(*this, IntrinsicId, 1600 X, Y, Carry1); 1601 llvm::Value *Carry2; 1602 llvm::Value *Sum2 = EmitOverflowIntrinsic(*this, IntrinsicId, 1603 Sum1, Carryin, Carry2); 1604 llvm::Value *CarryOut = Builder.CreateZExt(Builder.CreateOr(Carry1, Carry2), 1605 X->getType()); 1606 Builder.CreateStore(CarryOut, CarryOutPtr); 1607 return RValue::get(Sum2); 1608 } 1609 case Builtin::BI__builtin_uadd_overflow: 1610 case Builtin::BI__builtin_uaddl_overflow: 1611 case Builtin::BI__builtin_uaddll_overflow: 1612 case Builtin::BI__builtin_usub_overflow: 1613 case Builtin::BI__builtin_usubl_overflow: 1614 case Builtin::BI__builtin_usubll_overflow: 1615 case Builtin::BI__builtin_umul_overflow: 1616 case Builtin::BI__builtin_umull_overflow: 1617 case Builtin::BI__builtin_umulll_overflow: 1618 case Builtin::BI__builtin_sadd_overflow: 1619 case Builtin::BI__builtin_saddl_overflow: 1620 case Builtin::BI__builtin_saddll_overflow: 1621 case Builtin::BI__builtin_ssub_overflow: 1622 case Builtin::BI__builtin_ssubl_overflow: 1623 case Builtin::BI__builtin_ssubll_overflow: 1624 case Builtin::BI__builtin_smul_overflow: 1625 case Builtin::BI__builtin_smull_overflow: 1626 case Builtin::BI__builtin_smulll_overflow: { 1627 1628 // We translate all of these builtins directly to the relevant llvm IR node. 1629 1630 // Scalarize our inputs. 1631 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1632 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1633 Address SumOutPtr = EmitPointerWithAlignment(E->getArg(2)); 1634 1635 // Decide which of the overflow intrinsics we are lowering to: 1636 llvm::Intrinsic::ID IntrinsicId; 1637 switch (BuiltinID) { 1638 default: llvm_unreachable("Unknown security overflow builtin id."); 1639 case Builtin::BI__builtin_uadd_overflow: 1640 case Builtin::BI__builtin_uaddl_overflow: 1641 case Builtin::BI__builtin_uaddll_overflow: 1642 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1643 break; 1644 case Builtin::BI__builtin_usub_overflow: 1645 case Builtin::BI__builtin_usubl_overflow: 1646 case Builtin::BI__builtin_usubll_overflow: 1647 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1648 break; 1649 case Builtin::BI__builtin_umul_overflow: 1650 case Builtin::BI__builtin_umull_overflow: 1651 case Builtin::BI__builtin_umulll_overflow: 1652 IntrinsicId = llvm::Intrinsic::umul_with_overflow; 1653 break; 1654 case Builtin::BI__builtin_sadd_overflow: 1655 case Builtin::BI__builtin_saddl_overflow: 1656 case Builtin::BI__builtin_saddll_overflow: 1657 IntrinsicId = llvm::Intrinsic::sadd_with_overflow; 1658 break; 1659 case Builtin::BI__builtin_ssub_overflow: 1660 case Builtin::BI__builtin_ssubl_overflow: 1661 case Builtin::BI__builtin_ssubll_overflow: 1662 IntrinsicId = llvm::Intrinsic::ssub_with_overflow; 1663 break; 1664 case Builtin::BI__builtin_smul_overflow: 1665 case Builtin::BI__builtin_smull_overflow: 1666 case Builtin::BI__builtin_smulll_overflow: 1667 IntrinsicId = llvm::Intrinsic::smul_with_overflow; 1668 break; 1669 } 1670 1671 1672 llvm::Value *Carry; 1673 llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry); 1674 Builder.CreateStore(Sum, SumOutPtr); 1675 1676 return RValue::get(Carry); 1677 } 1678 case Builtin::BI__builtin_addressof: 1679 return RValue::get(EmitLValue(E->getArg(0)).getPointer()); 1680 case Builtin::BI__builtin_operator_new: 1681 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 1682 E->getArg(0), false); 1683 case Builtin::BI__builtin_operator_delete: 1684 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 1685 E->getArg(0), true); 1686 case Builtin::BI__noop: 1687 // __noop always evaluates to an integer literal zero. 1688 return RValue::get(ConstantInt::get(IntTy, 0)); 1689 case Builtin::BI__builtin_call_with_static_chain: { 1690 const CallExpr *Call = cast<CallExpr>(E->getArg(0)); 1691 const Expr *Chain = E->getArg(1); 1692 return EmitCall(Call->getCallee()->getType(), 1693 EmitScalarExpr(Call->getCallee()), Call, ReturnValue, 1694 Call->getCalleeDecl(), EmitScalarExpr(Chain)); 1695 } 1696 case Builtin::BI_InterlockedExchange: 1697 case Builtin::BI_InterlockedExchangePointer: 1698 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1699 case Builtin::BI_InterlockedCompareExchangePointer: { 1700 llvm::Type *RTy; 1701 llvm::IntegerType *IntType = 1702 IntegerType::get(getLLVMContext(), 1703 getContext().getTypeSize(E->getType())); 1704 llvm::Type *IntPtrType = IntType->getPointerTo(); 1705 1706 llvm::Value *Destination = 1707 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), IntPtrType); 1708 1709 llvm::Value *Exchange = EmitScalarExpr(E->getArg(1)); 1710 RTy = Exchange->getType(); 1711 Exchange = Builder.CreatePtrToInt(Exchange, IntType); 1712 1713 llvm::Value *Comparand = 1714 Builder.CreatePtrToInt(EmitScalarExpr(E->getArg(2)), IntType); 1715 1716 auto Result = Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 1717 SequentiallyConsistent, 1718 SequentiallyConsistent); 1719 Result->setVolatile(true); 1720 1721 return RValue::get(Builder.CreateIntToPtr(Builder.CreateExtractValue(Result, 1722 0), 1723 RTy)); 1724 } 1725 case Builtin::BI_InterlockedCompareExchange: { 1726 AtomicCmpXchgInst *CXI = Builder.CreateAtomicCmpXchg( 1727 EmitScalarExpr(E->getArg(0)), 1728 EmitScalarExpr(E->getArg(2)), 1729 EmitScalarExpr(E->getArg(1)), 1730 SequentiallyConsistent, 1731 SequentiallyConsistent); 1732 CXI->setVolatile(true); 1733 return RValue::get(Builder.CreateExtractValue(CXI, 0)); 1734 } 1735 case Builtin::BI_InterlockedIncrement: { 1736 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 1737 AtomicRMWInst::Add, 1738 EmitScalarExpr(E->getArg(0)), 1739 ConstantInt::get(Int32Ty, 1), 1740 llvm::SequentiallyConsistent); 1741 RMWI->setVolatile(true); 1742 return RValue::get(Builder.CreateAdd(RMWI, ConstantInt::get(Int32Ty, 1))); 1743 } 1744 case Builtin::BI_InterlockedDecrement: { 1745 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 1746 AtomicRMWInst::Sub, 1747 EmitScalarExpr(E->getArg(0)), 1748 ConstantInt::get(Int32Ty, 1), 1749 llvm::SequentiallyConsistent); 1750 RMWI->setVolatile(true); 1751 return RValue::get(Builder.CreateSub(RMWI, ConstantInt::get(Int32Ty, 1))); 1752 } 1753 case Builtin::BI_InterlockedExchangeAdd: { 1754 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 1755 AtomicRMWInst::Add, 1756 EmitScalarExpr(E->getArg(0)), 1757 EmitScalarExpr(E->getArg(1)), 1758 llvm::SequentiallyConsistent); 1759 RMWI->setVolatile(true); 1760 return RValue::get(RMWI); 1761 } 1762 case Builtin::BI__readfsdword: { 1763 Value *IntToPtr = 1764 Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)), 1765 llvm::PointerType::get(CGM.Int32Ty, 257)); 1766 LoadInst *Load = 1767 Builder.CreateAlignedLoad(IntToPtr, /*Align=*/4, /*isVolatile=*/true); 1768 return RValue::get(Load); 1769 } 1770 1771 case Builtin::BI__exception_code: 1772 case Builtin::BI_exception_code: 1773 return RValue::get(EmitSEHExceptionCode()); 1774 case Builtin::BI__exception_info: 1775 case Builtin::BI_exception_info: 1776 return RValue::get(EmitSEHExceptionInfo()); 1777 case Builtin::BI__abnormal_termination: 1778 case Builtin::BI_abnormal_termination: 1779 return RValue::get(EmitSEHAbnormalTermination()); 1780 case Builtin::BI_setjmpex: { 1781 if (getTarget().getTriple().isOSMSVCRT()) { 1782 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 1783 llvm::AttributeSet ReturnsTwiceAttr = 1784 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 1785 llvm::Attribute::ReturnsTwice); 1786 llvm::Constant *SetJmpEx = CGM.CreateRuntimeFunction( 1787 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 1788 "_setjmpex", ReturnsTwiceAttr); 1789 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 1790 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 1791 llvm::Value *FrameAddr = 1792 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1793 ConstantInt::get(Int32Ty, 0)); 1794 llvm::Value *Args[] = {Buf, FrameAddr}; 1795 llvm::CallSite CS = EmitRuntimeCallOrInvoke(SetJmpEx, Args); 1796 CS.setAttributes(ReturnsTwiceAttr); 1797 return RValue::get(CS.getInstruction()); 1798 } 1799 break; 1800 } 1801 case Builtin::BI_setjmp: { 1802 if (getTarget().getTriple().isOSMSVCRT()) { 1803 llvm::AttributeSet ReturnsTwiceAttr = 1804 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 1805 llvm::Attribute::ReturnsTwice); 1806 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 1807 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 1808 llvm::CallSite CS; 1809 if (getTarget().getTriple().getArch() == llvm::Triple::x86) { 1810 llvm::Type *ArgTypes[] = {Int8PtrTy, IntTy}; 1811 llvm::Constant *SetJmp3 = CGM.CreateRuntimeFunction( 1812 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/true), 1813 "_setjmp3", ReturnsTwiceAttr); 1814 llvm::Value *Count = ConstantInt::get(IntTy, 0); 1815 llvm::Value *Args[] = {Buf, Count}; 1816 CS = EmitRuntimeCallOrInvoke(SetJmp3, Args); 1817 } else { 1818 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 1819 llvm::Constant *SetJmp = CGM.CreateRuntimeFunction( 1820 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 1821 "_setjmp", ReturnsTwiceAttr); 1822 llvm::Value *FrameAddr = 1823 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1824 ConstantInt::get(Int32Ty, 0)); 1825 llvm::Value *Args[] = {Buf, FrameAddr}; 1826 CS = EmitRuntimeCallOrInvoke(SetJmp, Args); 1827 } 1828 CS.setAttributes(ReturnsTwiceAttr); 1829 return RValue::get(CS.getInstruction()); 1830 } 1831 break; 1832 } 1833 1834 case Builtin::BI__GetExceptionInfo: { 1835 if (llvm::GlobalVariable *GV = 1836 CGM.getCXXABI().getThrowInfo(FD->getParamDecl(0)->getType())) 1837 return RValue::get(llvm::ConstantExpr::getBitCast(GV, CGM.Int8PtrTy)); 1838 break; 1839 } 1840 } 1841 1842 // If this is an alias for a lib function (e.g. __builtin_sin), emit 1843 // the call using the normal call path, but using the unmangled 1844 // version of the function name. 1845 if (getContext().BuiltinInfo.isLibFunction(BuiltinID)) 1846 return emitLibraryCall(*this, FD, E, 1847 CGM.getBuiltinLibFunction(FD, BuiltinID)); 1848 1849 // If this is a predefined lib function (e.g. malloc), emit the call 1850 // using exactly the normal call path. 1851 if (getContext().BuiltinInfo.isPredefinedLibFunction(BuiltinID)) 1852 return emitLibraryCall(*this, FD, E, EmitScalarExpr(E->getCallee())); 1853 1854 // Check that a call to a target specific builtin has the correct target 1855 // features. 1856 // This is down here to avoid non-target specific builtins, however, if 1857 // generic builtins start to require generic target features then we 1858 // can move this up to the beginning of the function. 1859 if (!checkBuiltinTargetFeatures(FD)) 1860 CGM.getDiags().Report(E->getLocStart(), diag::err_builtin_needs_feature) 1861 << FD->getDeclName() 1862 << CGM.getContext().BuiltinInfo.getRequiredFeatures(BuiltinID); 1863 1864 // See if we have a target specific intrinsic. 1865 const char *Name = getContext().BuiltinInfo.getName(BuiltinID); 1866 Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; 1867 if (const char *Prefix = 1868 llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch())) { 1869 IntrinsicID = Intrinsic::getIntrinsicForGCCBuiltin(Prefix, Name); 1870 // NOTE we dont need to perform a compatibility flag check here since the 1871 // intrinsics are declared in Builtins*.def via LANGBUILTIN which filter the 1872 // MS builtins via ALL_MS_LANGUAGES and are filtered earlier. 1873 if (IntrinsicID == Intrinsic::not_intrinsic) 1874 IntrinsicID = Intrinsic::getIntrinsicForMSBuiltin(Prefix, Name); 1875 } 1876 1877 if (IntrinsicID != Intrinsic::not_intrinsic) { 1878 SmallVector<Value*, 16> Args; 1879 1880 // Find out if any arguments are required to be integer constant 1881 // expressions. 1882 unsigned ICEArguments = 0; 1883 ASTContext::GetBuiltinTypeError Error; 1884 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 1885 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 1886 1887 Function *F = CGM.getIntrinsic(IntrinsicID); 1888 llvm::FunctionType *FTy = F->getFunctionType(); 1889 1890 for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) { 1891 Value *ArgValue; 1892 // If this is a normal argument, just emit it as a scalar. 1893 if ((ICEArguments & (1 << i)) == 0) { 1894 ArgValue = EmitScalarExpr(E->getArg(i)); 1895 } else { 1896 // If this is required to be a constant, constant fold it so that we 1897 // know that the generated intrinsic gets a ConstantInt. 1898 llvm::APSInt Result; 1899 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result,getContext()); 1900 assert(IsConst && "Constant arg isn't actually constant?"); 1901 (void)IsConst; 1902 ArgValue = llvm::ConstantInt::get(getLLVMContext(), Result); 1903 } 1904 1905 // If the intrinsic arg type is different from the builtin arg type 1906 // we need to do a bit cast. 1907 llvm::Type *PTy = FTy->getParamType(i); 1908 if (PTy != ArgValue->getType()) { 1909 assert(PTy->canLosslesslyBitCastTo(FTy->getParamType(i)) && 1910 "Must be able to losslessly bit cast to param"); 1911 ArgValue = Builder.CreateBitCast(ArgValue, PTy); 1912 } 1913 1914 Args.push_back(ArgValue); 1915 } 1916 1917 Value *V = Builder.CreateCall(F, Args); 1918 QualType BuiltinRetType = E->getType(); 1919 1920 llvm::Type *RetTy = VoidTy; 1921 if (!BuiltinRetType->isVoidType()) 1922 RetTy = ConvertType(BuiltinRetType); 1923 1924 if (RetTy != V->getType()) { 1925 assert(V->getType()->canLosslesslyBitCastTo(RetTy) && 1926 "Must be able to losslessly bit cast result type"); 1927 V = Builder.CreateBitCast(V, RetTy); 1928 } 1929 1930 return RValue::get(V); 1931 } 1932 1933 // See if we have a target specific builtin that needs to be lowered. 1934 if (Value *V = EmitTargetBuiltinExpr(BuiltinID, E)) 1935 return RValue::get(V); 1936 1937 ErrorUnsupported(E, "builtin function"); 1938 1939 // Unknown builtin, for now just dump it out and return undef. 1940 return GetUndefRValue(E->getType()); 1941 } 1942 1943 static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF, 1944 unsigned BuiltinID, const CallExpr *E, 1945 llvm::Triple::ArchType Arch) { 1946 switch (Arch) { 1947 case llvm::Triple::arm: 1948 case llvm::Triple::armeb: 1949 case llvm::Triple::thumb: 1950 case llvm::Triple::thumbeb: 1951 return CGF->EmitARMBuiltinExpr(BuiltinID, E); 1952 case llvm::Triple::aarch64: 1953 case llvm::Triple::aarch64_be: 1954 return CGF->EmitAArch64BuiltinExpr(BuiltinID, E); 1955 case llvm::Triple::x86: 1956 case llvm::Triple::x86_64: 1957 return CGF->EmitX86BuiltinExpr(BuiltinID, E); 1958 case llvm::Triple::ppc: 1959 case llvm::Triple::ppc64: 1960 case llvm::Triple::ppc64le: 1961 return CGF->EmitPPCBuiltinExpr(BuiltinID, E); 1962 case llvm::Triple::r600: 1963 case llvm::Triple::amdgcn: 1964 return CGF->EmitAMDGPUBuiltinExpr(BuiltinID, E); 1965 case llvm::Triple::systemz: 1966 return CGF->EmitSystemZBuiltinExpr(BuiltinID, E); 1967 case llvm::Triple::nvptx: 1968 case llvm::Triple::nvptx64: 1969 return CGF->EmitNVPTXBuiltinExpr(BuiltinID, E); 1970 case llvm::Triple::wasm32: 1971 case llvm::Triple::wasm64: 1972 return CGF->EmitWebAssemblyBuiltinExpr(BuiltinID, E); 1973 default: 1974 return nullptr; 1975 } 1976 } 1977 1978 Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID, 1979 const CallExpr *E) { 1980 if (getContext().BuiltinInfo.isAuxBuiltinID(BuiltinID)) { 1981 assert(getContext().getAuxTargetInfo() && "Missing aux target info"); 1982 return EmitTargetArchBuiltinExpr( 1983 this, getContext().BuiltinInfo.getAuxBuiltinID(BuiltinID), E, 1984 getContext().getAuxTargetInfo()->getTriple().getArch()); 1985 } 1986 1987 return EmitTargetArchBuiltinExpr(this, BuiltinID, E, 1988 getTarget().getTriple().getArch()); 1989 } 1990 1991 static llvm::VectorType *GetNeonType(CodeGenFunction *CGF, 1992 NeonTypeFlags TypeFlags, 1993 bool V1Ty=false) { 1994 int IsQuad = TypeFlags.isQuad(); 1995 switch (TypeFlags.getEltType()) { 1996 case NeonTypeFlags::Int8: 1997 case NeonTypeFlags::Poly8: 1998 return llvm::VectorType::get(CGF->Int8Ty, V1Ty ? 1 : (8 << IsQuad)); 1999 case NeonTypeFlags::Int16: 2000 case NeonTypeFlags::Poly16: 2001 case NeonTypeFlags::Float16: 2002 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 2003 case NeonTypeFlags::Int32: 2004 return llvm::VectorType::get(CGF->Int32Ty, V1Ty ? 1 : (2 << IsQuad)); 2005 case NeonTypeFlags::Int64: 2006 case NeonTypeFlags::Poly64: 2007 return llvm::VectorType::get(CGF->Int64Ty, V1Ty ? 1 : (1 << IsQuad)); 2008 case NeonTypeFlags::Poly128: 2009 // FIXME: i128 and f128 doesn't get fully support in Clang and llvm. 2010 // There is a lot of i128 and f128 API missing. 2011 // so we use v16i8 to represent poly128 and get pattern matched. 2012 return llvm::VectorType::get(CGF->Int8Ty, 16); 2013 case NeonTypeFlags::Float32: 2014 return llvm::VectorType::get(CGF->FloatTy, V1Ty ? 1 : (2 << IsQuad)); 2015 case NeonTypeFlags::Float64: 2016 return llvm::VectorType::get(CGF->DoubleTy, V1Ty ? 1 : (1 << IsQuad)); 2017 } 2018 llvm_unreachable("Unknown vector element type!"); 2019 } 2020 2021 static llvm::VectorType *GetFloatNeonType(CodeGenFunction *CGF, 2022 NeonTypeFlags IntTypeFlags) { 2023 int IsQuad = IntTypeFlags.isQuad(); 2024 switch (IntTypeFlags.getEltType()) { 2025 case NeonTypeFlags::Int32: 2026 return llvm::VectorType::get(CGF->FloatTy, (2 << IsQuad)); 2027 case NeonTypeFlags::Int64: 2028 return llvm::VectorType::get(CGF->DoubleTy, (1 << IsQuad)); 2029 default: 2030 llvm_unreachable("Type can't be converted to floating-point!"); 2031 } 2032 } 2033 2034 Value *CodeGenFunction::EmitNeonSplat(Value *V, Constant *C) { 2035 unsigned nElts = cast<llvm::VectorType>(V->getType())->getNumElements(); 2036 Value* SV = llvm::ConstantVector::getSplat(nElts, C); 2037 return Builder.CreateShuffleVector(V, V, SV, "lane"); 2038 } 2039 2040 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, 2041 const char *name, 2042 unsigned shift, bool rightshift) { 2043 unsigned j = 0; 2044 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 2045 ai != ae; ++ai, ++j) 2046 if (shift > 0 && shift == j) 2047 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); 2048 else 2049 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); 2050 2051 return Builder.CreateCall(F, Ops, name); 2052 } 2053 2054 Value *CodeGenFunction::EmitNeonShiftVector(Value *V, llvm::Type *Ty, 2055 bool neg) { 2056 int SV = cast<ConstantInt>(V)->getSExtValue(); 2057 return ConstantInt::get(Ty, neg ? -SV : SV); 2058 } 2059 2060 // \brief Right-shift a vector by a constant. 2061 Value *CodeGenFunction::EmitNeonRShiftImm(Value *Vec, Value *Shift, 2062 llvm::Type *Ty, bool usgn, 2063 const char *name) { 2064 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 2065 2066 int ShiftAmt = cast<ConstantInt>(Shift)->getSExtValue(); 2067 int EltSize = VTy->getScalarSizeInBits(); 2068 2069 Vec = Builder.CreateBitCast(Vec, Ty); 2070 2071 // lshr/ashr are undefined when the shift amount is equal to the vector 2072 // element size. 2073 if (ShiftAmt == EltSize) { 2074 if (usgn) { 2075 // Right-shifting an unsigned value by its size yields 0. 2076 return llvm::ConstantAggregateZero::get(VTy); 2077 } else { 2078 // Right-shifting a signed value by its size is equivalent 2079 // to a shift of size-1. 2080 --ShiftAmt; 2081 Shift = ConstantInt::get(VTy->getElementType(), ShiftAmt); 2082 } 2083 } 2084 2085 Shift = EmitNeonShiftVector(Shift, Ty, false); 2086 if (usgn) 2087 return Builder.CreateLShr(Vec, Shift, name); 2088 else 2089 return Builder.CreateAShr(Vec, Shift, name); 2090 } 2091 2092 enum { 2093 AddRetType = (1 << 0), 2094 Add1ArgType = (1 << 1), 2095 Add2ArgTypes = (1 << 2), 2096 2097 VectorizeRetType = (1 << 3), 2098 VectorizeArgTypes = (1 << 4), 2099 2100 InventFloatType = (1 << 5), 2101 UnsignedAlts = (1 << 6), 2102 2103 Use64BitVectors = (1 << 7), 2104 Use128BitVectors = (1 << 8), 2105 2106 Vectorize1ArgType = Add1ArgType | VectorizeArgTypes, 2107 VectorRet = AddRetType | VectorizeRetType, 2108 VectorRetGetArgs01 = 2109 AddRetType | Add2ArgTypes | VectorizeRetType | VectorizeArgTypes, 2110 FpCmpzModifiers = 2111 AddRetType | VectorizeRetType | Add1ArgType | InventFloatType 2112 }; 2113 2114 namespace { 2115 struct NeonIntrinsicInfo { 2116 unsigned BuiltinID; 2117 unsigned LLVMIntrinsic; 2118 unsigned AltLLVMIntrinsic; 2119 const char *NameHint; 2120 unsigned TypeModifier; 2121 2122 bool operator<(unsigned RHSBuiltinID) const { 2123 return BuiltinID < RHSBuiltinID; 2124 } 2125 }; 2126 } // end anonymous namespace 2127 2128 #define NEONMAP0(NameBase) \ 2129 { NEON::BI__builtin_neon_ ## NameBase, 0, 0, #NameBase, 0 } 2130 2131 #define NEONMAP1(NameBase, LLVMIntrinsic, TypeModifier) \ 2132 { NEON:: BI__builtin_neon_ ## NameBase, \ 2133 Intrinsic::LLVMIntrinsic, 0, #NameBase, TypeModifier } 2134 2135 #define NEONMAP2(NameBase, LLVMIntrinsic, AltLLVMIntrinsic, TypeModifier) \ 2136 { NEON:: BI__builtin_neon_ ## NameBase, \ 2137 Intrinsic::LLVMIntrinsic, Intrinsic::AltLLVMIntrinsic, \ 2138 #NameBase, TypeModifier } 2139 2140 static const NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = { 2141 NEONMAP2(vabd_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 2142 NEONMAP2(vabdq_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 2143 NEONMAP1(vabs_v, arm_neon_vabs, 0), 2144 NEONMAP1(vabsq_v, arm_neon_vabs, 0), 2145 NEONMAP0(vaddhn_v), 2146 NEONMAP1(vaesdq_v, arm_neon_aesd, 0), 2147 NEONMAP1(vaeseq_v, arm_neon_aese, 0), 2148 NEONMAP1(vaesimcq_v, arm_neon_aesimc, 0), 2149 NEONMAP1(vaesmcq_v, arm_neon_aesmc, 0), 2150 NEONMAP1(vbsl_v, arm_neon_vbsl, AddRetType), 2151 NEONMAP1(vbslq_v, arm_neon_vbsl, AddRetType), 2152 NEONMAP1(vcage_v, arm_neon_vacge, 0), 2153 NEONMAP1(vcageq_v, arm_neon_vacge, 0), 2154 NEONMAP1(vcagt_v, arm_neon_vacgt, 0), 2155 NEONMAP1(vcagtq_v, arm_neon_vacgt, 0), 2156 NEONMAP1(vcale_v, arm_neon_vacge, 0), 2157 NEONMAP1(vcaleq_v, arm_neon_vacge, 0), 2158 NEONMAP1(vcalt_v, arm_neon_vacgt, 0), 2159 NEONMAP1(vcaltq_v, arm_neon_vacgt, 0), 2160 NEONMAP1(vcls_v, arm_neon_vcls, Add1ArgType), 2161 NEONMAP1(vclsq_v, arm_neon_vcls, Add1ArgType), 2162 NEONMAP1(vclz_v, ctlz, Add1ArgType), 2163 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 2164 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 2165 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 2166 NEONMAP1(vcvt_f16_f32, arm_neon_vcvtfp2hf, 0), 2167 NEONMAP1(vcvt_f32_f16, arm_neon_vcvthf2fp, 0), 2168 NEONMAP0(vcvt_f32_v), 2169 NEONMAP2(vcvt_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 2170 NEONMAP1(vcvt_n_s32_v, arm_neon_vcvtfp2fxs, 0), 2171 NEONMAP1(vcvt_n_s64_v, arm_neon_vcvtfp2fxs, 0), 2172 NEONMAP1(vcvt_n_u32_v, arm_neon_vcvtfp2fxu, 0), 2173 NEONMAP1(vcvt_n_u64_v, arm_neon_vcvtfp2fxu, 0), 2174 NEONMAP0(vcvt_s32_v), 2175 NEONMAP0(vcvt_s64_v), 2176 NEONMAP0(vcvt_u32_v), 2177 NEONMAP0(vcvt_u64_v), 2178 NEONMAP1(vcvta_s32_v, arm_neon_vcvtas, 0), 2179 NEONMAP1(vcvta_s64_v, arm_neon_vcvtas, 0), 2180 NEONMAP1(vcvta_u32_v, arm_neon_vcvtau, 0), 2181 NEONMAP1(vcvta_u64_v, arm_neon_vcvtau, 0), 2182 NEONMAP1(vcvtaq_s32_v, arm_neon_vcvtas, 0), 2183 NEONMAP1(vcvtaq_s64_v, arm_neon_vcvtas, 0), 2184 NEONMAP1(vcvtaq_u32_v, arm_neon_vcvtau, 0), 2185 NEONMAP1(vcvtaq_u64_v, arm_neon_vcvtau, 0), 2186 NEONMAP1(vcvtm_s32_v, arm_neon_vcvtms, 0), 2187 NEONMAP1(vcvtm_s64_v, arm_neon_vcvtms, 0), 2188 NEONMAP1(vcvtm_u32_v, arm_neon_vcvtmu, 0), 2189 NEONMAP1(vcvtm_u64_v, arm_neon_vcvtmu, 0), 2190 NEONMAP1(vcvtmq_s32_v, arm_neon_vcvtms, 0), 2191 NEONMAP1(vcvtmq_s64_v, arm_neon_vcvtms, 0), 2192 NEONMAP1(vcvtmq_u32_v, arm_neon_vcvtmu, 0), 2193 NEONMAP1(vcvtmq_u64_v, arm_neon_vcvtmu, 0), 2194 NEONMAP1(vcvtn_s32_v, arm_neon_vcvtns, 0), 2195 NEONMAP1(vcvtn_s64_v, arm_neon_vcvtns, 0), 2196 NEONMAP1(vcvtn_u32_v, arm_neon_vcvtnu, 0), 2197 NEONMAP1(vcvtn_u64_v, arm_neon_vcvtnu, 0), 2198 NEONMAP1(vcvtnq_s32_v, arm_neon_vcvtns, 0), 2199 NEONMAP1(vcvtnq_s64_v, arm_neon_vcvtns, 0), 2200 NEONMAP1(vcvtnq_u32_v, arm_neon_vcvtnu, 0), 2201 NEONMAP1(vcvtnq_u64_v, arm_neon_vcvtnu, 0), 2202 NEONMAP1(vcvtp_s32_v, arm_neon_vcvtps, 0), 2203 NEONMAP1(vcvtp_s64_v, arm_neon_vcvtps, 0), 2204 NEONMAP1(vcvtp_u32_v, arm_neon_vcvtpu, 0), 2205 NEONMAP1(vcvtp_u64_v, arm_neon_vcvtpu, 0), 2206 NEONMAP1(vcvtpq_s32_v, arm_neon_vcvtps, 0), 2207 NEONMAP1(vcvtpq_s64_v, arm_neon_vcvtps, 0), 2208 NEONMAP1(vcvtpq_u32_v, arm_neon_vcvtpu, 0), 2209 NEONMAP1(vcvtpq_u64_v, arm_neon_vcvtpu, 0), 2210 NEONMAP0(vcvtq_f32_v), 2211 NEONMAP2(vcvtq_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 2212 NEONMAP1(vcvtq_n_s32_v, arm_neon_vcvtfp2fxs, 0), 2213 NEONMAP1(vcvtq_n_s64_v, arm_neon_vcvtfp2fxs, 0), 2214 NEONMAP1(vcvtq_n_u32_v, arm_neon_vcvtfp2fxu, 0), 2215 NEONMAP1(vcvtq_n_u64_v, arm_neon_vcvtfp2fxu, 0), 2216 NEONMAP0(vcvtq_s32_v), 2217 NEONMAP0(vcvtq_s64_v), 2218 NEONMAP0(vcvtq_u32_v), 2219 NEONMAP0(vcvtq_u64_v), 2220 NEONMAP0(vext_v), 2221 NEONMAP0(vextq_v), 2222 NEONMAP0(vfma_v), 2223 NEONMAP0(vfmaq_v), 2224 NEONMAP2(vhadd_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 2225 NEONMAP2(vhaddq_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 2226 NEONMAP2(vhsub_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 2227 NEONMAP2(vhsubq_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 2228 NEONMAP0(vld1_dup_v), 2229 NEONMAP1(vld1_v, arm_neon_vld1, 0), 2230 NEONMAP0(vld1q_dup_v), 2231 NEONMAP1(vld1q_v, arm_neon_vld1, 0), 2232 NEONMAP1(vld2_lane_v, arm_neon_vld2lane, 0), 2233 NEONMAP1(vld2_v, arm_neon_vld2, 0), 2234 NEONMAP1(vld2q_lane_v, arm_neon_vld2lane, 0), 2235 NEONMAP1(vld2q_v, arm_neon_vld2, 0), 2236 NEONMAP1(vld3_lane_v, arm_neon_vld3lane, 0), 2237 NEONMAP1(vld3_v, arm_neon_vld3, 0), 2238 NEONMAP1(vld3q_lane_v, arm_neon_vld3lane, 0), 2239 NEONMAP1(vld3q_v, arm_neon_vld3, 0), 2240 NEONMAP1(vld4_lane_v, arm_neon_vld4lane, 0), 2241 NEONMAP1(vld4_v, arm_neon_vld4, 0), 2242 NEONMAP1(vld4q_lane_v, arm_neon_vld4lane, 0), 2243 NEONMAP1(vld4q_v, arm_neon_vld4, 0), 2244 NEONMAP2(vmax_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 2245 NEONMAP1(vmaxnm_v, arm_neon_vmaxnm, Add1ArgType), 2246 NEONMAP1(vmaxnmq_v, arm_neon_vmaxnm, Add1ArgType), 2247 NEONMAP2(vmaxq_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 2248 NEONMAP2(vmin_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 2249 NEONMAP1(vminnm_v, arm_neon_vminnm, Add1ArgType), 2250 NEONMAP1(vminnmq_v, arm_neon_vminnm, Add1ArgType), 2251 NEONMAP2(vminq_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 2252 NEONMAP0(vmovl_v), 2253 NEONMAP0(vmovn_v), 2254 NEONMAP1(vmul_v, arm_neon_vmulp, Add1ArgType), 2255 NEONMAP0(vmull_v), 2256 NEONMAP1(vmulq_v, arm_neon_vmulp, Add1ArgType), 2257 NEONMAP2(vpadal_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 2258 NEONMAP2(vpadalq_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 2259 NEONMAP1(vpadd_v, arm_neon_vpadd, Add1ArgType), 2260 NEONMAP2(vpaddl_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 2261 NEONMAP2(vpaddlq_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 2262 NEONMAP1(vpaddq_v, arm_neon_vpadd, Add1ArgType), 2263 NEONMAP2(vpmax_v, arm_neon_vpmaxu, arm_neon_vpmaxs, Add1ArgType | UnsignedAlts), 2264 NEONMAP2(vpmin_v, arm_neon_vpminu, arm_neon_vpmins, Add1ArgType | UnsignedAlts), 2265 NEONMAP1(vqabs_v, arm_neon_vqabs, Add1ArgType), 2266 NEONMAP1(vqabsq_v, arm_neon_vqabs, Add1ArgType), 2267 NEONMAP2(vqadd_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 2268 NEONMAP2(vqaddq_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 2269 NEONMAP2(vqdmlal_v, arm_neon_vqdmull, arm_neon_vqadds, 0), 2270 NEONMAP2(vqdmlsl_v, arm_neon_vqdmull, arm_neon_vqsubs, 0), 2271 NEONMAP1(vqdmulh_v, arm_neon_vqdmulh, Add1ArgType), 2272 NEONMAP1(vqdmulhq_v, arm_neon_vqdmulh, Add1ArgType), 2273 NEONMAP1(vqdmull_v, arm_neon_vqdmull, Add1ArgType), 2274 NEONMAP2(vqmovn_v, arm_neon_vqmovnu, arm_neon_vqmovns, Add1ArgType | UnsignedAlts), 2275 NEONMAP1(vqmovun_v, arm_neon_vqmovnsu, Add1ArgType), 2276 NEONMAP1(vqneg_v, arm_neon_vqneg, Add1ArgType), 2277 NEONMAP1(vqnegq_v, arm_neon_vqneg, Add1ArgType), 2278 NEONMAP1(vqrdmulh_v, arm_neon_vqrdmulh, Add1ArgType), 2279 NEONMAP1(vqrdmulhq_v, arm_neon_vqrdmulh, Add1ArgType), 2280 NEONMAP2(vqrshl_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 2281 NEONMAP2(vqrshlq_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 2282 NEONMAP2(vqshl_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 2283 NEONMAP2(vqshl_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 2284 NEONMAP2(vqshlq_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 2285 NEONMAP2(vqshlq_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 2286 NEONMAP1(vqshlu_n_v, arm_neon_vqshiftsu, 0), 2287 NEONMAP1(vqshluq_n_v, arm_neon_vqshiftsu, 0), 2288 NEONMAP2(vqsub_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 2289 NEONMAP2(vqsubq_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 2290 NEONMAP1(vraddhn_v, arm_neon_vraddhn, Add1ArgType), 2291 NEONMAP2(vrecpe_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 2292 NEONMAP2(vrecpeq_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 2293 NEONMAP1(vrecps_v, arm_neon_vrecps, Add1ArgType), 2294 NEONMAP1(vrecpsq_v, arm_neon_vrecps, Add1ArgType), 2295 NEONMAP2(vrhadd_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 2296 NEONMAP2(vrhaddq_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 2297 NEONMAP1(vrnd_v, arm_neon_vrintz, Add1ArgType), 2298 NEONMAP1(vrnda_v, arm_neon_vrinta, Add1ArgType), 2299 NEONMAP1(vrndaq_v, arm_neon_vrinta, Add1ArgType), 2300 NEONMAP1(vrndm_v, arm_neon_vrintm, Add1ArgType), 2301 NEONMAP1(vrndmq_v, arm_neon_vrintm, Add1ArgType), 2302 NEONMAP1(vrndn_v, arm_neon_vrintn, Add1ArgType), 2303 NEONMAP1(vrndnq_v, arm_neon_vrintn, Add1ArgType), 2304 NEONMAP1(vrndp_v, arm_neon_vrintp, Add1ArgType), 2305 NEONMAP1(vrndpq_v, arm_neon_vrintp, Add1ArgType), 2306 NEONMAP1(vrndq_v, arm_neon_vrintz, Add1ArgType), 2307 NEONMAP1(vrndx_v, arm_neon_vrintx, Add1ArgType), 2308 NEONMAP1(vrndxq_v, arm_neon_vrintx, Add1ArgType), 2309 NEONMAP2(vrshl_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 2310 NEONMAP2(vrshlq_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 2311 NEONMAP2(vrshr_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 2312 NEONMAP2(vrshrq_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 2313 NEONMAP2(vrsqrte_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 2314 NEONMAP2(vrsqrteq_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 2315 NEONMAP1(vrsqrts_v, arm_neon_vrsqrts, Add1ArgType), 2316 NEONMAP1(vrsqrtsq_v, arm_neon_vrsqrts, Add1ArgType), 2317 NEONMAP1(vrsubhn_v, arm_neon_vrsubhn, Add1ArgType), 2318 NEONMAP1(vsha1su0q_v, arm_neon_sha1su0, 0), 2319 NEONMAP1(vsha1su1q_v, arm_neon_sha1su1, 0), 2320 NEONMAP1(vsha256h2q_v, arm_neon_sha256h2, 0), 2321 NEONMAP1(vsha256hq_v, arm_neon_sha256h, 0), 2322 NEONMAP1(vsha256su0q_v, arm_neon_sha256su0, 0), 2323 NEONMAP1(vsha256su1q_v, arm_neon_sha256su1, 0), 2324 NEONMAP0(vshl_n_v), 2325 NEONMAP2(vshl_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 2326 NEONMAP0(vshll_n_v), 2327 NEONMAP0(vshlq_n_v), 2328 NEONMAP2(vshlq_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 2329 NEONMAP0(vshr_n_v), 2330 NEONMAP0(vshrn_n_v), 2331 NEONMAP0(vshrq_n_v), 2332 NEONMAP1(vst1_v, arm_neon_vst1, 0), 2333 NEONMAP1(vst1q_v, arm_neon_vst1, 0), 2334 NEONMAP1(vst2_lane_v, arm_neon_vst2lane, 0), 2335 NEONMAP1(vst2_v, arm_neon_vst2, 0), 2336 NEONMAP1(vst2q_lane_v, arm_neon_vst2lane, 0), 2337 NEONMAP1(vst2q_v, arm_neon_vst2, 0), 2338 NEONMAP1(vst3_lane_v, arm_neon_vst3lane, 0), 2339 NEONMAP1(vst3_v, arm_neon_vst3, 0), 2340 NEONMAP1(vst3q_lane_v, arm_neon_vst3lane, 0), 2341 NEONMAP1(vst3q_v, arm_neon_vst3, 0), 2342 NEONMAP1(vst4_lane_v, arm_neon_vst4lane, 0), 2343 NEONMAP1(vst4_v, arm_neon_vst4, 0), 2344 NEONMAP1(vst4q_lane_v, arm_neon_vst4lane, 0), 2345 NEONMAP1(vst4q_v, arm_neon_vst4, 0), 2346 NEONMAP0(vsubhn_v), 2347 NEONMAP0(vtrn_v), 2348 NEONMAP0(vtrnq_v), 2349 NEONMAP0(vtst_v), 2350 NEONMAP0(vtstq_v), 2351 NEONMAP0(vuzp_v), 2352 NEONMAP0(vuzpq_v), 2353 NEONMAP0(vzip_v), 2354 NEONMAP0(vzipq_v) 2355 }; 2356 2357 static const NeonIntrinsicInfo AArch64SIMDIntrinsicMap[] = { 2358 NEONMAP1(vabs_v, aarch64_neon_abs, 0), 2359 NEONMAP1(vabsq_v, aarch64_neon_abs, 0), 2360 NEONMAP0(vaddhn_v), 2361 NEONMAP1(vaesdq_v, aarch64_crypto_aesd, 0), 2362 NEONMAP1(vaeseq_v, aarch64_crypto_aese, 0), 2363 NEONMAP1(vaesimcq_v, aarch64_crypto_aesimc, 0), 2364 NEONMAP1(vaesmcq_v, aarch64_crypto_aesmc, 0), 2365 NEONMAP1(vcage_v, aarch64_neon_facge, 0), 2366 NEONMAP1(vcageq_v, aarch64_neon_facge, 0), 2367 NEONMAP1(vcagt_v, aarch64_neon_facgt, 0), 2368 NEONMAP1(vcagtq_v, aarch64_neon_facgt, 0), 2369 NEONMAP1(vcale_v, aarch64_neon_facge, 0), 2370 NEONMAP1(vcaleq_v, aarch64_neon_facge, 0), 2371 NEONMAP1(vcalt_v, aarch64_neon_facgt, 0), 2372 NEONMAP1(vcaltq_v, aarch64_neon_facgt, 0), 2373 NEONMAP1(vcls_v, aarch64_neon_cls, Add1ArgType), 2374 NEONMAP1(vclsq_v, aarch64_neon_cls, Add1ArgType), 2375 NEONMAP1(vclz_v, ctlz, Add1ArgType), 2376 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 2377 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 2378 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 2379 NEONMAP1(vcvt_f16_f32, aarch64_neon_vcvtfp2hf, 0), 2380 NEONMAP1(vcvt_f32_f16, aarch64_neon_vcvthf2fp, 0), 2381 NEONMAP0(vcvt_f32_v), 2382 NEONMAP2(vcvt_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2383 NEONMAP2(vcvt_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2384 NEONMAP1(vcvt_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 2385 NEONMAP1(vcvt_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 2386 NEONMAP1(vcvt_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 2387 NEONMAP1(vcvt_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 2388 NEONMAP0(vcvtq_f32_v), 2389 NEONMAP2(vcvtq_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2390 NEONMAP2(vcvtq_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2391 NEONMAP1(vcvtq_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 2392 NEONMAP1(vcvtq_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 2393 NEONMAP1(vcvtq_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 2394 NEONMAP1(vcvtq_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 2395 NEONMAP1(vcvtx_f32_v, aarch64_neon_fcvtxn, AddRetType | Add1ArgType), 2396 NEONMAP0(vext_v), 2397 NEONMAP0(vextq_v), 2398 NEONMAP0(vfma_v), 2399 NEONMAP0(vfmaq_v), 2400 NEONMAP2(vhadd_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 2401 NEONMAP2(vhaddq_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 2402 NEONMAP2(vhsub_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 2403 NEONMAP2(vhsubq_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 2404 NEONMAP0(vmovl_v), 2405 NEONMAP0(vmovn_v), 2406 NEONMAP1(vmul_v, aarch64_neon_pmul, Add1ArgType), 2407 NEONMAP1(vmulq_v, aarch64_neon_pmul, Add1ArgType), 2408 NEONMAP1(vpadd_v, aarch64_neon_addp, Add1ArgType), 2409 NEONMAP2(vpaddl_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 2410 NEONMAP2(vpaddlq_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 2411 NEONMAP1(vpaddq_v, aarch64_neon_addp, Add1ArgType), 2412 NEONMAP1(vqabs_v, aarch64_neon_sqabs, Add1ArgType), 2413 NEONMAP1(vqabsq_v, aarch64_neon_sqabs, Add1ArgType), 2414 NEONMAP2(vqadd_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 2415 NEONMAP2(vqaddq_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 2416 NEONMAP2(vqdmlal_v, aarch64_neon_sqdmull, aarch64_neon_sqadd, 0), 2417 NEONMAP2(vqdmlsl_v, aarch64_neon_sqdmull, aarch64_neon_sqsub, 0), 2418 NEONMAP1(vqdmulh_v, aarch64_neon_sqdmulh, Add1ArgType), 2419 NEONMAP1(vqdmulhq_v, aarch64_neon_sqdmulh, Add1ArgType), 2420 NEONMAP1(vqdmull_v, aarch64_neon_sqdmull, Add1ArgType), 2421 NEONMAP2(vqmovn_v, aarch64_neon_uqxtn, aarch64_neon_sqxtn, Add1ArgType | UnsignedAlts), 2422 NEONMAP1(vqmovun_v, aarch64_neon_sqxtun, Add1ArgType), 2423 NEONMAP1(vqneg_v, aarch64_neon_sqneg, Add1ArgType), 2424 NEONMAP1(vqnegq_v, aarch64_neon_sqneg, Add1ArgType), 2425 NEONMAP1(vqrdmulh_v, aarch64_neon_sqrdmulh, Add1ArgType), 2426 NEONMAP1(vqrdmulhq_v, aarch64_neon_sqrdmulh, Add1ArgType), 2427 NEONMAP2(vqrshl_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 2428 NEONMAP2(vqrshlq_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 2429 NEONMAP2(vqshl_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl, UnsignedAlts), 2430 NEONMAP2(vqshl_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 2431 NEONMAP2(vqshlq_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl,UnsignedAlts), 2432 NEONMAP2(vqshlq_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 2433 NEONMAP1(vqshlu_n_v, aarch64_neon_sqshlu, 0), 2434 NEONMAP1(vqshluq_n_v, aarch64_neon_sqshlu, 0), 2435 NEONMAP2(vqsub_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 2436 NEONMAP2(vqsubq_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 2437 NEONMAP1(vraddhn_v, aarch64_neon_raddhn, Add1ArgType), 2438 NEONMAP2(vrecpe_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 2439 NEONMAP2(vrecpeq_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 2440 NEONMAP1(vrecps_v, aarch64_neon_frecps, Add1ArgType), 2441 NEONMAP1(vrecpsq_v, aarch64_neon_frecps, Add1ArgType), 2442 NEONMAP2(vrhadd_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 2443 NEONMAP2(vrhaddq_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 2444 NEONMAP2(vrshl_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 2445 NEONMAP2(vrshlq_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 2446 NEONMAP2(vrshr_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 2447 NEONMAP2(vrshrq_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 2448 NEONMAP2(vrsqrte_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 2449 NEONMAP2(vrsqrteq_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 2450 NEONMAP1(vrsqrts_v, aarch64_neon_frsqrts, Add1ArgType), 2451 NEONMAP1(vrsqrtsq_v, aarch64_neon_frsqrts, Add1ArgType), 2452 NEONMAP1(vrsubhn_v, aarch64_neon_rsubhn, Add1ArgType), 2453 NEONMAP1(vsha1su0q_v, aarch64_crypto_sha1su0, 0), 2454 NEONMAP1(vsha1su1q_v, aarch64_crypto_sha1su1, 0), 2455 NEONMAP1(vsha256h2q_v, aarch64_crypto_sha256h2, 0), 2456 NEONMAP1(vsha256hq_v, aarch64_crypto_sha256h, 0), 2457 NEONMAP1(vsha256su0q_v, aarch64_crypto_sha256su0, 0), 2458 NEONMAP1(vsha256su1q_v, aarch64_crypto_sha256su1, 0), 2459 NEONMAP0(vshl_n_v), 2460 NEONMAP2(vshl_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 2461 NEONMAP0(vshll_n_v), 2462 NEONMAP0(vshlq_n_v), 2463 NEONMAP2(vshlq_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 2464 NEONMAP0(vshr_n_v), 2465 NEONMAP0(vshrn_n_v), 2466 NEONMAP0(vshrq_n_v), 2467 NEONMAP0(vsubhn_v), 2468 NEONMAP0(vtst_v), 2469 NEONMAP0(vtstq_v), 2470 }; 2471 2472 static const NeonIntrinsicInfo AArch64SISDIntrinsicMap[] = { 2473 NEONMAP1(vabdd_f64, aarch64_sisd_fabd, Add1ArgType), 2474 NEONMAP1(vabds_f32, aarch64_sisd_fabd, Add1ArgType), 2475 NEONMAP1(vabsd_s64, aarch64_neon_abs, Add1ArgType), 2476 NEONMAP1(vaddlv_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 2477 NEONMAP1(vaddlv_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 2478 NEONMAP1(vaddlvq_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 2479 NEONMAP1(vaddlvq_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 2480 NEONMAP1(vaddv_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 2481 NEONMAP1(vaddv_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 2482 NEONMAP1(vaddv_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2483 NEONMAP1(vaddvq_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 2484 NEONMAP1(vaddvq_f64, aarch64_neon_faddv, AddRetType | Add1ArgType), 2485 NEONMAP1(vaddvq_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 2486 NEONMAP1(vaddvq_s64, aarch64_neon_saddv, AddRetType | Add1ArgType), 2487 NEONMAP1(vaddvq_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2488 NEONMAP1(vaddvq_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2489 NEONMAP1(vcaged_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 2490 NEONMAP1(vcages_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 2491 NEONMAP1(vcagtd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 2492 NEONMAP1(vcagts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 2493 NEONMAP1(vcaled_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 2494 NEONMAP1(vcales_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 2495 NEONMAP1(vcaltd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 2496 NEONMAP1(vcalts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 2497 NEONMAP1(vcvtad_s64_f64, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 2498 NEONMAP1(vcvtad_u64_f64, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 2499 NEONMAP1(vcvtas_s32_f32, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 2500 NEONMAP1(vcvtas_u32_f32, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 2501 NEONMAP1(vcvtd_n_f64_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 2502 NEONMAP1(vcvtd_n_f64_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 2503 NEONMAP1(vcvtd_n_s64_f64, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 2504 NEONMAP1(vcvtd_n_u64_f64, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 2505 NEONMAP1(vcvtmd_s64_f64, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 2506 NEONMAP1(vcvtmd_u64_f64, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 2507 NEONMAP1(vcvtms_s32_f32, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 2508 NEONMAP1(vcvtms_u32_f32, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 2509 NEONMAP1(vcvtnd_s64_f64, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 2510 NEONMAP1(vcvtnd_u64_f64, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 2511 NEONMAP1(vcvtns_s32_f32, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 2512 NEONMAP1(vcvtns_u32_f32, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 2513 NEONMAP1(vcvtpd_s64_f64, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 2514 NEONMAP1(vcvtpd_u64_f64, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 2515 NEONMAP1(vcvtps_s32_f32, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 2516 NEONMAP1(vcvtps_u32_f32, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 2517 NEONMAP1(vcvts_n_f32_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 2518 NEONMAP1(vcvts_n_f32_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 2519 NEONMAP1(vcvts_n_s32_f32, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 2520 NEONMAP1(vcvts_n_u32_f32, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 2521 NEONMAP1(vcvtxd_f32_f64, aarch64_sisd_fcvtxn, 0), 2522 NEONMAP1(vmaxnmv_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2523 NEONMAP1(vmaxnmvq_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2524 NEONMAP1(vmaxnmvq_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2525 NEONMAP1(vmaxv_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2526 NEONMAP1(vmaxv_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 2527 NEONMAP1(vmaxv_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 2528 NEONMAP1(vmaxvq_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2529 NEONMAP1(vmaxvq_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2530 NEONMAP1(vmaxvq_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 2531 NEONMAP1(vmaxvq_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 2532 NEONMAP1(vminnmv_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2533 NEONMAP1(vminnmvq_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2534 NEONMAP1(vminnmvq_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2535 NEONMAP1(vminv_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 2536 NEONMAP1(vminv_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 2537 NEONMAP1(vminv_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 2538 NEONMAP1(vminvq_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 2539 NEONMAP1(vminvq_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 2540 NEONMAP1(vminvq_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 2541 NEONMAP1(vminvq_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 2542 NEONMAP1(vmull_p64, aarch64_neon_pmull64, 0), 2543 NEONMAP1(vmulxd_f64, aarch64_neon_fmulx, Add1ArgType), 2544 NEONMAP1(vmulxs_f32, aarch64_neon_fmulx, Add1ArgType), 2545 NEONMAP1(vpaddd_s64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2546 NEONMAP1(vpaddd_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2547 NEONMAP1(vpmaxnmqd_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2548 NEONMAP1(vpmaxnms_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2549 NEONMAP1(vpmaxqd_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2550 NEONMAP1(vpmaxs_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2551 NEONMAP1(vpminnmqd_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2552 NEONMAP1(vpminnms_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2553 NEONMAP1(vpminqd_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 2554 NEONMAP1(vpmins_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 2555 NEONMAP1(vqabsb_s8, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 2556 NEONMAP1(vqabsd_s64, aarch64_neon_sqabs, Add1ArgType), 2557 NEONMAP1(vqabsh_s16, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 2558 NEONMAP1(vqabss_s32, aarch64_neon_sqabs, Add1ArgType), 2559 NEONMAP1(vqaddb_s8, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 2560 NEONMAP1(vqaddb_u8, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 2561 NEONMAP1(vqaddd_s64, aarch64_neon_sqadd, Add1ArgType), 2562 NEONMAP1(vqaddd_u64, aarch64_neon_uqadd, Add1ArgType), 2563 NEONMAP1(vqaddh_s16, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 2564 NEONMAP1(vqaddh_u16, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 2565 NEONMAP1(vqadds_s32, aarch64_neon_sqadd, Add1ArgType), 2566 NEONMAP1(vqadds_u32, aarch64_neon_uqadd, Add1ArgType), 2567 NEONMAP1(vqdmulhh_s16, aarch64_neon_sqdmulh, Vectorize1ArgType | Use64BitVectors), 2568 NEONMAP1(vqdmulhs_s32, aarch64_neon_sqdmulh, Add1ArgType), 2569 NEONMAP1(vqdmullh_s16, aarch64_neon_sqdmull, VectorRet | Use128BitVectors), 2570 NEONMAP1(vqdmulls_s32, aarch64_neon_sqdmulls_scalar, 0), 2571 NEONMAP1(vqmovnd_s64, aarch64_neon_scalar_sqxtn, AddRetType | Add1ArgType), 2572 NEONMAP1(vqmovnd_u64, aarch64_neon_scalar_uqxtn, AddRetType | Add1ArgType), 2573 NEONMAP1(vqmovnh_s16, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 2574 NEONMAP1(vqmovnh_u16, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 2575 NEONMAP1(vqmovns_s32, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 2576 NEONMAP1(vqmovns_u32, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 2577 NEONMAP1(vqmovund_s64, aarch64_neon_scalar_sqxtun, AddRetType | Add1ArgType), 2578 NEONMAP1(vqmovunh_s16, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 2579 NEONMAP1(vqmovuns_s32, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 2580 NEONMAP1(vqnegb_s8, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 2581 NEONMAP1(vqnegd_s64, aarch64_neon_sqneg, Add1ArgType), 2582 NEONMAP1(vqnegh_s16, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 2583 NEONMAP1(vqnegs_s32, aarch64_neon_sqneg, Add1ArgType), 2584 NEONMAP1(vqrdmulhh_s16, aarch64_neon_sqrdmulh, Vectorize1ArgType | Use64BitVectors), 2585 NEONMAP1(vqrdmulhs_s32, aarch64_neon_sqrdmulh, Add1ArgType), 2586 NEONMAP1(vqrshlb_s8, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 2587 NEONMAP1(vqrshlb_u8, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 2588 NEONMAP1(vqrshld_s64, aarch64_neon_sqrshl, Add1ArgType), 2589 NEONMAP1(vqrshld_u64, aarch64_neon_uqrshl, Add1ArgType), 2590 NEONMAP1(vqrshlh_s16, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 2591 NEONMAP1(vqrshlh_u16, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 2592 NEONMAP1(vqrshls_s32, aarch64_neon_sqrshl, Add1ArgType), 2593 NEONMAP1(vqrshls_u32, aarch64_neon_uqrshl, Add1ArgType), 2594 NEONMAP1(vqrshrnd_n_s64, aarch64_neon_sqrshrn, AddRetType), 2595 NEONMAP1(vqrshrnd_n_u64, aarch64_neon_uqrshrn, AddRetType), 2596 NEONMAP1(vqrshrnh_n_s16, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 2597 NEONMAP1(vqrshrnh_n_u16, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 2598 NEONMAP1(vqrshrns_n_s32, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 2599 NEONMAP1(vqrshrns_n_u32, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 2600 NEONMAP1(vqrshrund_n_s64, aarch64_neon_sqrshrun, AddRetType), 2601 NEONMAP1(vqrshrunh_n_s16, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 2602 NEONMAP1(vqrshruns_n_s32, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 2603 NEONMAP1(vqshlb_n_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2604 NEONMAP1(vqshlb_n_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2605 NEONMAP1(vqshlb_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2606 NEONMAP1(vqshlb_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2607 NEONMAP1(vqshld_s64, aarch64_neon_sqshl, Add1ArgType), 2608 NEONMAP1(vqshld_u64, aarch64_neon_uqshl, Add1ArgType), 2609 NEONMAP1(vqshlh_n_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2610 NEONMAP1(vqshlh_n_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2611 NEONMAP1(vqshlh_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2612 NEONMAP1(vqshlh_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2613 NEONMAP1(vqshls_n_s32, aarch64_neon_sqshl, Add1ArgType), 2614 NEONMAP1(vqshls_n_u32, aarch64_neon_uqshl, Add1ArgType), 2615 NEONMAP1(vqshls_s32, aarch64_neon_sqshl, Add1ArgType), 2616 NEONMAP1(vqshls_u32, aarch64_neon_uqshl, Add1ArgType), 2617 NEONMAP1(vqshlub_n_s8, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 2618 NEONMAP1(vqshluh_n_s16, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 2619 NEONMAP1(vqshlus_n_s32, aarch64_neon_sqshlu, Add1ArgType), 2620 NEONMAP1(vqshrnd_n_s64, aarch64_neon_sqshrn, AddRetType), 2621 NEONMAP1(vqshrnd_n_u64, aarch64_neon_uqshrn, AddRetType), 2622 NEONMAP1(vqshrnh_n_s16, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 2623 NEONMAP1(vqshrnh_n_u16, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 2624 NEONMAP1(vqshrns_n_s32, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 2625 NEONMAP1(vqshrns_n_u32, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 2626 NEONMAP1(vqshrund_n_s64, aarch64_neon_sqshrun, AddRetType), 2627 NEONMAP1(vqshrunh_n_s16, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 2628 NEONMAP1(vqshruns_n_s32, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 2629 NEONMAP1(vqsubb_s8, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 2630 NEONMAP1(vqsubb_u8, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 2631 NEONMAP1(vqsubd_s64, aarch64_neon_sqsub, Add1ArgType), 2632 NEONMAP1(vqsubd_u64, aarch64_neon_uqsub, Add1ArgType), 2633 NEONMAP1(vqsubh_s16, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 2634 NEONMAP1(vqsubh_u16, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 2635 NEONMAP1(vqsubs_s32, aarch64_neon_sqsub, Add1ArgType), 2636 NEONMAP1(vqsubs_u32, aarch64_neon_uqsub, Add1ArgType), 2637 NEONMAP1(vrecped_f64, aarch64_neon_frecpe, Add1ArgType), 2638 NEONMAP1(vrecpes_f32, aarch64_neon_frecpe, Add1ArgType), 2639 NEONMAP1(vrecpxd_f64, aarch64_neon_frecpx, Add1ArgType), 2640 NEONMAP1(vrecpxs_f32, aarch64_neon_frecpx, Add1ArgType), 2641 NEONMAP1(vrshld_s64, aarch64_neon_srshl, Add1ArgType), 2642 NEONMAP1(vrshld_u64, aarch64_neon_urshl, Add1ArgType), 2643 NEONMAP1(vrsqrted_f64, aarch64_neon_frsqrte, Add1ArgType), 2644 NEONMAP1(vrsqrtes_f32, aarch64_neon_frsqrte, Add1ArgType), 2645 NEONMAP1(vrsqrtsd_f64, aarch64_neon_frsqrts, Add1ArgType), 2646 NEONMAP1(vrsqrtss_f32, aarch64_neon_frsqrts, Add1ArgType), 2647 NEONMAP1(vsha1cq_u32, aarch64_crypto_sha1c, 0), 2648 NEONMAP1(vsha1h_u32, aarch64_crypto_sha1h, 0), 2649 NEONMAP1(vsha1mq_u32, aarch64_crypto_sha1m, 0), 2650 NEONMAP1(vsha1pq_u32, aarch64_crypto_sha1p, 0), 2651 NEONMAP1(vshld_s64, aarch64_neon_sshl, Add1ArgType), 2652 NEONMAP1(vshld_u64, aarch64_neon_ushl, Add1ArgType), 2653 NEONMAP1(vslid_n_s64, aarch64_neon_vsli, Vectorize1ArgType), 2654 NEONMAP1(vslid_n_u64, aarch64_neon_vsli, Vectorize1ArgType), 2655 NEONMAP1(vsqaddb_u8, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 2656 NEONMAP1(vsqaddd_u64, aarch64_neon_usqadd, Add1ArgType), 2657 NEONMAP1(vsqaddh_u16, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 2658 NEONMAP1(vsqadds_u32, aarch64_neon_usqadd, Add1ArgType), 2659 NEONMAP1(vsrid_n_s64, aarch64_neon_vsri, Vectorize1ArgType), 2660 NEONMAP1(vsrid_n_u64, aarch64_neon_vsri, Vectorize1ArgType), 2661 NEONMAP1(vuqaddb_s8, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 2662 NEONMAP1(vuqaddd_s64, aarch64_neon_suqadd, Add1ArgType), 2663 NEONMAP1(vuqaddh_s16, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 2664 NEONMAP1(vuqadds_s32, aarch64_neon_suqadd, Add1ArgType), 2665 }; 2666 2667 #undef NEONMAP0 2668 #undef NEONMAP1 2669 #undef NEONMAP2 2670 2671 static bool NEONSIMDIntrinsicsProvenSorted = false; 2672 2673 static bool AArch64SIMDIntrinsicsProvenSorted = false; 2674 static bool AArch64SISDIntrinsicsProvenSorted = false; 2675 2676 2677 static const NeonIntrinsicInfo * 2678 findNeonIntrinsicInMap(ArrayRef<NeonIntrinsicInfo> IntrinsicMap, 2679 unsigned BuiltinID, bool &MapProvenSorted) { 2680 2681 #ifndef NDEBUG 2682 if (!MapProvenSorted) { 2683 // FIXME: use std::is_sorted once C++11 is allowed 2684 for (unsigned i = 0; i < IntrinsicMap.size() - 1; ++i) 2685 assert(IntrinsicMap[i].BuiltinID <= IntrinsicMap[i + 1].BuiltinID); 2686 MapProvenSorted = true; 2687 } 2688 #endif 2689 2690 const NeonIntrinsicInfo *Builtin = 2691 std::lower_bound(IntrinsicMap.begin(), IntrinsicMap.end(), BuiltinID); 2692 2693 if (Builtin != IntrinsicMap.end() && Builtin->BuiltinID == BuiltinID) 2694 return Builtin; 2695 2696 return nullptr; 2697 } 2698 2699 Function *CodeGenFunction::LookupNeonLLVMIntrinsic(unsigned IntrinsicID, 2700 unsigned Modifier, 2701 llvm::Type *ArgType, 2702 const CallExpr *E) { 2703 int VectorSize = 0; 2704 if (Modifier & Use64BitVectors) 2705 VectorSize = 64; 2706 else if (Modifier & Use128BitVectors) 2707 VectorSize = 128; 2708 2709 // Return type. 2710 SmallVector<llvm::Type *, 3> Tys; 2711 if (Modifier & AddRetType) { 2712 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 2713 if (Modifier & VectorizeRetType) 2714 Ty = llvm::VectorType::get( 2715 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); 2716 2717 Tys.push_back(Ty); 2718 } 2719 2720 // Arguments. 2721 if (Modifier & VectorizeArgTypes) { 2722 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; 2723 ArgType = llvm::VectorType::get(ArgType, Elts); 2724 } 2725 2726 if (Modifier & (Add1ArgType | Add2ArgTypes)) 2727 Tys.push_back(ArgType); 2728 2729 if (Modifier & Add2ArgTypes) 2730 Tys.push_back(ArgType); 2731 2732 if (Modifier & InventFloatType) 2733 Tys.push_back(FloatTy); 2734 2735 return CGM.getIntrinsic(IntrinsicID, Tys); 2736 } 2737 2738 static Value *EmitCommonNeonSISDBuiltinExpr(CodeGenFunction &CGF, 2739 const NeonIntrinsicInfo &SISDInfo, 2740 SmallVectorImpl<Value *> &Ops, 2741 const CallExpr *E) { 2742 unsigned BuiltinID = SISDInfo.BuiltinID; 2743 unsigned int Int = SISDInfo.LLVMIntrinsic; 2744 unsigned Modifier = SISDInfo.TypeModifier; 2745 const char *s = SISDInfo.NameHint; 2746 2747 switch (BuiltinID) { 2748 case NEON::BI__builtin_neon_vcled_s64: 2749 case NEON::BI__builtin_neon_vcled_u64: 2750 case NEON::BI__builtin_neon_vcles_f32: 2751 case NEON::BI__builtin_neon_vcled_f64: 2752 case NEON::BI__builtin_neon_vcltd_s64: 2753 case NEON::BI__builtin_neon_vcltd_u64: 2754 case NEON::BI__builtin_neon_vclts_f32: 2755 case NEON::BI__builtin_neon_vcltd_f64: 2756 case NEON::BI__builtin_neon_vcales_f32: 2757 case NEON::BI__builtin_neon_vcaled_f64: 2758 case NEON::BI__builtin_neon_vcalts_f32: 2759 case NEON::BI__builtin_neon_vcaltd_f64: 2760 // Only one direction of comparisons actually exist, cmle is actually a cmge 2761 // with swapped operands. The table gives us the right intrinsic but we 2762 // still need to do the swap. 2763 std::swap(Ops[0], Ops[1]); 2764 break; 2765 } 2766 2767 assert(Int && "Generic code assumes a valid intrinsic"); 2768 2769 // Determine the type(s) of this overloaded AArch64 intrinsic. 2770 const Expr *Arg = E->getArg(0); 2771 llvm::Type *ArgTy = CGF.ConvertType(Arg->getType()); 2772 Function *F = CGF.LookupNeonLLVMIntrinsic(Int, Modifier, ArgTy, E); 2773 2774 int j = 0; 2775 ConstantInt *C0 = ConstantInt::get(CGF.SizeTy, 0); 2776 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 2777 ai != ae; ++ai, ++j) { 2778 llvm::Type *ArgTy = ai->getType(); 2779 if (Ops[j]->getType()->getPrimitiveSizeInBits() == 2780 ArgTy->getPrimitiveSizeInBits()) 2781 continue; 2782 2783 assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy()); 2784 // The constant argument to an _n_ intrinsic always has Int32Ty, so truncate 2785 // it before inserting. 2786 Ops[j] = 2787 CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType()); 2788 Ops[j] = 2789 CGF.Builder.CreateInsertElement(UndefValue::get(ArgTy), Ops[j], C0); 2790 } 2791 2792 Value *Result = CGF.EmitNeonCall(F, Ops, s); 2793 llvm::Type *ResultType = CGF.ConvertType(E->getType()); 2794 if (ResultType->getPrimitiveSizeInBits() < 2795 Result->getType()->getPrimitiveSizeInBits()) 2796 return CGF.Builder.CreateExtractElement(Result, C0); 2797 2798 return CGF.Builder.CreateBitCast(Result, ResultType, s); 2799 } 2800 2801 Value *CodeGenFunction::EmitCommonNeonBuiltinExpr( 2802 unsigned BuiltinID, unsigned LLVMIntrinsic, unsigned AltLLVMIntrinsic, 2803 const char *NameHint, unsigned Modifier, const CallExpr *E, 2804 SmallVectorImpl<llvm::Value *> &Ops, Address PtrOp0, Address PtrOp1) { 2805 // Get the last argument, which specifies the vector type. 2806 llvm::APSInt NeonTypeConst; 2807 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 2808 if (!Arg->isIntegerConstantExpr(NeonTypeConst, getContext())) 2809 return nullptr; 2810 2811 // Determine the type of this overloaded NEON intrinsic. 2812 NeonTypeFlags Type(NeonTypeConst.getZExtValue()); 2813 bool Usgn = Type.isUnsigned(); 2814 bool Quad = Type.isQuad(); 2815 2816 llvm::VectorType *VTy = GetNeonType(this, Type); 2817 llvm::Type *Ty = VTy; 2818 if (!Ty) 2819 return nullptr; 2820 2821 auto getAlignmentValue32 = [&](Address addr) -> Value* { 2822 return Builder.getInt32(addr.getAlignment().getQuantity()); 2823 }; 2824 2825 unsigned Int = LLVMIntrinsic; 2826 if ((Modifier & UnsignedAlts) && !Usgn) 2827 Int = AltLLVMIntrinsic; 2828 2829 switch (BuiltinID) { 2830 default: break; 2831 case NEON::BI__builtin_neon_vabs_v: 2832 case NEON::BI__builtin_neon_vabsq_v: 2833 if (VTy->getElementType()->isFloatingPointTy()) 2834 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, Ty), Ops, "vabs"); 2835 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), Ops, "vabs"); 2836 case NEON::BI__builtin_neon_vaddhn_v: { 2837 llvm::VectorType *SrcTy = 2838 llvm::VectorType::getExtendedElementVectorType(VTy); 2839 2840 // %sum = add <4 x i32> %lhs, %rhs 2841 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 2842 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 2843 Ops[0] = Builder.CreateAdd(Ops[0], Ops[1], "vaddhn"); 2844 2845 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 2846 Constant *ShiftAmt = 2847 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 2848 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vaddhn"); 2849 2850 // %res = trunc <4 x i32> %high to <4 x i16> 2851 return Builder.CreateTrunc(Ops[0], VTy, "vaddhn"); 2852 } 2853 case NEON::BI__builtin_neon_vcale_v: 2854 case NEON::BI__builtin_neon_vcaleq_v: 2855 case NEON::BI__builtin_neon_vcalt_v: 2856 case NEON::BI__builtin_neon_vcaltq_v: 2857 std::swap(Ops[0], Ops[1]); 2858 case NEON::BI__builtin_neon_vcage_v: 2859 case NEON::BI__builtin_neon_vcageq_v: 2860 case NEON::BI__builtin_neon_vcagt_v: 2861 case NEON::BI__builtin_neon_vcagtq_v: { 2862 llvm::Type *VecFlt = llvm::VectorType::get( 2863 VTy->getScalarSizeInBits() == 32 ? FloatTy : DoubleTy, 2864 VTy->getNumElements()); 2865 llvm::Type *Tys[] = { VTy, VecFlt }; 2866 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 2867 return EmitNeonCall(F, Ops, NameHint); 2868 } 2869 case NEON::BI__builtin_neon_vclz_v: 2870 case NEON::BI__builtin_neon_vclzq_v: 2871 // We generate target-independent intrinsic, which needs a second argument 2872 // for whether or not clz of zero is undefined; on ARM it isn't. 2873 Ops.push_back(Builder.getInt1(getTarget().isCLZForZeroUndef())); 2874 break; 2875 case NEON::BI__builtin_neon_vcvt_f32_v: 2876 case NEON::BI__builtin_neon_vcvtq_f32_v: 2877 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2878 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, Quad)); 2879 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 2880 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 2881 case NEON::BI__builtin_neon_vcvt_n_f32_v: 2882 case NEON::BI__builtin_neon_vcvt_n_f64_v: 2883 case NEON::BI__builtin_neon_vcvtq_n_f32_v: 2884 case NEON::BI__builtin_neon_vcvtq_n_f64_v: { 2885 llvm::Type *Tys[2] = { GetFloatNeonType(this, Type), Ty }; 2886 Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic; 2887 Function *F = CGM.getIntrinsic(Int, Tys); 2888 return EmitNeonCall(F, Ops, "vcvt_n"); 2889 } 2890 case NEON::BI__builtin_neon_vcvt_n_s32_v: 2891 case NEON::BI__builtin_neon_vcvt_n_u32_v: 2892 case NEON::BI__builtin_neon_vcvt_n_s64_v: 2893 case NEON::BI__builtin_neon_vcvt_n_u64_v: 2894 case NEON::BI__builtin_neon_vcvtq_n_s32_v: 2895 case NEON::BI__builtin_neon_vcvtq_n_u32_v: 2896 case NEON::BI__builtin_neon_vcvtq_n_s64_v: 2897 case NEON::BI__builtin_neon_vcvtq_n_u64_v: { 2898 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 2899 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 2900 return EmitNeonCall(F, Ops, "vcvt_n"); 2901 } 2902 case NEON::BI__builtin_neon_vcvt_s32_v: 2903 case NEON::BI__builtin_neon_vcvt_u32_v: 2904 case NEON::BI__builtin_neon_vcvt_s64_v: 2905 case NEON::BI__builtin_neon_vcvt_u64_v: 2906 case NEON::BI__builtin_neon_vcvtq_s32_v: 2907 case NEON::BI__builtin_neon_vcvtq_u32_v: 2908 case NEON::BI__builtin_neon_vcvtq_s64_v: 2909 case NEON::BI__builtin_neon_vcvtq_u64_v: { 2910 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 2911 return Usgn ? Builder.CreateFPToUI(Ops[0], Ty, "vcvt") 2912 : Builder.CreateFPToSI(Ops[0], Ty, "vcvt"); 2913 } 2914 case NEON::BI__builtin_neon_vcvta_s32_v: 2915 case NEON::BI__builtin_neon_vcvta_s64_v: 2916 case NEON::BI__builtin_neon_vcvta_u32_v: 2917 case NEON::BI__builtin_neon_vcvta_u64_v: 2918 case NEON::BI__builtin_neon_vcvtaq_s32_v: 2919 case NEON::BI__builtin_neon_vcvtaq_s64_v: 2920 case NEON::BI__builtin_neon_vcvtaq_u32_v: 2921 case NEON::BI__builtin_neon_vcvtaq_u64_v: 2922 case NEON::BI__builtin_neon_vcvtn_s32_v: 2923 case NEON::BI__builtin_neon_vcvtn_s64_v: 2924 case NEON::BI__builtin_neon_vcvtn_u32_v: 2925 case NEON::BI__builtin_neon_vcvtn_u64_v: 2926 case NEON::BI__builtin_neon_vcvtnq_s32_v: 2927 case NEON::BI__builtin_neon_vcvtnq_s64_v: 2928 case NEON::BI__builtin_neon_vcvtnq_u32_v: 2929 case NEON::BI__builtin_neon_vcvtnq_u64_v: 2930 case NEON::BI__builtin_neon_vcvtp_s32_v: 2931 case NEON::BI__builtin_neon_vcvtp_s64_v: 2932 case NEON::BI__builtin_neon_vcvtp_u32_v: 2933 case NEON::BI__builtin_neon_vcvtp_u64_v: 2934 case NEON::BI__builtin_neon_vcvtpq_s32_v: 2935 case NEON::BI__builtin_neon_vcvtpq_s64_v: 2936 case NEON::BI__builtin_neon_vcvtpq_u32_v: 2937 case NEON::BI__builtin_neon_vcvtpq_u64_v: 2938 case NEON::BI__builtin_neon_vcvtm_s32_v: 2939 case NEON::BI__builtin_neon_vcvtm_s64_v: 2940 case NEON::BI__builtin_neon_vcvtm_u32_v: 2941 case NEON::BI__builtin_neon_vcvtm_u64_v: 2942 case NEON::BI__builtin_neon_vcvtmq_s32_v: 2943 case NEON::BI__builtin_neon_vcvtmq_s64_v: 2944 case NEON::BI__builtin_neon_vcvtmq_u32_v: 2945 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 2946 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 2947 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, NameHint); 2948 } 2949 case NEON::BI__builtin_neon_vext_v: 2950 case NEON::BI__builtin_neon_vextq_v: { 2951 int CV = cast<ConstantInt>(Ops[2])->getSExtValue(); 2952 SmallVector<Constant*, 16> Indices; 2953 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 2954 Indices.push_back(ConstantInt::get(Int32Ty, i+CV)); 2955 2956 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2957 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 2958 Value *SV = llvm::ConstantVector::get(Indices); 2959 return Builder.CreateShuffleVector(Ops[0], Ops[1], SV, "vext"); 2960 } 2961 case NEON::BI__builtin_neon_vfma_v: 2962 case NEON::BI__builtin_neon_vfmaq_v: { 2963 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 2964 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2965 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 2966 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 2967 2968 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 2969 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 2970 } 2971 case NEON::BI__builtin_neon_vld1_v: 2972 case NEON::BI__builtin_neon_vld1q_v: { 2973 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 2974 Ops.push_back(getAlignmentValue32(PtrOp0)); 2975 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, "vld1"); 2976 } 2977 case NEON::BI__builtin_neon_vld2_v: 2978 case NEON::BI__builtin_neon_vld2q_v: 2979 case NEON::BI__builtin_neon_vld3_v: 2980 case NEON::BI__builtin_neon_vld3q_v: 2981 case NEON::BI__builtin_neon_vld4_v: 2982 case NEON::BI__builtin_neon_vld4q_v: { 2983 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 2984 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 2985 Value *Align = getAlignmentValue32(PtrOp1); 2986 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint); 2987 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 2988 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2989 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 2990 } 2991 case NEON::BI__builtin_neon_vld1_dup_v: 2992 case NEON::BI__builtin_neon_vld1q_dup_v: { 2993 Value *V = UndefValue::get(Ty); 2994 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 2995 PtrOp0 = Builder.CreateBitCast(PtrOp0, Ty); 2996 LoadInst *Ld = Builder.CreateLoad(PtrOp0); 2997 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 2998 Ops[0] = Builder.CreateInsertElement(V, Ld, CI); 2999 return EmitNeonSplat(Ops[0], CI); 3000 } 3001 case NEON::BI__builtin_neon_vld2_lane_v: 3002 case NEON::BI__builtin_neon_vld2q_lane_v: 3003 case NEON::BI__builtin_neon_vld3_lane_v: 3004 case NEON::BI__builtin_neon_vld3q_lane_v: 3005 case NEON::BI__builtin_neon_vld4_lane_v: 3006 case NEON::BI__builtin_neon_vld4q_lane_v: { 3007 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3008 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3009 for (unsigned I = 2; I < Ops.size() - 1; ++I) 3010 Ops[I] = Builder.CreateBitCast(Ops[I], Ty); 3011 Ops.push_back(getAlignmentValue32(PtrOp1)); 3012 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), NameHint); 3013 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3014 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3015 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3016 } 3017 case NEON::BI__builtin_neon_vmovl_v: { 3018 llvm::Type *DTy =llvm::VectorType::getTruncatedElementVectorType(VTy); 3019 Ops[0] = Builder.CreateBitCast(Ops[0], DTy); 3020 if (Usgn) 3021 return Builder.CreateZExt(Ops[0], Ty, "vmovl"); 3022 return Builder.CreateSExt(Ops[0], Ty, "vmovl"); 3023 } 3024 case NEON::BI__builtin_neon_vmovn_v: { 3025 llvm::Type *QTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3026 Ops[0] = Builder.CreateBitCast(Ops[0], QTy); 3027 return Builder.CreateTrunc(Ops[0], Ty, "vmovn"); 3028 } 3029 case NEON::BI__builtin_neon_vmull_v: 3030 // FIXME: the integer vmull operations could be emitted in terms of pure 3031 // LLVM IR (2 exts followed by a mul). Unfortunately LLVM has a habit of 3032 // hoisting the exts outside loops. Until global ISel comes along that can 3033 // see through such movement this leads to bad CodeGen. So we need an 3034 // intrinsic for now. 3035 Int = Usgn ? Intrinsic::arm_neon_vmullu : Intrinsic::arm_neon_vmulls; 3036 Int = Type.isPoly() ? (unsigned)Intrinsic::arm_neon_vmullp : Int; 3037 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 3038 case NEON::BI__builtin_neon_vpadal_v: 3039 case NEON::BI__builtin_neon_vpadalq_v: { 3040 // The source operand type has twice as many elements of half the size. 3041 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3042 llvm::Type *EltTy = 3043 llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3044 llvm::Type *NarrowTy = 3045 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3046 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3047 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, NameHint); 3048 } 3049 case NEON::BI__builtin_neon_vpaddl_v: 3050 case NEON::BI__builtin_neon_vpaddlq_v: { 3051 // The source operand type has twice as many elements of half the size. 3052 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3053 llvm::Type *EltTy = llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3054 llvm::Type *NarrowTy = 3055 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3056 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3057 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vpaddl"); 3058 } 3059 case NEON::BI__builtin_neon_vqdmlal_v: 3060 case NEON::BI__builtin_neon_vqdmlsl_v: { 3061 SmallVector<Value *, 2> MulOps(Ops.begin() + 1, Ops.end()); 3062 Ops[1] = 3063 EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), MulOps, "vqdmlal"); 3064 Ops.resize(2); 3065 return EmitNeonCall(CGM.getIntrinsic(AltLLVMIntrinsic, Ty), Ops, NameHint); 3066 } 3067 case NEON::BI__builtin_neon_vqshl_n_v: 3068 case NEON::BI__builtin_neon_vqshlq_n_v: 3069 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshl_n", 3070 1, false); 3071 case NEON::BI__builtin_neon_vqshlu_n_v: 3072 case NEON::BI__builtin_neon_vqshluq_n_v: 3073 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshlu_n", 3074 1, false); 3075 case NEON::BI__builtin_neon_vrecpe_v: 3076 case NEON::BI__builtin_neon_vrecpeq_v: 3077 case NEON::BI__builtin_neon_vrsqrte_v: 3078 case NEON::BI__builtin_neon_vrsqrteq_v: 3079 Int = Ty->isFPOrFPVectorTy() ? LLVMIntrinsic : AltLLVMIntrinsic; 3080 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint); 3081 3082 case NEON::BI__builtin_neon_vrshr_n_v: 3083 case NEON::BI__builtin_neon_vrshrq_n_v: 3084 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n", 3085 1, true); 3086 case NEON::BI__builtin_neon_vshl_n_v: 3087 case NEON::BI__builtin_neon_vshlq_n_v: 3088 Ops[1] = EmitNeonShiftVector(Ops[1], Ty, false); 3089 return Builder.CreateShl(Builder.CreateBitCast(Ops[0],Ty), Ops[1], 3090 "vshl_n"); 3091 case NEON::BI__builtin_neon_vshll_n_v: { 3092 llvm::Type *SrcTy = llvm::VectorType::getTruncatedElementVectorType(VTy); 3093 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3094 if (Usgn) 3095 Ops[0] = Builder.CreateZExt(Ops[0], VTy); 3096 else 3097 Ops[0] = Builder.CreateSExt(Ops[0], VTy); 3098 Ops[1] = EmitNeonShiftVector(Ops[1], VTy, false); 3099 return Builder.CreateShl(Ops[0], Ops[1], "vshll_n"); 3100 } 3101 case NEON::BI__builtin_neon_vshrn_n_v: { 3102 llvm::Type *SrcTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3103 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3104 Ops[1] = EmitNeonShiftVector(Ops[1], SrcTy, false); 3105 if (Usgn) 3106 Ops[0] = Builder.CreateLShr(Ops[0], Ops[1]); 3107 else 3108 Ops[0] = Builder.CreateAShr(Ops[0], Ops[1]); 3109 return Builder.CreateTrunc(Ops[0], Ty, "vshrn_n"); 3110 } 3111 case NEON::BI__builtin_neon_vshr_n_v: 3112 case NEON::BI__builtin_neon_vshrq_n_v: 3113 return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, Usgn, "vshr_n"); 3114 case NEON::BI__builtin_neon_vst1_v: 3115 case NEON::BI__builtin_neon_vst1q_v: 3116 case NEON::BI__builtin_neon_vst2_v: 3117 case NEON::BI__builtin_neon_vst2q_v: 3118 case NEON::BI__builtin_neon_vst3_v: 3119 case NEON::BI__builtin_neon_vst3q_v: 3120 case NEON::BI__builtin_neon_vst4_v: 3121 case NEON::BI__builtin_neon_vst4q_v: 3122 case NEON::BI__builtin_neon_vst2_lane_v: 3123 case NEON::BI__builtin_neon_vst2q_lane_v: 3124 case NEON::BI__builtin_neon_vst3_lane_v: 3125 case NEON::BI__builtin_neon_vst3q_lane_v: 3126 case NEON::BI__builtin_neon_vst4_lane_v: 3127 case NEON::BI__builtin_neon_vst4q_lane_v: { 3128 llvm::Type *Tys[] = {Int8PtrTy, Ty}; 3129 Ops.push_back(getAlignmentValue32(PtrOp0)); 3130 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 3131 } 3132 case NEON::BI__builtin_neon_vsubhn_v: { 3133 llvm::VectorType *SrcTy = 3134 llvm::VectorType::getExtendedElementVectorType(VTy); 3135 3136 // %sum = add <4 x i32> %lhs, %rhs 3137 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3138 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 3139 Ops[0] = Builder.CreateSub(Ops[0], Ops[1], "vsubhn"); 3140 3141 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 3142 Constant *ShiftAmt = 3143 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 3144 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vsubhn"); 3145 3146 // %res = trunc <4 x i32> %high to <4 x i16> 3147 return Builder.CreateTrunc(Ops[0], VTy, "vsubhn"); 3148 } 3149 case NEON::BI__builtin_neon_vtrn_v: 3150 case NEON::BI__builtin_neon_vtrnq_v: { 3151 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3152 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3153 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3154 Value *SV = nullptr; 3155 3156 for (unsigned vi = 0; vi != 2; ++vi) { 3157 SmallVector<Constant*, 16> Indices; 3158 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 3159 Indices.push_back(Builder.getInt32(i+vi)); 3160 Indices.push_back(Builder.getInt32(i+e+vi)); 3161 } 3162 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3163 SV = llvm::ConstantVector::get(Indices); 3164 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vtrn"); 3165 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3166 } 3167 return SV; 3168 } 3169 case NEON::BI__builtin_neon_vtst_v: 3170 case NEON::BI__builtin_neon_vtstq_v: { 3171 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3172 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3173 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 3174 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 3175 ConstantAggregateZero::get(Ty)); 3176 return Builder.CreateSExt(Ops[0], Ty, "vtst"); 3177 } 3178 case NEON::BI__builtin_neon_vuzp_v: 3179 case NEON::BI__builtin_neon_vuzpq_v: { 3180 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3181 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3182 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3183 Value *SV = nullptr; 3184 3185 for (unsigned vi = 0; vi != 2; ++vi) { 3186 SmallVector<Constant*, 16> Indices; 3187 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 3188 Indices.push_back(ConstantInt::get(Int32Ty, 2*i+vi)); 3189 3190 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3191 SV = llvm::ConstantVector::get(Indices); 3192 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vuzp"); 3193 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3194 } 3195 return SV; 3196 } 3197 case NEON::BI__builtin_neon_vzip_v: 3198 case NEON::BI__builtin_neon_vzipq_v: { 3199 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3200 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3201 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3202 Value *SV = nullptr; 3203 3204 for (unsigned vi = 0; vi != 2; ++vi) { 3205 SmallVector<Constant*, 16> Indices; 3206 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 3207 Indices.push_back(ConstantInt::get(Int32Ty, (i + vi*e) >> 1)); 3208 Indices.push_back(ConstantInt::get(Int32Ty, ((i + vi*e) >> 1)+e)); 3209 } 3210 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3211 SV = llvm::ConstantVector::get(Indices); 3212 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vzip"); 3213 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3214 } 3215 return SV; 3216 } 3217 } 3218 3219 assert(Int && "Expected valid intrinsic number"); 3220 3221 // Determine the type(s) of this overloaded AArch64 intrinsic. 3222 Function *F = LookupNeonLLVMIntrinsic(Int, Modifier, Ty, E); 3223 3224 Value *Result = EmitNeonCall(F, Ops, NameHint); 3225 llvm::Type *ResultType = ConvertType(E->getType()); 3226 // AArch64 intrinsic one-element vector type cast to 3227 // scalar type expected by the builtin 3228 return Builder.CreateBitCast(Result, ResultType, NameHint); 3229 } 3230 3231 Value *CodeGenFunction::EmitAArch64CompareBuiltinExpr( 3232 Value *Op, llvm::Type *Ty, const CmpInst::Predicate Fp, 3233 const CmpInst::Predicate Ip, const Twine &Name) { 3234 llvm::Type *OTy = Op->getType(); 3235 3236 // FIXME: this is utterly horrific. We should not be looking at previous 3237 // codegen context to find out what needs doing. Unfortunately TableGen 3238 // currently gives us exactly the same calls for vceqz_f32 and vceqz_s32 3239 // (etc). 3240 if (BitCastInst *BI = dyn_cast<BitCastInst>(Op)) 3241 OTy = BI->getOperand(0)->getType(); 3242 3243 Op = Builder.CreateBitCast(Op, OTy); 3244 if (OTy->getScalarType()->isFloatingPointTy()) { 3245 Op = Builder.CreateFCmp(Fp, Op, Constant::getNullValue(OTy)); 3246 } else { 3247 Op = Builder.CreateICmp(Ip, Op, Constant::getNullValue(OTy)); 3248 } 3249 return Builder.CreateSExt(Op, Ty, Name); 3250 } 3251 3252 static Value *packTBLDVectorList(CodeGenFunction &CGF, ArrayRef<Value *> Ops, 3253 Value *ExtOp, Value *IndexOp, 3254 llvm::Type *ResTy, unsigned IntID, 3255 const char *Name) { 3256 SmallVector<Value *, 2> TblOps; 3257 if (ExtOp) 3258 TblOps.push_back(ExtOp); 3259 3260 // Build a vector containing sequential number like (0, 1, 2, ..., 15) 3261 SmallVector<Constant*, 16> Indices; 3262 llvm::VectorType *TblTy = cast<llvm::VectorType>(Ops[0]->getType()); 3263 for (unsigned i = 0, e = TblTy->getNumElements(); i != e; ++i) { 3264 Indices.push_back(ConstantInt::get(CGF.Int32Ty, 2*i)); 3265 Indices.push_back(ConstantInt::get(CGF.Int32Ty, 2*i+1)); 3266 } 3267 Value *SV = llvm::ConstantVector::get(Indices); 3268 3269 int PairPos = 0, End = Ops.size() - 1; 3270 while (PairPos < End) { 3271 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 3272 Ops[PairPos+1], SV, Name)); 3273 PairPos += 2; 3274 } 3275 3276 // If there's an odd number of 64-bit lookup table, fill the high 64-bit 3277 // of the 128-bit lookup table with zero. 3278 if (PairPos == End) { 3279 Value *ZeroTbl = ConstantAggregateZero::get(TblTy); 3280 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 3281 ZeroTbl, SV, Name)); 3282 } 3283 3284 Function *TblF; 3285 TblOps.push_back(IndexOp); 3286 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); 3287 3288 return CGF.EmitNeonCall(TblF, TblOps, Name); 3289 } 3290 3291 Value *CodeGenFunction::GetValueForARMHint(unsigned BuiltinID) { 3292 unsigned Value; 3293 switch (BuiltinID) { 3294 default: 3295 return nullptr; 3296 case ARM::BI__builtin_arm_nop: 3297 Value = 0; 3298 break; 3299 case ARM::BI__builtin_arm_yield: 3300 case ARM::BI__yield: 3301 Value = 1; 3302 break; 3303 case ARM::BI__builtin_arm_wfe: 3304 case ARM::BI__wfe: 3305 Value = 2; 3306 break; 3307 case ARM::BI__builtin_arm_wfi: 3308 case ARM::BI__wfi: 3309 Value = 3; 3310 break; 3311 case ARM::BI__builtin_arm_sev: 3312 case ARM::BI__sev: 3313 Value = 4; 3314 break; 3315 case ARM::BI__builtin_arm_sevl: 3316 case ARM::BI__sevl: 3317 Value = 5; 3318 break; 3319 } 3320 3321 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_hint), 3322 llvm::ConstantInt::get(Int32Ty, Value)); 3323 } 3324 3325 // Generates the IR for the read/write special register builtin, 3326 // ValueType is the type of the value that is to be written or read, 3327 // RegisterType is the type of the register being written to or read from. 3328 static Value *EmitSpecialRegisterBuiltin(CodeGenFunction &CGF, 3329 const CallExpr *E, 3330 llvm::Type *RegisterType, 3331 llvm::Type *ValueType, bool IsRead) { 3332 // write and register intrinsics only support 32 and 64 bit operations. 3333 assert((RegisterType->isIntegerTy(32) || RegisterType->isIntegerTy(64)) 3334 && "Unsupported size for register."); 3335 3336 CodeGen::CGBuilderTy &Builder = CGF.Builder; 3337 CodeGen::CodeGenModule &CGM = CGF.CGM; 3338 LLVMContext &Context = CGM.getLLVMContext(); 3339 3340 const Expr *SysRegStrExpr = E->getArg(0)->IgnoreParenCasts(); 3341 StringRef SysReg = cast<StringLiteral>(SysRegStrExpr)->getString(); 3342 3343 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysReg) }; 3344 llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); 3345 llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); 3346 3347 llvm::Type *Types[] = { RegisterType }; 3348 3349 bool MixedTypes = RegisterType->isIntegerTy(64) && ValueType->isIntegerTy(32); 3350 assert(!(RegisterType->isIntegerTy(32) && ValueType->isIntegerTy(64)) 3351 && "Can't fit 64-bit value in 32-bit register"); 3352 3353 if (IsRead) { 3354 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::read_register, Types); 3355 llvm::Value *Call = Builder.CreateCall(F, Metadata); 3356 3357 if (MixedTypes) 3358 // Read into 64 bit register and then truncate result to 32 bit. 3359 return Builder.CreateTrunc(Call, ValueType); 3360 3361 if (ValueType->isPointerTy()) 3362 // Have i32/i64 result (Call) but want to return a VoidPtrTy (i8*). 3363 return Builder.CreateIntToPtr(Call, ValueType); 3364 3365 return Call; 3366 } 3367 3368 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types); 3369 llvm::Value *ArgValue = CGF.EmitScalarExpr(E->getArg(1)); 3370 if (MixedTypes) { 3371 // Extend 32 bit write value to 64 bit to pass to write. 3372 ArgValue = Builder.CreateZExt(ArgValue, RegisterType); 3373 return Builder.CreateCall(F, { Metadata, ArgValue }); 3374 } 3375 3376 if (ValueType->isPointerTy()) { 3377 // Have VoidPtrTy ArgValue but want to return an i32/i64. 3378 ArgValue = Builder.CreatePtrToInt(ArgValue, RegisterType); 3379 return Builder.CreateCall(F, { Metadata, ArgValue }); 3380 } 3381 3382 return Builder.CreateCall(F, { Metadata, ArgValue }); 3383 } 3384 3385 /// Return true if BuiltinID is an overloaded Neon intrinsic with an extra 3386 /// argument that specifies the vector type. 3387 static bool HasExtraNeonArgument(unsigned BuiltinID) { 3388 switch (BuiltinID) { 3389 default: break; 3390 case NEON::BI__builtin_neon_vget_lane_i8: 3391 case NEON::BI__builtin_neon_vget_lane_i16: 3392 case NEON::BI__builtin_neon_vget_lane_i32: 3393 case NEON::BI__builtin_neon_vget_lane_i64: 3394 case NEON::BI__builtin_neon_vget_lane_f32: 3395 case NEON::BI__builtin_neon_vgetq_lane_i8: 3396 case NEON::BI__builtin_neon_vgetq_lane_i16: 3397 case NEON::BI__builtin_neon_vgetq_lane_i32: 3398 case NEON::BI__builtin_neon_vgetq_lane_i64: 3399 case NEON::BI__builtin_neon_vgetq_lane_f32: 3400 case NEON::BI__builtin_neon_vset_lane_i8: 3401 case NEON::BI__builtin_neon_vset_lane_i16: 3402 case NEON::BI__builtin_neon_vset_lane_i32: 3403 case NEON::BI__builtin_neon_vset_lane_i64: 3404 case NEON::BI__builtin_neon_vset_lane_f32: 3405 case NEON::BI__builtin_neon_vsetq_lane_i8: 3406 case NEON::BI__builtin_neon_vsetq_lane_i16: 3407 case NEON::BI__builtin_neon_vsetq_lane_i32: 3408 case NEON::BI__builtin_neon_vsetq_lane_i64: 3409 case NEON::BI__builtin_neon_vsetq_lane_f32: 3410 case NEON::BI__builtin_neon_vsha1h_u32: 3411 case NEON::BI__builtin_neon_vsha1cq_u32: 3412 case NEON::BI__builtin_neon_vsha1pq_u32: 3413 case NEON::BI__builtin_neon_vsha1mq_u32: 3414 case ARM::BI_MoveToCoprocessor: 3415 case ARM::BI_MoveToCoprocessor2: 3416 return false; 3417 } 3418 return true; 3419 } 3420 3421 Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, 3422 const CallExpr *E) { 3423 if (auto Hint = GetValueForARMHint(BuiltinID)) 3424 return Hint; 3425 3426 if (BuiltinID == ARM::BI__emit) { 3427 bool IsThumb = getTarget().getTriple().getArch() == llvm::Triple::thumb; 3428 llvm::FunctionType *FTy = 3429 llvm::FunctionType::get(VoidTy, /*Variadic=*/false); 3430 3431 APSInt Value; 3432 if (!E->getArg(0)->EvaluateAsInt(Value, CGM.getContext())) 3433 llvm_unreachable("Sema will ensure that the parameter is constant"); 3434 3435 uint64_t ZExtValue = Value.zextOrTrunc(IsThumb ? 16 : 32).getZExtValue(); 3436 3437 llvm::InlineAsm *Emit = 3438 IsThumb ? InlineAsm::get(FTy, ".inst.n 0x" + utohexstr(ZExtValue), "", 3439 /*SideEffects=*/true) 3440 : InlineAsm::get(FTy, ".inst 0x" + utohexstr(ZExtValue), "", 3441 /*SideEffects=*/true); 3442 3443 return Builder.CreateCall(Emit); 3444 } 3445 3446 if (BuiltinID == ARM::BI__builtin_arm_dbg) { 3447 Value *Option = EmitScalarExpr(E->getArg(0)); 3448 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_dbg), Option); 3449 } 3450 3451 if (BuiltinID == ARM::BI__builtin_arm_prefetch) { 3452 Value *Address = EmitScalarExpr(E->getArg(0)); 3453 Value *RW = EmitScalarExpr(E->getArg(1)); 3454 Value *IsData = EmitScalarExpr(E->getArg(2)); 3455 3456 // Locality is not supported on ARM target 3457 Value *Locality = llvm::ConstantInt::get(Int32Ty, 3); 3458 3459 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 3460 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 3461 } 3462 3463 if (BuiltinID == ARM::BI__builtin_arm_rbit) { 3464 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_rbit), 3465 EmitScalarExpr(E->getArg(0)), 3466 "rbit"); 3467 } 3468 3469 if (BuiltinID == ARM::BI__clear_cache) { 3470 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 3471 const FunctionDecl *FD = E->getDirectCallee(); 3472 Value *Ops[2]; 3473 for (unsigned i = 0; i < 2; i++) 3474 Ops[i] = EmitScalarExpr(E->getArg(i)); 3475 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 3476 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 3477 StringRef Name = FD->getName(); 3478 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 3479 } 3480 3481 if (BuiltinID == ARM::BI__builtin_arm_ldrexd || 3482 ((BuiltinID == ARM::BI__builtin_arm_ldrex || 3483 BuiltinID == ARM::BI__builtin_arm_ldaex) && 3484 getContext().getTypeSize(E->getType()) == 64) || 3485 BuiltinID == ARM::BI__ldrexd) { 3486 Function *F; 3487 3488 switch (BuiltinID) { 3489 default: llvm_unreachable("unexpected builtin"); 3490 case ARM::BI__builtin_arm_ldaex: 3491 F = CGM.getIntrinsic(Intrinsic::arm_ldaexd); 3492 break; 3493 case ARM::BI__builtin_arm_ldrexd: 3494 case ARM::BI__builtin_arm_ldrex: 3495 case ARM::BI__ldrexd: 3496 F = CGM.getIntrinsic(Intrinsic::arm_ldrexd); 3497 break; 3498 } 3499 3500 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 3501 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 3502 "ldrexd"); 3503 3504 Value *Val0 = Builder.CreateExtractValue(Val, 1); 3505 Value *Val1 = Builder.CreateExtractValue(Val, 0); 3506 Val0 = Builder.CreateZExt(Val0, Int64Ty); 3507 Val1 = Builder.CreateZExt(Val1, Int64Ty); 3508 3509 Value *ShiftCst = llvm::ConstantInt::get(Int64Ty, 32); 3510 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 3511 Val = Builder.CreateOr(Val, Val1); 3512 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 3513 } 3514 3515 if (BuiltinID == ARM::BI__builtin_arm_ldrex || 3516 BuiltinID == ARM::BI__builtin_arm_ldaex) { 3517 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 3518 3519 QualType Ty = E->getType(); 3520 llvm::Type *RealResTy = ConvertType(Ty); 3521 llvm::Type *IntResTy = llvm::IntegerType::get(getLLVMContext(), 3522 getContext().getTypeSize(Ty)); 3523 LoadAddr = Builder.CreateBitCast(LoadAddr, IntResTy->getPointerTo()); 3524 3525 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_ldaex 3526 ? Intrinsic::arm_ldaex 3527 : Intrinsic::arm_ldrex, 3528 LoadAddr->getType()); 3529 Value *Val = Builder.CreateCall(F, LoadAddr, "ldrex"); 3530 3531 if (RealResTy->isPointerTy()) 3532 return Builder.CreateIntToPtr(Val, RealResTy); 3533 else { 3534 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 3535 return Builder.CreateBitCast(Val, RealResTy); 3536 } 3537 } 3538 3539 if (BuiltinID == ARM::BI__builtin_arm_strexd || 3540 ((BuiltinID == ARM::BI__builtin_arm_stlex || 3541 BuiltinID == ARM::BI__builtin_arm_strex) && 3542 getContext().getTypeSize(E->getArg(0)->getType()) == 64)) { 3543 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 3544 ? Intrinsic::arm_stlexd 3545 : Intrinsic::arm_strexd); 3546 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, nullptr); 3547 3548 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 3549 Value *Val = EmitScalarExpr(E->getArg(0)); 3550 Builder.CreateStore(Val, Tmp); 3551 3552 Address LdPtr = Builder.CreateBitCast(Tmp,llvm::PointerType::getUnqual(STy)); 3553 Val = Builder.CreateLoad(LdPtr); 3554 3555 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 3556 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 3557 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), Int8PtrTy); 3558 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "strexd"); 3559 } 3560 3561 if (BuiltinID == ARM::BI__builtin_arm_strex || 3562 BuiltinID == ARM::BI__builtin_arm_stlex) { 3563 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 3564 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 3565 3566 QualType Ty = E->getArg(0)->getType(); 3567 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 3568 getContext().getTypeSize(Ty)); 3569 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 3570 3571 if (StoreVal->getType()->isPointerTy()) 3572 StoreVal = Builder.CreatePtrToInt(StoreVal, Int32Ty); 3573 else { 3574 StoreVal = Builder.CreateBitCast(StoreVal, StoreTy); 3575 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int32Ty); 3576 } 3577 3578 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 3579 ? Intrinsic::arm_stlex 3580 : Intrinsic::arm_strex, 3581 StoreAddr->getType()); 3582 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "strex"); 3583 } 3584 3585 if (BuiltinID == ARM::BI__builtin_arm_clrex) { 3586 Function *F = CGM.getIntrinsic(Intrinsic::arm_clrex); 3587 return Builder.CreateCall(F); 3588 } 3589 3590 // CRC32 3591 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 3592 switch (BuiltinID) { 3593 case ARM::BI__builtin_arm_crc32b: 3594 CRCIntrinsicID = Intrinsic::arm_crc32b; break; 3595 case ARM::BI__builtin_arm_crc32cb: 3596 CRCIntrinsicID = Intrinsic::arm_crc32cb; break; 3597 case ARM::BI__builtin_arm_crc32h: 3598 CRCIntrinsicID = Intrinsic::arm_crc32h; break; 3599 case ARM::BI__builtin_arm_crc32ch: 3600 CRCIntrinsicID = Intrinsic::arm_crc32ch; break; 3601 case ARM::BI__builtin_arm_crc32w: 3602 case ARM::BI__builtin_arm_crc32d: 3603 CRCIntrinsicID = Intrinsic::arm_crc32w; break; 3604 case ARM::BI__builtin_arm_crc32cw: 3605 case ARM::BI__builtin_arm_crc32cd: 3606 CRCIntrinsicID = Intrinsic::arm_crc32cw; break; 3607 } 3608 3609 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 3610 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 3611 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 3612 3613 // crc32{c,}d intrinsics are implemnted as two calls to crc32{c,}w 3614 // intrinsics, hence we need different codegen for these cases. 3615 if (BuiltinID == ARM::BI__builtin_arm_crc32d || 3616 BuiltinID == ARM::BI__builtin_arm_crc32cd) { 3617 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 3618 Value *Arg1a = Builder.CreateTruncOrBitCast(Arg1, Int32Ty); 3619 Value *Arg1b = Builder.CreateLShr(Arg1, C1); 3620 Arg1b = Builder.CreateTruncOrBitCast(Arg1b, Int32Ty); 3621 3622 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 3623 Value *Res = Builder.CreateCall(F, {Arg0, Arg1a}); 3624 return Builder.CreateCall(F, {Res, Arg1b}); 3625 } else { 3626 Arg1 = Builder.CreateZExtOrBitCast(Arg1, Int32Ty); 3627 3628 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 3629 return Builder.CreateCall(F, {Arg0, Arg1}); 3630 } 3631 } 3632 3633 if (BuiltinID == ARM::BI__builtin_arm_rsr || 3634 BuiltinID == ARM::BI__builtin_arm_rsr64 || 3635 BuiltinID == ARM::BI__builtin_arm_rsrp || 3636 BuiltinID == ARM::BI__builtin_arm_wsr || 3637 BuiltinID == ARM::BI__builtin_arm_wsr64 || 3638 BuiltinID == ARM::BI__builtin_arm_wsrp) { 3639 3640 bool IsRead = BuiltinID == ARM::BI__builtin_arm_rsr || 3641 BuiltinID == ARM::BI__builtin_arm_rsr64 || 3642 BuiltinID == ARM::BI__builtin_arm_rsrp; 3643 3644 bool IsPointerBuiltin = BuiltinID == ARM::BI__builtin_arm_rsrp || 3645 BuiltinID == ARM::BI__builtin_arm_wsrp; 3646 3647 bool Is64Bit = BuiltinID == ARM::BI__builtin_arm_rsr64 || 3648 BuiltinID == ARM::BI__builtin_arm_wsr64; 3649 3650 llvm::Type *ValueType; 3651 llvm::Type *RegisterType; 3652 if (IsPointerBuiltin) { 3653 ValueType = VoidPtrTy; 3654 RegisterType = Int32Ty; 3655 } else if (Is64Bit) { 3656 ValueType = RegisterType = Int64Ty; 3657 } else { 3658 ValueType = RegisterType = Int32Ty; 3659 } 3660 3661 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 3662 } 3663 3664 // Find out if any arguments are required to be integer constant 3665 // expressions. 3666 unsigned ICEArguments = 0; 3667 ASTContext::GetBuiltinTypeError Error; 3668 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 3669 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 3670 3671 auto getAlignmentValue32 = [&](Address addr) -> Value* { 3672 return Builder.getInt32(addr.getAlignment().getQuantity()); 3673 }; 3674 3675 Address PtrOp0 = Address::invalid(); 3676 Address PtrOp1 = Address::invalid(); 3677 SmallVector<Value*, 4> Ops; 3678 bool HasExtraArg = HasExtraNeonArgument(BuiltinID); 3679 unsigned NumArgs = E->getNumArgs() - (HasExtraArg ? 1 : 0); 3680 for (unsigned i = 0, e = NumArgs; i != e; i++) { 3681 if (i == 0) { 3682 switch (BuiltinID) { 3683 case NEON::BI__builtin_neon_vld1_v: 3684 case NEON::BI__builtin_neon_vld1q_v: 3685 case NEON::BI__builtin_neon_vld1q_lane_v: 3686 case NEON::BI__builtin_neon_vld1_lane_v: 3687 case NEON::BI__builtin_neon_vld1_dup_v: 3688 case NEON::BI__builtin_neon_vld1q_dup_v: 3689 case NEON::BI__builtin_neon_vst1_v: 3690 case NEON::BI__builtin_neon_vst1q_v: 3691 case NEON::BI__builtin_neon_vst1q_lane_v: 3692 case NEON::BI__builtin_neon_vst1_lane_v: 3693 case NEON::BI__builtin_neon_vst2_v: 3694 case NEON::BI__builtin_neon_vst2q_v: 3695 case NEON::BI__builtin_neon_vst2_lane_v: 3696 case NEON::BI__builtin_neon_vst2q_lane_v: 3697 case NEON::BI__builtin_neon_vst3_v: 3698 case NEON::BI__builtin_neon_vst3q_v: 3699 case NEON::BI__builtin_neon_vst3_lane_v: 3700 case NEON::BI__builtin_neon_vst3q_lane_v: 3701 case NEON::BI__builtin_neon_vst4_v: 3702 case NEON::BI__builtin_neon_vst4q_v: 3703 case NEON::BI__builtin_neon_vst4_lane_v: 3704 case NEON::BI__builtin_neon_vst4q_lane_v: 3705 // Get the alignment for the argument in addition to the value; 3706 // we'll use it later. 3707 PtrOp0 = EmitPointerWithAlignment(E->getArg(0)); 3708 Ops.push_back(PtrOp0.getPointer()); 3709 continue; 3710 } 3711 } 3712 if (i == 1) { 3713 switch (BuiltinID) { 3714 case NEON::BI__builtin_neon_vld2_v: 3715 case NEON::BI__builtin_neon_vld2q_v: 3716 case NEON::BI__builtin_neon_vld3_v: 3717 case NEON::BI__builtin_neon_vld3q_v: 3718 case NEON::BI__builtin_neon_vld4_v: 3719 case NEON::BI__builtin_neon_vld4q_v: 3720 case NEON::BI__builtin_neon_vld2_lane_v: 3721 case NEON::BI__builtin_neon_vld2q_lane_v: 3722 case NEON::BI__builtin_neon_vld3_lane_v: 3723 case NEON::BI__builtin_neon_vld3q_lane_v: 3724 case NEON::BI__builtin_neon_vld4_lane_v: 3725 case NEON::BI__builtin_neon_vld4q_lane_v: 3726 case NEON::BI__builtin_neon_vld2_dup_v: 3727 case NEON::BI__builtin_neon_vld3_dup_v: 3728 case NEON::BI__builtin_neon_vld4_dup_v: 3729 // Get the alignment for the argument in addition to the value; 3730 // we'll use it later. 3731 PtrOp1 = EmitPointerWithAlignment(E->getArg(1)); 3732 Ops.push_back(PtrOp1.getPointer()); 3733 continue; 3734 } 3735 } 3736 3737 if ((ICEArguments & (1 << i)) == 0) { 3738 Ops.push_back(EmitScalarExpr(E->getArg(i))); 3739 } else { 3740 // If this is required to be a constant, constant fold it so that we know 3741 // that the generated intrinsic gets a ConstantInt. 3742 llvm::APSInt Result; 3743 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 3744 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 3745 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 3746 } 3747 } 3748 3749 switch (BuiltinID) { 3750 default: break; 3751 3752 case NEON::BI__builtin_neon_vget_lane_i8: 3753 case NEON::BI__builtin_neon_vget_lane_i16: 3754 case NEON::BI__builtin_neon_vget_lane_i32: 3755 case NEON::BI__builtin_neon_vget_lane_i64: 3756 case NEON::BI__builtin_neon_vget_lane_f32: 3757 case NEON::BI__builtin_neon_vgetq_lane_i8: 3758 case NEON::BI__builtin_neon_vgetq_lane_i16: 3759 case NEON::BI__builtin_neon_vgetq_lane_i32: 3760 case NEON::BI__builtin_neon_vgetq_lane_i64: 3761 case NEON::BI__builtin_neon_vgetq_lane_f32: 3762 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane"); 3763 3764 case NEON::BI__builtin_neon_vset_lane_i8: 3765 case NEON::BI__builtin_neon_vset_lane_i16: 3766 case NEON::BI__builtin_neon_vset_lane_i32: 3767 case NEON::BI__builtin_neon_vset_lane_i64: 3768 case NEON::BI__builtin_neon_vset_lane_f32: 3769 case NEON::BI__builtin_neon_vsetq_lane_i8: 3770 case NEON::BI__builtin_neon_vsetq_lane_i16: 3771 case NEON::BI__builtin_neon_vsetq_lane_i32: 3772 case NEON::BI__builtin_neon_vsetq_lane_i64: 3773 case NEON::BI__builtin_neon_vsetq_lane_f32: 3774 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 3775 3776 case NEON::BI__builtin_neon_vsha1h_u32: 3777 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1h), Ops, 3778 "vsha1h"); 3779 case NEON::BI__builtin_neon_vsha1cq_u32: 3780 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1c), Ops, 3781 "vsha1h"); 3782 case NEON::BI__builtin_neon_vsha1pq_u32: 3783 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1p), Ops, 3784 "vsha1h"); 3785 case NEON::BI__builtin_neon_vsha1mq_u32: 3786 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1m), Ops, 3787 "vsha1h"); 3788 3789 // The ARM _MoveToCoprocessor builtins put the input register value as 3790 // the first argument, but the LLVM intrinsic expects it as the third one. 3791 case ARM::BI_MoveToCoprocessor: 3792 case ARM::BI_MoveToCoprocessor2: { 3793 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI_MoveToCoprocessor ? 3794 Intrinsic::arm_mcr : Intrinsic::arm_mcr2); 3795 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0], 3796 Ops[3], Ops[4], Ops[5]}); 3797 } 3798 } 3799 3800 // Get the last argument, which specifies the vector type. 3801 assert(HasExtraArg); 3802 llvm::APSInt Result; 3803 const Expr *Arg = E->getArg(E->getNumArgs()-1); 3804 if (!Arg->isIntegerConstantExpr(Result, getContext())) 3805 return nullptr; 3806 3807 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f || 3808 BuiltinID == ARM::BI__builtin_arm_vcvtr_d) { 3809 // Determine the overloaded type of this builtin. 3810 llvm::Type *Ty; 3811 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f) 3812 Ty = FloatTy; 3813 else 3814 Ty = DoubleTy; 3815 3816 // Determine whether this is an unsigned conversion or not. 3817 bool usgn = Result.getZExtValue() == 1; 3818 unsigned Int = usgn ? Intrinsic::arm_vcvtru : Intrinsic::arm_vcvtr; 3819 3820 // Call the appropriate intrinsic. 3821 Function *F = CGM.getIntrinsic(Int, Ty); 3822 return Builder.CreateCall(F, Ops, "vcvtr"); 3823 } 3824 3825 // Determine the type of this overloaded NEON intrinsic. 3826 NeonTypeFlags Type(Result.getZExtValue()); 3827 bool usgn = Type.isUnsigned(); 3828 bool rightShift = false; 3829 3830 llvm::VectorType *VTy = GetNeonType(this, Type); 3831 llvm::Type *Ty = VTy; 3832 if (!Ty) 3833 return nullptr; 3834 3835 // Many NEON builtins have identical semantics and uses in ARM and 3836 // AArch64. Emit these in a single function. 3837 auto IntrinsicMap = makeArrayRef(ARMSIMDIntrinsicMap); 3838 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 3839 IntrinsicMap, BuiltinID, NEONSIMDIntrinsicsProvenSorted); 3840 if (Builtin) 3841 return EmitCommonNeonBuiltinExpr( 3842 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 3843 Builtin->NameHint, Builtin->TypeModifier, E, Ops, PtrOp0, PtrOp1); 3844 3845 unsigned Int; 3846 switch (BuiltinID) { 3847 default: return nullptr; 3848 case NEON::BI__builtin_neon_vld1q_lane_v: 3849 // Handle 64-bit integer elements as a special case. Use shuffles of 3850 // one-element vectors to avoid poor code for i64 in the backend. 3851 if (VTy->getElementType()->isIntegerTy(64)) { 3852 // Extract the other lane. 3853 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3854 uint32_t Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); 3855 Value *SV = llvm::ConstantVector::get(ConstantInt::get(Int32Ty, 1-Lane)); 3856 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 3857 // Load the value as a one-element vector. 3858 Ty = llvm::VectorType::get(VTy->getElementType(), 1); 3859 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3860 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Tys); 3861 Value *Align = getAlignmentValue32(PtrOp0); 3862 Value *Ld = Builder.CreateCall(F, {Ops[0], Align}); 3863 // Combine them. 3864 uint32_t Indices[] = {1 - Lane, Lane}; 3865 SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 3866 return Builder.CreateShuffleVector(Ops[1], Ld, SV, "vld1q_lane"); 3867 } 3868 // fall through 3869 case NEON::BI__builtin_neon_vld1_lane_v: { 3870 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3871 PtrOp0 = Builder.CreateElementBitCast(PtrOp0, VTy->getElementType()); 3872 Value *Ld = Builder.CreateLoad(PtrOp0); 3873 return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); 3874 } 3875 case NEON::BI__builtin_neon_vld2_dup_v: 3876 case NEON::BI__builtin_neon_vld3_dup_v: 3877 case NEON::BI__builtin_neon_vld4_dup_v: { 3878 // Handle 64-bit elements as a special-case. There is no "dup" needed. 3879 if (VTy->getElementType()->getPrimitiveSizeInBits() == 64) { 3880 switch (BuiltinID) { 3881 case NEON::BI__builtin_neon_vld2_dup_v: 3882 Int = Intrinsic::arm_neon_vld2; 3883 break; 3884 case NEON::BI__builtin_neon_vld3_dup_v: 3885 Int = Intrinsic::arm_neon_vld3; 3886 break; 3887 case NEON::BI__builtin_neon_vld4_dup_v: 3888 Int = Intrinsic::arm_neon_vld4; 3889 break; 3890 default: llvm_unreachable("unknown vld_dup intrinsic?"); 3891 } 3892 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3893 Function *F = CGM.getIntrinsic(Int, Tys); 3894 llvm::Value *Align = getAlignmentValue32(PtrOp1); 3895 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, "vld_dup"); 3896 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3897 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3898 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3899 } 3900 switch (BuiltinID) { 3901 case NEON::BI__builtin_neon_vld2_dup_v: 3902 Int = Intrinsic::arm_neon_vld2lane; 3903 break; 3904 case NEON::BI__builtin_neon_vld3_dup_v: 3905 Int = Intrinsic::arm_neon_vld3lane; 3906 break; 3907 case NEON::BI__builtin_neon_vld4_dup_v: 3908 Int = Intrinsic::arm_neon_vld4lane; 3909 break; 3910 default: llvm_unreachable("unknown vld_dup intrinsic?"); 3911 } 3912 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3913 Function *F = CGM.getIntrinsic(Int, Tys); 3914 llvm::StructType *STy = cast<llvm::StructType>(F->getReturnType()); 3915 3916 SmallVector<Value*, 6> Args; 3917 Args.push_back(Ops[1]); 3918 Args.append(STy->getNumElements(), UndefValue::get(Ty)); 3919 3920 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 3921 Args.push_back(CI); 3922 Args.push_back(getAlignmentValue32(PtrOp1)); 3923 3924 Ops[1] = Builder.CreateCall(F, Args, "vld_dup"); 3925 // splat lane 0 to all elts in each vector of the result. 3926 for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { 3927 Value *Val = Builder.CreateExtractValue(Ops[1], i); 3928 Value *Elt = Builder.CreateBitCast(Val, Ty); 3929 Elt = EmitNeonSplat(Elt, CI); 3930 Elt = Builder.CreateBitCast(Elt, Val->getType()); 3931 Ops[1] = Builder.CreateInsertValue(Ops[1], Elt, i); 3932 } 3933 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3934 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3935 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3936 } 3937 case NEON::BI__builtin_neon_vqrshrn_n_v: 3938 Int = 3939 usgn ? Intrinsic::arm_neon_vqrshiftnu : Intrinsic::arm_neon_vqrshiftns; 3940 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n", 3941 1, true); 3942 case NEON::BI__builtin_neon_vqrshrun_n_v: 3943 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqrshiftnsu, Ty), 3944 Ops, "vqrshrun_n", 1, true); 3945 case NEON::BI__builtin_neon_vqshrn_n_v: 3946 Int = usgn ? Intrinsic::arm_neon_vqshiftnu : Intrinsic::arm_neon_vqshiftns; 3947 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n", 3948 1, true); 3949 case NEON::BI__builtin_neon_vqshrun_n_v: 3950 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqshiftnsu, Ty), 3951 Ops, "vqshrun_n", 1, true); 3952 case NEON::BI__builtin_neon_vrecpe_v: 3953 case NEON::BI__builtin_neon_vrecpeq_v: 3954 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecpe, Ty), 3955 Ops, "vrecpe"); 3956 case NEON::BI__builtin_neon_vrshrn_n_v: 3957 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrshiftn, Ty), 3958 Ops, "vrshrn_n", 1, true); 3959 case NEON::BI__builtin_neon_vrsra_n_v: 3960 case NEON::BI__builtin_neon_vrsraq_n_v: 3961 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3962 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3963 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, true); 3964 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 3965 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Ty), {Ops[1], Ops[2]}); 3966 return Builder.CreateAdd(Ops[0], Ops[1], "vrsra_n"); 3967 case NEON::BI__builtin_neon_vsri_n_v: 3968 case NEON::BI__builtin_neon_vsriq_n_v: 3969 rightShift = true; 3970 case NEON::BI__builtin_neon_vsli_n_v: 3971 case NEON::BI__builtin_neon_vsliq_n_v: 3972 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, rightShift); 3973 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vshiftins, Ty), 3974 Ops, "vsli_n"); 3975 case NEON::BI__builtin_neon_vsra_n_v: 3976 case NEON::BI__builtin_neon_vsraq_n_v: 3977 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3978 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 3979 return Builder.CreateAdd(Ops[0], Ops[1]); 3980 case NEON::BI__builtin_neon_vst1q_lane_v: 3981 // Handle 64-bit integer elements as a special case. Use a shuffle to get 3982 // a one-element vector and avoid poor code for i64 in the backend. 3983 if (VTy->getElementType()->isIntegerTy(64)) { 3984 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3985 Value *SV = llvm::ConstantVector::get(cast<llvm::Constant>(Ops[2])); 3986 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 3987 Ops[2] = getAlignmentValue32(PtrOp0); 3988 llvm::Type *Tys[] = {Int8PtrTy, Ops[1]->getType()}; 3989 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, 3990 Tys), Ops); 3991 } 3992 // fall through 3993 case NEON::BI__builtin_neon_vst1_lane_v: { 3994 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3995 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 3996 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3997 auto St = Builder.CreateStore(Ops[1], Builder.CreateBitCast(PtrOp0, Ty)); 3998 return St; 3999 } 4000 case NEON::BI__builtin_neon_vtbl1_v: 4001 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl1), 4002 Ops, "vtbl1"); 4003 case NEON::BI__builtin_neon_vtbl2_v: 4004 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl2), 4005 Ops, "vtbl2"); 4006 case NEON::BI__builtin_neon_vtbl3_v: 4007 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl3), 4008 Ops, "vtbl3"); 4009 case NEON::BI__builtin_neon_vtbl4_v: 4010 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl4), 4011 Ops, "vtbl4"); 4012 case NEON::BI__builtin_neon_vtbx1_v: 4013 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx1), 4014 Ops, "vtbx1"); 4015 case NEON::BI__builtin_neon_vtbx2_v: 4016 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx2), 4017 Ops, "vtbx2"); 4018 case NEON::BI__builtin_neon_vtbx3_v: 4019 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx3), 4020 Ops, "vtbx3"); 4021 case NEON::BI__builtin_neon_vtbx4_v: 4022 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx4), 4023 Ops, "vtbx4"); 4024 } 4025 } 4026 4027 static Value *EmitAArch64TblBuiltinExpr(CodeGenFunction &CGF, unsigned BuiltinID, 4028 const CallExpr *E, 4029 SmallVectorImpl<Value *> &Ops) { 4030 unsigned int Int = 0; 4031 const char *s = nullptr; 4032 4033 switch (BuiltinID) { 4034 default: 4035 return nullptr; 4036 case NEON::BI__builtin_neon_vtbl1_v: 4037 case NEON::BI__builtin_neon_vqtbl1_v: 4038 case NEON::BI__builtin_neon_vqtbl1q_v: 4039 case NEON::BI__builtin_neon_vtbl2_v: 4040 case NEON::BI__builtin_neon_vqtbl2_v: 4041 case NEON::BI__builtin_neon_vqtbl2q_v: 4042 case NEON::BI__builtin_neon_vtbl3_v: 4043 case NEON::BI__builtin_neon_vqtbl3_v: 4044 case NEON::BI__builtin_neon_vqtbl3q_v: 4045 case NEON::BI__builtin_neon_vtbl4_v: 4046 case NEON::BI__builtin_neon_vqtbl4_v: 4047 case NEON::BI__builtin_neon_vqtbl4q_v: 4048 break; 4049 case NEON::BI__builtin_neon_vtbx1_v: 4050 case NEON::BI__builtin_neon_vqtbx1_v: 4051 case NEON::BI__builtin_neon_vqtbx1q_v: 4052 case NEON::BI__builtin_neon_vtbx2_v: 4053 case NEON::BI__builtin_neon_vqtbx2_v: 4054 case NEON::BI__builtin_neon_vqtbx2q_v: 4055 case NEON::BI__builtin_neon_vtbx3_v: 4056 case NEON::BI__builtin_neon_vqtbx3_v: 4057 case NEON::BI__builtin_neon_vqtbx3q_v: 4058 case NEON::BI__builtin_neon_vtbx4_v: 4059 case NEON::BI__builtin_neon_vqtbx4_v: 4060 case NEON::BI__builtin_neon_vqtbx4q_v: 4061 break; 4062 } 4063 4064 assert(E->getNumArgs() >= 3); 4065 4066 // Get the last argument, which specifies the vector type. 4067 llvm::APSInt Result; 4068 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 4069 if (!Arg->isIntegerConstantExpr(Result, CGF.getContext())) 4070 return nullptr; 4071 4072 // Determine the type of this overloaded NEON intrinsic. 4073 NeonTypeFlags Type(Result.getZExtValue()); 4074 llvm::VectorType *Ty = GetNeonType(&CGF, Type); 4075 if (!Ty) 4076 return nullptr; 4077 4078 CodeGen::CGBuilderTy &Builder = CGF.Builder; 4079 4080 // AArch64 scalar builtins are not overloaded, they do not have an extra 4081 // argument that specifies the vector type, need to handle each case. 4082 switch (BuiltinID) { 4083 case NEON::BI__builtin_neon_vtbl1_v: { 4084 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 1), nullptr, 4085 Ops[1], Ty, Intrinsic::aarch64_neon_tbl1, 4086 "vtbl1"); 4087 } 4088 case NEON::BI__builtin_neon_vtbl2_v: { 4089 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 2), nullptr, 4090 Ops[2], Ty, Intrinsic::aarch64_neon_tbl1, 4091 "vtbl1"); 4092 } 4093 case NEON::BI__builtin_neon_vtbl3_v: { 4094 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 3), nullptr, 4095 Ops[3], Ty, Intrinsic::aarch64_neon_tbl2, 4096 "vtbl2"); 4097 } 4098 case NEON::BI__builtin_neon_vtbl4_v: { 4099 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 4), nullptr, 4100 Ops[4], Ty, Intrinsic::aarch64_neon_tbl2, 4101 "vtbl2"); 4102 } 4103 case NEON::BI__builtin_neon_vtbx1_v: { 4104 Value *TblRes = 4105 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 1), nullptr, Ops[2], 4106 Ty, Intrinsic::aarch64_neon_tbl1, "vtbl1"); 4107 4108 llvm::Constant *EightV = ConstantInt::get(Ty, 8); 4109 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[2], EightV); 4110 CmpRes = Builder.CreateSExt(CmpRes, Ty); 4111 4112 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 4113 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 4114 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 4115 } 4116 case NEON::BI__builtin_neon_vtbx2_v: { 4117 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 2), Ops[0], 4118 Ops[3], Ty, Intrinsic::aarch64_neon_tbx1, 4119 "vtbx1"); 4120 } 4121 case NEON::BI__builtin_neon_vtbx3_v: { 4122 Value *TblRes = 4123 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 3), nullptr, Ops[4], 4124 Ty, Intrinsic::aarch64_neon_tbl2, "vtbl2"); 4125 4126 llvm::Constant *TwentyFourV = ConstantInt::get(Ty, 24); 4127 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[4], 4128 TwentyFourV); 4129 CmpRes = Builder.CreateSExt(CmpRes, Ty); 4130 4131 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 4132 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 4133 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 4134 } 4135 case NEON::BI__builtin_neon_vtbx4_v: { 4136 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 4), Ops[0], 4137 Ops[5], Ty, Intrinsic::aarch64_neon_tbx2, 4138 "vtbx2"); 4139 } 4140 case NEON::BI__builtin_neon_vqtbl1_v: 4141 case NEON::BI__builtin_neon_vqtbl1q_v: 4142 Int = Intrinsic::aarch64_neon_tbl1; s = "vtbl1"; break; 4143 case NEON::BI__builtin_neon_vqtbl2_v: 4144 case NEON::BI__builtin_neon_vqtbl2q_v: { 4145 Int = Intrinsic::aarch64_neon_tbl2; s = "vtbl2"; break; 4146 case NEON::BI__builtin_neon_vqtbl3_v: 4147 case NEON::BI__builtin_neon_vqtbl3q_v: 4148 Int = Intrinsic::aarch64_neon_tbl3; s = "vtbl3"; break; 4149 case NEON::BI__builtin_neon_vqtbl4_v: 4150 case NEON::BI__builtin_neon_vqtbl4q_v: 4151 Int = Intrinsic::aarch64_neon_tbl4; s = "vtbl4"; break; 4152 case NEON::BI__builtin_neon_vqtbx1_v: 4153 case NEON::BI__builtin_neon_vqtbx1q_v: 4154 Int = Intrinsic::aarch64_neon_tbx1; s = "vtbx1"; break; 4155 case NEON::BI__builtin_neon_vqtbx2_v: 4156 case NEON::BI__builtin_neon_vqtbx2q_v: 4157 Int = Intrinsic::aarch64_neon_tbx2; s = "vtbx2"; break; 4158 case NEON::BI__builtin_neon_vqtbx3_v: 4159 case NEON::BI__builtin_neon_vqtbx3q_v: 4160 Int = Intrinsic::aarch64_neon_tbx3; s = "vtbx3"; break; 4161 case NEON::BI__builtin_neon_vqtbx4_v: 4162 case NEON::BI__builtin_neon_vqtbx4q_v: 4163 Int = Intrinsic::aarch64_neon_tbx4; s = "vtbx4"; break; 4164 } 4165 } 4166 4167 if (!Int) 4168 return nullptr; 4169 4170 Function *F = CGF.CGM.getIntrinsic(Int, Ty); 4171 return CGF.EmitNeonCall(F, Ops, s); 4172 } 4173 4174 Value *CodeGenFunction::vectorWrapScalar16(Value *Op) { 4175 llvm::Type *VTy = llvm::VectorType::get(Int16Ty, 4); 4176 Op = Builder.CreateBitCast(Op, Int16Ty); 4177 Value *V = UndefValue::get(VTy); 4178 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 4179 Op = Builder.CreateInsertElement(V, Op, CI); 4180 return Op; 4181 } 4182 4183 Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, 4184 const CallExpr *E) { 4185 unsigned HintID = static_cast<unsigned>(-1); 4186 switch (BuiltinID) { 4187 default: break; 4188 case AArch64::BI__builtin_arm_nop: 4189 HintID = 0; 4190 break; 4191 case AArch64::BI__builtin_arm_yield: 4192 HintID = 1; 4193 break; 4194 case AArch64::BI__builtin_arm_wfe: 4195 HintID = 2; 4196 break; 4197 case AArch64::BI__builtin_arm_wfi: 4198 HintID = 3; 4199 break; 4200 case AArch64::BI__builtin_arm_sev: 4201 HintID = 4; 4202 break; 4203 case AArch64::BI__builtin_arm_sevl: 4204 HintID = 5; 4205 break; 4206 } 4207 4208 if (HintID != static_cast<unsigned>(-1)) { 4209 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_hint); 4210 return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID)); 4211 } 4212 4213 if (BuiltinID == AArch64::BI__builtin_arm_prefetch) { 4214 Value *Address = EmitScalarExpr(E->getArg(0)); 4215 Value *RW = EmitScalarExpr(E->getArg(1)); 4216 Value *CacheLevel = EmitScalarExpr(E->getArg(2)); 4217 Value *RetentionPolicy = EmitScalarExpr(E->getArg(3)); 4218 Value *IsData = EmitScalarExpr(E->getArg(4)); 4219 4220 Value *Locality = nullptr; 4221 if (cast<llvm::ConstantInt>(RetentionPolicy)->isZero()) { 4222 // Temporal fetch, needs to convert cache level to locality. 4223 Locality = llvm::ConstantInt::get(Int32Ty, 4224 -cast<llvm::ConstantInt>(CacheLevel)->getValue() + 3); 4225 } else { 4226 // Streaming fetch. 4227 Locality = llvm::ConstantInt::get(Int32Ty, 0); 4228 } 4229 4230 // FIXME: We need AArch64 specific LLVM intrinsic if we want to specify 4231 // PLDL3STRM or PLDL2STRM. 4232 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 4233 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 4234 } 4235 4236 if (BuiltinID == AArch64::BI__builtin_arm_rbit) { 4237 assert((getContext().getTypeSize(E->getType()) == 32) && 4238 "rbit of unusual size!"); 4239 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 4240 return Builder.CreateCall( 4241 CGM.getIntrinsic(Intrinsic::aarch64_rbit, Arg->getType()), Arg, "rbit"); 4242 } 4243 if (BuiltinID == AArch64::BI__builtin_arm_rbit64) { 4244 assert((getContext().getTypeSize(E->getType()) == 64) && 4245 "rbit of unusual size!"); 4246 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 4247 return Builder.CreateCall( 4248 CGM.getIntrinsic(Intrinsic::aarch64_rbit, Arg->getType()), Arg, "rbit"); 4249 } 4250 4251 if (BuiltinID == AArch64::BI__clear_cache) { 4252 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 4253 const FunctionDecl *FD = E->getDirectCallee(); 4254 Value *Ops[2]; 4255 for (unsigned i = 0; i < 2; i++) 4256 Ops[i] = EmitScalarExpr(E->getArg(i)); 4257 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 4258 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 4259 StringRef Name = FD->getName(); 4260 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 4261 } 4262 4263 if ((BuiltinID == AArch64::BI__builtin_arm_ldrex || 4264 BuiltinID == AArch64::BI__builtin_arm_ldaex) && 4265 getContext().getTypeSize(E->getType()) == 128) { 4266 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 4267 ? Intrinsic::aarch64_ldaxp 4268 : Intrinsic::aarch64_ldxp); 4269 4270 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 4271 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 4272 "ldxp"); 4273 4274 Value *Val0 = Builder.CreateExtractValue(Val, 1); 4275 Value *Val1 = Builder.CreateExtractValue(Val, 0); 4276 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 4277 Val0 = Builder.CreateZExt(Val0, Int128Ty); 4278 Val1 = Builder.CreateZExt(Val1, Int128Ty); 4279 4280 Value *ShiftCst = llvm::ConstantInt::get(Int128Ty, 64); 4281 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 4282 Val = Builder.CreateOr(Val, Val1); 4283 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 4284 } else if (BuiltinID == AArch64::BI__builtin_arm_ldrex || 4285 BuiltinID == AArch64::BI__builtin_arm_ldaex) { 4286 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 4287 4288 QualType Ty = E->getType(); 4289 llvm::Type *RealResTy = ConvertType(Ty); 4290 llvm::Type *IntResTy = llvm::IntegerType::get(getLLVMContext(), 4291 getContext().getTypeSize(Ty)); 4292 LoadAddr = Builder.CreateBitCast(LoadAddr, IntResTy->getPointerTo()); 4293 4294 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 4295 ? Intrinsic::aarch64_ldaxr 4296 : Intrinsic::aarch64_ldxr, 4297 LoadAddr->getType()); 4298 Value *Val = Builder.CreateCall(F, LoadAddr, "ldxr"); 4299 4300 if (RealResTy->isPointerTy()) 4301 return Builder.CreateIntToPtr(Val, RealResTy); 4302 4303 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 4304 return Builder.CreateBitCast(Val, RealResTy); 4305 } 4306 4307 if ((BuiltinID == AArch64::BI__builtin_arm_strex || 4308 BuiltinID == AArch64::BI__builtin_arm_stlex) && 4309 getContext().getTypeSize(E->getArg(0)->getType()) == 128) { 4310 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 4311 ? Intrinsic::aarch64_stlxp 4312 : Intrinsic::aarch64_stxp); 4313 llvm::Type *STy = llvm::StructType::get(Int64Ty, Int64Ty, nullptr); 4314 4315 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 4316 EmitAnyExprToMem(E->getArg(0), Tmp, Qualifiers(), /*init*/ true); 4317 4318 Tmp = Builder.CreateBitCast(Tmp, llvm::PointerType::getUnqual(STy)); 4319 llvm::Value *Val = Builder.CreateLoad(Tmp); 4320 4321 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 4322 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 4323 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), 4324 Int8PtrTy); 4325 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "stxp"); 4326 } 4327 4328 if (BuiltinID == AArch64::BI__builtin_arm_strex || 4329 BuiltinID == AArch64::BI__builtin_arm_stlex) { 4330 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 4331 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 4332 4333 QualType Ty = E->getArg(0)->getType(); 4334 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 4335 getContext().getTypeSize(Ty)); 4336 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 4337 4338 if (StoreVal->getType()->isPointerTy()) 4339 StoreVal = Builder.CreatePtrToInt(StoreVal, Int64Ty); 4340 else { 4341 StoreVal = Builder.CreateBitCast(StoreVal, StoreTy); 4342 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int64Ty); 4343 } 4344 4345 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 4346 ? Intrinsic::aarch64_stlxr 4347 : Intrinsic::aarch64_stxr, 4348 StoreAddr->getType()); 4349 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "stxr"); 4350 } 4351 4352 if (BuiltinID == AArch64::BI__builtin_arm_clrex) { 4353 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_clrex); 4354 return Builder.CreateCall(F); 4355 } 4356 4357 if (BuiltinID == AArch64::BI__builtin_thread_pointer) { 4358 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_thread_pointer); 4359 return Builder.CreateCall(F); 4360 } 4361 4362 // CRC32 4363 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 4364 switch (BuiltinID) { 4365 case AArch64::BI__builtin_arm_crc32b: 4366 CRCIntrinsicID = Intrinsic::aarch64_crc32b; break; 4367 case AArch64::BI__builtin_arm_crc32cb: 4368 CRCIntrinsicID = Intrinsic::aarch64_crc32cb; break; 4369 case AArch64::BI__builtin_arm_crc32h: 4370 CRCIntrinsicID = Intrinsic::aarch64_crc32h; break; 4371 case AArch64::BI__builtin_arm_crc32ch: 4372 CRCIntrinsicID = Intrinsic::aarch64_crc32ch; break; 4373 case AArch64::BI__builtin_arm_crc32w: 4374 CRCIntrinsicID = Intrinsic::aarch64_crc32w; break; 4375 case AArch64::BI__builtin_arm_crc32cw: 4376 CRCIntrinsicID = Intrinsic::aarch64_crc32cw; break; 4377 case AArch64::BI__builtin_arm_crc32d: 4378 CRCIntrinsicID = Intrinsic::aarch64_crc32x; break; 4379 case AArch64::BI__builtin_arm_crc32cd: 4380 CRCIntrinsicID = Intrinsic::aarch64_crc32cx; break; 4381 } 4382 4383 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 4384 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 4385 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 4386 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 4387 4388 llvm::Type *DataTy = F->getFunctionType()->getParamType(1); 4389 Arg1 = Builder.CreateZExtOrBitCast(Arg1, DataTy); 4390 4391 return Builder.CreateCall(F, {Arg0, Arg1}); 4392 } 4393 4394 if (BuiltinID == AArch64::BI__builtin_arm_rsr || 4395 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 4396 BuiltinID == AArch64::BI__builtin_arm_rsrp || 4397 BuiltinID == AArch64::BI__builtin_arm_wsr || 4398 BuiltinID == AArch64::BI__builtin_arm_wsr64 || 4399 BuiltinID == AArch64::BI__builtin_arm_wsrp) { 4400 4401 bool IsRead = BuiltinID == AArch64::BI__builtin_arm_rsr || 4402 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 4403 BuiltinID == AArch64::BI__builtin_arm_rsrp; 4404 4405 bool IsPointerBuiltin = BuiltinID == AArch64::BI__builtin_arm_rsrp || 4406 BuiltinID == AArch64::BI__builtin_arm_wsrp; 4407 4408 bool Is64Bit = BuiltinID != AArch64::BI__builtin_arm_rsr && 4409 BuiltinID != AArch64::BI__builtin_arm_wsr; 4410 4411 llvm::Type *ValueType; 4412 llvm::Type *RegisterType = Int64Ty; 4413 if (IsPointerBuiltin) { 4414 ValueType = VoidPtrTy; 4415 } else if (Is64Bit) { 4416 ValueType = Int64Ty; 4417 } else { 4418 ValueType = Int32Ty; 4419 } 4420 4421 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 4422 } 4423 4424 // Find out if any arguments are required to be integer constant 4425 // expressions. 4426 unsigned ICEArguments = 0; 4427 ASTContext::GetBuiltinTypeError Error; 4428 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 4429 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 4430 4431 llvm::SmallVector<Value*, 4> Ops; 4432 for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; i++) { 4433 if ((ICEArguments & (1 << i)) == 0) { 4434 Ops.push_back(EmitScalarExpr(E->getArg(i))); 4435 } else { 4436 // If this is required to be a constant, constant fold it so that we know 4437 // that the generated intrinsic gets a ConstantInt. 4438 llvm::APSInt Result; 4439 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 4440 assert(IsConst && "Constant arg isn't actually constant?"); 4441 (void)IsConst; 4442 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 4443 } 4444 } 4445 4446 auto SISDMap = makeArrayRef(AArch64SISDIntrinsicMap); 4447 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 4448 SISDMap, BuiltinID, AArch64SISDIntrinsicsProvenSorted); 4449 4450 if (Builtin) { 4451 Ops.push_back(EmitScalarExpr(E->getArg(E->getNumArgs() - 1))); 4452 Value *Result = EmitCommonNeonSISDBuiltinExpr(*this, *Builtin, Ops, E); 4453 assert(Result && "SISD intrinsic should have been handled"); 4454 return Result; 4455 } 4456 4457 llvm::APSInt Result; 4458 const Expr *Arg = E->getArg(E->getNumArgs()-1); 4459 NeonTypeFlags Type(0); 4460 if (Arg->isIntegerConstantExpr(Result, getContext())) 4461 // Determine the type of this overloaded NEON intrinsic. 4462 Type = NeonTypeFlags(Result.getZExtValue()); 4463 4464 bool usgn = Type.isUnsigned(); 4465 bool quad = Type.isQuad(); 4466 4467 // Handle non-overloaded intrinsics first. 4468 switch (BuiltinID) { 4469 default: break; 4470 case NEON::BI__builtin_neon_vldrq_p128: { 4471 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 4472 Value *Ptr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PTy); 4473 return Builder.CreateDefaultAlignedLoad(Ptr); 4474 } 4475 case NEON::BI__builtin_neon_vstrq_p128: { 4476 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 4477 Value *Ptr = Builder.CreateBitCast(Ops[0], Int128PTy); 4478 return Builder.CreateDefaultAlignedStore(EmitScalarExpr(E->getArg(1)), Ptr); 4479 } 4480 case NEON::BI__builtin_neon_vcvts_u32_f32: 4481 case NEON::BI__builtin_neon_vcvtd_u64_f64: 4482 usgn = true; 4483 // FALL THROUGH 4484 case NEON::BI__builtin_neon_vcvts_s32_f32: 4485 case NEON::BI__builtin_neon_vcvtd_s64_f64: { 4486 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4487 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 4488 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 4489 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 4490 Ops[0] = Builder.CreateBitCast(Ops[0], FTy); 4491 if (usgn) 4492 return Builder.CreateFPToUI(Ops[0], InTy); 4493 return Builder.CreateFPToSI(Ops[0], InTy); 4494 } 4495 case NEON::BI__builtin_neon_vcvts_f32_u32: 4496 case NEON::BI__builtin_neon_vcvtd_f64_u64: 4497 usgn = true; 4498 // FALL THROUGH 4499 case NEON::BI__builtin_neon_vcvts_f32_s32: 4500 case NEON::BI__builtin_neon_vcvtd_f64_s64: { 4501 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4502 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 4503 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 4504 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 4505 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 4506 if (usgn) 4507 return Builder.CreateUIToFP(Ops[0], FTy); 4508 return Builder.CreateSIToFP(Ops[0], FTy); 4509 } 4510 case NEON::BI__builtin_neon_vpaddd_s64: { 4511 llvm::Type *Ty = llvm::VectorType::get(Int64Ty, 2); 4512 Value *Vec = EmitScalarExpr(E->getArg(0)); 4513 // The vector is v2f64, so make sure it's bitcast to that. 4514 Vec = Builder.CreateBitCast(Vec, Ty, "v2i64"); 4515 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 4516 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 4517 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 4518 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 4519 // Pairwise addition of a v2f64 into a scalar f64. 4520 return Builder.CreateAdd(Op0, Op1, "vpaddd"); 4521 } 4522 case NEON::BI__builtin_neon_vpaddd_f64: { 4523 llvm::Type *Ty = 4524 llvm::VectorType::get(DoubleTy, 2); 4525 Value *Vec = EmitScalarExpr(E->getArg(0)); 4526 // The vector is v2f64, so make sure it's bitcast to that. 4527 Vec = Builder.CreateBitCast(Vec, Ty, "v2f64"); 4528 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 4529 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 4530 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 4531 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 4532 // Pairwise addition of a v2f64 into a scalar f64. 4533 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 4534 } 4535 case NEON::BI__builtin_neon_vpadds_f32: { 4536 llvm::Type *Ty = 4537 llvm::VectorType::get(FloatTy, 2); 4538 Value *Vec = EmitScalarExpr(E->getArg(0)); 4539 // The vector is v2f32, so make sure it's bitcast to that. 4540 Vec = Builder.CreateBitCast(Vec, Ty, "v2f32"); 4541 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 4542 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 4543 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 4544 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 4545 // Pairwise addition of a v2f32 into a scalar f32. 4546 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 4547 } 4548 case NEON::BI__builtin_neon_vceqzd_s64: 4549 case NEON::BI__builtin_neon_vceqzd_f64: 4550 case NEON::BI__builtin_neon_vceqzs_f32: 4551 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4552 return EmitAArch64CompareBuiltinExpr( 4553 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4554 ICmpInst::FCMP_OEQ, ICmpInst::ICMP_EQ, "vceqz"); 4555 case NEON::BI__builtin_neon_vcgezd_s64: 4556 case NEON::BI__builtin_neon_vcgezd_f64: 4557 case NEON::BI__builtin_neon_vcgezs_f32: 4558 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4559 return EmitAArch64CompareBuiltinExpr( 4560 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4561 ICmpInst::FCMP_OGE, ICmpInst::ICMP_SGE, "vcgez"); 4562 case NEON::BI__builtin_neon_vclezd_s64: 4563 case NEON::BI__builtin_neon_vclezd_f64: 4564 case NEON::BI__builtin_neon_vclezs_f32: 4565 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4566 return EmitAArch64CompareBuiltinExpr( 4567 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4568 ICmpInst::FCMP_OLE, ICmpInst::ICMP_SLE, "vclez"); 4569 case NEON::BI__builtin_neon_vcgtzd_s64: 4570 case NEON::BI__builtin_neon_vcgtzd_f64: 4571 case NEON::BI__builtin_neon_vcgtzs_f32: 4572 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4573 return EmitAArch64CompareBuiltinExpr( 4574 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4575 ICmpInst::FCMP_OGT, ICmpInst::ICMP_SGT, "vcgtz"); 4576 case NEON::BI__builtin_neon_vcltzd_s64: 4577 case NEON::BI__builtin_neon_vcltzd_f64: 4578 case NEON::BI__builtin_neon_vcltzs_f32: 4579 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4580 return EmitAArch64CompareBuiltinExpr( 4581 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4582 ICmpInst::FCMP_OLT, ICmpInst::ICMP_SLT, "vcltz"); 4583 4584 case NEON::BI__builtin_neon_vceqzd_u64: { 4585 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4586 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 4587 Ops[0] = 4588 Builder.CreateICmpEQ(Ops[0], llvm::Constant::getNullValue(Int64Ty)); 4589 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqzd"); 4590 } 4591 case NEON::BI__builtin_neon_vceqd_f64: 4592 case NEON::BI__builtin_neon_vcled_f64: 4593 case NEON::BI__builtin_neon_vcltd_f64: 4594 case NEON::BI__builtin_neon_vcged_f64: 4595 case NEON::BI__builtin_neon_vcgtd_f64: { 4596 llvm::CmpInst::Predicate P; 4597 switch (BuiltinID) { 4598 default: llvm_unreachable("missing builtin ID in switch!"); 4599 case NEON::BI__builtin_neon_vceqd_f64: P = llvm::FCmpInst::FCMP_OEQ; break; 4600 case NEON::BI__builtin_neon_vcled_f64: P = llvm::FCmpInst::FCMP_OLE; break; 4601 case NEON::BI__builtin_neon_vcltd_f64: P = llvm::FCmpInst::FCMP_OLT; break; 4602 case NEON::BI__builtin_neon_vcged_f64: P = llvm::FCmpInst::FCMP_OGE; break; 4603 case NEON::BI__builtin_neon_vcgtd_f64: P = llvm::FCmpInst::FCMP_OGT; break; 4604 } 4605 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4606 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 4607 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 4608 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 4609 return Builder.CreateSExt(Ops[0], Int64Ty, "vcmpd"); 4610 } 4611 case NEON::BI__builtin_neon_vceqs_f32: 4612 case NEON::BI__builtin_neon_vcles_f32: 4613 case NEON::BI__builtin_neon_vclts_f32: 4614 case NEON::BI__builtin_neon_vcges_f32: 4615 case NEON::BI__builtin_neon_vcgts_f32: { 4616 llvm::CmpInst::Predicate P; 4617 switch (BuiltinID) { 4618 default: llvm_unreachable("missing builtin ID in switch!"); 4619 case NEON::BI__builtin_neon_vceqs_f32: P = llvm::FCmpInst::FCMP_OEQ; break; 4620 case NEON::BI__builtin_neon_vcles_f32: P = llvm::FCmpInst::FCMP_OLE; break; 4621 case NEON::BI__builtin_neon_vclts_f32: P = llvm::FCmpInst::FCMP_OLT; break; 4622 case NEON::BI__builtin_neon_vcges_f32: P = llvm::FCmpInst::FCMP_OGE; break; 4623 case NEON::BI__builtin_neon_vcgts_f32: P = llvm::FCmpInst::FCMP_OGT; break; 4624 } 4625 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4626 Ops[0] = Builder.CreateBitCast(Ops[0], FloatTy); 4627 Ops[1] = Builder.CreateBitCast(Ops[1], FloatTy); 4628 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 4629 return Builder.CreateSExt(Ops[0], Int32Ty, "vcmpd"); 4630 } 4631 case NEON::BI__builtin_neon_vceqd_s64: 4632 case NEON::BI__builtin_neon_vceqd_u64: 4633 case NEON::BI__builtin_neon_vcgtd_s64: 4634 case NEON::BI__builtin_neon_vcgtd_u64: 4635 case NEON::BI__builtin_neon_vcltd_s64: 4636 case NEON::BI__builtin_neon_vcltd_u64: 4637 case NEON::BI__builtin_neon_vcged_u64: 4638 case NEON::BI__builtin_neon_vcged_s64: 4639 case NEON::BI__builtin_neon_vcled_u64: 4640 case NEON::BI__builtin_neon_vcled_s64: { 4641 llvm::CmpInst::Predicate P; 4642 switch (BuiltinID) { 4643 default: llvm_unreachable("missing builtin ID in switch!"); 4644 case NEON::BI__builtin_neon_vceqd_s64: 4645 case NEON::BI__builtin_neon_vceqd_u64:P = llvm::ICmpInst::ICMP_EQ;break; 4646 case NEON::BI__builtin_neon_vcgtd_s64:P = llvm::ICmpInst::ICMP_SGT;break; 4647 case NEON::BI__builtin_neon_vcgtd_u64:P = llvm::ICmpInst::ICMP_UGT;break; 4648 case NEON::BI__builtin_neon_vcltd_s64:P = llvm::ICmpInst::ICMP_SLT;break; 4649 case NEON::BI__builtin_neon_vcltd_u64:P = llvm::ICmpInst::ICMP_ULT;break; 4650 case NEON::BI__builtin_neon_vcged_u64:P = llvm::ICmpInst::ICMP_UGE;break; 4651 case NEON::BI__builtin_neon_vcged_s64:P = llvm::ICmpInst::ICMP_SGE;break; 4652 case NEON::BI__builtin_neon_vcled_u64:P = llvm::ICmpInst::ICMP_ULE;break; 4653 case NEON::BI__builtin_neon_vcled_s64:P = llvm::ICmpInst::ICMP_SLE;break; 4654 } 4655 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4656 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 4657 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 4658 Ops[0] = Builder.CreateICmp(P, Ops[0], Ops[1]); 4659 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqd"); 4660 } 4661 case NEON::BI__builtin_neon_vtstd_s64: 4662 case NEON::BI__builtin_neon_vtstd_u64: { 4663 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4664 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 4665 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 4666 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 4667 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 4668 llvm::Constant::getNullValue(Int64Ty)); 4669 return Builder.CreateSExt(Ops[0], Int64Ty, "vtstd"); 4670 } 4671 case NEON::BI__builtin_neon_vset_lane_i8: 4672 case NEON::BI__builtin_neon_vset_lane_i16: 4673 case NEON::BI__builtin_neon_vset_lane_i32: 4674 case NEON::BI__builtin_neon_vset_lane_i64: 4675 case NEON::BI__builtin_neon_vset_lane_f32: 4676 case NEON::BI__builtin_neon_vsetq_lane_i8: 4677 case NEON::BI__builtin_neon_vsetq_lane_i16: 4678 case NEON::BI__builtin_neon_vsetq_lane_i32: 4679 case NEON::BI__builtin_neon_vsetq_lane_i64: 4680 case NEON::BI__builtin_neon_vsetq_lane_f32: 4681 Ops.push_back(EmitScalarExpr(E->getArg(2))); 4682 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4683 case NEON::BI__builtin_neon_vset_lane_f64: 4684 // The vector type needs a cast for the v1f64 variant. 4685 Ops[1] = Builder.CreateBitCast(Ops[1], 4686 llvm::VectorType::get(DoubleTy, 1)); 4687 Ops.push_back(EmitScalarExpr(E->getArg(2))); 4688 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4689 case NEON::BI__builtin_neon_vsetq_lane_f64: 4690 // The vector type needs a cast for the v2f64 variant. 4691 Ops[1] = Builder.CreateBitCast(Ops[1], 4692 llvm::VectorType::get(DoubleTy, 2)); 4693 Ops.push_back(EmitScalarExpr(E->getArg(2))); 4694 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4695 4696 case NEON::BI__builtin_neon_vget_lane_i8: 4697 case NEON::BI__builtin_neon_vdupb_lane_i8: 4698 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 8)); 4699 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4700 "vget_lane"); 4701 case NEON::BI__builtin_neon_vgetq_lane_i8: 4702 case NEON::BI__builtin_neon_vdupb_laneq_i8: 4703 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 16)); 4704 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4705 "vgetq_lane"); 4706 case NEON::BI__builtin_neon_vget_lane_i16: 4707 case NEON::BI__builtin_neon_vduph_lane_i16: 4708 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 4)); 4709 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4710 "vget_lane"); 4711 case NEON::BI__builtin_neon_vgetq_lane_i16: 4712 case NEON::BI__builtin_neon_vduph_laneq_i16: 4713 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 8)); 4714 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4715 "vgetq_lane"); 4716 case NEON::BI__builtin_neon_vget_lane_i32: 4717 case NEON::BI__builtin_neon_vdups_lane_i32: 4718 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 2)); 4719 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4720 "vget_lane"); 4721 case NEON::BI__builtin_neon_vdups_lane_f32: 4722 Ops[0] = Builder.CreateBitCast(Ops[0], 4723 llvm::VectorType::get(FloatTy, 2)); 4724 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4725 "vdups_lane"); 4726 case NEON::BI__builtin_neon_vgetq_lane_i32: 4727 case NEON::BI__builtin_neon_vdups_laneq_i32: 4728 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 4729 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4730 "vgetq_lane"); 4731 case NEON::BI__builtin_neon_vget_lane_i64: 4732 case NEON::BI__builtin_neon_vdupd_lane_i64: 4733 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 1)); 4734 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4735 "vget_lane"); 4736 case NEON::BI__builtin_neon_vdupd_lane_f64: 4737 Ops[0] = Builder.CreateBitCast(Ops[0], 4738 llvm::VectorType::get(DoubleTy, 1)); 4739 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4740 "vdupd_lane"); 4741 case NEON::BI__builtin_neon_vgetq_lane_i64: 4742 case NEON::BI__builtin_neon_vdupd_laneq_i64: 4743 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 4744 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4745 "vgetq_lane"); 4746 case NEON::BI__builtin_neon_vget_lane_f32: 4747 Ops[0] = Builder.CreateBitCast(Ops[0], 4748 llvm::VectorType::get(FloatTy, 2)); 4749 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4750 "vget_lane"); 4751 case NEON::BI__builtin_neon_vget_lane_f64: 4752 Ops[0] = Builder.CreateBitCast(Ops[0], 4753 llvm::VectorType::get(DoubleTy, 1)); 4754 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4755 "vget_lane"); 4756 case NEON::BI__builtin_neon_vgetq_lane_f32: 4757 case NEON::BI__builtin_neon_vdups_laneq_f32: 4758 Ops[0] = Builder.CreateBitCast(Ops[0], 4759 llvm::VectorType::get(FloatTy, 4)); 4760 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4761 "vgetq_lane"); 4762 case NEON::BI__builtin_neon_vgetq_lane_f64: 4763 case NEON::BI__builtin_neon_vdupd_laneq_f64: 4764 Ops[0] = Builder.CreateBitCast(Ops[0], 4765 llvm::VectorType::get(DoubleTy, 2)); 4766 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4767 "vgetq_lane"); 4768 case NEON::BI__builtin_neon_vaddd_s64: 4769 case NEON::BI__builtin_neon_vaddd_u64: 4770 return Builder.CreateAdd(Ops[0], EmitScalarExpr(E->getArg(1)), "vaddd"); 4771 case NEON::BI__builtin_neon_vsubd_s64: 4772 case NEON::BI__builtin_neon_vsubd_u64: 4773 return Builder.CreateSub(Ops[0], EmitScalarExpr(E->getArg(1)), "vsubd"); 4774 case NEON::BI__builtin_neon_vqdmlalh_s16: 4775 case NEON::BI__builtin_neon_vqdmlslh_s16: { 4776 SmallVector<Value *, 2> ProductOps; 4777 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 4778 ProductOps.push_back(vectorWrapScalar16(EmitScalarExpr(E->getArg(2)))); 4779 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 4780 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 4781 ProductOps, "vqdmlXl"); 4782 Constant *CI = ConstantInt::get(SizeTy, 0); 4783 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 4784 4785 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlalh_s16 4786 ? Intrinsic::aarch64_neon_sqadd 4787 : Intrinsic::aarch64_neon_sqsub; 4788 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int32Ty), Ops, "vqdmlXl"); 4789 } 4790 case NEON::BI__builtin_neon_vqshlud_n_s64: { 4791 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4792 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 4793 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqshlu, Int64Ty), 4794 Ops, "vqshlu_n"); 4795 } 4796 case NEON::BI__builtin_neon_vqshld_n_u64: 4797 case NEON::BI__builtin_neon_vqshld_n_s64: { 4798 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vqshld_n_u64 4799 ? Intrinsic::aarch64_neon_uqshl 4800 : Intrinsic::aarch64_neon_sqshl; 4801 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4802 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 4803 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vqshl_n"); 4804 } 4805 case NEON::BI__builtin_neon_vrshrd_n_u64: 4806 case NEON::BI__builtin_neon_vrshrd_n_s64: { 4807 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrshrd_n_u64 4808 ? Intrinsic::aarch64_neon_urshl 4809 : Intrinsic::aarch64_neon_srshl; 4810 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4811 int SV = cast<ConstantInt>(Ops[1])->getSExtValue(); 4812 Ops[1] = ConstantInt::get(Int64Ty, -SV); 4813 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vrshr_n"); 4814 } 4815 case NEON::BI__builtin_neon_vrsrad_n_u64: 4816 case NEON::BI__builtin_neon_vrsrad_n_s64: { 4817 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrsrad_n_u64 4818 ? Intrinsic::aarch64_neon_urshl 4819 : Intrinsic::aarch64_neon_srshl; 4820 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 4821 Ops.push_back(Builder.CreateNeg(EmitScalarExpr(E->getArg(2)))); 4822 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Int64Ty), 4823 {Ops[1], Builder.CreateSExt(Ops[2], Int64Ty)}); 4824 return Builder.CreateAdd(Ops[0], Builder.CreateBitCast(Ops[1], Int64Ty)); 4825 } 4826 case NEON::BI__builtin_neon_vshld_n_s64: 4827 case NEON::BI__builtin_neon_vshld_n_u64: { 4828 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 4829 return Builder.CreateShl( 4830 Ops[0], ConstantInt::get(Int64Ty, Amt->getZExtValue()), "shld_n"); 4831 } 4832 case NEON::BI__builtin_neon_vshrd_n_s64: { 4833 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 4834 return Builder.CreateAShr( 4835 Ops[0], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 4836 Amt->getZExtValue())), 4837 "shrd_n"); 4838 } 4839 case NEON::BI__builtin_neon_vshrd_n_u64: { 4840 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 4841 uint64_t ShiftAmt = Amt->getZExtValue(); 4842 // Right-shifting an unsigned value by its size yields 0. 4843 if (ShiftAmt == 64) 4844 return ConstantInt::get(Int64Ty, 0); 4845 return Builder.CreateLShr(Ops[0], ConstantInt::get(Int64Ty, ShiftAmt), 4846 "shrd_n"); 4847 } 4848 case NEON::BI__builtin_neon_vsrad_n_s64: { 4849 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 4850 Ops[1] = Builder.CreateAShr( 4851 Ops[1], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 4852 Amt->getZExtValue())), 4853 "shrd_n"); 4854 return Builder.CreateAdd(Ops[0], Ops[1]); 4855 } 4856 case NEON::BI__builtin_neon_vsrad_n_u64: { 4857 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 4858 uint64_t ShiftAmt = Amt->getZExtValue(); 4859 // Right-shifting an unsigned value by its size yields 0. 4860 // As Op + 0 = Op, return Ops[0] directly. 4861 if (ShiftAmt == 64) 4862 return Ops[0]; 4863 Ops[1] = Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, ShiftAmt), 4864 "shrd_n"); 4865 return Builder.CreateAdd(Ops[0], Ops[1]); 4866 } 4867 case NEON::BI__builtin_neon_vqdmlalh_lane_s16: 4868 case NEON::BI__builtin_neon_vqdmlalh_laneq_s16: 4869 case NEON::BI__builtin_neon_vqdmlslh_lane_s16: 4870 case NEON::BI__builtin_neon_vqdmlslh_laneq_s16: { 4871 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 4872 "lane"); 4873 SmallVector<Value *, 2> ProductOps; 4874 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 4875 ProductOps.push_back(vectorWrapScalar16(Ops[2])); 4876 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 4877 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 4878 ProductOps, "vqdmlXl"); 4879 Constant *CI = ConstantInt::get(SizeTy, 0); 4880 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 4881 Ops.pop_back(); 4882 4883 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlalh_lane_s16 || 4884 BuiltinID == NEON::BI__builtin_neon_vqdmlalh_laneq_s16) 4885 ? Intrinsic::aarch64_neon_sqadd 4886 : Intrinsic::aarch64_neon_sqsub; 4887 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int32Ty), Ops, "vqdmlXl"); 4888 } 4889 case NEON::BI__builtin_neon_vqdmlals_s32: 4890 case NEON::BI__builtin_neon_vqdmlsls_s32: { 4891 SmallVector<Value *, 2> ProductOps; 4892 ProductOps.push_back(Ops[1]); 4893 ProductOps.push_back(EmitScalarExpr(E->getArg(2))); 4894 Ops[1] = 4895 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 4896 ProductOps, "vqdmlXl"); 4897 4898 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlals_s32 4899 ? Intrinsic::aarch64_neon_sqadd 4900 : Intrinsic::aarch64_neon_sqsub; 4901 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int64Ty), Ops, "vqdmlXl"); 4902 } 4903 case NEON::BI__builtin_neon_vqdmlals_lane_s32: 4904 case NEON::BI__builtin_neon_vqdmlals_laneq_s32: 4905 case NEON::BI__builtin_neon_vqdmlsls_lane_s32: 4906 case NEON::BI__builtin_neon_vqdmlsls_laneq_s32: { 4907 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 4908 "lane"); 4909 SmallVector<Value *, 2> ProductOps; 4910 ProductOps.push_back(Ops[1]); 4911 ProductOps.push_back(Ops[2]); 4912 Ops[1] = 4913 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 4914 ProductOps, "vqdmlXl"); 4915 Ops.pop_back(); 4916 4917 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlals_lane_s32 || 4918 BuiltinID == NEON::BI__builtin_neon_vqdmlals_laneq_s32) 4919 ? Intrinsic::aarch64_neon_sqadd 4920 : Intrinsic::aarch64_neon_sqsub; 4921 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl"); 4922 } 4923 } 4924 4925 llvm::VectorType *VTy = GetNeonType(this, Type); 4926 llvm::Type *Ty = VTy; 4927 if (!Ty) 4928 return nullptr; 4929 4930 // Not all intrinsics handled by the common case work for AArch64 yet, so only 4931 // defer to common code if it's been added to our special map. 4932 Builtin = findNeonIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID, 4933 AArch64SIMDIntrinsicsProvenSorted); 4934 4935 if (Builtin) 4936 return EmitCommonNeonBuiltinExpr( 4937 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 4938 Builtin->NameHint, Builtin->TypeModifier, E, Ops, 4939 /*never use addresses*/ Address::invalid(), Address::invalid()); 4940 4941 if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops)) 4942 return V; 4943 4944 unsigned Int; 4945 switch (BuiltinID) { 4946 default: return nullptr; 4947 case NEON::BI__builtin_neon_vbsl_v: 4948 case NEON::BI__builtin_neon_vbslq_v: { 4949 llvm::Type *BitTy = llvm::VectorType::getInteger(VTy); 4950 Ops[0] = Builder.CreateBitCast(Ops[0], BitTy, "vbsl"); 4951 Ops[1] = Builder.CreateBitCast(Ops[1], BitTy, "vbsl"); 4952 Ops[2] = Builder.CreateBitCast(Ops[2], BitTy, "vbsl"); 4953 4954 Ops[1] = Builder.CreateAnd(Ops[0], Ops[1], "vbsl"); 4955 Ops[2] = Builder.CreateAnd(Builder.CreateNot(Ops[0]), Ops[2], "vbsl"); 4956 Ops[0] = Builder.CreateOr(Ops[1], Ops[2], "vbsl"); 4957 return Builder.CreateBitCast(Ops[0], Ty); 4958 } 4959 case NEON::BI__builtin_neon_vfma_lane_v: 4960 case NEON::BI__builtin_neon_vfmaq_lane_v: { // Only used for FP types 4961 // The ARM builtins (and instructions) have the addend as the first 4962 // operand, but the 'fma' intrinsics have it last. Swap it around here. 4963 Value *Addend = Ops[0]; 4964 Value *Multiplicand = Ops[1]; 4965 Value *LaneSource = Ops[2]; 4966 Ops[0] = Multiplicand; 4967 Ops[1] = LaneSource; 4968 Ops[2] = Addend; 4969 4970 // Now adjust things to handle the lane access. 4971 llvm::Type *SourceTy = BuiltinID == NEON::BI__builtin_neon_vfmaq_lane_v ? 4972 llvm::VectorType::get(VTy->getElementType(), VTy->getNumElements() / 2) : 4973 VTy; 4974 llvm::Constant *cst = cast<Constant>(Ops[3]); 4975 Value *SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), cst); 4976 Ops[1] = Builder.CreateBitCast(Ops[1], SourceTy); 4977 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV, "lane"); 4978 4979 Ops.pop_back(); 4980 Int = Intrinsic::fma; 4981 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmla"); 4982 } 4983 case NEON::BI__builtin_neon_vfma_laneq_v: { 4984 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 4985 // v1f64 fma should be mapped to Neon scalar f64 fma 4986 if (VTy && VTy->getElementType() == DoubleTy) { 4987 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 4988 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 4989 llvm::Type *VTy = GetNeonType(this, 4990 NeonTypeFlags(NeonTypeFlags::Float64, false, true)); 4991 Ops[2] = Builder.CreateBitCast(Ops[2], VTy); 4992 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 4993 Value *F = CGM.getIntrinsic(Intrinsic::fma, DoubleTy); 4994 Value *Result = Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 4995 return Builder.CreateBitCast(Result, Ty); 4996 } 4997 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 4998 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4999 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5000 5001 llvm::Type *STy = llvm::VectorType::get(VTy->getElementType(), 5002 VTy->getNumElements() * 2); 5003 Ops[2] = Builder.CreateBitCast(Ops[2], STy); 5004 Value* SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), 5005 cast<ConstantInt>(Ops[3])); 5006 Ops[2] = Builder.CreateShuffleVector(Ops[2], Ops[2], SV, "lane"); 5007 5008 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 5009 } 5010 case NEON::BI__builtin_neon_vfmaq_laneq_v: { 5011 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5012 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5013 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5014 5015 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5016 Ops[2] = EmitNeonSplat(Ops[2], cast<ConstantInt>(Ops[3])); 5017 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 5018 } 5019 case NEON::BI__builtin_neon_vfmas_lane_f32: 5020 case NEON::BI__builtin_neon_vfmas_laneq_f32: 5021 case NEON::BI__builtin_neon_vfmad_lane_f64: 5022 case NEON::BI__builtin_neon_vfmad_laneq_f64: { 5023 Ops.push_back(EmitScalarExpr(E->getArg(3))); 5024 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 5025 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5026 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 5027 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 5028 } 5029 case NEON::BI__builtin_neon_vfms_v: 5030 case NEON::BI__builtin_neon_vfmsq_v: { // Only used for FP types 5031 // FIXME: probably remove when we no longer support aarch64_simd.h 5032 // (arm_neon.h delegates to vfma). 5033 5034 // The ARM builtins (and instructions) have the addend as the first 5035 // operand, but the 'fma' intrinsics have it last. Swap it around here. 5036 Value *Subtrahend = Ops[0]; 5037 Value *Multiplicand = Ops[2]; 5038 Ops[0] = Multiplicand; 5039 Ops[2] = Subtrahend; 5040 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 5041 Ops[1] = Builder.CreateFNeg(Ops[1]); 5042 Int = Intrinsic::fma; 5043 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmls"); 5044 } 5045 case NEON::BI__builtin_neon_vmull_v: 5046 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5047 Int = usgn ? Intrinsic::aarch64_neon_umull : Intrinsic::aarch64_neon_smull; 5048 if (Type.isPoly()) Int = Intrinsic::aarch64_neon_pmull; 5049 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 5050 case NEON::BI__builtin_neon_vmax_v: 5051 case NEON::BI__builtin_neon_vmaxq_v: 5052 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5053 Int = usgn ? Intrinsic::aarch64_neon_umax : Intrinsic::aarch64_neon_smax; 5054 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmax; 5055 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmax"); 5056 case NEON::BI__builtin_neon_vmin_v: 5057 case NEON::BI__builtin_neon_vminq_v: 5058 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5059 Int = usgn ? Intrinsic::aarch64_neon_umin : Intrinsic::aarch64_neon_smin; 5060 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmin; 5061 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmin"); 5062 case NEON::BI__builtin_neon_vabd_v: 5063 case NEON::BI__builtin_neon_vabdq_v: 5064 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5065 Int = usgn ? Intrinsic::aarch64_neon_uabd : Intrinsic::aarch64_neon_sabd; 5066 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fabd; 5067 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vabd"); 5068 case NEON::BI__builtin_neon_vpadal_v: 5069 case NEON::BI__builtin_neon_vpadalq_v: { 5070 unsigned ArgElts = VTy->getNumElements(); 5071 llvm::IntegerType *EltTy = cast<IntegerType>(VTy->getElementType()); 5072 unsigned BitWidth = EltTy->getBitWidth(); 5073 llvm::Type *ArgTy = llvm::VectorType::get( 5074 llvm::IntegerType::get(getLLVMContext(), BitWidth/2), 2*ArgElts); 5075 llvm::Type* Tys[2] = { VTy, ArgTy }; 5076 Int = usgn ? Intrinsic::aarch64_neon_uaddlp : Intrinsic::aarch64_neon_saddlp; 5077 SmallVector<llvm::Value*, 1> TmpOps; 5078 TmpOps.push_back(Ops[1]); 5079 Function *F = CGM.getIntrinsic(Int, Tys); 5080 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vpadal"); 5081 llvm::Value *addend = Builder.CreateBitCast(Ops[0], tmp->getType()); 5082 return Builder.CreateAdd(tmp, addend); 5083 } 5084 case NEON::BI__builtin_neon_vpmin_v: 5085 case NEON::BI__builtin_neon_vpminq_v: 5086 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5087 Int = usgn ? Intrinsic::aarch64_neon_uminp : Intrinsic::aarch64_neon_sminp; 5088 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fminp; 5089 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmin"); 5090 case NEON::BI__builtin_neon_vpmax_v: 5091 case NEON::BI__builtin_neon_vpmaxq_v: 5092 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5093 Int = usgn ? Intrinsic::aarch64_neon_umaxp : Intrinsic::aarch64_neon_smaxp; 5094 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmaxp; 5095 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmax"); 5096 case NEON::BI__builtin_neon_vminnm_v: 5097 case NEON::BI__builtin_neon_vminnmq_v: 5098 Int = Intrinsic::aarch64_neon_fminnm; 5099 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vminnm"); 5100 case NEON::BI__builtin_neon_vmaxnm_v: 5101 case NEON::BI__builtin_neon_vmaxnmq_v: 5102 Int = Intrinsic::aarch64_neon_fmaxnm; 5103 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmaxnm"); 5104 case NEON::BI__builtin_neon_vrecpss_f32: { 5105 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5106 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, FloatTy), 5107 Ops, "vrecps"); 5108 } 5109 case NEON::BI__builtin_neon_vrecpsd_f64: { 5110 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5111 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, DoubleTy), 5112 Ops, "vrecps"); 5113 } 5114 case NEON::BI__builtin_neon_vqshrun_n_v: 5115 Int = Intrinsic::aarch64_neon_sqshrun; 5116 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrun_n"); 5117 case NEON::BI__builtin_neon_vqrshrun_n_v: 5118 Int = Intrinsic::aarch64_neon_sqrshrun; 5119 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrun_n"); 5120 case NEON::BI__builtin_neon_vqshrn_n_v: 5121 Int = usgn ? Intrinsic::aarch64_neon_uqshrn : Intrinsic::aarch64_neon_sqshrn; 5122 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n"); 5123 case NEON::BI__builtin_neon_vrshrn_n_v: 5124 Int = Intrinsic::aarch64_neon_rshrn; 5125 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshrn_n"); 5126 case NEON::BI__builtin_neon_vqrshrn_n_v: 5127 Int = usgn ? Intrinsic::aarch64_neon_uqrshrn : Intrinsic::aarch64_neon_sqrshrn; 5128 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n"); 5129 case NEON::BI__builtin_neon_vrnda_v: 5130 case NEON::BI__builtin_neon_vrndaq_v: { 5131 Int = Intrinsic::round; 5132 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrnda"); 5133 } 5134 case NEON::BI__builtin_neon_vrndi_v: 5135 case NEON::BI__builtin_neon_vrndiq_v: { 5136 Int = Intrinsic::nearbyint; 5137 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndi"); 5138 } 5139 case NEON::BI__builtin_neon_vrndm_v: 5140 case NEON::BI__builtin_neon_vrndmq_v: { 5141 Int = Intrinsic::floor; 5142 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndm"); 5143 } 5144 case NEON::BI__builtin_neon_vrndn_v: 5145 case NEON::BI__builtin_neon_vrndnq_v: { 5146 Int = Intrinsic::aarch64_neon_frintn; 5147 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndn"); 5148 } 5149 case NEON::BI__builtin_neon_vrndp_v: 5150 case NEON::BI__builtin_neon_vrndpq_v: { 5151 Int = Intrinsic::ceil; 5152 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndp"); 5153 } 5154 case NEON::BI__builtin_neon_vrndx_v: 5155 case NEON::BI__builtin_neon_vrndxq_v: { 5156 Int = Intrinsic::rint; 5157 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndx"); 5158 } 5159 case NEON::BI__builtin_neon_vrnd_v: 5160 case NEON::BI__builtin_neon_vrndq_v: { 5161 Int = Intrinsic::trunc; 5162 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndz"); 5163 } 5164 case NEON::BI__builtin_neon_vceqz_v: 5165 case NEON::BI__builtin_neon_vceqzq_v: 5166 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OEQ, 5167 ICmpInst::ICMP_EQ, "vceqz"); 5168 case NEON::BI__builtin_neon_vcgez_v: 5169 case NEON::BI__builtin_neon_vcgezq_v: 5170 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGE, 5171 ICmpInst::ICMP_SGE, "vcgez"); 5172 case NEON::BI__builtin_neon_vclez_v: 5173 case NEON::BI__builtin_neon_vclezq_v: 5174 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLE, 5175 ICmpInst::ICMP_SLE, "vclez"); 5176 case NEON::BI__builtin_neon_vcgtz_v: 5177 case NEON::BI__builtin_neon_vcgtzq_v: 5178 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGT, 5179 ICmpInst::ICMP_SGT, "vcgtz"); 5180 case NEON::BI__builtin_neon_vcltz_v: 5181 case NEON::BI__builtin_neon_vcltzq_v: 5182 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLT, 5183 ICmpInst::ICMP_SLT, "vcltz"); 5184 case NEON::BI__builtin_neon_vcvt_f64_v: 5185 case NEON::BI__builtin_neon_vcvtq_f64_v: 5186 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5187 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad)); 5188 return usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 5189 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 5190 case NEON::BI__builtin_neon_vcvt_f64_f32: { 5191 assert(Type.getEltType() == NeonTypeFlags::Float64 && quad && 5192 "unexpected vcvt_f64_f32 builtin"); 5193 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float32, false, false); 5194 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 5195 5196 return Builder.CreateFPExt(Ops[0], Ty, "vcvt"); 5197 } 5198 case NEON::BI__builtin_neon_vcvt_f32_f64: { 5199 assert(Type.getEltType() == NeonTypeFlags::Float32 && 5200 "unexpected vcvt_f32_f64 builtin"); 5201 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float64, false, true); 5202 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 5203 5204 return Builder.CreateFPTrunc(Ops[0], Ty, "vcvt"); 5205 } 5206 case NEON::BI__builtin_neon_vcvt_s32_v: 5207 case NEON::BI__builtin_neon_vcvt_u32_v: 5208 case NEON::BI__builtin_neon_vcvt_s64_v: 5209 case NEON::BI__builtin_neon_vcvt_u64_v: 5210 case NEON::BI__builtin_neon_vcvtq_s32_v: 5211 case NEON::BI__builtin_neon_vcvtq_u32_v: 5212 case NEON::BI__builtin_neon_vcvtq_s64_v: 5213 case NEON::BI__builtin_neon_vcvtq_u64_v: { 5214 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 5215 if (usgn) 5216 return Builder.CreateFPToUI(Ops[0], Ty); 5217 return Builder.CreateFPToSI(Ops[0], Ty); 5218 } 5219 case NEON::BI__builtin_neon_vcvta_s32_v: 5220 case NEON::BI__builtin_neon_vcvtaq_s32_v: 5221 case NEON::BI__builtin_neon_vcvta_u32_v: 5222 case NEON::BI__builtin_neon_vcvtaq_u32_v: 5223 case NEON::BI__builtin_neon_vcvta_s64_v: 5224 case NEON::BI__builtin_neon_vcvtaq_s64_v: 5225 case NEON::BI__builtin_neon_vcvta_u64_v: 5226 case NEON::BI__builtin_neon_vcvtaq_u64_v: { 5227 Int = usgn ? Intrinsic::aarch64_neon_fcvtau : Intrinsic::aarch64_neon_fcvtas; 5228 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5229 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvta"); 5230 } 5231 case NEON::BI__builtin_neon_vcvtm_s32_v: 5232 case NEON::BI__builtin_neon_vcvtmq_s32_v: 5233 case NEON::BI__builtin_neon_vcvtm_u32_v: 5234 case NEON::BI__builtin_neon_vcvtmq_u32_v: 5235 case NEON::BI__builtin_neon_vcvtm_s64_v: 5236 case NEON::BI__builtin_neon_vcvtmq_s64_v: 5237 case NEON::BI__builtin_neon_vcvtm_u64_v: 5238 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 5239 Int = usgn ? Intrinsic::aarch64_neon_fcvtmu : Intrinsic::aarch64_neon_fcvtms; 5240 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5241 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtm"); 5242 } 5243 case NEON::BI__builtin_neon_vcvtn_s32_v: 5244 case NEON::BI__builtin_neon_vcvtnq_s32_v: 5245 case NEON::BI__builtin_neon_vcvtn_u32_v: 5246 case NEON::BI__builtin_neon_vcvtnq_u32_v: 5247 case NEON::BI__builtin_neon_vcvtn_s64_v: 5248 case NEON::BI__builtin_neon_vcvtnq_s64_v: 5249 case NEON::BI__builtin_neon_vcvtn_u64_v: 5250 case NEON::BI__builtin_neon_vcvtnq_u64_v: { 5251 Int = usgn ? Intrinsic::aarch64_neon_fcvtnu : Intrinsic::aarch64_neon_fcvtns; 5252 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5253 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtn"); 5254 } 5255 case NEON::BI__builtin_neon_vcvtp_s32_v: 5256 case NEON::BI__builtin_neon_vcvtpq_s32_v: 5257 case NEON::BI__builtin_neon_vcvtp_u32_v: 5258 case NEON::BI__builtin_neon_vcvtpq_u32_v: 5259 case NEON::BI__builtin_neon_vcvtp_s64_v: 5260 case NEON::BI__builtin_neon_vcvtpq_s64_v: 5261 case NEON::BI__builtin_neon_vcvtp_u64_v: 5262 case NEON::BI__builtin_neon_vcvtpq_u64_v: { 5263 Int = usgn ? Intrinsic::aarch64_neon_fcvtpu : Intrinsic::aarch64_neon_fcvtps; 5264 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5265 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtp"); 5266 } 5267 case NEON::BI__builtin_neon_vmulx_v: 5268 case NEON::BI__builtin_neon_vmulxq_v: { 5269 Int = Intrinsic::aarch64_neon_fmulx; 5270 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmulx"); 5271 } 5272 case NEON::BI__builtin_neon_vmul_lane_v: 5273 case NEON::BI__builtin_neon_vmul_laneq_v: { 5274 // v1f64 vmul_lane should be mapped to Neon scalar mul lane 5275 bool Quad = false; 5276 if (BuiltinID == NEON::BI__builtin_neon_vmul_laneq_v) 5277 Quad = true; 5278 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5279 llvm::Type *VTy = GetNeonType(this, 5280 NeonTypeFlags(NeonTypeFlags::Float64, false, Quad)); 5281 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 5282 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 5283 Value *Result = Builder.CreateFMul(Ops[0], Ops[1]); 5284 return Builder.CreateBitCast(Result, Ty); 5285 } 5286 case NEON::BI__builtin_neon_vnegd_s64: 5287 return Builder.CreateNeg(EmitScalarExpr(E->getArg(0)), "vnegd"); 5288 case NEON::BI__builtin_neon_vpmaxnm_v: 5289 case NEON::BI__builtin_neon_vpmaxnmq_v: { 5290 Int = Intrinsic::aarch64_neon_fmaxnmp; 5291 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmaxnm"); 5292 } 5293 case NEON::BI__builtin_neon_vpminnm_v: 5294 case NEON::BI__builtin_neon_vpminnmq_v: { 5295 Int = Intrinsic::aarch64_neon_fminnmp; 5296 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpminnm"); 5297 } 5298 case NEON::BI__builtin_neon_vsqrt_v: 5299 case NEON::BI__builtin_neon_vsqrtq_v: { 5300 Int = Intrinsic::sqrt; 5301 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5302 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqrt"); 5303 } 5304 case NEON::BI__builtin_neon_vrbit_v: 5305 case NEON::BI__builtin_neon_vrbitq_v: { 5306 Int = Intrinsic::aarch64_neon_rbit; 5307 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrbit"); 5308 } 5309 case NEON::BI__builtin_neon_vaddv_u8: 5310 // FIXME: These are handled by the AArch64 scalar code. 5311 usgn = true; 5312 // FALLTHROUGH 5313 case NEON::BI__builtin_neon_vaddv_s8: { 5314 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5315 Ty = Int32Ty; 5316 VTy = llvm::VectorType::get(Int8Ty, 8); 5317 llvm::Type *Tys[2] = { Ty, VTy }; 5318 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5319 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5320 return Builder.CreateTrunc(Ops[0], Int8Ty); 5321 } 5322 case NEON::BI__builtin_neon_vaddv_u16: 5323 usgn = true; 5324 // FALLTHROUGH 5325 case NEON::BI__builtin_neon_vaddv_s16: { 5326 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5327 Ty = Int32Ty; 5328 VTy = llvm::VectorType::get(Int16Ty, 4); 5329 llvm::Type *Tys[2] = { Ty, VTy }; 5330 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5331 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5332 return Builder.CreateTrunc(Ops[0], Int16Ty); 5333 } 5334 case NEON::BI__builtin_neon_vaddvq_u8: 5335 usgn = true; 5336 // FALLTHROUGH 5337 case NEON::BI__builtin_neon_vaddvq_s8: { 5338 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5339 Ty = Int32Ty; 5340 VTy = llvm::VectorType::get(Int8Ty, 16); 5341 llvm::Type *Tys[2] = { Ty, VTy }; 5342 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5343 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5344 return Builder.CreateTrunc(Ops[0], Int8Ty); 5345 } 5346 case NEON::BI__builtin_neon_vaddvq_u16: 5347 usgn = true; 5348 // FALLTHROUGH 5349 case NEON::BI__builtin_neon_vaddvq_s16: { 5350 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5351 Ty = Int32Ty; 5352 VTy = llvm::VectorType::get(Int16Ty, 8); 5353 llvm::Type *Tys[2] = { Ty, VTy }; 5354 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5355 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5356 return Builder.CreateTrunc(Ops[0], Int16Ty); 5357 } 5358 case NEON::BI__builtin_neon_vmaxv_u8: { 5359 Int = Intrinsic::aarch64_neon_umaxv; 5360 Ty = Int32Ty; 5361 VTy = llvm::VectorType::get(Int8Ty, 8); 5362 llvm::Type *Tys[2] = { Ty, VTy }; 5363 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5364 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5365 return Builder.CreateTrunc(Ops[0], Int8Ty); 5366 } 5367 case NEON::BI__builtin_neon_vmaxv_u16: { 5368 Int = Intrinsic::aarch64_neon_umaxv; 5369 Ty = Int32Ty; 5370 VTy = llvm::VectorType::get(Int16Ty, 4); 5371 llvm::Type *Tys[2] = { Ty, VTy }; 5372 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5373 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5374 return Builder.CreateTrunc(Ops[0], Int16Ty); 5375 } 5376 case NEON::BI__builtin_neon_vmaxvq_u8: { 5377 Int = Intrinsic::aarch64_neon_umaxv; 5378 Ty = Int32Ty; 5379 VTy = llvm::VectorType::get(Int8Ty, 16); 5380 llvm::Type *Tys[2] = { Ty, VTy }; 5381 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5382 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5383 return Builder.CreateTrunc(Ops[0], Int8Ty); 5384 } 5385 case NEON::BI__builtin_neon_vmaxvq_u16: { 5386 Int = Intrinsic::aarch64_neon_umaxv; 5387 Ty = Int32Ty; 5388 VTy = llvm::VectorType::get(Int16Ty, 8); 5389 llvm::Type *Tys[2] = { Ty, VTy }; 5390 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5391 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5392 return Builder.CreateTrunc(Ops[0], Int16Ty); 5393 } 5394 case NEON::BI__builtin_neon_vmaxv_s8: { 5395 Int = Intrinsic::aarch64_neon_smaxv; 5396 Ty = Int32Ty; 5397 VTy = llvm::VectorType::get(Int8Ty, 8); 5398 llvm::Type *Tys[2] = { Ty, VTy }; 5399 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5400 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5401 return Builder.CreateTrunc(Ops[0], Int8Ty); 5402 } 5403 case NEON::BI__builtin_neon_vmaxv_s16: { 5404 Int = Intrinsic::aarch64_neon_smaxv; 5405 Ty = Int32Ty; 5406 VTy = llvm::VectorType::get(Int16Ty, 4); 5407 llvm::Type *Tys[2] = { Ty, VTy }; 5408 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5409 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5410 return Builder.CreateTrunc(Ops[0], Int16Ty); 5411 } 5412 case NEON::BI__builtin_neon_vmaxvq_s8: { 5413 Int = Intrinsic::aarch64_neon_smaxv; 5414 Ty = Int32Ty; 5415 VTy = llvm::VectorType::get(Int8Ty, 16); 5416 llvm::Type *Tys[2] = { Ty, VTy }; 5417 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5418 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5419 return Builder.CreateTrunc(Ops[0], Int8Ty); 5420 } 5421 case NEON::BI__builtin_neon_vmaxvq_s16: { 5422 Int = Intrinsic::aarch64_neon_smaxv; 5423 Ty = Int32Ty; 5424 VTy = llvm::VectorType::get(Int16Ty, 8); 5425 llvm::Type *Tys[2] = { Ty, VTy }; 5426 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5427 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5428 return Builder.CreateTrunc(Ops[0], Int16Ty); 5429 } 5430 case NEON::BI__builtin_neon_vminv_u8: { 5431 Int = Intrinsic::aarch64_neon_uminv; 5432 Ty = Int32Ty; 5433 VTy = llvm::VectorType::get(Int8Ty, 8); 5434 llvm::Type *Tys[2] = { Ty, VTy }; 5435 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5436 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5437 return Builder.CreateTrunc(Ops[0], Int8Ty); 5438 } 5439 case NEON::BI__builtin_neon_vminv_u16: { 5440 Int = Intrinsic::aarch64_neon_uminv; 5441 Ty = Int32Ty; 5442 VTy = llvm::VectorType::get(Int16Ty, 4); 5443 llvm::Type *Tys[2] = { Ty, VTy }; 5444 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5445 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5446 return Builder.CreateTrunc(Ops[0], Int16Ty); 5447 } 5448 case NEON::BI__builtin_neon_vminvq_u8: { 5449 Int = Intrinsic::aarch64_neon_uminv; 5450 Ty = Int32Ty; 5451 VTy = llvm::VectorType::get(Int8Ty, 16); 5452 llvm::Type *Tys[2] = { Ty, VTy }; 5453 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5454 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5455 return Builder.CreateTrunc(Ops[0], Int8Ty); 5456 } 5457 case NEON::BI__builtin_neon_vminvq_u16: { 5458 Int = Intrinsic::aarch64_neon_uminv; 5459 Ty = Int32Ty; 5460 VTy = llvm::VectorType::get(Int16Ty, 8); 5461 llvm::Type *Tys[2] = { Ty, VTy }; 5462 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5463 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5464 return Builder.CreateTrunc(Ops[0], Int16Ty); 5465 } 5466 case NEON::BI__builtin_neon_vminv_s8: { 5467 Int = Intrinsic::aarch64_neon_sminv; 5468 Ty = Int32Ty; 5469 VTy = llvm::VectorType::get(Int8Ty, 8); 5470 llvm::Type *Tys[2] = { Ty, VTy }; 5471 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5472 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5473 return Builder.CreateTrunc(Ops[0], Int8Ty); 5474 } 5475 case NEON::BI__builtin_neon_vminv_s16: { 5476 Int = Intrinsic::aarch64_neon_sminv; 5477 Ty = Int32Ty; 5478 VTy = llvm::VectorType::get(Int16Ty, 4); 5479 llvm::Type *Tys[2] = { Ty, VTy }; 5480 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5481 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5482 return Builder.CreateTrunc(Ops[0], Int16Ty); 5483 } 5484 case NEON::BI__builtin_neon_vminvq_s8: { 5485 Int = Intrinsic::aarch64_neon_sminv; 5486 Ty = Int32Ty; 5487 VTy = llvm::VectorType::get(Int8Ty, 16); 5488 llvm::Type *Tys[2] = { Ty, VTy }; 5489 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5490 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5491 return Builder.CreateTrunc(Ops[0], Int8Ty); 5492 } 5493 case NEON::BI__builtin_neon_vminvq_s16: { 5494 Int = Intrinsic::aarch64_neon_sminv; 5495 Ty = Int32Ty; 5496 VTy = llvm::VectorType::get(Int16Ty, 8); 5497 llvm::Type *Tys[2] = { Ty, VTy }; 5498 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5499 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5500 return Builder.CreateTrunc(Ops[0], Int16Ty); 5501 } 5502 case NEON::BI__builtin_neon_vmul_n_f64: { 5503 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5504 Value *RHS = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), DoubleTy); 5505 return Builder.CreateFMul(Ops[0], RHS); 5506 } 5507 case NEON::BI__builtin_neon_vaddlv_u8: { 5508 Int = Intrinsic::aarch64_neon_uaddlv; 5509 Ty = Int32Ty; 5510 VTy = llvm::VectorType::get(Int8Ty, 8); 5511 llvm::Type *Tys[2] = { Ty, VTy }; 5512 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5513 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5514 return Builder.CreateTrunc(Ops[0], Int16Ty); 5515 } 5516 case NEON::BI__builtin_neon_vaddlv_u16: { 5517 Int = Intrinsic::aarch64_neon_uaddlv; 5518 Ty = Int32Ty; 5519 VTy = llvm::VectorType::get(Int16Ty, 4); 5520 llvm::Type *Tys[2] = { Ty, VTy }; 5521 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5522 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5523 } 5524 case NEON::BI__builtin_neon_vaddlvq_u8: { 5525 Int = Intrinsic::aarch64_neon_uaddlv; 5526 Ty = Int32Ty; 5527 VTy = llvm::VectorType::get(Int8Ty, 16); 5528 llvm::Type *Tys[2] = { Ty, VTy }; 5529 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5530 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5531 return Builder.CreateTrunc(Ops[0], Int16Ty); 5532 } 5533 case NEON::BI__builtin_neon_vaddlvq_u16: { 5534 Int = Intrinsic::aarch64_neon_uaddlv; 5535 Ty = Int32Ty; 5536 VTy = llvm::VectorType::get(Int16Ty, 8); 5537 llvm::Type *Tys[2] = { Ty, VTy }; 5538 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5539 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5540 } 5541 case NEON::BI__builtin_neon_vaddlv_s8: { 5542 Int = Intrinsic::aarch64_neon_saddlv; 5543 Ty = Int32Ty; 5544 VTy = llvm::VectorType::get(Int8Ty, 8); 5545 llvm::Type *Tys[2] = { Ty, VTy }; 5546 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5547 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5548 return Builder.CreateTrunc(Ops[0], Int16Ty); 5549 } 5550 case NEON::BI__builtin_neon_vaddlv_s16: { 5551 Int = Intrinsic::aarch64_neon_saddlv; 5552 Ty = Int32Ty; 5553 VTy = llvm::VectorType::get(Int16Ty, 4); 5554 llvm::Type *Tys[2] = { Ty, VTy }; 5555 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5556 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5557 } 5558 case NEON::BI__builtin_neon_vaddlvq_s8: { 5559 Int = Intrinsic::aarch64_neon_saddlv; 5560 Ty = Int32Ty; 5561 VTy = llvm::VectorType::get(Int8Ty, 16); 5562 llvm::Type *Tys[2] = { Ty, VTy }; 5563 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5564 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5565 return Builder.CreateTrunc(Ops[0], Int16Ty); 5566 } 5567 case NEON::BI__builtin_neon_vaddlvq_s16: { 5568 Int = Intrinsic::aarch64_neon_saddlv; 5569 Ty = Int32Ty; 5570 VTy = llvm::VectorType::get(Int16Ty, 8); 5571 llvm::Type *Tys[2] = { Ty, VTy }; 5572 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5573 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5574 } 5575 case NEON::BI__builtin_neon_vsri_n_v: 5576 case NEON::BI__builtin_neon_vsriq_n_v: { 5577 Int = Intrinsic::aarch64_neon_vsri; 5578 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 5579 return EmitNeonCall(Intrin, Ops, "vsri_n"); 5580 } 5581 case NEON::BI__builtin_neon_vsli_n_v: 5582 case NEON::BI__builtin_neon_vsliq_n_v: { 5583 Int = Intrinsic::aarch64_neon_vsli; 5584 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 5585 return EmitNeonCall(Intrin, Ops, "vsli_n"); 5586 } 5587 case NEON::BI__builtin_neon_vsra_n_v: 5588 case NEON::BI__builtin_neon_vsraq_n_v: 5589 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5590 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 5591 return Builder.CreateAdd(Ops[0], Ops[1]); 5592 case NEON::BI__builtin_neon_vrsra_n_v: 5593 case NEON::BI__builtin_neon_vrsraq_n_v: { 5594 Int = usgn ? Intrinsic::aarch64_neon_urshl : Intrinsic::aarch64_neon_srshl; 5595 SmallVector<llvm::Value*,2> TmpOps; 5596 TmpOps.push_back(Ops[1]); 5597 TmpOps.push_back(Ops[2]); 5598 Function* F = CGM.getIntrinsic(Int, Ty); 5599 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vrshr_n", 1, true); 5600 Ops[0] = Builder.CreateBitCast(Ops[0], VTy); 5601 return Builder.CreateAdd(Ops[0], tmp); 5602 } 5603 // FIXME: Sharing loads & stores with 32-bit is complicated by the absence 5604 // of an Align parameter here. 5605 case NEON::BI__builtin_neon_vld1_x2_v: 5606 case NEON::BI__builtin_neon_vld1q_x2_v: 5607 case NEON::BI__builtin_neon_vld1_x3_v: 5608 case NEON::BI__builtin_neon_vld1q_x3_v: 5609 case NEON::BI__builtin_neon_vld1_x4_v: 5610 case NEON::BI__builtin_neon_vld1q_x4_v: { 5611 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 5612 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5613 llvm::Type *Tys[2] = { VTy, PTy }; 5614 unsigned Int; 5615 switch (BuiltinID) { 5616 case NEON::BI__builtin_neon_vld1_x2_v: 5617 case NEON::BI__builtin_neon_vld1q_x2_v: 5618 Int = Intrinsic::aarch64_neon_ld1x2; 5619 break; 5620 case NEON::BI__builtin_neon_vld1_x3_v: 5621 case NEON::BI__builtin_neon_vld1q_x3_v: 5622 Int = Intrinsic::aarch64_neon_ld1x3; 5623 break; 5624 case NEON::BI__builtin_neon_vld1_x4_v: 5625 case NEON::BI__builtin_neon_vld1q_x4_v: 5626 Int = Intrinsic::aarch64_neon_ld1x4; 5627 break; 5628 } 5629 Function *F = CGM.getIntrinsic(Int, Tys); 5630 Ops[1] = Builder.CreateCall(F, Ops[1], "vld1xN"); 5631 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5632 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5633 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5634 } 5635 case NEON::BI__builtin_neon_vst1_x2_v: 5636 case NEON::BI__builtin_neon_vst1q_x2_v: 5637 case NEON::BI__builtin_neon_vst1_x3_v: 5638 case NEON::BI__builtin_neon_vst1q_x3_v: 5639 case NEON::BI__builtin_neon_vst1_x4_v: 5640 case NEON::BI__builtin_neon_vst1q_x4_v: { 5641 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 5642 llvm::Type *Tys[2] = { VTy, PTy }; 5643 unsigned Int; 5644 switch (BuiltinID) { 5645 case NEON::BI__builtin_neon_vst1_x2_v: 5646 case NEON::BI__builtin_neon_vst1q_x2_v: 5647 Int = Intrinsic::aarch64_neon_st1x2; 5648 break; 5649 case NEON::BI__builtin_neon_vst1_x3_v: 5650 case NEON::BI__builtin_neon_vst1q_x3_v: 5651 Int = Intrinsic::aarch64_neon_st1x3; 5652 break; 5653 case NEON::BI__builtin_neon_vst1_x4_v: 5654 case NEON::BI__builtin_neon_vst1q_x4_v: 5655 Int = Intrinsic::aarch64_neon_st1x4; 5656 break; 5657 } 5658 std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end()); 5659 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 5660 } 5661 case NEON::BI__builtin_neon_vld1_v: 5662 case NEON::BI__builtin_neon_vld1q_v: 5663 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 5664 return Builder.CreateDefaultAlignedLoad(Ops[0]); 5665 case NEON::BI__builtin_neon_vst1_v: 5666 case NEON::BI__builtin_neon_vst1q_v: 5667 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 5668 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 5669 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5670 case NEON::BI__builtin_neon_vld1_lane_v: 5671 case NEON::BI__builtin_neon_vld1q_lane_v: 5672 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5673 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 5674 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5675 Ops[0] = Builder.CreateDefaultAlignedLoad(Ops[0]); 5676 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vld1_lane"); 5677 case NEON::BI__builtin_neon_vld1_dup_v: 5678 case NEON::BI__builtin_neon_vld1q_dup_v: { 5679 Value *V = UndefValue::get(Ty); 5680 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 5681 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5682 Ops[0] = Builder.CreateDefaultAlignedLoad(Ops[0]); 5683 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 5684 Ops[0] = Builder.CreateInsertElement(V, Ops[0], CI); 5685 return EmitNeonSplat(Ops[0], CI); 5686 } 5687 case NEON::BI__builtin_neon_vst1_lane_v: 5688 case NEON::BI__builtin_neon_vst1q_lane_v: 5689 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5690 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 5691 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5692 return Builder.CreateDefaultAlignedStore(Ops[1], 5693 Builder.CreateBitCast(Ops[0], Ty)); 5694 case NEON::BI__builtin_neon_vld2_v: 5695 case NEON::BI__builtin_neon_vld2q_v: { 5696 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 5697 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5698 llvm::Type *Tys[2] = { VTy, PTy }; 5699 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2, Tys); 5700 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 5701 Ops[0] = Builder.CreateBitCast(Ops[0], 5702 llvm::PointerType::getUnqual(Ops[1]->getType())); 5703 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5704 } 5705 case NEON::BI__builtin_neon_vld3_v: 5706 case NEON::BI__builtin_neon_vld3q_v: { 5707 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 5708 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5709 llvm::Type *Tys[2] = { VTy, PTy }; 5710 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3, Tys); 5711 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 5712 Ops[0] = Builder.CreateBitCast(Ops[0], 5713 llvm::PointerType::getUnqual(Ops[1]->getType())); 5714 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5715 } 5716 case NEON::BI__builtin_neon_vld4_v: 5717 case NEON::BI__builtin_neon_vld4q_v: { 5718 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 5719 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5720 llvm::Type *Tys[2] = { VTy, PTy }; 5721 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4, Tys); 5722 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 5723 Ops[0] = Builder.CreateBitCast(Ops[0], 5724 llvm::PointerType::getUnqual(Ops[1]->getType())); 5725 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5726 } 5727 case NEON::BI__builtin_neon_vld2_dup_v: 5728 case NEON::BI__builtin_neon_vld2q_dup_v: { 5729 llvm::Type *PTy = 5730 llvm::PointerType::getUnqual(VTy->getElementType()); 5731 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5732 llvm::Type *Tys[2] = { VTy, PTy }; 5733 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2r, Tys); 5734 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 5735 Ops[0] = Builder.CreateBitCast(Ops[0], 5736 llvm::PointerType::getUnqual(Ops[1]->getType())); 5737 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5738 } 5739 case NEON::BI__builtin_neon_vld3_dup_v: 5740 case NEON::BI__builtin_neon_vld3q_dup_v: { 5741 llvm::Type *PTy = 5742 llvm::PointerType::getUnqual(VTy->getElementType()); 5743 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5744 llvm::Type *Tys[2] = { VTy, PTy }; 5745 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3r, Tys); 5746 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 5747 Ops[0] = Builder.CreateBitCast(Ops[0], 5748 llvm::PointerType::getUnqual(Ops[1]->getType())); 5749 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5750 } 5751 case NEON::BI__builtin_neon_vld4_dup_v: 5752 case NEON::BI__builtin_neon_vld4q_dup_v: { 5753 llvm::Type *PTy = 5754 llvm::PointerType::getUnqual(VTy->getElementType()); 5755 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5756 llvm::Type *Tys[2] = { VTy, PTy }; 5757 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4r, Tys); 5758 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 5759 Ops[0] = Builder.CreateBitCast(Ops[0], 5760 llvm::PointerType::getUnqual(Ops[1]->getType())); 5761 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5762 } 5763 case NEON::BI__builtin_neon_vld2_lane_v: 5764 case NEON::BI__builtin_neon_vld2q_lane_v: { 5765 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 5766 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2lane, Tys); 5767 Ops.push_back(Ops[1]); 5768 Ops.erase(Ops.begin()+1); 5769 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5770 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5771 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 5772 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld2_lane"); 5773 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5774 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5775 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5776 } 5777 case NEON::BI__builtin_neon_vld3_lane_v: 5778 case NEON::BI__builtin_neon_vld3q_lane_v: { 5779 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 5780 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3lane, Tys); 5781 Ops.push_back(Ops[1]); 5782 Ops.erase(Ops.begin()+1); 5783 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5784 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5785 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 5786 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 5787 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld3_lane"); 5788 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5789 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5790 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5791 } 5792 case NEON::BI__builtin_neon_vld4_lane_v: 5793 case NEON::BI__builtin_neon_vld4q_lane_v: { 5794 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 5795 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4lane, Tys); 5796 Ops.push_back(Ops[1]); 5797 Ops.erase(Ops.begin()+1); 5798 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5799 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5800 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 5801 Ops[4] = Builder.CreateBitCast(Ops[4], Ty); 5802 Ops[5] = Builder.CreateZExt(Ops[5], Int64Ty); 5803 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld4_lane"); 5804 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5805 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5806 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5807 } 5808 case NEON::BI__builtin_neon_vst2_v: 5809 case NEON::BI__builtin_neon_vst2q_v: { 5810 Ops.push_back(Ops[0]); 5811 Ops.erase(Ops.begin()); 5812 llvm::Type *Tys[2] = { VTy, Ops[2]->getType() }; 5813 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2, Tys), 5814 Ops, ""); 5815 } 5816 case NEON::BI__builtin_neon_vst2_lane_v: 5817 case NEON::BI__builtin_neon_vst2q_lane_v: { 5818 Ops.push_back(Ops[0]); 5819 Ops.erase(Ops.begin()); 5820 Ops[2] = Builder.CreateZExt(Ops[2], Int64Ty); 5821 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 5822 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2lane, Tys), 5823 Ops, ""); 5824 } 5825 case NEON::BI__builtin_neon_vst3_v: 5826 case NEON::BI__builtin_neon_vst3q_v: { 5827 Ops.push_back(Ops[0]); 5828 Ops.erase(Ops.begin()); 5829 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 5830 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3, Tys), 5831 Ops, ""); 5832 } 5833 case NEON::BI__builtin_neon_vst3_lane_v: 5834 case NEON::BI__builtin_neon_vst3q_lane_v: { 5835 Ops.push_back(Ops[0]); 5836 Ops.erase(Ops.begin()); 5837 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 5838 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 5839 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3lane, Tys), 5840 Ops, ""); 5841 } 5842 case NEON::BI__builtin_neon_vst4_v: 5843 case NEON::BI__builtin_neon_vst4q_v: { 5844 Ops.push_back(Ops[0]); 5845 Ops.erase(Ops.begin()); 5846 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 5847 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4, Tys), 5848 Ops, ""); 5849 } 5850 case NEON::BI__builtin_neon_vst4_lane_v: 5851 case NEON::BI__builtin_neon_vst4q_lane_v: { 5852 Ops.push_back(Ops[0]); 5853 Ops.erase(Ops.begin()); 5854 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 5855 llvm::Type *Tys[2] = { VTy, Ops[5]->getType() }; 5856 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4lane, Tys), 5857 Ops, ""); 5858 } 5859 case NEON::BI__builtin_neon_vtrn_v: 5860 case NEON::BI__builtin_neon_vtrnq_v: { 5861 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 5862 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5863 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5864 Value *SV = nullptr; 5865 5866 for (unsigned vi = 0; vi != 2; ++vi) { 5867 SmallVector<Constant*, 16> Indices; 5868 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 5869 Indices.push_back(ConstantInt::get(Int32Ty, i+vi)); 5870 Indices.push_back(ConstantInt::get(Int32Ty, i+e+vi)); 5871 } 5872 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 5873 SV = llvm::ConstantVector::get(Indices); 5874 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vtrn"); 5875 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 5876 } 5877 return SV; 5878 } 5879 case NEON::BI__builtin_neon_vuzp_v: 5880 case NEON::BI__builtin_neon_vuzpq_v: { 5881 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 5882 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5883 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5884 Value *SV = nullptr; 5885 5886 for (unsigned vi = 0; vi != 2; ++vi) { 5887 SmallVector<Constant*, 16> Indices; 5888 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 5889 Indices.push_back(ConstantInt::get(Int32Ty, 2*i+vi)); 5890 5891 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 5892 SV = llvm::ConstantVector::get(Indices); 5893 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vuzp"); 5894 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 5895 } 5896 return SV; 5897 } 5898 case NEON::BI__builtin_neon_vzip_v: 5899 case NEON::BI__builtin_neon_vzipq_v: { 5900 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 5901 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5902 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5903 Value *SV = nullptr; 5904 5905 for (unsigned vi = 0; vi != 2; ++vi) { 5906 SmallVector<Constant*, 16> Indices; 5907 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 5908 Indices.push_back(ConstantInt::get(Int32Ty, (i + vi*e) >> 1)); 5909 Indices.push_back(ConstantInt::get(Int32Ty, ((i + vi*e) >> 1)+e)); 5910 } 5911 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 5912 SV = llvm::ConstantVector::get(Indices); 5913 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vzip"); 5914 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 5915 } 5916 return SV; 5917 } 5918 case NEON::BI__builtin_neon_vqtbl1q_v: { 5919 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl1, Ty), 5920 Ops, "vtbl1"); 5921 } 5922 case NEON::BI__builtin_neon_vqtbl2q_v: { 5923 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl2, Ty), 5924 Ops, "vtbl2"); 5925 } 5926 case NEON::BI__builtin_neon_vqtbl3q_v: { 5927 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl3, Ty), 5928 Ops, "vtbl3"); 5929 } 5930 case NEON::BI__builtin_neon_vqtbl4q_v: { 5931 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl4, Ty), 5932 Ops, "vtbl4"); 5933 } 5934 case NEON::BI__builtin_neon_vqtbx1q_v: { 5935 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx1, Ty), 5936 Ops, "vtbx1"); 5937 } 5938 case NEON::BI__builtin_neon_vqtbx2q_v: { 5939 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx2, Ty), 5940 Ops, "vtbx2"); 5941 } 5942 case NEON::BI__builtin_neon_vqtbx3q_v: { 5943 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx3, Ty), 5944 Ops, "vtbx3"); 5945 } 5946 case NEON::BI__builtin_neon_vqtbx4q_v: { 5947 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx4, Ty), 5948 Ops, "vtbx4"); 5949 } 5950 case NEON::BI__builtin_neon_vsqadd_v: 5951 case NEON::BI__builtin_neon_vsqaddq_v: { 5952 Int = Intrinsic::aarch64_neon_usqadd; 5953 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqadd"); 5954 } 5955 case NEON::BI__builtin_neon_vuqadd_v: 5956 case NEON::BI__builtin_neon_vuqaddq_v: { 5957 Int = Intrinsic::aarch64_neon_suqadd; 5958 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vuqadd"); 5959 } 5960 } 5961 } 5962 5963 llvm::Value *CodeGenFunction:: 5964 BuildVector(ArrayRef<llvm::Value*> Ops) { 5965 assert((Ops.size() & (Ops.size() - 1)) == 0 && 5966 "Not a power-of-two sized vector!"); 5967 bool AllConstants = true; 5968 for (unsigned i = 0, e = Ops.size(); i != e && AllConstants; ++i) 5969 AllConstants &= isa<Constant>(Ops[i]); 5970 5971 // If this is a constant vector, create a ConstantVector. 5972 if (AllConstants) { 5973 SmallVector<llvm::Constant*, 16> CstOps; 5974 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 5975 CstOps.push_back(cast<Constant>(Ops[i])); 5976 return llvm::ConstantVector::get(CstOps); 5977 } 5978 5979 // Otherwise, insertelement the values to build the vector. 5980 Value *Result = 5981 llvm::UndefValue::get(llvm::VectorType::get(Ops[0]->getType(), Ops.size())); 5982 5983 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 5984 Result = Builder.CreateInsertElement(Result, Ops[i], Builder.getInt32(i)); 5985 5986 return Result; 5987 } 5988 5989 Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, 5990 const CallExpr *E) { 5991 if (BuiltinID == X86::BI__builtin_ms_va_start || 5992 BuiltinID == X86::BI__builtin_ms_va_end) 5993 return EmitVAStartEnd(EmitMSVAListRef(E->getArg(0)).getPointer(), 5994 BuiltinID == X86::BI__builtin_ms_va_start); 5995 if (BuiltinID == X86::BI__builtin_ms_va_copy) { 5996 // Lower this manually. We can't reliably determine whether or not any 5997 // given va_copy() is for a Win64 va_list from the calling convention 5998 // alone, because it's legal to do this from a System V ABI function. 5999 // With opaque pointer types, we won't have enough information in LLVM 6000 // IR to determine this from the argument types, either. Best to do it 6001 // now, while we have enough information. 6002 Address DestAddr = EmitMSVAListRef(E->getArg(0)); 6003 Address SrcAddr = EmitMSVAListRef(E->getArg(1)); 6004 6005 llvm::Type *BPP = Int8PtrPtrTy; 6006 6007 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), BPP, "cp"), 6008 DestAddr.getAlignment()); 6009 SrcAddr = Address(Builder.CreateBitCast(SrcAddr.getPointer(), BPP, "ap"), 6010 SrcAddr.getAlignment()); 6011 6012 Value *ArgPtr = Builder.CreateLoad(SrcAddr, "ap.val"); 6013 return Builder.CreateStore(ArgPtr, DestAddr); 6014 } 6015 6016 SmallVector<Value*, 4> Ops; 6017 6018 // Find out if any arguments are required to be integer constant expressions. 6019 unsigned ICEArguments = 0; 6020 ASTContext::GetBuiltinTypeError Error; 6021 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 6022 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 6023 6024 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) { 6025 // If this is a normal argument, just emit it as a scalar. 6026 if ((ICEArguments & (1 << i)) == 0) { 6027 Ops.push_back(EmitScalarExpr(E->getArg(i))); 6028 continue; 6029 } 6030 6031 // If this is required to be a constant, constant fold it so that we know 6032 // that the generated intrinsic gets a ConstantInt. 6033 llvm::APSInt Result; 6034 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 6035 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 6036 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 6037 } 6038 6039 switch (BuiltinID) { 6040 default: return nullptr; 6041 case X86::BI__builtin_cpu_supports: { 6042 const Expr *FeatureExpr = E->getArg(0)->IgnoreParenCasts(); 6043 StringRef FeatureStr = cast<StringLiteral>(FeatureExpr)->getString(); 6044 6045 // TODO: When/if this becomes more than x86 specific then use a TargetInfo 6046 // based mapping. 6047 // Processor features and mapping to processor feature value. 6048 enum X86Features { 6049 CMOV = 0, 6050 MMX, 6051 POPCNT, 6052 SSE, 6053 SSE2, 6054 SSE3, 6055 SSSE3, 6056 SSE4_1, 6057 SSE4_2, 6058 AVX, 6059 AVX2, 6060 SSE4_A, 6061 FMA4, 6062 XOP, 6063 FMA, 6064 AVX512F, 6065 BMI, 6066 BMI2, 6067 MAX 6068 }; 6069 6070 X86Features Feature = StringSwitch<X86Features>(FeatureStr) 6071 .Case("cmov", X86Features::CMOV) 6072 .Case("mmx", X86Features::MMX) 6073 .Case("popcnt", X86Features::POPCNT) 6074 .Case("sse", X86Features::SSE) 6075 .Case("sse2", X86Features::SSE2) 6076 .Case("sse3", X86Features::SSE3) 6077 .Case("sse4.1", X86Features::SSE4_1) 6078 .Case("sse4.2", X86Features::SSE4_2) 6079 .Case("avx", X86Features::AVX) 6080 .Case("avx2", X86Features::AVX2) 6081 .Case("sse4a", X86Features::SSE4_A) 6082 .Case("fma4", X86Features::FMA4) 6083 .Case("xop", X86Features::XOP) 6084 .Case("fma", X86Features::FMA) 6085 .Case("avx512f", X86Features::AVX512F) 6086 .Case("bmi", X86Features::BMI) 6087 .Case("bmi2", X86Features::BMI2) 6088 .Default(X86Features::MAX); 6089 assert(Feature != X86Features::MAX && "Invalid feature!"); 6090 6091 // Matching the struct layout from the compiler-rt/libgcc structure that is 6092 // filled in: 6093 // unsigned int __cpu_vendor; 6094 // unsigned int __cpu_type; 6095 // unsigned int __cpu_subtype; 6096 // unsigned int __cpu_features[1]; 6097 llvm::Type *STy = llvm::StructType::get( 6098 Int32Ty, Int32Ty, Int32Ty, llvm::ArrayType::get(Int32Ty, 1), nullptr); 6099 6100 // Grab the global __cpu_model. 6101 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 6102 6103 // Grab the first (0th) element from the field __cpu_features off of the 6104 // global in the struct STy. 6105 Value *Idxs[] = { 6106 ConstantInt::get(Int32Ty, 0), 6107 ConstantInt::get(Int32Ty, 3), 6108 ConstantInt::get(Int32Ty, 0) 6109 }; 6110 Value *CpuFeatures = Builder.CreateGEP(STy, CpuModel, Idxs); 6111 Value *Features = Builder.CreateAlignedLoad(CpuFeatures, 6112 CharUnits::fromQuantity(4)); 6113 6114 // Check the value of the bit corresponding to the feature requested. 6115 Value *Bitset = Builder.CreateAnd( 6116 Features, llvm::ConstantInt::get(Int32Ty, 1 << Feature)); 6117 return Builder.CreateICmpNE(Bitset, llvm::ConstantInt::get(Int32Ty, 0)); 6118 } 6119 case X86::BI_mm_prefetch: { 6120 Value *Address = Ops[0]; 6121 Value *RW = ConstantInt::get(Int32Ty, 0); 6122 Value *Locality = Ops[1]; 6123 Value *Data = ConstantInt::get(Int32Ty, 1); 6124 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 6125 return Builder.CreateCall(F, {Address, RW, Locality, Data}); 6126 } 6127 case X86::BI__builtin_ia32_undef128: 6128 case X86::BI__builtin_ia32_undef256: 6129 case X86::BI__builtin_ia32_undef512: 6130 return UndefValue::get(ConvertType(E->getType())); 6131 case X86::BI__builtin_ia32_vec_init_v8qi: 6132 case X86::BI__builtin_ia32_vec_init_v4hi: 6133 case X86::BI__builtin_ia32_vec_init_v2si: 6134 return Builder.CreateBitCast(BuildVector(Ops), 6135 llvm::Type::getX86_MMXTy(getLLVMContext())); 6136 case X86::BI__builtin_ia32_vec_ext_v2si: 6137 return Builder.CreateExtractElement(Ops[0], 6138 llvm::ConstantInt::get(Ops[1]->getType(), 0)); 6139 case X86::BI__builtin_ia32_ldmxcsr: { 6140 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 6141 Builder.CreateStore(Ops[0], Tmp); 6142 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_ldmxcsr), 6143 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 6144 } 6145 case X86::BI__builtin_ia32_stmxcsr: { 6146 Address Tmp = CreateMemTemp(E->getType()); 6147 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_stmxcsr), 6148 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 6149 return Builder.CreateLoad(Tmp, "stmxcsr"); 6150 } 6151 case X86::BI__builtin_ia32_xsave: 6152 case X86::BI__builtin_ia32_xsave64: 6153 case X86::BI__builtin_ia32_xrstor: 6154 case X86::BI__builtin_ia32_xrstor64: 6155 case X86::BI__builtin_ia32_xsaveopt: 6156 case X86::BI__builtin_ia32_xsaveopt64: 6157 case X86::BI__builtin_ia32_xrstors: 6158 case X86::BI__builtin_ia32_xrstors64: 6159 case X86::BI__builtin_ia32_xsavec: 6160 case X86::BI__builtin_ia32_xsavec64: 6161 case X86::BI__builtin_ia32_xsaves: 6162 case X86::BI__builtin_ia32_xsaves64: { 6163 Intrinsic::ID ID; 6164 #define INTRINSIC_X86_XSAVE_ID(NAME) \ 6165 case X86::BI__builtin_ia32_##NAME: \ 6166 ID = Intrinsic::x86_##NAME; \ 6167 break 6168 switch (BuiltinID) { 6169 default: llvm_unreachable("Unsupported intrinsic!"); 6170 INTRINSIC_X86_XSAVE_ID(xsave); 6171 INTRINSIC_X86_XSAVE_ID(xsave64); 6172 INTRINSIC_X86_XSAVE_ID(xrstor); 6173 INTRINSIC_X86_XSAVE_ID(xrstor64); 6174 INTRINSIC_X86_XSAVE_ID(xsaveopt); 6175 INTRINSIC_X86_XSAVE_ID(xsaveopt64); 6176 INTRINSIC_X86_XSAVE_ID(xrstors); 6177 INTRINSIC_X86_XSAVE_ID(xrstors64); 6178 INTRINSIC_X86_XSAVE_ID(xsavec); 6179 INTRINSIC_X86_XSAVE_ID(xsavec64); 6180 INTRINSIC_X86_XSAVE_ID(xsaves); 6181 INTRINSIC_X86_XSAVE_ID(xsaves64); 6182 } 6183 #undef INTRINSIC_X86_XSAVE_ID 6184 Value *Mhi = Builder.CreateTrunc( 6185 Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, 32)), Int32Ty); 6186 Value *Mlo = Builder.CreateTrunc(Ops[1], Int32Ty); 6187 Ops[1] = Mhi; 6188 Ops.push_back(Mlo); 6189 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 6190 } 6191 case X86::BI__builtin_ia32_storehps: 6192 case X86::BI__builtin_ia32_storelps: { 6193 llvm::Type *PtrTy = llvm::PointerType::getUnqual(Int64Ty); 6194 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 2); 6195 6196 // cast val v2i64 6197 Ops[1] = Builder.CreateBitCast(Ops[1], VecTy, "cast"); 6198 6199 // extract (0, 1) 6200 unsigned Index = BuiltinID == X86::BI__builtin_ia32_storelps ? 0 : 1; 6201 llvm::Value *Idx = llvm::ConstantInt::get(SizeTy, Index); 6202 Ops[1] = Builder.CreateExtractElement(Ops[1], Idx, "extract"); 6203 6204 // cast pointer to i64 & store 6205 Ops[0] = Builder.CreateBitCast(Ops[0], PtrTy); 6206 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6207 } 6208 case X86::BI__builtin_ia32_palignr128: 6209 case X86::BI__builtin_ia32_palignr256: { 6210 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 6211 6212 unsigned NumElts = 6213 cast<llvm::VectorType>(Ops[0]->getType())->getNumElements(); 6214 assert(NumElts % 16 == 0); 6215 unsigned NumLanes = NumElts / 16; 6216 unsigned NumLaneElts = NumElts / NumLanes; 6217 6218 // If palignr is shifting the pair of vectors more than the size of two 6219 // lanes, emit zero. 6220 if (ShiftVal >= (2 * NumLaneElts)) 6221 return llvm::Constant::getNullValue(ConvertType(E->getType())); 6222 6223 // If palignr is shifting the pair of input vectors more than one lane, 6224 // but less than two lanes, convert to shifting in zeroes. 6225 if (ShiftVal > NumLaneElts) { 6226 ShiftVal -= NumLaneElts; 6227 Ops[1] = Ops[0]; 6228 Ops[0] = llvm::Constant::getNullValue(Ops[0]->getType()); 6229 } 6230 6231 uint32_t Indices[32]; 6232 // 256-bit palignr operates on 128-bit lanes so we need to handle that 6233 for (unsigned l = 0; l != NumElts; l += NumLaneElts) { 6234 for (unsigned i = 0; i != NumLaneElts; ++i) { 6235 unsigned Idx = ShiftVal + i; 6236 if (Idx >= NumLaneElts) 6237 Idx += NumElts - NumLaneElts; // End of lane, switch operand. 6238 Indices[l + i] = Idx + l; 6239 } 6240 } 6241 6242 Value *SV = llvm::ConstantDataVector::get(getLLVMContext(), 6243 makeArrayRef(Indices, NumElts)); 6244 return Builder.CreateShuffleVector(Ops[1], Ops[0], SV, "palignr"); 6245 } 6246 case X86::BI__builtin_ia32_pslldqi256: { 6247 // Shift value is in bits so divide by 8. 6248 unsigned shiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() >> 3; 6249 6250 // If pslldq is shifting the vector more than 15 bytes, emit zero. 6251 if (shiftVal >= 16) 6252 return llvm::Constant::getNullValue(ConvertType(E->getType())); 6253 6254 uint32_t Indices[32]; 6255 // 256-bit pslldq operates on 128-bit lanes so we need to handle that 6256 for (unsigned l = 0; l != 32; l += 16) { 6257 for (unsigned i = 0; i != 16; ++i) { 6258 unsigned Idx = 32 + i - shiftVal; 6259 if (Idx < 32) Idx -= 16; // end of lane, switch operand. 6260 Indices[l + i] = Idx + l; 6261 } 6262 } 6263 6264 llvm::Type *VecTy = llvm::VectorType::get(Int8Ty, 32); 6265 Ops[0] = Builder.CreateBitCast(Ops[0], VecTy, "cast"); 6266 Value *Zero = llvm::Constant::getNullValue(VecTy); 6267 6268 Value *SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 6269 SV = Builder.CreateShuffleVector(Zero, Ops[0], SV, "pslldq"); 6270 llvm::Type *ResultType = ConvertType(E->getType()); 6271 return Builder.CreateBitCast(SV, ResultType, "cast"); 6272 } 6273 case X86::BI__builtin_ia32_psrldqi256: { 6274 // Shift value is in bits so divide by 8. 6275 unsigned shiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() >> 3; 6276 6277 // If psrldq is shifting the vector more than 15 bytes, emit zero. 6278 if (shiftVal >= 16) 6279 return llvm::Constant::getNullValue(ConvertType(E->getType())); 6280 6281 uint32_t Indices[32]; 6282 // 256-bit psrldq operates on 128-bit lanes so we need to handle that 6283 for (unsigned l = 0; l != 32; l += 16) { 6284 for (unsigned i = 0; i != 16; ++i) { 6285 unsigned Idx = i + shiftVal; 6286 if (Idx >= 16) Idx += 16; // end of lane, switch operand. 6287 Indices[l + i] = Idx + l; 6288 } 6289 } 6290 6291 llvm::Type *VecTy = llvm::VectorType::get(Int8Ty, 32); 6292 Ops[0] = Builder.CreateBitCast(Ops[0], VecTy, "cast"); 6293 Value *Zero = llvm::Constant::getNullValue(VecTy); 6294 6295 Value *SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 6296 SV = Builder.CreateShuffleVector(Ops[0], Zero, SV, "psrldq"); 6297 llvm::Type *ResultType = ConvertType(E->getType()); 6298 return Builder.CreateBitCast(SV, ResultType, "cast"); 6299 } 6300 case X86::BI__builtin_ia32_movntps: 6301 case X86::BI__builtin_ia32_movntps256: 6302 case X86::BI__builtin_ia32_movntpd: 6303 case X86::BI__builtin_ia32_movntpd256: 6304 case X86::BI__builtin_ia32_movntdq: 6305 case X86::BI__builtin_ia32_movntdq256: 6306 case X86::BI__builtin_ia32_movnti: 6307 case X86::BI__builtin_ia32_movnti64: { 6308 llvm::MDNode *Node = llvm::MDNode::get( 6309 getLLVMContext(), llvm::ConstantAsMetadata::get(Builder.getInt32(1))); 6310 6311 // Convert the type of the pointer to a pointer to the stored type. 6312 Value *BC = Builder.CreateBitCast(Ops[0], 6313 llvm::PointerType::getUnqual(Ops[1]->getType()), 6314 "cast"); 6315 StoreInst *SI = Builder.CreateDefaultAlignedStore(Ops[1], BC); 6316 SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); 6317 6318 // If the operand is an integer, we can't assume alignment. Otherwise, 6319 // assume natural alignment. 6320 QualType ArgTy = E->getArg(1)->getType(); 6321 unsigned Align; 6322 if (ArgTy->isIntegerType()) 6323 Align = 1; 6324 else 6325 Align = getContext().getTypeSizeInChars(ArgTy).getQuantity(); 6326 SI->setAlignment(Align); 6327 return SI; 6328 } 6329 // 3DNow! 6330 case X86::BI__builtin_ia32_pswapdsf: 6331 case X86::BI__builtin_ia32_pswapdsi: { 6332 llvm::Type *MMXTy = llvm::Type::getX86_MMXTy(getLLVMContext()); 6333 Ops[0] = Builder.CreateBitCast(Ops[0], MMXTy, "cast"); 6334 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_3dnowa_pswapd); 6335 return Builder.CreateCall(F, Ops, "pswapd"); 6336 } 6337 case X86::BI__builtin_ia32_rdrand16_step: 6338 case X86::BI__builtin_ia32_rdrand32_step: 6339 case X86::BI__builtin_ia32_rdrand64_step: 6340 case X86::BI__builtin_ia32_rdseed16_step: 6341 case X86::BI__builtin_ia32_rdseed32_step: 6342 case X86::BI__builtin_ia32_rdseed64_step: { 6343 Intrinsic::ID ID; 6344 switch (BuiltinID) { 6345 default: llvm_unreachable("Unsupported intrinsic!"); 6346 case X86::BI__builtin_ia32_rdrand16_step: 6347 ID = Intrinsic::x86_rdrand_16; 6348 break; 6349 case X86::BI__builtin_ia32_rdrand32_step: 6350 ID = Intrinsic::x86_rdrand_32; 6351 break; 6352 case X86::BI__builtin_ia32_rdrand64_step: 6353 ID = Intrinsic::x86_rdrand_64; 6354 break; 6355 case X86::BI__builtin_ia32_rdseed16_step: 6356 ID = Intrinsic::x86_rdseed_16; 6357 break; 6358 case X86::BI__builtin_ia32_rdseed32_step: 6359 ID = Intrinsic::x86_rdseed_32; 6360 break; 6361 case X86::BI__builtin_ia32_rdseed64_step: 6362 ID = Intrinsic::x86_rdseed_64; 6363 break; 6364 } 6365 6366 Value *Call = Builder.CreateCall(CGM.getIntrinsic(ID)); 6367 Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 0), 6368 Ops[0]); 6369 return Builder.CreateExtractValue(Call, 1); 6370 } 6371 // SSE comparison intrisics 6372 case X86::BI__builtin_ia32_cmpeqps: 6373 case X86::BI__builtin_ia32_cmpltps: 6374 case X86::BI__builtin_ia32_cmpleps: 6375 case X86::BI__builtin_ia32_cmpunordps: 6376 case X86::BI__builtin_ia32_cmpneqps: 6377 case X86::BI__builtin_ia32_cmpnltps: 6378 case X86::BI__builtin_ia32_cmpnleps: 6379 case X86::BI__builtin_ia32_cmpordps: 6380 case X86::BI__builtin_ia32_cmpeqss: 6381 case X86::BI__builtin_ia32_cmpltss: 6382 case X86::BI__builtin_ia32_cmpless: 6383 case X86::BI__builtin_ia32_cmpunordss: 6384 case X86::BI__builtin_ia32_cmpneqss: 6385 case X86::BI__builtin_ia32_cmpnltss: 6386 case X86::BI__builtin_ia32_cmpnless: 6387 case X86::BI__builtin_ia32_cmpordss: 6388 case X86::BI__builtin_ia32_cmpeqpd: 6389 case X86::BI__builtin_ia32_cmpltpd: 6390 case X86::BI__builtin_ia32_cmplepd: 6391 case X86::BI__builtin_ia32_cmpunordpd: 6392 case X86::BI__builtin_ia32_cmpneqpd: 6393 case X86::BI__builtin_ia32_cmpnltpd: 6394 case X86::BI__builtin_ia32_cmpnlepd: 6395 case X86::BI__builtin_ia32_cmpordpd: 6396 case X86::BI__builtin_ia32_cmpeqsd: 6397 case X86::BI__builtin_ia32_cmpltsd: 6398 case X86::BI__builtin_ia32_cmplesd: 6399 case X86::BI__builtin_ia32_cmpunordsd: 6400 case X86::BI__builtin_ia32_cmpneqsd: 6401 case X86::BI__builtin_ia32_cmpnltsd: 6402 case X86::BI__builtin_ia32_cmpnlesd: 6403 case X86::BI__builtin_ia32_cmpordsd: 6404 // These exist so that the builtin that takes an immediate can be bounds 6405 // checked by clang to avoid passing bad immediates to the backend. Since 6406 // AVX has a larger immediate than SSE we would need separate builtins to 6407 // do the different bounds checking. Rather than create a clang specific 6408 // SSE only builtin, this implements eight separate builtins to match gcc 6409 // implementation. 6410 6411 // Choose the immediate. 6412 unsigned Imm; 6413 switch (BuiltinID) { 6414 default: llvm_unreachable("Unsupported intrinsic!"); 6415 case X86::BI__builtin_ia32_cmpeqps: 6416 case X86::BI__builtin_ia32_cmpeqss: 6417 case X86::BI__builtin_ia32_cmpeqpd: 6418 case X86::BI__builtin_ia32_cmpeqsd: 6419 Imm = 0; 6420 break; 6421 case X86::BI__builtin_ia32_cmpltps: 6422 case X86::BI__builtin_ia32_cmpltss: 6423 case X86::BI__builtin_ia32_cmpltpd: 6424 case X86::BI__builtin_ia32_cmpltsd: 6425 Imm = 1; 6426 break; 6427 case X86::BI__builtin_ia32_cmpleps: 6428 case X86::BI__builtin_ia32_cmpless: 6429 case X86::BI__builtin_ia32_cmplepd: 6430 case X86::BI__builtin_ia32_cmplesd: 6431 Imm = 2; 6432 break; 6433 case X86::BI__builtin_ia32_cmpunordps: 6434 case X86::BI__builtin_ia32_cmpunordss: 6435 case X86::BI__builtin_ia32_cmpunordpd: 6436 case X86::BI__builtin_ia32_cmpunordsd: 6437 Imm = 3; 6438 break; 6439 case X86::BI__builtin_ia32_cmpneqps: 6440 case X86::BI__builtin_ia32_cmpneqss: 6441 case X86::BI__builtin_ia32_cmpneqpd: 6442 case X86::BI__builtin_ia32_cmpneqsd: 6443 Imm = 4; 6444 break; 6445 case X86::BI__builtin_ia32_cmpnltps: 6446 case X86::BI__builtin_ia32_cmpnltss: 6447 case X86::BI__builtin_ia32_cmpnltpd: 6448 case X86::BI__builtin_ia32_cmpnltsd: 6449 Imm = 5; 6450 break; 6451 case X86::BI__builtin_ia32_cmpnleps: 6452 case X86::BI__builtin_ia32_cmpnless: 6453 case X86::BI__builtin_ia32_cmpnlepd: 6454 case X86::BI__builtin_ia32_cmpnlesd: 6455 Imm = 6; 6456 break; 6457 case X86::BI__builtin_ia32_cmpordps: 6458 case X86::BI__builtin_ia32_cmpordss: 6459 case X86::BI__builtin_ia32_cmpordpd: 6460 case X86::BI__builtin_ia32_cmpordsd: 6461 Imm = 7; 6462 break; 6463 } 6464 6465 // Choose the intrinsic ID. 6466 const char *name; 6467 Intrinsic::ID ID; 6468 switch (BuiltinID) { 6469 default: llvm_unreachable("Unsupported intrinsic!"); 6470 case X86::BI__builtin_ia32_cmpeqps: 6471 case X86::BI__builtin_ia32_cmpltps: 6472 case X86::BI__builtin_ia32_cmpleps: 6473 case X86::BI__builtin_ia32_cmpunordps: 6474 case X86::BI__builtin_ia32_cmpneqps: 6475 case X86::BI__builtin_ia32_cmpnltps: 6476 case X86::BI__builtin_ia32_cmpnleps: 6477 case X86::BI__builtin_ia32_cmpordps: 6478 name = "cmpps"; 6479 ID = Intrinsic::x86_sse_cmp_ps; 6480 break; 6481 case X86::BI__builtin_ia32_cmpeqss: 6482 case X86::BI__builtin_ia32_cmpltss: 6483 case X86::BI__builtin_ia32_cmpless: 6484 case X86::BI__builtin_ia32_cmpunordss: 6485 case X86::BI__builtin_ia32_cmpneqss: 6486 case X86::BI__builtin_ia32_cmpnltss: 6487 case X86::BI__builtin_ia32_cmpnless: 6488 case X86::BI__builtin_ia32_cmpordss: 6489 name = "cmpss"; 6490 ID = Intrinsic::x86_sse_cmp_ss; 6491 break; 6492 case X86::BI__builtin_ia32_cmpeqpd: 6493 case X86::BI__builtin_ia32_cmpltpd: 6494 case X86::BI__builtin_ia32_cmplepd: 6495 case X86::BI__builtin_ia32_cmpunordpd: 6496 case X86::BI__builtin_ia32_cmpneqpd: 6497 case X86::BI__builtin_ia32_cmpnltpd: 6498 case X86::BI__builtin_ia32_cmpnlepd: 6499 case X86::BI__builtin_ia32_cmpordpd: 6500 name = "cmppd"; 6501 ID = Intrinsic::x86_sse2_cmp_pd; 6502 break; 6503 case X86::BI__builtin_ia32_cmpeqsd: 6504 case X86::BI__builtin_ia32_cmpltsd: 6505 case X86::BI__builtin_ia32_cmplesd: 6506 case X86::BI__builtin_ia32_cmpunordsd: 6507 case X86::BI__builtin_ia32_cmpneqsd: 6508 case X86::BI__builtin_ia32_cmpnltsd: 6509 case X86::BI__builtin_ia32_cmpnlesd: 6510 case X86::BI__builtin_ia32_cmpordsd: 6511 name = "cmpsd"; 6512 ID = Intrinsic::x86_sse2_cmp_sd; 6513 break; 6514 } 6515 6516 Ops.push_back(llvm::ConstantInt::get(Int8Ty, Imm)); 6517 llvm::Function *F = CGM.getIntrinsic(ID); 6518 return Builder.CreateCall(F, Ops, name); 6519 } 6520 } 6521 6522 6523 Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, 6524 const CallExpr *E) { 6525 SmallVector<Value*, 4> Ops; 6526 6527 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) 6528 Ops.push_back(EmitScalarExpr(E->getArg(i))); 6529 6530 Intrinsic::ID ID = Intrinsic::not_intrinsic; 6531 6532 switch (BuiltinID) { 6533 default: return nullptr; 6534 6535 // __builtin_ppc_get_timebase is GCC 4.8+'s PowerPC-specific name for what we 6536 // call __builtin_readcyclecounter. 6537 case PPC::BI__builtin_ppc_get_timebase: 6538 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::readcyclecounter)); 6539 6540 // vec_ld, vec_lvsl, vec_lvsr 6541 case PPC::BI__builtin_altivec_lvx: 6542 case PPC::BI__builtin_altivec_lvxl: 6543 case PPC::BI__builtin_altivec_lvebx: 6544 case PPC::BI__builtin_altivec_lvehx: 6545 case PPC::BI__builtin_altivec_lvewx: 6546 case PPC::BI__builtin_altivec_lvsl: 6547 case PPC::BI__builtin_altivec_lvsr: 6548 case PPC::BI__builtin_vsx_lxvd2x: 6549 case PPC::BI__builtin_vsx_lxvw4x: 6550 { 6551 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 6552 6553 Ops[0] = Builder.CreateGEP(Ops[1], Ops[0]); 6554 Ops.pop_back(); 6555 6556 switch (BuiltinID) { 6557 default: llvm_unreachable("Unsupported ld/lvsl/lvsr intrinsic!"); 6558 case PPC::BI__builtin_altivec_lvx: 6559 ID = Intrinsic::ppc_altivec_lvx; 6560 break; 6561 case PPC::BI__builtin_altivec_lvxl: 6562 ID = Intrinsic::ppc_altivec_lvxl; 6563 break; 6564 case PPC::BI__builtin_altivec_lvebx: 6565 ID = Intrinsic::ppc_altivec_lvebx; 6566 break; 6567 case PPC::BI__builtin_altivec_lvehx: 6568 ID = Intrinsic::ppc_altivec_lvehx; 6569 break; 6570 case PPC::BI__builtin_altivec_lvewx: 6571 ID = Intrinsic::ppc_altivec_lvewx; 6572 break; 6573 case PPC::BI__builtin_altivec_lvsl: 6574 ID = Intrinsic::ppc_altivec_lvsl; 6575 break; 6576 case PPC::BI__builtin_altivec_lvsr: 6577 ID = Intrinsic::ppc_altivec_lvsr; 6578 break; 6579 case PPC::BI__builtin_vsx_lxvd2x: 6580 ID = Intrinsic::ppc_vsx_lxvd2x; 6581 break; 6582 case PPC::BI__builtin_vsx_lxvw4x: 6583 ID = Intrinsic::ppc_vsx_lxvw4x; 6584 break; 6585 } 6586 llvm::Function *F = CGM.getIntrinsic(ID); 6587 return Builder.CreateCall(F, Ops, ""); 6588 } 6589 6590 // vec_st 6591 case PPC::BI__builtin_altivec_stvx: 6592 case PPC::BI__builtin_altivec_stvxl: 6593 case PPC::BI__builtin_altivec_stvebx: 6594 case PPC::BI__builtin_altivec_stvehx: 6595 case PPC::BI__builtin_altivec_stvewx: 6596 case PPC::BI__builtin_vsx_stxvd2x: 6597 case PPC::BI__builtin_vsx_stxvw4x: 6598 { 6599 Ops[2] = Builder.CreateBitCast(Ops[2], Int8PtrTy); 6600 Ops[1] = Builder.CreateGEP(Ops[2], Ops[1]); 6601 Ops.pop_back(); 6602 6603 switch (BuiltinID) { 6604 default: llvm_unreachable("Unsupported st intrinsic!"); 6605 case PPC::BI__builtin_altivec_stvx: 6606 ID = Intrinsic::ppc_altivec_stvx; 6607 break; 6608 case PPC::BI__builtin_altivec_stvxl: 6609 ID = Intrinsic::ppc_altivec_stvxl; 6610 break; 6611 case PPC::BI__builtin_altivec_stvebx: 6612 ID = Intrinsic::ppc_altivec_stvebx; 6613 break; 6614 case PPC::BI__builtin_altivec_stvehx: 6615 ID = Intrinsic::ppc_altivec_stvehx; 6616 break; 6617 case PPC::BI__builtin_altivec_stvewx: 6618 ID = Intrinsic::ppc_altivec_stvewx; 6619 break; 6620 case PPC::BI__builtin_vsx_stxvd2x: 6621 ID = Intrinsic::ppc_vsx_stxvd2x; 6622 break; 6623 case PPC::BI__builtin_vsx_stxvw4x: 6624 ID = Intrinsic::ppc_vsx_stxvw4x; 6625 break; 6626 } 6627 llvm::Function *F = CGM.getIntrinsic(ID); 6628 return Builder.CreateCall(F, Ops, ""); 6629 } 6630 // Square root 6631 case PPC::BI__builtin_vsx_xvsqrtsp: 6632 case PPC::BI__builtin_vsx_xvsqrtdp: { 6633 llvm::Type *ResultType = ConvertType(E->getType()); 6634 Value *X = EmitScalarExpr(E->getArg(0)); 6635 ID = Intrinsic::sqrt; 6636 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 6637 return Builder.CreateCall(F, X); 6638 } 6639 // Count leading zeros 6640 case PPC::BI__builtin_altivec_vclzb: 6641 case PPC::BI__builtin_altivec_vclzh: 6642 case PPC::BI__builtin_altivec_vclzw: 6643 case PPC::BI__builtin_altivec_vclzd: { 6644 llvm::Type *ResultType = ConvertType(E->getType()); 6645 Value *X = EmitScalarExpr(E->getArg(0)); 6646 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 6647 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 6648 return Builder.CreateCall(F, {X, Undef}); 6649 } 6650 // Copy sign 6651 case PPC::BI__builtin_vsx_xvcpsgnsp: 6652 case PPC::BI__builtin_vsx_xvcpsgndp: { 6653 llvm::Type *ResultType = ConvertType(E->getType()); 6654 Value *X = EmitScalarExpr(E->getArg(0)); 6655 Value *Y = EmitScalarExpr(E->getArg(1)); 6656 ID = Intrinsic::copysign; 6657 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 6658 return Builder.CreateCall(F, {X, Y}); 6659 } 6660 // Rounding/truncation 6661 case PPC::BI__builtin_vsx_xvrspip: 6662 case PPC::BI__builtin_vsx_xvrdpip: 6663 case PPC::BI__builtin_vsx_xvrdpim: 6664 case PPC::BI__builtin_vsx_xvrspim: 6665 case PPC::BI__builtin_vsx_xvrdpi: 6666 case PPC::BI__builtin_vsx_xvrspi: 6667 case PPC::BI__builtin_vsx_xvrdpic: 6668 case PPC::BI__builtin_vsx_xvrspic: 6669 case PPC::BI__builtin_vsx_xvrdpiz: 6670 case PPC::BI__builtin_vsx_xvrspiz: { 6671 llvm::Type *ResultType = ConvertType(E->getType()); 6672 Value *X = EmitScalarExpr(E->getArg(0)); 6673 if (BuiltinID == PPC::BI__builtin_vsx_xvrdpim || 6674 BuiltinID == PPC::BI__builtin_vsx_xvrspim) 6675 ID = Intrinsic::floor; 6676 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpi || 6677 BuiltinID == PPC::BI__builtin_vsx_xvrspi) 6678 ID = Intrinsic::round; 6679 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpic || 6680 BuiltinID == PPC::BI__builtin_vsx_xvrspic) 6681 ID = Intrinsic::nearbyint; 6682 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpip || 6683 BuiltinID == PPC::BI__builtin_vsx_xvrspip) 6684 ID = Intrinsic::ceil; 6685 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpiz || 6686 BuiltinID == PPC::BI__builtin_vsx_xvrspiz) 6687 ID = Intrinsic::trunc; 6688 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 6689 return Builder.CreateCall(F, X); 6690 } 6691 // FMA variations 6692 case PPC::BI__builtin_vsx_xvmaddadp: 6693 case PPC::BI__builtin_vsx_xvmaddasp: 6694 case PPC::BI__builtin_vsx_xvnmaddadp: 6695 case PPC::BI__builtin_vsx_xvnmaddasp: 6696 case PPC::BI__builtin_vsx_xvmsubadp: 6697 case PPC::BI__builtin_vsx_xvmsubasp: 6698 case PPC::BI__builtin_vsx_xvnmsubadp: 6699 case PPC::BI__builtin_vsx_xvnmsubasp: { 6700 llvm::Type *ResultType = ConvertType(E->getType()); 6701 Value *X = EmitScalarExpr(E->getArg(0)); 6702 Value *Y = EmitScalarExpr(E->getArg(1)); 6703 Value *Z = EmitScalarExpr(E->getArg(2)); 6704 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 6705 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 6706 switch (BuiltinID) { 6707 case PPC::BI__builtin_vsx_xvmaddadp: 6708 case PPC::BI__builtin_vsx_xvmaddasp: 6709 return Builder.CreateCall(F, {X, Y, Z}); 6710 case PPC::BI__builtin_vsx_xvnmaddadp: 6711 case PPC::BI__builtin_vsx_xvnmaddasp: 6712 return Builder.CreateFSub(Zero, 6713 Builder.CreateCall(F, {X, Y, Z}), "sub"); 6714 case PPC::BI__builtin_vsx_xvmsubadp: 6715 case PPC::BI__builtin_vsx_xvmsubasp: 6716 return Builder.CreateCall(F, 6717 {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 6718 case PPC::BI__builtin_vsx_xvnmsubadp: 6719 case PPC::BI__builtin_vsx_xvnmsubasp: 6720 Value *FsubRes = 6721 Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 6722 return Builder.CreateFSub(Zero, FsubRes, "sub"); 6723 } 6724 llvm_unreachable("Unknown FMA operation"); 6725 return nullptr; // Suppress no-return warning 6726 } 6727 } 6728 } 6729 6730 // Emit an intrinsic that has 1 float or double. 6731 static Value *emitUnaryFPBuiltin(CodeGenFunction &CGF, 6732 const CallExpr *E, 6733 unsigned IntrinsicID) { 6734 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 6735 6736 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 6737 return CGF.Builder.CreateCall(F, Src0); 6738 } 6739 6740 // Emit an intrinsic that has 3 float or double operands. 6741 static Value *emitTernaryFPBuiltin(CodeGenFunction &CGF, 6742 const CallExpr *E, 6743 unsigned IntrinsicID) { 6744 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 6745 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 6746 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); 6747 6748 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 6749 return CGF.Builder.CreateCall(F, {Src0, Src1, Src2}); 6750 } 6751 6752 // Emit an intrinsic that has 1 float or double operand, and 1 integer. 6753 static Value *emitFPIntBuiltin(CodeGenFunction &CGF, 6754 const CallExpr *E, 6755 unsigned IntrinsicID) { 6756 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 6757 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 6758 6759 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 6760 return CGF.Builder.CreateCall(F, {Src0, Src1}); 6761 } 6762 6763 Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID, 6764 const CallExpr *E) { 6765 switch (BuiltinID) { 6766 case AMDGPU::BI__builtin_amdgpu_div_scale: 6767 case AMDGPU::BI__builtin_amdgpu_div_scalef: { 6768 // Translate from the intrinsics's struct return to the builtin's out 6769 // argument. 6770 6771 Address FlagOutPtr = EmitPointerWithAlignment(E->getArg(3)); 6772 6773 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 6774 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 6775 llvm::Value *Z = EmitScalarExpr(E->getArg(2)); 6776 6777 llvm::Value *Callee = CGM.getIntrinsic(Intrinsic::AMDGPU_div_scale, 6778 X->getType()); 6779 6780 llvm::Value *Tmp = Builder.CreateCall(Callee, {X, Y, Z}); 6781 6782 llvm::Value *Result = Builder.CreateExtractValue(Tmp, 0); 6783 llvm::Value *Flag = Builder.CreateExtractValue(Tmp, 1); 6784 6785 llvm::Type *RealFlagType 6786 = FlagOutPtr.getPointer()->getType()->getPointerElementType(); 6787 6788 llvm::Value *FlagExt = Builder.CreateZExt(Flag, RealFlagType); 6789 Builder.CreateStore(FlagExt, FlagOutPtr); 6790 return Result; 6791 } 6792 case AMDGPU::BI__builtin_amdgpu_div_fmas: 6793 case AMDGPU::BI__builtin_amdgpu_div_fmasf: { 6794 llvm::Value *Src0 = EmitScalarExpr(E->getArg(0)); 6795 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); 6796 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); 6797 llvm::Value *Src3 = EmitScalarExpr(E->getArg(3)); 6798 6799 llvm::Value *F = CGM.getIntrinsic(Intrinsic::AMDGPU_div_fmas, 6800 Src0->getType()); 6801 llvm::Value *Src3ToBool = Builder.CreateIsNotNull(Src3); 6802 return Builder.CreateCall(F, {Src0, Src1, Src2, Src3ToBool}); 6803 } 6804 case AMDGPU::BI__builtin_amdgpu_div_fixup: 6805 case AMDGPU::BI__builtin_amdgpu_div_fixupf: 6806 return emitTernaryFPBuiltin(*this, E, Intrinsic::AMDGPU_div_fixup); 6807 case AMDGPU::BI__builtin_amdgpu_trig_preop: 6808 case AMDGPU::BI__builtin_amdgpu_trig_preopf: 6809 return emitFPIntBuiltin(*this, E, Intrinsic::AMDGPU_trig_preop); 6810 case AMDGPU::BI__builtin_amdgpu_rcp: 6811 case AMDGPU::BI__builtin_amdgpu_rcpf: 6812 return emitUnaryFPBuiltin(*this, E, Intrinsic::AMDGPU_rcp); 6813 case AMDGPU::BI__builtin_amdgpu_rsq: 6814 case AMDGPU::BI__builtin_amdgpu_rsqf: 6815 return emitUnaryFPBuiltin(*this, E, Intrinsic::AMDGPU_rsq); 6816 case AMDGPU::BI__builtin_amdgpu_rsq_clamped: 6817 case AMDGPU::BI__builtin_amdgpu_rsq_clampedf: 6818 return emitUnaryFPBuiltin(*this, E, Intrinsic::AMDGPU_rsq_clamped); 6819 case AMDGPU::BI__builtin_amdgpu_ldexp: 6820 case AMDGPU::BI__builtin_amdgpu_ldexpf: 6821 return emitFPIntBuiltin(*this, E, Intrinsic::AMDGPU_ldexp); 6822 case AMDGPU::BI__builtin_amdgpu_class: 6823 case AMDGPU::BI__builtin_amdgpu_classf: 6824 return emitFPIntBuiltin(*this, E, Intrinsic::AMDGPU_class); 6825 default: 6826 return nullptr; 6827 } 6828 } 6829 6830 /// Handle a SystemZ function in which the final argument is a pointer 6831 /// to an int that receives the post-instruction CC value. At the LLVM level 6832 /// this is represented as a function that returns a {result, cc} pair. 6833 static Value *EmitSystemZIntrinsicWithCC(CodeGenFunction &CGF, 6834 unsigned IntrinsicID, 6835 const CallExpr *E) { 6836 unsigned NumArgs = E->getNumArgs() - 1; 6837 SmallVector<Value *, 8> Args(NumArgs); 6838 for (unsigned I = 0; I < NumArgs; ++I) 6839 Args[I] = CGF.EmitScalarExpr(E->getArg(I)); 6840 Address CCPtr = CGF.EmitPointerWithAlignment(E->getArg(NumArgs)); 6841 Value *F = CGF.CGM.getIntrinsic(IntrinsicID); 6842 Value *Call = CGF.Builder.CreateCall(F, Args); 6843 Value *CC = CGF.Builder.CreateExtractValue(Call, 1); 6844 CGF.Builder.CreateStore(CC, CCPtr); 6845 return CGF.Builder.CreateExtractValue(Call, 0); 6846 } 6847 6848 Value *CodeGenFunction::EmitSystemZBuiltinExpr(unsigned BuiltinID, 6849 const CallExpr *E) { 6850 switch (BuiltinID) { 6851 case SystemZ::BI__builtin_tbegin: { 6852 Value *TDB = EmitScalarExpr(E->getArg(0)); 6853 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 6854 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin); 6855 return Builder.CreateCall(F, {TDB, Control}); 6856 } 6857 case SystemZ::BI__builtin_tbegin_nofloat: { 6858 Value *TDB = EmitScalarExpr(E->getArg(0)); 6859 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 6860 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin_nofloat); 6861 return Builder.CreateCall(F, {TDB, Control}); 6862 } 6863 case SystemZ::BI__builtin_tbeginc: { 6864 Value *TDB = llvm::ConstantPointerNull::get(Int8PtrTy); 6865 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff08); 6866 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbeginc); 6867 return Builder.CreateCall(F, {TDB, Control}); 6868 } 6869 case SystemZ::BI__builtin_tabort: { 6870 Value *Data = EmitScalarExpr(E->getArg(0)); 6871 Value *F = CGM.getIntrinsic(Intrinsic::s390_tabort); 6872 return Builder.CreateCall(F, Builder.CreateSExt(Data, Int64Ty, "tabort")); 6873 } 6874 case SystemZ::BI__builtin_non_tx_store: { 6875 Value *Address = EmitScalarExpr(E->getArg(0)); 6876 Value *Data = EmitScalarExpr(E->getArg(1)); 6877 Value *F = CGM.getIntrinsic(Intrinsic::s390_ntstg); 6878 return Builder.CreateCall(F, {Data, Address}); 6879 } 6880 6881 // Vector builtins. Note that most vector builtins are mapped automatically 6882 // to target-specific LLVM intrinsics. The ones handled specially here can 6883 // be represented via standard LLVM IR, which is preferable to enable common 6884 // LLVM optimizations. 6885 6886 case SystemZ::BI__builtin_s390_vpopctb: 6887 case SystemZ::BI__builtin_s390_vpopcth: 6888 case SystemZ::BI__builtin_s390_vpopctf: 6889 case SystemZ::BI__builtin_s390_vpopctg: { 6890 llvm::Type *ResultType = ConvertType(E->getType()); 6891 Value *X = EmitScalarExpr(E->getArg(0)); 6892 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 6893 return Builder.CreateCall(F, X); 6894 } 6895 6896 case SystemZ::BI__builtin_s390_vclzb: 6897 case SystemZ::BI__builtin_s390_vclzh: 6898 case SystemZ::BI__builtin_s390_vclzf: 6899 case SystemZ::BI__builtin_s390_vclzg: { 6900 llvm::Type *ResultType = ConvertType(E->getType()); 6901 Value *X = EmitScalarExpr(E->getArg(0)); 6902 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 6903 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 6904 return Builder.CreateCall(F, {X, Undef}); 6905 } 6906 6907 case SystemZ::BI__builtin_s390_vctzb: 6908 case SystemZ::BI__builtin_s390_vctzh: 6909 case SystemZ::BI__builtin_s390_vctzf: 6910 case SystemZ::BI__builtin_s390_vctzg: { 6911 llvm::Type *ResultType = ConvertType(E->getType()); 6912 Value *X = EmitScalarExpr(E->getArg(0)); 6913 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 6914 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 6915 return Builder.CreateCall(F, {X, Undef}); 6916 } 6917 6918 case SystemZ::BI__builtin_s390_vfsqdb: { 6919 llvm::Type *ResultType = ConvertType(E->getType()); 6920 Value *X = EmitScalarExpr(E->getArg(0)); 6921 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, ResultType); 6922 return Builder.CreateCall(F, X); 6923 } 6924 case SystemZ::BI__builtin_s390_vfmadb: { 6925 llvm::Type *ResultType = ConvertType(E->getType()); 6926 Value *X = EmitScalarExpr(E->getArg(0)); 6927 Value *Y = EmitScalarExpr(E->getArg(1)); 6928 Value *Z = EmitScalarExpr(E->getArg(2)); 6929 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 6930 return Builder.CreateCall(F, {X, Y, Z}); 6931 } 6932 case SystemZ::BI__builtin_s390_vfmsdb: { 6933 llvm::Type *ResultType = ConvertType(E->getType()); 6934 Value *X = EmitScalarExpr(E->getArg(0)); 6935 Value *Y = EmitScalarExpr(E->getArg(1)); 6936 Value *Z = EmitScalarExpr(E->getArg(2)); 6937 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 6938 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 6939 return Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 6940 } 6941 case SystemZ::BI__builtin_s390_vflpdb: { 6942 llvm::Type *ResultType = ConvertType(E->getType()); 6943 Value *X = EmitScalarExpr(E->getArg(0)); 6944 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 6945 return Builder.CreateCall(F, X); 6946 } 6947 case SystemZ::BI__builtin_s390_vflndb: { 6948 llvm::Type *ResultType = ConvertType(E->getType()); 6949 Value *X = EmitScalarExpr(E->getArg(0)); 6950 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 6951 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 6952 return Builder.CreateFSub(Zero, Builder.CreateCall(F, X), "sub"); 6953 } 6954 case SystemZ::BI__builtin_s390_vfidb: { 6955 llvm::Type *ResultType = ConvertType(E->getType()); 6956 Value *X = EmitScalarExpr(E->getArg(0)); 6957 // Constant-fold the M4 and M5 mask arguments. 6958 llvm::APSInt M4, M5; 6959 bool IsConstM4 = E->getArg(1)->isIntegerConstantExpr(M4, getContext()); 6960 bool IsConstM5 = E->getArg(2)->isIntegerConstantExpr(M5, getContext()); 6961 assert(IsConstM4 && IsConstM5 && "Constant arg isn't actually constant?"); 6962 (void)IsConstM4; (void)IsConstM5; 6963 // Check whether this instance of vfidb can be represented via a LLVM 6964 // standard intrinsic. We only support some combinations of M4 and M5. 6965 Intrinsic::ID ID = Intrinsic::not_intrinsic; 6966 switch (M4.getZExtValue()) { 6967 default: break; 6968 case 0: // IEEE-inexact exception allowed 6969 switch (M5.getZExtValue()) { 6970 default: break; 6971 case 0: ID = Intrinsic::rint; break; 6972 } 6973 break; 6974 case 4: // IEEE-inexact exception suppressed 6975 switch (M5.getZExtValue()) { 6976 default: break; 6977 case 0: ID = Intrinsic::nearbyint; break; 6978 case 1: ID = Intrinsic::round; break; 6979 case 5: ID = Intrinsic::trunc; break; 6980 case 6: ID = Intrinsic::ceil; break; 6981 case 7: ID = Intrinsic::floor; break; 6982 } 6983 break; 6984 } 6985 if (ID != Intrinsic::not_intrinsic) { 6986 Function *F = CGM.getIntrinsic(ID, ResultType); 6987 return Builder.CreateCall(F, X); 6988 } 6989 Function *F = CGM.getIntrinsic(Intrinsic::s390_vfidb); 6990 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 6991 Value *M5Value = llvm::ConstantInt::get(getLLVMContext(), M5); 6992 return Builder.CreateCall(F, {X, M4Value, M5Value}); 6993 } 6994 6995 // Vector intrisincs that output the post-instruction CC value. 6996 6997 #define INTRINSIC_WITH_CC(NAME) \ 6998 case SystemZ::BI__builtin_##NAME: \ 6999 return EmitSystemZIntrinsicWithCC(*this, Intrinsic::NAME, E) 7000 7001 INTRINSIC_WITH_CC(s390_vpkshs); 7002 INTRINSIC_WITH_CC(s390_vpksfs); 7003 INTRINSIC_WITH_CC(s390_vpksgs); 7004 7005 INTRINSIC_WITH_CC(s390_vpklshs); 7006 INTRINSIC_WITH_CC(s390_vpklsfs); 7007 INTRINSIC_WITH_CC(s390_vpklsgs); 7008 7009 INTRINSIC_WITH_CC(s390_vceqbs); 7010 INTRINSIC_WITH_CC(s390_vceqhs); 7011 INTRINSIC_WITH_CC(s390_vceqfs); 7012 INTRINSIC_WITH_CC(s390_vceqgs); 7013 7014 INTRINSIC_WITH_CC(s390_vchbs); 7015 INTRINSIC_WITH_CC(s390_vchhs); 7016 INTRINSIC_WITH_CC(s390_vchfs); 7017 INTRINSIC_WITH_CC(s390_vchgs); 7018 7019 INTRINSIC_WITH_CC(s390_vchlbs); 7020 INTRINSIC_WITH_CC(s390_vchlhs); 7021 INTRINSIC_WITH_CC(s390_vchlfs); 7022 INTRINSIC_WITH_CC(s390_vchlgs); 7023 7024 INTRINSIC_WITH_CC(s390_vfaebs); 7025 INTRINSIC_WITH_CC(s390_vfaehs); 7026 INTRINSIC_WITH_CC(s390_vfaefs); 7027 7028 INTRINSIC_WITH_CC(s390_vfaezbs); 7029 INTRINSIC_WITH_CC(s390_vfaezhs); 7030 INTRINSIC_WITH_CC(s390_vfaezfs); 7031 7032 INTRINSIC_WITH_CC(s390_vfeebs); 7033 INTRINSIC_WITH_CC(s390_vfeehs); 7034 INTRINSIC_WITH_CC(s390_vfeefs); 7035 7036 INTRINSIC_WITH_CC(s390_vfeezbs); 7037 INTRINSIC_WITH_CC(s390_vfeezhs); 7038 INTRINSIC_WITH_CC(s390_vfeezfs); 7039 7040 INTRINSIC_WITH_CC(s390_vfenebs); 7041 INTRINSIC_WITH_CC(s390_vfenehs); 7042 INTRINSIC_WITH_CC(s390_vfenefs); 7043 7044 INTRINSIC_WITH_CC(s390_vfenezbs); 7045 INTRINSIC_WITH_CC(s390_vfenezhs); 7046 INTRINSIC_WITH_CC(s390_vfenezfs); 7047 7048 INTRINSIC_WITH_CC(s390_vistrbs); 7049 INTRINSIC_WITH_CC(s390_vistrhs); 7050 INTRINSIC_WITH_CC(s390_vistrfs); 7051 7052 INTRINSIC_WITH_CC(s390_vstrcbs); 7053 INTRINSIC_WITH_CC(s390_vstrchs); 7054 INTRINSIC_WITH_CC(s390_vstrcfs); 7055 7056 INTRINSIC_WITH_CC(s390_vstrczbs); 7057 INTRINSIC_WITH_CC(s390_vstrczhs); 7058 INTRINSIC_WITH_CC(s390_vstrczfs); 7059 7060 INTRINSIC_WITH_CC(s390_vfcedbs); 7061 INTRINSIC_WITH_CC(s390_vfchdbs); 7062 INTRINSIC_WITH_CC(s390_vfchedbs); 7063 7064 INTRINSIC_WITH_CC(s390_vftcidb); 7065 7066 #undef INTRINSIC_WITH_CC 7067 7068 default: 7069 return nullptr; 7070 } 7071 } 7072 7073 Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, 7074 const CallExpr *E) { 7075 switch (BuiltinID) { 7076 case NVPTX::BI__nvvm_atom_add_gen_i: 7077 case NVPTX::BI__nvvm_atom_add_gen_l: 7078 case NVPTX::BI__nvvm_atom_add_gen_ll: 7079 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Add, E); 7080 7081 case NVPTX::BI__nvvm_atom_sub_gen_i: 7082 case NVPTX::BI__nvvm_atom_sub_gen_l: 7083 case NVPTX::BI__nvvm_atom_sub_gen_ll: 7084 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Sub, E); 7085 7086 case NVPTX::BI__nvvm_atom_and_gen_i: 7087 case NVPTX::BI__nvvm_atom_and_gen_l: 7088 case NVPTX::BI__nvvm_atom_and_gen_ll: 7089 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::And, E); 7090 7091 case NVPTX::BI__nvvm_atom_or_gen_i: 7092 case NVPTX::BI__nvvm_atom_or_gen_l: 7093 case NVPTX::BI__nvvm_atom_or_gen_ll: 7094 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Or, E); 7095 7096 case NVPTX::BI__nvvm_atom_xor_gen_i: 7097 case NVPTX::BI__nvvm_atom_xor_gen_l: 7098 case NVPTX::BI__nvvm_atom_xor_gen_ll: 7099 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xor, E); 7100 7101 case NVPTX::BI__nvvm_atom_xchg_gen_i: 7102 case NVPTX::BI__nvvm_atom_xchg_gen_l: 7103 case NVPTX::BI__nvvm_atom_xchg_gen_ll: 7104 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xchg, E); 7105 7106 case NVPTX::BI__nvvm_atom_max_gen_i: 7107 case NVPTX::BI__nvvm_atom_max_gen_l: 7108 case NVPTX::BI__nvvm_atom_max_gen_ll: 7109 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Max, E); 7110 7111 case NVPTX::BI__nvvm_atom_max_gen_ui: 7112 case NVPTX::BI__nvvm_atom_max_gen_ul: 7113 case NVPTX::BI__nvvm_atom_max_gen_ull: 7114 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMax, E); 7115 7116 case NVPTX::BI__nvvm_atom_min_gen_i: 7117 case NVPTX::BI__nvvm_atom_min_gen_l: 7118 case NVPTX::BI__nvvm_atom_min_gen_ll: 7119 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Min, E); 7120 7121 case NVPTX::BI__nvvm_atom_min_gen_ui: 7122 case NVPTX::BI__nvvm_atom_min_gen_ul: 7123 case NVPTX::BI__nvvm_atom_min_gen_ull: 7124 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMin, E); 7125 7126 case NVPTX::BI__nvvm_atom_cas_gen_i: 7127 case NVPTX::BI__nvvm_atom_cas_gen_l: 7128 case NVPTX::BI__nvvm_atom_cas_gen_ll: 7129 // __nvvm_atom_cas_gen_* should return the old value rather than the 7130 // success flag. 7131 return MakeAtomicCmpXchgValue(*this, E, /*ReturnBool=*/false); 7132 7133 case NVPTX::BI__nvvm_atom_add_gen_f: { 7134 Value *Ptr = EmitScalarExpr(E->getArg(0)); 7135 Value *Val = EmitScalarExpr(E->getArg(1)); 7136 // atomicrmw only deals with integer arguments so we need to use 7137 // LLVM's nvvm_atomic_load_add_f32 intrinsic for that. 7138 Value *FnALAF32 = 7139 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f32, Ptr->getType()); 7140 return Builder.CreateCall(FnALAF32, {Ptr, Val}); 7141 } 7142 7143 default: 7144 return nullptr; 7145 } 7146 } 7147 7148 Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, 7149 const CallExpr *E) { 7150 switch (BuiltinID) { 7151 case WebAssembly::BI__builtin_wasm_page_size: { 7152 llvm::Type *ResultType = ConvertType(E->getType()); 7153 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_page_size, ResultType); 7154 return Builder.CreateCall(Callee); 7155 } 7156 case WebAssembly::BI__builtin_wasm_memory_size: { 7157 llvm::Type *ResultType = ConvertType(E->getType()); 7158 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_memory_size, ResultType); 7159 return Builder.CreateCall(Callee); 7160 } 7161 case WebAssembly::BI__builtin_wasm_resize_memory: { 7162 Value *X = EmitScalarExpr(E->getArg(0)); 7163 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_resize_memory, X->getType()); 7164 return Builder.CreateCall(Callee, X); 7165 } 7166 7167 default: 7168 return nullptr; 7169 } 7170 } 7171