1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This contains code to emit Builtin calls as LLVM code. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "CodeGenFunction.h" 15 #include "CGObjCRuntime.h" 16 #include "CodeGenModule.h" 17 #include "TargetInfo.h" 18 #include "clang/AST/ASTContext.h" 19 #include "clang/AST/Decl.h" 20 #include "clang/Basic/TargetBuiltins.h" 21 #include "clang/Basic/TargetInfo.h" 22 #include "llvm/IR/DataLayout.h" 23 #include "llvm/IR/Intrinsics.h" 24 25 using namespace clang; 26 using namespace CodeGen; 27 using namespace llvm; 28 29 /// getBuiltinLibFunction - Given a builtin id for a function like 30 /// "__builtin_fabsf", return a Function* for "fabsf". 31 llvm::Value *CodeGenModule::getBuiltinLibFunction(const FunctionDecl *FD, 32 unsigned BuiltinID) { 33 assert(Context.BuiltinInfo.isLibFunction(BuiltinID)); 34 35 // Get the name, skip over the __builtin_ prefix (if necessary). 36 StringRef Name; 37 GlobalDecl D(FD); 38 39 // If the builtin has been declared explicitly with an assembler label, 40 // use the mangled name. This differs from the plain label on platforms 41 // that prefix labels. 42 if (FD->hasAttr<AsmLabelAttr>()) 43 Name = getMangledName(D); 44 else 45 Name = Context.BuiltinInfo.GetName(BuiltinID) + 10; 46 47 llvm::FunctionType *Ty = 48 cast<llvm::FunctionType>(getTypes().ConvertType(FD->getType())); 49 50 return GetOrCreateLLVMFunction(Name, Ty, D, /*ForVTable=*/false); 51 } 52 53 /// Emit the conversions required to turn the given value into an 54 /// integer of the given size. 55 static Value *EmitToInt(CodeGenFunction &CGF, llvm::Value *V, 56 QualType T, llvm::IntegerType *IntType) { 57 V = CGF.EmitToMemory(V, T); 58 59 if (V->getType()->isPointerTy()) 60 return CGF.Builder.CreatePtrToInt(V, IntType); 61 62 assert(V->getType() == IntType); 63 return V; 64 } 65 66 static Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V, 67 QualType T, llvm::Type *ResultType) { 68 V = CGF.EmitFromMemory(V, T); 69 70 if (ResultType->isPointerTy()) 71 return CGF.Builder.CreateIntToPtr(V, ResultType); 72 73 assert(V->getType() == ResultType); 74 return V; 75 } 76 77 /// Utility to insert an atomic instruction based on Instrinsic::ID 78 /// and the expression node. 79 static RValue EmitBinaryAtomic(CodeGenFunction &CGF, 80 llvm::AtomicRMWInst::BinOp Kind, 81 const CallExpr *E) { 82 QualType T = E->getType(); 83 assert(E->getArg(0)->getType()->isPointerType()); 84 assert(CGF.getContext().hasSameUnqualifiedType(T, 85 E->getArg(0)->getType()->getPointeeType())); 86 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 87 88 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 89 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 90 91 llvm::IntegerType *IntType = 92 llvm::IntegerType::get(CGF.getLLVMContext(), 93 CGF.getContext().getTypeSize(T)); 94 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 95 96 llvm::Value *Args[2]; 97 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 98 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 99 llvm::Type *ValueType = Args[1]->getType(); 100 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 101 102 llvm::Value *Result = 103 CGF.Builder.CreateAtomicRMW(Kind, Args[0], Args[1], 104 llvm::SequentiallyConsistent); 105 Result = EmitFromInt(CGF, Result, T, ValueType); 106 return RValue::get(Result); 107 } 108 109 /// Utility to insert an atomic instruction based Instrinsic::ID and 110 /// the expression node, where the return value is the result of the 111 /// operation. 112 static RValue EmitBinaryAtomicPost(CodeGenFunction &CGF, 113 llvm::AtomicRMWInst::BinOp Kind, 114 const CallExpr *E, 115 Instruction::BinaryOps Op) { 116 QualType T = E->getType(); 117 assert(E->getArg(0)->getType()->isPointerType()); 118 assert(CGF.getContext().hasSameUnqualifiedType(T, 119 E->getArg(0)->getType()->getPointeeType())); 120 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 121 122 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 123 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 124 125 llvm::IntegerType *IntType = 126 llvm::IntegerType::get(CGF.getLLVMContext(), 127 CGF.getContext().getTypeSize(T)); 128 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 129 130 llvm::Value *Args[2]; 131 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 132 llvm::Type *ValueType = Args[1]->getType(); 133 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 134 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 135 136 llvm::Value *Result = 137 CGF.Builder.CreateAtomicRMW(Kind, Args[0], Args[1], 138 llvm::SequentiallyConsistent); 139 Result = CGF.Builder.CreateBinOp(Op, Result, Args[1]); 140 Result = EmitFromInt(CGF, Result, T, ValueType); 141 return RValue::get(Result); 142 } 143 144 /// EmitFAbs - Emit a call to fabs/fabsf/fabsl, depending on the type of ValTy, 145 /// which must be a scalar floating point type. 146 static Value *EmitFAbs(CodeGenFunction &CGF, Value *V, QualType ValTy) { 147 const BuiltinType *ValTyP = ValTy->getAs<BuiltinType>(); 148 assert(ValTyP && "isn't scalar fp type!"); 149 150 StringRef FnName; 151 switch (ValTyP->getKind()) { 152 default: llvm_unreachable("Isn't a scalar fp type!"); 153 case BuiltinType::Float: FnName = "fabsf"; break; 154 case BuiltinType::Double: FnName = "fabs"; break; 155 case BuiltinType::LongDouble: FnName = "fabsl"; break; 156 } 157 158 // The prototype is something that takes and returns whatever V's type is. 159 llvm::FunctionType *FT = llvm::FunctionType::get(V->getType(), V->getType(), 160 false); 161 llvm::Value *Fn = CGF.CGM.CreateRuntimeFunction(FT, FnName); 162 163 return CGF.EmitNounwindRuntimeCall(Fn, V, "abs"); 164 } 165 166 static RValue emitLibraryCall(CodeGenFunction &CGF, const FunctionDecl *Fn, 167 const CallExpr *E, llvm::Value *calleeValue) { 168 return CGF.EmitCall(E->getCallee()->getType(), calleeValue, E->getLocStart(), 169 ReturnValueSlot(), E->arg_begin(), E->arg_end(), Fn); 170 } 171 172 /// \brief Emit a call to llvm.{sadd,uadd,ssub,usub,smul,umul}.with.overflow.* 173 /// depending on IntrinsicID. 174 /// 175 /// \arg CGF The current codegen function. 176 /// \arg IntrinsicID The ID for the Intrinsic we wish to generate. 177 /// \arg X The first argument to the llvm.*.with.overflow.*. 178 /// \arg Y The second argument to the llvm.*.with.overflow.*. 179 /// \arg Carry The carry returned by the llvm.*.with.overflow.*. 180 /// \returns The result (i.e. sum/product) returned by the intrinsic. 181 static llvm::Value *EmitOverflowIntrinsic(CodeGenFunction &CGF, 182 const llvm::Intrinsic::ID IntrinsicID, 183 llvm::Value *X, llvm::Value *Y, 184 llvm::Value *&Carry) { 185 // Make sure we have integers of the same width. 186 assert(X->getType() == Y->getType() && 187 "Arguments must be the same type. (Did you forget to make sure both " 188 "arguments have the same integer width?)"); 189 190 llvm::Value *Callee = CGF.CGM.getIntrinsic(IntrinsicID, X->getType()); 191 llvm::Value *Tmp = CGF.Builder.CreateCall2(Callee, X, Y); 192 Carry = CGF.Builder.CreateExtractValue(Tmp, 1); 193 return CGF.Builder.CreateExtractValue(Tmp, 0); 194 } 195 196 RValue CodeGenFunction::EmitBuiltinExpr(const FunctionDecl *FD, 197 unsigned BuiltinID, const CallExpr *E) { 198 // See if we can constant fold this builtin. If so, don't emit it at all. 199 Expr::EvalResult Result; 200 if (E->EvaluateAsRValue(Result, CGM.getContext()) && 201 !Result.hasSideEffects()) { 202 if (Result.Val.isInt()) 203 return RValue::get(llvm::ConstantInt::get(getLLVMContext(), 204 Result.Val.getInt())); 205 if (Result.Val.isFloat()) 206 return RValue::get(llvm::ConstantFP::get(getLLVMContext(), 207 Result.Val.getFloat())); 208 } 209 210 switch (BuiltinID) { 211 default: break; // Handle intrinsics and libm functions below. 212 case Builtin::BI__builtin___CFStringMakeConstantString: 213 case Builtin::BI__builtin___NSStringMakeConstantString: 214 return RValue::get(CGM.EmitConstantExpr(E, E->getType(), 0)); 215 case Builtin::BI__builtin_stdarg_start: 216 case Builtin::BI__builtin_va_start: 217 case Builtin::BI__builtin_va_end: { 218 Value *ArgValue = EmitVAListRef(E->getArg(0)); 219 llvm::Type *DestType = Int8PtrTy; 220 if (ArgValue->getType() != DestType) 221 ArgValue = Builder.CreateBitCast(ArgValue, DestType, 222 ArgValue->getName().data()); 223 224 Intrinsic::ID inst = (BuiltinID == Builtin::BI__builtin_va_end) ? 225 Intrinsic::vaend : Intrinsic::vastart; 226 return RValue::get(Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue)); 227 } 228 case Builtin::BI__builtin_va_copy: { 229 Value *DstPtr = EmitVAListRef(E->getArg(0)); 230 Value *SrcPtr = EmitVAListRef(E->getArg(1)); 231 232 llvm::Type *Type = Int8PtrTy; 233 234 DstPtr = Builder.CreateBitCast(DstPtr, Type); 235 SrcPtr = Builder.CreateBitCast(SrcPtr, Type); 236 return RValue::get(Builder.CreateCall2(CGM.getIntrinsic(Intrinsic::vacopy), 237 DstPtr, SrcPtr)); 238 } 239 case Builtin::BI__builtin_abs: 240 case Builtin::BI__builtin_labs: 241 case Builtin::BI__builtin_llabs: { 242 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 243 244 Value *NegOp = Builder.CreateNeg(ArgValue, "neg"); 245 Value *CmpResult = 246 Builder.CreateICmpSGE(ArgValue, 247 llvm::Constant::getNullValue(ArgValue->getType()), 248 "abscond"); 249 Value *Result = 250 Builder.CreateSelect(CmpResult, ArgValue, NegOp, "abs"); 251 252 return RValue::get(Result); 253 } 254 255 case Builtin::BI__builtin_conj: 256 case Builtin::BI__builtin_conjf: 257 case Builtin::BI__builtin_conjl: { 258 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 259 Value *Real = ComplexVal.first; 260 Value *Imag = ComplexVal.second; 261 Value *Zero = 262 Imag->getType()->isFPOrFPVectorTy() 263 ? llvm::ConstantFP::getZeroValueForNegation(Imag->getType()) 264 : llvm::Constant::getNullValue(Imag->getType()); 265 266 Imag = Builder.CreateFSub(Zero, Imag, "sub"); 267 return RValue::getComplex(std::make_pair(Real, Imag)); 268 } 269 case Builtin::BI__builtin_creal: 270 case Builtin::BI__builtin_crealf: 271 case Builtin::BI__builtin_creall: 272 case Builtin::BIcreal: 273 case Builtin::BIcrealf: 274 case Builtin::BIcreall: { 275 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 276 return RValue::get(ComplexVal.first); 277 } 278 279 case Builtin::BI__builtin_cimag: 280 case Builtin::BI__builtin_cimagf: 281 case Builtin::BI__builtin_cimagl: 282 case Builtin::BIcimag: 283 case Builtin::BIcimagf: 284 case Builtin::BIcimagl: { 285 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 286 return RValue::get(ComplexVal.second); 287 } 288 289 case Builtin::BI__builtin_ctzs: 290 case Builtin::BI__builtin_ctz: 291 case Builtin::BI__builtin_ctzl: 292 case Builtin::BI__builtin_ctzll: { 293 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 294 295 llvm::Type *ArgType = ArgValue->getType(); 296 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 297 298 llvm::Type *ResultType = ConvertType(E->getType()); 299 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 300 Value *Result = Builder.CreateCall2(F, ArgValue, ZeroUndef); 301 if (Result->getType() != ResultType) 302 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 303 "cast"); 304 return RValue::get(Result); 305 } 306 case Builtin::BI__builtin_clzs: 307 case Builtin::BI__builtin_clz: 308 case Builtin::BI__builtin_clzl: 309 case Builtin::BI__builtin_clzll: { 310 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 311 312 llvm::Type *ArgType = ArgValue->getType(); 313 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 314 315 llvm::Type *ResultType = ConvertType(E->getType()); 316 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 317 Value *Result = Builder.CreateCall2(F, ArgValue, ZeroUndef); 318 if (Result->getType() != ResultType) 319 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 320 "cast"); 321 return RValue::get(Result); 322 } 323 case Builtin::BI__builtin_ffs: 324 case Builtin::BI__builtin_ffsl: 325 case Builtin::BI__builtin_ffsll: { 326 // ffs(x) -> x ? cttz(x) + 1 : 0 327 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 328 329 llvm::Type *ArgType = ArgValue->getType(); 330 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 331 332 llvm::Type *ResultType = ConvertType(E->getType()); 333 Value *Tmp = Builder.CreateAdd(Builder.CreateCall2(F, ArgValue, 334 Builder.getTrue()), 335 llvm::ConstantInt::get(ArgType, 1)); 336 Value *Zero = llvm::Constant::getNullValue(ArgType); 337 Value *IsZero = Builder.CreateICmpEQ(ArgValue, Zero, "iszero"); 338 Value *Result = Builder.CreateSelect(IsZero, Zero, Tmp, "ffs"); 339 if (Result->getType() != ResultType) 340 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 341 "cast"); 342 return RValue::get(Result); 343 } 344 case Builtin::BI__builtin_parity: 345 case Builtin::BI__builtin_parityl: 346 case Builtin::BI__builtin_parityll: { 347 // parity(x) -> ctpop(x) & 1 348 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 349 350 llvm::Type *ArgType = ArgValue->getType(); 351 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 352 353 llvm::Type *ResultType = ConvertType(E->getType()); 354 Value *Tmp = Builder.CreateCall(F, ArgValue); 355 Value *Result = Builder.CreateAnd(Tmp, llvm::ConstantInt::get(ArgType, 1)); 356 if (Result->getType() != ResultType) 357 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 358 "cast"); 359 return RValue::get(Result); 360 } 361 case Builtin::BI__builtin_popcount: 362 case Builtin::BI__builtin_popcountl: 363 case Builtin::BI__builtin_popcountll: { 364 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 365 366 llvm::Type *ArgType = ArgValue->getType(); 367 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 368 369 llvm::Type *ResultType = ConvertType(E->getType()); 370 Value *Result = Builder.CreateCall(F, ArgValue); 371 if (Result->getType() != ResultType) 372 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 373 "cast"); 374 return RValue::get(Result); 375 } 376 case Builtin::BI__builtin_expect: { 377 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 378 llvm::Type *ArgType = ArgValue->getType(); 379 380 Value *FnExpect = CGM.getIntrinsic(Intrinsic::expect, ArgType); 381 Value *ExpectedValue = EmitScalarExpr(E->getArg(1)); 382 383 Value *Result = Builder.CreateCall2(FnExpect, ArgValue, ExpectedValue, 384 "expval"); 385 return RValue::get(Result); 386 } 387 case Builtin::BI__builtin_bswap16: 388 case Builtin::BI__builtin_bswap32: 389 case Builtin::BI__builtin_bswap64: { 390 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 391 llvm::Type *ArgType = ArgValue->getType(); 392 Value *F = CGM.getIntrinsic(Intrinsic::bswap, ArgType); 393 return RValue::get(Builder.CreateCall(F, ArgValue)); 394 } 395 case Builtin::BI__builtin_object_size: { 396 // We rely on constant folding to deal with expressions with side effects. 397 assert(!E->getArg(0)->HasSideEffects(getContext()) && 398 "should have been constant folded"); 399 400 // We pass this builtin onto the optimizer so that it can 401 // figure out the object size in more complex cases. 402 llvm::Type *ResType = ConvertType(E->getType()); 403 404 // LLVM only supports 0 and 2, make sure that we pass along that 405 // as a boolean. 406 Value *Ty = EmitScalarExpr(E->getArg(1)); 407 ConstantInt *CI = dyn_cast<ConstantInt>(Ty); 408 assert(CI); 409 uint64_t val = CI->getZExtValue(); 410 CI = ConstantInt::get(Builder.getInt1Ty(), (val & 0x2) >> 1); 411 // FIXME: Get right address space. 412 llvm::Type *Tys[] = { ResType, Builder.getInt8PtrTy(0) }; 413 Value *F = CGM.getIntrinsic(Intrinsic::objectsize, Tys); 414 return RValue::get(Builder.CreateCall2(F, EmitScalarExpr(E->getArg(0)),CI)); 415 } 416 case Builtin::BI__builtin_prefetch: { 417 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); 418 // FIXME: Technically these constants should of type 'int', yes? 419 RW = (E->getNumArgs() > 1) ? EmitScalarExpr(E->getArg(1)) : 420 llvm::ConstantInt::get(Int32Ty, 0); 421 Locality = (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : 422 llvm::ConstantInt::get(Int32Ty, 3); 423 Value *Data = llvm::ConstantInt::get(Int32Ty, 1); 424 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 425 return RValue::get(Builder.CreateCall4(F, Address, RW, Locality, Data)); 426 } 427 case Builtin::BI__builtin_readcyclecounter: { 428 Value *F = CGM.getIntrinsic(Intrinsic::readcyclecounter); 429 return RValue::get(Builder.CreateCall(F)); 430 } 431 case Builtin::BI__builtin_trap: { 432 Value *F = CGM.getIntrinsic(Intrinsic::trap); 433 return RValue::get(Builder.CreateCall(F)); 434 } 435 case Builtin::BI__debugbreak: { 436 Value *F = CGM.getIntrinsic(Intrinsic::debugtrap); 437 return RValue::get(Builder.CreateCall(F)); 438 } 439 case Builtin::BI__builtin_unreachable: { 440 if (SanOpts->Unreachable) 441 EmitCheck(Builder.getFalse(), "builtin_unreachable", 442 EmitCheckSourceLocation(E->getExprLoc()), 443 ArrayRef<llvm::Value *>(), CRK_Unrecoverable); 444 else 445 Builder.CreateUnreachable(); 446 447 // We do need to preserve an insertion point. 448 EmitBlock(createBasicBlock("unreachable.cont")); 449 450 return RValue::get(0); 451 } 452 453 case Builtin::BI__builtin_powi: 454 case Builtin::BI__builtin_powif: 455 case Builtin::BI__builtin_powil: { 456 Value *Base = EmitScalarExpr(E->getArg(0)); 457 Value *Exponent = EmitScalarExpr(E->getArg(1)); 458 llvm::Type *ArgType = Base->getType(); 459 Value *F = CGM.getIntrinsic(Intrinsic::powi, ArgType); 460 return RValue::get(Builder.CreateCall2(F, Base, Exponent)); 461 } 462 463 case Builtin::BI__builtin_isgreater: 464 case Builtin::BI__builtin_isgreaterequal: 465 case Builtin::BI__builtin_isless: 466 case Builtin::BI__builtin_islessequal: 467 case Builtin::BI__builtin_islessgreater: 468 case Builtin::BI__builtin_isunordered: { 469 // Ordered comparisons: we know the arguments to these are matching scalar 470 // floating point values. 471 Value *LHS = EmitScalarExpr(E->getArg(0)); 472 Value *RHS = EmitScalarExpr(E->getArg(1)); 473 474 switch (BuiltinID) { 475 default: llvm_unreachable("Unknown ordered comparison"); 476 case Builtin::BI__builtin_isgreater: 477 LHS = Builder.CreateFCmpOGT(LHS, RHS, "cmp"); 478 break; 479 case Builtin::BI__builtin_isgreaterequal: 480 LHS = Builder.CreateFCmpOGE(LHS, RHS, "cmp"); 481 break; 482 case Builtin::BI__builtin_isless: 483 LHS = Builder.CreateFCmpOLT(LHS, RHS, "cmp"); 484 break; 485 case Builtin::BI__builtin_islessequal: 486 LHS = Builder.CreateFCmpOLE(LHS, RHS, "cmp"); 487 break; 488 case Builtin::BI__builtin_islessgreater: 489 LHS = Builder.CreateFCmpONE(LHS, RHS, "cmp"); 490 break; 491 case Builtin::BI__builtin_isunordered: 492 LHS = Builder.CreateFCmpUNO(LHS, RHS, "cmp"); 493 break; 494 } 495 // ZExt bool to int type. 496 return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType()))); 497 } 498 case Builtin::BI__builtin_isnan: { 499 Value *V = EmitScalarExpr(E->getArg(0)); 500 V = Builder.CreateFCmpUNO(V, V, "cmp"); 501 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 502 } 503 504 case Builtin::BI__builtin_isinf: { 505 // isinf(x) --> fabs(x) == infinity 506 Value *V = EmitScalarExpr(E->getArg(0)); 507 V = EmitFAbs(*this, V, E->getArg(0)->getType()); 508 509 V = Builder.CreateFCmpOEQ(V, ConstantFP::getInfinity(V->getType()),"isinf"); 510 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 511 } 512 513 // TODO: BI__builtin_isinf_sign 514 // isinf_sign(x) -> isinf(x) ? (signbit(x) ? -1 : 1) : 0 515 516 case Builtin::BI__builtin_isnormal: { 517 // isnormal(x) --> x == x && fabsf(x) < infinity && fabsf(x) >= float_min 518 Value *V = EmitScalarExpr(E->getArg(0)); 519 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 520 521 Value *Abs = EmitFAbs(*this, V, E->getArg(0)->getType()); 522 Value *IsLessThanInf = 523 Builder.CreateFCmpULT(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 524 APFloat Smallest = APFloat::getSmallestNormalized( 525 getContext().getFloatTypeSemantics(E->getArg(0)->getType())); 526 Value *IsNormal = 527 Builder.CreateFCmpUGE(Abs, ConstantFP::get(V->getContext(), Smallest), 528 "isnormal"); 529 V = Builder.CreateAnd(Eq, IsLessThanInf, "and"); 530 V = Builder.CreateAnd(V, IsNormal, "and"); 531 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 532 } 533 534 case Builtin::BI__builtin_isfinite: { 535 // isfinite(x) --> x == x && fabs(x) != infinity; 536 Value *V = EmitScalarExpr(E->getArg(0)); 537 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 538 539 Value *Abs = EmitFAbs(*this, V, E->getArg(0)->getType()); 540 Value *IsNotInf = 541 Builder.CreateFCmpUNE(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 542 543 V = Builder.CreateAnd(Eq, IsNotInf, "and"); 544 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 545 } 546 547 case Builtin::BI__builtin_fpclassify: { 548 Value *V = EmitScalarExpr(E->getArg(5)); 549 llvm::Type *Ty = ConvertType(E->getArg(5)->getType()); 550 551 // Create Result 552 BasicBlock *Begin = Builder.GetInsertBlock(); 553 BasicBlock *End = createBasicBlock("fpclassify_end", this->CurFn); 554 Builder.SetInsertPoint(End); 555 PHINode *Result = 556 Builder.CreatePHI(ConvertType(E->getArg(0)->getType()), 4, 557 "fpclassify_result"); 558 559 // if (V==0) return FP_ZERO 560 Builder.SetInsertPoint(Begin); 561 Value *IsZero = Builder.CreateFCmpOEQ(V, Constant::getNullValue(Ty), 562 "iszero"); 563 Value *ZeroLiteral = EmitScalarExpr(E->getArg(4)); 564 BasicBlock *NotZero = createBasicBlock("fpclassify_not_zero", this->CurFn); 565 Builder.CreateCondBr(IsZero, End, NotZero); 566 Result->addIncoming(ZeroLiteral, Begin); 567 568 // if (V != V) return FP_NAN 569 Builder.SetInsertPoint(NotZero); 570 Value *IsNan = Builder.CreateFCmpUNO(V, V, "cmp"); 571 Value *NanLiteral = EmitScalarExpr(E->getArg(0)); 572 BasicBlock *NotNan = createBasicBlock("fpclassify_not_nan", this->CurFn); 573 Builder.CreateCondBr(IsNan, End, NotNan); 574 Result->addIncoming(NanLiteral, NotZero); 575 576 // if (fabs(V) == infinity) return FP_INFINITY 577 Builder.SetInsertPoint(NotNan); 578 Value *VAbs = EmitFAbs(*this, V, E->getArg(5)->getType()); 579 Value *IsInf = 580 Builder.CreateFCmpOEQ(VAbs, ConstantFP::getInfinity(V->getType()), 581 "isinf"); 582 Value *InfLiteral = EmitScalarExpr(E->getArg(1)); 583 BasicBlock *NotInf = createBasicBlock("fpclassify_not_inf", this->CurFn); 584 Builder.CreateCondBr(IsInf, End, NotInf); 585 Result->addIncoming(InfLiteral, NotNan); 586 587 // if (fabs(V) >= MIN_NORMAL) return FP_NORMAL else FP_SUBNORMAL 588 Builder.SetInsertPoint(NotInf); 589 APFloat Smallest = APFloat::getSmallestNormalized( 590 getContext().getFloatTypeSemantics(E->getArg(5)->getType())); 591 Value *IsNormal = 592 Builder.CreateFCmpUGE(VAbs, ConstantFP::get(V->getContext(), Smallest), 593 "isnormal"); 594 Value *NormalResult = 595 Builder.CreateSelect(IsNormal, EmitScalarExpr(E->getArg(2)), 596 EmitScalarExpr(E->getArg(3))); 597 Builder.CreateBr(End); 598 Result->addIncoming(NormalResult, NotInf); 599 600 // return Result 601 Builder.SetInsertPoint(End); 602 return RValue::get(Result); 603 } 604 605 case Builtin::BIalloca: 606 case Builtin::BI__builtin_alloca: { 607 Value *Size = EmitScalarExpr(E->getArg(0)); 608 return RValue::get(Builder.CreateAlloca(Builder.getInt8Ty(), Size)); 609 } 610 case Builtin::BIbzero: 611 case Builtin::BI__builtin_bzero: { 612 std::pair<llvm::Value*, unsigned> Dest = 613 EmitPointerWithAlignment(E->getArg(0)); 614 Value *SizeVal = EmitScalarExpr(E->getArg(1)); 615 Builder.CreateMemSet(Dest.first, Builder.getInt8(0), SizeVal, 616 Dest.second, false); 617 return RValue::get(Dest.first); 618 } 619 case Builtin::BImemcpy: 620 case Builtin::BI__builtin_memcpy: { 621 std::pair<llvm::Value*, unsigned> Dest = 622 EmitPointerWithAlignment(E->getArg(0)); 623 std::pair<llvm::Value*, unsigned> Src = 624 EmitPointerWithAlignment(E->getArg(1)); 625 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 626 unsigned Align = std::min(Dest.second, Src.second); 627 Builder.CreateMemCpy(Dest.first, Src.first, SizeVal, Align, false); 628 return RValue::get(Dest.first); 629 } 630 631 case Builtin::BI__builtin___memcpy_chk: { 632 // fold __builtin_memcpy_chk(x, y, cst1, cst2) to memcpy iff cst1<=cst2. 633 llvm::APSInt Size, DstSize; 634 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 635 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 636 break; 637 if (Size.ugt(DstSize)) 638 break; 639 std::pair<llvm::Value*, unsigned> Dest = 640 EmitPointerWithAlignment(E->getArg(0)); 641 std::pair<llvm::Value*, unsigned> Src = 642 EmitPointerWithAlignment(E->getArg(1)); 643 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 644 unsigned Align = std::min(Dest.second, Src.second); 645 Builder.CreateMemCpy(Dest.first, Src.first, SizeVal, Align, false); 646 return RValue::get(Dest.first); 647 } 648 649 case Builtin::BI__builtin_objc_memmove_collectable: { 650 Value *Address = EmitScalarExpr(E->getArg(0)); 651 Value *SrcAddr = EmitScalarExpr(E->getArg(1)); 652 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 653 CGM.getObjCRuntime().EmitGCMemmoveCollectable(*this, 654 Address, SrcAddr, SizeVal); 655 return RValue::get(Address); 656 } 657 658 case Builtin::BI__builtin___memmove_chk: { 659 // fold __builtin_memmove_chk(x, y, cst1, cst2) to memmove iff cst1<=cst2. 660 llvm::APSInt Size, DstSize; 661 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 662 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 663 break; 664 if (Size.ugt(DstSize)) 665 break; 666 std::pair<llvm::Value*, unsigned> Dest = 667 EmitPointerWithAlignment(E->getArg(0)); 668 std::pair<llvm::Value*, unsigned> Src = 669 EmitPointerWithAlignment(E->getArg(1)); 670 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 671 unsigned Align = std::min(Dest.second, Src.second); 672 Builder.CreateMemMove(Dest.first, Src.first, SizeVal, Align, false); 673 return RValue::get(Dest.first); 674 } 675 676 case Builtin::BImemmove: 677 case Builtin::BI__builtin_memmove: { 678 std::pair<llvm::Value*, unsigned> Dest = 679 EmitPointerWithAlignment(E->getArg(0)); 680 std::pair<llvm::Value*, unsigned> Src = 681 EmitPointerWithAlignment(E->getArg(1)); 682 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 683 unsigned Align = std::min(Dest.second, Src.second); 684 Builder.CreateMemMove(Dest.first, Src.first, SizeVal, Align, false); 685 return RValue::get(Dest.first); 686 } 687 case Builtin::BImemset: 688 case Builtin::BI__builtin_memset: { 689 std::pair<llvm::Value*, unsigned> Dest = 690 EmitPointerWithAlignment(E->getArg(0)); 691 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 692 Builder.getInt8Ty()); 693 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 694 Builder.CreateMemSet(Dest.first, ByteVal, SizeVal, Dest.second, false); 695 return RValue::get(Dest.first); 696 } 697 case Builtin::BI__builtin___memset_chk: { 698 // fold __builtin_memset_chk(x, y, cst1, cst2) to memset iff cst1<=cst2. 699 llvm::APSInt Size, DstSize; 700 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 701 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 702 break; 703 if (Size.ugt(DstSize)) 704 break; 705 std::pair<llvm::Value*, unsigned> Dest = 706 EmitPointerWithAlignment(E->getArg(0)); 707 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 708 Builder.getInt8Ty()); 709 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 710 Builder.CreateMemSet(Dest.first, ByteVal, SizeVal, Dest.second, false); 711 return RValue::get(Dest.first); 712 } 713 case Builtin::BI__builtin_dwarf_cfa: { 714 // The offset in bytes from the first argument to the CFA. 715 // 716 // Why on earth is this in the frontend? Is there any reason at 717 // all that the backend can't reasonably determine this while 718 // lowering llvm.eh.dwarf.cfa()? 719 // 720 // TODO: If there's a satisfactory reason, add a target hook for 721 // this instead of hard-coding 0, which is correct for most targets. 722 int32_t Offset = 0; 723 724 Value *F = CGM.getIntrinsic(Intrinsic::eh_dwarf_cfa); 725 return RValue::get(Builder.CreateCall(F, 726 llvm::ConstantInt::get(Int32Ty, Offset))); 727 } 728 case Builtin::BI__builtin_return_address: { 729 Value *Depth = EmitScalarExpr(E->getArg(0)); 730 Depth = Builder.CreateIntCast(Depth, Int32Ty, false); 731 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 732 return RValue::get(Builder.CreateCall(F, Depth)); 733 } 734 case Builtin::BI__builtin_frame_address: { 735 Value *Depth = EmitScalarExpr(E->getArg(0)); 736 Depth = Builder.CreateIntCast(Depth, Int32Ty, false); 737 Value *F = CGM.getIntrinsic(Intrinsic::frameaddress); 738 return RValue::get(Builder.CreateCall(F, Depth)); 739 } 740 case Builtin::BI__builtin_extract_return_addr: { 741 Value *Address = EmitScalarExpr(E->getArg(0)); 742 Value *Result = getTargetHooks().decodeReturnAddress(*this, Address); 743 return RValue::get(Result); 744 } 745 case Builtin::BI__builtin_frob_return_addr: { 746 Value *Address = EmitScalarExpr(E->getArg(0)); 747 Value *Result = getTargetHooks().encodeReturnAddress(*this, Address); 748 return RValue::get(Result); 749 } 750 case Builtin::BI__builtin_dwarf_sp_column: { 751 llvm::IntegerType *Ty 752 = cast<llvm::IntegerType>(ConvertType(E->getType())); 753 int Column = getTargetHooks().getDwarfEHStackPointer(CGM); 754 if (Column == -1) { 755 CGM.ErrorUnsupported(E, "__builtin_dwarf_sp_column"); 756 return RValue::get(llvm::UndefValue::get(Ty)); 757 } 758 return RValue::get(llvm::ConstantInt::get(Ty, Column, true)); 759 } 760 case Builtin::BI__builtin_init_dwarf_reg_size_table: { 761 Value *Address = EmitScalarExpr(E->getArg(0)); 762 if (getTargetHooks().initDwarfEHRegSizeTable(*this, Address)) 763 CGM.ErrorUnsupported(E, "__builtin_init_dwarf_reg_size_table"); 764 return RValue::get(llvm::UndefValue::get(ConvertType(E->getType()))); 765 } 766 case Builtin::BI__builtin_eh_return: { 767 Value *Int = EmitScalarExpr(E->getArg(0)); 768 Value *Ptr = EmitScalarExpr(E->getArg(1)); 769 770 llvm::IntegerType *IntTy = cast<llvm::IntegerType>(Int->getType()); 771 assert((IntTy->getBitWidth() == 32 || IntTy->getBitWidth() == 64) && 772 "LLVM's __builtin_eh_return only supports 32- and 64-bit variants"); 773 Value *F = CGM.getIntrinsic(IntTy->getBitWidth() == 32 774 ? Intrinsic::eh_return_i32 775 : Intrinsic::eh_return_i64); 776 Builder.CreateCall2(F, Int, Ptr); 777 Builder.CreateUnreachable(); 778 779 // We do need to preserve an insertion point. 780 EmitBlock(createBasicBlock("builtin_eh_return.cont")); 781 782 return RValue::get(0); 783 } 784 case Builtin::BI__builtin_unwind_init: { 785 Value *F = CGM.getIntrinsic(Intrinsic::eh_unwind_init); 786 return RValue::get(Builder.CreateCall(F)); 787 } 788 case Builtin::BI__builtin_extend_pointer: { 789 // Extends a pointer to the size of an _Unwind_Word, which is 790 // uint64_t on all platforms. Generally this gets poked into a 791 // register and eventually used as an address, so if the 792 // addressing registers are wider than pointers and the platform 793 // doesn't implicitly ignore high-order bits when doing 794 // addressing, we need to make sure we zext / sext based on 795 // the platform's expectations. 796 // 797 // See: http://gcc.gnu.org/ml/gcc-bugs/2002-02/msg00237.html 798 799 // Cast the pointer to intptr_t. 800 Value *Ptr = EmitScalarExpr(E->getArg(0)); 801 Value *Result = Builder.CreatePtrToInt(Ptr, IntPtrTy, "extend.cast"); 802 803 // If that's 64 bits, we're done. 804 if (IntPtrTy->getBitWidth() == 64) 805 return RValue::get(Result); 806 807 // Otherwise, ask the codegen data what to do. 808 if (getTargetHooks().extendPointerWithSExt()) 809 return RValue::get(Builder.CreateSExt(Result, Int64Ty, "extend.sext")); 810 else 811 return RValue::get(Builder.CreateZExt(Result, Int64Ty, "extend.zext")); 812 } 813 case Builtin::BI__builtin_setjmp: { 814 // Buffer is a void**. 815 Value *Buf = EmitScalarExpr(E->getArg(0)); 816 817 // Store the frame pointer to the setjmp buffer. 818 Value *FrameAddr = 819 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 820 ConstantInt::get(Int32Ty, 0)); 821 Builder.CreateStore(FrameAddr, Buf); 822 823 // Store the stack pointer to the setjmp buffer. 824 Value *StackAddr = 825 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::stacksave)); 826 Value *StackSaveSlot = 827 Builder.CreateGEP(Buf, ConstantInt::get(Int32Ty, 2)); 828 Builder.CreateStore(StackAddr, StackSaveSlot); 829 830 // Call LLVM's EH setjmp, which is lightweight. 831 Value *F = CGM.getIntrinsic(Intrinsic::eh_sjlj_setjmp); 832 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 833 return RValue::get(Builder.CreateCall(F, Buf)); 834 } 835 case Builtin::BI__builtin_longjmp: { 836 Value *Buf = EmitScalarExpr(E->getArg(0)); 837 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 838 839 // Call LLVM's EH longjmp, which is lightweight. 840 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::eh_sjlj_longjmp), Buf); 841 842 // longjmp doesn't return; mark this as unreachable. 843 Builder.CreateUnreachable(); 844 845 // We do need to preserve an insertion point. 846 EmitBlock(createBasicBlock("longjmp.cont")); 847 848 return RValue::get(0); 849 } 850 case Builtin::BI__sync_fetch_and_add: 851 case Builtin::BI__sync_fetch_and_sub: 852 case Builtin::BI__sync_fetch_and_or: 853 case Builtin::BI__sync_fetch_and_and: 854 case Builtin::BI__sync_fetch_and_xor: 855 case Builtin::BI__sync_add_and_fetch: 856 case Builtin::BI__sync_sub_and_fetch: 857 case Builtin::BI__sync_and_and_fetch: 858 case Builtin::BI__sync_or_and_fetch: 859 case Builtin::BI__sync_xor_and_fetch: 860 case Builtin::BI__sync_val_compare_and_swap: 861 case Builtin::BI__sync_bool_compare_and_swap: 862 case Builtin::BI__sync_lock_test_and_set: 863 case Builtin::BI__sync_lock_release: 864 case Builtin::BI__sync_swap: 865 llvm_unreachable("Shouldn't make it through sema"); 866 case Builtin::BI__sync_fetch_and_add_1: 867 case Builtin::BI__sync_fetch_and_add_2: 868 case Builtin::BI__sync_fetch_and_add_4: 869 case Builtin::BI__sync_fetch_and_add_8: 870 case Builtin::BI__sync_fetch_and_add_16: 871 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E); 872 case Builtin::BI__sync_fetch_and_sub_1: 873 case Builtin::BI__sync_fetch_and_sub_2: 874 case Builtin::BI__sync_fetch_and_sub_4: 875 case Builtin::BI__sync_fetch_and_sub_8: 876 case Builtin::BI__sync_fetch_and_sub_16: 877 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E); 878 case Builtin::BI__sync_fetch_and_or_1: 879 case Builtin::BI__sync_fetch_and_or_2: 880 case Builtin::BI__sync_fetch_and_or_4: 881 case Builtin::BI__sync_fetch_and_or_8: 882 case Builtin::BI__sync_fetch_and_or_16: 883 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E); 884 case Builtin::BI__sync_fetch_and_and_1: 885 case Builtin::BI__sync_fetch_and_and_2: 886 case Builtin::BI__sync_fetch_and_and_4: 887 case Builtin::BI__sync_fetch_and_and_8: 888 case Builtin::BI__sync_fetch_and_and_16: 889 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E); 890 case Builtin::BI__sync_fetch_and_xor_1: 891 case Builtin::BI__sync_fetch_and_xor_2: 892 case Builtin::BI__sync_fetch_and_xor_4: 893 case Builtin::BI__sync_fetch_and_xor_8: 894 case Builtin::BI__sync_fetch_and_xor_16: 895 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E); 896 897 // Clang extensions: not overloaded yet. 898 case Builtin::BI__sync_fetch_and_min: 899 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E); 900 case Builtin::BI__sync_fetch_and_max: 901 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Max, E); 902 case Builtin::BI__sync_fetch_and_umin: 903 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMin, E); 904 case Builtin::BI__sync_fetch_and_umax: 905 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMax, E); 906 907 case Builtin::BI__sync_add_and_fetch_1: 908 case Builtin::BI__sync_add_and_fetch_2: 909 case Builtin::BI__sync_add_and_fetch_4: 910 case Builtin::BI__sync_add_and_fetch_8: 911 case Builtin::BI__sync_add_and_fetch_16: 912 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Add, E, 913 llvm::Instruction::Add); 914 case Builtin::BI__sync_sub_and_fetch_1: 915 case Builtin::BI__sync_sub_and_fetch_2: 916 case Builtin::BI__sync_sub_and_fetch_4: 917 case Builtin::BI__sync_sub_and_fetch_8: 918 case Builtin::BI__sync_sub_and_fetch_16: 919 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Sub, E, 920 llvm::Instruction::Sub); 921 case Builtin::BI__sync_and_and_fetch_1: 922 case Builtin::BI__sync_and_and_fetch_2: 923 case Builtin::BI__sync_and_and_fetch_4: 924 case Builtin::BI__sync_and_and_fetch_8: 925 case Builtin::BI__sync_and_and_fetch_16: 926 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::And, E, 927 llvm::Instruction::And); 928 case Builtin::BI__sync_or_and_fetch_1: 929 case Builtin::BI__sync_or_and_fetch_2: 930 case Builtin::BI__sync_or_and_fetch_4: 931 case Builtin::BI__sync_or_and_fetch_8: 932 case Builtin::BI__sync_or_and_fetch_16: 933 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Or, E, 934 llvm::Instruction::Or); 935 case Builtin::BI__sync_xor_and_fetch_1: 936 case Builtin::BI__sync_xor_and_fetch_2: 937 case Builtin::BI__sync_xor_and_fetch_4: 938 case Builtin::BI__sync_xor_and_fetch_8: 939 case Builtin::BI__sync_xor_and_fetch_16: 940 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Xor, E, 941 llvm::Instruction::Xor); 942 943 case Builtin::BI__sync_val_compare_and_swap_1: 944 case Builtin::BI__sync_val_compare_and_swap_2: 945 case Builtin::BI__sync_val_compare_and_swap_4: 946 case Builtin::BI__sync_val_compare_and_swap_8: 947 case Builtin::BI__sync_val_compare_and_swap_16: { 948 QualType T = E->getType(); 949 llvm::Value *DestPtr = EmitScalarExpr(E->getArg(0)); 950 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 951 952 llvm::IntegerType *IntType = 953 llvm::IntegerType::get(getLLVMContext(), 954 getContext().getTypeSize(T)); 955 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 956 957 Value *Args[3]; 958 Args[0] = Builder.CreateBitCast(DestPtr, IntPtrType); 959 Args[1] = EmitScalarExpr(E->getArg(1)); 960 llvm::Type *ValueType = Args[1]->getType(); 961 Args[1] = EmitToInt(*this, Args[1], T, IntType); 962 Args[2] = EmitToInt(*this, EmitScalarExpr(E->getArg(2)), T, IntType); 963 964 Value *Result = Builder.CreateAtomicCmpXchg(Args[0], Args[1], Args[2], 965 llvm::SequentiallyConsistent); 966 Result = EmitFromInt(*this, Result, T, ValueType); 967 return RValue::get(Result); 968 } 969 970 case Builtin::BI__sync_bool_compare_and_swap_1: 971 case Builtin::BI__sync_bool_compare_and_swap_2: 972 case Builtin::BI__sync_bool_compare_and_swap_4: 973 case Builtin::BI__sync_bool_compare_and_swap_8: 974 case Builtin::BI__sync_bool_compare_and_swap_16: { 975 QualType T = E->getArg(1)->getType(); 976 llvm::Value *DestPtr = EmitScalarExpr(E->getArg(0)); 977 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 978 979 llvm::IntegerType *IntType = 980 llvm::IntegerType::get(getLLVMContext(), 981 getContext().getTypeSize(T)); 982 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 983 984 Value *Args[3]; 985 Args[0] = Builder.CreateBitCast(DestPtr, IntPtrType); 986 Args[1] = EmitToInt(*this, EmitScalarExpr(E->getArg(1)), T, IntType); 987 Args[2] = EmitToInt(*this, EmitScalarExpr(E->getArg(2)), T, IntType); 988 989 Value *OldVal = Args[1]; 990 Value *PrevVal = Builder.CreateAtomicCmpXchg(Args[0], Args[1], Args[2], 991 llvm::SequentiallyConsistent); 992 Value *Result = Builder.CreateICmpEQ(PrevVal, OldVal); 993 // zext bool to int. 994 Result = Builder.CreateZExt(Result, ConvertType(E->getType())); 995 return RValue::get(Result); 996 } 997 998 case Builtin::BI__sync_swap_1: 999 case Builtin::BI__sync_swap_2: 1000 case Builtin::BI__sync_swap_4: 1001 case Builtin::BI__sync_swap_8: 1002 case Builtin::BI__sync_swap_16: 1003 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1004 1005 case Builtin::BI__sync_lock_test_and_set_1: 1006 case Builtin::BI__sync_lock_test_and_set_2: 1007 case Builtin::BI__sync_lock_test_and_set_4: 1008 case Builtin::BI__sync_lock_test_and_set_8: 1009 case Builtin::BI__sync_lock_test_and_set_16: 1010 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1011 1012 case Builtin::BI__sync_lock_release_1: 1013 case Builtin::BI__sync_lock_release_2: 1014 case Builtin::BI__sync_lock_release_4: 1015 case Builtin::BI__sync_lock_release_8: 1016 case Builtin::BI__sync_lock_release_16: { 1017 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1018 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 1019 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 1020 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 1021 StoreSize.getQuantity() * 8); 1022 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 1023 llvm::StoreInst *Store = 1024 Builder.CreateStore(llvm::Constant::getNullValue(ITy), Ptr); 1025 Store->setAlignment(StoreSize.getQuantity()); 1026 Store->setAtomic(llvm::Release); 1027 return RValue::get(0); 1028 } 1029 1030 case Builtin::BI__sync_synchronize: { 1031 // We assume this is supposed to correspond to a C++0x-style 1032 // sequentially-consistent fence (i.e. this is only usable for 1033 // synchonization, not device I/O or anything like that). This intrinsic 1034 // is really badly designed in the sense that in theory, there isn't 1035 // any way to safely use it... but in practice, it mostly works 1036 // to use it with non-atomic loads and stores to get acquire/release 1037 // semantics. 1038 Builder.CreateFence(llvm::SequentiallyConsistent); 1039 return RValue::get(0); 1040 } 1041 1042 case Builtin::BI__c11_atomic_is_lock_free: 1043 case Builtin::BI__atomic_is_lock_free: { 1044 // Call "bool __atomic_is_lock_free(size_t size, void *ptr)". For the 1045 // __c11 builtin, ptr is 0 (indicating a properly-aligned object), since 1046 // _Atomic(T) is always properly-aligned. 1047 const char *LibCallName = "__atomic_is_lock_free"; 1048 CallArgList Args; 1049 Args.add(RValue::get(EmitScalarExpr(E->getArg(0))), 1050 getContext().getSizeType()); 1051 if (BuiltinID == Builtin::BI__atomic_is_lock_free) 1052 Args.add(RValue::get(EmitScalarExpr(E->getArg(1))), 1053 getContext().VoidPtrTy); 1054 else 1055 Args.add(RValue::get(llvm::Constant::getNullValue(VoidPtrTy)), 1056 getContext().VoidPtrTy); 1057 const CGFunctionInfo &FuncInfo = 1058 CGM.getTypes().arrangeFreeFunctionCall(E->getType(), Args, 1059 FunctionType::ExtInfo(), 1060 RequiredArgs::All); 1061 llvm::FunctionType *FTy = CGM.getTypes().GetFunctionType(FuncInfo); 1062 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, LibCallName); 1063 return EmitCall(FuncInfo, Func, ReturnValueSlot(), Args); 1064 } 1065 1066 case Builtin::BI__atomic_test_and_set: { 1067 // Look at the argument type to determine whether this is a volatile 1068 // operation. The parameter type is always volatile. 1069 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1070 bool Volatile = 1071 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1072 1073 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1074 unsigned AddrSpace = Ptr->getType()->getPointerAddressSpace(); 1075 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1076 Value *NewVal = Builder.getInt8(1); 1077 Value *Order = EmitScalarExpr(E->getArg(1)); 1078 if (isa<llvm::ConstantInt>(Order)) { 1079 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1080 AtomicRMWInst *Result = 0; 1081 switch (ord) { 1082 case 0: // memory_order_relaxed 1083 default: // invalid order 1084 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1085 Ptr, NewVal, 1086 llvm::Monotonic); 1087 break; 1088 case 1: // memory_order_consume 1089 case 2: // memory_order_acquire 1090 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1091 Ptr, NewVal, 1092 llvm::Acquire); 1093 break; 1094 case 3: // memory_order_release 1095 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1096 Ptr, NewVal, 1097 llvm::Release); 1098 break; 1099 case 4: // memory_order_acq_rel 1100 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1101 Ptr, NewVal, 1102 llvm::AcquireRelease); 1103 break; 1104 case 5: // memory_order_seq_cst 1105 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1106 Ptr, NewVal, 1107 llvm::SequentiallyConsistent); 1108 break; 1109 } 1110 Result->setVolatile(Volatile); 1111 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1112 } 1113 1114 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1115 1116 llvm::BasicBlock *BBs[5] = { 1117 createBasicBlock("monotonic", CurFn), 1118 createBasicBlock("acquire", CurFn), 1119 createBasicBlock("release", CurFn), 1120 createBasicBlock("acqrel", CurFn), 1121 createBasicBlock("seqcst", CurFn) 1122 }; 1123 llvm::AtomicOrdering Orders[5] = { 1124 llvm::Monotonic, llvm::Acquire, llvm::Release, 1125 llvm::AcquireRelease, llvm::SequentiallyConsistent 1126 }; 1127 1128 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1129 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1130 1131 Builder.SetInsertPoint(ContBB); 1132 PHINode *Result = Builder.CreatePHI(Int8Ty, 5, "was_set"); 1133 1134 for (unsigned i = 0; i < 5; ++i) { 1135 Builder.SetInsertPoint(BBs[i]); 1136 AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1137 Ptr, NewVal, Orders[i]); 1138 RMW->setVolatile(Volatile); 1139 Result->addIncoming(RMW, BBs[i]); 1140 Builder.CreateBr(ContBB); 1141 } 1142 1143 SI->addCase(Builder.getInt32(0), BBs[0]); 1144 SI->addCase(Builder.getInt32(1), BBs[1]); 1145 SI->addCase(Builder.getInt32(2), BBs[1]); 1146 SI->addCase(Builder.getInt32(3), BBs[2]); 1147 SI->addCase(Builder.getInt32(4), BBs[3]); 1148 SI->addCase(Builder.getInt32(5), BBs[4]); 1149 1150 Builder.SetInsertPoint(ContBB); 1151 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1152 } 1153 1154 case Builtin::BI__atomic_clear: { 1155 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1156 bool Volatile = 1157 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1158 1159 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1160 unsigned AddrSpace = Ptr->getType()->getPointerAddressSpace(); 1161 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1162 Value *NewVal = Builder.getInt8(0); 1163 Value *Order = EmitScalarExpr(E->getArg(1)); 1164 if (isa<llvm::ConstantInt>(Order)) { 1165 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1166 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1167 Store->setAlignment(1); 1168 switch (ord) { 1169 case 0: // memory_order_relaxed 1170 default: // invalid order 1171 Store->setOrdering(llvm::Monotonic); 1172 break; 1173 case 3: // memory_order_release 1174 Store->setOrdering(llvm::Release); 1175 break; 1176 case 5: // memory_order_seq_cst 1177 Store->setOrdering(llvm::SequentiallyConsistent); 1178 break; 1179 } 1180 return RValue::get(0); 1181 } 1182 1183 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1184 1185 llvm::BasicBlock *BBs[3] = { 1186 createBasicBlock("monotonic", CurFn), 1187 createBasicBlock("release", CurFn), 1188 createBasicBlock("seqcst", CurFn) 1189 }; 1190 llvm::AtomicOrdering Orders[3] = { 1191 llvm::Monotonic, llvm::Release, llvm::SequentiallyConsistent 1192 }; 1193 1194 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1195 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1196 1197 for (unsigned i = 0; i < 3; ++i) { 1198 Builder.SetInsertPoint(BBs[i]); 1199 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1200 Store->setAlignment(1); 1201 Store->setOrdering(Orders[i]); 1202 Builder.CreateBr(ContBB); 1203 } 1204 1205 SI->addCase(Builder.getInt32(0), BBs[0]); 1206 SI->addCase(Builder.getInt32(3), BBs[1]); 1207 SI->addCase(Builder.getInt32(5), BBs[2]); 1208 1209 Builder.SetInsertPoint(ContBB); 1210 return RValue::get(0); 1211 } 1212 1213 case Builtin::BI__atomic_thread_fence: 1214 case Builtin::BI__atomic_signal_fence: 1215 case Builtin::BI__c11_atomic_thread_fence: 1216 case Builtin::BI__c11_atomic_signal_fence: { 1217 llvm::SynchronizationScope Scope; 1218 if (BuiltinID == Builtin::BI__atomic_signal_fence || 1219 BuiltinID == Builtin::BI__c11_atomic_signal_fence) 1220 Scope = llvm::SingleThread; 1221 else 1222 Scope = llvm::CrossThread; 1223 Value *Order = EmitScalarExpr(E->getArg(0)); 1224 if (isa<llvm::ConstantInt>(Order)) { 1225 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1226 switch (ord) { 1227 case 0: // memory_order_relaxed 1228 default: // invalid order 1229 break; 1230 case 1: // memory_order_consume 1231 case 2: // memory_order_acquire 1232 Builder.CreateFence(llvm::Acquire, Scope); 1233 break; 1234 case 3: // memory_order_release 1235 Builder.CreateFence(llvm::Release, Scope); 1236 break; 1237 case 4: // memory_order_acq_rel 1238 Builder.CreateFence(llvm::AcquireRelease, Scope); 1239 break; 1240 case 5: // memory_order_seq_cst 1241 Builder.CreateFence(llvm::SequentiallyConsistent, Scope); 1242 break; 1243 } 1244 return RValue::get(0); 1245 } 1246 1247 llvm::BasicBlock *AcquireBB, *ReleaseBB, *AcqRelBB, *SeqCstBB; 1248 AcquireBB = createBasicBlock("acquire", CurFn); 1249 ReleaseBB = createBasicBlock("release", CurFn); 1250 AcqRelBB = createBasicBlock("acqrel", CurFn); 1251 SeqCstBB = createBasicBlock("seqcst", CurFn); 1252 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1253 1254 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1255 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, ContBB); 1256 1257 Builder.SetInsertPoint(AcquireBB); 1258 Builder.CreateFence(llvm::Acquire, Scope); 1259 Builder.CreateBr(ContBB); 1260 SI->addCase(Builder.getInt32(1), AcquireBB); 1261 SI->addCase(Builder.getInt32(2), AcquireBB); 1262 1263 Builder.SetInsertPoint(ReleaseBB); 1264 Builder.CreateFence(llvm::Release, Scope); 1265 Builder.CreateBr(ContBB); 1266 SI->addCase(Builder.getInt32(3), ReleaseBB); 1267 1268 Builder.SetInsertPoint(AcqRelBB); 1269 Builder.CreateFence(llvm::AcquireRelease, Scope); 1270 Builder.CreateBr(ContBB); 1271 SI->addCase(Builder.getInt32(4), AcqRelBB); 1272 1273 Builder.SetInsertPoint(SeqCstBB); 1274 Builder.CreateFence(llvm::SequentiallyConsistent, Scope); 1275 Builder.CreateBr(ContBB); 1276 SI->addCase(Builder.getInt32(5), SeqCstBB); 1277 1278 Builder.SetInsertPoint(ContBB); 1279 return RValue::get(0); 1280 } 1281 1282 // Library functions with special handling. 1283 case Builtin::BIsqrt: 1284 case Builtin::BIsqrtf: 1285 case Builtin::BIsqrtl: { 1286 // Transform a call to sqrt* into a @llvm.sqrt.* intrinsic call, but only 1287 // in finite- or unsafe-math mode (the intrinsic has different semantics 1288 // for handling negative numbers compared to the library function, so 1289 // -fmath-errno=0 is not enough). 1290 if (!FD->hasAttr<ConstAttr>()) 1291 break; 1292 if (!(CGM.getCodeGenOpts().UnsafeFPMath || 1293 CGM.getCodeGenOpts().NoNaNsFPMath)) 1294 break; 1295 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 1296 llvm::Type *ArgType = Arg0->getType(); 1297 Value *F = CGM.getIntrinsic(Intrinsic::sqrt, ArgType); 1298 return RValue::get(Builder.CreateCall(F, Arg0)); 1299 } 1300 1301 case Builtin::BIpow: 1302 case Builtin::BIpowf: 1303 case Builtin::BIpowl: { 1304 // Transform a call to pow* into a @llvm.pow.* intrinsic call. 1305 if (!FD->hasAttr<ConstAttr>()) 1306 break; 1307 Value *Base = EmitScalarExpr(E->getArg(0)); 1308 Value *Exponent = EmitScalarExpr(E->getArg(1)); 1309 llvm::Type *ArgType = Base->getType(); 1310 Value *F = CGM.getIntrinsic(Intrinsic::pow, ArgType); 1311 return RValue::get(Builder.CreateCall2(F, Base, Exponent)); 1312 break; 1313 } 1314 1315 case Builtin::BIfma: 1316 case Builtin::BIfmaf: 1317 case Builtin::BIfmal: 1318 case Builtin::BI__builtin_fma: 1319 case Builtin::BI__builtin_fmaf: 1320 case Builtin::BI__builtin_fmal: { 1321 // Rewrite fma to intrinsic. 1322 Value *FirstArg = EmitScalarExpr(E->getArg(0)); 1323 llvm::Type *ArgType = FirstArg->getType(); 1324 Value *F = CGM.getIntrinsic(Intrinsic::fma, ArgType); 1325 return RValue::get(Builder.CreateCall3(F, FirstArg, 1326 EmitScalarExpr(E->getArg(1)), 1327 EmitScalarExpr(E->getArg(2)))); 1328 } 1329 1330 case Builtin::BI__builtin_signbit: 1331 case Builtin::BI__builtin_signbitf: 1332 case Builtin::BI__builtin_signbitl: { 1333 LLVMContext &C = CGM.getLLVMContext(); 1334 1335 Value *Arg = EmitScalarExpr(E->getArg(0)); 1336 llvm::Type *ArgTy = Arg->getType(); 1337 if (ArgTy->isPPC_FP128Ty()) 1338 break; // FIXME: I'm not sure what the right implementation is here. 1339 int ArgWidth = ArgTy->getPrimitiveSizeInBits(); 1340 llvm::Type *ArgIntTy = llvm::IntegerType::get(C, ArgWidth); 1341 Value *BCArg = Builder.CreateBitCast(Arg, ArgIntTy); 1342 Value *ZeroCmp = llvm::Constant::getNullValue(ArgIntTy); 1343 Value *Result = Builder.CreateICmpSLT(BCArg, ZeroCmp); 1344 return RValue::get(Builder.CreateZExt(Result, ConvertType(E->getType()))); 1345 } 1346 case Builtin::BI__builtin_annotation: { 1347 llvm::Value *AnnVal = EmitScalarExpr(E->getArg(0)); 1348 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::annotation, 1349 AnnVal->getType()); 1350 1351 // Get the annotation string, go through casts. Sema requires this to be a 1352 // non-wide string literal, potentially casted, so the cast<> is safe. 1353 const Expr *AnnotationStrExpr = E->getArg(1)->IgnoreParenCasts(); 1354 StringRef Str = cast<StringLiteral>(AnnotationStrExpr)->getString(); 1355 return RValue::get(EmitAnnotationCall(F, AnnVal, Str, E->getExprLoc())); 1356 } 1357 case Builtin::BI__builtin_addcb: 1358 case Builtin::BI__builtin_addcs: 1359 case Builtin::BI__builtin_addc: 1360 case Builtin::BI__builtin_addcl: 1361 case Builtin::BI__builtin_addcll: 1362 case Builtin::BI__builtin_subcb: 1363 case Builtin::BI__builtin_subcs: 1364 case Builtin::BI__builtin_subc: 1365 case Builtin::BI__builtin_subcl: 1366 case Builtin::BI__builtin_subcll: { 1367 1368 // We translate all of these builtins from expressions of the form: 1369 // int x = ..., y = ..., carryin = ..., carryout, result; 1370 // result = __builtin_addc(x, y, carryin, &carryout); 1371 // 1372 // to LLVM IR of the form: 1373 // 1374 // %tmp1 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y) 1375 // %tmpsum1 = extractvalue {i32, i1} %tmp1, 0 1376 // %carry1 = extractvalue {i32, i1} %tmp1, 1 1377 // %tmp2 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %tmpsum1, 1378 // i32 %carryin) 1379 // %result = extractvalue {i32, i1} %tmp2, 0 1380 // %carry2 = extractvalue {i32, i1} %tmp2, 1 1381 // %tmp3 = or i1 %carry1, %carry2 1382 // %tmp4 = zext i1 %tmp3 to i32 1383 // store i32 %tmp4, i32* %carryout 1384 1385 // Scalarize our inputs. 1386 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1387 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1388 llvm::Value *Carryin = EmitScalarExpr(E->getArg(2)); 1389 std::pair<llvm::Value*, unsigned> CarryOutPtr = 1390 EmitPointerWithAlignment(E->getArg(3)); 1391 1392 // Decide if we are lowering to a uadd.with.overflow or usub.with.overflow. 1393 llvm::Intrinsic::ID IntrinsicId; 1394 switch (BuiltinID) { 1395 default: llvm_unreachable("Unknown multiprecision builtin id."); 1396 case Builtin::BI__builtin_addcb: 1397 case Builtin::BI__builtin_addcs: 1398 case Builtin::BI__builtin_addc: 1399 case Builtin::BI__builtin_addcl: 1400 case Builtin::BI__builtin_addcll: 1401 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1402 break; 1403 case Builtin::BI__builtin_subcb: 1404 case Builtin::BI__builtin_subcs: 1405 case Builtin::BI__builtin_subc: 1406 case Builtin::BI__builtin_subcl: 1407 case Builtin::BI__builtin_subcll: 1408 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1409 break; 1410 } 1411 1412 // Construct our resulting LLVM IR expression. 1413 llvm::Value *Carry1; 1414 llvm::Value *Sum1 = EmitOverflowIntrinsic(*this, IntrinsicId, 1415 X, Y, Carry1); 1416 llvm::Value *Carry2; 1417 llvm::Value *Sum2 = EmitOverflowIntrinsic(*this, IntrinsicId, 1418 Sum1, Carryin, Carry2); 1419 llvm::Value *CarryOut = Builder.CreateZExt(Builder.CreateOr(Carry1, Carry2), 1420 X->getType()); 1421 llvm::StoreInst *CarryOutStore = Builder.CreateStore(CarryOut, 1422 CarryOutPtr.first); 1423 CarryOutStore->setAlignment(CarryOutPtr.second); 1424 return RValue::get(Sum2); 1425 } 1426 case Builtin::BI__builtin_uadd_overflow: 1427 case Builtin::BI__builtin_uaddl_overflow: 1428 case Builtin::BI__builtin_uaddll_overflow: 1429 case Builtin::BI__builtin_usub_overflow: 1430 case Builtin::BI__builtin_usubl_overflow: 1431 case Builtin::BI__builtin_usubll_overflow: 1432 case Builtin::BI__builtin_umul_overflow: 1433 case Builtin::BI__builtin_umull_overflow: 1434 case Builtin::BI__builtin_umulll_overflow: 1435 case Builtin::BI__builtin_sadd_overflow: 1436 case Builtin::BI__builtin_saddl_overflow: 1437 case Builtin::BI__builtin_saddll_overflow: 1438 case Builtin::BI__builtin_ssub_overflow: 1439 case Builtin::BI__builtin_ssubl_overflow: 1440 case Builtin::BI__builtin_ssubll_overflow: 1441 case Builtin::BI__builtin_smul_overflow: 1442 case Builtin::BI__builtin_smull_overflow: 1443 case Builtin::BI__builtin_smulll_overflow: { 1444 1445 // We translate all of these builtins directly to the relevant llvm IR node. 1446 1447 // Scalarize our inputs. 1448 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1449 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1450 std::pair<llvm::Value *, unsigned> SumOutPtr = 1451 EmitPointerWithAlignment(E->getArg(2)); 1452 1453 // Decide which of the overflow intrinsics we are lowering to: 1454 llvm::Intrinsic::ID IntrinsicId; 1455 switch (BuiltinID) { 1456 default: llvm_unreachable("Unknown security overflow builtin id."); 1457 case Builtin::BI__builtin_uadd_overflow: 1458 case Builtin::BI__builtin_uaddl_overflow: 1459 case Builtin::BI__builtin_uaddll_overflow: 1460 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1461 break; 1462 case Builtin::BI__builtin_usub_overflow: 1463 case Builtin::BI__builtin_usubl_overflow: 1464 case Builtin::BI__builtin_usubll_overflow: 1465 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1466 break; 1467 case Builtin::BI__builtin_umul_overflow: 1468 case Builtin::BI__builtin_umull_overflow: 1469 case Builtin::BI__builtin_umulll_overflow: 1470 IntrinsicId = llvm::Intrinsic::umul_with_overflow; 1471 break; 1472 case Builtin::BI__builtin_sadd_overflow: 1473 case Builtin::BI__builtin_saddl_overflow: 1474 case Builtin::BI__builtin_saddll_overflow: 1475 IntrinsicId = llvm::Intrinsic::sadd_with_overflow; 1476 break; 1477 case Builtin::BI__builtin_ssub_overflow: 1478 case Builtin::BI__builtin_ssubl_overflow: 1479 case Builtin::BI__builtin_ssubll_overflow: 1480 IntrinsicId = llvm::Intrinsic::ssub_with_overflow; 1481 break; 1482 case Builtin::BI__builtin_smul_overflow: 1483 case Builtin::BI__builtin_smull_overflow: 1484 case Builtin::BI__builtin_smulll_overflow: 1485 IntrinsicId = llvm::Intrinsic::smul_with_overflow; 1486 break; 1487 } 1488 1489 1490 llvm::Value *Carry; 1491 llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry); 1492 llvm::StoreInst *SumOutStore = Builder.CreateStore(Sum, SumOutPtr.first); 1493 SumOutStore->setAlignment(SumOutPtr.second); 1494 1495 return RValue::get(Carry); 1496 } 1497 case Builtin::BI__builtin_addressof: 1498 return RValue::get(EmitLValue(E->getArg(0)).getAddress()); 1499 case Builtin::BI__noop: 1500 return RValue::get(0); 1501 } 1502 1503 // If this is an alias for a lib function (e.g. __builtin_sin), emit 1504 // the call using the normal call path, but using the unmangled 1505 // version of the function name. 1506 if (getContext().BuiltinInfo.isLibFunction(BuiltinID)) 1507 return emitLibraryCall(*this, FD, E, 1508 CGM.getBuiltinLibFunction(FD, BuiltinID)); 1509 1510 // If this is a predefined lib function (e.g. malloc), emit the call 1511 // using exactly the normal call path. 1512 if (getContext().BuiltinInfo.isPredefinedLibFunction(BuiltinID)) 1513 return emitLibraryCall(*this, FD, E, EmitScalarExpr(E->getCallee())); 1514 1515 // See if we have a target specific intrinsic. 1516 const char *Name = getContext().BuiltinInfo.GetName(BuiltinID); 1517 Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; 1518 if (const char *Prefix = 1519 llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch())) 1520 IntrinsicID = Intrinsic::getIntrinsicForGCCBuiltin(Prefix, Name); 1521 1522 if (IntrinsicID != Intrinsic::not_intrinsic) { 1523 SmallVector<Value*, 16> Args; 1524 1525 // Find out if any arguments are required to be integer constant 1526 // expressions. 1527 unsigned ICEArguments = 0; 1528 ASTContext::GetBuiltinTypeError Error; 1529 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 1530 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 1531 1532 Function *F = CGM.getIntrinsic(IntrinsicID); 1533 llvm::FunctionType *FTy = F->getFunctionType(); 1534 1535 for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) { 1536 Value *ArgValue; 1537 // If this is a normal argument, just emit it as a scalar. 1538 if ((ICEArguments & (1 << i)) == 0) { 1539 ArgValue = EmitScalarExpr(E->getArg(i)); 1540 } else { 1541 // If this is required to be a constant, constant fold it so that we 1542 // know that the generated intrinsic gets a ConstantInt. 1543 llvm::APSInt Result; 1544 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result,getContext()); 1545 assert(IsConst && "Constant arg isn't actually constant?"); 1546 (void)IsConst; 1547 ArgValue = llvm::ConstantInt::get(getLLVMContext(), Result); 1548 } 1549 1550 // If the intrinsic arg type is different from the builtin arg type 1551 // we need to do a bit cast. 1552 llvm::Type *PTy = FTy->getParamType(i); 1553 if (PTy != ArgValue->getType()) { 1554 assert(PTy->canLosslesslyBitCastTo(FTy->getParamType(i)) && 1555 "Must be able to losslessly bit cast to param"); 1556 ArgValue = Builder.CreateBitCast(ArgValue, PTy); 1557 } 1558 1559 Args.push_back(ArgValue); 1560 } 1561 1562 Value *V = Builder.CreateCall(F, Args); 1563 QualType BuiltinRetType = E->getType(); 1564 1565 llvm::Type *RetTy = VoidTy; 1566 if (!BuiltinRetType->isVoidType()) 1567 RetTy = ConvertType(BuiltinRetType); 1568 1569 if (RetTy != V->getType()) { 1570 assert(V->getType()->canLosslesslyBitCastTo(RetTy) && 1571 "Must be able to losslessly bit cast result type"); 1572 V = Builder.CreateBitCast(V, RetTy); 1573 } 1574 1575 return RValue::get(V); 1576 } 1577 1578 // See if we have a target specific builtin that needs to be lowered. 1579 if (Value *V = EmitTargetBuiltinExpr(BuiltinID, E)) 1580 return RValue::get(V); 1581 1582 ErrorUnsupported(E, "builtin function"); 1583 1584 // Unknown builtin, for now just dump it out and return undef. 1585 return GetUndefRValue(E->getType()); 1586 } 1587 1588 Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID, 1589 const CallExpr *E) { 1590 switch (getTarget().getTriple().getArch()) { 1591 case llvm::Triple::aarch64: 1592 return EmitAArch64BuiltinExpr(BuiltinID, E); 1593 case llvm::Triple::arm: 1594 case llvm::Triple::thumb: 1595 return EmitARMBuiltinExpr(BuiltinID, E); 1596 case llvm::Triple::x86: 1597 case llvm::Triple::x86_64: 1598 return EmitX86BuiltinExpr(BuiltinID, E); 1599 case llvm::Triple::ppc: 1600 case llvm::Triple::ppc64: 1601 case llvm::Triple::ppc64le: 1602 return EmitPPCBuiltinExpr(BuiltinID, E); 1603 default: 1604 return 0; 1605 } 1606 } 1607 1608 static llvm::VectorType *GetNeonType(CodeGenFunction *CGF, 1609 NeonTypeFlags TypeFlags, 1610 bool V1Ty=false) { 1611 int IsQuad = TypeFlags.isQuad(); 1612 switch (TypeFlags.getEltType()) { 1613 case NeonTypeFlags::Int8: 1614 case NeonTypeFlags::Poly8: 1615 return llvm::VectorType::get(CGF->Int8Ty, V1Ty ? 1 : (8 << IsQuad)); 1616 case NeonTypeFlags::Int16: 1617 case NeonTypeFlags::Poly16: 1618 case NeonTypeFlags::Float16: 1619 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 1620 case NeonTypeFlags::Int32: 1621 return llvm::VectorType::get(CGF->Int32Ty, V1Ty ? 1 : (2 << IsQuad)); 1622 case NeonTypeFlags::Int64: 1623 return llvm::VectorType::get(CGF->Int64Ty, V1Ty ? 1 : (1 << IsQuad)); 1624 case NeonTypeFlags::Float32: 1625 return llvm::VectorType::get(CGF->FloatTy, V1Ty ? 1 : (2 << IsQuad)); 1626 case NeonTypeFlags::Float64: 1627 return llvm::VectorType::get(CGF->DoubleTy, V1Ty ? 1 : (1 << IsQuad)); 1628 } 1629 llvm_unreachable("Unknown vector element type!"); 1630 } 1631 1632 Value *CodeGenFunction::EmitNeonSplat(Value *V, Constant *C) { 1633 unsigned nElts = cast<llvm::VectorType>(V->getType())->getNumElements(); 1634 Value* SV = llvm::ConstantVector::getSplat(nElts, C); 1635 return Builder.CreateShuffleVector(V, V, SV, "lane"); 1636 } 1637 1638 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, 1639 const char *name, 1640 unsigned shift, bool rightshift) { 1641 unsigned j = 0; 1642 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 1643 ai != ae; ++ai, ++j) 1644 if (shift > 0 && shift == j) 1645 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); 1646 else 1647 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); 1648 1649 return Builder.CreateCall(F, Ops, name); 1650 } 1651 1652 Value *CodeGenFunction::EmitNeonShiftVector(Value *V, llvm::Type *Ty, 1653 bool neg) { 1654 int SV = cast<ConstantInt>(V)->getSExtValue(); 1655 1656 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 1657 llvm::Constant *C = ConstantInt::get(VTy->getElementType(), neg ? -SV : SV); 1658 return llvm::ConstantVector::getSplat(VTy->getNumElements(), C); 1659 } 1660 1661 // \brief Right-shift a vector by a constant. 1662 Value *CodeGenFunction::EmitNeonRShiftImm(Value *Vec, Value *Shift, 1663 llvm::Type *Ty, bool usgn, 1664 const char *name) { 1665 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 1666 1667 int ShiftAmt = cast<ConstantInt>(Shift)->getSExtValue(); 1668 int EltSize = VTy->getScalarSizeInBits(); 1669 1670 Vec = Builder.CreateBitCast(Vec, Ty); 1671 1672 // lshr/ashr are undefined when the shift amount is equal to the vector 1673 // element size. 1674 if (ShiftAmt == EltSize) { 1675 if (usgn) { 1676 // Right-shifting an unsigned value by its size yields 0. 1677 llvm::Constant *Zero = ConstantInt::get(VTy->getElementType(), 0); 1678 return llvm::ConstantVector::getSplat(VTy->getNumElements(), Zero); 1679 } else { 1680 // Right-shifting a signed value by its size is equivalent 1681 // to a shift of size-1. 1682 --ShiftAmt; 1683 Shift = ConstantInt::get(VTy->getElementType(), ShiftAmt); 1684 } 1685 } 1686 1687 Shift = EmitNeonShiftVector(Shift, Ty, false); 1688 if (usgn) 1689 return Builder.CreateLShr(Vec, Shift, name); 1690 else 1691 return Builder.CreateAShr(Vec, Shift, name); 1692 } 1693 1694 /// GetPointeeAlignment - Given an expression with a pointer type, find the 1695 /// alignment of the type referenced by the pointer. Skip over implicit 1696 /// casts. 1697 std::pair<llvm::Value*, unsigned> 1698 CodeGenFunction::EmitPointerWithAlignment(const Expr *Addr) { 1699 assert(Addr->getType()->isPointerType()); 1700 Addr = Addr->IgnoreParens(); 1701 if (const ImplicitCastExpr *ICE = dyn_cast<ImplicitCastExpr>(Addr)) { 1702 if ((ICE->getCastKind() == CK_BitCast || ICE->getCastKind() == CK_NoOp) && 1703 ICE->getSubExpr()->getType()->isPointerType()) { 1704 std::pair<llvm::Value*, unsigned> Ptr = 1705 EmitPointerWithAlignment(ICE->getSubExpr()); 1706 Ptr.first = Builder.CreateBitCast(Ptr.first, 1707 ConvertType(Addr->getType())); 1708 return Ptr; 1709 } else if (ICE->getCastKind() == CK_ArrayToPointerDecay) { 1710 LValue LV = EmitLValue(ICE->getSubExpr()); 1711 unsigned Align = LV.getAlignment().getQuantity(); 1712 if (!Align) { 1713 // FIXME: Once LValues are fixed to always set alignment, 1714 // zap this code. 1715 QualType PtTy = ICE->getSubExpr()->getType(); 1716 if (!PtTy->isIncompleteType()) 1717 Align = getContext().getTypeAlignInChars(PtTy).getQuantity(); 1718 else 1719 Align = 1; 1720 } 1721 return std::make_pair(LV.getAddress(), Align); 1722 } 1723 } 1724 if (const UnaryOperator *UO = dyn_cast<UnaryOperator>(Addr)) { 1725 if (UO->getOpcode() == UO_AddrOf) { 1726 LValue LV = EmitLValue(UO->getSubExpr()); 1727 unsigned Align = LV.getAlignment().getQuantity(); 1728 if (!Align) { 1729 // FIXME: Once LValues are fixed to always set alignment, 1730 // zap this code. 1731 QualType PtTy = UO->getSubExpr()->getType(); 1732 if (!PtTy->isIncompleteType()) 1733 Align = getContext().getTypeAlignInChars(PtTy).getQuantity(); 1734 else 1735 Align = 1; 1736 } 1737 return std::make_pair(LV.getAddress(), Align); 1738 } 1739 } 1740 1741 unsigned Align = 1; 1742 QualType PtTy = Addr->getType()->getPointeeType(); 1743 if (!PtTy->isIncompleteType()) 1744 Align = getContext().getTypeAlignInChars(PtTy).getQuantity(); 1745 1746 return std::make_pair(EmitScalarExpr(Addr), Align); 1747 } 1748 1749 static Value *EmitAArch64ScalarBuiltinExpr(CodeGenFunction &CGF, 1750 unsigned BuiltinID, 1751 const CallExpr *E) { 1752 unsigned int Int = 0; 1753 // Scalar result generated across vectors 1754 bool AcrossVec = false; 1755 // Extend element of one-element vector 1756 bool ExtendEle = false; 1757 bool OverloadInt = false; 1758 bool OverloadWideInt = false; 1759 bool OverloadNarrowInt = false; 1760 const char *s = NULL; 1761 1762 SmallVector<Value *, 4> Ops; 1763 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) { 1764 Ops.push_back(CGF.EmitScalarExpr(E->getArg(i))); 1765 } 1766 1767 // AArch64 scalar builtins are not overloaded, they do not have an extra 1768 // argument that specifies the vector type, need to handle each case. 1769 switch (BuiltinID) { 1770 default: break; 1771 // Scalar Add 1772 case AArch64::BI__builtin_neon_vaddd_s64: 1773 Int = Intrinsic::aarch64_neon_vaddds; 1774 s = "vaddds"; break; 1775 case AArch64::BI__builtin_neon_vaddd_u64: 1776 Int = Intrinsic::aarch64_neon_vadddu; 1777 s = "vadddu"; break; 1778 // Scalar Sub 1779 case AArch64::BI__builtin_neon_vsubd_s64: 1780 Int = Intrinsic::aarch64_neon_vsubds; 1781 s = "vsubds"; break; 1782 case AArch64::BI__builtin_neon_vsubd_u64: 1783 Int = Intrinsic::aarch64_neon_vsubdu; 1784 s = "vsubdu"; break; 1785 // Scalar Saturating Add 1786 case AArch64::BI__builtin_neon_vqaddb_s8: 1787 case AArch64::BI__builtin_neon_vqaddh_s16: 1788 case AArch64::BI__builtin_neon_vqadds_s32: 1789 case AArch64::BI__builtin_neon_vqaddd_s64: 1790 Int = Intrinsic::aarch64_neon_vqadds; 1791 s = "vqadds"; OverloadInt = true; break; 1792 case AArch64::BI__builtin_neon_vqaddb_u8: 1793 case AArch64::BI__builtin_neon_vqaddh_u16: 1794 case AArch64::BI__builtin_neon_vqadds_u32: 1795 case AArch64::BI__builtin_neon_vqaddd_u64: 1796 Int = Intrinsic::aarch64_neon_vqaddu; 1797 s = "vqaddu"; OverloadInt = true; break; 1798 // Scalar Saturating Sub 1799 case AArch64::BI__builtin_neon_vqsubb_s8: 1800 case AArch64::BI__builtin_neon_vqsubh_s16: 1801 case AArch64::BI__builtin_neon_vqsubs_s32: 1802 case AArch64::BI__builtin_neon_vqsubd_s64: 1803 Int = Intrinsic::aarch64_neon_vqsubs; 1804 s = "vqsubs"; OverloadInt = true; break; 1805 case AArch64::BI__builtin_neon_vqsubb_u8: 1806 case AArch64::BI__builtin_neon_vqsubh_u16: 1807 case AArch64::BI__builtin_neon_vqsubs_u32: 1808 case AArch64::BI__builtin_neon_vqsubd_u64: 1809 Int = Intrinsic::aarch64_neon_vqsubu; 1810 s = "vqsubu"; OverloadInt = true; break; 1811 // Scalar Shift Left 1812 case AArch64::BI__builtin_neon_vshld_s64: 1813 Int = Intrinsic::aarch64_neon_vshlds; 1814 s = "vshlds"; break; 1815 case AArch64::BI__builtin_neon_vshld_u64: 1816 Int = Intrinsic::aarch64_neon_vshldu; 1817 s = "vshldu"; break; 1818 // Scalar Saturating Shift Left 1819 case AArch64::BI__builtin_neon_vqshlb_s8: 1820 case AArch64::BI__builtin_neon_vqshlh_s16: 1821 case AArch64::BI__builtin_neon_vqshls_s32: 1822 case AArch64::BI__builtin_neon_vqshld_s64: 1823 Int = Intrinsic::aarch64_neon_vqshls; 1824 s = "vqshls"; OverloadInt = true; break; 1825 case AArch64::BI__builtin_neon_vqshlb_u8: 1826 case AArch64::BI__builtin_neon_vqshlh_u16: 1827 case AArch64::BI__builtin_neon_vqshls_u32: 1828 case AArch64::BI__builtin_neon_vqshld_u64: 1829 Int = Intrinsic::aarch64_neon_vqshlu; 1830 s = "vqshlu"; OverloadInt = true; break; 1831 // Scalar Rouding Shift Left 1832 case AArch64::BI__builtin_neon_vrshld_s64: 1833 Int = Intrinsic::aarch64_neon_vrshlds; 1834 s = "vrshlds"; break; 1835 case AArch64::BI__builtin_neon_vrshld_u64: 1836 Int = Intrinsic::aarch64_neon_vrshldu; 1837 s = "vrshldu"; break; 1838 // Scalar Saturating Rouding Shift Left 1839 case AArch64::BI__builtin_neon_vqrshlb_s8: 1840 case AArch64::BI__builtin_neon_vqrshlh_s16: 1841 case AArch64::BI__builtin_neon_vqrshls_s32: 1842 case AArch64::BI__builtin_neon_vqrshld_s64: 1843 Int = Intrinsic::aarch64_neon_vqrshls; 1844 s = "vqrshls"; OverloadInt = true; break; 1845 case AArch64::BI__builtin_neon_vqrshlb_u8: 1846 case AArch64::BI__builtin_neon_vqrshlh_u16: 1847 case AArch64::BI__builtin_neon_vqrshls_u32: 1848 case AArch64::BI__builtin_neon_vqrshld_u64: 1849 Int = Intrinsic::aarch64_neon_vqrshlu; 1850 s = "vqrshlu"; OverloadInt = true; break; 1851 // Scalar Reduce Pairwise Add 1852 case AArch64::BI__builtin_neon_vpaddd_s64: 1853 Int = Intrinsic::aarch64_neon_vpadd; s = "vpadd"; 1854 break; 1855 case AArch64::BI__builtin_neon_vpadds_f32: 1856 Int = Intrinsic::aarch64_neon_vpfadd; s = "vpfadd"; 1857 break; 1858 case AArch64::BI__builtin_neon_vpaddd_f64: 1859 Int = Intrinsic::aarch64_neon_vpfaddq; s = "vpfaddq"; 1860 break; 1861 // Scalar Reduce Pairwise Floating Point Max 1862 case AArch64::BI__builtin_neon_vpmaxs_f32: 1863 Int = Intrinsic::aarch64_neon_vpmax; s = "vpmax"; 1864 break; 1865 case AArch64::BI__builtin_neon_vpmaxqd_f64: 1866 Int = Intrinsic::aarch64_neon_vpmaxq; s = "vpmaxq"; 1867 break; 1868 // Scalar Reduce Pairwise Floating Point Min 1869 case AArch64::BI__builtin_neon_vpmins_f32: 1870 Int = Intrinsic::aarch64_neon_vpmin; s = "vpmin"; 1871 break; 1872 case AArch64::BI__builtin_neon_vpminqd_f64: 1873 Int = Intrinsic::aarch64_neon_vpminq; s = "vpminq"; 1874 break; 1875 // Scalar Reduce Pairwise Floating Point Maxnm 1876 case AArch64::BI__builtin_neon_vpmaxnms_f32: 1877 Int = Intrinsic::aarch64_neon_vpfmaxnm; s = "vpfmaxnm"; 1878 break; 1879 case AArch64::BI__builtin_neon_vpmaxnmqd_f64: 1880 Int = Intrinsic::aarch64_neon_vpfmaxnmq; s = "vpfmaxnmq"; 1881 break; 1882 // Scalar Reduce Pairwise Floating Point Minnm 1883 case AArch64::BI__builtin_neon_vpminnms_f32: 1884 Int = Intrinsic::aarch64_neon_vpfminnm; s = "vpfminnm"; 1885 break; 1886 case AArch64::BI__builtin_neon_vpminnmqd_f64: 1887 Int = Intrinsic::aarch64_neon_vpfminnmq; s = "vpfminnmq"; 1888 break; 1889 // The followings are intrinsics with scalar results generated AcrossVec vectors 1890 case AArch64::BI__builtin_neon_vaddlv_s8: 1891 case AArch64::BI__builtin_neon_vaddlv_s16: 1892 case AArch64::BI__builtin_neon_vaddlvq_s8: 1893 case AArch64::BI__builtin_neon_vaddlvq_s16: 1894 case AArch64::BI__builtin_neon_vaddlvq_s32: 1895 Int = Intrinsic::aarch64_neon_saddlv; 1896 AcrossVec = true; ExtendEle = true; s = "saddlv"; break; 1897 case AArch64::BI__builtin_neon_vaddlv_u8: 1898 case AArch64::BI__builtin_neon_vaddlv_u16: 1899 case AArch64::BI__builtin_neon_vaddlvq_u8: 1900 case AArch64::BI__builtin_neon_vaddlvq_u16: 1901 case AArch64::BI__builtin_neon_vaddlvq_u32: 1902 Int = Intrinsic::aarch64_neon_uaddlv; 1903 AcrossVec = true; ExtendEle = true; s = "uaddlv"; break; 1904 case AArch64::BI__builtin_neon_vmaxv_s8: 1905 case AArch64::BI__builtin_neon_vmaxv_s16: 1906 case AArch64::BI__builtin_neon_vmaxvq_s8: 1907 case AArch64::BI__builtin_neon_vmaxvq_s16: 1908 case AArch64::BI__builtin_neon_vmaxvq_s32: 1909 Int = Intrinsic::aarch64_neon_smaxv; 1910 AcrossVec = true; ExtendEle = false; s = "smaxv"; break; 1911 case AArch64::BI__builtin_neon_vmaxv_u8: 1912 case AArch64::BI__builtin_neon_vmaxv_u16: 1913 case AArch64::BI__builtin_neon_vmaxvq_u8: 1914 case AArch64::BI__builtin_neon_vmaxvq_u16: 1915 case AArch64::BI__builtin_neon_vmaxvq_u32: 1916 Int = Intrinsic::aarch64_neon_umaxv; 1917 AcrossVec = true; ExtendEle = false; s = "umaxv"; break; 1918 case AArch64::BI__builtin_neon_vminv_s8: 1919 case AArch64::BI__builtin_neon_vminv_s16: 1920 case AArch64::BI__builtin_neon_vminvq_s8: 1921 case AArch64::BI__builtin_neon_vminvq_s16: 1922 case AArch64::BI__builtin_neon_vminvq_s32: 1923 Int = Intrinsic::aarch64_neon_sminv; 1924 AcrossVec = true; ExtendEle = false; s = "sminv"; break; 1925 case AArch64::BI__builtin_neon_vminv_u8: 1926 case AArch64::BI__builtin_neon_vminv_u16: 1927 case AArch64::BI__builtin_neon_vminvq_u8: 1928 case AArch64::BI__builtin_neon_vminvq_u16: 1929 case AArch64::BI__builtin_neon_vminvq_u32: 1930 Int = Intrinsic::aarch64_neon_uminv; 1931 AcrossVec = true; ExtendEle = false; s = "uminv"; break; 1932 case AArch64::BI__builtin_neon_vaddv_s8: 1933 case AArch64::BI__builtin_neon_vaddv_s16: 1934 case AArch64::BI__builtin_neon_vaddvq_s8: 1935 case AArch64::BI__builtin_neon_vaddvq_s16: 1936 case AArch64::BI__builtin_neon_vaddvq_s32: 1937 case AArch64::BI__builtin_neon_vaddv_u8: 1938 case AArch64::BI__builtin_neon_vaddv_u16: 1939 case AArch64::BI__builtin_neon_vaddvq_u8: 1940 case AArch64::BI__builtin_neon_vaddvq_u16: 1941 case AArch64::BI__builtin_neon_vaddvq_u32: 1942 Int = Intrinsic::aarch64_neon_vaddv; 1943 AcrossVec = true; ExtendEle = false; s = "vaddv"; break; 1944 case AArch64::BI__builtin_neon_vmaxvq_f32: 1945 Int = Intrinsic::aarch64_neon_vmaxv; 1946 AcrossVec = true; ExtendEle = false; s = "vmaxv"; break; 1947 case AArch64::BI__builtin_neon_vminvq_f32: 1948 Int = Intrinsic::aarch64_neon_vminv; 1949 AcrossVec = true; ExtendEle = false; s = "vminv"; break; 1950 case AArch64::BI__builtin_neon_vmaxnmvq_f32: 1951 Int = Intrinsic::aarch64_neon_vmaxnmv; 1952 AcrossVec = true; ExtendEle = false; s = "vmaxnmv"; break; 1953 case AArch64::BI__builtin_neon_vminnmvq_f32: 1954 Int = Intrinsic::aarch64_neon_vminnmv; 1955 AcrossVec = true; ExtendEle = false; s = "vminnmv"; break; 1956 // Scalar Integer Saturating Doubling Multiply Half High 1957 case AArch64::BI__builtin_neon_vqdmulhh_s16: 1958 case AArch64::BI__builtin_neon_vqdmulhs_s32: 1959 Int = Intrinsic::arm_neon_vqdmulh; 1960 s = "vqdmulh"; OverloadInt = true; break; 1961 // Scalar Integer Saturating Rounding Doubling Multiply Half High 1962 case AArch64::BI__builtin_neon_vqrdmulhh_s16: 1963 case AArch64::BI__builtin_neon_vqrdmulhs_s32: 1964 Int = Intrinsic::arm_neon_vqrdmulh; 1965 s = "vqrdmulh"; OverloadInt = true; break; 1966 // Scalar Floating-point Multiply Extended 1967 case AArch64::BI__builtin_neon_vmulxs_f32: 1968 case AArch64::BI__builtin_neon_vmulxd_f64: 1969 Int = Intrinsic::aarch64_neon_vmulx; 1970 s = "vmulx"; OverloadInt = true; break; 1971 // Scalar Floating-point Reciprocal Step and 1972 case AArch64::BI__builtin_neon_vrecpss_f32: 1973 case AArch64::BI__builtin_neon_vrecpsd_f64: 1974 Int = Intrinsic::arm_neon_vrecps; 1975 s = "vrecps"; OverloadInt = true; break; 1976 // Scalar Floating-point Reciprocal Square Root Step 1977 case AArch64::BI__builtin_neon_vrsqrtss_f32: 1978 case AArch64::BI__builtin_neon_vrsqrtsd_f64: 1979 Int = Intrinsic::arm_neon_vrsqrts; 1980 s = "vrsqrts"; OverloadInt = true; break; 1981 // Scalar Signed Integer Convert To Floating-point 1982 case AArch64::BI__builtin_neon_vcvts_f32_s32: 1983 Int = Intrinsic::aarch64_neon_vcvtf32_s32, 1984 s = "vcvtf"; OverloadInt = false; break; 1985 case AArch64::BI__builtin_neon_vcvtd_f64_s64: 1986 Int = Intrinsic::aarch64_neon_vcvtf64_s64, 1987 s = "vcvtf"; OverloadInt = false; break; 1988 // Scalar Unsigned Integer Convert To Floating-point 1989 case AArch64::BI__builtin_neon_vcvts_f32_u32: 1990 Int = Intrinsic::aarch64_neon_vcvtf32_u32, 1991 s = "vcvtf"; OverloadInt = false; break; 1992 case AArch64::BI__builtin_neon_vcvtd_f64_u64: 1993 Int = Intrinsic::aarch64_neon_vcvtf64_u64, 1994 s = "vcvtf"; OverloadInt = false; break; 1995 // Scalar Floating-point Reciprocal Estimate 1996 case AArch64::BI__builtin_neon_vrecpes_f32: 1997 case AArch64::BI__builtin_neon_vrecped_f64: 1998 Int = Intrinsic::arm_neon_vrecpe; 1999 s = "vrecpe"; OverloadInt = true; break; 2000 // Scalar Floating-point Reciprocal Exponent 2001 case AArch64::BI__builtin_neon_vrecpxs_f32: 2002 case AArch64::BI__builtin_neon_vrecpxd_f64: 2003 Int = Intrinsic::aarch64_neon_vrecpx; 2004 s = "vrecpx"; OverloadInt = true; break; 2005 // Scalar Floating-point Reciprocal Square Root Estimate 2006 case AArch64::BI__builtin_neon_vrsqrtes_f32: 2007 case AArch64::BI__builtin_neon_vrsqrted_f64: 2008 Int = Intrinsic::arm_neon_vrsqrte; 2009 s = "vrsqrte"; OverloadInt = true; break; 2010 // Scalar Compare Equal 2011 case AArch64::BI__builtin_neon_vceqd_s64: 2012 case AArch64::BI__builtin_neon_vceqd_u64: 2013 Int = Intrinsic::aarch64_neon_vceq; s = "vceq"; 2014 OverloadInt = false; break; 2015 // Scalar Compare Equal To Zero 2016 case AArch64::BI__builtin_neon_vceqzd_s64: 2017 case AArch64::BI__builtin_neon_vceqzd_u64: 2018 Int = Intrinsic::aarch64_neon_vceq; s = "vceq"; 2019 // Add implicit zero operand. 2020 Ops.push_back(llvm::Constant::getNullValue(Ops[0]->getType())); 2021 OverloadInt = false; break; 2022 // Scalar Compare Greater Than or Equal 2023 case AArch64::BI__builtin_neon_vcged_s64: 2024 Int = Intrinsic::aarch64_neon_vcge; s = "vcge"; 2025 OverloadInt = false; break; 2026 case AArch64::BI__builtin_neon_vcged_u64: 2027 Int = Intrinsic::aarch64_neon_vchs; s = "vcge"; 2028 OverloadInt = false; break; 2029 // Scalar Compare Greater Than or Equal To Zero 2030 case AArch64::BI__builtin_neon_vcgezd_s64: 2031 Int = Intrinsic::aarch64_neon_vcge; s = "vcge"; 2032 // Add implicit zero operand. 2033 Ops.push_back(llvm::Constant::getNullValue(Ops[0]->getType())); 2034 OverloadInt = false; break; 2035 // Scalar Compare Greater Than 2036 case AArch64::BI__builtin_neon_vcgtd_s64: 2037 Int = Intrinsic::aarch64_neon_vcgt; s = "vcgt"; 2038 OverloadInt = false; break; 2039 case AArch64::BI__builtin_neon_vcgtd_u64: 2040 Int = Intrinsic::aarch64_neon_vchi; s = "vcgt"; 2041 OverloadInt = false; break; 2042 // Scalar Compare Greater Than Zero 2043 case AArch64::BI__builtin_neon_vcgtzd_s64: 2044 Int = Intrinsic::aarch64_neon_vcgt; s = "vcgt"; 2045 // Add implicit zero operand. 2046 Ops.push_back(llvm::Constant::getNullValue(Ops[0]->getType())); 2047 OverloadInt = false; break; 2048 // Scalar Compare Less Than or Equal 2049 case AArch64::BI__builtin_neon_vcled_s64: 2050 Int = Intrinsic::aarch64_neon_vcge; s = "vcge"; 2051 OverloadInt = false; std::swap(Ops[0], Ops[1]); break; 2052 case AArch64::BI__builtin_neon_vcled_u64: 2053 Int = Intrinsic::aarch64_neon_vchs; s = "vchs"; 2054 OverloadInt = false; std::swap(Ops[0], Ops[1]); break; 2055 // Scalar Compare Less Than or Equal To Zero 2056 case AArch64::BI__builtin_neon_vclezd_s64: 2057 Int = Intrinsic::aarch64_neon_vclez; s = "vcle"; 2058 // Add implicit zero operand. 2059 Ops.push_back(llvm::Constant::getNullValue(Ops[0]->getType())); 2060 OverloadInt = false; break; 2061 // Scalar Compare Less Than 2062 case AArch64::BI__builtin_neon_vcltd_s64: 2063 Int = Intrinsic::aarch64_neon_vcgt; s = "vcgt"; 2064 OverloadInt = false; std::swap(Ops[0], Ops[1]); break; 2065 case AArch64::BI__builtin_neon_vcltd_u64: 2066 Int = Intrinsic::aarch64_neon_vchi; s = "vchi"; 2067 OverloadInt = false; std::swap(Ops[0], Ops[1]); break; 2068 // Scalar Compare Less Than Zero 2069 case AArch64::BI__builtin_neon_vcltzd_s64: 2070 Int = Intrinsic::aarch64_neon_vcltz; s = "vclt"; 2071 // Add implicit zero operand. 2072 Ops.push_back(llvm::Constant::getNullValue(Ops[0]->getType())); 2073 OverloadInt = false; break; 2074 // Scalar Compare Bitwise Test Bits 2075 case AArch64::BI__builtin_neon_vtstd_s64: 2076 case AArch64::BI__builtin_neon_vtstd_u64: 2077 Int = Intrinsic::aarch64_neon_vtstd; s = "vtst"; 2078 OverloadInt = false; break; 2079 // Scalar Absolute Value 2080 case AArch64::BI__builtin_neon_vabsd_s64: 2081 Int = Intrinsic::aarch64_neon_vabs; 2082 s = "vabs"; OverloadInt = false; break; 2083 // Scalar Signed Saturating Absolute Value 2084 case AArch64::BI__builtin_neon_vqabsb_s8: 2085 case AArch64::BI__builtin_neon_vqabsh_s16: 2086 case AArch64::BI__builtin_neon_vqabss_s32: 2087 case AArch64::BI__builtin_neon_vqabsd_s64: 2088 Int = Intrinsic::arm_neon_vqabs; 2089 s = "vqabs"; OverloadInt = true; break; 2090 // Scalar Negate 2091 case AArch64::BI__builtin_neon_vnegd_s64: 2092 Int = Intrinsic::aarch64_neon_vneg; 2093 s = "vneg"; OverloadInt = false; break; 2094 // Scalar Signed Saturating Negate 2095 case AArch64::BI__builtin_neon_vqnegb_s8: 2096 case AArch64::BI__builtin_neon_vqnegh_s16: 2097 case AArch64::BI__builtin_neon_vqnegs_s32: 2098 case AArch64::BI__builtin_neon_vqnegd_s64: 2099 Int = Intrinsic::arm_neon_vqneg; 2100 s = "vqneg"; OverloadInt = true; break; 2101 // Scalar Signed Saturating Accumulated of Unsigned Value 2102 case AArch64::BI__builtin_neon_vuqaddb_s8: 2103 case AArch64::BI__builtin_neon_vuqaddh_s16: 2104 case AArch64::BI__builtin_neon_vuqadds_s32: 2105 case AArch64::BI__builtin_neon_vuqaddd_s64: 2106 Int = Intrinsic::aarch64_neon_vuqadd; 2107 s = "vuqadd"; OverloadInt = true; break; 2108 // Scalar Unsigned Saturating Accumulated of Signed Value 2109 case AArch64::BI__builtin_neon_vsqaddb_u8: 2110 case AArch64::BI__builtin_neon_vsqaddh_u16: 2111 case AArch64::BI__builtin_neon_vsqadds_u32: 2112 case AArch64::BI__builtin_neon_vsqaddd_u64: 2113 Int = Intrinsic::aarch64_neon_vsqadd; 2114 s = "vsqadd"; OverloadInt = true; break; 2115 // Signed Saturating Doubling Multiply-Add Long 2116 case AArch64::BI__builtin_neon_vqdmlalh_s16: 2117 case AArch64::BI__builtin_neon_vqdmlals_s32: 2118 Int = Intrinsic::aarch64_neon_vqdmlal; 2119 s = "vqdmlal"; OverloadWideInt = true; break; 2120 // Signed Saturating Doubling Multiply-Subtract Long 2121 case AArch64::BI__builtin_neon_vqdmlslh_s16: 2122 case AArch64::BI__builtin_neon_vqdmlsls_s32: 2123 Int = Intrinsic::aarch64_neon_vqdmlsl; 2124 s = "vqdmlsl"; OverloadWideInt = true; break; 2125 // Signed Saturating Doubling Multiply Long 2126 case AArch64::BI__builtin_neon_vqdmullh_s16: 2127 case AArch64::BI__builtin_neon_vqdmulls_s32: 2128 Int = Intrinsic::aarch64_neon_vqdmull; 2129 s = "vqdmull"; OverloadWideInt = true; break; 2130 // Scalar Signed Saturating Extract Unsigned Narrow 2131 case AArch64::BI__builtin_neon_vqmovunh_s16: 2132 case AArch64::BI__builtin_neon_vqmovuns_s32: 2133 case AArch64::BI__builtin_neon_vqmovund_s64: 2134 Int = Intrinsic::arm_neon_vqmovnsu; 2135 s = "vqmovun"; OverloadNarrowInt = true; break; 2136 // Scalar Signed Saturating Extract Narrow 2137 case AArch64::BI__builtin_neon_vqmovnh_s16: 2138 case AArch64::BI__builtin_neon_vqmovns_s32: 2139 case AArch64::BI__builtin_neon_vqmovnd_s64: 2140 Int = Intrinsic::arm_neon_vqmovns; 2141 s = "vqmovn"; OverloadNarrowInt = true; break; 2142 // Scalar Unsigned Saturating Extract Narrow 2143 case AArch64::BI__builtin_neon_vqmovnh_u16: 2144 case AArch64::BI__builtin_neon_vqmovns_u32: 2145 case AArch64::BI__builtin_neon_vqmovnd_u64: 2146 Int = Intrinsic::arm_neon_vqmovnu; 2147 s = "vqmovn"; OverloadNarrowInt = true; break; 2148 } 2149 2150 if (!Int) 2151 return 0; 2152 2153 // AArch64 scalar builtin that returns scalar type 2154 // and should be mapped to AArch64 intrinsic that returns 2155 // one-element vector type. 2156 Function *F = 0; 2157 if (AcrossVec) { 2158 // Gen arg type 2159 const Expr *Arg = E->getArg(E->getNumArgs()-1); 2160 llvm::Type *Ty = CGF.ConvertType(Arg->getType()); 2161 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 2162 llvm::Type *ETy = VTy->getElementType(); 2163 llvm::VectorType *RTy = llvm::VectorType::get(ETy, 1); 2164 2165 if (ExtendEle) { 2166 assert(!ETy->isFloatingPointTy()); 2167 RTy = llvm::VectorType::getExtendedElementVectorType(RTy); 2168 } 2169 2170 llvm::Type *Tys[2] = {RTy, VTy}; 2171 F = CGF.CGM.getIntrinsic(Int, Tys); 2172 assert(E->getNumArgs() == 1); 2173 } else if (OverloadInt) { 2174 // Determine the type of this overloaded AArch64 intrinsic 2175 const Expr *Arg = E->getArg(E->getNumArgs()-1); 2176 llvm::Type *Ty = CGF.ConvertType(Arg->getType()); 2177 llvm::VectorType *VTy = llvm::VectorType::get(Ty, 1); 2178 assert(VTy); 2179 2180 F = CGF.CGM.getIntrinsic(Int, VTy); 2181 } else if (OverloadWideInt || OverloadNarrowInt) { 2182 // Determine the type of this overloaded AArch64 intrinsic 2183 const Expr *Arg = E->getArg(E->getNumArgs()-1); 2184 llvm::Type *Ty = CGF.ConvertType(Arg->getType()); 2185 llvm::VectorType *VTy = llvm::VectorType::get(Ty, 1); 2186 llvm::VectorType *RTy = OverloadWideInt ? 2187 llvm::VectorType::getExtendedElementVectorType(VTy) : 2188 llvm::VectorType::getTruncatedElementVectorType(VTy); 2189 F = CGF.CGM.getIntrinsic(Int, RTy); 2190 } else 2191 F = CGF.CGM.getIntrinsic(Int); 2192 2193 Value *Result = CGF.EmitNeonCall(F, Ops, s); 2194 llvm::Type *ResultType = CGF.ConvertType(E->getType()); 2195 // AArch64 intrinsic one-element vector type cast to 2196 // scalar type expected by the builtin 2197 return CGF.Builder.CreateBitCast(Result, ResultType, s); 2198 } 2199 2200 Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, 2201 const CallExpr *E) { 2202 2203 // Process AArch64 scalar builtins 2204 if (Value *Result = EmitAArch64ScalarBuiltinExpr(*this, BuiltinID, E)) 2205 return Result; 2206 2207 if (BuiltinID == AArch64::BI__clear_cache) { 2208 assert(E->getNumArgs() == 2 && 2209 "Variadic __clear_cache slipped through on AArch64"); 2210 2211 const FunctionDecl *FD = E->getDirectCallee(); 2212 SmallVector<Value *, 2> Ops; 2213 for (unsigned i = 0; i < E->getNumArgs(); i++) 2214 Ops.push_back(EmitScalarExpr(E->getArg(i))); 2215 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 2216 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 2217 StringRef Name = FD->getName(); 2218 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 2219 } 2220 2221 SmallVector<Value *, 4> Ops; 2222 for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; i++) { 2223 Ops.push_back(EmitScalarExpr(E->getArg(i))); 2224 } 2225 // Some intrinsic isn't overloaded. 2226 switch (BuiltinID) { 2227 default: break; 2228 case AArch64::BI__builtin_neon_vget_lane_i8: 2229 case AArch64::BI__builtin_neon_vget_lane_i16: 2230 case AArch64::BI__builtin_neon_vget_lane_i32: 2231 case AArch64::BI__builtin_neon_vget_lane_i64: 2232 case AArch64::BI__builtin_neon_vgetq_lane_i8: 2233 case AArch64::BI__builtin_neon_vgetq_lane_i16: 2234 case AArch64::BI__builtin_neon_vgetq_lane_i32: 2235 case AArch64::BI__builtin_neon_vgetq_lane_i64: 2236 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vget_lane_i8, E); 2237 case AArch64::BI__builtin_neon_vset_lane_i8: 2238 case AArch64::BI__builtin_neon_vset_lane_i16: 2239 case AArch64::BI__builtin_neon_vset_lane_i32: 2240 case AArch64::BI__builtin_neon_vset_lane_i64: 2241 case AArch64::BI__builtin_neon_vset_lane_f16: 2242 case AArch64::BI__builtin_neon_vset_lane_f32: 2243 case AArch64::BI__builtin_neon_vset_lane_f64: 2244 case AArch64::BI__builtin_neon_vsetq_lane_i8: 2245 case AArch64::BI__builtin_neon_vsetq_lane_i16: 2246 case AArch64::BI__builtin_neon_vsetq_lane_i32: 2247 case AArch64::BI__builtin_neon_vsetq_lane_i64: 2248 case AArch64::BI__builtin_neon_vsetq_lane_f16: 2249 case AArch64::BI__builtin_neon_vsetq_lane_f32: 2250 case AArch64::BI__builtin_neon_vsetq_lane_f64: 2251 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vset_lane_i8, E); 2252 } 2253 2254 // Get the last argument, which specifies the vector type. 2255 llvm::APSInt Result; 2256 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 2257 if (!Arg->isIntegerConstantExpr(Result, getContext())) 2258 return 0; 2259 2260 // Determine the type of this overloaded NEON intrinsic. 2261 NeonTypeFlags Type(Result.getZExtValue()); 2262 bool usgn = Type.isUnsigned(); 2263 2264 llvm::VectorType *VTy = GetNeonType(this, Type); 2265 llvm::Type *Ty = VTy; 2266 if (!Ty) 2267 return 0; 2268 2269 unsigned Int; 2270 switch (BuiltinID) { 2271 default: 2272 return 0; 2273 2274 // AArch64 builtins mapping to legacy ARM v7 builtins. 2275 // FIXME: the mapped builtins listed correspond to what has been tested 2276 // in aarch64-neon-intrinsics.c so far. 2277 case AArch64::BI__builtin_neon_vmul_v: 2278 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vmul_v, E); 2279 case AArch64::BI__builtin_neon_vmulq_v: 2280 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vmulq_v, E); 2281 case AArch64::BI__builtin_neon_vabd_v: 2282 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vabd_v, E); 2283 case AArch64::BI__builtin_neon_vabdq_v: 2284 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vabdq_v, E); 2285 case AArch64::BI__builtin_neon_vfma_v: 2286 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vfma_v, E); 2287 case AArch64::BI__builtin_neon_vfmaq_v: 2288 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vfmaq_v, E); 2289 case AArch64::BI__builtin_neon_vbsl_v: 2290 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vbsl_v, E); 2291 case AArch64::BI__builtin_neon_vbslq_v: 2292 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vbslq_v, E); 2293 case AArch64::BI__builtin_neon_vrsqrts_v: 2294 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vrsqrts_v, E); 2295 case AArch64::BI__builtin_neon_vrsqrtsq_v: 2296 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vrsqrtsq_v, E); 2297 case AArch64::BI__builtin_neon_vrecps_v: 2298 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vrecps_v, E); 2299 case AArch64::BI__builtin_neon_vrecpsq_v: 2300 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vrecpsq_v, E); 2301 case AArch64::BI__builtin_neon_vcage_v: 2302 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcage_v, E); 2303 case AArch64::BI__builtin_neon_vcale_v: 2304 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcale_v, E); 2305 case AArch64::BI__builtin_neon_vcaleq_v: 2306 std::swap(Ops[0], Ops[1]); 2307 case AArch64::BI__builtin_neon_vcageq_v: { 2308 Function *F; 2309 if (VTy->getElementType()->isIntegerTy(64)) 2310 F = CGM.getIntrinsic(Intrinsic::aarch64_neon_vacgeq); 2311 else 2312 F = CGM.getIntrinsic(Intrinsic::arm_neon_vacgeq); 2313 return EmitNeonCall(F, Ops, "vcage"); 2314 } 2315 case AArch64::BI__builtin_neon_vcalt_v: 2316 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcalt_v, E); 2317 case AArch64::BI__builtin_neon_vcagt_v: 2318 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcagt_v, E); 2319 case AArch64::BI__builtin_neon_vcaltq_v: 2320 std::swap(Ops[0], Ops[1]); 2321 case AArch64::BI__builtin_neon_vcagtq_v: { 2322 Function *F; 2323 if (VTy->getElementType()->isIntegerTy(64)) 2324 F = CGM.getIntrinsic(Intrinsic::aarch64_neon_vacgtq); 2325 else 2326 F = CGM.getIntrinsic(Intrinsic::arm_neon_vacgtq); 2327 return EmitNeonCall(F, Ops, "vcagt"); 2328 } 2329 case AArch64::BI__builtin_neon_vtst_v: 2330 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vtst_v, E); 2331 case AArch64::BI__builtin_neon_vtstq_v: 2332 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vtstq_v, E); 2333 case AArch64::BI__builtin_neon_vhadd_v: 2334 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vhadd_v, E); 2335 case AArch64::BI__builtin_neon_vhaddq_v: 2336 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vhaddq_v, E); 2337 case AArch64::BI__builtin_neon_vhsub_v: 2338 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vhsub_v, E); 2339 case AArch64::BI__builtin_neon_vhsubq_v: 2340 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vhsubq_v, E); 2341 case AArch64::BI__builtin_neon_vrhadd_v: 2342 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vrhadd_v, E); 2343 case AArch64::BI__builtin_neon_vrhaddq_v: 2344 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vrhaddq_v, E); 2345 case AArch64::BI__builtin_neon_vqadd_v: 2346 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqadd_v, E); 2347 case AArch64::BI__builtin_neon_vqaddq_v: 2348 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqaddq_v, E); 2349 case AArch64::BI__builtin_neon_vqsub_v: 2350 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqsub_v, E); 2351 case AArch64::BI__builtin_neon_vqsubq_v: 2352 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqsubq_v, E); 2353 case AArch64::BI__builtin_neon_vshl_v: 2354 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vshl_v, E); 2355 case AArch64::BI__builtin_neon_vshlq_v: 2356 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vshlq_v, E); 2357 case AArch64::BI__builtin_neon_vqshl_v: 2358 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqshl_v, E); 2359 case AArch64::BI__builtin_neon_vqshlq_v: 2360 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqshlq_v, E); 2361 case AArch64::BI__builtin_neon_vrshl_v: 2362 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vrshl_v, E); 2363 case AArch64::BI__builtin_neon_vrshlq_v: 2364 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vrshlq_v, E); 2365 case AArch64::BI__builtin_neon_vqrshl_v: 2366 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqrshl_v, E); 2367 case AArch64::BI__builtin_neon_vqrshlq_v: 2368 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqrshlq_v, E); 2369 case AArch64::BI__builtin_neon_vaddhn_v: 2370 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vaddhn_v, E); 2371 case AArch64::BI__builtin_neon_vraddhn_v: 2372 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vraddhn_v, E); 2373 case AArch64::BI__builtin_neon_vsubhn_v: 2374 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vsubhn_v, E); 2375 case AArch64::BI__builtin_neon_vrsubhn_v: 2376 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vrsubhn_v, E); 2377 case AArch64::BI__builtin_neon_vmull_v: 2378 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vmull_v, E); 2379 case AArch64::BI__builtin_neon_vqdmull_v: 2380 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqdmull_v, E); 2381 case AArch64::BI__builtin_neon_vqdmlal_v: 2382 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqdmlal_v, E); 2383 case AArch64::BI__builtin_neon_vqdmlsl_v: 2384 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqdmlsl_v, E); 2385 case AArch64::BI__builtin_neon_vmax_v: 2386 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vmax_v, E); 2387 case AArch64::BI__builtin_neon_vmaxq_v: 2388 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vmaxq_v, E); 2389 case AArch64::BI__builtin_neon_vmin_v: 2390 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vmin_v, E); 2391 case AArch64::BI__builtin_neon_vminq_v: 2392 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vminq_v, E); 2393 case AArch64::BI__builtin_neon_vpmax_v: 2394 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vpmax_v, E); 2395 case AArch64::BI__builtin_neon_vpmin_v: 2396 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vpmin_v, E); 2397 case AArch64::BI__builtin_neon_vpadd_v: 2398 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vpadd_v, E); 2399 case AArch64::BI__builtin_neon_vqdmulh_v: 2400 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqdmulh_v, E); 2401 case AArch64::BI__builtin_neon_vqdmulhq_v: 2402 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqdmulhq_v, E); 2403 case AArch64::BI__builtin_neon_vqrdmulh_v: 2404 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqrdmulh_v, E); 2405 case AArch64::BI__builtin_neon_vqrdmulhq_v: 2406 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqrdmulhq_v, E); 2407 2408 // Shift by immediate 2409 case AArch64::BI__builtin_neon_vshr_n_v: 2410 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vshr_n_v, E); 2411 case AArch64::BI__builtin_neon_vshrq_n_v: 2412 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vshrq_n_v, E); 2413 case AArch64::BI__builtin_neon_vrshr_n_v: 2414 case AArch64::BI__builtin_neon_vrshrq_n_v: 2415 Int = usgn ? Intrinsic::aarch64_neon_vurshr 2416 : Intrinsic::aarch64_neon_vsrshr; 2417 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n"); 2418 case AArch64::BI__builtin_neon_vsra_n_v: 2419 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vsra_n_v, E); 2420 case AArch64::BI__builtin_neon_vsraq_n_v: 2421 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vsraq_n_v, E); 2422 case AArch64::BI__builtin_neon_vrsra_n_v: 2423 case AArch64::BI__builtin_neon_vrsraq_n_v: { 2424 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2425 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 2426 Int = usgn ? Intrinsic::aarch64_neon_vurshr 2427 : Intrinsic::aarch64_neon_vsrshr; 2428 Ops[1] = Builder.CreateCall2(CGM.getIntrinsic(Int, Ty), Ops[1], Ops[2]); 2429 return Builder.CreateAdd(Ops[0], Ops[1], "vrsra_n"); 2430 } 2431 case AArch64::BI__builtin_neon_vshl_n_v: 2432 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vshl_n_v, E); 2433 case AArch64::BI__builtin_neon_vshlq_n_v: 2434 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vshlq_n_v, E); 2435 case AArch64::BI__builtin_neon_vqshl_n_v: 2436 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqshl_n_v, E); 2437 case AArch64::BI__builtin_neon_vqshlq_n_v: 2438 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqshlq_n_v, E); 2439 case AArch64::BI__builtin_neon_vqshlu_n_v: 2440 case AArch64::BI__builtin_neon_vqshluq_n_v: 2441 Int = Intrinsic::aarch64_neon_vsqshlu; 2442 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshlu_n"); 2443 case AArch64::BI__builtin_neon_vsri_n_v: 2444 case AArch64::BI__builtin_neon_vsriq_n_v: 2445 Int = Intrinsic::aarch64_neon_vsri; 2446 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsri_n"); 2447 case AArch64::BI__builtin_neon_vsli_n_v: 2448 case AArch64::BI__builtin_neon_vsliq_n_v: 2449 Int = Intrinsic::aarch64_neon_vsli; 2450 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsli_n"); 2451 case AArch64::BI__builtin_neon_vshll_n_v: { 2452 llvm::Type *SrcTy = llvm::VectorType::getTruncatedElementVectorType(VTy); 2453 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 2454 if (usgn) 2455 Ops[0] = Builder.CreateZExt(Ops[0], VTy); 2456 else 2457 Ops[0] = Builder.CreateSExt(Ops[0], VTy); 2458 Ops[1] = EmitNeonShiftVector(Ops[1], VTy, false); 2459 return Builder.CreateShl(Ops[0], Ops[1], "vshll_n"); 2460 } 2461 case AArch64::BI__builtin_neon_vshrn_n_v: { 2462 llvm::Type *SrcTy = llvm::VectorType::getExtendedElementVectorType(VTy); 2463 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 2464 Ops[1] = EmitNeonShiftVector(Ops[1], SrcTy, false); 2465 if (usgn) 2466 Ops[0] = Builder.CreateLShr(Ops[0], Ops[1]); 2467 else 2468 Ops[0] = Builder.CreateAShr(Ops[0], Ops[1]); 2469 return Builder.CreateTrunc(Ops[0], Ty, "vshrn_n"); 2470 } 2471 case AArch64::BI__builtin_neon_vqshrun_n_v: 2472 Int = Intrinsic::aarch64_neon_vsqshrun; 2473 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrun_n"); 2474 case AArch64::BI__builtin_neon_vrshrn_n_v: 2475 Int = Intrinsic::aarch64_neon_vrshrn; 2476 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshrn_n"); 2477 case AArch64::BI__builtin_neon_vqrshrun_n_v: 2478 Int = Intrinsic::aarch64_neon_vsqrshrun; 2479 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrun_n"); 2480 case AArch64::BI__builtin_neon_vqshrn_n_v: 2481 Int = usgn ? Intrinsic::aarch64_neon_vuqshrn 2482 : Intrinsic::aarch64_neon_vsqshrn; 2483 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n"); 2484 case AArch64::BI__builtin_neon_vqrshrn_n_v: 2485 Int = usgn ? Intrinsic::aarch64_neon_vuqrshrn 2486 : Intrinsic::aarch64_neon_vsqrshrn; 2487 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n"); 2488 2489 // Convert 2490 case AArch64::BI__builtin_neon_vmovl_v: 2491 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vmovl_v, E); 2492 case AArch64::BI__builtin_neon_vcvt_n_f32_v: 2493 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcvt_n_f32_v, E); 2494 case AArch64::BI__builtin_neon_vcvtq_n_f32_v: 2495 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcvtq_n_f32_v, E); 2496 case AArch64::BI__builtin_neon_vcvtq_n_f64_v: { 2497 llvm::Type *FloatTy = 2498 GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, true)); 2499 llvm::Type *Tys[2] = { FloatTy, Ty }; 2500 Int = usgn ? Intrinsic::arm_neon_vcvtfxu2fp 2501 : Intrinsic::arm_neon_vcvtfxs2fp; 2502 Function *F = CGM.getIntrinsic(Int, Tys); 2503 return EmitNeonCall(F, Ops, "vcvt_n"); 2504 } 2505 case AArch64::BI__builtin_neon_vcvt_n_s32_v: 2506 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcvt_n_s32_v, E); 2507 case AArch64::BI__builtin_neon_vcvtq_n_s32_v: 2508 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcvtq_n_s32_v, E); 2509 case AArch64::BI__builtin_neon_vcvt_n_u32_v: 2510 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcvt_n_u32_v, E); 2511 case AArch64::BI__builtin_neon_vcvtq_n_u32_v: 2512 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vcvtq_n_u32_v, E); 2513 case AArch64::BI__builtin_neon_vcvtq_n_s64_v: 2514 case AArch64::BI__builtin_neon_vcvtq_n_u64_v: { 2515 llvm::Type *FloatTy = 2516 GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, true)); 2517 llvm::Type *Tys[2] = { Ty, FloatTy }; 2518 Int = usgn ? Intrinsic::arm_neon_vcvtfp2fxu 2519 : Intrinsic::arm_neon_vcvtfp2fxs; 2520 Function *F = CGM.getIntrinsic(Int, Tys); 2521 return EmitNeonCall(F, Ops, "vcvt_n"); 2522 } 2523 2524 // Load/Store 2525 case AArch64::BI__builtin_neon_vld1_v: 2526 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld1_v, E); 2527 case AArch64::BI__builtin_neon_vld1q_v: 2528 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld1q_v, E); 2529 case AArch64::BI__builtin_neon_vld2_v: 2530 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld2_v, E); 2531 case AArch64::BI__builtin_neon_vld2q_v: 2532 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld2q_v, E); 2533 case AArch64::BI__builtin_neon_vld3_v: 2534 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld3_v, E); 2535 case AArch64::BI__builtin_neon_vld3q_v: 2536 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld3q_v, E); 2537 case AArch64::BI__builtin_neon_vld4_v: 2538 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld4_v, E); 2539 case AArch64::BI__builtin_neon_vld4q_v: 2540 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld4q_v, E); 2541 case AArch64::BI__builtin_neon_vst1_v: 2542 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst1_v, E); 2543 case AArch64::BI__builtin_neon_vst1q_v: 2544 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst1q_v, E); 2545 case AArch64::BI__builtin_neon_vst2_v: 2546 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst2_v, E); 2547 case AArch64::BI__builtin_neon_vst2q_v: 2548 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst2q_v, E); 2549 case AArch64::BI__builtin_neon_vst3_v: 2550 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst3_v, E); 2551 case AArch64::BI__builtin_neon_vst3q_v: 2552 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst3q_v, E); 2553 case AArch64::BI__builtin_neon_vst4_v: 2554 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst4_v, E); 2555 case AArch64::BI__builtin_neon_vst4q_v: 2556 return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst4q_v, E); 2557 2558 // AArch64-only builtins 2559 case AArch64::BI__builtin_neon_vfma_lane_v: 2560 case AArch64::BI__builtin_neon_vfmaq_laneq_v: { 2561 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 2562 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2563 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 2564 2565 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 2566 Ops[2] = EmitNeonSplat(Ops[2], cast<ConstantInt>(Ops[3])); 2567 return Builder.CreateCall3(F, Ops[2], Ops[1], Ops[0]); 2568 } 2569 case AArch64::BI__builtin_neon_vfmaq_lane_v: { 2570 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 2571 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2572 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 2573 2574 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 2575 llvm::Type *STy = llvm::VectorType::get(VTy->getElementType(), 2576 VTy->getNumElements() / 2); 2577 Ops[2] = Builder.CreateBitCast(Ops[2], STy); 2578 Value* SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), 2579 cast<ConstantInt>(Ops[3])); 2580 Ops[2] = Builder.CreateShuffleVector(Ops[2], Ops[2], SV, "lane"); 2581 2582 return Builder.CreateCall3(F, Ops[2], Ops[1], Ops[0]); 2583 } 2584 case AArch64::BI__builtin_neon_vfma_laneq_v: { 2585 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 2586 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2587 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 2588 2589 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 2590 llvm::Type *STy = llvm::VectorType::get(VTy->getElementType(), 2591 VTy->getNumElements() * 2); 2592 Ops[2] = Builder.CreateBitCast(Ops[2], STy); 2593 Value* SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), 2594 cast<ConstantInt>(Ops[3])); 2595 Ops[2] = Builder.CreateShuffleVector(Ops[2], Ops[2], SV, "lane"); 2596 2597 return Builder.CreateCall3(F, Ops[2], Ops[1], Ops[0]); 2598 } 2599 case AArch64::BI__builtin_neon_vfms_v: 2600 case AArch64::BI__builtin_neon_vfmsq_v: { 2601 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 2602 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2603 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 2604 Ops[1] = Builder.CreateFNeg(Ops[1]); 2605 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 2606 2607 // LLVM's fma intrinsic puts the accumulator in the last position, but the 2608 // AArch64 intrinsic has it first. 2609 return Builder.CreateCall3(F, Ops[1], Ops[2], Ops[0]); 2610 } 2611 case AArch64::BI__builtin_neon_vmaxnm_v: 2612 case AArch64::BI__builtin_neon_vmaxnmq_v: { 2613 Int = Intrinsic::aarch64_neon_vmaxnm; 2614 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmaxnm"); 2615 } 2616 case AArch64::BI__builtin_neon_vminnm_v: 2617 case AArch64::BI__builtin_neon_vminnmq_v: { 2618 Int = Intrinsic::aarch64_neon_vminnm; 2619 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vminnm"); 2620 } 2621 case AArch64::BI__builtin_neon_vpmaxnm_v: 2622 case AArch64::BI__builtin_neon_vpmaxnmq_v: { 2623 Int = Intrinsic::aarch64_neon_vpmaxnm; 2624 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmaxnm"); 2625 } 2626 case AArch64::BI__builtin_neon_vpminnm_v: 2627 case AArch64::BI__builtin_neon_vpminnmq_v: { 2628 Int = Intrinsic::aarch64_neon_vpminnm; 2629 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpminnm"); 2630 } 2631 case AArch64::BI__builtin_neon_vpmaxq_v: { 2632 Int = usgn ? Intrinsic::arm_neon_vpmaxu : Intrinsic::arm_neon_vpmaxs; 2633 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmax"); 2634 } 2635 case AArch64::BI__builtin_neon_vpminq_v: { 2636 Int = usgn ? Intrinsic::arm_neon_vpminu : Intrinsic::arm_neon_vpmins; 2637 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmin"); 2638 } 2639 case AArch64::BI__builtin_neon_vpaddq_v: { 2640 Int = Intrinsic::arm_neon_vpadd; 2641 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpadd"); 2642 } 2643 case AArch64::BI__builtin_neon_vmulx_v: 2644 case AArch64::BI__builtin_neon_vmulxq_v: { 2645 Int = Intrinsic::aarch64_neon_vmulx; 2646 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmulx"); 2647 } 2648 } 2649 } 2650 2651 Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, 2652 const CallExpr *E) { 2653 if (BuiltinID == ARM::BI__clear_cache) { 2654 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 2655 const FunctionDecl *FD = E->getDirectCallee(); 2656 SmallVector<Value*, 2> Ops; 2657 for (unsigned i = 0; i < 2; i++) 2658 Ops.push_back(EmitScalarExpr(E->getArg(i))); 2659 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 2660 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 2661 StringRef Name = FD->getName(); 2662 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 2663 } 2664 2665 if (BuiltinID == ARM::BI__builtin_arm_ldrexd || 2666 (BuiltinID == ARM::BI__builtin_arm_ldrex && 2667 getContext().getTypeSize(E->getType()) == 64)) { 2668 Function *F = CGM.getIntrinsic(Intrinsic::arm_ldrexd); 2669 2670 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 2671 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 2672 "ldrexd"); 2673 2674 Value *Val0 = Builder.CreateExtractValue(Val, 1); 2675 Value *Val1 = Builder.CreateExtractValue(Val, 0); 2676 Val0 = Builder.CreateZExt(Val0, Int64Ty); 2677 Val1 = Builder.CreateZExt(Val1, Int64Ty); 2678 2679 Value *ShiftCst = llvm::ConstantInt::get(Int64Ty, 32); 2680 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 2681 Val = Builder.CreateOr(Val, Val1); 2682 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 2683 } 2684 2685 if (BuiltinID == ARM::BI__builtin_arm_ldrex) { 2686 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 2687 2688 QualType Ty = E->getType(); 2689 llvm::Type *RealResTy = ConvertType(Ty); 2690 llvm::Type *IntResTy = llvm::IntegerType::get(getLLVMContext(), 2691 getContext().getTypeSize(Ty)); 2692 LoadAddr = Builder.CreateBitCast(LoadAddr, IntResTy->getPointerTo()); 2693 2694 Function *F = CGM.getIntrinsic(Intrinsic::arm_ldrex, LoadAddr->getType()); 2695 Value *Val = Builder.CreateCall(F, LoadAddr, "ldrex"); 2696 2697 if (RealResTy->isPointerTy()) 2698 return Builder.CreateIntToPtr(Val, RealResTy); 2699 else { 2700 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 2701 return Builder.CreateBitCast(Val, RealResTy); 2702 } 2703 } 2704 2705 if (BuiltinID == ARM::BI__builtin_arm_strexd || 2706 (BuiltinID == ARM::BI__builtin_arm_strex && 2707 getContext().getTypeSize(E->getArg(0)->getType()) == 64)) { 2708 Function *F = CGM.getIntrinsic(Intrinsic::arm_strexd); 2709 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, NULL); 2710 2711 Value *Tmp = CreateMemTemp(E->getArg(0)->getType()); 2712 Value *Val = EmitScalarExpr(E->getArg(0)); 2713 Builder.CreateStore(Val, Tmp); 2714 2715 Value *LdPtr = Builder.CreateBitCast(Tmp,llvm::PointerType::getUnqual(STy)); 2716 Val = Builder.CreateLoad(LdPtr); 2717 2718 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 2719 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 2720 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), Int8PtrTy); 2721 return Builder.CreateCall3(F, Arg0, Arg1, StPtr, "strexd"); 2722 } 2723 2724 if (BuiltinID == ARM::BI__builtin_arm_strex) { 2725 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 2726 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 2727 2728 QualType Ty = E->getArg(0)->getType(); 2729 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 2730 getContext().getTypeSize(Ty)); 2731 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 2732 2733 if (StoreVal->getType()->isPointerTy()) 2734 StoreVal = Builder.CreatePtrToInt(StoreVal, Int32Ty); 2735 else { 2736 StoreVal = Builder.CreateBitCast(StoreVal, StoreTy); 2737 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int32Ty); 2738 } 2739 2740 Function *F = CGM.getIntrinsic(Intrinsic::arm_strex, StoreAddr->getType()); 2741 return Builder.CreateCall2(F, StoreVal, StoreAddr, "strex"); 2742 } 2743 2744 if (BuiltinID == ARM::BI__builtin_arm_clrex) { 2745 Function *F = CGM.getIntrinsic(Intrinsic::arm_clrex); 2746 return Builder.CreateCall(F); 2747 } 2748 2749 if (BuiltinID == ARM::BI__builtin_arm_sevl) { 2750 Function *F = CGM.getIntrinsic(Intrinsic::arm_sevl); 2751 return Builder.CreateCall(F); 2752 } 2753 2754 // CRC32 2755 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 2756 switch (BuiltinID) { 2757 case ARM::BI__builtin_arm_crc32b: 2758 CRCIntrinsicID = Intrinsic::arm_crc32b; break; 2759 case ARM::BI__builtin_arm_crc32cb: 2760 CRCIntrinsicID = Intrinsic::arm_crc32cb; break; 2761 case ARM::BI__builtin_arm_crc32h: 2762 CRCIntrinsicID = Intrinsic::arm_crc32h; break; 2763 case ARM::BI__builtin_arm_crc32ch: 2764 CRCIntrinsicID = Intrinsic::arm_crc32ch; break; 2765 case ARM::BI__builtin_arm_crc32w: 2766 case ARM::BI__builtin_arm_crc32d: 2767 CRCIntrinsicID = Intrinsic::arm_crc32w; break; 2768 case ARM::BI__builtin_arm_crc32cw: 2769 case ARM::BI__builtin_arm_crc32cd: 2770 CRCIntrinsicID = Intrinsic::arm_crc32cw; break; 2771 } 2772 2773 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 2774 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 2775 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 2776 2777 // crc32{c,}d intrinsics are implemnted as two calls to crc32{c,}w 2778 // intrinsics, hence we need different codegen for these cases. 2779 if (BuiltinID == ARM::BI__builtin_arm_crc32d || 2780 BuiltinID == ARM::BI__builtin_arm_crc32cd) { 2781 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 2782 Value *Arg1a = Builder.CreateTruncOrBitCast(Arg1, Int32Ty); 2783 Value *Arg1b = Builder.CreateLShr(Arg1, C1); 2784 Arg1b = Builder.CreateTruncOrBitCast(Arg1b, Int32Ty); 2785 2786 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 2787 Value *Res = Builder.CreateCall2(F, Arg0, Arg1a); 2788 return Builder.CreateCall2(F, Res, Arg1b); 2789 } else { 2790 Arg1 = Builder.CreateZExtOrBitCast(Arg1, Int32Ty); 2791 2792 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 2793 return Builder.CreateCall2(F, Arg0, Arg1); 2794 } 2795 } 2796 2797 SmallVector<Value*, 4> Ops; 2798 llvm::Value *Align = 0; 2799 for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; i++) { 2800 if (i == 0) { 2801 switch (BuiltinID) { 2802 case ARM::BI__builtin_neon_vld1_v: 2803 case ARM::BI__builtin_neon_vld1q_v: 2804 case ARM::BI__builtin_neon_vld1q_lane_v: 2805 case ARM::BI__builtin_neon_vld1_lane_v: 2806 case ARM::BI__builtin_neon_vld1_dup_v: 2807 case ARM::BI__builtin_neon_vld1q_dup_v: 2808 case ARM::BI__builtin_neon_vst1_v: 2809 case ARM::BI__builtin_neon_vst1q_v: 2810 case ARM::BI__builtin_neon_vst1q_lane_v: 2811 case ARM::BI__builtin_neon_vst1_lane_v: 2812 case ARM::BI__builtin_neon_vst2_v: 2813 case ARM::BI__builtin_neon_vst2q_v: 2814 case ARM::BI__builtin_neon_vst2_lane_v: 2815 case ARM::BI__builtin_neon_vst2q_lane_v: 2816 case ARM::BI__builtin_neon_vst3_v: 2817 case ARM::BI__builtin_neon_vst3q_v: 2818 case ARM::BI__builtin_neon_vst3_lane_v: 2819 case ARM::BI__builtin_neon_vst3q_lane_v: 2820 case ARM::BI__builtin_neon_vst4_v: 2821 case ARM::BI__builtin_neon_vst4q_v: 2822 case ARM::BI__builtin_neon_vst4_lane_v: 2823 case ARM::BI__builtin_neon_vst4q_lane_v: 2824 // Get the alignment for the argument in addition to the value; 2825 // we'll use it later. 2826 std::pair<llvm::Value*, unsigned> Src = 2827 EmitPointerWithAlignment(E->getArg(0)); 2828 Ops.push_back(Src.first); 2829 Align = Builder.getInt32(Src.second); 2830 continue; 2831 } 2832 } 2833 if (i == 1) { 2834 switch (BuiltinID) { 2835 case ARM::BI__builtin_neon_vld2_v: 2836 case ARM::BI__builtin_neon_vld2q_v: 2837 case ARM::BI__builtin_neon_vld3_v: 2838 case ARM::BI__builtin_neon_vld3q_v: 2839 case ARM::BI__builtin_neon_vld4_v: 2840 case ARM::BI__builtin_neon_vld4q_v: 2841 case ARM::BI__builtin_neon_vld2_lane_v: 2842 case ARM::BI__builtin_neon_vld2q_lane_v: 2843 case ARM::BI__builtin_neon_vld3_lane_v: 2844 case ARM::BI__builtin_neon_vld3q_lane_v: 2845 case ARM::BI__builtin_neon_vld4_lane_v: 2846 case ARM::BI__builtin_neon_vld4q_lane_v: 2847 case ARM::BI__builtin_neon_vld2_dup_v: 2848 case ARM::BI__builtin_neon_vld3_dup_v: 2849 case ARM::BI__builtin_neon_vld4_dup_v: 2850 // Get the alignment for the argument in addition to the value; 2851 // we'll use it later. 2852 std::pair<llvm::Value*, unsigned> Src = 2853 EmitPointerWithAlignment(E->getArg(1)); 2854 Ops.push_back(Src.first); 2855 Align = Builder.getInt32(Src.second); 2856 continue; 2857 } 2858 } 2859 Ops.push_back(EmitScalarExpr(E->getArg(i))); 2860 } 2861 2862 // vget_lane and vset_lane are not overloaded and do not have an extra 2863 // argument that specifies the vector type. 2864 switch (BuiltinID) { 2865 default: break; 2866 case ARM::BI__builtin_neon_vget_lane_i8: 2867 case ARM::BI__builtin_neon_vget_lane_i16: 2868 case ARM::BI__builtin_neon_vget_lane_i32: 2869 case ARM::BI__builtin_neon_vget_lane_i64: 2870 case ARM::BI__builtin_neon_vget_lane_f32: 2871 case ARM::BI__builtin_neon_vgetq_lane_i8: 2872 case ARM::BI__builtin_neon_vgetq_lane_i16: 2873 case ARM::BI__builtin_neon_vgetq_lane_i32: 2874 case ARM::BI__builtin_neon_vgetq_lane_i64: 2875 case ARM::BI__builtin_neon_vgetq_lane_f32: 2876 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 2877 "vget_lane"); 2878 case ARM::BI__builtin_neon_vset_lane_i8: 2879 case ARM::BI__builtin_neon_vset_lane_i16: 2880 case ARM::BI__builtin_neon_vset_lane_i32: 2881 case ARM::BI__builtin_neon_vset_lane_i64: 2882 case ARM::BI__builtin_neon_vset_lane_f32: 2883 case ARM::BI__builtin_neon_vsetq_lane_i8: 2884 case ARM::BI__builtin_neon_vsetq_lane_i16: 2885 case ARM::BI__builtin_neon_vsetq_lane_i32: 2886 case ARM::BI__builtin_neon_vsetq_lane_i64: 2887 case ARM::BI__builtin_neon_vsetq_lane_f32: 2888 Ops.push_back(EmitScalarExpr(E->getArg(2))); 2889 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 2890 } 2891 2892 // Get the last argument, which specifies the vector type. 2893 llvm::APSInt Result; 2894 const Expr *Arg = E->getArg(E->getNumArgs()-1); 2895 if (!Arg->isIntegerConstantExpr(Result, getContext())) 2896 return 0; 2897 2898 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f || 2899 BuiltinID == ARM::BI__builtin_arm_vcvtr_d) { 2900 // Determine the overloaded type of this builtin. 2901 llvm::Type *Ty; 2902 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f) 2903 Ty = FloatTy; 2904 else 2905 Ty = DoubleTy; 2906 2907 // Determine whether this is an unsigned conversion or not. 2908 bool usgn = Result.getZExtValue() == 1; 2909 unsigned Int = usgn ? Intrinsic::arm_vcvtru : Intrinsic::arm_vcvtr; 2910 2911 // Call the appropriate intrinsic. 2912 Function *F = CGM.getIntrinsic(Int, Ty); 2913 return Builder.CreateCall(F, Ops, "vcvtr"); 2914 } 2915 2916 // Determine the type of this overloaded NEON intrinsic. 2917 NeonTypeFlags Type(Result.getZExtValue()); 2918 bool usgn = Type.isUnsigned(); 2919 bool quad = Type.isQuad(); 2920 bool rightShift = false; 2921 2922 llvm::VectorType *VTy = GetNeonType(this, Type); 2923 llvm::Type *Ty = VTy; 2924 if (!Ty) 2925 return 0; 2926 2927 unsigned Int; 2928 switch (BuiltinID) { 2929 default: return 0; 2930 case ARM::BI__builtin_neon_vbsl_v: 2931 case ARM::BI__builtin_neon_vbslq_v: 2932 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vbsl, Ty), 2933 Ops, "vbsl"); 2934 case ARM::BI__builtin_neon_vabd_v: 2935 case ARM::BI__builtin_neon_vabdq_v: 2936 Int = usgn ? Intrinsic::arm_neon_vabdu : Intrinsic::arm_neon_vabds; 2937 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vabd"); 2938 case ARM::BI__builtin_neon_vabs_v: 2939 case ARM::BI__builtin_neon_vabsq_v: 2940 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vabs, Ty), 2941 Ops, "vabs"); 2942 case ARM::BI__builtin_neon_vaddhn_v: { 2943 llvm::VectorType *SrcTy = 2944 llvm::VectorType::getExtendedElementVectorType(VTy); 2945 2946 // %sum = add <4 x i32> %lhs, %rhs 2947 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 2948 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 2949 Ops[0] = Builder.CreateAdd(Ops[0], Ops[1], "vaddhn"); 2950 2951 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 2952 Constant *ShiftAmt = ConstantInt::get(SrcTy->getElementType(), 2953 SrcTy->getScalarSizeInBits() / 2); 2954 ShiftAmt = ConstantVector::getSplat(VTy->getNumElements(), ShiftAmt); 2955 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vaddhn"); 2956 2957 // %res = trunc <4 x i32> %high to <4 x i16> 2958 return Builder.CreateTrunc(Ops[0], VTy, "vaddhn"); 2959 } 2960 case ARM::BI__builtin_neon_vcale_v: 2961 std::swap(Ops[0], Ops[1]); 2962 case ARM::BI__builtin_neon_vcage_v: { 2963 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vacged); 2964 return EmitNeonCall(F, Ops, "vcage"); 2965 } 2966 case ARM::BI__builtin_neon_vcaleq_v: 2967 std::swap(Ops[0], Ops[1]); 2968 case ARM::BI__builtin_neon_vcageq_v: { 2969 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vacgeq); 2970 return EmitNeonCall(F, Ops, "vcage"); 2971 } 2972 case ARM::BI__builtin_neon_vcalt_v: 2973 std::swap(Ops[0], Ops[1]); 2974 case ARM::BI__builtin_neon_vcagt_v: { 2975 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vacgtd); 2976 return EmitNeonCall(F, Ops, "vcagt"); 2977 } 2978 case ARM::BI__builtin_neon_vcaltq_v: 2979 std::swap(Ops[0], Ops[1]); 2980 case ARM::BI__builtin_neon_vcagtq_v: { 2981 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vacgtq); 2982 return EmitNeonCall(F, Ops, "vcagt"); 2983 } 2984 case ARM::BI__builtin_neon_vcls_v: 2985 case ARM::BI__builtin_neon_vclsq_v: { 2986 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vcls, Ty); 2987 return EmitNeonCall(F, Ops, "vcls"); 2988 } 2989 case ARM::BI__builtin_neon_vclz_v: 2990 case ARM::BI__builtin_neon_vclzq_v: { 2991 // Generate target-independent intrinsic; also need to add second argument 2992 // for whether or not clz of zero is undefined; on ARM it isn't. 2993 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, Ty); 2994 Ops.push_back(Builder.getInt1(getTarget().isCLZForZeroUndef())); 2995 return EmitNeonCall(F, Ops, "vclz"); 2996 } 2997 case ARM::BI__builtin_neon_vcnt_v: 2998 case ARM::BI__builtin_neon_vcntq_v: { 2999 // generate target-independent intrinsic 3000 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, Ty); 3001 return EmitNeonCall(F, Ops, "vctpop"); 3002 } 3003 case ARM::BI__builtin_neon_vcvt_f16_v: { 3004 assert(Type.getEltType() == NeonTypeFlags::Float16 && !quad && 3005 "unexpected vcvt_f16_v builtin"); 3006 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vcvtfp2hf); 3007 return EmitNeonCall(F, Ops, "vcvt"); 3008 } 3009 case ARM::BI__builtin_neon_vcvt_f32_f16: { 3010 assert(Type.getEltType() == NeonTypeFlags::Float16 && !quad && 3011 "unexpected vcvt_f32_f16 builtin"); 3012 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vcvthf2fp); 3013 return EmitNeonCall(F, Ops, "vcvt"); 3014 } 3015 case ARM::BI__builtin_neon_vcvt_f32_v: 3016 case ARM::BI__builtin_neon_vcvtq_f32_v: 3017 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3018 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, quad)); 3019 return usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 3020 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 3021 case ARM::BI__builtin_neon_vcvt_s32_v: 3022 case ARM::BI__builtin_neon_vcvt_u32_v: 3023 case ARM::BI__builtin_neon_vcvtq_s32_v: 3024 case ARM::BI__builtin_neon_vcvtq_u32_v: { 3025 llvm::Type *FloatTy = 3026 GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, quad)); 3027 Ops[0] = Builder.CreateBitCast(Ops[0], FloatTy); 3028 return usgn ? Builder.CreateFPToUI(Ops[0], Ty, "vcvt") 3029 : Builder.CreateFPToSI(Ops[0], Ty, "vcvt"); 3030 } 3031 case ARM::BI__builtin_neon_vcvt_n_f32_v: 3032 case ARM::BI__builtin_neon_vcvtq_n_f32_v: { 3033 llvm::Type *FloatTy = 3034 GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, quad)); 3035 llvm::Type *Tys[2] = { FloatTy, Ty }; 3036 Int = usgn ? Intrinsic::arm_neon_vcvtfxu2fp 3037 : Intrinsic::arm_neon_vcvtfxs2fp; 3038 Function *F = CGM.getIntrinsic(Int, Tys); 3039 return EmitNeonCall(F, Ops, "vcvt_n"); 3040 } 3041 case ARM::BI__builtin_neon_vcvt_n_s32_v: 3042 case ARM::BI__builtin_neon_vcvt_n_u32_v: 3043 case ARM::BI__builtin_neon_vcvtq_n_s32_v: 3044 case ARM::BI__builtin_neon_vcvtq_n_u32_v: { 3045 llvm::Type *FloatTy = 3046 GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, quad)); 3047 llvm::Type *Tys[2] = { Ty, FloatTy }; 3048 Int = usgn ? Intrinsic::arm_neon_vcvtfp2fxu 3049 : Intrinsic::arm_neon_vcvtfp2fxs; 3050 Function *F = CGM.getIntrinsic(Int, Tys); 3051 return EmitNeonCall(F, Ops, "vcvt_n"); 3052 } 3053 case ARM::BI__builtin_neon_vext_v: 3054 case ARM::BI__builtin_neon_vextq_v: { 3055 int CV = cast<ConstantInt>(Ops[2])->getSExtValue(); 3056 SmallVector<Constant*, 16> Indices; 3057 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 3058 Indices.push_back(ConstantInt::get(Int32Ty, i+CV)); 3059 3060 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3061 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3062 Value *SV = llvm::ConstantVector::get(Indices); 3063 return Builder.CreateShuffleVector(Ops[0], Ops[1], SV, "vext"); 3064 } 3065 case ARM::BI__builtin_neon_vhadd_v: 3066 case ARM::BI__builtin_neon_vhaddq_v: 3067 Int = usgn ? Intrinsic::arm_neon_vhaddu : Intrinsic::arm_neon_vhadds; 3068 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vhadd"); 3069 case ARM::BI__builtin_neon_vhsub_v: 3070 case ARM::BI__builtin_neon_vhsubq_v: 3071 Int = usgn ? Intrinsic::arm_neon_vhsubu : Intrinsic::arm_neon_vhsubs; 3072 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vhsub"); 3073 case ARM::BI__builtin_neon_vld1_v: 3074 case ARM::BI__builtin_neon_vld1q_v: 3075 Ops.push_back(Align); 3076 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Ty), 3077 Ops, "vld1"); 3078 case ARM::BI__builtin_neon_vld1q_lane_v: 3079 // Handle 64-bit integer elements as a special case. Use shuffles of 3080 // one-element vectors to avoid poor code for i64 in the backend. 3081 if (VTy->getElementType()->isIntegerTy(64)) { 3082 // Extract the other lane. 3083 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3084 int Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); 3085 Value *SV = llvm::ConstantVector::get(ConstantInt::get(Int32Ty, 1-Lane)); 3086 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 3087 // Load the value as a one-element vector. 3088 Ty = llvm::VectorType::get(VTy->getElementType(), 1); 3089 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Ty); 3090 Value *Ld = Builder.CreateCall2(F, Ops[0], Align); 3091 // Combine them. 3092 SmallVector<Constant*, 2> Indices; 3093 Indices.push_back(ConstantInt::get(Int32Ty, 1-Lane)); 3094 Indices.push_back(ConstantInt::get(Int32Ty, Lane)); 3095 SV = llvm::ConstantVector::get(Indices); 3096 return Builder.CreateShuffleVector(Ops[1], Ld, SV, "vld1q_lane"); 3097 } 3098 // fall through 3099 case ARM::BI__builtin_neon_vld1_lane_v: { 3100 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3101 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 3102 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3103 LoadInst *Ld = Builder.CreateLoad(Ops[0]); 3104 Ld->setAlignment(cast<ConstantInt>(Align)->getZExtValue()); 3105 return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); 3106 } 3107 case ARM::BI__builtin_neon_vld1_dup_v: 3108 case ARM::BI__builtin_neon_vld1q_dup_v: { 3109 Value *V = UndefValue::get(Ty); 3110 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 3111 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3112 LoadInst *Ld = Builder.CreateLoad(Ops[0]); 3113 Ld->setAlignment(cast<ConstantInt>(Align)->getZExtValue()); 3114 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 3115 Ops[0] = Builder.CreateInsertElement(V, Ld, CI); 3116 return EmitNeonSplat(Ops[0], CI); 3117 } 3118 case ARM::BI__builtin_neon_vld2_v: 3119 case ARM::BI__builtin_neon_vld2q_v: { 3120 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld2, Ty); 3121 Ops[1] = Builder.CreateCall2(F, Ops[1], Align, "vld2"); 3122 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3123 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3124 return Builder.CreateStore(Ops[1], Ops[0]); 3125 } 3126 case ARM::BI__builtin_neon_vld3_v: 3127 case ARM::BI__builtin_neon_vld3q_v: { 3128 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld3, Ty); 3129 Ops[1] = Builder.CreateCall2(F, Ops[1], Align, "vld3"); 3130 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3131 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3132 return Builder.CreateStore(Ops[1], Ops[0]); 3133 } 3134 case ARM::BI__builtin_neon_vld4_v: 3135 case ARM::BI__builtin_neon_vld4q_v: { 3136 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld4, Ty); 3137 Ops[1] = Builder.CreateCall2(F, Ops[1], Align, "vld4"); 3138 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3139 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3140 return Builder.CreateStore(Ops[1], Ops[0]); 3141 } 3142 case ARM::BI__builtin_neon_vld2_lane_v: 3143 case ARM::BI__builtin_neon_vld2q_lane_v: { 3144 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld2lane, Ty); 3145 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3146 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 3147 Ops.push_back(Align); 3148 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld2_lane"); 3149 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3150 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3151 return Builder.CreateStore(Ops[1], Ops[0]); 3152 } 3153 case ARM::BI__builtin_neon_vld3_lane_v: 3154 case ARM::BI__builtin_neon_vld3q_lane_v: { 3155 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld3lane, Ty); 3156 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3157 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 3158 Ops[4] = Builder.CreateBitCast(Ops[4], Ty); 3159 Ops.push_back(Align); 3160 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld3_lane"); 3161 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3162 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3163 return Builder.CreateStore(Ops[1], Ops[0]); 3164 } 3165 case ARM::BI__builtin_neon_vld4_lane_v: 3166 case ARM::BI__builtin_neon_vld4q_lane_v: { 3167 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld4lane, Ty); 3168 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3169 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 3170 Ops[4] = Builder.CreateBitCast(Ops[4], Ty); 3171 Ops[5] = Builder.CreateBitCast(Ops[5], Ty); 3172 Ops.push_back(Align); 3173 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld3_lane"); 3174 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3175 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3176 return Builder.CreateStore(Ops[1], Ops[0]); 3177 } 3178 case ARM::BI__builtin_neon_vld2_dup_v: 3179 case ARM::BI__builtin_neon_vld3_dup_v: 3180 case ARM::BI__builtin_neon_vld4_dup_v: { 3181 // Handle 64-bit elements as a special-case. There is no "dup" needed. 3182 if (VTy->getElementType()->getPrimitiveSizeInBits() == 64) { 3183 switch (BuiltinID) { 3184 case ARM::BI__builtin_neon_vld2_dup_v: 3185 Int = Intrinsic::arm_neon_vld2; 3186 break; 3187 case ARM::BI__builtin_neon_vld3_dup_v: 3188 Int = Intrinsic::arm_neon_vld3; 3189 break; 3190 case ARM::BI__builtin_neon_vld4_dup_v: 3191 Int = Intrinsic::arm_neon_vld4; 3192 break; 3193 default: llvm_unreachable("unknown vld_dup intrinsic?"); 3194 } 3195 Function *F = CGM.getIntrinsic(Int, Ty); 3196 Ops[1] = Builder.CreateCall2(F, Ops[1], Align, "vld_dup"); 3197 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3198 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3199 return Builder.CreateStore(Ops[1], Ops[0]); 3200 } 3201 switch (BuiltinID) { 3202 case ARM::BI__builtin_neon_vld2_dup_v: 3203 Int = Intrinsic::arm_neon_vld2lane; 3204 break; 3205 case ARM::BI__builtin_neon_vld3_dup_v: 3206 Int = Intrinsic::arm_neon_vld3lane; 3207 break; 3208 case ARM::BI__builtin_neon_vld4_dup_v: 3209 Int = Intrinsic::arm_neon_vld4lane; 3210 break; 3211 default: llvm_unreachable("unknown vld_dup intrinsic?"); 3212 } 3213 Function *F = CGM.getIntrinsic(Int, Ty); 3214 llvm::StructType *STy = cast<llvm::StructType>(F->getReturnType()); 3215 3216 SmallVector<Value*, 6> Args; 3217 Args.push_back(Ops[1]); 3218 Args.append(STy->getNumElements(), UndefValue::get(Ty)); 3219 3220 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 3221 Args.push_back(CI); 3222 Args.push_back(Align); 3223 3224 Ops[1] = Builder.CreateCall(F, Args, "vld_dup"); 3225 // splat lane 0 to all elts in each vector of the result. 3226 for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { 3227 Value *Val = Builder.CreateExtractValue(Ops[1], i); 3228 Value *Elt = Builder.CreateBitCast(Val, Ty); 3229 Elt = EmitNeonSplat(Elt, CI); 3230 Elt = Builder.CreateBitCast(Elt, Val->getType()); 3231 Ops[1] = Builder.CreateInsertValue(Ops[1], Elt, i); 3232 } 3233 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3234 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3235 return Builder.CreateStore(Ops[1], Ops[0]); 3236 } 3237 case ARM::BI__builtin_neon_vmax_v: 3238 case ARM::BI__builtin_neon_vmaxq_v: 3239 Int = usgn ? Intrinsic::arm_neon_vmaxu : Intrinsic::arm_neon_vmaxs; 3240 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmax"); 3241 case ARM::BI__builtin_neon_vmin_v: 3242 case ARM::BI__builtin_neon_vminq_v: 3243 Int = usgn ? Intrinsic::arm_neon_vminu : Intrinsic::arm_neon_vmins; 3244 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmin"); 3245 case ARM::BI__builtin_neon_vmovl_v: { 3246 llvm::Type *DTy =llvm::VectorType::getTruncatedElementVectorType(VTy); 3247 Ops[0] = Builder.CreateBitCast(Ops[0], DTy); 3248 if (usgn) 3249 return Builder.CreateZExt(Ops[0], Ty, "vmovl"); 3250 return Builder.CreateSExt(Ops[0], Ty, "vmovl"); 3251 } 3252 case ARM::BI__builtin_neon_vmovn_v: { 3253 llvm::Type *QTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3254 Ops[0] = Builder.CreateBitCast(Ops[0], QTy); 3255 return Builder.CreateTrunc(Ops[0], Ty, "vmovn"); 3256 } 3257 case ARM::BI__builtin_neon_vmul_v: 3258 case ARM::BI__builtin_neon_vmulq_v: 3259 assert(Type.isPoly() && "vmul builtin only supported for polynomial types"); 3260 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vmulp, Ty), 3261 Ops, "vmul"); 3262 case ARM::BI__builtin_neon_vmull_v: 3263 // FIXME: the integer vmull operations could be emitted in terms of pure 3264 // LLVM IR (2 exts followed by a mul). Unfortunately LLVM has a habit of 3265 // hoisting the exts outside loops. Until global ISel comes along that can 3266 // see through such movement this leads to bad CodeGen. So we need an 3267 // intrinsic for now. 3268 Int = usgn ? Intrinsic::arm_neon_vmullu : Intrinsic::arm_neon_vmulls; 3269 Int = Type.isPoly() ? (unsigned)Intrinsic::arm_neon_vmullp : Int; 3270 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 3271 case ARM::BI__builtin_neon_vfma_v: 3272 case ARM::BI__builtin_neon_vfmaq_v: { 3273 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 3274 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3275 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3276 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3277 3278 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 3279 return Builder.CreateCall3(F, Ops[1], Ops[2], Ops[0]); 3280 } 3281 case ARM::BI__builtin_neon_vpadal_v: 3282 case ARM::BI__builtin_neon_vpadalq_v: { 3283 Int = usgn ? Intrinsic::arm_neon_vpadalu : Intrinsic::arm_neon_vpadals; 3284 // The source operand type has twice as many elements of half the size. 3285 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3286 llvm::Type *EltTy = 3287 llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3288 llvm::Type *NarrowTy = 3289 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3290 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3291 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vpadal"); 3292 } 3293 case ARM::BI__builtin_neon_vpadd_v: 3294 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vpadd, Ty), 3295 Ops, "vpadd"); 3296 case ARM::BI__builtin_neon_vpaddl_v: 3297 case ARM::BI__builtin_neon_vpaddlq_v: { 3298 Int = usgn ? Intrinsic::arm_neon_vpaddlu : Intrinsic::arm_neon_vpaddls; 3299 // The source operand type has twice as many elements of half the size. 3300 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3301 llvm::Type *EltTy = llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3302 llvm::Type *NarrowTy = 3303 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3304 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3305 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vpaddl"); 3306 } 3307 case ARM::BI__builtin_neon_vpmax_v: 3308 Int = usgn ? Intrinsic::arm_neon_vpmaxu : Intrinsic::arm_neon_vpmaxs; 3309 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmax"); 3310 case ARM::BI__builtin_neon_vpmin_v: 3311 Int = usgn ? Intrinsic::arm_neon_vpminu : Intrinsic::arm_neon_vpmins; 3312 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmin"); 3313 case ARM::BI__builtin_neon_vqabs_v: 3314 case ARM::BI__builtin_neon_vqabsq_v: 3315 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqabs, Ty), 3316 Ops, "vqabs"); 3317 case ARM::BI__builtin_neon_vqadd_v: 3318 case ARM::BI__builtin_neon_vqaddq_v: 3319 Int = usgn ? Intrinsic::arm_neon_vqaddu : Intrinsic::arm_neon_vqadds; 3320 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqadd"); 3321 case ARM::BI__builtin_neon_vqdmlal_v: { 3322 SmallVector<Value *, 2> MulOps(Ops.begin() + 1, Ops.end()); 3323 Value *Mul = EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqdmull, Ty), 3324 MulOps, "vqdmlal"); 3325 3326 SmallVector<Value *, 2> AddOps; 3327 AddOps.push_back(Ops[0]); 3328 AddOps.push_back(Mul); 3329 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqadds, Ty), 3330 AddOps, "vqdmlal"); 3331 } 3332 case ARM::BI__builtin_neon_vqdmlsl_v: { 3333 SmallVector<Value *, 2> MulOps(Ops.begin() + 1, Ops.end()); 3334 Value *Mul = EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqdmull, Ty), 3335 MulOps, "vqdmlsl"); 3336 3337 SmallVector<Value *, 2> SubOps; 3338 SubOps.push_back(Ops[0]); 3339 SubOps.push_back(Mul); 3340 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqsubs, Ty), 3341 SubOps, "vqdmlsl"); 3342 } 3343 case ARM::BI__builtin_neon_vqdmulh_v: 3344 case ARM::BI__builtin_neon_vqdmulhq_v: 3345 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqdmulh, Ty), 3346 Ops, "vqdmulh"); 3347 case ARM::BI__builtin_neon_vqdmull_v: 3348 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqdmull, Ty), 3349 Ops, "vqdmull"); 3350 case ARM::BI__builtin_neon_vqmovn_v: 3351 Int = usgn ? Intrinsic::arm_neon_vqmovnu : Intrinsic::arm_neon_vqmovns; 3352 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqmovn"); 3353 case ARM::BI__builtin_neon_vqmovun_v: 3354 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqmovnsu, Ty), 3355 Ops, "vqdmull"); 3356 case ARM::BI__builtin_neon_vqneg_v: 3357 case ARM::BI__builtin_neon_vqnegq_v: 3358 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqneg, Ty), 3359 Ops, "vqneg"); 3360 case ARM::BI__builtin_neon_vqrdmulh_v: 3361 case ARM::BI__builtin_neon_vqrdmulhq_v: 3362 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqrdmulh, Ty), 3363 Ops, "vqrdmulh"); 3364 case ARM::BI__builtin_neon_vqrshl_v: 3365 case ARM::BI__builtin_neon_vqrshlq_v: 3366 Int = usgn ? Intrinsic::arm_neon_vqrshiftu : Intrinsic::arm_neon_vqrshifts; 3367 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshl"); 3368 case ARM::BI__builtin_neon_vqrshrn_n_v: 3369 Int = 3370 usgn ? Intrinsic::arm_neon_vqrshiftnu : Intrinsic::arm_neon_vqrshiftns; 3371 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n", 3372 1, true); 3373 case ARM::BI__builtin_neon_vqrshrun_n_v: 3374 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqrshiftnsu, Ty), 3375 Ops, "vqrshrun_n", 1, true); 3376 case ARM::BI__builtin_neon_vqshl_v: 3377 case ARM::BI__builtin_neon_vqshlq_v: 3378 Int = usgn ? Intrinsic::arm_neon_vqshiftu : Intrinsic::arm_neon_vqshifts; 3379 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshl"); 3380 case ARM::BI__builtin_neon_vqshl_n_v: 3381 case ARM::BI__builtin_neon_vqshlq_n_v: 3382 Int = usgn ? Intrinsic::arm_neon_vqshiftu : Intrinsic::arm_neon_vqshifts; 3383 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshl_n", 3384 1, false); 3385 case ARM::BI__builtin_neon_vqshlu_n_v: 3386 case ARM::BI__builtin_neon_vqshluq_n_v: 3387 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqshiftsu, Ty), 3388 Ops, "vqshlu", 1, false); 3389 case ARM::BI__builtin_neon_vqshrn_n_v: 3390 Int = usgn ? Intrinsic::arm_neon_vqshiftnu : Intrinsic::arm_neon_vqshiftns; 3391 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n", 3392 1, true); 3393 case ARM::BI__builtin_neon_vqshrun_n_v: 3394 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqshiftnsu, Ty), 3395 Ops, "vqshrun_n", 1, true); 3396 case ARM::BI__builtin_neon_vqsub_v: 3397 case ARM::BI__builtin_neon_vqsubq_v: 3398 Int = usgn ? Intrinsic::arm_neon_vqsubu : Intrinsic::arm_neon_vqsubs; 3399 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqsub"); 3400 case ARM::BI__builtin_neon_vraddhn_v: 3401 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vraddhn, Ty), 3402 Ops, "vraddhn"); 3403 case ARM::BI__builtin_neon_vrecpe_v: 3404 case ARM::BI__builtin_neon_vrecpeq_v: 3405 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecpe, Ty), 3406 Ops, "vrecpe"); 3407 case ARM::BI__builtin_neon_vrecps_v: 3408 case ARM::BI__builtin_neon_vrecpsq_v: 3409 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecps, Ty), 3410 Ops, "vrecps"); 3411 case ARM::BI__builtin_neon_vrhadd_v: 3412 case ARM::BI__builtin_neon_vrhaddq_v: 3413 Int = usgn ? Intrinsic::arm_neon_vrhaddu : Intrinsic::arm_neon_vrhadds; 3414 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrhadd"); 3415 case ARM::BI__builtin_neon_vrshl_v: 3416 case ARM::BI__builtin_neon_vrshlq_v: 3417 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 3418 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshl"); 3419 case ARM::BI__builtin_neon_vrshrn_n_v: 3420 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrshiftn, Ty), 3421 Ops, "vrshrn_n", 1, true); 3422 case ARM::BI__builtin_neon_vrshr_n_v: 3423 case ARM::BI__builtin_neon_vrshrq_n_v: 3424 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 3425 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n", 1, true); 3426 case ARM::BI__builtin_neon_vrsqrte_v: 3427 case ARM::BI__builtin_neon_vrsqrteq_v: 3428 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrsqrte, Ty), 3429 Ops, "vrsqrte"); 3430 case ARM::BI__builtin_neon_vrsqrts_v: 3431 case ARM::BI__builtin_neon_vrsqrtsq_v: 3432 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrsqrts, Ty), 3433 Ops, "vrsqrts"); 3434 case ARM::BI__builtin_neon_vrsra_n_v: 3435 case ARM::BI__builtin_neon_vrsraq_n_v: 3436 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3437 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3438 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, true); 3439 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 3440 Ops[1] = Builder.CreateCall2(CGM.getIntrinsic(Int, Ty), Ops[1], Ops[2]); 3441 return Builder.CreateAdd(Ops[0], Ops[1], "vrsra_n"); 3442 case ARM::BI__builtin_neon_vrsubhn_v: 3443 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrsubhn, Ty), 3444 Ops, "vrsubhn"); 3445 case ARM::BI__builtin_neon_vshl_v: 3446 case ARM::BI__builtin_neon_vshlq_v: 3447 Int = usgn ? Intrinsic::arm_neon_vshiftu : Intrinsic::arm_neon_vshifts; 3448 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vshl"); 3449 case ARM::BI__builtin_neon_vshll_n_v: 3450 Int = usgn ? Intrinsic::arm_neon_vshiftlu : Intrinsic::arm_neon_vshiftls; 3451 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vshll", 1); 3452 case ARM::BI__builtin_neon_vshl_n_v: 3453 case ARM::BI__builtin_neon_vshlq_n_v: 3454 Ops[1] = EmitNeonShiftVector(Ops[1], Ty, false); 3455 return Builder.CreateShl(Builder.CreateBitCast(Ops[0],Ty), Ops[1], 3456 "vshl_n"); 3457 case ARM::BI__builtin_neon_vshrn_n_v: 3458 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vshiftn, Ty), 3459 Ops, "vshrn_n", 1, true); 3460 case ARM::BI__builtin_neon_vshr_n_v: 3461 case ARM::BI__builtin_neon_vshrq_n_v: 3462 return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, usgn, "vshr_n"); 3463 case ARM::BI__builtin_neon_vsri_n_v: 3464 case ARM::BI__builtin_neon_vsriq_n_v: 3465 rightShift = true; 3466 case ARM::BI__builtin_neon_vsli_n_v: 3467 case ARM::BI__builtin_neon_vsliq_n_v: 3468 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, rightShift); 3469 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vshiftins, Ty), 3470 Ops, "vsli_n"); 3471 case ARM::BI__builtin_neon_vsra_n_v: 3472 case ARM::BI__builtin_neon_vsraq_n_v: 3473 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3474 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 3475 return Builder.CreateAdd(Ops[0], Ops[1]); 3476 case ARM::BI__builtin_neon_vst1_v: 3477 case ARM::BI__builtin_neon_vst1q_v: 3478 Ops.push_back(Align); 3479 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, Ty), 3480 Ops, ""); 3481 case ARM::BI__builtin_neon_vst1q_lane_v: 3482 // Handle 64-bit integer elements as a special case. Use a shuffle to get 3483 // a one-element vector and avoid poor code for i64 in the backend. 3484 if (VTy->getElementType()->isIntegerTy(64)) { 3485 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3486 Value *SV = llvm::ConstantVector::get(cast<llvm::Constant>(Ops[2])); 3487 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 3488 Ops[2] = Align; 3489 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, 3490 Ops[1]->getType()), Ops); 3491 } 3492 // fall through 3493 case ARM::BI__builtin_neon_vst1_lane_v: { 3494 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3495 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 3496 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3497 StoreInst *St = Builder.CreateStore(Ops[1], 3498 Builder.CreateBitCast(Ops[0], Ty)); 3499 St->setAlignment(cast<ConstantInt>(Align)->getZExtValue()); 3500 return St; 3501 } 3502 case ARM::BI__builtin_neon_vst2_v: 3503 case ARM::BI__builtin_neon_vst2q_v: 3504 Ops.push_back(Align); 3505 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst2, Ty), 3506 Ops, ""); 3507 case ARM::BI__builtin_neon_vst2_lane_v: 3508 case ARM::BI__builtin_neon_vst2q_lane_v: 3509 Ops.push_back(Align); 3510 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst2lane, Ty), 3511 Ops, ""); 3512 case ARM::BI__builtin_neon_vst3_v: 3513 case ARM::BI__builtin_neon_vst3q_v: 3514 Ops.push_back(Align); 3515 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst3, Ty), 3516 Ops, ""); 3517 case ARM::BI__builtin_neon_vst3_lane_v: 3518 case ARM::BI__builtin_neon_vst3q_lane_v: 3519 Ops.push_back(Align); 3520 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst3lane, Ty), 3521 Ops, ""); 3522 case ARM::BI__builtin_neon_vst4_v: 3523 case ARM::BI__builtin_neon_vst4q_v: 3524 Ops.push_back(Align); 3525 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst4, Ty), 3526 Ops, ""); 3527 case ARM::BI__builtin_neon_vst4_lane_v: 3528 case ARM::BI__builtin_neon_vst4q_lane_v: 3529 Ops.push_back(Align); 3530 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst4lane, Ty), 3531 Ops, ""); 3532 case ARM::BI__builtin_neon_vsubhn_v: { 3533 llvm::VectorType *SrcTy = 3534 llvm::VectorType::getExtendedElementVectorType(VTy); 3535 3536 // %sum = add <4 x i32> %lhs, %rhs 3537 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3538 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 3539 Ops[0] = Builder.CreateSub(Ops[0], Ops[1], "vsubhn"); 3540 3541 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 3542 Constant *ShiftAmt = ConstantInt::get(SrcTy->getElementType(), 3543 SrcTy->getScalarSizeInBits() / 2); 3544 ShiftAmt = ConstantVector::getSplat(VTy->getNumElements(), ShiftAmt); 3545 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vsubhn"); 3546 3547 // %res = trunc <4 x i32> %high to <4 x i16> 3548 return Builder.CreateTrunc(Ops[0], VTy, "vsubhn"); 3549 } 3550 case ARM::BI__builtin_neon_vtbl1_v: 3551 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl1), 3552 Ops, "vtbl1"); 3553 case ARM::BI__builtin_neon_vtbl2_v: 3554 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl2), 3555 Ops, "vtbl2"); 3556 case ARM::BI__builtin_neon_vtbl3_v: 3557 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl3), 3558 Ops, "vtbl3"); 3559 case ARM::BI__builtin_neon_vtbl4_v: 3560 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl4), 3561 Ops, "vtbl4"); 3562 case ARM::BI__builtin_neon_vtbx1_v: 3563 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx1), 3564 Ops, "vtbx1"); 3565 case ARM::BI__builtin_neon_vtbx2_v: 3566 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx2), 3567 Ops, "vtbx2"); 3568 case ARM::BI__builtin_neon_vtbx3_v: 3569 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx3), 3570 Ops, "vtbx3"); 3571 case ARM::BI__builtin_neon_vtbx4_v: 3572 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx4), 3573 Ops, "vtbx4"); 3574 case ARM::BI__builtin_neon_vtst_v: 3575 case ARM::BI__builtin_neon_vtstq_v: { 3576 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3577 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3578 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 3579 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 3580 ConstantAggregateZero::get(Ty)); 3581 return Builder.CreateSExt(Ops[0], Ty, "vtst"); 3582 } 3583 case ARM::BI__builtin_neon_vtrn_v: 3584 case ARM::BI__builtin_neon_vtrnq_v: { 3585 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3586 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3587 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3588 Value *SV = 0; 3589 3590 for (unsigned vi = 0; vi != 2; ++vi) { 3591 SmallVector<Constant*, 16> Indices; 3592 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 3593 Indices.push_back(Builder.getInt32(i+vi)); 3594 Indices.push_back(Builder.getInt32(i+e+vi)); 3595 } 3596 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ops[0], vi); 3597 SV = llvm::ConstantVector::get(Indices); 3598 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vtrn"); 3599 SV = Builder.CreateStore(SV, Addr); 3600 } 3601 return SV; 3602 } 3603 case ARM::BI__builtin_neon_vuzp_v: 3604 case ARM::BI__builtin_neon_vuzpq_v: { 3605 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3606 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3607 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3608 Value *SV = 0; 3609 3610 for (unsigned vi = 0; vi != 2; ++vi) { 3611 SmallVector<Constant*, 16> Indices; 3612 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 3613 Indices.push_back(ConstantInt::get(Int32Ty, 2*i+vi)); 3614 3615 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ops[0], vi); 3616 SV = llvm::ConstantVector::get(Indices); 3617 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vuzp"); 3618 SV = Builder.CreateStore(SV, Addr); 3619 } 3620 return SV; 3621 } 3622 case ARM::BI__builtin_neon_vzip_v: 3623 case ARM::BI__builtin_neon_vzipq_v: { 3624 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3625 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3626 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3627 Value *SV = 0; 3628 3629 for (unsigned vi = 0; vi != 2; ++vi) { 3630 SmallVector<Constant*, 16> Indices; 3631 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 3632 Indices.push_back(ConstantInt::get(Int32Ty, (i + vi*e) >> 1)); 3633 Indices.push_back(ConstantInt::get(Int32Ty, ((i + vi*e) >> 1)+e)); 3634 } 3635 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ops[0], vi); 3636 SV = llvm::ConstantVector::get(Indices); 3637 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vzip"); 3638 SV = Builder.CreateStore(SV, Addr); 3639 } 3640 return SV; 3641 } 3642 } 3643 } 3644 3645 llvm::Value *CodeGenFunction:: 3646 BuildVector(ArrayRef<llvm::Value*> Ops) { 3647 assert((Ops.size() & (Ops.size() - 1)) == 0 && 3648 "Not a power-of-two sized vector!"); 3649 bool AllConstants = true; 3650 for (unsigned i = 0, e = Ops.size(); i != e && AllConstants; ++i) 3651 AllConstants &= isa<Constant>(Ops[i]); 3652 3653 // If this is a constant vector, create a ConstantVector. 3654 if (AllConstants) { 3655 SmallVector<llvm::Constant*, 16> CstOps; 3656 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 3657 CstOps.push_back(cast<Constant>(Ops[i])); 3658 return llvm::ConstantVector::get(CstOps); 3659 } 3660 3661 // Otherwise, insertelement the values to build the vector. 3662 Value *Result = 3663 llvm::UndefValue::get(llvm::VectorType::get(Ops[0]->getType(), Ops.size())); 3664 3665 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 3666 Result = Builder.CreateInsertElement(Result, Ops[i], Builder.getInt32(i)); 3667 3668 return Result; 3669 } 3670 3671 Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, 3672 const CallExpr *E) { 3673 SmallVector<Value*, 4> Ops; 3674 3675 // Find out if any arguments are required to be integer constant expressions. 3676 unsigned ICEArguments = 0; 3677 ASTContext::GetBuiltinTypeError Error; 3678 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 3679 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 3680 3681 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) { 3682 // If this is a normal argument, just emit it as a scalar. 3683 if ((ICEArguments & (1 << i)) == 0) { 3684 Ops.push_back(EmitScalarExpr(E->getArg(i))); 3685 continue; 3686 } 3687 3688 // If this is required to be a constant, constant fold it so that we know 3689 // that the generated intrinsic gets a ConstantInt. 3690 llvm::APSInt Result; 3691 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 3692 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 3693 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 3694 } 3695 3696 switch (BuiltinID) { 3697 default: return 0; 3698 case X86::BI__builtin_ia32_vec_init_v8qi: 3699 case X86::BI__builtin_ia32_vec_init_v4hi: 3700 case X86::BI__builtin_ia32_vec_init_v2si: 3701 return Builder.CreateBitCast(BuildVector(Ops), 3702 llvm::Type::getX86_MMXTy(getLLVMContext())); 3703 case X86::BI__builtin_ia32_vec_ext_v2si: 3704 return Builder.CreateExtractElement(Ops[0], 3705 llvm::ConstantInt::get(Ops[1]->getType(), 0)); 3706 case X86::BI__builtin_ia32_ldmxcsr: { 3707 Value *Tmp = CreateMemTemp(E->getArg(0)->getType()); 3708 Builder.CreateStore(Ops[0], Tmp); 3709 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_ldmxcsr), 3710 Builder.CreateBitCast(Tmp, Int8PtrTy)); 3711 } 3712 case X86::BI__builtin_ia32_stmxcsr: { 3713 Value *Tmp = CreateMemTemp(E->getType()); 3714 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_stmxcsr), 3715 Builder.CreateBitCast(Tmp, Int8PtrTy)); 3716 return Builder.CreateLoad(Tmp, "stmxcsr"); 3717 } 3718 case X86::BI__builtin_ia32_storehps: 3719 case X86::BI__builtin_ia32_storelps: { 3720 llvm::Type *PtrTy = llvm::PointerType::getUnqual(Int64Ty); 3721 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 2); 3722 3723 // cast val v2i64 3724 Ops[1] = Builder.CreateBitCast(Ops[1], VecTy, "cast"); 3725 3726 // extract (0, 1) 3727 unsigned Index = BuiltinID == X86::BI__builtin_ia32_storelps ? 0 : 1; 3728 llvm::Value *Idx = llvm::ConstantInt::get(Int32Ty, Index); 3729 Ops[1] = Builder.CreateExtractElement(Ops[1], Idx, "extract"); 3730 3731 // cast pointer to i64 & store 3732 Ops[0] = Builder.CreateBitCast(Ops[0], PtrTy); 3733 return Builder.CreateStore(Ops[1], Ops[0]); 3734 } 3735 case X86::BI__builtin_ia32_palignr: { 3736 unsigned shiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 3737 3738 // If palignr is shifting the pair of input vectors less than 9 bytes, 3739 // emit a shuffle instruction. 3740 if (shiftVal <= 8) { 3741 SmallVector<llvm::Constant*, 8> Indices; 3742 for (unsigned i = 0; i != 8; ++i) 3743 Indices.push_back(llvm::ConstantInt::get(Int32Ty, shiftVal + i)); 3744 3745 Value* SV = llvm::ConstantVector::get(Indices); 3746 return Builder.CreateShuffleVector(Ops[1], Ops[0], SV, "palignr"); 3747 } 3748 3749 // If palignr is shifting the pair of input vectors more than 8 but less 3750 // than 16 bytes, emit a logical right shift of the destination. 3751 if (shiftVal < 16) { 3752 // MMX has these as 1 x i64 vectors for some odd optimization reasons. 3753 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 1); 3754 3755 Ops[0] = Builder.CreateBitCast(Ops[0], VecTy, "cast"); 3756 Ops[1] = llvm::ConstantInt::get(VecTy, (shiftVal-8) * 8); 3757 3758 // create i32 constant 3759 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_mmx_psrl_q); 3760 return Builder.CreateCall(F, makeArrayRef(&Ops[0], 2), "palignr"); 3761 } 3762 3763 // If palignr is shifting the pair of vectors more than 16 bytes, emit zero. 3764 return llvm::Constant::getNullValue(ConvertType(E->getType())); 3765 } 3766 case X86::BI__builtin_ia32_palignr128: { 3767 unsigned shiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 3768 3769 // If palignr is shifting the pair of input vectors less than 17 bytes, 3770 // emit a shuffle instruction. 3771 if (shiftVal <= 16) { 3772 SmallVector<llvm::Constant*, 16> Indices; 3773 for (unsigned i = 0; i != 16; ++i) 3774 Indices.push_back(llvm::ConstantInt::get(Int32Ty, shiftVal + i)); 3775 3776 Value* SV = llvm::ConstantVector::get(Indices); 3777 return Builder.CreateShuffleVector(Ops[1], Ops[0], SV, "palignr"); 3778 } 3779 3780 // If palignr is shifting the pair of input vectors more than 16 but less 3781 // than 32 bytes, emit a logical right shift of the destination. 3782 if (shiftVal < 32) { 3783 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 2); 3784 3785 Ops[0] = Builder.CreateBitCast(Ops[0], VecTy, "cast"); 3786 Ops[1] = llvm::ConstantInt::get(Int32Ty, (shiftVal-16) * 8); 3787 3788 // create i32 constant 3789 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_sse2_psrl_dq); 3790 return Builder.CreateCall(F, makeArrayRef(&Ops[0], 2), "palignr"); 3791 } 3792 3793 // If palignr is shifting the pair of vectors more than 32 bytes, emit zero. 3794 return llvm::Constant::getNullValue(ConvertType(E->getType())); 3795 } 3796 case X86::BI__builtin_ia32_palignr256: { 3797 unsigned shiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 3798 3799 // If palignr is shifting the pair of input vectors less than 17 bytes, 3800 // emit a shuffle instruction. 3801 if (shiftVal <= 16) { 3802 SmallVector<llvm::Constant*, 32> Indices; 3803 // 256-bit palignr operates on 128-bit lanes so we need to handle that 3804 for (unsigned l = 0; l != 2; ++l) { 3805 unsigned LaneStart = l * 16; 3806 unsigned LaneEnd = (l+1) * 16; 3807 for (unsigned i = 0; i != 16; ++i) { 3808 unsigned Idx = shiftVal + i + LaneStart; 3809 if (Idx >= LaneEnd) Idx += 16; // end of lane, switch operand 3810 Indices.push_back(llvm::ConstantInt::get(Int32Ty, Idx)); 3811 } 3812 } 3813 3814 Value* SV = llvm::ConstantVector::get(Indices); 3815 return Builder.CreateShuffleVector(Ops[1], Ops[0], SV, "palignr"); 3816 } 3817 3818 // If palignr is shifting the pair of input vectors more than 16 but less 3819 // than 32 bytes, emit a logical right shift of the destination. 3820 if (shiftVal < 32) { 3821 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 4); 3822 3823 Ops[0] = Builder.CreateBitCast(Ops[0], VecTy, "cast"); 3824 Ops[1] = llvm::ConstantInt::get(Int32Ty, (shiftVal-16) * 8); 3825 3826 // create i32 constant 3827 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_avx2_psrl_dq); 3828 return Builder.CreateCall(F, makeArrayRef(&Ops[0], 2), "palignr"); 3829 } 3830 3831 // If palignr is shifting the pair of vectors more than 32 bytes, emit zero. 3832 return llvm::Constant::getNullValue(ConvertType(E->getType())); 3833 } 3834 case X86::BI__builtin_ia32_movntps: 3835 case X86::BI__builtin_ia32_movntps256: 3836 case X86::BI__builtin_ia32_movntpd: 3837 case X86::BI__builtin_ia32_movntpd256: 3838 case X86::BI__builtin_ia32_movntdq: 3839 case X86::BI__builtin_ia32_movntdq256: 3840 case X86::BI__builtin_ia32_movnti: 3841 case X86::BI__builtin_ia32_movnti64: { 3842 llvm::MDNode *Node = llvm::MDNode::get(getLLVMContext(), 3843 Builder.getInt32(1)); 3844 3845 // Convert the type of the pointer to a pointer to the stored type. 3846 Value *BC = Builder.CreateBitCast(Ops[0], 3847 llvm::PointerType::getUnqual(Ops[1]->getType()), 3848 "cast"); 3849 StoreInst *SI = Builder.CreateStore(Ops[1], BC); 3850 SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); 3851 3852 // If the operand is an integer, we can't assume alignment. Otherwise, 3853 // assume natural alignment. 3854 QualType ArgTy = E->getArg(1)->getType(); 3855 unsigned Align; 3856 if (ArgTy->isIntegerType()) 3857 Align = 1; 3858 else 3859 Align = getContext().getTypeSizeInChars(ArgTy).getQuantity(); 3860 SI->setAlignment(Align); 3861 return SI; 3862 } 3863 // 3DNow! 3864 case X86::BI__builtin_ia32_pswapdsf: 3865 case X86::BI__builtin_ia32_pswapdsi: { 3866 const char *name = 0; 3867 Intrinsic::ID ID = Intrinsic::not_intrinsic; 3868 switch(BuiltinID) { 3869 default: llvm_unreachable("Unsupported intrinsic!"); 3870 case X86::BI__builtin_ia32_pswapdsf: 3871 case X86::BI__builtin_ia32_pswapdsi: 3872 name = "pswapd"; 3873 ID = Intrinsic::x86_3dnowa_pswapd; 3874 break; 3875 } 3876 llvm::Type *MMXTy = llvm::Type::getX86_MMXTy(getLLVMContext()); 3877 Ops[0] = Builder.CreateBitCast(Ops[0], MMXTy, "cast"); 3878 llvm::Function *F = CGM.getIntrinsic(ID); 3879 return Builder.CreateCall(F, Ops, name); 3880 } 3881 case X86::BI__builtin_ia32_rdrand16_step: 3882 case X86::BI__builtin_ia32_rdrand32_step: 3883 case X86::BI__builtin_ia32_rdrand64_step: 3884 case X86::BI__builtin_ia32_rdseed16_step: 3885 case X86::BI__builtin_ia32_rdseed32_step: 3886 case X86::BI__builtin_ia32_rdseed64_step: { 3887 Intrinsic::ID ID; 3888 switch (BuiltinID) { 3889 default: llvm_unreachable("Unsupported intrinsic!"); 3890 case X86::BI__builtin_ia32_rdrand16_step: 3891 ID = Intrinsic::x86_rdrand_16; 3892 break; 3893 case X86::BI__builtin_ia32_rdrand32_step: 3894 ID = Intrinsic::x86_rdrand_32; 3895 break; 3896 case X86::BI__builtin_ia32_rdrand64_step: 3897 ID = Intrinsic::x86_rdrand_64; 3898 break; 3899 case X86::BI__builtin_ia32_rdseed16_step: 3900 ID = Intrinsic::x86_rdseed_16; 3901 break; 3902 case X86::BI__builtin_ia32_rdseed32_step: 3903 ID = Intrinsic::x86_rdseed_32; 3904 break; 3905 case X86::BI__builtin_ia32_rdseed64_step: 3906 ID = Intrinsic::x86_rdseed_64; 3907 break; 3908 } 3909 3910 Value *Call = Builder.CreateCall(CGM.getIntrinsic(ID)); 3911 Builder.CreateStore(Builder.CreateExtractValue(Call, 0), Ops[0]); 3912 return Builder.CreateExtractValue(Call, 1); 3913 } 3914 // AVX2 broadcast 3915 case X86::BI__builtin_ia32_vbroadcastsi256: { 3916 Value *VecTmp = CreateMemTemp(E->getArg(0)->getType()); 3917 Builder.CreateStore(Ops[0], VecTmp); 3918 Value *F = CGM.getIntrinsic(Intrinsic::x86_avx2_vbroadcasti128); 3919 return Builder.CreateCall(F, Builder.CreateBitCast(VecTmp, Int8PtrTy)); 3920 } 3921 } 3922 } 3923 3924 3925 Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, 3926 const CallExpr *E) { 3927 SmallVector<Value*, 4> Ops; 3928 3929 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) 3930 Ops.push_back(EmitScalarExpr(E->getArg(i))); 3931 3932 Intrinsic::ID ID = Intrinsic::not_intrinsic; 3933 3934 switch (BuiltinID) { 3935 default: return 0; 3936 3937 // vec_ld, vec_lvsl, vec_lvsr 3938 case PPC::BI__builtin_altivec_lvx: 3939 case PPC::BI__builtin_altivec_lvxl: 3940 case PPC::BI__builtin_altivec_lvebx: 3941 case PPC::BI__builtin_altivec_lvehx: 3942 case PPC::BI__builtin_altivec_lvewx: 3943 case PPC::BI__builtin_altivec_lvsl: 3944 case PPC::BI__builtin_altivec_lvsr: 3945 { 3946 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 3947 3948 Ops[0] = Builder.CreateGEP(Ops[1], Ops[0]); 3949 Ops.pop_back(); 3950 3951 switch (BuiltinID) { 3952 default: llvm_unreachable("Unsupported ld/lvsl/lvsr intrinsic!"); 3953 case PPC::BI__builtin_altivec_lvx: 3954 ID = Intrinsic::ppc_altivec_lvx; 3955 break; 3956 case PPC::BI__builtin_altivec_lvxl: 3957 ID = Intrinsic::ppc_altivec_lvxl; 3958 break; 3959 case PPC::BI__builtin_altivec_lvebx: 3960 ID = Intrinsic::ppc_altivec_lvebx; 3961 break; 3962 case PPC::BI__builtin_altivec_lvehx: 3963 ID = Intrinsic::ppc_altivec_lvehx; 3964 break; 3965 case PPC::BI__builtin_altivec_lvewx: 3966 ID = Intrinsic::ppc_altivec_lvewx; 3967 break; 3968 case PPC::BI__builtin_altivec_lvsl: 3969 ID = Intrinsic::ppc_altivec_lvsl; 3970 break; 3971 case PPC::BI__builtin_altivec_lvsr: 3972 ID = Intrinsic::ppc_altivec_lvsr; 3973 break; 3974 } 3975 llvm::Function *F = CGM.getIntrinsic(ID); 3976 return Builder.CreateCall(F, Ops, ""); 3977 } 3978 3979 // vec_st 3980 case PPC::BI__builtin_altivec_stvx: 3981 case PPC::BI__builtin_altivec_stvxl: 3982 case PPC::BI__builtin_altivec_stvebx: 3983 case PPC::BI__builtin_altivec_stvehx: 3984 case PPC::BI__builtin_altivec_stvewx: 3985 { 3986 Ops[2] = Builder.CreateBitCast(Ops[2], Int8PtrTy); 3987 Ops[1] = Builder.CreateGEP(Ops[2], Ops[1]); 3988 Ops.pop_back(); 3989 3990 switch (BuiltinID) { 3991 default: llvm_unreachable("Unsupported st intrinsic!"); 3992 case PPC::BI__builtin_altivec_stvx: 3993 ID = Intrinsic::ppc_altivec_stvx; 3994 break; 3995 case PPC::BI__builtin_altivec_stvxl: 3996 ID = Intrinsic::ppc_altivec_stvxl; 3997 break; 3998 case PPC::BI__builtin_altivec_stvebx: 3999 ID = Intrinsic::ppc_altivec_stvebx; 4000 break; 4001 case PPC::BI__builtin_altivec_stvehx: 4002 ID = Intrinsic::ppc_altivec_stvehx; 4003 break; 4004 case PPC::BI__builtin_altivec_stvewx: 4005 ID = Intrinsic::ppc_altivec_stvewx; 4006 break; 4007 } 4008 llvm::Function *F = CGM.getIntrinsic(ID); 4009 return Builder.CreateCall(F, Ops, ""); 4010 } 4011 } 4012 } 4013