1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This contains code to emit Builtin calls as LLVM code. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "CGCXXABI.h" 15 #include "CGObjCRuntime.h" 16 #include "CGOpenCLRuntime.h" 17 #include "CodeGenFunction.h" 18 #include "CodeGenModule.h" 19 #include "TargetInfo.h" 20 #include "clang/AST/ASTContext.h" 21 #include "clang/AST/Decl.h" 22 #include "clang/Analysis/Analyses/OSLog.h" 23 #include "clang/Basic/TargetBuiltins.h" 24 #include "clang/Basic/TargetInfo.h" 25 #include "clang/CodeGen/CGFunctionInfo.h" 26 #include "llvm/ADT/StringExtras.h" 27 #include "llvm/IR/CallSite.h" 28 #include "llvm/IR/DataLayout.h" 29 #include "llvm/IR/InlineAsm.h" 30 #include "llvm/IR/Intrinsics.h" 31 #include "llvm/IR/MDBuilder.h" 32 #include <sstream> 33 34 using namespace clang; 35 using namespace CodeGen; 36 using namespace llvm; 37 38 static 39 int64_t clamp(int64_t Value, int64_t Low, int64_t High) { 40 return std::min(High, std::max(Low, Value)); 41 } 42 43 /// getBuiltinLibFunction - Given a builtin id for a function like 44 /// "__builtin_fabsf", return a Function* for "fabsf". 45 llvm::Constant *CodeGenModule::getBuiltinLibFunction(const FunctionDecl *FD, 46 unsigned BuiltinID) { 47 assert(Context.BuiltinInfo.isLibFunction(BuiltinID)); 48 49 // Get the name, skip over the __builtin_ prefix (if necessary). 50 StringRef Name; 51 GlobalDecl D(FD); 52 53 // If the builtin has been declared explicitly with an assembler label, 54 // use the mangled name. This differs from the plain label on platforms 55 // that prefix labels. 56 if (FD->hasAttr<AsmLabelAttr>()) 57 Name = getMangledName(D); 58 else 59 Name = Context.BuiltinInfo.getName(BuiltinID) + 10; 60 61 llvm::FunctionType *Ty = 62 cast<llvm::FunctionType>(getTypes().ConvertType(FD->getType())); 63 64 return GetOrCreateLLVMFunction(Name, Ty, D, /*ForVTable=*/false); 65 } 66 67 /// Emit the conversions required to turn the given value into an 68 /// integer of the given size. 69 static Value *EmitToInt(CodeGenFunction &CGF, llvm::Value *V, 70 QualType T, llvm::IntegerType *IntType) { 71 V = CGF.EmitToMemory(V, T); 72 73 if (V->getType()->isPointerTy()) 74 return CGF.Builder.CreatePtrToInt(V, IntType); 75 76 assert(V->getType() == IntType); 77 return V; 78 } 79 80 static Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V, 81 QualType T, llvm::Type *ResultType) { 82 V = CGF.EmitFromMemory(V, T); 83 84 if (ResultType->isPointerTy()) 85 return CGF.Builder.CreateIntToPtr(V, ResultType); 86 87 assert(V->getType() == ResultType); 88 return V; 89 } 90 91 /// Utility to insert an atomic instruction based on Instrinsic::ID 92 /// and the expression node. 93 static Value *MakeBinaryAtomicValue(CodeGenFunction &CGF, 94 llvm::AtomicRMWInst::BinOp Kind, 95 const CallExpr *E) { 96 QualType T = E->getType(); 97 assert(E->getArg(0)->getType()->isPointerType()); 98 assert(CGF.getContext().hasSameUnqualifiedType(T, 99 E->getArg(0)->getType()->getPointeeType())); 100 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 101 102 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 103 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 104 105 llvm::IntegerType *IntType = 106 llvm::IntegerType::get(CGF.getLLVMContext(), 107 CGF.getContext().getTypeSize(T)); 108 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 109 110 llvm::Value *Args[2]; 111 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 112 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 113 llvm::Type *ValueType = Args[1]->getType(); 114 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 115 116 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 117 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 118 return EmitFromInt(CGF, Result, T, ValueType); 119 } 120 121 static Value *EmitNontemporalStore(CodeGenFunction &CGF, const CallExpr *E) { 122 Value *Val = CGF.EmitScalarExpr(E->getArg(0)); 123 Value *Address = CGF.EmitScalarExpr(E->getArg(1)); 124 125 // Convert the type of the pointer to a pointer to the stored type. 126 Val = CGF.EmitToMemory(Val, E->getArg(0)->getType()); 127 Value *BC = CGF.Builder.CreateBitCast( 128 Address, llvm::PointerType::getUnqual(Val->getType()), "cast"); 129 LValue LV = CGF.MakeNaturalAlignAddrLValue(BC, E->getArg(0)->getType()); 130 LV.setNontemporal(true); 131 CGF.EmitStoreOfScalar(Val, LV, false); 132 return nullptr; 133 } 134 135 static Value *EmitNontemporalLoad(CodeGenFunction &CGF, const CallExpr *E) { 136 Value *Address = CGF.EmitScalarExpr(E->getArg(0)); 137 138 LValue LV = CGF.MakeNaturalAlignAddrLValue(Address, E->getType()); 139 LV.setNontemporal(true); 140 return CGF.EmitLoadOfScalar(LV, E->getExprLoc()); 141 } 142 143 static RValue EmitBinaryAtomic(CodeGenFunction &CGF, 144 llvm::AtomicRMWInst::BinOp Kind, 145 const CallExpr *E) { 146 return RValue::get(MakeBinaryAtomicValue(CGF, Kind, E)); 147 } 148 149 /// Utility to insert an atomic instruction based Instrinsic::ID and 150 /// the expression node, where the return value is the result of the 151 /// operation. 152 static RValue EmitBinaryAtomicPost(CodeGenFunction &CGF, 153 llvm::AtomicRMWInst::BinOp Kind, 154 const CallExpr *E, 155 Instruction::BinaryOps Op, 156 bool Invert = false) { 157 QualType T = E->getType(); 158 assert(E->getArg(0)->getType()->isPointerType()); 159 assert(CGF.getContext().hasSameUnqualifiedType(T, 160 E->getArg(0)->getType()->getPointeeType())); 161 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 162 163 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 164 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 165 166 llvm::IntegerType *IntType = 167 llvm::IntegerType::get(CGF.getLLVMContext(), 168 CGF.getContext().getTypeSize(T)); 169 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 170 171 llvm::Value *Args[2]; 172 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 173 llvm::Type *ValueType = Args[1]->getType(); 174 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 175 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 176 177 llvm::Value *Result = CGF.Builder.CreateAtomicRMW( 178 Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent); 179 Result = CGF.Builder.CreateBinOp(Op, Result, Args[1]); 180 if (Invert) 181 Result = CGF.Builder.CreateBinOp(llvm::Instruction::Xor, Result, 182 llvm::ConstantInt::get(IntType, -1)); 183 Result = EmitFromInt(CGF, Result, T, ValueType); 184 return RValue::get(Result); 185 } 186 187 /// @brief Utility to insert an atomic cmpxchg instruction. 188 /// 189 /// @param CGF The current codegen function. 190 /// @param E Builtin call expression to convert to cmpxchg. 191 /// arg0 - address to operate on 192 /// arg1 - value to compare with 193 /// arg2 - new value 194 /// @param ReturnBool Specifies whether to return success flag of 195 /// cmpxchg result or the old value. 196 /// 197 /// @returns result of cmpxchg, according to ReturnBool 198 static Value *MakeAtomicCmpXchgValue(CodeGenFunction &CGF, const CallExpr *E, 199 bool ReturnBool) { 200 QualType T = ReturnBool ? E->getArg(1)->getType() : E->getType(); 201 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 202 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 203 204 llvm::IntegerType *IntType = llvm::IntegerType::get( 205 CGF.getLLVMContext(), CGF.getContext().getTypeSize(T)); 206 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 207 208 Value *Args[3]; 209 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 210 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 211 llvm::Type *ValueType = Args[1]->getType(); 212 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 213 Args[2] = EmitToInt(CGF, CGF.EmitScalarExpr(E->getArg(2)), T, IntType); 214 215 Value *Pair = CGF.Builder.CreateAtomicCmpXchg( 216 Args[0], Args[1], Args[2], llvm::AtomicOrdering::SequentiallyConsistent, 217 llvm::AtomicOrdering::SequentiallyConsistent); 218 if (ReturnBool) 219 // Extract boolean success flag and zext it to int. 220 return CGF.Builder.CreateZExt(CGF.Builder.CreateExtractValue(Pair, 1), 221 CGF.ConvertType(E->getType())); 222 else 223 // Extract old value and emit it using the same type as compare value. 224 return EmitFromInt(CGF, CGF.Builder.CreateExtractValue(Pair, 0), T, 225 ValueType); 226 } 227 228 // Emit a simple mangled intrinsic that has 1 argument and a return type 229 // matching the argument type. 230 static Value *emitUnaryBuiltin(CodeGenFunction &CGF, 231 const CallExpr *E, 232 unsigned IntrinsicID) { 233 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 234 235 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 236 return CGF.Builder.CreateCall(F, Src0); 237 } 238 239 // Emit an intrinsic that has 2 operands of the same type as its result. 240 static Value *emitBinaryBuiltin(CodeGenFunction &CGF, 241 const CallExpr *E, 242 unsigned IntrinsicID) { 243 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 244 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 245 246 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 247 return CGF.Builder.CreateCall(F, { Src0, Src1 }); 248 } 249 250 // Emit an intrinsic that has 3 operands of the same type as its result. 251 static Value *emitTernaryBuiltin(CodeGenFunction &CGF, 252 const CallExpr *E, 253 unsigned IntrinsicID) { 254 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 255 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 256 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); 257 258 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 259 return CGF.Builder.CreateCall(F, { Src0, Src1, Src2 }); 260 } 261 262 // Emit an intrinsic that has 1 float or double operand, and 1 integer. 263 static Value *emitFPIntBuiltin(CodeGenFunction &CGF, 264 const CallExpr *E, 265 unsigned IntrinsicID) { 266 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 267 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 268 269 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 270 return CGF.Builder.CreateCall(F, {Src0, Src1}); 271 } 272 273 /// EmitFAbs - Emit a call to @llvm.fabs(). 274 static Value *EmitFAbs(CodeGenFunction &CGF, Value *V) { 275 Value *F = CGF.CGM.getIntrinsic(Intrinsic::fabs, V->getType()); 276 llvm::CallInst *Call = CGF.Builder.CreateCall(F, V); 277 Call->setDoesNotAccessMemory(); 278 return Call; 279 } 280 281 /// Emit the computation of the sign bit for a floating point value. Returns 282 /// the i1 sign bit value. 283 static Value *EmitSignBit(CodeGenFunction &CGF, Value *V) { 284 LLVMContext &C = CGF.CGM.getLLVMContext(); 285 286 llvm::Type *Ty = V->getType(); 287 int Width = Ty->getPrimitiveSizeInBits(); 288 llvm::Type *IntTy = llvm::IntegerType::get(C, Width); 289 V = CGF.Builder.CreateBitCast(V, IntTy); 290 if (Ty->isPPC_FP128Ty()) { 291 // We want the sign bit of the higher-order double. The bitcast we just 292 // did works as if the double-double was stored to memory and then 293 // read as an i128. The "store" will put the higher-order double in the 294 // lower address in both little- and big-Endian modes, but the "load" 295 // will treat those bits as a different part of the i128: the low bits in 296 // little-Endian, the high bits in big-Endian. Therefore, on big-Endian 297 // we need to shift the high bits down to the low before truncating. 298 Width >>= 1; 299 if (CGF.getTarget().isBigEndian()) { 300 Value *ShiftCst = llvm::ConstantInt::get(IntTy, Width); 301 V = CGF.Builder.CreateLShr(V, ShiftCst); 302 } 303 // We are truncating value in order to extract the higher-order 304 // double, which we will be using to extract the sign from. 305 IntTy = llvm::IntegerType::get(C, Width); 306 V = CGF.Builder.CreateTrunc(V, IntTy); 307 } 308 Value *Zero = llvm::Constant::getNullValue(IntTy); 309 return CGF.Builder.CreateICmpSLT(V, Zero); 310 } 311 312 static RValue emitLibraryCall(CodeGenFunction &CGF, const FunctionDecl *FD, 313 const CallExpr *E, llvm::Constant *calleeValue) { 314 CGCallee callee = CGCallee::forDirect(calleeValue, FD); 315 return CGF.EmitCall(E->getCallee()->getType(), callee, E, ReturnValueSlot()); 316 } 317 318 /// \brief Emit a call to llvm.{sadd,uadd,ssub,usub,smul,umul}.with.overflow.* 319 /// depending on IntrinsicID. 320 /// 321 /// \arg CGF The current codegen function. 322 /// \arg IntrinsicID The ID for the Intrinsic we wish to generate. 323 /// \arg X The first argument to the llvm.*.with.overflow.*. 324 /// \arg Y The second argument to the llvm.*.with.overflow.*. 325 /// \arg Carry The carry returned by the llvm.*.with.overflow.*. 326 /// \returns The result (i.e. sum/product) returned by the intrinsic. 327 static llvm::Value *EmitOverflowIntrinsic(CodeGenFunction &CGF, 328 const llvm::Intrinsic::ID IntrinsicID, 329 llvm::Value *X, llvm::Value *Y, 330 llvm::Value *&Carry) { 331 // Make sure we have integers of the same width. 332 assert(X->getType() == Y->getType() && 333 "Arguments must be the same type. (Did you forget to make sure both " 334 "arguments have the same integer width?)"); 335 336 llvm::Value *Callee = CGF.CGM.getIntrinsic(IntrinsicID, X->getType()); 337 llvm::Value *Tmp = CGF.Builder.CreateCall(Callee, {X, Y}); 338 Carry = CGF.Builder.CreateExtractValue(Tmp, 1); 339 return CGF.Builder.CreateExtractValue(Tmp, 0); 340 } 341 342 static Value *emitRangedBuiltin(CodeGenFunction &CGF, 343 unsigned IntrinsicID, 344 int low, int high) { 345 llvm::MDBuilder MDHelper(CGF.getLLVMContext()); 346 llvm::MDNode *RNode = MDHelper.createRange(APInt(32, low), APInt(32, high)); 347 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, {}); 348 llvm::Instruction *Call = CGF.Builder.CreateCall(F); 349 Call->setMetadata(llvm::LLVMContext::MD_range, RNode); 350 return Call; 351 } 352 353 namespace { 354 struct WidthAndSignedness { 355 unsigned Width; 356 bool Signed; 357 }; 358 } 359 360 static WidthAndSignedness 361 getIntegerWidthAndSignedness(const clang::ASTContext &context, 362 const clang::QualType Type) { 363 assert(Type->isIntegerType() && "Given type is not an integer."); 364 unsigned Width = Type->isBooleanType() ? 1 : context.getTypeInfo(Type).Width; 365 bool Signed = Type->isSignedIntegerType(); 366 return {Width, Signed}; 367 } 368 369 // Given one or more integer types, this function produces an integer type that 370 // encompasses them: any value in one of the given types could be expressed in 371 // the encompassing type. 372 static struct WidthAndSignedness 373 EncompassingIntegerType(ArrayRef<struct WidthAndSignedness> Types) { 374 assert(Types.size() > 0 && "Empty list of types."); 375 376 // If any of the given types is signed, we must return a signed type. 377 bool Signed = false; 378 for (const auto &Type : Types) { 379 Signed |= Type.Signed; 380 } 381 382 // The encompassing type must have a width greater than or equal to the width 383 // of the specified types. Aditionally, if the encompassing type is signed, 384 // its width must be strictly greater than the width of any unsigned types 385 // given. 386 unsigned Width = 0; 387 for (const auto &Type : Types) { 388 unsigned MinWidth = Type.Width + (Signed && !Type.Signed); 389 if (Width < MinWidth) { 390 Width = MinWidth; 391 } 392 } 393 394 return {Width, Signed}; 395 } 396 397 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) { 398 llvm::Type *DestType = Int8PtrTy; 399 if (ArgValue->getType() != DestType) 400 ArgValue = 401 Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data()); 402 403 Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend; 404 return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue); 405 } 406 407 /// Checks if using the result of __builtin_object_size(p, @p From) in place of 408 /// __builtin_object_size(p, @p To) is correct 409 static bool areBOSTypesCompatible(int From, int To) { 410 // Note: Our __builtin_object_size implementation currently treats Type=0 and 411 // Type=2 identically. Encoding this implementation detail here may make 412 // improving __builtin_object_size difficult in the future, so it's omitted. 413 return From == To || (From == 0 && To == 1) || (From == 3 && To == 2); 414 } 415 416 static llvm::Value * 417 getDefaultBuiltinObjectSizeResult(unsigned Type, llvm::IntegerType *ResType) { 418 return ConstantInt::get(ResType, (Type & 2) ? 0 : -1, /*isSigned=*/true); 419 } 420 421 llvm::Value * 422 CodeGenFunction::evaluateOrEmitBuiltinObjectSize(const Expr *E, unsigned Type, 423 llvm::IntegerType *ResType) { 424 uint64_t ObjectSize; 425 if (!E->tryEvaluateObjectSize(ObjectSize, getContext(), Type)) 426 return emitBuiltinObjectSize(E, Type, ResType); 427 return ConstantInt::get(ResType, ObjectSize, /*isSigned=*/true); 428 } 429 430 /// Returns a Value corresponding to the size of the given expression. 431 /// This Value may be either of the following: 432 /// - A llvm::Argument (if E is a param with the pass_object_size attribute on 433 /// it) 434 /// - A call to the @llvm.objectsize intrinsic 435 llvm::Value * 436 CodeGenFunction::emitBuiltinObjectSize(const Expr *E, unsigned Type, 437 llvm::IntegerType *ResType) { 438 // We need to reference an argument if the pointer is a parameter with the 439 // pass_object_size attribute. 440 if (auto *D = dyn_cast<DeclRefExpr>(E->IgnoreParenImpCasts())) { 441 auto *Param = dyn_cast<ParmVarDecl>(D->getDecl()); 442 auto *PS = D->getDecl()->getAttr<PassObjectSizeAttr>(); 443 if (Param != nullptr && PS != nullptr && 444 areBOSTypesCompatible(PS->getType(), Type)) { 445 auto Iter = SizeArguments.find(Param); 446 assert(Iter != SizeArguments.end()); 447 448 const ImplicitParamDecl *D = Iter->second; 449 auto DIter = LocalDeclMap.find(D); 450 assert(DIter != LocalDeclMap.end()); 451 452 return EmitLoadOfScalar(DIter->second, /*volatile=*/false, 453 getContext().getSizeType(), E->getLocStart()); 454 } 455 } 456 457 // LLVM can't handle Type=3 appropriately, and __builtin_object_size shouldn't 458 // evaluate E for side-effects. In either case, we shouldn't lower to 459 // @llvm.objectsize. 460 if (Type == 3 || E->HasSideEffects(getContext())) 461 return getDefaultBuiltinObjectSizeResult(Type, ResType); 462 463 // LLVM only supports 0 and 2, make sure that we pass along that 464 // as a boolean. 465 auto *CI = ConstantInt::get(Builder.getInt1Ty(), (Type & 2) >> 1); 466 // FIXME: Get right address space. 467 llvm::Type *Tys[] = {ResType, Builder.getInt8PtrTy(0)}; 468 Value *F = CGM.getIntrinsic(Intrinsic::objectsize, Tys); 469 return Builder.CreateCall(F, {EmitScalarExpr(E), CI}); 470 } 471 472 // Many of MSVC builtins are on both x64 and ARM; to avoid repeating code, we 473 // handle them here. 474 enum class CodeGenFunction::MSVCIntrin { 475 _BitScanForward, 476 _BitScanReverse, 477 _InterlockedAnd, 478 _InterlockedDecrement, 479 _InterlockedExchange, 480 _InterlockedExchangeAdd, 481 _InterlockedExchangeSub, 482 _InterlockedIncrement, 483 _InterlockedOr, 484 _InterlockedXor, 485 }; 486 487 Value *CodeGenFunction::EmitMSVCBuiltinExpr(MSVCIntrin BuiltinID, 488 const CallExpr *E) { 489 switch (BuiltinID) { 490 case MSVCIntrin::_BitScanForward: 491 case MSVCIntrin::_BitScanReverse: { 492 Value *ArgValue = EmitScalarExpr(E->getArg(1)); 493 494 llvm::Type *ArgType = ArgValue->getType(); 495 llvm::Type *IndexType = 496 EmitScalarExpr(E->getArg(0))->getType()->getPointerElementType(); 497 llvm::Type *ResultType = ConvertType(E->getType()); 498 499 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 500 Value *ResZero = llvm::Constant::getNullValue(ResultType); 501 Value *ResOne = llvm::ConstantInt::get(ResultType, 1); 502 503 BasicBlock *Begin = Builder.GetInsertBlock(); 504 BasicBlock *End = createBasicBlock("bitscan_end", this->CurFn); 505 Builder.SetInsertPoint(End); 506 PHINode *Result = Builder.CreatePHI(ResultType, 2, "bitscan_result"); 507 508 Builder.SetInsertPoint(Begin); 509 Value *IsZero = Builder.CreateICmpEQ(ArgValue, ArgZero); 510 BasicBlock *NotZero = createBasicBlock("bitscan_not_zero", this->CurFn); 511 Builder.CreateCondBr(IsZero, End, NotZero); 512 Result->addIncoming(ResZero, Begin); 513 514 Builder.SetInsertPoint(NotZero); 515 Address IndexAddress = EmitPointerWithAlignment(E->getArg(0)); 516 517 if (BuiltinID == MSVCIntrin::_BitScanForward) { 518 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 519 Value *ZeroCount = Builder.CreateCall(F, {ArgValue, Builder.getTrue()}); 520 ZeroCount = Builder.CreateIntCast(ZeroCount, IndexType, false); 521 Builder.CreateStore(ZeroCount, IndexAddress, false); 522 } else { 523 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 524 Value *ArgTypeLastIndex = llvm::ConstantInt::get(IndexType, ArgWidth - 1); 525 526 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 527 Value *ZeroCount = Builder.CreateCall(F, {ArgValue, Builder.getTrue()}); 528 ZeroCount = Builder.CreateIntCast(ZeroCount, IndexType, false); 529 Value *Index = Builder.CreateNSWSub(ArgTypeLastIndex, ZeroCount); 530 Builder.CreateStore(Index, IndexAddress, false); 531 } 532 Builder.CreateBr(End); 533 Result->addIncoming(ResOne, NotZero); 534 535 Builder.SetInsertPoint(End); 536 return Result; 537 } 538 case MSVCIntrin::_InterlockedAnd: 539 return MakeBinaryAtomicValue(*this, AtomicRMWInst::And, E); 540 case MSVCIntrin::_InterlockedExchange: 541 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xchg, E); 542 case MSVCIntrin::_InterlockedExchangeAdd: 543 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Add, E); 544 case MSVCIntrin::_InterlockedExchangeSub: 545 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Sub, E); 546 case MSVCIntrin::_InterlockedOr: 547 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Or, E); 548 case MSVCIntrin::_InterlockedXor: 549 return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xor, E); 550 551 case MSVCIntrin::_InterlockedDecrement: { 552 llvm::Type *IntTy = ConvertType(E->getType()); 553 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 554 AtomicRMWInst::Sub, 555 EmitScalarExpr(E->getArg(0)), 556 ConstantInt::get(IntTy, 1), 557 llvm::AtomicOrdering::SequentiallyConsistent); 558 return Builder.CreateSub(RMWI, ConstantInt::get(IntTy, 1)); 559 } 560 case MSVCIntrin::_InterlockedIncrement: { 561 llvm::Type *IntTy = ConvertType(E->getType()); 562 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 563 AtomicRMWInst::Add, 564 EmitScalarExpr(E->getArg(0)), 565 ConstantInt::get(IntTy, 1), 566 llvm::AtomicOrdering::SequentiallyConsistent); 567 return Builder.CreateAdd(RMWI, ConstantInt::get(IntTy, 1)); 568 } 569 } 570 llvm_unreachable("Incorrect MSVC intrinsic!"); 571 } 572 573 namespace { 574 // ARC cleanup for __builtin_os_log_format 575 struct CallObjCArcUse final : EHScopeStack::Cleanup { 576 CallObjCArcUse(llvm::Value *object) : object(object) {} 577 llvm::Value *object; 578 579 void Emit(CodeGenFunction &CGF, Flags flags) override { 580 CGF.EmitARCIntrinsicUse(object); 581 } 582 }; 583 } 584 585 RValue CodeGenFunction::EmitBuiltinExpr(const FunctionDecl *FD, 586 unsigned BuiltinID, const CallExpr *E, 587 ReturnValueSlot ReturnValue) { 588 // See if we can constant fold this builtin. If so, don't emit it at all. 589 Expr::EvalResult Result; 590 if (E->EvaluateAsRValue(Result, CGM.getContext()) && 591 !Result.hasSideEffects()) { 592 if (Result.Val.isInt()) 593 return RValue::get(llvm::ConstantInt::get(getLLVMContext(), 594 Result.Val.getInt())); 595 if (Result.Val.isFloat()) 596 return RValue::get(llvm::ConstantFP::get(getLLVMContext(), 597 Result.Val.getFloat())); 598 } 599 600 switch (BuiltinID) { 601 default: break; // Handle intrinsics and libm functions below. 602 case Builtin::BI__builtin___CFStringMakeConstantString: 603 case Builtin::BI__builtin___NSStringMakeConstantString: 604 return RValue::get(CGM.EmitConstantExpr(E, E->getType(), nullptr)); 605 case Builtin::BI__builtin_stdarg_start: 606 case Builtin::BI__builtin_va_start: 607 case Builtin::BI__va_start: 608 case Builtin::BI__builtin_va_end: 609 return RValue::get( 610 EmitVAStartEnd(BuiltinID == Builtin::BI__va_start 611 ? EmitScalarExpr(E->getArg(0)) 612 : EmitVAListRef(E->getArg(0)).getPointer(), 613 BuiltinID != Builtin::BI__builtin_va_end)); 614 case Builtin::BI__builtin_va_copy: { 615 Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer(); 616 Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer(); 617 618 llvm::Type *Type = Int8PtrTy; 619 620 DstPtr = Builder.CreateBitCast(DstPtr, Type); 621 SrcPtr = Builder.CreateBitCast(SrcPtr, Type); 622 return RValue::get(Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), 623 {DstPtr, SrcPtr})); 624 } 625 case Builtin::BI__builtin_abs: 626 case Builtin::BI__builtin_labs: 627 case Builtin::BI__builtin_llabs: { 628 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 629 630 Value *NegOp = Builder.CreateNeg(ArgValue, "neg"); 631 Value *CmpResult = 632 Builder.CreateICmpSGE(ArgValue, 633 llvm::Constant::getNullValue(ArgValue->getType()), 634 "abscond"); 635 Value *Result = 636 Builder.CreateSelect(CmpResult, ArgValue, NegOp, "abs"); 637 638 return RValue::get(Result); 639 } 640 case Builtin::BI__builtin_fabs: 641 case Builtin::BI__builtin_fabsf: 642 case Builtin::BI__builtin_fabsl: { 643 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::fabs)); 644 } 645 case Builtin::BI__builtin_fmod: 646 case Builtin::BI__builtin_fmodf: 647 case Builtin::BI__builtin_fmodl: { 648 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 649 Value *Arg2 = EmitScalarExpr(E->getArg(1)); 650 Value *Result = Builder.CreateFRem(Arg1, Arg2, "fmod"); 651 return RValue::get(Result); 652 } 653 case Builtin::BI__builtin_copysign: 654 case Builtin::BI__builtin_copysignf: 655 case Builtin::BI__builtin_copysignl: { 656 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::copysign)); 657 } 658 case Builtin::BI__builtin_ceil: 659 case Builtin::BI__builtin_ceilf: 660 case Builtin::BI__builtin_ceill: { 661 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::ceil)); 662 } 663 case Builtin::BI__builtin_floor: 664 case Builtin::BI__builtin_floorf: 665 case Builtin::BI__builtin_floorl: { 666 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::floor)); 667 } 668 case Builtin::BI__builtin_trunc: 669 case Builtin::BI__builtin_truncf: 670 case Builtin::BI__builtin_truncl: { 671 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::trunc)); 672 } 673 case Builtin::BI__builtin_rint: 674 case Builtin::BI__builtin_rintf: 675 case Builtin::BI__builtin_rintl: { 676 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::rint)); 677 } 678 case Builtin::BI__builtin_nearbyint: 679 case Builtin::BI__builtin_nearbyintf: 680 case Builtin::BI__builtin_nearbyintl: { 681 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::nearbyint)); 682 } 683 case Builtin::BI__builtin_round: 684 case Builtin::BI__builtin_roundf: 685 case Builtin::BI__builtin_roundl: { 686 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::round)); 687 } 688 case Builtin::BI__builtin_fmin: 689 case Builtin::BI__builtin_fminf: 690 case Builtin::BI__builtin_fminl: { 691 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::minnum)); 692 } 693 case Builtin::BI__builtin_fmax: 694 case Builtin::BI__builtin_fmaxf: 695 case Builtin::BI__builtin_fmaxl: { 696 return RValue::get(emitBinaryBuiltin(*this, E, Intrinsic::maxnum)); 697 } 698 case Builtin::BI__builtin_conj: 699 case Builtin::BI__builtin_conjf: 700 case Builtin::BI__builtin_conjl: { 701 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 702 Value *Real = ComplexVal.first; 703 Value *Imag = ComplexVal.second; 704 Value *Zero = 705 Imag->getType()->isFPOrFPVectorTy() 706 ? llvm::ConstantFP::getZeroValueForNegation(Imag->getType()) 707 : llvm::Constant::getNullValue(Imag->getType()); 708 709 Imag = Builder.CreateFSub(Zero, Imag, "sub"); 710 return RValue::getComplex(std::make_pair(Real, Imag)); 711 } 712 case Builtin::BI__builtin_creal: 713 case Builtin::BI__builtin_crealf: 714 case Builtin::BI__builtin_creall: 715 case Builtin::BIcreal: 716 case Builtin::BIcrealf: 717 case Builtin::BIcreall: { 718 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 719 return RValue::get(ComplexVal.first); 720 } 721 722 case Builtin::BI__builtin_cimag: 723 case Builtin::BI__builtin_cimagf: 724 case Builtin::BI__builtin_cimagl: 725 case Builtin::BIcimag: 726 case Builtin::BIcimagf: 727 case Builtin::BIcimagl: { 728 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 729 return RValue::get(ComplexVal.second); 730 } 731 732 case Builtin::BI__builtin_ctzs: 733 case Builtin::BI__builtin_ctz: 734 case Builtin::BI__builtin_ctzl: 735 case Builtin::BI__builtin_ctzll: { 736 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 737 738 llvm::Type *ArgType = ArgValue->getType(); 739 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 740 741 llvm::Type *ResultType = ConvertType(E->getType()); 742 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 743 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 744 if (Result->getType() != ResultType) 745 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 746 "cast"); 747 return RValue::get(Result); 748 } 749 case Builtin::BI__builtin_clzs: 750 case Builtin::BI__builtin_clz: 751 case Builtin::BI__builtin_clzl: 752 case Builtin::BI__builtin_clzll: { 753 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 754 755 llvm::Type *ArgType = ArgValue->getType(); 756 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 757 758 llvm::Type *ResultType = ConvertType(E->getType()); 759 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 760 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 761 if (Result->getType() != ResultType) 762 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 763 "cast"); 764 return RValue::get(Result); 765 } 766 case Builtin::BI__builtin_ffs: 767 case Builtin::BI__builtin_ffsl: 768 case Builtin::BI__builtin_ffsll: { 769 // ffs(x) -> x ? cttz(x) + 1 : 0 770 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 771 772 llvm::Type *ArgType = ArgValue->getType(); 773 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 774 775 llvm::Type *ResultType = ConvertType(E->getType()); 776 Value *Tmp = 777 Builder.CreateAdd(Builder.CreateCall(F, {ArgValue, Builder.getTrue()}), 778 llvm::ConstantInt::get(ArgType, 1)); 779 Value *Zero = llvm::Constant::getNullValue(ArgType); 780 Value *IsZero = Builder.CreateICmpEQ(ArgValue, Zero, "iszero"); 781 Value *Result = Builder.CreateSelect(IsZero, Zero, Tmp, "ffs"); 782 if (Result->getType() != ResultType) 783 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 784 "cast"); 785 return RValue::get(Result); 786 } 787 case Builtin::BI__builtin_parity: 788 case Builtin::BI__builtin_parityl: 789 case Builtin::BI__builtin_parityll: { 790 // parity(x) -> ctpop(x) & 1 791 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 792 793 llvm::Type *ArgType = ArgValue->getType(); 794 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 795 796 llvm::Type *ResultType = ConvertType(E->getType()); 797 Value *Tmp = Builder.CreateCall(F, ArgValue); 798 Value *Result = Builder.CreateAnd(Tmp, llvm::ConstantInt::get(ArgType, 1)); 799 if (Result->getType() != ResultType) 800 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 801 "cast"); 802 return RValue::get(Result); 803 } 804 case Builtin::BI__popcnt16: 805 case Builtin::BI__popcnt: 806 case Builtin::BI__popcnt64: 807 case Builtin::BI__builtin_popcount: 808 case Builtin::BI__builtin_popcountl: 809 case Builtin::BI__builtin_popcountll: { 810 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 811 812 llvm::Type *ArgType = ArgValue->getType(); 813 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 814 815 llvm::Type *ResultType = ConvertType(E->getType()); 816 Value *Result = Builder.CreateCall(F, ArgValue); 817 if (Result->getType() != ResultType) 818 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 819 "cast"); 820 return RValue::get(Result); 821 } 822 case Builtin::BI_rotr8: 823 case Builtin::BI_rotr16: 824 case Builtin::BI_rotr: 825 case Builtin::BI_lrotr: 826 case Builtin::BI_rotr64: { 827 Value *Val = EmitScalarExpr(E->getArg(0)); 828 Value *Shift = EmitScalarExpr(E->getArg(1)); 829 830 llvm::Type *ArgType = Val->getType(); 831 Shift = Builder.CreateIntCast(Shift, ArgType, false); 832 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 833 Value *ArgTypeSize = llvm::ConstantInt::get(ArgType, ArgWidth); 834 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 835 836 Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1); 837 Shift = Builder.CreateAnd(Shift, Mask); 838 Value *LeftShift = Builder.CreateSub(ArgTypeSize, Shift); 839 840 Value *RightShifted = Builder.CreateLShr(Val, Shift); 841 Value *LeftShifted = Builder.CreateShl(Val, LeftShift); 842 Value *Rotated = Builder.CreateOr(LeftShifted, RightShifted); 843 844 Value *ShiftIsZero = Builder.CreateICmpEQ(Shift, ArgZero); 845 Value *Result = Builder.CreateSelect(ShiftIsZero, Val, Rotated); 846 return RValue::get(Result); 847 } 848 case Builtin::BI_rotl8: 849 case Builtin::BI_rotl16: 850 case Builtin::BI_rotl: 851 case Builtin::BI_lrotl: 852 case Builtin::BI_rotl64: { 853 Value *Val = EmitScalarExpr(E->getArg(0)); 854 Value *Shift = EmitScalarExpr(E->getArg(1)); 855 856 llvm::Type *ArgType = Val->getType(); 857 Shift = Builder.CreateIntCast(Shift, ArgType, false); 858 unsigned ArgWidth = cast<llvm::IntegerType>(ArgType)->getBitWidth(); 859 Value *ArgTypeSize = llvm::ConstantInt::get(ArgType, ArgWidth); 860 Value *ArgZero = llvm::Constant::getNullValue(ArgType); 861 862 Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1); 863 Shift = Builder.CreateAnd(Shift, Mask); 864 Value *RightShift = Builder.CreateSub(ArgTypeSize, Shift); 865 866 Value *LeftShifted = Builder.CreateShl(Val, Shift); 867 Value *RightShifted = Builder.CreateLShr(Val, RightShift); 868 Value *Rotated = Builder.CreateOr(LeftShifted, RightShifted); 869 870 Value *ShiftIsZero = Builder.CreateICmpEQ(Shift, ArgZero); 871 Value *Result = Builder.CreateSelect(ShiftIsZero, Val, Rotated); 872 return RValue::get(Result); 873 } 874 case Builtin::BI__builtin_unpredictable: { 875 // Always return the argument of __builtin_unpredictable. LLVM does not 876 // handle this builtin. Metadata for this builtin should be added directly 877 // to instructions such as branches or switches that use it. 878 return RValue::get(EmitScalarExpr(E->getArg(0))); 879 } 880 case Builtin::BI__builtin_expect: { 881 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 882 llvm::Type *ArgType = ArgValue->getType(); 883 884 Value *ExpectedValue = EmitScalarExpr(E->getArg(1)); 885 // Don't generate llvm.expect on -O0 as the backend won't use it for 886 // anything. 887 // Note, we still IRGen ExpectedValue because it could have side-effects. 888 if (CGM.getCodeGenOpts().OptimizationLevel == 0) 889 return RValue::get(ArgValue); 890 891 Value *FnExpect = CGM.getIntrinsic(Intrinsic::expect, ArgType); 892 Value *Result = 893 Builder.CreateCall(FnExpect, {ArgValue, ExpectedValue}, "expval"); 894 return RValue::get(Result); 895 } 896 case Builtin::BI__builtin_assume_aligned: { 897 Value *PtrValue = EmitScalarExpr(E->getArg(0)); 898 Value *OffsetValue = 899 (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : nullptr; 900 901 Value *AlignmentValue = EmitScalarExpr(E->getArg(1)); 902 ConstantInt *AlignmentCI = cast<ConstantInt>(AlignmentValue); 903 unsigned Alignment = (unsigned) AlignmentCI->getZExtValue(); 904 905 EmitAlignmentAssumption(PtrValue, Alignment, OffsetValue); 906 return RValue::get(PtrValue); 907 } 908 case Builtin::BI__assume: 909 case Builtin::BI__builtin_assume: { 910 if (E->getArg(0)->HasSideEffects(getContext())) 911 return RValue::get(nullptr); 912 913 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 914 Value *FnAssume = CGM.getIntrinsic(Intrinsic::assume); 915 return RValue::get(Builder.CreateCall(FnAssume, ArgValue)); 916 } 917 case Builtin::BI__builtin_bswap16: 918 case Builtin::BI__builtin_bswap32: 919 case Builtin::BI__builtin_bswap64: { 920 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bswap)); 921 } 922 case Builtin::BI__builtin_bitreverse8: 923 case Builtin::BI__builtin_bitreverse16: 924 case Builtin::BI__builtin_bitreverse32: 925 case Builtin::BI__builtin_bitreverse64: { 926 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bitreverse)); 927 } 928 case Builtin::BI__builtin_object_size: { 929 unsigned Type = 930 E->getArg(1)->EvaluateKnownConstInt(getContext()).getZExtValue(); 931 auto *ResType = cast<llvm::IntegerType>(ConvertType(E->getType())); 932 933 // We pass this builtin onto the optimizer so that it can figure out the 934 // object size in more complex cases. 935 return RValue::get(emitBuiltinObjectSize(E->getArg(0), Type, ResType)); 936 } 937 case Builtin::BI__builtin_prefetch: { 938 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); 939 // FIXME: Technically these constants should of type 'int', yes? 940 RW = (E->getNumArgs() > 1) ? EmitScalarExpr(E->getArg(1)) : 941 llvm::ConstantInt::get(Int32Ty, 0); 942 Locality = (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : 943 llvm::ConstantInt::get(Int32Ty, 3); 944 Value *Data = llvm::ConstantInt::get(Int32Ty, 1); 945 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 946 return RValue::get(Builder.CreateCall(F, {Address, RW, Locality, Data})); 947 } 948 case Builtin::BI__builtin_readcyclecounter: { 949 Value *F = CGM.getIntrinsic(Intrinsic::readcyclecounter); 950 return RValue::get(Builder.CreateCall(F)); 951 } 952 case Builtin::BI__builtin___clear_cache: { 953 Value *Begin = EmitScalarExpr(E->getArg(0)); 954 Value *End = EmitScalarExpr(E->getArg(1)); 955 Value *F = CGM.getIntrinsic(Intrinsic::clear_cache); 956 return RValue::get(Builder.CreateCall(F, {Begin, End})); 957 } 958 case Builtin::BI__builtin_trap: 959 return RValue::get(EmitTrapCall(Intrinsic::trap)); 960 case Builtin::BI__debugbreak: 961 return RValue::get(EmitTrapCall(Intrinsic::debugtrap)); 962 case Builtin::BI__builtin_unreachable: { 963 if (SanOpts.has(SanitizerKind::Unreachable)) { 964 SanitizerScope SanScope(this); 965 EmitCheck(std::make_pair(static_cast<llvm::Value *>(Builder.getFalse()), 966 SanitizerKind::Unreachable), 967 SanitizerHandler::BuiltinUnreachable, 968 EmitCheckSourceLocation(E->getExprLoc()), None); 969 } else 970 Builder.CreateUnreachable(); 971 972 // We do need to preserve an insertion point. 973 EmitBlock(createBasicBlock("unreachable.cont")); 974 975 return RValue::get(nullptr); 976 } 977 978 case Builtin::BI__builtin_powi: 979 case Builtin::BI__builtin_powif: 980 case Builtin::BI__builtin_powil: { 981 Value *Base = EmitScalarExpr(E->getArg(0)); 982 Value *Exponent = EmitScalarExpr(E->getArg(1)); 983 llvm::Type *ArgType = Base->getType(); 984 Value *F = CGM.getIntrinsic(Intrinsic::powi, ArgType); 985 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 986 } 987 988 case Builtin::BI__builtin_isgreater: 989 case Builtin::BI__builtin_isgreaterequal: 990 case Builtin::BI__builtin_isless: 991 case Builtin::BI__builtin_islessequal: 992 case Builtin::BI__builtin_islessgreater: 993 case Builtin::BI__builtin_isunordered: { 994 // Ordered comparisons: we know the arguments to these are matching scalar 995 // floating point values. 996 Value *LHS = EmitScalarExpr(E->getArg(0)); 997 Value *RHS = EmitScalarExpr(E->getArg(1)); 998 999 switch (BuiltinID) { 1000 default: llvm_unreachable("Unknown ordered comparison"); 1001 case Builtin::BI__builtin_isgreater: 1002 LHS = Builder.CreateFCmpOGT(LHS, RHS, "cmp"); 1003 break; 1004 case Builtin::BI__builtin_isgreaterequal: 1005 LHS = Builder.CreateFCmpOGE(LHS, RHS, "cmp"); 1006 break; 1007 case Builtin::BI__builtin_isless: 1008 LHS = Builder.CreateFCmpOLT(LHS, RHS, "cmp"); 1009 break; 1010 case Builtin::BI__builtin_islessequal: 1011 LHS = Builder.CreateFCmpOLE(LHS, RHS, "cmp"); 1012 break; 1013 case Builtin::BI__builtin_islessgreater: 1014 LHS = Builder.CreateFCmpONE(LHS, RHS, "cmp"); 1015 break; 1016 case Builtin::BI__builtin_isunordered: 1017 LHS = Builder.CreateFCmpUNO(LHS, RHS, "cmp"); 1018 break; 1019 } 1020 // ZExt bool to int type. 1021 return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType()))); 1022 } 1023 case Builtin::BI__builtin_isnan: { 1024 Value *V = EmitScalarExpr(E->getArg(0)); 1025 V = Builder.CreateFCmpUNO(V, V, "cmp"); 1026 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 1027 } 1028 1029 case Builtin::BIfinite: 1030 case Builtin::BI__finite: 1031 case Builtin::BIfinitef: 1032 case Builtin::BI__finitef: 1033 case Builtin::BIfinitel: 1034 case Builtin::BI__finitel: 1035 case Builtin::BI__builtin_isinf: 1036 case Builtin::BI__builtin_isfinite: { 1037 // isinf(x) --> fabs(x) == infinity 1038 // isfinite(x) --> fabs(x) != infinity 1039 // x != NaN via the ordered compare in either case. 1040 Value *V = EmitScalarExpr(E->getArg(0)); 1041 Value *Fabs = EmitFAbs(*this, V); 1042 Constant *Infinity = ConstantFP::getInfinity(V->getType()); 1043 CmpInst::Predicate Pred = (BuiltinID == Builtin::BI__builtin_isinf) 1044 ? CmpInst::FCMP_OEQ 1045 : CmpInst::FCMP_ONE; 1046 Value *FCmp = Builder.CreateFCmp(Pred, Fabs, Infinity, "cmpinf"); 1047 return RValue::get(Builder.CreateZExt(FCmp, ConvertType(E->getType()))); 1048 } 1049 1050 case Builtin::BI__builtin_isinf_sign: { 1051 // isinf_sign(x) -> fabs(x) == infinity ? (signbit(x) ? -1 : 1) : 0 1052 Value *Arg = EmitScalarExpr(E->getArg(0)); 1053 Value *AbsArg = EmitFAbs(*this, Arg); 1054 Value *IsInf = Builder.CreateFCmpOEQ( 1055 AbsArg, ConstantFP::getInfinity(Arg->getType()), "isinf"); 1056 Value *IsNeg = EmitSignBit(*this, Arg); 1057 1058 llvm::Type *IntTy = ConvertType(E->getType()); 1059 Value *Zero = Constant::getNullValue(IntTy); 1060 Value *One = ConstantInt::get(IntTy, 1); 1061 Value *NegativeOne = ConstantInt::get(IntTy, -1); 1062 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); 1063 Value *Result = Builder.CreateSelect(IsInf, SignResult, Zero); 1064 return RValue::get(Result); 1065 } 1066 1067 case Builtin::BI__builtin_isnormal: { 1068 // isnormal(x) --> x == x && fabsf(x) < infinity && fabsf(x) >= float_min 1069 Value *V = EmitScalarExpr(E->getArg(0)); 1070 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 1071 1072 Value *Abs = EmitFAbs(*this, V); 1073 Value *IsLessThanInf = 1074 Builder.CreateFCmpULT(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 1075 APFloat Smallest = APFloat::getSmallestNormalized( 1076 getContext().getFloatTypeSemantics(E->getArg(0)->getType())); 1077 Value *IsNormal = 1078 Builder.CreateFCmpUGE(Abs, ConstantFP::get(V->getContext(), Smallest), 1079 "isnormal"); 1080 V = Builder.CreateAnd(Eq, IsLessThanInf, "and"); 1081 V = Builder.CreateAnd(V, IsNormal, "and"); 1082 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 1083 } 1084 1085 case Builtin::BI__builtin_fpclassify: { 1086 Value *V = EmitScalarExpr(E->getArg(5)); 1087 llvm::Type *Ty = ConvertType(E->getArg(5)->getType()); 1088 1089 // Create Result 1090 BasicBlock *Begin = Builder.GetInsertBlock(); 1091 BasicBlock *End = createBasicBlock("fpclassify_end", this->CurFn); 1092 Builder.SetInsertPoint(End); 1093 PHINode *Result = 1094 Builder.CreatePHI(ConvertType(E->getArg(0)->getType()), 4, 1095 "fpclassify_result"); 1096 1097 // if (V==0) return FP_ZERO 1098 Builder.SetInsertPoint(Begin); 1099 Value *IsZero = Builder.CreateFCmpOEQ(V, Constant::getNullValue(Ty), 1100 "iszero"); 1101 Value *ZeroLiteral = EmitScalarExpr(E->getArg(4)); 1102 BasicBlock *NotZero = createBasicBlock("fpclassify_not_zero", this->CurFn); 1103 Builder.CreateCondBr(IsZero, End, NotZero); 1104 Result->addIncoming(ZeroLiteral, Begin); 1105 1106 // if (V != V) return FP_NAN 1107 Builder.SetInsertPoint(NotZero); 1108 Value *IsNan = Builder.CreateFCmpUNO(V, V, "cmp"); 1109 Value *NanLiteral = EmitScalarExpr(E->getArg(0)); 1110 BasicBlock *NotNan = createBasicBlock("fpclassify_not_nan", this->CurFn); 1111 Builder.CreateCondBr(IsNan, End, NotNan); 1112 Result->addIncoming(NanLiteral, NotZero); 1113 1114 // if (fabs(V) == infinity) return FP_INFINITY 1115 Builder.SetInsertPoint(NotNan); 1116 Value *VAbs = EmitFAbs(*this, V); 1117 Value *IsInf = 1118 Builder.CreateFCmpOEQ(VAbs, ConstantFP::getInfinity(V->getType()), 1119 "isinf"); 1120 Value *InfLiteral = EmitScalarExpr(E->getArg(1)); 1121 BasicBlock *NotInf = createBasicBlock("fpclassify_not_inf", this->CurFn); 1122 Builder.CreateCondBr(IsInf, End, NotInf); 1123 Result->addIncoming(InfLiteral, NotNan); 1124 1125 // if (fabs(V) >= MIN_NORMAL) return FP_NORMAL else FP_SUBNORMAL 1126 Builder.SetInsertPoint(NotInf); 1127 APFloat Smallest = APFloat::getSmallestNormalized( 1128 getContext().getFloatTypeSemantics(E->getArg(5)->getType())); 1129 Value *IsNormal = 1130 Builder.CreateFCmpUGE(VAbs, ConstantFP::get(V->getContext(), Smallest), 1131 "isnormal"); 1132 Value *NormalResult = 1133 Builder.CreateSelect(IsNormal, EmitScalarExpr(E->getArg(2)), 1134 EmitScalarExpr(E->getArg(3))); 1135 Builder.CreateBr(End); 1136 Result->addIncoming(NormalResult, NotInf); 1137 1138 // return Result 1139 Builder.SetInsertPoint(End); 1140 return RValue::get(Result); 1141 } 1142 1143 case Builtin::BIalloca: 1144 case Builtin::BI_alloca: 1145 case Builtin::BI__builtin_alloca: { 1146 Value *Size = EmitScalarExpr(E->getArg(0)); 1147 const TargetInfo &TI = getContext().getTargetInfo(); 1148 // The alignment of the alloca should correspond to __BIGGEST_ALIGNMENT__. 1149 unsigned SuitableAlignmentInBytes = 1150 CGM.getContext() 1151 .toCharUnitsFromBits(TI.getSuitableAlign()) 1152 .getQuantity(); 1153 AllocaInst *AI = Builder.CreateAlloca(Builder.getInt8Ty(), Size); 1154 AI->setAlignment(SuitableAlignmentInBytes); 1155 return RValue::get(AI); 1156 } 1157 1158 case Builtin::BI__builtin_alloca_with_align: { 1159 Value *Size = EmitScalarExpr(E->getArg(0)); 1160 Value *AlignmentInBitsValue = EmitScalarExpr(E->getArg(1)); 1161 auto *AlignmentInBitsCI = cast<ConstantInt>(AlignmentInBitsValue); 1162 unsigned AlignmentInBits = AlignmentInBitsCI->getZExtValue(); 1163 unsigned AlignmentInBytes = 1164 CGM.getContext().toCharUnitsFromBits(AlignmentInBits).getQuantity(); 1165 AllocaInst *AI = Builder.CreateAlloca(Builder.getInt8Ty(), Size); 1166 AI->setAlignment(AlignmentInBytes); 1167 return RValue::get(AI); 1168 } 1169 1170 case Builtin::BIbzero: 1171 case Builtin::BI__builtin_bzero: { 1172 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1173 Value *SizeVal = EmitScalarExpr(E->getArg(1)); 1174 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1175 E->getArg(0)->getExprLoc(), FD, 0); 1176 Builder.CreateMemSet(Dest, Builder.getInt8(0), SizeVal, false); 1177 return RValue::get(Dest.getPointer()); 1178 } 1179 case Builtin::BImemcpy: 1180 case Builtin::BI__builtin_memcpy: { 1181 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1182 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1183 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1184 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1185 E->getArg(0)->getExprLoc(), FD, 0); 1186 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 1187 E->getArg(1)->getExprLoc(), FD, 1); 1188 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 1189 return RValue::get(Dest.getPointer()); 1190 } 1191 1192 case Builtin::BI__builtin_char_memchr: 1193 BuiltinID = Builtin::BI__builtin_memchr; 1194 break; 1195 1196 case Builtin::BI__builtin___memcpy_chk: { 1197 // fold __builtin_memcpy_chk(x, y, cst1, cst2) to memcpy iff cst1<=cst2. 1198 llvm::APSInt Size, DstSize; 1199 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1200 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1201 break; 1202 if (Size.ugt(DstSize)) 1203 break; 1204 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1205 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1206 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1207 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 1208 return RValue::get(Dest.getPointer()); 1209 } 1210 1211 case Builtin::BI__builtin_objc_memmove_collectable: { 1212 Address DestAddr = EmitPointerWithAlignment(E->getArg(0)); 1213 Address SrcAddr = EmitPointerWithAlignment(E->getArg(1)); 1214 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1215 CGM.getObjCRuntime().EmitGCMemmoveCollectable(*this, 1216 DestAddr, SrcAddr, SizeVal); 1217 return RValue::get(DestAddr.getPointer()); 1218 } 1219 1220 case Builtin::BI__builtin___memmove_chk: { 1221 // fold __builtin_memmove_chk(x, y, cst1, cst2) to memmove iff cst1<=cst2. 1222 llvm::APSInt Size, DstSize; 1223 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1224 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1225 break; 1226 if (Size.ugt(DstSize)) 1227 break; 1228 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1229 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1230 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1231 Builder.CreateMemMove(Dest, Src, SizeVal, false); 1232 return RValue::get(Dest.getPointer()); 1233 } 1234 1235 case Builtin::BImemmove: 1236 case Builtin::BI__builtin_memmove: { 1237 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1238 Address Src = EmitPointerWithAlignment(E->getArg(1)); 1239 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1240 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1241 E->getArg(0)->getExprLoc(), FD, 0); 1242 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 1243 E->getArg(1)->getExprLoc(), FD, 1); 1244 Builder.CreateMemMove(Dest, Src, SizeVal, false); 1245 return RValue::get(Dest.getPointer()); 1246 } 1247 case Builtin::BImemset: 1248 case Builtin::BI__builtin_memset: { 1249 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1250 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 1251 Builder.getInt8Ty()); 1252 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 1253 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 1254 E->getArg(0)->getExprLoc(), FD, 0); 1255 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 1256 return RValue::get(Dest.getPointer()); 1257 } 1258 case Builtin::BI__builtin___memset_chk: { 1259 // fold __builtin_memset_chk(x, y, cst1, cst2) to memset iff cst1<=cst2. 1260 llvm::APSInt Size, DstSize; 1261 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 1262 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 1263 break; 1264 if (Size.ugt(DstSize)) 1265 break; 1266 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 1267 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 1268 Builder.getInt8Ty()); 1269 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 1270 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 1271 return RValue::get(Dest.getPointer()); 1272 } 1273 case Builtin::BI__builtin_dwarf_cfa: { 1274 // The offset in bytes from the first argument to the CFA. 1275 // 1276 // Why on earth is this in the frontend? Is there any reason at 1277 // all that the backend can't reasonably determine this while 1278 // lowering llvm.eh.dwarf.cfa()? 1279 // 1280 // TODO: If there's a satisfactory reason, add a target hook for 1281 // this instead of hard-coding 0, which is correct for most targets. 1282 int32_t Offset = 0; 1283 1284 Value *F = CGM.getIntrinsic(Intrinsic::eh_dwarf_cfa); 1285 return RValue::get(Builder.CreateCall(F, 1286 llvm::ConstantInt::get(Int32Ty, Offset))); 1287 } 1288 case Builtin::BI__builtin_return_address: { 1289 Value *Depth = 1290 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 1291 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 1292 return RValue::get(Builder.CreateCall(F, Depth)); 1293 } 1294 case Builtin::BI_ReturnAddress: { 1295 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 1296 return RValue::get(Builder.CreateCall(F, Builder.getInt32(0))); 1297 } 1298 case Builtin::BI__builtin_frame_address: { 1299 Value *Depth = 1300 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 1301 Value *F = CGM.getIntrinsic(Intrinsic::frameaddress); 1302 return RValue::get(Builder.CreateCall(F, Depth)); 1303 } 1304 case Builtin::BI__builtin_extract_return_addr: { 1305 Value *Address = EmitScalarExpr(E->getArg(0)); 1306 Value *Result = getTargetHooks().decodeReturnAddress(*this, Address); 1307 return RValue::get(Result); 1308 } 1309 case Builtin::BI__builtin_frob_return_addr: { 1310 Value *Address = EmitScalarExpr(E->getArg(0)); 1311 Value *Result = getTargetHooks().encodeReturnAddress(*this, Address); 1312 return RValue::get(Result); 1313 } 1314 case Builtin::BI__builtin_dwarf_sp_column: { 1315 llvm::IntegerType *Ty 1316 = cast<llvm::IntegerType>(ConvertType(E->getType())); 1317 int Column = getTargetHooks().getDwarfEHStackPointer(CGM); 1318 if (Column == -1) { 1319 CGM.ErrorUnsupported(E, "__builtin_dwarf_sp_column"); 1320 return RValue::get(llvm::UndefValue::get(Ty)); 1321 } 1322 return RValue::get(llvm::ConstantInt::get(Ty, Column, true)); 1323 } 1324 case Builtin::BI__builtin_init_dwarf_reg_size_table: { 1325 Value *Address = EmitScalarExpr(E->getArg(0)); 1326 if (getTargetHooks().initDwarfEHRegSizeTable(*this, Address)) 1327 CGM.ErrorUnsupported(E, "__builtin_init_dwarf_reg_size_table"); 1328 return RValue::get(llvm::UndefValue::get(ConvertType(E->getType()))); 1329 } 1330 case Builtin::BI__builtin_eh_return: { 1331 Value *Int = EmitScalarExpr(E->getArg(0)); 1332 Value *Ptr = EmitScalarExpr(E->getArg(1)); 1333 1334 llvm::IntegerType *IntTy = cast<llvm::IntegerType>(Int->getType()); 1335 assert((IntTy->getBitWidth() == 32 || IntTy->getBitWidth() == 64) && 1336 "LLVM's __builtin_eh_return only supports 32- and 64-bit variants"); 1337 Value *F = CGM.getIntrinsic(IntTy->getBitWidth() == 32 1338 ? Intrinsic::eh_return_i32 1339 : Intrinsic::eh_return_i64); 1340 Builder.CreateCall(F, {Int, Ptr}); 1341 Builder.CreateUnreachable(); 1342 1343 // We do need to preserve an insertion point. 1344 EmitBlock(createBasicBlock("builtin_eh_return.cont")); 1345 1346 return RValue::get(nullptr); 1347 } 1348 case Builtin::BI__builtin_unwind_init: { 1349 Value *F = CGM.getIntrinsic(Intrinsic::eh_unwind_init); 1350 return RValue::get(Builder.CreateCall(F)); 1351 } 1352 case Builtin::BI__builtin_extend_pointer: { 1353 // Extends a pointer to the size of an _Unwind_Word, which is 1354 // uint64_t on all platforms. Generally this gets poked into a 1355 // register and eventually used as an address, so if the 1356 // addressing registers are wider than pointers and the platform 1357 // doesn't implicitly ignore high-order bits when doing 1358 // addressing, we need to make sure we zext / sext based on 1359 // the platform's expectations. 1360 // 1361 // See: http://gcc.gnu.org/ml/gcc-bugs/2002-02/msg00237.html 1362 1363 // Cast the pointer to intptr_t. 1364 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1365 Value *Result = Builder.CreatePtrToInt(Ptr, IntPtrTy, "extend.cast"); 1366 1367 // If that's 64 bits, we're done. 1368 if (IntPtrTy->getBitWidth() == 64) 1369 return RValue::get(Result); 1370 1371 // Otherwise, ask the codegen data what to do. 1372 if (getTargetHooks().extendPointerWithSExt()) 1373 return RValue::get(Builder.CreateSExt(Result, Int64Ty, "extend.sext")); 1374 else 1375 return RValue::get(Builder.CreateZExt(Result, Int64Ty, "extend.zext")); 1376 } 1377 case Builtin::BI__builtin_setjmp: { 1378 // Buffer is a void**. 1379 Address Buf = EmitPointerWithAlignment(E->getArg(0)); 1380 1381 // Store the frame pointer to the setjmp buffer. 1382 Value *FrameAddr = 1383 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1384 ConstantInt::get(Int32Ty, 0)); 1385 Builder.CreateStore(FrameAddr, Buf); 1386 1387 // Store the stack pointer to the setjmp buffer. 1388 Value *StackAddr = 1389 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::stacksave)); 1390 Address StackSaveSlot = 1391 Builder.CreateConstInBoundsGEP(Buf, 2, getPointerSize()); 1392 Builder.CreateStore(StackAddr, StackSaveSlot); 1393 1394 // Call LLVM's EH setjmp, which is lightweight. 1395 Value *F = CGM.getIntrinsic(Intrinsic::eh_sjlj_setjmp); 1396 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1397 return RValue::get(Builder.CreateCall(F, Buf.getPointer())); 1398 } 1399 case Builtin::BI__builtin_longjmp: { 1400 Value *Buf = EmitScalarExpr(E->getArg(0)); 1401 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1402 1403 // Call LLVM's EH longjmp, which is lightweight. 1404 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::eh_sjlj_longjmp), Buf); 1405 1406 // longjmp doesn't return; mark this as unreachable. 1407 Builder.CreateUnreachable(); 1408 1409 // We do need to preserve an insertion point. 1410 EmitBlock(createBasicBlock("longjmp.cont")); 1411 1412 return RValue::get(nullptr); 1413 } 1414 case Builtin::BI__sync_fetch_and_add: 1415 case Builtin::BI__sync_fetch_and_sub: 1416 case Builtin::BI__sync_fetch_and_or: 1417 case Builtin::BI__sync_fetch_and_and: 1418 case Builtin::BI__sync_fetch_and_xor: 1419 case Builtin::BI__sync_fetch_and_nand: 1420 case Builtin::BI__sync_add_and_fetch: 1421 case Builtin::BI__sync_sub_and_fetch: 1422 case Builtin::BI__sync_and_and_fetch: 1423 case Builtin::BI__sync_or_and_fetch: 1424 case Builtin::BI__sync_xor_and_fetch: 1425 case Builtin::BI__sync_nand_and_fetch: 1426 case Builtin::BI__sync_val_compare_and_swap: 1427 case Builtin::BI__sync_bool_compare_and_swap: 1428 case Builtin::BI__sync_lock_test_and_set: 1429 case Builtin::BI__sync_lock_release: 1430 case Builtin::BI__sync_swap: 1431 llvm_unreachable("Shouldn't make it through sema"); 1432 case Builtin::BI__sync_fetch_and_add_1: 1433 case Builtin::BI__sync_fetch_and_add_2: 1434 case Builtin::BI__sync_fetch_and_add_4: 1435 case Builtin::BI__sync_fetch_and_add_8: 1436 case Builtin::BI__sync_fetch_and_add_16: 1437 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E); 1438 case Builtin::BI__sync_fetch_and_sub_1: 1439 case Builtin::BI__sync_fetch_and_sub_2: 1440 case Builtin::BI__sync_fetch_and_sub_4: 1441 case Builtin::BI__sync_fetch_and_sub_8: 1442 case Builtin::BI__sync_fetch_and_sub_16: 1443 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E); 1444 case Builtin::BI__sync_fetch_and_or_1: 1445 case Builtin::BI__sync_fetch_and_or_2: 1446 case Builtin::BI__sync_fetch_and_or_4: 1447 case Builtin::BI__sync_fetch_and_or_8: 1448 case Builtin::BI__sync_fetch_and_or_16: 1449 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E); 1450 case Builtin::BI__sync_fetch_and_and_1: 1451 case Builtin::BI__sync_fetch_and_and_2: 1452 case Builtin::BI__sync_fetch_and_and_4: 1453 case Builtin::BI__sync_fetch_and_and_8: 1454 case Builtin::BI__sync_fetch_and_and_16: 1455 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E); 1456 case Builtin::BI__sync_fetch_and_xor_1: 1457 case Builtin::BI__sync_fetch_and_xor_2: 1458 case Builtin::BI__sync_fetch_and_xor_4: 1459 case Builtin::BI__sync_fetch_and_xor_8: 1460 case Builtin::BI__sync_fetch_and_xor_16: 1461 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E); 1462 case Builtin::BI__sync_fetch_and_nand_1: 1463 case Builtin::BI__sync_fetch_and_nand_2: 1464 case Builtin::BI__sync_fetch_and_nand_4: 1465 case Builtin::BI__sync_fetch_and_nand_8: 1466 case Builtin::BI__sync_fetch_and_nand_16: 1467 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Nand, E); 1468 1469 // Clang extensions: not overloaded yet. 1470 case Builtin::BI__sync_fetch_and_min: 1471 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E); 1472 case Builtin::BI__sync_fetch_and_max: 1473 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Max, E); 1474 case Builtin::BI__sync_fetch_and_umin: 1475 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMin, E); 1476 case Builtin::BI__sync_fetch_and_umax: 1477 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMax, E); 1478 1479 case Builtin::BI__sync_add_and_fetch_1: 1480 case Builtin::BI__sync_add_and_fetch_2: 1481 case Builtin::BI__sync_add_and_fetch_4: 1482 case Builtin::BI__sync_add_and_fetch_8: 1483 case Builtin::BI__sync_add_and_fetch_16: 1484 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Add, E, 1485 llvm::Instruction::Add); 1486 case Builtin::BI__sync_sub_and_fetch_1: 1487 case Builtin::BI__sync_sub_and_fetch_2: 1488 case Builtin::BI__sync_sub_and_fetch_4: 1489 case Builtin::BI__sync_sub_and_fetch_8: 1490 case Builtin::BI__sync_sub_and_fetch_16: 1491 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Sub, E, 1492 llvm::Instruction::Sub); 1493 case Builtin::BI__sync_and_and_fetch_1: 1494 case Builtin::BI__sync_and_and_fetch_2: 1495 case Builtin::BI__sync_and_and_fetch_4: 1496 case Builtin::BI__sync_and_and_fetch_8: 1497 case Builtin::BI__sync_and_and_fetch_16: 1498 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::And, E, 1499 llvm::Instruction::And); 1500 case Builtin::BI__sync_or_and_fetch_1: 1501 case Builtin::BI__sync_or_and_fetch_2: 1502 case Builtin::BI__sync_or_and_fetch_4: 1503 case Builtin::BI__sync_or_and_fetch_8: 1504 case Builtin::BI__sync_or_and_fetch_16: 1505 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Or, E, 1506 llvm::Instruction::Or); 1507 case Builtin::BI__sync_xor_and_fetch_1: 1508 case Builtin::BI__sync_xor_and_fetch_2: 1509 case Builtin::BI__sync_xor_and_fetch_4: 1510 case Builtin::BI__sync_xor_and_fetch_8: 1511 case Builtin::BI__sync_xor_and_fetch_16: 1512 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Xor, E, 1513 llvm::Instruction::Xor); 1514 case Builtin::BI__sync_nand_and_fetch_1: 1515 case Builtin::BI__sync_nand_and_fetch_2: 1516 case Builtin::BI__sync_nand_and_fetch_4: 1517 case Builtin::BI__sync_nand_and_fetch_8: 1518 case Builtin::BI__sync_nand_and_fetch_16: 1519 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Nand, E, 1520 llvm::Instruction::And, true); 1521 1522 case Builtin::BI__sync_val_compare_and_swap_1: 1523 case Builtin::BI__sync_val_compare_and_swap_2: 1524 case Builtin::BI__sync_val_compare_and_swap_4: 1525 case Builtin::BI__sync_val_compare_and_swap_8: 1526 case Builtin::BI__sync_val_compare_and_swap_16: 1527 return RValue::get(MakeAtomicCmpXchgValue(*this, E, false)); 1528 1529 case Builtin::BI__sync_bool_compare_and_swap_1: 1530 case Builtin::BI__sync_bool_compare_and_swap_2: 1531 case Builtin::BI__sync_bool_compare_and_swap_4: 1532 case Builtin::BI__sync_bool_compare_and_swap_8: 1533 case Builtin::BI__sync_bool_compare_and_swap_16: 1534 return RValue::get(MakeAtomicCmpXchgValue(*this, E, true)); 1535 1536 case Builtin::BI__sync_swap_1: 1537 case Builtin::BI__sync_swap_2: 1538 case Builtin::BI__sync_swap_4: 1539 case Builtin::BI__sync_swap_8: 1540 case Builtin::BI__sync_swap_16: 1541 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1542 1543 case Builtin::BI__sync_lock_test_and_set_1: 1544 case Builtin::BI__sync_lock_test_and_set_2: 1545 case Builtin::BI__sync_lock_test_and_set_4: 1546 case Builtin::BI__sync_lock_test_and_set_8: 1547 case Builtin::BI__sync_lock_test_and_set_16: 1548 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1549 1550 case Builtin::BI__sync_lock_release_1: 1551 case Builtin::BI__sync_lock_release_2: 1552 case Builtin::BI__sync_lock_release_4: 1553 case Builtin::BI__sync_lock_release_8: 1554 case Builtin::BI__sync_lock_release_16: { 1555 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1556 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 1557 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 1558 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 1559 StoreSize.getQuantity() * 8); 1560 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 1561 llvm::StoreInst *Store = 1562 Builder.CreateAlignedStore(llvm::Constant::getNullValue(ITy), Ptr, 1563 StoreSize); 1564 Store->setAtomic(llvm::AtomicOrdering::Release); 1565 return RValue::get(nullptr); 1566 } 1567 1568 case Builtin::BI__sync_synchronize: { 1569 // We assume this is supposed to correspond to a C++0x-style 1570 // sequentially-consistent fence (i.e. this is only usable for 1571 // synchonization, not device I/O or anything like that). This intrinsic 1572 // is really badly designed in the sense that in theory, there isn't 1573 // any way to safely use it... but in practice, it mostly works 1574 // to use it with non-atomic loads and stores to get acquire/release 1575 // semantics. 1576 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent); 1577 return RValue::get(nullptr); 1578 } 1579 1580 case Builtin::BI__builtin_nontemporal_load: 1581 return RValue::get(EmitNontemporalLoad(*this, E)); 1582 case Builtin::BI__builtin_nontemporal_store: 1583 return RValue::get(EmitNontemporalStore(*this, E)); 1584 case Builtin::BI__c11_atomic_is_lock_free: 1585 case Builtin::BI__atomic_is_lock_free: { 1586 // Call "bool __atomic_is_lock_free(size_t size, void *ptr)". For the 1587 // __c11 builtin, ptr is 0 (indicating a properly-aligned object), since 1588 // _Atomic(T) is always properly-aligned. 1589 const char *LibCallName = "__atomic_is_lock_free"; 1590 CallArgList Args; 1591 Args.add(RValue::get(EmitScalarExpr(E->getArg(0))), 1592 getContext().getSizeType()); 1593 if (BuiltinID == Builtin::BI__atomic_is_lock_free) 1594 Args.add(RValue::get(EmitScalarExpr(E->getArg(1))), 1595 getContext().VoidPtrTy); 1596 else 1597 Args.add(RValue::get(llvm::Constant::getNullValue(VoidPtrTy)), 1598 getContext().VoidPtrTy); 1599 const CGFunctionInfo &FuncInfo = 1600 CGM.getTypes().arrangeBuiltinFunctionCall(E->getType(), Args); 1601 llvm::FunctionType *FTy = CGM.getTypes().GetFunctionType(FuncInfo); 1602 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, LibCallName); 1603 return EmitCall(FuncInfo, CGCallee::forDirect(Func), 1604 ReturnValueSlot(), Args); 1605 } 1606 1607 case Builtin::BI__atomic_test_and_set: { 1608 // Look at the argument type to determine whether this is a volatile 1609 // operation. The parameter type is always volatile. 1610 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1611 bool Volatile = 1612 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1613 1614 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1615 unsigned AddrSpace = Ptr->getType()->getPointerAddressSpace(); 1616 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1617 Value *NewVal = Builder.getInt8(1); 1618 Value *Order = EmitScalarExpr(E->getArg(1)); 1619 if (isa<llvm::ConstantInt>(Order)) { 1620 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1621 AtomicRMWInst *Result = nullptr; 1622 switch (ord) { 1623 case 0: // memory_order_relaxed 1624 default: // invalid order 1625 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1626 llvm::AtomicOrdering::Monotonic); 1627 break; 1628 case 1: // memory_order_consume 1629 case 2: // memory_order_acquire 1630 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1631 llvm::AtomicOrdering::Acquire); 1632 break; 1633 case 3: // memory_order_release 1634 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1635 llvm::AtomicOrdering::Release); 1636 break; 1637 case 4: // memory_order_acq_rel 1638 1639 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1640 llvm::AtomicOrdering::AcquireRelease); 1641 break; 1642 case 5: // memory_order_seq_cst 1643 Result = Builder.CreateAtomicRMW( 1644 llvm::AtomicRMWInst::Xchg, Ptr, NewVal, 1645 llvm::AtomicOrdering::SequentiallyConsistent); 1646 break; 1647 } 1648 Result->setVolatile(Volatile); 1649 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1650 } 1651 1652 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1653 1654 llvm::BasicBlock *BBs[5] = { 1655 createBasicBlock("monotonic", CurFn), 1656 createBasicBlock("acquire", CurFn), 1657 createBasicBlock("release", CurFn), 1658 createBasicBlock("acqrel", CurFn), 1659 createBasicBlock("seqcst", CurFn) 1660 }; 1661 llvm::AtomicOrdering Orders[5] = { 1662 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Acquire, 1663 llvm::AtomicOrdering::Release, llvm::AtomicOrdering::AcquireRelease, 1664 llvm::AtomicOrdering::SequentiallyConsistent}; 1665 1666 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1667 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1668 1669 Builder.SetInsertPoint(ContBB); 1670 PHINode *Result = Builder.CreatePHI(Int8Ty, 5, "was_set"); 1671 1672 for (unsigned i = 0; i < 5; ++i) { 1673 Builder.SetInsertPoint(BBs[i]); 1674 AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1675 Ptr, NewVal, Orders[i]); 1676 RMW->setVolatile(Volatile); 1677 Result->addIncoming(RMW, BBs[i]); 1678 Builder.CreateBr(ContBB); 1679 } 1680 1681 SI->addCase(Builder.getInt32(0), BBs[0]); 1682 SI->addCase(Builder.getInt32(1), BBs[1]); 1683 SI->addCase(Builder.getInt32(2), BBs[1]); 1684 SI->addCase(Builder.getInt32(3), BBs[2]); 1685 SI->addCase(Builder.getInt32(4), BBs[3]); 1686 SI->addCase(Builder.getInt32(5), BBs[4]); 1687 1688 Builder.SetInsertPoint(ContBB); 1689 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1690 } 1691 1692 case Builtin::BI__atomic_clear: { 1693 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1694 bool Volatile = 1695 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1696 1697 Address Ptr = EmitPointerWithAlignment(E->getArg(0)); 1698 unsigned AddrSpace = Ptr.getPointer()->getType()->getPointerAddressSpace(); 1699 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1700 Value *NewVal = Builder.getInt8(0); 1701 Value *Order = EmitScalarExpr(E->getArg(1)); 1702 if (isa<llvm::ConstantInt>(Order)) { 1703 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1704 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1705 switch (ord) { 1706 case 0: // memory_order_relaxed 1707 default: // invalid order 1708 Store->setOrdering(llvm::AtomicOrdering::Monotonic); 1709 break; 1710 case 3: // memory_order_release 1711 Store->setOrdering(llvm::AtomicOrdering::Release); 1712 break; 1713 case 5: // memory_order_seq_cst 1714 Store->setOrdering(llvm::AtomicOrdering::SequentiallyConsistent); 1715 break; 1716 } 1717 return RValue::get(nullptr); 1718 } 1719 1720 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1721 1722 llvm::BasicBlock *BBs[3] = { 1723 createBasicBlock("monotonic", CurFn), 1724 createBasicBlock("release", CurFn), 1725 createBasicBlock("seqcst", CurFn) 1726 }; 1727 llvm::AtomicOrdering Orders[3] = { 1728 llvm::AtomicOrdering::Monotonic, llvm::AtomicOrdering::Release, 1729 llvm::AtomicOrdering::SequentiallyConsistent}; 1730 1731 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1732 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1733 1734 for (unsigned i = 0; i < 3; ++i) { 1735 Builder.SetInsertPoint(BBs[i]); 1736 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1737 Store->setOrdering(Orders[i]); 1738 Builder.CreateBr(ContBB); 1739 } 1740 1741 SI->addCase(Builder.getInt32(0), BBs[0]); 1742 SI->addCase(Builder.getInt32(3), BBs[1]); 1743 SI->addCase(Builder.getInt32(5), BBs[2]); 1744 1745 Builder.SetInsertPoint(ContBB); 1746 return RValue::get(nullptr); 1747 } 1748 1749 case Builtin::BI__atomic_thread_fence: 1750 case Builtin::BI__atomic_signal_fence: 1751 case Builtin::BI__c11_atomic_thread_fence: 1752 case Builtin::BI__c11_atomic_signal_fence: { 1753 llvm::SynchronizationScope Scope; 1754 if (BuiltinID == Builtin::BI__atomic_signal_fence || 1755 BuiltinID == Builtin::BI__c11_atomic_signal_fence) 1756 Scope = llvm::SingleThread; 1757 else 1758 Scope = llvm::CrossThread; 1759 Value *Order = EmitScalarExpr(E->getArg(0)); 1760 if (isa<llvm::ConstantInt>(Order)) { 1761 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1762 switch (ord) { 1763 case 0: // memory_order_relaxed 1764 default: // invalid order 1765 break; 1766 case 1: // memory_order_consume 1767 case 2: // memory_order_acquire 1768 Builder.CreateFence(llvm::AtomicOrdering::Acquire, Scope); 1769 break; 1770 case 3: // memory_order_release 1771 Builder.CreateFence(llvm::AtomicOrdering::Release, Scope); 1772 break; 1773 case 4: // memory_order_acq_rel 1774 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, Scope); 1775 break; 1776 case 5: // memory_order_seq_cst 1777 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 1778 Scope); 1779 break; 1780 } 1781 return RValue::get(nullptr); 1782 } 1783 1784 llvm::BasicBlock *AcquireBB, *ReleaseBB, *AcqRelBB, *SeqCstBB; 1785 AcquireBB = createBasicBlock("acquire", CurFn); 1786 ReleaseBB = createBasicBlock("release", CurFn); 1787 AcqRelBB = createBasicBlock("acqrel", CurFn); 1788 SeqCstBB = createBasicBlock("seqcst", CurFn); 1789 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1790 1791 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1792 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, ContBB); 1793 1794 Builder.SetInsertPoint(AcquireBB); 1795 Builder.CreateFence(llvm::AtomicOrdering::Acquire, Scope); 1796 Builder.CreateBr(ContBB); 1797 SI->addCase(Builder.getInt32(1), AcquireBB); 1798 SI->addCase(Builder.getInt32(2), AcquireBB); 1799 1800 Builder.SetInsertPoint(ReleaseBB); 1801 Builder.CreateFence(llvm::AtomicOrdering::Release, Scope); 1802 Builder.CreateBr(ContBB); 1803 SI->addCase(Builder.getInt32(3), ReleaseBB); 1804 1805 Builder.SetInsertPoint(AcqRelBB); 1806 Builder.CreateFence(llvm::AtomicOrdering::AcquireRelease, Scope); 1807 Builder.CreateBr(ContBB); 1808 SI->addCase(Builder.getInt32(4), AcqRelBB); 1809 1810 Builder.SetInsertPoint(SeqCstBB); 1811 Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, Scope); 1812 Builder.CreateBr(ContBB); 1813 SI->addCase(Builder.getInt32(5), SeqCstBB); 1814 1815 Builder.SetInsertPoint(ContBB); 1816 return RValue::get(nullptr); 1817 } 1818 1819 // Library functions with special handling. 1820 case Builtin::BIsqrt: 1821 case Builtin::BIsqrtf: 1822 case Builtin::BIsqrtl: { 1823 // Transform a call to sqrt* into a @llvm.sqrt.* intrinsic call, but only 1824 // in finite- or unsafe-math mode (the intrinsic has different semantics 1825 // for handling negative numbers compared to the library function, so 1826 // -fmath-errno=0 is not enough). 1827 if (!FD->hasAttr<ConstAttr>()) 1828 break; 1829 if (!(CGM.getCodeGenOpts().UnsafeFPMath || 1830 CGM.getCodeGenOpts().NoNaNsFPMath)) 1831 break; 1832 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 1833 llvm::Type *ArgType = Arg0->getType(); 1834 Value *F = CGM.getIntrinsic(Intrinsic::sqrt, ArgType); 1835 return RValue::get(Builder.CreateCall(F, Arg0)); 1836 } 1837 1838 case Builtin::BI__builtin_pow: 1839 case Builtin::BI__builtin_powf: 1840 case Builtin::BI__builtin_powl: 1841 case Builtin::BIpow: 1842 case Builtin::BIpowf: 1843 case Builtin::BIpowl: { 1844 // Transform a call to pow* into a @llvm.pow.* intrinsic call. 1845 if (!FD->hasAttr<ConstAttr>()) 1846 break; 1847 Value *Base = EmitScalarExpr(E->getArg(0)); 1848 Value *Exponent = EmitScalarExpr(E->getArg(1)); 1849 llvm::Type *ArgType = Base->getType(); 1850 Value *F = CGM.getIntrinsic(Intrinsic::pow, ArgType); 1851 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 1852 } 1853 1854 case Builtin::BIfma: 1855 case Builtin::BIfmaf: 1856 case Builtin::BIfmal: 1857 case Builtin::BI__builtin_fma: 1858 case Builtin::BI__builtin_fmaf: 1859 case Builtin::BI__builtin_fmal: { 1860 // Rewrite fma to intrinsic. 1861 Value *FirstArg = EmitScalarExpr(E->getArg(0)); 1862 llvm::Type *ArgType = FirstArg->getType(); 1863 Value *F = CGM.getIntrinsic(Intrinsic::fma, ArgType); 1864 return RValue::get( 1865 Builder.CreateCall(F, {FirstArg, EmitScalarExpr(E->getArg(1)), 1866 EmitScalarExpr(E->getArg(2))})); 1867 } 1868 1869 case Builtin::BI__builtin_signbit: 1870 case Builtin::BI__builtin_signbitf: 1871 case Builtin::BI__builtin_signbitl: { 1872 return RValue::get( 1873 Builder.CreateZExt(EmitSignBit(*this, EmitScalarExpr(E->getArg(0))), 1874 ConvertType(E->getType()))); 1875 } 1876 case Builtin::BI__builtin_annotation: { 1877 llvm::Value *AnnVal = EmitScalarExpr(E->getArg(0)); 1878 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::annotation, 1879 AnnVal->getType()); 1880 1881 // Get the annotation string, go through casts. Sema requires this to be a 1882 // non-wide string literal, potentially casted, so the cast<> is safe. 1883 const Expr *AnnotationStrExpr = E->getArg(1)->IgnoreParenCasts(); 1884 StringRef Str = cast<StringLiteral>(AnnotationStrExpr)->getString(); 1885 return RValue::get(EmitAnnotationCall(F, AnnVal, Str, E->getExprLoc())); 1886 } 1887 case Builtin::BI__builtin_addcb: 1888 case Builtin::BI__builtin_addcs: 1889 case Builtin::BI__builtin_addc: 1890 case Builtin::BI__builtin_addcl: 1891 case Builtin::BI__builtin_addcll: 1892 case Builtin::BI__builtin_subcb: 1893 case Builtin::BI__builtin_subcs: 1894 case Builtin::BI__builtin_subc: 1895 case Builtin::BI__builtin_subcl: 1896 case Builtin::BI__builtin_subcll: { 1897 1898 // We translate all of these builtins from expressions of the form: 1899 // int x = ..., y = ..., carryin = ..., carryout, result; 1900 // result = __builtin_addc(x, y, carryin, &carryout); 1901 // 1902 // to LLVM IR of the form: 1903 // 1904 // %tmp1 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y) 1905 // %tmpsum1 = extractvalue {i32, i1} %tmp1, 0 1906 // %carry1 = extractvalue {i32, i1} %tmp1, 1 1907 // %tmp2 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %tmpsum1, 1908 // i32 %carryin) 1909 // %result = extractvalue {i32, i1} %tmp2, 0 1910 // %carry2 = extractvalue {i32, i1} %tmp2, 1 1911 // %tmp3 = or i1 %carry1, %carry2 1912 // %tmp4 = zext i1 %tmp3 to i32 1913 // store i32 %tmp4, i32* %carryout 1914 1915 // Scalarize our inputs. 1916 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1917 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1918 llvm::Value *Carryin = EmitScalarExpr(E->getArg(2)); 1919 Address CarryOutPtr = EmitPointerWithAlignment(E->getArg(3)); 1920 1921 // Decide if we are lowering to a uadd.with.overflow or usub.with.overflow. 1922 llvm::Intrinsic::ID IntrinsicId; 1923 switch (BuiltinID) { 1924 default: llvm_unreachable("Unknown multiprecision builtin id."); 1925 case Builtin::BI__builtin_addcb: 1926 case Builtin::BI__builtin_addcs: 1927 case Builtin::BI__builtin_addc: 1928 case Builtin::BI__builtin_addcl: 1929 case Builtin::BI__builtin_addcll: 1930 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1931 break; 1932 case Builtin::BI__builtin_subcb: 1933 case Builtin::BI__builtin_subcs: 1934 case Builtin::BI__builtin_subc: 1935 case Builtin::BI__builtin_subcl: 1936 case Builtin::BI__builtin_subcll: 1937 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1938 break; 1939 } 1940 1941 // Construct our resulting LLVM IR expression. 1942 llvm::Value *Carry1; 1943 llvm::Value *Sum1 = EmitOverflowIntrinsic(*this, IntrinsicId, 1944 X, Y, Carry1); 1945 llvm::Value *Carry2; 1946 llvm::Value *Sum2 = EmitOverflowIntrinsic(*this, IntrinsicId, 1947 Sum1, Carryin, Carry2); 1948 llvm::Value *CarryOut = Builder.CreateZExt(Builder.CreateOr(Carry1, Carry2), 1949 X->getType()); 1950 Builder.CreateStore(CarryOut, CarryOutPtr); 1951 return RValue::get(Sum2); 1952 } 1953 1954 case Builtin::BI__builtin_add_overflow: 1955 case Builtin::BI__builtin_sub_overflow: 1956 case Builtin::BI__builtin_mul_overflow: { 1957 const clang::Expr *LeftArg = E->getArg(0); 1958 const clang::Expr *RightArg = E->getArg(1); 1959 const clang::Expr *ResultArg = E->getArg(2); 1960 1961 clang::QualType ResultQTy = 1962 ResultArg->getType()->castAs<PointerType>()->getPointeeType(); 1963 1964 WidthAndSignedness LeftInfo = 1965 getIntegerWidthAndSignedness(CGM.getContext(), LeftArg->getType()); 1966 WidthAndSignedness RightInfo = 1967 getIntegerWidthAndSignedness(CGM.getContext(), RightArg->getType()); 1968 WidthAndSignedness ResultInfo = 1969 getIntegerWidthAndSignedness(CGM.getContext(), ResultQTy); 1970 WidthAndSignedness EncompassingInfo = 1971 EncompassingIntegerType({LeftInfo, RightInfo, ResultInfo}); 1972 1973 llvm::Type *EncompassingLLVMTy = 1974 llvm::IntegerType::get(CGM.getLLVMContext(), EncompassingInfo.Width); 1975 1976 llvm::Type *ResultLLVMTy = CGM.getTypes().ConvertType(ResultQTy); 1977 1978 llvm::Intrinsic::ID IntrinsicId; 1979 switch (BuiltinID) { 1980 default: 1981 llvm_unreachable("Unknown overflow builtin id."); 1982 case Builtin::BI__builtin_add_overflow: 1983 IntrinsicId = EncompassingInfo.Signed 1984 ? llvm::Intrinsic::sadd_with_overflow 1985 : llvm::Intrinsic::uadd_with_overflow; 1986 break; 1987 case Builtin::BI__builtin_sub_overflow: 1988 IntrinsicId = EncompassingInfo.Signed 1989 ? llvm::Intrinsic::ssub_with_overflow 1990 : llvm::Intrinsic::usub_with_overflow; 1991 break; 1992 case Builtin::BI__builtin_mul_overflow: 1993 IntrinsicId = EncompassingInfo.Signed 1994 ? llvm::Intrinsic::smul_with_overflow 1995 : llvm::Intrinsic::umul_with_overflow; 1996 break; 1997 } 1998 1999 llvm::Value *Left = EmitScalarExpr(LeftArg); 2000 llvm::Value *Right = EmitScalarExpr(RightArg); 2001 Address ResultPtr = EmitPointerWithAlignment(ResultArg); 2002 2003 // Extend each operand to the encompassing type. 2004 Left = Builder.CreateIntCast(Left, EncompassingLLVMTy, LeftInfo.Signed); 2005 Right = Builder.CreateIntCast(Right, EncompassingLLVMTy, RightInfo.Signed); 2006 2007 // Perform the operation on the extended values. 2008 llvm::Value *Overflow, *Result; 2009 Result = EmitOverflowIntrinsic(*this, IntrinsicId, Left, Right, Overflow); 2010 2011 if (EncompassingInfo.Width > ResultInfo.Width) { 2012 // The encompassing type is wider than the result type, so we need to 2013 // truncate it. 2014 llvm::Value *ResultTrunc = Builder.CreateTrunc(Result, ResultLLVMTy); 2015 2016 // To see if the truncation caused an overflow, we will extend 2017 // the result and then compare it to the original result. 2018 llvm::Value *ResultTruncExt = Builder.CreateIntCast( 2019 ResultTrunc, EncompassingLLVMTy, ResultInfo.Signed); 2020 llvm::Value *TruncationOverflow = 2021 Builder.CreateICmpNE(Result, ResultTruncExt); 2022 2023 Overflow = Builder.CreateOr(Overflow, TruncationOverflow); 2024 Result = ResultTrunc; 2025 } 2026 2027 // Finally, store the result using the pointer. 2028 bool isVolatile = 2029 ResultArg->getType()->getPointeeType().isVolatileQualified(); 2030 Builder.CreateStore(EmitToMemory(Result, ResultQTy), ResultPtr, isVolatile); 2031 2032 return RValue::get(Overflow); 2033 } 2034 2035 case Builtin::BI__builtin_uadd_overflow: 2036 case Builtin::BI__builtin_uaddl_overflow: 2037 case Builtin::BI__builtin_uaddll_overflow: 2038 case Builtin::BI__builtin_usub_overflow: 2039 case Builtin::BI__builtin_usubl_overflow: 2040 case Builtin::BI__builtin_usubll_overflow: 2041 case Builtin::BI__builtin_umul_overflow: 2042 case Builtin::BI__builtin_umull_overflow: 2043 case Builtin::BI__builtin_umulll_overflow: 2044 case Builtin::BI__builtin_sadd_overflow: 2045 case Builtin::BI__builtin_saddl_overflow: 2046 case Builtin::BI__builtin_saddll_overflow: 2047 case Builtin::BI__builtin_ssub_overflow: 2048 case Builtin::BI__builtin_ssubl_overflow: 2049 case Builtin::BI__builtin_ssubll_overflow: 2050 case Builtin::BI__builtin_smul_overflow: 2051 case Builtin::BI__builtin_smull_overflow: 2052 case Builtin::BI__builtin_smulll_overflow: { 2053 2054 // We translate all of these builtins directly to the relevant llvm IR node. 2055 2056 // Scalarize our inputs. 2057 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 2058 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 2059 Address SumOutPtr = EmitPointerWithAlignment(E->getArg(2)); 2060 2061 // Decide which of the overflow intrinsics we are lowering to: 2062 llvm::Intrinsic::ID IntrinsicId; 2063 switch (BuiltinID) { 2064 default: llvm_unreachable("Unknown overflow builtin id."); 2065 case Builtin::BI__builtin_uadd_overflow: 2066 case Builtin::BI__builtin_uaddl_overflow: 2067 case Builtin::BI__builtin_uaddll_overflow: 2068 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 2069 break; 2070 case Builtin::BI__builtin_usub_overflow: 2071 case Builtin::BI__builtin_usubl_overflow: 2072 case Builtin::BI__builtin_usubll_overflow: 2073 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 2074 break; 2075 case Builtin::BI__builtin_umul_overflow: 2076 case Builtin::BI__builtin_umull_overflow: 2077 case Builtin::BI__builtin_umulll_overflow: 2078 IntrinsicId = llvm::Intrinsic::umul_with_overflow; 2079 break; 2080 case Builtin::BI__builtin_sadd_overflow: 2081 case Builtin::BI__builtin_saddl_overflow: 2082 case Builtin::BI__builtin_saddll_overflow: 2083 IntrinsicId = llvm::Intrinsic::sadd_with_overflow; 2084 break; 2085 case Builtin::BI__builtin_ssub_overflow: 2086 case Builtin::BI__builtin_ssubl_overflow: 2087 case Builtin::BI__builtin_ssubll_overflow: 2088 IntrinsicId = llvm::Intrinsic::ssub_with_overflow; 2089 break; 2090 case Builtin::BI__builtin_smul_overflow: 2091 case Builtin::BI__builtin_smull_overflow: 2092 case Builtin::BI__builtin_smulll_overflow: 2093 IntrinsicId = llvm::Intrinsic::smul_with_overflow; 2094 break; 2095 } 2096 2097 2098 llvm::Value *Carry; 2099 llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry); 2100 Builder.CreateStore(Sum, SumOutPtr); 2101 2102 return RValue::get(Carry); 2103 } 2104 case Builtin::BI__builtin_addressof: 2105 return RValue::get(EmitLValue(E->getArg(0)).getPointer()); 2106 case Builtin::BI__builtin_operator_new: 2107 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 2108 E->getArg(0), false); 2109 case Builtin::BI__builtin_operator_delete: 2110 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 2111 E->getArg(0), true); 2112 case Builtin::BI__noop: 2113 // __noop always evaluates to an integer literal zero. 2114 return RValue::get(ConstantInt::get(IntTy, 0)); 2115 case Builtin::BI__builtin_call_with_static_chain: { 2116 const CallExpr *Call = cast<CallExpr>(E->getArg(0)); 2117 const Expr *Chain = E->getArg(1); 2118 return EmitCall(Call->getCallee()->getType(), 2119 EmitCallee(Call->getCallee()), Call, ReturnValue, 2120 EmitScalarExpr(Chain)); 2121 } 2122 case Builtin::BI_InterlockedExchange8: 2123 case Builtin::BI_InterlockedExchange16: 2124 case Builtin::BI_InterlockedExchange: 2125 case Builtin::BI_InterlockedExchangePointer: 2126 return RValue::get( 2127 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E)); 2128 case Builtin::BI_InterlockedCompareExchangePointer: { 2129 llvm::Type *RTy; 2130 llvm::IntegerType *IntType = 2131 IntegerType::get(getLLVMContext(), 2132 getContext().getTypeSize(E->getType())); 2133 llvm::Type *IntPtrType = IntType->getPointerTo(); 2134 2135 llvm::Value *Destination = 2136 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), IntPtrType); 2137 2138 llvm::Value *Exchange = EmitScalarExpr(E->getArg(1)); 2139 RTy = Exchange->getType(); 2140 Exchange = Builder.CreatePtrToInt(Exchange, IntType); 2141 2142 llvm::Value *Comparand = 2143 Builder.CreatePtrToInt(EmitScalarExpr(E->getArg(2)), IntType); 2144 2145 auto Result = 2146 Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 2147 AtomicOrdering::SequentiallyConsistent, 2148 AtomicOrdering::SequentiallyConsistent); 2149 Result->setVolatile(true); 2150 2151 return RValue::get(Builder.CreateIntToPtr(Builder.CreateExtractValue(Result, 2152 0), 2153 RTy)); 2154 } 2155 case Builtin::BI_InterlockedCompareExchange8: 2156 case Builtin::BI_InterlockedCompareExchange16: 2157 case Builtin::BI_InterlockedCompareExchange: 2158 case Builtin::BI_InterlockedCompareExchange64: { 2159 AtomicCmpXchgInst *CXI = Builder.CreateAtomicCmpXchg( 2160 EmitScalarExpr(E->getArg(0)), 2161 EmitScalarExpr(E->getArg(2)), 2162 EmitScalarExpr(E->getArg(1)), 2163 AtomicOrdering::SequentiallyConsistent, 2164 AtomicOrdering::SequentiallyConsistent); 2165 CXI->setVolatile(true); 2166 return RValue::get(Builder.CreateExtractValue(CXI, 0)); 2167 } 2168 case Builtin::BI_InterlockedIncrement16: 2169 case Builtin::BI_InterlockedIncrement: 2170 return RValue::get( 2171 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E)); 2172 case Builtin::BI_InterlockedDecrement16: 2173 case Builtin::BI_InterlockedDecrement: 2174 return RValue::get( 2175 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E)); 2176 case Builtin::BI_InterlockedAnd8: 2177 case Builtin::BI_InterlockedAnd16: 2178 case Builtin::BI_InterlockedAnd: 2179 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E)); 2180 case Builtin::BI_InterlockedExchangeAdd8: 2181 case Builtin::BI_InterlockedExchangeAdd16: 2182 case Builtin::BI_InterlockedExchangeAdd: 2183 return RValue::get( 2184 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E)); 2185 case Builtin::BI_InterlockedExchangeSub8: 2186 case Builtin::BI_InterlockedExchangeSub16: 2187 case Builtin::BI_InterlockedExchangeSub: 2188 return RValue::get( 2189 EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E)); 2190 case Builtin::BI_InterlockedOr8: 2191 case Builtin::BI_InterlockedOr16: 2192 case Builtin::BI_InterlockedOr: 2193 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E)); 2194 case Builtin::BI_InterlockedXor8: 2195 case Builtin::BI_InterlockedXor16: 2196 case Builtin::BI_InterlockedXor: 2197 return RValue::get(EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E)); 2198 case Builtin::BI__readfsdword: { 2199 llvm::Type *IntTy = ConvertType(E->getType()); 2200 Value *IntToPtr = 2201 Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)), 2202 llvm::PointerType::get(IntTy, 257)); 2203 LoadInst *Load = Builder.CreateAlignedLoad( 2204 IntTy, IntToPtr, getContext().getTypeAlignInChars(E->getType())); 2205 Load->setVolatile(true); 2206 return RValue::get(Load); 2207 } 2208 2209 case Builtin::BI__exception_code: 2210 case Builtin::BI_exception_code: 2211 return RValue::get(EmitSEHExceptionCode()); 2212 case Builtin::BI__exception_info: 2213 case Builtin::BI_exception_info: 2214 return RValue::get(EmitSEHExceptionInfo()); 2215 case Builtin::BI__abnormal_termination: 2216 case Builtin::BI_abnormal_termination: 2217 return RValue::get(EmitSEHAbnormalTermination()); 2218 case Builtin::BI_setjmpex: { 2219 if (getTarget().getTriple().isOSMSVCRT()) { 2220 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 2221 llvm::AttributeSet ReturnsTwiceAttr = 2222 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 2223 llvm::Attribute::ReturnsTwice); 2224 llvm::Constant *SetJmpEx = CGM.CreateRuntimeFunction( 2225 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 2226 "_setjmpex", ReturnsTwiceAttr, /*Local=*/true); 2227 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 2228 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 2229 llvm::Value *FrameAddr = 2230 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2231 ConstantInt::get(Int32Ty, 0)); 2232 llvm::Value *Args[] = {Buf, FrameAddr}; 2233 llvm::CallSite CS = EmitRuntimeCallOrInvoke(SetJmpEx, Args); 2234 CS.setAttributes(ReturnsTwiceAttr); 2235 return RValue::get(CS.getInstruction()); 2236 } 2237 break; 2238 } 2239 case Builtin::BI_setjmp: { 2240 if (getTarget().getTriple().isOSMSVCRT()) { 2241 llvm::AttributeSet ReturnsTwiceAttr = 2242 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 2243 llvm::Attribute::ReturnsTwice); 2244 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 2245 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 2246 llvm::CallSite CS; 2247 if (getTarget().getTriple().getArch() == llvm::Triple::x86) { 2248 llvm::Type *ArgTypes[] = {Int8PtrTy, IntTy}; 2249 llvm::Constant *SetJmp3 = CGM.CreateRuntimeFunction( 2250 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/true), 2251 "_setjmp3", ReturnsTwiceAttr, /*Local=*/true); 2252 llvm::Value *Count = ConstantInt::get(IntTy, 0); 2253 llvm::Value *Args[] = {Buf, Count}; 2254 CS = EmitRuntimeCallOrInvoke(SetJmp3, Args); 2255 } else { 2256 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 2257 llvm::Constant *SetJmp = CGM.CreateRuntimeFunction( 2258 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 2259 "_setjmp", ReturnsTwiceAttr, /*Local=*/true); 2260 llvm::Value *FrameAddr = 2261 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 2262 ConstantInt::get(Int32Ty, 0)); 2263 llvm::Value *Args[] = {Buf, FrameAddr}; 2264 CS = EmitRuntimeCallOrInvoke(SetJmp, Args); 2265 } 2266 CS.setAttributes(ReturnsTwiceAttr); 2267 return RValue::get(CS.getInstruction()); 2268 } 2269 break; 2270 } 2271 2272 case Builtin::BI__GetExceptionInfo: { 2273 if (llvm::GlobalVariable *GV = 2274 CGM.getCXXABI().getThrowInfo(FD->getParamDecl(0)->getType())) 2275 return RValue::get(llvm::ConstantExpr::getBitCast(GV, CGM.Int8PtrTy)); 2276 break; 2277 } 2278 2279 case Builtin::BI__builtin_coro_size: { 2280 auto & Context = getContext(); 2281 auto SizeTy = Context.getSizeType(); 2282 auto T = Builder.getIntNTy(Context.getTypeSize(SizeTy)); 2283 Value *F = CGM.getIntrinsic(Intrinsic::coro_size, T); 2284 return RValue::get(Builder.CreateCall(F)); 2285 } 2286 2287 case Builtin::BI__builtin_coro_id: 2288 return EmitCoroutineIntrinsic(E, Intrinsic::coro_id); 2289 case Builtin::BI__builtin_coro_promise: 2290 return EmitCoroutineIntrinsic(E, Intrinsic::coro_promise); 2291 case Builtin::BI__builtin_coro_resume: 2292 return EmitCoroutineIntrinsic(E, Intrinsic::coro_resume); 2293 case Builtin::BI__builtin_coro_frame: 2294 return EmitCoroutineIntrinsic(E, Intrinsic::coro_frame); 2295 case Builtin::BI__builtin_coro_free: 2296 return EmitCoroutineIntrinsic(E, Intrinsic::coro_free); 2297 case Builtin::BI__builtin_coro_destroy: 2298 return EmitCoroutineIntrinsic(E, Intrinsic::coro_destroy); 2299 case Builtin::BI__builtin_coro_done: 2300 return EmitCoroutineIntrinsic(E, Intrinsic::coro_done); 2301 case Builtin::BI__builtin_coro_alloc: 2302 return EmitCoroutineIntrinsic(E, Intrinsic::coro_alloc); 2303 case Builtin::BI__builtin_coro_begin: 2304 return EmitCoroutineIntrinsic(E, Intrinsic::coro_begin); 2305 case Builtin::BI__builtin_coro_end: 2306 return EmitCoroutineIntrinsic(E, Intrinsic::coro_end); 2307 case Builtin::BI__builtin_coro_suspend: 2308 return EmitCoroutineIntrinsic(E, Intrinsic::coro_suspend); 2309 case Builtin::BI__builtin_coro_param: 2310 return EmitCoroutineIntrinsic(E, Intrinsic::coro_param); 2311 2312 // OpenCL v2.0 s6.13.16.2, Built-in pipe read and write functions 2313 case Builtin::BIread_pipe: 2314 case Builtin::BIwrite_pipe: { 2315 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2316 *Arg1 = EmitScalarExpr(E->getArg(1)); 2317 CGOpenCLRuntime OpenCLRT(CGM); 2318 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2319 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2320 2321 // Type of the generic packet parameter. 2322 unsigned GenericAS = 2323 getContext().getTargetAddressSpace(LangAS::opencl_generic); 2324 llvm::Type *I8PTy = llvm::PointerType::get( 2325 llvm::Type::getInt8Ty(getLLVMContext()), GenericAS); 2326 2327 // Testing which overloaded version we should generate the call for. 2328 if (2U == E->getNumArgs()) { 2329 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_2" 2330 : "__write_pipe_2"; 2331 // Creating a generic function type to be able to call with any builtin or 2332 // user defined type. 2333 llvm::Type *ArgTys[] = {Arg0->getType(), I8PTy, Int32Ty, Int32Ty}; 2334 llvm::FunctionType *FTy = llvm::FunctionType::get( 2335 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2336 Value *BCast = Builder.CreatePointerCast(Arg1, I8PTy); 2337 return RValue::get( 2338 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2339 {Arg0, BCast, PacketSize, PacketAlign})); 2340 } else { 2341 assert(4 == E->getNumArgs() && 2342 "Illegal number of parameters to pipe function"); 2343 const char *Name = (BuiltinID == Builtin::BIread_pipe) ? "__read_pipe_4" 2344 : "__write_pipe_4"; 2345 2346 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, I8PTy, 2347 Int32Ty, Int32Ty}; 2348 Value *Arg2 = EmitScalarExpr(E->getArg(2)), 2349 *Arg3 = EmitScalarExpr(E->getArg(3)); 2350 llvm::FunctionType *FTy = llvm::FunctionType::get( 2351 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2352 Value *BCast = Builder.CreatePointerCast(Arg3, I8PTy); 2353 // We know the third argument is an integer type, but we may need to cast 2354 // it to i32. 2355 if (Arg2->getType() != Int32Ty) 2356 Arg2 = Builder.CreateZExtOrTrunc(Arg2, Int32Ty); 2357 return RValue::get(Builder.CreateCall( 2358 CGM.CreateRuntimeFunction(FTy, Name), 2359 {Arg0, Arg1, Arg2, BCast, PacketSize, PacketAlign})); 2360 } 2361 } 2362 // OpenCL v2.0 s6.13.16 ,s9.17.3.5 - Built-in pipe reserve read and write 2363 // functions 2364 case Builtin::BIreserve_read_pipe: 2365 case Builtin::BIreserve_write_pipe: 2366 case Builtin::BIwork_group_reserve_read_pipe: 2367 case Builtin::BIwork_group_reserve_write_pipe: 2368 case Builtin::BIsub_group_reserve_read_pipe: 2369 case Builtin::BIsub_group_reserve_write_pipe: { 2370 // Composing the mangled name for the function. 2371 const char *Name; 2372 if (BuiltinID == Builtin::BIreserve_read_pipe) 2373 Name = "__reserve_read_pipe"; 2374 else if (BuiltinID == Builtin::BIreserve_write_pipe) 2375 Name = "__reserve_write_pipe"; 2376 else if (BuiltinID == Builtin::BIwork_group_reserve_read_pipe) 2377 Name = "__work_group_reserve_read_pipe"; 2378 else if (BuiltinID == Builtin::BIwork_group_reserve_write_pipe) 2379 Name = "__work_group_reserve_write_pipe"; 2380 else if (BuiltinID == Builtin::BIsub_group_reserve_read_pipe) 2381 Name = "__sub_group_reserve_read_pipe"; 2382 else 2383 Name = "__sub_group_reserve_write_pipe"; 2384 2385 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2386 *Arg1 = EmitScalarExpr(E->getArg(1)); 2387 llvm::Type *ReservedIDTy = ConvertType(getContext().OCLReserveIDTy); 2388 CGOpenCLRuntime OpenCLRT(CGM); 2389 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2390 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2391 2392 // Building the generic function prototype. 2393 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty, Int32Ty}; 2394 llvm::FunctionType *FTy = llvm::FunctionType::get( 2395 ReservedIDTy, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2396 // We know the second argument is an integer type, but we may need to cast 2397 // it to i32. 2398 if (Arg1->getType() != Int32Ty) 2399 Arg1 = Builder.CreateZExtOrTrunc(Arg1, Int32Ty); 2400 return RValue::get( 2401 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2402 {Arg0, Arg1, PacketSize, PacketAlign})); 2403 } 2404 // OpenCL v2.0 s6.13.16, s9.17.3.5 - Built-in pipe commit read and write 2405 // functions 2406 case Builtin::BIcommit_read_pipe: 2407 case Builtin::BIcommit_write_pipe: 2408 case Builtin::BIwork_group_commit_read_pipe: 2409 case Builtin::BIwork_group_commit_write_pipe: 2410 case Builtin::BIsub_group_commit_read_pipe: 2411 case Builtin::BIsub_group_commit_write_pipe: { 2412 const char *Name; 2413 if (BuiltinID == Builtin::BIcommit_read_pipe) 2414 Name = "__commit_read_pipe"; 2415 else if (BuiltinID == Builtin::BIcommit_write_pipe) 2416 Name = "__commit_write_pipe"; 2417 else if (BuiltinID == Builtin::BIwork_group_commit_read_pipe) 2418 Name = "__work_group_commit_read_pipe"; 2419 else if (BuiltinID == Builtin::BIwork_group_commit_write_pipe) 2420 Name = "__work_group_commit_write_pipe"; 2421 else if (BuiltinID == Builtin::BIsub_group_commit_read_pipe) 2422 Name = "__sub_group_commit_read_pipe"; 2423 else 2424 Name = "__sub_group_commit_write_pipe"; 2425 2426 Value *Arg0 = EmitScalarExpr(E->getArg(0)), 2427 *Arg1 = EmitScalarExpr(E->getArg(1)); 2428 CGOpenCLRuntime OpenCLRT(CGM); 2429 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2430 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2431 2432 // Building the generic function prototype. 2433 llvm::Type *ArgTys[] = {Arg0->getType(), Arg1->getType(), Int32Ty, Int32Ty}; 2434 llvm::FunctionType *FTy = 2435 llvm::FunctionType::get(llvm::Type::getVoidTy(getLLVMContext()), 2436 llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2437 2438 return RValue::get( 2439 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2440 {Arg0, Arg1, PacketSize, PacketAlign})); 2441 } 2442 // OpenCL v2.0 s6.13.16.4 Built-in pipe query functions 2443 case Builtin::BIget_pipe_num_packets: 2444 case Builtin::BIget_pipe_max_packets: { 2445 const char *Name; 2446 if (BuiltinID == Builtin::BIget_pipe_num_packets) 2447 Name = "__get_pipe_num_packets"; 2448 else 2449 Name = "__get_pipe_max_packets"; 2450 2451 // Building the generic function prototype. 2452 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 2453 CGOpenCLRuntime OpenCLRT(CGM); 2454 Value *PacketSize = OpenCLRT.getPipeElemSize(E->getArg(0)); 2455 Value *PacketAlign = OpenCLRT.getPipeElemAlign(E->getArg(0)); 2456 llvm::Type *ArgTys[] = {Arg0->getType(), Int32Ty, Int32Ty}; 2457 llvm::FunctionType *FTy = llvm::FunctionType::get( 2458 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2459 2460 return RValue::get(Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2461 {Arg0, PacketSize, PacketAlign})); 2462 } 2463 2464 // OpenCL v2.0 s6.13.9 - Address space qualifier functions. 2465 case Builtin::BIto_global: 2466 case Builtin::BIto_local: 2467 case Builtin::BIto_private: { 2468 auto Arg0 = EmitScalarExpr(E->getArg(0)); 2469 auto NewArgT = llvm::PointerType::get(Int8Ty, 2470 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2471 auto NewRetT = llvm::PointerType::get(Int8Ty, 2472 CGM.getContext().getTargetAddressSpace( 2473 E->getType()->getPointeeType().getAddressSpace())); 2474 auto FTy = llvm::FunctionType::get(NewRetT, {NewArgT}, false); 2475 llvm::Value *NewArg; 2476 if (Arg0->getType()->getPointerAddressSpace() != 2477 NewArgT->getPointerAddressSpace()) 2478 NewArg = Builder.CreateAddrSpaceCast(Arg0, NewArgT); 2479 else 2480 NewArg = Builder.CreateBitOrPointerCast(Arg0, NewArgT); 2481 auto NewName = std::string("__") + E->getDirectCallee()->getName().str(); 2482 auto NewCall = 2483 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, NewName), {NewArg}); 2484 return RValue::get(Builder.CreateBitOrPointerCast(NewCall, 2485 ConvertType(E->getType()))); 2486 } 2487 2488 // OpenCL v2.0, s6.13.17 - Enqueue kernel function. 2489 // It contains four different overload formats specified in Table 6.13.17.1. 2490 case Builtin::BIenqueue_kernel: { 2491 StringRef Name; // Generated function call name 2492 unsigned NumArgs = E->getNumArgs(); 2493 2494 llvm::Type *QueueTy = ConvertType(getContext().OCLQueueTy); 2495 llvm::Type *RangeTy = ConvertType(getContext().OCLNDRangeTy); 2496 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 2497 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2498 2499 llvm::Value *Queue = EmitScalarExpr(E->getArg(0)); 2500 llvm::Value *Flags = EmitScalarExpr(E->getArg(1)); 2501 llvm::Value *Range = EmitScalarExpr(E->getArg(2)); 2502 2503 if (NumArgs == 4) { 2504 // The most basic form of the call with parameters: 2505 // queue_t, kernel_enqueue_flags_t, ndrange_t, block(void) 2506 Name = "__enqueue_kernel_basic"; 2507 llvm::Type *ArgTys[] = {QueueTy, Int32Ty, RangeTy, GenericVoidPtrTy}; 2508 llvm::FunctionType *FTy = llvm::FunctionType::get( 2509 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys, 4), false); 2510 2511 llvm::Value *Block = Builder.CreatePointerCast( 2512 EmitScalarExpr(E->getArg(3)), GenericVoidPtrTy); 2513 2514 return RValue::get(Builder.CreateCall( 2515 CGM.CreateRuntimeFunction(FTy, Name), {Queue, Flags, Range, Block})); 2516 } 2517 assert(NumArgs >= 5 && "Invalid enqueue_kernel signature"); 2518 2519 // Could have events and/or vaargs. 2520 if (E->getArg(3)->getType()->isBlockPointerType()) { 2521 // No events passed, but has variadic arguments. 2522 Name = "__enqueue_kernel_vaargs"; 2523 llvm::Value *Block = Builder.CreatePointerCast( 2524 EmitScalarExpr(E->getArg(3)), GenericVoidPtrTy); 2525 // Create a vector of the arguments, as well as a constant value to 2526 // express to the runtime the number of variadic arguments. 2527 std::vector<llvm::Value *> Args = {Queue, Flags, Range, Block, 2528 ConstantInt::get(IntTy, NumArgs - 4)}; 2529 std::vector<llvm::Type *> ArgTys = {QueueTy, IntTy, RangeTy, 2530 GenericVoidPtrTy, IntTy}; 2531 2532 // Each of the following arguments specifies the size of the corresponding 2533 // argument passed to the enqueued block. 2534 for (unsigned I = 4/*Position of the first size arg*/; I < NumArgs; ++I) 2535 Args.push_back( 2536 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(I)), SizeTy)); 2537 2538 llvm::FunctionType *FTy = llvm::FunctionType::get( 2539 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), true); 2540 return RValue::get( 2541 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2542 llvm::ArrayRef<llvm::Value *>(Args))); 2543 } 2544 // Any calls now have event arguments passed. 2545 if (NumArgs >= 7) { 2546 llvm::Type *EventTy = ConvertType(getContext().OCLClkEventTy); 2547 llvm::Type *EventPtrTy = EventTy->getPointerTo( 2548 CGM.getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2549 2550 llvm::Value *NumEvents = 2551 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(3)), Int32Ty); 2552 llvm::Value *EventList = 2553 E->getArg(4)->getType()->isArrayType() 2554 ? EmitArrayToPointerDecay(E->getArg(4)).getPointer() 2555 : EmitScalarExpr(E->getArg(4)); 2556 llvm::Value *ClkEvent = EmitScalarExpr(E->getArg(5)); 2557 // Convert to generic address space. 2558 EventList = Builder.CreatePointerCast(EventList, EventPtrTy); 2559 ClkEvent = Builder.CreatePointerCast(ClkEvent, EventPtrTy); 2560 llvm::Value *Block = Builder.CreatePointerCast( 2561 EmitScalarExpr(E->getArg(6)), GenericVoidPtrTy); 2562 2563 std::vector<llvm::Type *> ArgTys = { 2564 QueueTy, Int32Ty, RangeTy, Int32Ty, 2565 EventPtrTy, EventPtrTy, GenericVoidPtrTy}; 2566 2567 std::vector<llvm::Value *> Args = {Queue, Flags, Range, NumEvents, 2568 EventList, ClkEvent, Block}; 2569 2570 if (NumArgs == 7) { 2571 // Has events but no variadics. 2572 Name = "__enqueue_kernel_basic_events"; 2573 llvm::FunctionType *FTy = llvm::FunctionType::get( 2574 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), false); 2575 return RValue::get( 2576 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2577 llvm::ArrayRef<llvm::Value *>(Args))); 2578 } 2579 // Has event info and variadics 2580 // Pass the number of variadics to the runtime function too. 2581 Args.push_back(ConstantInt::get(Int32Ty, NumArgs - 7)); 2582 ArgTys.push_back(Int32Ty); 2583 Name = "__enqueue_kernel_events_vaargs"; 2584 2585 // Each of the following arguments specifies the size of the corresponding 2586 // argument passed to the enqueued block. 2587 for (unsigned I = 7/*Position of the first size arg*/; I < NumArgs; ++I) 2588 Args.push_back( 2589 Builder.CreateZExtOrTrunc(EmitScalarExpr(E->getArg(I)), SizeTy)); 2590 2591 llvm::FunctionType *FTy = llvm::FunctionType::get( 2592 Int32Ty, llvm::ArrayRef<llvm::Type *>(ArgTys), true); 2593 return RValue::get( 2594 Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name), 2595 llvm::ArrayRef<llvm::Value *>(Args))); 2596 } 2597 } 2598 // OpenCL v2.0 s6.13.17.6 - Kernel query functions need bitcast of block 2599 // parameter. 2600 case Builtin::BIget_kernel_work_group_size: { 2601 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 2602 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2603 Value *Arg = EmitScalarExpr(E->getArg(0)); 2604 Arg = Builder.CreatePointerCast(Arg, GenericVoidPtrTy); 2605 return RValue::get(Builder.CreateCall( 2606 CGM.CreateRuntimeFunction( 2607 llvm::FunctionType::get(IntTy, GenericVoidPtrTy, false), 2608 "__get_kernel_work_group_size_impl"), 2609 Arg)); 2610 } 2611 case Builtin::BIget_kernel_preferred_work_group_size_multiple: { 2612 llvm::Type *GenericVoidPtrTy = Builder.getInt8PtrTy( 2613 getContext().getTargetAddressSpace(LangAS::opencl_generic)); 2614 Value *Arg = EmitScalarExpr(E->getArg(0)); 2615 Arg = Builder.CreatePointerCast(Arg, GenericVoidPtrTy); 2616 return RValue::get(Builder.CreateCall( 2617 CGM.CreateRuntimeFunction( 2618 llvm::FunctionType::get(IntTy, GenericVoidPtrTy, false), 2619 "__get_kernel_preferred_work_group_multiple_impl"), 2620 Arg)); 2621 } 2622 case Builtin::BIprintf: 2623 if (getTarget().getTriple().isNVPTX()) 2624 return EmitNVPTXDevicePrintfCallExpr(E, ReturnValue); 2625 break; 2626 case Builtin::BI__builtin_canonicalize: 2627 case Builtin::BI__builtin_canonicalizef: 2628 case Builtin::BI__builtin_canonicalizel: 2629 return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::canonicalize)); 2630 2631 case Builtin::BI__builtin_thread_pointer: { 2632 if (!getContext().getTargetInfo().isTLSSupported()) 2633 CGM.ErrorUnsupported(E, "__builtin_thread_pointer"); 2634 // Fall through - it's already mapped to the intrinsic by GCCBuiltin. 2635 break; 2636 } 2637 case Builtin::BI__builtin_os_log_format: { 2638 assert(E->getNumArgs() >= 2 && 2639 "__builtin_os_log_format takes at least 2 arguments"); 2640 analyze_os_log::OSLogBufferLayout Layout; 2641 analyze_os_log::computeOSLogBufferLayout(CGM.getContext(), E, Layout); 2642 Address BufAddr = EmitPointerWithAlignment(E->getArg(0)); 2643 // Ignore argument 1, the format string. It is not currently used. 2644 CharUnits Offset; 2645 Builder.CreateStore( 2646 Builder.getInt8(Layout.getSummaryByte()), 2647 Builder.CreateConstByteGEP(BufAddr, Offset++, "summary")); 2648 Builder.CreateStore( 2649 Builder.getInt8(Layout.getNumArgsByte()), 2650 Builder.CreateConstByteGEP(BufAddr, Offset++, "numArgs")); 2651 2652 llvm::SmallVector<llvm::Value *, 4> RetainableOperands; 2653 for (const auto &Item : Layout.Items) { 2654 Builder.CreateStore( 2655 Builder.getInt8(Item.getDescriptorByte()), 2656 Builder.CreateConstByteGEP(BufAddr, Offset++, "argDescriptor")); 2657 Builder.CreateStore( 2658 Builder.getInt8(Item.getSizeByte()), 2659 Builder.CreateConstByteGEP(BufAddr, Offset++, "argSize")); 2660 Address Addr = Builder.CreateConstByteGEP(BufAddr, Offset); 2661 if (const Expr *TheExpr = Item.getExpr()) { 2662 Addr = Builder.CreateElementBitCast( 2663 Addr, ConvertTypeForMem(TheExpr->getType())); 2664 // Check if this is a retainable type. 2665 if (TheExpr->getType()->isObjCRetainableType()) { 2666 assert(getEvaluationKind(TheExpr->getType()) == TEK_Scalar && 2667 "Only scalar can be a ObjC retainable type"); 2668 llvm::Value *SV = EmitScalarExpr(TheExpr, /*Ignore*/ false); 2669 RValue RV = RValue::get(SV); 2670 LValue LV = MakeAddrLValue(Addr, TheExpr->getType()); 2671 EmitStoreThroughLValue(RV, LV); 2672 // Check if the object is constant, if not, save it in 2673 // RetainableOperands. 2674 if (!isa<Constant>(SV)) 2675 RetainableOperands.push_back(SV); 2676 } else { 2677 EmitAnyExprToMem(TheExpr, Addr, Qualifiers(), /*isInit*/ true); 2678 } 2679 } else { 2680 Addr = Builder.CreateElementBitCast(Addr, Int32Ty); 2681 Builder.CreateStore( 2682 Builder.getInt32(Item.getConstValue().getQuantity()), Addr); 2683 } 2684 Offset += Item.size(); 2685 } 2686 2687 // Push a clang.arc.use cleanup for each object in RetainableOperands. The 2688 // cleanup will cause the use to appear after the final log call, keeping 2689 // the object valid while it’s held in the log buffer. Note that if there’s 2690 // a release cleanup on the object, it will already be active; since 2691 // cleanups are emitted in reverse order, the use will occur before the 2692 // object is released. 2693 if (!RetainableOperands.empty() && getLangOpts().ObjCAutoRefCount && 2694 CGM.getCodeGenOpts().OptimizationLevel != 0) 2695 for (llvm::Value *object : RetainableOperands) 2696 pushFullExprCleanup<CallObjCArcUse>(getARCCleanupKind(), object); 2697 2698 return RValue::get(BufAddr.getPointer()); 2699 } 2700 2701 case Builtin::BI__builtin_os_log_format_buffer_size: { 2702 analyze_os_log::OSLogBufferLayout Layout; 2703 analyze_os_log::computeOSLogBufferLayout(CGM.getContext(), E, Layout); 2704 return RValue::get(ConstantInt::get(ConvertType(E->getType()), 2705 Layout.size().getQuantity())); 2706 } 2707 } 2708 2709 // If this is an alias for a lib function (e.g. __builtin_sin), emit 2710 // the call using the normal call path, but using the unmangled 2711 // version of the function name. 2712 if (getContext().BuiltinInfo.isLibFunction(BuiltinID)) 2713 return emitLibraryCall(*this, FD, E, 2714 CGM.getBuiltinLibFunction(FD, BuiltinID)); 2715 2716 // If this is a predefined lib function (e.g. malloc), emit the call 2717 // using exactly the normal call path. 2718 if (getContext().BuiltinInfo.isPredefinedLibFunction(BuiltinID)) 2719 return emitLibraryCall(*this, FD, E, 2720 cast<llvm::Constant>(EmitScalarExpr(E->getCallee()))); 2721 2722 // Check that a call to a target specific builtin has the correct target 2723 // features. 2724 // This is down here to avoid non-target specific builtins, however, if 2725 // generic builtins start to require generic target features then we 2726 // can move this up to the beginning of the function. 2727 checkTargetFeatures(E, FD); 2728 2729 // See if we have a target specific intrinsic. 2730 const char *Name = getContext().BuiltinInfo.getName(BuiltinID); 2731 Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; 2732 StringRef Prefix = 2733 llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch()); 2734 if (!Prefix.empty()) { 2735 IntrinsicID = Intrinsic::getIntrinsicForGCCBuiltin(Prefix.data(), Name); 2736 // NOTE we dont need to perform a compatibility flag check here since the 2737 // intrinsics are declared in Builtins*.def via LANGBUILTIN which filter the 2738 // MS builtins via ALL_MS_LANGUAGES and are filtered earlier. 2739 if (IntrinsicID == Intrinsic::not_intrinsic) 2740 IntrinsicID = Intrinsic::getIntrinsicForMSBuiltin(Prefix.data(), Name); 2741 } 2742 2743 if (IntrinsicID != Intrinsic::not_intrinsic) { 2744 SmallVector<Value*, 16> Args; 2745 2746 // Find out if any arguments are required to be integer constant 2747 // expressions. 2748 unsigned ICEArguments = 0; 2749 ASTContext::GetBuiltinTypeError Error; 2750 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 2751 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 2752 2753 Function *F = CGM.getIntrinsic(IntrinsicID); 2754 llvm::FunctionType *FTy = F->getFunctionType(); 2755 2756 for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) { 2757 Value *ArgValue; 2758 // If this is a normal argument, just emit it as a scalar. 2759 if ((ICEArguments & (1 << i)) == 0) { 2760 ArgValue = EmitScalarExpr(E->getArg(i)); 2761 } else { 2762 // If this is required to be a constant, constant fold it so that we 2763 // know that the generated intrinsic gets a ConstantInt. 2764 llvm::APSInt Result; 2765 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result,getContext()); 2766 assert(IsConst && "Constant arg isn't actually constant?"); 2767 (void)IsConst; 2768 ArgValue = llvm::ConstantInt::get(getLLVMContext(), Result); 2769 } 2770 2771 // If the intrinsic arg type is different from the builtin arg type 2772 // we need to do a bit cast. 2773 llvm::Type *PTy = FTy->getParamType(i); 2774 if (PTy != ArgValue->getType()) { 2775 assert(PTy->canLosslesslyBitCastTo(FTy->getParamType(i)) && 2776 "Must be able to losslessly bit cast to param"); 2777 ArgValue = Builder.CreateBitCast(ArgValue, PTy); 2778 } 2779 2780 Args.push_back(ArgValue); 2781 } 2782 2783 Value *V = Builder.CreateCall(F, Args); 2784 QualType BuiltinRetType = E->getType(); 2785 2786 llvm::Type *RetTy = VoidTy; 2787 if (!BuiltinRetType->isVoidType()) 2788 RetTy = ConvertType(BuiltinRetType); 2789 2790 if (RetTy != V->getType()) { 2791 assert(V->getType()->canLosslesslyBitCastTo(RetTy) && 2792 "Must be able to losslessly bit cast result type"); 2793 V = Builder.CreateBitCast(V, RetTy); 2794 } 2795 2796 return RValue::get(V); 2797 } 2798 2799 // See if we have a target specific builtin that needs to be lowered. 2800 if (Value *V = EmitTargetBuiltinExpr(BuiltinID, E)) 2801 return RValue::get(V); 2802 2803 ErrorUnsupported(E, "builtin function"); 2804 2805 // Unknown builtin, for now just dump it out and return undef. 2806 return GetUndefRValue(E->getType()); 2807 } 2808 2809 static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF, 2810 unsigned BuiltinID, const CallExpr *E, 2811 llvm::Triple::ArchType Arch) { 2812 switch (Arch) { 2813 case llvm::Triple::arm: 2814 case llvm::Triple::armeb: 2815 case llvm::Triple::thumb: 2816 case llvm::Triple::thumbeb: 2817 return CGF->EmitARMBuiltinExpr(BuiltinID, E); 2818 case llvm::Triple::aarch64: 2819 case llvm::Triple::aarch64_be: 2820 return CGF->EmitAArch64BuiltinExpr(BuiltinID, E); 2821 case llvm::Triple::x86: 2822 case llvm::Triple::x86_64: 2823 return CGF->EmitX86BuiltinExpr(BuiltinID, E); 2824 case llvm::Triple::ppc: 2825 case llvm::Triple::ppc64: 2826 case llvm::Triple::ppc64le: 2827 return CGF->EmitPPCBuiltinExpr(BuiltinID, E); 2828 case llvm::Triple::r600: 2829 case llvm::Triple::amdgcn: 2830 return CGF->EmitAMDGPUBuiltinExpr(BuiltinID, E); 2831 case llvm::Triple::systemz: 2832 return CGF->EmitSystemZBuiltinExpr(BuiltinID, E); 2833 case llvm::Triple::nvptx: 2834 case llvm::Triple::nvptx64: 2835 return CGF->EmitNVPTXBuiltinExpr(BuiltinID, E); 2836 case llvm::Triple::wasm32: 2837 case llvm::Triple::wasm64: 2838 return CGF->EmitWebAssemblyBuiltinExpr(BuiltinID, E); 2839 default: 2840 return nullptr; 2841 } 2842 } 2843 2844 Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID, 2845 const CallExpr *E) { 2846 if (getContext().BuiltinInfo.isAuxBuiltinID(BuiltinID)) { 2847 assert(getContext().getAuxTargetInfo() && "Missing aux target info"); 2848 return EmitTargetArchBuiltinExpr( 2849 this, getContext().BuiltinInfo.getAuxBuiltinID(BuiltinID), E, 2850 getContext().getAuxTargetInfo()->getTriple().getArch()); 2851 } 2852 2853 return EmitTargetArchBuiltinExpr(this, BuiltinID, E, 2854 getTarget().getTriple().getArch()); 2855 } 2856 2857 static llvm::VectorType *GetNeonType(CodeGenFunction *CGF, 2858 NeonTypeFlags TypeFlags, 2859 bool V1Ty=false) { 2860 int IsQuad = TypeFlags.isQuad(); 2861 switch (TypeFlags.getEltType()) { 2862 case NeonTypeFlags::Int8: 2863 case NeonTypeFlags::Poly8: 2864 return llvm::VectorType::get(CGF->Int8Ty, V1Ty ? 1 : (8 << IsQuad)); 2865 case NeonTypeFlags::Int16: 2866 case NeonTypeFlags::Poly16: 2867 case NeonTypeFlags::Float16: 2868 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 2869 case NeonTypeFlags::Int32: 2870 return llvm::VectorType::get(CGF->Int32Ty, V1Ty ? 1 : (2 << IsQuad)); 2871 case NeonTypeFlags::Int64: 2872 case NeonTypeFlags::Poly64: 2873 return llvm::VectorType::get(CGF->Int64Ty, V1Ty ? 1 : (1 << IsQuad)); 2874 case NeonTypeFlags::Poly128: 2875 // FIXME: i128 and f128 doesn't get fully support in Clang and llvm. 2876 // There is a lot of i128 and f128 API missing. 2877 // so we use v16i8 to represent poly128 and get pattern matched. 2878 return llvm::VectorType::get(CGF->Int8Ty, 16); 2879 case NeonTypeFlags::Float32: 2880 return llvm::VectorType::get(CGF->FloatTy, V1Ty ? 1 : (2 << IsQuad)); 2881 case NeonTypeFlags::Float64: 2882 return llvm::VectorType::get(CGF->DoubleTy, V1Ty ? 1 : (1 << IsQuad)); 2883 } 2884 llvm_unreachable("Unknown vector element type!"); 2885 } 2886 2887 static llvm::VectorType *GetFloatNeonType(CodeGenFunction *CGF, 2888 NeonTypeFlags IntTypeFlags) { 2889 int IsQuad = IntTypeFlags.isQuad(); 2890 switch (IntTypeFlags.getEltType()) { 2891 case NeonTypeFlags::Int32: 2892 return llvm::VectorType::get(CGF->FloatTy, (2 << IsQuad)); 2893 case NeonTypeFlags::Int64: 2894 return llvm::VectorType::get(CGF->DoubleTy, (1 << IsQuad)); 2895 default: 2896 llvm_unreachable("Type can't be converted to floating-point!"); 2897 } 2898 } 2899 2900 Value *CodeGenFunction::EmitNeonSplat(Value *V, Constant *C) { 2901 unsigned nElts = V->getType()->getVectorNumElements(); 2902 Value* SV = llvm::ConstantVector::getSplat(nElts, C); 2903 return Builder.CreateShuffleVector(V, V, SV, "lane"); 2904 } 2905 2906 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, 2907 const char *name, 2908 unsigned shift, bool rightshift) { 2909 unsigned j = 0; 2910 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 2911 ai != ae; ++ai, ++j) 2912 if (shift > 0 && shift == j) 2913 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); 2914 else 2915 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); 2916 2917 return Builder.CreateCall(F, Ops, name); 2918 } 2919 2920 Value *CodeGenFunction::EmitNeonShiftVector(Value *V, llvm::Type *Ty, 2921 bool neg) { 2922 int SV = cast<ConstantInt>(V)->getSExtValue(); 2923 return ConstantInt::get(Ty, neg ? -SV : SV); 2924 } 2925 2926 // \brief Right-shift a vector by a constant. 2927 Value *CodeGenFunction::EmitNeonRShiftImm(Value *Vec, Value *Shift, 2928 llvm::Type *Ty, bool usgn, 2929 const char *name) { 2930 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 2931 2932 int ShiftAmt = cast<ConstantInt>(Shift)->getSExtValue(); 2933 int EltSize = VTy->getScalarSizeInBits(); 2934 2935 Vec = Builder.CreateBitCast(Vec, Ty); 2936 2937 // lshr/ashr are undefined when the shift amount is equal to the vector 2938 // element size. 2939 if (ShiftAmt == EltSize) { 2940 if (usgn) { 2941 // Right-shifting an unsigned value by its size yields 0. 2942 return llvm::ConstantAggregateZero::get(VTy); 2943 } else { 2944 // Right-shifting a signed value by its size is equivalent 2945 // to a shift of size-1. 2946 --ShiftAmt; 2947 Shift = ConstantInt::get(VTy->getElementType(), ShiftAmt); 2948 } 2949 } 2950 2951 Shift = EmitNeonShiftVector(Shift, Ty, false); 2952 if (usgn) 2953 return Builder.CreateLShr(Vec, Shift, name); 2954 else 2955 return Builder.CreateAShr(Vec, Shift, name); 2956 } 2957 2958 enum { 2959 AddRetType = (1 << 0), 2960 Add1ArgType = (1 << 1), 2961 Add2ArgTypes = (1 << 2), 2962 2963 VectorizeRetType = (1 << 3), 2964 VectorizeArgTypes = (1 << 4), 2965 2966 InventFloatType = (1 << 5), 2967 UnsignedAlts = (1 << 6), 2968 2969 Use64BitVectors = (1 << 7), 2970 Use128BitVectors = (1 << 8), 2971 2972 Vectorize1ArgType = Add1ArgType | VectorizeArgTypes, 2973 VectorRet = AddRetType | VectorizeRetType, 2974 VectorRetGetArgs01 = 2975 AddRetType | Add2ArgTypes | VectorizeRetType | VectorizeArgTypes, 2976 FpCmpzModifiers = 2977 AddRetType | VectorizeRetType | Add1ArgType | InventFloatType 2978 }; 2979 2980 namespace { 2981 struct NeonIntrinsicInfo { 2982 const char *NameHint; 2983 unsigned BuiltinID; 2984 unsigned LLVMIntrinsic; 2985 unsigned AltLLVMIntrinsic; 2986 unsigned TypeModifier; 2987 2988 bool operator<(unsigned RHSBuiltinID) const { 2989 return BuiltinID < RHSBuiltinID; 2990 } 2991 bool operator<(const NeonIntrinsicInfo &TE) const { 2992 return BuiltinID < TE.BuiltinID; 2993 } 2994 }; 2995 } // end anonymous namespace 2996 2997 #define NEONMAP0(NameBase) \ 2998 { #NameBase, NEON::BI__builtin_neon_ ## NameBase, 0, 0, 0 } 2999 3000 #define NEONMAP1(NameBase, LLVMIntrinsic, TypeModifier) \ 3001 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 3002 Intrinsic::LLVMIntrinsic, 0, TypeModifier } 3003 3004 #define NEONMAP2(NameBase, LLVMIntrinsic, AltLLVMIntrinsic, TypeModifier) \ 3005 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 3006 Intrinsic::LLVMIntrinsic, Intrinsic::AltLLVMIntrinsic, \ 3007 TypeModifier } 3008 3009 static const NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = { 3010 NEONMAP2(vabd_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 3011 NEONMAP2(vabdq_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 3012 NEONMAP1(vabs_v, arm_neon_vabs, 0), 3013 NEONMAP1(vabsq_v, arm_neon_vabs, 0), 3014 NEONMAP0(vaddhn_v), 3015 NEONMAP1(vaesdq_v, arm_neon_aesd, 0), 3016 NEONMAP1(vaeseq_v, arm_neon_aese, 0), 3017 NEONMAP1(vaesimcq_v, arm_neon_aesimc, 0), 3018 NEONMAP1(vaesmcq_v, arm_neon_aesmc, 0), 3019 NEONMAP1(vbsl_v, arm_neon_vbsl, AddRetType), 3020 NEONMAP1(vbslq_v, arm_neon_vbsl, AddRetType), 3021 NEONMAP1(vcage_v, arm_neon_vacge, 0), 3022 NEONMAP1(vcageq_v, arm_neon_vacge, 0), 3023 NEONMAP1(vcagt_v, arm_neon_vacgt, 0), 3024 NEONMAP1(vcagtq_v, arm_neon_vacgt, 0), 3025 NEONMAP1(vcale_v, arm_neon_vacge, 0), 3026 NEONMAP1(vcaleq_v, arm_neon_vacge, 0), 3027 NEONMAP1(vcalt_v, arm_neon_vacgt, 0), 3028 NEONMAP1(vcaltq_v, arm_neon_vacgt, 0), 3029 NEONMAP1(vcls_v, arm_neon_vcls, Add1ArgType), 3030 NEONMAP1(vclsq_v, arm_neon_vcls, Add1ArgType), 3031 NEONMAP1(vclz_v, ctlz, Add1ArgType), 3032 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 3033 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 3034 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 3035 NEONMAP1(vcvt_f16_f32, arm_neon_vcvtfp2hf, 0), 3036 NEONMAP1(vcvt_f32_f16, arm_neon_vcvthf2fp, 0), 3037 NEONMAP0(vcvt_f32_v), 3038 NEONMAP2(vcvt_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3039 NEONMAP1(vcvt_n_s32_v, arm_neon_vcvtfp2fxs, 0), 3040 NEONMAP1(vcvt_n_s64_v, arm_neon_vcvtfp2fxs, 0), 3041 NEONMAP1(vcvt_n_u32_v, arm_neon_vcvtfp2fxu, 0), 3042 NEONMAP1(vcvt_n_u64_v, arm_neon_vcvtfp2fxu, 0), 3043 NEONMAP0(vcvt_s32_v), 3044 NEONMAP0(vcvt_s64_v), 3045 NEONMAP0(vcvt_u32_v), 3046 NEONMAP0(vcvt_u64_v), 3047 NEONMAP1(vcvta_s32_v, arm_neon_vcvtas, 0), 3048 NEONMAP1(vcvta_s64_v, arm_neon_vcvtas, 0), 3049 NEONMAP1(vcvta_u32_v, arm_neon_vcvtau, 0), 3050 NEONMAP1(vcvta_u64_v, arm_neon_vcvtau, 0), 3051 NEONMAP1(vcvtaq_s32_v, arm_neon_vcvtas, 0), 3052 NEONMAP1(vcvtaq_s64_v, arm_neon_vcvtas, 0), 3053 NEONMAP1(vcvtaq_u32_v, arm_neon_vcvtau, 0), 3054 NEONMAP1(vcvtaq_u64_v, arm_neon_vcvtau, 0), 3055 NEONMAP1(vcvtm_s32_v, arm_neon_vcvtms, 0), 3056 NEONMAP1(vcvtm_s64_v, arm_neon_vcvtms, 0), 3057 NEONMAP1(vcvtm_u32_v, arm_neon_vcvtmu, 0), 3058 NEONMAP1(vcvtm_u64_v, arm_neon_vcvtmu, 0), 3059 NEONMAP1(vcvtmq_s32_v, arm_neon_vcvtms, 0), 3060 NEONMAP1(vcvtmq_s64_v, arm_neon_vcvtms, 0), 3061 NEONMAP1(vcvtmq_u32_v, arm_neon_vcvtmu, 0), 3062 NEONMAP1(vcvtmq_u64_v, arm_neon_vcvtmu, 0), 3063 NEONMAP1(vcvtn_s32_v, arm_neon_vcvtns, 0), 3064 NEONMAP1(vcvtn_s64_v, arm_neon_vcvtns, 0), 3065 NEONMAP1(vcvtn_u32_v, arm_neon_vcvtnu, 0), 3066 NEONMAP1(vcvtn_u64_v, arm_neon_vcvtnu, 0), 3067 NEONMAP1(vcvtnq_s32_v, arm_neon_vcvtns, 0), 3068 NEONMAP1(vcvtnq_s64_v, arm_neon_vcvtns, 0), 3069 NEONMAP1(vcvtnq_u32_v, arm_neon_vcvtnu, 0), 3070 NEONMAP1(vcvtnq_u64_v, arm_neon_vcvtnu, 0), 3071 NEONMAP1(vcvtp_s32_v, arm_neon_vcvtps, 0), 3072 NEONMAP1(vcvtp_s64_v, arm_neon_vcvtps, 0), 3073 NEONMAP1(vcvtp_u32_v, arm_neon_vcvtpu, 0), 3074 NEONMAP1(vcvtp_u64_v, arm_neon_vcvtpu, 0), 3075 NEONMAP1(vcvtpq_s32_v, arm_neon_vcvtps, 0), 3076 NEONMAP1(vcvtpq_s64_v, arm_neon_vcvtps, 0), 3077 NEONMAP1(vcvtpq_u32_v, arm_neon_vcvtpu, 0), 3078 NEONMAP1(vcvtpq_u64_v, arm_neon_vcvtpu, 0), 3079 NEONMAP0(vcvtq_f32_v), 3080 NEONMAP2(vcvtq_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 3081 NEONMAP1(vcvtq_n_s32_v, arm_neon_vcvtfp2fxs, 0), 3082 NEONMAP1(vcvtq_n_s64_v, arm_neon_vcvtfp2fxs, 0), 3083 NEONMAP1(vcvtq_n_u32_v, arm_neon_vcvtfp2fxu, 0), 3084 NEONMAP1(vcvtq_n_u64_v, arm_neon_vcvtfp2fxu, 0), 3085 NEONMAP0(vcvtq_s32_v), 3086 NEONMAP0(vcvtq_s64_v), 3087 NEONMAP0(vcvtq_u32_v), 3088 NEONMAP0(vcvtq_u64_v), 3089 NEONMAP0(vext_v), 3090 NEONMAP0(vextq_v), 3091 NEONMAP0(vfma_v), 3092 NEONMAP0(vfmaq_v), 3093 NEONMAP2(vhadd_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 3094 NEONMAP2(vhaddq_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 3095 NEONMAP2(vhsub_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 3096 NEONMAP2(vhsubq_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 3097 NEONMAP0(vld1_dup_v), 3098 NEONMAP1(vld1_v, arm_neon_vld1, 0), 3099 NEONMAP0(vld1q_dup_v), 3100 NEONMAP1(vld1q_v, arm_neon_vld1, 0), 3101 NEONMAP1(vld2_lane_v, arm_neon_vld2lane, 0), 3102 NEONMAP1(vld2_v, arm_neon_vld2, 0), 3103 NEONMAP1(vld2q_lane_v, arm_neon_vld2lane, 0), 3104 NEONMAP1(vld2q_v, arm_neon_vld2, 0), 3105 NEONMAP1(vld3_lane_v, arm_neon_vld3lane, 0), 3106 NEONMAP1(vld3_v, arm_neon_vld3, 0), 3107 NEONMAP1(vld3q_lane_v, arm_neon_vld3lane, 0), 3108 NEONMAP1(vld3q_v, arm_neon_vld3, 0), 3109 NEONMAP1(vld4_lane_v, arm_neon_vld4lane, 0), 3110 NEONMAP1(vld4_v, arm_neon_vld4, 0), 3111 NEONMAP1(vld4q_lane_v, arm_neon_vld4lane, 0), 3112 NEONMAP1(vld4q_v, arm_neon_vld4, 0), 3113 NEONMAP2(vmax_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 3114 NEONMAP1(vmaxnm_v, arm_neon_vmaxnm, Add1ArgType), 3115 NEONMAP1(vmaxnmq_v, arm_neon_vmaxnm, Add1ArgType), 3116 NEONMAP2(vmaxq_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 3117 NEONMAP2(vmin_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 3118 NEONMAP1(vminnm_v, arm_neon_vminnm, Add1ArgType), 3119 NEONMAP1(vminnmq_v, arm_neon_vminnm, Add1ArgType), 3120 NEONMAP2(vminq_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 3121 NEONMAP0(vmovl_v), 3122 NEONMAP0(vmovn_v), 3123 NEONMAP1(vmul_v, arm_neon_vmulp, Add1ArgType), 3124 NEONMAP0(vmull_v), 3125 NEONMAP1(vmulq_v, arm_neon_vmulp, Add1ArgType), 3126 NEONMAP2(vpadal_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 3127 NEONMAP2(vpadalq_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 3128 NEONMAP1(vpadd_v, arm_neon_vpadd, Add1ArgType), 3129 NEONMAP2(vpaddl_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 3130 NEONMAP2(vpaddlq_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 3131 NEONMAP1(vpaddq_v, arm_neon_vpadd, Add1ArgType), 3132 NEONMAP2(vpmax_v, arm_neon_vpmaxu, arm_neon_vpmaxs, Add1ArgType | UnsignedAlts), 3133 NEONMAP2(vpmin_v, arm_neon_vpminu, arm_neon_vpmins, Add1ArgType | UnsignedAlts), 3134 NEONMAP1(vqabs_v, arm_neon_vqabs, Add1ArgType), 3135 NEONMAP1(vqabsq_v, arm_neon_vqabs, Add1ArgType), 3136 NEONMAP2(vqadd_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 3137 NEONMAP2(vqaddq_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 3138 NEONMAP2(vqdmlal_v, arm_neon_vqdmull, arm_neon_vqadds, 0), 3139 NEONMAP2(vqdmlsl_v, arm_neon_vqdmull, arm_neon_vqsubs, 0), 3140 NEONMAP1(vqdmulh_v, arm_neon_vqdmulh, Add1ArgType), 3141 NEONMAP1(vqdmulhq_v, arm_neon_vqdmulh, Add1ArgType), 3142 NEONMAP1(vqdmull_v, arm_neon_vqdmull, Add1ArgType), 3143 NEONMAP2(vqmovn_v, arm_neon_vqmovnu, arm_neon_vqmovns, Add1ArgType | UnsignedAlts), 3144 NEONMAP1(vqmovun_v, arm_neon_vqmovnsu, Add1ArgType), 3145 NEONMAP1(vqneg_v, arm_neon_vqneg, Add1ArgType), 3146 NEONMAP1(vqnegq_v, arm_neon_vqneg, Add1ArgType), 3147 NEONMAP1(vqrdmulh_v, arm_neon_vqrdmulh, Add1ArgType), 3148 NEONMAP1(vqrdmulhq_v, arm_neon_vqrdmulh, Add1ArgType), 3149 NEONMAP2(vqrshl_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 3150 NEONMAP2(vqrshlq_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 3151 NEONMAP2(vqshl_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 3152 NEONMAP2(vqshl_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 3153 NEONMAP2(vqshlq_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 3154 NEONMAP2(vqshlq_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 3155 NEONMAP1(vqshlu_n_v, arm_neon_vqshiftsu, 0), 3156 NEONMAP1(vqshluq_n_v, arm_neon_vqshiftsu, 0), 3157 NEONMAP2(vqsub_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 3158 NEONMAP2(vqsubq_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 3159 NEONMAP1(vraddhn_v, arm_neon_vraddhn, Add1ArgType), 3160 NEONMAP2(vrecpe_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 3161 NEONMAP2(vrecpeq_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 3162 NEONMAP1(vrecps_v, arm_neon_vrecps, Add1ArgType), 3163 NEONMAP1(vrecpsq_v, arm_neon_vrecps, Add1ArgType), 3164 NEONMAP2(vrhadd_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 3165 NEONMAP2(vrhaddq_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 3166 NEONMAP1(vrnd_v, arm_neon_vrintz, Add1ArgType), 3167 NEONMAP1(vrnda_v, arm_neon_vrinta, Add1ArgType), 3168 NEONMAP1(vrndaq_v, arm_neon_vrinta, Add1ArgType), 3169 NEONMAP1(vrndm_v, arm_neon_vrintm, Add1ArgType), 3170 NEONMAP1(vrndmq_v, arm_neon_vrintm, Add1ArgType), 3171 NEONMAP1(vrndn_v, arm_neon_vrintn, Add1ArgType), 3172 NEONMAP1(vrndnq_v, arm_neon_vrintn, Add1ArgType), 3173 NEONMAP1(vrndp_v, arm_neon_vrintp, Add1ArgType), 3174 NEONMAP1(vrndpq_v, arm_neon_vrintp, Add1ArgType), 3175 NEONMAP1(vrndq_v, arm_neon_vrintz, Add1ArgType), 3176 NEONMAP1(vrndx_v, arm_neon_vrintx, Add1ArgType), 3177 NEONMAP1(vrndxq_v, arm_neon_vrintx, Add1ArgType), 3178 NEONMAP2(vrshl_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 3179 NEONMAP2(vrshlq_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 3180 NEONMAP2(vrshr_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 3181 NEONMAP2(vrshrq_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 3182 NEONMAP2(vrsqrte_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 3183 NEONMAP2(vrsqrteq_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 3184 NEONMAP1(vrsqrts_v, arm_neon_vrsqrts, Add1ArgType), 3185 NEONMAP1(vrsqrtsq_v, arm_neon_vrsqrts, Add1ArgType), 3186 NEONMAP1(vrsubhn_v, arm_neon_vrsubhn, Add1ArgType), 3187 NEONMAP1(vsha1su0q_v, arm_neon_sha1su0, 0), 3188 NEONMAP1(vsha1su1q_v, arm_neon_sha1su1, 0), 3189 NEONMAP1(vsha256h2q_v, arm_neon_sha256h2, 0), 3190 NEONMAP1(vsha256hq_v, arm_neon_sha256h, 0), 3191 NEONMAP1(vsha256su0q_v, arm_neon_sha256su0, 0), 3192 NEONMAP1(vsha256su1q_v, arm_neon_sha256su1, 0), 3193 NEONMAP0(vshl_n_v), 3194 NEONMAP2(vshl_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 3195 NEONMAP0(vshll_n_v), 3196 NEONMAP0(vshlq_n_v), 3197 NEONMAP2(vshlq_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 3198 NEONMAP0(vshr_n_v), 3199 NEONMAP0(vshrn_n_v), 3200 NEONMAP0(vshrq_n_v), 3201 NEONMAP1(vst1_v, arm_neon_vst1, 0), 3202 NEONMAP1(vst1q_v, arm_neon_vst1, 0), 3203 NEONMAP1(vst2_lane_v, arm_neon_vst2lane, 0), 3204 NEONMAP1(vst2_v, arm_neon_vst2, 0), 3205 NEONMAP1(vst2q_lane_v, arm_neon_vst2lane, 0), 3206 NEONMAP1(vst2q_v, arm_neon_vst2, 0), 3207 NEONMAP1(vst3_lane_v, arm_neon_vst3lane, 0), 3208 NEONMAP1(vst3_v, arm_neon_vst3, 0), 3209 NEONMAP1(vst3q_lane_v, arm_neon_vst3lane, 0), 3210 NEONMAP1(vst3q_v, arm_neon_vst3, 0), 3211 NEONMAP1(vst4_lane_v, arm_neon_vst4lane, 0), 3212 NEONMAP1(vst4_v, arm_neon_vst4, 0), 3213 NEONMAP1(vst4q_lane_v, arm_neon_vst4lane, 0), 3214 NEONMAP1(vst4q_v, arm_neon_vst4, 0), 3215 NEONMAP0(vsubhn_v), 3216 NEONMAP0(vtrn_v), 3217 NEONMAP0(vtrnq_v), 3218 NEONMAP0(vtst_v), 3219 NEONMAP0(vtstq_v), 3220 NEONMAP0(vuzp_v), 3221 NEONMAP0(vuzpq_v), 3222 NEONMAP0(vzip_v), 3223 NEONMAP0(vzipq_v) 3224 }; 3225 3226 static const NeonIntrinsicInfo AArch64SIMDIntrinsicMap[] = { 3227 NEONMAP1(vabs_v, aarch64_neon_abs, 0), 3228 NEONMAP1(vabsq_v, aarch64_neon_abs, 0), 3229 NEONMAP0(vaddhn_v), 3230 NEONMAP1(vaesdq_v, aarch64_crypto_aesd, 0), 3231 NEONMAP1(vaeseq_v, aarch64_crypto_aese, 0), 3232 NEONMAP1(vaesimcq_v, aarch64_crypto_aesimc, 0), 3233 NEONMAP1(vaesmcq_v, aarch64_crypto_aesmc, 0), 3234 NEONMAP1(vcage_v, aarch64_neon_facge, 0), 3235 NEONMAP1(vcageq_v, aarch64_neon_facge, 0), 3236 NEONMAP1(vcagt_v, aarch64_neon_facgt, 0), 3237 NEONMAP1(vcagtq_v, aarch64_neon_facgt, 0), 3238 NEONMAP1(vcale_v, aarch64_neon_facge, 0), 3239 NEONMAP1(vcaleq_v, aarch64_neon_facge, 0), 3240 NEONMAP1(vcalt_v, aarch64_neon_facgt, 0), 3241 NEONMAP1(vcaltq_v, aarch64_neon_facgt, 0), 3242 NEONMAP1(vcls_v, aarch64_neon_cls, Add1ArgType), 3243 NEONMAP1(vclsq_v, aarch64_neon_cls, Add1ArgType), 3244 NEONMAP1(vclz_v, ctlz, Add1ArgType), 3245 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 3246 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 3247 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 3248 NEONMAP1(vcvt_f16_f32, aarch64_neon_vcvtfp2hf, 0), 3249 NEONMAP1(vcvt_f32_f16, aarch64_neon_vcvthf2fp, 0), 3250 NEONMAP0(vcvt_f32_v), 3251 NEONMAP2(vcvt_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3252 NEONMAP2(vcvt_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3253 NEONMAP1(vcvt_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 3254 NEONMAP1(vcvt_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 3255 NEONMAP1(vcvt_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 3256 NEONMAP1(vcvt_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 3257 NEONMAP0(vcvtq_f32_v), 3258 NEONMAP2(vcvtq_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3259 NEONMAP2(vcvtq_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 3260 NEONMAP1(vcvtq_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 3261 NEONMAP1(vcvtq_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 3262 NEONMAP1(vcvtq_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 3263 NEONMAP1(vcvtq_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 3264 NEONMAP1(vcvtx_f32_v, aarch64_neon_fcvtxn, AddRetType | Add1ArgType), 3265 NEONMAP0(vext_v), 3266 NEONMAP0(vextq_v), 3267 NEONMAP0(vfma_v), 3268 NEONMAP0(vfmaq_v), 3269 NEONMAP2(vhadd_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 3270 NEONMAP2(vhaddq_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 3271 NEONMAP2(vhsub_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 3272 NEONMAP2(vhsubq_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 3273 NEONMAP0(vmovl_v), 3274 NEONMAP0(vmovn_v), 3275 NEONMAP1(vmul_v, aarch64_neon_pmul, Add1ArgType), 3276 NEONMAP1(vmulq_v, aarch64_neon_pmul, Add1ArgType), 3277 NEONMAP1(vpadd_v, aarch64_neon_addp, Add1ArgType), 3278 NEONMAP2(vpaddl_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 3279 NEONMAP2(vpaddlq_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 3280 NEONMAP1(vpaddq_v, aarch64_neon_addp, Add1ArgType), 3281 NEONMAP1(vqabs_v, aarch64_neon_sqabs, Add1ArgType), 3282 NEONMAP1(vqabsq_v, aarch64_neon_sqabs, Add1ArgType), 3283 NEONMAP2(vqadd_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 3284 NEONMAP2(vqaddq_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 3285 NEONMAP2(vqdmlal_v, aarch64_neon_sqdmull, aarch64_neon_sqadd, 0), 3286 NEONMAP2(vqdmlsl_v, aarch64_neon_sqdmull, aarch64_neon_sqsub, 0), 3287 NEONMAP1(vqdmulh_v, aarch64_neon_sqdmulh, Add1ArgType), 3288 NEONMAP1(vqdmulhq_v, aarch64_neon_sqdmulh, Add1ArgType), 3289 NEONMAP1(vqdmull_v, aarch64_neon_sqdmull, Add1ArgType), 3290 NEONMAP2(vqmovn_v, aarch64_neon_uqxtn, aarch64_neon_sqxtn, Add1ArgType | UnsignedAlts), 3291 NEONMAP1(vqmovun_v, aarch64_neon_sqxtun, Add1ArgType), 3292 NEONMAP1(vqneg_v, aarch64_neon_sqneg, Add1ArgType), 3293 NEONMAP1(vqnegq_v, aarch64_neon_sqneg, Add1ArgType), 3294 NEONMAP1(vqrdmulh_v, aarch64_neon_sqrdmulh, Add1ArgType), 3295 NEONMAP1(vqrdmulhq_v, aarch64_neon_sqrdmulh, Add1ArgType), 3296 NEONMAP2(vqrshl_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 3297 NEONMAP2(vqrshlq_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 3298 NEONMAP2(vqshl_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl, UnsignedAlts), 3299 NEONMAP2(vqshl_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 3300 NEONMAP2(vqshlq_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl,UnsignedAlts), 3301 NEONMAP2(vqshlq_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 3302 NEONMAP1(vqshlu_n_v, aarch64_neon_sqshlu, 0), 3303 NEONMAP1(vqshluq_n_v, aarch64_neon_sqshlu, 0), 3304 NEONMAP2(vqsub_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 3305 NEONMAP2(vqsubq_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 3306 NEONMAP1(vraddhn_v, aarch64_neon_raddhn, Add1ArgType), 3307 NEONMAP2(vrecpe_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 3308 NEONMAP2(vrecpeq_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 3309 NEONMAP1(vrecps_v, aarch64_neon_frecps, Add1ArgType), 3310 NEONMAP1(vrecpsq_v, aarch64_neon_frecps, Add1ArgType), 3311 NEONMAP2(vrhadd_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 3312 NEONMAP2(vrhaddq_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 3313 NEONMAP2(vrshl_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 3314 NEONMAP2(vrshlq_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 3315 NEONMAP2(vrshr_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 3316 NEONMAP2(vrshrq_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 3317 NEONMAP2(vrsqrte_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 3318 NEONMAP2(vrsqrteq_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 3319 NEONMAP1(vrsqrts_v, aarch64_neon_frsqrts, Add1ArgType), 3320 NEONMAP1(vrsqrtsq_v, aarch64_neon_frsqrts, Add1ArgType), 3321 NEONMAP1(vrsubhn_v, aarch64_neon_rsubhn, Add1ArgType), 3322 NEONMAP1(vsha1su0q_v, aarch64_crypto_sha1su0, 0), 3323 NEONMAP1(vsha1su1q_v, aarch64_crypto_sha1su1, 0), 3324 NEONMAP1(vsha256h2q_v, aarch64_crypto_sha256h2, 0), 3325 NEONMAP1(vsha256hq_v, aarch64_crypto_sha256h, 0), 3326 NEONMAP1(vsha256su0q_v, aarch64_crypto_sha256su0, 0), 3327 NEONMAP1(vsha256su1q_v, aarch64_crypto_sha256su1, 0), 3328 NEONMAP0(vshl_n_v), 3329 NEONMAP2(vshl_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 3330 NEONMAP0(vshll_n_v), 3331 NEONMAP0(vshlq_n_v), 3332 NEONMAP2(vshlq_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 3333 NEONMAP0(vshr_n_v), 3334 NEONMAP0(vshrn_n_v), 3335 NEONMAP0(vshrq_n_v), 3336 NEONMAP0(vsubhn_v), 3337 NEONMAP0(vtst_v), 3338 NEONMAP0(vtstq_v), 3339 }; 3340 3341 static const NeonIntrinsicInfo AArch64SISDIntrinsicMap[] = { 3342 NEONMAP1(vabdd_f64, aarch64_sisd_fabd, Add1ArgType), 3343 NEONMAP1(vabds_f32, aarch64_sisd_fabd, Add1ArgType), 3344 NEONMAP1(vabsd_s64, aarch64_neon_abs, Add1ArgType), 3345 NEONMAP1(vaddlv_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 3346 NEONMAP1(vaddlv_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 3347 NEONMAP1(vaddlvq_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 3348 NEONMAP1(vaddlvq_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 3349 NEONMAP1(vaddv_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 3350 NEONMAP1(vaddv_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 3351 NEONMAP1(vaddv_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3352 NEONMAP1(vaddvq_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 3353 NEONMAP1(vaddvq_f64, aarch64_neon_faddv, AddRetType | Add1ArgType), 3354 NEONMAP1(vaddvq_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 3355 NEONMAP1(vaddvq_s64, aarch64_neon_saddv, AddRetType | Add1ArgType), 3356 NEONMAP1(vaddvq_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3357 NEONMAP1(vaddvq_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3358 NEONMAP1(vcaged_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 3359 NEONMAP1(vcages_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 3360 NEONMAP1(vcagtd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 3361 NEONMAP1(vcagts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 3362 NEONMAP1(vcaled_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 3363 NEONMAP1(vcales_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 3364 NEONMAP1(vcaltd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 3365 NEONMAP1(vcalts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 3366 NEONMAP1(vcvtad_s64_f64, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 3367 NEONMAP1(vcvtad_u64_f64, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 3368 NEONMAP1(vcvtas_s32_f32, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 3369 NEONMAP1(vcvtas_u32_f32, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 3370 NEONMAP1(vcvtd_n_f64_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 3371 NEONMAP1(vcvtd_n_f64_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 3372 NEONMAP1(vcvtd_n_s64_f64, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 3373 NEONMAP1(vcvtd_n_u64_f64, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 3374 NEONMAP1(vcvtmd_s64_f64, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 3375 NEONMAP1(vcvtmd_u64_f64, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 3376 NEONMAP1(vcvtms_s32_f32, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 3377 NEONMAP1(vcvtms_u32_f32, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 3378 NEONMAP1(vcvtnd_s64_f64, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 3379 NEONMAP1(vcvtnd_u64_f64, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 3380 NEONMAP1(vcvtns_s32_f32, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 3381 NEONMAP1(vcvtns_u32_f32, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 3382 NEONMAP1(vcvtpd_s64_f64, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 3383 NEONMAP1(vcvtpd_u64_f64, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 3384 NEONMAP1(vcvtps_s32_f32, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 3385 NEONMAP1(vcvtps_u32_f32, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 3386 NEONMAP1(vcvts_n_f32_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 3387 NEONMAP1(vcvts_n_f32_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 3388 NEONMAP1(vcvts_n_s32_f32, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 3389 NEONMAP1(vcvts_n_u32_f32, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 3390 NEONMAP1(vcvtxd_f32_f64, aarch64_sisd_fcvtxn, 0), 3391 NEONMAP1(vmaxnmv_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3392 NEONMAP1(vmaxnmvq_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3393 NEONMAP1(vmaxnmvq_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3394 NEONMAP1(vmaxv_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3395 NEONMAP1(vmaxv_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 3396 NEONMAP1(vmaxv_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 3397 NEONMAP1(vmaxvq_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3398 NEONMAP1(vmaxvq_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3399 NEONMAP1(vmaxvq_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 3400 NEONMAP1(vmaxvq_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 3401 NEONMAP1(vminnmv_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3402 NEONMAP1(vminnmvq_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3403 NEONMAP1(vminnmvq_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3404 NEONMAP1(vminv_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3405 NEONMAP1(vminv_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 3406 NEONMAP1(vminv_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 3407 NEONMAP1(vminvq_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3408 NEONMAP1(vminvq_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 3409 NEONMAP1(vminvq_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 3410 NEONMAP1(vminvq_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 3411 NEONMAP1(vmull_p64, aarch64_neon_pmull64, 0), 3412 NEONMAP1(vmulxd_f64, aarch64_neon_fmulx, Add1ArgType), 3413 NEONMAP1(vmulxs_f32, aarch64_neon_fmulx, Add1ArgType), 3414 NEONMAP1(vpaddd_s64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3415 NEONMAP1(vpaddd_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 3416 NEONMAP1(vpmaxnmqd_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3417 NEONMAP1(vpmaxnms_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 3418 NEONMAP1(vpmaxqd_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3419 NEONMAP1(vpmaxs_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 3420 NEONMAP1(vpminnmqd_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3421 NEONMAP1(vpminnms_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 3422 NEONMAP1(vpminqd_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 3423 NEONMAP1(vpmins_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 3424 NEONMAP1(vqabsb_s8, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 3425 NEONMAP1(vqabsd_s64, aarch64_neon_sqabs, Add1ArgType), 3426 NEONMAP1(vqabsh_s16, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 3427 NEONMAP1(vqabss_s32, aarch64_neon_sqabs, Add1ArgType), 3428 NEONMAP1(vqaddb_s8, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 3429 NEONMAP1(vqaddb_u8, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 3430 NEONMAP1(vqaddd_s64, aarch64_neon_sqadd, Add1ArgType), 3431 NEONMAP1(vqaddd_u64, aarch64_neon_uqadd, Add1ArgType), 3432 NEONMAP1(vqaddh_s16, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 3433 NEONMAP1(vqaddh_u16, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 3434 NEONMAP1(vqadds_s32, aarch64_neon_sqadd, Add1ArgType), 3435 NEONMAP1(vqadds_u32, aarch64_neon_uqadd, Add1ArgType), 3436 NEONMAP1(vqdmulhh_s16, aarch64_neon_sqdmulh, Vectorize1ArgType | Use64BitVectors), 3437 NEONMAP1(vqdmulhs_s32, aarch64_neon_sqdmulh, Add1ArgType), 3438 NEONMAP1(vqdmullh_s16, aarch64_neon_sqdmull, VectorRet | Use128BitVectors), 3439 NEONMAP1(vqdmulls_s32, aarch64_neon_sqdmulls_scalar, 0), 3440 NEONMAP1(vqmovnd_s64, aarch64_neon_scalar_sqxtn, AddRetType | Add1ArgType), 3441 NEONMAP1(vqmovnd_u64, aarch64_neon_scalar_uqxtn, AddRetType | Add1ArgType), 3442 NEONMAP1(vqmovnh_s16, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 3443 NEONMAP1(vqmovnh_u16, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 3444 NEONMAP1(vqmovns_s32, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 3445 NEONMAP1(vqmovns_u32, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 3446 NEONMAP1(vqmovund_s64, aarch64_neon_scalar_sqxtun, AddRetType | Add1ArgType), 3447 NEONMAP1(vqmovunh_s16, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 3448 NEONMAP1(vqmovuns_s32, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 3449 NEONMAP1(vqnegb_s8, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 3450 NEONMAP1(vqnegd_s64, aarch64_neon_sqneg, Add1ArgType), 3451 NEONMAP1(vqnegh_s16, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 3452 NEONMAP1(vqnegs_s32, aarch64_neon_sqneg, Add1ArgType), 3453 NEONMAP1(vqrdmulhh_s16, aarch64_neon_sqrdmulh, Vectorize1ArgType | Use64BitVectors), 3454 NEONMAP1(vqrdmulhs_s32, aarch64_neon_sqrdmulh, Add1ArgType), 3455 NEONMAP1(vqrshlb_s8, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 3456 NEONMAP1(vqrshlb_u8, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 3457 NEONMAP1(vqrshld_s64, aarch64_neon_sqrshl, Add1ArgType), 3458 NEONMAP1(vqrshld_u64, aarch64_neon_uqrshl, Add1ArgType), 3459 NEONMAP1(vqrshlh_s16, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 3460 NEONMAP1(vqrshlh_u16, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 3461 NEONMAP1(vqrshls_s32, aarch64_neon_sqrshl, Add1ArgType), 3462 NEONMAP1(vqrshls_u32, aarch64_neon_uqrshl, Add1ArgType), 3463 NEONMAP1(vqrshrnd_n_s64, aarch64_neon_sqrshrn, AddRetType), 3464 NEONMAP1(vqrshrnd_n_u64, aarch64_neon_uqrshrn, AddRetType), 3465 NEONMAP1(vqrshrnh_n_s16, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 3466 NEONMAP1(vqrshrnh_n_u16, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 3467 NEONMAP1(vqrshrns_n_s32, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 3468 NEONMAP1(vqrshrns_n_u32, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 3469 NEONMAP1(vqrshrund_n_s64, aarch64_neon_sqrshrun, AddRetType), 3470 NEONMAP1(vqrshrunh_n_s16, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 3471 NEONMAP1(vqrshruns_n_s32, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 3472 NEONMAP1(vqshlb_n_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3473 NEONMAP1(vqshlb_n_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3474 NEONMAP1(vqshlb_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3475 NEONMAP1(vqshlb_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3476 NEONMAP1(vqshld_s64, aarch64_neon_sqshl, Add1ArgType), 3477 NEONMAP1(vqshld_u64, aarch64_neon_uqshl, Add1ArgType), 3478 NEONMAP1(vqshlh_n_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3479 NEONMAP1(vqshlh_n_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3480 NEONMAP1(vqshlh_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 3481 NEONMAP1(vqshlh_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 3482 NEONMAP1(vqshls_n_s32, aarch64_neon_sqshl, Add1ArgType), 3483 NEONMAP1(vqshls_n_u32, aarch64_neon_uqshl, Add1ArgType), 3484 NEONMAP1(vqshls_s32, aarch64_neon_sqshl, Add1ArgType), 3485 NEONMAP1(vqshls_u32, aarch64_neon_uqshl, Add1ArgType), 3486 NEONMAP1(vqshlub_n_s8, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 3487 NEONMAP1(vqshluh_n_s16, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 3488 NEONMAP1(vqshlus_n_s32, aarch64_neon_sqshlu, Add1ArgType), 3489 NEONMAP1(vqshrnd_n_s64, aarch64_neon_sqshrn, AddRetType), 3490 NEONMAP1(vqshrnd_n_u64, aarch64_neon_uqshrn, AddRetType), 3491 NEONMAP1(vqshrnh_n_s16, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 3492 NEONMAP1(vqshrnh_n_u16, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 3493 NEONMAP1(vqshrns_n_s32, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 3494 NEONMAP1(vqshrns_n_u32, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 3495 NEONMAP1(vqshrund_n_s64, aarch64_neon_sqshrun, AddRetType), 3496 NEONMAP1(vqshrunh_n_s16, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 3497 NEONMAP1(vqshruns_n_s32, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 3498 NEONMAP1(vqsubb_s8, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 3499 NEONMAP1(vqsubb_u8, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 3500 NEONMAP1(vqsubd_s64, aarch64_neon_sqsub, Add1ArgType), 3501 NEONMAP1(vqsubd_u64, aarch64_neon_uqsub, Add1ArgType), 3502 NEONMAP1(vqsubh_s16, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 3503 NEONMAP1(vqsubh_u16, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 3504 NEONMAP1(vqsubs_s32, aarch64_neon_sqsub, Add1ArgType), 3505 NEONMAP1(vqsubs_u32, aarch64_neon_uqsub, Add1ArgType), 3506 NEONMAP1(vrecped_f64, aarch64_neon_frecpe, Add1ArgType), 3507 NEONMAP1(vrecpes_f32, aarch64_neon_frecpe, Add1ArgType), 3508 NEONMAP1(vrecpxd_f64, aarch64_neon_frecpx, Add1ArgType), 3509 NEONMAP1(vrecpxs_f32, aarch64_neon_frecpx, Add1ArgType), 3510 NEONMAP1(vrshld_s64, aarch64_neon_srshl, Add1ArgType), 3511 NEONMAP1(vrshld_u64, aarch64_neon_urshl, Add1ArgType), 3512 NEONMAP1(vrsqrted_f64, aarch64_neon_frsqrte, Add1ArgType), 3513 NEONMAP1(vrsqrtes_f32, aarch64_neon_frsqrte, Add1ArgType), 3514 NEONMAP1(vrsqrtsd_f64, aarch64_neon_frsqrts, Add1ArgType), 3515 NEONMAP1(vrsqrtss_f32, aarch64_neon_frsqrts, Add1ArgType), 3516 NEONMAP1(vsha1cq_u32, aarch64_crypto_sha1c, 0), 3517 NEONMAP1(vsha1h_u32, aarch64_crypto_sha1h, 0), 3518 NEONMAP1(vsha1mq_u32, aarch64_crypto_sha1m, 0), 3519 NEONMAP1(vsha1pq_u32, aarch64_crypto_sha1p, 0), 3520 NEONMAP1(vshld_s64, aarch64_neon_sshl, Add1ArgType), 3521 NEONMAP1(vshld_u64, aarch64_neon_ushl, Add1ArgType), 3522 NEONMAP1(vslid_n_s64, aarch64_neon_vsli, Vectorize1ArgType), 3523 NEONMAP1(vslid_n_u64, aarch64_neon_vsli, Vectorize1ArgType), 3524 NEONMAP1(vsqaddb_u8, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 3525 NEONMAP1(vsqaddd_u64, aarch64_neon_usqadd, Add1ArgType), 3526 NEONMAP1(vsqaddh_u16, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 3527 NEONMAP1(vsqadds_u32, aarch64_neon_usqadd, Add1ArgType), 3528 NEONMAP1(vsrid_n_s64, aarch64_neon_vsri, Vectorize1ArgType), 3529 NEONMAP1(vsrid_n_u64, aarch64_neon_vsri, Vectorize1ArgType), 3530 NEONMAP1(vuqaddb_s8, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 3531 NEONMAP1(vuqaddd_s64, aarch64_neon_suqadd, Add1ArgType), 3532 NEONMAP1(vuqaddh_s16, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 3533 NEONMAP1(vuqadds_s32, aarch64_neon_suqadd, Add1ArgType), 3534 }; 3535 3536 #undef NEONMAP0 3537 #undef NEONMAP1 3538 #undef NEONMAP2 3539 3540 static bool NEONSIMDIntrinsicsProvenSorted = false; 3541 3542 static bool AArch64SIMDIntrinsicsProvenSorted = false; 3543 static bool AArch64SISDIntrinsicsProvenSorted = false; 3544 3545 3546 static const NeonIntrinsicInfo * 3547 findNeonIntrinsicInMap(ArrayRef<NeonIntrinsicInfo> IntrinsicMap, 3548 unsigned BuiltinID, bool &MapProvenSorted) { 3549 3550 #ifndef NDEBUG 3551 if (!MapProvenSorted) { 3552 assert(std::is_sorted(std::begin(IntrinsicMap), std::end(IntrinsicMap))); 3553 MapProvenSorted = true; 3554 } 3555 #endif 3556 3557 const NeonIntrinsicInfo *Builtin = 3558 std::lower_bound(IntrinsicMap.begin(), IntrinsicMap.end(), BuiltinID); 3559 3560 if (Builtin != IntrinsicMap.end() && Builtin->BuiltinID == BuiltinID) 3561 return Builtin; 3562 3563 return nullptr; 3564 } 3565 3566 Function *CodeGenFunction::LookupNeonLLVMIntrinsic(unsigned IntrinsicID, 3567 unsigned Modifier, 3568 llvm::Type *ArgType, 3569 const CallExpr *E) { 3570 int VectorSize = 0; 3571 if (Modifier & Use64BitVectors) 3572 VectorSize = 64; 3573 else if (Modifier & Use128BitVectors) 3574 VectorSize = 128; 3575 3576 // Return type. 3577 SmallVector<llvm::Type *, 3> Tys; 3578 if (Modifier & AddRetType) { 3579 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 3580 if (Modifier & VectorizeRetType) 3581 Ty = llvm::VectorType::get( 3582 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); 3583 3584 Tys.push_back(Ty); 3585 } 3586 3587 // Arguments. 3588 if (Modifier & VectorizeArgTypes) { 3589 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; 3590 ArgType = llvm::VectorType::get(ArgType, Elts); 3591 } 3592 3593 if (Modifier & (Add1ArgType | Add2ArgTypes)) 3594 Tys.push_back(ArgType); 3595 3596 if (Modifier & Add2ArgTypes) 3597 Tys.push_back(ArgType); 3598 3599 if (Modifier & InventFloatType) 3600 Tys.push_back(FloatTy); 3601 3602 return CGM.getIntrinsic(IntrinsicID, Tys); 3603 } 3604 3605 static Value *EmitCommonNeonSISDBuiltinExpr(CodeGenFunction &CGF, 3606 const NeonIntrinsicInfo &SISDInfo, 3607 SmallVectorImpl<Value *> &Ops, 3608 const CallExpr *E) { 3609 unsigned BuiltinID = SISDInfo.BuiltinID; 3610 unsigned int Int = SISDInfo.LLVMIntrinsic; 3611 unsigned Modifier = SISDInfo.TypeModifier; 3612 const char *s = SISDInfo.NameHint; 3613 3614 switch (BuiltinID) { 3615 case NEON::BI__builtin_neon_vcled_s64: 3616 case NEON::BI__builtin_neon_vcled_u64: 3617 case NEON::BI__builtin_neon_vcles_f32: 3618 case NEON::BI__builtin_neon_vcled_f64: 3619 case NEON::BI__builtin_neon_vcltd_s64: 3620 case NEON::BI__builtin_neon_vcltd_u64: 3621 case NEON::BI__builtin_neon_vclts_f32: 3622 case NEON::BI__builtin_neon_vcltd_f64: 3623 case NEON::BI__builtin_neon_vcales_f32: 3624 case NEON::BI__builtin_neon_vcaled_f64: 3625 case NEON::BI__builtin_neon_vcalts_f32: 3626 case NEON::BI__builtin_neon_vcaltd_f64: 3627 // Only one direction of comparisons actually exist, cmle is actually a cmge 3628 // with swapped operands. The table gives us the right intrinsic but we 3629 // still need to do the swap. 3630 std::swap(Ops[0], Ops[1]); 3631 break; 3632 } 3633 3634 assert(Int && "Generic code assumes a valid intrinsic"); 3635 3636 // Determine the type(s) of this overloaded AArch64 intrinsic. 3637 const Expr *Arg = E->getArg(0); 3638 llvm::Type *ArgTy = CGF.ConvertType(Arg->getType()); 3639 Function *F = CGF.LookupNeonLLVMIntrinsic(Int, Modifier, ArgTy, E); 3640 3641 int j = 0; 3642 ConstantInt *C0 = ConstantInt::get(CGF.SizeTy, 0); 3643 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 3644 ai != ae; ++ai, ++j) { 3645 llvm::Type *ArgTy = ai->getType(); 3646 if (Ops[j]->getType()->getPrimitiveSizeInBits() == 3647 ArgTy->getPrimitiveSizeInBits()) 3648 continue; 3649 3650 assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy()); 3651 // The constant argument to an _n_ intrinsic always has Int32Ty, so truncate 3652 // it before inserting. 3653 Ops[j] = 3654 CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType()); 3655 Ops[j] = 3656 CGF.Builder.CreateInsertElement(UndefValue::get(ArgTy), Ops[j], C0); 3657 } 3658 3659 Value *Result = CGF.EmitNeonCall(F, Ops, s); 3660 llvm::Type *ResultType = CGF.ConvertType(E->getType()); 3661 if (ResultType->getPrimitiveSizeInBits() < 3662 Result->getType()->getPrimitiveSizeInBits()) 3663 return CGF.Builder.CreateExtractElement(Result, C0); 3664 3665 return CGF.Builder.CreateBitCast(Result, ResultType, s); 3666 } 3667 3668 Value *CodeGenFunction::EmitCommonNeonBuiltinExpr( 3669 unsigned BuiltinID, unsigned LLVMIntrinsic, unsigned AltLLVMIntrinsic, 3670 const char *NameHint, unsigned Modifier, const CallExpr *E, 3671 SmallVectorImpl<llvm::Value *> &Ops, Address PtrOp0, Address PtrOp1) { 3672 // Get the last argument, which specifies the vector type. 3673 llvm::APSInt NeonTypeConst; 3674 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 3675 if (!Arg->isIntegerConstantExpr(NeonTypeConst, getContext())) 3676 return nullptr; 3677 3678 // Determine the type of this overloaded NEON intrinsic. 3679 NeonTypeFlags Type(NeonTypeConst.getZExtValue()); 3680 bool Usgn = Type.isUnsigned(); 3681 bool Quad = Type.isQuad(); 3682 3683 llvm::VectorType *VTy = GetNeonType(this, Type); 3684 llvm::Type *Ty = VTy; 3685 if (!Ty) 3686 return nullptr; 3687 3688 auto getAlignmentValue32 = [&](Address addr) -> Value* { 3689 return Builder.getInt32(addr.getAlignment().getQuantity()); 3690 }; 3691 3692 unsigned Int = LLVMIntrinsic; 3693 if ((Modifier & UnsignedAlts) && !Usgn) 3694 Int = AltLLVMIntrinsic; 3695 3696 switch (BuiltinID) { 3697 default: break; 3698 case NEON::BI__builtin_neon_vabs_v: 3699 case NEON::BI__builtin_neon_vabsq_v: 3700 if (VTy->getElementType()->isFloatingPointTy()) 3701 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, Ty), Ops, "vabs"); 3702 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), Ops, "vabs"); 3703 case NEON::BI__builtin_neon_vaddhn_v: { 3704 llvm::VectorType *SrcTy = 3705 llvm::VectorType::getExtendedElementVectorType(VTy); 3706 3707 // %sum = add <4 x i32> %lhs, %rhs 3708 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3709 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 3710 Ops[0] = Builder.CreateAdd(Ops[0], Ops[1], "vaddhn"); 3711 3712 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 3713 Constant *ShiftAmt = 3714 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 3715 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vaddhn"); 3716 3717 // %res = trunc <4 x i32> %high to <4 x i16> 3718 return Builder.CreateTrunc(Ops[0], VTy, "vaddhn"); 3719 } 3720 case NEON::BI__builtin_neon_vcale_v: 3721 case NEON::BI__builtin_neon_vcaleq_v: 3722 case NEON::BI__builtin_neon_vcalt_v: 3723 case NEON::BI__builtin_neon_vcaltq_v: 3724 std::swap(Ops[0], Ops[1]); 3725 case NEON::BI__builtin_neon_vcage_v: 3726 case NEON::BI__builtin_neon_vcageq_v: 3727 case NEON::BI__builtin_neon_vcagt_v: 3728 case NEON::BI__builtin_neon_vcagtq_v: { 3729 llvm::Type *VecFlt = llvm::VectorType::get( 3730 VTy->getScalarSizeInBits() == 32 ? FloatTy : DoubleTy, 3731 VTy->getNumElements()); 3732 llvm::Type *Tys[] = { VTy, VecFlt }; 3733 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3734 return EmitNeonCall(F, Ops, NameHint); 3735 } 3736 case NEON::BI__builtin_neon_vclz_v: 3737 case NEON::BI__builtin_neon_vclzq_v: 3738 // We generate target-independent intrinsic, which needs a second argument 3739 // for whether or not clz of zero is undefined; on ARM it isn't. 3740 Ops.push_back(Builder.getInt1(getTarget().isCLZForZeroUndef())); 3741 break; 3742 case NEON::BI__builtin_neon_vcvt_f32_v: 3743 case NEON::BI__builtin_neon_vcvtq_f32_v: 3744 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3745 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, Quad)); 3746 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 3747 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 3748 case NEON::BI__builtin_neon_vcvt_n_f32_v: 3749 case NEON::BI__builtin_neon_vcvt_n_f64_v: 3750 case NEON::BI__builtin_neon_vcvtq_n_f32_v: 3751 case NEON::BI__builtin_neon_vcvtq_n_f64_v: { 3752 llvm::Type *Tys[2] = { GetFloatNeonType(this, Type), Ty }; 3753 Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic; 3754 Function *F = CGM.getIntrinsic(Int, Tys); 3755 return EmitNeonCall(F, Ops, "vcvt_n"); 3756 } 3757 case NEON::BI__builtin_neon_vcvt_n_s32_v: 3758 case NEON::BI__builtin_neon_vcvt_n_u32_v: 3759 case NEON::BI__builtin_neon_vcvt_n_s64_v: 3760 case NEON::BI__builtin_neon_vcvt_n_u64_v: 3761 case NEON::BI__builtin_neon_vcvtq_n_s32_v: 3762 case NEON::BI__builtin_neon_vcvtq_n_u32_v: 3763 case NEON::BI__builtin_neon_vcvtq_n_s64_v: 3764 case NEON::BI__builtin_neon_vcvtq_n_u64_v: { 3765 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 3766 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3767 return EmitNeonCall(F, Ops, "vcvt_n"); 3768 } 3769 case NEON::BI__builtin_neon_vcvt_s32_v: 3770 case NEON::BI__builtin_neon_vcvt_u32_v: 3771 case NEON::BI__builtin_neon_vcvt_s64_v: 3772 case NEON::BI__builtin_neon_vcvt_u64_v: 3773 case NEON::BI__builtin_neon_vcvtq_s32_v: 3774 case NEON::BI__builtin_neon_vcvtq_u32_v: 3775 case NEON::BI__builtin_neon_vcvtq_s64_v: 3776 case NEON::BI__builtin_neon_vcvtq_u64_v: { 3777 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 3778 return Usgn ? Builder.CreateFPToUI(Ops[0], Ty, "vcvt") 3779 : Builder.CreateFPToSI(Ops[0], Ty, "vcvt"); 3780 } 3781 case NEON::BI__builtin_neon_vcvta_s32_v: 3782 case NEON::BI__builtin_neon_vcvta_s64_v: 3783 case NEON::BI__builtin_neon_vcvta_u32_v: 3784 case NEON::BI__builtin_neon_vcvta_u64_v: 3785 case NEON::BI__builtin_neon_vcvtaq_s32_v: 3786 case NEON::BI__builtin_neon_vcvtaq_s64_v: 3787 case NEON::BI__builtin_neon_vcvtaq_u32_v: 3788 case NEON::BI__builtin_neon_vcvtaq_u64_v: 3789 case NEON::BI__builtin_neon_vcvtn_s32_v: 3790 case NEON::BI__builtin_neon_vcvtn_s64_v: 3791 case NEON::BI__builtin_neon_vcvtn_u32_v: 3792 case NEON::BI__builtin_neon_vcvtn_u64_v: 3793 case NEON::BI__builtin_neon_vcvtnq_s32_v: 3794 case NEON::BI__builtin_neon_vcvtnq_s64_v: 3795 case NEON::BI__builtin_neon_vcvtnq_u32_v: 3796 case NEON::BI__builtin_neon_vcvtnq_u64_v: 3797 case NEON::BI__builtin_neon_vcvtp_s32_v: 3798 case NEON::BI__builtin_neon_vcvtp_s64_v: 3799 case NEON::BI__builtin_neon_vcvtp_u32_v: 3800 case NEON::BI__builtin_neon_vcvtp_u64_v: 3801 case NEON::BI__builtin_neon_vcvtpq_s32_v: 3802 case NEON::BI__builtin_neon_vcvtpq_s64_v: 3803 case NEON::BI__builtin_neon_vcvtpq_u32_v: 3804 case NEON::BI__builtin_neon_vcvtpq_u64_v: 3805 case NEON::BI__builtin_neon_vcvtm_s32_v: 3806 case NEON::BI__builtin_neon_vcvtm_s64_v: 3807 case NEON::BI__builtin_neon_vcvtm_u32_v: 3808 case NEON::BI__builtin_neon_vcvtm_u64_v: 3809 case NEON::BI__builtin_neon_vcvtmq_s32_v: 3810 case NEON::BI__builtin_neon_vcvtmq_s64_v: 3811 case NEON::BI__builtin_neon_vcvtmq_u32_v: 3812 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 3813 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 3814 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, NameHint); 3815 } 3816 case NEON::BI__builtin_neon_vext_v: 3817 case NEON::BI__builtin_neon_vextq_v: { 3818 int CV = cast<ConstantInt>(Ops[2])->getSExtValue(); 3819 SmallVector<uint32_t, 16> Indices; 3820 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 3821 Indices.push_back(i+CV); 3822 3823 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3824 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3825 return Builder.CreateShuffleVector(Ops[0], Ops[1], Indices, "vext"); 3826 } 3827 case NEON::BI__builtin_neon_vfma_v: 3828 case NEON::BI__builtin_neon_vfmaq_v: { 3829 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 3830 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3831 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3832 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3833 3834 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 3835 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 3836 } 3837 case NEON::BI__builtin_neon_vld1_v: 3838 case NEON::BI__builtin_neon_vld1q_v: { 3839 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3840 Ops.push_back(getAlignmentValue32(PtrOp0)); 3841 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, "vld1"); 3842 } 3843 case NEON::BI__builtin_neon_vld2_v: 3844 case NEON::BI__builtin_neon_vld2q_v: 3845 case NEON::BI__builtin_neon_vld3_v: 3846 case NEON::BI__builtin_neon_vld3q_v: 3847 case NEON::BI__builtin_neon_vld4_v: 3848 case NEON::BI__builtin_neon_vld4q_v: { 3849 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3850 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3851 Value *Align = getAlignmentValue32(PtrOp1); 3852 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint); 3853 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3854 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3855 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3856 } 3857 case NEON::BI__builtin_neon_vld1_dup_v: 3858 case NEON::BI__builtin_neon_vld1q_dup_v: { 3859 Value *V = UndefValue::get(Ty); 3860 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 3861 PtrOp0 = Builder.CreateBitCast(PtrOp0, Ty); 3862 LoadInst *Ld = Builder.CreateLoad(PtrOp0); 3863 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 3864 Ops[0] = Builder.CreateInsertElement(V, Ld, CI); 3865 return EmitNeonSplat(Ops[0], CI); 3866 } 3867 case NEON::BI__builtin_neon_vld2_lane_v: 3868 case NEON::BI__builtin_neon_vld2q_lane_v: 3869 case NEON::BI__builtin_neon_vld3_lane_v: 3870 case NEON::BI__builtin_neon_vld3q_lane_v: 3871 case NEON::BI__builtin_neon_vld4_lane_v: 3872 case NEON::BI__builtin_neon_vld4q_lane_v: { 3873 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3874 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3875 for (unsigned I = 2; I < Ops.size() - 1; ++I) 3876 Ops[I] = Builder.CreateBitCast(Ops[I], Ty); 3877 Ops.push_back(getAlignmentValue32(PtrOp1)); 3878 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), NameHint); 3879 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3880 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3881 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3882 } 3883 case NEON::BI__builtin_neon_vmovl_v: { 3884 llvm::Type *DTy =llvm::VectorType::getTruncatedElementVectorType(VTy); 3885 Ops[0] = Builder.CreateBitCast(Ops[0], DTy); 3886 if (Usgn) 3887 return Builder.CreateZExt(Ops[0], Ty, "vmovl"); 3888 return Builder.CreateSExt(Ops[0], Ty, "vmovl"); 3889 } 3890 case NEON::BI__builtin_neon_vmovn_v: { 3891 llvm::Type *QTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3892 Ops[0] = Builder.CreateBitCast(Ops[0], QTy); 3893 return Builder.CreateTrunc(Ops[0], Ty, "vmovn"); 3894 } 3895 case NEON::BI__builtin_neon_vmull_v: 3896 // FIXME: the integer vmull operations could be emitted in terms of pure 3897 // LLVM IR (2 exts followed by a mul). Unfortunately LLVM has a habit of 3898 // hoisting the exts outside loops. Until global ISel comes along that can 3899 // see through such movement this leads to bad CodeGen. So we need an 3900 // intrinsic for now. 3901 Int = Usgn ? Intrinsic::arm_neon_vmullu : Intrinsic::arm_neon_vmulls; 3902 Int = Type.isPoly() ? (unsigned)Intrinsic::arm_neon_vmullp : Int; 3903 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 3904 case NEON::BI__builtin_neon_vpadal_v: 3905 case NEON::BI__builtin_neon_vpadalq_v: { 3906 // The source operand type has twice as many elements of half the size. 3907 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3908 llvm::Type *EltTy = 3909 llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3910 llvm::Type *NarrowTy = 3911 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3912 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3913 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, NameHint); 3914 } 3915 case NEON::BI__builtin_neon_vpaddl_v: 3916 case NEON::BI__builtin_neon_vpaddlq_v: { 3917 // The source operand type has twice as many elements of half the size. 3918 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3919 llvm::Type *EltTy = llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3920 llvm::Type *NarrowTy = 3921 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3922 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3923 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vpaddl"); 3924 } 3925 case NEON::BI__builtin_neon_vqdmlal_v: 3926 case NEON::BI__builtin_neon_vqdmlsl_v: { 3927 SmallVector<Value *, 2> MulOps(Ops.begin() + 1, Ops.end()); 3928 Ops[1] = 3929 EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), MulOps, "vqdmlal"); 3930 Ops.resize(2); 3931 return EmitNeonCall(CGM.getIntrinsic(AltLLVMIntrinsic, Ty), Ops, NameHint); 3932 } 3933 case NEON::BI__builtin_neon_vqshl_n_v: 3934 case NEON::BI__builtin_neon_vqshlq_n_v: 3935 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshl_n", 3936 1, false); 3937 case NEON::BI__builtin_neon_vqshlu_n_v: 3938 case NEON::BI__builtin_neon_vqshluq_n_v: 3939 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshlu_n", 3940 1, false); 3941 case NEON::BI__builtin_neon_vrecpe_v: 3942 case NEON::BI__builtin_neon_vrecpeq_v: 3943 case NEON::BI__builtin_neon_vrsqrte_v: 3944 case NEON::BI__builtin_neon_vrsqrteq_v: 3945 Int = Ty->isFPOrFPVectorTy() ? LLVMIntrinsic : AltLLVMIntrinsic; 3946 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint); 3947 3948 case NEON::BI__builtin_neon_vrshr_n_v: 3949 case NEON::BI__builtin_neon_vrshrq_n_v: 3950 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n", 3951 1, true); 3952 case NEON::BI__builtin_neon_vshl_n_v: 3953 case NEON::BI__builtin_neon_vshlq_n_v: 3954 Ops[1] = EmitNeonShiftVector(Ops[1], Ty, false); 3955 return Builder.CreateShl(Builder.CreateBitCast(Ops[0],Ty), Ops[1], 3956 "vshl_n"); 3957 case NEON::BI__builtin_neon_vshll_n_v: { 3958 llvm::Type *SrcTy = llvm::VectorType::getTruncatedElementVectorType(VTy); 3959 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3960 if (Usgn) 3961 Ops[0] = Builder.CreateZExt(Ops[0], VTy); 3962 else 3963 Ops[0] = Builder.CreateSExt(Ops[0], VTy); 3964 Ops[1] = EmitNeonShiftVector(Ops[1], VTy, false); 3965 return Builder.CreateShl(Ops[0], Ops[1], "vshll_n"); 3966 } 3967 case NEON::BI__builtin_neon_vshrn_n_v: { 3968 llvm::Type *SrcTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3969 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3970 Ops[1] = EmitNeonShiftVector(Ops[1], SrcTy, false); 3971 if (Usgn) 3972 Ops[0] = Builder.CreateLShr(Ops[0], Ops[1]); 3973 else 3974 Ops[0] = Builder.CreateAShr(Ops[0], Ops[1]); 3975 return Builder.CreateTrunc(Ops[0], Ty, "vshrn_n"); 3976 } 3977 case NEON::BI__builtin_neon_vshr_n_v: 3978 case NEON::BI__builtin_neon_vshrq_n_v: 3979 return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, Usgn, "vshr_n"); 3980 case NEON::BI__builtin_neon_vst1_v: 3981 case NEON::BI__builtin_neon_vst1q_v: 3982 case NEON::BI__builtin_neon_vst2_v: 3983 case NEON::BI__builtin_neon_vst2q_v: 3984 case NEON::BI__builtin_neon_vst3_v: 3985 case NEON::BI__builtin_neon_vst3q_v: 3986 case NEON::BI__builtin_neon_vst4_v: 3987 case NEON::BI__builtin_neon_vst4q_v: 3988 case NEON::BI__builtin_neon_vst2_lane_v: 3989 case NEON::BI__builtin_neon_vst2q_lane_v: 3990 case NEON::BI__builtin_neon_vst3_lane_v: 3991 case NEON::BI__builtin_neon_vst3q_lane_v: 3992 case NEON::BI__builtin_neon_vst4_lane_v: 3993 case NEON::BI__builtin_neon_vst4q_lane_v: { 3994 llvm::Type *Tys[] = {Int8PtrTy, Ty}; 3995 Ops.push_back(getAlignmentValue32(PtrOp0)); 3996 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 3997 } 3998 case NEON::BI__builtin_neon_vsubhn_v: { 3999 llvm::VectorType *SrcTy = 4000 llvm::VectorType::getExtendedElementVectorType(VTy); 4001 4002 // %sum = add <4 x i32> %lhs, %rhs 4003 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 4004 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 4005 Ops[0] = Builder.CreateSub(Ops[0], Ops[1], "vsubhn"); 4006 4007 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 4008 Constant *ShiftAmt = 4009 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 4010 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vsubhn"); 4011 4012 // %res = trunc <4 x i32> %high to <4 x i16> 4013 return Builder.CreateTrunc(Ops[0], VTy, "vsubhn"); 4014 } 4015 case NEON::BI__builtin_neon_vtrn_v: 4016 case NEON::BI__builtin_neon_vtrnq_v: { 4017 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4018 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4019 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4020 Value *SV = nullptr; 4021 4022 for (unsigned vi = 0; vi != 2; ++vi) { 4023 SmallVector<uint32_t, 16> Indices; 4024 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 4025 Indices.push_back(i+vi); 4026 Indices.push_back(i+e+vi); 4027 } 4028 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4029 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 4030 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4031 } 4032 return SV; 4033 } 4034 case NEON::BI__builtin_neon_vtst_v: 4035 case NEON::BI__builtin_neon_vtstq_v: { 4036 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4037 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4038 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 4039 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 4040 ConstantAggregateZero::get(Ty)); 4041 return Builder.CreateSExt(Ops[0], Ty, "vtst"); 4042 } 4043 case NEON::BI__builtin_neon_vuzp_v: 4044 case NEON::BI__builtin_neon_vuzpq_v: { 4045 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4046 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4047 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4048 Value *SV = nullptr; 4049 4050 for (unsigned vi = 0; vi != 2; ++vi) { 4051 SmallVector<uint32_t, 16> Indices; 4052 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 4053 Indices.push_back(2*i+vi); 4054 4055 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4056 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 4057 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4058 } 4059 return SV; 4060 } 4061 case NEON::BI__builtin_neon_vzip_v: 4062 case NEON::BI__builtin_neon_vzipq_v: { 4063 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 4064 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4065 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 4066 Value *SV = nullptr; 4067 4068 for (unsigned vi = 0; vi != 2; ++vi) { 4069 SmallVector<uint32_t, 16> Indices; 4070 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 4071 Indices.push_back((i + vi*e) >> 1); 4072 Indices.push_back(((i + vi*e) >> 1)+e); 4073 } 4074 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 4075 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 4076 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 4077 } 4078 return SV; 4079 } 4080 } 4081 4082 assert(Int && "Expected valid intrinsic number"); 4083 4084 // Determine the type(s) of this overloaded AArch64 intrinsic. 4085 Function *F = LookupNeonLLVMIntrinsic(Int, Modifier, Ty, E); 4086 4087 Value *Result = EmitNeonCall(F, Ops, NameHint); 4088 llvm::Type *ResultType = ConvertType(E->getType()); 4089 // AArch64 intrinsic one-element vector type cast to 4090 // scalar type expected by the builtin 4091 return Builder.CreateBitCast(Result, ResultType, NameHint); 4092 } 4093 4094 Value *CodeGenFunction::EmitAArch64CompareBuiltinExpr( 4095 Value *Op, llvm::Type *Ty, const CmpInst::Predicate Fp, 4096 const CmpInst::Predicate Ip, const Twine &Name) { 4097 llvm::Type *OTy = Op->getType(); 4098 4099 // FIXME: this is utterly horrific. We should not be looking at previous 4100 // codegen context to find out what needs doing. Unfortunately TableGen 4101 // currently gives us exactly the same calls for vceqz_f32 and vceqz_s32 4102 // (etc). 4103 if (BitCastInst *BI = dyn_cast<BitCastInst>(Op)) 4104 OTy = BI->getOperand(0)->getType(); 4105 4106 Op = Builder.CreateBitCast(Op, OTy); 4107 if (OTy->getScalarType()->isFloatingPointTy()) { 4108 Op = Builder.CreateFCmp(Fp, Op, Constant::getNullValue(OTy)); 4109 } else { 4110 Op = Builder.CreateICmp(Ip, Op, Constant::getNullValue(OTy)); 4111 } 4112 return Builder.CreateSExt(Op, Ty, Name); 4113 } 4114 4115 static Value *packTBLDVectorList(CodeGenFunction &CGF, ArrayRef<Value *> Ops, 4116 Value *ExtOp, Value *IndexOp, 4117 llvm::Type *ResTy, unsigned IntID, 4118 const char *Name) { 4119 SmallVector<Value *, 2> TblOps; 4120 if (ExtOp) 4121 TblOps.push_back(ExtOp); 4122 4123 // Build a vector containing sequential number like (0, 1, 2, ..., 15) 4124 SmallVector<uint32_t, 16> Indices; 4125 llvm::VectorType *TblTy = cast<llvm::VectorType>(Ops[0]->getType()); 4126 for (unsigned i = 0, e = TblTy->getNumElements(); i != e; ++i) { 4127 Indices.push_back(2*i); 4128 Indices.push_back(2*i+1); 4129 } 4130 4131 int PairPos = 0, End = Ops.size() - 1; 4132 while (PairPos < End) { 4133 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 4134 Ops[PairPos+1], Indices, 4135 Name)); 4136 PairPos += 2; 4137 } 4138 4139 // If there's an odd number of 64-bit lookup table, fill the high 64-bit 4140 // of the 128-bit lookup table with zero. 4141 if (PairPos == End) { 4142 Value *ZeroTbl = ConstantAggregateZero::get(TblTy); 4143 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 4144 ZeroTbl, Indices, Name)); 4145 } 4146 4147 Function *TblF; 4148 TblOps.push_back(IndexOp); 4149 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); 4150 4151 return CGF.EmitNeonCall(TblF, TblOps, Name); 4152 } 4153 4154 Value *CodeGenFunction::GetValueForARMHint(unsigned BuiltinID) { 4155 unsigned Value; 4156 switch (BuiltinID) { 4157 default: 4158 return nullptr; 4159 case ARM::BI__builtin_arm_nop: 4160 Value = 0; 4161 break; 4162 case ARM::BI__builtin_arm_yield: 4163 case ARM::BI__yield: 4164 Value = 1; 4165 break; 4166 case ARM::BI__builtin_arm_wfe: 4167 case ARM::BI__wfe: 4168 Value = 2; 4169 break; 4170 case ARM::BI__builtin_arm_wfi: 4171 case ARM::BI__wfi: 4172 Value = 3; 4173 break; 4174 case ARM::BI__builtin_arm_sev: 4175 case ARM::BI__sev: 4176 Value = 4; 4177 break; 4178 case ARM::BI__builtin_arm_sevl: 4179 case ARM::BI__sevl: 4180 Value = 5; 4181 break; 4182 } 4183 4184 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_hint), 4185 llvm::ConstantInt::get(Int32Ty, Value)); 4186 } 4187 4188 // Generates the IR for the read/write special register builtin, 4189 // ValueType is the type of the value that is to be written or read, 4190 // RegisterType is the type of the register being written to or read from. 4191 static Value *EmitSpecialRegisterBuiltin(CodeGenFunction &CGF, 4192 const CallExpr *E, 4193 llvm::Type *RegisterType, 4194 llvm::Type *ValueType, 4195 bool IsRead, 4196 StringRef SysReg = "") { 4197 // write and register intrinsics only support 32 and 64 bit operations. 4198 assert((RegisterType->isIntegerTy(32) || RegisterType->isIntegerTy(64)) 4199 && "Unsupported size for register."); 4200 4201 CodeGen::CGBuilderTy &Builder = CGF.Builder; 4202 CodeGen::CodeGenModule &CGM = CGF.CGM; 4203 LLVMContext &Context = CGM.getLLVMContext(); 4204 4205 if (SysReg.empty()) { 4206 const Expr *SysRegStrExpr = E->getArg(0)->IgnoreParenCasts(); 4207 SysReg = cast<clang::StringLiteral>(SysRegStrExpr)->getString(); 4208 } 4209 4210 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysReg) }; 4211 llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); 4212 llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); 4213 4214 llvm::Type *Types[] = { RegisterType }; 4215 4216 bool MixedTypes = RegisterType->isIntegerTy(64) && ValueType->isIntegerTy(32); 4217 assert(!(RegisterType->isIntegerTy(32) && ValueType->isIntegerTy(64)) 4218 && "Can't fit 64-bit value in 32-bit register"); 4219 4220 if (IsRead) { 4221 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::read_register, Types); 4222 llvm::Value *Call = Builder.CreateCall(F, Metadata); 4223 4224 if (MixedTypes) 4225 // Read into 64 bit register and then truncate result to 32 bit. 4226 return Builder.CreateTrunc(Call, ValueType); 4227 4228 if (ValueType->isPointerTy()) 4229 // Have i32/i64 result (Call) but want to return a VoidPtrTy (i8*). 4230 return Builder.CreateIntToPtr(Call, ValueType); 4231 4232 return Call; 4233 } 4234 4235 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types); 4236 llvm::Value *ArgValue = CGF.EmitScalarExpr(E->getArg(1)); 4237 if (MixedTypes) { 4238 // Extend 32 bit write value to 64 bit to pass to write. 4239 ArgValue = Builder.CreateZExt(ArgValue, RegisterType); 4240 return Builder.CreateCall(F, { Metadata, ArgValue }); 4241 } 4242 4243 if (ValueType->isPointerTy()) { 4244 // Have VoidPtrTy ArgValue but want to return an i32/i64. 4245 ArgValue = Builder.CreatePtrToInt(ArgValue, RegisterType); 4246 return Builder.CreateCall(F, { Metadata, ArgValue }); 4247 } 4248 4249 return Builder.CreateCall(F, { Metadata, ArgValue }); 4250 } 4251 4252 /// Return true if BuiltinID is an overloaded Neon intrinsic with an extra 4253 /// argument that specifies the vector type. 4254 static bool HasExtraNeonArgument(unsigned BuiltinID) { 4255 switch (BuiltinID) { 4256 default: break; 4257 case NEON::BI__builtin_neon_vget_lane_i8: 4258 case NEON::BI__builtin_neon_vget_lane_i16: 4259 case NEON::BI__builtin_neon_vget_lane_i32: 4260 case NEON::BI__builtin_neon_vget_lane_i64: 4261 case NEON::BI__builtin_neon_vget_lane_f32: 4262 case NEON::BI__builtin_neon_vgetq_lane_i8: 4263 case NEON::BI__builtin_neon_vgetq_lane_i16: 4264 case NEON::BI__builtin_neon_vgetq_lane_i32: 4265 case NEON::BI__builtin_neon_vgetq_lane_i64: 4266 case NEON::BI__builtin_neon_vgetq_lane_f32: 4267 case NEON::BI__builtin_neon_vset_lane_i8: 4268 case NEON::BI__builtin_neon_vset_lane_i16: 4269 case NEON::BI__builtin_neon_vset_lane_i32: 4270 case NEON::BI__builtin_neon_vset_lane_i64: 4271 case NEON::BI__builtin_neon_vset_lane_f32: 4272 case NEON::BI__builtin_neon_vsetq_lane_i8: 4273 case NEON::BI__builtin_neon_vsetq_lane_i16: 4274 case NEON::BI__builtin_neon_vsetq_lane_i32: 4275 case NEON::BI__builtin_neon_vsetq_lane_i64: 4276 case NEON::BI__builtin_neon_vsetq_lane_f32: 4277 case NEON::BI__builtin_neon_vsha1h_u32: 4278 case NEON::BI__builtin_neon_vsha1cq_u32: 4279 case NEON::BI__builtin_neon_vsha1pq_u32: 4280 case NEON::BI__builtin_neon_vsha1mq_u32: 4281 case ARM::BI_MoveToCoprocessor: 4282 case ARM::BI_MoveToCoprocessor2: 4283 return false; 4284 } 4285 return true; 4286 } 4287 4288 Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, 4289 const CallExpr *E) { 4290 if (auto Hint = GetValueForARMHint(BuiltinID)) 4291 return Hint; 4292 4293 if (BuiltinID == ARM::BI__emit) { 4294 bool IsThumb = getTarget().getTriple().getArch() == llvm::Triple::thumb; 4295 llvm::FunctionType *FTy = 4296 llvm::FunctionType::get(VoidTy, /*Variadic=*/false); 4297 4298 APSInt Value; 4299 if (!E->getArg(0)->EvaluateAsInt(Value, CGM.getContext())) 4300 llvm_unreachable("Sema will ensure that the parameter is constant"); 4301 4302 uint64_t ZExtValue = Value.zextOrTrunc(IsThumb ? 16 : 32).getZExtValue(); 4303 4304 llvm::InlineAsm *Emit = 4305 IsThumb ? InlineAsm::get(FTy, ".inst.n 0x" + utohexstr(ZExtValue), "", 4306 /*SideEffects=*/true) 4307 : InlineAsm::get(FTy, ".inst 0x" + utohexstr(ZExtValue), "", 4308 /*SideEffects=*/true); 4309 4310 return Builder.CreateCall(Emit); 4311 } 4312 4313 if (BuiltinID == ARM::BI__builtin_arm_dbg) { 4314 Value *Option = EmitScalarExpr(E->getArg(0)); 4315 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_dbg), Option); 4316 } 4317 4318 if (BuiltinID == ARM::BI__builtin_arm_prefetch) { 4319 Value *Address = EmitScalarExpr(E->getArg(0)); 4320 Value *RW = EmitScalarExpr(E->getArg(1)); 4321 Value *IsData = EmitScalarExpr(E->getArg(2)); 4322 4323 // Locality is not supported on ARM target 4324 Value *Locality = llvm::ConstantInt::get(Int32Ty, 3); 4325 4326 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 4327 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 4328 } 4329 4330 if (BuiltinID == ARM::BI__builtin_arm_rbit) { 4331 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 4332 return Builder.CreateCall( 4333 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 4334 } 4335 4336 if (BuiltinID == ARM::BI__clear_cache) { 4337 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 4338 const FunctionDecl *FD = E->getDirectCallee(); 4339 Value *Ops[2]; 4340 for (unsigned i = 0; i < 2; i++) 4341 Ops[i] = EmitScalarExpr(E->getArg(i)); 4342 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 4343 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 4344 StringRef Name = FD->getName(); 4345 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 4346 } 4347 4348 if (BuiltinID == ARM::BI__builtin_arm_mcrr || 4349 BuiltinID == ARM::BI__builtin_arm_mcrr2) { 4350 Function *F; 4351 4352 switch (BuiltinID) { 4353 default: llvm_unreachable("unexpected builtin"); 4354 case ARM::BI__builtin_arm_mcrr: 4355 F = CGM.getIntrinsic(Intrinsic::arm_mcrr); 4356 break; 4357 case ARM::BI__builtin_arm_mcrr2: 4358 F = CGM.getIntrinsic(Intrinsic::arm_mcrr2); 4359 break; 4360 } 4361 4362 // MCRR{2} instruction has 5 operands but 4363 // the intrinsic has 4 because Rt and Rt2 4364 // are represented as a single unsigned 64 4365 // bit integer in the intrinsic definition 4366 // but internally it's represented as 2 32 4367 // bit integers. 4368 4369 Value *Coproc = EmitScalarExpr(E->getArg(0)); 4370 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 4371 Value *RtAndRt2 = EmitScalarExpr(E->getArg(2)); 4372 Value *CRm = EmitScalarExpr(E->getArg(3)); 4373 4374 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 4375 Value *Rt = Builder.CreateTruncOrBitCast(RtAndRt2, Int32Ty); 4376 Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); 4377 Rt2 = Builder.CreateTruncOrBitCast(Rt2, Int32Ty); 4378 4379 return Builder.CreateCall(F, {Coproc, Opc1, Rt, Rt2, CRm}); 4380 } 4381 4382 if (BuiltinID == ARM::BI__builtin_arm_mrrc || 4383 BuiltinID == ARM::BI__builtin_arm_mrrc2) { 4384 Function *F; 4385 4386 switch (BuiltinID) { 4387 default: llvm_unreachable("unexpected builtin"); 4388 case ARM::BI__builtin_arm_mrrc: 4389 F = CGM.getIntrinsic(Intrinsic::arm_mrrc); 4390 break; 4391 case ARM::BI__builtin_arm_mrrc2: 4392 F = CGM.getIntrinsic(Intrinsic::arm_mrrc2); 4393 break; 4394 } 4395 4396 Value *Coproc = EmitScalarExpr(E->getArg(0)); 4397 Value *Opc1 = EmitScalarExpr(E->getArg(1)); 4398 Value *CRm = EmitScalarExpr(E->getArg(2)); 4399 Value *RtAndRt2 = Builder.CreateCall(F, {Coproc, Opc1, CRm}); 4400 4401 // Returns an unsigned 64 bit integer, represented 4402 // as two 32 bit integers. 4403 4404 Value *Rt = Builder.CreateExtractValue(RtAndRt2, 1); 4405 Value *Rt1 = Builder.CreateExtractValue(RtAndRt2, 0); 4406 Rt = Builder.CreateZExt(Rt, Int64Ty); 4407 Rt1 = Builder.CreateZExt(Rt1, Int64Ty); 4408 4409 Value *ShiftCast = llvm::ConstantInt::get(Int64Ty, 32); 4410 RtAndRt2 = Builder.CreateShl(Rt, ShiftCast, "shl", true); 4411 RtAndRt2 = Builder.CreateOr(RtAndRt2, Rt1); 4412 4413 return Builder.CreateBitCast(RtAndRt2, ConvertType(E->getType())); 4414 } 4415 4416 if (BuiltinID == ARM::BI__builtin_arm_ldrexd || 4417 ((BuiltinID == ARM::BI__builtin_arm_ldrex || 4418 BuiltinID == ARM::BI__builtin_arm_ldaex) && 4419 getContext().getTypeSize(E->getType()) == 64) || 4420 BuiltinID == ARM::BI__ldrexd) { 4421 Function *F; 4422 4423 switch (BuiltinID) { 4424 default: llvm_unreachable("unexpected builtin"); 4425 case ARM::BI__builtin_arm_ldaex: 4426 F = CGM.getIntrinsic(Intrinsic::arm_ldaexd); 4427 break; 4428 case ARM::BI__builtin_arm_ldrexd: 4429 case ARM::BI__builtin_arm_ldrex: 4430 case ARM::BI__ldrexd: 4431 F = CGM.getIntrinsic(Intrinsic::arm_ldrexd); 4432 break; 4433 } 4434 4435 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 4436 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 4437 "ldrexd"); 4438 4439 Value *Val0 = Builder.CreateExtractValue(Val, 1); 4440 Value *Val1 = Builder.CreateExtractValue(Val, 0); 4441 Val0 = Builder.CreateZExt(Val0, Int64Ty); 4442 Val1 = Builder.CreateZExt(Val1, Int64Ty); 4443 4444 Value *ShiftCst = llvm::ConstantInt::get(Int64Ty, 32); 4445 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 4446 Val = Builder.CreateOr(Val, Val1); 4447 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 4448 } 4449 4450 if (BuiltinID == ARM::BI__builtin_arm_ldrex || 4451 BuiltinID == ARM::BI__builtin_arm_ldaex) { 4452 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 4453 4454 QualType Ty = E->getType(); 4455 llvm::Type *RealResTy = ConvertType(Ty); 4456 llvm::Type *PtrTy = llvm::IntegerType::get( 4457 getLLVMContext(), getContext().getTypeSize(Ty))->getPointerTo(); 4458 LoadAddr = Builder.CreateBitCast(LoadAddr, PtrTy); 4459 4460 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_ldaex 4461 ? Intrinsic::arm_ldaex 4462 : Intrinsic::arm_ldrex, 4463 PtrTy); 4464 Value *Val = Builder.CreateCall(F, LoadAddr, "ldrex"); 4465 4466 if (RealResTy->isPointerTy()) 4467 return Builder.CreateIntToPtr(Val, RealResTy); 4468 else { 4469 llvm::Type *IntResTy = llvm::IntegerType::get( 4470 getLLVMContext(), CGM.getDataLayout().getTypeSizeInBits(RealResTy)); 4471 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 4472 return Builder.CreateBitCast(Val, RealResTy); 4473 } 4474 } 4475 4476 if (BuiltinID == ARM::BI__builtin_arm_strexd || 4477 ((BuiltinID == ARM::BI__builtin_arm_stlex || 4478 BuiltinID == ARM::BI__builtin_arm_strex) && 4479 getContext().getTypeSize(E->getArg(0)->getType()) == 64)) { 4480 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 4481 ? Intrinsic::arm_stlexd 4482 : Intrinsic::arm_strexd); 4483 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, nullptr); 4484 4485 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 4486 Value *Val = EmitScalarExpr(E->getArg(0)); 4487 Builder.CreateStore(Val, Tmp); 4488 4489 Address LdPtr = Builder.CreateBitCast(Tmp,llvm::PointerType::getUnqual(STy)); 4490 Val = Builder.CreateLoad(LdPtr); 4491 4492 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 4493 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 4494 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), Int8PtrTy); 4495 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "strexd"); 4496 } 4497 4498 if (BuiltinID == ARM::BI__builtin_arm_strex || 4499 BuiltinID == ARM::BI__builtin_arm_stlex) { 4500 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 4501 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 4502 4503 QualType Ty = E->getArg(0)->getType(); 4504 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 4505 getContext().getTypeSize(Ty)); 4506 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 4507 4508 if (StoreVal->getType()->isPointerTy()) 4509 StoreVal = Builder.CreatePtrToInt(StoreVal, Int32Ty); 4510 else { 4511 llvm::Type *IntTy = llvm::IntegerType::get( 4512 getLLVMContext(), 4513 CGM.getDataLayout().getTypeSizeInBits(StoreVal->getType())); 4514 StoreVal = Builder.CreateBitCast(StoreVal, IntTy); 4515 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int32Ty); 4516 } 4517 4518 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 4519 ? Intrinsic::arm_stlex 4520 : Intrinsic::arm_strex, 4521 StoreAddr->getType()); 4522 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "strex"); 4523 } 4524 4525 switch (BuiltinID) { 4526 case ARM::BI__iso_volatile_load8: 4527 case ARM::BI__iso_volatile_load16: 4528 case ARM::BI__iso_volatile_load32: 4529 case ARM::BI__iso_volatile_load64: { 4530 Value *Ptr = EmitScalarExpr(E->getArg(0)); 4531 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 4532 CharUnits LoadSize = getContext().getTypeSizeInChars(ElTy); 4533 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 4534 LoadSize.getQuantity() * 8); 4535 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 4536 llvm::LoadInst *Load = 4537 Builder.CreateAlignedLoad(Ptr, LoadSize); 4538 Load->setVolatile(true); 4539 return Load; 4540 } 4541 case ARM::BI__iso_volatile_store8: 4542 case ARM::BI__iso_volatile_store16: 4543 case ARM::BI__iso_volatile_store32: 4544 case ARM::BI__iso_volatile_store64: { 4545 Value *Ptr = EmitScalarExpr(E->getArg(0)); 4546 Value *Value = EmitScalarExpr(E->getArg(1)); 4547 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 4548 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 4549 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 4550 StoreSize.getQuantity() * 8); 4551 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 4552 llvm::StoreInst *Store = 4553 Builder.CreateAlignedStore(Value, Ptr, 4554 StoreSize); 4555 Store->setVolatile(true); 4556 return Store; 4557 } 4558 } 4559 4560 if (BuiltinID == ARM::BI__builtin_arm_clrex) { 4561 Function *F = CGM.getIntrinsic(Intrinsic::arm_clrex); 4562 return Builder.CreateCall(F); 4563 } 4564 4565 // CRC32 4566 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 4567 switch (BuiltinID) { 4568 case ARM::BI__builtin_arm_crc32b: 4569 CRCIntrinsicID = Intrinsic::arm_crc32b; break; 4570 case ARM::BI__builtin_arm_crc32cb: 4571 CRCIntrinsicID = Intrinsic::arm_crc32cb; break; 4572 case ARM::BI__builtin_arm_crc32h: 4573 CRCIntrinsicID = Intrinsic::arm_crc32h; break; 4574 case ARM::BI__builtin_arm_crc32ch: 4575 CRCIntrinsicID = Intrinsic::arm_crc32ch; break; 4576 case ARM::BI__builtin_arm_crc32w: 4577 case ARM::BI__builtin_arm_crc32d: 4578 CRCIntrinsicID = Intrinsic::arm_crc32w; break; 4579 case ARM::BI__builtin_arm_crc32cw: 4580 case ARM::BI__builtin_arm_crc32cd: 4581 CRCIntrinsicID = Intrinsic::arm_crc32cw; break; 4582 } 4583 4584 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 4585 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 4586 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 4587 4588 // crc32{c,}d intrinsics are implemnted as two calls to crc32{c,}w 4589 // intrinsics, hence we need different codegen for these cases. 4590 if (BuiltinID == ARM::BI__builtin_arm_crc32d || 4591 BuiltinID == ARM::BI__builtin_arm_crc32cd) { 4592 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 4593 Value *Arg1a = Builder.CreateTruncOrBitCast(Arg1, Int32Ty); 4594 Value *Arg1b = Builder.CreateLShr(Arg1, C1); 4595 Arg1b = Builder.CreateTruncOrBitCast(Arg1b, Int32Ty); 4596 4597 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 4598 Value *Res = Builder.CreateCall(F, {Arg0, Arg1a}); 4599 return Builder.CreateCall(F, {Res, Arg1b}); 4600 } else { 4601 Arg1 = Builder.CreateZExtOrBitCast(Arg1, Int32Ty); 4602 4603 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 4604 return Builder.CreateCall(F, {Arg0, Arg1}); 4605 } 4606 } 4607 4608 if (BuiltinID == ARM::BI__builtin_arm_rsr || 4609 BuiltinID == ARM::BI__builtin_arm_rsr64 || 4610 BuiltinID == ARM::BI__builtin_arm_rsrp || 4611 BuiltinID == ARM::BI__builtin_arm_wsr || 4612 BuiltinID == ARM::BI__builtin_arm_wsr64 || 4613 BuiltinID == ARM::BI__builtin_arm_wsrp) { 4614 4615 bool IsRead = BuiltinID == ARM::BI__builtin_arm_rsr || 4616 BuiltinID == ARM::BI__builtin_arm_rsr64 || 4617 BuiltinID == ARM::BI__builtin_arm_rsrp; 4618 4619 bool IsPointerBuiltin = BuiltinID == ARM::BI__builtin_arm_rsrp || 4620 BuiltinID == ARM::BI__builtin_arm_wsrp; 4621 4622 bool Is64Bit = BuiltinID == ARM::BI__builtin_arm_rsr64 || 4623 BuiltinID == ARM::BI__builtin_arm_wsr64; 4624 4625 llvm::Type *ValueType; 4626 llvm::Type *RegisterType; 4627 if (IsPointerBuiltin) { 4628 ValueType = VoidPtrTy; 4629 RegisterType = Int32Ty; 4630 } else if (Is64Bit) { 4631 ValueType = RegisterType = Int64Ty; 4632 } else { 4633 ValueType = RegisterType = Int32Ty; 4634 } 4635 4636 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 4637 } 4638 4639 // Find out if any arguments are required to be integer constant 4640 // expressions. 4641 unsigned ICEArguments = 0; 4642 ASTContext::GetBuiltinTypeError Error; 4643 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 4644 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 4645 4646 auto getAlignmentValue32 = [&](Address addr) -> Value* { 4647 return Builder.getInt32(addr.getAlignment().getQuantity()); 4648 }; 4649 4650 Address PtrOp0 = Address::invalid(); 4651 Address PtrOp1 = Address::invalid(); 4652 SmallVector<Value*, 4> Ops; 4653 bool HasExtraArg = HasExtraNeonArgument(BuiltinID); 4654 unsigned NumArgs = E->getNumArgs() - (HasExtraArg ? 1 : 0); 4655 for (unsigned i = 0, e = NumArgs; i != e; i++) { 4656 if (i == 0) { 4657 switch (BuiltinID) { 4658 case NEON::BI__builtin_neon_vld1_v: 4659 case NEON::BI__builtin_neon_vld1q_v: 4660 case NEON::BI__builtin_neon_vld1q_lane_v: 4661 case NEON::BI__builtin_neon_vld1_lane_v: 4662 case NEON::BI__builtin_neon_vld1_dup_v: 4663 case NEON::BI__builtin_neon_vld1q_dup_v: 4664 case NEON::BI__builtin_neon_vst1_v: 4665 case NEON::BI__builtin_neon_vst1q_v: 4666 case NEON::BI__builtin_neon_vst1q_lane_v: 4667 case NEON::BI__builtin_neon_vst1_lane_v: 4668 case NEON::BI__builtin_neon_vst2_v: 4669 case NEON::BI__builtin_neon_vst2q_v: 4670 case NEON::BI__builtin_neon_vst2_lane_v: 4671 case NEON::BI__builtin_neon_vst2q_lane_v: 4672 case NEON::BI__builtin_neon_vst3_v: 4673 case NEON::BI__builtin_neon_vst3q_v: 4674 case NEON::BI__builtin_neon_vst3_lane_v: 4675 case NEON::BI__builtin_neon_vst3q_lane_v: 4676 case NEON::BI__builtin_neon_vst4_v: 4677 case NEON::BI__builtin_neon_vst4q_v: 4678 case NEON::BI__builtin_neon_vst4_lane_v: 4679 case NEON::BI__builtin_neon_vst4q_lane_v: 4680 // Get the alignment for the argument in addition to the value; 4681 // we'll use it later. 4682 PtrOp0 = EmitPointerWithAlignment(E->getArg(0)); 4683 Ops.push_back(PtrOp0.getPointer()); 4684 continue; 4685 } 4686 } 4687 if (i == 1) { 4688 switch (BuiltinID) { 4689 case NEON::BI__builtin_neon_vld2_v: 4690 case NEON::BI__builtin_neon_vld2q_v: 4691 case NEON::BI__builtin_neon_vld3_v: 4692 case NEON::BI__builtin_neon_vld3q_v: 4693 case NEON::BI__builtin_neon_vld4_v: 4694 case NEON::BI__builtin_neon_vld4q_v: 4695 case NEON::BI__builtin_neon_vld2_lane_v: 4696 case NEON::BI__builtin_neon_vld2q_lane_v: 4697 case NEON::BI__builtin_neon_vld3_lane_v: 4698 case NEON::BI__builtin_neon_vld3q_lane_v: 4699 case NEON::BI__builtin_neon_vld4_lane_v: 4700 case NEON::BI__builtin_neon_vld4q_lane_v: 4701 case NEON::BI__builtin_neon_vld2_dup_v: 4702 case NEON::BI__builtin_neon_vld3_dup_v: 4703 case NEON::BI__builtin_neon_vld4_dup_v: 4704 // Get the alignment for the argument in addition to the value; 4705 // we'll use it later. 4706 PtrOp1 = EmitPointerWithAlignment(E->getArg(1)); 4707 Ops.push_back(PtrOp1.getPointer()); 4708 continue; 4709 } 4710 } 4711 4712 if ((ICEArguments & (1 << i)) == 0) { 4713 Ops.push_back(EmitScalarExpr(E->getArg(i))); 4714 } else { 4715 // If this is required to be a constant, constant fold it so that we know 4716 // that the generated intrinsic gets a ConstantInt. 4717 llvm::APSInt Result; 4718 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 4719 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 4720 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 4721 } 4722 } 4723 4724 switch (BuiltinID) { 4725 default: break; 4726 4727 case NEON::BI__builtin_neon_vget_lane_i8: 4728 case NEON::BI__builtin_neon_vget_lane_i16: 4729 case NEON::BI__builtin_neon_vget_lane_i32: 4730 case NEON::BI__builtin_neon_vget_lane_i64: 4731 case NEON::BI__builtin_neon_vget_lane_f32: 4732 case NEON::BI__builtin_neon_vgetq_lane_i8: 4733 case NEON::BI__builtin_neon_vgetq_lane_i16: 4734 case NEON::BI__builtin_neon_vgetq_lane_i32: 4735 case NEON::BI__builtin_neon_vgetq_lane_i64: 4736 case NEON::BI__builtin_neon_vgetq_lane_f32: 4737 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane"); 4738 4739 case NEON::BI__builtin_neon_vset_lane_i8: 4740 case NEON::BI__builtin_neon_vset_lane_i16: 4741 case NEON::BI__builtin_neon_vset_lane_i32: 4742 case NEON::BI__builtin_neon_vset_lane_i64: 4743 case NEON::BI__builtin_neon_vset_lane_f32: 4744 case NEON::BI__builtin_neon_vsetq_lane_i8: 4745 case NEON::BI__builtin_neon_vsetq_lane_i16: 4746 case NEON::BI__builtin_neon_vsetq_lane_i32: 4747 case NEON::BI__builtin_neon_vsetq_lane_i64: 4748 case NEON::BI__builtin_neon_vsetq_lane_f32: 4749 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4750 4751 case NEON::BI__builtin_neon_vsha1h_u32: 4752 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1h), Ops, 4753 "vsha1h"); 4754 case NEON::BI__builtin_neon_vsha1cq_u32: 4755 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1c), Ops, 4756 "vsha1h"); 4757 case NEON::BI__builtin_neon_vsha1pq_u32: 4758 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1p), Ops, 4759 "vsha1h"); 4760 case NEON::BI__builtin_neon_vsha1mq_u32: 4761 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1m), Ops, 4762 "vsha1h"); 4763 4764 // The ARM _MoveToCoprocessor builtins put the input register value as 4765 // the first argument, but the LLVM intrinsic expects it as the third one. 4766 case ARM::BI_MoveToCoprocessor: 4767 case ARM::BI_MoveToCoprocessor2: { 4768 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI_MoveToCoprocessor ? 4769 Intrinsic::arm_mcr : Intrinsic::arm_mcr2); 4770 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0], 4771 Ops[3], Ops[4], Ops[5]}); 4772 } 4773 case ARM::BI_BitScanForward: 4774 case ARM::BI_BitScanForward64: 4775 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 4776 case ARM::BI_BitScanReverse: 4777 case ARM::BI_BitScanReverse64: 4778 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 4779 4780 case ARM::BI_InterlockedAnd64: 4781 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 4782 case ARM::BI_InterlockedExchange64: 4783 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 4784 case ARM::BI_InterlockedExchangeAdd64: 4785 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 4786 case ARM::BI_InterlockedExchangeSub64: 4787 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 4788 case ARM::BI_InterlockedOr64: 4789 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 4790 case ARM::BI_InterlockedXor64: 4791 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 4792 case ARM::BI_InterlockedDecrement64: 4793 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 4794 case ARM::BI_InterlockedIncrement64: 4795 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 4796 } 4797 4798 // Get the last argument, which specifies the vector type. 4799 assert(HasExtraArg); 4800 llvm::APSInt Result; 4801 const Expr *Arg = E->getArg(E->getNumArgs()-1); 4802 if (!Arg->isIntegerConstantExpr(Result, getContext())) 4803 return nullptr; 4804 4805 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f || 4806 BuiltinID == ARM::BI__builtin_arm_vcvtr_d) { 4807 // Determine the overloaded type of this builtin. 4808 llvm::Type *Ty; 4809 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f) 4810 Ty = FloatTy; 4811 else 4812 Ty = DoubleTy; 4813 4814 // Determine whether this is an unsigned conversion or not. 4815 bool usgn = Result.getZExtValue() == 1; 4816 unsigned Int = usgn ? Intrinsic::arm_vcvtru : Intrinsic::arm_vcvtr; 4817 4818 // Call the appropriate intrinsic. 4819 Function *F = CGM.getIntrinsic(Int, Ty); 4820 return Builder.CreateCall(F, Ops, "vcvtr"); 4821 } 4822 4823 // Determine the type of this overloaded NEON intrinsic. 4824 NeonTypeFlags Type(Result.getZExtValue()); 4825 bool usgn = Type.isUnsigned(); 4826 bool rightShift = false; 4827 4828 llvm::VectorType *VTy = GetNeonType(this, Type); 4829 llvm::Type *Ty = VTy; 4830 if (!Ty) 4831 return nullptr; 4832 4833 // Many NEON builtins have identical semantics and uses in ARM and 4834 // AArch64. Emit these in a single function. 4835 auto IntrinsicMap = makeArrayRef(ARMSIMDIntrinsicMap); 4836 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 4837 IntrinsicMap, BuiltinID, NEONSIMDIntrinsicsProvenSorted); 4838 if (Builtin) 4839 return EmitCommonNeonBuiltinExpr( 4840 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 4841 Builtin->NameHint, Builtin->TypeModifier, E, Ops, PtrOp0, PtrOp1); 4842 4843 unsigned Int; 4844 switch (BuiltinID) { 4845 default: return nullptr; 4846 case NEON::BI__builtin_neon_vld1q_lane_v: 4847 // Handle 64-bit integer elements as a special case. Use shuffles of 4848 // one-element vectors to avoid poor code for i64 in the backend. 4849 if (VTy->getElementType()->isIntegerTy(64)) { 4850 // Extract the other lane. 4851 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4852 uint32_t Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); 4853 Value *SV = llvm::ConstantVector::get(ConstantInt::get(Int32Ty, 1-Lane)); 4854 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 4855 // Load the value as a one-element vector. 4856 Ty = llvm::VectorType::get(VTy->getElementType(), 1); 4857 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4858 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Tys); 4859 Value *Align = getAlignmentValue32(PtrOp0); 4860 Value *Ld = Builder.CreateCall(F, {Ops[0], Align}); 4861 // Combine them. 4862 uint32_t Indices[] = {1 - Lane, Lane}; 4863 SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 4864 return Builder.CreateShuffleVector(Ops[1], Ld, SV, "vld1q_lane"); 4865 } 4866 // fall through 4867 case NEON::BI__builtin_neon_vld1_lane_v: { 4868 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4869 PtrOp0 = Builder.CreateElementBitCast(PtrOp0, VTy->getElementType()); 4870 Value *Ld = Builder.CreateLoad(PtrOp0); 4871 return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); 4872 } 4873 case NEON::BI__builtin_neon_vld2_dup_v: 4874 case NEON::BI__builtin_neon_vld3_dup_v: 4875 case NEON::BI__builtin_neon_vld4_dup_v: { 4876 // Handle 64-bit elements as a special-case. There is no "dup" needed. 4877 if (VTy->getElementType()->getPrimitiveSizeInBits() == 64) { 4878 switch (BuiltinID) { 4879 case NEON::BI__builtin_neon_vld2_dup_v: 4880 Int = Intrinsic::arm_neon_vld2; 4881 break; 4882 case NEON::BI__builtin_neon_vld3_dup_v: 4883 Int = Intrinsic::arm_neon_vld3; 4884 break; 4885 case NEON::BI__builtin_neon_vld4_dup_v: 4886 Int = Intrinsic::arm_neon_vld4; 4887 break; 4888 default: llvm_unreachable("unknown vld_dup intrinsic?"); 4889 } 4890 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4891 Function *F = CGM.getIntrinsic(Int, Tys); 4892 llvm::Value *Align = getAlignmentValue32(PtrOp1); 4893 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, "vld_dup"); 4894 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4895 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4896 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4897 } 4898 switch (BuiltinID) { 4899 case NEON::BI__builtin_neon_vld2_dup_v: 4900 Int = Intrinsic::arm_neon_vld2lane; 4901 break; 4902 case NEON::BI__builtin_neon_vld3_dup_v: 4903 Int = Intrinsic::arm_neon_vld3lane; 4904 break; 4905 case NEON::BI__builtin_neon_vld4_dup_v: 4906 Int = Intrinsic::arm_neon_vld4lane; 4907 break; 4908 default: llvm_unreachable("unknown vld_dup intrinsic?"); 4909 } 4910 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 4911 Function *F = CGM.getIntrinsic(Int, Tys); 4912 llvm::StructType *STy = cast<llvm::StructType>(F->getReturnType()); 4913 4914 SmallVector<Value*, 6> Args; 4915 Args.push_back(Ops[1]); 4916 Args.append(STy->getNumElements(), UndefValue::get(Ty)); 4917 4918 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 4919 Args.push_back(CI); 4920 Args.push_back(getAlignmentValue32(PtrOp1)); 4921 4922 Ops[1] = Builder.CreateCall(F, Args, "vld_dup"); 4923 // splat lane 0 to all elts in each vector of the result. 4924 for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { 4925 Value *Val = Builder.CreateExtractValue(Ops[1], i); 4926 Value *Elt = Builder.CreateBitCast(Val, Ty); 4927 Elt = EmitNeonSplat(Elt, CI); 4928 Elt = Builder.CreateBitCast(Elt, Val->getType()); 4929 Ops[1] = Builder.CreateInsertValue(Ops[1], Elt, i); 4930 } 4931 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4932 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4933 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 4934 } 4935 case NEON::BI__builtin_neon_vqrshrn_n_v: 4936 Int = 4937 usgn ? Intrinsic::arm_neon_vqrshiftnu : Intrinsic::arm_neon_vqrshiftns; 4938 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n", 4939 1, true); 4940 case NEON::BI__builtin_neon_vqrshrun_n_v: 4941 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqrshiftnsu, Ty), 4942 Ops, "vqrshrun_n", 1, true); 4943 case NEON::BI__builtin_neon_vqshrn_n_v: 4944 Int = usgn ? Intrinsic::arm_neon_vqshiftnu : Intrinsic::arm_neon_vqshiftns; 4945 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n", 4946 1, true); 4947 case NEON::BI__builtin_neon_vqshrun_n_v: 4948 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqshiftnsu, Ty), 4949 Ops, "vqshrun_n", 1, true); 4950 case NEON::BI__builtin_neon_vrecpe_v: 4951 case NEON::BI__builtin_neon_vrecpeq_v: 4952 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecpe, Ty), 4953 Ops, "vrecpe"); 4954 case NEON::BI__builtin_neon_vrshrn_n_v: 4955 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrshiftn, Ty), 4956 Ops, "vrshrn_n", 1, true); 4957 case NEON::BI__builtin_neon_vrsra_n_v: 4958 case NEON::BI__builtin_neon_vrsraq_n_v: 4959 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4960 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4961 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, true); 4962 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 4963 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Ty), {Ops[1], Ops[2]}); 4964 return Builder.CreateAdd(Ops[0], Ops[1], "vrsra_n"); 4965 case NEON::BI__builtin_neon_vsri_n_v: 4966 case NEON::BI__builtin_neon_vsriq_n_v: 4967 rightShift = true; 4968 case NEON::BI__builtin_neon_vsli_n_v: 4969 case NEON::BI__builtin_neon_vsliq_n_v: 4970 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, rightShift); 4971 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vshiftins, Ty), 4972 Ops, "vsli_n"); 4973 case NEON::BI__builtin_neon_vsra_n_v: 4974 case NEON::BI__builtin_neon_vsraq_n_v: 4975 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4976 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 4977 return Builder.CreateAdd(Ops[0], Ops[1]); 4978 case NEON::BI__builtin_neon_vst1q_lane_v: 4979 // Handle 64-bit integer elements as a special case. Use a shuffle to get 4980 // a one-element vector and avoid poor code for i64 in the backend. 4981 if (VTy->getElementType()->isIntegerTy(64)) { 4982 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4983 Value *SV = llvm::ConstantVector::get(cast<llvm::Constant>(Ops[2])); 4984 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 4985 Ops[2] = getAlignmentValue32(PtrOp0); 4986 llvm::Type *Tys[] = {Int8PtrTy, Ops[1]->getType()}; 4987 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, 4988 Tys), Ops); 4989 } 4990 // fall through 4991 case NEON::BI__builtin_neon_vst1_lane_v: { 4992 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4993 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 4994 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 4995 auto St = Builder.CreateStore(Ops[1], Builder.CreateBitCast(PtrOp0, Ty)); 4996 return St; 4997 } 4998 case NEON::BI__builtin_neon_vtbl1_v: 4999 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl1), 5000 Ops, "vtbl1"); 5001 case NEON::BI__builtin_neon_vtbl2_v: 5002 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl2), 5003 Ops, "vtbl2"); 5004 case NEON::BI__builtin_neon_vtbl3_v: 5005 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl3), 5006 Ops, "vtbl3"); 5007 case NEON::BI__builtin_neon_vtbl4_v: 5008 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl4), 5009 Ops, "vtbl4"); 5010 case NEON::BI__builtin_neon_vtbx1_v: 5011 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx1), 5012 Ops, "vtbx1"); 5013 case NEON::BI__builtin_neon_vtbx2_v: 5014 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx2), 5015 Ops, "vtbx2"); 5016 case NEON::BI__builtin_neon_vtbx3_v: 5017 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx3), 5018 Ops, "vtbx3"); 5019 case NEON::BI__builtin_neon_vtbx4_v: 5020 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx4), 5021 Ops, "vtbx4"); 5022 } 5023 } 5024 5025 static Value *EmitAArch64TblBuiltinExpr(CodeGenFunction &CGF, unsigned BuiltinID, 5026 const CallExpr *E, 5027 SmallVectorImpl<Value *> &Ops) { 5028 unsigned int Int = 0; 5029 const char *s = nullptr; 5030 5031 switch (BuiltinID) { 5032 default: 5033 return nullptr; 5034 case NEON::BI__builtin_neon_vtbl1_v: 5035 case NEON::BI__builtin_neon_vqtbl1_v: 5036 case NEON::BI__builtin_neon_vqtbl1q_v: 5037 case NEON::BI__builtin_neon_vtbl2_v: 5038 case NEON::BI__builtin_neon_vqtbl2_v: 5039 case NEON::BI__builtin_neon_vqtbl2q_v: 5040 case NEON::BI__builtin_neon_vtbl3_v: 5041 case NEON::BI__builtin_neon_vqtbl3_v: 5042 case NEON::BI__builtin_neon_vqtbl3q_v: 5043 case NEON::BI__builtin_neon_vtbl4_v: 5044 case NEON::BI__builtin_neon_vqtbl4_v: 5045 case NEON::BI__builtin_neon_vqtbl4q_v: 5046 break; 5047 case NEON::BI__builtin_neon_vtbx1_v: 5048 case NEON::BI__builtin_neon_vqtbx1_v: 5049 case NEON::BI__builtin_neon_vqtbx1q_v: 5050 case NEON::BI__builtin_neon_vtbx2_v: 5051 case NEON::BI__builtin_neon_vqtbx2_v: 5052 case NEON::BI__builtin_neon_vqtbx2q_v: 5053 case NEON::BI__builtin_neon_vtbx3_v: 5054 case NEON::BI__builtin_neon_vqtbx3_v: 5055 case NEON::BI__builtin_neon_vqtbx3q_v: 5056 case NEON::BI__builtin_neon_vtbx4_v: 5057 case NEON::BI__builtin_neon_vqtbx4_v: 5058 case NEON::BI__builtin_neon_vqtbx4q_v: 5059 break; 5060 } 5061 5062 assert(E->getNumArgs() >= 3); 5063 5064 // Get the last argument, which specifies the vector type. 5065 llvm::APSInt Result; 5066 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 5067 if (!Arg->isIntegerConstantExpr(Result, CGF.getContext())) 5068 return nullptr; 5069 5070 // Determine the type of this overloaded NEON intrinsic. 5071 NeonTypeFlags Type(Result.getZExtValue()); 5072 llvm::VectorType *Ty = GetNeonType(&CGF, Type); 5073 if (!Ty) 5074 return nullptr; 5075 5076 CodeGen::CGBuilderTy &Builder = CGF.Builder; 5077 5078 // AArch64 scalar builtins are not overloaded, they do not have an extra 5079 // argument that specifies the vector type, need to handle each case. 5080 switch (BuiltinID) { 5081 case NEON::BI__builtin_neon_vtbl1_v: { 5082 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 1), nullptr, 5083 Ops[1], Ty, Intrinsic::aarch64_neon_tbl1, 5084 "vtbl1"); 5085 } 5086 case NEON::BI__builtin_neon_vtbl2_v: { 5087 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 2), nullptr, 5088 Ops[2], Ty, Intrinsic::aarch64_neon_tbl1, 5089 "vtbl1"); 5090 } 5091 case NEON::BI__builtin_neon_vtbl3_v: { 5092 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 3), nullptr, 5093 Ops[3], Ty, Intrinsic::aarch64_neon_tbl2, 5094 "vtbl2"); 5095 } 5096 case NEON::BI__builtin_neon_vtbl4_v: { 5097 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 4), nullptr, 5098 Ops[4], Ty, Intrinsic::aarch64_neon_tbl2, 5099 "vtbl2"); 5100 } 5101 case NEON::BI__builtin_neon_vtbx1_v: { 5102 Value *TblRes = 5103 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 1), nullptr, Ops[2], 5104 Ty, Intrinsic::aarch64_neon_tbl1, "vtbl1"); 5105 5106 llvm::Constant *EightV = ConstantInt::get(Ty, 8); 5107 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[2], EightV); 5108 CmpRes = Builder.CreateSExt(CmpRes, Ty); 5109 5110 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 5111 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 5112 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 5113 } 5114 case NEON::BI__builtin_neon_vtbx2_v: { 5115 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 2), Ops[0], 5116 Ops[3], Ty, Intrinsic::aarch64_neon_tbx1, 5117 "vtbx1"); 5118 } 5119 case NEON::BI__builtin_neon_vtbx3_v: { 5120 Value *TblRes = 5121 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 3), nullptr, Ops[4], 5122 Ty, Intrinsic::aarch64_neon_tbl2, "vtbl2"); 5123 5124 llvm::Constant *TwentyFourV = ConstantInt::get(Ty, 24); 5125 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[4], 5126 TwentyFourV); 5127 CmpRes = Builder.CreateSExt(CmpRes, Ty); 5128 5129 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 5130 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 5131 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 5132 } 5133 case NEON::BI__builtin_neon_vtbx4_v: { 5134 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 4), Ops[0], 5135 Ops[5], Ty, Intrinsic::aarch64_neon_tbx2, 5136 "vtbx2"); 5137 } 5138 case NEON::BI__builtin_neon_vqtbl1_v: 5139 case NEON::BI__builtin_neon_vqtbl1q_v: 5140 Int = Intrinsic::aarch64_neon_tbl1; s = "vtbl1"; break; 5141 case NEON::BI__builtin_neon_vqtbl2_v: 5142 case NEON::BI__builtin_neon_vqtbl2q_v: { 5143 Int = Intrinsic::aarch64_neon_tbl2; s = "vtbl2"; break; 5144 case NEON::BI__builtin_neon_vqtbl3_v: 5145 case NEON::BI__builtin_neon_vqtbl3q_v: 5146 Int = Intrinsic::aarch64_neon_tbl3; s = "vtbl3"; break; 5147 case NEON::BI__builtin_neon_vqtbl4_v: 5148 case NEON::BI__builtin_neon_vqtbl4q_v: 5149 Int = Intrinsic::aarch64_neon_tbl4; s = "vtbl4"; break; 5150 case NEON::BI__builtin_neon_vqtbx1_v: 5151 case NEON::BI__builtin_neon_vqtbx1q_v: 5152 Int = Intrinsic::aarch64_neon_tbx1; s = "vtbx1"; break; 5153 case NEON::BI__builtin_neon_vqtbx2_v: 5154 case NEON::BI__builtin_neon_vqtbx2q_v: 5155 Int = Intrinsic::aarch64_neon_tbx2; s = "vtbx2"; break; 5156 case NEON::BI__builtin_neon_vqtbx3_v: 5157 case NEON::BI__builtin_neon_vqtbx3q_v: 5158 Int = Intrinsic::aarch64_neon_tbx3; s = "vtbx3"; break; 5159 case NEON::BI__builtin_neon_vqtbx4_v: 5160 case NEON::BI__builtin_neon_vqtbx4q_v: 5161 Int = Intrinsic::aarch64_neon_tbx4; s = "vtbx4"; break; 5162 } 5163 } 5164 5165 if (!Int) 5166 return nullptr; 5167 5168 Function *F = CGF.CGM.getIntrinsic(Int, Ty); 5169 return CGF.EmitNeonCall(F, Ops, s); 5170 } 5171 5172 Value *CodeGenFunction::vectorWrapScalar16(Value *Op) { 5173 llvm::Type *VTy = llvm::VectorType::get(Int16Ty, 4); 5174 Op = Builder.CreateBitCast(Op, Int16Ty); 5175 Value *V = UndefValue::get(VTy); 5176 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 5177 Op = Builder.CreateInsertElement(V, Op, CI); 5178 return Op; 5179 } 5180 5181 Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, 5182 const CallExpr *E) { 5183 unsigned HintID = static_cast<unsigned>(-1); 5184 switch (BuiltinID) { 5185 default: break; 5186 case AArch64::BI__builtin_arm_nop: 5187 HintID = 0; 5188 break; 5189 case AArch64::BI__builtin_arm_yield: 5190 HintID = 1; 5191 break; 5192 case AArch64::BI__builtin_arm_wfe: 5193 HintID = 2; 5194 break; 5195 case AArch64::BI__builtin_arm_wfi: 5196 HintID = 3; 5197 break; 5198 case AArch64::BI__builtin_arm_sev: 5199 HintID = 4; 5200 break; 5201 case AArch64::BI__builtin_arm_sevl: 5202 HintID = 5; 5203 break; 5204 } 5205 5206 if (HintID != static_cast<unsigned>(-1)) { 5207 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_hint); 5208 return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID)); 5209 } 5210 5211 if (BuiltinID == AArch64::BI__builtin_arm_prefetch) { 5212 Value *Address = EmitScalarExpr(E->getArg(0)); 5213 Value *RW = EmitScalarExpr(E->getArg(1)); 5214 Value *CacheLevel = EmitScalarExpr(E->getArg(2)); 5215 Value *RetentionPolicy = EmitScalarExpr(E->getArg(3)); 5216 Value *IsData = EmitScalarExpr(E->getArg(4)); 5217 5218 Value *Locality = nullptr; 5219 if (cast<llvm::ConstantInt>(RetentionPolicy)->isZero()) { 5220 // Temporal fetch, needs to convert cache level to locality. 5221 Locality = llvm::ConstantInt::get(Int32Ty, 5222 -cast<llvm::ConstantInt>(CacheLevel)->getValue() + 3); 5223 } else { 5224 // Streaming fetch. 5225 Locality = llvm::ConstantInt::get(Int32Ty, 0); 5226 } 5227 5228 // FIXME: We need AArch64 specific LLVM intrinsic if we want to specify 5229 // PLDL3STRM or PLDL2STRM. 5230 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 5231 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 5232 } 5233 5234 if (BuiltinID == AArch64::BI__builtin_arm_rbit) { 5235 assert((getContext().getTypeSize(E->getType()) == 32) && 5236 "rbit of unusual size!"); 5237 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 5238 return Builder.CreateCall( 5239 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 5240 } 5241 if (BuiltinID == AArch64::BI__builtin_arm_rbit64) { 5242 assert((getContext().getTypeSize(E->getType()) == 64) && 5243 "rbit of unusual size!"); 5244 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 5245 return Builder.CreateCall( 5246 CGM.getIntrinsic(Intrinsic::bitreverse, Arg->getType()), Arg, "rbit"); 5247 } 5248 5249 if (BuiltinID == AArch64::BI__clear_cache) { 5250 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 5251 const FunctionDecl *FD = E->getDirectCallee(); 5252 Value *Ops[2]; 5253 for (unsigned i = 0; i < 2; i++) 5254 Ops[i] = EmitScalarExpr(E->getArg(i)); 5255 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 5256 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 5257 StringRef Name = FD->getName(); 5258 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 5259 } 5260 5261 if ((BuiltinID == AArch64::BI__builtin_arm_ldrex || 5262 BuiltinID == AArch64::BI__builtin_arm_ldaex) && 5263 getContext().getTypeSize(E->getType()) == 128) { 5264 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 5265 ? Intrinsic::aarch64_ldaxp 5266 : Intrinsic::aarch64_ldxp); 5267 5268 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 5269 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 5270 "ldxp"); 5271 5272 Value *Val0 = Builder.CreateExtractValue(Val, 1); 5273 Value *Val1 = Builder.CreateExtractValue(Val, 0); 5274 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 5275 Val0 = Builder.CreateZExt(Val0, Int128Ty); 5276 Val1 = Builder.CreateZExt(Val1, Int128Ty); 5277 5278 Value *ShiftCst = llvm::ConstantInt::get(Int128Ty, 64); 5279 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 5280 Val = Builder.CreateOr(Val, Val1); 5281 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 5282 } else if (BuiltinID == AArch64::BI__builtin_arm_ldrex || 5283 BuiltinID == AArch64::BI__builtin_arm_ldaex) { 5284 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 5285 5286 QualType Ty = E->getType(); 5287 llvm::Type *RealResTy = ConvertType(Ty); 5288 llvm::Type *PtrTy = llvm::IntegerType::get( 5289 getLLVMContext(), getContext().getTypeSize(Ty))->getPointerTo(); 5290 LoadAddr = Builder.CreateBitCast(LoadAddr, PtrTy); 5291 5292 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 5293 ? Intrinsic::aarch64_ldaxr 5294 : Intrinsic::aarch64_ldxr, 5295 PtrTy); 5296 Value *Val = Builder.CreateCall(F, LoadAddr, "ldxr"); 5297 5298 if (RealResTy->isPointerTy()) 5299 return Builder.CreateIntToPtr(Val, RealResTy); 5300 5301 llvm::Type *IntResTy = llvm::IntegerType::get( 5302 getLLVMContext(), CGM.getDataLayout().getTypeSizeInBits(RealResTy)); 5303 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 5304 return Builder.CreateBitCast(Val, RealResTy); 5305 } 5306 5307 if ((BuiltinID == AArch64::BI__builtin_arm_strex || 5308 BuiltinID == AArch64::BI__builtin_arm_stlex) && 5309 getContext().getTypeSize(E->getArg(0)->getType()) == 128) { 5310 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 5311 ? Intrinsic::aarch64_stlxp 5312 : Intrinsic::aarch64_stxp); 5313 llvm::Type *STy = llvm::StructType::get(Int64Ty, Int64Ty, nullptr); 5314 5315 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 5316 EmitAnyExprToMem(E->getArg(0), Tmp, Qualifiers(), /*init*/ true); 5317 5318 Tmp = Builder.CreateBitCast(Tmp, llvm::PointerType::getUnqual(STy)); 5319 llvm::Value *Val = Builder.CreateLoad(Tmp); 5320 5321 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 5322 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 5323 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), 5324 Int8PtrTy); 5325 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "stxp"); 5326 } 5327 5328 if (BuiltinID == AArch64::BI__builtin_arm_strex || 5329 BuiltinID == AArch64::BI__builtin_arm_stlex) { 5330 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 5331 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 5332 5333 QualType Ty = E->getArg(0)->getType(); 5334 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 5335 getContext().getTypeSize(Ty)); 5336 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 5337 5338 if (StoreVal->getType()->isPointerTy()) 5339 StoreVal = Builder.CreatePtrToInt(StoreVal, Int64Ty); 5340 else { 5341 llvm::Type *IntTy = llvm::IntegerType::get( 5342 getLLVMContext(), 5343 CGM.getDataLayout().getTypeSizeInBits(StoreVal->getType())); 5344 StoreVal = Builder.CreateBitCast(StoreVal, IntTy); 5345 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int64Ty); 5346 } 5347 5348 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 5349 ? Intrinsic::aarch64_stlxr 5350 : Intrinsic::aarch64_stxr, 5351 StoreAddr->getType()); 5352 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "stxr"); 5353 } 5354 5355 if (BuiltinID == AArch64::BI__builtin_arm_clrex) { 5356 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_clrex); 5357 return Builder.CreateCall(F); 5358 } 5359 5360 // CRC32 5361 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 5362 switch (BuiltinID) { 5363 case AArch64::BI__builtin_arm_crc32b: 5364 CRCIntrinsicID = Intrinsic::aarch64_crc32b; break; 5365 case AArch64::BI__builtin_arm_crc32cb: 5366 CRCIntrinsicID = Intrinsic::aarch64_crc32cb; break; 5367 case AArch64::BI__builtin_arm_crc32h: 5368 CRCIntrinsicID = Intrinsic::aarch64_crc32h; break; 5369 case AArch64::BI__builtin_arm_crc32ch: 5370 CRCIntrinsicID = Intrinsic::aarch64_crc32ch; break; 5371 case AArch64::BI__builtin_arm_crc32w: 5372 CRCIntrinsicID = Intrinsic::aarch64_crc32w; break; 5373 case AArch64::BI__builtin_arm_crc32cw: 5374 CRCIntrinsicID = Intrinsic::aarch64_crc32cw; break; 5375 case AArch64::BI__builtin_arm_crc32d: 5376 CRCIntrinsicID = Intrinsic::aarch64_crc32x; break; 5377 case AArch64::BI__builtin_arm_crc32cd: 5378 CRCIntrinsicID = Intrinsic::aarch64_crc32cx; break; 5379 } 5380 5381 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 5382 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 5383 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 5384 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 5385 5386 llvm::Type *DataTy = F->getFunctionType()->getParamType(1); 5387 Arg1 = Builder.CreateZExtOrBitCast(Arg1, DataTy); 5388 5389 return Builder.CreateCall(F, {Arg0, Arg1}); 5390 } 5391 5392 if (BuiltinID == AArch64::BI__builtin_arm_rsr || 5393 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 5394 BuiltinID == AArch64::BI__builtin_arm_rsrp || 5395 BuiltinID == AArch64::BI__builtin_arm_wsr || 5396 BuiltinID == AArch64::BI__builtin_arm_wsr64 || 5397 BuiltinID == AArch64::BI__builtin_arm_wsrp) { 5398 5399 bool IsRead = BuiltinID == AArch64::BI__builtin_arm_rsr || 5400 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 5401 BuiltinID == AArch64::BI__builtin_arm_rsrp; 5402 5403 bool IsPointerBuiltin = BuiltinID == AArch64::BI__builtin_arm_rsrp || 5404 BuiltinID == AArch64::BI__builtin_arm_wsrp; 5405 5406 bool Is64Bit = BuiltinID != AArch64::BI__builtin_arm_rsr && 5407 BuiltinID != AArch64::BI__builtin_arm_wsr; 5408 5409 llvm::Type *ValueType; 5410 llvm::Type *RegisterType = Int64Ty; 5411 if (IsPointerBuiltin) { 5412 ValueType = VoidPtrTy; 5413 } else if (Is64Bit) { 5414 ValueType = Int64Ty; 5415 } else { 5416 ValueType = Int32Ty; 5417 } 5418 5419 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 5420 } 5421 5422 // Find out if any arguments are required to be integer constant 5423 // expressions. 5424 unsigned ICEArguments = 0; 5425 ASTContext::GetBuiltinTypeError Error; 5426 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 5427 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 5428 5429 llvm::SmallVector<Value*, 4> Ops; 5430 for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; i++) { 5431 if ((ICEArguments & (1 << i)) == 0) { 5432 Ops.push_back(EmitScalarExpr(E->getArg(i))); 5433 } else { 5434 // If this is required to be a constant, constant fold it so that we know 5435 // that the generated intrinsic gets a ConstantInt. 5436 llvm::APSInt Result; 5437 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 5438 assert(IsConst && "Constant arg isn't actually constant?"); 5439 (void)IsConst; 5440 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 5441 } 5442 } 5443 5444 auto SISDMap = makeArrayRef(AArch64SISDIntrinsicMap); 5445 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 5446 SISDMap, BuiltinID, AArch64SISDIntrinsicsProvenSorted); 5447 5448 if (Builtin) { 5449 Ops.push_back(EmitScalarExpr(E->getArg(E->getNumArgs() - 1))); 5450 Value *Result = EmitCommonNeonSISDBuiltinExpr(*this, *Builtin, Ops, E); 5451 assert(Result && "SISD intrinsic should have been handled"); 5452 return Result; 5453 } 5454 5455 llvm::APSInt Result; 5456 const Expr *Arg = E->getArg(E->getNumArgs()-1); 5457 NeonTypeFlags Type(0); 5458 if (Arg->isIntegerConstantExpr(Result, getContext())) 5459 // Determine the type of this overloaded NEON intrinsic. 5460 Type = NeonTypeFlags(Result.getZExtValue()); 5461 5462 bool usgn = Type.isUnsigned(); 5463 bool quad = Type.isQuad(); 5464 5465 // Handle non-overloaded intrinsics first. 5466 switch (BuiltinID) { 5467 default: break; 5468 case NEON::BI__builtin_neon_vldrq_p128: { 5469 llvm::Type *Int128Ty = llvm::Type::getIntNTy(getLLVMContext(), 128); 5470 llvm::Type *Int128PTy = llvm::PointerType::get(Int128Ty, 0); 5471 Value *Ptr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PTy); 5472 return Builder.CreateAlignedLoad(Int128Ty, Ptr, 5473 CharUnits::fromQuantity(16)); 5474 } 5475 case NEON::BI__builtin_neon_vstrq_p128: { 5476 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 5477 Value *Ptr = Builder.CreateBitCast(Ops[0], Int128PTy); 5478 return Builder.CreateDefaultAlignedStore(EmitScalarExpr(E->getArg(1)), Ptr); 5479 } 5480 case NEON::BI__builtin_neon_vcvts_u32_f32: 5481 case NEON::BI__builtin_neon_vcvtd_u64_f64: 5482 usgn = true; 5483 // FALL THROUGH 5484 case NEON::BI__builtin_neon_vcvts_s32_f32: 5485 case NEON::BI__builtin_neon_vcvtd_s64_f64: { 5486 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5487 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 5488 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 5489 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 5490 Ops[0] = Builder.CreateBitCast(Ops[0], FTy); 5491 if (usgn) 5492 return Builder.CreateFPToUI(Ops[0], InTy); 5493 return Builder.CreateFPToSI(Ops[0], InTy); 5494 } 5495 case NEON::BI__builtin_neon_vcvts_f32_u32: 5496 case NEON::BI__builtin_neon_vcvtd_f64_u64: 5497 usgn = true; 5498 // FALL THROUGH 5499 case NEON::BI__builtin_neon_vcvts_f32_s32: 5500 case NEON::BI__builtin_neon_vcvtd_f64_s64: { 5501 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5502 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 5503 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 5504 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 5505 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 5506 if (usgn) 5507 return Builder.CreateUIToFP(Ops[0], FTy); 5508 return Builder.CreateSIToFP(Ops[0], FTy); 5509 } 5510 case NEON::BI__builtin_neon_vpaddd_s64: { 5511 llvm::Type *Ty = llvm::VectorType::get(Int64Ty, 2); 5512 Value *Vec = EmitScalarExpr(E->getArg(0)); 5513 // The vector is v2f64, so make sure it's bitcast to that. 5514 Vec = Builder.CreateBitCast(Vec, Ty, "v2i64"); 5515 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 5516 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 5517 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 5518 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 5519 // Pairwise addition of a v2f64 into a scalar f64. 5520 return Builder.CreateAdd(Op0, Op1, "vpaddd"); 5521 } 5522 case NEON::BI__builtin_neon_vpaddd_f64: { 5523 llvm::Type *Ty = 5524 llvm::VectorType::get(DoubleTy, 2); 5525 Value *Vec = EmitScalarExpr(E->getArg(0)); 5526 // The vector is v2f64, so make sure it's bitcast to that. 5527 Vec = Builder.CreateBitCast(Vec, Ty, "v2f64"); 5528 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 5529 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 5530 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 5531 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 5532 // Pairwise addition of a v2f64 into a scalar f64. 5533 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 5534 } 5535 case NEON::BI__builtin_neon_vpadds_f32: { 5536 llvm::Type *Ty = 5537 llvm::VectorType::get(FloatTy, 2); 5538 Value *Vec = EmitScalarExpr(E->getArg(0)); 5539 // The vector is v2f32, so make sure it's bitcast to that. 5540 Vec = Builder.CreateBitCast(Vec, Ty, "v2f32"); 5541 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 5542 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 5543 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 5544 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 5545 // Pairwise addition of a v2f32 into a scalar f32. 5546 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 5547 } 5548 case NEON::BI__builtin_neon_vceqzd_s64: 5549 case NEON::BI__builtin_neon_vceqzd_f64: 5550 case NEON::BI__builtin_neon_vceqzs_f32: 5551 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5552 return EmitAArch64CompareBuiltinExpr( 5553 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5554 ICmpInst::FCMP_OEQ, ICmpInst::ICMP_EQ, "vceqz"); 5555 case NEON::BI__builtin_neon_vcgezd_s64: 5556 case NEON::BI__builtin_neon_vcgezd_f64: 5557 case NEON::BI__builtin_neon_vcgezs_f32: 5558 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5559 return EmitAArch64CompareBuiltinExpr( 5560 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5561 ICmpInst::FCMP_OGE, ICmpInst::ICMP_SGE, "vcgez"); 5562 case NEON::BI__builtin_neon_vclezd_s64: 5563 case NEON::BI__builtin_neon_vclezd_f64: 5564 case NEON::BI__builtin_neon_vclezs_f32: 5565 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5566 return EmitAArch64CompareBuiltinExpr( 5567 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5568 ICmpInst::FCMP_OLE, ICmpInst::ICMP_SLE, "vclez"); 5569 case NEON::BI__builtin_neon_vcgtzd_s64: 5570 case NEON::BI__builtin_neon_vcgtzd_f64: 5571 case NEON::BI__builtin_neon_vcgtzs_f32: 5572 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5573 return EmitAArch64CompareBuiltinExpr( 5574 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5575 ICmpInst::FCMP_OGT, ICmpInst::ICMP_SGT, "vcgtz"); 5576 case NEON::BI__builtin_neon_vcltzd_s64: 5577 case NEON::BI__builtin_neon_vcltzd_f64: 5578 case NEON::BI__builtin_neon_vcltzs_f32: 5579 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5580 return EmitAArch64CompareBuiltinExpr( 5581 Ops[0], ConvertType(E->getCallReturnType(getContext())), 5582 ICmpInst::FCMP_OLT, ICmpInst::ICMP_SLT, "vcltz"); 5583 5584 case NEON::BI__builtin_neon_vceqzd_u64: { 5585 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5586 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 5587 Ops[0] = 5588 Builder.CreateICmpEQ(Ops[0], llvm::Constant::getNullValue(Int64Ty)); 5589 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqzd"); 5590 } 5591 case NEON::BI__builtin_neon_vceqd_f64: 5592 case NEON::BI__builtin_neon_vcled_f64: 5593 case NEON::BI__builtin_neon_vcltd_f64: 5594 case NEON::BI__builtin_neon_vcged_f64: 5595 case NEON::BI__builtin_neon_vcgtd_f64: { 5596 llvm::CmpInst::Predicate P; 5597 switch (BuiltinID) { 5598 default: llvm_unreachable("missing builtin ID in switch!"); 5599 case NEON::BI__builtin_neon_vceqd_f64: P = llvm::FCmpInst::FCMP_OEQ; break; 5600 case NEON::BI__builtin_neon_vcled_f64: P = llvm::FCmpInst::FCMP_OLE; break; 5601 case NEON::BI__builtin_neon_vcltd_f64: P = llvm::FCmpInst::FCMP_OLT; break; 5602 case NEON::BI__builtin_neon_vcged_f64: P = llvm::FCmpInst::FCMP_OGE; break; 5603 case NEON::BI__builtin_neon_vcgtd_f64: P = llvm::FCmpInst::FCMP_OGT; break; 5604 } 5605 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5606 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5607 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 5608 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 5609 return Builder.CreateSExt(Ops[0], Int64Ty, "vcmpd"); 5610 } 5611 case NEON::BI__builtin_neon_vceqs_f32: 5612 case NEON::BI__builtin_neon_vcles_f32: 5613 case NEON::BI__builtin_neon_vclts_f32: 5614 case NEON::BI__builtin_neon_vcges_f32: 5615 case NEON::BI__builtin_neon_vcgts_f32: { 5616 llvm::CmpInst::Predicate P; 5617 switch (BuiltinID) { 5618 default: llvm_unreachable("missing builtin ID in switch!"); 5619 case NEON::BI__builtin_neon_vceqs_f32: P = llvm::FCmpInst::FCMP_OEQ; break; 5620 case NEON::BI__builtin_neon_vcles_f32: P = llvm::FCmpInst::FCMP_OLE; break; 5621 case NEON::BI__builtin_neon_vclts_f32: P = llvm::FCmpInst::FCMP_OLT; break; 5622 case NEON::BI__builtin_neon_vcges_f32: P = llvm::FCmpInst::FCMP_OGE; break; 5623 case NEON::BI__builtin_neon_vcgts_f32: P = llvm::FCmpInst::FCMP_OGT; break; 5624 } 5625 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5626 Ops[0] = Builder.CreateBitCast(Ops[0], FloatTy); 5627 Ops[1] = Builder.CreateBitCast(Ops[1], FloatTy); 5628 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 5629 return Builder.CreateSExt(Ops[0], Int32Ty, "vcmpd"); 5630 } 5631 case NEON::BI__builtin_neon_vceqd_s64: 5632 case NEON::BI__builtin_neon_vceqd_u64: 5633 case NEON::BI__builtin_neon_vcgtd_s64: 5634 case NEON::BI__builtin_neon_vcgtd_u64: 5635 case NEON::BI__builtin_neon_vcltd_s64: 5636 case NEON::BI__builtin_neon_vcltd_u64: 5637 case NEON::BI__builtin_neon_vcged_u64: 5638 case NEON::BI__builtin_neon_vcged_s64: 5639 case NEON::BI__builtin_neon_vcled_u64: 5640 case NEON::BI__builtin_neon_vcled_s64: { 5641 llvm::CmpInst::Predicate P; 5642 switch (BuiltinID) { 5643 default: llvm_unreachable("missing builtin ID in switch!"); 5644 case NEON::BI__builtin_neon_vceqd_s64: 5645 case NEON::BI__builtin_neon_vceqd_u64:P = llvm::ICmpInst::ICMP_EQ;break; 5646 case NEON::BI__builtin_neon_vcgtd_s64:P = llvm::ICmpInst::ICMP_SGT;break; 5647 case NEON::BI__builtin_neon_vcgtd_u64:P = llvm::ICmpInst::ICMP_UGT;break; 5648 case NEON::BI__builtin_neon_vcltd_s64:P = llvm::ICmpInst::ICMP_SLT;break; 5649 case NEON::BI__builtin_neon_vcltd_u64:P = llvm::ICmpInst::ICMP_ULT;break; 5650 case NEON::BI__builtin_neon_vcged_u64:P = llvm::ICmpInst::ICMP_UGE;break; 5651 case NEON::BI__builtin_neon_vcged_s64:P = llvm::ICmpInst::ICMP_SGE;break; 5652 case NEON::BI__builtin_neon_vcled_u64:P = llvm::ICmpInst::ICMP_ULE;break; 5653 case NEON::BI__builtin_neon_vcled_s64:P = llvm::ICmpInst::ICMP_SLE;break; 5654 } 5655 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5656 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 5657 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 5658 Ops[0] = Builder.CreateICmp(P, Ops[0], Ops[1]); 5659 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqd"); 5660 } 5661 case NEON::BI__builtin_neon_vtstd_s64: 5662 case NEON::BI__builtin_neon_vtstd_u64: { 5663 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5664 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 5665 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 5666 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 5667 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 5668 llvm::Constant::getNullValue(Int64Ty)); 5669 return Builder.CreateSExt(Ops[0], Int64Ty, "vtstd"); 5670 } 5671 case NEON::BI__builtin_neon_vset_lane_i8: 5672 case NEON::BI__builtin_neon_vset_lane_i16: 5673 case NEON::BI__builtin_neon_vset_lane_i32: 5674 case NEON::BI__builtin_neon_vset_lane_i64: 5675 case NEON::BI__builtin_neon_vset_lane_f32: 5676 case NEON::BI__builtin_neon_vsetq_lane_i8: 5677 case NEON::BI__builtin_neon_vsetq_lane_i16: 5678 case NEON::BI__builtin_neon_vsetq_lane_i32: 5679 case NEON::BI__builtin_neon_vsetq_lane_i64: 5680 case NEON::BI__builtin_neon_vsetq_lane_f32: 5681 Ops.push_back(EmitScalarExpr(E->getArg(2))); 5682 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5683 case NEON::BI__builtin_neon_vset_lane_f64: 5684 // The vector type needs a cast for the v1f64 variant. 5685 Ops[1] = Builder.CreateBitCast(Ops[1], 5686 llvm::VectorType::get(DoubleTy, 1)); 5687 Ops.push_back(EmitScalarExpr(E->getArg(2))); 5688 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5689 case NEON::BI__builtin_neon_vsetq_lane_f64: 5690 // The vector type needs a cast for the v2f64 variant. 5691 Ops[1] = Builder.CreateBitCast(Ops[1], 5692 llvm::VectorType::get(DoubleTy, 2)); 5693 Ops.push_back(EmitScalarExpr(E->getArg(2))); 5694 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 5695 5696 case NEON::BI__builtin_neon_vget_lane_i8: 5697 case NEON::BI__builtin_neon_vdupb_lane_i8: 5698 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 8)); 5699 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5700 "vget_lane"); 5701 case NEON::BI__builtin_neon_vgetq_lane_i8: 5702 case NEON::BI__builtin_neon_vdupb_laneq_i8: 5703 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 16)); 5704 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5705 "vgetq_lane"); 5706 case NEON::BI__builtin_neon_vget_lane_i16: 5707 case NEON::BI__builtin_neon_vduph_lane_i16: 5708 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 4)); 5709 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5710 "vget_lane"); 5711 case NEON::BI__builtin_neon_vgetq_lane_i16: 5712 case NEON::BI__builtin_neon_vduph_laneq_i16: 5713 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 8)); 5714 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5715 "vgetq_lane"); 5716 case NEON::BI__builtin_neon_vget_lane_i32: 5717 case NEON::BI__builtin_neon_vdups_lane_i32: 5718 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 2)); 5719 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5720 "vget_lane"); 5721 case NEON::BI__builtin_neon_vdups_lane_f32: 5722 Ops[0] = Builder.CreateBitCast(Ops[0], 5723 llvm::VectorType::get(FloatTy, 2)); 5724 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5725 "vdups_lane"); 5726 case NEON::BI__builtin_neon_vgetq_lane_i32: 5727 case NEON::BI__builtin_neon_vdups_laneq_i32: 5728 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 5729 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5730 "vgetq_lane"); 5731 case NEON::BI__builtin_neon_vget_lane_i64: 5732 case NEON::BI__builtin_neon_vdupd_lane_i64: 5733 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 1)); 5734 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5735 "vget_lane"); 5736 case NEON::BI__builtin_neon_vdupd_lane_f64: 5737 Ops[0] = Builder.CreateBitCast(Ops[0], 5738 llvm::VectorType::get(DoubleTy, 1)); 5739 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5740 "vdupd_lane"); 5741 case NEON::BI__builtin_neon_vgetq_lane_i64: 5742 case NEON::BI__builtin_neon_vdupd_laneq_i64: 5743 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 5744 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5745 "vgetq_lane"); 5746 case NEON::BI__builtin_neon_vget_lane_f32: 5747 Ops[0] = Builder.CreateBitCast(Ops[0], 5748 llvm::VectorType::get(FloatTy, 2)); 5749 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5750 "vget_lane"); 5751 case NEON::BI__builtin_neon_vget_lane_f64: 5752 Ops[0] = Builder.CreateBitCast(Ops[0], 5753 llvm::VectorType::get(DoubleTy, 1)); 5754 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5755 "vget_lane"); 5756 case NEON::BI__builtin_neon_vgetq_lane_f32: 5757 case NEON::BI__builtin_neon_vdups_laneq_f32: 5758 Ops[0] = Builder.CreateBitCast(Ops[0], 5759 llvm::VectorType::get(FloatTy, 4)); 5760 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5761 "vgetq_lane"); 5762 case NEON::BI__builtin_neon_vgetq_lane_f64: 5763 case NEON::BI__builtin_neon_vdupd_laneq_f64: 5764 Ops[0] = Builder.CreateBitCast(Ops[0], 5765 llvm::VectorType::get(DoubleTy, 2)); 5766 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 5767 "vgetq_lane"); 5768 case NEON::BI__builtin_neon_vaddd_s64: 5769 case NEON::BI__builtin_neon_vaddd_u64: 5770 return Builder.CreateAdd(Ops[0], EmitScalarExpr(E->getArg(1)), "vaddd"); 5771 case NEON::BI__builtin_neon_vsubd_s64: 5772 case NEON::BI__builtin_neon_vsubd_u64: 5773 return Builder.CreateSub(Ops[0], EmitScalarExpr(E->getArg(1)), "vsubd"); 5774 case NEON::BI__builtin_neon_vqdmlalh_s16: 5775 case NEON::BI__builtin_neon_vqdmlslh_s16: { 5776 SmallVector<Value *, 2> ProductOps; 5777 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 5778 ProductOps.push_back(vectorWrapScalar16(EmitScalarExpr(E->getArg(2)))); 5779 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 5780 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 5781 ProductOps, "vqdmlXl"); 5782 Constant *CI = ConstantInt::get(SizeTy, 0); 5783 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 5784 5785 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlalh_s16 5786 ? Intrinsic::aarch64_neon_sqadd 5787 : Intrinsic::aarch64_neon_sqsub; 5788 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int32Ty), Ops, "vqdmlXl"); 5789 } 5790 case NEON::BI__builtin_neon_vqshlud_n_s64: { 5791 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5792 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 5793 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqshlu, Int64Ty), 5794 Ops, "vqshlu_n"); 5795 } 5796 case NEON::BI__builtin_neon_vqshld_n_u64: 5797 case NEON::BI__builtin_neon_vqshld_n_s64: { 5798 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vqshld_n_u64 5799 ? Intrinsic::aarch64_neon_uqshl 5800 : Intrinsic::aarch64_neon_sqshl; 5801 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5802 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 5803 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vqshl_n"); 5804 } 5805 case NEON::BI__builtin_neon_vrshrd_n_u64: 5806 case NEON::BI__builtin_neon_vrshrd_n_s64: { 5807 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrshrd_n_u64 5808 ? Intrinsic::aarch64_neon_urshl 5809 : Intrinsic::aarch64_neon_srshl; 5810 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5811 int SV = cast<ConstantInt>(Ops[1])->getSExtValue(); 5812 Ops[1] = ConstantInt::get(Int64Ty, -SV); 5813 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vrshr_n"); 5814 } 5815 case NEON::BI__builtin_neon_vrsrad_n_u64: 5816 case NEON::BI__builtin_neon_vrsrad_n_s64: { 5817 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrsrad_n_u64 5818 ? Intrinsic::aarch64_neon_urshl 5819 : Intrinsic::aarch64_neon_srshl; 5820 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 5821 Ops.push_back(Builder.CreateNeg(EmitScalarExpr(E->getArg(2)))); 5822 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Int64Ty), 5823 {Ops[1], Builder.CreateSExt(Ops[2], Int64Ty)}); 5824 return Builder.CreateAdd(Ops[0], Builder.CreateBitCast(Ops[1], Int64Ty)); 5825 } 5826 case NEON::BI__builtin_neon_vshld_n_s64: 5827 case NEON::BI__builtin_neon_vshld_n_u64: { 5828 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 5829 return Builder.CreateShl( 5830 Ops[0], ConstantInt::get(Int64Ty, Amt->getZExtValue()), "shld_n"); 5831 } 5832 case NEON::BI__builtin_neon_vshrd_n_s64: { 5833 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 5834 return Builder.CreateAShr( 5835 Ops[0], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 5836 Amt->getZExtValue())), 5837 "shrd_n"); 5838 } 5839 case NEON::BI__builtin_neon_vshrd_n_u64: { 5840 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 5841 uint64_t ShiftAmt = Amt->getZExtValue(); 5842 // Right-shifting an unsigned value by its size yields 0. 5843 if (ShiftAmt == 64) 5844 return ConstantInt::get(Int64Ty, 0); 5845 return Builder.CreateLShr(Ops[0], ConstantInt::get(Int64Ty, ShiftAmt), 5846 "shrd_n"); 5847 } 5848 case NEON::BI__builtin_neon_vsrad_n_s64: { 5849 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 5850 Ops[1] = Builder.CreateAShr( 5851 Ops[1], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 5852 Amt->getZExtValue())), 5853 "shrd_n"); 5854 return Builder.CreateAdd(Ops[0], Ops[1]); 5855 } 5856 case NEON::BI__builtin_neon_vsrad_n_u64: { 5857 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 5858 uint64_t ShiftAmt = Amt->getZExtValue(); 5859 // Right-shifting an unsigned value by its size yields 0. 5860 // As Op + 0 = Op, return Ops[0] directly. 5861 if (ShiftAmt == 64) 5862 return Ops[0]; 5863 Ops[1] = Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, ShiftAmt), 5864 "shrd_n"); 5865 return Builder.CreateAdd(Ops[0], Ops[1]); 5866 } 5867 case NEON::BI__builtin_neon_vqdmlalh_lane_s16: 5868 case NEON::BI__builtin_neon_vqdmlalh_laneq_s16: 5869 case NEON::BI__builtin_neon_vqdmlslh_lane_s16: 5870 case NEON::BI__builtin_neon_vqdmlslh_laneq_s16: { 5871 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 5872 "lane"); 5873 SmallVector<Value *, 2> ProductOps; 5874 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 5875 ProductOps.push_back(vectorWrapScalar16(Ops[2])); 5876 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 5877 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 5878 ProductOps, "vqdmlXl"); 5879 Constant *CI = ConstantInt::get(SizeTy, 0); 5880 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 5881 Ops.pop_back(); 5882 5883 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlalh_lane_s16 || 5884 BuiltinID == NEON::BI__builtin_neon_vqdmlalh_laneq_s16) 5885 ? Intrinsic::aarch64_neon_sqadd 5886 : Intrinsic::aarch64_neon_sqsub; 5887 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int32Ty), Ops, "vqdmlXl"); 5888 } 5889 case NEON::BI__builtin_neon_vqdmlals_s32: 5890 case NEON::BI__builtin_neon_vqdmlsls_s32: { 5891 SmallVector<Value *, 2> ProductOps; 5892 ProductOps.push_back(Ops[1]); 5893 ProductOps.push_back(EmitScalarExpr(E->getArg(2))); 5894 Ops[1] = 5895 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 5896 ProductOps, "vqdmlXl"); 5897 5898 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlals_s32 5899 ? Intrinsic::aarch64_neon_sqadd 5900 : Intrinsic::aarch64_neon_sqsub; 5901 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int64Ty), Ops, "vqdmlXl"); 5902 } 5903 case NEON::BI__builtin_neon_vqdmlals_lane_s32: 5904 case NEON::BI__builtin_neon_vqdmlals_laneq_s32: 5905 case NEON::BI__builtin_neon_vqdmlsls_lane_s32: 5906 case NEON::BI__builtin_neon_vqdmlsls_laneq_s32: { 5907 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 5908 "lane"); 5909 SmallVector<Value *, 2> ProductOps; 5910 ProductOps.push_back(Ops[1]); 5911 ProductOps.push_back(Ops[2]); 5912 Ops[1] = 5913 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 5914 ProductOps, "vqdmlXl"); 5915 Ops.pop_back(); 5916 5917 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlals_lane_s32 || 5918 BuiltinID == NEON::BI__builtin_neon_vqdmlals_laneq_s32) 5919 ? Intrinsic::aarch64_neon_sqadd 5920 : Intrinsic::aarch64_neon_sqsub; 5921 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl"); 5922 } 5923 } 5924 5925 llvm::VectorType *VTy = GetNeonType(this, Type); 5926 llvm::Type *Ty = VTy; 5927 if (!Ty) 5928 return nullptr; 5929 5930 // Not all intrinsics handled by the common case work for AArch64 yet, so only 5931 // defer to common code if it's been added to our special map. 5932 Builtin = findNeonIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID, 5933 AArch64SIMDIntrinsicsProvenSorted); 5934 5935 if (Builtin) 5936 return EmitCommonNeonBuiltinExpr( 5937 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 5938 Builtin->NameHint, Builtin->TypeModifier, E, Ops, 5939 /*never use addresses*/ Address::invalid(), Address::invalid()); 5940 5941 if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops)) 5942 return V; 5943 5944 unsigned Int; 5945 switch (BuiltinID) { 5946 default: return nullptr; 5947 case NEON::BI__builtin_neon_vbsl_v: 5948 case NEON::BI__builtin_neon_vbslq_v: { 5949 llvm::Type *BitTy = llvm::VectorType::getInteger(VTy); 5950 Ops[0] = Builder.CreateBitCast(Ops[0], BitTy, "vbsl"); 5951 Ops[1] = Builder.CreateBitCast(Ops[1], BitTy, "vbsl"); 5952 Ops[2] = Builder.CreateBitCast(Ops[2], BitTy, "vbsl"); 5953 5954 Ops[1] = Builder.CreateAnd(Ops[0], Ops[1], "vbsl"); 5955 Ops[2] = Builder.CreateAnd(Builder.CreateNot(Ops[0]), Ops[2], "vbsl"); 5956 Ops[0] = Builder.CreateOr(Ops[1], Ops[2], "vbsl"); 5957 return Builder.CreateBitCast(Ops[0], Ty); 5958 } 5959 case NEON::BI__builtin_neon_vfma_lane_v: 5960 case NEON::BI__builtin_neon_vfmaq_lane_v: { // Only used for FP types 5961 // The ARM builtins (and instructions) have the addend as the first 5962 // operand, but the 'fma' intrinsics have it last. Swap it around here. 5963 Value *Addend = Ops[0]; 5964 Value *Multiplicand = Ops[1]; 5965 Value *LaneSource = Ops[2]; 5966 Ops[0] = Multiplicand; 5967 Ops[1] = LaneSource; 5968 Ops[2] = Addend; 5969 5970 // Now adjust things to handle the lane access. 5971 llvm::Type *SourceTy = BuiltinID == NEON::BI__builtin_neon_vfmaq_lane_v ? 5972 llvm::VectorType::get(VTy->getElementType(), VTy->getNumElements() / 2) : 5973 VTy; 5974 llvm::Constant *cst = cast<Constant>(Ops[3]); 5975 Value *SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), cst); 5976 Ops[1] = Builder.CreateBitCast(Ops[1], SourceTy); 5977 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV, "lane"); 5978 5979 Ops.pop_back(); 5980 Int = Intrinsic::fma; 5981 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmla"); 5982 } 5983 case NEON::BI__builtin_neon_vfma_laneq_v: { 5984 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 5985 // v1f64 fma should be mapped to Neon scalar f64 fma 5986 if (VTy && VTy->getElementType() == DoubleTy) { 5987 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5988 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 5989 llvm::Type *VTy = GetNeonType(this, 5990 NeonTypeFlags(NeonTypeFlags::Float64, false, true)); 5991 Ops[2] = Builder.CreateBitCast(Ops[2], VTy); 5992 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 5993 Value *F = CGM.getIntrinsic(Intrinsic::fma, DoubleTy); 5994 Value *Result = Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 5995 return Builder.CreateBitCast(Result, Ty); 5996 } 5997 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5998 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5999 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6000 6001 llvm::Type *STy = llvm::VectorType::get(VTy->getElementType(), 6002 VTy->getNumElements() * 2); 6003 Ops[2] = Builder.CreateBitCast(Ops[2], STy); 6004 Value* SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), 6005 cast<ConstantInt>(Ops[3])); 6006 Ops[2] = Builder.CreateShuffleVector(Ops[2], Ops[2], SV, "lane"); 6007 6008 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 6009 } 6010 case NEON::BI__builtin_neon_vfmaq_laneq_v: { 6011 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 6012 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6013 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6014 6015 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6016 Ops[2] = EmitNeonSplat(Ops[2], cast<ConstantInt>(Ops[3])); 6017 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 6018 } 6019 case NEON::BI__builtin_neon_vfmas_lane_f32: 6020 case NEON::BI__builtin_neon_vfmas_laneq_f32: 6021 case NEON::BI__builtin_neon_vfmad_lane_f64: 6022 case NEON::BI__builtin_neon_vfmad_laneq_f64: { 6023 Ops.push_back(EmitScalarExpr(E->getArg(3))); 6024 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 6025 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 6026 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 6027 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 6028 } 6029 case NEON::BI__builtin_neon_vmull_v: 6030 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6031 Int = usgn ? Intrinsic::aarch64_neon_umull : Intrinsic::aarch64_neon_smull; 6032 if (Type.isPoly()) Int = Intrinsic::aarch64_neon_pmull; 6033 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 6034 case NEON::BI__builtin_neon_vmax_v: 6035 case NEON::BI__builtin_neon_vmaxq_v: 6036 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6037 Int = usgn ? Intrinsic::aarch64_neon_umax : Intrinsic::aarch64_neon_smax; 6038 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmax; 6039 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmax"); 6040 case NEON::BI__builtin_neon_vmin_v: 6041 case NEON::BI__builtin_neon_vminq_v: 6042 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6043 Int = usgn ? Intrinsic::aarch64_neon_umin : Intrinsic::aarch64_neon_smin; 6044 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmin; 6045 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmin"); 6046 case NEON::BI__builtin_neon_vabd_v: 6047 case NEON::BI__builtin_neon_vabdq_v: 6048 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6049 Int = usgn ? Intrinsic::aarch64_neon_uabd : Intrinsic::aarch64_neon_sabd; 6050 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fabd; 6051 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vabd"); 6052 case NEON::BI__builtin_neon_vpadal_v: 6053 case NEON::BI__builtin_neon_vpadalq_v: { 6054 unsigned ArgElts = VTy->getNumElements(); 6055 llvm::IntegerType *EltTy = cast<IntegerType>(VTy->getElementType()); 6056 unsigned BitWidth = EltTy->getBitWidth(); 6057 llvm::Type *ArgTy = llvm::VectorType::get( 6058 llvm::IntegerType::get(getLLVMContext(), BitWidth/2), 2*ArgElts); 6059 llvm::Type* Tys[2] = { VTy, ArgTy }; 6060 Int = usgn ? Intrinsic::aarch64_neon_uaddlp : Intrinsic::aarch64_neon_saddlp; 6061 SmallVector<llvm::Value*, 1> TmpOps; 6062 TmpOps.push_back(Ops[1]); 6063 Function *F = CGM.getIntrinsic(Int, Tys); 6064 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vpadal"); 6065 llvm::Value *addend = Builder.CreateBitCast(Ops[0], tmp->getType()); 6066 return Builder.CreateAdd(tmp, addend); 6067 } 6068 case NEON::BI__builtin_neon_vpmin_v: 6069 case NEON::BI__builtin_neon_vpminq_v: 6070 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6071 Int = usgn ? Intrinsic::aarch64_neon_uminp : Intrinsic::aarch64_neon_sminp; 6072 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fminp; 6073 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmin"); 6074 case NEON::BI__builtin_neon_vpmax_v: 6075 case NEON::BI__builtin_neon_vpmaxq_v: 6076 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 6077 Int = usgn ? Intrinsic::aarch64_neon_umaxp : Intrinsic::aarch64_neon_smaxp; 6078 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmaxp; 6079 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmax"); 6080 case NEON::BI__builtin_neon_vminnm_v: 6081 case NEON::BI__builtin_neon_vminnmq_v: 6082 Int = Intrinsic::aarch64_neon_fminnm; 6083 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vminnm"); 6084 case NEON::BI__builtin_neon_vmaxnm_v: 6085 case NEON::BI__builtin_neon_vmaxnmq_v: 6086 Int = Intrinsic::aarch64_neon_fmaxnm; 6087 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmaxnm"); 6088 case NEON::BI__builtin_neon_vrecpss_f32: { 6089 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6090 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, FloatTy), 6091 Ops, "vrecps"); 6092 } 6093 case NEON::BI__builtin_neon_vrecpsd_f64: { 6094 Ops.push_back(EmitScalarExpr(E->getArg(1))); 6095 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, DoubleTy), 6096 Ops, "vrecps"); 6097 } 6098 case NEON::BI__builtin_neon_vqshrun_n_v: 6099 Int = Intrinsic::aarch64_neon_sqshrun; 6100 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrun_n"); 6101 case NEON::BI__builtin_neon_vqrshrun_n_v: 6102 Int = Intrinsic::aarch64_neon_sqrshrun; 6103 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrun_n"); 6104 case NEON::BI__builtin_neon_vqshrn_n_v: 6105 Int = usgn ? Intrinsic::aarch64_neon_uqshrn : Intrinsic::aarch64_neon_sqshrn; 6106 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n"); 6107 case NEON::BI__builtin_neon_vrshrn_n_v: 6108 Int = Intrinsic::aarch64_neon_rshrn; 6109 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshrn_n"); 6110 case NEON::BI__builtin_neon_vqrshrn_n_v: 6111 Int = usgn ? Intrinsic::aarch64_neon_uqrshrn : Intrinsic::aarch64_neon_sqrshrn; 6112 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n"); 6113 case NEON::BI__builtin_neon_vrnda_v: 6114 case NEON::BI__builtin_neon_vrndaq_v: { 6115 Int = Intrinsic::round; 6116 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrnda"); 6117 } 6118 case NEON::BI__builtin_neon_vrndi_v: 6119 case NEON::BI__builtin_neon_vrndiq_v: { 6120 Int = Intrinsic::nearbyint; 6121 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndi"); 6122 } 6123 case NEON::BI__builtin_neon_vrndm_v: 6124 case NEON::BI__builtin_neon_vrndmq_v: { 6125 Int = Intrinsic::floor; 6126 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndm"); 6127 } 6128 case NEON::BI__builtin_neon_vrndn_v: 6129 case NEON::BI__builtin_neon_vrndnq_v: { 6130 Int = Intrinsic::aarch64_neon_frintn; 6131 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndn"); 6132 } 6133 case NEON::BI__builtin_neon_vrndp_v: 6134 case NEON::BI__builtin_neon_vrndpq_v: { 6135 Int = Intrinsic::ceil; 6136 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndp"); 6137 } 6138 case NEON::BI__builtin_neon_vrndx_v: 6139 case NEON::BI__builtin_neon_vrndxq_v: { 6140 Int = Intrinsic::rint; 6141 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndx"); 6142 } 6143 case NEON::BI__builtin_neon_vrnd_v: 6144 case NEON::BI__builtin_neon_vrndq_v: { 6145 Int = Intrinsic::trunc; 6146 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndz"); 6147 } 6148 case NEON::BI__builtin_neon_vceqz_v: 6149 case NEON::BI__builtin_neon_vceqzq_v: 6150 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OEQ, 6151 ICmpInst::ICMP_EQ, "vceqz"); 6152 case NEON::BI__builtin_neon_vcgez_v: 6153 case NEON::BI__builtin_neon_vcgezq_v: 6154 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGE, 6155 ICmpInst::ICMP_SGE, "vcgez"); 6156 case NEON::BI__builtin_neon_vclez_v: 6157 case NEON::BI__builtin_neon_vclezq_v: 6158 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLE, 6159 ICmpInst::ICMP_SLE, "vclez"); 6160 case NEON::BI__builtin_neon_vcgtz_v: 6161 case NEON::BI__builtin_neon_vcgtzq_v: 6162 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGT, 6163 ICmpInst::ICMP_SGT, "vcgtz"); 6164 case NEON::BI__builtin_neon_vcltz_v: 6165 case NEON::BI__builtin_neon_vcltzq_v: 6166 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLT, 6167 ICmpInst::ICMP_SLT, "vcltz"); 6168 case NEON::BI__builtin_neon_vcvt_f64_v: 6169 case NEON::BI__builtin_neon_vcvtq_f64_v: 6170 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6171 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad)); 6172 return usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 6173 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 6174 case NEON::BI__builtin_neon_vcvt_f64_f32: { 6175 assert(Type.getEltType() == NeonTypeFlags::Float64 && quad && 6176 "unexpected vcvt_f64_f32 builtin"); 6177 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float32, false, false); 6178 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 6179 6180 return Builder.CreateFPExt(Ops[0], Ty, "vcvt"); 6181 } 6182 case NEON::BI__builtin_neon_vcvt_f32_f64: { 6183 assert(Type.getEltType() == NeonTypeFlags::Float32 && 6184 "unexpected vcvt_f32_f64 builtin"); 6185 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float64, false, true); 6186 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 6187 6188 return Builder.CreateFPTrunc(Ops[0], Ty, "vcvt"); 6189 } 6190 case NEON::BI__builtin_neon_vcvt_s32_v: 6191 case NEON::BI__builtin_neon_vcvt_u32_v: 6192 case NEON::BI__builtin_neon_vcvt_s64_v: 6193 case NEON::BI__builtin_neon_vcvt_u64_v: 6194 case NEON::BI__builtin_neon_vcvtq_s32_v: 6195 case NEON::BI__builtin_neon_vcvtq_u32_v: 6196 case NEON::BI__builtin_neon_vcvtq_s64_v: 6197 case NEON::BI__builtin_neon_vcvtq_u64_v: { 6198 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 6199 if (usgn) 6200 return Builder.CreateFPToUI(Ops[0], Ty); 6201 return Builder.CreateFPToSI(Ops[0], Ty); 6202 } 6203 case NEON::BI__builtin_neon_vcvta_s32_v: 6204 case NEON::BI__builtin_neon_vcvtaq_s32_v: 6205 case NEON::BI__builtin_neon_vcvta_u32_v: 6206 case NEON::BI__builtin_neon_vcvtaq_u32_v: 6207 case NEON::BI__builtin_neon_vcvta_s64_v: 6208 case NEON::BI__builtin_neon_vcvtaq_s64_v: 6209 case NEON::BI__builtin_neon_vcvta_u64_v: 6210 case NEON::BI__builtin_neon_vcvtaq_u64_v: { 6211 Int = usgn ? Intrinsic::aarch64_neon_fcvtau : Intrinsic::aarch64_neon_fcvtas; 6212 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6213 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvta"); 6214 } 6215 case NEON::BI__builtin_neon_vcvtm_s32_v: 6216 case NEON::BI__builtin_neon_vcvtmq_s32_v: 6217 case NEON::BI__builtin_neon_vcvtm_u32_v: 6218 case NEON::BI__builtin_neon_vcvtmq_u32_v: 6219 case NEON::BI__builtin_neon_vcvtm_s64_v: 6220 case NEON::BI__builtin_neon_vcvtmq_s64_v: 6221 case NEON::BI__builtin_neon_vcvtm_u64_v: 6222 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 6223 Int = usgn ? Intrinsic::aarch64_neon_fcvtmu : Intrinsic::aarch64_neon_fcvtms; 6224 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6225 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtm"); 6226 } 6227 case NEON::BI__builtin_neon_vcvtn_s32_v: 6228 case NEON::BI__builtin_neon_vcvtnq_s32_v: 6229 case NEON::BI__builtin_neon_vcvtn_u32_v: 6230 case NEON::BI__builtin_neon_vcvtnq_u32_v: 6231 case NEON::BI__builtin_neon_vcvtn_s64_v: 6232 case NEON::BI__builtin_neon_vcvtnq_s64_v: 6233 case NEON::BI__builtin_neon_vcvtn_u64_v: 6234 case NEON::BI__builtin_neon_vcvtnq_u64_v: { 6235 Int = usgn ? Intrinsic::aarch64_neon_fcvtnu : Intrinsic::aarch64_neon_fcvtns; 6236 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6237 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtn"); 6238 } 6239 case NEON::BI__builtin_neon_vcvtp_s32_v: 6240 case NEON::BI__builtin_neon_vcvtpq_s32_v: 6241 case NEON::BI__builtin_neon_vcvtp_u32_v: 6242 case NEON::BI__builtin_neon_vcvtpq_u32_v: 6243 case NEON::BI__builtin_neon_vcvtp_s64_v: 6244 case NEON::BI__builtin_neon_vcvtpq_s64_v: 6245 case NEON::BI__builtin_neon_vcvtp_u64_v: 6246 case NEON::BI__builtin_neon_vcvtpq_u64_v: { 6247 Int = usgn ? Intrinsic::aarch64_neon_fcvtpu : Intrinsic::aarch64_neon_fcvtps; 6248 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 6249 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtp"); 6250 } 6251 case NEON::BI__builtin_neon_vmulx_v: 6252 case NEON::BI__builtin_neon_vmulxq_v: { 6253 Int = Intrinsic::aarch64_neon_fmulx; 6254 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmulx"); 6255 } 6256 case NEON::BI__builtin_neon_vmul_lane_v: 6257 case NEON::BI__builtin_neon_vmul_laneq_v: { 6258 // v1f64 vmul_lane should be mapped to Neon scalar mul lane 6259 bool Quad = false; 6260 if (BuiltinID == NEON::BI__builtin_neon_vmul_laneq_v) 6261 Quad = true; 6262 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 6263 llvm::Type *VTy = GetNeonType(this, 6264 NeonTypeFlags(NeonTypeFlags::Float64, false, Quad)); 6265 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 6266 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 6267 Value *Result = Builder.CreateFMul(Ops[0], Ops[1]); 6268 return Builder.CreateBitCast(Result, Ty); 6269 } 6270 case NEON::BI__builtin_neon_vnegd_s64: 6271 return Builder.CreateNeg(EmitScalarExpr(E->getArg(0)), "vnegd"); 6272 case NEON::BI__builtin_neon_vpmaxnm_v: 6273 case NEON::BI__builtin_neon_vpmaxnmq_v: { 6274 Int = Intrinsic::aarch64_neon_fmaxnmp; 6275 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmaxnm"); 6276 } 6277 case NEON::BI__builtin_neon_vpminnm_v: 6278 case NEON::BI__builtin_neon_vpminnmq_v: { 6279 Int = Intrinsic::aarch64_neon_fminnmp; 6280 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpminnm"); 6281 } 6282 case NEON::BI__builtin_neon_vsqrt_v: 6283 case NEON::BI__builtin_neon_vsqrtq_v: { 6284 Int = Intrinsic::sqrt; 6285 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6286 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqrt"); 6287 } 6288 case NEON::BI__builtin_neon_vrbit_v: 6289 case NEON::BI__builtin_neon_vrbitq_v: { 6290 Int = Intrinsic::aarch64_neon_rbit; 6291 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrbit"); 6292 } 6293 case NEON::BI__builtin_neon_vaddv_u8: 6294 // FIXME: These are handled by the AArch64 scalar code. 6295 usgn = true; 6296 // FALLTHROUGH 6297 case NEON::BI__builtin_neon_vaddv_s8: { 6298 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6299 Ty = Int32Ty; 6300 VTy = llvm::VectorType::get(Int8Ty, 8); 6301 llvm::Type *Tys[2] = { Ty, VTy }; 6302 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6303 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6304 return Builder.CreateTrunc(Ops[0], Int8Ty); 6305 } 6306 case NEON::BI__builtin_neon_vaddv_u16: 6307 usgn = true; 6308 // FALLTHROUGH 6309 case NEON::BI__builtin_neon_vaddv_s16: { 6310 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6311 Ty = Int32Ty; 6312 VTy = llvm::VectorType::get(Int16Ty, 4); 6313 llvm::Type *Tys[2] = { Ty, VTy }; 6314 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6315 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6316 return Builder.CreateTrunc(Ops[0], Int16Ty); 6317 } 6318 case NEON::BI__builtin_neon_vaddvq_u8: 6319 usgn = true; 6320 // FALLTHROUGH 6321 case NEON::BI__builtin_neon_vaddvq_s8: { 6322 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6323 Ty = Int32Ty; 6324 VTy = llvm::VectorType::get(Int8Ty, 16); 6325 llvm::Type *Tys[2] = { Ty, VTy }; 6326 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6327 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6328 return Builder.CreateTrunc(Ops[0], Int8Ty); 6329 } 6330 case NEON::BI__builtin_neon_vaddvq_u16: 6331 usgn = true; 6332 // FALLTHROUGH 6333 case NEON::BI__builtin_neon_vaddvq_s16: { 6334 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 6335 Ty = Int32Ty; 6336 VTy = llvm::VectorType::get(Int16Ty, 8); 6337 llvm::Type *Tys[2] = { Ty, VTy }; 6338 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6339 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 6340 return Builder.CreateTrunc(Ops[0], Int16Ty); 6341 } 6342 case NEON::BI__builtin_neon_vmaxv_u8: { 6343 Int = Intrinsic::aarch64_neon_umaxv; 6344 Ty = Int32Ty; 6345 VTy = llvm::VectorType::get(Int8Ty, 8); 6346 llvm::Type *Tys[2] = { Ty, VTy }; 6347 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6348 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6349 return Builder.CreateTrunc(Ops[0], Int8Ty); 6350 } 6351 case NEON::BI__builtin_neon_vmaxv_u16: { 6352 Int = Intrinsic::aarch64_neon_umaxv; 6353 Ty = Int32Ty; 6354 VTy = llvm::VectorType::get(Int16Ty, 4); 6355 llvm::Type *Tys[2] = { Ty, VTy }; 6356 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6357 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6358 return Builder.CreateTrunc(Ops[0], Int16Ty); 6359 } 6360 case NEON::BI__builtin_neon_vmaxvq_u8: { 6361 Int = Intrinsic::aarch64_neon_umaxv; 6362 Ty = Int32Ty; 6363 VTy = llvm::VectorType::get(Int8Ty, 16); 6364 llvm::Type *Tys[2] = { Ty, VTy }; 6365 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6366 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6367 return Builder.CreateTrunc(Ops[0], Int8Ty); 6368 } 6369 case NEON::BI__builtin_neon_vmaxvq_u16: { 6370 Int = Intrinsic::aarch64_neon_umaxv; 6371 Ty = Int32Ty; 6372 VTy = llvm::VectorType::get(Int16Ty, 8); 6373 llvm::Type *Tys[2] = { Ty, VTy }; 6374 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6375 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6376 return Builder.CreateTrunc(Ops[0], Int16Ty); 6377 } 6378 case NEON::BI__builtin_neon_vmaxv_s8: { 6379 Int = Intrinsic::aarch64_neon_smaxv; 6380 Ty = Int32Ty; 6381 VTy = llvm::VectorType::get(Int8Ty, 8); 6382 llvm::Type *Tys[2] = { Ty, VTy }; 6383 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6384 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6385 return Builder.CreateTrunc(Ops[0], Int8Ty); 6386 } 6387 case NEON::BI__builtin_neon_vmaxv_s16: { 6388 Int = Intrinsic::aarch64_neon_smaxv; 6389 Ty = Int32Ty; 6390 VTy = llvm::VectorType::get(Int16Ty, 4); 6391 llvm::Type *Tys[2] = { Ty, VTy }; 6392 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6393 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6394 return Builder.CreateTrunc(Ops[0], Int16Ty); 6395 } 6396 case NEON::BI__builtin_neon_vmaxvq_s8: { 6397 Int = Intrinsic::aarch64_neon_smaxv; 6398 Ty = Int32Ty; 6399 VTy = llvm::VectorType::get(Int8Ty, 16); 6400 llvm::Type *Tys[2] = { Ty, VTy }; 6401 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6402 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6403 return Builder.CreateTrunc(Ops[0], Int8Ty); 6404 } 6405 case NEON::BI__builtin_neon_vmaxvq_s16: { 6406 Int = Intrinsic::aarch64_neon_smaxv; 6407 Ty = Int32Ty; 6408 VTy = llvm::VectorType::get(Int16Ty, 8); 6409 llvm::Type *Tys[2] = { Ty, VTy }; 6410 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6411 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 6412 return Builder.CreateTrunc(Ops[0], Int16Ty); 6413 } 6414 case NEON::BI__builtin_neon_vminv_u8: { 6415 Int = Intrinsic::aarch64_neon_uminv; 6416 Ty = Int32Ty; 6417 VTy = llvm::VectorType::get(Int8Ty, 8); 6418 llvm::Type *Tys[2] = { Ty, VTy }; 6419 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6420 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6421 return Builder.CreateTrunc(Ops[0], Int8Ty); 6422 } 6423 case NEON::BI__builtin_neon_vminv_u16: { 6424 Int = Intrinsic::aarch64_neon_uminv; 6425 Ty = Int32Ty; 6426 VTy = llvm::VectorType::get(Int16Ty, 4); 6427 llvm::Type *Tys[2] = { Ty, VTy }; 6428 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6429 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6430 return Builder.CreateTrunc(Ops[0], Int16Ty); 6431 } 6432 case NEON::BI__builtin_neon_vminvq_u8: { 6433 Int = Intrinsic::aarch64_neon_uminv; 6434 Ty = Int32Ty; 6435 VTy = llvm::VectorType::get(Int8Ty, 16); 6436 llvm::Type *Tys[2] = { Ty, VTy }; 6437 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6438 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6439 return Builder.CreateTrunc(Ops[0], Int8Ty); 6440 } 6441 case NEON::BI__builtin_neon_vminvq_u16: { 6442 Int = Intrinsic::aarch64_neon_uminv; 6443 Ty = Int32Ty; 6444 VTy = llvm::VectorType::get(Int16Ty, 8); 6445 llvm::Type *Tys[2] = { Ty, VTy }; 6446 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6447 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6448 return Builder.CreateTrunc(Ops[0], Int16Ty); 6449 } 6450 case NEON::BI__builtin_neon_vminv_s8: { 6451 Int = Intrinsic::aarch64_neon_sminv; 6452 Ty = Int32Ty; 6453 VTy = llvm::VectorType::get(Int8Ty, 8); 6454 llvm::Type *Tys[2] = { Ty, VTy }; 6455 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6456 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6457 return Builder.CreateTrunc(Ops[0], Int8Ty); 6458 } 6459 case NEON::BI__builtin_neon_vminv_s16: { 6460 Int = Intrinsic::aarch64_neon_sminv; 6461 Ty = Int32Ty; 6462 VTy = llvm::VectorType::get(Int16Ty, 4); 6463 llvm::Type *Tys[2] = { Ty, VTy }; 6464 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6465 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6466 return Builder.CreateTrunc(Ops[0], Int16Ty); 6467 } 6468 case NEON::BI__builtin_neon_vminvq_s8: { 6469 Int = Intrinsic::aarch64_neon_sminv; 6470 Ty = Int32Ty; 6471 VTy = llvm::VectorType::get(Int8Ty, 16); 6472 llvm::Type *Tys[2] = { Ty, VTy }; 6473 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6474 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6475 return Builder.CreateTrunc(Ops[0], Int8Ty); 6476 } 6477 case NEON::BI__builtin_neon_vminvq_s16: { 6478 Int = Intrinsic::aarch64_neon_sminv; 6479 Ty = Int32Ty; 6480 VTy = llvm::VectorType::get(Int16Ty, 8); 6481 llvm::Type *Tys[2] = { Ty, VTy }; 6482 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6483 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 6484 return Builder.CreateTrunc(Ops[0], Int16Ty); 6485 } 6486 case NEON::BI__builtin_neon_vmul_n_f64: { 6487 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 6488 Value *RHS = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), DoubleTy); 6489 return Builder.CreateFMul(Ops[0], RHS); 6490 } 6491 case NEON::BI__builtin_neon_vaddlv_u8: { 6492 Int = Intrinsic::aarch64_neon_uaddlv; 6493 Ty = Int32Ty; 6494 VTy = llvm::VectorType::get(Int8Ty, 8); 6495 llvm::Type *Tys[2] = { Ty, VTy }; 6496 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6497 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6498 return Builder.CreateTrunc(Ops[0], Int16Ty); 6499 } 6500 case NEON::BI__builtin_neon_vaddlv_u16: { 6501 Int = Intrinsic::aarch64_neon_uaddlv; 6502 Ty = Int32Ty; 6503 VTy = llvm::VectorType::get(Int16Ty, 4); 6504 llvm::Type *Tys[2] = { Ty, VTy }; 6505 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6506 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6507 } 6508 case NEON::BI__builtin_neon_vaddlvq_u8: { 6509 Int = Intrinsic::aarch64_neon_uaddlv; 6510 Ty = Int32Ty; 6511 VTy = llvm::VectorType::get(Int8Ty, 16); 6512 llvm::Type *Tys[2] = { Ty, VTy }; 6513 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6514 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6515 return Builder.CreateTrunc(Ops[0], Int16Ty); 6516 } 6517 case NEON::BI__builtin_neon_vaddlvq_u16: { 6518 Int = Intrinsic::aarch64_neon_uaddlv; 6519 Ty = Int32Ty; 6520 VTy = llvm::VectorType::get(Int16Ty, 8); 6521 llvm::Type *Tys[2] = { Ty, VTy }; 6522 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6523 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6524 } 6525 case NEON::BI__builtin_neon_vaddlv_s8: { 6526 Int = Intrinsic::aarch64_neon_saddlv; 6527 Ty = Int32Ty; 6528 VTy = llvm::VectorType::get(Int8Ty, 8); 6529 llvm::Type *Tys[2] = { Ty, VTy }; 6530 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6531 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6532 return Builder.CreateTrunc(Ops[0], Int16Ty); 6533 } 6534 case NEON::BI__builtin_neon_vaddlv_s16: { 6535 Int = Intrinsic::aarch64_neon_saddlv; 6536 Ty = Int32Ty; 6537 VTy = llvm::VectorType::get(Int16Ty, 4); 6538 llvm::Type *Tys[2] = { Ty, VTy }; 6539 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6540 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6541 } 6542 case NEON::BI__builtin_neon_vaddlvq_s8: { 6543 Int = Intrinsic::aarch64_neon_saddlv; 6544 Ty = Int32Ty; 6545 VTy = llvm::VectorType::get(Int8Ty, 16); 6546 llvm::Type *Tys[2] = { Ty, VTy }; 6547 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6548 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6549 return Builder.CreateTrunc(Ops[0], Int16Ty); 6550 } 6551 case NEON::BI__builtin_neon_vaddlvq_s16: { 6552 Int = Intrinsic::aarch64_neon_saddlv; 6553 Ty = Int32Ty; 6554 VTy = llvm::VectorType::get(Int16Ty, 8); 6555 llvm::Type *Tys[2] = { Ty, VTy }; 6556 Ops.push_back(EmitScalarExpr(E->getArg(0))); 6557 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 6558 } 6559 case NEON::BI__builtin_neon_vsri_n_v: 6560 case NEON::BI__builtin_neon_vsriq_n_v: { 6561 Int = Intrinsic::aarch64_neon_vsri; 6562 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 6563 return EmitNeonCall(Intrin, Ops, "vsri_n"); 6564 } 6565 case NEON::BI__builtin_neon_vsli_n_v: 6566 case NEON::BI__builtin_neon_vsliq_n_v: { 6567 Int = Intrinsic::aarch64_neon_vsli; 6568 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 6569 return EmitNeonCall(Intrin, Ops, "vsli_n"); 6570 } 6571 case NEON::BI__builtin_neon_vsra_n_v: 6572 case NEON::BI__builtin_neon_vsraq_n_v: 6573 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6574 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 6575 return Builder.CreateAdd(Ops[0], Ops[1]); 6576 case NEON::BI__builtin_neon_vrsra_n_v: 6577 case NEON::BI__builtin_neon_vrsraq_n_v: { 6578 Int = usgn ? Intrinsic::aarch64_neon_urshl : Intrinsic::aarch64_neon_srshl; 6579 SmallVector<llvm::Value*,2> TmpOps; 6580 TmpOps.push_back(Ops[1]); 6581 TmpOps.push_back(Ops[2]); 6582 Function* F = CGM.getIntrinsic(Int, Ty); 6583 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vrshr_n", 1, true); 6584 Ops[0] = Builder.CreateBitCast(Ops[0], VTy); 6585 return Builder.CreateAdd(Ops[0], tmp); 6586 } 6587 // FIXME: Sharing loads & stores with 32-bit is complicated by the absence 6588 // of an Align parameter here. 6589 case NEON::BI__builtin_neon_vld1_x2_v: 6590 case NEON::BI__builtin_neon_vld1q_x2_v: 6591 case NEON::BI__builtin_neon_vld1_x3_v: 6592 case NEON::BI__builtin_neon_vld1q_x3_v: 6593 case NEON::BI__builtin_neon_vld1_x4_v: 6594 case NEON::BI__builtin_neon_vld1q_x4_v: { 6595 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 6596 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6597 llvm::Type *Tys[2] = { VTy, PTy }; 6598 unsigned Int; 6599 switch (BuiltinID) { 6600 case NEON::BI__builtin_neon_vld1_x2_v: 6601 case NEON::BI__builtin_neon_vld1q_x2_v: 6602 Int = Intrinsic::aarch64_neon_ld1x2; 6603 break; 6604 case NEON::BI__builtin_neon_vld1_x3_v: 6605 case NEON::BI__builtin_neon_vld1q_x3_v: 6606 Int = Intrinsic::aarch64_neon_ld1x3; 6607 break; 6608 case NEON::BI__builtin_neon_vld1_x4_v: 6609 case NEON::BI__builtin_neon_vld1q_x4_v: 6610 Int = Intrinsic::aarch64_neon_ld1x4; 6611 break; 6612 } 6613 Function *F = CGM.getIntrinsic(Int, Tys); 6614 Ops[1] = Builder.CreateCall(F, Ops[1], "vld1xN"); 6615 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6616 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6617 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6618 } 6619 case NEON::BI__builtin_neon_vst1_x2_v: 6620 case NEON::BI__builtin_neon_vst1q_x2_v: 6621 case NEON::BI__builtin_neon_vst1_x3_v: 6622 case NEON::BI__builtin_neon_vst1q_x3_v: 6623 case NEON::BI__builtin_neon_vst1_x4_v: 6624 case NEON::BI__builtin_neon_vst1q_x4_v: { 6625 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 6626 llvm::Type *Tys[2] = { VTy, PTy }; 6627 unsigned Int; 6628 switch (BuiltinID) { 6629 case NEON::BI__builtin_neon_vst1_x2_v: 6630 case NEON::BI__builtin_neon_vst1q_x2_v: 6631 Int = Intrinsic::aarch64_neon_st1x2; 6632 break; 6633 case NEON::BI__builtin_neon_vst1_x3_v: 6634 case NEON::BI__builtin_neon_vst1q_x3_v: 6635 Int = Intrinsic::aarch64_neon_st1x3; 6636 break; 6637 case NEON::BI__builtin_neon_vst1_x4_v: 6638 case NEON::BI__builtin_neon_vst1q_x4_v: 6639 Int = Intrinsic::aarch64_neon_st1x4; 6640 break; 6641 } 6642 std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end()); 6643 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 6644 } 6645 case NEON::BI__builtin_neon_vld1_v: 6646 case NEON::BI__builtin_neon_vld1q_v: { 6647 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 6648 auto Alignment = CharUnits::fromQuantity( 6649 BuiltinID == NEON::BI__builtin_neon_vld1_v ? 8 : 16); 6650 return Builder.CreateAlignedLoad(VTy, Ops[0], Alignment); 6651 } 6652 case NEON::BI__builtin_neon_vst1_v: 6653 case NEON::BI__builtin_neon_vst1q_v: 6654 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 6655 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 6656 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6657 case NEON::BI__builtin_neon_vld1_lane_v: 6658 case NEON::BI__builtin_neon_vld1q_lane_v: { 6659 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6660 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 6661 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6662 auto Alignment = CharUnits::fromQuantity( 6663 BuiltinID == NEON::BI__builtin_neon_vld1_lane_v ? 8 : 16); 6664 Ops[0] = 6665 Builder.CreateAlignedLoad(VTy->getElementType(), Ops[0], Alignment); 6666 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vld1_lane"); 6667 } 6668 case NEON::BI__builtin_neon_vld1_dup_v: 6669 case NEON::BI__builtin_neon_vld1q_dup_v: { 6670 Value *V = UndefValue::get(Ty); 6671 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 6672 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6673 auto Alignment = CharUnits::fromQuantity( 6674 BuiltinID == NEON::BI__builtin_neon_vld1_dup_v ? 8 : 16); 6675 Ops[0] = 6676 Builder.CreateAlignedLoad(VTy->getElementType(), Ops[0], Alignment); 6677 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 6678 Ops[0] = Builder.CreateInsertElement(V, Ops[0], CI); 6679 return EmitNeonSplat(Ops[0], CI); 6680 } 6681 case NEON::BI__builtin_neon_vst1_lane_v: 6682 case NEON::BI__builtin_neon_vst1q_lane_v: 6683 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6684 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 6685 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6686 return Builder.CreateDefaultAlignedStore(Ops[1], 6687 Builder.CreateBitCast(Ops[0], Ty)); 6688 case NEON::BI__builtin_neon_vld2_v: 6689 case NEON::BI__builtin_neon_vld2q_v: { 6690 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 6691 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6692 llvm::Type *Tys[2] = { VTy, PTy }; 6693 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2, Tys); 6694 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 6695 Ops[0] = Builder.CreateBitCast(Ops[0], 6696 llvm::PointerType::getUnqual(Ops[1]->getType())); 6697 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6698 } 6699 case NEON::BI__builtin_neon_vld3_v: 6700 case NEON::BI__builtin_neon_vld3q_v: { 6701 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 6702 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6703 llvm::Type *Tys[2] = { VTy, PTy }; 6704 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3, Tys); 6705 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 6706 Ops[0] = Builder.CreateBitCast(Ops[0], 6707 llvm::PointerType::getUnqual(Ops[1]->getType())); 6708 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6709 } 6710 case NEON::BI__builtin_neon_vld4_v: 6711 case NEON::BI__builtin_neon_vld4q_v: { 6712 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 6713 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6714 llvm::Type *Tys[2] = { VTy, PTy }; 6715 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4, Tys); 6716 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 6717 Ops[0] = Builder.CreateBitCast(Ops[0], 6718 llvm::PointerType::getUnqual(Ops[1]->getType())); 6719 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6720 } 6721 case NEON::BI__builtin_neon_vld2_dup_v: 6722 case NEON::BI__builtin_neon_vld2q_dup_v: { 6723 llvm::Type *PTy = 6724 llvm::PointerType::getUnqual(VTy->getElementType()); 6725 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6726 llvm::Type *Tys[2] = { VTy, PTy }; 6727 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2r, Tys); 6728 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 6729 Ops[0] = Builder.CreateBitCast(Ops[0], 6730 llvm::PointerType::getUnqual(Ops[1]->getType())); 6731 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6732 } 6733 case NEON::BI__builtin_neon_vld3_dup_v: 6734 case NEON::BI__builtin_neon_vld3q_dup_v: { 6735 llvm::Type *PTy = 6736 llvm::PointerType::getUnqual(VTy->getElementType()); 6737 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6738 llvm::Type *Tys[2] = { VTy, PTy }; 6739 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3r, Tys); 6740 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 6741 Ops[0] = Builder.CreateBitCast(Ops[0], 6742 llvm::PointerType::getUnqual(Ops[1]->getType())); 6743 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6744 } 6745 case NEON::BI__builtin_neon_vld4_dup_v: 6746 case NEON::BI__builtin_neon_vld4q_dup_v: { 6747 llvm::Type *PTy = 6748 llvm::PointerType::getUnqual(VTy->getElementType()); 6749 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 6750 llvm::Type *Tys[2] = { VTy, PTy }; 6751 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4r, Tys); 6752 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 6753 Ops[0] = Builder.CreateBitCast(Ops[0], 6754 llvm::PointerType::getUnqual(Ops[1]->getType())); 6755 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6756 } 6757 case NEON::BI__builtin_neon_vld2_lane_v: 6758 case NEON::BI__builtin_neon_vld2q_lane_v: { 6759 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 6760 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2lane, Tys); 6761 Ops.push_back(Ops[1]); 6762 Ops.erase(Ops.begin()+1); 6763 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6764 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6765 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 6766 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld2_lane"); 6767 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6768 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6769 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6770 } 6771 case NEON::BI__builtin_neon_vld3_lane_v: 6772 case NEON::BI__builtin_neon_vld3q_lane_v: { 6773 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 6774 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3lane, Tys); 6775 Ops.push_back(Ops[1]); 6776 Ops.erase(Ops.begin()+1); 6777 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6778 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6779 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 6780 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 6781 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld3_lane"); 6782 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6783 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6784 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6785 } 6786 case NEON::BI__builtin_neon_vld4_lane_v: 6787 case NEON::BI__builtin_neon_vld4q_lane_v: { 6788 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 6789 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4lane, Tys); 6790 Ops.push_back(Ops[1]); 6791 Ops.erase(Ops.begin()+1); 6792 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6793 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6794 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 6795 Ops[4] = Builder.CreateBitCast(Ops[4], Ty); 6796 Ops[5] = Builder.CreateZExt(Ops[5], Int64Ty); 6797 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld4_lane"); 6798 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 6799 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 6800 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6801 } 6802 case NEON::BI__builtin_neon_vst2_v: 6803 case NEON::BI__builtin_neon_vst2q_v: { 6804 Ops.push_back(Ops[0]); 6805 Ops.erase(Ops.begin()); 6806 llvm::Type *Tys[2] = { VTy, Ops[2]->getType() }; 6807 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2, Tys), 6808 Ops, ""); 6809 } 6810 case NEON::BI__builtin_neon_vst2_lane_v: 6811 case NEON::BI__builtin_neon_vst2q_lane_v: { 6812 Ops.push_back(Ops[0]); 6813 Ops.erase(Ops.begin()); 6814 Ops[2] = Builder.CreateZExt(Ops[2], Int64Ty); 6815 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 6816 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2lane, Tys), 6817 Ops, ""); 6818 } 6819 case NEON::BI__builtin_neon_vst3_v: 6820 case NEON::BI__builtin_neon_vst3q_v: { 6821 Ops.push_back(Ops[0]); 6822 Ops.erase(Ops.begin()); 6823 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 6824 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3, Tys), 6825 Ops, ""); 6826 } 6827 case NEON::BI__builtin_neon_vst3_lane_v: 6828 case NEON::BI__builtin_neon_vst3q_lane_v: { 6829 Ops.push_back(Ops[0]); 6830 Ops.erase(Ops.begin()); 6831 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 6832 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 6833 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3lane, Tys), 6834 Ops, ""); 6835 } 6836 case NEON::BI__builtin_neon_vst4_v: 6837 case NEON::BI__builtin_neon_vst4q_v: { 6838 Ops.push_back(Ops[0]); 6839 Ops.erase(Ops.begin()); 6840 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 6841 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4, Tys), 6842 Ops, ""); 6843 } 6844 case NEON::BI__builtin_neon_vst4_lane_v: 6845 case NEON::BI__builtin_neon_vst4q_lane_v: { 6846 Ops.push_back(Ops[0]); 6847 Ops.erase(Ops.begin()); 6848 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 6849 llvm::Type *Tys[2] = { VTy, Ops[5]->getType() }; 6850 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4lane, Tys), 6851 Ops, ""); 6852 } 6853 case NEON::BI__builtin_neon_vtrn_v: 6854 case NEON::BI__builtin_neon_vtrnq_v: { 6855 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 6856 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6857 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6858 Value *SV = nullptr; 6859 6860 for (unsigned vi = 0; vi != 2; ++vi) { 6861 SmallVector<uint32_t, 16> Indices; 6862 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 6863 Indices.push_back(i+vi); 6864 Indices.push_back(i+e+vi); 6865 } 6866 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6867 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vtrn"); 6868 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6869 } 6870 return SV; 6871 } 6872 case NEON::BI__builtin_neon_vuzp_v: 6873 case NEON::BI__builtin_neon_vuzpq_v: { 6874 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 6875 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6876 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6877 Value *SV = nullptr; 6878 6879 for (unsigned vi = 0; vi != 2; ++vi) { 6880 SmallVector<uint32_t, 16> Indices; 6881 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 6882 Indices.push_back(2*i+vi); 6883 6884 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6885 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vuzp"); 6886 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6887 } 6888 return SV; 6889 } 6890 case NEON::BI__builtin_neon_vzip_v: 6891 case NEON::BI__builtin_neon_vzipq_v: { 6892 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 6893 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 6894 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 6895 Value *SV = nullptr; 6896 6897 for (unsigned vi = 0; vi != 2; ++vi) { 6898 SmallVector<uint32_t, 16> Indices; 6899 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 6900 Indices.push_back((i + vi*e) >> 1); 6901 Indices.push_back(((i + vi*e) >> 1)+e); 6902 } 6903 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 6904 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip"); 6905 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 6906 } 6907 return SV; 6908 } 6909 case NEON::BI__builtin_neon_vqtbl1q_v: { 6910 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl1, Ty), 6911 Ops, "vtbl1"); 6912 } 6913 case NEON::BI__builtin_neon_vqtbl2q_v: { 6914 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl2, Ty), 6915 Ops, "vtbl2"); 6916 } 6917 case NEON::BI__builtin_neon_vqtbl3q_v: { 6918 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl3, Ty), 6919 Ops, "vtbl3"); 6920 } 6921 case NEON::BI__builtin_neon_vqtbl4q_v: { 6922 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl4, Ty), 6923 Ops, "vtbl4"); 6924 } 6925 case NEON::BI__builtin_neon_vqtbx1q_v: { 6926 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx1, Ty), 6927 Ops, "vtbx1"); 6928 } 6929 case NEON::BI__builtin_neon_vqtbx2q_v: { 6930 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx2, Ty), 6931 Ops, "vtbx2"); 6932 } 6933 case NEON::BI__builtin_neon_vqtbx3q_v: { 6934 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx3, Ty), 6935 Ops, "vtbx3"); 6936 } 6937 case NEON::BI__builtin_neon_vqtbx4q_v: { 6938 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx4, Ty), 6939 Ops, "vtbx4"); 6940 } 6941 case NEON::BI__builtin_neon_vsqadd_v: 6942 case NEON::BI__builtin_neon_vsqaddq_v: { 6943 Int = Intrinsic::aarch64_neon_usqadd; 6944 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqadd"); 6945 } 6946 case NEON::BI__builtin_neon_vuqadd_v: 6947 case NEON::BI__builtin_neon_vuqaddq_v: { 6948 Int = Intrinsic::aarch64_neon_suqadd; 6949 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vuqadd"); 6950 } 6951 } 6952 } 6953 6954 llvm::Value *CodeGenFunction:: 6955 BuildVector(ArrayRef<llvm::Value*> Ops) { 6956 assert((Ops.size() & (Ops.size() - 1)) == 0 && 6957 "Not a power-of-two sized vector!"); 6958 bool AllConstants = true; 6959 for (unsigned i = 0, e = Ops.size(); i != e && AllConstants; ++i) 6960 AllConstants &= isa<Constant>(Ops[i]); 6961 6962 // If this is a constant vector, create a ConstantVector. 6963 if (AllConstants) { 6964 SmallVector<llvm::Constant*, 16> CstOps; 6965 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 6966 CstOps.push_back(cast<Constant>(Ops[i])); 6967 return llvm::ConstantVector::get(CstOps); 6968 } 6969 6970 // Otherwise, insertelement the values to build the vector. 6971 Value *Result = 6972 llvm::UndefValue::get(llvm::VectorType::get(Ops[0]->getType(), Ops.size())); 6973 6974 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 6975 Result = Builder.CreateInsertElement(Result, Ops[i], Builder.getInt32(i)); 6976 6977 return Result; 6978 } 6979 6980 // Convert the mask from an integer type to a vector of i1. 6981 static Value *getMaskVecValue(CodeGenFunction &CGF, Value *Mask, 6982 unsigned NumElts) { 6983 6984 llvm::VectorType *MaskTy = llvm::VectorType::get(CGF.Builder.getInt1Ty(), 6985 cast<IntegerType>(Mask->getType())->getBitWidth()); 6986 Value *MaskVec = CGF.Builder.CreateBitCast(Mask, MaskTy); 6987 6988 // If we have less than 8 elements, then the starting mask was an i8 and 6989 // we need to extract down to the right number of elements. 6990 if (NumElts < 8) { 6991 uint32_t Indices[4]; 6992 for (unsigned i = 0; i != NumElts; ++i) 6993 Indices[i] = i; 6994 MaskVec = CGF.Builder.CreateShuffleVector(MaskVec, MaskVec, 6995 makeArrayRef(Indices, NumElts), 6996 "extract"); 6997 } 6998 return MaskVec; 6999 } 7000 7001 static Value *EmitX86MaskedStore(CodeGenFunction &CGF, 7002 SmallVectorImpl<Value *> &Ops, 7003 unsigned Align) { 7004 // Cast the pointer to right type. 7005 Ops[0] = CGF.Builder.CreateBitCast(Ops[0], 7006 llvm::PointerType::getUnqual(Ops[1]->getType())); 7007 7008 // If the mask is all ones just emit a regular store. 7009 if (const auto *C = dyn_cast<Constant>(Ops[2])) 7010 if (C->isAllOnesValue()) 7011 return CGF.Builder.CreateAlignedStore(Ops[1], Ops[0], Align); 7012 7013 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 7014 Ops[1]->getType()->getVectorNumElements()); 7015 7016 return CGF.Builder.CreateMaskedStore(Ops[1], Ops[0], Align, MaskVec); 7017 } 7018 7019 static Value *EmitX86MaskedLoad(CodeGenFunction &CGF, 7020 SmallVectorImpl<Value *> &Ops, unsigned Align) { 7021 // Cast the pointer to right type. 7022 Ops[0] = CGF.Builder.CreateBitCast(Ops[0], 7023 llvm::PointerType::getUnqual(Ops[1]->getType())); 7024 7025 // If the mask is all ones just emit a regular store. 7026 if (const auto *C = dyn_cast<Constant>(Ops[2])) 7027 if (C->isAllOnesValue()) 7028 return CGF.Builder.CreateAlignedLoad(Ops[0], Align); 7029 7030 Value *MaskVec = getMaskVecValue(CGF, Ops[2], 7031 Ops[1]->getType()->getVectorNumElements()); 7032 7033 return CGF.Builder.CreateMaskedLoad(Ops[0], Align, MaskVec, Ops[1]); 7034 } 7035 7036 static Value *EmitX86SubVectorBroadcast(CodeGenFunction &CGF, 7037 SmallVectorImpl<Value *> &Ops, 7038 llvm::Type *DstTy, 7039 unsigned SrcSizeInBits, 7040 unsigned Align) { 7041 // Load the subvector. 7042 Ops[0] = CGF.Builder.CreateAlignedLoad(Ops[0], Align); 7043 7044 // Create broadcast mask. 7045 unsigned NumDstElts = DstTy->getVectorNumElements(); 7046 unsigned NumSrcElts = SrcSizeInBits / DstTy->getScalarSizeInBits(); 7047 7048 SmallVector<uint32_t, 8> Mask; 7049 for (unsigned i = 0; i != NumDstElts; i += NumSrcElts) 7050 for (unsigned j = 0; j != NumSrcElts; ++j) 7051 Mask.push_back(j); 7052 7053 return CGF.Builder.CreateShuffleVector(Ops[0], Ops[0], Mask, "subvecbcst"); 7054 } 7055 7056 static Value *EmitX86Select(CodeGenFunction &CGF, 7057 Value *Mask, Value *Op0, Value *Op1) { 7058 7059 // If the mask is all ones just return first argument. 7060 if (const auto *C = dyn_cast<Constant>(Mask)) 7061 if (C->isAllOnesValue()) 7062 return Op0; 7063 7064 Mask = getMaskVecValue(CGF, Mask, Op0->getType()->getVectorNumElements()); 7065 7066 return CGF.Builder.CreateSelect(Mask, Op0, Op1); 7067 } 7068 7069 static Value *EmitX86MaskedCompare(CodeGenFunction &CGF, unsigned CC, 7070 bool Signed, SmallVectorImpl<Value *> &Ops) { 7071 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 7072 Value *Cmp; 7073 7074 if (CC == 3) { 7075 Cmp = Constant::getNullValue( 7076 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 7077 } else if (CC == 7) { 7078 Cmp = Constant::getAllOnesValue( 7079 llvm::VectorType::get(CGF.Builder.getInt1Ty(), NumElts)); 7080 } else { 7081 ICmpInst::Predicate Pred; 7082 switch (CC) { 7083 default: llvm_unreachable("Unknown condition code"); 7084 case 0: Pred = ICmpInst::ICMP_EQ; break; 7085 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 7086 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 7087 case 4: Pred = ICmpInst::ICMP_NE; break; 7088 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 7089 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 7090 } 7091 Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 7092 } 7093 7094 const auto *C = dyn_cast<Constant>(Ops.back()); 7095 if (!C || !C->isAllOnesValue()) 7096 Cmp = CGF.Builder.CreateAnd(Cmp, getMaskVecValue(CGF, Ops.back(), NumElts)); 7097 7098 if (NumElts < 8) { 7099 uint32_t Indices[8]; 7100 for (unsigned i = 0; i != NumElts; ++i) 7101 Indices[i] = i; 7102 for (unsigned i = NumElts; i != 8; ++i) 7103 Indices[i] = i % NumElts + NumElts; 7104 Cmp = CGF.Builder.CreateShuffleVector( 7105 Cmp, llvm::Constant::getNullValue(Cmp->getType()), Indices); 7106 } 7107 return CGF.Builder.CreateBitCast(Cmp, 7108 IntegerType::get(CGF.getLLVMContext(), 7109 std::max(NumElts, 8U))); 7110 } 7111 7112 static Value *EmitX86MinMax(CodeGenFunction &CGF, ICmpInst::Predicate Pred, 7113 ArrayRef<Value *> Ops) { 7114 Value *Cmp = CGF.Builder.CreateICmp(Pred, Ops[0], Ops[1]); 7115 Value *Res = CGF.Builder.CreateSelect(Cmp, Ops[0], Ops[1]); 7116 7117 if (Ops.size() == 2) 7118 return Res; 7119 7120 assert(Ops.size() == 4); 7121 return EmitX86Select(CGF, Ops[3], Res, Ops[2]); 7122 } 7123 7124 Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, 7125 const CallExpr *E) { 7126 if (BuiltinID == X86::BI__builtin_ms_va_start || 7127 BuiltinID == X86::BI__builtin_ms_va_end) 7128 return EmitVAStartEnd(EmitMSVAListRef(E->getArg(0)).getPointer(), 7129 BuiltinID == X86::BI__builtin_ms_va_start); 7130 if (BuiltinID == X86::BI__builtin_ms_va_copy) { 7131 // Lower this manually. We can't reliably determine whether or not any 7132 // given va_copy() is for a Win64 va_list from the calling convention 7133 // alone, because it's legal to do this from a System V ABI function. 7134 // With opaque pointer types, we won't have enough information in LLVM 7135 // IR to determine this from the argument types, either. Best to do it 7136 // now, while we have enough information. 7137 Address DestAddr = EmitMSVAListRef(E->getArg(0)); 7138 Address SrcAddr = EmitMSVAListRef(E->getArg(1)); 7139 7140 llvm::Type *BPP = Int8PtrPtrTy; 7141 7142 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), BPP, "cp"), 7143 DestAddr.getAlignment()); 7144 SrcAddr = Address(Builder.CreateBitCast(SrcAddr.getPointer(), BPP, "ap"), 7145 SrcAddr.getAlignment()); 7146 7147 Value *ArgPtr = Builder.CreateLoad(SrcAddr, "ap.val"); 7148 return Builder.CreateStore(ArgPtr, DestAddr); 7149 } 7150 7151 SmallVector<Value*, 4> Ops; 7152 7153 // Find out if any arguments are required to be integer constant expressions. 7154 unsigned ICEArguments = 0; 7155 ASTContext::GetBuiltinTypeError Error; 7156 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 7157 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 7158 7159 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) { 7160 // If this is a normal argument, just emit it as a scalar. 7161 if ((ICEArguments & (1 << i)) == 0) { 7162 Ops.push_back(EmitScalarExpr(E->getArg(i))); 7163 continue; 7164 } 7165 7166 // If this is required to be a constant, constant fold it so that we know 7167 // that the generated intrinsic gets a ConstantInt. 7168 llvm::APSInt Result; 7169 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 7170 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 7171 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 7172 } 7173 7174 // These exist so that the builtin that takes an immediate can be bounds 7175 // checked by clang to avoid passing bad immediates to the backend. Since 7176 // AVX has a larger immediate than SSE we would need separate builtins to 7177 // do the different bounds checking. Rather than create a clang specific 7178 // SSE only builtin, this implements eight separate builtins to match gcc 7179 // implementation. 7180 auto getCmpIntrinsicCall = [this, &Ops](Intrinsic::ID ID, unsigned Imm) { 7181 Ops.push_back(llvm::ConstantInt::get(Int8Ty, Imm)); 7182 llvm::Function *F = CGM.getIntrinsic(ID); 7183 return Builder.CreateCall(F, Ops); 7184 }; 7185 7186 // For the vector forms of FP comparisons, translate the builtins directly to 7187 // IR. 7188 // TODO: The builtins could be removed if the SSE header files used vector 7189 // extension comparisons directly (vector ordered/unordered may need 7190 // additional support via __builtin_isnan()). 7191 auto getVectorFCmpIR = [this, &Ops](CmpInst::Predicate Pred) { 7192 Value *Cmp = Builder.CreateFCmp(Pred, Ops[0], Ops[1]); 7193 llvm::VectorType *FPVecTy = cast<llvm::VectorType>(Ops[0]->getType()); 7194 llvm::VectorType *IntVecTy = llvm::VectorType::getInteger(FPVecTy); 7195 Value *Sext = Builder.CreateSExt(Cmp, IntVecTy); 7196 return Builder.CreateBitCast(Sext, FPVecTy); 7197 }; 7198 7199 switch (BuiltinID) { 7200 default: return nullptr; 7201 case X86::BI__builtin_cpu_supports: { 7202 const Expr *FeatureExpr = E->getArg(0)->IgnoreParenCasts(); 7203 StringRef FeatureStr = cast<StringLiteral>(FeatureExpr)->getString(); 7204 7205 // TODO: When/if this becomes more than x86 specific then use a TargetInfo 7206 // based mapping. 7207 // Processor features and mapping to processor feature value. 7208 enum X86Features { 7209 CMOV = 0, 7210 MMX, 7211 POPCNT, 7212 SSE, 7213 SSE2, 7214 SSE3, 7215 SSSE3, 7216 SSE4_1, 7217 SSE4_2, 7218 AVX, 7219 AVX2, 7220 SSE4_A, 7221 FMA4, 7222 XOP, 7223 FMA, 7224 AVX512F, 7225 BMI, 7226 BMI2, 7227 AES, 7228 PCLMUL, 7229 AVX512VL, 7230 AVX512BW, 7231 AVX512DQ, 7232 AVX512CD, 7233 AVX512ER, 7234 AVX512PF, 7235 AVX512VBMI, 7236 AVX512IFMA, 7237 MAX 7238 }; 7239 7240 X86Features Feature = StringSwitch<X86Features>(FeatureStr) 7241 .Case("cmov", X86Features::CMOV) 7242 .Case("mmx", X86Features::MMX) 7243 .Case("popcnt", X86Features::POPCNT) 7244 .Case("sse", X86Features::SSE) 7245 .Case("sse2", X86Features::SSE2) 7246 .Case("sse3", X86Features::SSE3) 7247 .Case("ssse3", X86Features::SSSE3) 7248 .Case("sse4.1", X86Features::SSE4_1) 7249 .Case("sse4.2", X86Features::SSE4_2) 7250 .Case("avx", X86Features::AVX) 7251 .Case("avx2", X86Features::AVX2) 7252 .Case("sse4a", X86Features::SSE4_A) 7253 .Case("fma4", X86Features::FMA4) 7254 .Case("xop", X86Features::XOP) 7255 .Case("fma", X86Features::FMA) 7256 .Case("avx512f", X86Features::AVX512F) 7257 .Case("bmi", X86Features::BMI) 7258 .Case("bmi2", X86Features::BMI2) 7259 .Case("aes", X86Features::AES) 7260 .Case("pclmul", X86Features::PCLMUL) 7261 .Case("avx512vl", X86Features::AVX512VL) 7262 .Case("avx512bw", X86Features::AVX512BW) 7263 .Case("avx512dq", X86Features::AVX512DQ) 7264 .Case("avx512cd", X86Features::AVX512CD) 7265 .Case("avx512er", X86Features::AVX512ER) 7266 .Case("avx512pf", X86Features::AVX512PF) 7267 .Case("avx512vbmi", X86Features::AVX512VBMI) 7268 .Case("avx512ifma", X86Features::AVX512IFMA) 7269 .Default(X86Features::MAX); 7270 assert(Feature != X86Features::MAX && "Invalid feature!"); 7271 7272 // Matching the struct layout from the compiler-rt/libgcc structure that is 7273 // filled in: 7274 // unsigned int __cpu_vendor; 7275 // unsigned int __cpu_type; 7276 // unsigned int __cpu_subtype; 7277 // unsigned int __cpu_features[1]; 7278 llvm::Type *STy = llvm::StructType::get( 7279 Int32Ty, Int32Ty, Int32Ty, llvm::ArrayType::get(Int32Ty, 1), nullptr); 7280 7281 // Grab the global __cpu_model. 7282 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 7283 7284 // Grab the first (0th) element from the field __cpu_features off of the 7285 // global in the struct STy. 7286 Value *Idxs[] = { 7287 ConstantInt::get(Int32Ty, 0), 7288 ConstantInt::get(Int32Ty, 3), 7289 ConstantInt::get(Int32Ty, 0) 7290 }; 7291 Value *CpuFeatures = Builder.CreateGEP(STy, CpuModel, Idxs); 7292 Value *Features = Builder.CreateAlignedLoad(CpuFeatures, 7293 CharUnits::fromQuantity(4)); 7294 7295 // Check the value of the bit corresponding to the feature requested. 7296 Value *Bitset = Builder.CreateAnd( 7297 Features, llvm::ConstantInt::get(Int32Ty, 1ULL << Feature)); 7298 return Builder.CreateICmpNE(Bitset, llvm::ConstantInt::get(Int32Ty, 0)); 7299 } 7300 case X86::BI_mm_prefetch: { 7301 Value *Address = Ops[0]; 7302 Value *RW = ConstantInt::get(Int32Ty, 0); 7303 Value *Locality = Ops[1]; 7304 Value *Data = ConstantInt::get(Int32Ty, 1); 7305 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 7306 return Builder.CreateCall(F, {Address, RW, Locality, Data}); 7307 } 7308 case X86::BI_mm_clflush: { 7309 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_clflush), 7310 Ops[0]); 7311 } 7312 case X86::BI_mm_lfence: { 7313 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_lfence)); 7314 } 7315 case X86::BI_mm_mfence: { 7316 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_mfence)); 7317 } 7318 case X86::BI_mm_sfence: { 7319 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_sfence)); 7320 } 7321 case X86::BI_mm_pause: { 7322 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_pause)); 7323 } 7324 case X86::BI__rdtsc: { 7325 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_rdtsc)); 7326 } 7327 case X86::BI__builtin_ia32_undef128: 7328 case X86::BI__builtin_ia32_undef256: 7329 case X86::BI__builtin_ia32_undef512: 7330 return UndefValue::get(ConvertType(E->getType())); 7331 case X86::BI__builtin_ia32_vec_init_v8qi: 7332 case X86::BI__builtin_ia32_vec_init_v4hi: 7333 case X86::BI__builtin_ia32_vec_init_v2si: 7334 return Builder.CreateBitCast(BuildVector(Ops), 7335 llvm::Type::getX86_MMXTy(getLLVMContext())); 7336 case X86::BI__builtin_ia32_vec_ext_v2si: 7337 return Builder.CreateExtractElement(Ops[0], 7338 llvm::ConstantInt::get(Ops[1]->getType(), 0)); 7339 case X86::BI_mm_setcsr: 7340 case X86::BI__builtin_ia32_ldmxcsr: { 7341 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 7342 Builder.CreateStore(Ops[0], Tmp); 7343 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_ldmxcsr), 7344 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 7345 } 7346 case X86::BI_mm_getcsr: 7347 case X86::BI__builtin_ia32_stmxcsr: { 7348 Address Tmp = CreateMemTemp(E->getType()); 7349 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_stmxcsr), 7350 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 7351 return Builder.CreateLoad(Tmp, "stmxcsr"); 7352 } 7353 case X86::BI__builtin_ia32_xsave: 7354 case X86::BI__builtin_ia32_xsave64: 7355 case X86::BI__builtin_ia32_xrstor: 7356 case X86::BI__builtin_ia32_xrstor64: 7357 case X86::BI__builtin_ia32_xsaveopt: 7358 case X86::BI__builtin_ia32_xsaveopt64: 7359 case X86::BI__builtin_ia32_xrstors: 7360 case X86::BI__builtin_ia32_xrstors64: 7361 case X86::BI__builtin_ia32_xsavec: 7362 case X86::BI__builtin_ia32_xsavec64: 7363 case X86::BI__builtin_ia32_xsaves: 7364 case X86::BI__builtin_ia32_xsaves64: { 7365 Intrinsic::ID ID; 7366 #define INTRINSIC_X86_XSAVE_ID(NAME) \ 7367 case X86::BI__builtin_ia32_##NAME: \ 7368 ID = Intrinsic::x86_##NAME; \ 7369 break 7370 switch (BuiltinID) { 7371 default: llvm_unreachable("Unsupported intrinsic!"); 7372 INTRINSIC_X86_XSAVE_ID(xsave); 7373 INTRINSIC_X86_XSAVE_ID(xsave64); 7374 INTRINSIC_X86_XSAVE_ID(xrstor); 7375 INTRINSIC_X86_XSAVE_ID(xrstor64); 7376 INTRINSIC_X86_XSAVE_ID(xsaveopt); 7377 INTRINSIC_X86_XSAVE_ID(xsaveopt64); 7378 INTRINSIC_X86_XSAVE_ID(xrstors); 7379 INTRINSIC_X86_XSAVE_ID(xrstors64); 7380 INTRINSIC_X86_XSAVE_ID(xsavec); 7381 INTRINSIC_X86_XSAVE_ID(xsavec64); 7382 INTRINSIC_X86_XSAVE_ID(xsaves); 7383 INTRINSIC_X86_XSAVE_ID(xsaves64); 7384 } 7385 #undef INTRINSIC_X86_XSAVE_ID 7386 Value *Mhi = Builder.CreateTrunc( 7387 Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, 32)), Int32Ty); 7388 Value *Mlo = Builder.CreateTrunc(Ops[1], Int32Ty); 7389 Ops[1] = Mhi; 7390 Ops.push_back(Mlo); 7391 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 7392 } 7393 case X86::BI__builtin_ia32_storedqudi128_mask: 7394 case X86::BI__builtin_ia32_storedqusi128_mask: 7395 case X86::BI__builtin_ia32_storedquhi128_mask: 7396 case X86::BI__builtin_ia32_storedquqi128_mask: 7397 case X86::BI__builtin_ia32_storeupd128_mask: 7398 case X86::BI__builtin_ia32_storeups128_mask: 7399 case X86::BI__builtin_ia32_storedqudi256_mask: 7400 case X86::BI__builtin_ia32_storedqusi256_mask: 7401 case X86::BI__builtin_ia32_storedquhi256_mask: 7402 case X86::BI__builtin_ia32_storedquqi256_mask: 7403 case X86::BI__builtin_ia32_storeupd256_mask: 7404 case X86::BI__builtin_ia32_storeups256_mask: 7405 case X86::BI__builtin_ia32_storedqudi512_mask: 7406 case X86::BI__builtin_ia32_storedqusi512_mask: 7407 case X86::BI__builtin_ia32_storedquhi512_mask: 7408 case X86::BI__builtin_ia32_storedquqi512_mask: 7409 case X86::BI__builtin_ia32_storeupd512_mask: 7410 case X86::BI__builtin_ia32_storeups512_mask: 7411 return EmitX86MaskedStore(*this, Ops, 1); 7412 7413 case X86::BI__builtin_ia32_storess128_mask: 7414 case X86::BI__builtin_ia32_storesd128_mask: { 7415 return EmitX86MaskedStore(*this, Ops, 16); 7416 } 7417 case X86::BI__builtin_ia32_movdqa32store128_mask: 7418 case X86::BI__builtin_ia32_movdqa64store128_mask: 7419 case X86::BI__builtin_ia32_storeaps128_mask: 7420 case X86::BI__builtin_ia32_storeapd128_mask: 7421 case X86::BI__builtin_ia32_movdqa32store256_mask: 7422 case X86::BI__builtin_ia32_movdqa64store256_mask: 7423 case X86::BI__builtin_ia32_storeaps256_mask: 7424 case X86::BI__builtin_ia32_storeapd256_mask: 7425 case X86::BI__builtin_ia32_movdqa32store512_mask: 7426 case X86::BI__builtin_ia32_movdqa64store512_mask: 7427 case X86::BI__builtin_ia32_storeaps512_mask: 7428 case X86::BI__builtin_ia32_storeapd512_mask: { 7429 unsigned Align = 7430 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 7431 return EmitX86MaskedStore(*this, Ops, Align); 7432 } 7433 case X86::BI__builtin_ia32_loadups128_mask: 7434 case X86::BI__builtin_ia32_loadups256_mask: 7435 case X86::BI__builtin_ia32_loadups512_mask: 7436 case X86::BI__builtin_ia32_loadupd128_mask: 7437 case X86::BI__builtin_ia32_loadupd256_mask: 7438 case X86::BI__builtin_ia32_loadupd512_mask: 7439 case X86::BI__builtin_ia32_loaddquqi128_mask: 7440 case X86::BI__builtin_ia32_loaddquqi256_mask: 7441 case X86::BI__builtin_ia32_loaddquqi512_mask: 7442 case X86::BI__builtin_ia32_loaddquhi128_mask: 7443 case X86::BI__builtin_ia32_loaddquhi256_mask: 7444 case X86::BI__builtin_ia32_loaddquhi512_mask: 7445 case X86::BI__builtin_ia32_loaddqusi128_mask: 7446 case X86::BI__builtin_ia32_loaddqusi256_mask: 7447 case X86::BI__builtin_ia32_loaddqusi512_mask: 7448 case X86::BI__builtin_ia32_loaddqudi128_mask: 7449 case X86::BI__builtin_ia32_loaddqudi256_mask: 7450 case X86::BI__builtin_ia32_loaddqudi512_mask: 7451 return EmitX86MaskedLoad(*this, Ops, 1); 7452 7453 case X86::BI__builtin_ia32_loadss128_mask: 7454 case X86::BI__builtin_ia32_loadsd128_mask: 7455 return EmitX86MaskedLoad(*this, Ops, 16); 7456 7457 case X86::BI__builtin_ia32_loadaps128_mask: 7458 case X86::BI__builtin_ia32_loadaps256_mask: 7459 case X86::BI__builtin_ia32_loadaps512_mask: 7460 case X86::BI__builtin_ia32_loadapd128_mask: 7461 case X86::BI__builtin_ia32_loadapd256_mask: 7462 case X86::BI__builtin_ia32_loadapd512_mask: 7463 case X86::BI__builtin_ia32_movdqa32load128_mask: 7464 case X86::BI__builtin_ia32_movdqa32load256_mask: 7465 case X86::BI__builtin_ia32_movdqa32load512_mask: 7466 case X86::BI__builtin_ia32_movdqa64load128_mask: 7467 case X86::BI__builtin_ia32_movdqa64load256_mask: 7468 case X86::BI__builtin_ia32_movdqa64load512_mask: { 7469 unsigned Align = 7470 getContext().getTypeAlignInChars(E->getArg(1)->getType()).getQuantity(); 7471 return EmitX86MaskedLoad(*this, Ops, Align); 7472 } 7473 7474 case X86::BI__builtin_ia32_vbroadcastf128_pd256: 7475 case X86::BI__builtin_ia32_vbroadcastf128_ps256: { 7476 llvm::Type *DstTy = ConvertType(E->getType()); 7477 return EmitX86SubVectorBroadcast(*this, Ops, DstTy, 128, 1); 7478 } 7479 7480 case X86::BI__builtin_ia32_storehps: 7481 case X86::BI__builtin_ia32_storelps: { 7482 llvm::Type *PtrTy = llvm::PointerType::getUnqual(Int64Ty); 7483 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 2); 7484 7485 // cast val v2i64 7486 Ops[1] = Builder.CreateBitCast(Ops[1], VecTy, "cast"); 7487 7488 // extract (0, 1) 7489 unsigned Index = BuiltinID == X86::BI__builtin_ia32_storelps ? 0 : 1; 7490 llvm::Value *Idx = llvm::ConstantInt::get(SizeTy, Index); 7491 Ops[1] = Builder.CreateExtractElement(Ops[1], Idx, "extract"); 7492 7493 // cast pointer to i64 & store 7494 Ops[0] = Builder.CreateBitCast(Ops[0], PtrTy); 7495 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 7496 } 7497 case X86::BI__builtin_ia32_palignr128: 7498 case X86::BI__builtin_ia32_palignr256: 7499 case X86::BI__builtin_ia32_palignr512_mask: { 7500 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 7501 7502 unsigned NumElts = Ops[0]->getType()->getVectorNumElements(); 7503 assert(NumElts % 16 == 0); 7504 7505 // If palignr is shifting the pair of vectors more than the size of two 7506 // lanes, emit zero. 7507 if (ShiftVal >= 32) 7508 return llvm::Constant::getNullValue(ConvertType(E->getType())); 7509 7510 // If palignr is shifting the pair of input vectors more than one lane, 7511 // but less than two lanes, convert to shifting in zeroes. 7512 if (ShiftVal > 16) { 7513 ShiftVal -= 16; 7514 Ops[1] = Ops[0]; 7515 Ops[0] = llvm::Constant::getNullValue(Ops[0]->getType()); 7516 } 7517 7518 uint32_t Indices[64]; 7519 // 256-bit palignr operates on 128-bit lanes so we need to handle that 7520 for (unsigned l = 0; l != NumElts; l += 16) { 7521 for (unsigned i = 0; i != 16; ++i) { 7522 unsigned Idx = ShiftVal + i; 7523 if (Idx >= 16) 7524 Idx += NumElts - 16; // End of lane, switch operand. 7525 Indices[l + i] = Idx + l; 7526 } 7527 } 7528 7529 Value *Align = Builder.CreateShuffleVector(Ops[1], Ops[0], 7530 makeArrayRef(Indices, NumElts), 7531 "palignr"); 7532 7533 // If this isn't a masked builtin, just return the align operation. 7534 if (Ops.size() == 3) 7535 return Align; 7536 7537 return EmitX86Select(*this, Ops[4], Align, Ops[3]); 7538 } 7539 7540 case X86::BI__builtin_ia32_movnti: 7541 case X86::BI__builtin_ia32_movnti64: 7542 case X86::BI__builtin_ia32_movntsd: 7543 case X86::BI__builtin_ia32_movntss: { 7544 llvm::MDNode *Node = llvm::MDNode::get( 7545 getLLVMContext(), llvm::ConstantAsMetadata::get(Builder.getInt32(1))); 7546 7547 Value *Ptr = Ops[0]; 7548 Value *Src = Ops[1]; 7549 7550 // Extract the 0'th element of the source vector. 7551 if (BuiltinID == X86::BI__builtin_ia32_movntsd || 7552 BuiltinID == X86::BI__builtin_ia32_movntss) 7553 Src = Builder.CreateExtractElement(Src, (uint64_t)0, "extract"); 7554 7555 // Convert the type of the pointer to a pointer to the stored type. 7556 Value *BC = Builder.CreateBitCast( 7557 Ptr, llvm::PointerType::getUnqual(Src->getType()), "cast"); 7558 7559 // Unaligned nontemporal store of the scalar value. 7560 StoreInst *SI = Builder.CreateDefaultAlignedStore(Src, BC); 7561 SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); 7562 SI->setAlignment(1); 7563 return SI; 7564 } 7565 7566 case X86::BI__builtin_ia32_selectb_128: 7567 case X86::BI__builtin_ia32_selectb_256: 7568 case X86::BI__builtin_ia32_selectb_512: 7569 case X86::BI__builtin_ia32_selectw_128: 7570 case X86::BI__builtin_ia32_selectw_256: 7571 case X86::BI__builtin_ia32_selectw_512: 7572 case X86::BI__builtin_ia32_selectd_128: 7573 case X86::BI__builtin_ia32_selectd_256: 7574 case X86::BI__builtin_ia32_selectd_512: 7575 case X86::BI__builtin_ia32_selectq_128: 7576 case X86::BI__builtin_ia32_selectq_256: 7577 case X86::BI__builtin_ia32_selectq_512: 7578 case X86::BI__builtin_ia32_selectps_128: 7579 case X86::BI__builtin_ia32_selectps_256: 7580 case X86::BI__builtin_ia32_selectps_512: 7581 case X86::BI__builtin_ia32_selectpd_128: 7582 case X86::BI__builtin_ia32_selectpd_256: 7583 case X86::BI__builtin_ia32_selectpd_512: 7584 return EmitX86Select(*this, Ops[0], Ops[1], Ops[2]); 7585 case X86::BI__builtin_ia32_pcmpeqb128_mask: 7586 case X86::BI__builtin_ia32_pcmpeqb256_mask: 7587 case X86::BI__builtin_ia32_pcmpeqb512_mask: 7588 case X86::BI__builtin_ia32_pcmpeqw128_mask: 7589 case X86::BI__builtin_ia32_pcmpeqw256_mask: 7590 case X86::BI__builtin_ia32_pcmpeqw512_mask: 7591 case X86::BI__builtin_ia32_pcmpeqd128_mask: 7592 case X86::BI__builtin_ia32_pcmpeqd256_mask: 7593 case X86::BI__builtin_ia32_pcmpeqd512_mask: 7594 case X86::BI__builtin_ia32_pcmpeqq128_mask: 7595 case X86::BI__builtin_ia32_pcmpeqq256_mask: 7596 case X86::BI__builtin_ia32_pcmpeqq512_mask: 7597 return EmitX86MaskedCompare(*this, 0, false, Ops); 7598 case X86::BI__builtin_ia32_pcmpgtb128_mask: 7599 case X86::BI__builtin_ia32_pcmpgtb256_mask: 7600 case X86::BI__builtin_ia32_pcmpgtb512_mask: 7601 case X86::BI__builtin_ia32_pcmpgtw128_mask: 7602 case X86::BI__builtin_ia32_pcmpgtw256_mask: 7603 case X86::BI__builtin_ia32_pcmpgtw512_mask: 7604 case X86::BI__builtin_ia32_pcmpgtd128_mask: 7605 case X86::BI__builtin_ia32_pcmpgtd256_mask: 7606 case X86::BI__builtin_ia32_pcmpgtd512_mask: 7607 case X86::BI__builtin_ia32_pcmpgtq128_mask: 7608 case X86::BI__builtin_ia32_pcmpgtq256_mask: 7609 case X86::BI__builtin_ia32_pcmpgtq512_mask: 7610 return EmitX86MaskedCompare(*this, 6, true, Ops); 7611 case X86::BI__builtin_ia32_cmpb128_mask: 7612 case X86::BI__builtin_ia32_cmpb256_mask: 7613 case X86::BI__builtin_ia32_cmpb512_mask: 7614 case X86::BI__builtin_ia32_cmpw128_mask: 7615 case X86::BI__builtin_ia32_cmpw256_mask: 7616 case X86::BI__builtin_ia32_cmpw512_mask: 7617 case X86::BI__builtin_ia32_cmpd128_mask: 7618 case X86::BI__builtin_ia32_cmpd256_mask: 7619 case X86::BI__builtin_ia32_cmpd512_mask: 7620 case X86::BI__builtin_ia32_cmpq128_mask: 7621 case X86::BI__builtin_ia32_cmpq256_mask: 7622 case X86::BI__builtin_ia32_cmpq512_mask: { 7623 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 7624 return EmitX86MaskedCompare(*this, CC, true, Ops); 7625 } 7626 case X86::BI__builtin_ia32_ucmpb128_mask: 7627 case X86::BI__builtin_ia32_ucmpb256_mask: 7628 case X86::BI__builtin_ia32_ucmpb512_mask: 7629 case X86::BI__builtin_ia32_ucmpw128_mask: 7630 case X86::BI__builtin_ia32_ucmpw256_mask: 7631 case X86::BI__builtin_ia32_ucmpw512_mask: 7632 case X86::BI__builtin_ia32_ucmpd128_mask: 7633 case X86::BI__builtin_ia32_ucmpd256_mask: 7634 case X86::BI__builtin_ia32_ucmpd512_mask: 7635 case X86::BI__builtin_ia32_ucmpq128_mask: 7636 case X86::BI__builtin_ia32_ucmpq256_mask: 7637 case X86::BI__builtin_ia32_ucmpq512_mask: { 7638 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue() & 0x7; 7639 return EmitX86MaskedCompare(*this, CC, false, Ops); 7640 } 7641 7642 case X86::BI__builtin_ia32_vplzcntd_128_mask: 7643 case X86::BI__builtin_ia32_vplzcntd_256_mask: 7644 case X86::BI__builtin_ia32_vplzcntd_512_mask: 7645 case X86::BI__builtin_ia32_vplzcntq_128_mask: 7646 case X86::BI__builtin_ia32_vplzcntq_256_mask: 7647 case X86::BI__builtin_ia32_vplzcntq_512_mask: { 7648 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, Ops[0]->getType()); 7649 return EmitX86Select(*this, Ops[2], 7650 Builder.CreateCall(F, {Ops[0],Builder.getInt1(false)}), 7651 Ops[1]); 7652 } 7653 7654 case X86::BI__builtin_ia32_pmaxsb128: 7655 case X86::BI__builtin_ia32_pmaxsw128: 7656 case X86::BI__builtin_ia32_pmaxsd128: 7657 case X86::BI__builtin_ia32_pmaxsq128_mask: 7658 case X86::BI__builtin_ia32_pmaxsb256: 7659 case X86::BI__builtin_ia32_pmaxsw256: 7660 case X86::BI__builtin_ia32_pmaxsd256: 7661 case X86::BI__builtin_ia32_pmaxsq256_mask: 7662 case X86::BI__builtin_ia32_pmaxsb512_mask: 7663 case X86::BI__builtin_ia32_pmaxsw512_mask: 7664 case X86::BI__builtin_ia32_pmaxsd512_mask: 7665 case X86::BI__builtin_ia32_pmaxsq512_mask: 7666 return EmitX86MinMax(*this, ICmpInst::ICMP_SGT, Ops); 7667 case X86::BI__builtin_ia32_pmaxub128: 7668 case X86::BI__builtin_ia32_pmaxuw128: 7669 case X86::BI__builtin_ia32_pmaxud128: 7670 case X86::BI__builtin_ia32_pmaxuq128_mask: 7671 case X86::BI__builtin_ia32_pmaxub256: 7672 case X86::BI__builtin_ia32_pmaxuw256: 7673 case X86::BI__builtin_ia32_pmaxud256: 7674 case X86::BI__builtin_ia32_pmaxuq256_mask: 7675 case X86::BI__builtin_ia32_pmaxub512_mask: 7676 case X86::BI__builtin_ia32_pmaxuw512_mask: 7677 case X86::BI__builtin_ia32_pmaxud512_mask: 7678 case X86::BI__builtin_ia32_pmaxuq512_mask: 7679 return EmitX86MinMax(*this, ICmpInst::ICMP_UGT, Ops); 7680 case X86::BI__builtin_ia32_pminsb128: 7681 case X86::BI__builtin_ia32_pminsw128: 7682 case X86::BI__builtin_ia32_pminsd128: 7683 case X86::BI__builtin_ia32_pminsq128_mask: 7684 case X86::BI__builtin_ia32_pminsb256: 7685 case X86::BI__builtin_ia32_pminsw256: 7686 case X86::BI__builtin_ia32_pminsd256: 7687 case X86::BI__builtin_ia32_pminsq256_mask: 7688 case X86::BI__builtin_ia32_pminsb512_mask: 7689 case X86::BI__builtin_ia32_pminsw512_mask: 7690 case X86::BI__builtin_ia32_pminsd512_mask: 7691 case X86::BI__builtin_ia32_pminsq512_mask: 7692 return EmitX86MinMax(*this, ICmpInst::ICMP_SLT, Ops); 7693 case X86::BI__builtin_ia32_pminub128: 7694 case X86::BI__builtin_ia32_pminuw128: 7695 case X86::BI__builtin_ia32_pminud128: 7696 case X86::BI__builtin_ia32_pminuq128_mask: 7697 case X86::BI__builtin_ia32_pminub256: 7698 case X86::BI__builtin_ia32_pminuw256: 7699 case X86::BI__builtin_ia32_pminud256: 7700 case X86::BI__builtin_ia32_pminuq256_mask: 7701 case X86::BI__builtin_ia32_pminub512_mask: 7702 case X86::BI__builtin_ia32_pminuw512_mask: 7703 case X86::BI__builtin_ia32_pminud512_mask: 7704 case X86::BI__builtin_ia32_pminuq512_mask: 7705 return EmitX86MinMax(*this, ICmpInst::ICMP_ULT, Ops); 7706 7707 // 3DNow! 7708 case X86::BI__builtin_ia32_pswapdsf: 7709 case X86::BI__builtin_ia32_pswapdsi: { 7710 llvm::Type *MMXTy = llvm::Type::getX86_MMXTy(getLLVMContext()); 7711 Ops[0] = Builder.CreateBitCast(Ops[0], MMXTy, "cast"); 7712 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_3dnowa_pswapd); 7713 return Builder.CreateCall(F, Ops, "pswapd"); 7714 } 7715 case X86::BI__builtin_ia32_rdrand16_step: 7716 case X86::BI__builtin_ia32_rdrand32_step: 7717 case X86::BI__builtin_ia32_rdrand64_step: 7718 case X86::BI__builtin_ia32_rdseed16_step: 7719 case X86::BI__builtin_ia32_rdseed32_step: 7720 case X86::BI__builtin_ia32_rdseed64_step: { 7721 Intrinsic::ID ID; 7722 switch (BuiltinID) { 7723 default: llvm_unreachable("Unsupported intrinsic!"); 7724 case X86::BI__builtin_ia32_rdrand16_step: 7725 ID = Intrinsic::x86_rdrand_16; 7726 break; 7727 case X86::BI__builtin_ia32_rdrand32_step: 7728 ID = Intrinsic::x86_rdrand_32; 7729 break; 7730 case X86::BI__builtin_ia32_rdrand64_step: 7731 ID = Intrinsic::x86_rdrand_64; 7732 break; 7733 case X86::BI__builtin_ia32_rdseed16_step: 7734 ID = Intrinsic::x86_rdseed_16; 7735 break; 7736 case X86::BI__builtin_ia32_rdseed32_step: 7737 ID = Intrinsic::x86_rdseed_32; 7738 break; 7739 case X86::BI__builtin_ia32_rdseed64_step: 7740 ID = Intrinsic::x86_rdseed_64; 7741 break; 7742 } 7743 7744 Value *Call = Builder.CreateCall(CGM.getIntrinsic(ID)); 7745 Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 0), 7746 Ops[0]); 7747 return Builder.CreateExtractValue(Call, 1); 7748 } 7749 7750 // SSE packed comparison intrinsics 7751 case X86::BI__builtin_ia32_cmpeqps: 7752 case X86::BI__builtin_ia32_cmpeqpd: 7753 return getVectorFCmpIR(CmpInst::FCMP_OEQ); 7754 case X86::BI__builtin_ia32_cmpltps: 7755 case X86::BI__builtin_ia32_cmpltpd: 7756 return getVectorFCmpIR(CmpInst::FCMP_OLT); 7757 case X86::BI__builtin_ia32_cmpleps: 7758 case X86::BI__builtin_ia32_cmplepd: 7759 return getVectorFCmpIR(CmpInst::FCMP_OLE); 7760 case X86::BI__builtin_ia32_cmpunordps: 7761 case X86::BI__builtin_ia32_cmpunordpd: 7762 return getVectorFCmpIR(CmpInst::FCMP_UNO); 7763 case X86::BI__builtin_ia32_cmpneqps: 7764 case X86::BI__builtin_ia32_cmpneqpd: 7765 return getVectorFCmpIR(CmpInst::FCMP_UNE); 7766 case X86::BI__builtin_ia32_cmpnltps: 7767 case X86::BI__builtin_ia32_cmpnltpd: 7768 return getVectorFCmpIR(CmpInst::FCMP_UGE); 7769 case X86::BI__builtin_ia32_cmpnleps: 7770 case X86::BI__builtin_ia32_cmpnlepd: 7771 return getVectorFCmpIR(CmpInst::FCMP_UGT); 7772 case X86::BI__builtin_ia32_cmpordps: 7773 case X86::BI__builtin_ia32_cmpordpd: 7774 return getVectorFCmpIR(CmpInst::FCMP_ORD); 7775 case X86::BI__builtin_ia32_cmpps: 7776 case X86::BI__builtin_ia32_cmpps256: 7777 case X86::BI__builtin_ia32_cmppd: 7778 case X86::BI__builtin_ia32_cmppd256: { 7779 unsigned CC = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 7780 // If this one of the SSE immediates, we can use native IR. 7781 if (CC < 8) { 7782 FCmpInst::Predicate Pred; 7783 switch (CC) { 7784 case 0: Pred = FCmpInst::FCMP_OEQ; break; 7785 case 1: Pred = FCmpInst::FCMP_OLT; break; 7786 case 2: Pred = FCmpInst::FCMP_OLE; break; 7787 case 3: Pred = FCmpInst::FCMP_UNO; break; 7788 case 4: Pred = FCmpInst::FCMP_UNE; break; 7789 case 5: Pred = FCmpInst::FCMP_UGE; break; 7790 case 6: Pred = FCmpInst::FCMP_UGT; break; 7791 case 7: Pred = FCmpInst::FCMP_ORD; break; 7792 } 7793 return getVectorFCmpIR(Pred); 7794 } 7795 7796 // We can't handle 8-31 immediates with native IR, use the intrinsic. 7797 Intrinsic::ID ID; 7798 switch (BuiltinID) { 7799 default: llvm_unreachable("Unsupported intrinsic!"); 7800 case X86::BI__builtin_ia32_cmpps: 7801 ID = Intrinsic::x86_sse_cmp_ps; 7802 break; 7803 case X86::BI__builtin_ia32_cmpps256: 7804 ID = Intrinsic::x86_avx_cmp_ps_256; 7805 break; 7806 case X86::BI__builtin_ia32_cmppd: 7807 ID = Intrinsic::x86_sse2_cmp_pd; 7808 break; 7809 case X86::BI__builtin_ia32_cmppd256: 7810 ID = Intrinsic::x86_avx_cmp_pd_256; 7811 break; 7812 } 7813 7814 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 7815 } 7816 7817 // SSE scalar comparison intrinsics 7818 case X86::BI__builtin_ia32_cmpeqss: 7819 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 0); 7820 case X86::BI__builtin_ia32_cmpltss: 7821 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 1); 7822 case X86::BI__builtin_ia32_cmpless: 7823 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 2); 7824 case X86::BI__builtin_ia32_cmpunordss: 7825 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 3); 7826 case X86::BI__builtin_ia32_cmpneqss: 7827 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 4); 7828 case X86::BI__builtin_ia32_cmpnltss: 7829 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 5); 7830 case X86::BI__builtin_ia32_cmpnless: 7831 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 6); 7832 case X86::BI__builtin_ia32_cmpordss: 7833 return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 7); 7834 case X86::BI__builtin_ia32_cmpeqsd: 7835 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 0); 7836 case X86::BI__builtin_ia32_cmpltsd: 7837 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 1); 7838 case X86::BI__builtin_ia32_cmplesd: 7839 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 2); 7840 case X86::BI__builtin_ia32_cmpunordsd: 7841 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 3); 7842 case X86::BI__builtin_ia32_cmpneqsd: 7843 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 4); 7844 case X86::BI__builtin_ia32_cmpnltsd: 7845 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 5); 7846 case X86::BI__builtin_ia32_cmpnlesd: 7847 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 6); 7848 case X86::BI__builtin_ia32_cmpordsd: 7849 return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 7); 7850 7851 case X86::BI__emul: 7852 case X86::BI__emulu: { 7853 llvm::Type *Int64Ty = llvm::IntegerType::get(getLLVMContext(), 64); 7854 bool isSigned = (BuiltinID == X86::BI__emul); 7855 Value *LHS = Builder.CreateIntCast(Ops[0], Int64Ty, isSigned); 7856 Value *RHS = Builder.CreateIntCast(Ops[1], Int64Ty, isSigned); 7857 return Builder.CreateMul(LHS, RHS, "", !isSigned, isSigned); 7858 } 7859 case X86::BI__mulh: 7860 case X86::BI__umulh: 7861 case X86::BI_mul128: 7862 case X86::BI_umul128: { 7863 llvm::Type *ResType = ConvertType(E->getType()); 7864 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 7865 7866 bool IsSigned = (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI_mul128); 7867 Value *LHS = Builder.CreateIntCast(Ops[0], Int128Ty, IsSigned); 7868 Value *RHS = Builder.CreateIntCast(Ops[1], Int128Ty, IsSigned); 7869 7870 Value *MulResult, *HigherBits; 7871 if (IsSigned) { 7872 MulResult = Builder.CreateNSWMul(LHS, RHS); 7873 HigherBits = Builder.CreateAShr(MulResult, 64); 7874 } else { 7875 MulResult = Builder.CreateNUWMul(LHS, RHS); 7876 HigherBits = Builder.CreateLShr(MulResult, 64); 7877 } 7878 HigherBits = Builder.CreateIntCast(HigherBits, ResType, IsSigned); 7879 7880 if (BuiltinID == X86::BI__mulh || BuiltinID == X86::BI__umulh) 7881 return HigherBits; 7882 7883 Address HighBitsAddress = EmitPointerWithAlignment(E->getArg(2)); 7884 Builder.CreateStore(HigherBits, HighBitsAddress); 7885 return Builder.CreateIntCast(MulResult, ResType, IsSigned); 7886 } 7887 7888 case X86::BI__faststorefence: { 7889 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 7890 llvm::CrossThread); 7891 } 7892 case X86::BI_ReadWriteBarrier: 7893 case X86::BI_ReadBarrier: 7894 case X86::BI_WriteBarrier: { 7895 return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, 7896 llvm::SingleThread); 7897 } 7898 case X86::BI_BitScanForward: 7899 case X86::BI_BitScanForward64: 7900 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanForward, E); 7901 case X86::BI_BitScanReverse: 7902 case X86::BI_BitScanReverse64: 7903 return EmitMSVCBuiltinExpr(MSVCIntrin::_BitScanReverse, E); 7904 7905 case X86::BI_InterlockedAnd64: 7906 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedAnd, E); 7907 case X86::BI_InterlockedExchange64: 7908 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchange, E); 7909 case X86::BI_InterlockedExchangeAdd64: 7910 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeAdd, E); 7911 case X86::BI_InterlockedExchangeSub64: 7912 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedExchangeSub, E); 7913 case X86::BI_InterlockedOr64: 7914 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedOr, E); 7915 case X86::BI_InterlockedXor64: 7916 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedXor, E); 7917 case X86::BI_InterlockedDecrement64: 7918 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedDecrement, E); 7919 case X86::BI_InterlockedIncrement64: 7920 return EmitMSVCBuiltinExpr(MSVCIntrin::_InterlockedIncrement, E); 7921 7922 case X86::BI_AddressOfReturnAddress: { 7923 Value *F = CGM.getIntrinsic(Intrinsic::addressofreturnaddress); 7924 return Builder.CreateCall(F); 7925 } 7926 case X86::BI__stosb: { 7927 // We treat __stosb as a volatile memset - it may not generate "rep stosb" 7928 // instruction, but it will create a memset that won't be optimized away. 7929 return Builder.CreateMemSet(Ops[0], Ops[1], Ops[2], 1, true); 7930 } 7931 } 7932 } 7933 7934 7935 Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, 7936 const CallExpr *E) { 7937 SmallVector<Value*, 4> Ops; 7938 7939 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) 7940 Ops.push_back(EmitScalarExpr(E->getArg(i))); 7941 7942 Intrinsic::ID ID = Intrinsic::not_intrinsic; 7943 7944 switch (BuiltinID) { 7945 default: return nullptr; 7946 7947 // __builtin_ppc_get_timebase is GCC 4.8+'s PowerPC-specific name for what we 7948 // call __builtin_readcyclecounter. 7949 case PPC::BI__builtin_ppc_get_timebase: 7950 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::readcyclecounter)); 7951 7952 // vec_ld, vec_xl_be, vec_lvsl, vec_lvsr 7953 case PPC::BI__builtin_altivec_lvx: 7954 case PPC::BI__builtin_altivec_lvxl: 7955 case PPC::BI__builtin_altivec_lvebx: 7956 case PPC::BI__builtin_altivec_lvehx: 7957 case PPC::BI__builtin_altivec_lvewx: 7958 case PPC::BI__builtin_altivec_lvsl: 7959 case PPC::BI__builtin_altivec_lvsr: 7960 case PPC::BI__builtin_vsx_lxvd2x: 7961 case PPC::BI__builtin_vsx_lxvw4x: 7962 case PPC::BI__builtin_vsx_lxvd2x_be: 7963 case PPC::BI__builtin_vsx_lxvw4x_be: 7964 case PPC::BI__builtin_vsx_lxvl: 7965 case PPC::BI__builtin_vsx_lxvll: 7966 { 7967 if(BuiltinID == PPC::BI__builtin_vsx_lxvl || 7968 BuiltinID == PPC::BI__builtin_vsx_lxvll){ 7969 Ops[0] = Builder.CreateBitCast(Ops[0], Int8PtrTy); 7970 }else { 7971 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 7972 Ops[0] = Builder.CreateGEP(Ops[1], Ops[0]); 7973 Ops.pop_back(); 7974 } 7975 7976 switch (BuiltinID) { 7977 default: llvm_unreachable("Unsupported ld/lvsl/lvsr intrinsic!"); 7978 case PPC::BI__builtin_altivec_lvx: 7979 ID = Intrinsic::ppc_altivec_lvx; 7980 break; 7981 case PPC::BI__builtin_altivec_lvxl: 7982 ID = Intrinsic::ppc_altivec_lvxl; 7983 break; 7984 case PPC::BI__builtin_altivec_lvebx: 7985 ID = Intrinsic::ppc_altivec_lvebx; 7986 break; 7987 case PPC::BI__builtin_altivec_lvehx: 7988 ID = Intrinsic::ppc_altivec_lvehx; 7989 break; 7990 case PPC::BI__builtin_altivec_lvewx: 7991 ID = Intrinsic::ppc_altivec_lvewx; 7992 break; 7993 case PPC::BI__builtin_altivec_lvsl: 7994 ID = Intrinsic::ppc_altivec_lvsl; 7995 break; 7996 case PPC::BI__builtin_altivec_lvsr: 7997 ID = Intrinsic::ppc_altivec_lvsr; 7998 break; 7999 case PPC::BI__builtin_vsx_lxvd2x: 8000 ID = Intrinsic::ppc_vsx_lxvd2x; 8001 break; 8002 case PPC::BI__builtin_vsx_lxvw4x: 8003 ID = Intrinsic::ppc_vsx_lxvw4x; 8004 break; 8005 case PPC::BI__builtin_vsx_lxvd2x_be: 8006 ID = Intrinsic::ppc_vsx_lxvd2x_be; 8007 break; 8008 case PPC::BI__builtin_vsx_lxvw4x_be: 8009 ID = Intrinsic::ppc_vsx_lxvw4x_be; 8010 break; 8011 case PPC::BI__builtin_vsx_lxvl: 8012 ID = Intrinsic::ppc_vsx_lxvl; 8013 break; 8014 case PPC::BI__builtin_vsx_lxvll: 8015 ID = Intrinsic::ppc_vsx_lxvll; 8016 break; 8017 } 8018 llvm::Function *F = CGM.getIntrinsic(ID); 8019 return Builder.CreateCall(F, Ops, ""); 8020 } 8021 8022 // vec_st, vec_xst_be 8023 case PPC::BI__builtin_altivec_stvx: 8024 case PPC::BI__builtin_altivec_stvxl: 8025 case PPC::BI__builtin_altivec_stvebx: 8026 case PPC::BI__builtin_altivec_stvehx: 8027 case PPC::BI__builtin_altivec_stvewx: 8028 case PPC::BI__builtin_vsx_stxvd2x: 8029 case PPC::BI__builtin_vsx_stxvw4x: 8030 case PPC::BI__builtin_vsx_stxvd2x_be: 8031 case PPC::BI__builtin_vsx_stxvw4x_be: 8032 case PPC::BI__builtin_vsx_stxvl: 8033 case PPC::BI__builtin_vsx_stxvll: 8034 { 8035 if(BuiltinID == PPC::BI__builtin_vsx_stxvl || 8036 BuiltinID == PPC::BI__builtin_vsx_stxvll ){ 8037 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 8038 }else { 8039 Ops[2] = Builder.CreateBitCast(Ops[2], Int8PtrTy); 8040 Ops[1] = Builder.CreateGEP(Ops[2], Ops[1]); 8041 Ops.pop_back(); 8042 } 8043 8044 switch (BuiltinID) { 8045 default: llvm_unreachable("Unsupported st intrinsic!"); 8046 case PPC::BI__builtin_altivec_stvx: 8047 ID = Intrinsic::ppc_altivec_stvx; 8048 break; 8049 case PPC::BI__builtin_altivec_stvxl: 8050 ID = Intrinsic::ppc_altivec_stvxl; 8051 break; 8052 case PPC::BI__builtin_altivec_stvebx: 8053 ID = Intrinsic::ppc_altivec_stvebx; 8054 break; 8055 case PPC::BI__builtin_altivec_stvehx: 8056 ID = Intrinsic::ppc_altivec_stvehx; 8057 break; 8058 case PPC::BI__builtin_altivec_stvewx: 8059 ID = Intrinsic::ppc_altivec_stvewx; 8060 break; 8061 case PPC::BI__builtin_vsx_stxvd2x: 8062 ID = Intrinsic::ppc_vsx_stxvd2x; 8063 break; 8064 case PPC::BI__builtin_vsx_stxvw4x: 8065 ID = Intrinsic::ppc_vsx_stxvw4x; 8066 break; 8067 case PPC::BI__builtin_vsx_stxvd2x_be: 8068 ID = Intrinsic::ppc_vsx_stxvd2x_be; 8069 break; 8070 case PPC::BI__builtin_vsx_stxvw4x_be: 8071 ID = Intrinsic::ppc_vsx_stxvw4x_be; 8072 break; 8073 case PPC::BI__builtin_vsx_stxvl: 8074 ID = Intrinsic::ppc_vsx_stxvl; 8075 break; 8076 case PPC::BI__builtin_vsx_stxvll: 8077 ID = Intrinsic::ppc_vsx_stxvll; 8078 break; 8079 } 8080 llvm::Function *F = CGM.getIntrinsic(ID); 8081 return Builder.CreateCall(F, Ops, ""); 8082 } 8083 // Square root 8084 case PPC::BI__builtin_vsx_xvsqrtsp: 8085 case PPC::BI__builtin_vsx_xvsqrtdp: { 8086 llvm::Type *ResultType = ConvertType(E->getType()); 8087 Value *X = EmitScalarExpr(E->getArg(0)); 8088 ID = Intrinsic::sqrt; 8089 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 8090 return Builder.CreateCall(F, X); 8091 } 8092 // Count leading zeros 8093 case PPC::BI__builtin_altivec_vclzb: 8094 case PPC::BI__builtin_altivec_vclzh: 8095 case PPC::BI__builtin_altivec_vclzw: 8096 case PPC::BI__builtin_altivec_vclzd: { 8097 llvm::Type *ResultType = ConvertType(E->getType()); 8098 Value *X = EmitScalarExpr(E->getArg(0)); 8099 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 8100 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 8101 return Builder.CreateCall(F, {X, Undef}); 8102 } 8103 case PPC::BI__builtin_altivec_vctzb: 8104 case PPC::BI__builtin_altivec_vctzh: 8105 case PPC::BI__builtin_altivec_vctzw: 8106 case PPC::BI__builtin_altivec_vctzd: { 8107 llvm::Type *ResultType = ConvertType(E->getType()); 8108 Value *X = EmitScalarExpr(E->getArg(0)); 8109 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 8110 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 8111 return Builder.CreateCall(F, {X, Undef}); 8112 } 8113 case PPC::BI__builtin_altivec_vpopcntb: 8114 case PPC::BI__builtin_altivec_vpopcnth: 8115 case PPC::BI__builtin_altivec_vpopcntw: 8116 case PPC::BI__builtin_altivec_vpopcntd: { 8117 llvm::Type *ResultType = ConvertType(E->getType()); 8118 Value *X = EmitScalarExpr(E->getArg(0)); 8119 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 8120 return Builder.CreateCall(F, X); 8121 } 8122 // Copy sign 8123 case PPC::BI__builtin_vsx_xvcpsgnsp: 8124 case PPC::BI__builtin_vsx_xvcpsgndp: { 8125 llvm::Type *ResultType = ConvertType(E->getType()); 8126 Value *X = EmitScalarExpr(E->getArg(0)); 8127 Value *Y = EmitScalarExpr(E->getArg(1)); 8128 ID = Intrinsic::copysign; 8129 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 8130 return Builder.CreateCall(F, {X, Y}); 8131 } 8132 // Rounding/truncation 8133 case PPC::BI__builtin_vsx_xvrspip: 8134 case PPC::BI__builtin_vsx_xvrdpip: 8135 case PPC::BI__builtin_vsx_xvrdpim: 8136 case PPC::BI__builtin_vsx_xvrspim: 8137 case PPC::BI__builtin_vsx_xvrdpi: 8138 case PPC::BI__builtin_vsx_xvrspi: 8139 case PPC::BI__builtin_vsx_xvrdpic: 8140 case PPC::BI__builtin_vsx_xvrspic: 8141 case PPC::BI__builtin_vsx_xvrdpiz: 8142 case PPC::BI__builtin_vsx_xvrspiz: { 8143 llvm::Type *ResultType = ConvertType(E->getType()); 8144 Value *X = EmitScalarExpr(E->getArg(0)); 8145 if (BuiltinID == PPC::BI__builtin_vsx_xvrdpim || 8146 BuiltinID == PPC::BI__builtin_vsx_xvrspim) 8147 ID = Intrinsic::floor; 8148 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpi || 8149 BuiltinID == PPC::BI__builtin_vsx_xvrspi) 8150 ID = Intrinsic::round; 8151 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpic || 8152 BuiltinID == PPC::BI__builtin_vsx_xvrspic) 8153 ID = Intrinsic::nearbyint; 8154 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpip || 8155 BuiltinID == PPC::BI__builtin_vsx_xvrspip) 8156 ID = Intrinsic::ceil; 8157 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpiz || 8158 BuiltinID == PPC::BI__builtin_vsx_xvrspiz) 8159 ID = Intrinsic::trunc; 8160 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 8161 return Builder.CreateCall(F, X); 8162 } 8163 8164 // Absolute value 8165 case PPC::BI__builtin_vsx_xvabsdp: 8166 case PPC::BI__builtin_vsx_xvabssp: { 8167 llvm::Type *ResultType = ConvertType(E->getType()); 8168 Value *X = EmitScalarExpr(E->getArg(0)); 8169 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 8170 return Builder.CreateCall(F, X); 8171 } 8172 8173 // FMA variations 8174 case PPC::BI__builtin_vsx_xvmaddadp: 8175 case PPC::BI__builtin_vsx_xvmaddasp: 8176 case PPC::BI__builtin_vsx_xvnmaddadp: 8177 case PPC::BI__builtin_vsx_xvnmaddasp: 8178 case PPC::BI__builtin_vsx_xvmsubadp: 8179 case PPC::BI__builtin_vsx_xvmsubasp: 8180 case PPC::BI__builtin_vsx_xvnmsubadp: 8181 case PPC::BI__builtin_vsx_xvnmsubasp: { 8182 llvm::Type *ResultType = ConvertType(E->getType()); 8183 Value *X = EmitScalarExpr(E->getArg(0)); 8184 Value *Y = EmitScalarExpr(E->getArg(1)); 8185 Value *Z = EmitScalarExpr(E->getArg(2)); 8186 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 8187 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 8188 switch (BuiltinID) { 8189 case PPC::BI__builtin_vsx_xvmaddadp: 8190 case PPC::BI__builtin_vsx_xvmaddasp: 8191 return Builder.CreateCall(F, {X, Y, Z}); 8192 case PPC::BI__builtin_vsx_xvnmaddadp: 8193 case PPC::BI__builtin_vsx_xvnmaddasp: 8194 return Builder.CreateFSub(Zero, 8195 Builder.CreateCall(F, {X, Y, Z}), "sub"); 8196 case PPC::BI__builtin_vsx_xvmsubadp: 8197 case PPC::BI__builtin_vsx_xvmsubasp: 8198 return Builder.CreateCall(F, 8199 {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 8200 case PPC::BI__builtin_vsx_xvnmsubadp: 8201 case PPC::BI__builtin_vsx_xvnmsubasp: 8202 Value *FsubRes = 8203 Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 8204 return Builder.CreateFSub(Zero, FsubRes, "sub"); 8205 } 8206 llvm_unreachable("Unknown FMA operation"); 8207 return nullptr; // Suppress no-return warning 8208 } 8209 8210 case PPC::BI__builtin_vsx_insertword: { 8211 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_vsx_xxinsertw); 8212 8213 // Third argument is a compile time constant int. It must be clamped to 8214 // to the range [0, 12]. 8215 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[2]); 8216 assert(ArgCI && 8217 "Third arg to xxinsertw intrinsic must be constant integer"); 8218 const int64_t MaxIndex = 12; 8219 int64_t Index = clamp(ArgCI->getSExtValue(), 0, MaxIndex); 8220 8221 // The builtin semantics don't exactly match the xxinsertw instructions 8222 // semantics (which ppc_vsx_xxinsertw follows). The builtin extracts the 8223 // word from the first argument, and inserts it in the second argument. The 8224 // instruction extracts the word from its second input register and inserts 8225 // it into its first input register, so swap the first and second arguments. 8226 std::swap(Ops[0], Ops[1]); 8227 8228 // Need to cast the second argument from a vector of unsigned int to a 8229 // vector of long long. 8230 Ops[1] = Builder.CreateBitCast(Ops[1], llvm::VectorType::get(Int64Ty, 2)); 8231 8232 if (getTarget().isLittleEndian()) { 8233 // Create a shuffle mask of (1, 0) 8234 Constant *ShuffleElts[2] = { ConstantInt::get(Int32Ty, 1), 8235 ConstantInt::get(Int32Ty, 0) 8236 }; 8237 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 8238 8239 // Reverse the double words in the vector we will extract from. 8240 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 8241 Ops[0] = Builder.CreateShuffleVector(Ops[0], Ops[0], ShuffleMask); 8242 8243 // Reverse the index. 8244 Index = MaxIndex - Index; 8245 } 8246 8247 // Intrinsic expects the first arg to be a vector of int. 8248 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 8249 Ops[2] = ConstantInt::getSigned(Int32Ty, Index); 8250 return Builder.CreateCall(F, Ops); 8251 } 8252 8253 case PPC::BI__builtin_vsx_extractuword: { 8254 llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_vsx_xxextractuw); 8255 8256 // Intrinsic expects the first argument to be a vector of doublewords. 8257 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 8258 8259 // The second argument is a compile time constant int that needs to 8260 // be clamped to the range [0, 12]. 8261 ConstantInt *ArgCI = dyn_cast<ConstantInt>(Ops[1]); 8262 assert(ArgCI && 8263 "Second Arg to xxextractuw intrinsic must be a constant integer!"); 8264 const int64_t MaxIndex = 12; 8265 int64_t Index = clamp(ArgCI->getSExtValue(), 0, MaxIndex); 8266 8267 if (getTarget().isLittleEndian()) { 8268 // Reverse the index. 8269 Index = MaxIndex - Index; 8270 Ops[1] = ConstantInt::getSigned(Int32Ty, Index); 8271 8272 // Emit the call, then reverse the double words of the results vector. 8273 Value *Call = Builder.CreateCall(F, Ops); 8274 8275 // Create a shuffle mask of (1, 0) 8276 Constant *ShuffleElts[2] = { ConstantInt::get(Int32Ty, 1), 8277 ConstantInt::get(Int32Ty, 0) 8278 }; 8279 Constant *ShuffleMask = llvm::ConstantVector::get(ShuffleElts); 8280 8281 Value *ShuffleCall = Builder.CreateShuffleVector(Call, Call, ShuffleMask); 8282 return ShuffleCall; 8283 } else { 8284 Ops[1] = ConstantInt::getSigned(Int32Ty, Index); 8285 return Builder.CreateCall(F, Ops); 8286 } 8287 } 8288 } 8289 } 8290 8291 Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID, 8292 const CallExpr *E) { 8293 switch (BuiltinID) { 8294 case AMDGPU::BI__builtin_amdgcn_div_scale: 8295 case AMDGPU::BI__builtin_amdgcn_div_scalef: { 8296 // Translate from the intrinsics's struct return to the builtin's out 8297 // argument. 8298 8299 Address FlagOutPtr = EmitPointerWithAlignment(E->getArg(3)); 8300 8301 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 8302 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 8303 llvm::Value *Z = EmitScalarExpr(E->getArg(2)); 8304 8305 llvm::Value *Callee = CGM.getIntrinsic(Intrinsic::amdgcn_div_scale, 8306 X->getType()); 8307 8308 llvm::Value *Tmp = Builder.CreateCall(Callee, {X, Y, Z}); 8309 8310 llvm::Value *Result = Builder.CreateExtractValue(Tmp, 0); 8311 llvm::Value *Flag = Builder.CreateExtractValue(Tmp, 1); 8312 8313 llvm::Type *RealFlagType 8314 = FlagOutPtr.getPointer()->getType()->getPointerElementType(); 8315 8316 llvm::Value *FlagExt = Builder.CreateZExt(Flag, RealFlagType); 8317 Builder.CreateStore(FlagExt, FlagOutPtr); 8318 return Result; 8319 } 8320 case AMDGPU::BI__builtin_amdgcn_div_fmas: 8321 case AMDGPU::BI__builtin_amdgcn_div_fmasf: { 8322 llvm::Value *Src0 = EmitScalarExpr(E->getArg(0)); 8323 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); 8324 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); 8325 llvm::Value *Src3 = EmitScalarExpr(E->getArg(3)); 8326 8327 llvm::Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_div_fmas, 8328 Src0->getType()); 8329 llvm::Value *Src3ToBool = Builder.CreateIsNotNull(Src3); 8330 return Builder.CreateCall(F, {Src0, Src1, Src2, Src3ToBool}); 8331 } 8332 8333 case AMDGPU::BI__builtin_amdgcn_ds_swizzle: 8334 return emitBinaryBuiltin(*this, E, Intrinsic::amdgcn_ds_swizzle); 8335 case AMDGPU::BI__builtin_amdgcn_div_fixup: 8336 case AMDGPU::BI__builtin_amdgcn_div_fixupf: 8337 case AMDGPU::BI__builtin_amdgcn_div_fixuph: 8338 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_div_fixup); 8339 case AMDGPU::BI__builtin_amdgcn_trig_preop: 8340 case AMDGPU::BI__builtin_amdgcn_trig_preopf: 8341 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_trig_preop); 8342 case AMDGPU::BI__builtin_amdgcn_rcp: 8343 case AMDGPU::BI__builtin_amdgcn_rcpf: 8344 case AMDGPU::BI__builtin_amdgcn_rcph: 8345 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rcp); 8346 case AMDGPU::BI__builtin_amdgcn_rsq: 8347 case AMDGPU::BI__builtin_amdgcn_rsqf: 8348 case AMDGPU::BI__builtin_amdgcn_rsqh: 8349 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq); 8350 case AMDGPU::BI__builtin_amdgcn_rsq_clamp: 8351 case AMDGPU::BI__builtin_amdgcn_rsq_clampf: 8352 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_rsq_clamp); 8353 case AMDGPU::BI__builtin_amdgcn_sinf: 8354 case AMDGPU::BI__builtin_amdgcn_sinh: 8355 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_sin); 8356 case AMDGPU::BI__builtin_amdgcn_cosf: 8357 case AMDGPU::BI__builtin_amdgcn_cosh: 8358 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_cos); 8359 case AMDGPU::BI__builtin_amdgcn_log_clampf: 8360 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_log_clamp); 8361 case AMDGPU::BI__builtin_amdgcn_ldexp: 8362 case AMDGPU::BI__builtin_amdgcn_ldexpf: 8363 case AMDGPU::BI__builtin_amdgcn_ldexph: 8364 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_ldexp); 8365 case AMDGPU::BI__builtin_amdgcn_frexp_mant: 8366 case AMDGPU::BI__builtin_amdgcn_frexp_mantf: 8367 case AMDGPU::BI__builtin_amdgcn_frexp_manth: 8368 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_frexp_mant); 8369 case AMDGPU::BI__builtin_amdgcn_frexp_exp: 8370 case AMDGPU::BI__builtin_amdgcn_frexp_expf: { 8371 Value *Src0 = EmitScalarExpr(E->getArg(0)); 8372 Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_frexp_exp, 8373 { Builder.getInt32Ty(), Src0->getType() }); 8374 return Builder.CreateCall(F, Src0); 8375 } 8376 case AMDGPU::BI__builtin_amdgcn_frexp_exph: { 8377 Value *Src0 = EmitScalarExpr(E->getArg(0)); 8378 Value *F = CGM.getIntrinsic(Intrinsic::amdgcn_frexp_exp, 8379 { Builder.getInt16Ty(), Src0->getType() }); 8380 return Builder.CreateCall(F, Src0); 8381 } 8382 case AMDGPU::BI__builtin_amdgcn_fract: 8383 case AMDGPU::BI__builtin_amdgcn_fractf: 8384 case AMDGPU::BI__builtin_amdgcn_fracth: 8385 return emitUnaryBuiltin(*this, E, Intrinsic::amdgcn_fract); 8386 case AMDGPU::BI__builtin_amdgcn_lerp: 8387 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_lerp); 8388 case AMDGPU::BI__builtin_amdgcn_uicmp: 8389 case AMDGPU::BI__builtin_amdgcn_uicmpl: 8390 case AMDGPU::BI__builtin_amdgcn_sicmp: 8391 case AMDGPU::BI__builtin_amdgcn_sicmpl: 8392 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_icmp); 8393 case AMDGPU::BI__builtin_amdgcn_fcmp: 8394 case AMDGPU::BI__builtin_amdgcn_fcmpf: 8395 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_fcmp); 8396 case AMDGPU::BI__builtin_amdgcn_class: 8397 case AMDGPU::BI__builtin_amdgcn_classf: 8398 case AMDGPU::BI__builtin_amdgcn_classh: 8399 return emitFPIntBuiltin(*this, E, Intrinsic::amdgcn_class); 8400 case AMDGPU::BI__builtin_amdgcn_fmed3f: 8401 return emitTernaryBuiltin(*this, E, Intrinsic::amdgcn_fmed3); 8402 case AMDGPU::BI__builtin_amdgcn_read_exec: { 8403 CallInst *CI = cast<CallInst>( 8404 EmitSpecialRegisterBuiltin(*this, E, Int64Ty, Int64Ty, true, "exec")); 8405 CI->setConvergent(); 8406 return CI; 8407 } 8408 8409 // amdgcn workitem 8410 case AMDGPU::BI__builtin_amdgcn_workitem_id_x: 8411 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_x, 0, 1024); 8412 case AMDGPU::BI__builtin_amdgcn_workitem_id_y: 8413 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_y, 0, 1024); 8414 case AMDGPU::BI__builtin_amdgcn_workitem_id_z: 8415 return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_z, 0, 1024); 8416 8417 // r600 intrinsics 8418 case AMDGPU::BI__builtin_r600_recipsqrt_ieee: 8419 case AMDGPU::BI__builtin_r600_recipsqrt_ieeef: 8420 return emitUnaryBuiltin(*this, E, Intrinsic::r600_recipsqrt_ieee); 8421 case AMDGPU::BI__builtin_r600_read_tidig_x: 8422 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_x, 0, 1024); 8423 case AMDGPU::BI__builtin_r600_read_tidig_y: 8424 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_y, 0, 1024); 8425 case AMDGPU::BI__builtin_r600_read_tidig_z: 8426 return emitRangedBuiltin(*this, Intrinsic::r600_read_tidig_z, 0, 1024); 8427 default: 8428 return nullptr; 8429 } 8430 } 8431 8432 /// Handle a SystemZ function in which the final argument is a pointer 8433 /// to an int that receives the post-instruction CC value. At the LLVM level 8434 /// this is represented as a function that returns a {result, cc} pair. 8435 static Value *EmitSystemZIntrinsicWithCC(CodeGenFunction &CGF, 8436 unsigned IntrinsicID, 8437 const CallExpr *E) { 8438 unsigned NumArgs = E->getNumArgs() - 1; 8439 SmallVector<Value *, 8> Args(NumArgs); 8440 for (unsigned I = 0; I < NumArgs; ++I) 8441 Args[I] = CGF.EmitScalarExpr(E->getArg(I)); 8442 Address CCPtr = CGF.EmitPointerWithAlignment(E->getArg(NumArgs)); 8443 Value *F = CGF.CGM.getIntrinsic(IntrinsicID); 8444 Value *Call = CGF.Builder.CreateCall(F, Args); 8445 Value *CC = CGF.Builder.CreateExtractValue(Call, 1); 8446 CGF.Builder.CreateStore(CC, CCPtr); 8447 return CGF.Builder.CreateExtractValue(Call, 0); 8448 } 8449 8450 Value *CodeGenFunction::EmitSystemZBuiltinExpr(unsigned BuiltinID, 8451 const CallExpr *E) { 8452 switch (BuiltinID) { 8453 case SystemZ::BI__builtin_tbegin: { 8454 Value *TDB = EmitScalarExpr(E->getArg(0)); 8455 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 8456 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin); 8457 return Builder.CreateCall(F, {TDB, Control}); 8458 } 8459 case SystemZ::BI__builtin_tbegin_nofloat: { 8460 Value *TDB = EmitScalarExpr(E->getArg(0)); 8461 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 8462 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin_nofloat); 8463 return Builder.CreateCall(F, {TDB, Control}); 8464 } 8465 case SystemZ::BI__builtin_tbeginc: { 8466 Value *TDB = llvm::ConstantPointerNull::get(Int8PtrTy); 8467 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff08); 8468 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbeginc); 8469 return Builder.CreateCall(F, {TDB, Control}); 8470 } 8471 case SystemZ::BI__builtin_tabort: { 8472 Value *Data = EmitScalarExpr(E->getArg(0)); 8473 Value *F = CGM.getIntrinsic(Intrinsic::s390_tabort); 8474 return Builder.CreateCall(F, Builder.CreateSExt(Data, Int64Ty, "tabort")); 8475 } 8476 case SystemZ::BI__builtin_non_tx_store: { 8477 Value *Address = EmitScalarExpr(E->getArg(0)); 8478 Value *Data = EmitScalarExpr(E->getArg(1)); 8479 Value *F = CGM.getIntrinsic(Intrinsic::s390_ntstg); 8480 return Builder.CreateCall(F, {Data, Address}); 8481 } 8482 8483 // Vector builtins. Note that most vector builtins are mapped automatically 8484 // to target-specific LLVM intrinsics. The ones handled specially here can 8485 // be represented via standard LLVM IR, which is preferable to enable common 8486 // LLVM optimizations. 8487 8488 case SystemZ::BI__builtin_s390_vpopctb: 8489 case SystemZ::BI__builtin_s390_vpopcth: 8490 case SystemZ::BI__builtin_s390_vpopctf: 8491 case SystemZ::BI__builtin_s390_vpopctg: { 8492 llvm::Type *ResultType = ConvertType(E->getType()); 8493 Value *X = EmitScalarExpr(E->getArg(0)); 8494 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 8495 return Builder.CreateCall(F, X); 8496 } 8497 8498 case SystemZ::BI__builtin_s390_vclzb: 8499 case SystemZ::BI__builtin_s390_vclzh: 8500 case SystemZ::BI__builtin_s390_vclzf: 8501 case SystemZ::BI__builtin_s390_vclzg: { 8502 llvm::Type *ResultType = ConvertType(E->getType()); 8503 Value *X = EmitScalarExpr(E->getArg(0)); 8504 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 8505 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 8506 return Builder.CreateCall(F, {X, Undef}); 8507 } 8508 8509 case SystemZ::BI__builtin_s390_vctzb: 8510 case SystemZ::BI__builtin_s390_vctzh: 8511 case SystemZ::BI__builtin_s390_vctzf: 8512 case SystemZ::BI__builtin_s390_vctzg: { 8513 llvm::Type *ResultType = ConvertType(E->getType()); 8514 Value *X = EmitScalarExpr(E->getArg(0)); 8515 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 8516 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 8517 return Builder.CreateCall(F, {X, Undef}); 8518 } 8519 8520 case SystemZ::BI__builtin_s390_vfsqdb: { 8521 llvm::Type *ResultType = ConvertType(E->getType()); 8522 Value *X = EmitScalarExpr(E->getArg(0)); 8523 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, ResultType); 8524 return Builder.CreateCall(F, X); 8525 } 8526 case SystemZ::BI__builtin_s390_vfmadb: { 8527 llvm::Type *ResultType = ConvertType(E->getType()); 8528 Value *X = EmitScalarExpr(E->getArg(0)); 8529 Value *Y = EmitScalarExpr(E->getArg(1)); 8530 Value *Z = EmitScalarExpr(E->getArg(2)); 8531 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 8532 return Builder.CreateCall(F, {X, Y, Z}); 8533 } 8534 case SystemZ::BI__builtin_s390_vfmsdb: { 8535 llvm::Type *ResultType = ConvertType(E->getType()); 8536 Value *X = EmitScalarExpr(E->getArg(0)); 8537 Value *Y = EmitScalarExpr(E->getArg(1)); 8538 Value *Z = EmitScalarExpr(E->getArg(2)); 8539 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 8540 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 8541 return Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 8542 } 8543 case SystemZ::BI__builtin_s390_vflpdb: { 8544 llvm::Type *ResultType = ConvertType(E->getType()); 8545 Value *X = EmitScalarExpr(E->getArg(0)); 8546 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 8547 return Builder.CreateCall(F, X); 8548 } 8549 case SystemZ::BI__builtin_s390_vflndb: { 8550 llvm::Type *ResultType = ConvertType(E->getType()); 8551 Value *X = EmitScalarExpr(E->getArg(0)); 8552 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 8553 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 8554 return Builder.CreateFSub(Zero, Builder.CreateCall(F, X), "sub"); 8555 } 8556 case SystemZ::BI__builtin_s390_vfidb: { 8557 llvm::Type *ResultType = ConvertType(E->getType()); 8558 Value *X = EmitScalarExpr(E->getArg(0)); 8559 // Constant-fold the M4 and M5 mask arguments. 8560 llvm::APSInt M4, M5; 8561 bool IsConstM4 = E->getArg(1)->isIntegerConstantExpr(M4, getContext()); 8562 bool IsConstM5 = E->getArg(2)->isIntegerConstantExpr(M5, getContext()); 8563 assert(IsConstM4 && IsConstM5 && "Constant arg isn't actually constant?"); 8564 (void)IsConstM4; (void)IsConstM5; 8565 // Check whether this instance of vfidb can be represented via a LLVM 8566 // standard intrinsic. We only support some combinations of M4 and M5. 8567 Intrinsic::ID ID = Intrinsic::not_intrinsic; 8568 switch (M4.getZExtValue()) { 8569 default: break; 8570 case 0: // IEEE-inexact exception allowed 8571 switch (M5.getZExtValue()) { 8572 default: break; 8573 case 0: ID = Intrinsic::rint; break; 8574 } 8575 break; 8576 case 4: // IEEE-inexact exception suppressed 8577 switch (M5.getZExtValue()) { 8578 default: break; 8579 case 0: ID = Intrinsic::nearbyint; break; 8580 case 1: ID = Intrinsic::round; break; 8581 case 5: ID = Intrinsic::trunc; break; 8582 case 6: ID = Intrinsic::ceil; break; 8583 case 7: ID = Intrinsic::floor; break; 8584 } 8585 break; 8586 } 8587 if (ID != Intrinsic::not_intrinsic) { 8588 Function *F = CGM.getIntrinsic(ID, ResultType); 8589 return Builder.CreateCall(F, X); 8590 } 8591 Function *F = CGM.getIntrinsic(Intrinsic::s390_vfidb); 8592 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 8593 Value *M5Value = llvm::ConstantInt::get(getLLVMContext(), M5); 8594 return Builder.CreateCall(F, {X, M4Value, M5Value}); 8595 } 8596 8597 // Vector intrisincs that output the post-instruction CC value. 8598 8599 #define INTRINSIC_WITH_CC(NAME) \ 8600 case SystemZ::BI__builtin_##NAME: \ 8601 return EmitSystemZIntrinsicWithCC(*this, Intrinsic::NAME, E) 8602 8603 INTRINSIC_WITH_CC(s390_vpkshs); 8604 INTRINSIC_WITH_CC(s390_vpksfs); 8605 INTRINSIC_WITH_CC(s390_vpksgs); 8606 8607 INTRINSIC_WITH_CC(s390_vpklshs); 8608 INTRINSIC_WITH_CC(s390_vpklsfs); 8609 INTRINSIC_WITH_CC(s390_vpklsgs); 8610 8611 INTRINSIC_WITH_CC(s390_vceqbs); 8612 INTRINSIC_WITH_CC(s390_vceqhs); 8613 INTRINSIC_WITH_CC(s390_vceqfs); 8614 INTRINSIC_WITH_CC(s390_vceqgs); 8615 8616 INTRINSIC_WITH_CC(s390_vchbs); 8617 INTRINSIC_WITH_CC(s390_vchhs); 8618 INTRINSIC_WITH_CC(s390_vchfs); 8619 INTRINSIC_WITH_CC(s390_vchgs); 8620 8621 INTRINSIC_WITH_CC(s390_vchlbs); 8622 INTRINSIC_WITH_CC(s390_vchlhs); 8623 INTRINSIC_WITH_CC(s390_vchlfs); 8624 INTRINSIC_WITH_CC(s390_vchlgs); 8625 8626 INTRINSIC_WITH_CC(s390_vfaebs); 8627 INTRINSIC_WITH_CC(s390_vfaehs); 8628 INTRINSIC_WITH_CC(s390_vfaefs); 8629 8630 INTRINSIC_WITH_CC(s390_vfaezbs); 8631 INTRINSIC_WITH_CC(s390_vfaezhs); 8632 INTRINSIC_WITH_CC(s390_vfaezfs); 8633 8634 INTRINSIC_WITH_CC(s390_vfeebs); 8635 INTRINSIC_WITH_CC(s390_vfeehs); 8636 INTRINSIC_WITH_CC(s390_vfeefs); 8637 8638 INTRINSIC_WITH_CC(s390_vfeezbs); 8639 INTRINSIC_WITH_CC(s390_vfeezhs); 8640 INTRINSIC_WITH_CC(s390_vfeezfs); 8641 8642 INTRINSIC_WITH_CC(s390_vfenebs); 8643 INTRINSIC_WITH_CC(s390_vfenehs); 8644 INTRINSIC_WITH_CC(s390_vfenefs); 8645 8646 INTRINSIC_WITH_CC(s390_vfenezbs); 8647 INTRINSIC_WITH_CC(s390_vfenezhs); 8648 INTRINSIC_WITH_CC(s390_vfenezfs); 8649 8650 INTRINSIC_WITH_CC(s390_vistrbs); 8651 INTRINSIC_WITH_CC(s390_vistrhs); 8652 INTRINSIC_WITH_CC(s390_vistrfs); 8653 8654 INTRINSIC_WITH_CC(s390_vstrcbs); 8655 INTRINSIC_WITH_CC(s390_vstrchs); 8656 INTRINSIC_WITH_CC(s390_vstrcfs); 8657 8658 INTRINSIC_WITH_CC(s390_vstrczbs); 8659 INTRINSIC_WITH_CC(s390_vstrczhs); 8660 INTRINSIC_WITH_CC(s390_vstrczfs); 8661 8662 INTRINSIC_WITH_CC(s390_vfcedbs); 8663 INTRINSIC_WITH_CC(s390_vfchdbs); 8664 INTRINSIC_WITH_CC(s390_vfchedbs); 8665 8666 INTRINSIC_WITH_CC(s390_vftcidb); 8667 8668 #undef INTRINSIC_WITH_CC 8669 8670 default: 8671 return nullptr; 8672 } 8673 } 8674 8675 Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, 8676 const CallExpr *E) { 8677 auto MakeLdg = [&](unsigned IntrinsicID) { 8678 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8679 AlignmentSource AlignSource; 8680 clang::CharUnits Align = 8681 getNaturalPointeeTypeAlignment(E->getArg(0)->getType(), &AlignSource); 8682 return Builder.CreateCall( 8683 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 8684 Ptr->getType()}), 8685 {Ptr, ConstantInt::get(Builder.getInt32Ty(), Align.getQuantity())}); 8686 }; 8687 auto MakeScopedAtomic = [&](unsigned IntrinsicID) { 8688 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8689 return Builder.CreateCall( 8690 CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(), 8691 Ptr->getType()}), 8692 {Ptr, EmitScalarExpr(E->getArg(1))}); 8693 }; 8694 switch (BuiltinID) { 8695 case NVPTX::BI__nvvm_atom_add_gen_i: 8696 case NVPTX::BI__nvvm_atom_add_gen_l: 8697 case NVPTX::BI__nvvm_atom_add_gen_ll: 8698 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Add, E); 8699 8700 case NVPTX::BI__nvvm_atom_sub_gen_i: 8701 case NVPTX::BI__nvvm_atom_sub_gen_l: 8702 case NVPTX::BI__nvvm_atom_sub_gen_ll: 8703 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Sub, E); 8704 8705 case NVPTX::BI__nvvm_atom_and_gen_i: 8706 case NVPTX::BI__nvvm_atom_and_gen_l: 8707 case NVPTX::BI__nvvm_atom_and_gen_ll: 8708 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::And, E); 8709 8710 case NVPTX::BI__nvvm_atom_or_gen_i: 8711 case NVPTX::BI__nvvm_atom_or_gen_l: 8712 case NVPTX::BI__nvvm_atom_or_gen_ll: 8713 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Or, E); 8714 8715 case NVPTX::BI__nvvm_atom_xor_gen_i: 8716 case NVPTX::BI__nvvm_atom_xor_gen_l: 8717 case NVPTX::BI__nvvm_atom_xor_gen_ll: 8718 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xor, E); 8719 8720 case NVPTX::BI__nvvm_atom_xchg_gen_i: 8721 case NVPTX::BI__nvvm_atom_xchg_gen_l: 8722 case NVPTX::BI__nvvm_atom_xchg_gen_ll: 8723 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xchg, E); 8724 8725 case NVPTX::BI__nvvm_atom_max_gen_i: 8726 case NVPTX::BI__nvvm_atom_max_gen_l: 8727 case NVPTX::BI__nvvm_atom_max_gen_ll: 8728 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Max, E); 8729 8730 case NVPTX::BI__nvvm_atom_max_gen_ui: 8731 case NVPTX::BI__nvvm_atom_max_gen_ul: 8732 case NVPTX::BI__nvvm_atom_max_gen_ull: 8733 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMax, E); 8734 8735 case NVPTX::BI__nvvm_atom_min_gen_i: 8736 case NVPTX::BI__nvvm_atom_min_gen_l: 8737 case NVPTX::BI__nvvm_atom_min_gen_ll: 8738 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Min, E); 8739 8740 case NVPTX::BI__nvvm_atom_min_gen_ui: 8741 case NVPTX::BI__nvvm_atom_min_gen_ul: 8742 case NVPTX::BI__nvvm_atom_min_gen_ull: 8743 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMin, E); 8744 8745 case NVPTX::BI__nvvm_atom_cas_gen_i: 8746 case NVPTX::BI__nvvm_atom_cas_gen_l: 8747 case NVPTX::BI__nvvm_atom_cas_gen_ll: 8748 // __nvvm_atom_cas_gen_* should return the old value rather than the 8749 // success flag. 8750 return MakeAtomicCmpXchgValue(*this, E, /*ReturnBool=*/false); 8751 8752 case NVPTX::BI__nvvm_atom_add_gen_f: { 8753 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8754 Value *Val = EmitScalarExpr(E->getArg(1)); 8755 // atomicrmw only deals with integer arguments so we need to use 8756 // LLVM's nvvm_atomic_load_add_f32 intrinsic for that. 8757 Value *FnALAF32 = 8758 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f32, Ptr->getType()); 8759 return Builder.CreateCall(FnALAF32, {Ptr, Val}); 8760 } 8761 8762 case NVPTX::BI__nvvm_atom_inc_gen_ui: { 8763 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8764 Value *Val = EmitScalarExpr(E->getArg(1)); 8765 Value *FnALI32 = 8766 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_inc_32, Ptr->getType()); 8767 return Builder.CreateCall(FnALI32, {Ptr, Val}); 8768 } 8769 8770 case NVPTX::BI__nvvm_atom_dec_gen_ui: { 8771 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8772 Value *Val = EmitScalarExpr(E->getArg(1)); 8773 Value *FnALD32 = 8774 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_dec_32, Ptr->getType()); 8775 return Builder.CreateCall(FnALD32, {Ptr, Val}); 8776 } 8777 8778 case NVPTX::BI__nvvm_ldg_c: 8779 case NVPTX::BI__nvvm_ldg_c2: 8780 case NVPTX::BI__nvvm_ldg_c4: 8781 case NVPTX::BI__nvvm_ldg_s: 8782 case NVPTX::BI__nvvm_ldg_s2: 8783 case NVPTX::BI__nvvm_ldg_s4: 8784 case NVPTX::BI__nvvm_ldg_i: 8785 case NVPTX::BI__nvvm_ldg_i2: 8786 case NVPTX::BI__nvvm_ldg_i4: 8787 case NVPTX::BI__nvvm_ldg_l: 8788 case NVPTX::BI__nvvm_ldg_ll: 8789 case NVPTX::BI__nvvm_ldg_ll2: 8790 case NVPTX::BI__nvvm_ldg_uc: 8791 case NVPTX::BI__nvvm_ldg_uc2: 8792 case NVPTX::BI__nvvm_ldg_uc4: 8793 case NVPTX::BI__nvvm_ldg_us: 8794 case NVPTX::BI__nvvm_ldg_us2: 8795 case NVPTX::BI__nvvm_ldg_us4: 8796 case NVPTX::BI__nvvm_ldg_ui: 8797 case NVPTX::BI__nvvm_ldg_ui2: 8798 case NVPTX::BI__nvvm_ldg_ui4: 8799 case NVPTX::BI__nvvm_ldg_ul: 8800 case NVPTX::BI__nvvm_ldg_ull: 8801 case NVPTX::BI__nvvm_ldg_ull2: 8802 // PTX Interoperability section 2.2: "For a vector with an even number of 8803 // elements, its alignment is set to number of elements times the alignment 8804 // of its member: n*alignof(t)." 8805 return MakeLdg(Intrinsic::nvvm_ldg_global_i); 8806 case NVPTX::BI__nvvm_ldg_f: 8807 case NVPTX::BI__nvvm_ldg_f2: 8808 case NVPTX::BI__nvvm_ldg_f4: 8809 case NVPTX::BI__nvvm_ldg_d: 8810 case NVPTX::BI__nvvm_ldg_d2: 8811 return MakeLdg(Intrinsic::nvvm_ldg_global_f); 8812 8813 case NVPTX::BI__nvvm_atom_cta_add_gen_i: 8814 case NVPTX::BI__nvvm_atom_cta_add_gen_l: 8815 case NVPTX::BI__nvvm_atom_cta_add_gen_ll: 8816 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_cta); 8817 case NVPTX::BI__nvvm_atom_sys_add_gen_i: 8818 case NVPTX::BI__nvvm_atom_sys_add_gen_l: 8819 case NVPTX::BI__nvvm_atom_sys_add_gen_ll: 8820 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_i_sys); 8821 case NVPTX::BI__nvvm_atom_cta_add_gen_f: 8822 case NVPTX::BI__nvvm_atom_cta_add_gen_d: 8823 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_cta); 8824 case NVPTX::BI__nvvm_atom_sys_add_gen_f: 8825 case NVPTX::BI__nvvm_atom_sys_add_gen_d: 8826 return MakeScopedAtomic(Intrinsic::nvvm_atomic_add_gen_f_sys); 8827 case NVPTX::BI__nvvm_atom_cta_xchg_gen_i: 8828 case NVPTX::BI__nvvm_atom_cta_xchg_gen_l: 8829 case NVPTX::BI__nvvm_atom_cta_xchg_gen_ll: 8830 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_cta); 8831 case NVPTX::BI__nvvm_atom_sys_xchg_gen_i: 8832 case NVPTX::BI__nvvm_atom_sys_xchg_gen_l: 8833 case NVPTX::BI__nvvm_atom_sys_xchg_gen_ll: 8834 return MakeScopedAtomic(Intrinsic::nvvm_atomic_exch_gen_i_sys); 8835 case NVPTX::BI__nvvm_atom_cta_max_gen_i: 8836 case NVPTX::BI__nvvm_atom_cta_max_gen_ui: 8837 case NVPTX::BI__nvvm_atom_cta_max_gen_l: 8838 case NVPTX::BI__nvvm_atom_cta_max_gen_ul: 8839 case NVPTX::BI__nvvm_atom_cta_max_gen_ll: 8840 case NVPTX::BI__nvvm_atom_cta_max_gen_ull: 8841 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_cta); 8842 case NVPTX::BI__nvvm_atom_sys_max_gen_i: 8843 case NVPTX::BI__nvvm_atom_sys_max_gen_ui: 8844 case NVPTX::BI__nvvm_atom_sys_max_gen_l: 8845 case NVPTX::BI__nvvm_atom_sys_max_gen_ul: 8846 case NVPTX::BI__nvvm_atom_sys_max_gen_ll: 8847 case NVPTX::BI__nvvm_atom_sys_max_gen_ull: 8848 return MakeScopedAtomic(Intrinsic::nvvm_atomic_max_gen_i_sys); 8849 case NVPTX::BI__nvvm_atom_cta_min_gen_i: 8850 case NVPTX::BI__nvvm_atom_cta_min_gen_ui: 8851 case NVPTX::BI__nvvm_atom_cta_min_gen_l: 8852 case NVPTX::BI__nvvm_atom_cta_min_gen_ul: 8853 case NVPTX::BI__nvvm_atom_cta_min_gen_ll: 8854 case NVPTX::BI__nvvm_atom_cta_min_gen_ull: 8855 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_cta); 8856 case NVPTX::BI__nvvm_atom_sys_min_gen_i: 8857 case NVPTX::BI__nvvm_atom_sys_min_gen_ui: 8858 case NVPTX::BI__nvvm_atom_sys_min_gen_l: 8859 case NVPTX::BI__nvvm_atom_sys_min_gen_ul: 8860 case NVPTX::BI__nvvm_atom_sys_min_gen_ll: 8861 case NVPTX::BI__nvvm_atom_sys_min_gen_ull: 8862 return MakeScopedAtomic(Intrinsic::nvvm_atomic_min_gen_i_sys); 8863 case NVPTX::BI__nvvm_atom_cta_inc_gen_ui: 8864 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_cta); 8865 case NVPTX::BI__nvvm_atom_cta_dec_gen_ui: 8866 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_cta); 8867 case NVPTX::BI__nvvm_atom_sys_inc_gen_ui: 8868 return MakeScopedAtomic(Intrinsic::nvvm_atomic_inc_gen_i_sys); 8869 case NVPTX::BI__nvvm_atom_sys_dec_gen_ui: 8870 return MakeScopedAtomic(Intrinsic::nvvm_atomic_dec_gen_i_sys); 8871 case NVPTX::BI__nvvm_atom_cta_and_gen_i: 8872 case NVPTX::BI__nvvm_atom_cta_and_gen_l: 8873 case NVPTX::BI__nvvm_atom_cta_and_gen_ll: 8874 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_cta); 8875 case NVPTX::BI__nvvm_atom_sys_and_gen_i: 8876 case NVPTX::BI__nvvm_atom_sys_and_gen_l: 8877 case NVPTX::BI__nvvm_atom_sys_and_gen_ll: 8878 return MakeScopedAtomic(Intrinsic::nvvm_atomic_and_gen_i_sys); 8879 case NVPTX::BI__nvvm_atom_cta_or_gen_i: 8880 case NVPTX::BI__nvvm_atom_cta_or_gen_l: 8881 case NVPTX::BI__nvvm_atom_cta_or_gen_ll: 8882 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_cta); 8883 case NVPTX::BI__nvvm_atom_sys_or_gen_i: 8884 case NVPTX::BI__nvvm_atom_sys_or_gen_l: 8885 case NVPTX::BI__nvvm_atom_sys_or_gen_ll: 8886 return MakeScopedAtomic(Intrinsic::nvvm_atomic_or_gen_i_sys); 8887 case NVPTX::BI__nvvm_atom_cta_xor_gen_i: 8888 case NVPTX::BI__nvvm_atom_cta_xor_gen_l: 8889 case NVPTX::BI__nvvm_atom_cta_xor_gen_ll: 8890 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_cta); 8891 case NVPTX::BI__nvvm_atom_sys_xor_gen_i: 8892 case NVPTX::BI__nvvm_atom_sys_xor_gen_l: 8893 case NVPTX::BI__nvvm_atom_sys_xor_gen_ll: 8894 return MakeScopedAtomic(Intrinsic::nvvm_atomic_xor_gen_i_sys); 8895 case NVPTX::BI__nvvm_atom_cta_cas_gen_i: 8896 case NVPTX::BI__nvvm_atom_cta_cas_gen_l: 8897 case NVPTX::BI__nvvm_atom_cta_cas_gen_ll: { 8898 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8899 return Builder.CreateCall( 8900 CGM.getIntrinsic( 8901 Intrinsic::nvvm_atomic_cas_gen_i_cta, 8902 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 8903 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 8904 } 8905 case NVPTX::BI__nvvm_atom_sys_cas_gen_i: 8906 case NVPTX::BI__nvvm_atom_sys_cas_gen_l: 8907 case NVPTX::BI__nvvm_atom_sys_cas_gen_ll: { 8908 Value *Ptr = EmitScalarExpr(E->getArg(0)); 8909 return Builder.CreateCall( 8910 CGM.getIntrinsic( 8911 Intrinsic::nvvm_atomic_cas_gen_i_sys, 8912 {Ptr->getType()->getPointerElementType(), Ptr->getType()}), 8913 {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))}); 8914 } 8915 default: 8916 return nullptr; 8917 } 8918 } 8919 8920 Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, 8921 const CallExpr *E) { 8922 switch (BuiltinID) { 8923 case WebAssembly::BI__builtin_wasm_current_memory: { 8924 llvm::Type *ResultType = ConvertType(E->getType()); 8925 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_current_memory, ResultType); 8926 return Builder.CreateCall(Callee); 8927 } 8928 case WebAssembly::BI__builtin_wasm_grow_memory: { 8929 Value *X = EmitScalarExpr(E->getArg(0)); 8930 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_grow_memory, X->getType()); 8931 return Builder.CreateCall(Callee, X); 8932 } 8933 8934 default: 8935 return nullptr; 8936 } 8937 } 8938