1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This contains code to emit Builtin calls as LLVM code. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "CodeGenFunction.h" 15 #include "CGCXXABI.h" 16 #include "CGObjCRuntime.h" 17 #include "CodeGenModule.h" 18 #include "TargetInfo.h" 19 #include "clang/AST/ASTContext.h" 20 #include "clang/AST/Decl.h" 21 #include "clang/Basic/TargetBuiltins.h" 22 #include "clang/Basic/TargetInfo.h" 23 #include "clang/CodeGen/CGFunctionInfo.h" 24 #include "clang/Sema/SemaDiagnostic.h" 25 #include "llvm/ADT/StringExtras.h" 26 #include "llvm/IR/CallSite.h" 27 #include "llvm/IR/DataLayout.h" 28 #include "llvm/IR/InlineAsm.h" 29 #include "llvm/IR/Intrinsics.h" 30 #include <sstream> 31 32 using namespace clang; 33 using namespace CodeGen; 34 using namespace llvm; 35 36 /// getBuiltinLibFunction - Given a builtin id for a function like 37 /// "__builtin_fabsf", return a Function* for "fabsf". 38 llvm::Value *CodeGenModule::getBuiltinLibFunction(const FunctionDecl *FD, 39 unsigned BuiltinID) { 40 assert(Context.BuiltinInfo.isLibFunction(BuiltinID)); 41 42 // Get the name, skip over the __builtin_ prefix (if necessary). 43 StringRef Name; 44 GlobalDecl D(FD); 45 46 // If the builtin has been declared explicitly with an assembler label, 47 // use the mangled name. This differs from the plain label on platforms 48 // that prefix labels. 49 if (FD->hasAttr<AsmLabelAttr>()) 50 Name = getMangledName(D); 51 else 52 Name = Context.BuiltinInfo.getName(BuiltinID) + 10; 53 54 llvm::FunctionType *Ty = 55 cast<llvm::FunctionType>(getTypes().ConvertType(FD->getType())); 56 57 return GetOrCreateLLVMFunction(Name, Ty, D, /*ForVTable=*/false); 58 } 59 60 /// Emit the conversions required to turn the given value into an 61 /// integer of the given size. 62 static Value *EmitToInt(CodeGenFunction &CGF, llvm::Value *V, 63 QualType T, llvm::IntegerType *IntType) { 64 V = CGF.EmitToMemory(V, T); 65 66 if (V->getType()->isPointerTy()) 67 return CGF.Builder.CreatePtrToInt(V, IntType); 68 69 assert(V->getType() == IntType); 70 return V; 71 } 72 73 static Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V, 74 QualType T, llvm::Type *ResultType) { 75 V = CGF.EmitFromMemory(V, T); 76 77 if (ResultType->isPointerTy()) 78 return CGF.Builder.CreateIntToPtr(V, ResultType); 79 80 assert(V->getType() == ResultType); 81 return V; 82 } 83 84 /// Utility to insert an atomic instruction based on Instrinsic::ID 85 /// and the expression node. 86 static Value *MakeBinaryAtomicValue(CodeGenFunction &CGF, 87 llvm::AtomicRMWInst::BinOp Kind, 88 const CallExpr *E) { 89 QualType T = E->getType(); 90 assert(E->getArg(0)->getType()->isPointerType()); 91 assert(CGF.getContext().hasSameUnqualifiedType(T, 92 E->getArg(0)->getType()->getPointeeType())); 93 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 94 95 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 96 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 97 98 llvm::IntegerType *IntType = 99 llvm::IntegerType::get(CGF.getLLVMContext(), 100 CGF.getContext().getTypeSize(T)); 101 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 102 103 llvm::Value *Args[2]; 104 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 105 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 106 llvm::Type *ValueType = Args[1]->getType(); 107 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 108 109 llvm::Value *Result = 110 CGF.Builder.CreateAtomicRMW(Kind, Args[0], Args[1], 111 llvm::SequentiallyConsistent); 112 return EmitFromInt(CGF, Result, T, ValueType); 113 } 114 115 static Value *EmitNontemporalStore(CodeGenFunction &CGF, const CallExpr *E) { 116 Value *Val = CGF.EmitScalarExpr(E->getArg(0)); 117 Value *Address = CGF.EmitScalarExpr(E->getArg(1)); 118 119 // Convert the type of the pointer to a pointer to the stored type. 120 Val = CGF.EmitToMemory(Val, E->getArg(0)->getType()); 121 Value *BC = CGF.Builder.CreateBitCast( 122 Address, llvm::PointerType::getUnqual(Val->getType()), "cast"); 123 LValue LV = CGF.MakeNaturalAlignAddrLValue(BC, E->getArg(0)->getType()); 124 LV.setNontemporal(true); 125 CGF.EmitStoreOfScalar(Val, LV, false); 126 return nullptr; 127 } 128 129 static Value *EmitNontemporalLoad(CodeGenFunction &CGF, const CallExpr *E) { 130 Value *Address = CGF.EmitScalarExpr(E->getArg(0)); 131 132 LValue LV = CGF.MakeNaturalAlignAddrLValue(Address, E->getType()); 133 LV.setNontemporal(true); 134 return CGF.EmitLoadOfScalar(LV, E->getExprLoc()); 135 } 136 137 static RValue EmitBinaryAtomic(CodeGenFunction &CGF, 138 llvm::AtomicRMWInst::BinOp Kind, 139 const CallExpr *E) { 140 return RValue::get(MakeBinaryAtomicValue(CGF, Kind, E)); 141 } 142 143 /// Utility to insert an atomic instruction based Instrinsic::ID and 144 /// the expression node, where the return value is the result of the 145 /// operation. 146 static RValue EmitBinaryAtomicPost(CodeGenFunction &CGF, 147 llvm::AtomicRMWInst::BinOp Kind, 148 const CallExpr *E, 149 Instruction::BinaryOps Op, 150 bool Invert = false) { 151 QualType T = E->getType(); 152 assert(E->getArg(0)->getType()->isPointerType()); 153 assert(CGF.getContext().hasSameUnqualifiedType(T, 154 E->getArg(0)->getType()->getPointeeType())); 155 assert(CGF.getContext().hasSameUnqualifiedType(T, E->getArg(1)->getType())); 156 157 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 158 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 159 160 llvm::IntegerType *IntType = 161 llvm::IntegerType::get(CGF.getLLVMContext(), 162 CGF.getContext().getTypeSize(T)); 163 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 164 165 llvm::Value *Args[2]; 166 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 167 llvm::Type *ValueType = Args[1]->getType(); 168 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 169 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 170 171 llvm::Value *Result = 172 CGF.Builder.CreateAtomicRMW(Kind, Args[0], Args[1], 173 llvm::SequentiallyConsistent); 174 Result = CGF.Builder.CreateBinOp(Op, Result, Args[1]); 175 if (Invert) 176 Result = CGF.Builder.CreateBinOp(llvm::Instruction::Xor, Result, 177 llvm::ConstantInt::get(IntType, -1)); 178 Result = EmitFromInt(CGF, Result, T, ValueType); 179 return RValue::get(Result); 180 } 181 182 /// @brief Utility to insert an atomic cmpxchg instruction. 183 /// 184 /// @param CGF The current codegen function. 185 /// @param E Builtin call expression to convert to cmpxchg. 186 /// arg0 - address to operate on 187 /// arg1 - value to compare with 188 /// arg2 - new value 189 /// @param ReturnBool Specifies whether to return success flag of 190 /// cmpxchg result or the old value. 191 /// 192 /// @returns result of cmpxchg, according to ReturnBool 193 static Value *MakeAtomicCmpXchgValue(CodeGenFunction &CGF, const CallExpr *E, 194 bool ReturnBool) { 195 QualType T = ReturnBool ? E->getArg(1)->getType() : E->getType(); 196 llvm::Value *DestPtr = CGF.EmitScalarExpr(E->getArg(0)); 197 unsigned AddrSpace = DestPtr->getType()->getPointerAddressSpace(); 198 199 llvm::IntegerType *IntType = llvm::IntegerType::get( 200 CGF.getLLVMContext(), CGF.getContext().getTypeSize(T)); 201 llvm::Type *IntPtrType = IntType->getPointerTo(AddrSpace); 202 203 Value *Args[3]; 204 Args[0] = CGF.Builder.CreateBitCast(DestPtr, IntPtrType); 205 Args[1] = CGF.EmitScalarExpr(E->getArg(1)); 206 llvm::Type *ValueType = Args[1]->getType(); 207 Args[1] = EmitToInt(CGF, Args[1], T, IntType); 208 Args[2] = EmitToInt(CGF, CGF.EmitScalarExpr(E->getArg(2)), T, IntType); 209 210 Value *Pair = CGF.Builder.CreateAtomicCmpXchg(Args[0], Args[1], Args[2], 211 llvm::SequentiallyConsistent, 212 llvm::SequentiallyConsistent); 213 if (ReturnBool) 214 // Extract boolean success flag and zext it to int. 215 return CGF.Builder.CreateZExt(CGF.Builder.CreateExtractValue(Pair, 1), 216 CGF.ConvertType(E->getType())); 217 else 218 // Extract old value and emit it using the same type as compare value. 219 return EmitFromInt(CGF, CGF.Builder.CreateExtractValue(Pair, 0), T, 220 ValueType); 221 } 222 223 /// EmitFAbs - Emit a call to @llvm.fabs(). 224 static Value *EmitFAbs(CodeGenFunction &CGF, Value *V) { 225 Value *F = CGF.CGM.getIntrinsic(Intrinsic::fabs, V->getType()); 226 llvm::CallInst *Call = CGF.Builder.CreateCall(F, V); 227 Call->setDoesNotAccessMemory(); 228 return Call; 229 } 230 231 /// Emit the computation of the sign bit for a floating point value. Returns 232 /// the i1 sign bit value. 233 static Value *EmitSignBit(CodeGenFunction &CGF, Value *V) { 234 LLVMContext &C = CGF.CGM.getLLVMContext(); 235 236 llvm::Type *Ty = V->getType(); 237 int Width = Ty->getPrimitiveSizeInBits(); 238 llvm::Type *IntTy = llvm::IntegerType::get(C, Width); 239 V = CGF.Builder.CreateBitCast(V, IntTy); 240 if (Ty->isPPC_FP128Ty()) { 241 // The higher-order double comes first, and so we need to truncate the 242 // pair to extract the overall sign. The order of the pair is the same 243 // in both little- and big-Endian modes. 244 Width >>= 1; 245 IntTy = llvm::IntegerType::get(C, Width); 246 V = CGF.Builder.CreateTrunc(V, IntTy); 247 } 248 Value *Zero = llvm::Constant::getNullValue(IntTy); 249 return CGF.Builder.CreateICmpSLT(V, Zero); 250 } 251 252 static RValue emitLibraryCall(CodeGenFunction &CGF, const FunctionDecl *Fn, 253 const CallExpr *E, llvm::Value *calleeValue) { 254 return CGF.EmitCall(E->getCallee()->getType(), calleeValue, E, 255 ReturnValueSlot(), Fn); 256 } 257 258 /// \brief Emit a call to llvm.{sadd,uadd,ssub,usub,smul,umul}.with.overflow.* 259 /// depending on IntrinsicID. 260 /// 261 /// \arg CGF The current codegen function. 262 /// \arg IntrinsicID The ID for the Intrinsic we wish to generate. 263 /// \arg X The first argument to the llvm.*.with.overflow.*. 264 /// \arg Y The second argument to the llvm.*.with.overflow.*. 265 /// \arg Carry The carry returned by the llvm.*.with.overflow.*. 266 /// \returns The result (i.e. sum/product) returned by the intrinsic. 267 static llvm::Value *EmitOverflowIntrinsic(CodeGenFunction &CGF, 268 const llvm::Intrinsic::ID IntrinsicID, 269 llvm::Value *X, llvm::Value *Y, 270 llvm::Value *&Carry) { 271 // Make sure we have integers of the same width. 272 assert(X->getType() == Y->getType() && 273 "Arguments must be the same type. (Did you forget to make sure both " 274 "arguments have the same integer width?)"); 275 276 llvm::Value *Callee = CGF.CGM.getIntrinsic(IntrinsicID, X->getType()); 277 llvm::Value *Tmp = CGF.Builder.CreateCall(Callee, {X, Y}); 278 Carry = CGF.Builder.CreateExtractValue(Tmp, 1); 279 return CGF.Builder.CreateExtractValue(Tmp, 0); 280 } 281 282 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) { 283 llvm::Type *DestType = Int8PtrTy; 284 if (ArgValue->getType() != DestType) 285 ArgValue = 286 Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data()); 287 288 Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend; 289 return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue); 290 } 291 292 // Returns true if we have a valid set of target features. 293 bool CodeGenFunction::checkBuiltinTargetFeatures( 294 const FunctionDecl *TargetDecl) { 295 // Early exit if this is an indirect call. 296 if (!TargetDecl) 297 return true; 298 299 // Get the current enclosing function if it exists. 300 if (const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(CurFuncDecl)) { 301 unsigned BuiltinID = TargetDecl->getBuiltinID(); 302 const char *FeatureList = 303 CGM.getContext().BuiltinInfo.getRequiredFeatures(BuiltinID); 304 if (FeatureList && StringRef(FeatureList) != "") { 305 StringRef TargetCPU = Target.getTargetOpts().CPU; 306 llvm::StringMap<bool> FeatureMap; 307 308 if (const auto *TD = FD->getAttr<TargetAttr>()) { 309 // If we have a TargetAttr build up the feature map based on that. 310 TargetAttr::ParsedTargetAttr ParsedAttr = TD->parse(); 311 312 // Make a copy of the features as passed on the command line into the 313 // beginning of the additional features from the function to override. 314 ParsedAttr.first.insert( 315 ParsedAttr.first.begin(), 316 Target.getTargetOpts().FeaturesAsWritten.begin(), 317 Target.getTargetOpts().FeaturesAsWritten.end()); 318 319 if (ParsedAttr.second != "") 320 TargetCPU = ParsedAttr.second; 321 322 // Now populate the feature map, first with the TargetCPU which is 323 // either 324 // the default or a new one from the target attribute string. Then we'll 325 // use the passed in features (FeaturesAsWritten) along with the new 326 // ones 327 // from the attribute. 328 Target.initFeatureMap(FeatureMap, CGM.getDiags(), TargetCPU, 329 ParsedAttr.first); 330 } else { 331 Target.initFeatureMap(FeatureMap, CGM.getDiags(), TargetCPU, 332 Target.getTargetOpts().Features); 333 } 334 335 // If we have at least one of the features in the feature list return 336 // true, otherwise return false. 337 SmallVector<StringRef, 1> AttrFeatures; 338 StringRef(FeatureList).split(AttrFeatures, ","); 339 for (const auto &Feature : AttrFeatures) 340 if (FeatureMap[Feature]) 341 return true; 342 return false; 343 } 344 } 345 return true; 346 } 347 348 RValue CodeGenFunction::EmitBuiltinExpr(const FunctionDecl *FD, 349 unsigned BuiltinID, const CallExpr *E, 350 ReturnValueSlot ReturnValue) { 351 // See if we can constant fold this builtin. If so, don't emit it at all. 352 Expr::EvalResult Result; 353 if (E->EvaluateAsRValue(Result, CGM.getContext()) && 354 !Result.hasSideEffects()) { 355 if (Result.Val.isInt()) 356 return RValue::get(llvm::ConstantInt::get(getLLVMContext(), 357 Result.Val.getInt())); 358 if (Result.Val.isFloat()) 359 return RValue::get(llvm::ConstantFP::get(getLLVMContext(), 360 Result.Val.getFloat())); 361 } 362 363 switch (BuiltinID) { 364 default: break; // Handle intrinsics and libm functions below. 365 case Builtin::BI__builtin___CFStringMakeConstantString: 366 case Builtin::BI__builtin___NSStringMakeConstantString: 367 return RValue::get(CGM.EmitConstantExpr(E, E->getType(), nullptr)); 368 case Builtin::BI__builtin_stdarg_start: 369 case Builtin::BI__builtin_va_start: 370 case Builtin::BI__va_start: 371 case Builtin::BI__builtin_va_end: 372 return RValue::get( 373 EmitVAStartEnd(BuiltinID == Builtin::BI__va_start 374 ? EmitScalarExpr(E->getArg(0)) 375 : EmitVAListRef(E->getArg(0)).getPointer(), 376 BuiltinID != Builtin::BI__builtin_va_end)); 377 case Builtin::BI__builtin_va_copy: { 378 Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer(); 379 Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer(); 380 381 llvm::Type *Type = Int8PtrTy; 382 383 DstPtr = Builder.CreateBitCast(DstPtr, Type); 384 SrcPtr = Builder.CreateBitCast(SrcPtr, Type); 385 return RValue::get(Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), 386 {DstPtr, SrcPtr})); 387 } 388 case Builtin::BI__builtin_abs: 389 case Builtin::BI__builtin_labs: 390 case Builtin::BI__builtin_llabs: { 391 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 392 393 Value *NegOp = Builder.CreateNeg(ArgValue, "neg"); 394 Value *CmpResult = 395 Builder.CreateICmpSGE(ArgValue, 396 llvm::Constant::getNullValue(ArgValue->getType()), 397 "abscond"); 398 Value *Result = 399 Builder.CreateSelect(CmpResult, ArgValue, NegOp, "abs"); 400 401 return RValue::get(Result); 402 } 403 case Builtin::BI__builtin_fabs: 404 case Builtin::BI__builtin_fabsf: 405 case Builtin::BI__builtin_fabsl: { 406 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 407 Value *Result = EmitFAbs(*this, Arg1); 408 return RValue::get(Result); 409 } 410 case Builtin::BI__builtin_fmod: 411 case Builtin::BI__builtin_fmodf: 412 case Builtin::BI__builtin_fmodl: { 413 Value *Arg1 = EmitScalarExpr(E->getArg(0)); 414 Value *Arg2 = EmitScalarExpr(E->getArg(1)); 415 Value *Result = Builder.CreateFRem(Arg1, Arg2, "fmod"); 416 return RValue::get(Result); 417 } 418 419 case Builtin::BI__builtin_conj: 420 case Builtin::BI__builtin_conjf: 421 case Builtin::BI__builtin_conjl: { 422 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 423 Value *Real = ComplexVal.first; 424 Value *Imag = ComplexVal.second; 425 Value *Zero = 426 Imag->getType()->isFPOrFPVectorTy() 427 ? llvm::ConstantFP::getZeroValueForNegation(Imag->getType()) 428 : llvm::Constant::getNullValue(Imag->getType()); 429 430 Imag = Builder.CreateFSub(Zero, Imag, "sub"); 431 return RValue::getComplex(std::make_pair(Real, Imag)); 432 } 433 case Builtin::BI__builtin_creal: 434 case Builtin::BI__builtin_crealf: 435 case Builtin::BI__builtin_creall: 436 case Builtin::BIcreal: 437 case Builtin::BIcrealf: 438 case Builtin::BIcreall: { 439 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 440 return RValue::get(ComplexVal.first); 441 } 442 443 case Builtin::BI__builtin_cimag: 444 case Builtin::BI__builtin_cimagf: 445 case Builtin::BI__builtin_cimagl: 446 case Builtin::BIcimag: 447 case Builtin::BIcimagf: 448 case Builtin::BIcimagl: { 449 ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); 450 return RValue::get(ComplexVal.second); 451 } 452 453 case Builtin::BI__builtin_ctzs: 454 case Builtin::BI__builtin_ctz: 455 case Builtin::BI__builtin_ctzl: 456 case Builtin::BI__builtin_ctzll: { 457 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 458 459 llvm::Type *ArgType = ArgValue->getType(); 460 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 461 462 llvm::Type *ResultType = ConvertType(E->getType()); 463 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 464 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 465 if (Result->getType() != ResultType) 466 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 467 "cast"); 468 return RValue::get(Result); 469 } 470 case Builtin::BI__builtin_clzs: 471 case Builtin::BI__builtin_clz: 472 case Builtin::BI__builtin_clzl: 473 case Builtin::BI__builtin_clzll: { 474 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 475 476 llvm::Type *ArgType = ArgValue->getType(); 477 Value *F = CGM.getIntrinsic(Intrinsic::ctlz, ArgType); 478 479 llvm::Type *ResultType = ConvertType(E->getType()); 480 Value *ZeroUndef = Builder.getInt1(getTarget().isCLZForZeroUndef()); 481 Value *Result = Builder.CreateCall(F, {ArgValue, ZeroUndef}); 482 if (Result->getType() != ResultType) 483 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 484 "cast"); 485 return RValue::get(Result); 486 } 487 case Builtin::BI__builtin_ffs: 488 case Builtin::BI__builtin_ffsl: 489 case Builtin::BI__builtin_ffsll: { 490 // ffs(x) -> x ? cttz(x) + 1 : 0 491 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 492 493 llvm::Type *ArgType = ArgValue->getType(); 494 Value *F = CGM.getIntrinsic(Intrinsic::cttz, ArgType); 495 496 llvm::Type *ResultType = ConvertType(E->getType()); 497 Value *Tmp = 498 Builder.CreateAdd(Builder.CreateCall(F, {ArgValue, Builder.getTrue()}), 499 llvm::ConstantInt::get(ArgType, 1)); 500 Value *Zero = llvm::Constant::getNullValue(ArgType); 501 Value *IsZero = Builder.CreateICmpEQ(ArgValue, Zero, "iszero"); 502 Value *Result = Builder.CreateSelect(IsZero, Zero, Tmp, "ffs"); 503 if (Result->getType() != ResultType) 504 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 505 "cast"); 506 return RValue::get(Result); 507 } 508 case Builtin::BI__builtin_parity: 509 case Builtin::BI__builtin_parityl: 510 case Builtin::BI__builtin_parityll: { 511 // parity(x) -> ctpop(x) & 1 512 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 513 514 llvm::Type *ArgType = ArgValue->getType(); 515 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 516 517 llvm::Type *ResultType = ConvertType(E->getType()); 518 Value *Tmp = Builder.CreateCall(F, ArgValue); 519 Value *Result = Builder.CreateAnd(Tmp, llvm::ConstantInt::get(ArgType, 1)); 520 if (Result->getType() != ResultType) 521 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 522 "cast"); 523 return RValue::get(Result); 524 } 525 case Builtin::BI__builtin_popcount: 526 case Builtin::BI__builtin_popcountl: 527 case Builtin::BI__builtin_popcountll: { 528 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 529 530 llvm::Type *ArgType = ArgValue->getType(); 531 Value *F = CGM.getIntrinsic(Intrinsic::ctpop, ArgType); 532 533 llvm::Type *ResultType = ConvertType(E->getType()); 534 Value *Result = Builder.CreateCall(F, ArgValue); 535 if (Result->getType() != ResultType) 536 Result = Builder.CreateIntCast(Result, ResultType, /*isSigned*/true, 537 "cast"); 538 return RValue::get(Result); 539 } 540 case Builtin::BI__builtin_unpredictable: { 541 // Always return the argument of __builtin_unpredictable. LLVM does not 542 // handle this builtin. Metadata for this builtin should be added directly 543 // to instructions such as branches or switches that use it. 544 return RValue::get(EmitScalarExpr(E->getArg(0))); 545 } 546 case Builtin::BI__builtin_expect: { 547 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 548 llvm::Type *ArgType = ArgValue->getType(); 549 550 Value *ExpectedValue = EmitScalarExpr(E->getArg(1)); 551 // Don't generate llvm.expect on -O0 as the backend won't use it for 552 // anything. 553 // Note, we still IRGen ExpectedValue because it could have side-effects. 554 if (CGM.getCodeGenOpts().OptimizationLevel == 0) 555 return RValue::get(ArgValue); 556 557 Value *FnExpect = CGM.getIntrinsic(Intrinsic::expect, ArgType); 558 Value *Result = 559 Builder.CreateCall(FnExpect, {ArgValue, ExpectedValue}, "expval"); 560 return RValue::get(Result); 561 } 562 case Builtin::BI__builtin_assume_aligned: { 563 Value *PtrValue = EmitScalarExpr(E->getArg(0)); 564 Value *OffsetValue = 565 (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : nullptr; 566 567 Value *AlignmentValue = EmitScalarExpr(E->getArg(1)); 568 ConstantInt *AlignmentCI = cast<ConstantInt>(AlignmentValue); 569 unsigned Alignment = (unsigned) AlignmentCI->getZExtValue(); 570 571 EmitAlignmentAssumption(PtrValue, Alignment, OffsetValue); 572 return RValue::get(PtrValue); 573 } 574 case Builtin::BI__assume: 575 case Builtin::BI__builtin_assume: { 576 if (E->getArg(0)->HasSideEffects(getContext())) 577 return RValue::get(nullptr); 578 579 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 580 Value *FnAssume = CGM.getIntrinsic(Intrinsic::assume); 581 return RValue::get(Builder.CreateCall(FnAssume, ArgValue)); 582 } 583 case Builtin::BI__builtin_bswap16: 584 case Builtin::BI__builtin_bswap32: 585 case Builtin::BI__builtin_bswap64: { 586 Value *ArgValue = EmitScalarExpr(E->getArg(0)); 587 llvm::Type *ArgType = ArgValue->getType(); 588 Value *F = CGM.getIntrinsic(Intrinsic::bswap, ArgType); 589 return RValue::get(Builder.CreateCall(F, ArgValue)); 590 } 591 case Builtin::BI__builtin_object_size: { 592 // We rely on constant folding to deal with expressions with side effects. 593 assert(!E->getArg(0)->HasSideEffects(getContext()) && 594 "should have been constant folded"); 595 596 // We pass this builtin onto the optimizer so that it can 597 // figure out the object size in more complex cases. 598 llvm::Type *ResType = ConvertType(E->getType()); 599 600 // LLVM only supports 0 and 2, make sure that we pass along that 601 // as a boolean. 602 Value *Ty = EmitScalarExpr(E->getArg(1)); 603 ConstantInt *CI = dyn_cast<ConstantInt>(Ty); 604 assert(CI); 605 uint64_t val = CI->getZExtValue(); 606 CI = ConstantInt::get(Builder.getInt1Ty(), (val & 0x2) >> 1); 607 // FIXME: Get right address space. 608 llvm::Type *Tys[] = { ResType, Builder.getInt8PtrTy(0) }; 609 Value *F = CGM.getIntrinsic(Intrinsic::objectsize, Tys); 610 return RValue::get( 611 Builder.CreateCall(F, {EmitScalarExpr(E->getArg(0)), CI})); 612 } 613 case Builtin::BI__builtin_prefetch: { 614 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); 615 // FIXME: Technically these constants should of type 'int', yes? 616 RW = (E->getNumArgs() > 1) ? EmitScalarExpr(E->getArg(1)) : 617 llvm::ConstantInt::get(Int32Ty, 0); 618 Locality = (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : 619 llvm::ConstantInt::get(Int32Ty, 3); 620 Value *Data = llvm::ConstantInt::get(Int32Ty, 1); 621 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 622 return RValue::get(Builder.CreateCall(F, {Address, RW, Locality, Data})); 623 } 624 case Builtin::BI__builtin_readcyclecounter: { 625 Value *F = CGM.getIntrinsic(Intrinsic::readcyclecounter); 626 return RValue::get(Builder.CreateCall(F)); 627 } 628 case Builtin::BI__builtin___clear_cache: { 629 Value *Begin = EmitScalarExpr(E->getArg(0)); 630 Value *End = EmitScalarExpr(E->getArg(1)); 631 Value *F = CGM.getIntrinsic(Intrinsic::clear_cache); 632 return RValue::get(Builder.CreateCall(F, {Begin, End})); 633 } 634 case Builtin::BI__builtin_trap: 635 return RValue::get(EmitTrapCall(Intrinsic::trap)); 636 case Builtin::BI__debugbreak: 637 return RValue::get(EmitTrapCall(Intrinsic::debugtrap)); 638 case Builtin::BI__builtin_unreachable: { 639 if (SanOpts.has(SanitizerKind::Unreachable)) { 640 SanitizerScope SanScope(this); 641 EmitCheck(std::make_pair(static_cast<llvm::Value *>(Builder.getFalse()), 642 SanitizerKind::Unreachable), 643 "builtin_unreachable", EmitCheckSourceLocation(E->getExprLoc()), 644 None); 645 } else 646 Builder.CreateUnreachable(); 647 648 // We do need to preserve an insertion point. 649 EmitBlock(createBasicBlock("unreachable.cont")); 650 651 return RValue::get(nullptr); 652 } 653 654 case Builtin::BI__builtin_powi: 655 case Builtin::BI__builtin_powif: 656 case Builtin::BI__builtin_powil: { 657 Value *Base = EmitScalarExpr(E->getArg(0)); 658 Value *Exponent = EmitScalarExpr(E->getArg(1)); 659 llvm::Type *ArgType = Base->getType(); 660 Value *F = CGM.getIntrinsic(Intrinsic::powi, ArgType); 661 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 662 } 663 664 case Builtin::BI__builtin_isgreater: 665 case Builtin::BI__builtin_isgreaterequal: 666 case Builtin::BI__builtin_isless: 667 case Builtin::BI__builtin_islessequal: 668 case Builtin::BI__builtin_islessgreater: 669 case Builtin::BI__builtin_isunordered: { 670 // Ordered comparisons: we know the arguments to these are matching scalar 671 // floating point values. 672 Value *LHS = EmitScalarExpr(E->getArg(0)); 673 Value *RHS = EmitScalarExpr(E->getArg(1)); 674 675 switch (BuiltinID) { 676 default: llvm_unreachable("Unknown ordered comparison"); 677 case Builtin::BI__builtin_isgreater: 678 LHS = Builder.CreateFCmpOGT(LHS, RHS, "cmp"); 679 break; 680 case Builtin::BI__builtin_isgreaterequal: 681 LHS = Builder.CreateFCmpOGE(LHS, RHS, "cmp"); 682 break; 683 case Builtin::BI__builtin_isless: 684 LHS = Builder.CreateFCmpOLT(LHS, RHS, "cmp"); 685 break; 686 case Builtin::BI__builtin_islessequal: 687 LHS = Builder.CreateFCmpOLE(LHS, RHS, "cmp"); 688 break; 689 case Builtin::BI__builtin_islessgreater: 690 LHS = Builder.CreateFCmpONE(LHS, RHS, "cmp"); 691 break; 692 case Builtin::BI__builtin_isunordered: 693 LHS = Builder.CreateFCmpUNO(LHS, RHS, "cmp"); 694 break; 695 } 696 // ZExt bool to int type. 697 return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType()))); 698 } 699 case Builtin::BI__builtin_isnan: { 700 Value *V = EmitScalarExpr(E->getArg(0)); 701 V = Builder.CreateFCmpUNO(V, V, "cmp"); 702 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 703 } 704 705 case Builtin::BI__builtin_isinf: { 706 // isinf(x) --> fabs(x) == infinity 707 Value *V = EmitScalarExpr(E->getArg(0)); 708 V = EmitFAbs(*this, V); 709 710 V = Builder.CreateFCmpOEQ(V, ConstantFP::getInfinity(V->getType()),"isinf"); 711 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 712 } 713 714 case Builtin::BI__builtin_isinf_sign: { 715 // isinf_sign(x) -> fabs(x) == infinity ? (signbit(x) ? -1 : 1) : 0 716 Value *Arg = EmitScalarExpr(E->getArg(0)); 717 Value *AbsArg = EmitFAbs(*this, Arg); 718 Value *IsInf = Builder.CreateFCmpOEQ( 719 AbsArg, ConstantFP::getInfinity(Arg->getType()), "isinf"); 720 Value *IsNeg = EmitSignBit(*this, Arg); 721 722 llvm::Type *IntTy = ConvertType(E->getType()); 723 Value *Zero = Constant::getNullValue(IntTy); 724 Value *One = ConstantInt::get(IntTy, 1); 725 Value *NegativeOne = ConstantInt::get(IntTy, -1); 726 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); 727 Value *Result = Builder.CreateSelect(IsInf, SignResult, Zero); 728 return RValue::get(Result); 729 } 730 731 case Builtin::BI__builtin_isnormal: { 732 // isnormal(x) --> x == x && fabsf(x) < infinity && fabsf(x) >= float_min 733 Value *V = EmitScalarExpr(E->getArg(0)); 734 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 735 736 Value *Abs = EmitFAbs(*this, V); 737 Value *IsLessThanInf = 738 Builder.CreateFCmpULT(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 739 APFloat Smallest = APFloat::getSmallestNormalized( 740 getContext().getFloatTypeSemantics(E->getArg(0)->getType())); 741 Value *IsNormal = 742 Builder.CreateFCmpUGE(Abs, ConstantFP::get(V->getContext(), Smallest), 743 "isnormal"); 744 V = Builder.CreateAnd(Eq, IsLessThanInf, "and"); 745 V = Builder.CreateAnd(V, IsNormal, "and"); 746 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 747 } 748 749 case Builtin::BI__builtin_isfinite: { 750 // isfinite(x) --> x == x && fabs(x) != infinity; 751 Value *V = EmitScalarExpr(E->getArg(0)); 752 Value *Eq = Builder.CreateFCmpOEQ(V, V, "iseq"); 753 754 Value *Abs = EmitFAbs(*this, V); 755 Value *IsNotInf = 756 Builder.CreateFCmpUNE(Abs, ConstantFP::getInfinity(V->getType()),"isinf"); 757 758 V = Builder.CreateAnd(Eq, IsNotInf, "and"); 759 return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType()))); 760 } 761 762 case Builtin::BI__builtin_fpclassify: { 763 Value *V = EmitScalarExpr(E->getArg(5)); 764 llvm::Type *Ty = ConvertType(E->getArg(5)->getType()); 765 766 // Create Result 767 BasicBlock *Begin = Builder.GetInsertBlock(); 768 BasicBlock *End = createBasicBlock("fpclassify_end", this->CurFn); 769 Builder.SetInsertPoint(End); 770 PHINode *Result = 771 Builder.CreatePHI(ConvertType(E->getArg(0)->getType()), 4, 772 "fpclassify_result"); 773 774 // if (V==0) return FP_ZERO 775 Builder.SetInsertPoint(Begin); 776 Value *IsZero = Builder.CreateFCmpOEQ(V, Constant::getNullValue(Ty), 777 "iszero"); 778 Value *ZeroLiteral = EmitScalarExpr(E->getArg(4)); 779 BasicBlock *NotZero = createBasicBlock("fpclassify_not_zero", this->CurFn); 780 Builder.CreateCondBr(IsZero, End, NotZero); 781 Result->addIncoming(ZeroLiteral, Begin); 782 783 // if (V != V) return FP_NAN 784 Builder.SetInsertPoint(NotZero); 785 Value *IsNan = Builder.CreateFCmpUNO(V, V, "cmp"); 786 Value *NanLiteral = EmitScalarExpr(E->getArg(0)); 787 BasicBlock *NotNan = createBasicBlock("fpclassify_not_nan", this->CurFn); 788 Builder.CreateCondBr(IsNan, End, NotNan); 789 Result->addIncoming(NanLiteral, NotZero); 790 791 // if (fabs(V) == infinity) return FP_INFINITY 792 Builder.SetInsertPoint(NotNan); 793 Value *VAbs = EmitFAbs(*this, V); 794 Value *IsInf = 795 Builder.CreateFCmpOEQ(VAbs, ConstantFP::getInfinity(V->getType()), 796 "isinf"); 797 Value *InfLiteral = EmitScalarExpr(E->getArg(1)); 798 BasicBlock *NotInf = createBasicBlock("fpclassify_not_inf", this->CurFn); 799 Builder.CreateCondBr(IsInf, End, NotInf); 800 Result->addIncoming(InfLiteral, NotNan); 801 802 // if (fabs(V) >= MIN_NORMAL) return FP_NORMAL else FP_SUBNORMAL 803 Builder.SetInsertPoint(NotInf); 804 APFloat Smallest = APFloat::getSmallestNormalized( 805 getContext().getFloatTypeSemantics(E->getArg(5)->getType())); 806 Value *IsNormal = 807 Builder.CreateFCmpUGE(VAbs, ConstantFP::get(V->getContext(), Smallest), 808 "isnormal"); 809 Value *NormalResult = 810 Builder.CreateSelect(IsNormal, EmitScalarExpr(E->getArg(2)), 811 EmitScalarExpr(E->getArg(3))); 812 Builder.CreateBr(End); 813 Result->addIncoming(NormalResult, NotInf); 814 815 // return Result 816 Builder.SetInsertPoint(End); 817 return RValue::get(Result); 818 } 819 820 case Builtin::BIalloca: 821 case Builtin::BI_alloca: 822 case Builtin::BI__builtin_alloca: { 823 Value *Size = EmitScalarExpr(E->getArg(0)); 824 return RValue::get(Builder.CreateAlloca(Builder.getInt8Ty(), Size)); 825 } 826 case Builtin::BIbzero: 827 case Builtin::BI__builtin_bzero: { 828 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 829 Value *SizeVal = EmitScalarExpr(E->getArg(1)); 830 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 831 E->getArg(0)->getExprLoc(), FD, 0); 832 Builder.CreateMemSet(Dest, Builder.getInt8(0), SizeVal, false); 833 return RValue::get(Dest.getPointer()); 834 } 835 case Builtin::BImemcpy: 836 case Builtin::BI__builtin_memcpy: { 837 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 838 Address Src = EmitPointerWithAlignment(E->getArg(1)); 839 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 840 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 841 E->getArg(0)->getExprLoc(), FD, 0); 842 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 843 E->getArg(1)->getExprLoc(), FD, 1); 844 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 845 return RValue::get(Dest.getPointer()); 846 } 847 848 case Builtin::BI__builtin___memcpy_chk: { 849 // fold __builtin_memcpy_chk(x, y, cst1, cst2) to memcpy iff cst1<=cst2. 850 llvm::APSInt Size, DstSize; 851 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 852 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 853 break; 854 if (Size.ugt(DstSize)) 855 break; 856 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 857 Address Src = EmitPointerWithAlignment(E->getArg(1)); 858 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 859 Builder.CreateMemCpy(Dest, Src, SizeVal, false); 860 return RValue::get(Dest.getPointer()); 861 } 862 863 case Builtin::BI__builtin_objc_memmove_collectable: { 864 Address DestAddr = EmitPointerWithAlignment(E->getArg(0)); 865 Address SrcAddr = EmitPointerWithAlignment(E->getArg(1)); 866 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 867 CGM.getObjCRuntime().EmitGCMemmoveCollectable(*this, 868 DestAddr, SrcAddr, SizeVal); 869 return RValue::get(DestAddr.getPointer()); 870 } 871 872 case Builtin::BI__builtin___memmove_chk: { 873 // fold __builtin_memmove_chk(x, y, cst1, cst2) to memmove iff cst1<=cst2. 874 llvm::APSInt Size, DstSize; 875 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 876 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 877 break; 878 if (Size.ugt(DstSize)) 879 break; 880 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 881 Address Src = EmitPointerWithAlignment(E->getArg(1)); 882 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 883 Builder.CreateMemMove(Dest, Src, SizeVal, false); 884 return RValue::get(Dest.getPointer()); 885 } 886 887 case Builtin::BImemmove: 888 case Builtin::BI__builtin_memmove: { 889 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 890 Address Src = EmitPointerWithAlignment(E->getArg(1)); 891 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 892 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 893 E->getArg(0)->getExprLoc(), FD, 0); 894 EmitNonNullArgCheck(RValue::get(Src.getPointer()), E->getArg(1)->getType(), 895 E->getArg(1)->getExprLoc(), FD, 1); 896 Builder.CreateMemMove(Dest, Src, SizeVal, false); 897 return RValue::get(Dest.getPointer()); 898 } 899 case Builtin::BImemset: 900 case Builtin::BI__builtin_memset: { 901 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 902 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 903 Builder.getInt8Ty()); 904 Value *SizeVal = EmitScalarExpr(E->getArg(2)); 905 EmitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(), 906 E->getArg(0)->getExprLoc(), FD, 0); 907 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 908 return RValue::get(Dest.getPointer()); 909 } 910 case Builtin::BI__builtin___memset_chk: { 911 // fold __builtin_memset_chk(x, y, cst1, cst2) to memset iff cst1<=cst2. 912 llvm::APSInt Size, DstSize; 913 if (!E->getArg(2)->EvaluateAsInt(Size, CGM.getContext()) || 914 !E->getArg(3)->EvaluateAsInt(DstSize, CGM.getContext())) 915 break; 916 if (Size.ugt(DstSize)) 917 break; 918 Address Dest = EmitPointerWithAlignment(E->getArg(0)); 919 Value *ByteVal = Builder.CreateTrunc(EmitScalarExpr(E->getArg(1)), 920 Builder.getInt8Ty()); 921 Value *SizeVal = llvm::ConstantInt::get(Builder.getContext(), Size); 922 Builder.CreateMemSet(Dest, ByteVal, SizeVal, false); 923 return RValue::get(Dest.getPointer()); 924 } 925 case Builtin::BI__builtin_dwarf_cfa: { 926 // The offset in bytes from the first argument to the CFA. 927 // 928 // Why on earth is this in the frontend? Is there any reason at 929 // all that the backend can't reasonably determine this while 930 // lowering llvm.eh.dwarf.cfa()? 931 // 932 // TODO: If there's a satisfactory reason, add a target hook for 933 // this instead of hard-coding 0, which is correct for most targets. 934 int32_t Offset = 0; 935 936 Value *F = CGM.getIntrinsic(Intrinsic::eh_dwarf_cfa); 937 return RValue::get(Builder.CreateCall(F, 938 llvm::ConstantInt::get(Int32Ty, Offset))); 939 } 940 case Builtin::BI__builtin_return_address: { 941 Value *Depth = 942 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 943 Value *F = CGM.getIntrinsic(Intrinsic::returnaddress); 944 return RValue::get(Builder.CreateCall(F, Depth)); 945 } 946 case Builtin::BI__builtin_frame_address: { 947 Value *Depth = 948 CGM.EmitConstantExpr(E->getArg(0), getContext().UnsignedIntTy, this); 949 Value *F = CGM.getIntrinsic(Intrinsic::frameaddress); 950 return RValue::get(Builder.CreateCall(F, Depth)); 951 } 952 case Builtin::BI__builtin_extract_return_addr: { 953 Value *Address = EmitScalarExpr(E->getArg(0)); 954 Value *Result = getTargetHooks().decodeReturnAddress(*this, Address); 955 return RValue::get(Result); 956 } 957 case Builtin::BI__builtin_frob_return_addr: { 958 Value *Address = EmitScalarExpr(E->getArg(0)); 959 Value *Result = getTargetHooks().encodeReturnAddress(*this, Address); 960 return RValue::get(Result); 961 } 962 case Builtin::BI__builtin_dwarf_sp_column: { 963 llvm::IntegerType *Ty 964 = cast<llvm::IntegerType>(ConvertType(E->getType())); 965 int Column = getTargetHooks().getDwarfEHStackPointer(CGM); 966 if (Column == -1) { 967 CGM.ErrorUnsupported(E, "__builtin_dwarf_sp_column"); 968 return RValue::get(llvm::UndefValue::get(Ty)); 969 } 970 return RValue::get(llvm::ConstantInt::get(Ty, Column, true)); 971 } 972 case Builtin::BI__builtin_init_dwarf_reg_size_table: { 973 Value *Address = EmitScalarExpr(E->getArg(0)); 974 if (getTargetHooks().initDwarfEHRegSizeTable(*this, Address)) 975 CGM.ErrorUnsupported(E, "__builtin_init_dwarf_reg_size_table"); 976 return RValue::get(llvm::UndefValue::get(ConvertType(E->getType()))); 977 } 978 case Builtin::BI__builtin_eh_return: { 979 Value *Int = EmitScalarExpr(E->getArg(0)); 980 Value *Ptr = EmitScalarExpr(E->getArg(1)); 981 982 llvm::IntegerType *IntTy = cast<llvm::IntegerType>(Int->getType()); 983 assert((IntTy->getBitWidth() == 32 || IntTy->getBitWidth() == 64) && 984 "LLVM's __builtin_eh_return only supports 32- and 64-bit variants"); 985 Value *F = CGM.getIntrinsic(IntTy->getBitWidth() == 32 986 ? Intrinsic::eh_return_i32 987 : Intrinsic::eh_return_i64); 988 Builder.CreateCall(F, {Int, Ptr}); 989 Builder.CreateUnreachable(); 990 991 // We do need to preserve an insertion point. 992 EmitBlock(createBasicBlock("builtin_eh_return.cont")); 993 994 return RValue::get(nullptr); 995 } 996 case Builtin::BI__builtin_unwind_init: { 997 Value *F = CGM.getIntrinsic(Intrinsic::eh_unwind_init); 998 return RValue::get(Builder.CreateCall(F)); 999 } 1000 case Builtin::BI__builtin_extend_pointer: { 1001 // Extends a pointer to the size of an _Unwind_Word, which is 1002 // uint64_t on all platforms. Generally this gets poked into a 1003 // register and eventually used as an address, so if the 1004 // addressing registers are wider than pointers and the platform 1005 // doesn't implicitly ignore high-order bits when doing 1006 // addressing, we need to make sure we zext / sext based on 1007 // the platform's expectations. 1008 // 1009 // See: http://gcc.gnu.org/ml/gcc-bugs/2002-02/msg00237.html 1010 1011 // Cast the pointer to intptr_t. 1012 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1013 Value *Result = Builder.CreatePtrToInt(Ptr, IntPtrTy, "extend.cast"); 1014 1015 // If that's 64 bits, we're done. 1016 if (IntPtrTy->getBitWidth() == 64) 1017 return RValue::get(Result); 1018 1019 // Otherwise, ask the codegen data what to do. 1020 if (getTargetHooks().extendPointerWithSExt()) 1021 return RValue::get(Builder.CreateSExt(Result, Int64Ty, "extend.sext")); 1022 else 1023 return RValue::get(Builder.CreateZExt(Result, Int64Ty, "extend.zext")); 1024 } 1025 case Builtin::BI__builtin_setjmp: { 1026 // Buffer is a void**. 1027 Address Buf = EmitPointerWithAlignment(E->getArg(0)); 1028 1029 // Store the frame pointer to the setjmp buffer. 1030 Value *FrameAddr = 1031 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1032 ConstantInt::get(Int32Ty, 0)); 1033 Builder.CreateStore(FrameAddr, Buf); 1034 1035 // Store the stack pointer to the setjmp buffer. 1036 Value *StackAddr = 1037 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::stacksave)); 1038 Address StackSaveSlot = 1039 Builder.CreateConstInBoundsGEP(Buf, 2, getPointerSize()); 1040 Builder.CreateStore(StackAddr, StackSaveSlot); 1041 1042 // Call LLVM's EH setjmp, which is lightweight. 1043 Value *F = CGM.getIntrinsic(Intrinsic::eh_sjlj_setjmp); 1044 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1045 return RValue::get(Builder.CreateCall(F, Buf.getPointer())); 1046 } 1047 case Builtin::BI__builtin_longjmp: { 1048 Value *Buf = EmitScalarExpr(E->getArg(0)); 1049 Buf = Builder.CreateBitCast(Buf, Int8PtrTy); 1050 1051 // Call LLVM's EH longjmp, which is lightweight. 1052 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::eh_sjlj_longjmp), Buf); 1053 1054 // longjmp doesn't return; mark this as unreachable. 1055 Builder.CreateUnreachable(); 1056 1057 // We do need to preserve an insertion point. 1058 EmitBlock(createBasicBlock("longjmp.cont")); 1059 1060 return RValue::get(nullptr); 1061 } 1062 case Builtin::BI__sync_fetch_and_add: 1063 case Builtin::BI__sync_fetch_and_sub: 1064 case Builtin::BI__sync_fetch_and_or: 1065 case Builtin::BI__sync_fetch_and_and: 1066 case Builtin::BI__sync_fetch_and_xor: 1067 case Builtin::BI__sync_fetch_and_nand: 1068 case Builtin::BI__sync_add_and_fetch: 1069 case Builtin::BI__sync_sub_and_fetch: 1070 case Builtin::BI__sync_and_and_fetch: 1071 case Builtin::BI__sync_or_and_fetch: 1072 case Builtin::BI__sync_xor_and_fetch: 1073 case Builtin::BI__sync_nand_and_fetch: 1074 case Builtin::BI__sync_val_compare_and_swap: 1075 case Builtin::BI__sync_bool_compare_and_swap: 1076 case Builtin::BI__sync_lock_test_and_set: 1077 case Builtin::BI__sync_lock_release: 1078 case Builtin::BI__sync_swap: 1079 llvm_unreachable("Shouldn't make it through sema"); 1080 case Builtin::BI__sync_fetch_and_add_1: 1081 case Builtin::BI__sync_fetch_and_add_2: 1082 case Builtin::BI__sync_fetch_and_add_4: 1083 case Builtin::BI__sync_fetch_and_add_8: 1084 case Builtin::BI__sync_fetch_and_add_16: 1085 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E); 1086 case Builtin::BI__sync_fetch_and_sub_1: 1087 case Builtin::BI__sync_fetch_and_sub_2: 1088 case Builtin::BI__sync_fetch_and_sub_4: 1089 case Builtin::BI__sync_fetch_and_sub_8: 1090 case Builtin::BI__sync_fetch_and_sub_16: 1091 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E); 1092 case Builtin::BI__sync_fetch_and_or_1: 1093 case Builtin::BI__sync_fetch_and_or_2: 1094 case Builtin::BI__sync_fetch_and_or_4: 1095 case Builtin::BI__sync_fetch_and_or_8: 1096 case Builtin::BI__sync_fetch_and_or_16: 1097 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E); 1098 case Builtin::BI__sync_fetch_and_and_1: 1099 case Builtin::BI__sync_fetch_and_and_2: 1100 case Builtin::BI__sync_fetch_and_and_4: 1101 case Builtin::BI__sync_fetch_and_and_8: 1102 case Builtin::BI__sync_fetch_and_and_16: 1103 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E); 1104 case Builtin::BI__sync_fetch_and_xor_1: 1105 case Builtin::BI__sync_fetch_and_xor_2: 1106 case Builtin::BI__sync_fetch_and_xor_4: 1107 case Builtin::BI__sync_fetch_and_xor_8: 1108 case Builtin::BI__sync_fetch_and_xor_16: 1109 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E); 1110 case Builtin::BI__sync_fetch_and_nand_1: 1111 case Builtin::BI__sync_fetch_and_nand_2: 1112 case Builtin::BI__sync_fetch_and_nand_4: 1113 case Builtin::BI__sync_fetch_and_nand_8: 1114 case Builtin::BI__sync_fetch_and_nand_16: 1115 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Nand, E); 1116 1117 // Clang extensions: not overloaded yet. 1118 case Builtin::BI__sync_fetch_and_min: 1119 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E); 1120 case Builtin::BI__sync_fetch_and_max: 1121 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Max, E); 1122 case Builtin::BI__sync_fetch_and_umin: 1123 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMin, E); 1124 case Builtin::BI__sync_fetch_and_umax: 1125 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMax, E); 1126 1127 case Builtin::BI__sync_add_and_fetch_1: 1128 case Builtin::BI__sync_add_and_fetch_2: 1129 case Builtin::BI__sync_add_and_fetch_4: 1130 case Builtin::BI__sync_add_and_fetch_8: 1131 case Builtin::BI__sync_add_and_fetch_16: 1132 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Add, E, 1133 llvm::Instruction::Add); 1134 case Builtin::BI__sync_sub_and_fetch_1: 1135 case Builtin::BI__sync_sub_and_fetch_2: 1136 case Builtin::BI__sync_sub_and_fetch_4: 1137 case Builtin::BI__sync_sub_and_fetch_8: 1138 case Builtin::BI__sync_sub_and_fetch_16: 1139 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Sub, E, 1140 llvm::Instruction::Sub); 1141 case Builtin::BI__sync_and_and_fetch_1: 1142 case Builtin::BI__sync_and_and_fetch_2: 1143 case Builtin::BI__sync_and_and_fetch_4: 1144 case Builtin::BI__sync_and_and_fetch_8: 1145 case Builtin::BI__sync_and_and_fetch_16: 1146 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::And, E, 1147 llvm::Instruction::And); 1148 case Builtin::BI__sync_or_and_fetch_1: 1149 case Builtin::BI__sync_or_and_fetch_2: 1150 case Builtin::BI__sync_or_and_fetch_4: 1151 case Builtin::BI__sync_or_and_fetch_8: 1152 case Builtin::BI__sync_or_and_fetch_16: 1153 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Or, E, 1154 llvm::Instruction::Or); 1155 case Builtin::BI__sync_xor_and_fetch_1: 1156 case Builtin::BI__sync_xor_and_fetch_2: 1157 case Builtin::BI__sync_xor_and_fetch_4: 1158 case Builtin::BI__sync_xor_and_fetch_8: 1159 case Builtin::BI__sync_xor_and_fetch_16: 1160 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Xor, E, 1161 llvm::Instruction::Xor); 1162 case Builtin::BI__sync_nand_and_fetch_1: 1163 case Builtin::BI__sync_nand_and_fetch_2: 1164 case Builtin::BI__sync_nand_and_fetch_4: 1165 case Builtin::BI__sync_nand_and_fetch_8: 1166 case Builtin::BI__sync_nand_and_fetch_16: 1167 return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Nand, E, 1168 llvm::Instruction::And, true); 1169 1170 case Builtin::BI__sync_val_compare_and_swap_1: 1171 case Builtin::BI__sync_val_compare_and_swap_2: 1172 case Builtin::BI__sync_val_compare_and_swap_4: 1173 case Builtin::BI__sync_val_compare_and_swap_8: 1174 case Builtin::BI__sync_val_compare_and_swap_16: 1175 return RValue::get(MakeAtomicCmpXchgValue(*this, E, false)); 1176 1177 case Builtin::BI__sync_bool_compare_and_swap_1: 1178 case Builtin::BI__sync_bool_compare_and_swap_2: 1179 case Builtin::BI__sync_bool_compare_and_swap_4: 1180 case Builtin::BI__sync_bool_compare_and_swap_8: 1181 case Builtin::BI__sync_bool_compare_and_swap_16: 1182 return RValue::get(MakeAtomicCmpXchgValue(*this, E, true)); 1183 1184 case Builtin::BI__sync_swap_1: 1185 case Builtin::BI__sync_swap_2: 1186 case Builtin::BI__sync_swap_4: 1187 case Builtin::BI__sync_swap_8: 1188 case Builtin::BI__sync_swap_16: 1189 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1190 1191 case Builtin::BI__sync_lock_test_and_set_1: 1192 case Builtin::BI__sync_lock_test_and_set_2: 1193 case Builtin::BI__sync_lock_test_and_set_4: 1194 case Builtin::BI__sync_lock_test_and_set_8: 1195 case Builtin::BI__sync_lock_test_and_set_16: 1196 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1197 1198 case Builtin::BI__sync_lock_release_1: 1199 case Builtin::BI__sync_lock_release_2: 1200 case Builtin::BI__sync_lock_release_4: 1201 case Builtin::BI__sync_lock_release_8: 1202 case Builtin::BI__sync_lock_release_16: { 1203 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1204 QualType ElTy = E->getArg(0)->getType()->getPointeeType(); 1205 CharUnits StoreSize = getContext().getTypeSizeInChars(ElTy); 1206 llvm::Type *ITy = llvm::IntegerType::get(getLLVMContext(), 1207 StoreSize.getQuantity() * 8); 1208 Ptr = Builder.CreateBitCast(Ptr, ITy->getPointerTo()); 1209 llvm::StoreInst *Store = 1210 Builder.CreateAlignedStore(llvm::Constant::getNullValue(ITy), Ptr, 1211 StoreSize); 1212 Store->setAtomic(llvm::Release); 1213 return RValue::get(nullptr); 1214 } 1215 1216 case Builtin::BI__sync_synchronize: { 1217 // We assume this is supposed to correspond to a C++0x-style 1218 // sequentially-consistent fence (i.e. this is only usable for 1219 // synchonization, not device I/O or anything like that). This intrinsic 1220 // is really badly designed in the sense that in theory, there isn't 1221 // any way to safely use it... but in practice, it mostly works 1222 // to use it with non-atomic loads and stores to get acquire/release 1223 // semantics. 1224 Builder.CreateFence(llvm::SequentiallyConsistent); 1225 return RValue::get(nullptr); 1226 } 1227 1228 case Builtin::BI__builtin_nontemporal_load: 1229 return RValue::get(EmitNontemporalLoad(*this, E)); 1230 case Builtin::BI__builtin_nontemporal_store: 1231 return RValue::get(EmitNontemporalStore(*this, E)); 1232 case Builtin::BI__c11_atomic_is_lock_free: 1233 case Builtin::BI__atomic_is_lock_free: { 1234 // Call "bool __atomic_is_lock_free(size_t size, void *ptr)". For the 1235 // __c11 builtin, ptr is 0 (indicating a properly-aligned object), since 1236 // _Atomic(T) is always properly-aligned. 1237 const char *LibCallName = "__atomic_is_lock_free"; 1238 CallArgList Args; 1239 Args.add(RValue::get(EmitScalarExpr(E->getArg(0))), 1240 getContext().getSizeType()); 1241 if (BuiltinID == Builtin::BI__atomic_is_lock_free) 1242 Args.add(RValue::get(EmitScalarExpr(E->getArg(1))), 1243 getContext().VoidPtrTy); 1244 else 1245 Args.add(RValue::get(llvm::Constant::getNullValue(VoidPtrTy)), 1246 getContext().VoidPtrTy); 1247 const CGFunctionInfo &FuncInfo = 1248 CGM.getTypes().arrangeFreeFunctionCall(E->getType(), Args, 1249 FunctionType::ExtInfo(), 1250 RequiredArgs::All); 1251 llvm::FunctionType *FTy = CGM.getTypes().GetFunctionType(FuncInfo); 1252 llvm::Constant *Func = CGM.CreateRuntimeFunction(FTy, LibCallName); 1253 return EmitCall(FuncInfo, Func, ReturnValueSlot(), Args); 1254 } 1255 1256 case Builtin::BI__atomic_test_and_set: { 1257 // Look at the argument type to determine whether this is a volatile 1258 // operation. The parameter type is always volatile. 1259 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1260 bool Volatile = 1261 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1262 1263 Value *Ptr = EmitScalarExpr(E->getArg(0)); 1264 unsigned AddrSpace = Ptr->getType()->getPointerAddressSpace(); 1265 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1266 Value *NewVal = Builder.getInt8(1); 1267 Value *Order = EmitScalarExpr(E->getArg(1)); 1268 if (isa<llvm::ConstantInt>(Order)) { 1269 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1270 AtomicRMWInst *Result = nullptr; 1271 switch (ord) { 1272 case 0: // memory_order_relaxed 1273 default: // invalid order 1274 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1275 Ptr, NewVal, 1276 llvm::Monotonic); 1277 break; 1278 case 1: // memory_order_consume 1279 case 2: // memory_order_acquire 1280 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1281 Ptr, NewVal, 1282 llvm::Acquire); 1283 break; 1284 case 3: // memory_order_release 1285 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1286 Ptr, NewVal, 1287 llvm::Release); 1288 break; 1289 case 4: // memory_order_acq_rel 1290 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1291 Ptr, NewVal, 1292 llvm::AcquireRelease); 1293 break; 1294 case 5: // memory_order_seq_cst 1295 Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1296 Ptr, NewVal, 1297 llvm::SequentiallyConsistent); 1298 break; 1299 } 1300 Result->setVolatile(Volatile); 1301 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1302 } 1303 1304 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1305 1306 llvm::BasicBlock *BBs[5] = { 1307 createBasicBlock("monotonic", CurFn), 1308 createBasicBlock("acquire", CurFn), 1309 createBasicBlock("release", CurFn), 1310 createBasicBlock("acqrel", CurFn), 1311 createBasicBlock("seqcst", CurFn) 1312 }; 1313 llvm::AtomicOrdering Orders[5] = { 1314 llvm::Monotonic, llvm::Acquire, llvm::Release, 1315 llvm::AcquireRelease, llvm::SequentiallyConsistent 1316 }; 1317 1318 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1319 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1320 1321 Builder.SetInsertPoint(ContBB); 1322 PHINode *Result = Builder.CreatePHI(Int8Ty, 5, "was_set"); 1323 1324 for (unsigned i = 0; i < 5; ++i) { 1325 Builder.SetInsertPoint(BBs[i]); 1326 AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, 1327 Ptr, NewVal, Orders[i]); 1328 RMW->setVolatile(Volatile); 1329 Result->addIncoming(RMW, BBs[i]); 1330 Builder.CreateBr(ContBB); 1331 } 1332 1333 SI->addCase(Builder.getInt32(0), BBs[0]); 1334 SI->addCase(Builder.getInt32(1), BBs[1]); 1335 SI->addCase(Builder.getInt32(2), BBs[1]); 1336 SI->addCase(Builder.getInt32(3), BBs[2]); 1337 SI->addCase(Builder.getInt32(4), BBs[3]); 1338 SI->addCase(Builder.getInt32(5), BBs[4]); 1339 1340 Builder.SetInsertPoint(ContBB); 1341 return RValue::get(Builder.CreateIsNotNull(Result, "tobool")); 1342 } 1343 1344 case Builtin::BI__atomic_clear: { 1345 QualType PtrTy = E->getArg(0)->IgnoreImpCasts()->getType(); 1346 bool Volatile = 1347 PtrTy->castAs<PointerType>()->getPointeeType().isVolatileQualified(); 1348 1349 Address Ptr = EmitPointerWithAlignment(E->getArg(0)); 1350 unsigned AddrSpace = Ptr.getPointer()->getType()->getPointerAddressSpace(); 1351 Ptr = Builder.CreateBitCast(Ptr, Int8Ty->getPointerTo(AddrSpace)); 1352 Value *NewVal = Builder.getInt8(0); 1353 Value *Order = EmitScalarExpr(E->getArg(1)); 1354 if (isa<llvm::ConstantInt>(Order)) { 1355 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1356 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1357 switch (ord) { 1358 case 0: // memory_order_relaxed 1359 default: // invalid order 1360 Store->setOrdering(llvm::Monotonic); 1361 break; 1362 case 3: // memory_order_release 1363 Store->setOrdering(llvm::Release); 1364 break; 1365 case 5: // memory_order_seq_cst 1366 Store->setOrdering(llvm::SequentiallyConsistent); 1367 break; 1368 } 1369 return RValue::get(nullptr); 1370 } 1371 1372 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1373 1374 llvm::BasicBlock *BBs[3] = { 1375 createBasicBlock("monotonic", CurFn), 1376 createBasicBlock("release", CurFn), 1377 createBasicBlock("seqcst", CurFn) 1378 }; 1379 llvm::AtomicOrdering Orders[3] = { 1380 llvm::Monotonic, llvm::Release, llvm::SequentiallyConsistent 1381 }; 1382 1383 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1384 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]); 1385 1386 for (unsigned i = 0; i < 3; ++i) { 1387 Builder.SetInsertPoint(BBs[i]); 1388 StoreInst *Store = Builder.CreateStore(NewVal, Ptr, Volatile); 1389 Store->setOrdering(Orders[i]); 1390 Builder.CreateBr(ContBB); 1391 } 1392 1393 SI->addCase(Builder.getInt32(0), BBs[0]); 1394 SI->addCase(Builder.getInt32(3), BBs[1]); 1395 SI->addCase(Builder.getInt32(5), BBs[2]); 1396 1397 Builder.SetInsertPoint(ContBB); 1398 return RValue::get(nullptr); 1399 } 1400 1401 case Builtin::BI__atomic_thread_fence: 1402 case Builtin::BI__atomic_signal_fence: 1403 case Builtin::BI__c11_atomic_thread_fence: 1404 case Builtin::BI__c11_atomic_signal_fence: { 1405 llvm::SynchronizationScope Scope; 1406 if (BuiltinID == Builtin::BI__atomic_signal_fence || 1407 BuiltinID == Builtin::BI__c11_atomic_signal_fence) 1408 Scope = llvm::SingleThread; 1409 else 1410 Scope = llvm::CrossThread; 1411 Value *Order = EmitScalarExpr(E->getArg(0)); 1412 if (isa<llvm::ConstantInt>(Order)) { 1413 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue(); 1414 switch (ord) { 1415 case 0: // memory_order_relaxed 1416 default: // invalid order 1417 break; 1418 case 1: // memory_order_consume 1419 case 2: // memory_order_acquire 1420 Builder.CreateFence(llvm::Acquire, Scope); 1421 break; 1422 case 3: // memory_order_release 1423 Builder.CreateFence(llvm::Release, Scope); 1424 break; 1425 case 4: // memory_order_acq_rel 1426 Builder.CreateFence(llvm::AcquireRelease, Scope); 1427 break; 1428 case 5: // memory_order_seq_cst 1429 Builder.CreateFence(llvm::SequentiallyConsistent, Scope); 1430 break; 1431 } 1432 return RValue::get(nullptr); 1433 } 1434 1435 llvm::BasicBlock *AcquireBB, *ReleaseBB, *AcqRelBB, *SeqCstBB; 1436 AcquireBB = createBasicBlock("acquire", CurFn); 1437 ReleaseBB = createBasicBlock("release", CurFn); 1438 AcqRelBB = createBasicBlock("acqrel", CurFn); 1439 SeqCstBB = createBasicBlock("seqcst", CurFn); 1440 llvm::BasicBlock *ContBB = createBasicBlock("atomic.continue", CurFn); 1441 1442 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false); 1443 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, ContBB); 1444 1445 Builder.SetInsertPoint(AcquireBB); 1446 Builder.CreateFence(llvm::Acquire, Scope); 1447 Builder.CreateBr(ContBB); 1448 SI->addCase(Builder.getInt32(1), AcquireBB); 1449 SI->addCase(Builder.getInt32(2), AcquireBB); 1450 1451 Builder.SetInsertPoint(ReleaseBB); 1452 Builder.CreateFence(llvm::Release, Scope); 1453 Builder.CreateBr(ContBB); 1454 SI->addCase(Builder.getInt32(3), ReleaseBB); 1455 1456 Builder.SetInsertPoint(AcqRelBB); 1457 Builder.CreateFence(llvm::AcquireRelease, Scope); 1458 Builder.CreateBr(ContBB); 1459 SI->addCase(Builder.getInt32(4), AcqRelBB); 1460 1461 Builder.SetInsertPoint(SeqCstBB); 1462 Builder.CreateFence(llvm::SequentiallyConsistent, Scope); 1463 Builder.CreateBr(ContBB); 1464 SI->addCase(Builder.getInt32(5), SeqCstBB); 1465 1466 Builder.SetInsertPoint(ContBB); 1467 return RValue::get(nullptr); 1468 } 1469 1470 // Library functions with special handling. 1471 case Builtin::BIsqrt: 1472 case Builtin::BIsqrtf: 1473 case Builtin::BIsqrtl: { 1474 // Transform a call to sqrt* into a @llvm.sqrt.* intrinsic call, but only 1475 // in finite- or unsafe-math mode (the intrinsic has different semantics 1476 // for handling negative numbers compared to the library function, so 1477 // -fmath-errno=0 is not enough). 1478 if (!FD->hasAttr<ConstAttr>()) 1479 break; 1480 if (!(CGM.getCodeGenOpts().UnsafeFPMath || 1481 CGM.getCodeGenOpts().NoNaNsFPMath)) 1482 break; 1483 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 1484 llvm::Type *ArgType = Arg0->getType(); 1485 Value *F = CGM.getIntrinsic(Intrinsic::sqrt, ArgType); 1486 return RValue::get(Builder.CreateCall(F, Arg0)); 1487 } 1488 1489 case Builtin::BI__builtin_pow: 1490 case Builtin::BI__builtin_powf: 1491 case Builtin::BI__builtin_powl: 1492 case Builtin::BIpow: 1493 case Builtin::BIpowf: 1494 case Builtin::BIpowl: { 1495 // Transform a call to pow* into a @llvm.pow.* intrinsic call. 1496 if (!FD->hasAttr<ConstAttr>()) 1497 break; 1498 Value *Base = EmitScalarExpr(E->getArg(0)); 1499 Value *Exponent = EmitScalarExpr(E->getArg(1)); 1500 llvm::Type *ArgType = Base->getType(); 1501 Value *F = CGM.getIntrinsic(Intrinsic::pow, ArgType); 1502 return RValue::get(Builder.CreateCall(F, {Base, Exponent})); 1503 } 1504 1505 case Builtin::BIfma: 1506 case Builtin::BIfmaf: 1507 case Builtin::BIfmal: 1508 case Builtin::BI__builtin_fma: 1509 case Builtin::BI__builtin_fmaf: 1510 case Builtin::BI__builtin_fmal: { 1511 // Rewrite fma to intrinsic. 1512 Value *FirstArg = EmitScalarExpr(E->getArg(0)); 1513 llvm::Type *ArgType = FirstArg->getType(); 1514 Value *F = CGM.getIntrinsic(Intrinsic::fma, ArgType); 1515 return RValue::get( 1516 Builder.CreateCall(F, {FirstArg, EmitScalarExpr(E->getArg(1)), 1517 EmitScalarExpr(E->getArg(2))})); 1518 } 1519 1520 case Builtin::BI__builtin_signbit: 1521 case Builtin::BI__builtin_signbitf: 1522 case Builtin::BI__builtin_signbitl: { 1523 return RValue::get( 1524 Builder.CreateZExt(EmitSignBit(*this, EmitScalarExpr(E->getArg(0))), 1525 ConvertType(E->getType()))); 1526 } 1527 case Builtin::BI__builtin_annotation: { 1528 llvm::Value *AnnVal = EmitScalarExpr(E->getArg(0)); 1529 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::annotation, 1530 AnnVal->getType()); 1531 1532 // Get the annotation string, go through casts. Sema requires this to be a 1533 // non-wide string literal, potentially casted, so the cast<> is safe. 1534 const Expr *AnnotationStrExpr = E->getArg(1)->IgnoreParenCasts(); 1535 StringRef Str = cast<StringLiteral>(AnnotationStrExpr)->getString(); 1536 return RValue::get(EmitAnnotationCall(F, AnnVal, Str, E->getExprLoc())); 1537 } 1538 case Builtin::BI__builtin_addcb: 1539 case Builtin::BI__builtin_addcs: 1540 case Builtin::BI__builtin_addc: 1541 case Builtin::BI__builtin_addcl: 1542 case Builtin::BI__builtin_addcll: 1543 case Builtin::BI__builtin_subcb: 1544 case Builtin::BI__builtin_subcs: 1545 case Builtin::BI__builtin_subc: 1546 case Builtin::BI__builtin_subcl: 1547 case Builtin::BI__builtin_subcll: { 1548 1549 // We translate all of these builtins from expressions of the form: 1550 // int x = ..., y = ..., carryin = ..., carryout, result; 1551 // result = __builtin_addc(x, y, carryin, &carryout); 1552 // 1553 // to LLVM IR of the form: 1554 // 1555 // %tmp1 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %x, i32 %y) 1556 // %tmpsum1 = extractvalue {i32, i1} %tmp1, 0 1557 // %carry1 = extractvalue {i32, i1} %tmp1, 1 1558 // %tmp2 = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %tmpsum1, 1559 // i32 %carryin) 1560 // %result = extractvalue {i32, i1} %tmp2, 0 1561 // %carry2 = extractvalue {i32, i1} %tmp2, 1 1562 // %tmp3 = or i1 %carry1, %carry2 1563 // %tmp4 = zext i1 %tmp3 to i32 1564 // store i32 %tmp4, i32* %carryout 1565 1566 // Scalarize our inputs. 1567 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1568 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1569 llvm::Value *Carryin = EmitScalarExpr(E->getArg(2)); 1570 Address CarryOutPtr = EmitPointerWithAlignment(E->getArg(3)); 1571 1572 // Decide if we are lowering to a uadd.with.overflow or usub.with.overflow. 1573 llvm::Intrinsic::ID IntrinsicId; 1574 switch (BuiltinID) { 1575 default: llvm_unreachable("Unknown multiprecision builtin id."); 1576 case Builtin::BI__builtin_addcb: 1577 case Builtin::BI__builtin_addcs: 1578 case Builtin::BI__builtin_addc: 1579 case Builtin::BI__builtin_addcl: 1580 case Builtin::BI__builtin_addcll: 1581 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1582 break; 1583 case Builtin::BI__builtin_subcb: 1584 case Builtin::BI__builtin_subcs: 1585 case Builtin::BI__builtin_subc: 1586 case Builtin::BI__builtin_subcl: 1587 case Builtin::BI__builtin_subcll: 1588 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1589 break; 1590 } 1591 1592 // Construct our resulting LLVM IR expression. 1593 llvm::Value *Carry1; 1594 llvm::Value *Sum1 = EmitOverflowIntrinsic(*this, IntrinsicId, 1595 X, Y, Carry1); 1596 llvm::Value *Carry2; 1597 llvm::Value *Sum2 = EmitOverflowIntrinsic(*this, IntrinsicId, 1598 Sum1, Carryin, Carry2); 1599 llvm::Value *CarryOut = Builder.CreateZExt(Builder.CreateOr(Carry1, Carry2), 1600 X->getType()); 1601 Builder.CreateStore(CarryOut, CarryOutPtr); 1602 return RValue::get(Sum2); 1603 } 1604 case Builtin::BI__builtin_uadd_overflow: 1605 case Builtin::BI__builtin_uaddl_overflow: 1606 case Builtin::BI__builtin_uaddll_overflow: 1607 case Builtin::BI__builtin_usub_overflow: 1608 case Builtin::BI__builtin_usubl_overflow: 1609 case Builtin::BI__builtin_usubll_overflow: 1610 case Builtin::BI__builtin_umul_overflow: 1611 case Builtin::BI__builtin_umull_overflow: 1612 case Builtin::BI__builtin_umulll_overflow: 1613 case Builtin::BI__builtin_sadd_overflow: 1614 case Builtin::BI__builtin_saddl_overflow: 1615 case Builtin::BI__builtin_saddll_overflow: 1616 case Builtin::BI__builtin_ssub_overflow: 1617 case Builtin::BI__builtin_ssubl_overflow: 1618 case Builtin::BI__builtin_ssubll_overflow: 1619 case Builtin::BI__builtin_smul_overflow: 1620 case Builtin::BI__builtin_smull_overflow: 1621 case Builtin::BI__builtin_smulll_overflow: { 1622 1623 // We translate all of these builtins directly to the relevant llvm IR node. 1624 1625 // Scalarize our inputs. 1626 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 1627 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 1628 Address SumOutPtr = EmitPointerWithAlignment(E->getArg(2)); 1629 1630 // Decide which of the overflow intrinsics we are lowering to: 1631 llvm::Intrinsic::ID IntrinsicId; 1632 switch (BuiltinID) { 1633 default: llvm_unreachable("Unknown security overflow builtin id."); 1634 case Builtin::BI__builtin_uadd_overflow: 1635 case Builtin::BI__builtin_uaddl_overflow: 1636 case Builtin::BI__builtin_uaddll_overflow: 1637 IntrinsicId = llvm::Intrinsic::uadd_with_overflow; 1638 break; 1639 case Builtin::BI__builtin_usub_overflow: 1640 case Builtin::BI__builtin_usubl_overflow: 1641 case Builtin::BI__builtin_usubll_overflow: 1642 IntrinsicId = llvm::Intrinsic::usub_with_overflow; 1643 break; 1644 case Builtin::BI__builtin_umul_overflow: 1645 case Builtin::BI__builtin_umull_overflow: 1646 case Builtin::BI__builtin_umulll_overflow: 1647 IntrinsicId = llvm::Intrinsic::umul_with_overflow; 1648 break; 1649 case Builtin::BI__builtin_sadd_overflow: 1650 case Builtin::BI__builtin_saddl_overflow: 1651 case Builtin::BI__builtin_saddll_overflow: 1652 IntrinsicId = llvm::Intrinsic::sadd_with_overflow; 1653 break; 1654 case Builtin::BI__builtin_ssub_overflow: 1655 case Builtin::BI__builtin_ssubl_overflow: 1656 case Builtin::BI__builtin_ssubll_overflow: 1657 IntrinsicId = llvm::Intrinsic::ssub_with_overflow; 1658 break; 1659 case Builtin::BI__builtin_smul_overflow: 1660 case Builtin::BI__builtin_smull_overflow: 1661 case Builtin::BI__builtin_smulll_overflow: 1662 IntrinsicId = llvm::Intrinsic::smul_with_overflow; 1663 break; 1664 } 1665 1666 1667 llvm::Value *Carry; 1668 llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry); 1669 Builder.CreateStore(Sum, SumOutPtr); 1670 1671 return RValue::get(Carry); 1672 } 1673 case Builtin::BI__builtin_addressof: 1674 return RValue::get(EmitLValue(E->getArg(0)).getPointer()); 1675 case Builtin::BI__builtin_operator_new: 1676 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 1677 E->getArg(0), false); 1678 case Builtin::BI__builtin_operator_delete: 1679 return EmitBuiltinNewDeleteCall(FD->getType()->castAs<FunctionProtoType>(), 1680 E->getArg(0), true); 1681 case Builtin::BI__noop: 1682 // __noop always evaluates to an integer literal zero. 1683 return RValue::get(ConstantInt::get(IntTy, 0)); 1684 case Builtin::BI__builtin_call_with_static_chain: { 1685 const CallExpr *Call = cast<CallExpr>(E->getArg(0)); 1686 const Expr *Chain = E->getArg(1); 1687 return EmitCall(Call->getCallee()->getType(), 1688 EmitScalarExpr(Call->getCallee()), Call, ReturnValue, 1689 Call->getCalleeDecl(), EmitScalarExpr(Chain)); 1690 } 1691 case Builtin::BI_InterlockedExchange: 1692 case Builtin::BI_InterlockedExchangePointer: 1693 return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E); 1694 case Builtin::BI_InterlockedCompareExchangePointer: { 1695 llvm::Type *RTy; 1696 llvm::IntegerType *IntType = 1697 IntegerType::get(getLLVMContext(), 1698 getContext().getTypeSize(E->getType())); 1699 llvm::Type *IntPtrType = IntType->getPointerTo(); 1700 1701 llvm::Value *Destination = 1702 Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), IntPtrType); 1703 1704 llvm::Value *Exchange = EmitScalarExpr(E->getArg(1)); 1705 RTy = Exchange->getType(); 1706 Exchange = Builder.CreatePtrToInt(Exchange, IntType); 1707 1708 llvm::Value *Comparand = 1709 Builder.CreatePtrToInt(EmitScalarExpr(E->getArg(2)), IntType); 1710 1711 auto Result = Builder.CreateAtomicCmpXchg(Destination, Comparand, Exchange, 1712 SequentiallyConsistent, 1713 SequentiallyConsistent); 1714 Result->setVolatile(true); 1715 1716 return RValue::get(Builder.CreateIntToPtr(Builder.CreateExtractValue(Result, 1717 0), 1718 RTy)); 1719 } 1720 case Builtin::BI_InterlockedCompareExchange: { 1721 AtomicCmpXchgInst *CXI = Builder.CreateAtomicCmpXchg( 1722 EmitScalarExpr(E->getArg(0)), 1723 EmitScalarExpr(E->getArg(2)), 1724 EmitScalarExpr(E->getArg(1)), 1725 SequentiallyConsistent, 1726 SequentiallyConsistent); 1727 CXI->setVolatile(true); 1728 return RValue::get(Builder.CreateExtractValue(CXI, 0)); 1729 } 1730 case Builtin::BI_InterlockedIncrement: { 1731 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 1732 AtomicRMWInst::Add, 1733 EmitScalarExpr(E->getArg(0)), 1734 ConstantInt::get(Int32Ty, 1), 1735 llvm::SequentiallyConsistent); 1736 RMWI->setVolatile(true); 1737 return RValue::get(Builder.CreateAdd(RMWI, ConstantInt::get(Int32Ty, 1))); 1738 } 1739 case Builtin::BI_InterlockedDecrement: { 1740 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 1741 AtomicRMWInst::Sub, 1742 EmitScalarExpr(E->getArg(0)), 1743 ConstantInt::get(Int32Ty, 1), 1744 llvm::SequentiallyConsistent); 1745 RMWI->setVolatile(true); 1746 return RValue::get(Builder.CreateSub(RMWI, ConstantInt::get(Int32Ty, 1))); 1747 } 1748 case Builtin::BI_InterlockedExchangeAdd: { 1749 AtomicRMWInst *RMWI = Builder.CreateAtomicRMW( 1750 AtomicRMWInst::Add, 1751 EmitScalarExpr(E->getArg(0)), 1752 EmitScalarExpr(E->getArg(1)), 1753 llvm::SequentiallyConsistent); 1754 RMWI->setVolatile(true); 1755 return RValue::get(RMWI); 1756 } 1757 case Builtin::BI__readfsdword: { 1758 Value *IntToPtr = 1759 Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)), 1760 llvm::PointerType::get(CGM.Int32Ty, 257)); 1761 LoadInst *Load = 1762 Builder.CreateAlignedLoad(IntToPtr, /*Align=*/4, /*isVolatile=*/true); 1763 return RValue::get(Load); 1764 } 1765 1766 case Builtin::BI__exception_code: 1767 case Builtin::BI_exception_code: 1768 return RValue::get(EmitSEHExceptionCode()); 1769 case Builtin::BI__exception_info: 1770 case Builtin::BI_exception_info: 1771 return RValue::get(EmitSEHExceptionInfo()); 1772 case Builtin::BI__abnormal_termination: 1773 case Builtin::BI_abnormal_termination: 1774 return RValue::get(EmitSEHAbnormalTermination()); 1775 case Builtin::BI_setjmpex: { 1776 if (getTarget().getTriple().isOSMSVCRT()) { 1777 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 1778 llvm::AttributeSet ReturnsTwiceAttr = 1779 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 1780 llvm::Attribute::ReturnsTwice); 1781 llvm::Constant *SetJmpEx = CGM.CreateRuntimeFunction( 1782 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 1783 "_setjmpex", ReturnsTwiceAttr); 1784 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 1785 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 1786 llvm::Value *FrameAddr = 1787 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1788 ConstantInt::get(Int32Ty, 0)); 1789 llvm::Value *Args[] = {Buf, FrameAddr}; 1790 llvm::CallSite CS = EmitRuntimeCallOrInvoke(SetJmpEx, Args); 1791 CS.setAttributes(ReturnsTwiceAttr); 1792 return RValue::get(CS.getInstruction()); 1793 } 1794 break; 1795 } 1796 case Builtin::BI_setjmp: { 1797 if (getTarget().getTriple().isOSMSVCRT()) { 1798 llvm::AttributeSet ReturnsTwiceAttr = 1799 AttributeSet::get(getLLVMContext(), llvm::AttributeSet::FunctionIndex, 1800 llvm::Attribute::ReturnsTwice); 1801 llvm::Value *Buf = Builder.CreateBitOrPointerCast( 1802 EmitScalarExpr(E->getArg(0)), Int8PtrTy); 1803 llvm::CallSite CS; 1804 if (getTarget().getTriple().getArch() == llvm::Triple::x86) { 1805 llvm::Type *ArgTypes[] = {Int8PtrTy, IntTy}; 1806 llvm::Constant *SetJmp3 = CGM.CreateRuntimeFunction( 1807 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/true), 1808 "_setjmp3", ReturnsTwiceAttr); 1809 llvm::Value *Count = ConstantInt::get(IntTy, 0); 1810 llvm::Value *Args[] = {Buf, Count}; 1811 CS = EmitRuntimeCallOrInvoke(SetJmp3, Args); 1812 } else { 1813 llvm::Type *ArgTypes[] = {Int8PtrTy, Int8PtrTy}; 1814 llvm::Constant *SetJmp = CGM.CreateRuntimeFunction( 1815 llvm::FunctionType::get(IntTy, ArgTypes, /*isVarArg=*/false), 1816 "_setjmp", ReturnsTwiceAttr); 1817 llvm::Value *FrameAddr = 1818 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::frameaddress), 1819 ConstantInt::get(Int32Ty, 0)); 1820 llvm::Value *Args[] = {Buf, FrameAddr}; 1821 CS = EmitRuntimeCallOrInvoke(SetJmp, Args); 1822 } 1823 CS.setAttributes(ReturnsTwiceAttr); 1824 return RValue::get(CS.getInstruction()); 1825 } 1826 break; 1827 } 1828 1829 case Builtin::BI__GetExceptionInfo: { 1830 if (llvm::GlobalVariable *GV = 1831 CGM.getCXXABI().getThrowInfo(FD->getParamDecl(0)->getType())) 1832 return RValue::get(llvm::ConstantExpr::getBitCast(GV, CGM.Int8PtrTy)); 1833 break; 1834 } 1835 } 1836 1837 // If this is an alias for a lib function (e.g. __builtin_sin), emit 1838 // the call using the normal call path, but using the unmangled 1839 // version of the function name. 1840 if (getContext().BuiltinInfo.isLibFunction(BuiltinID)) 1841 return emitLibraryCall(*this, FD, E, 1842 CGM.getBuiltinLibFunction(FD, BuiltinID)); 1843 1844 // If this is a predefined lib function (e.g. malloc), emit the call 1845 // using exactly the normal call path. 1846 if (getContext().BuiltinInfo.isPredefinedLibFunction(BuiltinID)) 1847 return emitLibraryCall(*this, FD, E, EmitScalarExpr(E->getCallee())); 1848 1849 // Check that a call to a target specific builtin has the correct target 1850 // features. 1851 // This is down here to avoid non-target specific builtins, however, if 1852 // generic builtins start to require generic target features then we 1853 // can move this up to the beginning of the function. 1854 if (!checkBuiltinTargetFeatures(FD)) 1855 CGM.getDiags().Report(E->getLocStart(), diag::err_builtin_needs_feature) 1856 << FD->getDeclName() 1857 << CGM.getContext().BuiltinInfo.getRequiredFeatures(BuiltinID); 1858 1859 // See if we have a target specific intrinsic. 1860 const char *Name = getContext().BuiltinInfo.getName(BuiltinID); 1861 Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; 1862 if (const char *Prefix = 1863 llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch())) { 1864 IntrinsicID = Intrinsic::getIntrinsicForGCCBuiltin(Prefix, Name); 1865 // NOTE we dont need to perform a compatibility flag check here since the 1866 // intrinsics are declared in Builtins*.def via LANGBUILTIN which filter the 1867 // MS builtins via ALL_MS_LANGUAGES and are filtered earlier. 1868 if (IntrinsicID == Intrinsic::not_intrinsic) 1869 IntrinsicID = Intrinsic::getIntrinsicForMSBuiltin(Prefix, Name); 1870 } 1871 1872 if (IntrinsicID != Intrinsic::not_intrinsic) { 1873 SmallVector<Value*, 16> Args; 1874 1875 // Find out if any arguments are required to be integer constant 1876 // expressions. 1877 unsigned ICEArguments = 0; 1878 ASTContext::GetBuiltinTypeError Error; 1879 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 1880 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 1881 1882 Function *F = CGM.getIntrinsic(IntrinsicID); 1883 llvm::FunctionType *FTy = F->getFunctionType(); 1884 1885 for (unsigned i = 0, e = E->getNumArgs(); i != e; ++i) { 1886 Value *ArgValue; 1887 // If this is a normal argument, just emit it as a scalar. 1888 if ((ICEArguments & (1 << i)) == 0) { 1889 ArgValue = EmitScalarExpr(E->getArg(i)); 1890 } else { 1891 // If this is required to be a constant, constant fold it so that we 1892 // know that the generated intrinsic gets a ConstantInt. 1893 llvm::APSInt Result; 1894 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result,getContext()); 1895 assert(IsConst && "Constant arg isn't actually constant?"); 1896 (void)IsConst; 1897 ArgValue = llvm::ConstantInt::get(getLLVMContext(), Result); 1898 } 1899 1900 // If the intrinsic arg type is different from the builtin arg type 1901 // we need to do a bit cast. 1902 llvm::Type *PTy = FTy->getParamType(i); 1903 if (PTy != ArgValue->getType()) { 1904 assert(PTy->canLosslesslyBitCastTo(FTy->getParamType(i)) && 1905 "Must be able to losslessly bit cast to param"); 1906 ArgValue = Builder.CreateBitCast(ArgValue, PTy); 1907 } 1908 1909 Args.push_back(ArgValue); 1910 } 1911 1912 Value *V = Builder.CreateCall(F, Args); 1913 QualType BuiltinRetType = E->getType(); 1914 1915 llvm::Type *RetTy = VoidTy; 1916 if (!BuiltinRetType->isVoidType()) 1917 RetTy = ConvertType(BuiltinRetType); 1918 1919 if (RetTy != V->getType()) { 1920 assert(V->getType()->canLosslesslyBitCastTo(RetTy) && 1921 "Must be able to losslessly bit cast result type"); 1922 V = Builder.CreateBitCast(V, RetTy); 1923 } 1924 1925 return RValue::get(V); 1926 } 1927 1928 // See if we have a target specific builtin that needs to be lowered. 1929 if (Value *V = EmitTargetBuiltinExpr(BuiltinID, E)) 1930 return RValue::get(V); 1931 1932 ErrorUnsupported(E, "builtin function"); 1933 1934 // Unknown builtin, for now just dump it out and return undef. 1935 return GetUndefRValue(E->getType()); 1936 } 1937 1938 static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF, 1939 unsigned BuiltinID, const CallExpr *E, 1940 llvm::Triple::ArchType Arch) { 1941 switch (Arch) { 1942 case llvm::Triple::arm: 1943 case llvm::Triple::armeb: 1944 case llvm::Triple::thumb: 1945 case llvm::Triple::thumbeb: 1946 return CGF->EmitARMBuiltinExpr(BuiltinID, E); 1947 case llvm::Triple::aarch64: 1948 case llvm::Triple::aarch64_be: 1949 return CGF->EmitAArch64BuiltinExpr(BuiltinID, E); 1950 case llvm::Triple::x86: 1951 case llvm::Triple::x86_64: 1952 return CGF->EmitX86BuiltinExpr(BuiltinID, E); 1953 case llvm::Triple::ppc: 1954 case llvm::Triple::ppc64: 1955 case llvm::Triple::ppc64le: 1956 return CGF->EmitPPCBuiltinExpr(BuiltinID, E); 1957 case llvm::Triple::r600: 1958 case llvm::Triple::amdgcn: 1959 return CGF->EmitAMDGPUBuiltinExpr(BuiltinID, E); 1960 case llvm::Triple::systemz: 1961 return CGF->EmitSystemZBuiltinExpr(BuiltinID, E); 1962 case llvm::Triple::nvptx: 1963 case llvm::Triple::nvptx64: 1964 return CGF->EmitNVPTXBuiltinExpr(BuiltinID, E); 1965 case llvm::Triple::wasm32: 1966 case llvm::Triple::wasm64: 1967 return CGF->EmitWebAssemblyBuiltinExpr(BuiltinID, E); 1968 default: 1969 return nullptr; 1970 } 1971 } 1972 1973 Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID, 1974 const CallExpr *E) { 1975 if (getContext().BuiltinInfo.isAuxBuiltinID(BuiltinID)) { 1976 assert(getContext().getAuxTargetInfo() && "Missing aux target info"); 1977 return EmitTargetArchBuiltinExpr( 1978 this, getContext().BuiltinInfo.getAuxBuiltinID(BuiltinID), E, 1979 getContext().getAuxTargetInfo()->getTriple().getArch()); 1980 } 1981 1982 return EmitTargetArchBuiltinExpr(this, BuiltinID, E, 1983 getTarget().getTriple().getArch()); 1984 } 1985 1986 static llvm::VectorType *GetNeonType(CodeGenFunction *CGF, 1987 NeonTypeFlags TypeFlags, 1988 bool V1Ty=false) { 1989 int IsQuad = TypeFlags.isQuad(); 1990 switch (TypeFlags.getEltType()) { 1991 case NeonTypeFlags::Int8: 1992 case NeonTypeFlags::Poly8: 1993 return llvm::VectorType::get(CGF->Int8Ty, V1Ty ? 1 : (8 << IsQuad)); 1994 case NeonTypeFlags::Int16: 1995 case NeonTypeFlags::Poly16: 1996 case NeonTypeFlags::Float16: 1997 return llvm::VectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad)); 1998 case NeonTypeFlags::Int32: 1999 return llvm::VectorType::get(CGF->Int32Ty, V1Ty ? 1 : (2 << IsQuad)); 2000 case NeonTypeFlags::Int64: 2001 case NeonTypeFlags::Poly64: 2002 return llvm::VectorType::get(CGF->Int64Ty, V1Ty ? 1 : (1 << IsQuad)); 2003 case NeonTypeFlags::Poly128: 2004 // FIXME: i128 and f128 doesn't get fully support in Clang and llvm. 2005 // There is a lot of i128 and f128 API missing. 2006 // so we use v16i8 to represent poly128 and get pattern matched. 2007 return llvm::VectorType::get(CGF->Int8Ty, 16); 2008 case NeonTypeFlags::Float32: 2009 return llvm::VectorType::get(CGF->FloatTy, V1Ty ? 1 : (2 << IsQuad)); 2010 case NeonTypeFlags::Float64: 2011 return llvm::VectorType::get(CGF->DoubleTy, V1Ty ? 1 : (1 << IsQuad)); 2012 } 2013 llvm_unreachable("Unknown vector element type!"); 2014 } 2015 2016 static llvm::VectorType *GetFloatNeonType(CodeGenFunction *CGF, 2017 NeonTypeFlags IntTypeFlags) { 2018 int IsQuad = IntTypeFlags.isQuad(); 2019 switch (IntTypeFlags.getEltType()) { 2020 case NeonTypeFlags::Int32: 2021 return llvm::VectorType::get(CGF->FloatTy, (2 << IsQuad)); 2022 case NeonTypeFlags::Int64: 2023 return llvm::VectorType::get(CGF->DoubleTy, (1 << IsQuad)); 2024 default: 2025 llvm_unreachable("Type can't be converted to floating-point!"); 2026 } 2027 } 2028 2029 Value *CodeGenFunction::EmitNeonSplat(Value *V, Constant *C) { 2030 unsigned nElts = cast<llvm::VectorType>(V->getType())->getNumElements(); 2031 Value* SV = llvm::ConstantVector::getSplat(nElts, C); 2032 return Builder.CreateShuffleVector(V, V, SV, "lane"); 2033 } 2034 2035 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, 2036 const char *name, 2037 unsigned shift, bool rightshift) { 2038 unsigned j = 0; 2039 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 2040 ai != ae; ++ai, ++j) 2041 if (shift > 0 && shift == j) 2042 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); 2043 else 2044 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); 2045 2046 return Builder.CreateCall(F, Ops, name); 2047 } 2048 2049 Value *CodeGenFunction::EmitNeonShiftVector(Value *V, llvm::Type *Ty, 2050 bool neg) { 2051 int SV = cast<ConstantInt>(V)->getSExtValue(); 2052 return ConstantInt::get(Ty, neg ? -SV : SV); 2053 } 2054 2055 // \brief Right-shift a vector by a constant. 2056 Value *CodeGenFunction::EmitNeonRShiftImm(Value *Vec, Value *Shift, 2057 llvm::Type *Ty, bool usgn, 2058 const char *name) { 2059 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 2060 2061 int ShiftAmt = cast<ConstantInt>(Shift)->getSExtValue(); 2062 int EltSize = VTy->getScalarSizeInBits(); 2063 2064 Vec = Builder.CreateBitCast(Vec, Ty); 2065 2066 // lshr/ashr are undefined when the shift amount is equal to the vector 2067 // element size. 2068 if (ShiftAmt == EltSize) { 2069 if (usgn) { 2070 // Right-shifting an unsigned value by its size yields 0. 2071 return llvm::ConstantAggregateZero::get(VTy); 2072 } else { 2073 // Right-shifting a signed value by its size is equivalent 2074 // to a shift of size-1. 2075 --ShiftAmt; 2076 Shift = ConstantInt::get(VTy->getElementType(), ShiftAmt); 2077 } 2078 } 2079 2080 Shift = EmitNeonShiftVector(Shift, Ty, false); 2081 if (usgn) 2082 return Builder.CreateLShr(Vec, Shift, name); 2083 else 2084 return Builder.CreateAShr(Vec, Shift, name); 2085 } 2086 2087 enum { 2088 AddRetType = (1 << 0), 2089 Add1ArgType = (1 << 1), 2090 Add2ArgTypes = (1 << 2), 2091 2092 VectorizeRetType = (1 << 3), 2093 VectorizeArgTypes = (1 << 4), 2094 2095 InventFloatType = (1 << 5), 2096 UnsignedAlts = (1 << 6), 2097 2098 Use64BitVectors = (1 << 7), 2099 Use128BitVectors = (1 << 8), 2100 2101 Vectorize1ArgType = Add1ArgType | VectorizeArgTypes, 2102 VectorRet = AddRetType | VectorizeRetType, 2103 VectorRetGetArgs01 = 2104 AddRetType | Add2ArgTypes | VectorizeRetType | VectorizeArgTypes, 2105 FpCmpzModifiers = 2106 AddRetType | VectorizeRetType | Add1ArgType | InventFloatType 2107 }; 2108 2109 struct NeonIntrinsicInfo { 2110 unsigned BuiltinID; 2111 unsigned LLVMIntrinsic; 2112 unsigned AltLLVMIntrinsic; 2113 const char *NameHint; 2114 unsigned TypeModifier; 2115 2116 bool operator<(unsigned RHSBuiltinID) const { 2117 return BuiltinID < RHSBuiltinID; 2118 } 2119 }; 2120 2121 #define NEONMAP0(NameBase) \ 2122 { NEON::BI__builtin_neon_ ## NameBase, 0, 0, #NameBase, 0 } 2123 2124 #define NEONMAP1(NameBase, LLVMIntrinsic, TypeModifier) \ 2125 { NEON:: BI__builtin_neon_ ## NameBase, \ 2126 Intrinsic::LLVMIntrinsic, 0, #NameBase, TypeModifier } 2127 2128 #define NEONMAP2(NameBase, LLVMIntrinsic, AltLLVMIntrinsic, TypeModifier) \ 2129 { NEON:: BI__builtin_neon_ ## NameBase, \ 2130 Intrinsic::LLVMIntrinsic, Intrinsic::AltLLVMIntrinsic, \ 2131 #NameBase, TypeModifier } 2132 2133 static const NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = { 2134 NEONMAP2(vabd_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 2135 NEONMAP2(vabdq_v, arm_neon_vabdu, arm_neon_vabds, Add1ArgType | UnsignedAlts), 2136 NEONMAP1(vabs_v, arm_neon_vabs, 0), 2137 NEONMAP1(vabsq_v, arm_neon_vabs, 0), 2138 NEONMAP0(vaddhn_v), 2139 NEONMAP1(vaesdq_v, arm_neon_aesd, 0), 2140 NEONMAP1(vaeseq_v, arm_neon_aese, 0), 2141 NEONMAP1(vaesimcq_v, arm_neon_aesimc, 0), 2142 NEONMAP1(vaesmcq_v, arm_neon_aesmc, 0), 2143 NEONMAP1(vbsl_v, arm_neon_vbsl, AddRetType), 2144 NEONMAP1(vbslq_v, arm_neon_vbsl, AddRetType), 2145 NEONMAP1(vcage_v, arm_neon_vacge, 0), 2146 NEONMAP1(vcageq_v, arm_neon_vacge, 0), 2147 NEONMAP1(vcagt_v, arm_neon_vacgt, 0), 2148 NEONMAP1(vcagtq_v, arm_neon_vacgt, 0), 2149 NEONMAP1(vcale_v, arm_neon_vacge, 0), 2150 NEONMAP1(vcaleq_v, arm_neon_vacge, 0), 2151 NEONMAP1(vcalt_v, arm_neon_vacgt, 0), 2152 NEONMAP1(vcaltq_v, arm_neon_vacgt, 0), 2153 NEONMAP1(vcls_v, arm_neon_vcls, Add1ArgType), 2154 NEONMAP1(vclsq_v, arm_neon_vcls, Add1ArgType), 2155 NEONMAP1(vclz_v, ctlz, Add1ArgType), 2156 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 2157 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 2158 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 2159 NEONMAP1(vcvt_f16_f32, arm_neon_vcvtfp2hf, 0), 2160 NEONMAP1(vcvt_f32_f16, arm_neon_vcvthf2fp, 0), 2161 NEONMAP0(vcvt_f32_v), 2162 NEONMAP2(vcvt_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 2163 NEONMAP1(vcvt_n_s32_v, arm_neon_vcvtfp2fxs, 0), 2164 NEONMAP1(vcvt_n_s64_v, arm_neon_vcvtfp2fxs, 0), 2165 NEONMAP1(vcvt_n_u32_v, arm_neon_vcvtfp2fxu, 0), 2166 NEONMAP1(vcvt_n_u64_v, arm_neon_vcvtfp2fxu, 0), 2167 NEONMAP0(vcvt_s32_v), 2168 NEONMAP0(vcvt_s64_v), 2169 NEONMAP0(vcvt_u32_v), 2170 NEONMAP0(vcvt_u64_v), 2171 NEONMAP1(vcvta_s32_v, arm_neon_vcvtas, 0), 2172 NEONMAP1(vcvta_s64_v, arm_neon_vcvtas, 0), 2173 NEONMAP1(vcvta_u32_v, arm_neon_vcvtau, 0), 2174 NEONMAP1(vcvta_u64_v, arm_neon_vcvtau, 0), 2175 NEONMAP1(vcvtaq_s32_v, arm_neon_vcvtas, 0), 2176 NEONMAP1(vcvtaq_s64_v, arm_neon_vcvtas, 0), 2177 NEONMAP1(vcvtaq_u32_v, arm_neon_vcvtau, 0), 2178 NEONMAP1(vcvtaq_u64_v, arm_neon_vcvtau, 0), 2179 NEONMAP1(vcvtm_s32_v, arm_neon_vcvtms, 0), 2180 NEONMAP1(vcvtm_s64_v, arm_neon_vcvtms, 0), 2181 NEONMAP1(vcvtm_u32_v, arm_neon_vcvtmu, 0), 2182 NEONMAP1(vcvtm_u64_v, arm_neon_vcvtmu, 0), 2183 NEONMAP1(vcvtmq_s32_v, arm_neon_vcvtms, 0), 2184 NEONMAP1(vcvtmq_s64_v, arm_neon_vcvtms, 0), 2185 NEONMAP1(vcvtmq_u32_v, arm_neon_vcvtmu, 0), 2186 NEONMAP1(vcvtmq_u64_v, arm_neon_vcvtmu, 0), 2187 NEONMAP1(vcvtn_s32_v, arm_neon_vcvtns, 0), 2188 NEONMAP1(vcvtn_s64_v, arm_neon_vcvtns, 0), 2189 NEONMAP1(vcvtn_u32_v, arm_neon_vcvtnu, 0), 2190 NEONMAP1(vcvtn_u64_v, arm_neon_vcvtnu, 0), 2191 NEONMAP1(vcvtnq_s32_v, arm_neon_vcvtns, 0), 2192 NEONMAP1(vcvtnq_s64_v, arm_neon_vcvtns, 0), 2193 NEONMAP1(vcvtnq_u32_v, arm_neon_vcvtnu, 0), 2194 NEONMAP1(vcvtnq_u64_v, arm_neon_vcvtnu, 0), 2195 NEONMAP1(vcvtp_s32_v, arm_neon_vcvtps, 0), 2196 NEONMAP1(vcvtp_s64_v, arm_neon_vcvtps, 0), 2197 NEONMAP1(vcvtp_u32_v, arm_neon_vcvtpu, 0), 2198 NEONMAP1(vcvtp_u64_v, arm_neon_vcvtpu, 0), 2199 NEONMAP1(vcvtpq_s32_v, arm_neon_vcvtps, 0), 2200 NEONMAP1(vcvtpq_s64_v, arm_neon_vcvtps, 0), 2201 NEONMAP1(vcvtpq_u32_v, arm_neon_vcvtpu, 0), 2202 NEONMAP1(vcvtpq_u64_v, arm_neon_vcvtpu, 0), 2203 NEONMAP0(vcvtq_f32_v), 2204 NEONMAP2(vcvtq_n_f32_v, arm_neon_vcvtfxu2fp, arm_neon_vcvtfxs2fp, 0), 2205 NEONMAP1(vcvtq_n_s32_v, arm_neon_vcvtfp2fxs, 0), 2206 NEONMAP1(vcvtq_n_s64_v, arm_neon_vcvtfp2fxs, 0), 2207 NEONMAP1(vcvtq_n_u32_v, arm_neon_vcvtfp2fxu, 0), 2208 NEONMAP1(vcvtq_n_u64_v, arm_neon_vcvtfp2fxu, 0), 2209 NEONMAP0(vcvtq_s32_v), 2210 NEONMAP0(vcvtq_s64_v), 2211 NEONMAP0(vcvtq_u32_v), 2212 NEONMAP0(vcvtq_u64_v), 2213 NEONMAP0(vext_v), 2214 NEONMAP0(vextq_v), 2215 NEONMAP0(vfma_v), 2216 NEONMAP0(vfmaq_v), 2217 NEONMAP2(vhadd_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 2218 NEONMAP2(vhaddq_v, arm_neon_vhaddu, arm_neon_vhadds, Add1ArgType | UnsignedAlts), 2219 NEONMAP2(vhsub_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 2220 NEONMAP2(vhsubq_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts), 2221 NEONMAP0(vld1_dup_v), 2222 NEONMAP1(vld1_v, arm_neon_vld1, 0), 2223 NEONMAP0(vld1q_dup_v), 2224 NEONMAP1(vld1q_v, arm_neon_vld1, 0), 2225 NEONMAP1(vld2_lane_v, arm_neon_vld2lane, 0), 2226 NEONMAP1(vld2_v, arm_neon_vld2, 0), 2227 NEONMAP1(vld2q_lane_v, arm_neon_vld2lane, 0), 2228 NEONMAP1(vld2q_v, arm_neon_vld2, 0), 2229 NEONMAP1(vld3_lane_v, arm_neon_vld3lane, 0), 2230 NEONMAP1(vld3_v, arm_neon_vld3, 0), 2231 NEONMAP1(vld3q_lane_v, arm_neon_vld3lane, 0), 2232 NEONMAP1(vld3q_v, arm_neon_vld3, 0), 2233 NEONMAP1(vld4_lane_v, arm_neon_vld4lane, 0), 2234 NEONMAP1(vld4_v, arm_neon_vld4, 0), 2235 NEONMAP1(vld4q_lane_v, arm_neon_vld4lane, 0), 2236 NEONMAP1(vld4q_v, arm_neon_vld4, 0), 2237 NEONMAP2(vmax_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 2238 NEONMAP1(vmaxnm_v, arm_neon_vmaxnm, Add1ArgType), 2239 NEONMAP1(vmaxnmq_v, arm_neon_vmaxnm, Add1ArgType), 2240 NEONMAP2(vmaxq_v, arm_neon_vmaxu, arm_neon_vmaxs, Add1ArgType | UnsignedAlts), 2241 NEONMAP2(vmin_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 2242 NEONMAP1(vminnm_v, arm_neon_vminnm, Add1ArgType), 2243 NEONMAP1(vminnmq_v, arm_neon_vminnm, Add1ArgType), 2244 NEONMAP2(vminq_v, arm_neon_vminu, arm_neon_vmins, Add1ArgType | UnsignedAlts), 2245 NEONMAP0(vmovl_v), 2246 NEONMAP0(vmovn_v), 2247 NEONMAP1(vmul_v, arm_neon_vmulp, Add1ArgType), 2248 NEONMAP0(vmull_v), 2249 NEONMAP1(vmulq_v, arm_neon_vmulp, Add1ArgType), 2250 NEONMAP2(vpadal_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 2251 NEONMAP2(vpadalq_v, arm_neon_vpadalu, arm_neon_vpadals, UnsignedAlts), 2252 NEONMAP1(vpadd_v, arm_neon_vpadd, Add1ArgType), 2253 NEONMAP2(vpaddl_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 2254 NEONMAP2(vpaddlq_v, arm_neon_vpaddlu, arm_neon_vpaddls, UnsignedAlts), 2255 NEONMAP1(vpaddq_v, arm_neon_vpadd, Add1ArgType), 2256 NEONMAP2(vpmax_v, arm_neon_vpmaxu, arm_neon_vpmaxs, Add1ArgType | UnsignedAlts), 2257 NEONMAP2(vpmin_v, arm_neon_vpminu, arm_neon_vpmins, Add1ArgType | UnsignedAlts), 2258 NEONMAP1(vqabs_v, arm_neon_vqabs, Add1ArgType), 2259 NEONMAP1(vqabsq_v, arm_neon_vqabs, Add1ArgType), 2260 NEONMAP2(vqadd_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 2261 NEONMAP2(vqaddq_v, arm_neon_vqaddu, arm_neon_vqadds, Add1ArgType | UnsignedAlts), 2262 NEONMAP2(vqdmlal_v, arm_neon_vqdmull, arm_neon_vqadds, 0), 2263 NEONMAP2(vqdmlsl_v, arm_neon_vqdmull, arm_neon_vqsubs, 0), 2264 NEONMAP1(vqdmulh_v, arm_neon_vqdmulh, Add1ArgType), 2265 NEONMAP1(vqdmulhq_v, arm_neon_vqdmulh, Add1ArgType), 2266 NEONMAP1(vqdmull_v, arm_neon_vqdmull, Add1ArgType), 2267 NEONMAP2(vqmovn_v, arm_neon_vqmovnu, arm_neon_vqmovns, Add1ArgType | UnsignedAlts), 2268 NEONMAP1(vqmovun_v, arm_neon_vqmovnsu, Add1ArgType), 2269 NEONMAP1(vqneg_v, arm_neon_vqneg, Add1ArgType), 2270 NEONMAP1(vqnegq_v, arm_neon_vqneg, Add1ArgType), 2271 NEONMAP1(vqrdmulh_v, arm_neon_vqrdmulh, Add1ArgType), 2272 NEONMAP1(vqrdmulhq_v, arm_neon_vqrdmulh, Add1ArgType), 2273 NEONMAP2(vqrshl_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 2274 NEONMAP2(vqrshlq_v, arm_neon_vqrshiftu, arm_neon_vqrshifts, Add1ArgType | UnsignedAlts), 2275 NEONMAP2(vqshl_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 2276 NEONMAP2(vqshl_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 2277 NEONMAP2(vqshlq_n_v, arm_neon_vqshiftu, arm_neon_vqshifts, UnsignedAlts), 2278 NEONMAP2(vqshlq_v, arm_neon_vqshiftu, arm_neon_vqshifts, Add1ArgType | UnsignedAlts), 2279 NEONMAP1(vqshlu_n_v, arm_neon_vqshiftsu, 0), 2280 NEONMAP1(vqshluq_n_v, arm_neon_vqshiftsu, 0), 2281 NEONMAP2(vqsub_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 2282 NEONMAP2(vqsubq_v, arm_neon_vqsubu, arm_neon_vqsubs, Add1ArgType | UnsignedAlts), 2283 NEONMAP1(vraddhn_v, arm_neon_vraddhn, Add1ArgType), 2284 NEONMAP2(vrecpe_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 2285 NEONMAP2(vrecpeq_v, arm_neon_vrecpe, arm_neon_vrecpe, 0), 2286 NEONMAP1(vrecps_v, arm_neon_vrecps, Add1ArgType), 2287 NEONMAP1(vrecpsq_v, arm_neon_vrecps, Add1ArgType), 2288 NEONMAP2(vrhadd_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 2289 NEONMAP2(vrhaddq_v, arm_neon_vrhaddu, arm_neon_vrhadds, Add1ArgType | UnsignedAlts), 2290 NEONMAP1(vrnd_v, arm_neon_vrintz, Add1ArgType), 2291 NEONMAP1(vrnda_v, arm_neon_vrinta, Add1ArgType), 2292 NEONMAP1(vrndaq_v, arm_neon_vrinta, Add1ArgType), 2293 NEONMAP1(vrndm_v, arm_neon_vrintm, Add1ArgType), 2294 NEONMAP1(vrndmq_v, arm_neon_vrintm, Add1ArgType), 2295 NEONMAP1(vrndn_v, arm_neon_vrintn, Add1ArgType), 2296 NEONMAP1(vrndnq_v, arm_neon_vrintn, Add1ArgType), 2297 NEONMAP1(vrndp_v, arm_neon_vrintp, Add1ArgType), 2298 NEONMAP1(vrndpq_v, arm_neon_vrintp, Add1ArgType), 2299 NEONMAP1(vrndq_v, arm_neon_vrintz, Add1ArgType), 2300 NEONMAP1(vrndx_v, arm_neon_vrintx, Add1ArgType), 2301 NEONMAP1(vrndxq_v, arm_neon_vrintx, Add1ArgType), 2302 NEONMAP2(vrshl_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 2303 NEONMAP2(vrshlq_v, arm_neon_vrshiftu, arm_neon_vrshifts, Add1ArgType | UnsignedAlts), 2304 NEONMAP2(vrshr_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 2305 NEONMAP2(vrshrq_n_v, arm_neon_vrshiftu, arm_neon_vrshifts, UnsignedAlts), 2306 NEONMAP2(vrsqrte_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 2307 NEONMAP2(vrsqrteq_v, arm_neon_vrsqrte, arm_neon_vrsqrte, 0), 2308 NEONMAP1(vrsqrts_v, arm_neon_vrsqrts, Add1ArgType), 2309 NEONMAP1(vrsqrtsq_v, arm_neon_vrsqrts, Add1ArgType), 2310 NEONMAP1(vrsubhn_v, arm_neon_vrsubhn, Add1ArgType), 2311 NEONMAP1(vsha1su0q_v, arm_neon_sha1su0, 0), 2312 NEONMAP1(vsha1su1q_v, arm_neon_sha1su1, 0), 2313 NEONMAP1(vsha256h2q_v, arm_neon_sha256h2, 0), 2314 NEONMAP1(vsha256hq_v, arm_neon_sha256h, 0), 2315 NEONMAP1(vsha256su0q_v, arm_neon_sha256su0, 0), 2316 NEONMAP1(vsha256su1q_v, arm_neon_sha256su1, 0), 2317 NEONMAP0(vshl_n_v), 2318 NEONMAP2(vshl_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 2319 NEONMAP0(vshll_n_v), 2320 NEONMAP0(vshlq_n_v), 2321 NEONMAP2(vshlq_v, arm_neon_vshiftu, arm_neon_vshifts, Add1ArgType | UnsignedAlts), 2322 NEONMAP0(vshr_n_v), 2323 NEONMAP0(vshrn_n_v), 2324 NEONMAP0(vshrq_n_v), 2325 NEONMAP1(vst1_v, arm_neon_vst1, 0), 2326 NEONMAP1(vst1q_v, arm_neon_vst1, 0), 2327 NEONMAP1(vst2_lane_v, arm_neon_vst2lane, 0), 2328 NEONMAP1(vst2_v, arm_neon_vst2, 0), 2329 NEONMAP1(vst2q_lane_v, arm_neon_vst2lane, 0), 2330 NEONMAP1(vst2q_v, arm_neon_vst2, 0), 2331 NEONMAP1(vst3_lane_v, arm_neon_vst3lane, 0), 2332 NEONMAP1(vst3_v, arm_neon_vst3, 0), 2333 NEONMAP1(vst3q_lane_v, arm_neon_vst3lane, 0), 2334 NEONMAP1(vst3q_v, arm_neon_vst3, 0), 2335 NEONMAP1(vst4_lane_v, arm_neon_vst4lane, 0), 2336 NEONMAP1(vst4_v, arm_neon_vst4, 0), 2337 NEONMAP1(vst4q_lane_v, arm_neon_vst4lane, 0), 2338 NEONMAP1(vst4q_v, arm_neon_vst4, 0), 2339 NEONMAP0(vsubhn_v), 2340 NEONMAP0(vtrn_v), 2341 NEONMAP0(vtrnq_v), 2342 NEONMAP0(vtst_v), 2343 NEONMAP0(vtstq_v), 2344 NEONMAP0(vuzp_v), 2345 NEONMAP0(vuzpq_v), 2346 NEONMAP0(vzip_v), 2347 NEONMAP0(vzipq_v) 2348 }; 2349 2350 static const NeonIntrinsicInfo AArch64SIMDIntrinsicMap[] = { 2351 NEONMAP1(vabs_v, aarch64_neon_abs, 0), 2352 NEONMAP1(vabsq_v, aarch64_neon_abs, 0), 2353 NEONMAP0(vaddhn_v), 2354 NEONMAP1(vaesdq_v, aarch64_crypto_aesd, 0), 2355 NEONMAP1(vaeseq_v, aarch64_crypto_aese, 0), 2356 NEONMAP1(vaesimcq_v, aarch64_crypto_aesimc, 0), 2357 NEONMAP1(vaesmcq_v, aarch64_crypto_aesmc, 0), 2358 NEONMAP1(vcage_v, aarch64_neon_facge, 0), 2359 NEONMAP1(vcageq_v, aarch64_neon_facge, 0), 2360 NEONMAP1(vcagt_v, aarch64_neon_facgt, 0), 2361 NEONMAP1(vcagtq_v, aarch64_neon_facgt, 0), 2362 NEONMAP1(vcale_v, aarch64_neon_facge, 0), 2363 NEONMAP1(vcaleq_v, aarch64_neon_facge, 0), 2364 NEONMAP1(vcalt_v, aarch64_neon_facgt, 0), 2365 NEONMAP1(vcaltq_v, aarch64_neon_facgt, 0), 2366 NEONMAP1(vcls_v, aarch64_neon_cls, Add1ArgType), 2367 NEONMAP1(vclsq_v, aarch64_neon_cls, Add1ArgType), 2368 NEONMAP1(vclz_v, ctlz, Add1ArgType), 2369 NEONMAP1(vclzq_v, ctlz, Add1ArgType), 2370 NEONMAP1(vcnt_v, ctpop, Add1ArgType), 2371 NEONMAP1(vcntq_v, ctpop, Add1ArgType), 2372 NEONMAP1(vcvt_f16_f32, aarch64_neon_vcvtfp2hf, 0), 2373 NEONMAP1(vcvt_f32_f16, aarch64_neon_vcvthf2fp, 0), 2374 NEONMAP0(vcvt_f32_v), 2375 NEONMAP2(vcvt_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2376 NEONMAP2(vcvt_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2377 NEONMAP1(vcvt_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 2378 NEONMAP1(vcvt_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 2379 NEONMAP1(vcvt_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 2380 NEONMAP1(vcvt_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 2381 NEONMAP0(vcvtq_f32_v), 2382 NEONMAP2(vcvtq_n_f32_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2383 NEONMAP2(vcvtq_n_f64_v, aarch64_neon_vcvtfxu2fp, aarch64_neon_vcvtfxs2fp, 0), 2384 NEONMAP1(vcvtq_n_s32_v, aarch64_neon_vcvtfp2fxs, 0), 2385 NEONMAP1(vcvtq_n_s64_v, aarch64_neon_vcvtfp2fxs, 0), 2386 NEONMAP1(vcvtq_n_u32_v, aarch64_neon_vcvtfp2fxu, 0), 2387 NEONMAP1(vcvtq_n_u64_v, aarch64_neon_vcvtfp2fxu, 0), 2388 NEONMAP1(vcvtx_f32_v, aarch64_neon_fcvtxn, AddRetType | Add1ArgType), 2389 NEONMAP0(vext_v), 2390 NEONMAP0(vextq_v), 2391 NEONMAP0(vfma_v), 2392 NEONMAP0(vfmaq_v), 2393 NEONMAP2(vhadd_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 2394 NEONMAP2(vhaddq_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts), 2395 NEONMAP2(vhsub_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 2396 NEONMAP2(vhsubq_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), 2397 NEONMAP0(vmovl_v), 2398 NEONMAP0(vmovn_v), 2399 NEONMAP1(vmul_v, aarch64_neon_pmul, Add1ArgType), 2400 NEONMAP1(vmulq_v, aarch64_neon_pmul, Add1ArgType), 2401 NEONMAP1(vpadd_v, aarch64_neon_addp, Add1ArgType), 2402 NEONMAP2(vpaddl_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 2403 NEONMAP2(vpaddlq_v, aarch64_neon_uaddlp, aarch64_neon_saddlp, UnsignedAlts), 2404 NEONMAP1(vpaddq_v, aarch64_neon_addp, Add1ArgType), 2405 NEONMAP1(vqabs_v, aarch64_neon_sqabs, Add1ArgType), 2406 NEONMAP1(vqabsq_v, aarch64_neon_sqabs, Add1ArgType), 2407 NEONMAP2(vqadd_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 2408 NEONMAP2(vqaddq_v, aarch64_neon_uqadd, aarch64_neon_sqadd, Add1ArgType | UnsignedAlts), 2409 NEONMAP2(vqdmlal_v, aarch64_neon_sqdmull, aarch64_neon_sqadd, 0), 2410 NEONMAP2(vqdmlsl_v, aarch64_neon_sqdmull, aarch64_neon_sqsub, 0), 2411 NEONMAP1(vqdmulh_v, aarch64_neon_sqdmulh, Add1ArgType), 2412 NEONMAP1(vqdmulhq_v, aarch64_neon_sqdmulh, Add1ArgType), 2413 NEONMAP1(vqdmull_v, aarch64_neon_sqdmull, Add1ArgType), 2414 NEONMAP2(vqmovn_v, aarch64_neon_uqxtn, aarch64_neon_sqxtn, Add1ArgType | UnsignedAlts), 2415 NEONMAP1(vqmovun_v, aarch64_neon_sqxtun, Add1ArgType), 2416 NEONMAP1(vqneg_v, aarch64_neon_sqneg, Add1ArgType), 2417 NEONMAP1(vqnegq_v, aarch64_neon_sqneg, Add1ArgType), 2418 NEONMAP1(vqrdmulh_v, aarch64_neon_sqrdmulh, Add1ArgType), 2419 NEONMAP1(vqrdmulhq_v, aarch64_neon_sqrdmulh, Add1ArgType), 2420 NEONMAP2(vqrshl_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 2421 NEONMAP2(vqrshlq_v, aarch64_neon_uqrshl, aarch64_neon_sqrshl, Add1ArgType | UnsignedAlts), 2422 NEONMAP2(vqshl_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl, UnsignedAlts), 2423 NEONMAP2(vqshl_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 2424 NEONMAP2(vqshlq_n_v, aarch64_neon_uqshl, aarch64_neon_sqshl,UnsignedAlts), 2425 NEONMAP2(vqshlq_v, aarch64_neon_uqshl, aarch64_neon_sqshl, Add1ArgType | UnsignedAlts), 2426 NEONMAP1(vqshlu_n_v, aarch64_neon_sqshlu, 0), 2427 NEONMAP1(vqshluq_n_v, aarch64_neon_sqshlu, 0), 2428 NEONMAP2(vqsub_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 2429 NEONMAP2(vqsubq_v, aarch64_neon_uqsub, aarch64_neon_sqsub, Add1ArgType | UnsignedAlts), 2430 NEONMAP1(vraddhn_v, aarch64_neon_raddhn, Add1ArgType), 2431 NEONMAP2(vrecpe_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 2432 NEONMAP2(vrecpeq_v, aarch64_neon_frecpe, aarch64_neon_urecpe, 0), 2433 NEONMAP1(vrecps_v, aarch64_neon_frecps, Add1ArgType), 2434 NEONMAP1(vrecpsq_v, aarch64_neon_frecps, Add1ArgType), 2435 NEONMAP2(vrhadd_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 2436 NEONMAP2(vrhaddq_v, aarch64_neon_urhadd, aarch64_neon_srhadd, Add1ArgType | UnsignedAlts), 2437 NEONMAP2(vrshl_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 2438 NEONMAP2(vrshlq_v, aarch64_neon_urshl, aarch64_neon_srshl, Add1ArgType | UnsignedAlts), 2439 NEONMAP2(vrshr_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 2440 NEONMAP2(vrshrq_n_v, aarch64_neon_urshl, aarch64_neon_srshl, UnsignedAlts), 2441 NEONMAP2(vrsqrte_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 2442 NEONMAP2(vrsqrteq_v, aarch64_neon_frsqrte, aarch64_neon_ursqrte, 0), 2443 NEONMAP1(vrsqrts_v, aarch64_neon_frsqrts, Add1ArgType), 2444 NEONMAP1(vrsqrtsq_v, aarch64_neon_frsqrts, Add1ArgType), 2445 NEONMAP1(vrsubhn_v, aarch64_neon_rsubhn, Add1ArgType), 2446 NEONMAP1(vsha1su0q_v, aarch64_crypto_sha1su0, 0), 2447 NEONMAP1(vsha1su1q_v, aarch64_crypto_sha1su1, 0), 2448 NEONMAP1(vsha256h2q_v, aarch64_crypto_sha256h2, 0), 2449 NEONMAP1(vsha256hq_v, aarch64_crypto_sha256h, 0), 2450 NEONMAP1(vsha256su0q_v, aarch64_crypto_sha256su0, 0), 2451 NEONMAP1(vsha256su1q_v, aarch64_crypto_sha256su1, 0), 2452 NEONMAP0(vshl_n_v), 2453 NEONMAP2(vshl_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 2454 NEONMAP0(vshll_n_v), 2455 NEONMAP0(vshlq_n_v), 2456 NEONMAP2(vshlq_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts), 2457 NEONMAP0(vshr_n_v), 2458 NEONMAP0(vshrn_n_v), 2459 NEONMAP0(vshrq_n_v), 2460 NEONMAP0(vsubhn_v), 2461 NEONMAP0(vtst_v), 2462 NEONMAP0(vtstq_v), 2463 }; 2464 2465 static const NeonIntrinsicInfo AArch64SISDIntrinsicMap[] = { 2466 NEONMAP1(vabdd_f64, aarch64_sisd_fabd, Add1ArgType), 2467 NEONMAP1(vabds_f32, aarch64_sisd_fabd, Add1ArgType), 2468 NEONMAP1(vabsd_s64, aarch64_neon_abs, Add1ArgType), 2469 NEONMAP1(vaddlv_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 2470 NEONMAP1(vaddlv_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 2471 NEONMAP1(vaddlvq_s32, aarch64_neon_saddlv, AddRetType | Add1ArgType), 2472 NEONMAP1(vaddlvq_u32, aarch64_neon_uaddlv, AddRetType | Add1ArgType), 2473 NEONMAP1(vaddv_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 2474 NEONMAP1(vaddv_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 2475 NEONMAP1(vaddv_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2476 NEONMAP1(vaddvq_f32, aarch64_neon_faddv, AddRetType | Add1ArgType), 2477 NEONMAP1(vaddvq_f64, aarch64_neon_faddv, AddRetType | Add1ArgType), 2478 NEONMAP1(vaddvq_s32, aarch64_neon_saddv, AddRetType | Add1ArgType), 2479 NEONMAP1(vaddvq_s64, aarch64_neon_saddv, AddRetType | Add1ArgType), 2480 NEONMAP1(vaddvq_u32, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2481 NEONMAP1(vaddvq_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2482 NEONMAP1(vcaged_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 2483 NEONMAP1(vcages_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 2484 NEONMAP1(vcagtd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 2485 NEONMAP1(vcagts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 2486 NEONMAP1(vcaled_f64, aarch64_neon_facge, AddRetType | Add1ArgType), 2487 NEONMAP1(vcales_f32, aarch64_neon_facge, AddRetType | Add1ArgType), 2488 NEONMAP1(vcaltd_f64, aarch64_neon_facgt, AddRetType | Add1ArgType), 2489 NEONMAP1(vcalts_f32, aarch64_neon_facgt, AddRetType | Add1ArgType), 2490 NEONMAP1(vcvtad_s64_f64, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 2491 NEONMAP1(vcvtad_u64_f64, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 2492 NEONMAP1(vcvtas_s32_f32, aarch64_neon_fcvtas, AddRetType | Add1ArgType), 2493 NEONMAP1(vcvtas_u32_f32, aarch64_neon_fcvtau, AddRetType | Add1ArgType), 2494 NEONMAP1(vcvtd_n_f64_s64, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 2495 NEONMAP1(vcvtd_n_f64_u64, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 2496 NEONMAP1(vcvtd_n_s64_f64, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 2497 NEONMAP1(vcvtd_n_u64_f64, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 2498 NEONMAP1(vcvtmd_s64_f64, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 2499 NEONMAP1(vcvtmd_u64_f64, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 2500 NEONMAP1(vcvtms_s32_f32, aarch64_neon_fcvtms, AddRetType | Add1ArgType), 2501 NEONMAP1(vcvtms_u32_f32, aarch64_neon_fcvtmu, AddRetType | Add1ArgType), 2502 NEONMAP1(vcvtnd_s64_f64, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 2503 NEONMAP1(vcvtnd_u64_f64, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 2504 NEONMAP1(vcvtns_s32_f32, aarch64_neon_fcvtns, AddRetType | Add1ArgType), 2505 NEONMAP1(vcvtns_u32_f32, aarch64_neon_fcvtnu, AddRetType | Add1ArgType), 2506 NEONMAP1(vcvtpd_s64_f64, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 2507 NEONMAP1(vcvtpd_u64_f64, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 2508 NEONMAP1(vcvtps_s32_f32, aarch64_neon_fcvtps, AddRetType | Add1ArgType), 2509 NEONMAP1(vcvtps_u32_f32, aarch64_neon_fcvtpu, AddRetType | Add1ArgType), 2510 NEONMAP1(vcvts_n_f32_s32, aarch64_neon_vcvtfxs2fp, AddRetType | Add1ArgType), 2511 NEONMAP1(vcvts_n_f32_u32, aarch64_neon_vcvtfxu2fp, AddRetType | Add1ArgType), 2512 NEONMAP1(vcvts_n_s32_f32, aarch64_neon_vcvtfp2fxs, AddRetType | Add1ArgType), 2513 NEONMAP1(vcvts_n_u32_f32, aarch64_neon_vcvtfp2fxu, AddRetType | Add1ArgType), 2514 NEONMAP1(vcvtxd_f32_f64, aarch64_sisd_fcvtxn, 0), 2515 NEONMAP1(vmaxnmv_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2516 NEONMAP1(vmaxnmvq_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2517 NEONMAP1(vmaxnmvq_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2518 NEONMAP1(vmaxv_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2519 NEONMAP1(vmaxv_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 2520 NEONMAP1(vmaxv_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 2521 NEONMAP1(vmaxvq_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2522 NEONMAP1(vmaxvq_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2523 NEONMAP1(vmaxvq_s32, aarch64_neon_smaxv, AddRetType | Add1ArgType), 2524 NEONMAP1(vmaxvq_u32, aarch64_neon_umaxv, AddRetType | Add1ArgType), 2525 NEONMAP1(vminnmv_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2526 NEONMAP1(vminnmvq_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2527 NEONMAP1(vminnmvq_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2528 NEONMAP1(vminv_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 2529 NEONMAP1(vminv_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 2530 NEONMAP1(vminv_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 2531 NEONMAP1(vminvq_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 2532 NEONMAP1(vminvq_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 2533 NEONMAP1(vminvq_s32, aarch64_neon_sminv, AddRetType | Add1ArgType), 2534 NEONMAP1(vminvq_u32, aarch64_neon_uminv, AddRetType | Add1ArgType), 2535 NEONMAP1(vmull_p64, aarch64_neon_pmull64, 0), 2536 NEONMAP1(vmulxd_f64, aarch64_neon_fmulx, Add1ArgType), 2537 NEONMAP1(vmulxs_f32, aarch64_neon_fmulx, Add1ArgType), 2538 NEONMAP1(vpaddd_s64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2539 NEONMAP1(vpaddd_u64, aarch64_neon_uaddv, AddRetType | Add1ArgType), 2540 NEONMAP1(vpmaxnmqd_f64, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2541 NEONMAP1(vpmaxnms_f32, aarch64_neon_fmaxnmv, AddRetType | Add1ArgType), 2542 NEONMAP1(vpmaxqd_f64, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2543 NEONMAP1(vpmaxs_f32, aarch64_neon_fmaxv, AddRetType | Add1ArgType), 2544 NEONMAP1(vpminnmqd_f64, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2545 NEONMAP1(vpminnms_f32, aarch64_neon_fminnmv, AddRetType | Add1ArgType), 2546 NEONMAP1(vpminqd_f64, aarch64_neon_fminv, AddRetType | Add1ArgType), 2547 NEONMAP1(vpmins_f32, aarch64_neon_fminv, AddRetType | Add1ArgType), 2548 NEONMAP1(vqabsb_s8, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 2549 NEONMAP1(vqabsd_s64, aarch64_neon_sqabs, Add1ArgType), 2550 NEONMAP1(vqabsh_s16, aarch64_neon_sqabs, Vectorize1ArgType | Use64BitVectors), 2551 NEONMAP1(vqabss_s32, aarch64_neon_sqabs, Add1ArgType), 2552 NEONMAP1(vqaddb_s8, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 2553 NEONMAP1(vqaddb_u8, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 2554 NEONMAP1(vqaddd_s64, aarch64_neon_sqadd, Add1ArgType), 2555 NEONMAP1(vqaddd_u64, aarch64_neon_uqadd, Add1ArgType), 2556 NEONMAP1(vqaddh_s16, aarch64_neon_sqadd, Vectorize1ArgType | Use64BitVectors), 2557 NEONMAP1(vqaddh_u16, aarch64_neon_uqadd, Vectorize1ArgType | Use64BitVectors), 2558 NEONMAP1(vqadds_s32, aarch64_neon_sqadd, Add1ArgType), 2559 NEONMAP1(vqadds_u32, aarch64_neon_uqadd, Add1ArgType), 2560 NEONMAP1(vqdmulhh_s16, aarch64_neon_sqdmulh, Vectorize1ArgType | Use64BitVectors), 2561 NEONMAP1(vqdmulhs_s32, aarch64_neon_sqdmulh, Add1ArgType), 2562 NEONMAP1(vqdmullh_s16, aarch64_neon_sqdmull, VectorRet | Use128BitVectors), 2563 NEONMAP1(vqdmulls_s32, aarch64_neon_sqdmulls_scalar, 0), 2564 NEONMAP1(vqmovnd_s64, aarch64_neon_scalar_sqxtn, AddRetType | Add1ArgType), 2565 NEONMAP1(vqmovnd_u64, aarch64_neon_scalar_uqxtn, AddRetType | Add1ArgType), 2566 NEONMAP1(vqmovnh_s16, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 2567 NEONMAP1(vqmovnh_u16, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 2568 NEONMAP1(vqmovns_s32, aarch64_neon_sqxtn, VectorRet | Use64BitVectors), 2569 NEONMAP1(vqmovns_u32, aarch64_neon_uqxtn, VectorRet | Use64BitVectors), 2570 NEONMAP1(vqmovund_s64, aarch64_neon_scalar_sqxtun, AddRetType | Add1ArgType), 2571 NEONMAP1(vqmovunh_s16, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 2572 NEONMAP1(vqmovuns_s32, aarch64_neon_sqxtun, VectorRet | Use64BitVectors), 2573 NEONMAP1(vqnegb_s8, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 2574 NEONMAP1(vqnegd_s64, aarch64_neon_sqneg, Add1ArgType), 2575 NEONMAP1(vqnegh_s16, aarch64_neon_sqneg, Vectorize1ArgType | Use64BitVectors), 2576 NEONMAP1(vqnegs_s32, aarch64_neon_sqneg, Add1ArgType), 2577 NEONMAP1(vqrdmulhh_s16, aarch64_neon_sqrdmulh, Vectorize1ArgType | Use64BitVectors), 2578 NEONMAP1(vqrdmulhs_s32, aarch64_neon_sqrdmulh, Add1ArgType), 2579 NEONMAP1(vqrshlb_s8, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 2580 NEONMAP1(vqrshlb_u8, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 2581 NEONMAP1(vqrshld_s64, aarch64_neon_sqrshl, Add1ArgType), 2582 NEONMAP1(vqrshld_u64, aarch64_neon_uqrshl, Add1ArgType), 2583 NEONMAP1(vqrshlh_s16, aarch64_neon_sqrshl, Vectorize1ArgType | Use64BitVectors), 2584 NEONMAP1(vqrshlh_u16, aarch64_neon_uqrshl, Vectorize1ArgType | Use64BitVectors), 2585 NEONMAP1(vqrshls_s32, aarch64_neon_sqrshl, Add1ArgType), 2586 NEONMAP1(vqrshls_u32, aarch64_neon_uqrshl, Add1ArgType), 2587 NEONMAP1(vqrshrnd_n_s64, aarch64_neon_sqrshrn, AddRetType), 2588 NEONMAP1(vqrshrnd_n_u64, aarch64_neon_uqrshrn, AddRetType), 2589 NEONMAP1(vqrshrnh_n_s16, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 2590 NEONMAP1(vqrshrnh_n_u16, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 2591 NEONMAP1(vqrshrns_n_s32, aarch64_neon_sqrshrn, VectorRet | Use64BitVectors), 2592 NEONMAP1(vqrshrns_n_u32, aarch64_neon_uqrshrn, VectorRet | Use64BitVectors), 2593 NEONMAP1(vqrshrund_n_s64, aarch64_neon_sqrshrun, AddRetType), 2594 NEONMAP1(vqrshrunh_n_s16, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 2595 NEONMAP1(vqrshruns_n_s32, aarch64_neon_sqrshrun, VectorRet | Use64BitVectors), 2596 NEONMAP1(vqshlb_n_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2597 NEONMAP1(vqshlb_n_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2598 NEONMAP1(vqshlb_s8, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2599 NEONMAP1(vqshlb_u8, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2600 NEONMAP1(vqshld_s64, aarch64_neon_sqshl, Add1ArgType), 2601 NEONMAP1(vqshld_u64, aarch64_neon_uqshl, Add1ArgType), 2602 NEONMAP1(vqshlh_n_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2603 NEONMAP1(vqshlh_n_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2604 NEONMAP1(vqshlh_s16, aarch64_neon_sqshl, Vectorize1ArgType | Use64BitVectors), 2605 NEONMAP1(vqshlh_u16, aarch64_neon_uqshl, Vectorize1ArgType | Use64BitVectors), 2606 NEONMAP1(vqshls_n_s32, aarch64_neon_sqshl, Add1ArgType), 2607 NEONMAP1(vqshls_n_u32, aarch64_neon_uqshl, Add1ArgType), 2608 NEONMAP1(vqshls_s32, aarch64_neon_sqshl, Add1ArgType), 2609 NEONMAP1(vqshls_u32, aarch64_neon_uqshl, Add1ArgType), 2610 NEONMAP1(vqshlub_n_s8, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 2611 NEONMAP1(vqshluh_n_s16, aarch64_neon_sqshlu, Vectorize1ArgType | Use64BitVectors), 2612 NEONMAP1(vqshlus_n_s32, aarch64_neon_sqshlu, Add1ArgType), 2613 NEONMAP1(vqshrnd_n_s64, aarch64_neon_sqshrn, AddRetType), 2614 NEONMAP1(vqshrnd_n_u64, aarch64_neon_uqshrn, AddRetType), 2615 NEONMAP1(vqshrnh_n_s16, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 2616 NEONMAP1(vqshrnh_n_u16, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 2617 NEONMAP1(vqshrns_n_s32, aarch64_neon_sqshrn, VectorRet | Use64BitVectors), 2618 NEONMAP1(vqshrns_n_u32, aarch64_neon_uqshrn, VectorRet | Use64BitVectors), 2619 NEONMAP1(vqshrund_n_s64, aarch64_neon_sqshrun, AddRetType), 2620 NEONMAP1(vqshrunh_n_s16, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 2621 NEONMAP1(vqshruns_n_s32, aarch64_neon_sqshrun, VectorRet | Use64BitVectors), 2622 NEONMAP1(vqsubb_s8, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 2623 NEONMAP1(vqsubb_u8, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 2624 NEONMAP1(vqsubd_s64, aarch64_neon_sqsub, Add1ArgType), 2625 NEONMAP1(vqsubd_u64, aarch64_neon_uqsub, Add1ArgType), 2626 NEONMAP1(vqsubh_s16, aarch64_neon_sqsub, Vectorize1ArgType | Use64BitVectors), 2627 NEONMAP1(vqsubh_u16, aarch64_neon_uqsub, Vectorize1ArgType | Use64BitVectors), 2628 NEONMAP1(vqsubs_s32, aarch64_neon_sqsub, Add1ArgType), 2629 NEONMAP1(vqsubs_u32, aarch64_neon_uqsub, Add1ArgType), 2630 NEONMAP1(vrecped_f64, aarch64_neon_frecpe, Add1ArgType), 2631 NEONMAP1(vrecpes_f32, aarch64_neon_frecpe, Add1ArgType), 2632 NEONMAP1(vrecpxd_f64, aarch64_neon_frecpx, Add1ArgType), 2633 NEONMAP1(vrecpxs_f32, aarch64_neon_frecpx, Add1ArgType), 2634 NEONMAP1(vrshld_s64, aarch64_neon_srshl, Add1ArgType), 2635 NEONMAP1(vrshld_u64, aarch64_neon_urshl, Add1ArgType), 2636 NEONMAP1(vrsqrted_f64, aarch64_neon_frsqrte, Add1ArgType), 2637 NEONMAP1(vrsqrtes_f32, aarch64_neon_frsqrte, Add1ArgType), 2638 NEONMAP1(vrsqrtsd_f64, aarch64_neon_frsqrts, Add1ArgType), 2639 NEONMAP1(vrsqrtss_f32, aarch64_neon_frsqrts, Add1ArgType), 2640 NEONMAP1(vsha1cq_u32, aarch64_crypto_sha1c, 0), 2641 NEONMAP1(vsha1h_u32, aarch64_crypto_sha1h, 0), 2642 NEONMAP1(vsha1mq_u32, aarch64_crypto_sha1m, 0), 2643 NEONMAP1(vsha1pq_u32, aarch64_crypto_sha1p, 0), 2644 NEONMAP1(vshld_s64, aarch64_neon_sshl, Add1ArgType), 2645 NEONMAP1(vshld_u64, aarch64_neon_ushl, Add1ArgType), 2646 NEONMAP1(vslid_n_s64, aarch64_neon_vsli, Vectorize1ArgType), 2647 NEONMAP1(vslid_n_u64, aarch64_neon_vsli, Vectorize1ArgType), 2648 NEONMAP1(vsqaddb_u8, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 2649 NEONMAP1(vsqaddd_u64, aarch64_neon_usqadd, Add1ArgType), 2650 NEONMAP1(vsqaddh_u16, aarch64_neon_usqadd, Vectorize1ArgType | Use64BitVectors), 2651 NEONMAP1(vsqadds_u32, aarch64_neon_usqadd, Add1ArgType), 2652 NEONMAP1(vsrid_n_s64, aarch64_neon_vsri, Vectorize1ArgType), 2653 NEONMAP1(vsrid_n_u64, aarch64_neon_vsri, Vectorize1ArgType), 2654 NEONMAP1(vuqaddb_s8, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 2655 NEONMAP1(vuqaddd_s64, aarch64_neon_suqadd, Add1ArgType), 2656 NEONMAP1(vuqaddh_s16, aarch64_neon_suqadd, Vectorize1ArgType | Use64BitVectors), 2657 NEONMAP1(vuqadds_s32, aarch64_neon_suqadd, Add1ArgType), 2658 }; 2659 2660 #undef NEONMAP0 2661 #undef NEONMAP1 2662 #undef NEONMAP2 2663 2664 static bool NEONSIMDIntrinsicsProvenSorted = false; 2665 2666 static bool AArch64SIMDIntrinsicsProvenSorted = false; 2667 static bool AArch64SISDIntrinsicsProvenSorted = false; 2668 2669 2670 static const NeonIntrinsicInfo * 2671 findNeonIntrinsicInMap(ArrayRef<NeonIntrinsicInfo> IntrinsicMap, 2672 unsigned BuiltinID, bool &MapProvenSorted) { 2673 2674 #ifndef NDEBUG 2675 if (!MapProvenSorted) { 2676 // FIXME: use std::is_sorted once C++11 is allowed 2677 for (unsigned i = 0; i < IntrinsicMap.size() - 1; ++i) 2678 assert(IntrinsicMap[i].BuiltinID <= IntrinsicMap[i + 1].BuiltinID); 2679 MapProvenSorted = true; 2680 } 2681 #endif 2682 2683 const NeonIntrinsicInfo *Builtin = 2684 std::lower_bound(IntrinsicMap.begin(), IntrinsicMap.end(), BuiltinID); 2685 2686 if (Builtin != IntrinsicMap.end() && Builtin->BuiltinID == BuiltinID) 2687 return Builtin; 2688 2689 return nullptr; 2690 } 2691 2692 Function *CodeGenFunction::LookupNeonLLVMIntrinsic(unsigned IntrinsicID, 2693 unsigned Modifier, 2694 llvm::Type *ArgType, 2695 const CallExpr *E) { 2696 int VectorSize = 0; 2697 if (Modifier & Use64BitVectors) 2698 VectorSize = 64; 2699 else if (Modifier & Use128BitVectors) 2700 VectorSize = 128; 2701 2702 // Return type. 2703 SmallVector<llvm::Type *, 3> Tys; 2704 if (Modifier & AddRetType) { 2705 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 2706 if (Modifier & VectorizeRetType) 2707 Ty = llvm::VectorType::get( 2708 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); 2709 2710 Tys.push_back(Ty); 2711 } 2712 2713 // Arguments. 2714 if (Modifier & VectorizeArgTypes) { 2715 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; 2716 ArgType = llvm::VectorType::get(ArgType, Elts); 2717 } 2718 2719 if (Modifier & (Add1ArgType | Add2ArgTypes)) 2720 Tys.push_back(ArgType); 2721 2722 if (Modifier & Add2ArgTypes) 2723 Tys.push_back(ArgType); 2724 2725 if (Modifier & InventFloatType) 2726 Tys.push_back(FloatTy); 2727 2728 return CGM.getIntrinsic(IntrinsicID, Tys); 2729 } 2730 2731 static Value *EmitCommonNeonSISDBuiltinExpr(CodeGenFunction &CGF, 2732 const NeonIntrinsicInfo &SISDInfo, 2733 SmallVectorImpl<Value *> &Ops, 2734 const CallExpr *E) { 2735 unsigned BuiltinID = SISDInfo.BuiltinID; 2736 unsigned int Int = SISDInfo.LLVMIntrinsic; 2737 unsigned Modifier = SISDInfo.TypeModifier; 2738 const char *s = SISDInfo.NameHint; 2739 2740 switch (BuiltinID) { 2741 case NEON::BI__builtin_neon_vcled_s64: 2742 case NEON::BI__builtin_neon_vcled_u64: 2743 case NEON::BI__builtin_neon_vcles_f32: 2744 case NEON::BI__builtin_neon_vcled_f64: 2745 case NEON::BI__builtin_neon_vcltd_s64: 2746 case NEON::BI__builtin_neon_vcltd_u64: 2747 case NEON::BI__builtin_neon_vclts_f32: 2748 case NEON::BI__builtin_neon_vcltd_f64: 2749 case NEON::BI__builtin_neon_vcales_f32: 2750 case NEON::BI__builtin_neon_vcaled_f64: 2751 case NEON::BI__builtin_neon_vcalts_f32: 2752 case NEON::BI__builtin_neon_vcaltd_f64: 2753 // Only one direction of comparisons actually exist, cmle is actually a cmge 2754 // with swapped operands. The table gives us the right intrinsic but we 2755 // still need to do the swap. 2756 std::swap(Ops[0], Ops[1]); 2757 break; 2758 } 2759 2760 assert(Int && "Generic code assumes a valid intrinsic"); 2761 2762 // Determine the type(s) of this overloaded AArch64 intrinsic. 2763 const Expr *Arg = E->getArg(0); 2764 llvm::Type *ArgTy = CGF.ConvertType(Arg->getType()); 2765 Function *F = CGF.LookupNeonLLVMIntrinsic(Int, Modifier, ArgTy, E); 2766 2767 int j = 0; 2768 ConstantInt *C0 = ConstantInt::get(CGF.SizeTy, 0); 2769 for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end(); 2770 ai != ae; ++ai, ++j) { 2771 llvm::Type *ArgTy = ai->getType(); 2772 if (Ops[j]->getType()->getPrimitiveSizeInBits() == 2773 ArgTy->getPrimitiveSizeInBits()) 2774 continue; 2775 2776 assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy()); 2777 // The constant argument to an _n_ intrinsic always has Int32Ty, so truncate 2778 // it before inserting. 2779 Ops[j] = 2780 CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType()); 2781 Ops[j] = 2782 CGF.Builder.CreateInsertElement(UndefValue::get(ArgTy), Ops[j], C0); 2783 } 2784 2785 Value *Result = CGF.EmitNeonCall(F, Ops, s); 2786 llvm::Type *ResultType = CGF.ConvertType(E->getType()); 2787 if (ResultType->getPrimitiveSizeInBits() < 2788 Result->getType()->getPrimitiveSizeInBits()) 2789 return CGF.Builder.CreateExtractElement(Result, C0); 2790 2791 return CGF.Builder.CreateBitCast(Result, ResultType, s); 2792 } 2793 2794 Value *CodeGenFunction::EmitCommonNeonBuiltinExpr( 2795 unsigned BuiltinID, unsigned LLVMIntrinsic, unsigned AltLLVMIntrinsic, 2796 const char *NameHint, unsigned Modifier, const CallExpr *E, 2797 SmallVectorImpl<llvm::Value *> &Ops, Address PtrOp0, Address PtrOp1) { 2798 // Get the last argument, which specifies the vector type. 2799 llvm::APSInt NeonTypeConst; 2800 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 2801 if (!Arg->isIntegerConstantExpr(NeonTypeConst, getContext())) 2802 return nullptr; 2803 2804 // Determine the type of this overloaded NEON intrinsic. 2805 NeonTypeFlags Type(NeonTypeConst.getZExtValue()); 2806 bool Usgn = Type.isUnsigned(); 2807 bool Quad = Type.isQuad(); 2808 2809 llvm::VectorType *VTy = GetNeonType(this, Type); 2810 llvm::Type *Ty = VTy; 2811 if (!Ty) 2812 return nullptr; 2813 2814 auto getAlignmentValue32 = [&](Address addr) -> Value* { 2815 return Builder.getInt32(addr.getAlignment().getQuantity()); 2816 }; 2817 2818 unsigned Int = LLVMIntrinsic; 2819 if ((Modifier & UnsignedAlts) && !Usgn) 2820 Int = AltLLVMIntrinsic; 2821 2822 switch (BuiltinID) { 2823 default: break; 2824 case NEON::BI__builtin_neon_vabs_v: 2825 case NEON::BI__builtin_neon_vabsq_v: 2826 if (VTy->getElementType()->isFloatingPointTy()) 2827 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, Ty), Ops, "vabs"); 2828 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), Ops, "vabs"); 2829 case NEON::BI__builtin_neon_vaddhn_v: { 2830 llvm::VectorType *SrcTy = 2831 llvm::VectorType::getExtendedElementVectorType(VTy); 2832 2833 // %sum = add <4 x i32> %lhs, %rhs 2834 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 2835 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 2836 Ops[0] = Builder.CreateAdd(Ops[0], Ops[1], "vaddhn"); 2837 2838 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 2839 Constant *ShiftAmt = 2840 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 2841 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vaddhn"); 2842 2843 // %res = trunc <4 x i32> %high to <4 x i16> 2844 return Builder.CreateTrunc(Ops[0], VTy, "vaddhn"); 2845 } 2846 case NEON::BI__builtin_neon_vcale_v: 2847 case NEON::BI__builtin_neon_vcaleq_v: 2848 case NEON::BI__builtin_neon_vcalt_v: 2849 case NEON::BI__builtin_neon_vcaltq_v: 2850 std::swap(Ops[0], Ops[1]); 2851 case NEON::BI__builtin_neon_vcage_v: 2852 case NEON::BI__builtin_neon_vcageq_v: 2853 case NEON::BI__builtin_neon_vcagt_v: 2854 case NEON::BI__builtin_neon_vcagtq_v: { 2855 llvm::Type *VecFlt = llvm::VectorType::get( 2856 VTy->getScalarSizeInBits() == 32 ? FloatTy : DoubleTy, 2857 VTy->getNumElements()); 2858 llvm::Type *Tys[] = { VTy, VecFlt }; 2859 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 2860 return EmitNeonCall(F, Ops, NameHint); 2861 } 2862 case NEON::BI__builtin_neon_vclz_v: 2863 case NEON::BI__builtin_neon_vclzq_v: 2864 // We generate target-independent intrinsic, which needs a second argument 2865 // for whether or not clz of zero is undefined; on ARM it isn't. 2866 Ops.push_back(Builder.getInt1(getTarget().isCLZForZeroUndef())); 2867 break; 2868 case NEON::BI__builtin_neon_vcvt_f32_v: 2869 case NEON::BI__builtin_neon_vcvtq_f32_v: 2870 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2871 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float32, false, Quad)); 2872 return Usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 2873 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 2874 case NEON::BI__builtin_neon_vcvt_n_f32_v: 2875 case NEON::BI__builtin_neon_vcvt_n_f64_v: 2876 case NEON::BI__builtin_neon_vcvtq_n_f32_v: 2877 case NEON::BI__builtin_neon_vcvtq_n_f64_v: { 2878 llvm::Type *Tys[2] = { GetFloatNeonType(this, Type), Ty }; 2879 Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic; 2880 Function *F = CGM.getIntrinsic(Int, Tys); 2881 return EmitNeonCall(F, Ops, "vcvt_n"); 2882 } 2883 case NEON::BI__builtin_neon_vcvt_n_s32_v: 2884 case NEON::BI__builtin_neon_vcvt_n_u32_v: 2885 case NEON::BI__builtin_neon_vcvt_n_s64_v: 2886 case NEON::BI__builtin_neon_vcvt_n_u64_v: 2887 case NEON::BI__builtin_neon_vcvtq_n_s32_v: 2888 case NEON::BI__builtin_neon_vcvtq_n_u32_v: 2889 case NEON::BI__builtin_neon_vcvtq_n_s64_v: 2890 case NEON::BI__builtin_neon_vcvtq_n_u64_v: { 2891 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 2892 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 2893 return EmitNeonCall(F, Ops, "vcvt_n"); 2894 } 2895 case NEON::BI__builtin_neon_vcvt_s32_v: 2896 case NEON::BI__builtin_neon_vcvt_u32_v: 2897 case NEON::BI__builtin_neon_vcvt_s64_v: 2898 case NEON::BI__builtin_neon_vcvt_u64_v: 2899 case NEON::BI__builtin_neon_vcvtq_s32_v: 2900 case NEON::BI__builtin_neon_vcvtq_u32_v: 2901 case NEON::BI__builtin_neon_vcvtq_s64_v: 2902 case NEON::BI__builtin_neon_vcvtq_u64_v: { 2903 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 2904 return Usgn ? Builder.CreateFPToUI(Ops[0], Ty, "vcvt") 2905 : Builder.CreateFPToSI(Ops[0], Ty, "vcvt"); 2906 } 2907 case NEON::BI__builtin_neon_vcvta_s32_v: 2908 case NEON::BI__builtin_neon_vcvta_s64_v: 2909 case NEON::BI__builtin_neon_vcvta_u32_v: 2910 case NEON::BI__builtin_neon_vcvta_u64_v: 2911 case NEON::BI__builtin_neon_vcvtaq_s32_v: 2912 case NEON::BI__builtin_neon_vcvtaq_s64_v: 2913 case NEON::BI__builtin_neon_vcvtaq_u32_v: 2914 case NEON::BI__builtin_neon_vcvtaq_u64_v: 2915 case NEON::BI__builtin_neon_vcvtn_s32_v: 2916 case NEON::BI__builtin_neon_vcvtn_s64_v: 2917 case NEON::BI__builtin_neon_vcvtn_u32_v: 2918 case NEON::BI__builtin_neon_vcvtn_u64_v: 2919 case NEON::BI__builtin_neon_vcvtnq_s32_v: 2920 case NEON::BI__builtin_neon_vcvtnq_s64_v: 2921 case NEON::BI__builtin_neon_vcvtnq_u32_v: 2922 case NEON::BI__builtin_neon_vcvtnq_u64_v: 2923 case NEON::BI__builtin_neon_vcvtp_s32_v: 2924 case NEON::BI__builtin_neon_vcvtp_s64_v: 2925 case NEON::BI__builtin_neon_vcvtp_u32_v: 2926 case NEON::BI__builtin_neon_vcvtp_u64_v: 2927 case NEON::BI__builtin_neon_vcvtpq_s32_v: 2928 case NEON::BI__builtin_neon_vcvtpq_s64_v: 2929 case NEON::BI__builtin_neon_vcvtpq_u32_v: 2930 case NEON::BI__builtin_neon_vcvtpq_u64_v: 2931 case NEON::BI__builtin_neon_vcvtm_s32_v: 2932 case NEON::BI__builtin_neon_vcvtm_s64_v: 2933 case NEON::BI__builtin_neon_vcvtm_u32_v: 2934 case NEON::BI__builtin_neon_vcvtm_u64_v: 2935 case NEON::BI__builtin_neon_vcvtmq_s32_v: 2936 case NEON::BI__builtin_neon_vcvtmq_s64_v: 2937 case NEON::BI__builtin_neon_vcvtmq_u32_v: 2938 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 2939 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 2940 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, NameHint); 2941 } 2942 case NEON::BI__builtin_neon_vext_v: 2943 case NEON::BI__builtin_neon_vextq_v: { 2944 int CV = cast<ConstantInt>(Ops[2])->getSExtValue(); 2945 SmallVector<Constant*, 16> Indices; 2946 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 2947 Indices.push_back(ConstantInt::get(Int32Ty, i+CV)); 2948 2949 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2950 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 2951 Value *SV = llvm::ConstantVector::get(Indices); 2952 return Builder.CreateShuffleVector(Ops[0], Ops[1], SV, "vext"); 2953 } 2954 case NEON::BI__builtin_neon_vfma_v: 2955 case NEON::BI__builtin_neon_vfmaq_v: { 2956 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 2957 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2958 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 2959 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 2960 2961 // NEON intrinsic puts accumulator first, unlike the LLVM fma. 2962 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 2963 } 2964 case NEON::BI__builtin_neon_vld1_v: 2965 case NEON::BI__builtin_neon_vld1q_v: { 2966 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 2967 Ops.push_back(getAlignmentValue32(PtrOp0)); 2968 return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, "vld1"); 2969 } 2970 case NEON::BI__builtin_neon_vld2_v: 2971 case NEON::BI__builtin_neon_vld2q_v: 2972 case NEON::BI__builtin_neon_vld3_v: 2973 case NEON::BI__builtin_neon_vld3q_v: 2974 case NEON::BI__builtin_neon_vld4_v: 2975 case NEON::BI__builtin_neon_vld4q_v: { 2976 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 2977 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 2978 Value *Align = getAlignmentValue32(PtrOp1); 2979 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint); 2980 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 2981 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 2982 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 2983 } 2984 case NEON::BI__builtin_neon_vld1_dup_v: 2985 case NEON::BI__builtin_neon_vld1q_dup_v: { 2986 Value *V = UndefValue::get(Ty); 2987 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 2988 PtrOp0 = Builder.CreateBitCast(PtrOp0, Ty); 2989 LoadInst *Ld = Builder.CreateLoad(PtrOp0); 2990 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 2991 Ops[0] = Builder.CreateInsertElement(V, Ld, CI); 2992 return EmitNeonSplat(Ops[0], CI); 2993 } 2994 case NEON::BI__builtin_neon_vld2_lane_v: 2995 case NEON::BI__builtin_neon_vld2q_lane_v: 2996 case NEON::BI__builtin_neon_vld3_lane_v: 2997 case NEON::BI__builtin_neon_vld3q_lane_v: 2998 case NEON::BI__builtin_neon_vld4_lane_v: 2999 case NEON::BI__builtin_neon_vld4q_lane_v: { 3000 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3001 Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); 3002 for (unsigned I = 2; I < Ops.size() - 1; ++I) 3003 Ops[I] = Builder.CreateBitCast(Ops[I], Ty); 3004 Ops.push_back(getAlignmentValue32(PtrOp1)); 3005 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), NameHint); 3006 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3007 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3008 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3009 } 3010 case NEON::BI__builtin_neon_vmovl_v: { 3011 llvm::Type *DTy =llvm::VectorType::getTruncatedElementVectorType(VTy); 3012 Ops[0] = Builder.CreateBitCast(Ops[0], DTy); 3013 if (Usgn) 3014 return Builder.CreateZExt(Ops[0], Ty, "vmovl"); 3015 return Builder.CreateSExt(Ops[0], Ty, "vmovl"); 3016 } 3017 case NEON::BI__builtin_neon_vmovn_v: { 3018 llvm::Type *QTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3019 Ops[0] = Builder.CreateBitCast(Ops[0], QTy); 3020 return Builder.CreateTrunc(Ops[0], Ty, "vmovn"); 3021 } 3022 case NEON::BI__builtin_neon_vmull_v: 3023 // FIXME: the integer vmull operations could be emitted in terms of pure 3024 // LLVM IR (2 exts followed by a mul). Unfortunately LLVM has a habit of 3025 // hoisting the exts outside loops. Until global ISel comes along that can 3026 // see through such movement this leads to bad CodeGen. So we need an 3027 // intrinsic for now. 3028 Int = Usgn ? Intrinsic::arm_neon_vmullu : Intrinsic::arm_neon_vmulls; 3029 Int = Type.isPoly() ? (unsigned)Intrinsic::arm_neon_vmullp : Int; 3030 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 3031 case NEON::BI__builtin_neon_vpadal_v: 3032 case NEON::BI__builtin_neon_vpadalq_v: { 3033 // The source operand type has twice as many elements of half the size. 3034 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3035 llvm::Type *EltTy = 3036 llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3037 llvm::Type *NarrowTy = 3038 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3039 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3040 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, NameHint); 3041 } 3042 case NEON::BI__builtin_neon_vpaddl_v: 3043 case NEON::BI__builtin_neon_vpaddlq_v: { 3044 // The source operand type has twice as many elements of half the size. 3045 unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits(); 3046 llvm::Type *EltTy = llvm::IntegerType::get(getLLVMContext(), EltBits / 2); 3047 llvm::Type *NarrowTy = 3048 llvm::VectorType::get(EltTy, VTy->getNumElements() * 2); 3049 llvm::Type *Tys[2] = { Ty, NarrowTy }; 3050 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vpaddl"); 3051 } 3052 case NEON::BI__builtin_neon_vqdmlal_v: 3053 case NEON::BI__builtin_neon_vqdmlsl_v: { 3054 SmallVector<Value *, 2> MulOps(Ops.begin() + 1, Ops.end()); 3055 Ops[1] = 3056 EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), MulOps, "vqdmlal"); 3057 Ops.resize(2); 3058 return EmitNeonCall(CGM.getIntrinsic(AltLLVMIntrinsic, Ty), Ops, NameHint); 3059 } 3060 case NEON::BI__builtin_neon_vqshl_n_v: 3061 case NEON::BI__builtin_neon_vqshlq_n_v: 3062 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshl_n", 3063 1, false); 3064 case NEON::BI__builtin_neon_vqshlu_n_v: 3065 case NEON::BI__builtin_neon_vqshluq_n_v: 3066 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshlu_n", 3067 1, false); 3068 case NEON::BI__builtin_neon_vrecpe_v: 3069 case NEON::BI__builtin_neon_vrecpeq_v: 3070 case NEON::BI__builtin_neon_vrsqrte_v: 3071 case NEON::BI__builtin_neon_vrsqrteq_v: 3072 Int = Ty->isFPOrFPVectorTy() ? LLVMIntrinsic : AltLLVMIntrinsic; 3073 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, NameHint); 3074 3075 case NEON::BI__builtin_neon_vrshr_n_v: 3076 case NEON::BI__builtin_neon_vrshrq_n_v: 3077 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshr_n", 3078 1, true); 3079 case NEON::BI__builtin_neon_vshl_n_v: 3080 case NEON::BI__builtin_neon_vshlq_n_v: 3081 Ops[1] = EmitNeonShiftVector(Ops[1], Ty, false); 3082 return Builder.CreateShl(Builder.CreateBitCast(Ops[0],Ty), Ops[1], 3083 "vshl_n"); 3084 case NEON::BI__builtin_neon_vshll_n_v: { 3085 llvm::Type *SrcTy = llvm::VectorType::getTruncatedElementVectorType(VTy); 3086 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3087 if (Usgn) 3088 Ops[0] = Builder.CreateZExt(Ops[0], VTy); 3089 else 3090 Ops[0] = Builder.CreateSExt(Ops[0], VTy); 3091 Ops[1] = EmitNeonShiftVector(Ops[1], VTy, false); 3092 return Builder.CreateShl(Ops[0], Ops[1], "vshll_n"); 3093 } 3094 case NEON::BI__builtin_neon_vshrn_n_v: { 3095 llvm::Type *SrcTy = llvm::VectorType::getExtendedElementVectorType(VTy); 3096 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3097 Ops[1] = EmitNeonShiftVector(Ops[1], SrcTy, false); 3098 if (Usgn) 3099 Ops[0] = Builder.CreateLShr(Ops[0], Ops[1]); 3100 else 3101 Ops[0] = Builder.CreateAShr(Ops[0], Ops[1]); 3102 return Builder.CreateTrunc(Ops[0], Ty, "vshrn_n"); 3103 } 3104 case NEON::BI__builtin_neon_vshr_n_v: 3105 case NEON::BI__builtin_neon_vshrq_n_v: 3106 return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, Usgn, "vshr_n"); 3107 case NEON::BI__builtin_neon_vst1_v: 3108 case NEON::BI__builtin_neon_vst1q_v: 3109 case NEON::BI__builtin_neon_vst2_v: 3110 case NEON::BI__builtin_neon_vst2q_v: 3111 case NEON::BI__builtin_neon_vst3_v: 3112 case NEON::BI__builtin_neon_vst3q_v: 3113 case NEON::BI__builtin_neon_vst4_v: 3114 case NEON::BI__builtin_neon_vst4q_v: 3115 case NEON::BI__builtin_neon_vst2_lane_v: 3116 case NEON::BI__builtin_neon_vst2q_lane_v: 3117 case NEON::BI__builtin_neon_vst3_lane_v: 3118 case NEON::BI__builtin_neon_vst3q_lane_v: 3119 case NEON::BI__builtin_neon_vst4_lane_v: 3120 case NEON::BI__builtin_neon_vst4q_lane_v: { 3121 llvm::Type *Tys[] = {Int8PtrTy, Ty}; 3122 Ops.push_back(getAlignmentValue32(PtrOp0)); 3123 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 3124 } 3125 case NEON::BI__builtin_neon_vsubhn_v: { 3126 llvm::VectorType *SrcTy = 3127 llvm::VectorType::getExtendedElementVectorType(VTy); 3128 3129 // %sum = add <4 x i32> %lhs, %rhs 3130 Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy); 3131 Ops[1] = Builder.CreateBitCast(Ops[1], SrcTy); 3132 Ops[0] = Builder.CreateSub(Ops[0], Ops[1], "vsubhn"); 3133 3134 // %high = lshr <4 x i32> %sum, <i32 16, i32 16, i32 16, i32 16> 3135 Constant *ShiftAmt = 3136 ConstantInt::get(SrcTy, SrcTy->getScalarSizeInBits() / 2); 3137 Ops[0] = Builder.CreateLShr(Ops[0], ShiftAmt, "vsubhn"); 3138 3139 // %res = trunc <4 x i32> %high to <4 x i16> 3140 return Builder.CreateTrunc(Ops[0], VTy, "vsubhn"); 3141 } 3142 case NEON::BI__builtin_neon_vtrn_v: 3143 case NEON::BI__builtin_neon_vtrnq_v: { 3144 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3145 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3146 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3147 Value *SV = nullptr; 3148 3149 for (unsigned vi = 0; vi != 2; ++vi) { 3150 SmallVector<Constant*, 16> Indices; 3151 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 3152 Indices.push_back(Builder.getInt32(i+vi)); 3153 Indices.push_back(Builder.getInt32(i+e+vi)); 3154 } 3155 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3156 SV = llvm::ConstantVector::get(Indices); 3157 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vtrn"); 3158 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3159 } 3160 return SV; 3161 } 3162 case NEON::BI__builtin_neon_vtst_v: 3163 case NEON::BI__builtin_neon_vtstq_v: { 3164 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3165 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3166 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 3167 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 3168 ConstantAggregateZero::get(Ty)); 3169 return Builder.CreateSExt(Ops[0], Ty, "vtst"); 3170 } 3171 case NEON::BI__builtin_neon_vuzp_v: 3172 case NEON::BI__builtin_neon_vuzpq_v: { 3173 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3174 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3175 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3176 Value *SV = nullptr; 3177 3178 for (unsigned vi = 0; vi != 2; ++vi) { 3179 SmallVector<Constant*, 16> Indices; 3180 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 3181 Indices.push_back(ConstantInt::get(Int32Ty, 2*i+vi)); 3182 3183 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3184 SV = llvm::ConstantVector::get(Indices); 3185 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vuzp"); 3186 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3187 } 3188 return SV; 3189 } 3190 case NEON::BI__builtin_neon_vzip_v: 3191 case NEON::BI__builtin_neon_vzipq_v: { 3192 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 3193 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3194 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 3195 Value *SV = nullptr; 3196 3197 for (unsigned vi = 0; vi != 2; ++vi) { 3198 SmallVector<Constant*, 16> Indices; 3199 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 3200 Indices.push_back(ConstantInt::get(Int32Ty, (i + vi*e) >> 1)); 3201 Indices.push_back(ConstantInt::get(Int32Ty, ((i + vi*e) >> 1)+e)); 3202 } 3203 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 3204 SV = llvm::ConstantVector::get(Indices); 3205 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vzip"); 3206 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 3207 } 3208 return SV; 3209 } 3210 } 3211 3212 assert(Int && "Expected valid intrinsic number"); 3213 3214 // Determine the type(s) of this overloaded AArch64 intrinsic. 3215 Function *F = LookupNeonLLVMIntrinsic(Int, Modifier, Ty, E); 3216 3217 Value *Result = EmitNeonCall(F, Ops, NameHint); 3218 llvm::Type *ResultType = ConvertType(E->getType()); 3219 // AArch64 intrinsic one-element vector type cast to 3220 // scalar type expected by the builtin 3221 return Builder.CreateBitCast(Result, ResultType, NameHint); 3222 } 3223 3224 Value *CodeGenFunction::EmitAArch64CompareBuiltinExpr( 3225 Value *Op, llvm::Type *Ty, const CmpInst::Predicate Fp, 3226 const CmpInst::Predicate Ip, const Twine &Name) { 3227 llvm::Type *OTy = Op->getType(); 3228 3229 // FIXME: this is utterly horrific. We should not be looking at previous 3230 // codegen context to find out what needs doing. Unfortunately TableGen 3231 // currently gives us exactly the same calls for vceqz_f32 and vceqz_s32 3232 // (etc). 3233 if (BitCastInst *BI = dyn_cast<BitCastInst>(Op)) 3234 OTy = BI->getOperand(0)->getType(); 3235 3236 Op = Builder.CreateBitCast(Op, OTy); 3237 if (OTy->getScalarType()->isFloatingPointTy()) { 3238 Op = Builder.CreateFCmp(Fp, Op, Constant::getNullValue(OTy)); 3239 } else { 3240 Op = Builder.CreateICmp(Ip, Op, Constant::getNullValue(OTy)); 3241 } 3242 return Builder.CreateSExt(Op, Ty, Name); 3243 } 3244 3245 static Value *packTBLDVectorList(CodeGenFunction &CGF, ArrayRef<Value *> Ops, 3246 Value *ExtOp, Value *IndexOp, 3247 llvm::Type *ResTy, unsigned IntID, 3248 const char *Name) { 3249 SmallVector<Value *, 2> TblOps; 3250 if (ExtOp) 3251 TblOps.push_back(ExtOp); 3252 3253 // Build a vector containing sequential number like (0, 1, 2, ..., 15) 3254 SmallVector<Constant*, 16> Indices; 3255 llvm::VectorType *TblTy = cast<llvm::VectorType>(Ops[0]->getType()); 3256 for (unsigned i = 0, e = TblTy->getNumElements(); i != e; ++i) { 3257 Indices.push_back(ConstantInt::get(CGF.Int32Ty, 2*i)); 3258 Indices.push_back(ConstantInt::get(CGF.Int32Ty, 2*i+1)); 3259 } 3260 Value *SV = llvm::ConstantVector::get(Indices); 3261 3262 int PairPos = 0, End = Ops.size() - 1; 3263 while (PairPos < End) { 3264 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 3265 Ops[PairPos+1], SV, Name)); 3266 PairPos += 2; 3267 } 3268 3269 // If there's an odd number of 64-bit lookup table, fill the high 64-bit 3270 // of the 128-bit lookup table with zero. 3271 if (PairPos == End) { 3272 Value *ZeroTbl = ConstantAggregateZero::get(TblTy); 3273 TblOps.push_back(CGF.Builder.CreateShuffleVector(Ops[PairPos], 3274 ZeroTbl, SV, Name)); 3275 } 3276 3277 Function *TblF; 3278 TblOps.push_back(IndexOp); 3279 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); 3280 3281 return CGF.EmitNeonCall(TblF, TblOps, Name); 3282 } 3283 3284 Value *CodeGenFunction::GetValueForARMHint(unsigned BuiltinID) { 3285 unsigned Value; 3286 switch (BuiltinID) { 3287 default: 3288 return nullptr; 3289 case ARM::BI__builtin_arm_nop: 3290 Value = 0; 3291 break; 3292 case ARM::BI__builtin_arm_yield: 3293 case ARM::BI__yield: 3294 Value = 1; 3295 break; 3296 case ARM::BI__builtin_arm_wfe: 3297 case ARM::BI__wfe: 3298 Value = 2; 3299 break; 3300 case ARM::BI__builtin_arm_wfi: 3301 case ARM::BI__wfi: 3302 Value = 3; 3303 break; 3304 case ARM::BI__builtin_arm_sev: 3305 case ARM::BI__sev: 3306 Value = 4; 3307 break; 3308 case ARM::BI__builtin_arm_sevl: 3309 case ARM::BI__sevl: 3310 Value = 5; 3311 break; 3312 } 3313 3314 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_hint), 3315 llvm::ConstantInt::get(Int32Ty, Value)); 3316 } 3317 3318 // Generates the IR for the read/write special register builtin, 3319 // ValueType is the type of the value that is to be written or read, 3320 // RegisterType is the type of the register being written to or read from. 3321 static Value *EmitSpecialRegisterBuiltin(CodeGenFunction &CGF, 3322 const CallExpr *E, 3323 llvm::Type *RegisterType, 3324 llvm::Type *ValueType, bool IsRead) { 3325 // write and register intrinsics only support 32 and 64 bit operations. 3326 assert((RegisterType->isIntegerTy(32) || RegisterType->isIntegerTy(64)) 3327 && "Unsupported size for register."); 3328 3329 CodeGen::CGBuilderTy &Builder = CGF.Builder; 3330 CodeGen::CodeGenModule &CGM = CGF.CGM; 3331 LLVMContext &Context = CGM.getLLVMContext(); 3332 3333 const Expr *SysRegStrExpr = E->getArg(0)->IgnoreParenCasts(); 3334 StringRef SysReg = cast<StringLiteral>(SysRegStrExpr)->getString(); 3335 3336 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysReg) }; 3337 llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops); 3338 llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName); 3339 3340 llvm::Type *Types[] = { RegisterType }; 3341 3342 bool MixedTypes = RegisterType->isIntegerTy(64) && ValueType->isIntegerTy(32); 3343 assert(!(RegisterType->isIntegerTy(32) && ValueType->isIntegerTy(64)) 3344 && "Can't fit 64-bit value in 32-bit register"); 3345 3346 if (IsRead) { 3347 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::read_register, Types); 3348 llvm::Value *Call = Builder.CreateCall(F, Metadata); 3349 3350 if (MixedTypes) 3351 // Read into 64 bit register and then truncate result to 32 bit. 3352 return Builder.CreateTrunc(Call, ValueType); 3353 3354 if (ValueType->isPointerTy()) 3355 // Have i32/i64 result (Call) but want to return a VoidPtrTy (i8*). 3356 return Builder.CreateIntToPtr(Call, ValueType); 3357 3358 return Call; 3359 } 3360 3361 llvm::Value *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types); 3362 llvm::Value *ArgValue = CGF.EmitScalarExpr(E->getArg(1)); 3363 if (MixedTypes) { 3364 // Extend 32 bit write value to 64 bit to pass to write. 3365 ArgValue = Builder.CreateZExt(ArgValue, RegisterType); 3366 return Builder.CreateCall(F, { Metadata, ArgValue }); 3367 } 3368 3369 if (ValueType->isPointerTy()) { 3370 // Have VoidPtrTy ArgValue but want to return an i32/i64. 3371 ArgValue = Builder.CreatePtrToInt(ArgValue, RegisterType); 3372 return Builder.CreateCall(F, { Metadata, ArgValue }); 3373 } 3374 3375 return Builder.CreateCall(F, { Metadata, ArgValue }); 3376 } 3377 3378 /// Return true if BuiltinID is an overloaded Neon intrinsic with an extra 3379 /// argument that specifies the vector type. 3380 static bool HasExtraNeonArgument(unsigned BuiltinID) { 3381 switch (BuiltinID) { 3382 default: break; 3383 case NEON::BI__builtin_neon_vget_lane_i8: 3384 case NEON::BI__builtin_neon_vget_lane_i16: 3385 case NEON::BI__builtin_neon_vget_lane_i32: 3386 case NEON::BI__builtin_neon_vget_lane_i64: 3387 case NEON::BI__builtin_neon_vget_lane_f32: 3388 case NEON::BI__builtin_neon_vgetq_lane_i8: 3389 case NEON::BI__builtin_neon_vgetq_lane_i16: 3390 case NEON::BI__builtin_neon_vgetq_lane_i32: 3391 case NEON::BI__builtin_neon_vgetq_lane_i64: 3392 case NEON::BI__builtin_neon_vgetq_lane_f32: 3393 case NEON::BI__builtin_neon_vset_lane_i8: 3394 case NEON::BI__builtin_neon_vset_lane_i16: 3395 case NEON::BI__builtin_neon_vset_lane_i32: 3396 case NEON::BI__builtin_neon_vset_lane_i64: 3397 case NEON::BI__builtin_neon_vset_lane_f32: 3398 case NEON::BI__builtin_neon_vsetq_lane_i8: 3399 case NEON::BI__builtin_neon_vsetq_lane_i16: 3400 case NEON::BI__builtin_neon_vsetq_lane_i32: 3401 case NEON::BI__builtin_neon_vsetq_lane_i64: 3402 case NEON::BI__builtin_neon_vsetq_lane_f32: 3403 case NEON::BI__builtin_neon_vsha1h_u32: 3404 case NEON::BI__builtin_neon_vsha1cq_u32: 3405 case NEON::BI__builtin_neon_vsha1pq_u32: 3406 case NEON::BI__builtin_neon_vsha1mq_u32: 3407 case ARM::BI_MoveToCoprocessor: 3408 case ARM::BI_MoveToCoprocessor2: 3409 return false; 3410 } 3411 return true; 3412 } 3413 3414 Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, 3415 const CallExpr *E) { 3416 if (auto Hint = GetValueForARMHint(BuiltinID)) 3417 return Hint; 3418 3419 if (BuiltinID == ARM::BI__emit) { 3420 bool IsThumb = getTarget().getTriple().getArch() == llvm::Triple::thumb; 3421 llvm::FunctionType *FTy = 3422 llvm::FunctionType::get(VoidTy, /*Variadic=*/false); 3423 3424 APSInt Value; 3425 if (!E->getArg(0)->EvaluateAsInt(Value, CGM.getContext())) 3426 llvm_unreachable("Sema will ensure that the parameter is constant"); 3427 3428 uint64_t ZExtValue = Value.zextOrTrunc(IsThumb ? 16 : 32).getZExtValue(); 3429 3430 llvm::InlineAsm *Emit = 3431 IsThumb ? InlineAsm::get(FTy, ".inst.n 0x" + utohexstr(ZExtValue), "", 3432 /*SideEffects=*/true) 3433 : InlineAsm::get(FTy, ".inst 0x" + utohexstr(ZExtValue), "", 3434 /*SideEffects=*/true); 3435 3436 return Builder.CreateCall(Emit); 3437 } 3438 3439 if (BuiltinID == ARM::BI__builtin_arm_dbg) { 3440 Value *Option = EmitScalarExpr(E->getArg(0)); 3441 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_dbg), Option); 3442 } 3443 3444 if (BuiltinID == ARM::BI__builtin_arm_prefetch) { 3445 Value *Address = EmitScalarExpr(E->getArg(0)); 3446 Value *RW = EmitScalarExpr(E->getArg(1)); 3447 Value *IsData = EmitScalarExpr(E->getArg(2)); 3448 3449 // Locality is not supported on ARM target 3450 Value *Locality = llvm::ConstantInt::get(Int32Ty, 3); 3451 3452 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 3453 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 3454 } 3455 3456 if (BuiltinID == ARM::BI__builtin_arm_rbit) { 3457 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_rbit), 3458 EmitScalarExpr(E->getArg(0)), 3459 "rbit"); 3460 } 3461 3462 if (BuiltinID == ARM::BI__clear_cache) { 3463 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 3464 const FunctionDecl *FD = E->getDirectCallee(); 3465 Value *Ops[2]; 3466 for (unsigned i = 0; i < 2; i++) 3467 Ops[i] = EmitScalarExpr(E->getArg(i)); 3468 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 3469 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 3470 StringRef Name = FD->getName(); 3471 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 3472 } 3473 3474 if (BuiltinID == ARM::BI__builtin_arm_ldrexd || 3475 ((BuiltinID == ARM::BI__builtin_arm_ldrex || 3476 BuiltinID == ARM::BI__builtin_arm_ldaex) && 3477 getContext().getTypeSize(E->getType()) == 64) || 3478 BuiltinID == ARM::BI__ldrexd) { 3479 Function *F; 3480 3481 switch (BuiltinID) { 3482 default: llvm_unreachable("unexpected builtin"); 3483 case ARM::BI__builtin_arm_ldaex: 3484 F = CGM.getIntrinsic(Intrinsic::arm_ldaexd); 3485 break; 3486 case ARM::BI__builtin_arm_ldrexd: 3487 case ARM::BI__builtin_arm_ldrex: 3488 case ARM::BI__ldrexd: 3489 F = CGM.getIntrinsic(Intrinsic::arm_ldrexd); 3490 break; 3491 } 3492 3493 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 3494 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 3495 "ldrexd"); 3496 3497 Value *Val0 = Builder.CreateExtractValue(Val, 1); 3498 Value *Val1 = Builder.CreateExtractValue(Val, 0); 3499 Val0 = Builder.CreateZExt(Val0, Int64Ty); 3500 Val1 = Builder.CreateZExt(Val1, Int64Ty); 3501 3502 Value *ShiftCst = llvm::ConstantInt::get(Int64Ty, 32); 3503 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 3504 Val = Builder.CreateOr(Val, Val1); 3505 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 3506 } 3507 3508 if (BuiltinID == ARM::BI__builtin_arm_ldrex || 3509 BuiltinID == ARM::BI__builtin_arm_ldaex) { 3510 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 3511 3512 QualType Ty = E->getType(); 3513 llvm::Type *RealResTy = ConvertType(Ty); 3514 llvm::Type *IntResTy = llvm::IntegerType::get(getLLVMContext(), 3515 getContext().getTypeSize(Ty)); 3516 LoadAddr = Builder.CreateBitCast(LoadAddr, IntResTy->getPointerTo()); 3517 3518 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_ldaex 3519 ? Intrinsic::arm_ldaex 3520 : Intrinsic::arm_ldrex, 3521 LoadAddr->getType()); 3522 Value *Val = Builder.CreateCall(F, LoadAddr, "ldrex"); 3523 3524 if (RealResTy->isPointerTy()) 3525 return Builder.CreateIntToPtr(Val, RealResTy); 3526 else { 3527 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 3528 return Builder.CreateBitCast(Val, RealResTy); 3529 } 3530 } 3531 3532 if (BuiltinID == ARM::BI__builtin_arm_strexd || 3533 ((BuiltinID == ARM::BI__builtin_arm_stlex || 3534 BuiltinID == ARM::BI__builtin_arm_strex) && 3535 getContext().getTypeSize(E->getArg(0)->getType()) == 64)) { 3536 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 3537 ? Intrinsic::arm_stlexd 3538 : Intrinsic::arm_strexd); 3539 llvm::Type *STy = llvm::StructType::get(Int32Ty, Int32Ty, nullptr); 3540 3541 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 3542 Value *Val = EmitScalarExpr(E->getArg(0)); 3543 Builder.CreateStore(Val, Tmp); 3544 3545 Address LdPtr = Builder.CreateBitCast(Tmp,llvm::PointerType::getUnqual(STy)); 3546 Val = Builder.CreateLoad(LdPtr); 3547 3548 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 3549 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 3550 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), Int8PtrTy); 3551 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "strexd"); 3552 } 3553 3554 if (BuiltinID == ARM::BI__builtin_arm_strex || 3555 BuiltinID == ARM::BI__builtin_arm_stlex) { 3556 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 3557 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 3558 3559 QualType Ty = E->getArg(0)->getType(); 3560 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 3561 getContext().getTypeSize(Ty)); 3562 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 3563 3564 if (StoreVal->getType()->isPointerTy()) 3565 StoreVal = Builder.CreatePtrToInt(StoreVal, Int32Ty); 3566 else { 3567 StoreVal = Builder.CreateBitCast(StoreVal, StoreTy); 3568 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int32Ty); 3569 } 3570 3571 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI__builtin_arm_stlex 3572 ? Intrinsic::arm_stlex 3573 : Intrinsic::arm_strex, 3574 StoreAddr->getType()); 3575 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "strex"); 3576 } 3577 3578 if (BuiltinID == ARM::BI__builtin_arm_clrex) { 3579 Function *F = CGM.getIntrinsic(Intrinsic::arm_clrex); 3580 return Builder.CreateCall(F); 3581 } 3582 3583 // CRC32 3584 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 3585 switch (BuiltinID) { 3586 case ARM::BI__builtin_arm_crc32b: 3587 CRCIntrinsicID = Intrinsic::arm_crc32b; break; 3588 case ARM::BI__builtin_arm_crc32cb: 3589 CRCIntrinsicID = Intrinsic::arm_crc32cb; break; 3590 case ARM::BI__builtin_arm_crc32h: 3591 CRCIntrinsicID = Intrinsic::arm_crc32h; break; 3592 case ARM::BI__builtin_arm_crc32ch: 3593 CRCIntrinsicID = Intrinsic::arm_crc32ch; break; 3594 case ARM::BI__builtin_arm_crc32w: 3595 case ARM::BI__builtin_arm_crc32d: 3596 CRCIntrinsicID = Intrinsic::arm_crc32w; break; 3597 case ARM::BI__builtin_arm_crc32cw: 3598 case ARM::BI__builtin_arm_crc32cd: 3599 CRCIntrinsicID = Intrinsic::arm_crc32cw; break; 3600 } 3601 3602 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 3603 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 3604 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 3605 3606 // crc32{c,}d intrinsics are implemnted as two calls to crc32{c,}w 3607 // intrinsics, hence we need different codegen for these cases. 3608 if (BuiltinID == ARM::BI__builtin_arm_crc32d || 3609 BuiltinID == ARM::BI__builtin_arm_crc32cd) { 3610 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 3611 Value *Arg1a = Builder.CreateTruncOrBitCast(Arg1, Int32Ty); 3612 Value *Arg1b = Builder.CreateLShr(Arg1, C1); 3613 Arg1b = Builder.CreateTruncOrBitCast(Arg1b, Int32Ty); 3614 3615 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 3616 Value *Res = Builder.CreateCall(F, {Arg0, Arg1a}); 3617 return Builder.CreateCall(F, {Res, Arg1b}); 3618 } else { 3619 Arg1 = Builder.CreateZExtOrBitCast(Arg1, Int32Ty); 3620 3621 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 3622 return Builder.CreateCall(F, {Arg0, Arg1}); 3623 } 3624 } 3625 3626 if (BuiltinID == ARM::BI__builtin_arm_rsr || 3627 BuiltinID == ARM::BI__builtin_arm_rsr64 || 3628 BuiltinID == ARM::BI__builtin_arm_rsrp || 3629 BuiltinID == ARM::BI__builtin_arm_wsr || 3630 BuiltinID == ARM::BI__builtin_arm_wsr64 || 3631 BuiltinID == ARM::BI__builtin_arm_wsrp) { 3632 3633 bool IsRead = BuiltinID == ARM::BI__builtin_arm_rsr || 3634 BuiltinID == ARM::BI__builtin_arm_rsr64 || 3635 BuiltinID == ARM::BI__builtin_arm_rsrp; 3636 3637 bool IsPointerBuiltin = BuiltinID == ARM::BI__builtin_arm_rsrp || 3638 BuiltinID == ARM::BI__builtin_arm_wsrp; 3639 3640 bool Is64Bit = BuiltinID == ARM::BI__builtin_arm_rsr64 || 3641 BuiltinID == ARM::BI__builtin_arm_wsr64; 3642 3643 llvm::Type *ValueType; 3644 llvm::Type *RegisterType; 3645 if (IsPointerBuiltin) { 3646 ValueType = VoidPtrTy; 3647 RegisterType = Int32Ty; 3648 } else if (Is64Bit) { 3649 ValueType = RegisterType = Int64Ty; 3650 } else { 3651 ValueType = RegisterType = Int32Ty; 3652 } 3653 3654 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 3655 } 3656 3657 // Find out if any arguments are required to be integer constant 3658 // expressions. 3659 unsigned ICEArguments = 0; 3660 ASTContext::GetBuiltinTypeError Error; 3661 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 3662 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 3663 3664 auto getAlignmentValue32 = [&](Address addr) -> Value* { 3665 return Builder.getInt32(addr.getAlignment().getQuantity()); 3666 }; 3667 3668 Address PtrOp0 = Address::invalid(); 3669 Address PtrOp1 = Address::invalid(); 3670 SmallVector<Value*, 4> Ops; 3671 bool HasExtraArg = HasExtraNeonArgument(BuiltinID); 3672 unsigned NumArgs = E->getNumArgs() - (HasExtraArg ? 1 : 0); 3673 for (unsigned i = 0, e = NumArgs; i != e; i++) { 3674 if (i == 0) { 3675 switch (BuiltinID) { 3676 case NEON::BI__builtin_neon_vld1_v: 3677 case NEON::BI__builtin_neon_vld1q_v: 3678 case NEON::BI__builtin_neon_vld1q_lane_v: 3679 case NEON::BI__builtin_neon_vld1_lane_v: 3680 case NEON::BI__builtin_neon_vld1_dup_v: 3681 case NEON::BI__builtin_neon_vld1q_dup_v: 3682 case NEON::BI__builtin_neon_vst1_v: 3683 case NEON::BI__builtin_neon_vst1q_v: 3684 case NEON::BI__builtin_neon_vst1q_lane_v: 3685 case NEON::BI__builtin_neon_vst1_lane_v: 3686 case NEON::BI__builtin_neon_vst2_v: 3687 case NEON::BI__builtin_neon_vst2q_v: 3688 case NEON::BI__builtin_neon_vst2_lane_v: 3689 case NEON::BI__builtin_neon_vst2q_lane_v: 3690 case NEON::BI__builtin_neon_vst3_v: 3691 case NEON::BI__builtin_neon_vst3q_v: 3692 case NEON::BI__builtin_neon_vst3_lane_v: 3693 case NEON::BI__builtin_neon_vst3q_lane_v: 3694 case NEON::BI__builtin_neon_vst4_v: 3695 case NEON::BI__builtin_neon_vst4q_v: 3696 case NEON::BI__builtin_neon_vst4_lane_v: 3697 case NEON::BI__builtin_neon_vst4q_lane_v: 3698 // Get the alignment for the argument in addition to the value; 3699 // we'll use it later. 3700 PtrOp0 = EmitPointerWithAlignment(E->getArg(0)); 3701 Ops.push_back(PtrOp0.getPointer()); 3702 continue; 3703 } 3704 } 3705 if (i == 1) { 3706 switch (BuiltinID) { 3707 case NEON::BI__builtin_neon_vld2_v: 3708 case NEON::BI__builtin_neon_vld2q_v: 3709 case NEON::BI__builtin_neon_vld3_v: 3710 case NEON::BI__builtin_neon_vld3q_v: 3711 case NEON::BI__builtin_neon_vld4_v: 3712 case NEON::BI__builtin_neon_vld4q_v: 3713 case NEON::BI__builtin_neon_vld2_lane_v: 3714 case NEON::BI__builtin_neon_vld2q_lane_v: 3715 case NEON::BI__builtin_neon_vld3_lane_v: 3716 case NEON::BI__builtin_neon_vld3q_lane_v: 3717 case NEON::BI__builtin_neon_vld4_lane_v: 3718 case NEON::BI__builtin_neon_vld4q_lane_v: 3719 case NEON::BI__builtin_neon_vld2_dup_v: 3720 case NEON::BI__builtin_neon_vld3_dup_v: 3721 case NEON::BI__builtin_neon_vld4_dup_v: 3722 // Get the alignment for the argument in addition to the value; 3723 // we'll use it later. 3724 PtrOp1 = EmitPointerWithAlignment(E->getArg(1)); 3725 Ops.push_back(PtrOp1.getPointer()); 3726 continue; 3727 } 3728 } 3729 3730 if ((ICEArguments & (1 << i)) == 0) { 3731 Ops.push_back(EmitScalarExpr(E->getArg(i))); 3732 } else { 3733 // If this is required to be a constant, constant fold it so that we know 3734 // that the generated intrinsic gets a ConstantInt. 3735 llvm::APSInt Result; 3736 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 3737 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 3738 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 3739 } 3740 } 3741 3742 switch (BuiltinID) { 3743 default: break; 3744 3745 case NEON::BI__builtin_neon_vget_lane_i8: 3746 case NEON::BI__builtin_neon_vget_lane_i16: 3747 case NEON::BI__builtin_neon_vget_lane_i32: 3748 case NEON::BI__builtin_neon_vget_lane_i64: 3749 case NEON::BI__builtin_neon_vget_lane_f32: 3750 case NEON::BI__builtin_neon_vgetq_lane_i8: 3751 case NEON::BI__builtin_neon_vgetq_lane_i16: 3752 case NEON::BI__builtin_neon_vgetq_lane_i32: 3753 case NEON::BI__builtin_neon_vgetq_lane_i64: 3754 case NEON::BI__builtin_neon_vgetq_lane_f32: 3755 return Builder.CreateExtractElement(Ops[0], Ops[1], "vget_lane"); 3756 3757 case NEON::BI__builtin_neon_vset_lane_i8: 3758 case NEON::BI__builtin_neon_vset_lane_i16: 3759 case NEON::BI__builtin_neon_vset_lane_i32: 3760 case NEON::BI__builtin_neon_vset_lane_i64: 3761 case NEON::BI__builtin_neon_vset_lane_f32: 3762 case NEON::BI__builtin_neon_vsetq_lane_i8: 3763 case NEON::BI__builtin_neon_vsetq_lane_i16: 3764 case NEON::BI__builtin_neon_vsetq_lane_i32: 3765 case NEON::BI__builtin_neon_vsetq_lane_i64: 3766 case NEON::BI__builtin_neon_vsetq_lane_f32: 3767 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 3768 3769 case NEON::BI__builtin_neon_vsha1h_u32: 3770 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1h), Ops, 3771 "vsha1h"); 3772 case NEON::BI__builtin_neon_vsha1cq_u32: 3773 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1c), Ops, 3774 "vsha1h"); 3775 case NEON::BI__builtin_neon_vsha1pq_u32: 3776 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1p), Ops, 3777 "vsha1h"); 3778 case NEON::BI__builtin_neon_vsha1mq_u32: 3779 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_sha1m), Ops, 3780 "vsha1h"); 3781 3782 // The ARM _MoveToCoprocessor builtins put the input register value as 3783 // the first argument, but the LLVM intrinsic expects it as the third one. 3784 case ARM::BI_MoveToCoprocessor: 3785 case ARM::BI_MoveToCoprocessor2: { 3786 Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI_MoveToCoprocessor ? 3787 Intrinsic::arm_mcr : Intrinsic::arm_mcr2); 3788 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0], 3789 Ops[3], Ops[4], Ops[5]}); 3790 } 3791 } 3792 3793 // Get the last argument, which specifies the vector type. 3794 assert(HasExtraArg); 3795 llvm::APSInt Result; 3796 const Expr *Arg = E->getArg(E->getNumArgs()-1); 3797 if (!Arg->isIntegerConstantExpr(Result, getContext())) 3798 return nullptr; 3799 3800 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f || 3801 BuiltinID == ARM::BI__builtin_arm_vcvtr_d) { 3802 // Determine the overloaded type of this builtin. 3803 llvm::Type *Ty; 3804 if (BuiltinID == ARM::BI__builtin_arm_vcvtr_f) 3805 Ty = FloatTy; 3806 else 3807 Ty = DoubleTy; 3808 3809 // Determine whether this is an unsigned conversion or not. 3810 bool usgn = Result.getZExtValue() == 1; 3811 unsigned Int = usgn ? Intrinsic::arm_vcvtru : Intrinsic::arm_vcvtr; 3812 3813 // Call the appropriate intrinsic. 3814 Function *F = CGM.getIntrinsic(Int, Ty); 3815 return Builder.CreateCall(F, Ops, "vcvtr"); 3816 } 3817 3818 // Determine the type of this overloaded NEON intrinsic. 3819 NeonTypeFlags Type(Result.getZExtValue()); 3820 bool usgn = Type.isUnsigned(); 3821 bool rightShift = false; 3822 3823 llvm::VectorType *VTy = GetNeonType(this, Type); 3824 llvm::Type *Ty = VTy; 3825 if (!Ty) 3826 return nullptr; 3827 3828 // Many NEON builtins have identical semantics and uses in ARM and 3829 // AArch64. Emit these in a single function. 3830 auto IntrinsicMap = makeArrayRef(ARMSIMDIntrinsicMap); 3831 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 3832 IntrinsicMap, BuiltinID, NEONSIMDIntrinsicsProvenSorted); 3833 if (Builtin) 3834 return EmitCommonNeonBuiltinExpr( 3835 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 3836 Builtin->NameHint, Builtin->TypeModifier, E, Ops, PtrOp0, PtrOp1); 3837 3838 unsigned Int; 3839 switch (BuiltinID) { 3840 default: return nullptr; 3841 case NEON::BI__builtin_neon_vld1q_lane_v: 3842 // Handle 64-bit integer elements as a special case. Use shuffles of 3843 // one-element vectors to avoid poor code for i64 in the backend. 3844 if (VTy->getElementType()->isIntegerTy(64)) { 3845 // Extract the other lane. 3846 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3847 uint32_t Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); 3848 Value *SV = llvm::ConstantVector::get(ConstantInt::get(Int32Ty, 1-Lane)); 3849 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 3850 // Load the value as a one-element vector. 3851 Ty = llvm::VectorType::get(VTy->getElementType(), 1); 3852 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3853 Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Tys); 3854 Value *Align = getAlignmentValue32(PtrOp0); 3855 Value *Ld = Builder.CreateCall(F, {Ops[0], Align}); 3856 // Combine them. 3857 uint32_t Indices[] = {1 - Lane, Lane}; 3858 SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 3859 return Builder.CreateShuffleVector(Ops[1], Ld, SV, "vld1q_lane"); 3860 } 3861 // fall through 3862 case NEON::BI__builtin_neon_vld1_lane_v: { 3863 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3864 PtrOp0 = Builder.CreateElementBitCast(PtrOp0, VTy->getElementType()); 3865 Value *Ld = Builder.CreateLoad(PtrOp0); 3866 return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); 3867 } 3868 case NEON::BI__builtin_neon_vld2_dup_v: 3869 case NEON::BI__builtin_neon_vld3_dup_v: 3870 case NEON::BI__builtin_neon_vld4_dup_v: { 3871 // Handle 64-bit elements as a special-case. There is no "dup" needed. 3872 if (VTy->getElementType()->getPrimitiveSizeInBits() == 64) { 3873 switch (BuiltinID) { 3874 case NEON::BI__builtin_neon_vld2_dup_v: 3875 Int = Intrinsic::arm_neon_vld2; 3876 break; 3877 case NEON::BI__builtin_neon_vld3_dup_v: 3878 Int = Intrinsic::arm_neon_vld3; 3879 break; 3880 case NEON::BI__builtin_neon_vld4_dup_v: 3881 Int = Intrinsic::arm_neon_vld4; 3882 break; 3883 default: llvm_unreachable("unknown vld_dup intrinsic?"); 3884 } 3885 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3886 Function *F = CGM.getIntrinsic(Int, Tys); 3887 llvm::Value *Align = getAlignmentValue32(PtrOp1); 3888 Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, "vld_dup"); 3889 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3890 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3891 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3892 } 3893 switch (BuiltinID) { 3894 case NEON::BI__builtin_neon_vld2_dup_v: 3895 Int = Intrinsic::arm_neon_vld2lane; 3896 break; 3897 case NEON::BI__builtin_neon_vld3_dup_v: 3898 Int = Intrinsic::arm_neon_vld3lane; 3899 break; 3900 case NEON::BI__builtin_neon_vld4_dup_v: 3901 Int = Intrinsic::arm_neon_vld4lane; 3902 break; 3903 default: llvm_unreachable("unknown vld_dup intrinsic?"); 3904 } 3905 llvm::Type *Tys[] = {Ty, Int8PtrTy}; 3906 Function *F = CGM.getIntrinsic(Int, Tys); 3907 llvm::StructType *STy = cast<llvm::StructType>(F->getReturnType()); 3908 3909 SmallVector<Value*, 6> Args; 3910 Args.push_back(Ops[1]); 3911 Args.append(STy->getNumElements(), UndefValue::get(Ty)); 3912 3913 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 3914 Args.push_back(CI); 3915 Args.push_back(getAlignmentValue32(PtrOp1)); 3916 3917 Ops[1] = Builder.CreateCall(F, Args, "vld_dup"); 3918 // splat lane 0 to all elts in each vector of the result. 3919 for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { 3920 Value *Val = Builder.CreateExtractValue(Ops[1], i); 3921 Value *Elt = Builder.CreateBitCast(Val, Ty); 3922 Elt = EmitNeonSplat(Elt, CI); 3923 Elt = Builder.CreateBitCast(Elt, Val->getType()); 3924 Ops[1] = Builder.CreateInsertValue(Ops[1], Elt, i); 3925 } 3926 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3927 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3928 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 3929 } 3930 case NEON::BI__builtin_neon_vqrshrn_n_v: 3931 Int = 3932 usgn ? Intrinsic::arm_neon_vqrshiftnu : Intrinsic::arm_neon_vqrshiftns; 3933 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n", 3934 1, true); 3935 case NEON::BI__builtin_neon_vqrshrun_n_v: 3936 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqrshiftnsu, Ty), 3937 Ops, "vqrshrun_n", 1, true); 3938 case NEON::BI__builtin_neon_vqshrn_n_v: 3939 Int = usgn ? Intrinsic::arm_neon_vqshiftnu : Intrinsic::arm_neon_vqshiftns; 3940 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n", 3941 1, true); 3942 case NEON::BI__builtin_neon_vqshrun_n_v: 3943 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vqshiftnsu, Ty), 3944 Ops, "vqshrun_n", 1, true); 3945 case NEON::BI__builtin_neon_vrecpe_v: 3946 case NEON::BI__builtin_neon_vrecpeq_v: 3947 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecpe, Ty), 3948 Ops, "vrecpe"); 3949 case NEON::BI__builtin_neon_vrshrn_n_v: 3950 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrshiftn, Ty), 3951 Ops, "vrshrn_n", 1, true); 3952 case NEON::BI__builtin_neon_vrsra_n_v: 3953 case NEON::BI__builtin_neon_vrsraq_n_v: 3954 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3955 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3956 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, true); 3957 Int = usgn ? Intrinsic::arm_neon_vrshiftu : Intrinsic::arm_neon_vrshifts; 3958 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Ty), {Ops[1], Ops[2]}); 3959 return Builder.CreateAdd(Ops[0], Ops[1], "vrsra_n"); 3960 case NEON::BI__builtin_neon_vsri_n_v: 3961 case NEON::BI__builtin_neon_vsriq_n_v: 3962 rightShift = true; 3963 case NEON::BI__builtin_neon_vsli_n_v: 3964 case NEON::BI__builtin_neon_vsliq_n_v: 3965 Ops[2] = EmitNeonShiftVector(Ops[2], Ty, rightShift); 3966 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vshiftins, Ty), 3967 Ops, "vsli_n"); 3968 case NEON::BI__builtin_neon_vsra_n_v: 3969 case NEON::BI__builtin_neon_vsraq_n_v: 3970 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 3971 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 3972 return Builder.CreateAdd(Ops[0], Ops[1]); 3973 case NEON::BI__builtin_neon_vst1q_lane_v: 3974 // Handle 64-bit integer elements as a special case. Use a shuffle to get 3975 // a one-element vector and avoid poor code for i64 in the backend. 3976 if (VTy->getElementType()->isIntegerTy(64)) { 3977 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3978 Value *SV = llvm::ConstantVector::get(cast<llvm::Constant>(Ops[2])); 3979 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV); 3980 Ops[2] = getAlignmentValue32(PtrOp0); 3981 llvm::Type *Tys[] = {Int8PtrTy, Ops[1]->getType()}; 3982 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, 3983 Tys), Ops); 3984 } 3985 // fall through 3986 case NEON::BI__builtin_neon_vst1_lane_v: { 3987 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 3988 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 3989 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 3990 auto St = Builder.CreateStore(Ops[1], Builder.CreateBitCast(PtrOp0, Ty)); 3991 return St; 3992 } 3993 case NEON::BI__builtin_neon_vtbl1_v: 3994 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl1), 3995 Ops, "vtbl1"); 3996 case NEON::BI__builtin_neon_vtbl2_v: 3997 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl2), 3998 Ops, "vtbl2"); 3999 case NEON::BI__builtin_neon_vtbl3_v: 4000 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl3), 4001 Ops, "vtbl3"); 4002 case NEON::BI__builtin_neon_vtbl4_v: 4003 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbl4), 4004 Ops, "vtbl4"); 4005 case NEON::BI__builtin_neon_vtbx1_v: 4006 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx1), 4007 Ops, "vtbx1"); 4008 case NEON::BI__builtin_neon_vtbx2_v: 4009 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx2), 4010 Ops, "vtbx2"); 4011 case NEON::BI__builtin_neon_vtbx3_v: 4012 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx3), 4013 Ops, "vtbx3"); 4014 case NEON::BI__builtin_neon_vtbx4_v: 4015 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vtbx4), 4016 Ops, "vtbx4"); 4017 } 4018 } 4019 4020 static Value *EmitAArch64TblBuiltinExpr(CodeGenFunction &CGF, unsigned BuiltinID, 4021 const CallExpr *E, 4022 SmallVectorImpl<Value *> &Ops) { 4023 unsigned int Int = 0; 4024 const char *s = nullptr; 4025 4026 switch (BuiltinID) { 4027 default: 4028 return nullptr; 4029 case NEON::BI__builtin_neon_vtbl1_v: 4030 case NEON::BI__builtin_neon_vqtbl1_v: 4031 case NEON::BI__builtin_neon_vqtbl1q_v: 4032 case NEON::BI__builtin_neon_vtbl2_v: 4033 case NEON::BI__builtin_neon_vqtbl2_v: 4034 case NEON::BI__builtin_neon_vqtbl2q_v: 4035 case NEON::BI__builtin_neon_vtbl3_v: 4036 case NEON::BI__builtin_neon_vqtbl3_v: 4037 case NEON::BI__builtin_neon_vqtbl3q_v: 4038 case NEON::BI__builtin_neon_vtbl4_v: 4039 case NEON::BI__builtin_neon_vqtbl4_v: 4040 case NEON::BI__builtin_neon_vqtbl4q_v: 4041 break; 4042 case NEON::BI__builtin_neon_vtbx1_v: 4043 case NEON::BI__builtin_neon_vqtbx1_v: 4044 case NEON::BI__builtin_neon_vqtbx1q_v: 4045 case NEON::BI__builtin_neon_vtbx2_v: 4046 case NEON::BI__builtin_neon_vqtbx2_v: 4047 case NEON::BI__builtin_neon_vqtbx2q_v: 4048 case NEON::BI__builtin_neon_vtbx3_v: 4049 case NEON::BI__builtin_neon_vqtbx3_v: 4050 case NEON::BI__builtin_neon_vqtbx3q_v: 4051 case NEON::BI__builtin_neon_vtbx4_v: 4052 case NEON::BI__builtin_neon_vqtbx4_v: 4053 case NEON::BI__builtin_neon_vqtbx4q_v: 4054 break; 4055 } 4056 4057 assert(E->getNumArgs() >= 3); 4058 4059 // Get the last argument, which specifies the vector type. 4060 llvm::APSInt Result; 4061 const Expr *Arg = E->getArg(E->getNumArgs() - 1); 4062 if (!Arg->isIntegerConstantExpr(Result, CGF.getContext())) 4063 return nullptr; 4064 4065 // Determine the type of this overloaded NEON intrinsic. 4066 NeonTypeFlags Type(Result.getZExtValue()); 4067 llvm::VectorType *Ty = GetNeonType(&CGF, Type); 4068 if (!Ty) 4069 return nullptr; 4070 4071 CodeGen::CGBuilderTy &Builder = CGF.Builder; 4072 4073 // AArch64 scalar builtins are not overloaded, they do not have an extra 4074 // argument that specifies the vector type, need to handle each case. 4075 switch (BuiltinID) { 4076 case NEON::BI__builtin_neon_vtbl1_v: { 4077 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 1), nullptr, 4078 Ops[1], Ty, Intrinsic::aarch64_neon_tbl1, 4079 "vtbl1"); 4080 } 4081 case NEON::BI__builtin_neon_vtbl2_v: { 4082 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 2), nullptr, 4083 Ops[2], Ty, Intrinsic::aarch64_neon_tbl1, 4084 "vtbl1"); 4085 } 4086 case NEON::BI__builtin_neon_vtbl3_v: { 4087 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 3), nullptr, 4088 Ops[3], Ty, Intrinsic::aarch64_neon_tbl2, 4089 "vtbl2"); 4090 } 4091 case NEON::BI__builtin_neon_vtbl4_v: { 4092 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(0, 4), nullptr, 4093 Ops[4], Ty, Intrinsic::aarch64_neon_tbl2, 4094 "vtbl2"); 4095 } 4096 case NEON::BI__builtin_neon_vtbx1_v: { 4097 Value *TblRes = 4098 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 1), nullptr, Ops[2], 4099 Ty, Intrinsic::aarch64_neon_tbl1, "vtbl1"); 4100 4101 llvm::Constant *EightV = ConstantInt::get(Ty, 8); 4102 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[2], EightV); 4103 CmpRes = Builder.CreateSExt(CmpRes, Ty); 4104 4105 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 4106 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 4107 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 4108 } 4109 case NEON::BI__builtin_neon_vtbx2_v: { 4110 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 2), Ops[0], 4111 Ops[3], Ty, Intrinsic::aarch64_neon_tbx1, 4112 "vtbx1"); 4113 } 4114 case NEON::BI__builtin_neon_vtbx3_v: { 4115 Value *TblRes = 4116 packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 3), nullptr, Ops[4], 4117 Ty, Intrinsic::aarch64_neon_tbl2, "vtbl2"); 4118 4119 llvm::Constant *TwentyFourV = ConstantInt::get(Ty, 24); 4120 Value *CmpRes = Builder.CreateICmp(ICmpInst::ICMP_UGE, Ops[4], 4121 TwentyFourV); 4122 CmpRes = Builder.CreateSExt(CmpRes, Ty); 4123 4124 Value *EltsFromInput = Builder.CreateAnd(CmpRes, Ops[0]); 4125 Value *EltsFromTbl = Builder.CreateAnd(Builder.CreateNot(CmpRes), TblRes); 4126 return Builder.CreateOr(EltsFromInput, EltsFromTbl, "vtbx"); 4127 } 4128 case NEON::BI__builtin_neon_vtbx4_v: { 4129 return packTBLDVectorList(CGF, makeArrayRef(Ops).slice(1, 4), Ops[0], 4130 Ops[5], Ty, Intrinsic::aarch64_neon_tbx2, 4131 "vtbx2"); 4132 } 4133 case NEON::BI__builtin_neon_vqtbl1_v: 4134 case NEON::BI__builtin_neon_vqtbl1q_v: 4135 Int = Intrinsic::aarch64_neon_tbl1; s = "vtbl1"; break; 4136 case NEON::BI__builtin_neon_vqtbl2_v: 4137 case NEON::BI__builtin_neon_vqtbl2q_v: { 4138 Int = Intrinsic::aarch64_neon_tbl2; s = "vtbl2"; break; 4139 case NEON::BI__builtin_neon_vqtbl3_v: 4140 case NEON::BI__builtin_neon_vqtbl3q_v: 4141 Int = Intrinsic::aarch64_neon_tbl3; s = "vtbl3"; break; 4142 case NEON::BI__builtin_neon_vqtbl4_v: 4143 case NEON::BI__builtin_neon_vqtbl4q_v: 4144 Int = Intrinsic::aarch64_neon_tbl4; s = "vtbl4"; break; 4145 case NEON::BI__builtin_neon_vqtbx1_v: 4146 case NEON::BI__builtin_neon_vqtbx1q_v: 4147 Int = Intrinsic::aarch64_neon_tbx1; s = "vtbx1"; break; 4148 case NEON::BI__builtin_neon_vqtbx2_v: 4149 case NEON::BI__builtin_neon_vqtbx2q_v: 4150 Int = Intrinsic::aarch64_neon_tbx2; s = "vtbx2"; break; 4151 case NEON::BI__builtin_neon_vqtbx3_v: 4152 case NEON::BI__builtin_neon_vqtbx3q_v: 4153 Int = Intrinsic::aarch64_neon_tbx3; s = "vtbx3"; break; 4154 case NEON::BI__builtin_neon_vqtbx4_v: 4155 case NEON::BI__builtin_neon_vqtbx4q_v: 4156 Int = Intrinsic::aarch64_neon_tbx4; s = "vtbx4"; break; 4157 } 4158 } 4159 4160 if (!Int) 4161 return nullptr; 4162 4163 Function *F = CGF.CGM.getIntrinsic(Int, Ty); 4164 return CGF.EmitNeonCall(F, Ops, s); 4165 } 4166 4167 Value *CodeGenFunction::vectorWrapScalar16(Value *Op) { 4168 llvm::Type *VTy = llvm::VectorType::get(Int16Ty, 4); 4169 Op = Builder.CreateBitCast(Op, Int16Ty); 4170 Value *V = UndefValue::get(VTy); 4171 llvm::Constant *CI = ConstantInt::get(SizeTy, 0); 4172 Op = Builder.CreateInsertElement(V, Op, CI); 4173 return Op; 4174 } 4175 4176 Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, 4177 const CallExpr *E) { 4178 unsigned HintID = static_cast<unsigned>(-1); 4179 switch (BuiltinID) { 4180 default: break; 4181 case AArch64::BI__builtin_arm_nop: 4182 HintID = 0; 4183 break; 4184 case AArch64::BI__builtin_arm_yield: 4185 HintID = 1; 4186 break; 4187 case AArch64::BI__builtin_arm_wfe: 4188 HintID = 2; 4189 break; 4190 case AArch64::BI__builtin_arm_wfi: 4191 HintID = 3; 4192 break; 4193 case AArch64::BI__builtin_arm_sev: 4194 HintID = 4; 4195 break; 4196 case AArch64::BI__builtin_arm_sevl: 4197 HintID = 5; 4198 break; 4199 } 4200 4201 if (HintID != static_cast<unsigned>(-1)) { 4202 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_hint); 4203 return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID)); 4204 } 4205 4206 if (BuiltinID == AArch64::BI__builtin_arm_prefetch) { 4207 Value *Address = EmitScalarExpr(E->getArg(0)); 4208 Value *RW = EmitScalarExpr(E->getArg(1)); 4209 Value *CacheLevel = EmitScalarExpr(E->getArg(2)); 4210 Value *RetentionPolicy = EmitScalarExpr(E->getArg(3)); 4211 Value *IsData = EmitScalarExpr(E->getArg(4)); 4212 4213 Value *Locality = nullptr; 4214 if (cast<llvm::ConstantInt>(RetentionPolicy)->isZero()) { 4215 // Temporal fetch, needs to convert cache level to locality. 4216 Locality = llvm::ConstantInt::get(Int32Ty, 4217 -cast<llvm::ConstantInt>(CacheLevel)->getValue() + 3); 4218 } else { 4219 // Streaming fetch. 4220 Locality = llvm::ConstantInt::get(Int32Ty, 0); 4221 } 4222 4223 // FIXME: We need AArch64 specific LLVM intrinsic if we want to specify 4224 // PLDL3STRM or PLDL2STRM. 4225 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 4226 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 4227 } 4228 4229 if (BuiltinID == AArch64::BI__builtin_arm_rbit) { 4230 assert((getContext().getTypeSize(E->getType()) == 32) && 4231 "rbit of unusual size!"); 4232 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 4233 return Builder.CreateCall( 4234 CGM.getIntrinsic(Intrinsic::aarch64_rbit, Arg->getType()), Arg, "rbit"); 4235 } 4236 if (BuiltinID == AArch64::BI__builtin_arm_rbit64) { 4237 assert((getContext().getTypeSize(E->getType()) == 64) && 4238 "rbit of unusual size!"); 4239 llvm::Value *Arg = EmitScalarExpr(E->getArg(0)); 4240 return Builder.CreateCall( 4241 CGM.getIntrinsic(Intrinsic::aarch64_rbit, Arg->getType()), Arg, "rbit"); 4242 } 4243 4244 if (BuiltinID == AArch64::BI__clear_cache) { 4245 assert(E->getNumArgs() == 2 && "__clear_cache takes 2 arguments"); 4246 const FunctionDecl *FD = E->getDirectCallee(); 4247 Value *Ops[2]; 4248 for (unsigned i = 0; i < 2; i++) 4249 Ops[i] = EmitScalarExpr(E->getArg(i)); 4250 llvm::Type *Ty = CGM.getTypes().ConvertType(FD->getType()); 4251 llvm::FunctionType *FTy = cast<llvm::FunctionType>(Ty); 4252 StringRef Name = FD->getName(); 4253 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); 4254 } 4255 4256 if ((BuiltinID == AArch64::BI__builtin_arm_ldrex || 4257 BuiltinID == AArch64::BI__builtin_arm_ldaex) && 4258 getContext().getTypeSize(E->getType()) == 128) { 4259 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 4260 ? Intrinsic::aarch64_ldaxp 4261 : Intrinsic::aarch64_ldxp); 4262 4263 Value *LdPtr = EmitScalarExpr(E->getArg(0)); 4264 Value *Val = Builder.CreateCall(F, Builder.CreateBitCast(LdPtr, Int8PtrTy), 4265 "ldxp"); 4266 4267 Value *Val0 = Builder.CreateExtractValue(Val, 1); 4268 Value *Val1 = Builder.CreateExtractValue(Val, 0); 4269 llvm::Type *Int128Ty = llvm::IntegerType::get(getLLVMContext(), 128); 4270 Val0 = Builder.CreateZExt(Val0, Int128Ty); 4271 Val1 = Builder.CreateZExt(Val1, Int128Ty); 4272 4273 Value *ShiftCst = llvm::ConstantInt::get(Int128Ty, 64); 4274 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); 4275 Val = Builder.CreateOr(Val, Val1); 4276 return Builder.CreateBitCast(Val, ConvertType(E->getType())); 4277 } else if (BuiltinID == AArch64::BI__builtin_arm_ldrex || 4278 BuiltinID == AArch64::BI__builtin_arm_ldaex) { 4279 Value *LoadAddr = EmitScalarExpr(E->getArg(0)); 4280 4281 QualType Ty = E->getType(); 4282 llvm::Type *RealResTy = ConvertType(Ty); 4283 llvm::Type *IntResTy = llvm::IntegerType::get(getLLVMContext(), 4284 getContext().getTypeSize(Ty)); 4285 LoadAddr = Builder.CreateBitCast(LoadAddr, IntResTy->getPointerTo()); 4286 4287 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_ldaex 4288 ? Intrinsic::aarch64_ldaxr 4289 : Intrinsic::aarch64_ldxr, 4290 LoadAddr->getType()); 4291 Value *Val = Builder.CreateCall(F, LoadAddr, "ldxr"); 4292 4293 if (RealResTy->isPointerTy()) 4294 return Builder.CreateIntToPtr(Val, RealResTy); 4295 4296 Val = Builder.CreateTruncOrBitCast(Val, IntResTy); 4297 return Builder.CreateBitCast(Val, RealResTy); 4298 } 4299 4300 if ((BuiltinID == AArch64::BI__builtin_arm_strex || 4301 BuiltinID == AArch64::BI__builtin_arm_stlex) && 4302 getContext().getTypeSize(E->getArg(0)->getType()) == 128) { 4303 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 4304 ? Intrinsic::aarch64_stlxp 4305 : Intrinsic::aarch64_stxp); 4306 llvm::Type *STy = llvm::StructType::get(Int64Ty, Int64Ty, nullptr); 4307 4308 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 4309 EmitAnyExprToMem(E->getArg(0), Tmp, Qualifiers(), /*init*/ true); 4310 4311 Tmp = Builder.CreateBitCast(Tmp, llvm::PointerType::getUnqual(STy)); 4312 llvm::Value *Val = Builder.CreateLoad(Tmp); 4313 4314 Value *Arg0 = Builder.CreateExtractValue(Val, 0); 4315 Value *Arg1 = Builder.CreateExtractValue(Val, 1); 4316 Value *StPtr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), 4317 Int8PtrTy); 4318 return Builder.CreateCall(F, {Arg0, Arg1, StPtr}, "stxp"); 4319 } 4320 4321 if (BuiltinID == AArch64::BI__builtin_arm_strex || 4322 BuiltinID == AArch64::BI__builtin_arm_stlex) { 4323 Value *StoreVal = EmitScalarExpr(E->getArg(0)); 4324 Value *StoreAddr = EmitScalarExpr(E->getArg(1)); 4325 4326 QualType Ty = E->getArg(0)->getType(); 4327 llvm::Type *StoreTy = llvm::IntegerType::get(getLLVMContext(), 4328 getContext().getTypeSize(Ty)); 4329 StoreAddr = Builder.CreateBitCast(StoreAddr, StoreTy->getPointerTo()); 4330 4331 if (StoreVal->getType()->isPointerTy()) 4332 StoreVal = Builder.CreatePtrToInt(StoreVal, Int64Ty); 4333 else { 4334 StoreVal = Builder.CreateBitCast(StoreVal, StoreTy); 4335 StoreVal = Builder.CreateZExtOrBitCast(StoreVal, Int64Ty); 4336 } 4337 4338 Function *F = CGM.getIntrinsic(BuiltinID == AArch64::BI__builtin_arm_stlex 4339 ? Intrinsic::aarch64_stlxr 4340 : Intrinsic::aarch64_stxr, 4341 StoreAddr->getType()); 4342 return Builder.CreateCall(F, {StoreVal, StoreAddr}, "stxr"); 4343 } 4344 4345 if (BuiltinID == AArch64::BI__builtin_arm_clrex) { 4346 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_clrex); 4347 return Builder.CreateCall(F); 4348 } 4349 4350 if (BuiltinID == AArch64::BI__builtin_thread_pointer) { 4351 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_thread_pointer); 4352 return Builder.CreateCall(F); 4353 } 4354 4355 // CRC32 4356 Intrinsic::ID CRCIntrinsicID = Intrinsic::not_intrinsic; 4357 switch (BuiltinID) { 4358 case AArch64::BI__builtin_arm_crc32b: 4359 CRCIntrinsicID = Intrinsic::aarch64_crc32b; break; 4360 case AArch64::BI__builtin_arm_crc32cb: 4361 CRCIntrinsicID = Intrinsic::aarch64_crc32cb; break; 4362 case AArch64::BI__builtin_arm_crc32h: 4363 CRCIntrinsicID = Intrinsic::aarch64_crc32h; break; 4364 case AArch64::BI__builtin_arm_crc32ch: 4365 CRCIntrinsicID = Intrinsic::aarch64_crc32ch; break; 4366 case AArch64::BI__builtin_arm_crc32w: 4367 CRCIntrinsicID = Intrinsic::aarch64_crc32w; break; 4368 case AArch64::BI__builtin_arm_crc32cw: 4369 CRCIntrinsicID = Intrinsic::aarch64_crc32cw; break; 4370 case AArch64::BI__builtin_arm_crc32d: 4371 CRCIntrinsicID = Intrinsic::aarch64_crc32x; break; 4372 case AArch64::BI__builtin_arm_crc32cd: 4373 CRCIntrinsicID = Intrinsic::aarch64_crc32cx; break; 4374 } 4375 4376 if (CRCIntrinsicID != Intrinsic::not_intrinsic) { 4377 Value *Arg0 = EmitScalarExpr(E->getArg(0)); 4378 Value *Arg1 = EmitScalarExpr(E->getArg(1)); 4379 Function *F = CGM.getIntrinsic(CRCIntrinsicID); 4380 4381 llvm::Type *DataTy = F->getFunctionType()->getParamType(1); 4382 Arg1 = Builder.CreateZExtOrBitCast(Arg1, DataTy); 4383 4384 return Builder.CreateCall(F, {Arg0, Arg1}); 4385 } 4386 4387 if (BuiltinID == AArch64::BI__builtin_arm_rsr || 4388 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 4389 BuiltinID == AArch64::BI__builtin_arm_rsrp || 4390 BuiltinID == AArch64::BI__builtin_arm_wsr || 4391 BuiltinID == AArch64::BI__builtin_arm_wsr64 || 4392 BuiltinID == AArch64::BI__builtin_arm_wsrp) { 4393 4394 bool IsRead = BuiltinID == AArch64::BI__builtin_arm_rsr || 4395 BuiltinID == AArch64::BI__builtin_arm_rsr64 || 4396 BuiltinID == AArch64::BI__builtin_arm_rsrp; 4397 4398 bool IsPointerBuiltin = BuiltinID == AArch64::BI__builtin_arm_rsrp || 4399 BuiltinID == AArch64::BI__builtin_arm_wsrp; 4400 4401 bool Is64Bit = BuiltinID != AArch64::BI__builtin_arm_rsr && 4402 BuiltinID != AArch64::BI__builtin_arm_wsr; 4403 4404 llvm::Type *ValueType; 4405 llvm::Type *RegisterType = Int64Ty; 4406 if (IsPointerBuiltin) { 4407 ValueType = VoidPtrTy; 4408 } else if (Is64Bit) { 4409 ValueType = Int64Ty; 4410 } else { 4411 ValueType = Int32Ty; 4412 } 4413 4414 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); 4415 } 4416 4417 // Find out if any arguments are required to be integer constant 4418 // expressions. 4419 unsigned ICEArguments = 0; 4420 ASTContext::GetBuiltinTypeError Error; 4421 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 4422 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 4423 4424 llvm::SmallVector<Value*, 4> Ops; 4425 for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; i++) { 4426 if ((ICEArguments & (1 << i)) == 0) { 4427 Ops.push_back(EmitScalarExpr(E->getArg(i))); 4428 } else { 4429 // If this is required to be a constant, constant fold it so that we know 4430 // that the generated intrinsic gets a ConstantInt. 4431 llvm::APSInt Result; 4432 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 4433 assert(IsConst && "Constant arg isn't actually constant?"); 4434 (void)IsConst; 4435 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 4436 } 4437 } 4438 4439 auto SISDMap = makeArrayRef(AArch64SISDIntrinsicMap); 4440 const NeonIntrinsicInfo *Builtin = findNeonIntrinsicInMap( 4441 SISDMap, BuiltinID, AArch64SISDIntrinsicsProvenSorted); 4442 4443 if (Builtin) { 4444 Ops.push_back(EmitScalarExpr(E->getArg(E->getNumArgs() - 1))); 4445 Value *Result = EmitCommonNeonSISDBuiltinExpr(*this, *Builtin, Ops, E); 4446 assert(Result && "SISD intrinsic should have been handled"); 4447 return Result; 4448 } 4449 4450 llvm::APSInt Result; 4451 const Expr *Arg = E->getArg(E->getNumArgs()-1); 4452 NeonTypeFlags Type(0); 4453 if (Arg->isIntegerConstantExpr(Result, getContext())) 4454 // Determine the type of this overloaded NEON intrinsic. 4455 Type = NeonTypeFlags(Result.getZExtValue()); 4456 4457 bool usgn = Type.isUnsigned(); 4458 bool quad = Type.isQuad(); 4459 4460 // Handle non-overloaded intrinsics first. 4461 switch (BuiltinID) { 4462 default: break; 4463 case NEON::BI__builtin_neon_vldrq_p128: { 4464 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 4465 Value *Ptr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PTy); 4466 return Builder.CreateDefaultAlignedLoad(Ptr); 4467 } 4468 case NEON::BI__builtin_neon_vstrq_p128: { 4469 llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128); 4470 Value *Ptr = Builder.CreateBitCast(Ops[0], Int128PTy); 4471 return Builder.CreateDefaultAlignedStore(EmitScalarExpr(E->getArg(1)), Ptr); 4472 } 4473 case NEON::BI__builtin_neon_vcvts_u32_f32: 4474 case NEON::BI__builtin_neon_vcvtd_u64_f64: 4475 usgn = true; 4476 // FALL THROUGH 4477 case NEON::BI__builtin_neon_vcvts_s32_f32: 4478 case NEON::BI__builtin_neon_vcvtd_s64_f64: { 4479 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4480 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 4481 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 4482 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 4483 Ops[0] = Builder.CreateBitCast(Ops[0], FTy); 4484 if (usgn) 4485 return Builder.CreateFPToUI(Ops[0], InTy); 4486 return Builder.CreateFPToSI(Ops[0], InTy); 4487 } 4488 case NEON::BI__builtin_neon_vcvts_f32_u32: 4489 case NEON::BI__builtin_neon_vcvtd_f64_u64: 4490 usgn = true; 4491 // FALL THROUGH 4492 case NEON::BI__builtin_neon_vcvts_f32_s32: 4493 case NEON::BI__builtin_neon_vcvtd_f64_s64: { 4494 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4495 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; 4496 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; 4497 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; 4498 Ops[0] = Builder.CreateBitCast(Ops[0], InTy); 4499 if (usgn) 4500 return Builder.CreateUIToFP(Ops[0], FTy); 4501 return Builder.CreateSIToFP(Ops[0], FTy); 4502 } 4503 case NEON::BI__builtin_neon_vpaddd_s64: { 4504 llvm::Type *Ty = llvm::VectorType::get(Int64Ty, 2); 4505 Value *Vec = EmitScalarExpr(E->getArg(0)); 4506 // The vector is v2f64, so make sure it's bitcast to that. 4507 Vec = Builder.CreateBitCast(Vec, Ty, "v2i64"); 4508 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 4509 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 4510 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 4511 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 4512 // Pairwise addition of a v2f64 into a scalar f64. 4513 return Builder.CreateAdd(Op0, Op1, "vpaddd"); 4514 } 4515 case NEON::BI__builtin_neon_vpaddd_f64: { 4516 llvm::Type *Ty = 4517 llvm::VectorType::get(DoubleTy, 2); 4518 Value *Vec = EmitScalarExpr(E->getArg(0)); 4519 // The vector is v2f64, so make sure it's bitcast to that. 4520 Vec = Builder.CreateBitCast(Vec, Ty, "v2f64"); 4521 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 4522 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 4523 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 4524 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 4525 // Pairwise addition of a v2f64 into a scalar f64. 4526 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 4527 } 4528 case NEON::BI__builtin_neon_vpadds_f32: { 4529 llvm::Type *Ty = 4530 llvm::VectorType::get(FloatTy, 2); 4531 Value *Vec = EmitScalarExpr(E->getArg(0)); 4532 // The vector is v2f32, so make sure it's bitcast to that. 4533 Vec = Builder.CreateBitCast(Vec, Ty, "v2f32"); 4534 llvm::Value *Idx0 = llvm::ConstantInt::get(SizeTy, 0); 4535 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); 4536 Value *Op0 = Builder.CreateExtractElement(Vec, Idx0, "lane0"); 4537 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); 4538 // Pairwise addition of a v2f32 into a scalar f32. 4539 return Builder.CreateFAdd(Op0, Op1, "vpaddd"); 4540 } 4541 case NEON::BI__builtin_neon_vceqzd_s64: 4542 case NEON::BI__builtin_neon_vceqzd_f64: 4543 case NEON::BI__builtin_neon_vceqzs_f32: 4544 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4545 return EmitAArch64CompareBuiltinExpr( 4546 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4547 ICmpInst::FCMP_OEQ, ICmpInst::ICMP_EQ, "vceqz"); 4548 case NEON::BI__builtin_neon_vcgezd_s64: 4549 case NEON::BI__builtin_neon_vcgezd_f64: 4550 case NEON::BI__builtin_neon_vcgezs_f32: 4551 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4552 return EmitAArch64CompareBuiltinExpr( 4553 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4554 ICmpInst::FCMP_OGE, ICmpInst::ICMP_SGE, "vcgez"); 4555 case NEON::BI__builtin_neon_vclezd_s64: 4556 case NEON::BI__builtin_neon_vclezd_f64: 4557 case NEON::BI__builtin_neon_vclezs_f32: 4558 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4559 return EmitAArch64CompareBuiltinExpr( 4560 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4561 ICmpInst::FCMP_OLE, ICmpInst::ICMP_SLE, "vclez"); 4562 case NEON::BI__builtin_neon_vcgtzd_s64: 4563 case NEON::BI__builtin_neon_vcgtzd_f64: 4564 case NEON::BI__builtin_neon_vcgtzs_f32: 4565 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4566 return EmitAArch64CompareBuiltinExpr( 4567 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4568 ICmpInst::FCMP_OGT, ICmpInst::ICMP_SGT, "vcgtz"); 4569 case NEON::BI__builtin_neon_vcltzd_s64: 4570 case NEON::BI__builtin_neon_vcltzd_f64: 4571 case NEON::BI__builtin_neon_vcltzs_f32: 4572 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4573 return EmitAArch64CompareBuiltinExpr( 4574 Ops[0], ConvertType(E->getCallReturnType(getContext())), 4575 ICmpInst::FCMP_OLT, ICmpInst::ICMP_SLT, "vcltz"); 4576 4577 case NEON::BI__builtin_neon_vceqzd_u64: { 4578 Ops.push_back(EmitScalarExpr(E->getArg(0))); 4579 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 4580 Ops[0] = 4581 Builder.CreateICmpEQ(Ops[0], llvm::Constant::getNullValue(Int64Ty)); 4582 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqzd"); 4583 } 4584 case NEON::BI__builtin_neon_vceqd_f64: 4585 case NEON::BI__builtin_neon_vcled_f64: 4586 case NEON::BI__builtin_neon_vcltd_f64: 4587 case NEON::BI__builtin_neon_vcged_f64: 4588 case NEON::BI__builtin_neon_vcgtd_f64: { 4589 llvm::CmpInst::Predicate P; 4590 switch (BuiltinID) { 4591 default: llvm_unreachable("missing builtin ID in switch!"); 4592 case NEON::BI__builtin_neon_vceqd_f64: P = llvm::FCmpInst::FCMP_OEQ; break; 4593 case NEON::BI__builtin_neon_vcled_f64: P = llvm::FCmpInst::FCMP_OLE; break; 4594 case NEON::BI__builtin_neon_vcltd_f64: P = llvm::FCmpInst::FCMP_OLT; break; 4595 case NEON::BI__builtin_neon_vcged_f64: P = llvm::FCmpInst::FCMP_OGE; break; 4596 case NEON::BI__builtin_neon_vcgtd_f64: P = llvm::FCmpInst::FCMP_OGT; break; 4597 } 4598 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4599 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 4600 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 4601 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 4602 return Builder.CreateSExt(Ops[0], Int64Ty, "vcmpd"); 4603 } 4604 case NEON::BI__builtin_neon_vceqs_f32: 4605 case NEON::BI__builtin_neon_vcles_f32: 4606 case NEON::BI__builtin_neon_vclts_f32: 4607 case NEON::BI__builtin_neon_vcges_f32: 4608 case NEON::BI__builtin_neon_vcgts_f32: { 4609 llvm::CmpInst::Predicate P; 4610 switch (BuiltinID) { 4611 default: llvm_unreachable("missing builtin ID in switch!"); 4612 case NEON::BI__builtin_neon_vceqs_f32: P = llvm::FCmpInst::FCMP_OEQ; break; 4613 case NEON::BI__builtin_neon_vcles_f32: P = llvm::FCmpInst::FCMP_OLE; break; 4614 case NEON::BI__builtin_neon_vclts_f32: P = llvm::FCmpInst::FCMP_OLT; break; 4615 case NEON::BI__builtin_neon_vcges_f32: P = llvm::FCmpInst::FCMP_OGE; break; 4616 case NEON::BI__builtin_neon_vcgts_f32: P = llvm::FCmpInst::FCMP_OGT; break; 4617 } 4618 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4619 Ops[0] = Builder.CreateBitCast(Ops[0], FloatTy); 4620 Ops[1] = Builder.CreateBitCast(Ops[1], FloatTy); 4621 Ops[0] = Builder.CreateFCmp(P, Ops[0], Ops[1]); 4622 return Builder.CreateSExt(Ops[0], Int32Ty, "vcmpd"); 4623 } 4624 case NEON::BI__builtin_neon_vceqd_s64: 4625 case NEON::BI__builtin_neon_vceqd_u64: 4626 case NEON::BI__builtin_neon_vcgtd_s64: 4627 case NEON::BI__builtin_neon_vcgtd_u64: 4628 case NEON::BI__builtin_neon_vcltd_s64: 4629 case NEON::BI__builtin_neon_vcltd_u64: 4630 case NEON::BI__builtin_neon_vcged_u64: 4631 case NEON::BI__builtin_neon_vcged_s64: 4632 case NEON::BI__builtin_neon_vcled_u64: 4633 case NEON::BI__builtin_neon_vcled_s64: { 4634 llvm::CmpInst::Predicate P; 4635 switch (BuiltinID) { 4636 default: llvm_unreachable("missing builtin ID in switch!"); 4637 case NEON::BI__builtin_neon_vceqd_s64: 4638 case NEON::BI__builtin_neon_vceqd_u64:P = llvm::ICmpInst::ICMP_EQ;break; 4639 case NEON::BI__builtin_neon_vcgtd_s64:P = llvm::ICmpInst::ICMP_SGT;break; 4640 case NEON::BI__builtin_neon_vcgtd_u64:P = llvm::ICmpInst::ICMP_UGT;break; 4641 case NEON::BI__builtin_neon_vcltd_s64:P = llvm::ICmpInst::ICMP_SLT;break; 4642 case NEON::BI__builtin_neon_vcltd_u64:P = llvm::ICmpInst::ICMP_ULT;break; 4643 case NEON::BI__builtin_neon_vcged_u64:P = llvm::ICmpInst::ICMP_UGE;break; 4644 case NEON::BI__builtin_neon_vcged_s64:P = llvm::ICmpInst::ICMP_SGE;break; 4645 case NEON::BI__builtin_neon_vcled_u64:P = llvm::ICmpInst::ICMP_ULE;break; 4646 case NEON::BI__builtin_neon_vcled_s64:P = llvm::ICmpInst::ICMP_SLE;break; 4647 } 4648 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4649 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 4650 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 4651 Ops[0] = Builder.CreateICmp(P, Ops[0], Ops[1]); 4652 return Builder.CreateSExt(Ops[0], Int64Ty, "vceqd"); 4653 } 4654 case NEON::BI__builtin_neon_vtstd_s64: 4655 case NEON::BI__builtin_neon_vtstd_u64: { 4656 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4657 Ops[0] = Builder.CreateBitCast(Ops[0], Int64Ty); 4658 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 4659 Ops[0] = Builder.CreateAnd(Ops[0], Ops[1]); 4660 Ops[0] = Builder.CreateICmp(ICmpInst::ICMP_NE, Ops[0], 4661 llvm::Constant::getNullValue(Int64Ty)); 4662 return Builder.CreateSExt(Ops[0], Int64Ty, "vtstd"); 4663 } 4664 case NEON::BI__builtin_neon_vset_lane_i8: 4665 case NEON::BI__builtin_neon_vset_lane_i16: 4666 case NEON::BI__builtin_neon_vset_lane_i32: 4667 case NEON::BI__builtin_neon_vset_lane_i64: 4668 case NEON::BI__builtin_neon_vset_lane_f32: 4669 case NEON::BI__builtin_neon_vsetq_lane_i8: 4670 case NEON::BI__builtin_neon_vsetq_lane_i16: 4671 case NEON::BI__builtin_neon_vsetq_lane_i32: 4672 case NEON::BI__builtin_neon_vsetq_lane_i64: 4673 case NEON::BI__builtin_neon_vsetq_lane_f32: 4674 Ops.push_back(EmitScalarExpr(E->getArg(2))); 4675 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4676 case NEON::BI__builtin_neon_vset_lane_f64: 4677 // The vector type needs a cast for the v1f64 variant. 4678 Ops[1] = Builder.CreateBitCast(Ops[1], 4679 llvm::VectorType::get(DoubleTy, 1)); 4680 Ops.push_back(EmitScalarExpr(E->getArg(2))); 4681 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4682 case NEON::BI__builtin_neon_vsetq_lane_f64: 4683 // The vector type needs a cast for the v2f64 variant. 4684 Ops[1] = Builder.CreateBitCast(Ops[1], 4685 llvm::VectorType::get(DoubleTy, 2)); 4686 Ops.push_back(EmitScalarExpr(E->getArg(2))); 4687 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane"); 4688 4689 case NEON::BI__builtin_neon_vget_lane_i8: 4690 case NEON::BI__builtin_neon_vdupb_lane_i8: 4691 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 8)); 4692 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4693 "vget_lane"); 4694 case NEON::BI__builtin_neon_vgetq_lane_i8: 4695 case NEON::BI__builtin_neon_vdupb_laneq_i8: 4696 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int8Ty, 16)); 4697 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4698 "vgetq_lane"); 4699 case NEON::BI__builtin_neon_vget_lane_i16: 4700 case NEON::BI__builtin_neon_vduph_lane_i16: 4701 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 4)); 4702 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4703 "vget_lane"); 4704 case NEON::BI__builtin_neon_vgetq_lane_i16: 4705 case NEON::BI__builtin_neon_vduph_laneq_i16: 4706 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int16Ty, 8)); 4707 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4708 "vgetq_lane"); 4709 case NEON::BI__builtin_neon_vget_lane_i32: 4710 case NEON::BI__builtin_neon_vdups_lane_i32: 4711 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 2)); 4712 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4713 "vget_lane"); 4714 case NEON::BI__builtin_neon_vdups_lane_f32: 4715 Ops[0] = Builder.CreateBitCast(Ops[0], 4716 llvm::VectorType::get(FloatTy, 2)); 4717 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4718 "vdups_lane"); 4719 case NEON::BI__builtin_neon_vgetq_lane_i32: 4720 case NEON::BI__builtin_neon_vdups_laneq_i32: 4721 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int32Ty, 4)); 4722 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4723 "vgetq_lane"); 4724 case NEON::BI__builtin_neon_vget_lane_i64: 4725 case NEON::BI__builtin_neon_vdupd_lane_i64: 4726 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 1)); 4727 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4728 "vget_lane"); 4729 case NEON::BI__builtin_neon_vdupd_lane_f64: 4730 Ops[0] = Builder.CreateBitCast(Ops[0], 4731 llvm::VectorType::get(DoubleTy, 1)); 4732 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4733 "vdupd_lane"); 4734 case NEON::BI__builtin_neon_vgetq_lane_i64: 4735 case NEON::BI__builtin_neon_vdupd_laneq_i64: 4736 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::VectorType::get(Int64Ty, 2)); 4737 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4738 "vgetq_lane"); 4739 case NEON::BI__builtin_neon_vget_lane_f32: 4740 Ops[0] = Builder.CreateBitCast(Ops[0], 4741 llvm::VectorType::get(FloatTy, 2)); 4742 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4743 "vget_lane"); 4744 case NEON::BI__builtin_neon_vget_lane_f64: 4745 Ops[0] = Builder.CreateBitCast(Ops[0], 4746 llvm::VectorType::get(DoubleTy, 1)); 4747 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4748 "vget_lane"); 4749 case NEON::BI__builtin_neon_vgetq_lane_f32: 4750 case NEON::BI__builtin_neon_vdups_laneq_f32: 4751 Ops[0] = Builder.CreateBitCast(Ops[0], 4752 llvm::VectorType::get(FloatTy, 4)); 4753 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4754 "vgetq_lane"); 4755 case NEON::BI__builtin_neon_vgetq_lane_f64: 4756 case NEON::BI__builtin_neon_vdupd_laneq_f64: 4757 Ops[0] = Builder.CreateBitCast(Ops[0], 4758 llvm::VectorType::get(DoubleTy, 2)); 4759 return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), 4760 "vgetq_lane"); 4761 case NEON::BI__builtin_neon_vaddd_s64: 4762 case NEON::BI__builtin_neon_vaddd_u64: 4763 return Builder.CreateAdd(Ops[0], EmitScalarExpr(E->getArg(1)), "vaddd"); 4764 case NEON::BI__builtin_neon_vsubd_s64: 4765 case NEON::BI__builtin_neon_vsubd_u64: 4766 return Builder.CreateSub(Ops[0], EmitScalarExpr(E->getArg(1)), "vsubd"); 4767 case NEON::BI__builtin_neon_vqdmlalh_s16: 4768 case NEON::BI__builtin_neon_vqdmlslh_s16: { 4769 SmallVector<Value *, 2> ProductOps; 4770 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 4771 ProductOps.push_back(vectorWrapScalar16(EmitScalarExpr(E->getArg(2)))); 4772 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 4773 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 4774 ProductOps, "vqdmlXl"); 4775 Constant *CI = ConstantInt::get(SizeTy, 0); 4776 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 4777 4778 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlalh_s16 4779 ? Intrinsic::aarch64_neon_sqadd 4780 : Intrinsic::aarch64_neon_sqsub; 4781 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int32Ty), Ops, "vqdmlXl"); 4782 } 4783 case NEON::BI__builtin_neon_vqshlud_n_s64: { 4784 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4785 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 4786 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqshlu, Int64Ty), 4787 Ops, "vqshlu_n"); 4788 } 4789 case NEON::BI__builtin_neon_vqshld_n_u64: 4790 case NEON::BI__builtin_neon_vqshld_n_s64: { 4791 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vqshld_n_u64 4792 ? Intrinsic::aarch64_neon_uqshl 4793 : Intrinsic::aarch64_neon_sqshl; 4794 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4795 Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty); 4796 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vqshl_n"); 4797 } 4798 case NEON::BI__builtin_neon_vrshrd_n_u64: 4799 case NEON::BI__builtin_neon_vrshrd_n_s64: { 4800 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrshrd_n_u64 4801 ? Intrinsic::aarch64_neon_urshl 4802 : Intrinsic::aarch64_neon_srshl; 4803 Ops.push_back(EmitScalarExpr(E->getArg(1))); 4804 int SV = cast<ConstantInt>(Ops[1])->getSExtValue(); 4805 Ops[1] = ConstantInt::get(Int64Ty, -SV); 4806 return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vrshr_n"); 4807 } 4808 case NEON::BI__builtin_neon_vrsrad_n_u64: 4809 case NEON::BI__builtin_neon_vrsrad_n_s64: { 4810 unsigned Int = BuiltinID == NEON::BI__builtin_neon_vrsrad_n_u64 4811 ? Intrinsic::aarch64_neon_urshl 4812 : Intrinsic::aarch64_neon_srshl; 4813 Ops[1] = Builder.CreateBitCast(Ops[1], Int64Ty); 4814 Ops.push_back(Builder.CreateNeg(EmitScalarExpr(E->getArg(2)))); 4815 Ops[1] = Builder.CreateCall(CGM.getIntrinsic(Int, Int64Ty), 4816 {Ops[1], Builder.CreateSExt(Ops[2], Int64Ty)}); 4817 return Builder.CreateAdd(Ops[0], Builder.CreateBitCast(Ops[1], Int64Ty)); 4818 } 4819 case NEON::BI__builtin_neon_vshld_n_s64: 4820 case NEON::BI__builtin_neon_vshld_n_u64: { 4821 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 4822 return Builder.CreateShl( 4823 Ops[0], ConstantInt::get(Int64Ty, Amt->getZExtValue()), "shld_n"); 4824 } 4825 case NEON::BI__builtin_neon_vshrd_n_s64: { 4826 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 4827 return Builder.CreateAShr( 4828 Ops[0], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 4829 Amt->getZExtValue())), 4830 "shrd_n"); 4831 } 4832 case NEON::BI__builtin_neon_vshrd_n_u64: { 4833 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(1))); 4834 uint64_t ShiftAmt = Amt->getZExtValue(); 4835 // Right-shifting an unsigned value by its size yields 0. 4836 if (ShiftAmt == 64) 4837 return ConstantInt::get(Int64Ty, 0); 4838 return Builder.CreateLShr(Ops[0], ConstantInt::get(Int64Ty, ShiftAmt), 4839 "shrd_n"); 4840 } 4841 case NEON::BI__builtin_neon_vsrad_n_s64: { 4842 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 4843 Ops[1] = Builder.CreateAShr( 4844 Ops[1], ConstantInt::get(Int64Ty, std::min(static_cast<uint64_t>(63), 4845 Amt->getZExtValue())), 4846 "shrd_n"); 4847 return Builder.CreateAdd(Ops[0], Ops[1]); 4848 } 4849 case NEON::BI__builtin_neon_vsrad_n_u64: { 4850 llvm::ConstantInt *Amt = cast<ConstantInt>(EmitScalarExpr(E->getArg(2))); 4851 uint64_t ShiftAmt = Amt->getZExtValue(); 4852 // Right-shifting an unsigned value by its size yields 0. 4853 // As Op + 0 = Op, return Ops[0] directly. 4854 if (ShiftAmt == 64) 4855 return Ops[0]; 4856 Ops[1] = Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, ShiftAmt), 4857 "shrd_n"); 4858 return Builder.CreateAdd(Ops[0], Ops[1]); 4859 } 4860 case NEON::BI__builtin_neon_vqdmlalh_lane_s16: 4861 case NEON::BI__builtin_neon_vqdmlalh_laneq_s16: 4862 case NEON::BI__builtin_neon_vqdmlslh_lane_s16: 4863 case NEON::BI__builtin_neon_vqdmlslh_laneq_s16: { 4864 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 4865 "lane"); 4866 SmallVector<Value *, 2> ProductOps; 4867 ProductOps.push_back(vectorWrapScalar16(Ops[1])); 4868 ProductOps.push_back(vectorWrapScalar16(Ops[2])); 4869 llvm::Type *VTy = llvm::VectorType::get(Int32Ty, 4); 4870 Ops[1] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmull, VTy), 4871 ProductOps, "vqdmlXl"); 4872 Constant *CI = ConstantInt::get(SizeTy, 0); 4873 Ops[1] = Builder.CreateExtractElement(Ops[1], CI, "lane0"); 4874 Ops.pop_back(); 4875 4876 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlalh_lane_s16 || 4877 BuiltinID == NEON::BI__builtin_neon_vqdmlalh_laneq_s16) 4878 ? Intrinsic::aarch64_neon_sqadd 4879 : Intrinsic::aarch64_neon_sqsub; 4880 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int32Ty), Ops, "vqdmlXl"); 4881 } 4882 case NEON::BI__builtin_neon_vqdmlals_s32: 4883 case NEON::BI__builtin_neon_vqdmlsls_s32: { 4884 SmallVector<Value *, 2> ProductOps; 4885 ProductOps.push_back(Ops[1]); 4886 ProductOps.push_back(EmitScalarExpr(E->getArg(2))); 4887 Ops[1] = 4888 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 4889 ProductOps, "vqdmlXl"); 4890 4891 unsigned AccumInt = BuiltinID == NEON::BI__builtin_neon_vqdmlals_s32 4892 ? Intrinsic::aarch64_neon_sqadd 4893 : Intrinsic::aarch64_neon_sqsub; 4894 return EmitNeonCall(CGM.getIntrinsic(AccumInt, Int64Ty), Ops, "vqdmlXl"); 4895 } 4896 case NEON::BI__builtin_neon_vqdmlals_lane_s32: 4897 case NEON::BI__builtin_neon_vqdmlals_laneq_s32: 4898 case NEON::BI__builtin_neon_vqdmlsls_lane_s32: 4899 case NEON::BI__builtin_neon_vqdmlsls_laneq_s32: { 4900 Ops[2] = Builder.CreateExtractElement(Ops[2], EmitScalarExpr(E->getArg(3)), 4901 "lane"); 4902 SmallVector<Value *, 2> ProductOps; 4903 ProductOps.push_back(Ops[1]); 4904 ProductOps.push_back(Ops[2]); 4905 Ops[1] = 4906 EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_sqdmulls_scalar), 4907 ProductOps, "vqdmlXl"); 4908 Ops.pop_back(); 4909 4910 unsigned AccInt = (BuiltinID == NEON::BI__builtin_neon_vqdmlals_lane_s32 || 4911 BuiltinID == NEON::BI__builtin_neon_vqdmlals_laneq_s32) 4912 ? Intrinsic::aarch64_neon_sqadd 4913 : Intrinsic::aarch64_neon_sqsub; 4914 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl"); 4915 } 4916 } 4917 4918 llvm::VectorType *VTy = GetNeonType(this, Type); 4919 llvm::Type *Ty = VTy; 4920 if (!Ty) 4921 return nullptr; 4922 4923 // Not all intrinsics handled by the common case work for AArch64 yet, so only 4924 // defer to common code if it's been added to our special map. 4925 Builtin = findNeonIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID, 4926 AArch64SIMDIntrinsicsProvenSorted); 4927 4928 if (Builtin) 4929 return EmitCommonNeonBuiltinExpr( 4930 Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic, 4931 Builtin->NameHint, Builtin->TypeModifier, E, Ops, 4932 /*never use addresses*/ Address::invalid(), Address::invalid()); 4933 4934 if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops)) 4935 return V; 4936 4937 unsigned Int; 4938 switch (BuiltinID) { 4939 default: return nullptr; 4940 case NEON::BI__builtin_neon_vbsl_v: 4941 case NEON::BI__builtin_neon_vbslq_v: { 4942 llvm::Type *BitTy = llvm::VectorType::getInteger(VTy); 4943 Ops[0] = Builder.CreateBitCast(Ops[0], BitTy, "vbsl"); 4944 Ops[1] = Builder.CreateBitCast(Ops[1], BitTy, "vbsl"); 4945 Ops[2] = Builder.CreateBitCast(Ops[2], BitTy, "vbsl"); 4946 4947 Ops[1] = Builder.CreateAnd(Ops[0], Ops[1], "vbsl"); 4948 Ops[2] = Builder.CreateAnd(Builder.CreateNot(Ops[0]), Ops[2], "vbsl"); 4949 Ops[0] = Builder.CreateOr(Ops[1], Ops[2], "vbsl"); 4950 return Builder.CreateBitCast(Ops[0], Ty); 4951 } 4952 case NEON::BI__builtin_neon_vfma_lane_v: 4953 case NEON::BI__builtin_neon_vfmaq_lane_v: { // Only used for FP types 4954 // The ARM builtins (and instructions) have the addend as the first 4955 // operand, but the 'fma' intrinsics have it last. Swap it around here. 4956 Value *Addend = Ops[0]; 4957 Value *Multiplicand = Ops[1]; 4958 Value *LaneSource = Ops[2]; 4959 Ops[0] = Multiplicand; 4960 Ops[1] = LaneSource; 4961 Ops[2] = Addend; 4962 4963 // Now adjust things to handle the lane access. 4964 llvm::Type *SourceTy = BuiltinID == NEON::BI__builtin_neon_vfmaq_lane_v ? 4965 llvm::VectorType::get(VTy->getElementType(), VTy->getNumElements() / 2) : 4966 VTy; 4967 llvm::Constant *cst = cast<Constant>(Ops[3]); 4968 Value *SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), cst); 4969 Ops[1] = Builder.CreateBitCast(Ops[1], SourceTy); 4970 Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV, "lane"); 4971 4972 Ops.pop_back(); 4973 Int = Intrinsic::fma; 4974 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmla"); 4975 } 4976 case NEON::BI__builtin_neon_vfma_laneq_v: { 4977 llvm::VectorType *VTy = cast<llvm::VectorType>(Ty); 4978 // v1f64 fma should be mapped to Neon scalar f64 fma 4979 if (VTy && VTy->getElementType() == DoubleTy) { 4980 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 4981 Ops[1] = Builder.CreateBitCast(Ops[1], DoubleTy); 4982 llvm::Type *VTy = GetNeonType(this, 4983 NeonTypeFlags(NeonTypeFlags::Float64, false, true)); 4984 Ops[2] = Builder.CreateBitCast(Ops[2], VTy); 4985 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 4986 Value *F = CGM.getIntrinsic(Intrinsic::fma, DoubleTy); 4987 Value *Result = Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 4988 return Builder.CreateBitCast(Result, Ty); 4989 } 4990 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 4991 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 4992 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 4993 4994 llvm::Type *STy = llvm::VectorType::get(VTy->getElementType(), 4995 VTy->getNumElements() * 2); 4996 Ops[2] = Builder.CreateBitCast(Ops[2], STy); 4997 Value* SV = llvm::ConstantVector::getSplat(VTy->getNumElements(), 4998 cast<ConstantInt>(Ops[3])); 4999 Ops[2] = Builder.CreateShuffleVector(Ops[2], Ops[2], SV, "lane"); 5000 5001 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 5002 } 5003 case NEON::BI__builtin_neon_vfmaq_laneq_v: { 5004 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5005 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5006 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5007 5008 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5009 Ops[2] = EmitNeonSplat(Ops[2], cast<ConstantInt>(Ops[3])); 5010 return Builder.CreateCall(F, {Ops[2], Ops[1], Ops[0]}); 5011 } 5012 case NEON::BI__builtin_neon_vfmas_lane_f32: 5013 case NEON::BI__builtin_neon_vfmas_laneq_f32: 5014 case NEON::BI__builtin_neon_vfmad_lane_f64: 5015 case NEON::BI__builtin_neon_vfmad_laneq_f64: { 5016 Ops.push_back(EmitScalarExpr(E->getArg(3))); 5017 llvm::Type *Ty = ConvertType(E->getCallReturnType(getContext())); 5018 Value *F = CGM.getIntrinsic(Intrinsic::fma, Ty); 5019 Ops[2] = Builder.CreateExtractElement(Ops[2], Ops[3], "extract"); 5020 return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]}); 5021 } 5022 case NEON::BI__builtin_neon_vfms_v: 5023 case NEON::BI__builtin_neon_vfmsq_v: { // Only used for FP types 5024 // FIXME: probably remove when we no longer support aarch64_simd.h 5025 // (arm_neon.h delegates to vfma). 5026 5027 // The ARM builtins (and instructions) have the addend as the first 5028 // operand, but the 'fma' intrinsics have it last. Swap it around here. 5029 Value *Subtrahend = Ops[0]; 5030 Value *Multiplicand = Ops[2]; 5031 Ops[0] = Multiplicand; 5032 Ops[2] = Subtrahend; 5033 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 5034 Ops[1] = Builder.CreateFNeg(Ops[1]); 5035 Int = Intrinsic::fma; 5036 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "fmls"); 5037 } 5038 case NEON::BI__builtin_neon_vmull_v: 5039 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5040 Int = usgn ? Intrinsic::aarch64_neon_umull : Intrinsic::aarch64_neon_smull; 5041 if (Type.isPoly()) Int = Intrinsic::aarch64_neon_pmull; 5042 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmull"); 5043 case NEON::BI__builtin_neon_vmax_v: 5044 case NEON::BI__builtin_neon_vmaxq_v: 5045 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5046 Int = usgn ? Intrinsic::aarch64_neon_umax : Intrinsic::aarch64_neon_smax; 5047 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmax; 5048 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmax"); 5049 case NEON::BI__builtin_neon_vmin_v: 5050 case NEON::BI__builtin_neon_vminq_v: 5051 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5052 Int = usgn ? Intrinsic::aarch64_neon_umin : Intrinsic::aarch64_neon_smin; 5053 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmin; 5054 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmin"); 5055 case NEON::BI__builtin_neon_vabd_v: 5056 case NEON::BI__builtin_neon_vabdq_v: 5057 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5058 Int = usgn ? Intrinsic::aarch64_neon_uabd : Intrinsic::aarch64_neon_sabd; 5059 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fabd; 5060 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vabd"); 5061 case NEON::BI__builtin_neon_vpadal_v: 5062 case NEON::BI__builtin_neon_vpadalq_v: { 5063 unsigned ArgElts = VTy->getNumElements(); 5064 llvm::IntegerType *EltTy = cast<IntegerType>(VTy->getElementType()); 5065 unsigned BitWidth = EltTy->getBitWidth(); 5066 llvm::Type *ArgTy = llvm::VectorType::get( 5067 llvm::IntegerType::get(getLLVMContext(), BitWidth/2), 2*ArgElts); 5068 llvm::Type* Tys[2] = { VTy, ArgTy }; 5069 Int = usgn ? Intrinsic::aarch64_neon_uaddlp : Intrinsic::aarch64_neon_saddlp; 5070 SmallVector<llvm::Value*, 1> TmpOps; 5071 TmpOps.push_back(Ops[1]); 5072 Function *F = CGM.getIntrinsic(Int, Tys); 5073 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vpadal"); 5074 llvm::Value *addend = Builder.CreateBitCast(Ops[0], tmp->getType()); 5075 return Builder.CreateAdd(tmp, addend); 5076 } 5077 case NEON::BI__builtin_neon_vpmin_v: 5078 case NEON::BI__builtin_neon_vpminq_v: 5079 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5080 Int = usgn ? Intrinsic::aarch64_neon_uminp : Intrinsic::aarch64_neon_sminp; 5081 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fminp; 5082 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmin"); 5083 case NEON::BI__builtin_neon_vpmax_v: 5084 case NEON::BI__builtin_neon_vpmaxq_v: 5085 // FIXME: improve sharing scheme to cope with 3 alternative LLVM intrinsics. 5086 Int = usgn ? Intrinsic::aarch64_neon_umaxp : Intrinsic::aarch64_neon_smaxp; 5087 if (Ty->isFPOrFPVectorTy()) Int = Intrinsic::aarch64_neon_fmaxp; 5088 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmax"); 5089 case NEON::BI__builtin_neon_vminnm_v: 5090 case NEON::BI__builtin_neon_vminnmq_v: 5091 Int = Intrinsic::aarch64_neon_fminnm; 5092 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vminnm"); 5093 case NEON::BI__builtin_neon_vmaxnm_v: 5094 case NEON::BI__builtin_neon_vmaxnmq_v: 5095 Int = Intrinsic::aarch64_neon_fmaxnm; 5096 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmaxnm"); 5097 case NEON::BI__builtin_neon_vrecpss_f32: { 5098 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5099 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, FloatTy), 5100 Ops, "vrecps"); 5101 } 5102 case NEON::BI__builtin_neon_vrecpsd_f64: { 5103 Ops.push_back(EmitScalarExpr(E->getArg(1))); 5104 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_frecps, DoubleTy), 5105 Ops, "vrecps"); 5106 } 5107 case NEON::BI__builtin_neon_vqshrun_n_v: 5108 Int = Intrinsic::aarch64_neon_sqshrun; 5109 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrun_n"); 5110 case NEON::BI__builtin_neon_vqrshrun_n_v: 5111 Int = Intrinsic::aarch64_neon_sqrshrun; 5112 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrun_n"); 5113 case NEON::BI__builtin_neon_vqshrn_n_v: 5114 Int = usgn ? Intrinsic::aarch64_neon_uqshrn : Intrinsic::aarch64_neon_sqshrn; 5115 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqshrn_n"); 5116 case NEON::BI__builtin_neon_vrshrn_n_v: 5117 Int = Intrinsic::aarch64_neon_rshrn; 5118 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrshrn_n"); 5119 case NEON::BI__builtin_neon_vqrshrn_n_v: 5120 Int = usgn ? Intrinsic::aarch64_neon_uqrshrn : Intrinsic::aarch64_neon_sqrshrn; 5121 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vqrshrn_n"); 5122 case NEON::BI__builtin_neon_vrnda_v: 5123 case NEON::BI__builtin_neon_vrndaq_v: { 5124 Int = Intrinsic::round; 5125 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrnda"); 5126 } 5127 case NEON::BI__builtin_neon_vrndi_v: 5128 case NEON::BI__builtin_neon_vrndiq_v: { 5129 Int = Intrinsic::nearbyint; 5130 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndi"); 5131 } 5132 case NEON::BI__builtin_neon_vrndm_v: 5133 case NEON::BI__builtin_neon_vrndmq_v: { 5134 Int = Intrinsic::floor; 5135 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndm"); 5136 } 5137 case NEON::BI__builtin_neon_vrndn_v: 5138 case NEON::BI__builtin_neon_vrndnq_v: { 5139 Int = Intrinsic::aarch64_neon_frintn; 5140 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndn"); 5141 } 5142 case NEON::BI__builtin_neon_vrndp_v: 5143 case NEON::BI__builtin_neon_vrndpq_v: { 5144 Int = Intrinsic::ceil; 5145 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndp"); 5146 } 5147 case NEON::BI__builtin_neon_vrndx_v: 5148 case NEON::BI__builtin_neon_vrndxq_v: { 5149 Int = Intrinsic::rint; 5150 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndx"); 5151 } 5152 case NEON::BI__builtin_neon_vrnd_v: 5153 case NEON::BI__builtin_neon_vrndq_v: { 5154 Int = Intrinsic::trunc; 5155 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrndz"); 5156 } 5157 case NEON::BI__builtin_neon_vceqz_v: 5158 case NEON::BI__builtin_neon_vceqzq_v: 5159 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OEQ, 5160 ICmpInst::ICMP_EQ, "vceqz"); 5161 case NEON::BI__builtin_neon_vcgez_v: 5162 case NEON::BI__builtin_neon_vcgezq_v: 5163 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGE, 5164 ICmpInst::ICMP_SGE, "vcgez"); 5165 case NEON::BI__builtin_neon_vclez_v: 5166 case NEON::BI__builtin_neon_vclezq_v: 5167 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLE, 5168 ICmpInst::ICMP_SLE, "vclez"); 5169 case NEON::BI__builtin_neon_vcgtz_v: 5170 case NEON::BI__builtin_neon_vcgtzq_v: 5171 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OGT, 5172 ICmpInst::ICMP_SGT, "vcgtz"); 5173 case NEON::BI__builtin_neon_vcltz_v: 5174 case NEON::BI__builtin_neon_vcltzq_v: 5175 return EmitAArch64CompareBuiltinExpr(Ops[0], Ty, ICmpInst::FCMP_OLT, 5176 ICmpInst::ICMP_SLT, "vcltz"); 5177 case NEON::BI__builtin_neon_vcvt_f64_v: 5178 case NEON::BI__builtin_neon_vcvtq_f64_v: 5179 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5180 Ty = GetNeonType(this, NeonTypeFlags(NeonTypeFlags::Float64, false, quad)); 5181 return usgn ? Builder.CreateUIToFP(Ops[0], Ty, "vcvt") 5182 : Builder.CreateSIToFP(Ops[0], Ty, "vcvt"); 5183 case NEON::BI__builtin_neon_vcvt_f64_f32: { 5184 assert(Type.getEltType() == NeonTypeFlags::Float64 && quad && 5185 "unexpected vcvt_f64_f32 builtin"); 5186 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float32, false, false); 5187 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 5188 5189 return Builder.CreateFPExt(Ops[0], Ty, "vcvt"); 5190 } 5191 case NEON::BI__builtin_neon_vcvt_f32_f64: { 5192 assert(Type.getEltType() == NeonTypeFlags::Float32 && 5193 "unexpected vcvt_f32_f64 builtin"); 5194 NeonTypeFlags SrcFlag = NeonTypeFlags(NeonTypeFlags::Float64, false, true); 5195 Ops[0] = Builder.CreateBitCast(Ops[0], GetNeonType(this, SrcFlag)); 5196 5197 return Builder.CreateFPTrunc(Ops[0], Ty, "vcvt"); 5198 } 5199 case NEON::BI__builtin_neon_vcvt_s32_v: 5200 case NEON::BI__builtin_neon_vcvt_u32_v: 5201 case NEON::BI__builtin_neon_vcvt_s64_v: 5202 case NEON::BI__builtin_neon_vcvt_u64_v: 5203 case NEON::BI__builtin_neon_vcvtq_s32_v: 5204 case NEON::BI__builtin_neon_vcvtq_u32_v: 5205 case NEON::BI__builtin_neon_vcvtq_s64_v: 5206 case NEON::BI__builtin_neon_vcvtq_u64_v: { 5207 Ops[0] = Builder.CreateBitCast(Ops[0], GetFloatNeonType(this, Type)); 5208 if (usgn) 5209 return Builder.CreateFPToUI(Ops[0], Ty); 5210 return Builder.CreateFPToSI(Ops[0], Ty); 5211 } 5212 case NEON::BI__builtin_neon_vcvta_s32_v: 5213 case NEON::BI__builtin_neon_vcvtaq_s32_v: 5214 case NEON::BI__builtin_neon_vcvta_u32_v: 5215 case NEON::BI__builtin_neon_vcvtaq_u32_v: 5216 case NEON::BI__builtin_neon_vcvta_s64_v: 5217 case NEON::BI__builtin_neon_vcvtaq_s64_v: 5218 case NEON::BI__builtin_neon_vcvta_u64_v: 5219 case NEON::BI__builtin_neon_vcvtaq_u64_v: { 5220 Int = usgn ? Intrinsic::aarch64_neon_fcvtau : Intrinsic::aarch64_neon_fcvtas; 5221 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5222 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvta"); 5223 } 5224 case NEON::BI__builtin_neon_vcvtm_s32_v: 5225 case NEON::BI__builtin_neon_vcvtmq_s32_v: 5226 case NEON::BI__builtin_neon_vcvtm_u32_v: 5227 case NEON::BI__builtin_neon_vcvtmq_u32_v: 5228 case NEON::BI__builtin_neon_vcvtm_s64_v: 5229 case NEON::BI__builtin_neon_vcvtmq_s64_v: 5230 case NEON::BI__builtin_neon_vcvtm_u64_v: 5231 case NEON::BI__builtin_neon_vcvtmq_u64_v: { 5232 Int = usgn ? Intrinsic::aarch64_neon_fcvtmu : Intrinsic::aarch64_neon_fcvtms; 5233 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5234 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtm"); 5235 } 5236 case NEON::BI__builtin_neon_vcvtn_s32_v: 5237 case NEON::BI__builtin_neon_vcvtnq_s32_v: 5238 case NEON::BI__builtin_neon_vcvtn_u32_v: 5239 case NEON::BI__builtin_neon_vcvtnq_u32_v: 5240 case NEON::BI__builtin_neon_vcvtn_s64_v: 5241 case NEON::BI__builtin_neon_vcvtnq_s64_v: 5242 case NEON::BI__builtin_neon_vcvtn_u64_v: 5243 case NEON::BI__builtin_neon_vcvtnq_u64_v: { 5244 Int = usgn ? Intrinsic::aarch64_neon_fcvtnu : Intrinsic::aarch64_neon_fcvtns; 5245 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5246 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtn"); 5247 } 5248 case NEON::BI__builtin_neon_vcvtp_s32_v: 5249 case NEON::BI__builtin_neon_vcvtpq_s32_v: 5250 case NEON::BI__builtin_neon_vcvtp_u32_v: 5251 case NEON::BI__builtin_neon_vcvtpq_u32_v: 5252 case NEON::BI__builtin_neon_vcvtp_s64_v: 5253 case NEON::BI__builtin_neon_vcvtpq_s64_v: 5254 case NEON::BI__builtin_neon_vcvtp_u64_v: 5255 case NEON::BI__builtin_neon_vcvtpq_u64_v: { 5256 Int = usgn ? Intrinsic::aarch64_neon_fcvtpu : Intrinsic::aarch64_neon_fcvtps; 5257 llvm::Type *Tys[2] = { Ty, GetFloatNeonType(this, Type) }; 5258 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vcvtp"); 5259 } 5260 case NEON::BI__builtin_neon_vmulx_v: 5261 case NEON::BI__builtin_neon_vmulxq_v: { 5262 Int = Intrinsic::aarch64_neon_fmulx; 5263 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vmulx"); 5264 } 5265 case NEON::BI__builtin_neon_vmul_lane_v: 5266 case NEON::BI__builtin_neon_vmul_laneq_v: { 5267 // v1f64 vmul_lane should be mapped to Neon scalar mul lane 5268 bool Quad = false; 5269 if (BuiltinID == NEON::BI__builtin_neon_vmul_laneq_v) 5270 Quad = true; 5271 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5272 llvm::Type *VTy = GetNeonType(this, 5273 NeonTypeFlags(NeonTypeFlags::Float64, false, Quad)); 5274 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 5275 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2], "extract"); 5276 Value *Result = Builder.CreateFMul(Ops[0], Ops[1]); 5277 return Builder.CreateBitCast(Result, Ty); 5278 } 5279 case NEON::BI__builtin_neon_vnegd_s64: 5280 return Builder.CreateNeg(EmitScalarExpr(E->getArg(0)), "vnegd"); 5281 case NEON::BI__builtin_neon_vpmaxnm_v: 5282 case NEON::BI__builtin_neon_vpmaxnmq_v: { 5283 Int = Intrinsic::aarch64_neon_fmaxnmp; 5284 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpmaxnm"); 5285 } 5286 case NEON::BI__builtin_neon_vpminnm_v: 5287 case NEON::BI__builtin_neon_vpminnmq_v: { 5288 Int = Intrinsic::aarch64_neon_fminnmp; 5289 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vpminnm"); 5290 } 5291 case NEON::BI__builtin_neon_vsqrt_v: 5292 case NEON::BI__builtin_neon_vsqrtq_v: { 5293 Int = Intrinsic::sqrt; 5294 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5295 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqrt"); 5296 } 5297 case NEON::BI__builtin_neon_vrbit_v: 5298 case NEON::BI__builtin_neon_vrbitq_v: { 5299 Int = Intrinsic::aarch64_neon_rbit; 5300 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vrbit"); 5301 } 5302 case NEON::BI__builtin_neon_vaddv_u8: 5303 // FIXME: These are handled by the AArch64 scalar code. 5304 usgn = true; 5305 // FALLTHROUGH 5306 case NEON::BI__builtin_neon_vaddv_s8: { 5307 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5308 Ty = Int32Ty; 5309 VTy = llvm::VectorType::get(Int8Ty, 8); 5310 llvm::Type *Tys[2] = { Ty, VTy }; 5311 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5312 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5313 return Builder.CreateTrunc(Ops[0], Int8Ty); 5314 } 5315 case NEON::BI__builtin_neon_vaddv_u16: 5316 usgn = true; 5317 // FALLTHROUGH 5318 case NEON::BI__builtin_neon_vaddv_s16: { 5319 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5320 Ty = Int32Ty; 5321 VTy = llvm::VectorType::get(Int16Ty, 4); 5322 llvm::Type *Tys[2] = { Ty, VTy }; 5323 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5324 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5325 return Builder.CreateTrunc(Ops[0], Int16Ty); 5326 } 5327 case NEON::BI__builtin_neon_vaddvq_u8: 5328 usgn = true; 5329 // FALLTHROUGH 5330 case NEON::BI__builtin_neon_vaddvq_s8: { 5331 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5332 Ty = Int32Ty; 5333 VTy = llvm::VectorType::get(Int8Ty, 16); 5334 llvm::Type *Tys[2] = { Ty, VTy }; 5335 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5336 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5337 return Builder.CreateTrunc(Ops[0], Int8Ty); 5338 } 5339 case NEON::BI__builtin_neon_vaddvq_u16: 5340 usgn = true; 5341 // FALLTHROUGH 5342 case NEON::BI__builtin_neon_vaddvq_s16: { 5343 Int = usgn ? Intrinsic::aarch64_neon_uaddv : Intrinsic::aarch64_neon_saddv; 5344 Ty = Int32Ty; 5345 VTy = llvm::VectorType::get(Int16Ty, 8); 5346 llvm::Type *Tys[2] = { Ty, VTy }; 5347 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5348 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddv"); 5349 return Builder.CreateTrunc(Ops[0], Int16Ty); 5350 } 5351 case NEON::BI__builtin_neon_vmaxv_u8: { 5352 Int = Intrinsic::aarch64_neon_umaxv; 5353 Ty = Int32Ty; 5354 VTy = llvm::VectorType::get(Int8Ty, 8); 5355 llvm::Type *Tys[2] = { Ty, VTy }; 5356 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5357 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5358 return Builder.CreateTrunc(Ops[0], Int8Ty); 5359 } 5360 case NEON::BI__builtin_neon_vmaxv_u16: { 5361 Int = Intrinsic::aarch64_neon_umaxv; 5362 Ty = Int32Ty; 5363 VTy = llvm::VectorType::get(Int16Ty, 4); 5364 llvm::Type *Tys[2] = { Ty, VTy }; 5365 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5366 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5367 return Builder.CreateTrunc(Ops[0], Int16Ty); 5368 } 5369 case NEON::BI__builtin_neon_vmaxvq_u8: { 5370 Int = Intrinsic::aarch64_neon_umaxv; 5371 Ty = Int32Ty; 5372 VTy = llvm::VectorType::get(Int8Ty, 16); 5373 llvm::Type *Tys[2] = { Ty, VTy }; 5374 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5375 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5376 return Builder.CreateTrunc(Ops[0], Int8Ty); 5377 } 5378 case NEON::BI__builtin_neon_vmaxvq_u16: { 5379 Int = Intrinsic::aarch64_neon_umaxv; 5380 Ty = Int32Ty; 5381 VTy = llvm::VectorType::get(Int16Ty, 8); 5382 llvm::Type *Tys[2] = { Ty, VTy }; 5383 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5384 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5385 return Builder.CreateTrunc(Ops[0], Int16Ty); 5386 } 5387 case NEON::BI__builtin_neon_vmaxv_s8: { 5388 Int = Intrinsic::aarch64_neon_smaxv; 5389 Ty = Int32Ty; 5390 VTy = llvm::VectorType::get(Int8Ty, 8); 5391 llvm::Type *Tys[2] = { Ty, VTy }; 5392 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5393 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5394 return Builder.CreateTrunc(Ops[0], Int8Ty); 5395 } 5396 case NEON::BI__builtin_neon_vmaxv_s16: { 5397 Int = Intrinsic::aarch64_neon_smaxv; 5398 Ty = Int32Ty; 5399 VTy = llvm::VectorType::get(Int16Ty, 4); 5400 llvm::Type *Tys[2] = { Ty, VTy }; 5401 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5402 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5403 return Builder.CreateTrunc(Ops[0], Int16Ty); 5404 } 5405 case NEON::BI__builtin_neon_vmaxvq_s8: { 5406 Int = Intrinsic::aarch64_neon_smaxv; 5407 Ty = Int32Ty; 5408 VTy = llvm::VectorType::get(Int8Ty, 16); 5409 llvm::Type *Tys[2] = { Ty, VTy }; 5410 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5411 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5412 return Builder.CreateTrunc(Ops[0], Int8Ty); 5413 } 5414 case NEON::BI__builtin_neon_vmaxvq_s16: { 5415 Int = Intrinsic::aarch64_neon_smaxv; 5416 Ty = Int32Ty; 5417 VTy = llvm::VectorType::get(Int16Ty, 8); 5418 llvm::Type *Tys[2] = { Ty, VTy }; 5419 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5420 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vmaxv"); 5421 return Builder.CreateTrunc(Ops[0], Int16Ty); 5422 } 5423 case NEON::BI__builtin_neon_vminv_u8: { 5424 Int = Intrinsic::aarch64_neon_uminv; 5425 Ty = Int32Ty; 5426 VTy = llvm::VectorType::get(Int8Ty, 8); 5427 llvm::Type *Tys[2] = { Ty, VTy }; 5428 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5429 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5430 return Builder.CreateTrunc(Ops[0], Int8Ty); 5431 } 5432 case NEON::BI__builtin_neon_vminv_u16: { 5433 Int = Intrinsic::aarch64_neon_uminv; 5434 Ty = Int32Ty; 5435 VTy = llvm::VectorType::get(Int16Ty, 4); 5436 llvm::Type *Tys[2] = { Ty, VTy }; 5437 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5438 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5439 return Builder.CreateTrunc(Ops[0], Int16Ty); 5440 } 5441 case NEON::BI__builtin_neon_vminvq_u8: { 5442 Int = Intrinsic::aarch64_neon_uminv; 5443 Ty = Int32Ty; 5444 VTy = llvm::VectorType::get(Int8Ty, 16); 5445 llvm::Type *Tys[2] = { Ty, VTy }; 5446 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5447 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5448 return Builder.CreateTrunc(Ops[0], Int8Ty); 5449 } 5450 case NEON::BI__builtin_neon_vminvq_u16: { 5451 Int = Intrinsic::aarch64_neon_uminv; 5452 Ty = Int32Ty; 5453 VTy = llvm::VectorType::get(Int16Ty, 8); 5454 llvm::Type *Tys[2] = { Ty, VTy }; 5455 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5456 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5457 return Builder.CreateTrunc(Ops[0], Int16Ty); 5458 } 5459 case NEON::BI__builtin_neon_vminv_s8: { 5460 Int = Intrinsic::aarch64_neon_sminv; 5461 Ty = Int32Ty; 5462 VTy = llvm::VectorType::get(Int8Ty, 8); 5463 llvm::Type *Tys[2] = { Ty, VTy }; 5464 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5465 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5466 return Builder.CreateTrunc(Ops[0], Int8Ty); 5467 } 5468 case NEON::BI__builtin_neon_vminv_s16: { 5469 Int = Intrinsic::aarch64_neon_sminv; 5470 Ty = Int32Ty; 5471 VTy = llvm::VectorType::get(Int16Ty, 4); 5472 llvm::Type *Tys[2] = { Ty, VTy }; 5473 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5474 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5475 return Builder.CreateTrunc(Ops[0], Int16Ty); 5476 } 5477 case NEON::BI__builtin_neon_vminvq_s8: { 5478 Int = Intrinsic::aarch64_neon_sminv; 5479 Ty = Int32Ty; 5480 VTy = llvm::VectorType::get(Int8Ty, 16); 5481 llvm::Type *Tys[2] = { Ty, VTy }; 5482 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5483 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5484 return Builder.CreateTrunc(Ops[0], Int8Ty); 5485 } 5486 case NEON::BI__builtin_neon_vminvq_s16: { 5487 Int = Intrinsic::aarch64_neon_sminv; 5488 Ty = Int32Ty; 5489 VTy = llvm::VectorType::get(Int16Ty, 8); 5490 llvm::Type *Tys[2] = { Ty, VTy }; 5491 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5492 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vminv"); 5493 return Builder.CreateTrunc(Ops[0], Int16Ty); 5494 } 5495 case NEON::BI__builtin_neon_vmul_n_f64: { 5496 Ops[0] = Builder.CreateBitCast(Ops[0], DoubleTy); 5497 Value *RHS = Builder.CreateBitCast(EmitScalarExpr(E->getArg(1)), DoubleTy); 5498 return Builder.CreateFMul(Ops[0], RHS); 5499 } 5500 case NEON::BI__builtin_neon_vaddlv_u8: { 5501 Int = Intrinsic::aarch64_neon_uaddlv; 5502 Ty = Int32Ty; 5503 VTy = llvm::VectorType::get(Int8Ty, 8); 5504 llvm::Type *Tys[2] = { Ty, VTy }; 5505 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5506 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5507 return Builder.CreateTrunc(Ops[0], Int16Ty); 5508 } 5509 case NEON::BI__builtin_neon_vaddlv_u16: { 5510 Int = Intrinsic::aarch64_neon_uaddlv; 5511 Ty = Int32Ty; 5512 VTy = llvm::VectorType::get(Int16Ty, 4); 5513 llvm::Type *Tys[2] = { Ty, VTy }; 5514 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5515 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5516 } 5517 case NEON::BI__builtin_neon_vaddlvq_u8: { 5518 Int = Intrinsic::aarch64_neon_uaddlv; 5519 Ty = Int32Ty; 5520 VTy = llvm::VectorType::get(Int8Ty, 16); 5521 llvm::Type *Tys[2] = { Ty, VTy }; 5522 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5523 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5524 return Builder.CreateTrunc(Ops[0], Int16Ty); 5525 } 5526 case NEON::BI__builtin_neon_vaddlvq_u16: { 5527 Int = Intrinsic::aarch64_neon_uaddlv; 5528 Ty = Int32Ty; 5529 VTy = llvm::VectorType::get(Int16Ty, 8); 5530 llvm::Type *Tys[2] = { Ty, VTy }; 5531 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5532 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5533 } 5534 case NEON::BI__builtin_neon_vaddlv_s8: { 5535 Int = Intrinsic::aarch64_neon_saddlv; 5536 Ty = Int32Ty; 5537 VTy = llvm::VectorType::get(Int8Ty, 8); 5538 llvm::Type *Tys[2] = { Ty, VTy }; 5539 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5540 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5541 return Builder.CreateTrunc(Ops[0], Int16Ty); 5542 } 5543 case NEON::BI__builtin_neon_vaddlv_s16: { 5544 Int = Intrinsic::aarch64_neon_saddlv; 5545 Ty = Int32Ty; 5546 VTy = llvm::VectorType::get(Int16Ty, 4); 5547 llvm::Type *Tys[2] = { Ty, VTy }; 5548 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5549 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5550 } 5551 case NEON::BI__builtin_neon_vaddlvq_s8: { 5552 Int = Intrinsic::aarch64_neon_saddlv; 5553 Ty = Int32Ty; 5554 VTy = llvm::VectorType::get(Int8Ty, 16); 5555 llvm::Type *Tys[2] = { Ty, VTy }; 5556 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5557 Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5558 return Builder.CreateTrunc(Ops[0], Int16Ty); 5559 } 5560 case NEON::BI__builtin_neon_vaddlvq_s16: { 5561 Int = Intrinsic::aarch64_neon_saddlv; 5562 Ty = Int32Ty; 5563 VTy = llvm::VectorType::get(Int16Ty, 8); 5564 llvm::Type *Tys[2] = { Ty, VTy }; 5565 Ops.push_back(EmitScalarExpr(E->getArg(0))); 5566 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vaddlv"); 5567 } 5568 case NEON::BI__builtin_neon_vsri_n_v: 5569 case NEON::BI__builtin_neon_vsriq_n_v: { 5570 Int = Intrinsic::aarch64_neon_vsri; 5571 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 5572 return EmitNeonCall(Intrin, Ops, "vsri_n"); 5573 } 5574 case NEON::BI__builtin_neon_vsli_n_v: 5575 case NEON::BI__builtin_neon_vsliq_n_v: { 5576 Int = Intrinsic::aarch64_neon_vsli; 5577 llvm::Function *Intrin = CGM.getIntrinsic(Int, Ty); 5578 return EmitNeonCall(Intrin, Ops, "vsli_n"); 5579 } 5580 case NEON::BI__builtin_neon_vsra_n_v: 5581 case NEON::BI__builtin_neon_vsraq_n_v: 5582 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5583 Ops[1] = EmitNeonRShiftImm(Ops[1], Ops[2], Ty, usgn, "vsra_n"); 5584 return Builder.CreateAdd(Ops[0], Ops[1]); 5585 case NEON::BI__builtin_neon_vrsra_n_v: 5586 case NEON::BI__builtin_neon_vrsraq_n_v: { 5587 Int = usgn ? Intrinsic::aarch64_neon_urshl : Intrinsic::aarch64_neon_srshl; 5588 SmallVector<llvm::Value*,2> TmpOps; 5589 TmpOps.push_back(Ops[1]); 5590 TmpOps.push_back(Ops[2]); 5591 Function* F = CGM.getIntrinsic(Int, Ty); 5592 llvm::Value *tmp = EmitNeonCall(F, TmpOps, "vrshr_n", 1, true); 5593 Ops[0] = Builder.CreateBitCast(Ops[0], VTy); 5594 return Builder.CreateAdd(Ops[0], tmp); 5595 } 5596 // FIXME: Sharing loads & stores with 32-bit is complicated by the absence 5597 // of an Align parameter here. 5598 case NEON::BI__builtin_neon_vld1_x2_v: 5599 case NEON::BI__builtin_neon_vld1q_x2_v: 5600 case NEON::BI__builtin_neon_vld1_x3_v: 5601 case NEON::BI__builtin_neon_vld1q_x3_v: 5602 case NEON::BI__builtin_neon_vld1_x4_v: 5603 case NEON::BI__builtin_neon_vld1q_x4_v: { 5604 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 5605 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5606 llvm::Type *Tys[2] = { VTy, PTy }; 5607 unsigned Int; 5608 switch (BuiltinID) { 5609 case NEON::BI__builtin_neon_vld1_x2_v: 5610 case NEON::BI__builtin_neon_vld1q_x2_v: 5611 Int = Intrinsic::aarch64_neon_ld1x2; 5612 break; 5613 case NEON::BI__builtin_neon_vld1_x3_v: 5614 case NEON::BI__builtin_neon_vld1q_x3_v: 5615 Int = Intrinsic::aarch64_neon_ld1x3; 5616 break; 5617 case NEON::BI__builtin_neon_vld1_x4_v: 5618 case NEON::BI__builtin_neon_vld1q_x4_v: 5619 Int = Intrinsic::aarch64_neon_ld1x4; 5620 break; 5621 } 5622 Function *F = CGM.getIntrinsic(Int, Tys); 5623 Ops[1] = Builder.CreateCall(F, Ops[1], "vld1xN"); 5624 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5625 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5626 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5627 } 5628 case NEON::BI__builtin_neon_vst1_x2_v: 5629 case NEON::BI__builtin_neon_vst1q_x2_v: 5630 case NEON::BI__builtin_neon_vst1_x3_v: 5631 case NEON::BI__builtin_neon_vst1q_x3_v: 5632 case NEON::BI__builtin_neon_vst1_x4_v: 5633 case NEON::BI__builtin_neon_vst1q_x4_v: { 5634 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); 5635 llvm::Type *Tys[2] = { VTy, PTy }; 5636 unsigned Int; 5637 switch (BuiltinID) { 5638 case NEON::BI__builtin_neon_vst1_x2_v: 5639 case NEON::BI__builtin_neon_vst1q_x2_v: 5640 Int = Intrinsic::aarch64_neon_st1x2; 5641 break; 5642 case NEON::BI__builtin_neon_vst1_x3_v: 5643 case NEON::BI__builtin_neon_vst1q_x3_v: 5644 Int = Intrinsic::aarch64_neon_st1x3; 5645 break; 5646 case NEON::BI__builtin_neon_vst1_x4_v: 5647 case NEON::BI__builtin_neon_vst1q_x4_v: 5648 Int = Intrinsic::aarch64_neon_st1x4; 5649 break; 5650 } 5651 std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end()); 5652 return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, ""); 5653 } 5654 case NEON::BI__builtin_neon_vld1_v: 5655 case NEON::BI__builtin_neon_vld1q_v: 5656 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 5657 return Builder.CreateDefaultAlignedLoad(Ops[0]); 5658 case NEON::BI__builtin_neon_vst1_v: 5659 case NEON::BI__builtin_neon_vst1q_v: 5660 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(VTy)); 5661 Ops[1] = Builder.CreateBitCast(Ops[1], VTy); 5662 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5663 case NEON::BI__builtin_neon_vld1_lane_v: 5664 case NEON::BI__builtin_neon_vld1q_lane_v: 5665 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5666 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 5667 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5668 Ops[0] = Builder.CreateDefaultAlignedLoad(Ops[0]); 5669 return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vld1_lane"); 5670 case NEON::BI__builtin_neon_vld1_dup_v: 5671 case NEON::BI__builtin_neon_vld1q_dup_v: { 5672 Value *V = UndefValue::get(Ty); 5673 Ty = llvm::PointerType::getUnqual(VTy->getElementType()); 5674 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5675 Ops[0] = Builder.CreateDefaultAlignedLoad(Ops[0]); 5676 llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); 5677 Ops[0] = Builder.CreateInsertElement(V, Ops[0], CI); 5678 return EmitNeonSplat(Ops[0], CI); 5679 } 5680 case NEON::BI__builtin_neon_vst1_lane_v: 5681 case NEON::BI__builtin_neon_vst1q_lane_v: 5682 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5683 Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); 5684 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5685 return Builder.CreateDefaultAlignedStore(Ops[1], 5686 Builder.CreateBitCast(Ops[0], Ty)); 5687 case NEON::BI__builtin_neon_vld2_v: 5688 case NEON::BI__builtin_neon_vld2q_v: { 5689 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 5690 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5691 llvm::Type *Tys[2] = { VTy, PTy }; 5692 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2, Tys); 5693 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 5694 Ops[0] = Builder.CreateBitCast(Ops[0], 5695 llvm::PointerType::getUnqual(Ops[1]->getType())); 5696 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5697 } 5698 case NEON::BI__builtin_neon_vld3_v: 5699 case NEON::BI__builtin_neon_vld3q_v: { 5700 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 5701 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5702 llvm::Type *Tys[2] = { VTy, PTy }; 5703 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3, Tys); 5704 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 5705 Ops[0] = Builder.CreateBitCast(Ops[0], 5706 llvm::PointerType::getUnqual(Ops[1]->getType())); 5707 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5708 } 5709 case NEON::BI__builtin_neon_vld4_v: 5710 case NEON::BI__builtin_neon_vld4q_v: { 5711 llvm::Type *PTy = llvm::PointerType::getUnqual(VTy); 5712 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5713 llvm::Type *Tys[2] = { VTy, PTy }; 5714 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4, Tys); 5715 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 5716 Ops[0] = Builder.CreateBitCast(Ops[0], 5717 llvm::PointerType::getUnqual(Ops[1]->getType())); 5718 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5719 } 5720 case NEON::BI__builtin_neon_vld2_dup_v: 5721 case NEON::BI__builtin_neon_vld2q_dup_v: { 5722 llvm::Type *PTy = 5723 llvm::PointerType::getUnqual(VTy->getElementType()); 5724 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5725 llvm::Type *Tys[2] = { VTy, PTy }; 5726 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2r, Tys); 5727 Ops[1] = Builder.CreateCall(F, Ops[1], "vld2"); 5728 Ops[0] = Builder.CreateBitCast(Ops[0], 5729 llvm::PointerType::getUnqual(Ops[1]->getType())); 5730 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5731 } 5732 case NEON::BI__builtin_neon_vld3_dup_v: 5733 case NEON::BI__builtin_neon_vld3q_dup_v: { 5734 llvm::Type *PTy = 5735 llvm::PointerType::getUnqual(VTy->getElementType()); 5736 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5737 llvm::Type *Tys[2] = { VTy, PTy }; 5738 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3r, Tys); 5739 Ops[1] = Builder.CreateCall(F, Ops[1], "vld3"); 5740 Ops[0] = Builder.CreateBitCast(Ops[0], 5741 llvm::PointerType::getUnqual(Ops[1]->getType())); 5742 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5743 } 5744 case NEON::BI__builtin_neon_vld4_dup_v: 5745 case NEON::BI__builtin_neon_vld4q_dup_v: { 5746 llvm::Type *PTy = 5747 llvm::PointerType::getUnqual(VTy->getElementType()); 5748 Ops[1] = Builder.CreateBitCast(Ops[1], PTy); 5749 llvm::Type *Tys[2] = { VTy, PTy }; 5750 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4r, Tys); 5751 Ops[1] = Builder.CreateCall(F, Ops[1], "vld4"); 5752 Ops[0] = Builder.CreateBitCast(Ops[0], 5753 llvm::PointerType::getUnqual(Ops[1]->getType())); 5754 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5755 } 5756 case NEON::BI__builtin_neon_vld2_lane_v: 5757 case NEON::BI__builtin_neon_vld2q_lane_v: { 5758 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 5759 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld2lane, Tys); 5760 Ops.push_back(Ops[1]); 5761 Ops.erase(Ops.begin()+1); 5762 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5763 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5764 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 5765 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld2_lane"); 5766 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5767 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5768 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5769 } 5770 case NEON::BI__builtin_neon_vld3_lane_v: 5771 case NEON::BI__builtin_neon_vld3q_lane_v: { 5772 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 5773 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld3lane, Tys); 5774 Ops.push_back(Ops[1]); 5775 Ops.erase(Ops.begin()+1); 5776 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5777 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5778 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 5779 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 5780 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld3_lane"); 5781 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5782 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5783 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5784 } 5785 case NEON::BI__builtin_neon_vld4_lane_v: 5786 case NEON::BI__builtin_neon_vld4q_lane_v: { 5787 llvm::Type *Tys[2] = { VTy, Ops[1]->getType() }; 5788 Function *F = CGM.getIntrinsic(Intrinsic::aarch64_neon_ld4lane, Tys); 5789 Ops.push_back(Ops[1]); 5790 Ops.erase(Ops.begin()+1); 5791 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5792 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5793 Ops[3] = Builder.CreateBitCast(Ops[3], Ty); 5794 Ops[4] = Builder.CreateBitCast(Ops[4], Ty); 5795 Ops[5] = Builder.CreateZExt(Ops[5], Int64Ty); 5796 Ops[1] = Builder.CreateCall(F, makeArrayRef(Ops).slice(1), "vld4_lane"); 5797 Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); 5798 Ops[0] = Builder.CreateBitCast(Ops[0], Ty); 5799 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 5800 } 5801 case NEON::BI__builtin_neon_vst2_v: 5802 case NEON::BI__builtin_neon_vst2q_v: { 5803 Ops.push_back(Ops[0]); 5804 Ops.erase(Ops.begin()); 5805 llvm::Type *Tys[2] = { VTy, Ops[2]->getType() }; 5806 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2, Tys), 5807 Ops, ""); 5808 } 5809 case NEON::BI__builtin_neon_vst2_lane_v: 5810 case NEON::BI__builtin_neon_vst2q_lane_v: { 5811 Ops.push_back(Ops[0]); 5812 Ops.erase(Ops.begin()); 5813 Ops[2] = Builder.CreateZExt(Ops[2], Int64Ty); 5814 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 5815 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st2lane, Tys), 5816 Ops, ""); 5817 } 5818 case NEON::BI__builtin_neon_vst3_v: 5819 case NEON::BI__builtin_neon_vst3q_v: { 5820 Ops.push_back(Ops[0]); 5821 Ops.erase(Ops.begin()); 5822 llvm::Type *Tys[2] = { VTy, Ops[3]->getType() }; 5823 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3, Tys), 5824 Ops, ""); 5825 } 5826 case NEON::BI__builtin_neon_vst3_lane_v: 5827 case NEON::BI__builtin_neon_vst3q_lane_v: { 5828 Ops.push_back(Ops[0]); 5829 Ops.erase(Ops.begin()); 5830 Ops[3] = Builder.CreateZExt(Ops[3], Int64Ty); 5831 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 5832 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st3lane, Tys), 5833 Ops, ""); 5834 } 5835 case NEON::BI__builtin_neon_vst4_v: 5836 case NEON::BI__builtin_neon_vst4q_v: { 5837 Ops.push_back(Ops[0]); 5838 Ops.erase(Ops.begin()); 5839 llvm::Type *Tys[2] = { VTy, Ops[4]->getType() }; 5840 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4, Tys), 5841 Ops, ""); 5842 } 5843 case NEON::BI__builtin_neon_vst4_lane_v: 5844 case NEON::BI__builtin_neon_vst4q_lane_v: { 5845 Ops.push_back(Ops[0]); 5846 Ops.erase(Ops.begin()); 5847 Ops[4] = Builder.CreateZExt(Ops[4], Int64Ty); 5848 llvm::Type *Tys[2] = { VTy, Ops[5]->getType() }; 5849 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_st4lane, Tys), 5850 Ops, ""); 5851 } 5852 case NEON::BI__builtin_neon_vtrn_v: 5853 case NEON::BI__builtin_neon_vtrnq_v: { 5854 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 5855 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5856 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5857 Value *SV = nullptr; 5858 5859 for (unsigned vi = 0; vi != 2; ++vi) { 5860 SmallVector<Constant*, 16> Indices; 5861 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 5862 Indices.push_back(ConstantInt::get(Int32Ty, i+vi)); 5863 Indices.push_back(ConstantInt::get(Int32Ty, i+e+vi)); 5864 } 5865 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 5866 SV = llvm::ConstantVector::get(Indices); 5867 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vtrn"); 5868 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 5869 } 5870 return SV; 5871 } 5872 case NEON::BI__builtin_neon_vuzp_v: 5873 case NEON::BI__builtin_neon_vuzpq_v: { 5874 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 5875 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5876 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5877 Value *SV = nullptr; 5878 5879 for (unsigned vi = 0; vi != 2; ++vi) { 5880 SmallVector<Constant*, 16> Indices; 5881 for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) 5882 Indices.push_back(ConstantInt::get(Int32Ty, 2*i+vi)); 5883 5884 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 5885 SV = llvm::ConstantVector::get(Indices); 5886 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vuzp"); 5887 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 5888 } 5889 return SV; 5890 } 5891 case NEON::BI__builtin_neon_vzip_v: 5892 case NEON::BI__builtin_neon_vzipq_v: { 5893 Ops[0] = Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); 5894 Ops[1] = Builder.CreateBitCast(Ops[1], Ty); 5895 Ops[2] = Builder.CreateBitCast(Ops[2], Ty); 5896 Value *SV = nullptr; 5897 5898 for (unsigned vi = 0; vi != 2; ++vi) { 5899 SmallVector<Constant*, 16> Indices; 5900 for (unsigned i = 0, e = VTy->getNumElements(); i != e; i += 2) { 5901 Indices.push_back(ConstantInt::get(Int32Ty, (i + vi*e) >> 1)); 5902 Indices.push_back(ConstantInt::get(Int32Ty, ((i + vi*e) >> 1)+e)); 5903 } 5904 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ty, Ops[0], vi); 5905 SV = llvm::ConstantVector::get(Indices); 5906 SV = Builder.CreateShuffleVector(Ops[1], Ops[2], SV, "vzip"); 5907 SV = Builder.CreateDefaultAlignedStore(SV, Addr); 5908 } 5909 return SV; 5910 } 5911 case NEON::BI__builtin_neon_vqtbl1q_v: { 5912 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl1, Ty), 5913 Ops, "vtbl1"); 5914 } 5915 case NEON::BI__builtin_neon_vqtbl2q_v: { 5916 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl2, Ty), 5917 Ops, "vtbl2"); 5918 } 5919 case NEON::BI__builtin_neon_vqtbl3q_v: { 5920 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl3, Ty), 5921 Ops, "vtbl3"); 5922 } 5923 case NEON::BI__builtin_neon_vqtbl4q_v: { 5924 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbl4, Ty), 5925 Ops, "vtbl4"); 5926 } 5927 case NEON::BI__builtin_neon_vqtbx1q_v: { 5928 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx1, Ty), 5929 Ops, "vtbx1"); 5930 } 5931 case NEON::BI__builtin_neon_vqtbx2q_v: { 5932 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx2, Ty), 5933 Ops, "vtbx2"); 5934 } 5935 case NEON::BI__builtin_neon_vqtbx3q_v: { 5936 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx3, Ty), 5937 Ops, "vtbx3"); 5938 } 5939 case NEON::BI__builtin_neon_vqtbx4q_v: { 5940 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_tbx4, Ty), 5941 Ops, "vtbx4"); 5942 } 5943 case NEON::BI__builtin_neon_vsqadd_v: 5944 case NEON::BI__builtin_neon_vsqaddq_v: { 5945 Int = Intrinsic::aarch64_neon_usqadd; 5946 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vsqadd"); 5947 } 5948 case NEON::BI__builtin_neon_vuqadd_v: 5949 case NEON::BI__builtin_neon_vuqaddq_v: { 5950 Int = Intrinsic::aarch64_neon_suqadd; 5951 return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vuqadd"); 5952 } 5953 } 5954 } 5955 5956 llvm::Value *CodeGenFunction:: 5957 BuildVector(ArrayRef<llvm::Value*> Ops) { 5958 assert((Ops.size() & (Ops.size() - 1)) == 0 && 5959 "Not a power-of-two sized vector!"); 5960 bool AllConstants = true; 5961 for (unsigned i = 0, e = Ops.size(); i != e && AllConstants; ++i) 5962 AllConstants &= isa<Constant>(Ops[i]); 5963 5964 // If this is a constant vector, create a ConstantVector. 5965 if (AllConstants) { 5966 SmallVector<llvm::Constant*, 16> CstOps; 5967 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 5968 CstOps.push_back(cast<Constant>(Ops[i])); 5969 return llvm::ConstantVector::get(CstOps); 5970 } 5971 5972 // Otherwise, insertelement the values to build the vector. 5973 Value *Result = 5974 llvm::UndefValue::get(llvm::VectorType::get(Ops[0]->getType(), Ops.size())); 5975 5976 for (unsigned i = 0, e = Ops.size(); i != e; ++i) 5977 Result = Builder.CreateInsertElement(Result, Ops[i], Builder.getInt32(i)); 5978 5979 return Result; 5980 } 5981 5982 Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, 5983 const CallExpr *E) { 5984 if (BuiltinID == X86::BI__builtin_ms_va_start || 5985 BuiltinID == X86::BI__builtin_ms_va_end) 5986 return EmitVAStartEnd(EmitMSVAListRef(E->getArg(0)).getPointer(), 5987 BuiltinID == X86::BI__builtin_ms_va_start); 5988 if (BuiltinID == X86::BI__builtin_ms_va_copy) { 5989 // Lower this manually. We can't reliably determine whether or not any 5990 // given va_copy() is for a Win64 va_list from the calling convention 5991 // alone, because it's legal to do this from a System V ABI function. 5992 // With opaque pointer types, we won't have enough information in LLVM 5993 // IR to determine this from the argument types, either. Best to do it 5994 // now, while we have enough information. 5995 Address DestAddr = EmitMSVAListRef(E->getArg(0)); 5996 Address SrcAddr = EmitMSVAListRef(E->getArg(1)); 5997 5998 llvm::Type *BPP = Int8PtrPtrTy; 5999 6000 DestAddr = Address(Builder.CreateBitCast(DestAddr.getPointer(), BPP, "cp"), 6001 DestAddr.getAlignment()); 6002 SrcAddr = Address(Builder.CreateBitCast(SrcAddr.getPointer(), BPP, "ap"), 6003 SrcAddr.getAlignment()); 6004 6005 Value *ArgPtr = Builder.CreateLoad(SrcAddr, "ap.val"); 6006 return Builder.CreateStore(ArgPtr, DestAddr); 6007 } 6008 6009 SmallVector<Value*, 4> Ops; 6010 6011 // Find out if any arguments are required to be integer constant expressions. 6012 unsigned ICEArguments = 0; 6013 ASTContext::GetBuiltinTypeError Error; 6014 getContext().GetBuiltinType(BuiltinID, Error, &ICEArguments); 6015 assert(Error == ASTContext::GE_None && "Should not codegen an error"); 6016 6017 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) { 6018 // If this is a normal argument, just emit it as a scalar. 6019 if ((ICEArguments & (1 << i)) == 0) { 6020 Ops.push_back(EmitScalarExpr(E->getArg(i))); 6021 continue; 6022 } 6023 6024 // If this is required to be a constant, constant fold it so that we know 6025 // that the generated intrinsic gets a ConstantInt. 6026 llvm::APSInt Result; 6027 bool IsConst = E->getArg(i)->isIntegerConstantExpr(Result, getContext()); 6028 assert(IsConst && "Constant arg isn't actually constant?"); (void)IsConst; 6029 Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result)); 6030 } 6031 6032 switch (BuiltinID) { 6033 default: return nullptr; 6034 case X86::BI__builtin_cpu_supports: { 6035 const Expr *FeatureExpr = E->getArg(0)->IgnoreParenCasts(); 6036 StringRef FeatureStr = cast<StringLiteral>(FeatureExpr)->getString(); 6037 6038 // TODO: When/if this becomes more than x86 specific then use a TargetInfo 6039 // based mapping. 6040 // Processor features and mapping to processor feature value. 6041 enum X86Features { 6042 CMOV = 0, 6043 MMX, 6044 POPCNT, 6045 SSE, 6046 SSE2, 6047 SSE3, 6048 SSSE3, 6049 SSE4_1, 6050 SSE4_2, 6051 AVX, 6052 AVX2, 6053 SSE4_A, 6054 FMA4, 6055 XOP, 6056 FMA, 6057 AVX512F, 6058 BMI, 6059 BMI2, 6060 MAX 6061 }; 6062 6063 X86Features Feature = StringSwitch<X86Features>(FeatureStr) 6064 .Case("cmov", X86Features::CMOV) 6065 .Case("mmx", X86Features::MMX) 6066 .Case("popcnt", X86Features::POPCNT) 6067 .Case("sse", X86Features::SSE) 6068 .Case("sse2", X86Features::SSE2) 6069 .Case("sse3", X86Features::SSE3) 6070 .Case("sse4.1", X86Features::SSE4_1) 6071 .Case("sse4.2", X86Features::SSE4_2) 6072 .Case("avx", X86Features::AVX) 6073 .Case("avx2", X86Features::AVX2) 6074 .Case("sse4a", X86Features::SSE4_A) 6075 .Case("fma4", X86Features::FMA4) 6076 .Case("xop", X86Features::XOP) 6077 .Case("fma", X86Features::FMA) 6078 .Case("avx512f", X86Features::AVX512F) 6079 .Case("bmi", X86Features::BMI) 6080 .Case("bmi2", X86Features::BMI2) 6081 .Default(X86Features::MAX); 6082 assert(Feature != X86Features::MAX && "Invalid feature!"); 6083 6084 // Matching the struct layout from the compiler-rt/libgcc structure that is 6085 // filled in: 6086 // unsigned int __cpu_vendor; 6087 // unsigned int __cpu_type; 6088 // unsigned int __cpu_subtype; 6089 // unsigned int __cpu_features[1]; 6090 llvm::Type *STy = llvm::StructType::get( 6091 Int32Ty, Int32Ty, Int32Ty, llvm::ArrayType::get(Int32Ty, 1), nullptr); 6092 6093 // Grab the global __cpu_model. 6094 llvm::Constant *CpuModel = CGM.CreateRuntimeVariable(STy, "__cpu_model"); 6095 6096 // Grab the first (0th) element from the field __cpu_features off of the 6097 // global in the struct STy. 6098 Value *Idxs[] = { 6099 ConstantInt::get(Int32Ty, 0), 6100 ConstantInt::get(Int32Ty, 3), 6101 ConstantInt::get(Int32Ty, 0) 6102 }; 6103 Value *CpuFeatures = Builder.CreateGEP(STy, CpuModel, Idxs); 6104 Value *Features = Builder.CreateAlignedLoad(CpuFeatures, 6105 CharUnits::fromQuantity(4)); 6106 6107 // Check the value of the bit corresponding to the feature requested. 6108 Value *Bitset = Builder.CreateAnd( 6109 Features, llvm::ConstantInt::get(Int32Ty, 1 << Feature)); 6110 return Builder.CreateICmpNE(Bitset, llvm::ConstantInt::get(Int32Ty, 0)); 6111 } 6112 case X86::BI_mm_prefetch: { 6113 Value *Address = Ops[0]; 6114 Value *RW = ConstantInt::get(Int32Ty, 0); 6115 Value *Locality = Ops[1]; 6116 Value *Data = ConstantInt::get(Int32Ty, 1); 6117 Value *F = CGM.getIntrinsic(Intrinsic::prefetch); 6118 return Builder.CreateCall(F, {Address, RW, Locality, Data}); 6119 } 6120 case X86::BI__builtin_ia32_undef128: 6121 case X86::BI__builtin_ia32_undef256: 6122 case X86::BI__builtin_ia32_undef512: 6123 return UndefValue::get(ConvertType(E->getType())); 6124 case X86::BI__builtin_ia32_vec_init_v8qi: 6125 case X86::BI__builtin_ia32_vec_init_v4hi: 6126 case X86::BI__builtin_ia32_vec_init_v2si: 6127 return Builder.CreateBitCast(BuildVector(Ops), 6128 llvm::Type::getX86_MMXTy(getLLVMContext())); 6129 case X86::BI__builtin_ia32_vec_ext_v2si: 6130 return Builder.CreateExtractElement(Ops[0], 6131 llvm::ConstantInt::get(Ops[1]->getType(), 0)); 6132 case X86::BI__builtin_ia32_ldmxcsr: { 6133 Address Tmp = CreateMemTemp(E->getArg(0)->getType()); 6134 Builder.CreateStore(Ops[0], Tmp); 6135 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_ldmxcsr), 6136 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 6137 } 6138 case X86::BI__builtin_ia32_stmxcsr: { 6139 Address Tmp = CreateMemTemp(E->getType()); 6140 Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_stmxcsr), 6141 Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy)); 6142 return Builder.CreateLoad(Tmp, "stmxcsr"); 6143 } 6144 case X86::BI__builtin_ia32_xsave: 6145 case X86::BI__builtin_ia32_xsave64: 6146 case X86::BI__builtin_ia32_xrstor: 6147 case X86::BI__builtin_ia32_xrstor64: 6148 case X86::BI__builtin_ia32_xsaveopt: 6149 case X86::BI__builtin_ia32_xsaveopt64: 6150 case X86::BI__builtin_ia32_xrstors: 6151 case X86::BI__builtin_ia32_xrstors64: 6152 case X86::BI__builtin_ia32_xsavec: 6153 case X86::BI__builtin_ia32_xsavec64: 6154 case X86::BI__builtin_ia32_xsaves: 6155 case X86::BI__builtin_ia32_xsaves64: { 6156 Intrinsic::ID ID; 6157 #define INTRINSIC_X86_XSAVE_ID(NAME) \ 6158 case X86::BI__builtin_ia32_##NAME: \ 6159 ID = Intrinsic::x86_##NAME; \ 6160 break 6161 switch (BuiltinID) { 6162 default: llvm_unreachable("Unsupported intrinsic!"); 6163 INTRINSIC_X86_XSAVE_ID(xsave); 6164 INTRINSIC_X86_XSAVE_ID(xsave64); 6165 INTRINSIC_X86_XSAVE_ID(xrstor); 6166 INTRINSIC_X86_XSAVE_ID(xrstor64); 6167 INTRINSIC_X86_XSAVE_ID(xsaveopt); 6168 INTRINSIC_X86_XSAVE_ID(xsaveopt64); 6169 INTRINSIC_X86_XSAVE_ID(xrstors); 6170 INTRINSIC_X86_XSAVE_ID(xrstors64); 6171 INTRINSIC_X86_XSAVE_ID(xsavec); 6172 INTRINSIC_X86_XSAVE_ID(xsavec64); 6173 INTRINSIC_X86_XSAVE_ID(xsaves); 6174 INTRINSIC_X86_XSAVE_ID(xsaves64); 6175 } 6176 #undef INTRINSIC_X86_XSAVE_ID 6177 Value *Mhi = Builder.CreateTrunc( 6178 Builder.CreateLShr(Ops[1], ConstantInt::get(Int64Ty, 32)), Int32Ty); 6179 Value *Mlo = Builder.CreateTrunc(Ops[1], Int32Ty); 6180 Ops[1] = Mhi; 6181 Ops.push_back(Mlo); 6182 return Builder.CreateCall(CGM.getIntrinsic(ID), Ops); 6183 } 6184 case X86::BI__builtin_ia32_storehps: 6185 case X86::BI__builtin_ia32_storelps: { 6186 llvm::Type *PtrTy = llvm::PointerType::getUnqual(Int64Ty); 6187 llvm::Type *VecTy = llvm::VectorType::get(Int64Ty, 2); 6188 6189 // cast val v2i64 6190 Ops[1] = Builder.CreateBitCast(Ops[1], VecTy, "cast"); 6191 6192 // extract (0, 1) 6193 unsigned Index = BuiltinID == X86::BI__builtin_ia32_storelps ? 0 : 1; 6194 llvm::Value *Idx = llvm::ConstantInt::get(SizeTy, Index); 6195 Ops[1] = Builder.CreateExtractElement(Ops[1], Idx, "extract"); 6196 6197 // cast pointer to i64 & store 6198 Ops[0] = Builder.CreateBitCast(Ops[0], PtrTy); 6199 return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); 6200 } 6201 case X86::BI__builtin_ia32_palignr128: 6202 case X86::BI__builtin_ia32_palignr256: { 6203 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); 6204 6205 unsigned NumElts = 6206 cast<llvm::VectorType>(Ops[0]->getType())->getNumElements(); 6207 assert(NumElts % 16 == 0); 6208 unsigned NumLanes = NumElts / 16; 6209 unsigned NumLaneElts = NumElts / NumLanes; 6210 6211 // If palignr is shifting the pair of vectors more than the size of two 6212 // lanes, emit zero. 6213 if (ShiftVal >= (2 * NumLaneElts)) 6214 return llvm::Constant::getNullValue(ConvertType(E->getType())); 6215 6216 // If palignr is shifting the pair of input vectors more than one lane, 6217 // but less than two lanes, convert to shifting in zeroes. 6218 if (ShiftVal > NumLaneElts) { 6219 ShiftVal -= NumLaneElts; 6220 Ops[1] = Ops[0]; 6221 Ops[0] = llvm::Constant::getNullValue(Ops[0]->getType()); 6222 } 6223 6224 uint32_t Indices[32]; 6225 // 256-bit palignr operates on 128-bit lanes so we need to handle that 6226 for (unsigned l = 0; l != NumElts; l += NumLaneElts) { 6227 for (unsigned i = 0; i != NumLaneElts; ++i) { 6228 unsigned Idx = ShiftVal + i; 6229 if (Idx >= NumLaneElts) 6230 Idx += NumElts - NumLaneElts; // End of lane, switch operand. 6231 Indices[l + i] = Idx + l; 6232 } 6233 } 6234 6235 Value *SV = llvm::ConstantDataVector::get(getLLVMContext(), 6236 makeArrayRef(Indices, NumElts)); 6237 return Builder.CreateShuffleVector(Ops[1], Ops[0], SV, "palignr"); 6238 } 6239 case X86::BI__builtin_ia32_pslldqi256: { 6240 // Shift value is in bits so divide by 8. 6241 unsigned shiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() >> 3; 6242 6243 // If pslldq is shifting the vector more than 15 bytes, emit zero. 6244 if (shiftVal >= 16) 6245 return llvm::Constant::getNullValue(ConvertType(E->getType())); 6246 6247 uint32_t Indices[32]; 6248 // 256-bit pslldq operates on 128-bit lanes so we need to handle that 6249 for (unsigned l = 0; l != 32; l += 16) { 6250 for (unsigned i = 0; i != 16; ++i) { 6251 unsigned Idx = 32 + i - shiftVal; 6252 if (Idx < 32) Idx -= 16; // end of lane, switch operand. 6253 Indices[l + i] = Idx + l; 6254 } 6255 } 6256 6257 llvm::Type *VecTy = llvm::VectorType::get(Int8Ty, 32); 6258 Ops[0] = Builder.CreateBitCast(Ops[0], VecTy, "cast"); 6259 Value *Zero = llvm::Constant::getNullValue(VecTy); 6260 6261 Value *SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 6262 SV = Builder.CreateShuffleVector(Zero, Ops[0], SV, "pslldq"); 6263 llvm::Type *ResultType = ConvertType(E->getType()); 6264 return Builder.CreateBitCast(SV, ResultType, "cast"); 6265 } 6266 case X86::BI__builtin_ia32_psrldqi256: { 6267 // Shift value is in bits so divide by 8. 6268 unsigned shiftVal = cast<llvm::ConstantInt>(Ops[1])->getZExtValue() >> 3; 6269 6270 // If psrldq is shifting the vector more than 15 bytes, emit zero. 6271 if (shiftVal >= 16) 6272 return llvm::Constant::getNullValue(ConvertType(E->getType())); 6273 6274 uint32_t Indices[32]; 6275 // 256-bit psrldq operates on 128-bit lanes so we need to handle that 6276 for (unsigned l = 0; l != 32; l += 16) { 6277 for (unsigned i = 0; i != 16; ++i) { 6278 unsigned Idx = i + shiftVal; 6279 if (Idx >= 16) Idx += 16; // end of lane, switch operand. 6280 Indices[l + i] = Idx + l; 6281 } 6282 } 6283 6284 llvm::Type *VecTy = llvm::VectorType::get(Int8Ty, 32); 6285 Ops[0] = Builder.CreateBitCast(Ops[0], VecTy, "cast"); 6286 Value *Zero = llvm::Constant::getNullValue(VecTy); 6287 6288 Value *SV = llvm::ConstantDataVector::get(getLLVMContext(), Indices); 6289 SV = Builder.CreateShuffleVector(Ops[0], Zero, SV, "psrldq"); 6290 llvm::Type *ResultType = ConvertType(E->getType()); 6291 return Builder.CreateBitCast(SV, ResultType, "cast"); 6292 } 6293 case X86::BI__builtin_ia32_movntps: 6294 case X86::BI__builtin_ia32_movntps256: 6295 case X86::BI__builtin_ia32_movntpd: 6296 case X86::BI__builtin_ia32_movntpd256: 6297 case X86::BI__builtin_ia32_movntdq: 6298 case X86::BI__builtin_ia32_movntdq256: 6299 case X86::BI__builtin_ia32_movnti: 6300 case X86::BI__builtin_ia32_movnti64: { 6301 llvm::MDNode *Node = llvm::MDNode::get( 6302 getLLVMContext(), llvm::ConstantAsMetadata::get(Builder.getInt32(1))); 6303 6304 // Convert the type of the pointer to a pointer to the stored type. 6305 Value *BC = Builder.CreateBitCast(Ops[0], 6306 llvm::PointerType::getUnqual(Ops[1]->getType()), 6307 "cast"); 6308 StoreInst *SI = Builder.CreateDefaultAlignedStore(Ops[1], BC); 6309 SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node); 6310 6311 // If the operand is an integer, we can't assume alignment. Otherwise, 6312 // assume natural alignment. 6313 QualType ArgTy = E->getArg(1)->getType(); 6314 unsigned Align; 6315 if (ArgTy->isIntegerType()) 6316 Align = 1; 6317 else 6318 Align = getContext().getTypeSizeInChars(ArgTy).getQuantity(); 6319 SI->setAlignment(Align); 6320 return SI; 6321 } 6322 // 3DNow! 6323 case X86::BI__builtin_ia32_pswapdsf: 6324 case X86::BI__builtin_ia32_pswapdsi: { 6325 llvm::Type *MMXTy = llvm::Type::getX86_MMXTy(getLLVMContext()); 6326 Ops[0] = Builder.CreateBitCast(Ops[0], MMXTy, "cast"); 6327 llvm::Function *F = CGM.getIntrinsic(Intrinsic::x86_3dnowa_pswapd); 6328 return Builder.CreateCall(F, Ops, "pswapd"); 6329 } 6330 case X86::BI__builtin_ia32_rdrand16_step: 6331 case X86::BI__builtin_ia32_rdrand32_step: 6332 case X86::BI__builtin_ia32_rdrand64_step: 6333 case X86::BI__builtin_ia32_rdseed16_step: 6334 case X86::BI__builtin_ia32_rdseed32_step: 6335 case X86::BI__builtin_ia32_rdseed64_step: { 6336 Intrinsic::ID ID; 6337 switch (BuiltinID) { 6338 default: llvm_unreachable("Unsupported intrinsic!"); 6339 case X86::BI__builtin_ia32_rdrand16_step: 6340 ID = Intrinsic::x86_rdrand_16; 6341 break; 6342 case X86::BI__builtin_ia32_rdrand32_step: 6343 ID = Intrinsic::x86_rdrand_32; 6344 break; 6345 case X86::BI__builtin_ia32_rdrand64_step: 6346 ID = Intrinsic::x86_rdrand_64; 6347 break; 6348 case X86::BI__builtin_ia32_rdseed16_step: 6349 ID = Intrinsic::x86_rdseed_16; 6350 break; 6351 case X86::BI__builtin_ia32_rdseed32_step: 6352 ID = Intrinsic::x86_rdseed_32; 6353 break; 6354 case X86::BI__builtin_ia32_rdseed64_step: 6355 ID = Intrinsic::x86_rdseed_64; 6356 break; 6357 } 6358 6359 Value *Call = Builder.CreateCall(CGM.getIntrinsic(ID)); 6360 Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 0), 6361 Ops[0]); 6362 return Builder.CreateExtractValue(Call, 1); 6363 } 6364 // SSE comparison intrisics 6365 case X86::BI__builtin_ia32_cmpeqps: 6366 case X86::BI__builtin_ia32_cmpltps: 6367 case X86::BI__builtin_ia32_cmpleps: 6368 case X86::BI__builtin_ia32_cmpunordps: 6369 case X86::BI__builtin_ia32_cmpneqps: 6370 case X86::BI__builtin_ia32_cmpnltps: 6371 case X86::BI__builtin_ia32_cmpnleps: 6372 case X86::BI__builtin_ia32_cmpordps: 6373 case X86::BI__builtin_ia32_cmpeqss: 6374 case X86::BI__builtin_ia32_cmpltss: 6375 case X86::BI__builtin_ia32_cmpless: 6376 case X86::BI__builtin_ia32_cmpunordss: 6377 case X86::BI__builtin_ia32_cmpneqss: 6378 case X86::BI__builtin_ia32_cmpnltss: 6379 case X86::BI__builtin_ia32_cmpnless: 6380 case X86::BI__builtin_ia32_cmpordss: 6381 case X86::BI__builtin_ia32_cmpeqpd: 6382 case X86::BI__builtin_ia32_cmpltpd: 6383 case X86::BI__builtin_ia32_cmplepd: 6384 case X86::BI__builtin_ia32_cmpunordpd: 6385 case X86::BI__builtin_ia32_cmpneqpd: 6386 case X86::BI__builtin_ia32_cmpnltpd: 6387 case X86::BI__builtin_ia32_cmpnlepd: 6388 case X86::BI__builtin_ia32_cmpordpd: 6389 case X86::BI__builtin_ia32_cmpeqsd: 6390 case X86::BI__builtin_ia32_cmpltsd: 6391 case X86::BI__builtin_ia32_cmplesd: 6392 case X86::BI__builtin_ia32_cmpunordsd: 6393 case X86::BI__builtin_ia32_cmpneqsd: 6394 case X86::BI__builtin_ia32_cmpnltsd: 6395 case X86::BI__builtin_ia32_cmpnlesd: 6396 case X86::BI__builtin_ia32_cmpordsd: 6397 // These exist so that the builtin that takes an immediate can be bounds 6398 // checked by clang to avoid passing bad immediates to the backend. Since 6399 // AVX has a larger immediate than SSE we would need separate builtins to 6400 // do the different bounds checking. Rather than create a clang specific 6401 // SSE only builtin, this implements eight separate builtins to match gcc 6402 // implementation. 6403 6404 // Choose the immediate. 6405 unsigned Imm; 6406 switch (BuiltinID) { 6407 default: llvm_unreachable("Unsupported intrinsic!"); 6408 case X86::BI__builtin_ia32_cmpeqps: 6409 case X86::BI__builtin_ia32_cmpeqss: 6410 case X86::BI__builtin_ia32_cmpeqpd: 6411 case X86::BI__builtin_ia32_cmpeqsd: 6412 Imm = 0; 6413 break; 6414 case X86::BI__builtin_ia32_cmpltps: 6415 case X86::BI__builtin_ia32_cmpltss: 6416 case X86::BI__builtin_ia32_cmpltpd: 6417 case X86::BI__builtin_ia32_cmpltsd: 6418 Imm = 1; 6419 break; 6420 case X86::BI__builtin_ia32_cmpleps: 6421 case X86::BI__builtin_ia32_cmpless: 6422 case X86::BI__builtin_ia32_cmplepd: 6423 case X86::BI__builtin_ia32_cmplesd: 6424 Imm = 2; 6425 break; 6426 case X86::BI__builtin_ia32_cmpunordps: 6427 case X86::BI__builtin_ia32_cmpunordss: 6428 case X86::BI__builtin_ia32_cmpunordpd: 6429 case X86::BI__builtin_ia32_cmpunordsd: 6430 Imm = 3; 6431 break; 6432 case X86::BI__builtin_ia32_cmpneqps: 6433 case X86::BI__builtin_ia32_cmpneqss: 6434 case X86::BI__builtin_ia32_cmpneqpd: 6435 case X86::BI__builtin_ia32_cmpneqsd: 6436 Imm = 4; 6437 break; 6438 case X86::BI__builtin_ia32_cmpnltps: 6439 case X86::BI__builtin_ia32_cmpnltss: 6440 case X86::BI__builtin_ia32_cmpnltpd: 6441 case X86::BI__builtin_ia32_cmpnltsd: 6442 Imm = 5; 6443 break; 6444 case X86::BI__builtin_ia32_cmpnleps: 6445 case X86::BI__builtin_ia32_cmpnless: 6446 case X86::BI__builtin_ia32_cmpnlepd: 6447 case X86::BI__builtin_ia32_cmpnlesd: 6448 Imm = 6; 6449 break; 6450 case X86::BI__builtin_ia32_cmpordps: 6451 case X86::BI__builtin_ia32_cmpordss: 6452 case X86::BI__builtin_ia32_cmpordpd: 6453 case X86::BI__builtin_ia32_cmpordsd: 6454 Imm = 7; 6455 break; 6456 } 6457 6458 // Choose the intrinsic ID. 6459 const char *name; 6460 Intrinsic::ID ID; 6461 switch (BuiltinID) { 6462 default: llvm_unreachable("Unsupported intrinsic!"); 6463 case X86::BI__builtin_ia32_cmpeqps: 6464 case X86::BI__builtin_ia32_cmpltps: 6465 case X86::BI__builtin_ia32_cmpleps: 6466 case X86::BI__builtin_ia32_cmpunordps: 6467 case X86::BI__builtin_ia32_cmpneqps: 6468 case X86::BI__builtin_ia32_cmpnltps: 6469 case X86::BI__builtin_ia32_cmpnleps: 6470 case X86::BI__builtin_ia32_cmpordps: 6471 name = "cmpps"; 6472 ID = Intrinsic::x86_sse_cmp_ps; 6473 break; 6474 case X86::BI__builtin_ia32_cmpeqss: 6475 case X86::BI__builtin_ia32_cmpltss: 6476 case X86::BI__builtin_ia32_cmpless: 6477 case X86::BI__builtin_ia32_cmpunordss: 6478 case X86::BI__builtin_ia32_cmpneqss: 6479 case X86::BI__builtin_ia32_cmpnltss: 6480 case X86::BI__builtin_ia32_cmpnless: 6481 case X86::BI__builtin_ia32_cmpordss: 6482 name = "cmpss"; 6483 ID = Intrinsic::x86_sse_cmp_ss; 6484 break; 6485 case X86::BI__builtin_ia32_cmpeqpd: 6486 case X86::BI__builtin_ia32_cmpltpd: 6487 case X86::BI__builtin_ia32_cmplepd: 6488 case X86::BI__builtin_ia32_cmpunordpd: 6489 case X86::BI__builtin_ia32_cmpneqpd: 6490 case X86::BI__builtin_ia32_cmpnltpd: 6491 case X86::BI__builtin_ia32_cmpnlepd: 6492 case X86::BI__builtin_ia32_cmpordpd: 6493 name = "cmppd"; 6494 ID = Intrinsic::x86_sse2_cmp_pd; 6495 break; 6496 case X86::BI__builtin_ia32_cmpeqsd: 6497 case X86::BI__builtin_ia32_cmpltsd: 6498 case X86::BI__builtin_ia32_cmplesd: 6499 case X86::BI__builtin_ia32_cmpunordsd: 6500 case X86::BI__builtin_ia32_cmpneqsd: 6501 case X86::BI__builtin_ia32_cmpnltsd: 6502 case X86::BI__builtin_ia32_cmpnlesd: 6503 case X86::BI__builtin_ia32_cmpordsd: 6504 name = "cmpsd"; 6505 ID = Intrinsic::x86_sse2_cmp_sd; 6506 break; 6507 } 6508 6509 Ops.push_back(llvm::ConstantInt::get(Int8Ty, Imm)); 6510 llvm::Function *F = CGM.getIntrinsic(ID); 6511 return Builder.CreateCall(F, Ops, name); 6512 } 6513 } 6514 6515 6516 Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, 6517 const CallExpr *E) { 6518 SmallVector<Value*, 4> Ops; 6519 6520 for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) 6521 Ops.push_back(EmitScalarExpr(E->getArg(i))); 6522 6523 Intrinsic::ID ID = Intrinsic::not_intrinsic; 6524 6525 switch (BuiltinID) { 6526 default: return nullptr; 6527 6528 // __builtin_ppc_get_timebase is GCC 4.8+'s PowerPC-specific name for what we 6529 // call __builtin_readcyclecounter. 6530 case PPC::BI__builtin_ppc_get_timebase: 6531 return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::readcyclecounter)); 6532 6533 // vec_ld, vec_lvsl, vec_lvsr 6534 case PPC::BI__builtin_altivec_lvx: 6535 case PPC::BI__builtin_altivec_lvxl: 6536 case PPC::BI__builtin_altivec_lvebx: 6537 case PPC::BI__builtin_altivec_lvehx: 6538 case PPC::BI__builtin_altivec_lvewx: 6539 case PPC::BI__builtin_altivec_lvsl: 6540 case PPC::BI__builtin_altivec_lvsr: 6541 case PPC::BI__builtin_vsx_lxvd2x: 6542 case PPC::BI__builtin_vsx_lxvw4x: 6543 { 6544 Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy); 6545 6546 Ops[0] = Builder.CreateGEP(Ops[1], Ops[0]); 6547 Ops.pop_back(); 6548 6549 switch (BuiltinID) { 6550 default: llvm_unreachable("Unsupported ld/lvsl/lvsr intrinsic!"); 6551 case PPC::BI__builtin_altivec_lvx: 6552 ID = Intrinsic::ppc_altivec_lvx; 6553 break; 6554 case PPC::BI__builtin_altivec_lvxl: 6555 ID = Intrinsic::ppc_altivec_lvxl; 6556 break; 6557 case PPC::BI__builtin_altivec_lvebx: 6558 ID = Intrinsic::ppc_altivec_lvebx; 6559 break; 6560 case PPC::BI__builtin_altivec_lvehx: 6561 ID = Intrinsic::ppc_altivec_lvehx; 6562 break; 6563 case PPC::BI__builtin_altivec_lvewx: 6564 ID = Intrinsic::ppc_altivec_lvewx; 6565 break; 6566 case PPC::BI__builtin_altivec_lvsl: 6567 ID = Intrinsic::ppc_altivec_lvsl; 6568 break; 6569 case PPC::BI__builtin_altivec_lvsr: 6570 ID = Intrinsic::ppc_altivec_lvsr; 6571 break; 6572 case PPC::BI__builtin_vsx_lxvd2x: 6573 ID = Intrinsic::ppc_vsx_lxvd2x; 6574 break; 6575 case PPC::BI__builtin_vsx_lxvw4x: 6576 ID = Intrinsic::ppc_vsx_lxvw4x; 6577 break; 6578 } 6579 llvm::Function *F = CGM.getIntrinsic(ID); 6580 return Builder.CreateCall(F, Ops, ""); 6581 } 6582 6583 // vec_st 6584 case PPC::BI__builtin_altivec_stvx: 6585 case PPC::BI__builtin_altivec_stvxl: 6586 case PPC::BI__builtin_altivec_stvebx: 6587 case PPC::BI__builtin_altivec_stvehx: 6588 case PPC::BI__builtin_altivec_stvewx: 6589 case PPC::BI__builtin_vsx_stxvd2x: 6590 case PPC::BI__builtin_vsx_stxvw4x: 6591 { 6592 Ops[2] = Builder.CreateBitCast(Ops[2], Int8PtrTy); 6593 Ops[1] = Builder.CreateGEP(Ops[2], Ops[1]); 6594 Ops.pop_back(); 6595 6596 switch (BuiltinID) { 6597 default: llvm_unreachable("Unsupported st intrinsic!"); 6598 case PPC::BI__builtin_altivec_stvx: 6599 ID = Intrinsic::ppc_altivec_stvx; 6600 break; 6601 case PPC::BI__builtin_altivec_stvxl: 6602 ID = Intrinsic::ppc_altivec_stvxl; 6603 break; 6604 case PPC::BI__builtin_altivec_stvebx: 6605 ID = Intrinsic::ppc_altivec_stvebx; 6606 break; 6607 case PPC::BI__builtin_altivec_stvehx: 6608 ID = Intrinsic::ppc_altivec_stvehx; 6609 break; 6610 case PPC::BI__builtin_altivec_stvewx: 6611 ID = Intrinsic::ppc_altivec_stvewx; 6612 break; 6613 case PPC::BI__builtin_vsx_stxvd2x: 6614 ID = Intrinsic::ppc_vsx_stxvd2x; 6615 break; 6616 case PPC::BI__builtin_vsx_stxvw4x: 6617 ID = Intrinsic::ppc_vsx_stxvw4x; 6618 break; 6619 } 6620 llvm::Function *F = CGM.getIntrinsic(ID); 6621 return Builder.CreateCall(F, Ops, ""); 6622 } 6623 // Square root 6624 case PPC::BI__builtin_vsx_xvsqrtsp: 6625 case PPC::BI__builtin_vsx_xvsqrtdp: { 6626 llvm::Type *ResultType = ConvertType(E->getType()); 6627 Value *X = EmitScalarExpr(E->getArg(0)); 6628 ID = Intrinsic::sqrt; 6629 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 6630 return Builder.CreateCall(F, X); 6631 } 6632 // Count leading zeros 6633 case PPC::BI__builtin_altivec_vclzb: 6634 case PPC::BI__builtin_altivec_vclzh: 6635 case PPC::BI__builtin_altivec_vclzw: 6636 case PPC::BI__builtin_altivec_vclzd: { 6637 llvm::Type *ResultType = ConvertType(E->getType()); 6638 Value *X = EmitScalarExpr(E->getArg(0)); 6639 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 6640 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 6641 return Builder.CreateCall(F, {X, Undef}); 6642 } 6643 // Copy sign 6644 case PPC::BI__builtin_vsx_xvcpsgnsp: 6645 case PPC::BI__builtin_vsx_xvcpsgndp: { 6646 llvm::Type *ResultType = ConvertType(E->getType()); 6647 Value *X = EmitScalarExpr(E->getArg(0)); 6648 Value *Y = EmitScalarExpr(E->getArg(1)); 6649 ID = Intrinsic::copysign; 6650 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 6651 return Builder.CreateCall(F, {X, Y}); 6652 } 6653 // Rounding/truncation 6654 case PPC::BI__builtin_vsx_xvrspip: 6655 case PPC::BI__builtin_vsx_xvrdpip: 6656 case PPC::BI__builtin_vsx_xvrdpim: 6657 case PPC::BI__builtin_vsx_xvrspim: 6658 case PPC::BI__builtin_vsx_xvrdpi: 6659 case PPC::BI__builtin_vsx_xvrspi: 6660 case PPC::BI__builtin_vsx_xvrdpic: 6661 case PPC::BI__builtin_vsx_xvrspic: 6662 case PPC::BI__builtin_vsx_xvrdpiz: 6663 case PPC::BI__builtin_vsx_xvrspiz: { 6664 llvm::Type *ResultType = ConvertType(E->getType()); 6665 Value *X = EmitScalarExpr(E->getArg(0)); 6666 if (BuiltinID == PPC::BI__builtin_vsx_xvrdpim || 6667 BuiltinID == PPC::BI__builtin_vsx_xvrspim) 6668 ID = Intrinsic::floor; 6669 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpi || 6670 BuiltinID == PPC::BI__builtin_vsx_xvrspi) 6671 ID = Intrinsic::round; 6672 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpic || 6673 BuiltinID == PPC::BI__builtin_vsx_xvrspic) 6674 ID = Intrinsic::nearbyint; 6675 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpip || 6676 BuiltinID == PPC::BI__builtin_vsx_xvrspip) 6677 ID = Intrinsic::ceil; 6678 else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpiz || 6679 BuiltinID == PPC::BI__builtin_vsx_xvrspiz) 6680 ID = Intrinsic::trunc; 6681 llvm::Function *F = CGM.getIntrinsic(ID, ResultType); 6682 return Builder.CreateCall(F, X); 6683 } 6684 // FMA variations 6685 case PPC::BI__builtin_vsx_xvmaddadp: 6686 case PPC::BI__builtin_vsx_xvmaddasp: 6687 case PPC::BI__builtin_vsx_xvnmaddadp: 6688 case PPC::BI__builtin_vsx_xvnmaddasp: 6689 case PPC::BI__builtin_vsx_xvmsubadp: 6690 case PPC::BI__builtin_vsx_xvmsubasp: 6691 case PPC::BI__builtin_vsx_xvnmsubadp: 6692 case PPC::BI__builtin_vsx_xvnmsubasp: { 6693 llvm::Type *ResultType = ConvertType(E->getType()); 6694 Value *X = EmitScalarExpr(E->getArg(0)); 6695 Value *Y = EmitScalarExpr(E->getArg(1)); 6696 Value *Z = EmitScalarExpr(E->getArg(2)); 6697 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 6698 llvm::Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 6699 switch (BuiltinID) { 6700 case PPC::BI__builtin_vsx_xvmaddadp: 6701 case PPC::BI__builtin_vsx_xvmaddasp: 6702 return Builder.CreateCall(F, {X, Y, Z}); 6703 case PPC::BI__builtin_vsx_xvnmaddadp: 6704 case PPC::BI__builtin_vsx_xvnmaddasp: 6705 return Builder.CreateFSub(Zero, 6706 Builder.CreateCall(F, {X, Y, Z}), "sub"); 6707 case PPC::BI__builtin_vsx_xvmsubadp: 6708 case PPC::BI__builtin_vsx_xvmsubasp: 6709 return Builder.CreateCall(F, 6710 {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 6711 case PPC::BI__builtin_vsx_xvnmsubadp: 6712 case PPC::BI__builtin_vsx_xvnmsubasp: 6713 Value *FsubRes = 6714 Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 6715 return Builder.CreateFSub(Zero, FsubRes, "sub"); 6716 } 6717 llvm_unreachable("Unknown FMA operation"); 6718 return nullptr; // Suppress no-return warning 6719 } 6720 } 6721 } 6722 6723 // Emit an intrinsic that has 1 float or double. 6724 static Value *emitUnaryFPBuiltin(CodeGenFunction &CGF, 6725 const CallExpr *E, 6726 unsigned IntrinsicID) { 6727 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 6728 6729 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 6730 return CGF.Builder.CreateCall(F, Src0); 6731 } 6732 6733 // Emit an intrinsic that has 3 float or double operands. 6734 static Value *emitTernaryFPBuiltin(CodeGenFunction &CGF, 6735 const CallExpr *E, 6736 unsigned IntrinsicID) { 6737 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 6738 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 6739 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); 6740 6741 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 6742 return CGF.Builder.CreateCall(F, {Src0, Src1, Src2}); 6743 } 6744 6745 // Emit an intrinsic that has 1 float or double operand, and 1 integer. 6746 static Value *emitFPIntBuiltin(CodeGenFunction &CGF, 6747 const CallExpr *E, 6748 unsigned IntrinsicID) { 6749 llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); 6750 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); 6751 6752 Value *F = CGF.CGM.getIntrinsic(IntrinsicID, Src0->getType()); 6753 return CGF.Builder.CreateCall(F, {Src0, Src1}); 6754 } 6755 6756 Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID, 6757 const CallExpr *E) { 6758 switch (BuiltinID) { 6759 case AMDGPU::BI__builtin_amdgpu_div_scale: 6760 case AMDGPU::BI__builtin_amdgpu_div_scalef: { 6761 // Translate from the intrinsics's struct return to the builtin's out 6762 // argument. 6763 6764 Address FlagOutPtr = EmitPointerWithAlignment(E->getArg(3)); 6765 6766 llvm::Value *X = EmitScalarExpr(E->getArg(0)); 6767 llvm::Value *Y = EmitScalarExpr(E->getArg(1)); 6768 llvm::Value *Z = EmitScalarExpr(E->getArg(2)); 6769 6770 llvm::Value *Callee = CGM.getIntrinsic(Intrinsic::AMDGPU_div_scale, 6771 X->getType()); 6772 6773 llvm::Value *Tmp = Builder.CreateCall(Callee, {X, Y, Z}); 6774 6775 llvm::Value *Result = Builder.CreateExtractValue(Tmp, 0); 6776 llvm::Value *Flag = Builder.CreateExtractValue(Tmp, 1); 6777 6778 llvm::Type *RealFlagType 6779 = FlagOutPtr.getPointer()->getType()->getPointerElementType(); 6780 6781 llvm::Value *FlagExt = Builder.CreateZExt(Flag, RealFlagType); 6782 Builder.CreateStore(FlagExt, FlagOutPtr); 6783 return Result; 6784 } 6785 case AMDGPU::BI__builtin_amdgpu_div_fmas: 6786 case AMDGPU::BI__builtin_amdgpu_div_fmasf: { 6787 llvm::Value *Src0 = EmitScalarExpr(E->getArg(0)); 6788 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); 6789 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); 6790 llvm::Value *Src3 = EmitScalarExpr(E->getArg(3)); 6791 6792 llvm::Value *F = CGM.getIntrinsic(Intrinsic::AMDGPU_div_fmas, 6793 Src0->getType()); 6794 llvm::Value *Src3ToBool = Builder.CreateIsNotNull(Src3); 6795 return Builder.CreateCall(F, {Src0, Src1, Src2, Src3ToBool}); 6796 } 6797 case AMDGPU::BI__builtin_amdgpu_div_fixup: 6798 case AMDGPU::BI__builtin_amdgpu_div_fixupf: 6799 return emitTernaryFPBuiltin(*this, E, Intrinsic::AMDGPU_div_fixup); 6800 case AMDGPU::BI__builtin_amdgpu_trig_preop: 6801 case AMDGPU::BI__builtin_amdgpu_trig_preopf: 6802 return emitFPIntBuiltin(*this, E, Intrinsic::AMDGPU_trig_preop); 6803 case AMDGPU::BI__builtin_amdgpu_rcp: 6804 case AMDGPU::BI__builtin_amdgpu_rcpf: 6805 return emitUnaryFPBuiltin(*this, E, Intrinsic::AMDGPU_rcp); 6806 case AMDGPU::BI__builtin_amdgpu_rsq: 6807 case AMDGPU::BI__builtin_amdgpu_rsqf: 6808 return emitUnaryFPBuiltin(*this, E, Intrinsic::AMDGPU_rsq); 6809 case AMDGPU::BI__builtin_amdgpu_rsq_clamped: 6810 case AMDGPU::BI__builtin_amdgpu_rsq_clampedf: 6811 return emitUnaryFPBuiltin(*this, E, Intrinsic::AMDGPU_rsq_clamped); 6812 case AMDGPU::BI__builtin_amdgpu_ldexp: 6813 case AMDGPU::BI__builtin_amdgpu_ldexpf: 6814 return emitFPIntBuiltin(*this, E, Intrinsic::AMDGPU_ldexp); 6815 case AMDGPU::BI__builtin_amdgpu_class: 6816 case AMDGPU::BI__builtin_amdgpu_classf: 6817 return emitFPIntBuiltin(*this, E, Intrinsic::AMDGPU_class); 6818 default: 6819 return nullptr; 6820 } 6821 } 6822 6823 /// Handle a SystemZ function in which the final argument is a pointer 6824 /// to an int that receives the post-instruction CC value. At the LLVM level 6825 /// this is represented as a function that returns a {result, cc} pair. 6826 static Value *EmitSystemZIntrinsicWithCC(CodeGenFunction &CGF, 6827 unsigned IntrinsicID, 6828 const CallExpr *E) { 6829 unsigned NumArgs = E->getNumArgs() - 1; 6830 SmallVector<Value *, 8> Args(NumArgs); 6831 for (unsigned I = 0; I < NumArgs; ++I) 6832 Args[I] = CGF.EmitScalarExpr(E->getArg(I)); 6833 Address CCPtr = CGF.EmitPointerWithAlignment(E->getArg(NumArgs)); 6834 Value *F = CGF.CGM.getIntrinsic(IntrinsicID); 6835 Value *Call = CGF.Builder.CreateCall(F, Args); 6836 Value *CC = CGF.Builder.CreateExtractValue(Call, 1); 6837 CGF.Builder.CreateStore(CC, CCPtr); 6838 return CGF.Builder.CreateExtractValue(Call, 0); 6839 } 6840 6841 Value *CodeGenFunction::EmitSystemZBuiltinExpr(unsigned BuiltinID, 6842 const CallExpr *E) { 6843 switch (BuiltinID) { 6844 case SystemZ::BI__builtin_tbegin: { 6845 Value *TDB = EmitScalarExpr(E->getArg(0)); 6846 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 6847 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin); 6848 return Builder.CreateCall(F, {TDB, Control}); 6849 } 6850 case SystemZ::BI__builtin_tbegin_nofloat: { 6851 Value *TDB = EmitScalarExpr(E->getArg(0)); 6852 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c); 6853 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbegin_nofloat); 6854 return Builder.CreateCall(F, {TDB, Control}); 6855 } 6856 case SystemZ::BI__builtin_tbeginc: { 6857 Value *TDB = llvm::ConstantPointerNull::get(Int8PtrTy); 6858 Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff08); 6859 Value *F = CGM.getIntrinsic(Intrinsic::s390_tbeginc); 6860 return Builder.CreateCall(F, {TDB, Control}); 6861 } 6862 case SystemZ::BI__builtin_tabort: { 6863 Value *Data = EmitScalarExpr(E->getArg(0)); 6864 Value *F = CGM.getIntrinsic(Intrinsic::s390_tabort); 6865 return Builder.CreateCall(F, Builder.CreateSExt(Data, Int64Ty, "tabort")); 6866 } 6867 case SystemZ::BI__builtin_non_tx_store: { 6868 Value *Address = EmitScalarExpr(E->getArg(0)); 6869 Value *Data = EmitScalarExpr(E->getArg(1)); 6870 Value *F = CGM.getIntrinsic(Intrinsic::s390_ntstg); 6871 return Builder.CreateCall(F, {Data, Address}); 6872 } 6873 6874 // Vector builtins. Note that most vector builtins are mapped automatically 6875 // to target-specific LLVM intrinsics. The ones handled specially here can 6876 // be represented via standard LLVM IR, which is preferable to enable common 6877 // LLVM optimizations. 6878 6879 case SystemZ::BI__builtin_s390_vpopctb: 6880 case SystemZ::BI__builtin_s390_vpopcth: 6881 case SystemZ::BI__builtin_s390_vpopctf: 6882 case SystemZ::BI__builtin_s390_vpopctg: { 6883 llvm::Type *ResultType = ConvertType(E->getType()); 6884 Value *X = EmitScalarExpr(E->getArg(0)); 6885 Function *F = CGM.getIntrinsic(Intrinsic::ctpop, ResultType); 6886 return Builder.CreateCall(F, X); 6887 } 6888 6889 case SystemZ::BI__builtin_s390_vclzb: 6890 case SystemZ::BI__builtin_s390_vclzh: 6891 case SystemZ::BI__builtin_s390_vclzf: 6892 case SystemZ::BI__builtin_s390_vclzg: { 6893 llvm::Type *ResultType = ConvertType(E->getType()); 6894 Value *X = EmitScalarExpr(E->getArg(0)); 6895 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 6896 Function *F = CGM.getIntrinsic(Intrinsic::ctlz, ResultType); 6897 return Builder.CreateCall(F, {X, Undef}); 6898 } 6899 6900 case SystemZ::BI__builtin_s390_vctzb: 6901 case SystemZ::BI__builtin_s390_vctzh: 6902 case SystemZ::BI__builtin_s390_vctzf: 6903 case SystemZ::BI__builtin_s390_vctzg: { 6904 llvm::Type *ResultType = ConvertType(E->getType()); 6905 Value *X = EmitScalarExpr(E->getArg(0)); 6906 Value *Undef = ConstantInt::get(Builder.getInt1Ty(), false); 6907 Function *F = CGM.getIntrinsic(Intrinsic::cttz, ResultType); 6908 return Builder.CreateCall(F, {X, Undef}); 6909 } 6910 6911 case SystemZ::BI__builtin_s390_vfsqdb: { 6912 llvm::Type *ResultType = ConvertType(E->getType()); 6913 Value *X = EmitScalarExpr(E->getArg(0)); 6914 Function *F = CGM.getIntrinsic(Intrinsic::sqrt, ResultType); 6915 return Builder.CreateCall(F, X); 6916 } 6917 case SystemZ::BI__builtin_s390_vfmadb: { 6918 llvm::Type *ResultType = ConvertType(E->getType()); 6919 Value *X = EmitScalarExpr(E->getArg(0)); 6920 Value *Y = EmitScalarExpr(E->getArg(1)); 6921 Value *Z = EmitScalarExpr(E->getArg(2)); 6922 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 6923 return Builder.CreateCall(F, {X, Y, Z}); 6924 } 6925 case SystemZ::BI__builtin_s390_vfmsdb: { 6926 llvm::Type *ResultType = ConvertType(E->getType()); 6927 Value *X = EmitScalarExpr(E->getArg(0)); 6928 Value *Y = EmitScalarExpr(E->getArg(1)); 6929 Value *Z = EmitScalarExpr(E->getArg(2)); 6930 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 6931 Function *F = CGM.getIntrinsic(Intrinsic::fma, ResultType); 6932 return Builder.CreateCall(F, {X, Y, Builder.CreateFSub(Zero, Z, "sub")}); 6933 } 6934 case SystemZ::BI__builtin_s390_vflpdb: { 6935 llvm::Type *ResultType = ConvertType(E->getType()); 6936 Value *X = EmitScalarExpr(E->getArg(0)); 6937 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 6938 return Builder.CreateCall(F, X); 6939 } 6940 case SystemZ::BI__builtin_s390_vflndb: { 6941 llvm::Type *ResultType = ConvertType(E->getType()); 6942 Value *X = EmitScalarExpr(E->getArg(0)); 6943 Value *Zero = llvm::ConstantFP::getZeroValueForNegation(ResultType); 6944 Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType); 6945 return Builder.CreateFSub(Zero, Builder.CreateCall(F, X), "sub"); 6946 } 6947 case SystemZ::BI__builtin_s390_vfidb: { 6948 llvm::Type *ResultType = ConvertType(E->getType()); 6949 Value *X = EmitScalarExpr(E->getArg(0)); 6950 // Constant-fold the M4 and M5 mask arguments. 6951 llvm::APSInt M4, M5; 6952 bool IsConstM4 = E->getArg(1)->isIntegerConstantExpr(M4, getContext()); 6953 bool IsConstM5 = E->getArg(2)->isIntegerConstantExpr(M5, getContext()); 6954 assert(IsConstM4 && IsConstM5 && "Constant arg isn't actually constant?"); 6955 (void)IsConstM4; (void)IsConstM5; 6956 // Check whether this instance of vfidb can be represented via a LLVM 6957 // standard intrinsic. We only support some combinations of M4 and M5. 6958 Intrinsic::ID ID = Intrinsic::not_intrinsic; 6959 switch (M4.getZExtValue()) { 6960 default: break; 6961 case 0: // IEEE-inexact exception allowed 6962 switch (M5.getZExtValue()) { 6963 default: break; 6964 case 0: ID = Intrinsic::rint; break; 6965 } 6966 break; 6967 case 4: // IEEE-inexact exception suppressed 6968 switch (M5.getZExtValue()) { 6969 default: break; 6970 case 0: ID = Intrinsic::nearbyint; break; 6971 case 1: ID = Intrinsic::round; break; 6972 case 5: ID = Intrinsic::trunc; break; 6973 case 6: ID = Intrinsic::ceil; break; 6974 case 7: ID = Intrinsic::floor; break; 6975 } 6976 break; 6977 } 6978 if (ID != Intrinsic::not_intrinsic) { 6979 Function *F = CGM.getIntrinsic(ID, ResultType); 6980 return Builder.CreateCall(F, X); 6981 } 6982 Function *F = CGM.getIntrinsic(Intrinsic::s390_vfidb); 6983 Value *M4Value = llvm::ConstantInt::get(getLLVMContext(), M4); 6984 Value *M5Value = llvm::ConstantInt::get(getLLVMContext(), M5); 6985 return Builder.CreateCall(F, {X, M4Value, M5Value}); 6986 } 6987 6988 // Vector intrisincs that output the post-instruction CC value. 6989 6990 #define INTRINSIC_WITH_CC(NAME) \ 6991 case SystemZ::BI__builtin_##NAME: \ 6992 return EmitSystemZIntrinsicWithCC(*this, Intrinsic::NAME, E) 6993 6994 INTRINSIC_WITH_CC(s390_vpkshs); 6995 INTRINSIC_WITH_CC(s390_vpksfs); 6996 INTRINSIC_WITH_CC(s390_vpksgs); 6997 6998 INTRINSIC_WITH_CC(s390_vpklshs); 6999 INTRINSIC_WITH_CC(s390_vpklsfs); 7000 INTRINSIC_WITH_CC(s390_vpklsgs); 7001 7002 INTRINSIC_WITH_CC(s390_vceqbs); 7003 INTRINSIC_WITH_CC(s390_vceqhs); 7004 INTRINSIC_WITH_CC(s390_vceqfs); 7005 INTRINSIC_WITH_CC(s390_vceqgs); 7006 7007 INTRINSIC_WITH_CC(s390_vchbs); 7008 INTRINSIC_WITH_CC(s390_vchhs); 7009 INTRINSIC_WITH_CC(s390_vchfs); 7010 INTRINSIC_WITH_CC(s390_vchgs); 7011 7012 INTRINSIC_WITH_CC(s390_vchlbs); 7013 INTRINSIC_WITH_CC(s390_vchlhs); 7014 INTRINSIC_WITH_CC(s390_vchlfs); 7015 INTRINSIC_WITH_CC(s390_vchlgs); 7016 7017 INTRINSIC_WITH_CC(s390_vfaebs); 7018 INTRINSIC_WITH_CC(s390_vfaehs); 7019 INTRINSIC_WITH_CC(s390_vfaefs); 7020 7021 INTRINSIC_WITH_CC(s390_vfaezbs); 7022 INTRINSIC_WITH_CC(s390_vfaezhs); 7023 INTRINSIC_WITH_CC(s390_vfaezfs); 7024 7025 INTRINSIC_WITH_CC(s390_vfeebs); 7026 INTRINSIC_WITH_CC(s390_vfeehs); 7027 INTRINSIC_WITH_CC(s390_vfeefs); 7028 7029 INTRINSIC_WITH_CC(s390_vfeezbs); 7030 INTRINSIC_WITH_CC(s390_vfeezhs); 7031 INTRINSIC_WITH_CC(s390_vfeezfs); 7032 7033 INTRINSIC_WITH_CC(s390_vfenebs); 7034 INTRINSIC_WITH_CC(s390_vfenehs); 7035 INTRINSIC_WITH_CC(s390_vfenefs); 7036 7037 INTRINSIC_WITH_CC(s390_vfenezbs); 7038 INTRINSIC_WITH_CC(s390_vfenezhs); 7039 INTRINSIC_WITH_CC(s390_vfenezfs); 7040 7041 INTRINSIC_WITH_CC(s390_vistrbs); 7042 INTRINSIC_WITH_CC(s390_vistrhs); 7043 INTRINSIC_WITH_CC(s390_vistrfs); 7044 7045 INTRINSIC_WITH_CC(s390_vstrcbs); 7046 INTRINSIC_WITH_CC(s390_vstrchs); 7047 INTRINSIC_WITH_CC(s390_vstrcfs); 7048 7049 INTRINSIC_WITH_CC(s390_vstrczbs); 7050 INTRINSIC_WITH_CC(s390_vstrczhs); 7051 INTRINSIC_WITH_CC(s390_vstrczfs); 7052 7053 INTRINSIC_WITH_CC(s390_vfcedbs); 7054 INTRINSIC_WITH_CC(s390_vfchdbs); 7055 INTRINSIC_WITH_CC(s390_vfchedbs); 7056 7057 INTRINSIC_WITH_CC(s390_vftcidb); 7058 7059 #undef INTRINSIC_WITH_CC 7060 7061 default: 7062 return nullptr; 7063 } 7064 } 7065 7066 Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, 7067 const CallExpr *E) { 7068 switch (BuiltinID) { 7069 case NVPTX::BI__nvvm_atom_add_gen_i: 7070 case NVPTX::BI__nvvm_atom_add_gen_l: 7071 case NVPTX::BI__nvvm_atom_add_gen_ll: 7072 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Add, E); 7073 7074 case NVPTX::BI__nvvm_atom_sub_gen_i: 7075 case NVPTX::BI__nvvm_atom_sub_gen_l: 7076 case NVPTX::BI__nvvm_atom_sub_gen_ll: 7077 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Sub, E); 7078 7079 case NVPTX::BI__nvvm_atom_and_gen_i: 7080 case NVPTX::BI__nvvm_atom_and_gen_l: 7081 case NVPTX::BI__nvvm_atom_and_gen_ll: 7082 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::And, E); 7083 7084 case NVPTX::BI__nvvm_atom_or_gen_i: 7085 case NVPTX::BI__nvvm_atom_or_gen_l: 7086 case NVPTX::BI__nvvm_atom_or_gen_ll: 7087 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Or, E); 7088 7089 case NVPTX::BI__nvvm_atom_xor_gen_i: 7090 case NVPTX::BI__nvvm_atom_xor_gen_l: 7091 case NVPTX::BI__nvvm_atom_xor_gen_ll: 7092 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xor, E); 7093 7094 case NVPTX::BI__nvvm_atom_xchg_gen_i: 7095 case NVPTX::BI__nvvm_atom_xchg_gen_l: 7096 case NVPTX::BI__nvvm_atom_xchg_gen_ll: 7097 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xchg, E); 7098 7099 case NVPTX::BI__nvvm_atom_max_gen_i: 7100 case NVPTX::BI__nvvm_atom_max_gen_l: 7101 case NVPTX::BI__nvvm_atom_max_gen_ll: 7102 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Max, E); 7103 7104 case NVPTX::BI__nvvm_atom_max_gen_ui: 7105 case NVPTX::BI__nvvm_atom_max_gen_ul: 7106 case NVPTX::BI__nvvm_atom_max_gen_ull: 7107 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMax, E); 7108 7109 case NVPTX::BI__nvvm_atom_min_gen_i: 7110 case NVPTX::BI__nvvm_atom_min_gen_l: 7111 case NVPTX::BI__nvvm_atom_min_gen_ll: 7112 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Min, E); 7113 7114 case NVPTX::BI__nvvm_atom_min_gen_ui: 7115 case NVPTX::BI__nvvm_atom_min_gen_ul: 7116 case NVPTX::BI__nvvm_atom_min_gen_ull: 7117 return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMin, E); 7118 7119 case NVPTX::BI__nvvm_atom_cas_gen_i: 7120 case NVPTX::BI__nvvm_atom_cas_gen_l: 7121 case NVPTX::BI__nvvm_atom_cas_gen_ll: 7122 // __nvvm_atom_cas_gen_* should return the old value rather than the 7123 // success flag. 7124 return MakeAtomicCmpXchgValue(*this, E, /*ReturnBool=*/false); 7125 7126 case NVPTX::BI__nvvm_atom_add_gen_f: { 7127 Value *Ptr = EmitScalarExpr(E->getArg(0)); 7128 Value *Val = EmitScalarExpr(E->getArg(1)); 7129 // atomicrmw only deals with integer arguments so we need to use 7130 // LLVM's nvvm_atomic_load_add_f32 intrinsic for that. 7131 Value *FnALAF32 = 7132 CGM.getIntrinsic(Intrinsic::nvvm_atomic_load_add_f32, Ptr->getType()); 7133 return Builder.CreateCall(FnALAF32, {Ptr, Val}); 7134 } 7135 7136 default: 7137 return nullptr; 7138 } 7139 } 7140 7141 Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, 7142 const CallExpr *E) { 7143 switch (BuiltinID) { 7144 case WebAssembly::BI__builtin_wasm_page_size: { 7145 llvm::Type *ResultType = ConvertType(E->getType()); 7146 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_page_size, ResultType); 7147 return Builder.CreateCall(Callee); 7148 } 7149 case WebAssembly::BI__builtin_wasm_memory_size: { 7150 llvm::Type *ResultType = ConvertType(E->getType()); 7151 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_memory_size, ResultType); 7152 return Builder.CreateCall(Callee); 7153 } 7154 case WebAssembly::BI__builtin_wasm_resize_memory: { 7155 Value *X = EmitScalarExpr(E->getArg(0)); 7156 Value *Callee = CGM.getIntrinsic(Intrinsic::wasm_resize_memory, X->getType()); 7157 return Builder.CreateCall(Callee, X); 7158 } 7159 7160 default: 7161 return nullptr; 7162 } 7163 } 7164