1 /* 2 * include/linux/fsl_devices.h 3 * 4 * Definitions for any platform device related flags or structures for 5 * Freescale processor devices 6 * 7 * Maintainer: Kumar Gala <[email protected]> 8 * 9 * Copyright 2004,2012 Freescale Semiconductor, Inc 10 * 11 * This program is free software; you can redistribute it and/or modify it 12 * under the terms of the GNU General Public License as published by the 13 * Free Software Foundation; either version 2 of the License, or (at your 14 * option) any later version. 15 */ 16 17 #ifndef _FSL_DEVICE_H_ 18 #define _FSL_DEVICE_H_ 19 20 #define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI 21 PHY CLK to become stable - 10ms*/ 22 #define FSL_USB_VER_OLD 0 23 #define FSL_USB_VER_1_6 1 24 #define FSL_USB_VER_2_2 2 25 26 #include <linux/types.h> 27 28 /* 29 * Some conventions on how we handle peripherals on Freescale chips 30 * 31 * unique device: a platform_device entry in fsl_plat_devs[] plus 32 * associated device information in its platform_data structure. 33 * 34 * A chip is described by a set of unique devices. 35 * 36 * Each sub-arch has its own master list of unique devices and 37 * enumerates them by enum fsl_devices in a sub-arch specific header 38 * 39 * The platform data structure is broken into two parts. The 40 * first is device specific information that help identify any 41 * unique features of a peripheral. The second is any 42 * information that may be defined by the board or how the device 43 * is connected externally of the chip. 44 * 45 * naming conventions: 46 * - platform data structures: <driver>_platform_data 47 * - platform data device flags: FSL_<driver>_DEV_<FLAG> 48 * - platform data board flags: FSL_<driver>_BRD_<FLAG> 49 * 50 */ 51 52 enum fsl_usb2_operating_modes { 53 FSL_USB2_MPH_HOST, 54 FSL_USB2_DR_HOST, 55 FSL_USB2_DR_DEVICE, 56 FSL_USB2_DR_OTG, 57 }; 58 59 enum fsl_usb2_phy_modes { 60 FSL_USB2_PHY_NONE, 61 FSL_USB2_PHY_ULPI, 62 FSL_USB2_PHY_UTMI, 63 FSL_USB2_PHY_UTMI_WIDE, 64 FSL_USB2_PHY_SERIAL, 65 }; 66 67 struct clk; 68 struct platform_device; 69 70 struct fsl_usb2_platform_data { 71 /* board specific information */ 72 int controller_ver; 73 enum fsl_usb2_operating_modes operating_mode; 74 enum fsl_usb2_phy_modes phy_mode; 75 unsigned int port_enables; 76 unsigned int workaround; 77 78 int (*init)(struct platform_device *); 79 void (*exit)(struct platform_device *); 80 void __iomem *regs; /* ioremap'd register base */ 81 struct clk *clk; 82 unsigned power_budget; /* hcd->power_budget */ 83 unsigned big_endian_mmio:1; 84 unsigned big_endian_desc:1; 85 unsigned es:1; /* need USBMODE:ES */ 86 unsigned le_setup_buf:1; 87 unsigned have_sysif_regs:1; 88 unsigned invert_drvvbus:1; 89 unsigned invert_pwr_fault:1; 90 91 unsigned suspended:1; 92 unsigned already_suspended:1; 93 94 /* register save area for suspend/resume */ 95 u32 pm_command; 96 u32 pm_status; 97 u32 pm_intr_enable; 98 u32 pm_frame_index; 99 u32 pm_segment; 100 u32 pm_frame_list; 101 u32 pm_async_next; 102 u32 pm_configured_flag; 103 u32 pm_portsc; 104 u32 pm_usbgenctrl; 105 }; 106 107 /* Flags in fsl_usb2_mph_platform_data */ 108 #define FSL_USB2_PORT0_ENABLED 0x00000001 109 #define FSL_USB2_PORT1_ENABLED 0x00000002 110 111 #define FLS_USB2_WORKAROUND_ENGCM09152 (1 << 0) 112 113 struct spi_device; 114 115 struct fsl_spi_platform_data { 116 u32 initial_spmode; /* initial SPMODE value */ 117 s16 bus_num; 118 unsigned int flags; 119 #define SPI_QE_CPU_MODE (1 << 0) /* QE CPU ("PIO") mode */ 120 #define SPI_CPM_MODE (1 << 1) /* CPM/QE ("DMA") mode */ 121 #define SPI_CPM1 (1 << 2) /* SPI unit is in CPM1 block */ 122 #define SPI_CPM2 (1 << 3) /* SPI unit is in CPM2 block */ 123 #define SPI_QE (1 << 4) /* SPI unit is in QE block */ 124 /* board specific information */ 125 u16 max_chipselect; 126 void (*cs_control)(struct spi_device *spi, bool on); 127 u32 sysclk; 128 }; 129 130 struct mpc8xx_pcmcia_ops { 131 void(*hw_ctrl)(int slot, int enable); 132 int(*voltage_set)(int slot, int vcc, int vpp); 133 }; 134 135 /* Returns non-zero if the current suspend operation would 136 * lead to a deep sleep (i.e. power removed from the core, 137 * instead of just the clock). 138 */ 139 #if defined(CONFIG_PPC_83xx) && defined(CONFIG_SUSPEND) 140 int fsl_deep_sleep(void); 141 #else 142 static inline int fsl_deep_sleep(void) { return 0; } 143 #endif 144 145 #endif /* _FSL_DEVICE_H_ */ 146