1 // SPDX-License-Identifier: GPL-2.0+ 2 /*****************************************************************************/ 3 /* 4 * moxa.c -- MOXA Intellio family multiport serial driver. 5 * 6 * Copyright (C) 1999-2000 Moxa Technologies ([email protected]). 7 * Copyright (c) 2007 Jiri Slaby <[email protected]> 8 * 9 * This code is loosely based on the Linux serial driver, written by 10 * Linus Torvalds, Theodore T'so and others. 11 */ 12 13 /* 14 * MOXA Intellio Series Driver 15 * for : LINUX 16 * date : 1999/1/7 17 * version : 5.1 18 */ 19 20 #include <linux/module.h> 21 #include <linux/types.h> 22 #include <linux/mm.h> 23 #include <linux/ioport.h> 24 #include <linux/errno.h> 25 #include <linux/firmware.h> 26 #include <linux/signal.h> 27 #include <linux/sched.h> 28 #include <linux/timer.h> 29 #include <linux/interrupt.h> 30 #include <linux/tty.h> 31 #include <linux/tty_flip.h> 32 #include <linux/major.h> 33 #include <linux/string.h> 34 #include <linux/fcntl.h> 35 #include <linux/ptrace.h> 36 #include <linux/serial.h> 37 #include <linux/tty_driver.h> 38 #include <linux/delay.h> 39 #include <linux/pci.h> 40 #include <linux/init.h> 41 #include <linux/bitops.h> 42 #include <linux/slab.h> 43 #include <linux/ratelimit.h> 44 45 #include <asm/io.h> 46 #include <linux/uaccess.h> 47 48 #define MOXA 0x400 49 #define MOXA_GET_IQUEUE (MOXA + 1) /* get input buffered count */ 50 #define MOXA_GET_OQUEUE (MOXA + 2) /* get output buffered count */ 51 #define MOXA_GETDATACOUNT (MOXA + 23) 52 #define MOXA_GET_IOQUEUE (MOXA + 27) 53 #define MOXA_FLUSH_QUEUE (MOXA + 28) 54 #define MOXA_GETMSTATUS (MOXA + 65) 55 56 /* 57 * System Configuration 58 */ 59 60 #define Magic_code 0x404 61 62 /* 63 * for C218 BIOS initialization 64 */ 65 #define C218_ConfBase 0x800 66 #define C218_status (C218_ConfBase + 0) /* BIOS running status */ 67 #define C218_diag (C218_ConfBase + 2) /* diagnostic status */ 68 #define C218_key (C218_ConfBase + 4) /* WORD (0x218 for C218) */ 69 #define C218DLoad_len (C218_ConfBase + 6) /* WORD */ 70 #define C218check_sum (C218_ConfBase + 8) /* BYTE */ 71 #define C218chksum_ok (C218_ConfBase + 0x0a) /* BYTE (1:ok) */ 72 #define C218_TestRx (C218_ConfBase + 0x10) /* 8 bytes for 8 ports */ 73 #define C218_TestTx (C218_ConfBase + 0x18) /* 8 bytes for 8 ports */ 74 #define C218_RXerr (C218_ConfBase + 0x20) /* 8 bytes for 8 ports */ 75 #define C218_ErrFlag (C218_ConfBase + 0x28) /* 8 bytes for 8 ports */ 76 77 #define C218_LoadBuf 0x0F00 78 #define C218_KeyCode 0x218 79 #define CP204J_KeyCode 0x204 80 81 /* 82 * for C320 BIOS initialization 83 */ 84 #define C320_ConfBase 0x800 85 #define C320_LoadBuf 0x0f00 86 #define STS_init 0x05 /* for C320_status */ 87 88 #define C320_status C320_ConfBase + 0 /* BIOS running status */ 89 #define C320_diag C320_ConfBase + 2 /* diagnostic status */ 90 #define C320_key C320_ConfBase + 4 /* WORD (0320H for C320) */ 91 #define C320DLoad_len C320_ConfBase + 6 /* WORD */ 92 #define C320check_sum C320_ConfBase + 8 /* WORD */ 93 #define C320chksum_ok C320_ConfBase + 0x0a /* WORD (1:ok) */ 94 #define C320bapi_len C320_ConfBase + 0x0c /* WORD */ 95 #define C320UART_no C320_ConfBase + 0x0e /* WORD */ 96 97 #define C320_KeyCode 0x320 98 99 #define FixPage_addr 0x0000 /* starting addr of static page */ 100 #define DynPage_addr 0x2000 /* starting addr of dynamic page */ 101 #define C218_start 0x3000 /* starting addr of C218 BIOS prg */ 102 #define Control_reg 0x1ff0 /* select page and reset control */ 103 #define HW_reset 0x80 104 105 /* 106 * Function Codes 107 */ 108 #define FC_CardReset 0x80 109 #define FC_ChannelReset 1 /* C320 firmware not supported */ 110 #define FC_EnableCH 2 111 #define FC_DisableCH 3 112 #define FC_SetParam 4 113 #define FC_SetMode 5 114 #define FC_SetRate 6 115 #define FC_LineControl 7 116 #define FC_LineStatus 8 117 #define FC_XmitControl 9 118 #define FC_FlushQueue 10 119 #define FC_SendBreak 11 120 #define FC_StopBreak 12 121 #define FC_LoopbackON 13 122 #define FC_LoopbackOFF 14 123 #define FC_ClrIrqTable 15 124 #define FC_SendXon 16 125 #define FC_SetTermIrq 17 /* C320 firmware not supported */ 126 #define FC_SetCntIrq 18 /* C320 firmware not supported */ 127 #define FC_SetBreakIrq 19 128 #define FC_SetLineIrq 20 129 #define FC_SetFlowCtl 21 130 #define FC_GenIrq 22 131 #define FC_InCD180 23 132 #define FC_OutCD180 24 133 #define FC_InUARTreg 23 134 #define FC_OutUARTreg 24 135 #define FC_SetXonXoff 25 136 #define FC_OutCD180CCR 26 137 #define FC_ExtIQueue 27 138 #define FC_ExtOQueue 28 139 #define FC_ClrLineIrq 29 140 #define FC_HWFlowCtl 30 141 #define FC_GetClockRate 35 142 #define FC_SetBaud 36 143 #define FC_SetDataMode 41 144 #define FC_GetCCSR 43 145 #define FC_GetDataError 45 146 #define FC_RxControl 50 147 #define FC_ImmSend 51 148 #define FC_SetXonState 52 149 #define FC_SetXoffState 53 150 #define FC_SetRxFIFOTrig 54 151 #define FC_SetTxFIFOCnt 55 152 #define FC_UnixRate 56 153 #define FC_UnixResetTimer 57 154 155 #define RxFIFOTrig1 0 156 #define RxFIFOTrig4 1 157 #define RxFIFOTrig8 2 158 #define RxFIFOTrig14 3 159 160 /* 161 * Dual-Ported RAM 162 */ 163 #define DRAM_global 0 164 #define INT_data (DRAM_global + 0) 165 #define Config_base (DRAM_global + 0x108) 166 167 #define IRQindex (INT_data + 0) 168 #define IRQpending (INT_data + 4) 169 #define IRQtable (INT_data + 8) 170 171 /* 172 * Interrupt Status 173 */ 174 #define IntrRx 0x01 /* receiver data O.K. */ 175 #define IntrTx 0x02 /* transmit buffer empty */ 176 #define IntrFunc 0x04 /* function complete */ 177 #define IntrBreak 0x08 /* received break */ 178 #define IntrLine 0x10 /* line status change 179 for transmitter */ 180 #define IntrIntr 0x20 /* received INTR code */ 181 #define IntrQuit 0x40 /* received QUIT code */ 182 #define IntrEOF 0x80 /* received EOF code */ 183 184 #define IntrRxTrigger 0x100 /* rx data count reach trigger value */ 185 #define IntrTxTrigger 0x200 /* tx data count below trigger value */ 186 187 #define Magic_no (Config_base + 0) 188 #define Card_model_no (Config_base + 2) 189 #define Total_ports (Config_base + 4) 190 #define Module_cnt (Config_base + 8) 191 #define Module_no (Config_base + 10) 192 #define Timer_10ms (Config_base + 14) 193 #define Disable_IRQ (Config_base + 20) 194 #define TMS320_PORT1 (Config_base + 22) 195 #define TMS320_PORT2 (Config_base + 24) 196 #define TMS320_CLOCK (Config_base + 26) 197 198 /* 199 * DATA BUFFER in DRAM 200 */ 201 #define Extern_table 0x400 /* Base address of the external table 202 (24 words * 64) total 3K bytes 203 (24 words * 128) total 6K bytes */ 204 #define Extern_size 0x60 /* 96 bytes */ 205 #define RXrptr 0x00 /* read pointer for RX buffer */ 206 #define RXwptr 0x02 /* write pointer for RX buffer */ 207 #define TXrptr 0x04 /* read pointer for TX buffer */ 208 #define TXwptr 0x06 /* write pointer for TX buffer */ 209 #define HostStat 0x08 /* IRQ flag and general flag */ 210 #define FlagStat 0x0A 211 #define FlowControl 0x0C /* B7 B6 B5 B4 B3 B2 B1 B0 */ 212 /* x x x x | | | | */ 213 /* | | | + CTS flow */ 214 /* | | +--- RTS flow */ 215 /* | +------ TX Xon/Xoff */ 216 /* +--------- RX Xon/Xoff */ 217 #define Break_cnt 0x0E /* received break count */ 218 #define CD180TXirq 0x10 /* if non-0: enable TX irq */ 219 #define RX_mask 0x12 220 #define TX_mask 0x14 221 #define Ofs_rxb 0x16 222 #define Ofs_txb 0x18 223 #define Page_rxb 0x1A 224 #define Page_txb 0x1C 225 #define EndPage_rxb 0x1E 226 #define EndPage_txb 0x20 227 #define Data_error 0x22 228 #define RxTrigger 0x28 229 #define TxTrigger 0x2a 230 231 #define rRXwptr 0x34 232 #define Low_water 0x36 233 234 #define FuncCode 0x40 235 #define FuncArg 0x42 236 #define FuncArg1 0x44 237 238 #define C218rx_size 0x2000 /* 8K bytes */ 239 #define C218tx_size 0x8000 /* 32K bytes */ 240 241 #define C218rx_mask (C218rx_size - 1) 242 #define C218tx_mask (C218tx_size - 1) 243 244 #define C320p8rx_size 0x2000 245 #define C320p8tx_size 0x8000 246 #define C320p8rx_mask (C320p8rx_size - 1) 247 #define C320p8tx_mask (C320p8tx_size - 1) 248 249 #define C320p16rx_size 0x2000 250 #define C320p16tx_size 0x4000 251 #define C320p16rx_mask (C320p16rx_size - 1) 252 #define C320p16tx_mask (C320p16tx_size - 1) 253 254 #define C320p24rx_size 0x2000 255 #define C320p24tx_size 0x2000 256 #define C320p24rx_mask (C320p24rx_size - 1) 257 #define C320p24tx_mask (C320p24tx_size - 1) 258 259 #define C320p32rx_size 0x1000 260 #define C320p32tx_size 0x1000 261 #define C320p32rx_mask (C320p32rx_size - 1) 262 #define C320p32tx_mask (C320p32tx_size - 1) 263 264 #define Page_size 0x2000U 265 #define Page_mask (Page_size - 1) 266 #define C218rx_spage 3 267 #define C218tx_spage 4 268 #define C218rx_pageno 1 269 #define C218tx_pageno 4 270 #define C218buf_pageno 5 271 272 #define C320p8rx_spage 3 273 #define C320p8tx_spage 4 274 #define C320p8rx_pgno 1 275 #define C320p8tx_pgno 4 276 #define C320p8buf_pgno 5 277 278 #define C320p16rx_spage 3 279 #define C320p16tx_spage 4 280 #define C320p16rx_pgno 1 281 #define C320p16tx_pgno 2 282 #define C320p16buf_pgno 3 283 284 #define C320p24rx_spage 3 285 #define C320p24tx_spage 4 286 #define C320p24rx_pgno 1 287 #define C320p24tx_pgno 1 288 #define C320p24buf_pgno 2 289 290 #define C320p32rx_spage 3 291 #define C320p32tx_ofs C320p32rx_size 292 #define C320p32tx_spage 3 293 #define C320p32buf_pgno 1 294 295 /* 296 * Host Status 297 */ 298 #define WakeupRx 0x01 299 #define WakeupTx 0x02 300 #define WakeupBreak 0x08 301 #define WakeupLine 0x10 302 #define WakeupIntr 0x20 303 #define WakeupQuit 0x40 304 #define WakeupEOF 0x80 /* used in VTIME control */ 305 #define WakeupRxTrigger 0x100 306 #define WakeupTxTrigger 0x200 307 /* 308 * Flag status 309 */ 310 #define Rx_over 0x01 311 #define Xoff_state 0x02 312 #define Tx_flowOff 0x04 313 #define Tx_enable 0x08 314 #define CTS_state 0x10 315 #define DSR_state 0x20 316 #define DCD_state 0x80 317 /* 318 * FlowControl 319 */ 320 #define CTS_FlowCtl 1 321 #define RTS_FlowCtl 2 322 #define Tx_FlowCtl 4 323 #define Rx_FlowCtl 8 324 #define IXM_IXANY 0x10 325 326 #define LowWater 128 327 328 #define DTR_ON 1 329 #define RTS_ON 2 330 #define CTS_ON 1 331 #define DSR_ON 2 332 #define DCD_ON 8 333 334 /* mode definition */ 335 #define MX_CS8 0x03 336 #define MX_CS7 0x02 337 #define MX_CS6 0x01 338 #define MX_CS5 0x00 339 340 #define MX_STOP1 0x00 341 #define MX_STOP15 0x04 342 #define MX_STOP2 0x08 343 344 #define MX_PARNONE 0x00 345 #define MX_PAREVEN 0x40 346 #define MX_PARODD 0xC0 347 #define MX_PARMARK 0xA0 348 #define MX_PARSPACE 0x20 349 350 #define MOXA_FW_HDRLEN 32 351 352 #define MOXAMAJOR 172 353 354 #define MAX_BOARDS 4 /* Don't change this value */ 355 #define MAX_PORTS_PER_BOARD 32 /* Don't change this value */ 356 #define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD) 357 358 #define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_PCI) 359 360 enum { 361 MOXA_BOARD_C218_PCI = 1, 362 MOXA_BOARD_C320_PCI, 363 MOXA_BOARD_CP204J, 364 }; 365 366 static char *moxa_brdname[] = 367 { 368 "C218 Turbo PCI series", 369 "C320 Turbo PCI series", 370 "CP-204J series", 371 }; 372 373 static const struct pci_device_id moxa_pcibrds[] = { 374 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218), 375 .driver_data = MOXA_BOARD_C218_PCI }, 376 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320), 377 .driver_data = MOXA_BOARD_C320_PCI }, 378 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J), 379 .driver_data = MOXA_BOARD_CP204J }, 380 { 0 } 381 }; 382 MODULE_DEVICE_TABLE(pci, moxa_pcibrds); 383 384 struct moxa_port; 385 386 static struct moxa_board_conf { 387 int boardType; 388 int numPorts; 389 390 unsigned int ready; 391 392 struct moxa_port *ports; 393 394 void __iomem *basemem; 395 void __iomem *intNdx; 396 void __iomem *intPend; 397 void __iomem *intTable; 398 } moxa_boards[MAX_BOARDS]; 399 400 struct mxser_mstatus { 401 tcflag_t cflag; 402 int cts; 403 int dsr; 404 int ri; 405 int dcd; 406 }; 407 408 struct moxaq_str { 409 int inq; 410 int outq; 411 }; 412 413 struct moxa_port { 414 struct tty_port port; 415 struct moxa_board_conf *board; 416 void __iomem *tableAddr; 417 418 int type; 419 int cflag; 420 unsigned long statusflags; 421 422 u8 DCDState; /* Protected by the port lock */ 423 u8 lineCtrl; 424 u8 lowChkFlag; 425 }; 426 427 struct mon_str { 428 int tick; 429 int rxcnt[MAX_PORTS]; 430 int txcnt[MAX_PORTS]; 431 }; 432 433 /* statusflags */ 434 #define TXSTOPPED 1 435 #define LOWWAIT 2 436 #define EMPTYWAIT 3 437 438 439 #define WAKEUP_CHARS 256 440 441 static int ttymajor = MOXAMAJOR; 442 static struct mon_str moxaLog; 443 static unsigned int moxaFuncTout = HZ / 2; 444 static unsigned int moxaLowWaterChk; 445 static DEFINE_MUTEX(moxa_openlock); 446 static DEFINE_SPINLOCK(moxa_lock); 447 448 static struct tty_port moxa_service_port; 449 450 MODULE_AUTHOR("William Chen"); 451 MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver"); 452 MODULE_LICENSE("GPL"); 453 MODULE_FIRMWARE("c218tunx.cod"); 454 MODULE_FIRMWARE("cp204unx.cod"); 455 MODULE_FIRMWARE("c320tunx.cod"); 456 457 module_param(ttymajor, int, 0); 458 459 /* 460 * static functions: 461 */ 462 static int moxa_open(struct tty_struct *, struct file *); 463 static void moxa_close(struct tty_struct *, struct file *); 464 static ssize_t moxa_write(struct tty_struct *, const u8 *, size_t); 465 static unsigned int moxa_write_room(struct tty_struct *); 466 static void moxa_flush_buffer(struct tty_struct *); 467 static unsigned int moxa_chars_in_buffer(struct tty_struct *); 468 static void moxa_set_termios(struct tty_struct *, const struct ktermios *); 469 static void moxa_stop(struct tty_struct *); 470 static void moxa_start(struct tty_struct *); 471 static void moxa_hangup(struct tty_struct *); 472 static int moxa_tiocmget(struct tty_struct *tty); 473 static int moxa_tiocmset(struct tty_struct *tty, 474 unsigned int set, unsigned int clear); 475 static void moxa_poll(struct timer_list *); 476 static void moxa_set_tty_param(struct tty_struct *, const struct ktermios *); 477 static void moxa_shutdown(struct tty_port *); 478 static bool moxa_carrier_raised(struct tty_port *); 479 static void moxa_dtr_rts(struct tty_port *, bool); 480 /* 481 * moxa board interface functions: 482 */ 483 static void MoxaPortEnable(struct moxa_port *); 484 static void MoxaPortDisable(struct moxa_port *); 485 static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t); 486 static int MoxaPortGetLineOut(struct moxa_port *, bool *, bool *); 487 static void MoxaPortLineCtrl(struct moxa_port *, bool, bool); 488 static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int); 489 static int MoxaPortLineStatus(struct moxa_port *); 490 static void MoxaPortFlushData(struct moxa_port *, int); 491 static ssize_t MoxaPortWriteData(struct tty_struct *, const u8 *, size_t); 492 static int MoxaPortReadData(struct moxa_port *); 493 static unsigned int MoxaPortTxQueue(struct moxa_port *); 494 static int MoxaPortRxQueue(struct moxa_port *); 495 static unsigned int MoxaPortTxFree(struct moxa_port *); 496 static void MoxaPortTxDisable(struct moxa_port *); 497 static void MoxaPortTxEnable(struct moxa_port *); 498 static int moxa_get_serial_info(struct tty_struct *, struct serial_struct *); 499 static int moxa_set_serial_info(struct tty_struct *, struct serial_struct *); 500 static void MoxaSetFifo(struct moxa_port *port, int enable); 501 502 /* 503 * I/O functions 504 */ 505 506 static DEFINE_SPINLOCK(moxafunc_lock); 507 508 static void moxa_wait_finish(void __iomem *ofsAddr) 509 { 510 unsigned long end = jiffies + moxaFuncTout; 511 512 while (readw(ofsAddr + FuncCode) != 0) 513 if (time_after(jiffies, end)) 514 return; 515 if (readw(ofsAddr + FuncCode) != 0) 516 printk_ratelimited(KERN_WARNING "moxa function expired\n"); 517 } 518 519 static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg) 520 { 521 unsigned long flags; 522 spin_lock_irqsave(&moxafunc_lock, flags); 523 writew(arg, ofsAddr + FuncArg); 524 writew(cmd, ofsAddr + FuncCode); 525 moxa_wait_finish(ofsAddr); 526 spin_unlock_irqrestore(&moxafunc_lock, flags); 527 } 528 529 static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg) 530 { 531 unsigned long flags; 532 u16 ret; 533 spin_lock_irqsave(&moxafunc_lock, flags); 534 writew(arg, ofsAddr + FuncArg); 535 writew(cmd, ofsAddr + FuncCode); 536 moxa_wait_finish(ofsAddr); 537 ret = readw(ofsAddr + FuncArg); 538 spin_unlock_irqrestore(&moxafunc_lock, flags); 539 return ret; 540 } 541 542 static void moxa_low_water_check(void __iomem *ofsAddr) 543 { 544 u16 rptr, wptr, mask, len; 545 546 if (readb(ofsAddr + FlagStat) & Xoff_state) { 547 rptr = readw(ofsAddr + RXrptr); 548 wptr = readw(ofsAddr + RXwptr); 549 mask = readw(ofsAddr + RX_mask); 550 len = (wptr - rptr) & mask; 551 if (len <= Low_water) 552 moxafunc(ofsAddr, FC_SendXon, 0); 553 } 554 } 555 556 /* 557 * TTY operations 558 */ 559 560 static int moxa_ioctl(struct tty_struct *tty, 561 unsigned int cmd, unsigned long arg) 562 { 563 struct moxa_port *ch = tty->driver_data; 564 void __user *argp = (void __user *)arg; 565 int status, ret = 0; 566 567 if (tty->index == MAX_PORTS) { 568 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE && 569 cmd != MOXA_GETMSTATUS) 570 return -EINVAL; 571 } else if (!ch) 572 return -ENODEV; 573 574 switch (cmd) { 575 case MOXA_GETDATACOUNT: 576 moxaLog.tick = jiffies; 577 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog))) 578 ret = -EFAULT; 579 break; 580 case MOXA_FLUSH_QUEUE: 581 MoxaPortFlushData(ch, arg); 582 break; 583 case MOXA_GET_IOQUEUE: { 584 struct moxaq_str __user *argm = argp; 585 struct moxaq_str tmp; 586 struct moxa_port *p; 587 unsigned int i, j; 588 589 for (i = 0; i < MAX_BOARDS; i++) { 590 p = moxa_boards[i].ports; 591 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) { 592 memset(&tmp, 0, sizeof(tmp)); 593 spin_lock_bh(&moxa_lock); 594 if (moxa_boards[i].ready) { 595 tmp.inq = MoxaPortRxQueue(p); 596 tmp.outq = MoxaPortTxQueue(p); 597 } 598 spin_unlock_bh(&moxa_lock); 599 if (copy_to_user(argm, &tmp, sizeof(tmp))) 600 return -EFAULT; 601 } 602 } 603 break; 604 } case MOXA_GET_OQUEUE: 605 status = MoxaPortTxQueue(ch); 606 ret = put_user(status, (unsigned long __user *)argp); 607 break; 608 case MOXA_GET_IQUEUE: 609 status = MoxaPortRxQueue(ch); 610 ret = put_user(status, (unsigned long __user *)argp); 611 break; 612 case MOXA_GETMSTATUS: { 613 struct mxser_mstatus __user *argm = argp; 614 struct mxser_mstatus tmp; 615 struct moxa_port *p; 616 unsigned int i, j; 617 618 for (i = 0; i < MAX_BOARDS; i++) { 619 p = moxa_boards[i].ports; 620 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) { 621 struct tty_struct *ttyp; 622 memset(&tmp, 0, sizeof(tmp)); 623 spin_lock_bh(&moxa_lock); 624 if (!moxa_boards[i].ready) { 625 spin_unlock_bh(&moxa_lock); 626 goto copy; 627 } 628 629 status = MoxaPortLineStatus(p); 630 spin_unlock_bh(&moxa_lock); 631 632 if (status & 1) 633 tmp.cts = 1; 634 if (status & 2) 635 tmp.dsr = 1; 636 if (status & 4) 637 tmp.dcd = 1; 638 639 ttyp = tty_port_tty_get(&p->port); 640 if (!ttyp) 641 tmp.cflag = p->cflag; 642 else 643 tmp.cflag = ttyp->termios.c_cflag; 644 tty_kref_put(ttyp); 645 copy: 646 if (copy_to_user(argm, &tmp, sizeof(tmp))) 647 return -EFAULT; 648 } 649 } 650 break; 651 } 652 default: 653 ret = -ENOIOCTLCMD; 654 } 655 return ret; 656 } 657 658 static int moxa_break_ctl(struct tty_struct *tty, int state) 659 { 660 struct moxa_port *port = tty->driver_data; 661 662 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak, 663 Magic_code); 664 return 0; 665 } 666 667 static const struct tty_operations moxa_ops = { 668 .open = moxa_open, 669 .close = moxa_close, 670 .write = moxa_write, 671 .write_room = moxa_write_room, 672 .flush_buffer = moxa_flush_buffer, 673 .chars_in_buffer = moxa_chars_in_buffer, 674 .ioctl = moxa_ioctl, 675 .set_termios = moxa_set_termios, 676 .stop = moxa_stop, 677 .start = moxa_start, 678 .hangup = moxa_hangup, 679 .break_ctl = moxa_break_ctl, 680 .tiocmget = moxa_tiocmget, 681 .tiocmset = moxa_tiocmset, 682 .set_serial = moxa_set_serial_info, 683 .get_serial = moxa_get_serial_info, 684 }; 685 686 static const struct tty_port_operations moxa_port_ops = { 687 .carrier_raised = moxa_carrier_raised, 688 .dtr_rts = moxa_dtr_rts, 689 .shutdown = moxa_shutdown, 690 }; 691 692 static struct tty_driver *moxaDriver; 693 static DEFINE_TIMER(moxaTimer, moxa_poll); 694 695 /* 696 * HW init 697 */ 698 699 static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model) 700 { 701 switch (brd->boardType) { 702 case MOXA_BOARD_C218_PCI: 703 if (model != 1) 704 goto err; 705 break; 706 case MOXA_BOARD_CP204J: 707 if (model != 3) 708 goto err; 709 break; 710 default: 711 if (model != 2) 712 goto err; 713 break; 714 } 715 return 0; 716 err: 717 return -EINVAL; 718 } 719 720 static int moxa_check_fw(const void *ptr) 721 { 722 const __le16 *lptr = ptr; 723 724 if (*lptr != cpu_to_le16(0x7980)) 725 return -EINVAL; 726 727 return 0; 728 } 729 730 static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf, 731 size_t len) 732 { 733 void __iomem *baseAddr = brd->basemem; 734 u16 tmp; 735 736 writeb(HW_reset, baseAddr + Control_reg); /* reset */ 737 msleep(10); 738 memset_io(baseAddr, 0, 4096); 739 memcpy_toio(baseAddr, buf, len); /* download BIOS */ 740 writeb(0, baseAddr + Control_reg); /* restart */ 741 742 msleep(2000); 743 744 switch (brd->boardType) { 745 case MOXA_BOARD_C218_PCI: 746 tmp = readw(baseAddr + C218_key); 747 if (tmp != C218_KeyCode) 748 goto err; 749 break; 750 case MOXA_BOARD_CP204J: 751 tmp = readw(baseAddr + C218_key); 752 if (tmp != CP204J_KeyCode) 753 goto err; 754 break; 755 default: 756 tmp = readw(baseAddr + C320_key); 757 if (tmp != C320_KeyCode) 758 goto err; 759 tmp = readw(baseAddr + C320_status); 760 if (tmp != STS_init) { 761 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic " 762 "module not found\n"); 763 return -EIO; 764 } 765 break; 766 } 767 768 return 0; 769 err: 770 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n"); 771 return -EIO; 772 } 773 774 static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr, 775 size_t len) 776 { 777 void __iomem *baseAddr = brd->basemem; 778 779 if (len < 7168) { 780 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n"); 781 return -EINVAL; 782 } 783 784 writew(len - 7168 - 2, baseAddr + C320bapi_len); 785 writeb(1, baseAddr + Control_reg); /* Select Page 1 */ 786 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168); 787 writeb(2, baseAddr + Control_reg); /* Select Page 2 */ 788 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168); 789 790 return 0; 791 } 792 793 static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr, 794 size_t len) 795 { 796 void __iomem *baseAddr = brd->basemem; 797 const __le16 *uptr = ptr; 798 size_t wlen, len2, j; 799 unsigned long key, loadbuf, loadlen, checksum, checksum_ok; 800 unsigned int i, retry; 801 u16 usum, keycode; 802 803 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode : 804 C218_KeyCode; 805 806 switch (brd->boardType) { 807 case MOXA_BOARD_CP204J: 808 case MOXA_BOARD_C218_PCI: 809 key = C218_key; 810 loadbuf = C218_LoadBuf; 811 loadlen = C218DLoad_len; 812 checksum = C218check_sum; 813 checksum_ok = C218chksum_ok; 814 break; 815 default: 816 key = C320_key; 817 keycode = C320_KeyCode; 818 loadbuf = C320_LoadBuf; 819 loadlen = C320DLoad_len; 820 checksum = C320check_sum; 821 checksum_ok = C320chksum_ok; 822 break; 823 } 824 825 usum = 0; 826 wlen = len >> 1; 827 for (i = 0; i < wlen; i++) 828 usum += le16_to_cpu(uptr[i]); 829 retry = 0; 830 do { 831 wlen = len >> 1; 832 j = 0; 833 while (wlen) { 834 len2 = (wlen > 2048) ? 2048 : wlen; 835 wlen -= len2; 836 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1); 837 j += len2 << 1; 838 839 writew(len2, baseAddr + loadlen); 840 writew(0, baseAddr + key); 841 for (i = 0; i < 100; i++) { 842 if (readw(baseAddr + key) == keycode) 843 break; 844 msleep(10); 845 } 846 if (readw(baseAddr + key) != keycode) 847 return -EIO; 848 } 849 writew(0, baseAddr + loadlen); 850 writew(usum, baseAddr + checksum); 851 writew(0, baseAddr + key); 852 for (i = 0; i < 100; i++) { 853 if (readw(baseAddr + key) == keycode) 854 break; 855 msleep(10); 856 } 857 retry++; 858 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3)); 859 if (readb(baseAddr + checksum_ok) != 1) 860 return -EIO; 861 862 writew(0, baseAddr + key); 863 for (i = 0; i < 600; i++) { 864 if (readw(baseAddr + Magic_no) == Magic_code) 865 break; 866 msleep(10); 867 } 868 if (readw(baseAddr + Magic_no) != Magic_code) 869 return -EIO; 870 871 if (MOXA_IS_320(brd)) { 872 writew(0x3800, baseAddr + TMS320_PORT1); 873 writew(0x3900, baseAddr + TMS320_PORT2); 874 writew(28499, baseAddr + TMS320_CLOCK); 875 } 876 writew(1, baseAddr + Disable_IRQ); 877 writew(0, baseAddr + Magic_no); 878 for (i = 0; i < 500; i++) { 879 if (readw(baseAddr + Magic_no) == Magic_code) 880 break; 881 msleep(10); 882 } 883 if (readw(baseAddr + Magic_no) != Magic_code) 884 return -EIO; 885 886 if (MOXA_IS_320(brd)) { 887 j = readw(baseAddr + Module_cnt); 888 if (j <= 0) 889 return -EIO; 890 brd->numPorts = j * 8; 891 writew(j, baseAddr + Module_no); 892 writew(0, baseAddr + Magic_no); 893 for (i = 0; i < 600; i++) { 894 if (readw(baseAddr + Magic_no) == Magic_code) 895 break; 896 msleep(10); 897 } 898 if (readw(baseAddr + Magic_no) != Magic_code) 899 return -EIO; 900 } 901 brd->intNdx = baseAddr + IRQindex; 902 brd->intPend = baseAddr + IRQpending; 903 brd->intTable = baseAddr + IRQtable; 904 905 return 0; 906 } 907 908 static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr, 909 size_t len) 910 { 911 void __iomem *ofsAddr, *baseAddr = brd->basemem; 912 struct moxa_port *port; 913 int retval, i; 914 915 if (len % 2) { 916 printk(KERN_ERR "MOXA: bios length is not even\n"); 917 return -EINVAL; 918 } 919 920 retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */ 921 if (retval) 922 return retval; 923 924 switch (brd->boardType) { 925 case MOXA_BOARD_C218_PCI: 926 case MOXA_BOARD_CP204J: 927 port = brd->ports; 928 for (i = 0; i < brd->numPorts; i++, port++) { 929 port->board = brd; 930 port->DCDState = 0; 931 port->tableAddr = baseAddr + Extern_table + 932 Extern_size * i; 933 ofsAddr = port->tableAddr; 934 writew(C218rx_mask, ofsAddr + RX_mask); 935 writew(C218tx_mask, ofsAddr + TX_mask); 936 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb); 937 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb); 938 939 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb); 940 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb); 941 942 } 943 break; 944 default: 945 port = brd->ports; 946 for (i = 0; i < brd->numPorts; i++, port++) { 947 port->board = brd; 948 port->DCDState = 0; 949 port->tableAddr = baseAddr + Extern_table + 950 Extern_size * i; 951 ofsAddr = port->tableAddr; 952 switch (brd->numPorts) { 953 case 8: 954 writew(C320p8rx_mask, ofsAddr + RX_mask); 955 writew(C320p8tx_mask, ofsAddr + TX_mask); 956 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb); 957 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb); 958 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb); 959 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb); 960 961 break; 962 case 16: 963 writew(C320p16rx_mask, ofsAddr + RX_mask); 964 writew(C320p16tx_mask, ofsAddr + TX_mask); 965 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb); 966 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb); 967 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb); 968 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb); 969 break; 970 971 case 24: 972 writew(C320p24rx_mask, ofsAddr + RX_mask); 973 writew(C320p24tx_mask, ofsAddr + TX_mask); 974 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb); 975 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb); 976 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb); 977 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb); 978 break; 979 case 32: 980 writew(C320p32rx_mask, ofsAddr + RX_mask); 981 writew(C320p32tx_mask, ofsAddr + TX_mask); 982 writew(C320p32tx_ofs, ofsAddr + Ofs_txb); 983 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb); 984 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb); 985 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb); 986 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb); 987 break; 988 } 989 } 990 break; 991 } 992 return 0; 993 } 994 995 static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw) 996 { 997 const void *ptr = fw->data; 998 char rsn[64]; 999 u16 lens[5]; 1000 size_t len; 1001 unsigned int a, lenp, lencnt; 1002 int ret = -EINVAL; 1003 struct { 1004 __le32 magic; /* 0x34303430 */ 1005 u8 reserved1[2]; 1006 u8 type; /* UNIX = 3 */ 1007 u8 model; /* C218T=1, C320T=2, CP204=3 */ 1008 u8 reserved2[8]; 1009 __le16 len[5]; 1010 } const *hdr = ptr; 1011 1012 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens)); 1013 1014 if (fw->size < MOXA_FW_HDRLEN) { 1015 strcpy(rsn, "too short (even header won't fit)"); 1016 goto err; 1017 } 1018 if (hdr->magic != cpu_to_le32(0x30343034)) { 1019 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic)); 1020 goto err; 1021 } 1022 if (hdr->type != 3) { 1023 sprintf(rsn, "not for linux, type is %u", hdr->type); 1024 goto err; 1025 } 1026 if (moxa_check_fw_model(brd, hdr->model)) { 1027 sprintf(rsn, "not for this card, model is %u", hdr->model); 1028 goto err; 1029 } 1030 1031 len = MOXA_FW_HDRLEN; 1032 lencnt = hdr->model == 2 ? 5 : 3; 1033 for (a = 0; a < ARRAY_SIZE(lens); a++) { 1034 lens[a] = le16_to_cpu(hdr->len[a]); 1035 if (lens[a] && len + lens[a] <= fw->size && 1036 moxa_check_fw(&fw->data[len])) 1037 printk(KERN_WARNING "MOXA firmware: unexpected input " 1038 "at offset %u, but going on\n", (u32)len); 1039 if (!lens[a] && a < lencnt) { 1040 sprintf(rsn, "too few entries in fw file"); 1041 goto err; 1042 } 1043 len += lens[a]; 1044 } 1045 1046 if (len != fw->size) { 1047 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size, 1048 (u32)len); 1049 goto err; 1050 } 1051 1052 ptr += MOXA_FW_HDRLEN; 1053 lenp = 0; /* bios */ 1054 1055 strcpy(rsn, "read above"); 1056 1057 ret = moxa_load_bios(brd, ptr, lens[lenp]); 1058 if (ret) 1059 goto err; 1060 1061 /* we skip the tty section (lens[1]), since we don't need it */ 1062 ptr += lens[lenp] + lens[lenp + 1]; 1063 lenp += 2; /* comm */ 1064 1065 if (hdr->model == 2) { 1066 ret = moxa_load_320b(brd, ptr, lens[lenp]); 1067 if (ret) 1068 goto err; 1069 /* skip another tty */ 1070 ptr += lens[lenp] + lens[lenp + 1]; 1071 lenp += 2; 1072 } 1073 1074 ret = moxa_load_code(brd, ptr, lens[lenp]); 1075 if (ret) 1076 goto err; 1077 1078 return 0; 1079 err: 1080 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn); 1081 return ret; 1082 } 1083 1084 static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev) 1085 { 1086 const struct firmware *fw; 1087 const char *file; 1088 struct moxa_port *p; 1089 unsigned int i, first_idx; 1090 int ret; 1091 1092 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports), 1093 GFP_KERNEL); 1094 if (brd->ports == NULL) { 1095 printk(KERN_ERR "cannot allocate memory for ports\n"); 1096 ret = -ENOMEM; 1097 goto err; 1098 } 1099 1100 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) { 1101 tty_port_init(&p->port); 1102 p->port.ops = &moxa_port_ops; 1103 p->type = PORT_16550A; 1104 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL; 1105 } 1106 1107 switch (brd->boardType) { 1108 case MOXA_BOARD_C218_PCI: 1109 file = "c218tunx.cod"; 1110 break; 1111 case MOXA_BOARD_CP204J: 1112 file = "cp204unx.cod"; 1113 break; 1114 default: 1115 file = "c320tunx.cod"; 1116 break; 1117 } 1118 1119 ret = request_firmware(&fw, file, dev); 1120 if (ret) { 1121 printk(KERN_ERR "MOXA: request_firmware failed. Make sure " 1122 "you've placed '%s' file into your firmware " 1123 "loader directory (e.g. /lib/firmware)\n", 1124 file); 1125 goto err_free; 1126 } 1127 1128 ret = moxa_load_fw(brd, fw); 1129 1130 release_firmware(fw); 1131 1132 if (ret) 1133 goto err_free; 1134 1135 spin_lock_bh(&moxa_lock); 1136 brd->ready = 1; 1137 if (!timer_pending(&moxaTimer)) 1138 mod_timer(&moxaTimer, jiffies + HZ / 50); 1139 spin_unlock_bh(&moxa_lock); 1140 1141 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD; 1142 for (i = 0; i < brd->numPorts; i++) 1143 tty_port_register_device(&brd->ports[i].port, moxaDriver, 1144 first_idx + i, dev); 1145 1146 return 0; 1147 err_free: 1148 for (i = 0; i < MAX_PORTS_PER_BOARD; i++) 1149 tty_port_destroy(&brd->ports[i].port); 1150 kfree(brd->ports); 1151 err: 1152 return ret; 1153 } 1154 1155 static void moxa_board_deinit(struct moxa_board_conf *brd) 1156 { 1157 unsigned int a, opened, first_idx; 1158 1159 mutex_lock(&moxa_openlock); 1160 spin_lock_bh(&moxa_lock); 1161 brd->ready = 0; 1162 spin_unlock_bh(&moxa_lock); 1163 1164 /* pci hot-un-plug support */ 1165 for (a = 0; a < brd->numPorts; a++) 1166 if (tty_port_initialized(&brd->ports[a].port)) 1167 tty_port_tty_hangup(&brd->ports[a].port, false); 1168 1169 for (a = 0; a < MAX_PORTS_PER_BOARD; a++) 1170 tty_port_destroy(&brd->ports[a].port); 1171 1172 while (1) { 1173 opened = 0; 1174 for (a = 0; a < brd->numPorts; a++) 1175 if (tty_port_initialized(&brd->ports[a].port)) 1176 opened++; 1177 mutex_unlock(&moxa_openlock); 1178 if (!opened) 1179 break; 1180 msleep(50); 1181 mutex_lock(&moxa_openlock); 1182 } 1183 1184 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD; 1185 for (a = 0; a < brd->numPorts; a++) 1186 tty_unregister_device(moxaDriver, first_idx + a); 1187 1188 iounmap(brd->basemem); 1189 brd->basemem = NULL; 1190 kfree(brd->ports); 1191 } 1192 1193 static int moxa_pci_probe(struct pci_dev *pdev, 1194 const struct pci_device_id *ent) 1195 { 1196 struct moxa_board_conf *board; 1197 unsigned int i; 1198 int board_type = ent->driver_data; 1199 int retval; 1200 1201 retval = pci_enable_device(pdev); 1202 if (retval) { 1203 dev_err(&pdev->dev, "can't enable pci device\n"); 1204 goto err; 1205 } 1206 1207 for (i = 0; i < MAX_BOARDS; i++) 1208 if (moxa_boards[i].basemem == NULL) 1209 break; 1210 1211 retval = -ENODEV; 1212 if (i >= MAX_BOARDS) { 1213 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards " 1214 "found. Board is ignored.\n", MAX_BOARDS); 1215 goto err; 1216 } 1217 1218 board = &moxa_boards[i]; 1219 1220 retval = pci_request_region(pdev, 2, "moxa-base"); 1221 if (retval) { 1222 dev_err(&pdev->dev, "can't request pci region 2\n"); 1223 goto err; 1224 } 1225 1226 board->basemem = ioremap(pci_resource_start(pdev, 2), 0x4000); 1227 if (board->basemem == NULL) { 1228 dev_err(&pdev->dev, "can't remap io space 2\n"); 1229 retval = -ENOMEM; 1230 goto err_reg; 1231 } 1232 1233 board->boardType = board_type; 1234 switch (board_type) { 1235 case MOXA_BOARD_C218_PCI: 1236 board->numPorts = 8; 1237 break; 1238 1239 case MOXA_BOARD_CP204J: 1240 board->numPorts = 4; 1241 break; 1242 default: 1243 board->numPorts = 0; 1244 break; 1245 } 1246 1247 retval = moxa_init_board(board, &pdev->dev); 1248 if (retval) 1249 goto err_base; 1250 1251 pci_set_drvdata(pdev, board); 1252 1253 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n", 1254 moxa_brdname[board_type - 1], board->numPorts); 1255 1256 return 0; 1257 err_base: 1258 iounmap(board->basemem); 1259 board->basemem = NULL; 1260 err_reg: 1261 pci_release_region(pdev, 2); 1262 err: 1263 return retval; 1264 } 1265 1266 static void moxa_pci_remove(struct pci_dev *pdev) 1267 { 1268 struct moxa_board_conf *brd = pci_get_drvdata(pdev); 1269 1270 moxa_board_deinit(brd); 1271 1272 pci_release_region(pdev, 2); 1273 } 1274 1275 static struct pci_driver moxa_pci_driver = { 1276 .name = "moxa", 1277 .id_table = moxa_pcibrds, 1278 .probe = moxa_pci_probe, 1279 .remove = moxa_pci_remove 1280 }; 1281 1282 static int __init moxa_init(void) 1283 { 1284 int retval = 0; 1285 1286 tty_port_init(&moxa_service_port); 1287 1288 moxaDriver = tty_alloc_driver(MAX_PORTS + 1, 1289 TTY_DRIVER_REAL_RAW | 1290 TTY_DRIVER_DYNAMIC_DEV); 1291 if (IS_ERR(moxaDriver)) 1292 return PTR_ERR(moxaDriver); 1293 1294 moxaDriver->name = "ttyMX"; 1295 moxaDriver->major = ttymajor; 1296 moxaDriver->minor_start = 0; 1297 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL; 1298 moxaDriver->subtype = SERIAL_TYPE_NORMAL; 1299 moxaDriver->init_termios = tty_std_termios; 1300 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL; 1301 moxaDriver->init_termios.c_ispeed = 9600; 1302 moxaDriver->init_termios.c_ospeed = 9600; 1303 tty_set_operations(moxaDriver, &moxa_ops); 1304 /* Having one more port only for ioctls is ugly */ 1305 tty_port_link_device(&moxa_service_port, moxaDriver, MAX_PORTS); 1306 1307 if (tty_register_driver(moxaDriver)) { 1308 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n"); 1309 tty_driver_kref_put(moxaDriver); 1310 return -1; 1311 } 1312 1313 retval = pci_register_driver(&moxa_pci_driver); 1314 if (retval) 1315 printk(KERN_ERR "Can't register MOXA pci driver!\n"); 1316 1317 return retval; 1318 } 1319 1320 static void __exit moxa_exit(void) 1321 { 1322 pci_unregister_driver(&moxa_pci_driver); 1323 1324 del_timer_sync(&moxaTimer); 1325 1326 tty_unregister_driver(moxaDriver); 1327 tty_driver_kref_put(moxaDriver); 1328 } 1329 1330 module_init(moxa_init); 1331 module_exit(moxa_exit); 1332 1333 static void moxa_shutdown(struct tty_port *port) 1334 { 1335 struct moxa_port *ch = container_of(port, struct moxa_port, port); 1336 MoxaPortDisable(ch); 1337 MoxaPortFlushData(ch, 2); 1338 } 1339 1340 static bool moxa_carrier_raised(struct tty_port *port) 1341 { 1342 struct moxa_port *ch = container_of(port, struct moxa_port, port); 1343 int dcd; 1344 1345 spin_lock_irq(&port->lock); 1346 dcd = ch->DCDState; 1347 spin_unlock_irq(&port->lock); 1348 return dcd; 1349 } 1350 1351 static void moxa_dtr_rts(struct tty_port *port, bool active) 1352 { 1353 struct moxa_port *ch = container_of(port, struct moxa_port, port); 1354 MoxaPortLineCtrl(ch, active, active); 1355 } 1356 1357 1358 static int moxa_open(struct tty_struct *tty, struct file *filp) 1359 { 1360 struct moxa_board_conf *brd; 1361 struct moxa_port *ch; 1362 int port; 1363 1364 port = tty->index; 1365 if (port == MAX_PORTS) { 1366 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM; 1367 } 1368 if (mutex_lock_interruptible(&moxa_openlock)) 1369 return -ERESTARTSYS; 1370 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD]; 1371 if (!brd->ready) { 1372 mutex_unlock(&moxa_openlock); 1373 return -ENODEV; 1374 } 1375 1376 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) { 1377 mutex_unlock(&moxa_openlock); 1378 return -ENODEV; 1379 } 1380 1381 ch = &brd->ports[port % MAX_PORTS_PER_BOARD]; 1382 ch->port.count++; 1383 tty->driver_data = ch; 1384 tty_port_tty_set(&ch->port, tty); 1385 mutex_lock(&ch->port.mutex); 1386 if (!tty_port_initialized(&ch->port)) { 1387 ch->statusflags = 0; 1388 moxa_set_tty_param(tty, &tty->termios); 1389 MoxaPortLineCtrl(ch, true, true); 1390 MoxaPortEnable(ch); 1391 MoxaSetFifo(ch, ch->type == PORT_16550A); 1392 tty_port_set_initialized(&ch->port, true); 1393 } 1394 mutex_unlock(&ch->port.mutex); 1395 mutex_unlock(&moxa_openlock); 1396 1397 return tty_port_block_til_ready(&ch->port, tty, filp); 1398 } 1399 1400 static void moxa_close(struct tty_struct *tty, struct file *filp) 1401 { 1402 struct moxa_port *ch = tty->driver_data; 1403 ch->cflag = tty->termios.c_cflag; 1404 tty_port_close(&ch->port, tty, filp); 1405 } 1406 1407 static ssize_t moxa_write(struct tty_struct *tty, const u8 *buf, size_t count) 1408 { 1409 struct moxa_port *ch = tty->driver_data; 1410 unsigned long flags; 1411 int len; 1412 1413 if (ch == NULL) 1414 return 0; 1415 1416 spin_lock_irqsave(&moxa_lock, flags); 1417 len = MoxaPortWriteData(tty, buf, count); 1418 spin_unlock_irqrestore(&moxa_lock, flags); 1419 1420 set_bit(LOWWAIT, &ch->statusflags); 1421 return len; 1422 } 1423 1424 static unsigned int moxa_write_room(struct tty_struct *tty) 1425 { 1426 struct moxa_port *ch; 1427 1428 if (tty->flow.stopped) 1429 return 0; 1430 ch = tty->driver_data; 1431 if (ch == NULL) 1432 return 0; 1433 return MoxaPortTxFree(ch); 1434 } 1435 1436 static void moxa_flush_buffer(struct tty_struct *tty) 1437 { 1438 struct moxa_port *ch = tty->driver_data; 1439 1440 if (ch == NULL) 1441 return; 1442 MoxaPortFlushData(ch, 1); 1443 tty_wakeup(tty); 1444 } 1445 1446 static unsigned int moxa_chars_in_buffer(struct tty_struct *tty) 1447 { 1448 struct moxa_port *ch = tty->driver_data; 1449 unsigned int chars; 1450 1451 chars = MoxaPortTxQueue(ch); 1452 if (chars) 1453 /* 1454 * Make it possible to wakeup anything waiting for output 1455 * in tty_ioctl.c, etc. 1456 */ 1457 set_bit(EMPTYWAIT, &ch->statusflags); 1458 return chars; 1459 } 1460 1461 static int moxa_tiocmget(struct tty_struct *tty) 1462 { 1463 struct moxa_port *ch = tty->driver_data; 1464 bool dtr_active, rts_active; 1465 int flag = 0; 1466 int status; 1467 1468 MoxaPortGetLineOut(ch, &dtr_active, &rts_active); 1469 if (dtr_active) 1470 flag |= TIOCM_DTR; 1471 if (rts_active) 1472 flag |= TIOCM_RTS; 1473 status = MoxaPortLineStatus(ch); 1474 if (status & 1) 1475 flag |= TIOCM_CTS; 1476 if (status & 2) 1477 flag |= TIOCM_DSR; 1478 if (status & 4) 1479 flag |= TIOCM_CD; 1480 return flag; 1481 } 1482 1483 static int moxa_tiocmset(struct tty_struct *tty, 1484 unsigned int set, unsigned int clear) 1485 { 1486 bool dtr_active, rts_active; 1487 struct moxa_port *ch; 1488 1489 mutex_lock(&moxa_openlock); 1490 ch = tty->driver_data; 1491 if (!ch) { 1492 mutex_unlock(&moxa_openlock); 1493 return -EINVAL; 1494 } 1495 1496 MoxaPortGetLineOut(ch, &dtr_active, &rts_active); 1497 if (set & TIOCM_RTS) 1498 rts_active = true; 1499 if (set & TIOCM_DTR) 1500 dtr_active = true; 1501 if (clear & TIOCM_RTS) 1502 rts_active = false; 1503 if (clear & TIOCM_DTR) 1504 dtr_active = false; 1505 MoxaPortLineCtrl(ch, dtr_active, rts_active); 1506 mutex_unlock(&moxa_openlock); 1507 return 0; 1508 } 1509 1510 static void moxa_set_termios(struct tty_struct *tty, 1511 const struct ktermios *old_termios) 1512 { 1513 struct moxa_port *ch = tty->driver_data; 1514 1515 if (ch == NULL) 1516 return; 1517 moxa_set_tty_param(tty, old_termios); 1518 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty)) 1519 wake_up_interruptible(&ch->port.open_wait); 1520 } 1521 1522 static void moxa_stop(struct tty_struct *tty) 1523 { 1524 struct moxa_port *ch = tty->driver_data; 1525 1526 if (ch == NULL) 1527 return; 1528 MoxaPortTxDisable(ch); 1529 set_bit(TXSTOPPED, &ch->statusflags); 1530 } 1531 1532 1533 static void moxa_start(struct tty_struct *tty) 1534 { 1535 struct moxa_port *ch = tty->driver_data; 1536 1537 if (ch == NULL) 1538 return; 1539 1540 if (!test_bit(TXSTOPPED, &ch->statusflags)) 1541 return; 1542 1543 MoxaPortTxEnable(ch); 1544 clear_bit(TXSTOPPED, &ch->statusflags); 1545 } 1546 1547 static void moxa_hangup(struct tty_struct *tty) 1548 { 1549 struct moxa_port *ch = tty->driver_data; 1550 tty_port_hangup(&ch->port); 1551 } 1552 1553 static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd) 1554 { 1555 unsigned long flags; 1556 dcd = !!dcd; 1557 1558 spin_lock_irqsave(&p->port.lock, flags); 1559 if (dcd != p->DCDState) { 1560 p->DCDState = dcd; 1561 spin_unlock_irqrestore(&p->port.lock, flags); 1562 if (!dcd) 1563 tty_port_tty_hangup(&p->port, true); 1564 } 1565 else 1566 spin_unlock_irqrestore(&p->port.lock, flags); 1567 } 1568 1569 static int moxa_poll_port(struct moxa_port *p, unsigned int handle, 1570 u16 __iomem *ip) 1571 { 1572 struct tty_struct *tty = tty_port_tty_get(&p->port); 1573 bool inited = tty_port_initialized(&p->port); 1574 void __iomem *ofsAddr; 1575 u16 intr; 1576 1577 if (tty) { 1578 if (test_bit(EMPTYWAIT, &p->statusflags) && 1579 MoxaPortTxQueue(p) == 0) { 1580 clear_bit(EMPTYWAIT, &p->statusflags); 1581 tty_wakeup(tty); 1582 } 1583 if (test_bit(LOWWAIT, &p->statusflags) && !tty->flow.stopped && 1584 MoxaPortTxQueue(p) <= WAKEUP_CHARS) { 1585 clear_bit(LOWWAIT, &p->statusflags); 1586 tty_wakeup(tty); 1587 } 1588 1589 if (inited && !tty_throttled(tty) && 1590 MoxaPortRxQueue(p) > 0) { /* RX */ 1591 MoxaPortReadData(p); 1592 tty_flip_buffer_push(&p->port); 1593 } 1594 } else { 1595 clear_bit(EMPTYWAIT, &p->statusflags); 1596 MoxaPortFlushData(p, 0); /* flush RX */ 1597 } 1598 1599 if (!handle) /* nothing else to do */ 1600 goto put; 1601 1602 intr = readw(ip); /* port irq status */ 1603 if (intr == 0) 1604 goto put; 1605 1606 writew(0, ip); /* ACK port */ 1607 ofsAddr = p->tableAddr; 1608 if (intr & IntrTx) /* disable tx intr */ 1609 writew(readw(ofsAddr + HostStat) & ~WakeupTx, 1610 ofsAddr + HostStat); 1611 1612 if (!inited) 1613 goto put; 1614 1615 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */ 1616 tty_insert_flip_char(&p->port, 0, TTY_BREAK); 1617 tty_flip_buffer_push(&p->port); 1618 } 1619 1620 if (intr & IntrLine) 1621 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state); 1622 put: 1623 tty_kref_put(tty); 1624 1625 return 0; 1626 } 1627 1628 static void moxa_poll(struct timer_list *unused) 1629 { 1630 struct moxa_board_conf *brd; 1631 u16 __iomem *ip; 1632 unsigned int card, port, served = 0; 1633 1634 spin_lock(&moxa_lock); 1635 for (card = 0; card < MAX_BOARDS; card++) { 1636 brd = &moxa_boards[card]; 1637 if (!brd->ready) 1638 continue; 1639 1640 served++; 1641 1642 ip = NULL; 1643 if (readb(brd->intPend) == 0xff) 1644 ip = brd->intTable + readb(brd->intNdx); 1645 1646 for (port = 0; port < brd->numPorts; port++) 1647 moxa_poll_port(&brd->ports[port], !!ip, ip + port); 1648 1649 if (ip) 1650 writeb(0, brd->intPend); /* ACK */ 1651 1652 if (moxaLowWaterChk) { 1653 struct moxa_port *p = brd->ports; 1654 for (port = 0; port < brd->numPorts; port++, p++) 1655 if (p->lowChkFlag) { 1656 p->lowChkFlag = 0; 1657 moxa_low_water_check(p->tableAddr); 1658 } 1659 } 1660 } 1661 moxaLowWaterChk = 0; 1662 1663 if (served) 1664 mod_timer(&moxaTimer, jiffies + HZ / 50); 1665 spin_unlock(&moxa_lock); 1666 } 1667 1668 /******************************************************************************/ 1669 1670 static void moxa_set_tty_param(struct tty_struct *tty, 1671 const struct ktermios *old_termios) 1672 { 1673 register struct ktermios *ts = &tty->termios; 1674 struct moxa_port *ch = tty->driver_data; 1675 int rts, cts, txflow, rxflow, xany, baud; 1676 1677 rts = cts = txflow = rxflow = xany = 0; 1678 if (ts->c_cflag & CRTSCTS) 1679 rts = cts = 1; 1680 if (ts->c_iflag & IXON) 1681 txflow = 1; 1682 if (ts->c_iflag & IXOFF) 1683 rxflow = 1; 1684 if (ts->c_iflag & IXANY) 1685 xany = 1; 1686 1687 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany); 1688 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty)); 1689 if (baud == -1) 1690 baud = tty_termios_baud_rate(old_termios); 1691 /* Not put the baud rate into the termios data */ 1692 tty_encode_baud_rate(tty, baud, baud); 1693 } 1694 1695 /***************************************************************************** 1696 * Driver level functions: * 1697 *****************************************************************************/ 1698 1699 static void MoxaPortFlushData(struct moxa_port *port, int mode) 1700 { 1701 void __iomem *ofsAddr; 1702 if (mode < 0 || mode > 2) 1703 return; 1704 ofsAddr = port->tableAddr; 1705 moxafunc(ofsAddr, FC_FlushQueue, mode); 1706 if (mode != 1) { 1707 port->lowChkFlag = 0; 1708 moxa_low_water_check(ofsAddr); 1709 } 1710 } 1711 1712 /* 1713 * Moxa Port Number Description: 1714 * 1715 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And, 1716 * the port number using in MOXA driver functions will be 0 to 31 for 1717 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96 1718 * to 127 for fourth. For example, if you setup three MOXA boards, 1719 * first board is C218, second board is C320-16 and third board is 1720 * C320-32. The port number of first board (C218 - 8 ports) is from 1721 * 0 to 7. The port number of second board (C320 - 16 ports) is form 1722 * 32 to 47. The port number of third board (C320 - 32 ports) is from 1723 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to 1724 * 127 will be invalid. 1725 * 1726 * 1727 * Moxa Functions Description: 1728 * 1729 * Function 1: Driver initialization routine, this routine must be 1730 * called when initialized driver. 1731 * Syntax: 1732 * void MoxaDriverInit(); 1733 * 1734 * 1735 * Function 2: Moxa driver private IOCTL command processing. 1736 * Syntax: 1737 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port); 1738 * 1739 * unsigned int cmd : IOCTL command 1740 * unsigned long arg : IOCTL argument 1741 * int port : port number (0 - 127) 1742 * 1743 * return: 0 (OK) 1744 * -EINVAL 1745 * -ENOIOCTLCMD 1746 * 1747 * 1748 * Function 6: Enable this port to start Tx/Rx data. 1749 * Syntax: 1750 * void MoxaPortEnable(int port); 1751 * int port : port number (0 - 127) 1752 * 1753 * 1754 * Function 7: Disable this port 1755 * Syntax: 1756 * void MoxaPortDisable(int port); 1757 * int port : port number (0 - 127) 1758 * 1759 * 1760 * Function 10: Setting baud rate of this port. 1761 * Syntax: 1762 * speed_t MoxaPortSetBaud(int port, speed_t baud); 1763 * int port : port number (0 - 127) 1764 * long baud : baud rate (50 - 115200) 1765 * 1766 * return: 0 : this port is invalid or baud < 50 1767 * 50 - 115200 : the real baud rate set to the port, if 1768 * the argument baud is large than maximun 1769 * available baud rate, the real setting 1770 * baud rate will be the maximun baud rate. 1771 * 1772 * 1773 * Function 12: Configure the port. 1774 * Syntax: 1775 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud); 1776 * int port : port number (0 - 127) 1777 * struct ktermios * termio : termio structure pointer 1778 * speed_t baud : baud rate 1779 * 1780 * return: -1 : this port is invalid or termio == NULL 1781 * 0 : setting O.K. 1782 * 1783 * 1784 * Function 13: Get the DTR/RTS state of this port. 1785 * Syntax: 1786 * int MoxaPortGetLineOut(int port, bool *dtrState, bool *rtsState); 1787 * int port : port number (0 - 127) 1788 * bool * dtr_active : pointer to bool to receive the current DTR 1789 * state. (if NULL, this function will not 1790 * write to this address) 1791 * bool * rts_active : pointer to bool to receive the current RTS 1792 * state. (if NULL, this function will not 1793 * write to this address) 1794 * 1795 * return: -1 : this port is invalid 1796 * 0 : O.K. 1797 * 1798 * 1799 * Function 14: Setting the DTR/RTS output state of this port. 1800 * Syntax: 1801 * void MoxaPortLineCtrl(int port, bool dtrState, bool rtsState); 1802 * int port : port number (0 - 127) 1803 * bool dtr_active : DTR output state 1804 * bool rts_active : RTS output state 1805 * 1806 * 1807 * Function 15: Setting the flow control of this port. 1808 * Syntax: 1809 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow, 1810 * int txFlow,int xany); 1811 * int port : port number (0 - 127) 1812 * int rtsFlow : H/W RTS flow control (0: no, 1: yes) 1813 * int ctsFlow : H/W CTS flow control (0: no, 1: yes) 1814 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes) 1815 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes) 1816 * int xany : S/W XANY flow control (0: no, 1: yes) 1817 * 1818 * 1819 * Function 16: Get ths line status of this port 1820 * Syntax: 1821 * int MoxaPortLineStatus(int port); 1822 * int port : port number (0 - 127) 1823 * 1824 * return: Bit 0 - CTS state (0: off, 1: on) 1825 * Bit 1 - DSR state (0: off, 1: on) 1826 * Bit 2 - DCD state (0: off, 1: on) 1827 * 1828 * 1829 * Function 19: Flush the Rx/Tx buffer data of this port. 1830 * Syntax: 1831 * void MoxaPortFlushData(int port, int mode); 1832 * int port : port number (0 - 127) 1833 * int mode 1834 * 0 : flush the Rx buffer 1835 * 1 : flush the Tx buffer 1836 * 2 : flush the Rx and Tx buffer 1837 * 1838 * 1839 * Function 20: Write data. 1840 * Syntax: 1841 * ssize_t MoxaPortWriteData(int port, u8 *buffer, size_t length); 1842 * int port : port number (0 - 127) 1843 * u8 *buffer : pointer to write data buffer. 1844 * size_t length : write data length 1845 * 1846 * return: 0 - length : real write data length 1847 * 1848 * 1849 * Function 21: Read data. 1850 * Syntax: 1851 * int MoxaPortReadData(int port, struct tty_struct *tty); 1852 * int port : port number (0 - 127) 1853 * struct tty_struct *tty : tty for data 1854 * 1855 * return: 0 - length : real read data length 1856 * 1857 * 1858 * Function 24: Get the Tx buffer current queued data bytes 1859 * Syntax: 1860 * int MoxaPortTxQueue(int port); 1861 * int port : port number (0 - 127) 1862 * 1863 * return: .. : Tx buffer current queued data bytes 1864 * 1865 * 1866 * Function 25: Get the Tx buffer current free space 1867 * Syntax: 1868 * int MoxaPortTxFree(int port); 1869 * int port : port number (0 - 127) 1870 * 1871 * return: .. : Tx buffer current free space 1872 * 1873 * 1874 * Function 26: Get the Rx buffer current queued data bytes 1875 * Syntax: 1876 * int MoxaPortRxQueue(int port); 1877 * int port : port number (0 - 127) 1878 * 1879 * return: .. : Rx buffer current queued data bytes 1880 * 1881 * 1882 * Function 28: Disable port data transmission. 1883 * Syntax: 1884 * void MoxaPortTxDisable(int port); 1885 * int port : port number (0 - 127) 1886 * 1887 * 1888 * Function 29: Enable port data transmission. 1889 * Syntax: 1890 * void MoxaPortTxEnable(int port); 1891 * int port : port number (0 - 127) 1892 * 1893 * 1894 * Function 31: Get the received BREAK signal count and reset it. 1895 * Syntax: 1896 * int MoxaPortResetBrkCnt(int port); 1897 * int port : port number (0 - 127) 1898 * 1899 * return: 0 - .. : BREAK signal count 1900 * 1901 * 1902 */ 1903 1904 static void MoxaPortEnable(struct moxa_port *port) 1905 { 1906 void __iomem *ofsAddr; 1907 u16 lowwater = 512; 1908 1909 ofsAddr = port->tableAddr; 1910 writew(lowwater, ofsAddr + Low_water); 1911 if (MOXA_IS_320(port->board)) 1912 moxafunc(ofsAddr, FC_SetBreakIrq, 0); 1913 else 1914 writew(readw(ofsAddr + HostStat) | WakeupBreak, 1915 ofsAddr + HostStat); 1916 1917 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code); 1918 moxafunc(ofsAddr, FC_FlushQueue, 2); 1919 1920 moxafunc(ofsAddr, FC_EnableCH, Magic_code); 1921 MoxaPortLineStatus(port); 1922 } 1923 1924 static void MoxaPortDisable(struct moxa_port *port) 1925 { 1926 void __iomem *ofsAddr = port->tableAddr; 1927 1928 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */ 1929 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code); 1930 writew(0, ofsAddr + HostStat); 1931 moxafunc(ofsAddr, FC_DisableCH, Magic_code); 1932 } 1933 1934 static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud) 1935 { 1936 void __iomem *ofsAddr = port->tableAddr; 1937 unsigned int clock, val; 1938 speed_t max; 1939 1940 max = MOXA_IS_320(port->board) ? 460800 : 921600; 1941 if (baud < 50) 1942 return 0; 1943 if (baud > max) 1944 baud = max; 1945 clock = 921600; 1946 val = clock / baud; 1947 moxafunc(ofsAddr, FC_SetBaud, val); 1948 baud = clock / val; 1949 return baud; 1950 } 1951 1952 static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio, 1953 speed_t baud) 1954 { 1955 void __iomem *ofsAddr; 1956 tcflag_t mode = 0; 1957 1958 ofsAddr = port->tableAddr; 1959 1960 mode = termio->c_cflag & CSIZE; 1961 if (mode == CS5) 1962 mode = MX_CS5; 1963 else if (mode == CS6) 1964 mode = MX_CS6; 1965 else if (mode == CS7) 1966 mode = MX_CS7; 1967 else if (mode == CS8) 1968 mode = MX_CS8; 1969 1970 if (termio->c_cflag & CSTOPB) { 1971 if (mode == MX_CS5) 1972 mode |= MX_STOP15; 1973 else 1974 mode |= MX_STOP2; 1975 } else 1976 mode |= MX_STOP1; 1977 1978 if (termio->c_cflag & PARENB) { 1979 if (termio->c_cflag & PARODD) { 1980 if (termio->c_cflag & CMSPAR) 1981 mode |= MX_PARMARK; 1982 else 1983 mode |= MX_PARODD; 1984 } else { 1985 if (termio->c_cflag & CMSPAR) 1986 mode |= MX_PARSPACE; 1987 else 1988 mode |= MX_PAREVEN; 1989 } 1990 } else 1991 mode |= MX_PARNONE; 1992 1993 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode); 1994 1995 if (MOXA_IS_320(port->board) && baud >= 921600) 1996 return -1; 1997 1998 baud = MoxaPortSetBaud(port, baud); 1999 2000 if (termio->c_iflag & (IXON | IXOFF | IXANY)) { 2001 spin_lock_irq(&moxafunc_lock); 2002 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg); 2003 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1); 2004 writeb(FC_SetXonXoff, ofsAddr + FuncCode); 2005 moxa_wait_finish(ofsAddr); 2006 spin_unlock_irq(&moxafunc_lock); 2007 2008 } 2009 return baud; 2010 } 2011 2012 static int MoxaPortGetLineOut(struct moxa_port *port, bool *dtr_active, 2013 bool *rts_active) 2014 { 2015 if (dtr_active) 2016 *dtr_active = port->lineCtrl & DTR_ON; 2017 if (rts_active) 2018 *rts_active = port->lineCtrl & RTS_ON; 2019 2020 return 0; 2021 } 2022 2023 static void MoxaPortLineCtrl(struct moxa_port *port, bool dtr_active, bool rts_active) 2024 { 2025 u8 mode = 0; 2026 2027 if (dtr_active) 2028 mode |= DTR_ON; 2029 if (rts_active) 2030 mode |= RTS_ON; 2031 port->lineCtrl = mode; 2032 moxafunc(port->tableAddr, FC_LineControl, mode); 2033 } 2034 2035 static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts, 2036 int txflow, int rxflow, int txany) 2037 { 2038 int mode = 0; 2039 2040 if (rts) 2041 mode |= RTS_FlowCtl; 2042 if (cts) 2043 mode |= CTS_FlowCtl; 2044 if (txflow) 2045 mode |= Tx_FlowCtl; 2046 if (rxflow) 2047 mode |= Rx_FlowCtl; 2048 if (txany) 2049 mode |= IXM_IXANY; 2050 moxafunc(port->tableAddr, FC_SetFlowCtl, mode); 2051 } 2052 2053 static int MoxaPortLineStatus(struct moxa_port *port) 2054 { 2055 void __iomem *ofsAddr; 2056 int val; 2057 2058 ofsAddr = port->tableAddr; 2059 if (MOXA_IS_320(port->board)) 2060 val = moxafuncret(ofsAddr, FC_LineStatus, 0); 2061 else 2062 val = readw(ofsAddr + FlagStat) >> 4; 2063 val &= 0x0B; 2064 if (val & 8) 2065 val |= 4; 2066 moxa_new_dcdstate(port, val & 8); 2067 val &= 7; 2068 return val; 2069 } 2070 2071 static ssize_t MoxaPortWriteData(struct tty_struct *tty, const u8 *buffer, 2072 size_t len) 2073 { 2074 struct moxa_port *port = tty->driver_data; 2075 void __iomem *baseAddr, *ofsAddr, *ofs; 2076 size_t c, total; 2077 u16 head, tail, tx_mask, spage, epage; 2078 u16 pageno, pageofs, bufhead; 2079 2080 ofsAddr = port->tableAddr; 2081 baseAddr = port->board->basemem; 2082 tx_mask = readw(ofsAddr + TX_mask); 2083 spage = readw(ofsAddr + Page_txb); 2084 epage = readw(ofsAddr + EndPage_txb); 2085 tail = readw(ofsAddr + TXwptr); 2086 head = readw(ofsAddr + TXrptr); 2087 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask); 2088 if (c > len) 2089 c = len; 2090 moxaLog.txcnt[port->port.tty->index] += c; 2091 total = c; 2092 if (spage == epage) { 2093 bufhead = readw(ofsAddr + Ofs_txb); 2094 writew(spage, baseAddr + Control_reg); 2095 while (c > 0) { 2096 if (head > tail) 2097 len = head - tail - 1; 2098 else 2099 len = tx_mask + 1 - tail; 2100 len = (c > len) ? len : c; 2101 ofs = baseAddr + DynPage_addr + bufhead + tail; 2102 memcpy_toio(ofs, buffer, len); 2103 buffer += len; 2104 tail = (tail + len) & tx_mask; 2105 c -= len; 2106 } 2107 } else { 2108 pageno = spage + (tail >> 13); 2109 pageofs = tail & Page_mask; 2110 while (c > 0) { 2111 len = Page_size - pageofs; 2112 if (len > c) 2113 len = c; 2114 writeb(pageno, baseAddr + Control_reg); 2115 ofs = baseAddr + DynPage_addr + pageofs; 2116 memcpy_toio(ofs, buffer, len); 2117 buffer += len; 2118 if (++pageno == epage) 2119 pageno = spage; 2120 pageofs = 0; 2121 c -= len; 2122 } 2123 tail = (tail + total) & tx_mask; 2124 } 2125 writew(tail, ofsAddr + TXwptr); 2126 writeb(1, ofsAddr + CD180TXirq); /* start to send */ 2127 return total; 2128 } 2129 2130 static int MoxaPortReadData(struct moxa_port *port) 2131 { 2132 struct tty_struct *tty = port->port.tty; 2133 void __iomem *baseAddr, *ofsAddr, *ofs; 2134 u8 *dst; 2135 unsigned int count, len, total; 2136 u16 tail, rx_mask, spage, epage; 2137 u16 pageno, pageofs, bufhead, head; 2138 2139 ofsAddr = port->tableAddr; 2140 baseAddr = port->board->basemem; 2141 head = readw(ofsAddr + RXrptr); 2142 tail = readw(ofsAddr + RXwptr); 2143 rx_mask = readw(ofsAddr + RX_mask); 2144 spage = readw(ofsAddr + Page_rxb); 2145 epage = readw(ofsAddr + EndPage_rxb); 2146 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1); 2147 if (count == 0) 2148 return 0; 2149 2150 total = count; 2151 moxaLog.rxcnt[tty->index] += total; 2152 if (spage == epage) { 2153 bufhead = readw(ofsAddr + Ofs_rxb); 2154 writew(spage, baseAddr + Control_reg); 2155 while (count > 0) { 2156 ofs = baseAddr + DynPage_addr + bufhead + head; 2157 len = (tail >= head) ? (tail - head) : 2158 (rx_mask + 1 - head); 2159 len = tty_prepare_flip_string(&port->port, &dst, 2160 min(len, count)); 2161 memcpy_fromio(dst, ofs, len); 2162 head = (head + len) & rx_mask; 2163 count -= len; 2164 } 2165 } else { 2166 pageno = spage + (head >> 13); 2167 pageofs = head & Page_mask; 2168 while (count > 0) { 2169 writew(pageno, baseAddr + Control_reg); 2170 ofs = baseAddr + DynPage_addr + pageofs; 2171 len = tty_prepare_flip_string(&port->port, &dst, 2172 min(Page_size - pageofs, count)); 2173 memcpy_fromio(dst, ofs, len); 2174 2175 count -= len; 2176 pageofs = (pageofs + len) & Page_mask; 2177 if (pageofs == 0 && ++pageno == epage) 2178 pageno = spage; 2179 } 2180 head = (head + total) & rx_mask; 2181 } 2182 writew(head, ofsAddr + RXrptr); 2183 if (readb(ofsAddr + FlagStat) & Xoff_state) { 2184 moxaLowWaterChk = 1; 2185 port->lowChkFlag = 1; 2186 } 2187 return total; 2188 } 2189 2190 2191 static unsigned int MoxaPortTxQueue(struct moxa_port *port) 2192 { 2193 void __iomem *ofsAddr = port->tableAddr; 2194 u16 rptr, wptr, mask; 2195 2196 rptr = readw(ofsAddr + TXrptr); 2197 wptr = readw(ofsAddr + TXwptr); 2198 mask = readw(ofsAddr + TX_mask); 2199 return (wptr - rptr) & mask; 2200 } 2201 2202 static unsigned int MoxaPortTxFree(struct moxa_port *port) 2203 { 2204 void __iomem *ofsAddr = port->tableAddr; 2205 u16 rptr, wptr, mask; 2206 2207 rptr = readw(ofsAddr + TXrptr); 2208 wptr = readw(ofsAddr + TXwptr); 2209 mask = readw(ofsAddr + TX_mask); 2210 return mask - ((wptr - rptr) & mask); 2211 } 2212 2213 static int MoxaPortRxQueue(struct moxa_port *port) 2214 { 2215 void __iomem *ofsAddr = port->tableAddr; 2216 u16 rptr, wptr, mask; 2217 2218 rptr = readw(ofsAddr + RXrptr); 2219 wptr = readw(ofsAddr + RXwptr); 2220 mask = readw(ofsAddr + RX_mask); 2221 return (wptr - rptr) & mask; 2222 } 2223 2224 static void MoxaPortTxDisable(struct moxa_port *port) 2225 { 2226 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code); 2227 } 2228 2229 static void MoxaPortTxEnable(struct moxa_port *port) 2230 { 2231 moxafunc(port->tableAddr, FC_SetXonState, Magic_code); 2232 } 2233 2234 static int moxa_get_serial_info(struct tty_struct *tty, 2235 struct serial_struct *ss) 2236 { 2237 struct moxa_port *info = tty->driver_data; 2238 2239 if (tty->index == MAX_PORTS) 2240 return -EINVAL; 2241 if (!info) 2242 return -ENODEV; 2243 mutex_lock(&info->port.mutex); 2244 ss->type = info->type; 2245 ss->line = info->port.tty->index; 2246 ss->flags = info->port.flags; 2247 ss->baud_base = 921600; 2248 ss->close_delay = jiffies_to_msecs(info->port.close_delay) / 10; 2249 mutex_unlock(&info->port.mutex); 2250 return 0; 2251 } 2252 2253 2254 static int moxa_set_serial_info(struct tty_struct *tty, 2255 struct serial_struct *ss) 2256 { 2257 struct moxa_port *info = tty->driver_data; 2258 unsigned int close_delay; 2259 2260 if (tty->index == MAX_PORTS) 2261 return -EINVAL; 2262 if (!info) 2263 return -ENODEV; 2264 2265 close_delay = msecs_to_jiffies(ss->close_delay * 10); 2266 2267 mutex_lock(&info->port.mutex); 2268 if (!capable(CAP_SYS_ADMIN)) { 2269 if (close_delay != info->port.close_delay || 2270 ss->type != info->type || 2271 ((ss->flags & ~ASYNC_USR_MASK) != 2272 (info->port.flags & ~ASYNC_USR_MASK))) { 2273 mutex_unlock(&info->port.mutex); 2274 return -EPERM; 2275 } 2276 } else { 2277 info->port.close_delay = close_delay; 2278 2279 MoxaSetFifo(info, ss->type == PORT_16550A); 2280 2281 info->type = ss->type; 2282 } 2283 mutex_unlock(&info->port.mutex); 2284 return 0; 2285 } 2286 2287 2288 2289 /***************************************************************************** 2290 * Static local functions: * 2291 *****************************************************************************/ 2292 2293 static void MoxaSetFifo(struct moxa_port *port, int enable) 2294 { 2295 void __iomem *ofsAddr = port->tableAddr; 2296 2297 if (!enable) { 2298 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0); 2299 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1); 2300 } else { 2301 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3); 2302 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16); 2303 } 2304 } 2305