1 // SPDX-License-Identifier: GPL-2.0+ 2 /*****************************************************************************/ 3 /* 4 * moxa.c -- MOXA Intellio family multiport serial driver. 5 * 6 * Copyright (C) 1999-2000 Moxa Technologies ([email protected]). 7 * Copyright (c) 2007 Jiri Slaby <[email protected]> 8 * 9 * This code is loosely based on the Linux serial driver, written by 10 * Linus Torvalds, Theodore T'so and others. 11 */ 12 13 /* 14 * MOXA Intellio Series Driver 15 * for : LINUX 16 * date : 1999/1/7 17 * version : 5.1 18 */ 19 20 #include <linux/module.h> 21 #include <linux/types.h> 22 #include <linux/mm.h> 23 #include <linux/ioport.h> 24 #include <linux/errno.h> 25 #include <linux/firmware.h> 26 #include <linux/signal.h> 27 #include <linux/sched.h> 28 #include <linux/timer.h> 29 #include <linux/interrupt.h> 30 #include <linux/tty.h> 31 #include <linux/tty_flip.h> 32 #include <linux/major.h> 33 #include <linux/string.h> 34 #include <linux/fcntl.h> 35 #include <linux/ptrace.h> 36 #include <linux/serial.h> 37 #include <linux/tty_driver.h> 38 #include <linux/delay.h> 39 #include <linux/pci.h> 40 #include <linux/init.h> 41 #include <linux/bitops.h> 42 #include <linux/slab.h> 43 #include <linux/ratelimit.h> 44 45 #include <asm/io.h> 46 #include <linux/uaccess.h> 47 48 #define MOXA 0x400 49 #define MOXA_GET_IQUEUE (MOXA + 1) /* get input buffered count */ 50 #define MOXA_GET_OQUEUE (MOXA + 2) /* get output buffered count */ 51 #define MOXA_GETDATACOUNT (MOXA + 23) 52 #define MOXA_GET_IOQUEUE (MOXA + 27) 53 #define MOXA_FLUSH_QUEUE (MOXA + 28) 54 #define MOXA_GETMSTATUS (MOXA + 65) 55 56 /* 57 * System Configuration 58 */ 59 60 #define Magic_code 0x404 61 62 /* 63 * for C218 BIOS initialization 64 */ 65 #define C218_ConfBase 0x800 66 #define C218_status (C218_ConfBase + 0) /* BIOS running status */ 67 #define C218_diag (C218_ConfBase + 2) /* diagnostic status */ 68 #define C218_key (C218_ConfBase + 4) /* WORD (0x218 for C218) */ 69 #define C218DLoad_len (C218_ConfBase + 6) /* WORD */ 70 #define C218check_sum (C218_ConfBase + 8) /* BYTE */ 71 #define C218chksum_ok (C218_ConfBase + 0x0a) /* BYTE (1:ok) */ 72 #define C218_TestRx (C218_ConfBase + 0x10) /* 8 bytes for 8 ports */ 73 #define C218_TestTx (C218_ConfBase + 0x18) /* 8 bytes for 8 ports */ 74 #define C218_RXerr (C218_ConfBase + 0x20) /* 8 bytes for 8 ports */ 75 #define C218_ErrFlag (C218_ConfBase + 0x28) /* 8 bytes for 8 ports */ 76 77 #define C218_LoadBuf 0x0F00 78 #define C218_KeyCode 0x218 79 #define CP204J_KeyCode 0x204 80 81 /* 82 * for C320 BIOS initialization 83 */ 84 #define C320_ConfBase 0x800 85 #define C320_LoadBuf 0x0f00 86 #define STS_init 0x05 /* for C320_status */ 87 88 #define C320_status C320_ConfBase + 0 /* BIOS running status */ 89 #define C320_diag C320_ConfBase + 2 /* diagnostic status */ 90 #define C320_key C320_ConfBase + 4 /* WORD (0320H for C320) */ 91 #define C320DLoad_len C320_ConfBase + 6 /* WORD */ 92 #define C320check_sum C320_ConfBase + 8 /* WORD */ 93 #define C320chksum_ok C320_ConfBase + 0x0a /* WORD (1:ok) */ 94 #define C320bapi_len C320_ConfBase + 0x0c /* WORD */ 95 #define C320UART_no C320_ConfBase + 0x0e /* WORD */ 96 97 #define C320_KeyCode 0x320 98 99 #define FixPage_addr 0x0000 /* starting addr of static page */ 100 #define DynPage_addr 0x2000 /* starting addr of dynamic page */ 101 #define C218_start 0x3000 /* starting addr of C218 BIOS prg */ 102 #define Control_reg 0x1ff0 /* select page and reset control */ 103 #define HW_reset 0x80 104 105 /* 106 * Function Codes 107 */ 108 #define FC_CardReset 0x80 109 #define FC_ChannelReset 1 /* C320 firmware not supported */ 110 #define FC_EnableCH 2 111 #define FC_DisableCH 3 112 #define FC_SetParam 4 113 #define FC_SetMode 5 114 #define FC_SetRate 6 115 #define FC_LineControl 7 116 #define FC_LineStatus 8 117 #define FC_XmitControl 9 118 #define FC_FlushQueue 10 119 #define FC_SendBreak 11 120 #define FC_StopBreak 12 121 #define FC_LoopbackON 13 122 #define FC_LoopbackOFF 14 123 #define FC_ClrIrqTable 15 124 #define FC_SendXon 16 125 #define FC_SetTermIrq 17 /* C320 firmware not supported */ 126 #define FC_SetCntIrq 18 /* C320 firmware not supported */ 127 #define FC_SetBreakIrq 19 128 #define FC_SetLineIrq 20 129 #define FC_SetFlowCtl 21 130 #define FC_GenIrq 22 131 #define FC_InCD180 23 132 #define FC_OutCD180 24 133 #define FC_InUARTreg 23 134 #define FC_OutUARTreg 24 135 #define FC_SetXonXoff 25 136 #define FC_OutCD180CCR 26 137 #define FC_ExtIQueue 27 138 #define FC_ExtOQueue 28 139 #define FC_ClrLineIrq 29 140 #define FC_HWFlowCtl 30 141 #define FC_GetClockRate 35 142 #define FC_SetBaud 36 143 #define FC_SetDataMode 41 144 #define FC_GetCCSR 43 145 #define FC_GetDataError 45 146 #define FC_RxControl 50 147 #define FC_ImmSend 51 148 #define FC_SetXonState 52 149 #define FC_SetXoffState 53 150 #define FC_SetRxFIFOTrig 54 151 #define FC_SetTxFIFOCnt 55 152 #define FC_UnixRate 56 153 #define FC_UnixResetTimer 57 154 155 #define RxFIFOTrig1 0 156 #define RxFIFOTrig4 1 157 #define RxFIFOTrig8 2 158 #define RxFIFOTrig14 3 159 160 /* 161 * Dual-Ported RAM 162 */ 163 #define DRAM_global 0 164 #define INT_data (DRAM_global + 0) 165 #define Config_base (DRAM_global + 0x108) 166 167 #define IRQindex (INT_data + 0) 168 #define IRQpending (INT_data + 4) 169 #define IRQtable (INT_data + 8) 170 171 /* 172 * Interrupt Status 173 */ 174 #define IntrRx 0x01 /* receiver data O.K. */ 175 #define IntrTx 0x02 /* transmit buffer empty */ 176 #define IntrFunc 0x04 /* function complete */ 177 #define IntrBreak 0x08 /* received break */ 178 #define IntrLine 0x10 /* line status change 179 for transmitter */ 180 #define IntrIntr 0x20 /* received INTR code */ 181 #define IntrQuit 0x40 /* received QUIT code */ 182 #define IntrEOF 0x80 /* received EOF code */ 183 184 #define IntrRxTrigger 0x100 /* rx data count reach trigger value */ 185 #define IntrTxTrigger 0x200 /* tx data count below trigger value */ 186 187 #define Magic_no (Config_base + 0) 188 #define Card_model_no (Config_base + 2) 189 #define Total_ports (Config_base + 4) 190 #define Module_cnt (Config_base + 8) 191 #define Module_no (Config_base + 10) 192 #define Timer_10ms (Config_base + 14) 193 #define Disable_IRQ (Config_base + 20) 194 #define TMS320_PORT1 (Config_base + 22) 195 #define TMS320_PORT2 (Config_base + 24) 196 #define TMS320_CLOCK (Config_base + 26) 197 198 /* 199 * DATA BUFFER in DRAM 200 */ 201 #define Extern_table 0x400 /* Base address of the external table 202 (24 words * 64) total 3K bytes 203 (24 words * 128) total 6K bytes */ 204 #define Extern_size 0x60 /* 96 bytes */ 205 #define RXrptr 0x00 /* read pointer for RX buffer */ 206 #define RXwptr 0x02 /* write pointer for RX buffer */ 207 #define TXrptr 0x04 /* read pointer for TX buffer */ 208 #define TXwptr 0x06 /* write pointer for TX buffer */ 209 #define HostStat 0x08 /* IRQ flag and general flag */ 210 #define FlagStat 0x0A 211 #define FlowControl 0x0C /* B7 B6 B5 B4 B3 B2 B1 B0 */ 212 /* x x x x | | | | */ 213 /* | | | + CTS flow */ 214 /* | | +--- RTS flow */ 215 /* | +------ TX Xon/Xoff */ 216 /* +--------- RX Xon/Xoff */ 217 #define Break_cnt 0x0E /* received break count */ 218 #define CD180TXirq 0x10 /* if non-0: enable TX irq */ 219 #define RX_mask 0x12 220 #define TX_mask 0x14 221 #define Ofs_rxb 0x16 222 #define Ofs_txb 0x18 223 #define Page_rxb 0x1A 224 #define Page_txb 0x1C 225 #define EndPage_rxb 0x1E 226 #define EndPage_txb 0x20 227 #define Data_error 0x22 228 #define RxTrigger 0x28 229 #define TxTrigger 0x2a 230 231 #define rRXwptr 0x34 232 #define Low_water 0x36 233 234 #define FuncCode 0x40 235 #define FuncArg 0x42 236 #define FuncArg1 0x44 237 238 #define C218rx_size 0x2000 /* 8K bytes */ 239 #define C218tx_size 0x8000 /* 32K bytes */ 240 241 #define C218rx_mask (C218rx_size - 1) 242 #define C218tx_mask (C218tx_size - 1) 243 244 #define C320p8rx_size 0x2000 245 #define C320p8tx_size 0x8000 246 #define C320p8rx_mask (C320p8rx_size - 1) 247 #define C320p8tx_mask (C320p8tx_size - 1) 248 249 #define C320p16rx_size 0x2000 250 #define C320p16tx_size 0x4000 251 #define C320p16rx_mask (C320p16rx_size - 1) 252 #define C320p16tx_mask (C320p16tx_size - 1) 253 254 #define C320p24rx_size 0x2000 255 #define C320p24tx_size 0x2000 256 #define C320p24rx_mask (C320p24rx_size - 1) 257 #define C320p24tx_mask (C320p24tx_size - 1) 258 259 #define C320p32rx_size 0x1000 260 #define C320p32tx_size 0x1000 261 #define C320p32rx_mask (C320p32rx_size - 1) 262 #define C320p32tx_mask (C320p32tx_size - 1) 263 264 #define Page_size 0x2000U 265 #define Page_mask (Page_size - 1) 266 #define C218rx_spage 3 267 #define C218tx_spage 4 268 #define C218rx_pageno 1 269 #define C218tx_pageno 4 270 #define C218buf_pageno 5 271 272 #define C320p8rx_spage 3 273 #define C320p8tx_spage 4 274 #define C320p8rx_pgno 1 275 #define C320p8tx_pgno 4 276 #define C320p8buf_pgno 5 277 278 #define C320p16rx_spage 3 279 #define C320p16tx_spage 4 280 #define C320p16rx_pgno 1 281 #define C320p16tx_pgno 2 282 #define C320p16buf_pgno 3 283 284 #define C320p24rx_spage 3 285 #define C320p24tx_spage 4 286 #define C320p24rx_pgno 1 287 #define C320p24tx_pgno 1 288 #define C320p24buf_pgno 2 289 290 #define C320p32rx_spage 3 291 #define C320p32tx_ofs C320p32rx_size 292 #define C320p32tx_spage 3 293 #define C320p32buf_pgno 1 294 295 /* 296 * Host Status 297 */ 298 #define WakeupRx 0x01 299 #define WakeupTx 0x02 300 #define WakeupBreak 0x08 301 #define WakeupLine 0x10 302 #define WakeupIntr 0x20 303 #define WakeupQuit 0x40 304 #define WakeupEOF 0x80 /* used in VTIME control */ 305 #define WakeupRxTrigger 0x100 306 #define WakeupTxTrigger 0x200 307 /* 308 * Flag status 309 */ 310 #define Rx_over 0x01 311 #define Xoff_state 0x02 312 #define Tx_flowOff 0x04 313 #define Tx_enable 0x08 314 #define CTS_state 0x10 315 #define DSR_state 0x20 316 #define DCD_state 0x80 317 /* 318 * FlowControl 319 */ 320 #define CTS_FlowCtl 1 321 #define RTS_FlowCtl 2 322 #define Tx_FlowCtl 4 323 #define Rx_FlowCtl 8 324 #define IXM_IXANY 0x10 325 326 #define LowWater 128 327 328 #define DTR_ON 1 329 #define RTS_ON 2 330 #define CTS_ON 1 331 #define DSR_ON 2 332 #define DCD_ON 8 333 334 /* mode definition */ 335 #define MX_CS8 0x03 336 #define MX_CS7 0x02 337 #define MX_CS6 0x01 338 #define MX_CS5 0x00 339 340 #define MX_STOP1 0x00 341 #define MX_STOP15 0x04 342 #define MX_STOP2 0x08 343 344 #define MX_PARNONE 0x00 345 #define MX_PAREVEN 0x40 346 #define MX_PARODD 0xC0 347 #define MX_PARMARK 0xA0 348 #define MX_PARSPACE 0x20 349 350 #define MOXA_FW_HDRLEN 32 351 352 #define MOXAMAJOR 172 353 354 #define MAX_BOARDS 4 /* Don't change this value */ 355 #define MAX_PORTS_PER_BOARD 32 /* Don't change this value */ 356 #define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD) 357 358 #define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \ 359 (brd)->boardType == MOXA_BOARD_C320_PCI) 360 361 /* 362 * Define the Moxa PCI vendor and device IDs. 363 */ 364 #define MOXA_BUS_TYPE_ISA 0 365 #define MOXA_BUS_TYPE_PCI 1 366 367 enum { 368 MOXA_BOARD_C218_PCI = 1, 369 MOXA_BOARD_C218_ISA, 370 MOXA_BOARD_C320_PCI, 371 MOXA_BOARD_C320_ISA, 372 MOXA_BOARD_CP204J, 373 }; 374 375 static char *moxa_brdname[] = 376 { 377 "C218 Turbo PCI series", 378 "C218 Turbo ISA series", 379 "C320 Turbo PCI series", 380 "C320 Turbo ISA series", 381 "CP-204J series", 382 }; 383 384 #ifdef CONFIG_PCI 385 static const struct pci_device_id moxa_pcibrds[] = { 386 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218), 387 .driver_data = MOXA_BOARD_C218_PCI }, 388 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320), 389 .driver_data = MOXA_BOARD_C320_PCI }, 390 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J), 391 .driver_data = MOXA_BOARD_CP204J }, 392 { 0 } 393 }; 394 MODULE_DEVICE_TABLE(pci, moxa_pcibrds); 395 #endif /* CONFIG_PCI */ 396 397 struct moxa_port; 398 399 static struct moxa_board_conf { 400 int boardType; 401 int numPorts; 402 int busType; 403 404 unsigned int ready; 405 406 struct moxa_port *ports; 407 408 void __iomem *basemem; 409 void __iomem *intNdx; 410 void __iomem *intPend; 411 void __iomem *intTable; 412 } moxa_boards[MAX_BOARDS]; 413 414 struct mxser_mstatus { 415 tcflag_t cflag; 416 int cts; 417 int dsr; 418 int ri; 419 int dcd; 420 }; 421 422 struct moxaq_str { 423 int inq; 424 int outq; 425 }; 426 427 struct moxa_port { 428 struct tty_port port; 429 struct moxa_board_conf *board; 430 void __iomem *tableAddr; 431 432 int type; 433 int cflag; 434 unsigned long statusflags; 435 436 u8 DCDState; /* Protected by the port lock */ 437 u8 lineCtrl; 438 u8 lowChkFlag; 439 }; 440 441 struct mon_str { 442 int tick; 443 int rxcnt[MAX_PORTS]; 444 int txcnt[MAX_PORTS]; 445 }; 446 447 /* statusflags */ 448 #define TXSTOPPED 1 449 #define LOWWAIT 2 450 #define EMPTYWAIT 3 451 452 453 #define WAKEUP_CHARS 256 454 455 static int ttymajor = MOXAMAJOR; 456 static struct mon_str moxaLog; 457 static unsigned int moxaFuncTout = HZ / 2; 458 static unsigned int moxaLowWaterChk; 459 static DEFINE_MUTEX(moxa_openlock); 460 static DEFINE_SPINLOCK(moxa_lock); 461 462 static unsigned long baseaddr[MAX_BOARDS]; 463 static unsigned int type[MAX_BOARDS]; 464 static unsigned int numports[MAX_BOARDS]; 465 static struct tty_port moxa_service_port; 466 467 MODULE_AUTHOR("William Chen"); 468 MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver"); 469 MODULE_LICENSE("GPL"); 470 MODULE_FIRMWARE("c218tunx.cod"); 471 MODULE_FIRMWARE("cp204unx.cod"); 472 MODULE_FIRMWARE("c320tunx.cod"); 473 474 module_param_array(type, uint, NULL, 0); 475 MODULE_PARM_DESC(type, "card type: C218=2, C320=4"); 476 module_param_hw_array(baseaddr, ulong, ioport, NULL, 0); 477 MODULE_PARM_DESC(baseaddr, "base address"); 478 module_param_array(numports, uint, NULL, 0); 479 MODULE_PARM_DESC(numports, "numports (ignored for C218)"); 480 481 module_param(ttymajor, int, 0); 482 483 /* 484 * static functions: 485 */ 486 static int moxa_open(struct tty_struct *, struct file *); 487 static void moxa_close(struct tty_struct *, struct file *); 488 static ssize_t moxa_write(struct tty_struct *, const u8 *, size_t); 489 static unsigned int moxa_write_room(struct tty_struct *); 490 static void moxa_flush_buffer(struct tty_struct *); 491 static unsigned int moxa_chars_in_buffer(struct tty_struct *); 492 static void moxa_set_termios(struct tty_struct *, const struct ktermios *); 493 static void moxa_stop(struct tty_struct *); 494 static void moxa_start(struct tty_struct *); 495 static void moxa_hangup(struct tty_struct *); 496 static int moxa_tiocmget(struct tty_struct *tty); 497 static int moxa_tiocmset(struct tty_struct *tty, 498 unsigned int set, unsigned int clear); 499 static void moxa_poll(struct timer_list *); 500 static void moxa_set_tty_param(struct tty_struct *, const struct ktermios *); 501 static void moxa_shutdown(struct tty_port *); 502 static bool moxa_carrier_raised(struct tty_port *); 503 static void moxa_dtr_rts(struct tty_port *, bool); 504 /* 505 * moxa board interface functions: 506 */ 507 static void MoxaPortEnable(struct moxa_port *); 508 static void MoxaPortDisable(struct moxa_port *); 509 static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t); 510 static int MoxaPortGetLineOut(struct moxa_port *, bool *, bool *); 511 static void MoxaPortLineCtrl(struct moxa_port *, bool, bool); 512 static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int); 513 static int MoxaPortLineStatus(struct moxa_port *); 514 static void MoxaPortFlushData(struct moxa_port *, int); 515 static ssize_t MoxaPortWriteData(struct tty_struct *, const u8 *, size_t); 516 static int MoxaPortReadData(struct moxa_port *); 517 static unsigned int MoxaPortTxQueue(struct moxa_port *); 518 static int MoxaPortRxQueue(struct moxa_port *); 519 static unsigned int MoxaPortTxFree(struct moxa_port *); 520 static void MoxaPortTxDisable(struct moxa_port *); 521 static void MoxaPortTxEnable(struct moxa_port *); 522 static int moxa_get_serial_info(struct tty_struct *, struct serial_struct *); 523 static int moxa_set_serial_info(struct tty_struct *, struct serial_struct *); 524 static void MoxaSetFifo(struct moxa_port *port, int enable); 525 526 /* 527 * I/O functions 528 */ 529 530 static DEFINE_SPINLOCK(moxafunc_lock); 531 532 static void moxa_wait_finish(void __iomem *ofsAddr) 533 { 534 unsigned long end = jiffies + moxaFuncTout; 535 536 while (readw(ofsAddr + FuncCode) != 0) 537 if (time_after(jiffies, end)) 538 return; 539 if (readw(ofsAddr + FuncCode) != 0) 540 printk_ratelimited(KERN_WARNING "moxa function expired\n"); 541 } 542 543 static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg) 544 { 545 unsigned long flags; 546 spin_lock_irqsave(&moxafunc_lock, flags); 547 writew(arg, ofsAddr + FuncArg); 548 writew(cmd, ofsAddr + FuncCode); 549 moxa_wait_finish(ofsAddr); 550 spin_unlock_irqrestore(&moxafunc_lock, flags); 551 } 552 553 static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg) 554 { 555 unsigned long flags; 556 u16 ret; 557 spin_lock_irqsave(&moxafunc_lock, flags); 558 writew(arg, ofsAddr + FuncArg); 559 writew(cmd, ofsAddr + FuncCode); 560 moxa_wait_finish(ofsAddr); 561 ret = readw(ofsAddr + FuncArg); 562 spin_unlock_irqrestore(&moxafunc_lock, flags); 563 return ret; 564 } 565 566 static void moxa_low_water_check(void __iomem *ofsAddr) 567 { 568 u16 rptr, wptr, mask, len; 569 570 if (readb(ofsAddr + FlagStat) & Xoff_state) { 571 rptr = readw(ofsAddr + RXrptr); 572 wptr = readw(ofsAddr + RXwptr); 573 mask = readw(ofsAddr + RX_mask); 574 len = (wptr - rptr) & mask; 575 if (len <= Low_water) 576 moxafunc(ofsAddr, FC_SendXon, 0); 577 } 578 } 579 580 /* 581 * TTY operations 582 */ 583 584 static int moxa_ioctl(struct tty_struct *tty, 585 unsigned int cmd, unsigned long arg) 586 { 587 struct moxa_port *ch = tty->driver_data; 588 void __user *argp = (void __user *)arg; 589 int status, ret = 0; 590 591 if (tty->index == MAX_PORTS) { 592 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE && 593 cmd != MOXA_GETMSTATUS) 594 return -EINVAL; 595 } else if (!ch) 596 return -ENODEV; 597 598 switch (cmd) { 599 case MOXA_GETDATACOUNT: 600 moxaLog.tick = jiffies; 601 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog))) 602 ret = -EFAULT; 603 break; 604 case MOXA_FLUSH_QUEUE: 605 MoxaPortFlushData(ch, arg); 606 break; 607 case MOXA_GET_IOQUEUE: { 608 struct moxaq_str __user *argm = argp; 609 struct moxaq_str tmp; 610 struct moxa_port *p; 611 unsigned int i, j; 612 613 for (i = 0; i < MAX_BOARDS; i++) { 614 p = moxa_boards[i].ports; 615 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) { 616 memset(&tmp, 0, sizeof(tmp)); 617 spin_lock_bh(&moxa_lock); 618 if (moxa_boards[i].ready) { 619 tmp.inq = MoxaPortRxQueue(p); 620 tmp.outq = MoxaPortTxQueue(p); 621 } 622 spin_unlock_bh(&moxa_lock); 623 if (copy_to_user(argm, &tmp, sizeof(tmp))) 624 return -EFAULT; 625 } 626 } 627 break; 628 } case MOXA_GET_OQUEUE: 629 status = MoxaPortTxQueue(ch); 630 ret = put_user(status, (unsigned long __user *)argp); 631 break; 632 case MOXA_GET_IQUEUE: 633 status = MoxaPortRxQueue(ch); 634 ret = put_user(status, (unsigned long __user *)argp); 635 break; 636 case MOXA_GETMSTATUS: { 637 struct mxser_mstatus __user *argm = argp; 638 struct mxser_mstatus tmp; 639 struct moxa_port *p; 640 unsigned int i, j; 641 642 for (i = 0; i < MAX_BOARDS; i++) { 643 p = moxa_boards[i].ports; 644 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) { 645 struct tty_struct *ttyp; 646 memset(&tmp, 0, sizeof(tmp)); 647 spin_lock_bh(&moxa_lock); 648 if (!moxa_boards[i].ready) { 649 spin_unlock_bh(&moxa_lock); 650 goto copy; 651 } 652 653 status = MoxaPortLineStatus(p); 654 spin_unlock_bh(&moxa_lock); 655 656 if (status & 1) 657 tmp.cts = 1; 658 if (status & 2) 659 tmp.dsr = 1; 660 if (status & 4) 661 tmp.dcd = 1; 662 663 ttyp = tty_port_tty_get(&p->port); 664 if (!ttyp) 665 tmp.cflag = p->cflag; 666 else 667 tmp.cflag = ttyp->termios.c_cflag; 668 tty_kref_put(ttyp); 669 copy: 670 if (copy_to_user(argm, &tmp, sizeof(tmp))) 671 return -EFAULT; 672 } 673 } 674 break; 675 } 676 default: 677 ret = -ENOIOCTLCMD; 678 } 679 return ret; 680 } 681 682 static int moxa_break_ctl(struct tty_struct *tty, int state) 683 { 684 struct moxa_port *port = tty->driver_data; 685 686 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak, 687 Magic_code); 688 return 0; 689 } 690 691 static const struct tty_operations moxa_ops = { 692 .open = moxa_open, 693 .close = moxa_close, 694 .write = moxa_write, 695 .write_room = moxa_write_room, 696 .flush_buffer = moxa_flush_buffer, 697 .chars_in_buffer = moxa_chars_in_buffer, 698 .ioctl = moxa_ioctl, 699 .set_termios = moxa_set_termios, 700 .stop = moxa_stop, 701 .start = moxa_start, 702 .hangup = moxa_hangup, 703 .break_ctl = moxa_break_ctl, 704 .tiocmget = moxa_tiocmget, 705 .tiocmset = moxa_tiocmset, 706 .set_serial = moxa_set_serial_info, 707 .get_serial = moxa_get_serial_info, 708 }; 709 710 static const struct tty_port_operations moxa_port_ops = { 711 .carrier_raised = moxa_carrier_raised, 712 .dtr_rts = moxa_dtr_rts, 713 .shutdown = moxa_shutdown, 714 }; 715 716 static struct tty_driver *moxaDriver; 717 static DEFINE_TIMER(moxaTimer, moxa_poll); 718 719 /* 720 * HW init 721 */ 722 723 static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model) 724 { 725 switch (brd->boardType) { 726 case MOXA_BOARD_C218_ISA: 727 case MOXA_BOARD_C218_PCI: 728 if (model != 1) 729 goto err; 730 break; 731 case MOXA_BOARD_CP204J: 732 if (model != 3) 733 goto err; 734 break; 735 default: 736 if (model != 2) 737 goto err; 738 break; 739 } 740 return 0; 741 err: 742 return -EINVAL; 743 } 744 745 static int moxa_check_fw(const void *ptr) 746 { 747 const __le16 *lptr = ptr; 748 749 if (*lptr != cpu_to_le16(0x7980)) 750 return -EINVAL; 751 752 return 0; 753 } 754 755 static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf, 756 size_t len) 757 { 758 void __iomem *baseAddr = brd->basemem; 759 u16 tmp; 760 761 writeb(HW_reset, baseAddr + Control_reg); /* reset */ 762 msleep(10); 763 memset_io(baseAddr, 0, 4096); 764 memcpy_toio(baseAddr, buf, len); /* download BIOS */ 765 writeb(0, baseAddr + Control_reg); /* restart */ 766 767 msleep(2000); 768 769 switch (brd->boardType) { 770 case MOXA_BOARD_C218_ISA: 771 case MOXA_BOARD_C218_PCI: 772 tmp = readw(baseAddr + C218_key); 773 if (tmp != C218_KeyCode) 774 goto err; 775 break; 776 case MOXA_BOARD_CP204J: 777 tmp = readw(baseAddr + C218_key); 778 if (tmp != CP204J_KeyCode) 779 goto err; 780 break; 781 default: 782 tmp = readw(baseAddr + C320_key); 783 if (tmp != C320_KeyCode) 784 goto err; 785 tmp = readw(baseAddr + C320_status); 786 if (tmp != STS_init) { 787 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic " 788 "module not found\n"); 789 return -EIO; 790 } 791 break; 792 } 793 794 return 0; 795 err: 796 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n"); 797 return -EIO; 798 } 799 800 static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr, 801 size_t len) 802 { 803 void __iomem *baseAddr = brd->basemem; 804 805 if (len < 7168) { 806 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n"); 807 return -EINVAL; 808 } 809 810 writew(len - 7168 - 2, baseAddr + C320bapi_len); 811 writeb(1, baseAddr + Control_reg); /* Select Page 1 */ 812 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168); 813 writeb(2, baseAddr + Control_reg); /* Select Page 2 */ 814 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168); 815 816 return 0; 817 } 818 819 static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr, 820 size_t len) 821 { 822 void __iomem *baseAddr = brd->basemem; 823 const __le16 *uptr = ptr; 824 size_t wlen, len2, j; 825 unsigned long key, loadbuf, loadlen, checksum, checksum_ok; 826 unsigned int i, retry; 827 u16 usum, keycode; 828 829 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode : 830 C218_KeyCode; 831 832 switch (brd->boardType) { 833 case MOXA_BOARD_CP204J: 834 case MOXA_BOARD_C218_ISA: 835 case MOXA_BOARD_C218_PCI: 836 key = C218_key; 837 loadbuf = C218_LoadBuf; 838 loadlen = C218DLoad_len; 839 checksum = C218check_sum; 840 checksum_ok = C218chksum_ok; 841 break; 842 default: 843 key = C320_key; 844 keycode = C320_KeyCode; 845 loadbuf = C320_LoadBuf; 846 loadlen = C320DLoad_len; 847 checksum = C320check_sum; 848 checksum_ok = C320chksum_ok; 849 break; 850 } 851 852 usum = 0; 853 wlen = len >> 1; 854 for (i = 0; i < wlen; i++) 855 usum += le16_to_cpu(uptr[i]); 856 retry = 0; 857 do { 858 wlen = len >> 1; 859 j = 0; 860 while (wlen) { 861 len2 = (wlen > 2048) ? 2048 : wlen; 862 wlen -= len2; 863 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1); 864 j += len2 << 1; 865 866 writew(len2, baseAddr + loadlen); 867 writew(0, baseAddr + key); 868 for (i = 0; i < 100; i++) { 869 if (readw(baseAddr + key) == keycode) 870 break; 871 msleep(10); 872 } 873 if (readw(baseAddr + key) != keycode) 874 return -EIO; 875 } 876 writew(0, baseAddr + loadlen); 877 writew(usum, baseAddr + checksum); 878 writew(0, baseAddr + key); 879 for (i = 0; i < 100; i++) { 880 if (readw(baseAddr + key) == keycode) 881 break; 882 msleep(10); 883 } 884 retry++; 885 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3)); 886 if (readb(baseAddr + checksum_ok) != 1) 887 return -EIO; 888 889 writew(0, baseAddr + key); 890 for (i = 0; i < 600; i++) { 891 if (readw(baseAddr + Magic_no) == Magic_code) 892 break; 893 msleep(10); 894 } 895 if (readw(baseAddr + Magic_no) != Magic_code) 896 return -EIO; 897 898 if (MOXA_IS_320(brd)) { 899 if (brd->busType == MOXA_BUS_TYPE_PCI) { /* ASIC board */ 900 writew(0x3800, baseAddr + TMS320_PORT1); 901 writew(0x3900, baseAddr + TMS320_PORT2); 902 writew(28499, baseAddr + TMS320_CLOCK); 903 } else { 904 writew(0x3200, baseAddr + TMS320_PORT1); 905 writew(0x3400, baseAddr + TMS320_PORT2); 906 writew(19999, baseAddr + TMS320_CLOCK); 907 } 908 } 909 writew(1, baseAddr + Disable_IRQ); 910 writew(0, baseAddr + Magic_no); 911 for (i = 0; i < 500; i++) { 912 if (readw(baseAddr + Magic_no) == Magic_code) 913 break; 914 msleep(10); 915 } 916 if (readw(baseAddr + Magic_no) != Magic_code) 917 return -EIO; 918 919 if (MOXA_IS_320(brd)) { 920 j = readw(baseAddr + Module_cnt); 921 if (j <= 0) 922 return -EIO; 923 brd->numPorts = j * 8; 924 writew(j, baseAddr + Module_no); 925 writew(0, baseAddr + Magic_no); 926 for (i = 0; i < 600; i++) { 927 if (readw(baseAddr + Magic_no) == Magic_code) 928 break; 929 msleep(10); 930 } 931 if (readw(baseAddr + Magic_no) != Magic_code) 932 return -EIO; 933 } 934 brd->intNdx = baseAddr + IRQindex; 935 brd->intPend = baseAddr + IRQpending; 936 brd->intTable = baseAddr + IRQtable; 937 938 return 0; 939 } 940 941 static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr, 942 size_t len) 943 { 944 void __iomem *ofsAddr, *baseAddr = brd->basemem; 945 struct moxa_port *port; 946 int retval, i; 947 948 if (len % 2) { 949 printk(KERN_ERR "MOXA: bios length is not even\n"); 950 return -EINVAL; 951 } 952 953 retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */ 954 if (retval) 955 return retval; 956 957 switch (brd->boardType) { 958 case MOXA_BOARD_C218_ISA: 959 case MOXA_BOARD_C218_PCI: 960 case MOXA_BOARD_CP204J: 961 port = brd->ports; 962 for (i = 0; i < brd->numPorts; i++, port++) { 963 port->board = brd; 964 port->DCDState = 0; 965 port->tableAddr = baseAddr + Extern_table + 966 Extern_size * i; 967 ofsAddr = port->tableAddr; 968 writew(C218rx_mask, ofsAddr + RX_mask); 969 writew(C218tx_mask, ofsAddr + TX_mask); 970 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb); 971 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb); 972 973 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb); 974 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb); 975 976 } 977 break; 978 default: 979 port = brd->ports; 980 for (i = 0; i < brd->numPorts; i++, port++) { 981 port->board = brd; 982 port->DCDState = 0; 983 port->tableAddr = baseAddr + Extern_table + 984 Extern_size * i; 985 ofsAddr = port->tableAddr; 986 switch (brd->numPorts) { 987 case 8: 988 writew(C320p8rx_mask, ofsAddr + RX_mask); 989 writew(C320p8tx_mask, ofsAddr + TX_mask); 990 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb); 991 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb); 992 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb); 993 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb); 994 995 break; 996 case 16: 997 writew(C320p16rx_mask, ofsAddr + RX_mask); 998 writew(C320p16tx_mask, ofsAddr + TX_mask); 999 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb); 1000 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb); 1001 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb); 1002 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb); 1003 break; 1004 1005 case 24: 1006 writew(C320p24rx_mask, ofsAddr + RX_mask); 1007 writew(C320p24tx_mask, ofsAddr + TX_mask); 1008 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb); 1009 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb); 1010 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb); 1011 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb); 1012 break; 1013 case 32: 1014 writew(C320p32rx_mask, ofsAddr + RX_mask); 1015 writew(C320p32tx_mask, ofsAddr + TX_mask); 1016 writew(C320p32tx_ofs, ofsAddr + Ofs_txb); 1017 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb); 1018 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb); 1019 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb); 1020 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb); 1021 break; 1022 } 1023 } 1024 break; 1025 } 1026 return 0; 1027 } 1028 1029 static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw) 1030 { 1031 const void *ptr = fw->data; 1032 char rsn[64]; 1033 u16 lens[5]; 1034 size_t len; 1035 unsigned int a, lenp, lencnt; 1036 int ret = -EINVAL; 1037 struct { 1038 __le32 magic; /* 0x34303430 */ 1039 u8 reserved1[2]; 1040 u8 type; /* UNIX = 3 */ 1041 u8 model; /* C218T=1, C320T=2, CP204=3 */ 1042 u8 reserved2[8]; 1043 __le16 len[5]; 1044 } const *hdr = ptr; 1045 1046 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens)); 1047 1048 if (fw->size < MOXA_FW_HDRLEN) { 1049 strcpy(rsn, "too short (even header won't fit)"); 1050 goto err; 1051 } 1052 if (hdr->magic != cpu_to_le32(0x30343034)) { 1053 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic)); 1054 goto err; 1055 } 1056 if (hdr->type != 3) { 1057 sprintf(rsn, "not for linux, type is %u", hdr->type); 1058 goto err; 1059 } 1060 if (moxa_check_fw_model(brd, hdr->model)) { 1061 sprintf(rsn, "not for this card, model is %u", hdr->model); 1062 goto err; 1063 } 1064 1065 len = MOXA_FW_HDRLEN; 1066 lencnt = hdr->model == 2 ? 5 : 3; 1067 for (a = 0; a < ARRAY_SIZE(lens); a++) { 1068 lens[a] = le16_to_cpu(hdr->len[a]); 1069 if (lens[a] && len + lens[a] <= fw->size && 1070 moxa_check_fw(&fw->data[len])) 1071 printk(KERN_WARNING "MOXA firmware: unexpected input " 1072 "at offset %u, but going on\n", (u32)len); 1073 if (!lens[a] && a < lencnt) { 1074 sprintf(rsn, "too few entries in fw file"); 1075 goto err; 1076 } 1077 len += lens[a]; 1078 } 1079 1080 if (len != fw->size) { 1081 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size, 1082 (u32)len); 1083 goto err; 1084 } 1085 1086 ptr += MOXA_FW_HDRLEN; 1087 lenp = 0; /* bios */ 1088 1089 strcpy(rsn, "read above"); 1090 1091 ret = moxa_load_bios(brd, ptr, lens[lenp]); 1092 if (ret) 1093 goto err; 1094 1095 /* we skip the tty section (lens[1]), since we don't need it */ 1096 ptr += lens[lenp] + lens[lenp + 1]; 1097 lenp += 2; /* comm */ 1098 1099 if (hdr->model == 2) { 1100 ret = moxa_load_320b(brd, ptr, lens[lenp]); 1101 if (ret) 1102 goto err; 1103 /* skip another tty */ 1104 ptr += lens[lenp] + lens[lenp + 1]; 1105 lenp += 2; 1106 } 1107 1108 ret = moxa_load_code(brd, ptr, lens[lenp]); 1109 if (ret) 1110 goto err; 1111 1112 return 0; 1113 err: 1114 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn); 1115 return ret; 1116 } 1117 1118 static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev) 1119 { 1120 const struct firmware *fw; 1121 const char *file; 1122 struct moxa_port *p; 1123 unsigned int i, first_idx; 1124 int ret; 1125 1126 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports), 1127 GFP_KERNEL); 1128 if (brd->ports == NULL) { 1129 printk(KERN_ERR "cannot allocate memory for ports\n"); 1130 ret = -ENOMEM; 1131 goto err; 1132 } 1133 1134 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) { 1135 tty_port_init(&p->port); 1136 p->port.ops = &moxa_port_ops; 1137 p->type = PORT_16550A; 1138 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL; 1139 } 1140 1141 switch (brd->boardType) { 1142 case MOXA_BOARD_C218_ISA: 1143 case MOXA_BOARD_C218_PCI: 1144 file = "c218tunx.cod"; 1145 break; 1146 case MOXA_BOARD_CP204J: 1147 file = "cp204unx.cod"; 1148 break; 1149 default: 1150 file = "c320tunx.cod"; 1151 break; 1152 } 1153 1154 ret = request_firmware(&fw, file, dev); 1155 if (ret) { 1156 printk(KERN_ERR "MOXA: request_firmware failed. Make sure " 1157 "you've placed '%s' file into your firmware " 1158 "loader directory (e.g. /lib/firmware)\n", 1159 file); 1160 goto err_free; 1161 } 1162 1163 ret = moxa_load_fw(brd, fw); 1164 1165 release_firmware(fw); 1166 1167 if (ret) 1168 goto err_free; 1169 1170 spin_lock_bh(&moxa_lock); 1171 brd->ready = 1; 1172 if (!timer_pending(&moxaTimer)) 1173 mod_timer(&moxaTimer, jiffies + HZ / 50); 1174 spin_unlock_bh(&moxa_lock); 1175 1176 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD; 1177 for (i = 0; i < brd->numPorts; i++) 1178 tty_port_register_device(&brd->ports[i].port, moxaDriver, 1179 first_idx + i, dev); 1180 1181 return 0; 1182 err_free: 1183 for (i = 0; i < MAX_PORTS_PER_BOARD; i++) 1184 tty_port_destroy(&brd->ports[i].port); 1185 kfree(brd->ports); 1186 err: 1187 return ret; 1188 } 1189 1190 static void moxa_board_deinit(struct moxa_board_conf *brd) 1191 { 1192 unsigned int a, opened, first_idx; 1193 1194 mutex_lock(&moxa_openlock); 1195 spin_lock_bh(&moxa_lock); 1196 brd->ready = 0; 1197 spin_unlock_bh(&moxa_lock); 1198 1199 /* pci hot-un-plug support */ 1200 for (a = 0; a < brd->numPorts; a++) 1201 if (tty_port_initialized(&brd->ports[a].port)) 1202 tty_port_tty_hangup(&brd->ports[a].port, false); 1203 1204 for (a = 0; a < MAX_PORTS_PER_BOARD; a++) 1205 tty_port_destroy(&brd->ports[a].port); 1206 1207 while (1) { 1208 opened = 0; 1209 for (a = 0; a < brd->numPorts; a++) 1210 if (tty_port_initialized(&brd->ports[a].port)) 1211 opened++; 1212 mutex_unlock(&moxa_openlock); 1213 if (!opened) 1214 break; 1215 msleep(50); 1216 mutex_lock(&moxa_openlock); 1217 } 1218 1219 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD; 1220 for (a = 0; a < brd->numPorts; a++) 1221 tty_unregister_device(moxaDriver, first_idx + a); 1222 1223 iounmap(brd->basemem); 1224 brd->basemem = NULL; 1225 kfree(brd->ports); 1226 } 1227 1228 #ifdef CONFIG_PCI 1229 static int moxa_pci_probe(struct pci_dev *pdev, 1230 const struct pci_device_id *ent) 1231 { 1232 struct moxa_board_conf *board; 1233 unsigned int i; 1234 int board_type = ent->driver_data; 1235 int retval; 1236 1237 retval = pci_enable_device(pdev); 1238 if (retval) { 1239 dev_err(&pdev->dev, "can't enable pci device\n"); 1240 goto err; 1241 } 1242 1243 for (i = 0; i < MAX_BOARDS; i++) 1244 if (moxa_boards[i].basemem == NULL) 1245 break; 1246 1247 retval = -ENODEV; 1248 if (i >= MAX_BOARDS) { 1249 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards " 1250 "found. Board is ignored.\n", MAX_BOARDS); 1251 goto err; 1252 } 1253 1254 board = &moxa_boards[i]; 1255 1256 retval = pci_request_region(pdev, 2, "moxa-base"); 1257 if (retval) { 1258 dev_err(&pdev->dev, "can't request pci region 2\n"); 1259 goto err; 1260 } 1261 1262 board->basemem = ioremap(pci_resource_start(pdev, 2), 0x4000); 1263 if (board->basemem == NULL) { 1264 dev_err(&pdev->dev, "can't remap io space 2\n"); 1265 retval = -ENOMEM; 1266 goto err_reg; 1267 } 1268 1269 board->boardType = board_type; 1270 switch (board_type) { 1271 case MOXA_BOARD_C218_ISA: 1272 case MOXA_BOARD_C218_PCI: 1273 board->numPorts = 8; 1274 break; 1275 1276 case MOXA_BOARD_CP204J: 1277 board->numPorts = 4; 1278 break; 1279 default: 1280 board->numPorts = 0; 1281 break; 1282 } 1283 board->busType = MOXA_BUS_TYPE_PCI; 1284 1285 retval = moxa_init_board(board, &pdev->dev); 1286 if (retval) 1287 goto err_base; 1288 1289 pci_set_drvdata(pdev, board); 1290 1291 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n", 1292 moxa_brdname[board_type - 1], board->numPorts); 1293 1294 return 0; 1295 err_base: 1296 iounmap(board->basemem); 1297 board->basemem = NULL; 1298 err_reg: 1299 pci_release_region(pdev, 2); 1300 err: 1301 return retval; 1302 } 1303 1304 static void moxa_pci_remove(struct pci_dev *pdev) 1305 { 1306 struct moxa_board_conf *brd = pci_get_drvdata(pdev); 1307 1308 moxa_board_deinit(brd); 1309 1310 pci_release_region(pdev, 2); 1311 } 1312 1313 static struct pci_driver moxa_pci_driver = { 1314 .name = "moxa", 1315 .id_table = moxa_pcibrds, 1316 .probe = moxa_pci_probe, 1317 .remove = moxa_pci_remove 1318 }; 1319 #endif /* CONFIG_PCI */ 1320 1321 static int __init moxa_init(void) 1322 { 1323 unsigned int isabrds = 0; 1324 int retval = 0; 1325 struct moxa_board_conf *brd = moxa_boards; 1326 unsigned int i; 1327 1328 tty_port_init(&moxa_service_port); 1329 1330 moxaDriver = tty_alloc_driver(MAX_PORTS + 1, 1331 TTY_DRIVER_REAL_RAW | 1332 TTY_DRIVER_DYNAMIC_DEV); 1333 if (IS_ERR(moxaDriver)) 1334 return PTR_ERR(moxaDriver); 1335 1336 moxaDriver->name = "ttyMX"; 1337 moxaDriver->major = ttymajor; 1338 moxaDriver->minor_start = 0; 1339 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL; 1340 moxaDriver->subtype = SERIAL_TYPE_NORMAL; 1341 moxaDriver->init_termios = tty_std_termios; 1342 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL; 1343 moxaDriver->init_termios.c_ispeed = 9600; 1344 moxaDriver->init_termios.c_ospeed = 9600; 1345 tty_set_operations(moxaDriver, &moxa_ops); 1346 /* Having one more port only for ioctls is ugly */ 1347 tty_port_link_device(&moxa_service_port, moxaDriver, MAX_PORTS); 1348 1349 if (tty_register_driver(moxaDriver)) { 1350 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n"); 1351 tty_driver_kref_put(moxaDriver); 1352 return -1; 1353 } 1354 1355 /* Find the boards defined from module args. */ 1356 1357 for (i = 0; i < MAX_BOARDS; i++) { 1358 if (!baseaddr[i]) 1359 break; 1360 if (type[i] == MOXA_BOARD_C218_ISA || 1361 type[i] == MOXA_BOARD_C320_ISA) { 1362 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n", 1363 isabrds + 1, moxa_brdname[type[i] - 1], 1364 baseaddr[i]); 1365 brd->boardType = type[i]; 1366 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 : 1367 numports[i]; 1368 brd->busType = MOXA_BUS_TYPE_ISA; 1369 brd->basemem = ioremap(baseaddr[i], 0x4000); 1370 if (!brd->basemem) { 1371 printk(KERN_ERR "MOXA: can't remap %lx\n", 1372 baseaddr[i]); 1373 continue; 1374 } 1375 if (moxa_init_board(brd, NULL)) { 1376 iounmap(brd->basemem); 1377 brd->basemem = NULL; 1378 continue; 1379 } 1380 1381 printk(KERN_INFO "MOXA isa board found at 0x%.8lx and " 1382 "ready (%u ports, firmware loaded)\n", 1383 baseaddr[i], brd->numPorts); 1384 1385 brd++; 1386 isabrds++; 1387 } 1388 } 1389 1390 #ifdef CONFIG_PCI 1391 retval = pci_register_driver(&moxa_pci_driver); 1392 if (retval) { 1393 printk(KERN_ERR "Can't register MOXA pci driver!\n"); 1394 if (isabrds) 1395 retval = 0; 1396 } 1397 #endif 1398 1399 return retval; 1400 } 1401 1402 static void __exit moxa_exit(void) 1403 { 1404 unsigned int i; 1405 1406 #ifdef CONFIG_PCI 1407 pci_unregister_driver(&moxa_pci_driver); 1408 #endif 1409 1410 for (i = 0; i < MAX_BOARDS; i++) /* ISA boards */ 1411 if (moxa_boards[i].ready) 1412 moxa_board_deinit(&moxa_boards[i]); 1413 1414 del_timer_sync(&moxaTimer); 1415 1416 tty_unregister_driver(moxaDriver); 1417 tty_driver_kref_put(moxaDriver); 1418 } 1419 1420 module_init(moxa_init); 1421 module_exit(moxa_exit); 1422 1423 static void moxa_shutdown(struct tty_port *port) 1424 { 1425 struct moxa_port *ch = container_of(port, struct moxa_port, port); 1426 MoxaPortDisable(ch); 1427 MoxaPortFlushData(ch, 2); 1428 } 1429 1430 static bool moxa_carrier_raised(struct tty_port *port) 1431 { 1432 struct moxa_port *ch = container_of(port, struct moxa_port, port); 1433 int dcd; 1434 1435 spin_lock_irq(&port->lock); 1436 dcd = ch->DCDState; 1437 spin_unlock_irq(&port->lock); 1438 return dcd; 1439 } 1440 1441 static void moxa_dtr_rts(struct tty_port *port, bool active) 1442 { 1443 struct moxa_port *ch = container_of(port, struct moxa_port, port); 1444 MoxaPortLineCtrl(ch, active, active); 1445 } 1446 1447 1448 static int moxa_open(struct tty_struct *tty, struct file *filp) 1449 { 1450 struct moxa_board_conf *brd; 1451 struct moxa_port *ch; 1452 int port; 1453 1454 port = tty->index; 1455 if (port == MAX_PORTS) { 1456 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM; 1457 } 1458 if (mutex_lock_interruptible(&moxa_openlock)) 1459 return -ERESTARTSYS; 1460 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD]; 1461 if (!brd->ready) { 1462 mutex_unlock(&moxa_openlock); 1463 return -ENODEV; 1464 } 1465 1466 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) { 1467 mutex_unlock(&moxa_openlock); 1468 return -ENODEV; 1469 } 1470 1471 ch = &brd->ports[port % MAX_PORTS_PER_BOARD]; 1472 ch->port.count++; 1473 tty->driver_data = ch; 1474 tty_port_tty_set(&ch->port, tty); 1475 mutex_lock(&ch->port.mutex); 1476 if (!tty_port_initialized(&ch->port)) { 1477 ch->statusflags = 0; 1478 moxa_set_tty_param(tty, &tty->termios); 1479 MoxaPortLineCtrl(ch, true, true); 1480 MoxaPortEnable(ch); 1481 MoxaSetFifo(ch, ch->type == PORT_16550A); 1482 tty_port_set_initialized(&ch->port, true); 1483 } 1484 mutex_unlock(&ch->port.mutex); 1485 mutex_unlock(&moxa_openlock); 1486 1487 return tty_port_block_til_ready(&ch->port, tty, filp); 1488 } 1489 1490 static void moxa_close(struct tty_struct *tty, struct file *filp) 1491 { 1492 struct moxa_port *ch = tty->driver_data; 1493 ch->cflag = tty->termios.c_cflag; 1494 tty_port_close(&ch->port, tty, filp); 1495 } 1496 1497 static ssize_t moxa_write(struct tty_struct *tty, const u8 *buf, size_t count) 1498 { 1499 struct moxa_port *ch = tty->driver_data; 1500 unsigned long flags; 1501 int len; 1502 1503 if (ch == NULL) 1504 return 0; 1505 1506 spin_lock_irqsave(&moxa_lock, flags); 1507 len = MoxaPortWriteData(tty, buf, count); 1508 spin_unlock_irqrestore(&moxa_lock, flags); 1509 1510 set_bit(LOWWAIT, &ch->statusflags); 1511 return len; 1512 } 1513 1514 static unsigned int moxa_write_room(struct tty_struct *tty) 1515 { 1516 struct moxa_port *ch; 1517 1518 if (tty->flow.stopped) 1519 return 0; 1520 ch = tty->driver_data; 1521 if (ch == NULL) 1522 return 0; 1523 return MoxaPortTxFree(ch); 1524 } 1525 1526 static void moxa_flush_buffer(struct tty_struct *tty) 1527 { 1528 struct moxa_port *ch = tty->driver_data; 1529 1530 if (ch == NULL) 1531 return; 1532 MoxaPortFlushData(ch, 1); 1533 tty_wakeup(tty); 1534 } 1535 1536 static unsigned int moxa_chars_in_buffer(struct tty_struct *tty) 1537 { 1538 struct moxa_port *ch = tty->driver_data; 1539 unsigned int chars; 1540 1541 chars = MoxaPortTxQueue(ch); 1542 if (chars) 1543 /* 1544 * Make it possible to wakeup anything waiting for output 1545 * in tty_ioctl.c, etc. 1546 */ 1547 set_bit(EMPTYWAIT, &ch->statusflags); 1548 return chars; 1549 } 1550 1551 static int moxa_tiocmget(struct tty_struct *tty) 1552 { 1553 struct moxa_port *ch = tty->driver_data; 1554 bool dtr_active, rts_active; 1555 int flag = 0; 1556 int status; 1557 1558 MoxaPortGetLineOut(ch, &dtr_active, &rts_active); 1559 if (dtr_active) 1560 flag |= TIOCM_DTR; 1561 if (rts_active) 1562 flag |= TIOCM_RTS; 1563 status = MoxaPortLineStatus(ch); 1564 if (status & 1) 1565 flag |= TIOCM_CTS; 1566 if (status & 2) 1567 flag |= TIOCM_DSR; 1568 if (status & 4) 1569 flag |= TIOCM_CD; 1570 return flag; 1571 } 1572 1573 static int moxa_tiocmset(struct tty_struct *tty, 1574 unsigned int set, unsigned int clear) 1575 { 1576 bool dtr_active, rts_active; 1577 struct moxa_port *ch; 1578 1579 mutex_lock(&moxa_openlock); 1580 ch = tty->driver_data; 1581 if (!ch) { 1582 mutex_unlock(&moxa_openlock); 1583 return -EINVAL; 1584 } 1585 1586 MoxaPortGetLineOut(ch, &dtr_active, &rts_active); 1587 if (set & TIOCM_RTS) 1588 rts_active = true; 1589 if (set & TIOCM_DTR) 1590 dtr_active = true; 1591 if (clear & TIOCM_RTS) 1592 rts_active = false; 1593 if (clear & TIOCM_DTR) 1594 dtr_active = false; 1595 MoxaPortLineCtrl(ch, dtr_active, rts_active); 1596 mutex_unlock(&moxa_openlock); 1597 return 0; 1598 } 1599 1600 static void moxa_set_termios(struct tty_struct *tty, 1601 const struct ktermios *old_termios) 1602 { 1603 struct moxa_port *ch = tty->driver_data; 1604 1605 if (ch == NULL) 1606 return; 1607 moxa_set_tty_param(tty, old_termios); 1608 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty)) 1609 wake_up_interruptible(&ch->port.open_wait); 1610 } 1611 1612 static void moxa_stop(struct tty_struct *tty) 1613 { 1614 struct moxa_port *ch = tty->driver_data; 1615 1616 if (ch == NULL) 1617 return; 1618 MoxaPortTxDisable(ch); 1619 set_bit(TXSTOPPED, &ch->statusflags); 1620 } 1621 1622 1623 static void moxa_start(struct tty_struct *tty) 1624 { 1625 struct moxa_port *ch = tty->driver_data; 1626 1627 if (ch == NULL) 1628 return; 1629 1630 if (!test_bit(TXSTOPPED, &ch->statusflags)) 1631 return; 1632 1633 MoxaPortTxEnable(ch); 1634 clear_bit(TXSTOPPED, &ch->statusflags); 1635 } 1636 1637 static void moxa_hangup(struct tty_struct *tty) 1638 { 1639 struct moxa_port *ch = tty->driver_data; 1640 tty_port_hangup(&ch->port); 1641 } 1642 1643 static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd) 1644 { 1645 unsigned long flags; 1646 dcd = !!dcd; 1647 1648 spin_lock_irqsave(&p->port.lock, flags); 1649 if (dcd != p->DCDState) { 1650 p->DCDState = dcd; 1651 spin_unlock_irqrestore(&p->port.lock, flags); 1652 if (!dcd) 1653 tty_port_tty_hangup(&p->port, true); 1654 } 1655 else 1656 spin_unlock_irqrestore(&p->port.lock, flags); 1657 } 1658 1659 static int moxa_poll_port(struct moxa_port *p, unsigned int handle, 1660 u16 __iomem *ip) 1661 { 1662 struct tty_struct *tty = tty_port_tty_get(&p->port); 1663 bool inited = tty_port_initialized(&p->port); 1664 void __iomem *ofsAddr; 1665 u16 intr; 1666 1667 if (tty) { 1668 if (test_bit(EMPTYWAIT, &p->statusflags) && 1669 MoxaPortTxQueue(p) == 0) { 1670 clear_bit(EMPTYWAIT, &p->statusflags); 1671 tty_wakeup(tty); 1672 } 1673 if (test_bit(LOWWAIT, &p->statusflags) && !tty->flow.stopped && 1674 MoxaPortTxQueue(p) <= WAKEUP_CHARS) { 1675 clear_bit(LOWWAIT, &p->statusflags); 1676 tty_wakeup(tty); 1677 } 1678 1679 if (inited && !tty_throttled(tty) && 1680 MoxaPortRxQueue(p) > 0) { /* RX */ 1681 MoxaPortReadData(p); 1682 tty_flip_buffer_push(&p->port); 1683 } 1684 } else { 1685 clear_bit(EMPTYWAIT, &p->statusflags); 1686 MoxaPortFlushData(p, 0); /* flush RX */ 1687 } 1688 1689 if (!handle) /* nothing else to do */ 1690 goto put; 1691 1692 intr = readw(ip); /* port irq status */ 1693 if (intr == 0) 1694 goto put; 1695 1696 writew(0, ip); /* ACK port */ 1697 ofsAddr = p->tableAddr; 1698 if (intr & IntrTx) /* disable tx intr */ 1699 writew(readw(ofsAddr + HostStat) & ~WakeupTx, 1700 ofsAddr + HostStat); 1701 1702 if (!inited) 1703 goto put; 1704 1705 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */ 1706 tty_insert_flip_char(&p->port, 0, TTY_BREAK); 1707 tty_flip_buffer_push(&p->port); 1708 } 1709 1710 if (intr & IntrLine) 1711 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state); 1712 put: 1713 tty_kref_put(tty); 1714 1715 return 0; 1716 } 1717 1718 static void moxa_poll(struct timer_list *unused) 1719 { 1720 struct moxa_board_conf *brd; 1721 u16 __iomem *ip; 1722 unsigned int card, port, served = 0; 1723 1724 spin_lock(&moxa_lock); 1725 for (card = 0; card < MAX_BOARDS; card++) { 1726 brd = &moxa_boards[card]; 1727 if (!brd->ready) 1728 continue; 1729 1730 served++; 1731 1732 ip = NULL; 1733 if (readb(brd->intPend) == 0xff) 1734 ip = brd->intTable + readb(brd->intNdx); 1735 1736 for (port = 0; port < brd->numPorts; port++) 1737 moxa_poll_port(&brd->ports[port], !!ip, ip + port); 1738 1739 if (ip) 1740 writeb(0, brd->intPend); /* ACK */ 1741 1742 if (moxaLowWaterChk) { 1743 struct moxa_port *p = brd->ports; 1744 for (port = 0; port < brd->numPorts; port++, p++) 1745 if (p->lowChkFlag) { 1746 p->lowChkFlag = 0; 1747 moxa_low_water_check(p->tableAddr); 1748 } 1749 } 1750 } 1751 moxaLowWaterChk = 0; 1752 1753 if (served) 1754 mod_timer(&moxaTimer, jiffies + HZ / 50); 1755 spin_unlock(&moxa_lock); 1756 } 1757 1758 /******************************************************************************/ 1759 1760 static void moxa_set_tty_param(struct tty_struct *tty, 1761 const struct ktermios *old_termios) 1762 { 1763 register struct ktermios *ts = &tty->termios; 1764 struct moxa_port *ch = tty->driver_data; 1765 int rts, cts, txflow, rxflow, xany, baud; 1766 1767 rts = cts = txflow = rxflow = xany = 0; 1768 if (ts->c_cflag & CRTSCTS) 1769 rts = cts = 1; 1770 if (ts->c_iflag & IXON) 1771 txflow = 1; 1772 if (ts->c_iflag & IXOFF) 1773 rxflow = 1; 1774 if (ts->c_iflag & IXANY) 1775 xany = 1; 1776 1777 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany); 1778 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty)); 1779 if (baud == -1) 1780 baud = tty_termios_baud_rate(old_termios); 1781 /* Not put the baud rate into the termios data */ 1782 tty_encode_baud_rate(tty, baud, baud); 1783 } 1784 1785 /***************************************************************************** 1786 * Driver level functions: * 1787 *****************************************************************************/ 1788 1789 static void MoxaPortFlushData(struct moxa_port *port, int mode) 1790 { 1791 void __iomem *ofsAddr; 1792 if (mode < 0 || mode > 2) 1793 return; 1794 ofsAddr = port->tableAddr; 1795 moxafunc(ofsAddr, FC_FlushQueue, mode); 1796 if (mode != 1) { 1797 port->lowChkFlag = 0; 1798 moxa_low_water_check(ofsAddr); 1799 } 1800 } 1801 1802 /* 1803 * Moxa Port Number Description: 1804 * 1805 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And, 1806 * the port number using in MOXA driver functions will be 0 to 31 for 1807 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96 1808 * to 127 for fourth. For example, if you setup three MOXA boards, 1809 * first board is C218, second board is C320-16 and third board is 1810 * C320-32. The port number of first board (C218 - 8 ports) is from 1811 * 0 to 7. The port number of second board (C320 - 16 ports) is form 1812 * 32 to 47. The port number of third board (C320 - 32 ports) is from 1813 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to 1814 * 127 will be invalid. 1815 * 1816 * 1817 * Moxa Functions Description: 1818 * 1819 * Function 1: Driver initialization routine, this routine must be 1820 * called when initialized driver. 1821 * Syntax: 1822 * void MoxaDriverInit(); 1823 * 1824 * 1825 * Function 2: Moxa driver private IOCTL command processing. 1826 * Syntax: 1827 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port); 1828 * 1829 * unsigned int cmd : IOCTL command 1830 * unsigned long arg : IOCTL argument 1831 * int port : port number (0 - 127) 1832 * 1833 * return: 0 (OK) 1834 * -EINVAL 1835 * -ENOIOCTLCMD 1836 * 1837 * 1838 * Function 6: Enable this port to start Tx/Rx data. 1839 * Syntax: 1840 * void MoxaPortEnable(int port); 1841 * int port : port number (0 - 127) 1842 * 1843 * 1844 * Function 7: Disable this port 1845 * Syntax: 1846 * void MoxaPortDisable(int port); 1847 * int port : port number (0 - 127) 1848 * 1849 * 1850 * Function 10: Setting baud rate of this port. 1851 * Syntax: 1852 * speed_t MoxaPortSetBaud(int port, speed_t baud); 1853 * int port : port number (0 - 127) 1854 * long baud : baud rate (50 - 115200) 1855 * 1856 * return: 0 : this port is invalid or baud < 50 1857 * 50 - 115200 : the real baud rate set to the port, if 1858 * the argument baud is large than maximun 1859 * available baud rate, the real setting 1860 * baud rate will be the maximun baud rate. 1861 * 1862 * 1863 * Function 12: Configure the port. 1864 * Syntax: 1865 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud); 1866 * int port : port number (0 - 127) 1867 * struct ktermios * termio : termio structure pointer 1868 * speed_t baud : baud rate 1869 * 1870 * return: -1 : this port is invalid or termio == NULL 1871 * 0 : setting O.K. 1872 * 1873 * 1874 * Function 13: Get the DTR/RTS state of this port. 1875 * Syntax: 1876 * int MoxaPortGetLineOut(int port, bool *dtrState, bool *rtsState); 1877 * int port : port number (0 - 127) 1878 * bool * dtr_active : pointer to bool to receive the current DTR 1879 * state. (if NULL, this function will not 1880 * write to this address) 1881 * bool * rts_active : pointer to bool to receive the current RTS 1882 * state. (if NULL, this function will not 1883 * write to this address) 1884 * 1885 * return: -1 : this port is invalid 1886 * 0 : O.K. 1887 * 1888 * 1889 * Function 14: Setting the DTR/RTS output state of this port. 1890 * Syntax: 1891 * void MoxaPortLineCtrl(int port, bool dtrState, bool rtsState); 1892 * int port : port number (0 - 127) 1893 * bool dtr_active : DTR output state 1894 * bool rts_active : RTS output state 1895 * 1896 * 1897 * Function 15: Setting the flow control of this port. 1898 * Syntax: 1899 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow, 1900 * int txFlow,int xany); 1901 * int port : port number (0 - 127) 1902 * int rtsFlow : H/W RTS flow control (0: no, 1: yes) 1903 * int ctsFlow : H/W CTS flow control (0: no, 1: yes) 1904 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes) 1905 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes) 1906 * int xany : S/W XANY flow control (0: no, 1: yes) 1907 * 1908 * 1909 * Function 16: Get ths line status of this port 1910 * Syntax: 1911 * int MoxaPortLineStatus(int port); 1912 * int port : port number (0 - 127) 1913 * 1914 * return: Bit 0 - CTS state (0: off, 1: on) 1915 * Bit 1 - DSR state (0: off, 1: on) 1916 * Bit 2 - DCD state (0: off, 1: on) 1917 * 1918 * 1919 * Function 19: Flush the Rx/Tx buffer data of this port. 1920 * Syntax: 1921 * void MoxaPortFlushData(int port, int mode); 1922 * int port : port number (0 - 127) 1923 * int mode 1924 * 0 : flush the Rx buffer 1925 * 1 : flush the Tx buffer 1926 * 2 : flush the Rx and Tx buffer 1927 * 1928 * 1929 * Function 20: Write data. 1930 * Syntax: 1931 * ssize_t MoxaPortWriteData(int port, u8 *buffer, size_t length); 1932 * int port : port number (0 - 127) 1933 * u8 *buffer : pointer to write data buffer. 1934 * size_t length : write data length 1935 * 1936 * return: 0 - length : real write data length 1937 * 1938 * 1939 * Function 21: Read data. 1940 * Syntax: 1941 * int MoxaPortReadData(int port, struct tty_struct *tty); 1942 * int port : port number (0 - 127) 1943 * struct tty_struct *tty : tty for data 1944 * 1945 * return: 0 - length : real read data length 1946 * 1947 * 1948 * Function 24: Get the Tx buffer current queued data bytes 1949 * Syntax: 1950 * int MoxaPortTxQueue(int port); 1951 * int port : port number (0 - 127) 1952 * 1953 * return: .. : Tx buffer current queued data bytes 1954 * 1955 * 1956 * Function 25: Get the Tx buffer current free space 1957 * Syntax: 1958 * int MoxaPortTxFree(int port); 1959 * int port : port number (0 - 127) 1960 * 1961 * return: .. : Tx buffer current free space 1962 * 1963 * 1964 * Function 26: Get the Rx buffer current queued data bytes 1965 * Syntax: 1966 * int MoxaPortRxQueue(int port); 1967 * int port : port number (0 - 127) 1968 * 1969 * return: .. : Rx buffer current queued data bytes 1970 * 1971 * 1972 * Function 28: Disable port data transmission. 1973 * Syntax: 1974 * void MoxaPortTxDisable(int port); 1975 * int port : port number (0 - 127) 1976 * 1977 * 1978 * Function 29: Enable port data transmission. 1979 * Syntax: 1980 * void MoxaPortTxEnable(int port); 1981 * int port : port number (0 - 127) 1982 * 1983 * 1984 * Function 31: Get the received BREAK signal count and reset it. 1985 * Syntax: 1986 * int MoxaPortResetBrkCnt(int port); 1987 * int port : port number (0 - 127) 1988 * 1989 * return: 0 - .. : BREAK signal count 1990 * 1991 * 1992 */ 1993 1994 static void MoxaPortEnable(struct moxa_port *port) 1995 { 1996 void __iomem *ofsAddr; 1997 u16 lowwater = 512; 1998 1999 ofsAddr = port->tableAddr; 2000 writew(lowwater, ofsAddr + Low_water); 2001 if (MOXA_IS_320(port->board)) 2002 moxafunc(ofsAddr, FC_SetBreakIrq, 0); 2003 else 2004 writew(readw(ofsAddr + HostStat) | WakeupBreak, 2005 ofsAddr + HostStat); 2006 2007 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code); 2008 moxafunc(ofsAddr, FC_FlushQueue, 2); 2009 2010 moxafunc(ofsAddr, FC_EnableCH, Magic_code); 2011 MoxaPortLineStatus(port); 2012 } 2013 2014 static void MoxaPortDisable(struct moxa_port *port) 2015 { 2016 void __iomem *ofsAddr = port->tableAddr; 2017 2018 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */ 2019 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code); 2020 writew(0, ofsAddr + HostStat); 2021 moxafunc(ofsAddr, FC_DisableCH, Magic_code); 2022 } 2023 2024 static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud) 2025 { 2026 void __iomem *ofsAddr = port->tableAddr; 2027 unsigned int clock, val; 2028 speed_t max; 2029 2030 max = MOXA_IS_320(port->board) ? 460800 : 921600; 2031 if (baud < 50) 2032 return 0; 2033 if (baud > max) 2034 baud = max; 2035 clock = 921600; 2036 val = clock / baud; 2037 moxafunc(ofsAddr, FC_SetBaud, val); 2038 baud = clock / val; 2039 return baud; 2040 } 2041 2042 static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio, 2043 speed_t baud) 2044 { 2045 void __iomem *ofsAddr; 2046 tcflag_t mode = 0; 2047 2048 ofsAddr = port->tableAddr; 2049 2050 mode = termio->c_cflag & CSIZE; 2051 if (mode == CS5) 2052 mode = MX_CS5; 2053 else if (mode == CS6) 2054 mode = MX_CS6; 2055 else if (mode == CS7) 2056 mode = MX_CS7; 2057 else if (mode == CS8) 2058 mode = MX_CS8; 2059 2060 if (termio->c_cflag & CSTOPB) { 2061 if (mode == MX_CS5) 2062 mode |= MX_STOP15; 2063 else 2064 mode |= MX_STOP2; 2065 } else 2066 mode |= MX_STOP1; 2067 2068 if (termio->c_cflag & PARENB) { 2069 if (termio->c_cflag & PARODD) { 2070 if (termio->c_cflag & CMSPAR) 2071 mode |= MX_PARMARK; 2072 else 2073 mode |= MX_PARODD; 2074 } else { 2075 if (termio->c_cflag & CMSPAR) 2076 mode |= MX_PARSPACE; 2077 else 2078 mode |= MX_PAREVEN; 2079 } 2080 } else 2081 mode |= MX_PARNONE; 2082 2083 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode); 2084 2085 if (MOXA_IS_320(port->board) && baud >= 921600) 2086 return -1; 2087 2088 baud = MoxaPortSetBaud(port, baud); 2089 2090 if (termio->c_iflag & (IXON | IXOFF | IXANY)) { 2091 spin_lock_irq(&moxafunc_lock); 2092 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg); 2093 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1); 2094 writeb(FC_SetXonXoff, ofsAddr + FuncCode); 2095 moxa_wait_finish(ofsAddr); 2096 spin_unlock_irq(&moxafunc_lock); 2097 2098 } 2099 return baud; 2100 } 2101 2102 static int MoxaPortGetLineOut(struct moxa_port *port, bool *dtr_active, 2103 bool *rts_active) 2104 { 2105 if (dtr_active) 2106 *dtr_active = port->lineCtrl & DTR_ON; 2107 if (rts_active) 2108 *rts_active = port->lineCtrl & RTS_ON; 2109 2110 return 0; 2111 } 2112 2113 static void MoxaPortLineCtrl(struct moxa_port *port, bool dtr_active, bool rts_active) 2114 { 2115 u8 mode = 0; 2116 2117 if (dtr_active) 2118 mode |= DTR_ON; 2119 if (rts_active) 2120 mode |= RTS_ON; 2121 port->lineCtrl = mode; 2122 moxafunc(port->tableAddr, FC_LineControl, mode); 2123 } 2124 2125 static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts, 2126 int txflow, int rxflow, int txany) 2127 { 2128 int mode = 0; 2129 2130 if (rts) 2131 mode |= RTS_FlowCtl; 2132 if (cts) 2133 mode |= CTS_FlowCtl; 2134 if (txflow) 2135 mode |= Tx_FlowCtl; 2136 if (rxflow) 2137 mode |= Rx_FlowCtl; 2138 if (txany) 2139 mode |= IXM_IXANY; 2140 moxafunc(port->tableAddr, FC_SetFlowCtl, mode); 2141 } 2142 2143 static int MoxaPortLineStatus(struct moxa_port *port) 2144 { 2145 void __iomem *ofsAddr; 2146 int val; 2147 2148 ofsAddr = port->tableAddr; 2149 if (MOXA_IS_320(port->board)) 2150 val = moxafuncret(ofsAddr, FC_LineStatus, 0); 2151 else 2152 val = readw(ofsAddr + FlagStat) >> 4; 2153 val &= 0x0B; 2154 if (val & 8) 2155 val |= 4; 2156 moxa_new_dcdstate(port, val & 8); 2157 val &= 7; 2158 return val; 2159 } 2160 2161 static ssize_t MoxaPortWriteData(struct tty_struct *tty, const u8 *buffer, 2162 size_t len) 2163 { 2164 struct moxa_port *port = tty->driver_data; 2165 void __iomem *baseAddr, *ofsAddr, *ofs; 2166 size_t c, total; 2167 u16 head, tail, tx_mask, spage, epage; 2168 u16 pageno, pageofs, bufhead; 2169 2170 ofsAddr = port->tableAddr; 2171 baseAddr = port->board->basemem; 2172 tx_mask = readw(ofsAddr + TX_mask); 2173 spage = readw(ofsAddr + Page_txb); 2174 epage = readw(ofsAddr + EndPage_txb); 2175 tail = readw(ofsAddr + TXwptr); 2176 head = readw(ofsAddr + TXrptr); 2177 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask); 2178 if (c > len) 2179 c = len; 2180 moxaLog.txcnt[port->port.tty->index] += c; 2181 total = c; 2182 if (spage == epage) { 2183 bufhead = readw(ofsAddr + Ofs_txb); 2184 writew(spage, baseAddr + Control_reg); 2185 while (c > 0) { 2186 if (head > tail) 2187 len = head - tail - 1; 2188 else 2189 len = tx_mask + 1 - tail; 2190 len = (c > len) ? len : c; 2191 ofs = baseAddr + DynPage_addr + bufhead + tail; 2192 memcpy_toio(ofs, buffer, len); 2193 buffer += len; 2194 tail = (tail + len) & tx_mask; 2195 c -= len; 2196 } 2197 } else { 2198 pageno = spage + (tail >> 13); 2199 pageofs = tail & Page_mask; 2200 while (c > 0) { 2201 len = Page_size - pageofs; 2202 if (len > c) 2203 len = c; 2204 writeb(pageno, baseAddr + Control_reg); 2205 ofs = baseAddr + DynPage_addr + pageofs; 2206 memcpy_toio(ofs, buffer, len); 2207 buffer += len; 2208 if (++pageno == epage) 2209 pageno = spage; 2210 pageofs = 0; 2211 c -= len; 2212 } 2213 tail = (tail + total) & tx_mask; 2214 } 2215 writew(tail, ofsAddr + TXwptr); 2216 writeb(1, ofsAddr + CD180TXirq); /* start to send */ 2217 return total; 2218 } 2219 2220 static int MoxaPortReadData(struct moxa_port *port) 2221 { 2222 struct tty_struct *tty = port->port.tty; 2223 void __iomem *baseAddr, *ofsAddr, *ofs; 2224 u8 *dst; 2225 unsigned int count, len, total; 2226 u16 tail, rx_mask, spage, epage; 2227 u16 pageno, pageofs, bufhead, head; 2228 2229 ofsAddr = port->tableAddr; 2230 baseAddr = port->board->basemem; 2231 head = readw(ofsAddr + RXrptr); 2232 tail = readw(ofsAddr + RXwptr); 2233 rx_mask = readw(ofsAddr + RX_mask); 2234 spage = readw(ofsAddr + Page_rxb); 2235 epage = readw(ofsAddr + EndPage_rxb); 2236 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1); 2237 if (count == 0) 2238 return 0; 2239 2240 total = count; 2241 moxaLog.rxcnt[tty->index] += total; 2242 if (spage == epage) { 2243 bufhead = readw(ofsAddr + Ofs_rxb); 2244 writew(spage, baseAddr + Control_reg); 2245 while (count > 0) { 2246 ofs = baseAddr + DynPage_addr + bufhead + head; 2247 len = (tail >= head) ? (tail - head) : 2248 (rx_mask + 1 - head); 2249 len = tty_prepare_flip_string(&port->port, &dst, 2250 min(len, count)); 2251 memcpy_fromio(dst, ofs, len); 2252 head = (head + len) & rx_mask; 2253 count -= len; 2254 } 2255 } else { 2256 pageno = spage + (head >> 13); 2257 pageofs = head & Page_mask; 2258 while (count > 0) { 2259 writew(pageno, baseAddr + Control_reg); 2260 ofs = baseAddr + DynPage_addr + pageofs; 2261 len = tty_prepare_flip_string(&port->port, &dst, 2262 min(Page_size - pageofs, count)); 2263 memcpy_fromio(dst, ofs, len); 2264 2265 count -= len; 2266 pageofs = (pageofs + len) & Page_mask; 2267 if (pageofs == 0 && ++pageno == epage) 2268 pageno = spage; 2269 } 2270 head = (head + total) & rx_mask; 2271 } 2272 writew(head, ofsAddr + RXrptr); 2273 if (readb(ofsAddr + FlagStat) & Xoff_state) { 2274 moxaLowWaterChk = 1; 2275 port->lowChkFlag = 1; 2276 } 2277 return total; 2278 } 2279 2280 2281 static unsigned int MoxaPortTxQueue(struct moxa_port *port) 2282 { 2283 void __iomem *ofsAddr = port->tableAddr; 2284 u16 rptr, wptr, mask; 2285 2286 rptr = readw(ofsAddr + TXrptr); 2287 wptr = readw(ofsAddr + TXwptr); 2288 mask = readw(ofsAddr + TX_mask); 2289 return (wptr - rptr) & mask; 2290 } 2291 2292 static unsigned int MoxaPortTxFree(struct moxa_port *port) 2293 { 2294 void __iomem *ofsAddr = port->tableAddr; 2295 u16 rptr, wptr, mask; 2296 2297 rptr = readw(ofsAddr + TXrptr); 2298 wptr = readw(ofsAddr + TXwptr); 2299 mask = readw(ofsAddr + TX_mask); 2300 return mask - ((wptr - rptr) & mask); 2301 } 2302 2303 static int MoxaPortRxQueue(struct moxa_port *port) 2304 { 2305 void __iomem *ofsAddr = port->tableAddr; 2306 u16 rptr, wptr, mask; 2307 2308 rptr = readw(ofsAddr + RXrptr); 2309 wptr = readw(ofsAddr + RXwptr); 2310 mask = readw(ofsAddr + RX_mask); 2311 return (wptr - rptr) & mask; 2312 } 2313 2314 static void MoxaPortTxDisable(struct moxa_port *port) 2315 { 2316 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code); 2317 } 2318 2319 static void MoxaPortTxEnable(struct moxa_port *port) 2320 { 2321 moxafunc(port->tableAddr, FC_SetXonState, Magic_code); 2322 } 2323 2324 static int moxa_get_serial_info(struct tty_struct *tty, 2325 struct serial_struct *ss) 2326 { 2327 struct moxa_port *info = tty->driver_data; 2328 2329 if (tty->index == MAX_PORTS) 2330 return -EINVAL; 2331 if (!info) 2332 return -ENODEV; 2333 mutex_lock(&info->port.mutex); 2334 ss->type = info->type; 2335 ss->line = info->port.tty->index; 2336 ss->flags = info->port.flags; 2337 ss->baud_base = 921600; 2338 ss->close_delay = jiffies_to_msecs(info->port.close_delay) / 10; 2339 mutex_unlock(&info->port.mutex); 2340 return 0; 2341 } 2342 2343 2344 static int moxa_set_serial_info(struct tty_struct *tty, 2345 struct serial_struct *ss) 2346 { 2347 struct moxa_port *info = tty->driver_data; 2348 unsigned int close_delay; 2349 2350 if (tty->index == MAX_PORTS) 2351 return -EINVAL; 2352 if (!info) 2353 return -ENODEV; 2354 2355 close_delay = msecs_to_jiffies(ss->close_delay * 10); 2356 2357 mutex_lock(&info->port.mutex); 2358 if (!capable(CAP_SYS_ADMIN)) { 2359 if (close_delay != info->port.close_delay || 2360 ss->type != info->type || 2361 ((ss->flags & ~ASYNC_USR_MASK) != 2362 (info->port.flags & ~ASYNC_USR_MASK))) { 2363 mutex_unlock(&info->port.mutex); 2364 return -EPERM; 2365 } 2366 } else { 2367 info->port.close_delay = close_delay; 2368 2369 MoxaSetFifo(info, ss->type == PORT_16550A); 2370 2371 info->type = ss->type; 2372 } 2373 mutex_unlock(&info->port.mutex); 2374 return 0; 2375 } 2376 2377 2378 2379 /***************************************************************************** 2380 * Static local functions: * 2381 *****************************************************************************/ 2382 2383 static void MoxaSetFifo(struct moxa_port *port, int enable) 2384 { 2385 void __iomem *ofsAddr = port->tableAddr; 2386 2387 if (!enable) { 2388 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0); 2389 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1); 2390 } else { 2391 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3); 2392 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16); 2393 } 2394 } 2395