xref: /linux-6.15/drivers/reset/Kconfig (revision c8ae9c2d)
1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only
261fc4131SPhilipp Zabelconfig ARCH_HAS_RESET_CONTROLLER
361fc4131SPhilipp Zabel	bool
461fc4131SPhilipp Zabel
561fc4131SPhilipp Zabelmenuconfig RESET_CONTROLLER
661fc4131SPhilipp Zabel	bool "Reset Controller Support"
761fc4131SPhilipp Zabel	default y if ARCH_HAS_RESET_CONTROLLER
861fc4131SPhilipp Zabel	help
961fc4131SPhilipp Zabel	  Generic Reset Controller support.
1061fc4131SPhilipp Zabel
1161fc4131SPhilipp Zabel	  This framework is designed to abstract reset handling of devices
1261fc4131SPhilipp Zabel	  via GPIOs or SoC-internal reset controller modules.
1361fc4131SPhilipp Zabel
1461fc4131SPhilipp Zabel	  If unsure, say no.
15e5d76075SStephen Gallimore
16998cd463SMasahiro Yamadaif RESET_CONTROLLER
17998cd463SMasahiro Yamada
1862700682SThor Thayerconfig RESET_A10SR
1962700682SThor Thayer	tristate "Altera Arria10 System Resource Reset"
2062700682SThor Thayer	depends on MFD_ALTERA_A10SR
2162700682SThor Thayer	help
2262700682SThor Thayer	  This option enables support for the external reset functions for
2362700682SThor Thayer	  peripheral PHYs on the Altera Arria10 System Resource Chip.
2462700682SThor Thayer
25e27b4a6eSPhilipp Zabelconfig RESET_ATH79
26e27b4a6eSPhilipp Zabel	bool "AR71xx Reset Driver" if COMPILE_TEST
27e27b4a6eSPhilipp Zabel	default ATH79
28e27b4a6eSPhilipp Zabel	help
29e27b4a6eSPhilipp Zabel	  This enables the ATH79 reset controller driver that supports the
30e27b4a6eSPhilipp Zabel	  AR71xx SoC reset controller.
31e27b4a6eSPhilipp Zabel
3237634923SEugeniy Paltsevconfig RESET_AXS10X
3337634923SEugeniy Paltsev	bool "AXS10x Reset Driver" if COMPILE_TEST
3437634923SEugeniy Paltsev	default ARC_PLAT_AXS10X
3537634923SEugeniy Paltsev	help
3637634923SEugeniy Paltsev	  This enables the reset controller driver for AXS10x.
3737634923SEugeniy Paltsev
3870d467eaSPhilipp Zabelconfig RESET_BERLIN
3970d467eaSPhilipp Zabel	bool "Berlin Reset Driver" if COMPILE_TEST
4070d467eaSPhilipp Zabel	default ARCH_BERLIN
4170d467eaSPhilipp Zabel	help
4270d467eaSPhilipp Zabel	  This enables the reset controller driver for Marvell Berlin SoCs.
4370d467eaSPhilipp Zabel
4477750bc0SFlorian Fainelliconfig RESET_BRCMSTB
4577750bc0SFlorian Fainelli	tristate "Broadcom STB reset controller"
4677750bc0SFlorian Fainelli	depends on ARCH_BRCMSTB || COMPILE_TEST
4777750bc0SFlorian Fainelli	default ARCH_BRCMSTB
4877750bc0SFlorian Fainelli	help
4977750bc0SFlorian Fainelli	  This enables the reset controller driver for Broadcom STB SoCs using
5077750bc0SFlorian Fainelli	  a SUN_TOP_CTRL_SW_INIT style controller.
5177750bc0SFlorian Fainelli
5213541226SVineet Guptaconfig RESET_HSDK
5313541226SVineet Gupta	bool "Synopsys HSDK Reset Driver"
542d48a237SThomas Meyer	depends on HAS_IOMEM
55544e3bf4SGeert Uytterhoeven	depends on ARC_SOC_HSDK || COMPILE_TEST
56e0be864fSEugeniy Paltsev	help
5713541226SVineet Gupta	  This enables the reset controller driver for HSDK board.
58e0be864fSEugeniy Paltsev
59abf97755SAndrey Smirnovconfig RESET_IMX7
60c979dbf5SAndrey Smirnov	bool "i.MX7/8 Reset Driver" if COMPILE_TEST
618fa56620SMasahiro Yamada	depends on HAS_IOMEM
62c979dbf5SAndrey Smirnov	default SOC_IMX7D || (ARM64 && ARCH_MXC)
63abf97755SAndrey Smirnov	select MFD_SYSCON
64abf97755SAndrey Smirnov	help
65abf97755SAndrey Smirnov	  This enables the reset controller driver for i.MX7 SoCs.
66abf97755SAndrey Smirnov
6779797b6fSMartin Blumenstinglconfig RESET_LANTIQ
6879797b6fSMartin Blumenstingl	bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
6979797b6fSMartin Blumenstingl	default SOC_TYPE_XWAY
7079797b6fSMartin Blumenstingl	help
7179797b6fSMartin Blumenstingl	  This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
7279797b6fSMartin Blumenstingl
73cd7f4b81SPhilipp Zabelconfig RESET_LPC18XX
74cd7f4b81SPhilipp Zabel	bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
75cd7f4b81SPhilipp Zabel	default ARCH_LPC18XX
76cd7f4b81SPhilipp Zabel	help
77cd7f4b81SPhilipp Zabel	  This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
78cd7f4b81SPhilipp Zabel
7944336c24SPhilipp Zabelconfig RESET_MESON
8044336c24SPhilipp Zabel	bool "Meson Reset Driver" if COMPILE_TEST
8144336c24SPhilipp Zabel	default ARCH_MESON
8244336c24SPhilipp Zabel	help
8344336c24SPhilipp Zabel	  This enables the reset driver for Amlogic Meson SoCs.
8444336c24SPhilipp Zabel
85d903779bSJerome Brunetconfig RESET_MESON_AUDIO_ARB
86d903779bSJerome Brunet	tristate "Meson Audio Memory Arbiter Reset Driver"
87d903779bSJerome Brunet	depends on ARCH_MESON || COMPILE_TEST
88d903779bSJerome Brunet	help
89d903779bSJerome Brunet	  This enables the reset driver for Audio Memory Arbiter of
90d903779bSJerome Brunet	  Amlogic's A113 based SoCs
91d903779bSJerome Brunet
926e667facSNeil Armstrongconfig RESET_OXNAS
936e667facSNeil Armstrong	bool
946e667facSNeil Armstrong
95fab3f730SPhilipp Zabelconfig RESET_PISTACHIO
96fab3f730SPhilipp Zabel	bool "Pistachio Reset Driver" if COMPILE_TEST
97fab3f730SPhilipp Zabel	default MACH_PISTACHIO
98fab3f730SPhilipp Zabel	help
99fab3f730SPhilipp Zabel	  This enables the reset driver for ImgTec Pistachio SoCs.
100fab3f730SPhilipp Zabel
1015ecb0651SSibi Sankarconfig RESET_QCOM_AOSS
1025ecb0651SSibi Sankar	bool "Qcom AOSS Reset Driver"
1035ecb0651SSibi Sankar	depends on ARCH_QCOM || COMPILE_TEST
1045ecb0651SSibi Sankar	help
1055ecb0651SSibi Sankar	  This enables the AOSS (always on subsystem) reset driver
1065ecb0651SSibi Sankar	  for Qualcomm SDM845 SoCs. Say Y if you want to control
1075ecb0651SSibi Sankar	  reset signals provided by AOSS for Modem, Venus, ADSP,
1085ecb0651SSibi Sankar	  GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
1095ecb0651SSibi Sankar
110eea2926bSSibi Sankarconfig RESET_QCOM_PDC
111eea2926bSSibi Sankar	tristate "Qualcomm PDC Reset Driver"
112eea2926bSSibi Sankar	depends on ARCH_QCOM || COMPILE_TEST
113eea2926bSSibi Sankar	help
114eea2926bSSibi Sankar	  This enables the PDC (Power Domain Controller) reset driver
115eea2926bSSibi Sankar	  for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
116eea2926bSSibi Sankar	  to control reset signals provided by PDC for Modem, Compute,
117eea2926bSSibi Sankar	  Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
118eea2926bSSibi Sankar
119*c8ae9c2dSSudeep Hollaconfig RESET_SCMI
120*c8ae9c2dSSudeep Holla	tristate "Reset driver controlled via ARM SCMI interface"
121*c8ae9c2dSSudeep Holla	depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
122*c8ae9c2dSSudeep Holla	default ARM_SCMI_PROTOCOL
123*c8ae9c2dSSudeep Holla	help
124*c8ae9c2dSSudeep Holla	  This driver provides support for reset signal/domains that are
125*c8ae9c2dSSudeep Holla	  controlled by firmware that implements the SCMI interface.
126*c8ae9c2dSSudeep Holla
127*c8ae9c2dSSudeep Holla	  This driver uses SCMI Message Protocol to interact with the
128*c8ae9c2dSSudeep Holla	  firmware controlling all the reset signals.
129*c8ae9c2dSSudeep Holla
13081c22ad0SPhilipp Zabelconfig RESET_SIMPLE
13181c22ad0SPhilipp Zabel	bool "Simple Reset Controller Driver" if COMPILE_TEST
13264c47b62SManivannan Sadhasivam	default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN
13381c22ad0SPhilipp Zabel	help
13481c22ad0SPhilipp Zabel	  This enables a simple reset controller driver for reset lines that
13581c22ad0SPhilipp Zabel	  that can be asserted and deasserted by toggling bits in a contiguous,
13681c22ad0SPhilipp Zabel	  exclusive register space.
13781c22ad0SPhilipp Zabel
1381d7592f8SJoel Stanley	  Currently this driver supports:
1391d7592f8SJoel Stanley	   - Altera SoCFPGAs
1401d7592f8SJoel Stanley	   - ASPEED BMC SoCs
1411d7592f8SJoel Stanley	   - RCC reset controller in STM32 MCUs
1421d7592f8SJoel Stanley	   - Allwinner SoCs
1431d7592f8SJoel Stanley	   - ZTE's zx2967 family
14464c47b62SManivannan Sadhasivam	   - Bitmain BM1880 SoC
1457e0e901dSPhilipp Zabel
146197858b6SGabriel Fernandezconfig RESET_STM32MP157
147197858b6SGabriel Fernandez	bool "STM32MP157 Reset Driver" if COMPILE_TEST
148197858b6SGabriel Fernandez	default MACH_STM32MP157
149197858b6SGabriel Fernandez	help
150197858b6SGabriel Fernandez	  This enables the RCC reset controller driver for STM32 MPUs.
151197858b6SGabriel Fernandez
152b3ca9888SDinh Nguyenconfig RESET_SOCFPGA
153b3ca9888SDinh Nguyen	bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA
154b3ca9888SDinh Nguyen	default ARCH_SOCFPGA
155b3ca9888SDinh Nguyen	select RESET_SIMPLE
156b3ca9888SDinh Nguyen	help
157b3ca9888SDinh Nguyen	  This enables the reset driver for the SoCFPGA ARMv7 platforms. This
158b3ca9888SDinh Nguyen	  driver gets initialized early during platform init calls.
159b3ca9888SDinh Nguyen
1600ae08419SPhilipp Zabelconfig RESET_SUNXI
1610ae08419SPhilipp Zabel	bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
1620ae08419SPhilipp Zabel	default ARCH_SUNXI
163e13c205aSPhilipp Zabel	select RESET_SIMPLE
1640ae08419SPhilipp Zabel	help
1650ae08419SPhilipp Zabel	  This enables the reset driver for Allwinner SoCs.
1660ae08419SPhilipp Zabel
16728df169bSAndrew F. Davisconfig RESET_TI_SCI
16828df169bSAndrew F. Davis	tristate "TI System Control Interface (TI-SCI) reset driver"
16928df169bSAndrew F. Davis	depends on TI_SCI_PROTOCOL
17028df169bSAndrew F. Davis	help
17128df169bSAndrew F. Davis	  This enables the reset driver support over TI System Control Interface
17228df169bSAndrew F. Davis	  available on some new TI's SoCs. If you wish to use reset resources
17328df169bSAndrew F. Davis	  managed by the TI System Controller, say Y here. Otherwise, say N.
17428df169bSAndrew F. Davis
175dd9bf863SSuman Annaconfig RESET_TI_SYSCON
176cc7c2bb1SAndrew F. Davis	tristate "TI SYSCON Reset Driver"
177cc7c2bb1SAndrew F. Davis	depends on HAS_IOMEM
178cc7c2bb1SAndrew F. Davis	select MFD_SYSCON
179cc7c2bb1SAndrew F. Davis	help
180cc7c2bb1SAndrew F. Davis	  This enables the reset driver support for TI devices with
181cc7c2bb1SAndrew F. Davis	  memory-mapped reset registers as part of a syscon device node. If
182cc7c2bb1SAndrew F. Davis	  you wish to use the reset framework for such memory-mapped devices,
183cc7c2bb1SAndrew F. Davis	  say Y here. Otherwise, say N.
184cc7c2bb1SAndrew F. Davis
18554e991b5SMasahiro Yamadaconfig RESET_UNIPHIER
18654e991b5SMasahiro Yamada	tristate "Reset controller driver for UniPhier SoCs"
18754e991b5SMasahiro Yamada	depends on ARCH_UNIPHIER || COMPILE_TEST
18854e991b5SMasahiro Yamada	depends on OF && MFD_SYSCON
18954e991b5SMasahiro Yamada	default ARCH_UNIPHIER
19054e991b5SMasahiro Yamada	help
19154e991b5SMasahiro Yamada	  Support for reset controllers on UniPhier SoCs.
19254e991b5SMasahiro Yamada	  Say Y if you want to control reset signals provided by System Control
19354e991b5SMasahiro Yamada	  block, Media I/O block, Peripheral Block.
19454e991b5SMasahiro Yamada
1953eb8f765SKunihiko Hayashiconfig RESET_UNIPHIER_GLUE
1963eb8f765SKunihiko Hayashi	tristate "Reset driver in glue layer for UniPhier SoCs"
197499fef09SKunihiko Hayashi	depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
198499fef09SKunihiko Hayashi	default ARCH_UNIPHIER
199499fef09SKunihiko Hayashi	select RESET_SIMPLE
200499fef09SKunihiko Hayashi	help
2013eb8f765SKunihiko Hayashi	  Support for peripheral core reset included in its own glue layer
2023eb8f765SKunihiko Hayashi	  on UniPhier SoCs. Say Y if you want to control reset signals
2033eb8f765SKunihiko Hayashi	  provided by the glue layer.
204499fef09SKunihiko Hayashi
2056f51b860SPhilipp Zabelconfig RESET_ZYNQ
2066f51b860SPhilipp Zabel	bool "ZYNQ Reset Driver" if COMPILE_TEST
2076f51b860SPhilipp Zabel	default ARCH_ZYNQ
2086f51b860SPhilipp Zabel	help
2096f51b860SPhilipp Zabel	  This enables the reset controller driver for Xilinx Zynq SoCs.
2106f51b860SPhilipp Zabel
211e5d76075SStephen Gallimoresource "drivers/reset/sti/Kconfig"
212f59d23c2SChen Fengsource "drivers/reset/hisilicon/Kconfig"
213dc606c52SThierry Redingsource "drivers/reset/tegra/Kconfig"
214998cd463SMasahiro Yamada
215998cd463SMasahiro Yamadaendif
216