xref: /linux-6.15/drivers/mailbox/Kconfig (revision 3f58c1f4)
1# SPDX-License-Identifier: GPL-2.0-only
2menuconfig MAILBOX
3	bool "Mailbox Hardware Support"
4	help
5	  Mailbox is a framework to control hardware communication between
6	  on-chip processors through queued messages and interrupt driven
7	  signals. Say Y if your platform supports hardware mailboxes.
8
9if MAILBOX
10
11config ARM_MHU
12	tristate "ARM MHU Mailbox"
13	depends on ARM_AMBA
14	help
15	  Say Y here if you want to build the ARM MHU controller driver.
16	  The controller has 3 mailbox channels, the last of which can be
17	  used in Secure mode only.
18
19config ARM_MHU_V2
20	tristate "ARM MHUv2 Mailbox"
21	depends on ARM_AMBA
22	help
23	  Say Y here if you want to build the ARM MHUv2 controller driver,
24	  which provides unidirectional mailboxes between processing elements.
25
26config IMX_MBOX
27	tristate "i.MX Mailbox"
28	depends on ARCH_MXC || COMPILE_TEST
29	help
30	  Mailbox implementation for i.MX Messaging Unit (MU).
31
32config PLATFORM_MHU
33	tristate "Platform MHU Mailbox"
34	depends on OF
35	depends on HAS_IOMEM
36	help
37	  Say Y here if you want to build a platform specific variant MHU
38	  controller driver.
39	  The controller has a maximum of 3 mailbox channels, the last of
40	  which can be used in Secure mode only.
41
42config PL320_MBOX
43	bool "ARM PL320 Mailbox"
44	depends on ARM_AMBA
45	help
46	  An implementation of the ARM PL320 Interprocessor Communication
47	  Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
48	  send short messages between Highbank's A9 cores and the EnergyCore
49	  Management Engine, primarily for cpufreq. Say Y here if you want
50	  to use the PL320 IPCM support.
51
52config ARMADA_37XX_RWTM_MBOX
53	tristate "Armada 37xx rWTM BIU Mailbox"
54	depends on ARCH_MVEBU || COMPILE_TEST
55	depends on OF
56	help
57	  Mailbox implementation for communication with the the firmware
58	  running on the Cortex-M3 rWTM secure processor of the Armada 37xx
59	  SOC. Say Y here if you are building for such a device (for example
60	  the Turris Mox router).
61
62config OMAP2PLUS_MBOX
63	tristate "OMAP2+ Mailbox framework support"
64	depends on ARCH_OMAP2PLUS || ARCH_K3
65	help
66	  Mailbox implementation for OMAP family chips with hardware for
67	  interprocessor communication involving DSP, IVA1.0 and IVA2 in
68	  OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
69	  want to use OMAP2+ Mailbox framework support.
70
71config ROCKCHIP_MBOX
72	bool "Rockchip Soc Integrated Mailbox Support"
73	depends on ARCH_ROCKCHIP || COMPILE_TEST
74	help
75	  This driver provides support for inter-processor communication
76	  between CPU cores and MCU processor on Some Rockchip SOCs.
77	  Please check it that the Soc you use have Mailbox hardware.
78	  Say Y here if you want to use the Rockchip Mailbox support.
79
80config PCC
81	bool "Platform Communication Channel Driver"
82	depends on ACPI
83	default n
84	help
85	  ACPI 5.0+ spec defines a generic mode of communication
86	  between the OS and a platform such as the BMC. This medium
87	  (PCC) is typically used by CPPC (ACPI CPU Performance management),
88	  RAS (ACPI reliability protocol) and MPST (ACPI Memory power
89	  states). Select this driver if your platform implements the
90	  PCC clients mentioned above.
91
92config ALTERA_MBOX
93	tristate "Altera Mailbox"
94	depends on HAS_IOMEM
95	help
96	  An implementation of the Altera Mailbox soft core. It is used
97	  to send message between processors. Say Y here if you want to use the
98	  Altera mailbox support.
99
100config BCM2835_MBOX
101	tristate "BCM2835 Mailbox"
102	depends on ARCH_BCM2835
103	help
104	  An implementation of the BCM2385 Mailbox.  It is used to invoke
105	  the services of the Videocore. Say Y here if you want to use the
106	  BCM2835 Mailbox.
107
108config STI_MBOX
109	tristate "STI Mailbox framework support"
110	depends on ARCH_STI && OF
111	help
112	  Mailbox implementation for STMicroelectonics family chips with
113	  hardware for interprocessor communication.
114
115config TI_MESSAGE_MANAGER
116	tristate "Texas Instruments Message Manager Driver"
117	depends on ARCH_KEYSTONE || ARCH_K3
118	default ARCH_K3
119	help
120	  An implementation of Message Manager slave driver for Keystone
121	  and K3 architecture SoCs from Texas Instruments. Message Manager
122	  is a communication entity found on few of Texas Instrument's keystone
123	  and K3 architecture SoCs. These may be used for communication between
124	  multiple processors within the SoC. Select this driver if your
125	  platform has support for the hardware block.
126
127config HI3660_MBOX
128	tristate "Hi3660 Mailbox" if EXPERT
129	depends on (ARCH_HISI || COMPILE_TEST)
130	depends on OF
131	default ARCH_HISI
132	help
133	  An implementation of the hi3660 mailbox. It is used to send message
134	  between application processors and other processors/MCU/DSP. Select
135	  Y here if you want to use Hi3660 mailbox controller.
136
137config HI6220_MBOX
138	tristate "Hi6220 Mailbox" if EXPERT
139	depends on (ARCH_HISI || COMPILE_TEST)
140	depends on OF
141	default ARCH_HISI
142	help
143	  An implementation of the hi6220 mailbox. It is used to send message
144	  between application processors and MCU. Say Y here if you want to
145	  build Hi6220 mailbox controller driver.
146
147config MAILBOX_TEST
148	tristate "Mailbox Test Client"
149	depends on OF
150	depends on HAS_IOMEM
151	help
152	  Test client to help with testing new Controller driver
153	  implementations.
154
155config POLARFIRE_SOC_MAILBOX
156	tristate "PolarFire SoC (MPFS) Mailbox"
157	depends on HAS_IOMEM
158	depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST
159	help
160	  This driver adds support for the PolarFire SoC (MPFS) mailbox controller.
161
162	  To compile this driver as a module, choose M here. the
163	  module will be called mailbox-mpfs.
164
165	  If unsure, say N.
166
167config QCOM_APCS_IPC
168	tristate "Qualcomm APCS IPC driver"
169	depends on ARCH_QCOM || COMPILE_TEST
170	help
171	  Say y here to enable support for the APCS IPC mailbox driver,
172	  providing an interface for invoking the inter-process communication
173	  signals from the application processor to other masters.
174
175config TEGRA_HSP_MBOX
176	bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
177	depends on ARCH_TEGRA
178	help
179	  The Tegra HSP driver is used for the interprocessor communication
180	  between different remote processors and host processors on Tegra186
181	  and later SoCs. Say Y here if you want to have this support.
182	  If unsure say N.
183
184config XGENE_SLIMPRO_MBOX
185	tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
186	depends on ARCH_XGENE
187	help
188	  An implementation of the APM X-Gene Interprocessor Communication
189	  Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
190	  It is used to send short messages between ARM64-bit cores and
191	  the SLIMpro Management Engine, primarily for PM. Say Y here if you
192	  want to use the APM X-Gene SLIMpro IPCM support.
193
194config BCM_PDC_MBOX
195	tristate "Broadcom FlexSparx DMA Mailbox"
196	depends on ARCH_BCM_IPROC || COMPILE_TEST
197	help
198	  Mailbox implementation for the Broadcom FlexSparx DMA ring manager,
199	  which provides access to various offload engines on Broadcom
200	  SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.
201
202config BCM_FLEXRM_MBOX
203	tristate "Broadcom FlexRM Mailbox"
204	depends on ARM64
205	depends on ARCH_BCM_IPROC || COMPILE_TEST
206	select GENERIC_MSI_IRQ
207	default m if ARCH_BCM_IPROC
208	help
209	  Mailbox implementation of the Broadcom FlexRM ring manager,
210	  which provides access to various offload engines on Broadcom
211	  SoCs. Say Y here if you want to use the Broadcom FlexRM.
212
213config STM32_IPCC
214	tristate "STM32 IPCC Mailbox"
215	depends on MACH_STM32MP157 || COMPILE_TEST
216	help
217	  Mailbox implementation for STMicroelectonics STM32 family chips
218	  with hardware for Inter-Processor Communication Controller (IPCC)
219	  between processors. Say Y here if you want to have this support.
220
221config MTK_ADSP_MBOX
222	tristate "MediaTek ADSP Mailbox Controller"
223	depends on ARCH_MEDIATEK || COMPILE_TEST
224	help
225          Say yes here to add support for "MediaTek ADSP Mailbox Controller.
226          This mailbox driver is used to send notification or short message
227          between processors with ADSP. It will place the message to share
228	  buffer and will access the ipc control.
229
230config MTK_CMDQ_MBOX
231	tristate "MediaTek CMDQ Mailbox Support"
232	depends on ARCH_MEDIATEK || COMPILE_TEST
233	select MTK_INFRACFG
234	help
235	  Say yes here to add support for the MediaTek Command Queue (CMDQ)
236	  mailbox driver. The CMDQ is used to help read/write registers with
237	  critical time limitation, such as updating display configuration
238	  during the vblank.
239
240config ZYNQMP_IPI_MBOX
241	tristate "Xilinx ZynqMP IPI Mailbox"
242	depends on ARCH_ZYNQMP && OF
243	help
244	  Say yes here to add support for Xilinx IPI mailbox driver.
245	  This mailbox driver is used to send notification or short message
246	  between processors with Xilinx ZynqMP IPI. It will place the
247	  message to the IPI buffer and will access the IPI control
248	  registers to kick the other processor or enquire status.
249
250config SUN6I_MSGBOX
251	tristate "Allwinner sun6i/sun8i/sun9i/sun50i Message Box"
252	depends on ARCH_SUNXI || COMPILE_TEST
253	default ARCH_SUNXI
254	help
255	  Mailbox implementation for the hardware message box present in
256	  various Allwinner SoCs. This mailbox is used for communication
257	  between the application CPUs and the power management coprocessor.
258
259config SPRD_MBOX
260	tristate "Spreadtrum Mailbox"
261	depends on ARCH_SPRD || COMPILE_TEST
262	help
263	  Mailbox driver implementation for the Spreadtrum platform. It is used
264	  to send message between application processors and MCU. Say Y here if
265	  you want to build the Spreatrum mailbox controller driver.
266
267config QCOM_IPCC
268	tristate "Qualcomm Technologies, Inc. IPCC driver"
269	depends on ARCH_QCOM || COMPILE_TEST
270	help
271	  Qualcomm Technologies, Inc. Inter-Processor Communication Controller
272	  (IPCC) driver for MSM devices. The driver provides mailbox support for
273	  sending interrupts to the clients. On the other hand, the driver also
274	  acts as an interrupt controller for receiving interrupts from clients.
275	  Say Y here if you want to build this driver.
276
277endif
278