1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include <linux/string.h> 27 #include <linux/acpi.h> 28 #include <linux/version.h> 29 #include <linux/i2c.h> 30 31 #include <drm/drm_probe_helper.h> 32 #include <drm/amdgpu_drm.h> 33 #include <drm/drm_edid.h> 34 35 #include "dm_services.h" 36 #include "amdgpu.h" 37 #include "dc.h" 38 #include "amdgpu_dm.h" 39 #include "amdgpu_dm_irq.h" 40 #include "amdgpu_dm_mst_types.h" 41 42 #include "dm_helpers.h" 43 44 /* dm_helpers_parse_edid_caps 45 * 46 * Parse edid caps 47 * 48 * @edid: [in] pointer to edid 49 * edid_caps: [in] pointer to edid caps 50 * @return 51 * void 52 * */ 53 enum dc_edid_status dm_helpers_parse_edid_caps( 54 struct dc_context *ctx, 55 const struct dc_edid *edid, 56 struct dc_edid_caps *edid_caps) 57 { 58 struct edid *edid_buf = (struct edid *) edid->raw_edid; 59 struct cea_sad *sads; 60 int sad_count = -1; 61 int sadb_count = -1; 62 int i = 0; 63 int j = 0; 64 uint8_t *sadb = NULL; 65 66 enum dc_edid_status result = EDID_OK; 67 68 if (!edid_caps || !edid) 69 return EDID_BAD_INPUT; 70 71 if (!drm_edid_is_valid(edid_buf)) 72 result = EDID_BAD_CHECKSUM; 73 74 edid_caps->manufacturer_id = (uint16_t) edid_buf->mfg_id[0] | 75 ((uint16_t) edid_buf->mfg_id[1])<<8; 76 edid_caps->product_id = (uint16_t) edid_buf->prod_code[0] | 77 ((uint16_t) edid_buf->prod_code[1])<<8; 78 edid_caps->serial_number = edid_buf->serial; 79 edid_caps->manufacture_week = edid_buf->mfg_week; 80 edid_caps->manufacture_year = edid_buf->mfg_year; 81 82 /* One of the four detailed_timings stores the monitor name. It's 83 * stored in an array of length 13. */ 84 for (i = 0; i < 4; i++) { 85 if (edid_buf->detailed_timings[i].data.other_data.type == 0xfc) { 86 while (j < 13 && edid_buf->detailed_timings[i].data.other_data.data.str.str[j]) { 87 if (edid_buf->detailed_timings[i].data.other_data.data.str.str[j] == '\n') 88 break; 89 90 edid_caps->display_name[j] = 91 edid_buf->detailed_timings[i].data.other_data.data.str.str[j]; 92 j++; 93 } 94 } 95 } 96 97 edid_caps->edid_hdmi = drm_detect_hdmi_monitor( 98 (struct edid *) edid->raw_edid); 99 100 sad_count = drm_edid_to_sad((struct edid *) edid->raw_edid, &sads); 101 if (sad_count <= 0) 102 return result; 103 104 edid_caps->audio_mode_count = sad_count < DC_MAX_AUDIO_DESC_COUNT ? sad_count : DC_MAX_AUDIO_DESC_COUNT; 105 for (i = 0; i < edid_caps->audio_mode_count; ++i) { 106 struct cea_sad *sad = &sads[i]; 107 108 edid_caps->audio_modes[i].format_code = sad->format; 109 edid_caps->audio_modes[i].channel_count = sad->channels + 1; 110 edid_caps->audio_modes[i].sample_rate = sad->freq; 111 edid_caps->audio_modes[i].sample_size = sad->byte2; 112 } 113 114 sadb_count = drm_edid_to_speaker_allocation((struct edid *) edid->raw_edid, &sadb); 115 116 if (sadb_count < 0) { 117 DRM_ERROR("Couldn't read Speaker Allocation Data Block: %d\n", sadb_count); 118 sadb_count = 0; 119 } 120 121 if (sadb_count) 122 edid_caps->speaker_flags = sadb[0]; 123 else 124 edid_caps->speaker_flags = DEFAULT_SPEAKER_LOCATION; 125 126 kfree(sads); 127 kfree(sadb); 128 129 return result; 130 } 131 132 static void get_payload_table( 133 struct amdgpu_dm_connector *aconnector, 134 struct dp_mst_stream_allocation_table *proposed_table) 135 { 136 int i; 137 struct drm_dp_mst_topology_mgr *mst_mgr = 138 &aconnector->mst_port->mst_mgr; 139 140 mutex_lock(&mst_mgr->payload_lock); 141 142 proposed_table->stream_count = 0; 143 144 /* number of active streams */ 145 for (i = 0; i < mst_mgr->max_payloads; i++) { 146 if (mst_mgr->payloads[i].num_slots == 0) 147 break; /* end of vcp_id table */ 148 149 ASSERT(mst_mgr->payloads[i].payload_state != 150 DP_PAYLOAD_DELETE_LOCAL); 151 152 if (mst_mgr->payloads[i].payload_state == DP_PAYLOAD_LOCAL || 153 mst_mgr->payloads[i].payload_state == 154 DP_PAYLOAD_REMOTE) { 155 156 struct dp_mst_stream_allocation *sa = 157 &proposed_table->stream_allocations[ 158 proposed_table->stream_count]; 159 160 sa->slot_count = mst_mgr->payloads[i].num_slots; 161 sa->vcp_id = mst_mgr->proposed_vcpis[i]->vcpi; 162 proposed_table->stream_count++; 163 } 164 } 165 166 mutex_unlock(&mst_mgr->payload_lock); 167 } 168 169 void dm_helpers_dp_update_branch_info( 170 struct dc_context *ctx, 171 const struct dc_link *link) 172 {} 173 174 /* 175 * Writes payload allocation table in immediate downstream device. 176 */ 177 bool dm_helpers_dp_mst_write_payload_allocation_table( 178 struct dc_context *ctx, 179 const struct dc_stream_state *stream, 180 struct dp_mst_stream_allocation_table *proposed_table, 181 bool enable) 182 { 183 struct amdgpu_dm_connector *aconnector; 184 struct dm_connector_state *dm_conn_state; 185 struct drm_dp_mst_topology_mgr *mst_mgr; 186 struct drm_dp_mst_port *mst_port; 187 bool ret; 188 189 aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context; 190 /* Accessing the connector state is required for vcpi_slots allocation 191 * and directly relies on behaviour in commit check 192 * that blocks before commit guaranteeing that the state 193 * is not gonna be swapped while still in use in commit tail */ 194 195 if (!aconnector || !aconnector->mst_port) 196 return false; 197 198 dm_conn_state = to_dm_connector_state(aconnector->base.state); 199 200 mst_mgr = &aconnector->mst_port->mst_mgr; 201 202 if (!mst_mgr->mst_state) 203 return false; 204 205 mst_port = aconnector->port; 206 207 if (enable) { 208 209 ret = drm_dp_mst_allocate_vcpi(mst_mgr, mst_port, 210 dm_conn_state->pbn, 211 dm_conn_state->vcpi_slots); 212 if (!ret) 213 return false; 214 215 } else { 216 drm_dp_mst_reset_vcpi_slots(mst_mgr, mst_port); 217 } 218 219 /* It's OK for this to fail */ 220 drm_dp_update_payload_part1(mst_mgr); 221 222 /* mst_mgr->->payloads are VC payload notify MST branch using DPCD or 223 * AUX message. The sequence is slot 1-63 allocated sequence for each 224 * stream. AMD ASIC stream slot allocation should follow the same 225 * sequence. copy DRM MST allocation to dc */ 226 227 get_payload_table(aconnector, proposed_table); 228 229 return true; 230 } 231 232 /* 233 * poll pending down reply 234 */ 235 void dm_helpers_dp_mst_poll_pending_down_reply( 236 struct dc_context *ctx, 237 const struct dc_link *link) 238 {} 239 240 /* 241 * Clear payload allocation table before enable MST DP link. 242 */ 243 void dm_helpers_dp_mst_clear_payload_allocation_table( 244 struct dc_context *ctx, 245 const struct dc_link *link) 246 {} 247 248 /* 249 * Polls for ACT (allocation change trigger) handled and sends 250 * ALLOCATE_PAYLOAD message. 251 */ 252 enum act_return_status dm_helpers_dp_mst_poll_for_allocation_change_trigger( 253 struct dc_context *ctx, 254 const struct dc_stream_state *stream) 255 { 256 struct amdgpu_dm_connector *aconnector; 257 struct drm_dp_mst_topology_mgr *mst_mgr; 258 int ret; 259 260 aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context; 261 262 if (!aconnector || !aconnector->mst_port) 263 return ACT_FAILED; 264 265 mst_mgr = &aconnector->mst_port->mst_mgr; 266 267 if (!mst_mgr->mst_state) 268 return ACT_FAILED; 269 270 ret = drm_dp_check_act_status(mst_mgr); 271 272 if (ret) 273 return ACT_FAILED; 274 275 return ACT_SUCCESS; 276 } 277 278 bool dm_helpers_dp_mst_send_payload_allocation( 279 struct dc_context *ctx, 280 const struct dc_stream_state *stream, 281 bool enable) 282 { 283 struct amdgpu_dm_connector *aconnector; 284 struct drm_dp_mst_topology_mgr *mst_mgr; 285 struct drm_dp_mst_port *mst_port; 286 287 aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context; 288 289 if (!aconnector || !aconnector->mst_port) 290 return false; 291 292 mst_port = aconnector->port; 293 294 mst_mgr = &aconnector->mst_port->mst_mgr; 295 296 if (!mst_mgr->mst_state) 297 return false; 298 299 /* It's OK for this to fail */ 300 drm_dp_update_payload_part2(mst_mgr); 301 302 if (!enable) 303 drm_dp_mst_deallocate_vcpi(mst_mgr, mst_port); 304 305 return true; 306 } 307 308 void dm_dtn_log_begin(struct dc_context *ctx, 309 struct dc_log_buffer_ctx *log_ctx) 310 { 311 static const char msg[] = "[dtn begin]\n"; 312 313 if (!log_ctx) { 314 pr_info("%s", msg); 315 return; 316 } 317 318 dm_dtn_log_append_v(ctx, log_ctx, "%s", msg); 319 } 320 321 void dm_dtn_log_append_v(struct dc_context *ctx, 322 struct dc_log_buffer_ctx *log_ctx, 323 const char *msg, ...) 324 { 325 va_list args; 326 size_t total; 327 int n; 328 329 if (!log_ctx) { 330 /* No context, redirect to dmesg. */ 331 struct va_format vaf; 332 333 vaf.fmt = msg; 334 vaf.va = &args; 335 336 va_start(args, msg); 337 pr_info("%pV", &vaf); 338 va_end(args); 339 340 return; 341 } 342 343 /* Measure the output. */ 344 va_start(args, msg); 345 n = vsnprintf(NULL, 0, msg, args); 346 va_end(args); 347 348 if (n <= 0) 349 return; 350 351 /* Reallocate the string buffer as needed. */ 352 total = log_ctx->pos + n + 1; 353 354 if (total > log_ctx->size) { 355 char *buf = (char *)kvcalloc(total, sizeof(char), GFP_KERNEL); 356 357 if (buf) { 358 memcpy(buf, log_ctx->buf, log_ctx->pos); 359 kfree(log_ctx->buf); 360 361 log_ctx->buf = buf; 362 log_ctx->size = total; 363 } 364 } 365 366 if (!log_ctx->buf) 367 return; 368 369 /* Write the formatted string to the log buffer. */ 370 va_start(args, msg); 371 n = vscnprintf( 372 log_ctx->buf + log_ctx->pos, 373 log_ctx->size - log_ctx->pos, 374 msg, 375 args); 376 va_end(args); 377 378 if (n > 0) 379 log_ctx->pos += n; 380 } 381 382 void dm_dtn_log_end(struct dc_context *ctx, 383 struct dc_log_buffer_ctx *log_ctx) 384 { 385 static const char msg[] = "[dtn end]\n"; 386 387 if (!log_ctx) { 388 pr_info("%s", msg); 389 return; 390 } 391 392 dm_dtn_log_append_v(ctx, log_ctx, "%s", msg); 393 } 394 395 bool dm_helpers_dp_mst_start_top_mgr( 396 struct dc_context *ctx, 397 const struct dc_link *link, 398 bool boot) 399 { 400 struct amdgpu_dm_connector *aconnector = link->priv; 401 402 if (!aconnector) { 403 DRM_ERROR("Failed to find connector for link!"); 404 return false; 405 } 406 407 if (boot) { 408 DRM_INFO("DM_MST: Differing MST start on aconnector: %p [id: %d]\n", 409 aconnector, aconnector->base.base.id); 410 return true; 411 } 412 413 DRM_INFO("DM_MST: starting TM on aconnector: %p [id: %d]\n", 414 aconnector, aconnector->base.base.id); 415 416 return (drm_dp_mst_topology_mgr_set_mst(&aconnector->mst_mgr, true) == 0); 417 } 418 419 void dm_helpers_dp_mst_stop_top_mgr( 420 struct dc_context *ctx, 421 const struct dc_link *link) 422 { 423 struct amdgpu_dm_connector *aconnector = link->priv; 424 425 if (!aconnector) { 426 DRM_ERROR("Failed to find connector for link!"); 427 return; 428 } 429 430 DRM_INFO("DM_MST: stopping TM on aconnector: %p [id: %d]\n", 431 aconnector, aconnector->base.base.id); 432 433 if (aconnector->mst_mgr.mst_state == true) 434 drm_dp_mst_topology_mgr_set_mst(&aconnector->mst_mgr, false); 435 } 436 437 bool dm_helpers_dp_read_dpcd( 438 struct dc_context *ctx, 439 const struct dc_link *link, 440 uint32_t address, 441 uint8_t *data, 442 uint32_t size) 443 { 444 445 struct amdgpu_dm_connector *aconnector = link->priv; 446 447 if (!aconnector) { 448 DRM_ERROR("Failed to find connector for link!"); 449 return false; 450 } 451 452 return drm_dp_dpcd_read(&aconnector->dm_dp_aux.aux, address, 453 data, size) > 0; 454 } 455 456 bool dm_helpers_dp_write_dpcd( 457 struct dc_context *ctx, 458 const struct dc_link *link, 459 uint32_t address, 460 const uint8_t *data, 461 uint32_t size) 462 { 463 struct amdgpu_dm_connector *aconnector = link->priv; 464 465 if (!aconnector) { 466 DRM_ERROR("Failed to find connector for link!"); 467 return false; 468 } 469 470 return drm_dp_dpcd_write(&aconnector->dm_dp_aux.aux, 471 address, (uint8_t *)data, size) > 0; 472 } 473 474 bool dm_helpers_submit_i2c( 475 struct dc_context *ctx, 476 const struct dc_link *link, 477 struct i2c_command *cmd) 478 { 479 struct amdgpu_dm_connector *aconnector = link->priv; 480 struct i2c_msg *msgs; 481 int i = 0; 482 int num = cmd->number_of_payloads; 483 bool result; 484 485 if (!aconnector) { 486 DRM_ERROR("Failed to find connector for link!"); 487 return false; 488 } 489 490 msgs = kcalloc(num, sizeof(struct i2c_msg), GFP_KERNEL); 491 492 if (!msgs) 493 return false; 494 495 for (i = 0; i < num; i++) { 496 msgs[i].flags = cmd->payloads[i].write ? 0 : I2C_M_RD; 497 msgs[i].addr = cmd->payloads[i].address; 498 msgs[i].len = cmd->payloads[i].length; 499 msgs[i].buf = cmd->payloads[i].data; 500 } 501 502 result = i2c_transfer(&aconnector->i2c->base, msgs, num) == num; 503 504 kfree(msgs); 505 506 return result; 507 } 508 bool dm_helpers_dp_write_dsc_enable( 509 struct dc_context *ctx, 510 const struct dc_stream_state *stream, 511 bool enable 512 ) 513 { 514 uint8_t enable_dsc = enable ? 1 : 0; 515 struct amdgpu_dm_connector *aconnector; 516 517 if (!stream) 518 return false; 519 520 if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) { 521 aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context; 522 523 if (!aconnector->dsc_aux) 524 return false; 525 526 return (drm_dp_dpcd_write(aconnector->dsc_aux, DP_DSC_ENABLE, &enable_dsc, 1) >= 0); 527 } 528 529 if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT) 530 return dm_helpers_dp_write_dpcd(ctx, stream->link, DP_DSC_ENABLE, &enable_dsc, 1); 531 532 return false; 533 } 534 535 bool dm_helpers_is_dp_sink_present(struct dc_link *link) 536 { 537 bool dp_sink_present; 538 struct amdgpu_dm_connector *aconnector = link->priv; 539 540 if (!aconnector) { 541 BUG_ON("Failed to find connector for link!"); 542 return true; 543 } 544 545 mutex_lock(&aconnector->dm_dp_aux.aux.hw_mutex); 546 dp_sink_present = dc_link_is_dp_sink_present(link); 547 mutex_unlock(&aconnector->dm_dp_aux.aux.hw_mutex); 548 return dp_sink_present; 549 } 550 551 enum dc_edid_status dm_helpers_read_local_edid( 552 struct dc_context *ctx, 553 struct dc_link *link, 554 struct dc_sink *sink) 555 { 556 struct amdgpu_dm_connector *aconnector = link->priv; 557 struct i2c_adapter *ddc; 558 int retry = 3; 559 enum dc_edid_status edid_status; 560 struct edid *edid; 561 562 if (link->aux_mode) 563 ddc = &aconnector->dm_dp_aux.aux.ddc; 564 else 565 ddc = &aconnector->i2c->base; 566 567 /* some dongles read edid incorrectly the first time, 568 * do check sum and retry to make sure read correct edid. 569 */ 570 do { 571 572 edid = drm_get_edid(&aconnector->base, ddc); 573 574 if (!edid) 575 return EDID_NO_RESPONSE; 576 577 sink->dc_edid.length = EDID_LENGTH * (edid->extensions + 1); 578 memmove(sink->dc_edid.raw_edid, (uint8_t *)edid, sink->dc_edid.length); 579 580 /* We don't need the original edid anymore */ 581 kfree(edid); 582 583 /* connector->display_info will be parsed from EDID and saved 584 * into drm_connector->display_info from edid by call stack 585 * below: 586 * drm_parse_ycbcr420_deep_color_info 587 * drm_parse_hdmi_forum_vsdb 588 * drm_parse_cea_ext 589 * drm_add_display_info 590 * drm_connector_update_edid_property 591 * 592 * drm_connector->display_info will be used by amdgpu_dm funcs, 593 * like fill_stream_properties_from_drm_display_mode 594 */ 595 amdgpu_dm_update_connector_after_detect(aconnector); 596 597 edid_status = dm_helpers_parse_edid_caps( 598 ctx, 599 &sink->dc_edid, 600 &sink->edid_caps); 601 602 } while (edid_status == EDID_BAD_CHECKSUM && --retry > 0); 603 604 if (edid_status != EDID_OK) 605 DRM_ERROR("EDID err: %d, on connector: %s", 606 edid_status, 607 aconnector->base.name); 608 if (link->aux_mode) { 609 union test_request test_request = { {0} }; 610 union test_response test_response = { {0} }; 611 612 dm_helpers_dp_read_dpcd(ctx, 613 link, 614 DP_TEST_REQUEST, 615 &test_request.raw, 616 sizeof(union test_request)); 617 618 if (!test_request.bits.EDID_READ) 619 return edid_status; 620 621 test_response.bits.EDID_CHECKSUM_WRITE = 1; 622 623 dm_helpers_dp_write_dpcd(ctx, 624 link, 625 DP_TEST_EDID_CHECKSUM, 626 &sink->dc_edid.raw_edid[sink->dc_edid.length-1], 627 1); 628 629 dm_helpers_dp_write_dpcd(ctx, 630 link, 631 DP_TEST_RESPONSE, 632 &test_response.raw, 633 sizeof(test_response)); 634 635 } 636 637 return edid_status; 638 } 639 640 void dm_set_dcn_clocks(struct dc_context *ctx, struct dc_clocks *clks) 641 { 642 /* TODO: something */ 643 } 644