1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others. 7 * Copyright (C) 2005, 2006 by Ralf Baechle ([email protected]) 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 9 * Copyright (C) 2004 Thiemo Seufer 10 * Copyright (C) 2013 Imagination Technologies Ltd. 11 */ 12 #include <linux/cpu.h> 13 #include <linux/errno.h> 14 #include <linux/init.h> 15 #include <linux/kallsyms.h> 16 #include <linux/kernel.h> 17 #include <linux/nmi.h> 18 #include <linux/personality.h> 19 #include <linux/prctl.h> 20 #include <linux/random.h> 21 #include <linux/sched.h> 22 #include <linux/sched/debug.h> 23 #include <linux/sched/task_stack.h> 24 25 #include <asm/abi.h> 26 #include <asm/asm.h> 27 #include <asm/dsemul.h> 28 #include <asm/dsp.h> 29 #include <asm/fpu.h> 30 #include <asm/inst.h> 31 #include <asm/irq.h> 32 #include <asm/irq_regs.h> 33 #include <asm/isadep.h> 34 #include <asm/msa.h> 35 #include <asm/mips-cps.h> 36 #include <asm/mipsregs.h> 37 #include <asm/processor.h> 38 #include <asm/reg.h> 39 40 #ifdef CONFIG_HOTPLUG_CPU 41 void arch_cpu_idle_dead(void) 42 { 43 play_dead(); 44 } 45 #endif 46 47 asmlinkage void ret_from_fork(void); 48 asmlinkage void ret_from_kernel_thread(void); 49 50 void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp) 51 { 52 unsigned long status; 53 54 /* New thread loses kernel privileges. */ 55 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_CU2|ST0_FR|KU_MASK); 56 status |= KU_USER; 57 regs->cp0_status = status; 58 lose_fpu(0); 59 clear_thread_flag(TIF_MSA_CTX_LIVE); 60 clear_used_math(); 61 #ifdef CONFIG_MIPS_FP_SUPPORT 62 atomic_set(¤t->thread.bd_emu_frame, BD_EMUFRAME_NONE); 63 #endif 64 init_dsp(); 65 regs->cp0_epc = pc; 66 regs->regs[29] = sp; 67 } 68 69 void exit_thread(struct task_struct *tsk) 70 { 71 /* 72 * User threads may have allocated a delay slot emulation frame. 73 * If so, clean up that allocation. 74 */ 75 if (!(current->flags & PF_KTHREAD)) 76 dsemul_thread_cleanup(tsk); 77 } 78 79 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 80 { 81 /* 82 * Save any process state which is live in hardware registers to the 83 * parent context prior to duplication. This prevents the new child 84 * state becoming stale if the parent is preempted before copy_thread() 85 * gets a chance to save the parent's live hardware registers to the 86 * child context. 87 */ 88 preempt_disable(); 89 90 if (is_msa_enabled()) 91 save_msa(current); 92 else if (is_fpu_owner()) 93 _save_fp(current); 94 95 save_dsp(current); 96 97 preempt_enable(); 98 99 *dst = *src; 100 return 0; 101 } 102 103 /* 104 * Copy architecture-specific thread state 105 */ 106 int copy_thread(unsigned long clone_flags, unsigned long usp, 107 unsigned long kthread_arg, struct task_struct *p, 108 unsigned long tls) 109 { 110 struct thread_info *ti = task_thread_info(p); 111 struct pt_regs *childregs, *regs = current_pt_regs(); 112 unsigned long childksp; 113 114 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32; 115 116 /* set up new TSS. */ 117 childregs = (struct pt_regs *) childksp - 1; 118 /* Put the stack after the struct pt_regs. */ 119 childksp = (unsigned long) childregs; 120 p->thread.cp0_status = (read_c0_status() & ~(ST0_CU2|ST0_CU1)) | ST0_KERNEL_CUMASK; 121 if (unlikely(p->flags & PF_KTHREAD)) { 122 /* kernel thread */ 123 unsigned long status = p->thread.cp0_status; 124 memset(childregs, 0, sizeof(struct pt_regs)); 125 ti->addr_limit = KERNEL_DS; 126 p->thread.reg16 = usp; /* fn */ 127 p->thread.reg17 = kthread_arg; 128 p->thread.reg29 = childksp; 129 p->thread.reg31 = (unsigned long) ret_from_kernel_thread; 130 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) 131 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) | 132 ((status & (ST0_KUC | ST0_IEC)) << 2); 133 #else 134 status |= ST0_EXL; 135 #endif 136 childregs->cp0_status = status; 137 return 0; 138 } 139 140 /* user thread */ 141 *childregs = *regs; 142 childregs->regs[7] = 0; /* Clear error flag */ 143 childregs->regs[2] = 0; /* Child gets zero as return value */ 144 if (usp) 145 childregs->regs[29] = usp; 146 ti->addr_limit = USER_DS; 147 148 p->thread.reg29 = (unsigned long) childregs; 149 p->thread.reg31 = (unsigned long) ret_from_fork; 150 151 /* 152 * New tasks lose permission to use the fpu. This accelerates context 153 * switching for most programs since they don't use the fpu. 154 */ 155 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1); 156 157 clear_tsk_thread_flag(p, TIF_USEDFPU); 158 clear_tsk_thread_flag(p, TIF_USEDMSA); 159 clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE); 160 161 #ifdef CONFIG_MIPS_MT_FPAFF 162 clear_tsk_thread_flag(p, TIF_FPUBOUND); 163 #endif /* CONFIG_MIPS_MT_FPAFF */ 164 165 #ifdef CONFIG_MIPS_FP_SUPPORT 166 atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE); 167 #endif 168 169 if (clone_flags & CLONE_SETTLS) 170 ti->tp_value = tls; 171 172 return 0; 173 } 174 175 #ifdef CONFIG_STACKPROTECTOR 176 #include <linux/stackprotector.h> 177 unsigned long __stack_chk_guard __read_mostly; 178 EXPORT_SYMBOL(__stack_chk_guard); 179 #endif 180 181 struct mips_frame_info { 182 void *func; 183 unsigned long func_size; 184 int frame_size; 185 int pc_offset; 186 }; 187 188 #define J_TARGET(pc,target) \ 189 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2)) 190 191 static inline int is_ra_save_ins(union mips_instruction *ip, int *poff) 192 { 193 #ifdef CONFIG_CPU_MICROMIPS 194 /* 195 * swsp ra,offset 196 * swm16 reglist,offset(sp) 197 * swm32 reglist,offset(sp) 198 * sw32 ra,offset(sp) 199 * jradiussp - NOT SUPPORTED 200 * 201 * microMIPS is way more fun... 202 */ 203 if (mm_insn_16bit(ip->word >> 16)) { 204 switch (ip->mm16_r5_format.opcode) { 205 case mm_swsp16_op: 206 if (ip->mm16_r5_format.rt != 31) 207 return 0; 208 209 *poff = ip->mm16_r5_format.imm; 210 *poff = (*poff << 2) / sizeof(ulong); 211 return 1; 212 213 case mm_pool16c_op: 214 switch (ip->mm16_m_format.func) { 215 case mm_swm16_op: 216 *poff = ip->mm16_m_format.imm; 217 *poff += 1 + ip->mm16_m_format.rlist; 218 *poff = (*poff << 2) / sizeof(ulong); 219 return 1; 220 221 default: 222 return 0; 223 } 224 225 default: 226 return 0; 227 } 228 } 229 230 switch (ip->i_format.opcode) { 231 case mm_sw32_op: 232 if (ip->i_format.rs != 29) 233 return 0; 234 if (ip->i_format.rt != 31) 235 return 0; 236 237 *poff = ip->i_format.simmediate / sizeof(ulong); 238 return 1; 239 240 case mm_pool32b_op: 241 switch (ip->mm_m_format.func) { 242 case mm_swm32_func: 243 if (ip->mm_m_format.rd < 0x10) 244 return 0; 245 if (ip->mm_m_format.base != 29) 246 return 0; 247 248 *poff = ip->mm_m_format.simmediate; 249 *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32); 250 *poff /= sizeof(ulong); 251 return 1; 252 default: 253 return 0; 254 } 255 256 default: 257 return 0; 258 } 259 #else 260 /* sw / sd $ra, offset($sp) */ 261 if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) && 262 ip->i_format.rs == 29 && ip->i_format.rt == 31) { 263 *poff = ip->i_format.simmediate / sizeof(ulong); 264 return 1; 265 } 266 #ifdef CONFIG_CPU_LOONGSON64 267 if ((ip->loongson3_lswc2_format.opcode == swc2_op) && 268 (ip->loongson3_lswc2_format.ls == 1) && 269 (ip->loongson3_lswc2_format.fr == 0) && 270 (ip->loongson3_lswc2_format.base == 29)) { 271 if (ip->loongson3_lswc2_format.rt == 31) { 272 *poff = ip->loongson3_lswc2_format.offset << 1; 273 return 1; 274 } 275 if (ip->loongson3_lswc2_format.rq == 31) { 276 *poff = (ip->loongson3_lswc2_format.offset << 1) + 1; 277 return 1; 278 } 279 } 280 #endif 281 return 0; 282 #endif 283 } 284 285 static inline int is_jump_ins(union mips_instruction *ip) 286 { 287 #ifdef CONFIG_CPU_MICROMIPS 288 /* 289 * jr16,jrc,jalr16,jalr16 290 * jal 291 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb 292 * jraddiusp - NOT SUPPORTED 293 * 294 * microMIPS is kind of more fun... 295 */ 296 if (mm_insn_16bit(ip->word >> 16)) { 297 if ((ip->mm16_r5_format.opcode == mm_pool16c_op && 298 (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op)) 299 return 1; 300 return 0; 301 } 302 303 if (ip->j_format.opcode == mm_j32_op) 304 return 1; 305 if (ip->j_format.opcode == mm_jal32_op) 306 return 1; 307 if (ip->r_format.opcode != mm_pool32a_op || 308 ip->r_format.func != mm_pool32axf_op) 309 return 0; 310 return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op; 311 #else 312 if (ip->j_format.opcode == j_op) 313 return 1; 314 if (ip->j_format.opcode == jal_op) 315 return 1; 316 if (ip->r_format.opcode != spec_op) 317 return 0; 318 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op; 319 #endif 320 } 321 322 static inline int is_sp_move_ins(union mips_instruction *ip, int *frame_size) 323 { 324 #ifdef CONFIG_CPU_MICROMIPS 325 unsigned short tmp; 326 327 /* 328 * addiusp -imm 329 * addius5 sp,-imm 330 * addiu32 sp,sp,-imm 331 * jradiussp - NOT SUPPORTED 332 * 333 * microMIPS is not more fun... 334 */ 335 if (mm_insn_16bit(ip->word >> 16)) { 336 if (ip->mm16_r3_format.opcode == mm_pool16d_op && 337 ip->mm16_r3_format.simmediate & mm_addiusp_func) { 338 tmp = ip->mm_b0_format.simmediate >> 1; 339 tmp = ((tmp & 0x1ff) ^ 0x100) - 0x100; 340 if ((tmp + 2) < 4) /* 0x0,0x1,0x1fe,0x1ff are special */ 341 tmp ^= 0x100; 342 *frame_size = -(signed short)(tmp << 2); 343 return 1; 344 } 345 if (ip->mm16_r5_format.opcode == mm_pool16d_op && 346 ip->mm16_r5_format.rt == 29) { 347 tmp = ip->mm16_r5_format.imm >> 1; 348 *frame_size = -(signed short)(tmp & 0xf); 349 return 1; 350 } 351 return 0; 352 } 353 354 if (ip->mm_i_format.opcode == mm_addiu32_op && 355 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29) { 356 *frame_size = -ip->i_format.simmediate; 357 return 1; 358 } 359 #else 360 /* addiu/daddiu sp,sp,-imm */ 361 if (ip->i_format.rs != 29 || ip->i_format.rt != 29) 362 return 0; 363 364 if (ip->i_format.opcode == addiu_op || 365 ip->i_format.opcode == daddiu_op) { 366 *frame_size = -ip->i_format.simmediate; 367 return 1; 368 } 369 #endif 370 return 0; 371 } 372 373 static int get_frame_info(struct mips_frame_info *info) 374 { 375 bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS); 376 union mips_instruction insn, *ip; 377 const unsigned int max_insns = 128; 378 unsigned int last_insn_size = 0; 379 unsigned int i; 380 bool saw_jump = false; 381 382 info->pc_offset = -1; 383 info->frame_size = 0; 384 385 ip = (void *)msk_isa16_mode((ulong)info->func); 386 if (!ip) 387 goto err; 388 389 for (i = 0; i < max_insns; i++) { 390 ip = (void *)ip + last_insn_size; 391 392 if (is_mmips && mm_insn_16bit(ip->halfword[0])) { 393 insn.word = ip->halfword[0] << 16; 394 last_insn_size = 2; 395 } else if (is_mmips) { 396 insn.word = ip->halfword[0] << 16 | ip->halfword[1]; 397 last_insn_size = 4; 398 } else { 399 insn.word = ip->word; 400 last_insn_size = 4; 401 } 402 403 if (!info->frame_size) { 404 is_sp_move_ins(&insn, &info->frame_size); 405 continue; 406 } else if (!saw_jump && is_jump_ins(ip)) { 407 /* 408 * If we see a jump instruction, we are finished 409 * with the frame save. 410 * 411 * Some functions can have a shortcut return at 412 * the beginning of the function, so don't start 413 * looking for jump instruction until we see the 414 * frame setup. 415 * 416 * The RA save instruction can get put into the 417 * delay slot of the jump instruction, so look 418 * at the next instruction, too. 419 */ 420 saw_jump = true; 421 continue; 422 } 423 if (info->pc_offset == -1 && 424 is_ra_save_ins(&insn, &info->pc_offset)) 425 break; 426 if (saw_jump) 427 break; 428 } 429 if (info->frame_size && info->pc_offset >= 0) /* nested */ 430 return 0; 431 if (info->pc_offset < 0) /* leaf */ 432 return 1; 433 /* prologue seems bogus... */ 434 err: 435 return -1; 436 } 437 438 static struct mips_frame_info schedule_mfi __read_mostly; 439 440 #ifdef CONFIG_KALLSYMS 441 static unsigned long get___schedule_addr(void) 442 { 443 return kallsyms_lookup_name("__schedule"); 444 } 445 #else 446 static unsigned long get___schedule_addr(void) 447 { 448 union mips_instruction *ip = (void *)schedule; 449 int max_insns = 8; 450 int i; 451 452 for (i = 0; i < max_insns; i++, ip++) { 453 if (ip->j_format.opcode == j_op) 454 return J_TARGET(ip, ip->j_format.target); 455 } 456 return 0; 457 } 458 #endif 459 460 static int __init frame_info_init(void) 461 { 462 unsigned long size = 0; 463 #ifdef CONFIG_KALLSYMS 464 unsigned long ofs; 465 #endif 466 unsigned long addr; 467 468 addr = get___schedule_addr(); 469 if (!addr) 470 addr = (unsigned long)schedule; 471 472 #ifdef CONFIG_KALLSYMS 473 kallsyms_lookup_size_offset(addr, &size, &ofs); 474 #endif 475 schedule_mfi.func = (void *)addr; 476 schedule_mfi.func_size = size; 477 478 get_frame_info(&schedule_mfi); 479 480 /* 481 * Without schedule() frame info, result given by 482 * thread_saved_pc() and get_wchan() are not reliable. 483 */ 484 if (schedule_mfi.pc_offset < 0) 485 printk("Can't analyze schedule() prologue at %p\n", schedule); 486 487 return 0; 488 } 489 490 arch_initcall(frame_info_init); 491 492 /* 493 * Return saved PC of a blocked thread. 494 */ 495 static unsigned long thread_saved_pc(struct task_struct *tsk) 496 { 497 struct thread_struct *t = &tsk->thread; 498 499 /* New born processes are a special case */ 500 if (t->reg31 == (unsigned long) ret_from_fork) 501 return t->reg31; 502 if (schedule_mfi.pc_offset < 0) 503 return 0; 504 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset]; 505 } 506 507 508 #ifdef CONFIG_KALLSYMS 509 /* generic stack unwinding function */ 510 unsigned long notrace unwind_stack_by_address(unsigned long stack_page, 511 unsigned long *sp, 512 unsigned long pc, 513 unsigned long *ra) 514 { 515 unsigned long low, high, irq_stack_high; 516 struct mips_frame_info info; 517 unsigned long size, ofs; 518 struct pt_regs *regs; 519 int leaf; 520 521 if (!stack_page) 522 return 0; 523 524 /* 525 * IRQ stacks start at IRQ_STACK_START 526 * task stacks at THREAD_SIZE - 32 527 */ 528 low = stack_page; 529 if (!preemptible() && on_irq_stack(raw_smp_processor_id(), *sp)) { 530 high = stack_page + IRQ_STACK_START; 531 irq_stack_high = high; 532 } else { 533 high = stack_page + THREAD_SIZE - 32; 534 irq_stack_high = 0; 535 } 536 537 /* 538 * If we reached the top of the interrupt stack, start unwinding 539 * the interrupted task stack. 540 */ 541 if (unlikely(*sp == irq_stack_high)) { 542 unsigned long task_sp = *(unsigned long *)*sp; 543 544 /* 545 * Check that the pointer saved in the IRQ stack head points to 546 * something within the stack of the current task 547 */ 548 if (!object_is_on_stack((void *)task_sp)) 549 return 0; 550 551 /* 552 * Follow pointer to tasks kernel stack frame where interrupted 553 * state was saved. 554 */ 555 regs = (struct pt_regs *)task_sp; 556 pc = regs->cp0_epc; 557 if (!user_mode(regs) && __kernel_text_address(pc)) { 558 *sp = regs->regs[29]; 559 *ra = regs->regs[31]; 560 return pc; 561 } 562 return 0; 563 } 564 if (!kallsyms_lookup_size_offset(pc, &size, &ofs)) 565 return 0; 566 /* 567 * Return ra if an exception occurred at the first instruction 568 */ 569 if (unlikely(ofs == 0)) { 570 pc = *ra; 571 *ra = 0; 572 return pc; 573 } 574 575 info.func = (void *)(pc - ofs); 576 info.func_size = ofs; /* analyze from start to ofs */ 577 leaf = get_frame_info(&info); 578 if (leaf < 0) 579 return 0; 580 581 if (*sp < low || *sp + info.frame_size > high) 582 return 0; 583 584 if (leaf) 585 /* 586 * For some extreme cases, get_frame_info() can 587 * consider wrongly a nested function as a leaf 588 * one. In that cases avoid to return always the 589 * same value. 590 */ 591 pc = pc != *ra ? *ra : 0; 592 else 593 pc = ((unsigned long *)(*sp))[info.pc_offset]; 594 595 *sp += info.frame_size; 596 *ra = 0; 597 return __kernel_text_address(pc) ? pc : 0; 598 } 599 EXPORT_SYMBOL(unwind_stack_by_address); 600 601 /* used by show_backtrace() */ 602 unsigned long unwind_stack(struct task_struct *task, unsigned long *sp, 603 unsigned long pc, unsigned long *ra) 604 { 605 unsigned long stack_page = 0; 606 int cpu; 607 608 for_each_possible_cpu(cpu) { 609 if (on_irq_stack(cpu, *sp)) { 610 stack_page = (unsigned long)irq_stack[cpu]; 611 break; 612 } 613 } 614 615 if (!stack_page) 616 stack_page = (unsigned long)task_stack_page(task); 617 618 return unwind_stack_by_address(stack_page, sp, pc, ra); 619 } 620 #endif 621 622 /* 623 * get_wchan - a maintenance nightmare^W^Wpain in the ass ... 624 */ 625 unsigned long get_wchan(struct task_struct *task) 626 { 627 unsigned long pc = 0; 628 #ifdef CONFIG_KALLSYMS 629 unsigned long sp; 630 unsigned long ra = 0; 631 #endif 632 633 if (!task || task == current || task->state == TASK_RUNNING) 634 goto out; 635 if (!task_stack_page(task)) 636 goto out; 637 638 pc = thread_saved_pc(task); 639 640 #ifdef CONFIG_KALLSYMS 641 sp = task->thread.reg29 + schedule_mfi.frame_size; 642 643 while (in_sched_functions(pc)) 644 pc = unwind_stack(task, &sp, pc, &ra); 645 #endif 646 647 out: 648 return pc; 649 } 650 651 unsigned long mips_stack_top(void) 652 { 653 unsigned long top = TASK_SIZE & PAGE_MASK; 654 655 if (IS_ENABLED(CONFIG_MIPS_FP_SUPPORT)) { 656 /* One page for branch delay slot "emulation" */ 657 top -= PAGE_SIZE; 658 } 659 660 /* Space for the VDSO, data page & GIC user page */ 661 top -= PAGE_ALIGN(current->thread.abi->vdso->size); 662 top -= PAGE_SIZE; 663 top -= mips_gic_present() ? PAGE_SIZE : 0; 664 665 /* Space for cache colour alignment */ 666 if (cpu_has_dc_aliases) 667 top -= shm_align_mask + 1; 668 669 /* Space to randomize the VDSO base */ 670 if (current->flags & PF_RANDOMIZE) 671 top -= VDSO_RANDOMIZE_SIZE; 672 673 return top; 674 } 675 676 /* 677 * Don't forget that the stack pointer must be aligned on a 8 bytes 678 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI. 679 */ 680 unsigned long arch_align_stack(unsigned long sp) 681 { 682 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 683 sp -= get_random_int() & ~PAGE_MASK; 684 685 return sp & ALMASK; 686 } 687 688 static struct cpumask backtrace_csd_busy; 689 690 static void handle_backtrace(void *info) 691 { 692 nmi_cpu_backtrace(get_irq_regs()); 693 cpumask_clear_cpu(smp_processor_id(), &backtrace_csd_busy); 694 } 695 696 static DEFINE_PER_CPU(call_single_data_t, backtrace_csd) = 697 CSD_INIT(handle_backtrace, NULL); 698 699 static void raise_backtrace(cpumask_t *mask) 700 { 701 call_single_data_t *csd; 702 int cpu; 703 704 for_each_cpu(cpu, mask) { 705 /* 706 * If we previously sent an IPI to the target CPU & it hasn't 707 * cleared its bit in the busy cpumask then it didn't handle 708 * our previous IPI & it's not safe for us to reuse the 709 * call_single_data_t. 710 */ 711 if (cpumask_test_and_set_cpu(cpu, &backtrace_csd_busy)) { 712 pr_warn("Unable to send backtrace IPI to CPU%u - perhaps it hung?\n", 713 cpu); 714 continue; 715 } 716 717 csd = &per_cpu(backtrace_csd, cpu); 718 smp_call_function_single_async(cpu, csd); 719 } 720 } 721 722 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self) 723 { 724 nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_backtrace); 725 } 726 727 int mips_get_process_fp_mode(struct task_struct *task) 728 { 729 int value = 0; 730 731 if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS)) 732 value |= PR_FP_MODE_FR; 733 if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS)) 734 value |= PR_FP_MODE_FRE; 735 736 return value; 737 } 738 739 static long prepare_for_fp_mode_switch(void *unused) 740 { 741 /* 742 * This is icky, but we use this to simply ensure that all CPUs have 743 * context switched, regardless of whether they were previously running 744 * kernel or user code. This ensures that no CPU that a mode-switching 745 * program may execute on keeps its FPU enabled (& in the old mode) 746 * throughout the mode switch. 747 */ 748 return 0; 749 } 750 751 int mips_set_process_fp_mode(struct task_struct *task, unsigned int value) 752 { 753 const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE; 754 struct task_struct *t; 755 struct cpumask process_cpus; 756 int cpu; 757 758 /* If nothing to change, return right away, successfully. */ 759 if (value == mips_get_process_fp_mode(task)) 760 return 0; 761 762 /* Only accept a mode change if 64-bit FP enabled for o32. */ 763 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT)) 764 return -EOPNOTSUPP; 765 766 /* And only for o32 tasks. */ 767 if (IS_ENABLED(CONFIG_64BIT) && !test_thread_flag(TIF_32BIT_REGS)) 768 return -EOPNOTSUPP; 769 770 /* Check the value is valid */ 771 if (value & ~known_bits) 772 return -EOPNOTSUPP; 773 774 /* Setting FRE without FR is not supported. */ 775 if ((value & (PR_FP_MODE_FR | PR_FP_MODE_FRE)) == PR_FP_MODE_FRE) 776 return -EOPNOTSUPP; 777 778 /* Avoid inadvertently triggering emulation */ 779 if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu && 780 !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64)) 781 return -EOPNOTSUPP; 782 if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre) 783 return -EOPNOTSUPP; 784 785 /* FR = 0 not supported in MIPS R6 */ 786 if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6) 787 return -EOPNOTSUPP; 788 789 /* Indicate the new FP mode in each thread */ 790 for_each_thread(task, t) { 791 /* Update desired FP register width */ 792 if (value & PR_FP_MODE_FR) { 793 clear_tsk_thread_flag(t, TIF_32BIT_FPREGS); 794 } else { 795 set_tsk_thread_flag(t, TIF_32BIT_FPREGS); 796 clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE); 797 } 798 799 /* Update desired FP single layout */ 800 if (value & PR_FP_MODE_FRE) 801 set_tsk_thread_flag(t, TIF_HYBRID_FPREGS); 802 else 803 clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS); 804 } 805 806 /* 807 * We need to ensure that all threads in the process have switched mode 808 * before returning, in order to allow userland to not worry about 809 * races. We can do this by forcing all CPUs that any thread in the 810 * process may be running on to schedule something else - in this case 811 * prepare_for_fp_mode_switch(). 812 * 813 * We begin by generating a mask of all CPUs that any thread in the 814 * process may be running on. 815 */ 816 cpumask_clear(&process_cpus); 817 for_each_thread(task, t) 818 cpumask_set_cpu(task_cpu(t), &process_cpus); 819 820 /* 821 * Now we schedule prepare_for_fp_mode_switch() on each of those CPUs. 822 * 823 * The CPUs may have rescheduled already since we switched mode or 824 * generated the cpumask, but that doesn't matter. If the task in this 825 * process is scheduled out then our scheduling 826 * prepare_for_fp_mode_switch() will simply be redundant. If it's 827 * scheduled in then it will already have picked up the new FP mode 828 * whilst doing so. 829 */ 830 get_online_cpus(); 831 for_each_cpu_and(cpu, &process_cpus, cpu_online_mask) 832 work_on_cpu(cpu, prepare_for_fp_mode_switch, NULL); 833 put_online_cpus(); 834 835 return 0; 836 } 837 838 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32) 839 void mips_dump_regs32(u32 *uregs, const struct pt_regs *regs) 840 { 841 unsigned int i; 842 843 for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) { 844 /* k0/k1 are copied as zero. */ 845 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27) 846 uregs[i] = 0; 847 else 848 uregs[i] = regs->regs[i - MIPS32_EF_R0]; 849 } 850 851 uregs[MIPS32_EF_LO] = regs->lo; 852 uregs[MIPS32_EF_HI] = regs->hi; 853 uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc; 854 uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr; 855 uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status; 856 uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause; 857 } 858 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */ 859 860 #ifdef CONFIG_64BIT 861 void mips_dump_regs64(u64 *uregs, const struct pt_regs *regs) 862 { 863 unsigned int i; 864 865 for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) { 866 /* k0/k1 are copied as zero. */ 867 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27) 868 uregs[i] = 0; 869 else 870 uregs[i] = regs->regs[i - MIPS64_EF_R0]; 871 } 872 873 uregs[MIPS64_EF_LO] = regs->lo; 874 uregs[MIPS64_EF_HI] = regs->hi; 875 uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc; 876 uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr; 877 uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status; 878 uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause; 879 } 880 #endif /* CONFIG_64BIT */ 881