1 /* 2 * Copyright (C) 2007-2009 Michal Simek <[email protected]> 3 * Copyright (C) 2007-2009 PetaLogix 4 * Copyright (C) 2006 Atmark Techno, Inc. 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 11 #include <linux/init.h> 12 #include <linux/kernel.h> 13 #include <linux/param.h> 14 #include <linux/interrupt.h> 15 #include <linux/profile.h> 16 #include <linux/irq.h> 17 #include <linux/delay.h> 18 #include <linux/sched.h> 19 #include <linux/spinlock.h> 20 #include <linux/err.h> 21 #include <linux/clk.h> 22 #include <linux/clocksource.h> 23 #include <linux/clockchips.h> 24 #include <linux/io.h> 25 #include <linux/of_address.h> 26 #include <linux/bug.h> 27 #include <asm/cpuinfo.h> 28 #include <asm/setup.h> 29 #include <asm/prom.h> 30 #include <asm/irq.h> 31 #include <linux/cnt32_to_63.h> 32 33 static void __iomem *timer_baseaddr; 34 35 static unsigned int freq_div_hz; 36 static unsigned int timer_clock_freq; 37 38 #define TCSR0 (0x00) 39 #define TLR0 (0x04) 40 #define TCR0 (0x08) 41 #define TCSR1 (0x10) 42 #define TLR1 (0x14) 43 #define TCR1 (0x18) 44 45 #define TCSR_MDT (1<<0) 46 #define TCSR_UDT (1<<1) 47 #define TCSR_GENT (1<<2) 48 #define TCSR_CAPT (1<<3) 49 #define TCSR_ARHT (1<<4) 50 #define TCSR_LOAD (1<<5) 51 #define TCSR_ENIT (1<<6) 52 #define TCSR_ENT (1<<7) 53 #define TCSR_TINT (1<<8) 54 #define TCSR_PWMA (1<<9) 55 #define TCSR_ENALL (1<<10) 56 57 static inline void microblaze_timer0_stop(void) 58 { 59 out_be32(timer_baseaddr + TCSR0, 60 in_be32(timer_baseaddr + TCSR0) & ~TCSR_ENT); 61 } 62 63 static inline void microblaze_timer0_start_periodic(unsigned long load_val) 64 { 65 if (!load_val) 66 load_val = 1; 67 /* loading value to timer reg */ 68 out_be32(timer_baseaddr + TLR0, load_val); 69 70 /* load the initial value */ 71 out_be32(timer_baseaddr + TCSR0, TCSR_LOAD); 72 73 /* see timer data sheet for detail 74 * !ENALL - don't enable 'em all 75 * !PWMA - disable pwm 76 * TINT - clear interrupt status 77 * ENT- enable timer itself 78 * ENIT - enable interrupt 79 * !LOAD - clear the bit to let go 80 * ARHT - auto reload 81 * !CAPT - no external trigger 82 * !GENT - no external signal 83 * UDT - set the timer as down counter 84 * !MDT0 - generate mode 85 */ 86 out_be32(timer_baseaddr + TCSR0, 87 TCSR_TINT|TCSR_ENIT|TCSR_ENT|TCSR_ARHT|TCSR_UDT); 88 } 89 90 static inline void microblaze_timer0_start_oneshot(unsigned long load_val) 91 { 92 if (!load_val) 93 load_val = 1; 94 /* loading value to timer reg */ 95 out_be32(timer_baseaddr + TLR0, load_val); 96 97 /* load the initial value */ 98 out_be32(timer_baseaddr + TCSR0, TCSR_LOAD); 99 100 out_be32(timer_baseaddr + TCSR0, 101 TCSR_TINT|TCSR_ENIT|TCSR_ENT|TCSR_ARHT|TCSR_UDT); 102 } 103 104 static int microblaze_timer_set_next_event(unsigned long delta, 105 struct clock_event_device *dev) 106 { 107 pr_debug("%s: next event, delta %x\n", __func__, (u32)delta); 108 microblaze_timer0_start_oneshot(delta); 109 return 0; 110 } 111 112 static void microblaze_timer_set_mode(enum clock_event_mode mode, 113 struct clock_event_device *evt) 114 { 115 switch (mode) { 116 case CLOCK_EVT_MODE_PERIODIC: 117 pr_info("%s: periodic\n", __func__); 118 microblaze_timer0_start_periodic(freq_div_hz); 119 break; 120 case CLOCK_EVT_MODE_ONESHOT: 121 pr_info("%s: oneshot\n", __func__); 122 break; 123 case CLOCK_EVT_MODE_UNUSED: 124 pr_info("%s: unused\n", __func__); 125 break; 126 case CLOCK_EVT_MODE_SHUTDOWN: 127 pr_info("%s: shutdown\n", __func__); 128 microblaze_timer0_stop(); 129 break; 130 case CLOCK_EVT_MODE_RESUME: 131 pr_info("%s: resume\n", __func__); 132 break; 133 } 134 } 135 136 static struct clock_event_device clockevent_microblaze_timer = { 137 .name = "microblaze_clockevent", 138 .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, 139 .shift = 8, 140 .rating = 300, 141 .set_next_event = microblaze_timer_set_next_event, 142 .set_mode = microblaze_timer_set_mode, 143 }; 144 145 static inline void timer_ack(void) 146 { 147 out_be32(timer_baseaddr + TCSR0, in_be32(timer_baseaddr + TCSR0)); 148 } 149 150 static irqreturn_t timer_interrupt(int irq, void *dev_id) 151 { 152 struct clock_event_device *evt = &clockevent_microblaze_timer; 153 #ifdef CONFIG_HEART_BEAT 154 heartbeat(); 155 #endif 156 timer_ack(); 157 evt->event_handler(evt); 158 return IRQ_HANDLED; 159 } 160 161 static struct irqaction timer_irqaction = { 162 .handler = timer_interrupt, 163 .flags = IRQF_DISABLED | IRQF_TIMER, 164 .name = "timer", 165 .dev_id = &clockevent_microblaze_timer, 166 }; 167 168 static __init void microblaze_clockevent_init(void) 169 { 170 clockevent_microblaze_timer.mult = 171 div_sc(timer_clock_freq, NSEC_PER_SEC, 172 clockevent_microblaze_timer.shift); 173 clockevent_microblaze_timer.max_delta_ns = 174 clockevent_delta2ns((u32)~0, &clockevent_microblaze_timer); 175 clockevent_microblaze_timer.min_delta_ns = 176 clockevent_delta2ns(1, &clockevent_microblaze_timer); 177 clockevent_microblaze_timer.cpumask = cpumask_of(0); 178 clockevents_register_device(&clockevent_microblaze_timer); 179 } 180 181 static cycle_t microblaze_read(struct clocksource *cs) 182 { 183 /* reading actual value of timer 1 */ 184 return (cycle_t) (in_be32(timer_baseaddr + TCR1)); 185 } 186 187 static struct timecounter microblaze_tc = { 188 .cc = NULL, 189 }; 190 191 static cycle_t microblaze_cc_read(const struct cyclecounter *cc) 192 { 193 return microblaze_read(NULL); 194 } 195 196 static struct cyclecounter microblaze_cc = { 197 .read = microblaze_cc_read, 198 .mask = CLOCKSOURCE_MASK(32), 199 .shift = 8, 200 }; 201 202 static int __init init_microblaze_timecounter(void) 203 { 204 microblaze_cc.mult = div_sc(timer_clock_freq, NSEC_PER_SEC, 205 microblaze_cc.shift); 206 207 timecounter_init(µblaze_tc, µblaze_cc, sched_clock()); 208 209 return 0; 210 } 211 212 static struct clocksource clocksource_microblaze = { 213 .name = "microblaze_clocksource", 214 .rating = 300, 215 .read = microblaze_read, 216 .mask = CLOCKSOURCE_MASK(32), 217 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 218 }; 219 220 static int __init microblaze_clocksource_init(void) 221 { 222 if (clocksource_register_hz(&clocksource_microblaze, timer_clock_freq)) 223 panic("failed to register clocksource"); 224 225 /* stop timer1 */ 226 out_be32(timer_baseaddr + TCSR1, 227 in_be32(timer_baseaddr + TCSR1) & ~TCSR_ENT); 228 /* start timer1 - up counting without interrupt */ 229 out_be32(timer_baseaddr + TCSR1, TCSR_TINT|TCSR_ENT|TCSR_ARHT); 230 231 /* register timecounter - for ftrace support */ 232 init_microblaze_timecounter(); 233 return 0; 234 } 235 236 /* 237 * We have to protect accesses before timer initialization 238 * and return 0 for sched_clock function below. 239 */ 240 static int timer_initialized; 241 242 static void __init xilinx_timer_init(struct device_node *timer) 243 { 244 u32 irq; 245 u32 timer_num = 1; 246 int ret; 247 248 timer_baseaddr = of_iomap(timer, 0); 249 if (!timer_baseaddr) { 250 pr_err("ERROR: invalid timer base address\n"); 251 BUG(); 252 } 253 254 irq = irq_of_parse_and_map(timer, 0); 255 256 of_property_read_u32(timer, "xlnx,one-timer-only", &timer_num); 257 if (timer_num) { 258 pr_emerg("Please enable two timers in HW\n"); 259 BUG(); 260 } 261 262 pr_info("%s: irq=%d\n", timer->full_name, irq); 263 264 /* If there is clock-frequency property than use it */ 265 ret = of_property_read_u32(timer, "clock-frequency", &timer_clock_freq); 266 if (ret < 0) 267 timer_clock_freq = cpuinfo.cpu_clock_freq; 268 269 freq_div_hz = timer_clock_freq / HZ; 270 271 setup_irq(irq, &timer_irqaction); 272 #ifdef CONFIG_HEART_BEAT 273 setup_heartbeat(); 274 #endif 275 microblaze_clocksource_init(); 276 microblaze_clockevent_init(); 277 timer_initialized = 1; 278 } 279 280 unsigned long long notrace sched_clock(void) 281 { 282 if (timer_initialized) { 283 struct clocksource *cs = &clocksource_microblaze; 284 285 cycle_t cyc = cnt32_to_63(cs->read(NULL)) & LLONG_MAX; 286 return clocksource_cyc2ns(cyc, cs->mult, cs->shift); 287 } 288 return 0; 289 } 290 291 CLOCKSOURCE_OF_DECLARE(xilinx_timer, "xlnx,xps-timer-1.00.a", 292 xilinx_timer_init); 293