1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * linux/arch/alpha/kernel/setup.c 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 */ 7 8 /* 2.3.x bootmem, 1999 Andrea Arcangeli <[email protected]> */ 9 10 /* 11 * Bootup setup stuff. 12 */ 13 14 #include <linux/sched.h> 15 #include <linux/kernel.h> 16 #include <linux/mm.h> 17 #include <linux/stddef.h> 18 #include <linux/unistd.h> 19 #include <linux/ptrace.h> 20 #include <linux/slab.h> 21 #include <linux/user.h> 22 #include <linux/screen_info.h> 23 #include <linux/delay.h> 24 #include <linux/mc146818rtc.h> 25 #include <linux/console.h> 26 #include <linux/cpu.h> 27 #include <linux/errno.h> 28 #include <linux/init.h> 29 #include <linux/string.h> 30 #include <linux/ioport.h> 31 #include <linux/panic_notifier.h> 32 #include <linux/platform_device.h> 33 #include <linux/memblock.h> 34 #include <linux/pci.h> 35 #include <linux/seq_file.h> 36 #include <linux/root_dev.h> 37 #include <linux/initrd.h> 38 #include <linux/eisa.h> 39 #include <linux/pfn.h> 40 #ifdef CONFIG_MAGIC_SYSRQ 41 #include <linux/sysrq.h> 42 #include <linux/reboot.h> 43 #endif 44 #include <linux/notifier.h> 45 #include <asm/setup.h> 46 #include <asm/io.h> 47 #include <linux/log2.h> 48 #include <linux/export.h> 49 50 static int alpha_panic_event(struct notifier_block *, unsigned long, void *); 51 static struct notifier_block alpha_panic_block = { 52 alpha_panic_event, 53 NULL, 54 INT_MAX /* try to do it first */ 55 }; 56 57 #include <linux/uaccess.h> 58 #include <asm/hwrpb.h> 59 #include <asm/dma.h> 60 #include <asm/mmu_context.h> 61 #include <asm/console.h> 62 63 #include "proto.h" 64 #include "pci_impl.h" 65 66 67 struct hwrpb_struct *hwrpb; 68 EXPORT_SYMBOL(hwrpb); 69 unsigned long srm_hae; 70 71 int alpha_l1i_cacheshape; 72 int alpha_l1d_cacheshape; 73 int alpha_l2_cacheshape; 74 int alpha_l3_cacheshape; 75 76 #ifdef CONFIG_VERBOSE_MCHECK 77 /* 0=minimum, 1=verbose, 2=all */ 78 /* These can be overridden via the command line, ie "verbose_mcheck=2") */ 79 unsigned long alpha_verbose_mcheck = CONFIG_VERBOSE_MCHECK_ON; 80 #endif 81 82 /* Which processor we booted from. */ 83 int boot_cpuid; 84 85 /* 86 * Using SRM callbacks for initial console output. This works from 87 * setup_arch() time through the end of time_init(), as those places 88 * are under our (Alpha) control. 89 90 * "srmcons" specified in the boot command arguments allows us to 91 * see kernel messages during the period of time before the true 92 * console device is "registered" during console_init(). 93 * As of this version (2.5.59), console_init() will call 94 * disable_early_printk() as the last action before initializing 95 * the console drivers. That's the last possible time srmcons can be 96 * unregistered without interfering with console behavior. 97 * 98 * By default, OFF; set it with a bootcommand arg of "srmcons" or 99 * "console=srm". The meaning of these two args is: 100 * "srmcons" - early callback prints 101 * "console=srm" - full callback based console, including early prints 102 */ 103 int srmcons_output = 0; 104 105 /* Enforce a memory size limit; useful for testing. By default, none. */ 106 unsigned long mem_size_limit = 0; 107 108 /* Set AGP GART window size (0 means disabled). */ 109 unsigned long alpha_agpgart_size = DEFAULT_AGP_APER_SIZE; 110 111 #ifdef CONFIG_ALPHA_GENERIC 112 struct alpha_machine_vector alpha_mv; 113 EXPORT_SYMBOL(alpha_mv); 114 #endif 115 116 #ifndef alpha_using_srm 117 int alpha_using_srm; 118 EXPORT_SYMBOL(alpha_using_srm); 119 #endif 120 121 #ifndef alpha_using_qemu 122 int alpha_using_qemu; 123 #endif 124 125 static struct alpha_machine_vector *get_sysvec(unsigned long, unsigned long, 126 unsigned long); 127 static struct alpha_machine_vector *get_sysvec_byname(const char *); 128 static void get_sysnames(unsigned long, unsigned long, unsigned long, 129 char **, char **); 130 static void determine_cpu_caches (unsigned int); 131 132 static char __initdata command_line[COMMAND_LINE_SIZE]; 133 134 #ifdef CONFIG_VGA_CONSOLE 135 /* 136 * The format of "screen_info" is strange, and due to early 137 * i386-setup code. This is just enough to make the console 138 * code think we're on a VGA color display. 139 */ 140 141 struct screen_info vgacon_screen_info = { 142 .orig_x = 0, 143 .orig_y = 25, 144 .orig_video_cols = 80, 145 .orig_video_lines = 25, 146 .orig_video_isVGA = 1, 147 .orig_video_points = 16 148 }; 149 #endif 150 151 /* 152 * The direct map I/O window, if any. This should be the same 153 * for all busses, since it's used by virt_to_bus. 154 */ 155 156 unsigned long __direct_map_base; 157 unsigned long __direct_map_size; 158 EXPORT_SYMBOL(__direct_map_base); 159 EXPORT_SYMBOL(__direct_map_size); 160 161 /* 162 * Declare all of the machine vectors. 163 */ 164 165 /* GCC 2.7.2 (on alpha at least) is lame. It does not support either 166 __attribute__((weak)) or #pragma weak. Bypass it and talk directly 167 to the assembler. */ 168 169 #define WEAK(X) \ 170 extern struct alpha_machine_vector X; \ 171 asm(".weak "#X) 172 173 WEAK(alcor_mv); 174 WEAK(alphabook1_mv); 175 WEAK(avanti_mv); 176 WEAK(cabriolet_mv); 177 WEAK(clipper_mv); 178 WEAK(dp264_mv); 179 WEAK(eb164_mv); 180 WEAK(eb64p_mv); 181 WEAK(eb66_mv); 182 WEAK(eb66p_mv); 183 WEAK(eiger_mv); 184 WEAK(lx164_mv); 185 WEAK(marvel_ev7_mv); 186 WEAK(miata_mv); 187 WEAK(mikasa_mv); 188 WEAK(mikasa_primo_mv); 189 WEAK(monet_mv); 190 WEAK(nautilus_mv); 191 WEAK(noname_mv); 192 WEAK(noritake_mv); 193 WEAK(noritake_primo_mv); 194 WEAK(p2k_mv); 195 WEAK(pc164_mv); 196 WEAK(privateer_mv); 197 WEAK(rawhide_mv); 198 WEAK(ruffian_mv); 199 WEAK(rx164_mv); 200 WEAK(sable_gamma_mv); 201 WEAK(shark_mv); 202 WEAK(sx164_mv); 203 WEAK(takara_mv); 204 WEAK(titan_mv); 205 WEAK(webbrick_mv); 206 WEAK(wildfire_mv); 207 WEAK(xl_mv); 208 WEAK(xlt_mv); 209 210 #undef WEAK 211 212 /* 213 * I/O resources inherited from PeeCees. Except for perhaps the 214 * turbochannel alphas, everyone has these on some sort of SuperIO chip. 215 * 216 * ??? If this becomes less standard, move the struct out into the 217 * machine vector. 218 */ 219 220 static void __init 221 reserve_std_resources(void) 222 { 223 static struct resource standard_io_resources[] = { 224 { .name = "rtc", .start = 0x70, .end = 0x7f}, 225 { .name = "dma1", .start = 0x00, .end = 0x1f }, 226 { .name = "pic1", .start = 0x20, .end = 0x3f }, 227 { .name = "timer", .start = 0x40, .end = 0x5f }, 228 { .name = "keyboard", .start = 0x60, .end = 0x6f }, 229 { .name = "dma page reg", .start = 0x80, .end = 0x8f }, 230 { .name = "pic2", .start = 0xa0, .end = 0xbf }, 231 { .name = "dma2", .start = 0xc0, .end = 0xdf }, 232 }; 233 234 struct resource *io = &ioport_resource; 235 size_t i; 236 237 if (hose_head) { 238 struct pci_controller *hose; 239 for (hose = hose_head; hose; hose = hose->next) 240 if (hose->index == 0) { 241 io = hose->io_space; 242 break; 243 } 244 } 245 246 for (i = 0; i < ARRAY_SIZE(standard_io_resources); ++i) 247 request_resource(io, standard_io_resources+i); 248 } 249 250 #define PFN_MAX PFN_DOWN(0x80000000) 251 #define for_each_mem_cluster(memdesc, _cluster, i) \ 252 for ((_cluster) = (memdesc)->cluster, (i) = 0; \ 253 (i) < (memdesc)->numclusters; (i)++, (_cluster)++) 254 255 static unsigned long __init 256 get_mem_size_limit(char *s) 257 { 258 unsigned long end = 0; 259 char *from = s; 260 261 end = simple_strtoul(from, &from, 0); 262 if ( *from == 'K' || *from == 'k' ) { 263 end = end << 10; 264 from++; 265 } else if ( *from == 'M' || *from == 'm' ) { 266 end = end << 20; 267 from++; 268 } else if ( *from == 'G' || *from == 'g' ) { 269 end = end << 30; 270 from++; 271 } 272 return end >> PAGE_SHIFT; /* Return the PFN of the limit. */ 273 } 274 275 #ifdef CONFIG_BLK_DEV_INITRD 276 void * __init 277 move_initrd(unsigned long mem_limit) 278 { 279 void *start; 280 unsigned long size; 281 282 size = initrd_end - initrd_start; 283 start = memblock_alloc(PAGE_ALIGN(size), PAGE_SIZE); 284 if (!start || __pa(start) + size > mem_limit) { 285 initrd_start = initrd_end = 0; 286 return NULL; 287 } 288 memmove(start, (void *)initrd_start, size); 289 initrd_start = (unsigned long)start; 290 initrd_end = initrd_start + size; 291 printk("initrd moved to %p\n", start); 292 return start; 293 } 294 #endif 295 296 static void __init 297 setup_memory(void *kernel_end) 298 { 299 struct memclust_struct * cluster; 300 struct memdesc_struct * memdesc; 301 unsigned long kernel_size; 302 unsigned long i; 303 304 /* Find free clusters, and init and free the bootmem accordingly. */ 305 memdesc = (struct memdesc_struct *) 306 (hwrpb->mddt_offset + (unsigned long) hwrpb); 307 308 for_each_mem_cluster(memdesc, cluster, i) { 309 unsigned long end; 310 311 printk("memcluster %lu, usage %01lx, start %8lu, end %8lu\n", 312 i, cluster->usage, cluster->start_pfn, 313 cluster->start_pfn + cluster->numpages); 314 315 end = cluster->start_pfn + cluster->numpages; 316 if (end > max_low_pfn) 317 max_low_pfn = end; 318 319 memblock_add(PFN_PHYS(cluster->start_pfn), 320 cluster->numpages << PAGE_SHIFT); 321 322 /* Bit 0 is console/PALcode reserved. Bit 1 is 323 non-volatile memory -- we might want to mark 324 this for later. */ 325 if (cluster->usage & 3) 326 memblock_reserve(PFN_PHYS(cluster->start_pfn), 327 cluster->numpages << PAGE_SHIFT); 328 } 329 330 /* 331 * Except for the NUMA systems (wildfire, marvel) all of the 332 * Alpha systems we run on support 32GB of memory or less. 333 * Since the NUMA systems introduce large holes in memory addressing, 334 * we can get into a situation where there is not enough contiguous 335 * memory for the memory map. 336 * 337 * Limit memory to the first 32GB to limit the NUMA systems to 338 * memory on their first node (wildfire) or 2 (marvel) to avoid 339 * not being able to produce the memory map. In order to access 340 * all of the memory on the NUMA systems, build with discontiguous 341 * memory support. 342 * 343 * If the user specified a memory limit, let that memory limit stand. 344 */ 345 if (!mem_size_limit) 346 mem_size_limit = (32ul * 1024 * 1024 * 1024) >> PAGE_SHIFT; 347 348 if (mem_size_limit && max_low_pfn >= mem_size_limit) 349 { 350 printk("setup: forcing memory size to %ldK (from %ldK).\n", 351 mem_size_limit << (PAGE_SHIFT - 10), 352 max_low_pfn << (PAGE_SHIFT - 10)); 353 max_low_pfn = mem_size_limit; 354 } 355 356 /* Reserve the kernel memory. */ 357 kernel_size = virt_to_phys(kernel_end) - KERNEL_START_PHYS; 358 memblock_reserve(KERNEL_START_PHYS, kernel_size); 359 360 #ifdef CONFIG_BLK_DEV_INITRD 361 initrd_start = INITRD_START; 362 if (initrd_start) { 363 initrd_end = initrd_start+INITRD_SIZE; 364 printk("Initial ramdisk at: 0x%p (%lu bytes)\n", 365 (void *) initrd_start, INITRD_SIZE); 366 367 if ((void *)initrd_end > phys_to_virt(PFN_PHYS(max_low_pfn))) { 368 if (!move_initrd(PFN_PHYS(max_low_pfn))) 369 printk("initrd extends beyond end of memory " 370 "(0x%08lx > 0x%p)\ndisabling initrd\n", 371 initrd_end, 372 phys_to_virt(PFN_PHYS(max_low_pfn))); 373 } else { 374 memblock_reserve(virt_to_phys((void *)initrd_start), 375 INITRD_SIZE); 376 } 377 } 378 #endif /* CONFIG_BLK_DEV_INITRD */ 379 } 380 381 int page_is_ram(unsigned long pfn) 382 { 383 struct memclust_struct * cluster; 384 struct memdesc_struct * memdesc; 385 unsigned long i; 386 387 memdesc = (struct memdesc_struct *) 388 (hwrpb->mddt_offset + (unsigned long) hwrpb); 389 for_each_mem_cluster(memdesc, cluster, i) 390 { 391 if (pfn >= cluster->start_pfn && 392 pfn < cluster->start_pfn + cluster->numpages) { 393 return (cluster->usage & 3) ? 0 : 1; 394 } 395 } 396 397 return 0; 398 } 399 400 static int __init 401 register_cpus(void) 402 { 403 int i; 404 405 for_each_possible_cpu(i) { 406 struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL); 407 if (!p) 408 return -ENOMEM; 409 register_cpu(p, i); 410 } 411 return 0; 412 } 413 414 arch_initcall(register_cpus); 415 416 #ifdef CONFIG_MAGIC_SYSRQ 417 static void sysrq_reboot_handler(u8 unused) 418 { 419 machine_halt(); 420 } 421 422 static const struct sysrq_key_op srm_sysrq_reboot_op = { 423 .handler = sysrq_reboot_handler, 424 .help_msg = "reboot(b)", 425 .action_msg = "Resetting", 426 .enable_mask = SYSRQ_ENABLE_BOOT, 427 }; 428 #endif 429 430 void __init 431 setup_arch(char **cmdline_p) 432 { 433 extern char _end[]; 434 435 struct alpha_machine_vector *vec = NULL; 436 struct percpu_struct *cpu; 437 char *type_name, *var_name, *p; 438 void *kernel_end = _end; /* end of kernel */ 439 char *args = command_line; 440 441 hwrpb = (struct hwrpb_struct*) __va(INIT_HWRPB->phys_addr); 442 boot_cpuid = hard_smp_processor_id(); 443 444 /* 445 * Pre-process the system type to make sure it will be valid. 446 * 447 * This may restore real CABRIO and EB66+ family names, ie 448 * EB64+ and EB66. 449 * 450 * Oh, and "white box" AS800 (aka DIGITAL Server 3000 series) 451 * and AS1200 (DIGITAL Server 5000 series) have the type as 452 * the negative of the real one. 453 */ 454 if ((long)hwrpb->sys_type < 0) { 455 hwrpb->sys_type = -((long)hwrpb->sys_type); 456 hwrpb_update_checksum(hwrpb); 457 } 458 459 /* Register a call for panic conditions. */ 460 atomic_notifier_chain_register(&panic_notifier_list, 461 &alpha_panic_block); 462 463 #ifndef alpha_using_srm 464 /* Assume that we've booted from SRM if we haven't booted from MILO. 465 Detect the later by looking for "MILO" in the system serial nr. */ 466 alpha_using_srm = !str_has_prefix((const char *)hwrpb->ssn, "MILO"); 467 #endif 468 #ifndef alpha_using_qemu 469 /* Similarly, look for QEMU. */ 470 alpha_using_qemu = strstr((const char *)hwrpb->ssn, "QEMU") != 0; 471 #endif 472 473 /* If we are using SRM, we want to allow callbacks 474 as early as possible, so do this NOW, and then 475 they should work immediately thereafter. 476 */ 477 kernel_end = callback_init(kernel_end); 478 479 /* 480 * Locate the command line. 481 */ 482 strscpy(command_line, COMMAND_LINE, sizeof(command_line)); 483 strcpy(boot_command_line, command_line); 484 *cmdline_p = command_line; 485 486 /* 487 * Process command-line arguments. 488 */ 489 while ((p = strsep(&args, " \t")) != NULL) { 490 if (!*p) continue; 491 if (strncmp(p, "alpha_mv=", 9) == 0) { 492 vec = get_sysvec_byname(p+9); 493 continue; 494 } 495 if (strncmp(p, "cycle=", 6) == 0) { 496 est_cycle_freq = simple_strtol(p+6, NULL, 0); 497 continue; 498 } 499 if (strncmp(p, "mem=", 4) == 0) { 500 mem_size_limit = get_mem_size_limit(p+4); 501 continue; 502 } 503 if (strncmp(p, "srmcons", 7) == 0) { 504 srmcons_output |= 1; 505 continue; 506 } 507 if (strncmp(p, "console=srm", 11) == 0) { 508 srmcons_output |= 2; 509 continue; 510 } 511 if (strncmp(p, "gartsize=", 9) == 0) { 512 alpha_agpgart_size = 513 get_mem_size_limit(p+9) << PAGE_SHIFT; 514 continue; 515 } 516 #ifdef CONFIG_VERBOSE_MCHECK 517 if (strncmp(p, "verbose_mcheck=", 15) == 0) { 518 alpha_verbose_mcheck = simple_strtol(p+15, NULL, 0); 519 continue; 520 } 521 #endif 522 } 523 524 /* Replace the command line, now that we've killed it with strsep. */ 525 strcpy(command_line, boot_command_line); 526 527 /* If we want SRM console printk echoing early, do it now. */ 528 if (alpha_using_srm && srmcons_output) { 529 register_srm_console(); 530 531 /* 532 * If "console=srm" was specified, clear the srmcons_output 533 * flag now so that time.c won't unregister_srm_console 534 */ 535 if (srmcons_output & 2) 536 srmcons_output = 0; 537 } 538 539 #ifdef CONFIG_MAGIC_SYSRQ 540 /* If we're using SRM, make sysrq-b halt back to the prom, 541 not auto-reboot. */ 542 if (alpha_using_srm) { 543 unregister_sysrq_key('b', __sysrq_reboot_op); 544 register_sysrq_key('b', &srm_sysrq_reboot_op); 545 } 546 #endif 547 548 /* 549 * Identify and reconfigure for the current system. 550 */ 551 cpu = (struct percpu_struct*)((char*)hwrpb + hwrpb->processor_offset); 552 553 get_sysnames(hwrpb->sys_type, hwrpb->sys_variation, 554 cpu->type, &type_name, &var_name); 555 if (*var_name == '0') 556 var_name = ""; 557 558 if (!vec) { 559 vec = get_sysvec(hwrpb->sys_type, hwrpb->sys_variation, 560 cpu->type); 561 } 562 563 if (!vec) { 564 panic("Unsupported system type: %s%s%s (%ld %ld)\n", 565 type_name, (*var_name ? " variation " : ""), var_name, 566 hwrpb->sys_type, hwrpb->sys_variation); 567 } 568 if (vec != &alpha_mv) { 569 alpha_mv = *vec; 570 } 571 572 printk("Booting " 573 #ifdef CONFIG_ALPHA_GENERIC 574 "GENERIC " 575 #endif 576 "on %s%s%s using machine vector %s from %s\n", 577 type_name, (*var_name ? " variation " : ""), 578 var_name, alpha_mv.vector_name, 579 (alpha_using_srm ? "SRM" : "MILO")); 580 581 printk("Major Options: " 582 #ifdef CONFIG_SMP 583 "SMP " 584 #endif 585 #ifdef CONFIG_ALPHA_EV56 586 "EV56 " 587 #endif 588 #ifdef CONFIG_ALPHA_EV67 589 "EV67 " 590 #endif 591 #ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS 592 "LEGACY_START " 593 #endif 594 #ifdef CONFIG_VERBOSE_MCHECK 595 "VERBOSE_MCHECK " 596 #endif 597 598 #ifdef CONFIG_DEBUG_SPINLOCK 599 "DEBUG_SPINLOCK " 600 #endif 601 #ifdef CONFIG_MAGIC_SYSRQ 602 "MAGIC_SYSRQ " 603 #endif 604 "\n"); 605 606 printk("Command line: %s\n", command_line); 607 608 /* 609 * Sync up the HAE. 610 * Save the SRM's current value for restoration. 611 */ 612 srm_hae = *alpha_mv.hae_register; 613 __set_hae(alpha_mv.hae_cache); 614 615 /* Reset enable correctable error reports. */ 616 wrmces(0x7); 617 618 /* Find our memory. */ 619 setup_memory(kernel_end); 620 memblock_set_bottom_up(true); 621 sparse_init(); 622 623 /* First guess at cpu cache sizes. Do this before init_arch. */ 624 determine_cpu_caches(cpu->type); 625 626 /* Initialize the machine. Usually has to do with setting up 627 DMA windows and the like. */ 628 if (alpha_mv.init_arch) 629 alpha_mv.init_arch(); 630 631 /* Reserve standard resources. */ 632 reserve_std_resources(); 633 634 /* 635 * Give us a default console. TGA users will see nothing until 636 * chr_dev_init is called, rather late in the boot sequence. 637 */ 638 639 #ifdef CONFIG_VT 640 #if defined(CONFIG_VGA_CONSOLE) 641 vgacon_register_screen(&vgacon_screen_info); 642 #endif 643 #endif 644 645 /* Default root filesystem to sda2. */ 646 ROOT_DEV = MKDEV(SCSI_DISK0_MAJOR, 2); 647 648 #ifdef CONFIG_EISA 649 /* FIXME: only set this when we actually have EISA in this box? */ 650 EISA_bus = 1; 651 #endif 652 653 /* 654 * Check ASN in HWRPB for validity, report if bad. 655 * FIXME: how was this failing? Should we trust it instead, 656 * and copy the value into alpha_mv.max_asn? 657 */ 658 659 if (hwrpb->max_asn != MAX_ASN) { 660 printk("Max ASN from HWRPB is bad (0x%lx)\n", hwrpb->max_asn); 661 } 662 663 /* 664 * Identify the flock of penguins. 665 */ 666 667 #ifdef CONFIG_SMP 668 setup_smp(); 669 #endif 670 paging_init(); 671 } 672 673 static char sys_unknown[] = "Unknown"; 674 static char systype_names[][16] = { 675 "0", 676 "ADU", "Cobra", "Ruby", "Flamingo", "Mannequin", "Jensen", 677 "Pelican", "Morgan", "Sable", "Medulla", "Noname", 678 "Turbolaser", "Avanti", "Mustang", "Alcor", "Tradewind", 679 "Mikasa", "EB64", "EB66", "EB64+", "AlphaBook1", 680 "Rawhide", "K2", "Lynx", "XL", "EB164", "Noritake", 681 "Cortex", "29", "Miata", "XXM", "Takara", "Yukon", 682 "Tsunami", "Wildfire", "CUSCO", "Eiger", "Titan", "Marvel" 683 }; 684 685 static char unofficial_names[][8] = {"100", "Ruffian"}; 686 687 static char api_names[][16] = {"200", "Nautilus"}; 688 689 static char eb164_names[][8] = {"EB164", "PC164", "LX164", "SX164", "RX164"}; 690 static int eb164_indices[] = {0,0,0,1,1,1,1,1,2,2,2,2,3,3,3,3,4}; 691 692 static char alcor_names[][16] = {"Alcor", "Maverick", "Bret"}; 693 static int alcor_indices[] = {0,0,0,1,1,1,0,0,0,0,0,0,2,2,2,2,2,2}; 694 695 static char eb64p_names[][16] = {"EB64+", "Cabriolet", "AlphaPCI64"}; 696 static int eb64p_indices[] = {0,0,1,2}; 697 698 static char eb66_names[][8] = {"EB66", "EB66+"}; 699 static int eb66_indices[] = {0,0,1}; 700 701 static char marvel_names[][16] = { 702 "Marvel/EV7" 703 }; 704 static int marvel_indices[] = { 0 }; 705 706 static char rawhide_names[][16] = { 707 "Dodge", "Wrangler", "Durango", "Tincup", "DaVinci" 708 }; 709 static int rawhide_indices[] = {0,0,0,1,1,2,2,3,3,4,4}; 710 711 static char titan_names[][16] = { 712 "DEFAULT", "Privateer", "Falcon", "Granite" 713 }; 714 static int titan_indices[] = {0,1,2,2,3}; 715 716 static char tsunami_names[][16] = { 717 "0", "DP264", "Warhol", "Windjammer", "Monet", "Clipper", 718 "Goldrush", "Webbrick", "Catamaran", "Brisbane", "Melbourne", 719 "Flying Clipper", "Shark" 720 }; 721 static int tsunami_indices[] = {0,1,2,3,4,5,6,7,8,9,10,11,12}; 722 723 static struct alpha_machine_vector * __init 724 get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu) 725 { 726 static struct alpha_machine_vector *systype_vecs[] __initdata = 727 { 728 NULL, /* 0 */ 729 NULL, /* ADU */ 730 NULL, /* Cobra */ 731 NULL, /* Ruby */ 732 NULL, /* Flamingo */ 733 NULL, /* Mannequin */ 734 NULL, /* Jensens */ 735 NULL, /* Pelican */ 736 NULL, /* Morgan */ 737 NULL, /* Sable -- see below. */ 738 NULL, /* Medulla */ 739 &noname_mv, 740 NULL, /* Turbolaser */ 741 &avanti_mv, 742 NULL, /* Mustang */ 743 NULL, /* Alcor, Bret, Maverick. HWRPB inaccurate? */ 744 NULL, /* Tradewind */ 745 NULL, /* Mikasa -- see below. */ 746 NULL, /* EB64 */ 747 NULL, /* EB66 -- see variation. */ 748 NULL, /* EB64+ -- see variation. */ 749 &alphabook1_mv, 750 &rawhide_mv, 751 NULL, /* K2 */ 752 NULL, /* Lynx */ 753 &xl_mv, 754 NULL, /* EB164 -- see variation. */ 755 NULL, /* Noritake -- see below. */ 756 NULL, /* Cortex */ 757 NULL, /* 29 */ 758 &miata_mv, 759 NULL, /* XXM */ 760 &takara_mv, 761 NULL, /* Yukon */ 762 NULL, /* Tsunami -- see variation. */ 763 &wildfire_mv, /* Wildfire */ 764 NULL, /* CUSCO */ 765 &eiger_mv, /* Eiger */ 766 NULL, /* Titan */ 767 NULL, /* Marvel */ 768 }; 769 770 static struct alpha_machine_vector *unofficial_vecs[] __initdata = 771 { 772 NULL, /* 100 */ 773 &ruffian_mv, 774 }; 775 776 static struct alpha_machine_vector *api_vecs[] __initdata = 777 { 778 NULL, /* 200 */ 779 &nautilus_mv, 780 }; 781 782 static struct alpha_machine_vector *alcor_vecs[] __initdata = 783 { 784 &alcor_mv, &xlt_mv, &xlt_mv 785 }; 786 787 static struct alpha_machine_vector *eb164_vecs[] __initdata = 788 { 789 &eb164_mv, &pc164_mv, &lx164_mv, &sx164_mv, &rx164_mv 790 }; 791 792 static struct alpha_machine_vector *eb64p_vecs[] __initdata = 793 { 794 &eb64p_mv, 795 &cabriolet_mv, 796 &cabriolet_mv /* AlphaPCI64 */ 797 }; 798 799 static struct alpha_machine_vector *eb66_vecs[] __initdata = 800 { 801 &eb66_mv, 802 &eb66p_mv 803 }; 804 805 static struct alpha_machine_vector *marvel_vecs[] __initdata = 806 { 807 &marvel_ev7_mv, 808 }; 809 810 static struct alpha_machine_vector *titan_vecs[] __initdata = 811 { 812 &titan_mv, /* default */ 813 &privateer_mv, /* privateer */ 814 &titan_mv, /* falcon */ 815 &privateer_mv, /* granite */ 816 }; 817 818 static struct alpha_machine_vector *tsunami_vecs[] __initdata = 819 { 820 NULL, 821 &dp264_mv, /* dp264 */ 822 &dp264_mv, /* warhol */ 823 &dp264_mv, /* windjammer */ 824 &monet_mv, /* monet */ 825 &clipper_mv, /* clipper */ 826 &dp264_mv, /* goldrush */ 827 &webbrick_mv, /* webbrick */ 828 &dp264_mv, /* catamaran */ 829 NULL, /* brisbane? */ 830 NULL, /* melbourne? */ 831 NULL, /* flying clipper? */ 832 &shark_mv, /* shark */ 833 }; 834 835 /* ??? Do we need to distinguish between Rawhides? */ 836 837 struct alpha_machine_vector *vec; 838 839 /* Search the system tables first... */ 840 vec = NULL; 841 if (type < ARRAY_SIZE(systype_vecs)) { 842 vec = systype_vecs[type]; 843 } else if ((type > ST_API_BIAS) && 844 (type - ST_API_BIAS) < ARRAY_SIZE(api_vecs)) { 845 vec = api_vecs[type - ST_API_BIAS]; 846 } else if ((type > ST_UNOFFICIAL_BIAS) && 847 (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_vecs)) { 848 vec = unofficial_vecs[type - ST_UNOFFICIAL_BIAS]; 849 } 850 851 /* If we've not found one, try for a variation. */ 852 853 if (!vec) { 854 /* Member ID is a bit-field. */ 855 unsigned long member = (variation >> 10) & 0x3f; 856 857 cpu &= 0xffffffff; /* make it usable */ 858 859 switch (type) { 860 case ST_DEC_ALCOR: 861 if (member < ARRAY_SIZE(alcor_indices)) 862 vec = alcor_vecs[alcor_indices[member]]; 863 break; 864 case ST_DEC_EB164: 865 if (member < ARRAY_SIZE(eb164_indices)) 866 vec = eb164_vecs[eb164_indices[member]]; 867 /* PC164 may show as EB164 variation with EV56 CPU, 868 but, since no true EB164 had anything but EV5... */ 869 if (vec == &eb164_mv && cpu == EV56_CPU) 870 vec = &pc164_mv; 871 break; 872 case ST_DEC_EB64P: 873 if (member < ARRAY_SIZE(eb64p_indices)) 874 vec = eb64p_vecs[eb64p_indices[member]]; 875 break; 876 case ST_DEC_EB66: 877 if (member < ARRAY_SIZE(eb66_indices)) 878 vec = eb66_vecs[eb66_indices[member]]; 879 break; 880 case ST_DEC_MARVEL: 881 if (member < ARRAY_SIZE(marvel_indices)) 882 vec = marvel_vecs[marvel_indices[member]]; 883 break; 884 case ST_DEC_TITAN: 885 vec = titan_vecs[0]; /* default */ 886 if (member < ARRAY_SIZE(titan_indices)) 887 vec = titan_vecs[titan_indices[member]]; 888 break; 889 case ST_DEC_TSUNAMI: 890 if (member < ARRAY_SIZE(tsunami_indices)) 891 vec = tsunami_vecs[tsunami_indices[member]]; 892 break; 893 case ST_DEC_1000: 894 if (cpu == EV5_CPU || cpu == EV56_CPU) 895 vec = &mikasa_primo_mv; 896 else 897 vec = &mikasa_mv; 898 break; 899 case ST_DEC_NORITAKE: 900 if (cpu == EV5_CPU || cpu == EV56_CPU) 901 vec = &noritake_primo_mv; 902 else 903 vec = &noritake_mv; 904 break; 905 case ST_DEC_2100_A500: 906 vec = &sable_gamma_mv; 907 break; 908 } 909 } 910 return vec; 911 } 912 913 static struct alpha_machine_vector * __init 914 get_sysvec_byname(const char *name) 915 { 916 static struct alpha_machine_vector *all_vecs[] __initdata = 917 { 918 &alcor_mv, 919 &alphabook1_mv, 920 &avanti_mv, 921 &cabriolet_mv, 922 &clipper_mv, 923 &dp264_mv, 924 &eb164_mv, 925 &eb64p_mv, 926 &eb66_mv, 927 &eb66p_mv, 928 &eiger_mv, 929 &lx164_mv, 930 &miata_mv, 931 &mikasa_mv, 932 &mikasa_primo_mv, 933 &monet_mv, 934 &nautilus_mv, 935 &noname_mv, 936 &noritake_mv, 937 &noritake_primo_mv, 938 &p2k_mv, 939 &pc164_mv, 940 &privateer_mv, 941 &rawhide_mv, 942 &ruffian_mv, 943 &rx164_mv, 944 &sable_gamma_mv, 945 &shark_mv, 946 &sx164_mv, 947 &takara_mv, 948 &webbrick_mv, 949 &wildfire_mv, 950 &xl_mv, 951 &xlt_mv 952 }; 953 954 size_t i; 955 956 for (i = 0; i < ARRAY_SIZE(all_vecs); ++i) { 957 struct alpha_machine_vector *mv = all_vecs[i]; 958 if (strcasecmp(mv->vector_name, name) == 0) 959 return mv; 960 } 961 return NULL; 962 } 963 964 static void 965 get_sysnames(unsigned long type, unsigned long variation, unsigned long cpu, 966 char **type_name, char **variation_name) 967 { 968 unsigned long member; 969 970 /* If not in the tables, make it UNKNOWN, 971 else set type name to family */ 972 if (type < ARRAY_SIZE(systype_names)) { 973 *type_name = systype_names[type]; 974 } else if ((type > ST_API_BIAS) && 975 (type - ST_API_BIAS) < ARRAY_SIZE(api_names)) { 976 *type_name = api_names[type - ST_API_BIAS]; 977 } else if ((type > ST_UNOFFICIAL_BIAS) && 978 (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_names)) { 979 *type_name = unofficial_names[type - ST_UNOFFICIAL_BIAS]; 980 } else { 981 *type_name = sys_unknown; 982 *variation_name = sys_unknown; 983 return; 984 } 985 986 /* Set variation to "0"; if variation is zero, done. */ 987 *variation_name = systype_names[0]; 988 if (variation == 0) { 989 return; 990 } 991 992 member = (variation >> 10) & 0x3f; /* member ID is a bit-field */ 993 994 cpu &= 0xffffffff; /* make it usable */ 995 996 switch (type) { /* select by family */ 997 default: /* default to variation "0" for now */ 998 break; 999 case ST_DEC_EB164: 1000 if (member >= ARRAY_SIZE(eb164_indices)) 1001 break; 1002 *variation_name = eb164_names[eb164_indices[member]]; 1003 /* PC164 may show as EB164 variation, but with EV56 CPU, 1004 so, since no true EB164 had anything but EV5... */ 1005 if (eb164_indices[member] == 0 && cpu == EV56_CPU) 1006 *variation_name = eb164_names[1]; /* make it PC164 */ 1007 break; 1008 case ST_DEC_ALCOR: 1009 if (member < ARRAY_SIZE(alcor_indices)) 1010 *variation_name = alcor_names[alcor_indices[member]]; 1011 break; 1012 case ST_DEC_EB64P: 1013 if (member < ARRAY_SIZE(eb64p_indices)) 1014 *variation_name = eb64p_names[eb64p_indices[member]]; 1015 break; 1016 case ST_DEC_EB66: 1017 if (member < ARRAY_SIZE(eb66_indices)) 1018 *variation_name = eb66_names[eb66_indices[member]]; 1019 break; 1020 case ST_DEC_MARVEL: 1021 if (member < ARRAY_SIZE(marvel_indices)) 1022 *variation_name = marvel_names[marvel_indices[member]]; 1023 break; 1024 case ST_DEC_RAWHIDE: 1025 if (member < ARRAY_SIZE(rawhide_indices)) 1026 *variation_name = rawhide_names[rawhide_indices[member]]; 1027 break; 1028 case ST_DEC_TITAN: 1029 *variation_name = titan_names[0]; /* default */ 1030 if (member < ARRAY_SIZE(titan_indices)) 1031 *variation_name = titan_names[titan_indices[member]]; 1032 break; 1033 case ST_DEC_TSUNAMI: 1034 if (member < ARRAY_SIZE(tsunami_indices)) 1035 *variation_name = tsunami_names[tsunami_indices[member]]; 1036 break; 1037 } 1038 } 1039 1040 /* 1041 * A change was made to the HWRPB via an ECO and the following code 1042 * tracks a part of the ECO. In HWRPB versions less than 5, the ECO 1043 * was not implemented in the console firmware. If it's revision 5 or 1044 * greater we can get the name of the platform as an ASCII string from 1045 * the HWRPB. That's what this function does. It checks the revision 1046 * level and if the string is in the HWRPB it returns the address of 1047 * the string--a pointer to the name of the platform. 1048 * 1049 * Returns: 1050 * - Pointer to a ASCII string if it's in the HWRPB 1051 * - Pointer to a blank string if the data is not in the HWRPB. 1052 */ 1053 1054 static char * 1055 platform_string(void) 1056 { 1057 struct dsr_struct *dsr; 1058 static char unk_system_string[] = "N/A"; 1059 1060 /* Go to the console for the string pointer. 1061 * If the rpb_vers is not 5 or greater the rpb 1062 * is old and does not have this data in it. 1063 */ 1064 if (hwrpb->revision < 5) 1065 return (unk_system_string); 1066 else { 1067 /* The Dynamic System Recognition struct 1068 * has the system platform name starting 1069 * after the character count of the string. 1070 */ 1071 dsr = ((struct dsr_struct *) 1072 ((char *)hwrpb + hwrpb->dsr_offset)); 1073 return ((char *)dsr + (dsr->sysname_off + 1074 sizeof(long))); 1075 } 1076 } 1077 1078 static int 1079 get_nr_processors(struct percpu_struct *cpubase, unsigned long num) 1080 { 1081 struct percpu_struct *cpu; 1082 unsigned long i; 1083 int count = 0; 1084 1085 for (i = 0; i < num; i++) { 1086 cpu = (struct percpu_struct *) 1087 ((char *)cpubase + i*hwrpb->processor_size); 1088 if ((cpu->flags & 0x1cc) == 0x1cc) 1089 count++; 1090 } 1091 return count; 1092 } 1093 1094 static void 1095 show_cache_size (struct seq_file *f, const char *which, int shape) 1096 { 1097 if (shape == -1) 1098 seq_printf (f, "%s\t\t: n/a\n", which); 1099 else if (shape == 0) 1100 seq_printf (f, "%s\t\t: unknown\n", which); 1101 else 1102 seq_printf (f, "%s\t\t: %dK, %d-way, %db line\n", 1103 which, shape >> 10, shape & 15, 1104 1 << ((shape >> 4) & 15)); 1105 } 1106 1107 static int 1108 show_cpuinfo(struct seq_file *f, void *slot) 1109 { 1110 extern struct unaligned_stat { 1111 unsigned long count, va, pc; 1112 } unaligned[2]; 1113 1114 static char cpu_names[][8] = { 1115 "EV3", "EV4", "Simulate", "LCA4", "EV5", "EV45", "EV56", 1116 "EV6", "PCA56", "PCA57", "EV67", "EV68CB", "EV68AL", 1117 "EV68CX", "EV7", "EV79", "EV69" 1118 }; 1119 1120 struct percpu_struct *cpu = slot; 1121 unsigned int cpu_index; 1122 char *cpu_name; 1123 char *systype_name; 1124 char *sysvariation_name; 1125 int nr_processors; 1126 unsigned long timer_freq; 1127 1128 cpu_index = (unsigned) (cpu->type - 1); 1129 cpu_name = "Unknown"; 1130 if (cpu_index < ARRAY_SIZE(cpu_names)) 1131 cpu_name = cpu_names[cpu_index]; 1132 1133 get_sysnames(hwrpb->sys_type, hwrpb->sys_variation, 1134 cpu->type, &systype_name, &sysvariation_name); 1135 1136 nr_processors = get_nr_processors(cpu, hwrpb->nr_processors); 1137 1138 #if CONFIG_HZ == 1024 || CONFIG_HZ == 1200 1139 timer_freq = (100UL * hwrpb->intr_freq) / 4096; 1140 #else 1141 timer_freq = 100UL * CONFIG_HZ; 1142 #endif 1143 1144 seq_printf(f, "cpu\t\t\t: Alpha\n" 1145 "cpu model\t\t: %s\n" 1146 "cpu variation\t\t: %ld\n" 1147 "cpu revision\t\t: %ld\n" 1148 "cpu serial number\t: %s\n" 1149 "system type\t\t: %s\n" 1150 "system variation\t: %s\n" 1151 "system revision\t\t: %ld\n" 1152 "system serial number\t: %s\n" 1153 "cycle frequency [Hz]\t: %lu %s\n" 1154 "timer frequency [Hz]\t: %lu.%02lu\n" 1155 "page size [bytes]\t: %ld\n" 1156 "phys. address bits\t: %ld\n" 1157 "max. addr. space #\t: %ld\n" 1158 "BogoMIPS\t\t: %lu.%02lu\n" 1159 "kernel unaligned acc\t: %ld (pc=%lx,va=%lx)\n" 1160 "user unaligned acc\t: %ld (pc=%lx,va=%lx)\n" 1161 "platform string\t\t: %s\n" 1162 "cpus detected\t\t: %d\n", 1163 cpu_name, cpu->variation, cpu->revision, 1164 (char*)cpu->serial_no, 1165 systype_name, sysvariation_name, hwrpb->sys_revision, 1166 (char*)hwrpb->ssn, 1167 est_cycle_freq ? : hwrpb->cycle_freq, 1168 est_cycle_freq ? "est." : "", 1169 timer_freq / 100, timer_freq % 100, 1170 hwrpb->pagesize, 1171 hwrpb->pa_bits, 1172 hwrpb->max_asn, 1173 loops_per_jiffy / (500000/HZ), 1174 (loops_per_jiffy / (5000/HZ)) % 100, 1175 unaligned[0].count, unaligned[0].pc, unaligned[0].va, 1176 unaligned[1].count, unaligned[1].pc, unaligned[1].va, 1177 platform_string(), nr_processors); 1178 1179 #ifdef CONFIG_SMP 1180 seq_printf(f, "cpus active\t\t: %u\n" 1181 "cpu active mask\t\t: %016lx\n", 1182 num_online_cpus(), cpumask_bits(cpu_possible_mask)[0]); 1183 #endif 1184 1185 show_cache_size (f, "L1 Icache", alpha_l1i_cacheshape); 1186 show_cache_size (f, "L1 Dcache", alpha_l1d_cacheshape); 1187 show_cache_size (f, "L2 cache", alpha_l2_cacheshape); 1188 show_cache_size (f, "L3 cache", alpha_l3_cacheshape); 1189 1190 return 0; 1191 } 1192 1193 static int __init 1194 read_mem_block(int *addr, int stride, int size) 1195 { 1196 long nloads = size / stride, cnt, tmp; 1197 1198 __asm__ __volatile__( 1199 " rpcc %0\n" 1200 "1: ldl %3,0(%2)\n" 1201 " subq %1,1,%1\n" 1202 /* Next two XORs introduce an explicit data dependency between 1203 consecutive loads in the loop, which will give us true load 1204 latency. */ 1205 " xor %3,%2,%2\n" 1206 " xor %3,%2,%2\n" 1207 " addq %2,%4,%2\n" 1208 " bne %1,1b\n" 1209 " rpcc %3\n" 1210 " subl %3,%0,%0\n" 1211 : "=&r" (cnt), "=&r" (nloads), "=&r" (addr), "=&r" (tmp) 1212 : "r" (stride), "1" (nloads), "2" (addr)); 1213 1214 return cnt / (size / stride); 1215 } 1216 1217 #define CSHAPE(totalsize, linesize, assoc) \ 1218 ((totalsize & ~0xff) | (linesize << 4) | assoc) 1219 1220 /* ??? EV5 supports up to 64M, but did the systems with more than 1221 16M of BCACHE ever exist? */ 1222 #define MAX_BCACHE_SIZE 16*1024*1024 1223 1224 /* Note that the offchip caches are direct mapped on all Alphas. */ 1225 static int __init 1226 external_cache_probe(int minsize, int width) 1227 { 1228 int cycles, prev_cycles = 1000000; 1229 int stride = 1 << width; 1230 long size = minsize, maxsize = MAX_BCACHE_SIZE * 2; 1231 1232 if (maxsize > (max_low_pfn + 1) << PAGE_SHIFT) 1233 maxsize = 1 << (ilog2(max_low_pfn + 1) + PAGE_SHIFT); 1234 1235 /* Get the first block cached. */ 1236 read_mem_block(__va(0), stride, size); 1237 1238 while (size < maxsize) { 1239 /* Get an average load latency in cycles. */ 1240 cycles = read_mem_block(__va(0), stride, size); 1241 if (cycles > prev_cycles * 2) { 1242 /* Fine, we exceed the cache. */ 1243 printk("%ldK Bcache detected; load hit latency %d " 1244 "cycles, load miss latency %d cycles\n", 1245 size >> 11, prev_cycles, cycles); 1246 return CSHAPE(size >> 1, width, 1); 1247 } 1248 /* Try to get the next block cached. */ 1249 read_mem_block(__va(size), stride, size); 1250 prev_cycles = cycles; 1251 size <<= 1; 1252 } 1253 return -1; /* No BCACHE found. */ 1254 } 1255 1256 static void __init 1257 determine_cpu_caches (unsigned int cpu_type) 1258 { 1259 int L1I, L1D, L2, L3; 1260 1261 switch (cpu_type) { 1262 case EV4_CPU: 1263 case EV45_CPU: 1264 { 1265 if (cpu_type == EV4_CPU) 1266 L1I = CSHAPE(8*1024, 5, 1); 1267 else 1268 L1I = CSHAPE(16*1024, 5, 1); 1269 L1D = L1I; 1270 L3 = -1; 1271 1272 /* BIU_CTL is a write-only Abox register. PALcode has a 1273 shadow copy, and may be available from some versions 1274 of the CSERVE PALcall. If we can get it, then 1275 1276 unsigned long biu_ctl, size; 1277 size = 128*1024 * (1 << ((biu_ctl >> 28) & 7)); 1278 L2 = CSHAPE (size, 5, 1); 1279 1280 Unfortunately, we can't rely on that. 1281 */ 1282 L2 = external_cache_probe(128*1024, 5); 1283 break; 1284 } 1285 1286 case LCA4_CPU: 1287 { 1288 unsigned long car, size; 1289 1290 L1I = L1D = CSHAPE(8*1024, 5, 1); 1291 L3 = -1; 1292 1293 car = *(vuip) phys_to_virt (0x120000078UL); 1294 size = 64*1024 * (1 << ((car >> 5) & 7)); 1295 /* No typo -- 8 byte cacheline size. Whodathunk. */ 1296 L2 = (car & 1 ? CSHAPE (size, 3, 1) : -1); 1297 break; 1298 } 1299 1300 case EV5_CPU: 1301 case EV56_CPU: 1302 { 1303 unsigned long sc_ctl, width; 1304 1305 L1I = L1D = CSHAPE(8*1024, 5, 1); 1306 1307 /* Check the line size of the Scache. */ 1308 sc_ctl = *(vulp) phys_to_virt (0xfffff000a8UL); 1309 width = sc_ctl & 0x1000 ? 6 : 5; 1310 L2 = CSHAPE (96*1024, width, 3); 1311 1312 /* BC_CONTROL and BC_CONFIG are write-only IPRs. PALcode 1313 has a shadow copy, and may be available from some versions 1314 of the CSERVE PALcall. If we can get it, then 1315 1316 unsigned long bc_control, bc_config, size; 1317 size = 1024*1024 * (1 << ((bc_config & 7) - 1)); 1318 L3 = (bc_control & 1 ? CSHAPE (size, width, 1) : -1); 1319 1320 Unfortunately, we can't rely on that. 1321 */ 1322 L3 = external_cache_probe(1024*1024, width); 1323 break; 1324 } 1325 1326 case PCA56_CPU: 1327 case PCA57_CPU: 1328 { 1329 if (cpu_type == PCA56_CPU) { 1330 L1I = CSHAPE(16*1024, 6, 1); 1331 L1D = CSHAPE(8*1024, 5, 1); 1332 } else { 1333 L1I = CSHAPE(32*1024, 6, 2); 1334 L1D = CSHAPE(16*1024, 5, 1); 1335 } 1336 L3 = -1; 1337 1338 #if 0 1339 unsigned long cbox_config, size; 1340 1341 cbox_config = *(vulp) phys_to_virt (0xfffff00008UL); 1342 size = 512*1024 * (1 << ((cbox_config >> 12) & 3)); 1343 1344 L2 = ((cbox_config >> 31) & 1 ? CSHAPE (size, 6, 1) : -1); 1345 #else 1346 L2 = external_cache_probe(512*1024, 6); 1347 #endif 1348 break; 1349 } 1350 1351 case EV6_CPU: 1352 case EV67_CPU: 1353 case EV68CB_CPU: 1354 case EV68AL_CPU: 1355 case EV68CX_CPU: 1356 case EV69_CPU: 1357 L1I = L1D = CSHAPE(64*1024, 6, 2); 1358 L2 = external_cache_probe(1024*1024, 6); 1359 L3 = -1; 1360 break; 1361 1362 case EV7_CPU: 1363 case EV79_CPU: 1364 L1I = L1D = CSHAPE(64*1024, 6, 2); 1365 L2 = CSHAPE(7*1024*1024/4, 6, 7); 1366 L3 = -1; 1367 break; 1368 1369 default: 1370 /* Nothing known about this cpu type. */ 1371 L1I = L1D = L2 = L3 = 0; 1372 break; 1373 } 1374 1375 alpha_l1i_cacheshape = L1I; 1376 alpha_l1d_cacheshape = L1D; 1377 alpha_l2_cacheshape = L2; 1378 alpha_l3_cacheshape = L3; 1379 } 1380 1381 /* 1382 * We show only CPU #0 info. 1383 */ 1384 static void * 1385 c_start(struct seq_file *f, loff_t *pos) 1386 { 1387 return *pos ? NULL : (char *)hwrpb + hwrpb->processor_offset; 1388 } 1389 1390 static void * 1391 c_next(struct seq_file *f, void *v, loff_t *pos) 1392 { 1393 (*pos)++; 1394 return NULL; 1395 } 1396 1397 static void 1398 c_stop(struct seq_file *f, void *v) 1399 { 1400 } 1401 1402 const struct seq_operations cpuinfo_op = { 1403 .start = c_start, 1404 .next = c_next, 1405 .stop = c_stop, 1406 .show = show_cpuinfo, 1407 }; 1408 1409 1410 static int 1411 alpha_panic_event(struct notifier_block *this, unsigned long event, void *ptr) 1412 { 1413 #if 1 1414 /* FIXME FIXME FIXME */ 1415 /* If we are using SRM and serial console, just hard halt here. */ 1416 if (alpha_using_srm && srmcons_output) 1417 __halt(); 1418 #endif 1419 return NOTIFY_DONE; 1420 } 1421 1422 static __init int add_pcspkr(void) 1423 { 1424 struct platform_device *pd; 1425 int ret; 1426 1427 pd = platform_device_alloc("pcspkr", -1); 1428 if (!pd) 1429 return -ENOMEM; 1430 1431 ret = platform_device_add(pd); 1432 if (ret) 1433 platform_device_put(pd); 1434 1435 return ret; 1436 } 1437 device_initcall(add_pcspkr); 1438