1 /* 2 * (C) Copyright IBM Corporation 2006 3 * Copyright (c) 2007, 2009, 2011, Oracle and/or its affiliates. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * on the rights to use, copy, modify, merge, publish, distribute, sub 10 * license, and/or sell copies of the Software, and to permit persons to whom 11 * the Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 20 * IBM AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 */ 25 /* 26 * Solaris devfs interfaces 27 */ 28 29 #include <stdlib.h> 30 #include <strings.h> 31 #include <stdio.h> 32 #include <unistd.h> 33 #include <sys/types.h> 34 #include <fcntl.h> 35 #include <sys/mman.h> 36 #include <errno.h> 37 #include <sys/pci.h> 38 #include <libdevinfo.h> 39 #include "pci_tools.h" 40 41 #include "pciaccess.h" 42 #include "pciaccess_private.h" 43 44 /* #define DEBUG */ 45 46 #define INITIAL_NUM_DEVICES 256 47 #define CELL_NUMS_1275 (sizeof(pci_regspec_t) / sizeof(uint_t)) 48 49 typedef union { 50 uint8_t bytes[16 * sizeof (uint32_t)]; 51 uint32_t dwords[16]; 52 } pci_conf_hdr_t; 53 54 typedef struct i_devnode { 55 uint8_t bus; 56 uint8_t dev; 57 uint8_t func; 58 di_node_t node; 59 } i_devnode_t; 60 61 typedef struct nexus { 62 int fd; 63 int first_bus; 64 int last_bus; 65 int domain; 66 char *path; /* for errors/debugging; fd is all we need */ 67 char *dev_path; 68 struct nexus *next; 69 } nexus_t; 70 71 typedef struct probe_info { 72 volatile size_t num_allocated_elems; 73 volatile size_t num_devices; 74 struct pci_device_private * volatile devices; 75 } probe_info_t; 76 77 static nexus_t *nexus_list = NULL; 78 static int xsvc_fd = -1; 79 80 /* 81 * Read config space in native processor endianness. Endian-neutral 82 * processing can then take place. On big endian machines, MSB and LSB 83 * of little endian data end up switched if read as little endian. 84 * They are in correct order if read as big endian. 85 */ 86 #if defined(__sparc) 87 # define NATIVE_ENDIAN PCITOOL_ACC_ATTR_ENDN_BIG 88 #elif defined(__x86) 89 # define NATIVE_ENDIAN PCITOOL_ACC_ATTR_ENDN_LTL 90 #else 91 # error "ISA is neither __sparc nor __x86" 92 #endif 93 94 /* 95 * Identify problematic southbridges. These have device id 0x5249 and 96 * vendor id 0x10b9. Check for revision ID 0 and class code 060400 as well. 97 * Values are little endian, so they are reversed for SPARC. 98 * 99 * Check for these southbridges on all architectures, as the issue is a 100 * southbridge issue, independent of processor. 101 * 102 * If one of these is found during probing, skip probing other devs/funcs on 103 * the rest of the bus, since the southbridge and all devs underneath will 104 * otherwise disappear. 105 */ 106 #if (NATIVE_ENDIAN == PCITOOL_ACC_ATTR_ENDN_BIG) 107 # define U45_SB_DEVID_VID 0xb9104952 108 # define U45_SB_CLASS_RID 0x00000406 109 #else 110 # define U45_SB_DEVID_VID 0x524910b9 111 # define U45_SB_CLASS_RID 0x06040000 112 #endif 113 114 static int pci_device_solx_devfs_map_range(struct pci_device *dev, 115 struct pci_device_mapping *map); 116 117 static int pci_device_solx_devfs_read_rom( struct pci_device * dev, 118 void * buffer ); 119 120 static int pci_device_solx_devfs_probe( struct pci_device * dev ); 121 122 static int pci_device_solx_devfs_read( struct pci_device * dev, void * data, 123 pciaddr_t offset, pciaddr_t size, pciaddr_t * bytes_read ); 124 125 static int pci_device_solx_devfs_write( struct pci_device * dev, 126 const void * data, pciaddr_t offset, pciaddr_t size, 127 pciaddr_t * bytes_written ); 128 129 static int probe_dev(nexus_t *nexus, pcitool_reg_t *prg_p, probe_info_t *pinfo); 130 131 static int do_probe(nexus_t *nexus, probe_info_t *pinfo); 132 133 static int probe_nexus_node(di_node_t di_node, di_minor_t minor, void *arg); 134 135 static void pci_system_solx_devfs_destroy( void ); 136 137 static int get_config_header(int fd, uint8_t bus_no, uint8_t dev_no, 138 uint8_t func_no, pci_conf_hdr_t *config_hdr_p); 139 140 int pci_system_solx_devfs_create( void ); 141 142 static const struct pci_system_methods solx_devfs_methods = { 143 .destroy = pci_system_solx_devfs_destroy, 144 .destroy_device = NULL, 145 .read_rom = pci_device_solx_devfs_read_rom, 146 .probe = pci_device_solx_devfs_probe, 147 .map_range = pci_device_solx_devfs_map_range, 148 .unmap_range = pci_device_generic_unmap_range, 149 150 .read = pci_device_solx_devfs_read, 151 .write = pci_device_solx_devfs_write, 152 153 .fill_capabilities = pci_fill_capabilities_generic 154 }; 155 156 static nexus_t * 157 find_nexus_for_bus( int domain, int bus ) 158 { 159 nexus_t *nexus; 160 161 for (nexus = nexus_list ; nexus != NULL ; nexus = nexus->next) { 162 if ((domain == nexus->domain) && 163 (bus >= nexus->first_bus) && (bus <= nexus->last_bus)) { 164 return nexus; 165 } 166 } 167 return NULL; 168 } 169 170 #define GET_CONFIG_VAL_8(offset) (config_hdr.bytes[offset]) 171 #define GET_CONFIG_VAL_16(offset) \ 172 (uint16_t) (GET_CONFIG_VAL_8(offset) + (GET_CONFIG_VAL_8(offset+1) << 8)) 173 #define GET_CONFIG_VAL_32(offset) \ 174 (uint32_t) (GET_CONFIG_VAL_8(offset) + \ 175 (GET_CONFIG_VAL_8(offset+1) << 8) + \ 176 (GET_CONFIG_VAL_8(offset+2) << 16) + \ 177 (GET_CONFIG_VAL_8(offset+3) << 24)) 178 179 /* 180 * Release all the resources 181 * Solaris version 182 */ 183 static void 184 pci_system_solx_devfs_destroy( void ) 185 { 186 /* 187 * The memory allocated for pci_sys & devices in create routines 188 * will be freed in pci_system_cleanup. 189 * Need to free system-specific allocations here. 190 */ 191 nexus_t *nexus, *next; 192 193 for (nexus = nexus_list ; nexus != NULL ; nexus = next) { 194 next = nexus->next; 195 close(nexus->fd); 196 free(nexus->path); 197 free(nexus->dev_path); 198 free(nexus); 199 } 200 nexus_list = NULL; 201 202 if (xsvc_fd >= 0) { 203 close(xsvc_fd); 204 xsvc_fd = -1; 205 } 206 } 207 208 /* 209 * Attempt to access PCI subsystem using Solaris's devfs interface. 210 * Solaris version 211 */ 212 _pci_hidden int 213 pci_system_solx_devfs_create( void ) 214 { 215 int err = 0; 216 di_node_t di_node; 217 probe_info_t pinfo; 218 struct pci_device_private *devices; 219 220 if (nexus_list != NULL) { 221 return 0; 222 } 223 224 if ((di_node = di_init("/", DINFOCPYALL)) == DI_NODE_NIL) { 225 err = errno; 226 (void) fprintf(stderr, "di_init() failed: %s\n", 227 strerror(errno)); 228 return (err); 229 } 230 231 if ((devices = calloc(INITIAL_NUM_DEVICES, 232 sizeof (struct pci_device_private))) == NULL) { 233 err = errno; 234 di_fini(di_node); 235 return (err); 236 } 237 238 pinfo.num_allocated_elems = INITIAL_NUM_DEVICES; 239 pinfo.num_devices = 0; 240 pinfo.devices = devices; 241 (void) di_walk_minor(di_node, DDI_NT_REGACC, 0, &pinfo, probe_nexus_node); 242 di_fini(di_node); 243 244 if ((pci_sys = calloc(1, sizeof (struct pci_system))) == NULL) { 245 err = errno; 246 free(devices); 247 return (err); 248 } 249 pci_sys->methods = &solx_devfs_methods; 250 pci_sys->devices = pinfo.devices; 251 pci_sys->num_devices = pinfo.num_devices; 252 253 return (err); 254 } 255 256 /* 257 * Retrieve first 16 dwords of device's config header, except for the first 258 * dword. First 16 dwords are defined by the PCI specification. 259 */ 260 static int 261 get_config_header(int fd, uint8_t bus_no, uint8_t dev_no, uint8_t func_no, 262 pci_conf_hdr_t *config_hdr_p) 263 { 264 pcitool_reg_t cfg_prg; 265 int i; 266 int rval = 0; 267 268 /* Prepare a local pcitool_reg_t so as to not disturb the caller's. */ 269 cfg_prg.offset = 0; 270 cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_4 + NATIVE_ENDIAN; 271 cfg_prg.bus_no = bus_no; 272 cfg_prg.dev_no = dev_no; 273 cfg_prg.func_no = func_no; 274 cfg_prg.barnum = 0; 275 cfg_prg.user_version = PCITOOL_USER_VERSION; 276 277 /* Get dwords 1-15 of config space. They must be read as uint32_t. */ 278 for (i = 1; i < (sizeof (pci_conf_hdr_t) / sizeof (uint32_t)); i++) { 279 cfg_prg.offset += sizeof (uint32_t); 280 if ((rval = ioctl(fd, PCITOOL_DEVICE_GET_REG, &cfg_prg)) != 0) { 281 break; 282 } 283 config_hdr_p->dwords[i] = (uint32_t)cfg_prg.data; 284 } 285 286 return (rval); 287 } 288 289 290 /* 291 * Probe device's functions. Modifies many fields in the prg_p. 292 */ 293 static int 294 probe_dev(nexus_t *nexus, pcitool_reg_t *prg_p, probe_info_t *pinfo) 295 { 296 pci_conf_hdr_t config_hdr; 297 boolean_t multi_function_device; 298 int8_t func; 299 int8_t first_func = 0; 300 int8_t last_func = PCI_REG_FUNC_M >> PCI_REG_FUNC_SHIFT; 301 int rval = 0; 302 struct pci_device * pci_base; 303 304 /* 305 * Loop through at least func=first_func. Continue looping through 306 * functions if there are no errors and the device is a multi-function 307 * device. 308 * 309 * (Note, if first_func == 0, header will show whether multifunction 310 * device and set multi_function_device. If first_func != 0, then we 311 * will force the loop as the user wants a specific function to be 312 * checked. 313 */ 314 for (func = first_func, multi_function_device = B_FALSE; 315 ((func <= last_func) && 316 ((func == first_func) || (multi_function_device))); 317 func++) { 318 prg_p->func_no = func; 319 320 /* 321 * Four things can happen here: 322 * 323 * 1) ioctl comes back as EFAULT and prg_p->status is 324 * PCITOOL_INVALID_ADDRESS. There is no device at this location. 325 * 326 * 2) ioctl comes back successful and the data comes back as 327 * zero. Config space is mapped but no device responded. 328 * 329 * 3) ioctl comes back successful and the data comes back as 330 * non-zero. We've found a device. 331 * 332 * 4) Some other error occurs in an ioctl. 333 */ 334 335 prg_p->status = PCITOOL_SUCCESS; 336 prg_p->offset = 0; 337 prg_p->data = 0; 338 prg_p->user_version = PCITOOL_USER_VERSION; 339 340 errno = 0; 341 if (((rval = ioctl(nexus->fd, PCITOOL_DEVICE_GET_REG, prg_p)) != 0) || 342 (prg_p->data == 0xffffffff)) { 343 344 /* 345 * Accept errno == EINVAL along with status of 346 * PCITOOL_OUT_OF_RANGE because some systems 347 * don't implement the full range of config space. 348 * Leave the loop quietly in this case. 349 */ 350 if ((errno == EINVAL) || 351 (prg_p->status == PCITOOL_OUT_OF_RANGE)) { 352 break; 353 } 354 355 /* 356 * Exit silently with ENXIO as this means that there are 357 * no devices under the pci root nexus. 358 */ 359 else if ((errno == ENXIO) && 360 (prg_p->status == PCITOOL_IO_ERROR)) { 361 break; 362 } 363 364 /* 365 * Expect errno == EFAULT along with status of 366 * PCITOOL_INVALID_ADDRESS because there won't be 367 * devices at each stop. Quit on any other error. 368 */ 369 else if (((errno != EFAULT) || 370 (prg_p->status != PCITOOL_INVALID_ADDRESS)) && 371 (prg_p->data != 0xffffffff)) { 372 break; 373 } 374 375 /* 376 * If no function at this location, 377 * just advance to the next function. 378 */ 379 else { 380 rval = 0; 381 } 382 383 /* 384 * Data came back as 0. 385 * Treat as unresponsive device and check next device. 386 */ 387 } else if (prg_p->data == 0) { 388 rval = 0; 389 break; /* Func loop. */ 390 391 /* Found something. */ 392 } else { 393 config_hdr.dwords[0] = (uint32_t)prg_p->data; 394 395 /* Get the rest of the PCI header. */ 396 if ((rval = get_config_header(nexus->fd, prg_p->bus_no, 397 prg_p->dev_no, prg_p->func_no, 398 &config_hdr)) != 0) { 399 break; 400 } 401 402 /* 403 * Special case for the type of Southbridge found on 404 * Ultra-45 and other sun4u fire workstations. 405 */ 406 if ((config_hdr.dwords[0] == U45_SB_DEVID_VID) && 407 (config_hdr.dwords[2] == U45_SB_CLASS_RID)) { 408 rval = ECANCELED; 409 break; 410 } 411 412 /* 413 * Found one device with bus number, device number and 414 * function number. 415 */ 416 417 pci_base = &pinfo->devices[pinfo->num_devices].base; 418 419 pci_base->domain = nexus->domain; 420 pci_base->bus = prg_p->bus_no; 421 pci_base->dev = prg_p->dev_no; 422 pci_base->func = func; 423 424 /* 425 * for the format of device_class, see struct pci_device; 426 */ 427 428 pci_base->device_class = 429 (GET_CONFIG_VAL_8(PCI_CONF_BASCLASS) << 16) | 430 (GET_CONFIG_VAL_8(PCI_CONF_SUBCLASS) << 8) | 431 GET_CONFIG_VAL_8(PCI_CONF_PROGCLASS); 432 433 pci_base->revision = GET_CONFIG_VAL_8(PCI_CONF_REVID); 434 pci_base->vendor_id = GET_CONFIG_VAL_16(PCI_CONF_VENID); 435 pci_base->device_id = GET_CONFIG_VAL_16(PCI_CONF_DEVID); 436 pci_base->subvendor_id = GET_CONFIG_VAL_16(PCI_CONF_SUBVENID); 437 pci_base->subdevice_id = GET_CONFIG_VAL_16(PCI_CONF_SUBSYSID); 438 439 pinfo->devices[pinfo->num_devices].header_type 440 = GET_CONFIG_VAL_8(PCI_CONF_HEADER); 441 442 #ifdef DEBUG 443 fprintf(stderr, 444 "nexus = %s, busno = %x, devno = %x, funcno = %x\n", 445 nexus->path, prg_p->bus_no, prg_p->dev_no, func); 446 #endif 447 448 pinfo->num_devices++; 449 if (pinfo->num_devices == pinfo->num_allocated_elems) { 450 struct pci_device_private *new_devs; 451 size_t new_num_elems = pinfo->num_allocated_elems * 2; 452 453 new_devs = realloc(pinfo->devices, 454 new_num_elems * sizeof (struct pci_device_private)); 455 if (new_devs == NULL) { 456 (void) fprintf(stderr, 457 "Maximum number of PCI devices found," 458 " discarding additional devices\n"); 459 return (rval); 460 } 461 (void) memset(&new_devs[pinfo->num_devices], 0, 462 pinfo->num_allocated_elems * 463 sizeof (struct pci_device_private)); 464 pinfo->num_allocated_elems = new_num_elems; 465 pinfo->devices = new_devs; 466 } 467 468 /* 469 * Accommodate devices which state their 470 * multi-functionality only in their function 0 config 471 * space. Note multi-functionality throughout probing 472 * of all of this device's functions. 473 */ 474 if (config_hdr.bytes[PCI_CONF_HEADER] & PCI_HEADER_MULTI) { 475 multi_function_device = B_TRUE; 476 } 477 } 478 } 479 480 return (rval); 481 } 482 483 /* 484 * This function is called from di_walk_minor() when any PROBE is processed 485 */ 486 static int 487 probe_nexus_node(di_node_t di_node, di_minor_t minor, void *arg) 488 { 489 probe_info_t *pinfo = (probe_info_t *)arg; 490 char *nexus_name, *nexus_dev_path; 491 nexus_t *nexus; 492 int fd; 493 char nexus_path[MAXPATHLEN]; 494 495 di_prop_t prop; 496 char *strings; 497 int *ints; 498 int numval; 499 int pci_node = 0; 500 int first_bus = 0, last_bus = PCI_REG_BUS_G(PCI_REG_BUS_M); 501 int domain = 0; 502 503 #ifdef DEBUG 504 nexus_name = di_devfs_minor_path(minor); 505 fprintf(stderr, "-- device name: %s\n", nexus_name); 506 #endif 507 508 for (prop = di_prop_next(di_node, NULL); prop != NULL; 509 prop = di_prop_next(di_node, prop)) { 510 511 const char *prop_name = di_prop_name(prop); 512 513 #ifdef DEBUG 514 fprintf(stderr, " property: %s\n", prop_name); 515 #endif 516 517 if (strcmp(prop_name, "device_type") == 0) { 518 numval = di_prop_strings(prop, &strings); 519 if (numval != 1 || strncmp(strings, "pci", 3) != 0) { 520 /* not a PCI node, bail */ 521 return (DI_WALK_CONTINUE); 522 } 523 pci_node = 1; 524 } 525 else if (strcmp(prop_name, "class-code") == 0) { 526 /* not a root bus node, bail */ 527 return (DI_WALK_CONTINUE); 528 } 529 else if (strcmp(prop_name, "bus-range") == 0) { 530 numval = di_prop_ints(prop, &ints); 531 if (numval == 2) { 532 first_bus = ints[0]; 533 last_bus = ints[1]; 534 } 535 } 536 else if (strcmp(prop_name, "pciseg") == 0) { 537 numval = di_prop_ints(prop, &ints); 538 if (numval == 1) { 539 domain = ints[0]; 540 } 541 } 542 } 543 544 #ifdef __x86 /* sparc pci nodes don't have the device_type set */ 545 if (pci_node != 1) 546 return (DI_WALK_CONTINUE); 547 #endif 548 549 /* we have a PCI root bus node. */ 550 nexus = calloc(1, sizeof(nexus_t)); 551 if (nexus == NULL) { 552 (void) fprintf(stderr, "Error allocating memory for nexus: %s\n", 553 strerror(errno)); 554 return (DI_WALK_TERMINATE); 555 } 556 nexus->first_bus = first_bus; 557 nexus->last_bus = last_bus; 558 nexus->domain = domain; 559 560 nexus_name = di_devfs_minor_path(minor); 561 if (nexus_name == NULL) { 562 (void) fprintf(stderr, "Error getting nexus path: %s\n", 563 strerror(errno)); 564 free(nexus); 565 return (DI_WALK_CONTINUE); 566 } 567 568 snprintf(nexus_path, sizeof(nexus_path), "/devices%s", nexus_name); 569 di_devfs_path_free(nexus_name); 570 571 #ifdef DEBUG 572 fprintf(stderr, "nexus = %s, bus-range = %d - %d\n", 573 nexus_path, first_bus, last_bus); 574 #endif 575 576 if ((fd = open(nexus_path, O_RDWR)) >= 0) { 577 nexus->fd = fd; 578 nexus->path = strdup(nexus_path); 579 nexus_dev_path = di_devfs_path(di_node); 580 nexus->dev_path = strdup(nexus_dev_path); 581 di_devfs_path_free(nexus_dev_path); 582 if ((do_probe(nexus, pinfo) != 0) && (errno != ENXIO)) { 583 (void) fprintf(stderr, "Error probing node %s: %s\n", 584 nexus_path, strerror(errno)); 585 (void) close(fd); 586 free(nexus->path); 587 free(nexus->dev_path); 588 free(nexus); 589 } else { 590 nexus->next = nexus_list; 591 nexus_list = nexus; 592 } 593 } else { 594 (void) fprintf(stderr, "Error opening %s: %s\n", 595 nexus_path, strerror(errno)); 596 free(nexus); 597 } 598 599 return DI_WALK_CONTINUE; 600 } 601 602 603 /* 604 * Solaris version 605 * Probe a given nexus config space for devices. 606 * 607 * fd is the file descriptor of the nexus. 608 * input_args contains commandline options as specified by the user. 609 */ 610 static int 611 do_probe(nexus_t *nexus, probe_info_t *pinfo) 612 { 613 pcitool_reg_t prg; 614 uint32_t bus; 615 uint8_t dev; 616 uint32_t last_bus = nexus->last_bus; 617 uint8_t last_dev = PCI_REG_DEV_M >> PCI_REG_DEV_SHIFT; 618 uint8_t first_bus = nexus->first_bus; 619 uint8_t first_dev = 0; 620 int rval = 0; 621 622 prg.barnum = 0; /* Config space. */ 623 624 /* Must read in 4-byte quantities. */ 625 prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_4 + NATIVE_ENDIAN; 626 627 prg.data = 0; 628 629 /* 630 * Loop through all valid bus / dev / func combinations to check for 631 * all devices, with the following exceptions: 632 * 633 * When nothing is found at function 0 of a bus / dev combination, skip 634 * the other functions of that bus / dev combination. 635 * 636 * When a found device's function 0 is probed and it is determined that 637 * it is not a multifunction device, skip probing of that device's 638 * other functions. 639 */ 640 for (bus = first_bus; ((bus <= last_bus) && (rval == 0)); bus++) { 641 prg.bus_no = (uint8_t)bus; 642 643 for (dev = first_dev; ((dev <= last_dev) && (rval == 0)); dev++) { 644 prg.dev_no = dev; 645 rval = probe_dev(nexus, &prg, pinfo); 646 } 647 648 /* 649 * Ultra-45 southbridge workaround: 650 * ECANCELED tells to skip to the next bus. 651 */ 652 if (rval == ECANCELED) { 653 rval = 0; 654 } 655 } 656 657 return (rval); 658 } 659 660 static int 661 find_target_node(di_node_t node, void *arg) 662 { 663 int *regbuf = NULL; 664 int len = 0; 665 uint32_t busno, funcno, devno; 666 i_devnode_t *devnode = (i_devnode_t *)arg; 667 668 /* 669 * Test the property functions, only for testing 670 */ 671 /* 672 void *prop = DI_PROP_NIL; 673 674 (void) fprintf(stderr, "start of node 0x%x\n", node->nodeid); 675 while ((prop = di_prop_hw_next(node, prop)) != DI_PROP_NIL) { 676 int i; 677 (void) fprintf(stderr, "name=%s: ", di_prop_name(prop)); 678 len = 0; 679 if (!strcmp(di_prop_name(prop), "reg")) { 680 len = di_prop_ints(prop, ®buf); 681 } 682 for (i = 0; i < len; i++) { 683 fprintf(stderr, "0x%0x.", regbuf[i]); 684 } 685 fprintf(stderr, "\n"); 686 } 687 (void) fprintf(stderr, "end of node 0x%x\n", node->nodeid); 688 */ 689 690 len = di_prop_lookup_ints(DDI_DEV_T_ANY, node, "reg", ®buf); 691 692 if (len <= 0) { 693 #ifdef DEBUG 694 fprintf(stderr, "error = %x\n", errno); 695 fprintf(stderr, "can not find assigned-address\n"); 696 #endif 697 return (DI_WALK_CONTINUE); 698 } 699 700 busno = PCI_REG_BUS_G(regbuf[0]); 701 devno = PCI_REG_DEV_G(regbuf[0]); 702 funcno = PCI_REG_FUNC_G(regbuf[0]); 703 704 if ((busno == devnode->bus) && 705 (devno == devnode->dev) && 706 (funcno == devnode->func)) { 707 devnode->node = node; 708 709 return (DI_WALK_TERMINATE); 710 } 711 712 return (DI_WALK_CONTINUE); 713 } 714 715 /* 716 * Solaris version 717 */ 718 static int 719 pci_device_solx_devfs_probe( struct pci_device * dev ) 720 { 721 uint8_t config[256]; 722 int err; 723 di_node_t rnode = DI_NODE_NIL; 724 i_devnode_t args = { 0, 0, 0, DI_NODE_NIL }; 725 int *regbuf; 726 pci_regspec_t *reg; 727 int i; 728 pciaddr_t bytes; 729 int len = 0; 730 uint ent = 0; 731 732 err = pci_device_solx_devfs_read( dev, config, 0, 256, & bytes ); 733 734 if ( bytes >= 64 ) { 735 struct pci_device_private *priv = 736 (struct pci_device_private *) dev; 737 nexus_t *nexus; 738 739 if ( (nexus = find_nexus_for_bus(dev->domain, dev->bus)) == NULL ) 740 return ENODEV; 741 742 dev->vendor_id = (uint16_t)config[0] + ((uint16_t)config[1] << 8); 743 dev->device_id = (uint16_t)config[2] + ((uint16_t)config[3] << 8); 744 dev->device_class = (uint32_t)config[9] + 745 ((uint32_t)config[10] << 8) + 746 ((uint16_t)config[11] << 16); 747 748 /* 749 * device class code is already there. 750 * see probe_dev function. 751 */ 752 dev->revision = config[8]; 753 dev->subvendor_id = (uint16_t)config[44] + ((uint16_t)config[45] << 8); 754 dev->subdevice_id = (uint16_t)config[46] + ((uint16_t)config[47] << 8); 755 dev->irq = config[60]; 756 757 priv->header_type = config[14]; 758 /* 759 * starting to find if it is MEM/MEM64/IO 760 * using libdevinfo 761 */ 762 if ((rnode = di_init(nexus->dev_path, DINFOCPYALL)) == DI_NODE_NIL) { 763 err = errno; 764 (void) fprintf(stderr, "di_init failed: %s\n", strerror(errno)); 765 } else { 766 args.bus = dev->bus; 767 args.dev = dev->dev; 768 args.func = dev->func; 769 (void) di_walk_node(rnode, DI_WALK_CLDFIRST, 770 (void *)&args, find_target_node); 771 } 772 } 773 if (args.node != DI_NODE_NIL) { 774 /* 775 * It will succeed for sure, because it was 776 * successfully called in find_target_node 777 */ 778 len = di_prop_lookup_ints(DDI_DEV_T_ANY, args.node, 779 "assigned-addresses", 780 ®buf); 781 782 } 783 784 if (len <= 0) 785 goto cleanup; 786 787 788 /* 789 * how to find the size of rom??? 790 * if the device has expansion rom, 791 * it must be listed in the last 792 * cells because solaris find probe 793 * the base address from offset 0x10 794 * to 0x30h. So only check the last 795 * item. 796 */ 797 reg = (pci_regspec_t *)®buf[len - CELL_NUMS_1275]; 798 if (PCI_REG_REG_G(reg->pci_phys_hi) == PCI_CONF_ROM) { 799 /* 800 * rom can only be 32 bits 801 */ 802 dev->rom_size = reg->pci_size_low; 803 len = len - CELL_NUMS_1275; 804 } 805 else { 806 /* 807 * size default to 64K and base address 808 * default to 0xC0000 809 */ 810 dev->rom_size = 0x10000; 811 } 812 813 /* 814 * Solaris has its own BAR index. 815 * Linux give two region slot for 64 bit address. 816 */ 817 for (i = 0; i < len; i = i + CELL_NUMS_1275) { 818 819 reg = (pci_regspec_t *)®buf[i]; 820 ent = reg->pci_phys_hi & 0xff; 821 /* 822 * G35 broken in BAR0 823 */ 824 ent = (ent - PCI_CONF_BASE0) >> 2; 825 if (ent >= 6) { 826 fprintf(stderr, "error ent = %d\n", ent); 827 break; 828 } 829 830 /* 831 * non relocatable resource is excluded 832 * such like 0xa0000, 0x3b0. If it is met, 833 * the loop is broken; 834 */ 835 if (!PCI_REG_REG_G(reg->pci_phys_hi)) 836 break; 837 838 if (reg->pci_phys_hi & PCI_PREFETCH_B) { 839 dev->regions[ent].is_prefetchable = 1; 840 } 841 842 843 /* 844 * We split the shift count 32 into two 16 to 845 * avoid the complaining of the compiler 846 */ 847 dev->regions[ent].base_addr = reg->pci_phys_low + 848 ((reg->pci_phys_mid << 16) << 16); 849 dev->regions[ent].size = reg->pci_size_low + 850 ((reg->pci_size_hi << 16) << 16); 851 852 switch (reg->pci_phys_hi & PCI_REG_ADDR_M) { 853 case PCI_ADDR_IO: 854 dev->regions[ent].is_IO = 1; 855 break; 856 case PCI_ADDR_MEM32: 857 break; 858 case PCI_ADDR_MEM64: 859 dev->regions[ent].is_64 = 1; 860 /* 861 * Skip one slot for 64 bit address 862 */ 863 break; 864 } 865 } 866 867 cleanup: 868 if (rnode != DI_NODE_NIL) { 869 di_fini(rnode); 870 } 871 return (err); 872 } 873 874 /* 875 * Solaris version: read the VGA ROM data 876 */ 877 static int 878 pci_device_solx_devfs_read_rom( struct pci_device * dev, void * buffer ) 879 { 880 int err; 881 struct pci_device_mapping prom = { 882 .base = 0xC0000, 883 .size = dev->rom_size, 884 .flags = 0 885 }; 886 887 err = pci_device_solx_devfs_map_range(dev, &prom); 888 if (err == 0) { 889 (void) bcopy(prom.memory, buffer, dev->rom_size); 890 891 if (munmap(prom.memory, dev->rom_size) == -1) { 892 err = errno; 893 } 894 } 895 return err; 896 } 897 898 /* 899 * solaris version: Read the configurations space of the devices 900 */ 901 static int 902 pci_device_solx_devfs_read( struct pci_device * dev, void * data, 903 pciaddr_t offset, pciaddr_t size, 904 pciaddr_t * bytes_read ) 905 { 906 pcitool_reg_t cfg_prg; 907 int err = 0; 908 int i = 0; 909 nexus_t *nexus = find_nexus_for_bus(dev->domain, dev->bus); 910 911 *bytes_read = 0; 912 913 if ( nexus == NULL ) { 914 return ENODEV; 915 } 916 917 cfg_prg.offset = offset; 918 cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_1 + NATIVE_ENDIAN; 919 cfg_prg.bus_no = dev->bus; 920 cfg_prg.dev_no = dev->dev; 921 cfg_prg.func_no = dev->func; 922 cfg_prg.barnum = 0; 923 cfg_prg.user_version = PCITOOL_USER_VERSION; 924 925 for (i = 0; i < size; i += PCITOOL_ACC_ATTR_SIZE(PCITOOL_ACC_ATTR_SIZE_1)) 926 { 927 cfg_prg.offset = offset + i; 928 929 if ((err = ioctl(nexus->fd, PCITOOL_DEVICE_GET_REG, &cfg_prg)) != 0) { 930 fprintf(stderr, "read bdf<%s,%x,%x,%x,%llx> config space failure\n", 931 nexus->path, 932 cfg_prg.bus_no, 933 cfg_prg.dev_no, 934 cfg_prg.func_no, 935 cfg_prg.offset); 936 fprintf(stderr, "Failure cause = %x\n", err); 937 break; 938 } 939 940 ((uint8_t *)data)[i] = (uint8_t)cfg_prg.data; 941 /* 942 * DWORDS Offset or bytes Offset ?? 943 */ 944 } 945 *bytes_read = i; 946 947 return (err); 948 } 949 950 /* 951 * Solaris version 952 */ 953 static int 954 pci_device_solx_devfs_write( struct pci_device * dev, const void * data, 955 pciaddr_t offset, pciaddr_t size, 956 pciaddr_t * bytes_written ) 957 { 958 pcitool_reg_t cfg_prg; 959 int err = 0; 960 int cmd; 961 nexus_t *nexus = find_nexus_for_bus(dev->domain, dev->bus); 962 963 if ( bytes_written != NULL ) { 964 *bytes_written = 0; 965 } 966 967 if ( nexus == NULL ) { 968 return ENODEV; 969 } 970 971 cfg_prg.offset = offset; 972 switch (size) { 973 case 1: 974 cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_1 + NATIVE_ENDIAN; 975 break; 976 case 2: 977 cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_2 + NATIVE_ENDIAN; 978 break; 979 case 4: 980 cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_4 + NATIVE_ENDIAN; 981 break; 982 case 8: 983 cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_8 + NATIVE_ENDIAN; 984 break; 985 default: 986 return EINVAL; 987 } 988 cfg_prg.bus_no = dev->bus; 989 cfg_prg.dev_no = dev->dev; 990 cfg_prg.func_no = dev->func; 991 cfg_prg.barnum = 0; 992 cfg_prg.user_version = PCITOOL_USER_VERSION; 993 cfg_prg.data = *((uint64_t *)data); 994 995 /* 996 * Check if this device is bridge device. 997 * If it is, it is also a nexus node??? 998 * It seems that there is no explicit 999 * PCI nexus device for X86, so not applicable 1000 * from pcitool_bus_reg_ops in pci_tools.c 1001 */ 1002 cmd = PCITOOL_DEVICE_SET_REG; 1003 1004 if ((err = ioctl(nexus->fd, cmd, &cfg_prg)) != 0) { 1005 return (err); 1006 } 1007 *bytes_written = size; 1008 1009 return (err); 1010 } 1011 1012 1013 /** 1014 * Map a memory region for a device using /dev/xsvc. 1015 * 1016 * \param dev Device whose memory region is to be mapped. 1017 * \param map Parameters of the mapping that is to be created. 1018 * 1019 * \return 1020 * Zero on success or an \c errno value on failure. 1021 */ 1022 static int 1023 pci_device_solx_devfs_map_range(struct pci_device *dev, 1024 struct pci_device_mapping *map) 1025 { 1026 const int prot = ((map->flags & PCI_DEV_MAP_FLAG_WRITABLE) != 0) 1027 ? (PROT_READ | PROT_WRITE) : PROT_READ; 1028 int err = 0; 1029 1030 /* 1031 * Still used xsvc to do the user space mapping 1032 */ 1033 if (xsvc_fd < 0) { 1034 if ((xsvc_fd = open("/dev/xsvc", O_RDWR)) < 0) { 1035 err = errno; 1036 (void) fprintf(stderr, "can not open /dev/xsvc: %s\n", 1037 strerror(errno)); 1038 return err; 1039 } 1040 } 1041 1042 map->memory = mmap(NULL, map->size, prot, MAP_SHARED, xsvc_fd, map->base); 1043 if (map->memory == MAP_FAILED) { 1044 err = errno; 1045 1046 (void) fprintf(stderr, "map rom region =%llx failed: %s\n", 1047 map->base, strerror(errno)); 1048 } 1049 1050 return err; 1051 } 1052