1 /*
2 * (C) Copyright IBM Corporation 2006
3 * Copyright (c) 2007, 2009, 2011, Oracle and/or its affiliates.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * on the rights to use, copy, modify, merge, publish, distribute, sub
10 * license, and/or sell copies of the Software, and to permit persons to whom
11 * the Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
20 * IBM AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 */
25 /*
26 * Solaris devfs interfaces
27 */
28
29 #include <stdlib.h>
30 #include <strings.h>
31 #include <stdio.h>
32 #include <unistd.h>
33 #include <sys/types.h>
34 #include <fcntl.h>
35 #include <sys/mman.h>
36 #include <errno.h>
37 #include <sys/pci.h>
38 #include <libdevinfo.h>
39 #include "pci_tools.h"
40
41 #include "pciaccess.h"
42 #include "pciaccess_private.h"
43
44 /* #define DEBUG */
45
46 #define INITIAL_NUM_DEVICES 256
47 #define CELL_NUMS_1275 (sizeof(pci_regspec_t) / sizeof(uint_t))
48
49 typedef union {
50 uint8_t bytes[16 * sizeof (uint32_t)];
51 uint32_t dwords[16];
52 } pci_conf_hdr_t;
53
54 typedef struct i_devnode {
55 uint8_t bus;
56 uint8_t dev;
57 uint8_t func;
58 di_node_t node;
59 } i_devnode_t;
60
61 typedef struct nexus {
62 int fd;
63 int first_bus;
64 int last_bus;
65 int domain;
66 char *path; /* for errors/debugging; fd is all we need */
67 char *dev_path;
68 struct nexus *next;
69 #ifdef __sparc
70 struct pci_device **devlist;
71 volatile size_t num_allocated_elems;
72 volatile size_t num_devices;
73 #endif
74 } nexus_t;
75
76 typedef struct probe_info {
77 volatile size_t num_allocated_elems;
78 volatile size_t num_devices;
79 struct pci_device_private * volatile devices;
80 } probe_info_t;
81
82 static nexus_t *nexus_list = NULL;
83 #if !defined(__sparc)
84 static int xsvc_fd = -1;
85 #endif
86
87 #ifdef __sparc
88 static di_prom_handle_t di_phdl;
89 #endif
90
91 /*
92 * Read config space in native processor endianness. Endian-neutral
93 * processing can then take place. On big endian machines, MSB and LSB
94 * of little endian data end up switched if read as little endian.
95 * They are in correct order if read as big endian.
96 */
97 #if defined(__sparc)
98 # define NATIVE_ENDIAN PCITOOL_ACC_ATTR_ENDN_BIG
99 #elif defined(__x86)
100 # define NATIVE_ENDIAN PCITOOL_ACC_ATTR_ENDN_LTL
101 #else
102 # error "ISA is neither __sparc nor __x86"
103 #endif
104
105 #ifdef __sparc
106 #define MAPPING_DEV_PATH(dev) (((struct pci_device_private *) dev)->device_string)
107 #endif
108
109 /*
110 * Identify problematic southbridges. These have device id 0x5249 and
111 * vendor id 0x10b9. Check for revision ID 0 and class code 060400 as well.
112 * Values are little endian, so they are reversed for SPARC.
113 *
114 * Check for these southbridges on all architectures, as the issue is a
115 * southbridge issue, independent of processor.
116 *
117 * If one of these is found during probing, skip probing other devs/funcs on
118 * the rest of the bus, since the southbridge and all devs underneath will
119 * otherwise disappear.
120 */
121 #if (NATIVE_ENDIAN == PCITOOL_ACC_ATTR_ENDN_BIG)
122 # define U45_SB_DEVID_VID 0xb9104952
123 # define U45_SB_CLASS_RID 0x00000406
124 #else
125 # define U45_SB_DEVID_VID 0x524910b9
126 # define U45_SB_CLASS_RID 0x06040000
127 #endif
128
129 static int pci_device_solx_devfs_map_range(struct pci_device *dev,
130 struct pci_device_mapping *map);
131
132 static int pci_device_solx_devfs_read_rom( struct pci_device * dev,
133 void * buffer );
134
135 static int pci_device_solx_devfs_probe( struct pci_device * dev );
136
137 static int pci_device_solx_devfs_read( struct pci_device * dev, void * data,
138 pciaddr_t offset, pciaddr_t size, pciaddr_t * bytes_read );
139
140 static int pci_device_solx_devfs_write( struct pci_device * dev,
141 const void * data, pciaddr_t offset, pciaddr_t size,
142 pciaddr_t * bytes_written );
143
144 static int probe_dev(nexus_t *nexus, pcitool_reg_t *prg_p, probe_info_t *pinfo);
145
146 static int do_probe(nexus_t *nexus, probe_info_t *pinfo);
147
148 static int probe_nexus_node(di_node_t di_node, di_minor_t minor, void *arg);
149
150 static void pci_system_solx_devfs_destroy( void );
151
152 static int get_config_header(int fd, uint8_t bus_no, uint8_t dev_no,
153 uint8_t func_no, pci_conf_hdr_t *config_hdr_p);
154
155 int pci_system_solx_devfs_create( void );
156
157 static const struct pci_system_methods solx_devfs_methods = {
158 .destroy = pci_system_solx_devfs_destroy,
159 .destroy_device = NULL,
160 .read_rom = pci_device_solx_devfs_read_rom,
161 .probe = pci_device_solx_devfs_probe,
162 .map_range = pci_device_solx_devfs_map_range,
163 .unmap_range = pci_device_generic_unmap_range,
164
165 .read = pci_device_solx_devfs_read,
166 .write = pci_device_solx_devfs_write,
167
168 .fill_capabilities = pci_fill_capabilities_generic
169 };
170
171 #ifdef __sparc
172 static nexus_t *
find_nexus_for_dev(struct pci_device * dev)173 find_nexus_for_dev(struct pci_device *dev)
174 {
175 nexus_t *nexus;
176 int i;
177
178 for (nexus = nexus_list ; nexus != NULL ; nexus = nexus->next) {
179 for (i = 0; i < nexus->num_devices; i++) {
180 if (nexus->devlist[i] == dev)
181 return nexus;
182 }
183 }
184 return NULL;
185 }
186 #else
187 static nexus_t *
find_nexus_for_bus(int domain,int bus)188 find_nexus_for_bus( int domain, int bus )
189 {
190 nexus_t *nexus;
191
192 for (nexus = nexus_list ; nexus != NULL ; nexus = nexus->next) {
193 if ((domain == nexus->domain) &&
194 (bus >= nexus->first_bus) && (bus <= nexus->last_bus)) {
195 return nexus;
196 }
197 }
198 return NULL;
199 }
200 #endif
201
202 #define GET_CONFIG_VAL_8(offset) (config_hdr.bytes[offset])
203 #define GET_CONFIG_VAL_16(offset) \
204 (uint16_t) (GET_CONFIG_VAL_8(offset) + (GET_CONFIG_VAL_8(offset+1) << 8))
205 #define GET_CONFIG_VAL_32(offset) \
206 (uint32_t) (GET_CONFIG_VAL_8(offset) + \
207 (GET_CONFIG_VAL_8(offset+1) << 8) + \
208 (GET_CONFIG_VAL_8(offset+2) << 16) + \
209 (GET_CONFIG_VAL_8(offset+3) << 24))
210
211 /*
212 * Release all the resources
213 * Solaris version
214 */
215 static void
pci_system_solx_devfs_destroy(void)216 pci_system_solx_devfs_destroy( void )
217 {
218 /*
219 * The memory allocated for pci_sys & devices in create routines
220 * will be freed in pci_system_cleanup.
221 * Need to free system-specific allocations here.
222 */
223 nexus_t *nexus, *next;
224
225 for (nexus = nexus_list ; nexus != NULL ; nexus = next) {
226 next = nexus->next;
227 close(nexus->fd);
228 free(nexus->path);
229 free(nexus->dev_path);
230 #ifdef __sparc
231 {
232 struct pci_device *dev;
233 int i;
234
235 for (i = 0; i < nexus->num_devices; i++) {
236 dev = nexus->devlist[i];
237 if (MAPPING_DEV_PATH(dev))
238 di_devfs_path_free((char *) MAPPING_DEV_PATH(dev));
239 }
240 }
241 free(nexus->devlist);
242 #endif
243 free(nexus);
244 }
245 nexus_list = NULL;
246
247 #ifdef __sparc
248 if (di_phdl != DI_PROM_HANDLE_NIL)
249 (void) di_prom_fini(di_phdl);
250 #else
251 if (xsvc_fd >= 0) {
252 close(xsvc_fd);
253 xsvc_fd = -1;
254 }
255 #endif
256 }
257
258 /*
259 * Attempt to access PCI subsystem using Solaris's devfs interface.
260 * Solaris version
261 */
262 _pci_hidden int
pci_system_solx_devfs_create(void)263 pci_system_solx_devfs_create( void )
264 {
265 int err = 0;
266 di_node_t di_node;
267 probe_info_t pinfo;
268 struct pci_device_private *devices;
269
270 if (nexus_list != NULL) {
271 return 0;
272 }
273
274 if ((di_node = di_init("/", DINFOCPYALL)) == DI_NODE_NIL) {
275 err = errno;
276 (void) fprintf(stderr, "di_init() failed: %s\n",
277 strerror(errno));
278 return (err);
279 }
280
281 if ((devices = calloc(INITIAL_NUM_DEVICES,
282 sizeof (struct pci_device_private))) == NULL) {
283 err = errno;
284 di_fini(di_node);
285 return (err);
286 }
287
288 #ifdef __sparc
289 if ((di_phdl = di_prom_init()) == DI_PROM_HANDLE_NIL)
290 (void) fprintf(stderr, "di_prom_init failed: %s\n", strerror(errno));
291 #endif
292
293 pinfo.num_allocated_elems = INITIAL_NUM_DEVICES;
294 pinfo.num_devices = 0;
295 pinfo.devices = devices;
296 (void) di_walk_minor(di_node, DDI_NT_REGACC, 0, &pinfo, probe_nexus_node);
297
298 di_fini(di_node);
299
300 if ((pci_sys = calloc(1, sizeof (struct pci_system))) == NULL) {
301 err = errno;
302 free(devices);
303 return (err);
304 }
305
306 pci_sys->methods = &solx_devfs_methods;
307 pci_sys->devices = pinfo.devices;
308 pci_sys->num_devices = pinfo.num_devices;
309
310 return (err);
311 }
312
313 /*
314 * Retrieve first 16 dwords of device's config header, except for the first
315 * dword. First 16 dwords are defined by the PCI specification.
316 */
317 static int
get_config_header(int fd,uint8_t bus_no,uint8_t dev_no,uint8_t func_no,pci_conf_hdr_t * config_hdr_p)318 get_config_header(int fd, uint8_t bus_no, uint8_t dev_no, uint8_t func_no,
319 pci_conf_hdr_t *config_hdr_p)
320 {
321 pcitool_reg_t cfg_prg;
322 int i;
323 int rval = 0;
324
325 /* Prepare a local pcitool_reg_t so as to not disturb the caller's. */
326 cfg_prg.offset = 0;
327 cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_4 + NATIVE_ENDIAN;
328 cfg_prg.bus_no = bus_no;
329 cfg_prg.dev_no = dev_no;
330 cfg_prg.func_no = func_no;
331 cfg_prg.barnum = 0;
332 cfg_prg.user_version = PCITOOL_USER_VERSION;
333
334 /* Get dwords 1-15 of config space. They must be read as uint32_t. */
335 for (i = 1; i < (sizeof (pci_conf_hdr_t) / sizeof (uint32_t)); i++) {
336 cfg_prg.offset += sizeof (uint32_t);
337 if ((rval = ioctl(fd, PCITOOL_DEVICE_GET_REG, &cfg_prg)) != 0) {
338 break;
339 }
340 config_hdr_p->dwords[i] = (uint32_t)cfg_prg.data;
341 }
342
343 return (rval);
344 }
345
346
347 /*
348 * Probe device's functions. Modifies many fields in the prg_p.
349 */
350 static int
probe_dev(nexus_t * nexus,pcitool_reg_t * prg_p,probe_info_t * pinfo)351 probe_dev(nexus_t *nexus, pcitool_reg_t *prg_p, probe_info_t *pinfo)
352 {
353 pci_conf_hdr_t config_hdr;
354 boolean_t multi_function_device;
355 int8_t func;
356 int8_t first_func = 0;
357 int8_t last_func = PCI_REG_FUNC_M >> PCI_REG_FUNC_SHIFT;
358 int rval = 0;
359 struct pci_device * pci_base;
360
361 /*
362 * Loop through at least func=first_func. Continue looping through
363 * functions if there are no errors and the device is a multi-function
364 * device.
365 *
366 * (Note, if first_func == 0, header will show whether multifunction
367 * device and set multi_function_device. If first_func != 0, then we
368 * will force the loop as the user wants a specific function to be
369 * checked.
370 */
371 for (func = first_func, multi_function_device = B_FALSE;
372 ((func <= last_func) &&
373 ((func == first_func) || (multi_function_device)));
374 func++) {
375 prg_p->func_no = func;
376
377 /*
378 * Four things can happen here:
379 *
380 * 1) ioctl comes back as EFAULT and prg_p->status is
381 * PCITOOL_INVALID_ADDRESS. There is no device at this location.
382 *
383 * 2) ioctl comes back successful and the data comes back as
384 * zero. Config space is mapped but no device responded.
385 *
386 * 3) ioctl comes back successful and the data comes back as
387 * non-zero. We've found a device.
388 *
389 * 4) Some other error occurs in an ioctl.
390 */
391
392 prg_p->status = PCITOOL_SUCCESS;
393 prg_p->offset = 0;
394 prg_p->data = 0;
395 prg_p->user_version = PCITOOL_USER_VERSION;
396
397 errno = 0;
398 if (((rval = ioctl(nexus->fd, PCITOOL_DEVICE_GET_REG, prg_p)) != 0) ||
399 (prg_p->data == 0xffffffff)) {
400
401 /*
402 * Accept errno == EINVAL along with status of
403 * PCITOOL_OUT_OF_RANGE because some systems
404 * don't implement the full range of config space.
405 * Leave the loop quietly in this case.
406 */
407 if ((errno == EINVAL) ||
408 (prg_p->status == PCITOOL_OUT_OF_RANGE)) {
409 break;
410 }
411
412 /*
413 * Exit silently with ENXIO as this means that there are
414 * no devices under the pci root nexus.
415 */
416 else if ((errno == ENXIO) &&
417 (prg_p->status == PCITOOL_IO_ERROR)) {
418 break;
419 }
420
421 /*
422 * Expect errno == EFAULT along with status of
423 * PCITOOL_INVALID_ADDRESS because there won't be
424 * devices at each stop. Quit on any other error.
425 */
426 else if (((errno != EFAULT) ||
427 (prg_p->status != PCITOOL_INVALID_ADDRESS)) &&
428 (prg_p->data != 0xffffffff)) {
429 #ifdef __sparc
430 /* on sparc, devices can be enumerated discontiguously. Do not quit */
431 rval = 0;
432 #endif
433 break;
434 }
435
436 /*
437 * If no function at this location,
438 * just advance to the next function.
439 */
440 else {
441 rval = 0;
442 }
443
444 /*
445 * Data came back as 0.
446 * Treat as unresponsive device and check next device.
447 */
448 } else if (prg_p->data == 0) {
449 rval = 0;
450 break; /* Func loop. */
451
452 /* Found something. */
453 } else {
454 config_hdr.dwords[0] = (uint32_t)prg_p->data;
455
456 /* Get the rest of the PCI header. */
457 if ((rval = get_config_header(nexus->fd, prg_p->bus_no,
458 prg_p->dev_no, prg_p->func_no,
459 &config_hdr)) != 0) {
460 break;
461 }
462
463 /*
464 * Special case for the type of Southbridge found on
465 * Ultra-45 and other sun4u fire workstations.
466 */
467 if ((config_hdr.dwords[0] == U45_SB_DEVID_VID) &&
468 (config_hdr.dwords[2] == U45_SB_CLASS_RID)) {
469 rval = ECANCELED;
470 break;
471 }
472
473 /*
474 * Found one device with bus number, device number and
475 * function number.
476 */
477
478 pci_base = &pinfo->devices[pinfo->num_devices].base;
479
480 pci_base->domain = nexus->domain;
481 pci_base->bus = prg_p->bus_no;
482 pci_base->dev = prg_p->dev_no;
483 pci_base->func = func;
484
485 /*
486 * for the format of device_class, see struct pci_device;
487 */
488
489 pci_base->device_class =
490 (GET_CONFIG_VAL_8(PCI_CONF_BASCLASS) << 16) |
491 (GET_CONFIG_VAL_8(PCI_CONF_SUBCLASS) << 8) |
492 GET_CONFIG_VAL_8(PCI_CONF_PROGCLASS);
493
494 pci_base->revision = GET_CONFIG_VAL_8(PCI_CONF_REVID);
495 pci_base->vendor_id = GET_CONFIG_VAL_16(PCI_CONF_VENID);
496 pci_base->device_id = GET_CONFIG_VAL_16(PCI_CONF_DEVID);
497 pci_base->subvendor_id = GET_CONFIG_VAL_16(PCI_CONF_SUBVENID);
498 pci_base->subdevice_id = GET_CONFIG_VAL_16(PCI_CONF_SUBSYSID);
499 pci_base->irq = GET_CONFIG_VAL_8(PCI_CONF_ILINE);
500
501 pinfo->devices[pinfo->num_devices].header_type
502 = GET_CONFIG_VAL_8(PCI_CONF_HEADER);
503
504 #ifdef DEBUG
505 fprintf(stderr,
506 "nexus = %s, busno = %x, devno = %x, funcno = %x\n",
507 nexus->path, prg_p->bus_no, prg_p->dev_no, func);
508 #endif
509
510 pinfo->num_devices++;
511 if (pinfo->num_devices == pinfo->num_allocated_elems) {
512 struct pci_device_private *new_devs;
513 size_t new_num_elems = pinfo->num_allocated_elems * 2;
514
515 new_devs = realloc(pinfo->devices,
516 new_num_elems * sizeof (struct pci_device_private));
517 if (new_devs == NULL) {
518 (void) fprintf(stderr,
519 "Error allocating memory for PCI devices:"
520 " %s\n discarding additional devices\n",
521 strerror(errno));
522 return (rval);
523 }
524 (void) memset(&new_devs[pinfo->num_devices], 0,
525 pinfo->num_allocated_elems *
526 sizeof (struct pci_device_private));
527 pinfo->num_allocated_elems = new_num_elems;
528 pinfo->devices = new_devs;
529 }
530
531 #ifdef __sparc
532 nexus->devlist[nexus->num_devices++] = pci_base;
533
534 if (nexus->num_devices == nexus->num_allocated_elems) {
535 struct pci_device **new_devs;
536 size_t new_num_elems = nexus->num_allocated_elems * 2;
537
538 new_devs = realloc(nexus->devlist,
539 new_num_elems * sizeof (struct pci_device *));
540 if (new_devs == NULL)
541 return (rval);
542 (void) memset(&new_devs[nexus->num_devices], 0,
543 nexus->num_allocated_elems *
544 sizeof (struct pci_device *));
545 nexus->num_allocated_elems = new_num_elems;
546 nexus->devlist = new_devs;
547 }
548 #endif
549
550 /*
551 * Accommodate devices which state their
552 * multi-functionality only in their function 0 config
553 * space. Note multi-functionality throughout probing
554 * of all of this device's functions.
555 */
556 if (config_hdr.bytes[PCI_CONF_HEADER] & PCI_HEADER_MULTI) {
557 multi_function_device = B_TRUE;
558 }
559 }
560 }
561
562 return (rval);
563 }
564
565 /*
566 * This function is called from di_walk_minor() when any PROBE is processed
567 */
568 static int
probe_nexus_node(di_node_t di_node,di_minor_t minor,void * arg)569 probe_nexus_node(di_node_t di_node, di_minor_t minor, void *arg)
570 {
571 probe_info_t *pinfo = (probe_info_t *)arg;
572 char *nexus_name, *nexus_dev_path;
573 nexus_t *nexus;
574 int fd;
575 char nexus_path[MAXPATHLEN];
576
577 di_prop_t prop;
578 char *strings;
579 int *ints;
580 int numval;
581 int pci_node = 0;
582 int first_bus = 0, last_bus = PCI_REG_BUS_G(PCI_REG_BUS_M);
583 int domain = 0;
584 #ifdef __sparc
585 int bus_range_found = 0;
586 int device_type_found = 0;
587 di_prom_prop_t prom_prop;
588 #endif
589
590
591 #ifdef DEBUG
592 nexus_name = di_devfs_minor_path(minor);
593 fprintf(stderr, "-- device name: %s\n", nexus_name);
594 #endif
595
596 for (prop = di_prop_next(di_node, NULL); prop != NULL;
597 prop = di_prop_next(di_node, prop)) {
598
599 const char *prop_name = di_prop_name(prop);
600
601 #ifdef DEBUG
602 fprintf(stderr, " property: %s\n", prop_name);
603 #endif
604
605 if (strcmp(prop_name, "device_type") == 0) {
606 numval = di_prop_strings(prop, &strings);
607 if (numval == 1) {
608 if (strncmp(strings, "pci", 3) != 0)
609 /* not a PCI node, bail */
610 return (DI_WALK_CONTINUE);
611 else {
612 pci_node = 1;
613 #ifdef __sparc
614 device_type_found = 1;
615 #endif
616 }
617 }
618 }
619 else if (strcmp(prop_name, "class-code") == 0) {
620 /* not a root bus node, bail */
621 return (DI_WALK_CONTINUE);
622 }
623 else if (strcmp(prop_name, "bus-range") == 0) {
624 numval = di_prop_ints(prop, &ints);
625 if (numval == 2) {
626 first_bus = ints[0];
627 last_bus = ints[1];
628 #ifdef __sparc
629 bus_range_found = 1;
630 #endif
631 }
632 }
633 else if (strcmp(prop_name, "pciseg") == 0) {
634 numval = di_prop_ints(prop, &ints);
635 if (numval == 1) {
636 domain = ints[0];
637 }
638 }
639 }
640
641 #ifdef __sparc
642 if ((!device_type_found) && di_phdl) {
643 numval = di_prom_prop_lookup_strings(di_phdl, di_node,
644 "device_type", &strings);
645 if (numval == 1) {
646 if (strncmp(strings, "pci", 3) != 0)
647 return (DI_WALK_CONTINUE);
648 else
649 pci_node = 1;
650 }
651 }
652
653 if ((!bus_range_found) && di_phdl) {
654 numval = di_prom_prop_lookup_ints(di_phdl, di_node,
655 "bus-range", &ints);
656 if (numval == 2) {
657 first_bus = ints[0];
658 last_bus = ints[1];
659 }
660 }
661 #endif
662
663 if (pci_node != 1)
664 return (DI_WALK_CONTINUE);
665
666 /* we have a PCI root bus node. */
667 nexus = calloc(1, sizeof(nexus_t));
668 if (nexus == NULL) {
669 (void) fprintf(stderr, "Error allocating memory for nexus: %s\n",
670 strerror(errno));
671 return (DI_WALK_TERMINATE);
672 }
673 nexus->first_bus = first_bus;
674 nexus->last_bus = last_bus;
675 nexus->domain = domain;
676
677 #ifdef __sparc
678 if ((nexus->devlist = calloc(INITIAL_NUM_DEVICES,
679 sizeof (struct pci_device *))) == NULL) {
680 (void) fprintf(stderr, "Error allocating memory for nexus devlist: %s\n",
681 strerror(errno));
682 free (nexus);
683 return (DI_WALK_TERMINATE);
684 }
685 nexus->num_allocated_elems = INITIAL_NUM_DEVICES;
686 nexus->num_devices = 0;
687 #endif
688
689 nexus_name = di_devfs_minor_path(minor);
690 if (nexus_name == NULL) {
691 (void) fprintf(stderr, "Error getting nexus path: %s\n",
692 strerror(errno));
693 free(nexus);
694 return (DI_WALK_CONTINUE);
695 }
696
697 snprintf(nexus_path, sizeof(nexus_path), "/devices%s", nexus_name);
698 di_devfs_path_free(nexus_name);
699
700 #ifdef DEBUG
701 fprintf(stderr, "nexus = %s, bus-range = %d - %d\n",
702 nexus_path, first_bus, last_bus);
703 #endif
704
705 if ((fd = open(nexus_path, O_RDWR)) >= 0) {
706 nexus->fd = fd;
707 nexus->path = strdup(nexus_path);
708 nexus_dev_path = di_devfs_path(di_node);
709 nexus->dev_path = strdup(nexus_dev_path);
710 di_devfs_path_free(nexus_dev_path);
711 if ((do_probe(nexus, pinfo) != 0) && (errno != ENXIO)) {
712 (void) fprintf(stderr, "Error probing node %s: %s\n",
713 nexus_path, strerror(errno));
714 (void) close(fd);
715 free(nexus->path);
716 free(nexus->dev_path);
717 free(nexus);
718 } else {
719 nexus->next = nexus_list;
720 nexus_list = nexus;
721 }
722 } else {
723 (void) fprintf(stderr, "Error opening %s: %s\n",
724 nexus_path, strerror(errno));
725 free(nexus);
726 }
727
728 return DI_WALK_CONTINUE;
729 }
730
731
732 /*
733 * Solaris version
734 * Probe a given nexus config space for devices.
735 *
736 * fd is the file descriptor of the nexus.
737 * input_args contains commandline options as specified by the user.
738 */
739 static int
do_probe(nexus_t * nexus,probe_info_t * pinfo)740 do_probe(nexus_t *nexus, probe_info_t *pinfo)
741 {
742 pcitool_reg_t prg;
743 uint32_t bus;
744 uint8_t dev;
745 uint32_t last_bus = nexus->last_bus;
746 uint8_t last_dev = PCI_REG_DEV_M >> PCI_REG_DEV_SHIFT;
747 uint8_t first_bus = nexus->first_bus;
748 uint8_t first_dev = 0;
749 int rval = 0;
750
751 prg.barnum = 0; /* Config space. */
752
753 /* Must read in 4-byte quantities. */
754 prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_4 + NATIVE_ENDIAN;
755
756 prg.data = 0;
757
758 /*
759 * Loop through all valid bus / dev / func combinations to check for
760 * all devices, with the following exceptions:
761 *
762 * When nothing is found at function 0 of a bus / dev combination, skip
763 * the other functions of that bus / dev combination.
764 *
765 * When a found device's function 0 is probed and it is determined that
766 * it is not a multifunction device, skip probing of that device's
767 * other functions.
768 */
769 for (bus = first_bus; ((bus <= last_bus) && (rval == 0)); bus++) {
770 prg.bus_no = (uint8_t)bus;
771
772 for (dev = first_dev; ((dev <= last_dev) && (rval == 0)); dev++) {
773 prg.dev_no = dev;
774 rval = probe_dev(nexus, &prg, pinfo);
775 }
776
777 /*
778 * Ultra-45 southbridge workaround:
779 * ECANCELED tells to skip to the next bus.
780 */
781 if (rval == ECANCELED) {
782 rval = 0;
783 }
784 }
785
786 return (rval);
787 }
788
789 static int
find_target_node(di_node_t node,void * arg)790 find_target_node(di_node_t node, void *arg)
791 {
792 int *regbuf = NULL;
793 int len = 0;
794 uint32_t busno, funcno, devno;
795 i_devnode_t *devnode = (i_devnode_t *)arg;
796
797 /*
798 * Test the property functions, only for testing
799 */
800 /*
801 void *prop = DI_PROP_NIL;
802
803 (void) fprintf(stderr, "start of node 0x%x\n", node->nodeid);
804 while ((prop = di_prop_hw_next(node, prop)) != DI_PROP_NIL) {
805 int i;
806 (void) fprintf(stderr, "name=%s: ", di_prop_name(prop));
807 len = 0;
808 if (!strcmp(di_prop_name(prop), "reg")) {
809 len = di_prop_ints(prop, ®buf);
810 }
811 for (i = 0; i < len; i++) {
812 fprintf(stderr, "0x%0x.", regbuf[i]);
813 }
814 fprintf(stderr, "\n");
815 }
816 (void) fprintf(stderr, "end of node 0x%x\n", node->nodeid);
817 */
818
819 len = di_prop_lookup_ints(DDI_DEV_T_ANY, node, "reg", ®buf);
820
821 #ifdef __sparc
822 if ((len <= 0) && di_phdl)
823 len = di_prom_prop_lookup_ints(di_phdl, node, "reg", ®buf);
824 #endif
825
826 if (len <= 0) {
827 #ifdef DEBUG
828 fprintf(stderr, "error = %x\n", errno);
829 fprintf(stderr, "can not find assigned-address\n");
830 #endif
831 return (DI_WALK_CONTINUE);
832 }
833
834 busno = PCI_REG_BUS_G(regbuf[0]);
835 devno = PCI_REG_DEV_G(regbuf[0]);
836 funcno = PCI_REG_FUNC_G(regbuf[0]);
837
838 if ((busno == devnode->bus) &&
839 (devno == devnode->dev) &&
840 (funcno == devnode->func)) {
841 devnode->node = node;
842
843 return (DI_WALK_TERMINATE);
844 }
845
846 return (DI_WALK_CONTINUE);
847 }
848
849 /*
850 * Solaris version
851 */
852 static int
pci_device_solx_devfs_probe(struct pci_device * dev)853 pci_device_solx_devfs_probe( struct pci_device * dev )
854 {
855 int err = 0;
856 di_node_t rnode = DI_NODE_NIL;
857 i_devnode_t args = { 0, 0, 0, DI_NODE_NIL };
858 int *regbuf;
859 pci_regspec_t *reg;
860 int i;
861 int len = 0;
862 uint ent = 0;
863 nexus_t *nexus;
864
865 #ifdef __sparc
866 if ( (nexus = find_nexus_for_dev(dev)) == NULL )
867 #else
868 if ( (nexus = find_nexus_for_bus(dev->domain, dev->bus)) == NULL )
869 #endif
870 return ENODEV;
871
872 /*
873 * starting to find if it is MEM/MEM64/IO
874 * using libdevinfo
875 */
876 if ((rnode = di_init(nexus->dev_path, DINFOCPYALL)) == DI_NODE_NIL) {
877 err = errno;
878 (void) fprintf(stderr, "di_init failed: %s\n", strerror(errno));
879 } else {
880 args.bus = dev->bus;
881 args.dev = dev->dev;
882 args.func = dev->func;
883 (void) di_walk_node(rnode, DI_WALK_CLDFIRST,
884 (void *)&args, find_target_node);
885 }
886
887 if (args.node != DI_NODE_NIL) {
888 #ifdef __sparc
889 di_minor_t minor;
890 #endif
891
892 #ifdef __sparc
893 if (minor = di_minor_next(args.node, DI_MINOR_NIL))
894 MAPPING_DEV_PATH(dev) = di_devfs_minor_path (minor);
895 else
896 MAPPING_DEV_PATH(dev) = NULL;
897 #endif
898
899 /*
900 * It will succeed for sure, because it was
901 * successfully called in find_target_node
902 */
903 len = di_prop_lookup_ints(DDI_DEV_T_ANY, args.node,
904 "assigned-addresses",
905 ®buf);
906
907 #ifdef __sparc
908 if ((len <= 0) && di_phdl) {
909 len = di_prom_prop_lookup_ints(di_phdl, args.node,
910 "assigned-addresses", ®buf);
911 }
912 #endif
913 }
914
915 if (len <= 0)
916 goto cleanup;
917
918
919 /*
920 * how to find the size of rom???
921 * if the device has expansion rom,
922 * it must be listed in the last
923 * cells because solaris find probe
924 * the base address from offset 0x10
925 * to 0x30h. So only check the last
926 * item.
927 */
928 reg = (pci_regspec_t *)®buf[len - CELL_NUMS_1275];
929 if (PCI_REG_REG_G(reg->pci_phys_hi) == PCI_CONF_ROM) {
930 /*
931 * rom can only be 32 bits
932 */
933 dev->rom_size = reg->pci_size_low;
934 len = len - CELL_NUMS_1275;
935 }
936 else {
937 /*
938 * size default to 64K and base address
939 * default to 0xC0000
940 */
941 dev->rom_size = 0x10000;
942 }
943
944 /*
945 * Solaris has its own BAR index.
946 * Linux give two region slot for 64 bit address.
947 */
948 for (i = 0; i < len; i = i + CELL_NUMS_1275) {
949
950 reg = (pci_regspec_t *)®buf[i];
951 ent = reg->pci_phys_hi & 0xff;
952 /*
953 * G35 broken in BAR0
954 */
955 ent = (ent - PCI_CONF_BASE0) >> 2;
956 if (ent >= 6) {
957 fprintf(stderr, "error ent = %d\n", ent);
958 break;
959 }
960
961 /*
962 * non relocatable resource is excluded
963 * such like 0xa0000, 0x3b0. If it is met,
964 * the loop is broken;
965 */
966 if (!PCI_REG_REG_G(reg->pci_phys_hi))
967 break;
968
969 if (reg->pci_phys_hi & PCI_PREFETCH_B) {
970 dev->regions[ent].is_prefetchable = 1;
971 }
972
973
974 /*
975 * We split the shift count 32 into two 16 to
976 * avoid the complaining of the compiler
977 */
978 dev->regions[ent].base_addr = reg->pci_phys_low +
979 ((reg->pci_phys_mid << 16) << 16);
980 dev->regions[ent].size = reg->pci_size_low +
981 ((reg->pci_size_hi << 16) << 16);
982
983 switch (reg->pci_phys_hi & PCI_REG_ADDR_M) {
984 case PCI_ADDR_IO:
985 dev->regions[ent].is_IO = 1;
986 break;
987 case PCI_ADDR_MEM32:
988 break;
989 case PCI_ADDR_MEM64:
990 dev->regions[ent].is_64 = 1;
991 /*
992 * Skip one slot for 64 bit address
993 */
994 break;
995 }
996 }
997
998 cleanup:
999 if (rnode != DI_NODE_NIL) {
1000 di_fini(rnode);
1001 }
1002 return (err);
1003 }
1004
1005 /*
1006 * Solaris version: read the VGA ROM data
1007 */
1008 static int
pci_device_solx_devfs_read_rom(struct pci_device * dev,void * buffer)1009 pci_device_solx_devfs_read_rom( struct pci_device * dev, void * buffer )
1010 {
1011 int err;
1012 struct pci_device_mapping prom = {
1013 .base = 0xC0000,
1014 .size = dev->rom_size,
1015 .flags = 0
1016 };
1017
1018 err = pci_device_solx_devfs_map_range(dev, &prom);
1019 if (err == 0) {
1020 (void) bcopy(prom.memory, buffer, dev->rom_size);
1021
1022 if (munmap(prom.memory, dev->rom_size) == -1) {
1023 err = errno;
1024 }
1025 }
1026 return err;
1027 }
1028
1029 /*
1030 * solaris version: Read the configurations space of the devices
1031 */
1032 static int
pci_device_solx_devfs_read(struct pci_device * dev,void * data,pciaddr_t offset,pciaddr_t size,pciaddr_t * bytes_read)1033 pci_device_solx_devfs_read( struct pci_device * dev, void * data,
1034 pciaddr_t offset, pciaddr_t size,
1035 pciaddr_t * bytes_read )
1036 {
1037 pcitool_reg_t cfg_prg;
1038 int err = 0;
1039 int i = 0;
1040 nexus_t *nexus;
1041
1042 #ifdef __sparc
1043 nexus = find_nexus_for_dev(dev);
1044 #else
1045 nexus = find_nexus_for_bus(dev->domain, dev->bus);
1046 #endif
1047
1048 *bytes_read = 0;
1049
1050 if ( nexus == NULL ) {
1051 return ENODEV;
1052 }
1053
1054 cfg_prg.offset = offset;
1055 cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_1 + NATIVE_ENDIAN;
1056 cfg_prg.bus_no = dev->bus;
1057 cfg_prg.dev_no = dev->dev;
1058 cfg_prg.func_no = dev->func;
1059 cfg_prg.barnum = 0;
1060 cfg_prg.user_version = PCITOOL_USER_VERSION;
1061
1062 for (i = 0; i < size; i += PCITOOL_ACC_ATTR_SIZE(PCITOOL_ACC_ATTR_SIZE_1))
1063 {
1064 cfg_prg.offset = offset + i;
1065
1066 if ((err = ioctl(nexus->fd, PCITOOL_DEVICE_GET_REG, &cfg_prg)) != 0) {
1067 fprintf(stderr, "read bdf<%s,%x,%x,%x,%llx> config space failure\n",
1068 nexus->path,
1069 cfg_prg.bus_no,
1070 cfg_prg.dev_no,
1071 cfg_prg.func_no,
1072 cfg_prg.offset);
1073 fprintf(stderr, "Failure cause = %x\n", err);
1074 break;
1075 }
1076
1077 ((uint8_t *)data)[i] = (uint8_t)cfg_prg.data;
1078 /*
1079 * DWORDS Offset or bytes Offset ??
1080 */
1081 }
1082 *bytes_read = i;
1083
1084 return (err);
1085 }
1086
1087 /*
1088 * Solaris version
1089 */
1090 static int
pci_device_solx_devfs_write(struct pci_device * dev,const void * data,pciaddr_t offset,pciaddr_t size,pciaddr_t * bytes_written)1091 pci_device_solx_devfs_write( struct pci_device * dev, const void * data,
1092 pciaddr_t offset, pciaddr_t size,
1093 pciaddr_t * bytes_written )
1094 {
1095 pcitool_reg_t cfg_prg;
1096 int err = 0;
1097 int cmd;
1098 nexus_t *nexus;
1099
1100 #ifdef __sparc
1101 nexus = find_nexus_for_dev(dev);
1102 #else
1103 nexus = find_nexus_for_bus(dev->domain, dev->bus);
1104 #endif
1105
1106 if ( bytes_written != NULL ) {
1107 *bytes_written = 0;
1108 }
1109
1110 if ( nexus == NULL ) {
1111 return ENODEV;
1112 }
1113
1114 cfg_prg.offset = offset;
1115 switch (size) {
1116 case 1:
1117 cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_1 + NATIVE_ENDIAN;
1118 cfg_prg.data = *((uint8_t *)data);
1119 break;
1120 case 2:
1121 cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_2 + NATIVE_ENDIAN;
1122 cfg_prg.data = *((uint16_t *)data);
1123 break;
1124 case 4:
1125 cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_4 + NATIVE_ENDIAN;
1126 cfg_prg.data = *((uint32_t *)data);
1127 break;
1128 case 8:
1129 cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_8 + NATIVE_ENDIAN;
1130 cfg_prg.data = *((uint64_t *)data);
1131 break;
1132 default:
1133 return EINVAL;
1134 }
1135 cfg_prg.bus_no = dev->bus;
1136 cfg_prg.dev_no = dev->dev;
1137 cfg_prg.func_no = dev->func;
1138 cfg_prg.barnum = 0;
1139 cfg_prg.user_version = PCITOOL_USER_VERSION;
1140
1141 /*
1142 * Check if this device is bridge device.
1143 * If it is, it is also a nexus node???
1144 * It seems that there is no explicit
1145 * PCI nexus device for X86, so not applicable
1146 * from pcitool_bus_reg_ops in pci_tools.c
1147 */
1148 cmd = PCITOOL_DEVICE_SET_REG;
1149
1150 if ((err = ioctl(nexus->fd, cmd, &cfg_prg)) != 0) {
1151 return (err);
1152 }
1153 *bytes_written = size;
1154
1155 return (err);
1156 }
1157
1158
1159 /**
1160 * Map a memory region for a device using /dev/xsvc.
1161 *
1162 * \param dev Device whose memory region is to be mapped.
1163 * \param map Parameters of the mapping that is to be created.
1164 *
1165 * \return
1166 * Zero on success or an \c errno value on failure.
1167 */
1168 static int
pci_device_solx_devfs_map_range(struct pci_device * dev,struct pci_device_mapping * map)1169 pci_device_solx_devfs_map_range(struct pci_device *dev,
1170 struct pci_device_mapping *map)
1171 {
1172 const int prot = ((map->flags & PCI_DEV_MAP_FLAG_WRITABLE) != 0)
1173 ? (PROT_READ | PROT_WRITE) : PROT_READ;
1174 int err = 0;
1175
1176 #ifdef __sparc
1177 char map_dev[128];
1178 int map_fd;
1179
1180 if (MAPPING_DEV_PATH(dev))
1181 snprintf(map_dev, sizeof (map_dev), "%s%s", "/devices", MAPPING_DEV_PATH(dev));
1182 else
1183 strcpy (map_dev, "/dev/fb0");
1184
1185 if ((map_fd = open(map_dev, O_RDWR)) < 0) {
1186 err = errno;
1187 (void) fprintf(stderr, "can not open %s: %s\n", map_dev,
1188 strerror(errno));
1189 return err;
1190 }
1191
1192 map->memory = mmap(NULL, map->size, prot, MAP_SHARED, map_fd, map->base);
1193 #else
1194 /*
1195 * Still used xsvc to do the user space mapping
1196 */
1197 if (xsvc_fd < 0) {
1198 if ((xsvc_fd = open("/dev/xsvc", O_RDWR)) < 0) {
1199 err = errno;
1200 (void) fprintf(stderr, "can not open /dev/xsvc: %s\n",
1201 strerror(errno));
1202 return err;
1203 }
1204 }
1205
1206 map->memory = mmap(NULL, map->size, prot, MAP_SHARED, xsvc_fd, map->base);
1207 #endif
1208
1209 if (map->memory == MAP_FAILED) {
1210 err = errno;
1211
1212 (void) fprintf(stderr, "map rom region =%llx failed: %s\n",
1213 map->base, strerror(errno));
1214 }
1215
1216 #ifdef __sparc
1217 close (map_fd);
1218 #endif
1219
1220 return err;
1221 }
1222