1 /*-
2 * Copyright (c) 2016 Emmanuel Vadot <[email protected]> All rights reserved.
3 * Copyright (c) 2006 M. Warner Losh <[email protected]>
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 /*
28 * Generic OHCI driver based on AT91 OHCI
29 */
30
31 #include <sys/cdefs.h>
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 #include <sys/rman.h>
36 #include <sys/condvar.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39
40 #include <machine/bus.h>
41 #include <dev/ofw/ofw_bus.h>
42 #include <dev/ofw/ofw_bus_subr.h>
43
44 #include <dev/usb/usb.h>
45 #include <dev/usb/usbdi.h>
46
47 #include <dev/usb/usb_core.h>
48 #include <dev/usb/usb_busdma.h>
49 #include <dev/usb/usb_process.h>
50 #include <dev/usb/usb_util.h>
51
52 #include <dev/usb/usb_controller.h>
53 #include <dev/usb/usb_bus.h>
54 #include <dev/usb/controller/ohci.h>
55 #include <dev/usb/controller/ohcireg.h>
56
57 #include <dev/extres/clk/clk.h>
58 #include <dev/extres/hwreset/hwreset.h>
59 #include <dev/extres/phy/phy.h>
60 #include <dev/extres/phy/phy_usb.h>
61
62 #include "generic_usb_if.h"
63
64 struct clk_list {
65 TAILQ_ENTRY(clk_list) next;
66 clk_t clk;
67 };
68 struct phy_list {
69 TAILQ_ENTRY(phy_list) next;
70 phy_t phy;
71 };
72 struct hwrst_list {
73 TAILQ_ENTRY(hwrst_list) next;
74 hwreset_t rst;
75 };
76
77 struct generic_ohci_softc {
78 ohci_softc_t ohci_sc;
79
80 TAILQ_HEAD(, clk_list) clk_list;
81 TAILQ_HEAD(, phy_list) phy_list;
82 TAILQ_HEAD(, hwrst_list) rst_list;
83 };
84
85 static int generic_ohci_detach(device_t);
86
87 static int
generic_ohci_probe(device_t dev)88 generic_ohci_probe(device_t dev)
89 {
90
91 if (!ofw_bus_status_okay(dev))
92 return (ENXIO);
93
94 if (!ofw_bus_is_compatible(dev, "generic-ohci"))
95 return (ENXIO);
96
97 device_set_desc(dev, "Generic OHCI Controller");
98
99 return (BUS_PROBE_DEFAULT);
100 }
101
102 static int
generic_ohci_attach(device_t dev)103 generic_ohci_attach(device_t dev)
104 {
105 struct generic_ohci_softc *sc = device_get_softc(dev);
106 int err, rid;
107 int off;
108 struct clk_list *clkp;
109 struct phy_list *phyp;
110 struct hwrst_list *rstp;
111 clk_t clk;
112 phy_t phy;
113 hwreset_t rst;
114
115 sc->ohci_sc.sc_bus.parent = dev;
116 sc->ohci_sc.sc_bus.devices = sc->ohci_sc.sc_devices;
117 sc->ohci_sc.sc_bus.devices_max = OHCI_MAX_DEVICES;
118 sc->ohci_sc.sc_bus.dma_bits = 32;
119
120 /* get all DMA memory */
121 if (usb_bus_mem_alloc_all(&sc->ohci_sc.sc_bus,
122 USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) {
123 return (ENOMEM);
124 }
125
126 rid = 0;
127 sc->ohci_sc.sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
128 &rid, RF_ACTIVE);
129 if (sc->ohci_sc.sc_io_res == 0) {
130 err = ENOMEM;
131 goto error;
132 }
133
134 sc->ohci_sc.sc_io_tag = rman_get_bustag(sc->ohci_sc.sc_io_res);
135 sc->ohci_sc.sc_io_hdl = rman_get_bushandle(sc->ohci_sc.sc_io_res);
136 sc->ohci_sc.sc_io_size = rman_get_size(sc->ohci_sc.sc_io_res);
137
138 rid = 0;
139 sc->ohci_sc.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
140 RF_ACTIVE);
141 if (sc->ohci_sc.sc_irq_res == 0) {
142 err = ENXIO;
143 goto error;
144 }
145 sc->ohci_sc.sc_bus.bdev = device_add_child(dev, "usbus", -1);
146 if (sc->ohci_sc.sc_bus.bdev == 0) {
147 err = ENXIO;
148 goto error;
149 }
150 device_set_ivars(sc->ohci_sc.sc_bus.bdev, &sc->ohci_sc.sc_bus);
151
152 strlcpy(sc->ohci_sc.sc_vendor, "Generic",
153 sizeof(sc->ohci_sc.sc_vendor));
154
155 err = bus_setup_intr(dev, sc->ohci_sc.sc_irq_res,
156 INTR_TYPE_BIO | INTR_MPSAFE, NULL,
157 (driver_intr_t *)ohci_interrupt, sc, &sc->ohci_sc.sc_intr_hdl);
158 if (err) {
159 sc->ohci_sc.sc_intr_hdl = NULL;
160 goto error;
161 }
162
163 TAILQ_INIT(&sc->clk_list);
164 /* Enable clock */
165 for (off = 0; clk_get_by_ofw_index(dev, 0, off, &clk) == 0; off++) {
166 err = clk_enable(clk);
167 if (err != 0) {
168 device_printf(dev, "Could not enable clock %s\n",
169 clk_get_name(clk));
170 goto error;
171 }
172 clkp = malloc(sizeof(*clkp), M_DEVBUF, M_WAITOK | M_ZERO);
173 clkp->clk = clk;
174 TAILQ_INSERT_TAIL(&sc->clk_list, clkp, next);
175 }
176
177 /* De-assert reset */
178 TAILQ_INIT(&sc->rst_list);
179 for (off = 0; hwreset_get_by_ofw_idx(dev, 0, off, &rst) == 0; off++) {
180 err = hwreset_deassert(rst);
181 if (err != 0) {
182 device_printf(dev, "Could not de-assert reset\n");
183 goto error;
184 }
185 rstp = malloc(sizeof(*rstp), M_DEVBUF, M_WAITOK | M_ZERO);
186 rstp->rst = rst;
187 TAILQ_INSERT_TAIL(&sc->rst_list, rstp, next);
188 }
189
190 /* Enable phy */
191 TAILQ_INIT(&sc->phy_list);
192 for (off = 0; phy_get_by_ofw_idx(dev, 0, off, &phy) == 0; off++) {
193 err = phy_usb_set_mode(phy, PHY_USB_MODE_HOST);
194 if (err != 0) {
195 device_printf(dev, "Could not set phy to host mode\n");
196 goto error;
197 }
198 err = phy_enable(phy);
199 if (err != 0) {
200 device_printf(dev, "Could not enable phy\n");
201 goto error;
202 }
203 phyp = malloc(sizeof(*phyp), M_DEVBUF, M_WAITOK | M_ZERO);
204 phyp->phy = phy;
205 TAILQ_INSERT_TAIL(&sc->phy_list, phyp, next);
206 }
207
208 if (GENERIC_USB_INIT(dev) != 0) {
209 err = ENXIO;
210 goto error;
211 }
212
213 err = ohci_init(&sc->ohci_sc);
214 if (err == 0)
215 err = device_probe_and_attach(sc->ohci_sc.sc_bus.bdev);
216 if (err)
217 goto error;
218
219 return (0);
220 error:
221 generic_ohci_detach(dev);
222 return (err);
223 }
224
225 static int
generic_ohci_detach(device_t dev)226 generic_ohci_detach(device_t dev)
227 {
228 struct generic_ohci_softc *sc = device_get_softc(dev);
229 int err;
230 struct clk_list *clk, *clk_tmp;
231 struct phy_list *phy, *phy_tmp;
232 struct hwrst_list *rst, *rst_tmp;
233
234 /* during module unload there are lots of children leftover */
235 device_delete_children(dev);
236
237 /*
238 * Put the controller into reset, then disable clocks and do
239 * the MI tear down. We have to disable the clocks/hardware
240 * after we do the rest of the teardown. We also disable the
241 * clocks in the opposite order we acquire them, but that
242 * doesn't seem to be absolutely necessary. We free up the
243 * clocks after we disable them, so the system could, in
244 * theory, reuse them.
245 */
246 bus_space_write_4(sc->ohci_sc.sc_io_tag, sc->ohci_sc.sc_io_hdl,
247 OHCI_CONTROL, 0);
248
249 if (sc->ohci_sc.sc_irq_res && sc->ohci_sc.sc_intr_hdl) {
250 /*
251 * only call ohci_detach() after ohci_init()
252 */
253 ohci_detach(&sc->ohci_sc);
254
255 err = bus_teardown_intr(dev, sc->ohci_sc.sc_irq_res,
256 sc->ohci_sc.sc_intr_hdl);
257 sc->ohci_sc.sc_intr_hdl = NULL;
258 }
259 if (sc->ohci_sc.sc_irq_res) {
260 bus_release_resource(dev, SYS_RES_IRQ, 0,
261 sc->ohci_sc.sc_irq_res);
262 sc->ohci_sc.sc_irq_res = NULL;
263 }
264 if (sc->ohci_sc.sc_io_res) {
265 bus_release_resource(dev, SYS_RES_MEMORY, 0,
266 sc->ohci_sc.sc_io_res);
267 sc->ohci_sc.sc_io_res = NULL;
268 }
269 usb_bus_mem_free_all(&sc->ohci_sc.sc_bus, &ohci_iterate_hw_softc);
270
271 /* Disable phy */
272 TAILQ_FOREACH_SAFE(phy, &sc->phy_list, next, phy_tmp) {
273 err = phy_disable(phy->phy);
274 if (err != 0)
275 device_printf(dev, "Could not disable phy\n");
276 phy_release(phy->phy);
277 TAILQ_REMOVE(&sc->phy_list, phy, next);
278 free(phy, M_DEVBUF);
279 }
280
281 /* Assert reset */
282 TAILQ_FOREACH_SAFE(rst, &sc->rst_list, next, rst_tmp) {
283 hwreset_assert(rst->rst);
284 hwreset_release(rst->rst);
285 TAILQ_REMOVE(&sc->rst_list, rst, next);
286 free(rst, M_DEVBUF);
287 }
288
289 /* Disable clock */
290 TAILQ_FOREACH_SAFE(clk, &sc->clk_list, next, clk_tmp) {
291 err = clk_disable(clk->clk);
292 if (err != 0)
293 device_printf(dev, "Could not disable clock %s\n",
294 clk_get_name(clk->clk));
295 err = clk_release(clk->clk);
296 if (err != 0)
297 device_printf(dev, "Could not release clock %s\n",
298 clk_get_name(clk->clk));
299 TAILQ_REMOVE(&sc->clk_list, clk, next);
300 free(clk, M_DEVBUF);
301 }
302
303 if (GENERIC_USB_DEINIT(dev) != 0)
304 return (ENXIO);
305
306 return (0);
307 }
308
309 static device_method_t generic_ohci_methods[] = {
310 /* Device interface */
311 DEVMETHOD(device_probe, generic_ohci_probe),
312 DEVMETHOD(device_attach, generic_ohci_attach),
313 DEVMETHOD(device_detach, generic_ohci_detach),
314
315 DEVMETHOD(device_suspend, bus_generic_suspend),
316 DEVMETHOD(device_resume, bus_generic_resume),
317 DEVMETHOD(device_shutdown, bus_generic_shutdown),
318
319 DEVMETHOD_END
320 };
321
322 driver_t generic_ohci_driver = {
323 .name = "ohci",
324 .methods = generic_ohci_methods,
325 .size = sizeof(struct generic_ohci_softc),
326 };
327
328 DRIVER_MODULE(ohci, simplebus, generic_ohci_driver, 0, 0);
329 MODULE_DEPEND(ohci, usb, 1, 1, 1);
330