1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson ([email protected]) at
9 * Carlstedt Research & Technology.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 /*
35 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
36 *
37 * The EHCI 1.0 spec can be found at
38 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
39 * and the USB 2.0 spec at
40 * http://www.usb.org/developers/docs/usb_20.zip
41 */
42
43 /* The low level controller code for EHCI has been split into
44 * PCI probes and EHCI specific code. This was done to facilitate the
45 * sharing of code between *BSD's
46 */
47
48 #include <sys/stdint.h>
49 #include <sys/stddef.h>
50 #include <sys/param.h>
51 #include <sys/queue.h>
52 #include <sys/types.h>
53 #include <sys/systm.h>
54 #include <sys/kernel.h>
55 #include <sys/bus.h>
56 #include <sys/module.h>
57 #include <sys/lock.h>
58 #include <sys/mutex.h>
59 #include <sys/condvar.h>
60 #include <sys/sysctl.h>
61 #include <sys/sx.h>
62 #include <sys/unistd.h>
63 #include <sys/callout.h>
64 #include <sys/malloc.h>
65 #include <sys/priv.h>
66
67 #include <dev/usb/usb.h>
68 #include <dev/usb/usbdi.h>
69
70 #include <dev/usb/usb_core.h>
71 #include <dev/usb/usb_busdma.h>
72 #include <dev/usb/usb_process.h>
73 #include <dev/usb/usb_util.h>
74
75 #include <dev/usb/usb_controller.h>
76 #include <dev/usb/usb_bus.h>
77 #include <dev/usb/usb_pci.h>
78 #include <dev/usb/controller/ehci.h>
79 #include <dev/usb/controller/ehcireg.h>
80 #include "usb_if.h"
81
82 #define PCI_EHCI_VENDORID_ACERLABS 0x10b9
83 #define PCI_EHCI_VENDORID_AMD 0x1022
84 #define PCI_EHCI_VENDORID_APPLE 0x106b
85 #define PCI_EHCI_VENDORID_ATI 0x1002
86 #define PCI_EHCI_VENDORID_CMDTECH 0x1095
87 #define PCI_EHCI_VENDORID_HYGON 0x1d94
88 #define PCI_EHCI_VENDORID_INTEL 0x8086
89 #define PCI_EHCI_VENDORID_NEC 0x1033
90 #define PCI_EHCI_VENDORID_OPTI 0x1045
91 #define PCI_EHCI_VENDORID_PHILIPS 0x1131
92 #define PCI_EHCI_VENDORID_SIS 0x1039
93 #define PCI_EHCI_VENDORID_NVIDIA 0x12D2
94 #define PCI_EHCI_VENDORID_NVIDIA2 0x10DE
95 #define PCI_EHCI_VENDORID_VIA 0x1106
96 #define PCI_EHCI_VENDORID_VMWARE 0x15ad
97 #define PCI_EHCI_VENDORID_ZHAOXIN 0x1d17
98
99 static device_probe_t ehci_pci_probe;
100 static device_attach_t ehci_pci_attach;
101 static device_detach_t ehci_pci_detach;
102 static usb_take_controller_t ehci_pci_take_controller;
103
104 static const char *
ehci_pci_match(device_t self)105 ehci_pci_match(device_t self)
106 {
107 uint32_t device_id = pci_get_devid(self);
108
109 switch (device_id) {
110 case 0x523910b9:
111 return "ALi M5239 USB 2.0 controller";
112
113 case 0x10227463:
114 return "AMD 8111 USB 2.0 controller";
115
116 case 0x20951022:
117 return ("AMD CS5536 (Geode) USB 2.0 controller");
118 case 0x78081022:
119 return ("AMD FCH USB 2.0 controller");
120 case 0x79081022:
121 return ("AMD FCH USB 2.0 controller");
122
123 case 0x43451002:
124 return "ATI SB200 USB 2.0 controller";
125 case 0x43731002:
126 return "ATI SB400 USB 2.0 controller";
127 case 0x43961002:
128 return ("AMD SB7x0/SB8x0/SB9x0 USB 2.0 controller");
129
130 case 0x0f348086:
131 return ("Intel BayTrail USB 2.0 controller");
132 case 0x1c268086:
133 return ("Intel Cougar Point USB 2.0 controller");
134 case 0x1c2d8086:
135 return ("Intel Cougar Point USB 2.0 controller");
136 case 0x1d268086:
137 return ("Intel Patsburg USB 2.0 controller");
138 case 0x1d2d8086:
139 return ("Intel Patsburg USB 2.0 controller");
140 case 0x1e268086:
141 return ("Intel Panther Point USB 2.0 controller");
142 case 0x1e2d8086:
143 return ("Intel Panther Point USB 2.0 controller");
144 case 0x1f2c8086:
145 return ("Intel Avoton USB 2.0 controller");
146 case 0x25ad8086:
147 return "Intel 6300ESB USB 2.0 controller";
148 case 0x24cd8086:
149 return "Intel 82801DB/L/M (ICH4) USB 2.0 controller";
150 case 0x24dd8086:
151 return "Intel 82801EB/R (ICH5) USB 2.0 controller";
152 case 0x265c8086:
153 return "Intel 82801FB (ICH6) USB 2.0 controller";
154 case 0x268c8086:
155 return ("Intel 63XXESB USB 2.0 controller");
156 case 0x27cc8086:
157 return "Intel 82801GB/R (ICH7) USB 2.0 controller";
158 case 0x28368086:
159 return "Intel 82801H (ICH8) USB 2.0 controller USB2-A";
160 case 0x283a8086:
161 return "Intel 82801H (ICH8) USB 2.0 controller USB2-B";
162 case 0x293a8086:
163 return "Intel 82801I (ICH9) USB 2.0 controller";
164 case 0x293c8086:
165 return "Intel 82801I (ICH9) USB 2.0 controller";
166 case 0x3a3a8086:
167 return "Intel 82801JI (ICH10) USB 2.0 controller USB-A";
168 case 0x3a3c8086:
169 return "Intel 82801JI (ICH10) USB 2.0 controller USB-B";
170 case 0x3b348086:
171 return ("Intel PCH USB 2.0 controller USB-A");
172 case 0x3b3c8086:
173 return ("Intel PCH USB 2.0 controller USB-B");
174 case 0x8c268086:
175 return ("Intel Lynx Point USB 2.0 controller USB-A");
176 case 0x8c2d8086:
177 return ("Intel Lynx Point USB 2.0 controller USB-B");
178 case 0x8ca68086:
179 return ("Intel Wildcat Point USB 2.0 controller USB-A");
180 case 0x8cad8086:
181 return ("Intel Wildcat Point USB 2.0 controller USB-B");
182 case 0x8d268086:
183 return ("Intel Wellsburg USB 2.0 controller");
184 case 0x8d2d8086:
185 return ("Intel Wellsburg USB 2.0 controller");
186 case 0x9c268086:
187 return ("Intel Lynx Point-LP USB 2.0 controller");
188 case 0x9ca68086:
189 return ("Intel Wildcat Point-LP USB 2.0 controller");
190
191 case 0x00e01033:
192 return ("NEC uPD 72010x USB 2.0 controller");
193
194 case 0x006810de:
195 return "NVIDIA nForce2 USB 2.0 controller";
196 case 0x008810de:
197 return "NVIDIA nForce2 Ultra 400 USB 2.0 controller";
198 case 0x00d810de:
199 return "NVIDIA nForce3 USB 2.0 controller";
200 case 0x00e810de:
201 return "NVIDIA nForce3 250 USB 2.0 controller";
202 case 0x005b10de:
203 return "NVIDIA nForce CK804 USB 2.0 controller";
204 case 0x036d10de:
205 return "NVIDIA nForce MCP55 USB 2.0 controller";
206 case 0x03f210de:
207 return "NVIDIA nForce MCP61 USB 2.0 controller";
208 case 0x0aa610de:
209 return "NVIDIA nForce MCP79 USB 2.0 controller";
210 case 0x0aa910de:
211 return "NVIDIA nForce MCP79 USB 2.0 controller";
212 case 0x0aaa10de:
213 return "NVIDIA nForce MCP79 USB 2.0 controller";
214
215 case 0x15621131:
216 return "Philips ISP156x USB 2.0 controller";
217
218 case 0x70021039:
219 return "SiS 968 USB 2.0 controller";
220
221 case 0x31041106:
222 return ("VIA VT6202 USB 2.0 controller");
223
224 case 0x077015ad:
225 return ("VMware USB 2.0 controller");
226
227 case 0x31041d17:
228 return ("Zhaoxin ZX-100/ZX-200/ZX-E USB 2.0 controller");
229
230 default:
231 break;
232 }
233
234 if ((pci_get_class(self) == PCIC_SERIALBUS)
235 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
236 && (pci_get_progif(self) == PCI_INTERFACE_EHCI)) {
237 return ("EHCI (generic) USB 2.0 controller");
238 }
239 return (NULL); /* dunno */
240 }
241
242 static int
ehci_pci_probe(device_t self)243 ehci_pci_probe(device_t self)
244 {
245 const char *desc = ehci_pci_match(self);
246
247 if (desc) {
248 device_set_desc(self, desc);
249 return (BUS_PROBE_DEFAULT);
250 } else {
251 return (ENXIO);
252 }
253 }
254
255 static void
ehci_pci_ati_quirk(device_t self,uint8_t is_sb700)256 ehci_pci_ati_quirk(device_t self, uint8_t is_sb700)
257 {
258 device_t smbdev;
259 uint32_t val;
260
261 if (is_sb700) {
262 /* Lookup SMBUS PCI device */
263 smbdev = pci_find_device(PCI_EHCI_VENDORID_ATI, 0x4385);
264 if (smbdev == NULL)
265 return;
266 val = pci_get_revid(smbdev);
267 if (val != 0x3a && val != 0x3b)
268 return;
269 }
270
271 /*
272 * Note: this bit is described as reserved in SB700
273 * Register Reference Guide.
274 */
275 val = pci_read_config(self, 0x53, 1);
276 if (!(val & 0x8)) {
277 val |= 0x8;
278 pci_write_config(self, 0x53, val, 1);
279 device_printf(self, "AMD SB600/700 quirk applied\n");
280 }
281 }
282
283 static void
ehci_pci_via_quirk(device_t self)284 ehci_pci_via_quirk(device_t self)
285 {
286 uint32_t val;
287
288 if ((pci_get_device(self) == 0x3104) &&
289 ((pci_get_revid(self) & 0xf0) == 0x60)) {
290 /* Correct schedule sleep time to 10us */
291 val = pci_read_config(self, 0x4b, 1);
292 if (val & 0x20)
293 return;
294 val |= 0x20;
295 pci_write_config(self, 0x4b, val, 1);
296 device_printf(self, "VIA-quirk applied\n");
297 }
298 }
299
300 static int
ehci_pci_attach(device_t self)301 ehci_pci_attach(device_t self)
302 {
303 ehci_softc_t *sc = device_get_softc(self);
304 int err;
305 int rid;
306
307 /* initialise some bus fields */
308 sc->sc_bus.parent = self;
309 sc->sc_bus.devices = sc->sc_devices;
310 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
311 sc->sc_bus.dma_bits = 32;
312
313 /* get all DMA memory */
314 if (usb_bus_mem_alloc_all(&sc->sc_bus,
315 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
316 return (ENOMEM);
317 }
318
319 pci_enable_busmaster(self);
320
321 switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USB_REV_MASK) {
322 case PCI_USB_REV_PRE_1_0:
323 case PCI_USB_REV_1_0:
324 case PCI_USB_REV_1_1:
325 /*
326 * NOTE: some EHCI USB controllers have the wrong USB
327 * revision number. It appears those controllers are
328 * fully compliant so we just ignore this value in
329 * some common cases.
330 */
331 device_printf(self, "pre-2.0 USB revision (ignored)\n");
332 /* fallthrough */
333 case PCI_USB_REV_2_0:
334 break;
335 default:
336 /* Quirk for Parallels Desktop 4.0 */
337 device_printf(self, "USB revision is unknown. Assuming v2.0.\n");
338 break;
339 }
340
341 rid = PCI_CBMEM;
342 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
343 RF_ACTIVE);
344 if (!sc->sc_io_res) {
345 device_printf(self, "Could not map memory\n");
346 goto error;
347 }
348 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
349 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
350 sc->sc_io_size = rman_get_size(sc->sc_io_res);
351
352 rid = 0;
353 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
354 RF_SHAREABLE | RF_ACTIVE);
355 if (sc->sc_irq_res == NULL) {
356 device_printf(self, "Could not allocate irq\n");
357 goto error;
358 }
359 sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
360 if (!sc->sc_bus.bdev) {
361 device_printf(self, "Could not add USB device\n");
362 goto error;
363 }
364 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
365
366 /*
367 * ehci_pci_match will never return NULL if ehci_pci_probe
368 * succeeded
369 */
370 device_set_desc(sc->sc_bus.bdev, ehci_pci_match(self));
371 switch (pci_get_vendor(self)) {
372 case PCI_EHCI_VENDORID_ACERLABS:
373 sprintf(sc->sc_vendor, "AcerLabs");
374 break;
375 case PCI_EHCI_VENDORID_AMD:
376 sprintf(sc->sc_vendor, "AMD");
377 break;
378 case PCI_EHCI_VENDORID_APPLE:
379 sprintf(sc->sc_vendor, "Apple");
380 break;
381 case PCI_EHCI_VENDORID_ATI:
382 sprintf(sc->sc_vendor, "ATI");
383 break;
384 case PCI_EHCI_VENDORID_CMDTECH:
385 sprintf(sc->sc_vendor, "CMDTECH");
386 break;
387 case PCI_EHCI_VENDORID_HYGON:
388 sprintf(sc->sc_vendor, "Hygon");
389 break;
390 case PCI_EHCI_VENDORID_INTEL:
391 sprintf(sc->sc_vendor, "Intel");
392 break;
393 case PCI_EHCI_VENDORID_NEC:
394 sprintf(sc->sc_vendor, "NEC");
395 break;
396 case PCI_EHCI_VENDORID_OPTI:
397 sprintf(sc->sc_vendor, "OPTi");
398 break;
399 case PCI_EHCI_VENDORID_PHILIPS:
400 sprintf(sc->sc_vendor, "Philips");
401 break;
402 case PCI_EHCI_VENDORID_SIS:
403 sprintf(sc->sc_vendor, "SiS");
404 break;
405 case PCI_EHCI_VENDORID_NVIDIA:
406 case PCI_EHCI_VENDORID_NVIDIA2:
407 sprintf(sc->sc_vendor, "nVidia");
408 break;
409 case PCI_EHCI_VENDORID_VIA:
410 sprintf(sc->sc_vendor, "VIA");
411 break;
412 case PCI_EHCI_VENDORID_VMWARE:
413 sprintf(sc->sc_vendor, "VMware");
414 break;
415 case PCI_EHCI_VENDORID_ZHAOXIN:
416 sprintf(sc->sc_vendor, "Zhaoxin");
417 break;
418 default:
419 if (bootverbose)
420 device_printf(self, "(New EHCI DeviceId=0x%08x)\n",
421 pci_get_devid(self));
422 sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
423 }
424
425 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
426 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
427 if (err) {
428 device_printf(self, "Could not setup irq, %d\n", err);
429 sc->sc_intr_hdl = NULL;
430 goto error;
431 }
432 ehci_pci_take_controller(self);
433
434 /* Undocumented quirks taken from Linux */
435
436 switch (pci_get_vendor(self)) {
437 case PCI_EHCI_VENDORID_ATI:
438 /* SB600 and SB700 EHCI quirk */
439 switch (pci_get_device(self)) {
440 case 0x4386:
441 ehci_pci_ati_quirk(self, 0);
442 break;
443 case 0x4396:
444 ehci_pci_ati_quirk(self, 1);
445 break;
446 default:
447 break;
448 }
449 break;
450
451 case PCI_EHCI_VENDORID_VIA:
452 ehci_pci_via_quirk(self);
453 break;
454
455 default:
456 break;
457 }
458
459 /* Dropped interrupts workaround */
460 switch (pci_get_vendor(self)) {
461 case PCI_EHCI_VENDORID_ATI:
462 case PCI_EHCI_VENDORID_VIA:
463 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG;
464 if (bootverbose)
465 device_printf(self,
466 "Dropped interrupts workaround enabled\n");
467 break;
468 default:
469 break;
470 }
471
472 /* Doorbell feature workaround */
473 switch (pci_get_vendor(self)) {
474 case PCI_EHCI_VENDORID_NVIDIA:
475 case PCI_EHCI_VENDORID_NVIDIA2:
476 sc->sc_flags |= EHCI_SCFLG_IAADBUG;
477 if (bootverbose)
478 device_printf(self,
479 "Doorbell workaround enabled\n");
480 break;
481 default:
482 break;
483 }
484
485 err = ehci_init(sc);
486 if (!err) {
487 err = device_probe_and_attach(sc->sc_bus.bdev);
488 }
489 if (err) {
490 device_printf(self, "USB init failed err=%d\n", err);
491 goto error;
492 }
493 return (0);
494
495 error:
496 ehci_pci_detach(self);
497 return (ENXIO);
498 }
499
500 static int
ehci_pci_detach(device_t self)501 ehci_pci_detach(device_t self)
502 {
503 ehci_softc_t *sc = device_get_softc(self);
504
505 /* during module unload there are lots of children leftover */
506 device_delete_children(self);
507
508 pci_disable_busmaster(self);
509
510 if (sc->sc_irq_res && sc->sc_intr_hdl) {
511 /*
512 * only call ehci_detach() after ehci_init()
513 */
514 ehci_detach(sc);
515
516 int err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
517
518 if (err)
519 /* XXX or should we panic? */
520 device_printf(self, "Could not tear down irq, %d\n",
521 err);
522 sc->sc_intr_hdl = NULL;
523 }
524 if (sc->sc_irq_res) {
525 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
526 sc->sc_irq_res = NULL;
527 }
528 if (sc->sc_io_res) {
529 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM,
530 sc->sc_io_res);
531 sc->sc_io_res = NULL;
532 }
533 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
534
535 return (0);
536 }
537
538 static int
ehci_pci_take_controller(device_t self)539 ehci_pci_take_controller(device_t self)
540 {
541 ehci_softc_t *sc = device_get_softc(self);
542 uint32_t cparams;
543 uint32_t eec;
544 uint16_t to;
545 uint8_t eecp;
546 uint8_t bios_sem;
547
548 cparams = EREAD4(sc, EHCI_HCCPARAMS);
549
550 /* Synchronise with the BIOS if it owns the controller. */
551 for (eecp = EHCI_HCC_EECP(cparams); eecp != 0;
552 eecp = EHCI_EECP_NEXT(eec)) {
553 eec = pci_read_config(self, eecp, 4);
554 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP) {
555 continue;
556 }
557 bios_sem = pci_read_config(self, eecp +
558 EHCI_LEGSUP_BIOS_SEM, 1);
559 if (bios_sem == 0) {
560 continue;
561 }
562 device_printf(sc->sc_bus.bdev, "waiting for BIOS "
563 "to give up control\n");
564 pci_write_config(self, eecp +
565 EHCI_LEGSUP_OS_SEM, 1, 1);
566 to = 500;
567 while (1) {
568 bios_sem = pci_read_config(self, eecp +
569 EHCI_LEGSUP_BIOS_SEM, 1);
570 if (bios_sem == 0)
571 break;
572
573 if (--to == 0) {
574 device_printf(sc->sc_bus.bdev,
575 "timed out waiting for BIOS\n");
576 break;
577 }
578 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */
579 }
580 }
581 return (0);
582 }
583
584 static device_method_t ehci_pci_methods[] = {
585 /* Device interface */
586 DEVMETHOD(device_probe, ehci_pci_probe),
587 DEVMETHOD(device_attach, ehci_pci_attach),
588 DEVMETHOD(device_detach, ehci_pci_detach),
589 DEVMETHOD(device_suspend, bus_generic_suspend),
590 DEVMETHOD(device_resume, bus_generic_resume),
591 DEVMETHOD(device_shutdown, bus_generic_shutdown),
592 DEVMETHOD(usb_take_controller, ehci_pci_take_controller),
593
594 DEVMETHOD_END
595 };
596
597 static driver_t ehci_driver = {
598 .name = "ehci",
599 .methods = ehci_pci_methods,
600 .size = sizeof(struct ehci_softc),
601 };
602
603 DRIVER_MODULE(ehci, pci, ehci_driver, 0, 0);
604 MODULE_DEPEND(ehci, usb, 1, 1, 1);
605