1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2004-2006 Marcel Moolenaar
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 #include <sys/conf.h>
34 #include <machine/bus.h>
35 #include <sys/lock.h>
36 #include <sys/mutex.h>
37 #include <sys/rman.h>
38 #include <sys/serial.h>
39
40 #include <dev/scc/scc_bfe.h>
41 #include <dev/scc/scc_bus.h>
42
43 #include <dev/ic/quicc.h>
44
45 #include "scc_if.h"
46
47 #define quicc_read2(bas, reg) \
48 bus_space_read_2((bas)->bst, (bas)->bsh, reg)
49 #define quicc_read4(bas, reg) \
50 bus_space_read_4((bas)->bst, (bas)->bsh, reg)
51
52 #define quicc_write2(bas, reg, val) \
53 bus_space_write_2((bas)->bst, (bas)->bsh, reg, val)
54 #define quicc_write4(bas, reg, val) \
55 bus_space_write_4((bas)->bst, (bas)->bsh, reg, val)
56
57 static int quicc_bfe_attach(struct scc_softc *, int);
58 static int quicc_bfe_enabled(struct scc_softc *, struct scc_chan *);
59 static int quicc_bfe_iclear(struct scc_softc *, struct scc_chan *);
60 static int quicc_bfe_ipend(struct scc_softc *);
61 static int quicc_bfe_probe(struct scc_softc *);
62
63 static kobj_method_t quicc_methods[] = {
64 KOBJMETHOD(scc_attach, quicc_bfe_attach),
65 KOBJMETHOD(scc_enabled, quicc_bfe_enabled),
66 KOBJMETHOD(scc_iclear, quicc_bfe_iclear),
67 KOBJMETHOD(scc_ipend, quicc_bfe_ipend),
68 KOBJMETHOD(scc_probe, quicc_bfe_probe),
69 KOBJMETHOD_END
70 };
71
72 struct scc_class scc_quicc_class = {
73 "QUICC class",
74 quicc_methods,
75 sizeof(struct scc_softc),
76 .cl_channels = 4,
77 .cl_class = SCC_CLASS_QUICC,
78 .cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC,
79 .cl_range = 0,
80 };
81
82 static int
quicc_bfe_attach(struct scc_softc * sc __unused,int reset __unused)83 quicc_bfe_attach(struct scc_softc *sc __unused, int reset __unused)
84 {
85
86 return (0);
87 }
88
89 static int
quicc_bfe_enabled(struct scc_softc * sc,struct scc_chan * ch)90 quicc_bfe_enabled(struct scc_softc *sc, struct scc_chan *ch)
91 {
92 struct scc_bas *bas;
93 int unit;
94 uint16_t val0, val1;
95
96 bas = &sc->sc_bas;
97 unit = ch->ch_nr - 1;
98 val0 = quicc_read2(bas, QUICC_REG_SCC_TODR(unit));
99 quicc_write2(bas, QUICC_REG_SCC_TODR(unit), ~val0);
100 val1 = quicc_read2(bas, QUICC_REG_SCC_TODR(unit));
101 quicc_write2(bas, QUICC_REG_SCC_TODR(unit), val0);
102 return (((val0 | val1) == 0x8000) ? 1 : 0);
103 }
104
105 static int
quicc_bfe_iclear(struct scc_softc * sc,struct scc_chan * ch)106 quicc_bfe_iclear(struct scc_softc *sc, struct scc_chan *ch)
107 {
108 struct scc_bas *bas;
109 uint16_t rb, st;
110
111 bas = &sc->sc_bas;
112 mtx_lock_spin(&sc->sc_hwmtx);
113 if (ch->ch_ipend & SER_INT_RXREADY) {
114 rb = quicc_read2(bas, QUICC_PRAM_SCC_RBASE(ch->ch_nr - 1));
115 st = quicc_read2(bas, rb);
116 (void)quicc_read4(bas, rb + 4);
117 quicc_write2(bas, rb, st | 0x9000);
118 }
119 mtx_unlock_spin(&sc->sc_hwmtx);
120 return (0);
121 }
122
123 static int
quicc_bfe_ipend(struct scc_softc * sc)124 quicc_bfe_ipend(struct scc_softc *sc)
125 {
126 struct scc_bas *bas;
127 struct scc_chan *ch;
128 int c, ipend;
129 uint16_t scce;
130
131 bas = &sc->sc_bas;
132 ipend = 0;
133 for (c = 0; c < 4; c++) {
134 ch = &sc->sc_chan[c];
135 if (!ch->ch_enabled)
136 continue;
137 ch->ch_ipend = 0;
138 mtx_lock_spin(&sc->sc_hwmtx);
139 scce = quicc_read2(bas, QUICC_REG_SCC_SCCE(c));
140 quicc_write2(bas, QUICC_REG_SCC_SCCE(c), ~0);
141 mtx_unlock_spin(&sc->sc_hwmtx);
142 if (scce & 0x0001)
143 ch->ch_ipend |= SER_INT_RXREADY;
144 if (scce & 0x0002)
145 ch->ch_ipend |= SER_INT_TXIDLE;
146 if (scce & 0x0004)
147 ch->ch_ipend |= SER_INT_OVERRUN;
148 if (scce & 0x0020)
149 ch->ch_ipend |= SER_INT_BREAK;
150 /* XXX SIGNALS */
151 ipend |= ch->ch_ipend;
152 }
153 return (ipend);
154 }
155
156 static int
quicc_bfe_probe(struct scc_softc * sc __unused)157 quicc_bfe_probe(struct scc_softc *sc __unused)
158 {
159
160 return (0);
161 }
162