1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2006 Bernd Walter. All rights reserved.
5 * Copyright (c) 2006 M. Warner Losh <[email protected]>
6 * Copyright (c) 2017 Marius Strobl <[email protected]>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Portions of this software may have been developed with reference to
29 * the SD Simplified Specification. The following disclaimer may apply:
30 *
31 * The following conditions apply to the release of the simplified
32 * specification ("Simplified Specification") by the SD Card Association and
33 * the SD Group. The Simplified Specification is a subset of the complete SD
34 * Specification which is owned by the SD Card Association and the SD
35 * Group. This Simplified Specification is provided on a non-confidential
36 * basis subject to the disclaimers below. Any implementation of the
37 * Simplified Specification may require a license from the SD Card
38 * Association, SD Group, SD-3C LLC or other third parties.
39 *
40 * Disclaimers:
41 *
42 * The information contained in the Simplified Specification is presented only
43 * as a standard specification for SD Cards and SD Host/Ancillary products and
44 * is provided "AS-IS" without any representations or warranties of any
45 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
46 * Card Association for any damages, any infringements of patents or other
47 * right of the SD Group, SD-3C LLC, the SD Card Association or any third
48 * parties, which may result from its use. No license is granted by
49 * implication, estoppel or otherwise under any patent or other rights of the
50 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing
51 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC
52 * or the SD Card Association to disclose or distribute any technical
53 * information, know-how or other confidential information to any third party.
54 */
55
56 #include <sys/cdefs.h>
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/kernel.h>
60 #include <sys/malloc.h>
61 #include <sys/lock.h>
62 #include <sys/module.h>
63 #include <sys/mutex.h>
64 #include <sys/bus.h>
65 #include <sys/endian.h>
66 #include <sys/sbuf.h>
67 #include <sys/sysctl.h>
68 #include <sys/time.h>
69
70 #include <dev/mmc/bridge.h>
71 #include <dev/mmc/mmc_private.h>
72 #include <dev/mmc/mmc_subr.h>
73 #include <dev/mmc/mmcreg.h>
74 #include <dev/mmc/mmcbrvar.h>
75 #include <dev/mmc/mmcvar.h>
76
77 #include "mmcbr_if.h"
78 #include "mmcbus_if.h"
79
80 CTASSERT(bus_timing_max <= sizeof(uint32_t) * NBBY);
81
82 /*
83 * Per-card data
84 */
85 struct mmc_ivars {
86 uint32_t raw_cid[4]; /* Raw bits of the CID */
87 uint32_t raw_csd[4]; /* Raw bits of the CSD */
88 uint32_t raw_scr[2]; /* Raw bits of the SCR */
89 uint8_t raw_ext_csd[MMC_EXTCSD_SIZE]; /* Raw bits of the EXT_CSD */
90 uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */
91 uint16_t rca;
92 u_char read_only; /* True when the device is read-only */
93 u_char high_cap; /* High Capacity device (block addressed) */
94 enum mmc_card_mode mode;
95 enum mmc_bus_width bus_width; /* Bus width to use */
96 struct mmc_cid cid; /* cid decoded */
97 struct mmc_csd csd; /* csd decoded */
98 struct mmc_scr scr; /* scr decoded */
99 struct mmc_sd_status sd_status; /* SD_STATUS decoded */
100 uint32_t sec_count; /* Card capacity in 512byte blocks */
101 uint32_t timings; /* Mask of bus timings supported */
102 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */
103 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */
104 uint32_t tran_speed; /* Max speed in normal mode */
105 uint32_t hs_tran_speed; /* Max speed in high speed mode */
106 uint32_t erase_sector; /* Card native erase sector size */
107 uint32_t cmd6_time; /* Generic switch timeout [us] */
108 uint32_t quirks; /* Quirks as per mmc_quirk->quirks */
109 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */
110 char card_sn_string[16];/* Formatted serial # for disk->d_ident */
111 };
112
113 #define CMD_RETRIES 3
114
115 static const struct mmc_quirk mmc_quirks[] = {
116 /*
117 * For some SanDisk iNAND devices, the CMD38 argument needs to be
118 * provided in EXT_CSD[113].
119 */
120 { 0x2, 0x100, "SEM02G", MMC_QUIRK_INAND_CMD38 },
121 { 0x2, 0x100, "SEM04G", MMC_QUIRK_INAND_CMD38 },
122 { 0x2, 0x100, "SEM08G", MMC_QUIRK_INAND_CMD38 },
123 { 0x2, 0x100, "SEM16G", MMC_QUIRK_INAND_CMD38 },
124 { 0x2, 0x100, "SEM32G", MMC_QUIRK_INAND_CMD38 },
125
126 /*
127 * Disable TRIM for Kingston eMMCs where a firmware bug can lead to
128 * unrecoverable data corruption.
129 */
130 { 0x70, MMC_QUIRK_OID_ANY, "V10008", MMC_QUIRK_BROKEN_TRIM },
131 { 0x70, MMC_QUIRK_OID_ANY, "V10016", MMC_QUIRK_BROKEN_TRIM },
132 { 0x0, 0x0, NULL, 0x0 }
133 };
134
135 static SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
136 "mmc driver");
137
138 static int mmc_debug;
139 SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0,
140 "Debug level");
141
142 /* bus entry points */
143 static int mmc_acquire_bus(device_t busdev, device_t dev);
144 static int mmc_attach(device_t dev);
145 static int mmc_child_location(device_t dev, device_t child, struct sbuf *sb);
146 static int mmc_detach(device_t dev);
147 static int mmc_probe(device_t dev);
148 static int mmc_read_ivar(device_t bus, device_t child, int which,
149 uintptr_t *result);
150 static int mmc_release_bus(device_t busdev, device_t dev);
151 static int mmc_resume(device_t dev);
152 static void mmc_retune_pause(device_t busdev, device_t dev, bool retune);
153 static void mmc_retune_unpause(device_t busdev, device_t dev);
154 static int mmc_suspend(device_t dev);
155 static int mmc_wait_for_request(device_t busdev, device_t dev,
156 struct mmc_request *req);
157 static int mmc_write_ivar(device_t bus, device_t child, int which,
158 uintptr_t value);
159
160 #define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
161 #define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
162 #define MMC_LOCK_INIT(_sc) \
163 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->dev), \
164 "mmc", MTX_DEF)
165 #define MMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx);
166 #define MMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED);
167 #define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED);
168
169 static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid);
170 static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr);
171 static void mmc_app_decode_sd_status(uint32_t *raw_sd_status,
172 struct mmc_sd_status *sd_status);
173 static int mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca,
174 uint32_t *rawsdstatus);
175 static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca,
176 uint32_t *rawscr);
177 static int mmc_calculate_clock(struct mmc_softc *sc);
178 static void mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid,
179 bool is_4_41p);
180 static void mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid);
181 static void mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd);
182 static int mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd);
183 static void mmc_delayed_attach(void *xsc);
184 static int mmc_delete_cards(struct mmc_softc *sc, bool final);
185 static void mmc_discover_cards(struct mmc_softc *sc);
186 static void mmc_format_card_id_string(struct mmc_ivars *ivar);
187 static void mmc_go_discovery(struct mmc_softc *sc);
188 static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start,
189 int size);
190 static int mmc_highest_voltage(uint32_t ocr);
191 static bool mmc_host_timing(device_t dev, enum mmc_bus_timing timing);
192 static void mmc_idle_cards(struct mmc_softc *sc);
193 static void mmc_ms_delay(int ms);
194 static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard);
195 static void mmc_power_down(struct mmc_softc *sc);
196 static void mmc_power_up(struct mmc_softc *sc);
197 static void mmc_rescan_cards(struct mmc_softc *sc);
198 static int mmc_retune(device_t busdev, device_t dev, bool reset);
199 static void mmc_scan(struct mmc_softc *sc);
200 static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp,
201 uint8_t value, uint8_t *res);
202 static int mmc_select_card(struct mmc_softc *sc, uint16_t rca);
203 static uint32_t mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr);
204 static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr,
205 uint32_t *rocr);
206 static int mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd);
207 static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs);
208 static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr,
209 uint32_t *rocr);
210 static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp);
211 static int mmc_set_blocklen(struct mmc_softc *sc, uint32_t len);
212 static int mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar,
213 enum mmc_bus_timing timing);
214 static int mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar);
215 static int mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp);
216 static int mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar,
217 enum mmc_bus_timing timing);
218 static int mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar,
219 enum mmc_bus_timing timing);
220 static int mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar,
221 uint32_t clock);
222 static int mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar,
223 uint32_t max_dtr, enum mmc_bus_timing max_timing);
224 static int mmc_test_bus_width(struct mmc_softc *sc);
225 static uint32_t mmc_timing_to_dtr(struct mmc_ivars *ivar,
226 enum mmc_bus_timing timing);
227 static const char *mmc_timing_to_string(enum mmc_bus_timing timing);
228 static void mmc_update_child_list(struct mmc_softc *sc);
229 static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
230 uint32_t arg, uint32_t flags, uint32_t *resp, int retries);
231 static int mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req);
232 static void mmc_wakeup(struct mmc_request *req);
233
234 static void
mmc_ms_delay(int ms)235 mmc_ms_delay(int ms)
236 {
237
238 DELAY(1000 * ms); /* XXX BAD */
239 }
240
241 static int
mmc_probe(device_t dev)242 mmc_probe(device_t dev)
243 {
244
245 device_set_desc(dev, "MMC/SD bus");
246 return (0);
247 }
248
249 static int
mmc_attach(device_t dev)250 mmc_attach(device_t dev)
251 {
252 struct mmc_softc *sc;
253
254 sc = device_get_softc(dev);
255 sc->dev = dev;
256 MMC_LOCK_INIT(sc);
257
258 /* We'll probe and attach our children later, but before / mount */
259 sc->config_intrhook.ich_func = mmc_delayed_attach;
260 sc->config_intrhook.ich_arg = sc;
261 if (config_intrhook_establish(&sc->config_intrhook) != 0)
262 device_printf(dev, "config_intrhook_establish failed\n");
263 return (0);
264 }
265
266 static int
mmc_detach(device_t dev)267 mmc_detach(device_t dev)
268 {
269 struct mmc_softc *sc = device_get_softc(dev);
270 int err;
271
272 config_intrhook_drain(&sc->config_intrhook);
273 err = mmc_delete_cards(sc, true);
274 if (err != 0)
275 return (err);
276 mmc_power_down(sc);
277 MMC_LOCK_DESTROY(sc);
278
279 return (0);
280 }
281
282 static int
mmc_suspend(device_t dev)283 mmc_suspend(device_t dev)
284 {
285 struct mmc_softc *sc = device_get_softc(dev);
286 int err;
287
288 err = bus_generic_suspend(dev);
289 if (err != 0)
290 return (err);
291 /*
292 * We power down with the bus acquired here, mainly so that no device
293 * is selected any longer and sc->last_rca gets set to 0. Otherwise,
294 * the deselect as part of the bus acquisition in mmc_scan() may fail
295 * during resume, as the bus isn't powered up again before later in
296 * mmc_go_discovery().
297 */
298 err = mmc_acquire_bus(dev, dev);
299 if (err != 0)
300 return (err);
301 mmc_power_down(sc);
302 err = mmc_release_bus(dev, dev);
303 return (err);
304 }
305
306 static int
mmc_resume(device_t dev)307 mmc_resume(device_t dev)
308 {
309 struct mmc_softc *sc = device_get_softc(dev);
310
311 mmc_scan(sc);
312 return (bus_generic_resume(dev));
313 }
314
315 static int
mmc_acquire_bus(device_t busdev,device_t dev)316 mmc_acquire_bus(device_t busdev, device_t dev)
317 {
318 struct mmc_softc *sc;
319 struct mmc_ivars *ivar;
320 int err;
321 uint16_t rca;
322 enum mmc_bus_timing timing;
323
324 err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev);
325 if (err)
326 return (err);
327 sc = device_get_softc(busdev);
328 MMC_LOCK(sc);
329 if (sc->owner)
330 panic("mmc: host bridge didn't serialize us.");
331 sc->owner = dev;
332 MMC_UNLOCK(sc);
333
334 if (busdev != dev) {
335 /*
336 * Keep track of the last rca that we've selected. If
337 * we're asked to do it again, don't. We never
338 * unselect unless the bus code itself wants the mmc
339 * bus, and constantly reselecting causes problems.
340 */
341 ivar = device_get_ivars(dev);
342 rca = ivar->rca;
343 if (sc->last_rca != rca) {
344 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) {
345 device_printf(busdev, "Card at relative "
346 "address %d failed to select\n", rca);
347 return (ENXIO);
348 }
349 sc->last_rca = rca;
350 timing = mmcbr_get_timing(busdev);
351 /*
352 * For eMMC modes, setting/updating bus width and VCCQ
353 * only really is necessary if there actually is more
354 * than one device on the bus as generally that already
355 * had to be done by mmc_calculate_clock() or one of
356 * its calees. Moreover, setting the bus width anew
357 * can trigger re-tuning (via a CRC error on the next
358 * CMD), even if not switching between devices an the
359 * previously selected one is still tuned. Obviously,
360 * we need to re-tune the host controller if devices
361 * are actually switched, though.
362 */
363 if (timing >= bus_timing_mmc_ddr52 &&
364 sc->child_count == 1)
365 return (0);
366 /* Prepare bus width for the new card. */
367 if (bootverbose || mmc_debug) {
368 device_printf(busdev,
369 "setting bus width to %d bits %s timing\n",
370 (ivar->bus_width == bus_width_4) ? 4 :
371 (ivar->bus_width == bus_width_8) ? 8 : 1,
372 mmc_timing_to_string(timing));
373 }
374 if (mmc_set_card_bus_width(sc, ivar, timing) !=
375 MMC_ERR_NONE) {
376 device_printf(busdev, "Card at relative "
377 "address %d failed to set bus width\n",
378 rca);
379 return (ENXIO);
380 }
381 mmcbr_set_bus_width(busdev, ivar->bus_width);
382 mmcbr_update_ios(busdev);
383 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
384 device_printf(busdev, "Failed to set VCCQ "
385 "for card at relative address %d\n", rca);
386 return (ENXIO);
387 }
388 if (timing >= bus_timing_mmc_hs200 &&
389 mmc_retune(busdev, dev, true) != 0) {
390 device_printf(busdev, "Card at relative "
391 "address %d failed to re-tune\n", rca);
392 return (ENXIO);
393 }
394 }
395 } else {
396 /*
397 * If there's a card selected, stand down.
398 */
399 if (sc->last_rca != 0) {
400 if (mmc_select_card(sc, 0) != MMC_ERR_NONE)
401 return (ENXIO);
402 sc->last_rca = 0;
403 }
404 }
405
406 return (0);
407 }
408
409 static int
mmc_release_bus(device_t busdev,device_t dev)410 mmc_release_bus(device_t busdev, device_t dev)
411 {
412 struct mmc_softc *sc;
413
414 sc = device_get_softc(busdev);
415
416 MMC_LOCK(sc);
417 if (!sc->owner)
418 panic("mmc: releasing unowned bus.");
419 if (sc->owner != dev)
420 panic("mmc: you don't own the bus. game over.");
421 sc->owner = NULL;
422 MMC_UNLOCK(sc);
423 return (MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev));
424 }
425
426 static uint32_t
mmc_select_vdd(struct mmc_softc * sc,uint32_t ocr)427 mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr)
428 {
429
430 return (ocr & MMC_OCR_VOLTAGE);
431 }
432
433 static int
mmc_highest_voltage(uint32_t ocr)434 mmc_highest_voltage(uint32_t ocr)
435 {
436 int i;
437
438 for (i = MMC_OCR_MAX_VOLTAGE_SHIFT;
439 i >= MMC_OCR_MIN_VOLTAGE_SHIFT; i--)
440 if (ocr & (1 << i))
441 return (i);
442 return (-1);
443 }
444
445 static void
mmc_wakeup(struct mmc_request * req)446 mmc_wakeup(struct mmc_request *req)
447 {
448 struct mmc_softc *sc;
449
450 sc = (struct mmc_softc *)req->done_data;
451 MMC_LOCK(sc);
452 req->flags |= MMC_REQ_DONE;
453 MMC_UNLOCK(sc);
454 wakeup(req);
455 }
456
457 static int
mmc_wait_for_req(struct mmc_softc * sc,struct mmc_request * req)458 mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req)
459 {
460
461 req->done = mmc_wakeup;
462 req->done_data = sc;
463 if (__predict_false(mmc_debug > 1)) {
464 device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x",
465 req->cmd->opcode, req->cmd->arg, req->cmd->flags);
466 if (req->cmd->data) {
467 printf(" data %d\n", (int)req->cmd->data->len);
468 } else
469 printf("\n");
470 }
471 MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req);
472 MMC_LOCK(sc);
473 while ((req->flags & MMC_REQ_DONE) == 0)
474 msleep(req, &sc->sc_mtx, 0, "mmcreq", 0);
475 MMC_UNLOCK(sc);
476 if (__predict_false(mmc_debug > 2 || (mmc_debug > 0 &&
477 req->cmd->error != MMC_ERR_NONE)))
478 device_printf(sc->dev, "CMD%d RESULT: %d\n",
479 req->cmd->opcode, req->cmd->error);
480 return (0);
481 }
482
483 static int
mmc_wait_for_request(device_t busdev,device_t dev,struct mmc_request * req)484 mmc_wait_for_request(device_t busdev, device_t dev, struct mmc_request *req)
485 {
486 struct mmc_softc *sc;
487 struct mmc_ivars *ivar;
488 int err, i;
489 enum mmc_retune_req retune_req;
490
491 sc = device_get_softc(busdev);
492 KASSERT(sc->owner != NULL,
493 ("%s: Request from %s without bus being acquired.", __func__,
494 device_get_nameunit(dev)));
495
496 /*
497 * Unless no device is selected or re-tuning is already ongoing,
498 * execute re-tuning if a) the bridge is requesting to do so and
499 * re-tuning hasn't been otherwise paused, or b) if a child asked
500 * to be re-tuned prior to pausing (see also mmc_retune_pause()).
501 */
502 if (__predict_false(sc->last_rca != 0 && sc->retune_ongoing == 0 &&
503 (((retune_req = mmcbr_get_retune_req(busdev)) != retune_req_none &&
504 sc->retune_paused == 0) || sc->retune_needed == 1))) {
505 if (__predict_false(mmc_debug > 1)) {
506 device_printf(busdev,
507 "Re-tuning with%s circuit reset required\n",
508 retune_req == retune_req_reset ? "" : "out");
509 }
510 if (device_get_parent(dev) == busdev)
511 ivar = device_get_ivars(dev);
512 else {
513 for (i = 0; i < sc->child_count; i++) {
514 ivar = device_get_ivars(sc->child_list[i]);
515 if (ivar->rca == sc->last_rca)
516 break;
517 }
518 if (ivar->rca != sc->last_rca)
519 return (EINVAL);
520 }
521 sc->retune_ongoing = 1;
522 err = mmc_retune(busdev, dev, retune_req == retune_req_reset);
523 sc->retune_ongoing = 0;
524 switch (err) {
525 case MMC_ERR_NONE:
526 case MMC_ERR_FAILED: /* Re-tune error but still might work */
527 break;
528 case MMC_ERR_BADCRC: /* Switch failure on HS400 recovery */
529 return (ENXIO);
530 case MMC_ERR_INVALID: /* Driver implementation b0rken */
531 default: /* Unknown error, should not happen */
532 return (EINVAL);
533 }
534 sc->retune_needed = 0;
535 }
536 return (mmc_wait_for_req(sc, req));
537 }
538
539 static int
mmc_wait_for_command(struct mmc_softc * sc,uint32_t opcode,uint32_t arg,uint32_t flags,uint32_t * resp,int retries)540 mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
541 uint32_t arg, uint32_t flags, uint32_t *resp, int retries)
542 {
543 struct mmc_command cmd;
544 int err;
545
546 memset(&cmd, 0, sizeof(cmd));
547 cmd.opcode = opcode;
548 cmd.arg = arg;
549 cmd.flags = flags;
550 cmd.data = NULL;
551 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, retries);
552 if (err)
553 return (err);
554 if (resp) {
555 if (flags & MMC_RSP_136)
556 memcpy(resp, cmd.resp, 4 * sizeof(uint32_t));
557 else
558 *resp = cmd.resp[0];
559 }
560 return (0);
561 }
562
563 static void
mmc_idle_cards(struct mmc_softc * sc)564 mmc_idle_cards(struct mmc_softc *sc)
565 {
566 device_t dev;
567 struct mmc_command cmd;
568
569 dev = sc->dev;
570 mmcbr_set_chip_select(dev, cs_high);
571 mmcbr_update_ios(dev);
572 mmc_ms_delay(1);
573
574 memset(&cmd, 0, sizeof(cmd));
575 cmd.opcode = MMC_GO_IDLE_STATE;
576 cmd.arg = 0;
577 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC;
578 cmd.data = NULL;
579 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
580 mmc_ms_delay(1);
581
582 mmcbr_set_chip_select(dev, cs_dontcare);
583 mmcbr_update_ios(dev);
584 mmc_ms_delay(1);
585 }
586
587 static int
mmc_send_app_op_cond(struct mmc_softc * sc,uint32_t ocr,uint32_t * rocr)588 mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
589 {
590 struct mmc_command cmd;
591 int err = MMC_ERR_NONE, i;
592
593 memset(&cmd, 0, sizeof(cmd));
594 cmd.opcode = ACMD_SD_SEND_OP_COND;
595 cmd.arg = ocr;
596 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
597 cmd.data = NULL;
598
599 for (i = 0; i < 1000; i++) {
600 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, 0, &cmd,
601 CMD_RETRIES);
602 if (err != MMC_ERR_NONE)
603 break;
604 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
605 (ocr & MMC_OCR_VOLTAGE) == 0)
606 break;
607 err = MMC_ERR_TIMEOUT;
608 mmc_ms_delay(10);
609 }
610 if (rocr && err == MMC_ERR_NONE)
611 *rocr = cmd.resp[0];
612 return (err);
613 }
614
615 static int
mmc_send_op_cond(struct mmc_softc * sc,uint32_t ocr,uint32_t * rocr)616 mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
617 {
618 struct mmc_command cmd;
619 int err = MMC_ERR_NONE, i;
620
621 memset(&cmd, 0, sizeof(cmd));
622 cmd.opcode = MMC_SEND_OP_COND;
623 cmd.arg = ocr;
624 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
625 cmd.data = NULL;
626
627 for (i = 0; i < 1000; i++) {
628 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
629 if (err != MMC_ERR_NONE)
630 break;
631 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
632 (ocr & MMC_OCR_VOLTAGE) == 0)
633 break;
634 err = MMC_ERR_TIMEOUT;
635 mmc_ms_delay(10);
636 }
637 if (rocr && err == MMC_ERR_NONE)
638 *rocr = cmd.resp[0];
639 return (err);
640 }
641
642 static int
mmc_send_if_cond(struct mmc_softc * sc,uint8_t vhs)643 mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs)
644 {
645 struct mmc_command cmd;
646 int err;
647
648 memset(&cmd, 0, sizeof(cmd));
649 cmd.opcode = SD_SEND_IF_COND;
650 cmd.arg = (vhs << 8) + 0xAA;
651 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR;
652 cmd.data = NULL;
653
654 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
655 return (err);
656 }
657
658 static void
mmc_power_up(struct mmc_softc * sc)659 mmc_power_up(struct mmc_softc *sc)
660 {
661 device_t dev;
662 enum mmc_vccq vccq;
663
664 dev = sc->dev;
665 mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev)));
666 mmcbr_set_bus_mode(dev, opendrain);
667 mmcbr_set_chip_select(dev, cs_dontcare);
668 mmcbr_set_bus_width(dev, bus_width_1);
669 mmcbr_set_power_mode(dev, power_up);
670 mmcbr_set_clock(dev, 0);
671 mmcbr_update_ios(dev);
672 for (vccq = vccq_330; ; vccq--) {
673 mmcbr_set_vccq(dev, vccq);
674 if (mmcbr_switch_vccq(dev) == 0 || vccq == vccq_120)
675 break;
676 }
677 mmc_ms_delay(1);
678
679 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY);
680 mmcbr_set_timing(dev, bus_timing_normal);
681 mmcbr_set_power_mode(dev, power_on);
682 mmcbr_update_ios(dev);
683 mmc_ms_delay(2);
684 }
685
686 static void
mmc_power_down(struct mmc_softc * sc)687 mmc_power_down(struct mmc_softc *sc)
688 {
689 device_t dev = sc->dev;
690
691 mmcbr_set_bus_mode(dev, opendrain);
692 mmcbr_set_chip_select(dev, cs_dontcare);
693 mmcbr_set_bus_width(dev, bus_width_1);
694 mmcbr_set_power_mode(dev, power_off);
695 mmcbr_set_clock(dev, 0);
696 mmcbr_set_timing(dev, bus_timing_normal);
697 mmcbr_update_ios(dev);
698 }
699
700 static int
mmc_select_card(struct mmc_softc * sc,uint16_t rca)701 mmc_select_card(struct mmc_softc *sc, uint16_t rca)
702 {
703 int err, flags;
704
705 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC;
706 sc->retune_paused++;
707 err = mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16,
708 flags, NULL, CMD_RETRIES);
709 sc->retune_paused--;
710 return (err);
711 }
712
713 static int
mmc_sd_switch(struct mmc_softc * sc,uint8_t mode,uint8_t grp,uint8_t value,uint8_t * res)714 mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value,
715 uint8_t *res)
716 {
717 int err;
718 struct mmc_command cmd;
719 struct mmc_data data;
720
721 memset(&cmd, 0, sizeof(cmd));
722 memset(&data, 0, sizeof(data));
723 memset(res, 0, 64);
724
725 cmd.opcode = SD_SWITCH_FUNC;
726 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
727 cmd.arg = mode << 31; /* 0 - check, 1 - set */
728 cmd.arg |= 0x00FFFFFF;
729 cmd.arg &= ~(0xF << (grp * 4));
730 cmd.arg |= value << (grp * 4);
731 cmd.data = &data;
732
733 data.data = res;
734 data.len = 64;
735 data.flags = MMC_DATA_READ;
736
737 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
738 return (err);
739 }
740
741 static int
mmc_set_card_bus_width(struct mmc_softc * sc,struct mmc_ivars * ivar,enum mmc_bus_timing timing)742 mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar,
743 enum mmc_bus_timing timing)
744 {
745 struct mmc_command cmd;
746 int err;
747 uint8_t value;
748
749 if (mmcbr_get_mode(sc->dev) == mode_sd) {
750 memset(&cmd, 0, sizeof(cmd));
751 cmd.opcode = ACMD_SET_CLR_CARD_DETECT;
752 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
753 cmd.arg = SD_CLR_CARD_DETECT;
754 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd,
755 CMD_RETRIES);
756 if (err != 0)
757 return (err);
758 memset(&cmd, 0, sizeof(cmd));
759 cmd.opcode = ACMD_SET_BUS_WIDTH;
760 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
761 switch (ivar->bus_width) {
762 case bus_width_1:
763 cmd.arg = SD_BUS_WIDTH_1;
764 break;
765 case bus_width_4:
766 cmd.arg = SD_BUS_WIDTH_4;
767 break;
768 default:
769 return (MMC_ERR_INVALID);
770 }
771 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd,
772 CMD_RETRIES);
773 } else {
774 switch (ivar->bus_width) {
775 case bus_width_1:
776 if (timing == bus_timing_mmc_hs400 ||
777 timing == bus_timing_mmc_hs400es)
778 return (MMC_ERR_INVALID);
779 value = EXT_CSD_BUS_WIDTH_1;
780 break;
781 case bus_width_4:
782 switch (timing) {
783 case bus_timing_mmc_ddr52:
784 value = EXT_CSD_BUS_WIDTH_4_DDR;
785 break;
786 case bus_timing_mmc_hs400:
787 case bus_timing_mmc_hs400es:
788 return (MMC_ERR_INVALID);
789 default:
790 value = EXT_CSD_BUS_WIDTH_4;
791 break;
792 }
793 break;
794 case bus_width_8:
795 value = 0;
796 switch (timing) {
797 case bus_timing_mmc_hs400es:
798 value = EXT_CSD_BUS_WIDTH_ES;
799 /* FALLTHROUGH */
800 case bus_timing_mmc_ddr52:
801 case bus_timing_mmc_hs400:
802 value |= EXT_CSD_BUS_WIDTH_8_DDR;
803 break;
804 default:
805 value = EXT_CSD_BUS_WIDTH_8;
806 break;
807 }
808 break;
809 default:
810 return (MMC_ERR_INVALID);
811 }
812 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
813 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value,
814 ivar->cmd6_time, true);
815 }
816 return (err);
817 }
818
819 static int
mmc_set_power_class(struct mmc_softc * sc,struct mmc_ivars * ivar)820 mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar)
821 {
822 device_t dev;
823 const uint8_t *ext_csd;
824 uint32_t clock;
825 uint8_t value;
826 enum mmc_bus_timing timing;
827 enum mmc_bus_width bus_width;
828
829 dev = sc->dev;
830 timing = mmcbr_get_timing(dev);
831 bus_width = ivar->bus_width;
832 if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4 ||
833 timing == bus_timing_normal || bus_width == bus_width_1)
834 return (MMC_ERR_NONE);
835
836 value = 0;
837 ext_csd = ivar->raw_ext_csd;
838 clock = mmcbr_get_clock(dev);
839 switch (1 << mmcbr_get_vdd(dev)) {
840 case MMC_OCR_LOW_VOLTAGE:
841 if (clock <= MMC_TYPE_HS_26_MAX)
842 value = ext_csd[EXT_CSD_PWR_CL_26_195];
843 else if (clock <= MMC_TYPE_HS_52_MAX) {
844 if (timing >= bus_timing_mmc_ddr52 &&
845 bus_width >= bus_width_4)
846 value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR];
847 else
848 value = ext_csd[EXT_CSD_PWR_CL_52_195];
849 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX)
850 value = ext_csd[EXT_CSD_PWR_CL_200_195];
851 break;
852 case MMC_OCR_270_280:
853 case MMC_OCR_280_290:
854 case MMC_OCR_290_300:
855 case MMC_OCR_300_310:
856 case MMC_OCR_310_320:
857 case MMC_OCR_320_330:
858 case MMC_OCR_330_340:
859 case MMC_OCR_340_350:
860 case MMC_OCR_350_360:
861 if (clock <= MMC_TYPE_HS_26_MAX)
862 value = ext_csd[EXT_CSD_PWR_CL_26_360];
863 else if (clock <= MMC_TYPE_HS_52_MAX) {
864 if (timing == bus_timing_mmc_ddr52 &&
865 bus_width >= bus_width_4)
866 value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR];
867 else
868 value = ext_csd[EXT_CSD_PWR_CL_52_360];
869 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) {
870 if (bus_width == bus_width_8)
871 value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR];
872 else
873 value = ext_csd[EXT_CSD_PWR_CL_200_360];
874 }
875 break;
876 default:
877 device_printf(dev, "No power class support for VDD 0x%x\n",
878 1 << mmcbr_get_vdd(dev));
879 return (MMC_ERR_INVALID);
880 }
881
882 if (bus_width == bus_width_8)
883 value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >>
884 EXT_CSD_POWER_CLASS_8BIT_SHIFT;
885 else
886 value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >>
887 EXT_CSD_POWER_CLASS_4BIT_SHIFT;
888
889 if (value == 0)
890 return (MMC_ERR_NONE);
891
892 return (mmc_switch(dev, dev, ivar->rca, EXT_CSD_CMD_SET_NORMAL,
893 EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true));
894 }
895
896 static int
mmc_set_timing(struct mmc_softc * sc,struct mmc_ivars * ivar,enum mmc_bus_timing timing)897 mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar,
898 enum mmc_bus_timing timing)
899 {
900 u_char switch_res[64];
901 uint8_t value;
902 int err;
903
904 if (mmcbr_get_mode(sc->dev) == mode_sd) {
905 switch (timing) {
906 case bus_timing_normal:
907 value = SD_SWITCH_NORMAL_MODE;
908 break;
909 case bus_timing_hs:
910 value = SD_SWITCH_HS_MODE;
911 break;
912 default:
913 return (MMC_ERR_INVALID);
914 }
915 err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1,
916 value, switch_res);
917 if (err != MMC_ERR_NONE)
918 return (err);
919 if ((switch_res[16] & 0xf) != value)
920 return (MMC_ERR_FAILED);
921 mmcbr_set_timing(sc->dev, timing);
922 mmcbr_update_ios(sc->dev);
923 } else {
924 switch (timing) {
925 case bus_timing_normal:
926 value = EXT_CSD_HS_TIMING_BC;
927 break;
928 case bus_timing_hs:
929 case bus_timing_mmc_ddr52:
930 value = EXT_CSD_HS_TIMING_HS;
931 break;
932 case bus_timing_mmc_hs200:
933 value = EXT_CSD_HS_TIMING_HS200;
934 break;
935 case bus_timing_mmc_hs400:
936 case bus_timing_mmc_hs400es:
937 value = EXT_CSD_HS_TIMING_HS400;
938 break;
939 default:
940 return (MMC_ERR_INVALID);
941 }
942 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
943 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value,
944 ivar->cmd6_time, false);
945 if (err != MMC_ERR_NONE)
946 return (err);
947 mmcbr_set_timing(sc->dev, timing);
948 mmcbr_update_ios(sc->dev);
949 err = mmc_switch_status(sc->dev, sc->dev, ivar->rca,
950 ivar->cmd6_time);
951 }
952 return (err);
953 }
954
955 static int
mmc_set_vccq(struct mmc_softc * sc,struct mmc_ivars * ivar,enum mmc_bus_timing timing)956 mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar,
957 enum mmc_bus_timing timing)
958 {
959
960 if (isset(&ivar->vccq_120, timing))
961 mmcbr_set_vccq(sc->dev, vccq_120);
962 else if (isset(&ivar->vccq_180, timing))
963 mmcbr_set_vccq(sc->dev, vccq_180);
964 else
965 mmcbr_set_vccq(sc->dev, vccq_330);
966 if (mmcbr_switch_vccq(sc->dev) != 0)
967 return (MMC_ERR_INVALID);
968 else
969 return (MMC_ERR_NONE);
970 }
971
972 static const uint8_t p8[8] = {
973 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
974 };
975
976 static const uint8_t p8ok[8] = {
977 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
978 };
979
980 static const uint8_t p4[4] = {
981 0x5A, 0x00, 0x00, 0x00
982 };
983
984 static const uint8_t p4ok[4] = {
985 0xA5, 0x00, 0x00, 0x00
986 };
987
988 static int
mmc_test_bus_width(struct mmc_softc * sc)989 mmc_test_bus_width(struct mmc_softc *sc)
990 {
991 struct mmc_command cmd;
992 struct mmc_data data;
993 uint8_t buf[8];
994 int err;
995
996 if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) {
997 mmcbr_set_bus_width(sc->dev, bus_width_8);
998 mmcbr_update_ios(sc->dev);
999
1000 sc->squelched++; /* Errors are expected, squelch reporting. */
1001 memset(&cmd, 0, sizeof(cmd));
1002 memset(&data, 0, sizeof(data));
1003 cmd.opcode = MMC_BUSTEST_W;
1004 cmd.arg = 0;
1005 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1006 cmd.data = &data;
1007
1008 data.data = __DECONST(void *, p8);
1009 data.len = 8;
1010 data.flags = MMC_DATA_WRITE;
1011 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1012
1013 memset(&cmd, 0, sizeof(cmd));
1014 memset(&data, 0, sizeof(data));
1015 cmd.opcode = MMC_BUSTEST_R;
1016 cmd.arg = 0;
1017 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1018 cmd.data = &data;
1019
1020 data.data = buf;
1021 data.len = 8;
1022 data.flags = MMC_DATA_READ;
1023 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1024 sc->squelched--;
1025
1026 mmcbr_set_bus_width(sc->dev, bus_width_1);
1027 mmcbr_update_ios(sc->dev);
1028
1029 if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0)
1030 return (bus_width_8);
1031 }
1032
1033 if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) {
1034 mmcbr_set_bus_width(sc->dev, bus_width_4);
1035 mmcbr_update_ios(sc->dev);
1036
1037 sc->squelched++; /* Errors are expected, squelch reporting. */
1038 memset(&cmd, 0, sizeof(cmd));
1039 memset(&data, 0, sizeof(data));
1040 cmd.opcode = MMC_BUSTEST_W;
1041 cmd.arg = 0;
1042 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1043 cmd.data = &data;
1044
1045 data.data = __DECONST(void *, p4);
1046 data.len = 4;
1047 data.flags = MMC_DATA_WRITE;
1048 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1049
1050 memset(&cmd, 0, sizeof(cmd));
1051 memset(&data, 0, sizeof(data));
1052 cmd.opcode = MMC_BUSTEST_R;
1053 cmd.arg = 0;
1054 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1055 cmd.data = &data;
1056
1057 data.data = buf;
1058 data.len = 4;
1059 data.flags = MMC_DATA_READ;
1060 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1061 sc->squelched--;
1062
1063 mmcbr_set_bus_width(sc->dev, bus_width_1);
1064 mmcbr_update_ios(sc->dev);
1065
1066 if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0)
1067 return (bus_width_4);
1068 }
1069 return (bus_width_1);
1070 }
1071
1072 static uint32_t
mmc_get_bits(uint32_t * bits,int bit_len,int start,int size)1073 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size)
1074 {
1075 const int i = (bit_len / 32) - (start / 32) - 1;
1076 const int shift = start & 31;
1077 uint32_t retval = bits[i] >> shift;
1078
1079 if (size + shift > 32)
1080 retval |= bits[i - 1] << (32 - shift);
1081 return (retval & ((1llu << size) - 1));
1082 }
1083
1084 static void
mmc_decode_cid_sd(uint32_t * raw_cid,struct mmc_cid * cid)1085 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid)
1086 {
1087 int i;
1088
1089 /* There's no version info, so we take it on faith */
1090 memset(cid, 0, sizeof(*cid));
1091 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
1092 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16);
1093 for (i = 0; i < 5; i++)
1094 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
1095 cid->pnm[5] = 0;
1096 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8);
1097 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32);
1098 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000;
1099 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4);
1100 }
1101
1102 static void
mmc_decode_cid_mmc(uint32_t * raw_cid,struct mmc_cid * cid,bool is_4_41p)1103 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, bool is_4_41p)
1104 {
1105 int i;
1106
1107 /* There's no version info, so we take it on faith */
1108 memset(cid, 0, sizeof(*cid));
1109 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
1110 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8);
1111 for (i = 0; i < 6; i++)
1112 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
1113 cid->pnm[6] = 0;
1114 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8);
1115 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32);
1116 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4);
1117 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4);
1118 if (is_4_41p)
1119 cid->mdt_year += 2013;
1120 else
1121 cid->mdt_year += 1997;
1122 }
1123
1124 static void
mmc_format_card_id_string(struct mmc_ivars * ivar)1125 mmc_format_card_id_string(struct mmc_ivars *ivar)
1126 {
1127 char oidstr[8];
1128 uint8_t c1;
1129 uint8_t c2;
1130
1131 /*
1132 * Format a card ID string for use by the mmcsd driver, it's what
1133 * appears between the <> in the following:
1134 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 MFG 08/2008 by 3 TN> at mmc0
1135 * 22.5MHz/4bit/128-block
1136 *
1137 * Also format just the card serial number, which the mmcsd driver will
1138 * use as the disk->d_ident string.
1139 *
1140 * The card_id_string in mmc_ivars is currently allocated as 64 bytes,
1141 * and our max formatted length is currently 55 bytes if every field
1142 * contains the largest value.
1143 *
1144 * Sometimes the oid is two printable ascii chars; when it's not,
1145 * format it as 0xnnnn instead.
1146 */
1147 c1 = (ivar->cid.oid >> 8) & 0x0ff;
1148 c2 = ivar->cid.oid & 0x0ff;
1149 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f)
1150 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2);
1151 else
1152 snprintf(oidstr, sizeof(oidstr), "0x%04x", ivar->cid.oid);
1153 snprintf(ivar->card_sn_string, sizeof(ivar->card_sn_string),
1154 "%08X", ivar->cid.psn);
1155 snprintf(ivar->card_id_string, sizeof(ivar->card_id_string),
1156 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s",
1157 ivar->mode == mode_sd ? "SD" : "MMC", ivar->high_cap ? "HC" : "",
1158 ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f,
1159 ivar->cid.psn, ivar->cid.mdt_month, ivar->cid.mdt_year,
1160 ivar->cid.mid, oidstr);
1161 }
1162
1163 static const int exp[8] = {
1164 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
1165 };
1166
1167 static const int mant[16] = {
1168 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
1169 };
1170
1171 static const int cur_min[8] = {
1172 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000
1173 };
1174
1175 static const int cur_max[8] = {
1176 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000
1177 };
1178
1179 static int
mmc_decode_csd_sd(uint32_t * raw_csd,struct mmc_csd * csd)1180 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd)
1181 {
1182 int v;
1183 int m;
1184 int e;
1185
1186 memset(csd, 0, sizeof(*csd));
1187 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2);
1188 if (v == 0) {
1189 m = mmc_get_bits(raw_csd, 128, 115, 4);
1190 e = mmc_get_bits(raw_csd, 128, 112, 3);
1191 csd->tacc = (exp[e] * mant[m] + 9) / 10;
1192 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1193 m = mmc_get_bits(raw_csd, 128, 99, 4);
1194 e = mmc_get_bits(raw_csd, 128, 96, 3);
1195 csd->tran_speed = exp[e] * 10000 * mant[m];
1196 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1197 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1198 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1199 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1200 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1201 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1202 csd->vdd_r_curr_min =
1203 cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
1204 csd->vdd_r_curr_max =
1205 cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
1206 csd->vdd_w_curr_min =
1207 cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
1208 csd->vdd_w_curr_max =
1209 cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
1210 m = mmc_get_bits(raw_csd, 128, 62, 12);
1211 e = mmc_get_bits(raw_csd, 128, 47, 3);
1212 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
1213 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
1214 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
1215 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
1216 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1217 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1218 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1219 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1220 return (MMC_ERR_NONE);
1221 } else if (v == 1) {
1222 m = mmc_get_bits(raw_csd, 128, 115, 4);
1223 e = mmc_get_bits(raw_csd, 128, 112, 3);
1224 csd->tacc = (exp[e] * mant[m] + 9) / 10;
1225 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1226 m = mmc_get_bits(raw_csd, 128, 99, 4);
1227 e = mmc_get_bits(raw_csd, 128, 96, 3);
1228 csd->tran_speed = exp[e] * 10000 * mant[m];
1229 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1230 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1231 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1232 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1233 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1234 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1235 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) +
1236 1) * 512 * 1024;
1237 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
1238 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
1239 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
1240 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1241 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1242 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1243 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1244 return (MMC_ERR_NONE);
1245 }
1246 return (MMC_ERR_INVALID);
1247 }
1248
1249 static void
mmc_decode_csd_mmc(uint32_t * raw_csd,struct mmc_csd * csd)1250 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd)
1251 {
1252 int m;
1253 int e;
1254
1255 memset(csd, 0, sizeof(*csd));
1256 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2);
1257 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4);
1258 m = mmc_get_bits(raw_csd, 128, 115, 4);
1259 e = mmc_get_bits(raw_csd, 128, 112, 3);
1260 csd->tacc = exp[e] * mant[m] + 9 / 10;
1261 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1262 m = mmc_get_bits(raw_csd, 128, 99, 4);
1263 e = mmc_get_bits(raw_csd, 128, 96, 3);
1264 csd->tran_speed = exp[e] * 10000 * mant[m];
1265 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1266 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1267 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1268 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1269 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1270 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1271 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
1272 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
1273 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
1274 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
1275 m = mmc_get_bits(raw_csd, 128, 62, 12);
1276 e = mmc_get_bits(raw_csd, 128, 47, 3);
1277 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
1278 csd->erase_blk_en = 0;
1279 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) *
1280 (mmc_get_bits(raw_csd, 128, 37, 5) + 1);
1281 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5);
1282 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1283 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1284 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1285 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1286 }
1287
1288 static void
mmc_app_decode_scr(uint32_t * raw_scr,struct mmc_scr * scr)1289 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr)
1290 {
1291 unsigned int scr_struct;
1292
1293 memset(scr, 0, sizeof(*scr));
1294
1295 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4);
1296 if (scr_struct != 0) {
1297 printf("Unrecognised SCR structure version %d\n",
1298 scr_struct);
1299 return;
1300 }
1301 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4);
1302 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4);
1303 }
1304
1305 static void
mmc_app_decode_sd_status(uint32_t * raw_sd_status,struct mmc_sd_status * sd_status)1306 mmc_app_decode_sd_status(uint32_t *raw_sd_status,
1307 struct mmc_sd_status *sd_status)
1308 {
1309
1310 memset(sd_status, 0, sizeof(*sd_status));
1311
1312 sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2);
1313 sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1);
1314 sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16);
1315 sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12);
1316 sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8);
1317 sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8);
1318 sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4);
1319 sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16);
1320 sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6);
1321 sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2);
1322 }
1323
1324 static int
mmc_all_send_cid(struct mmc_softc * sc,uint32_t * rawcid)1325 mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid)
1326 {
1327 struct mmc_command cmd;
1328 int err;
1329
1330 memset(&cmd, 0, sizeof(cmd));
1331 cmd.opcode = MMC_ALL_SEND_CID;
1332 cmd.arg = 0;
1333 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
1334 cmd.data = NULL;
1335 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1336 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t));
1337 return (err);
1338 }
1339
1340 static int
mmc_send_csd(struct mmc_softc * sc,uint16_t rca,uint32_t * rawcsd)1341 mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd)
1342 {
1343 struct mmc_command cmd;
1344 int err;
1345
1346 memset(&cmd, 0, sizeof(cmd));
1347 cmd.opcode = MMC_SEND_CSD;
1348 cmd.arg = rca << 16;
1349 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
1350 cmd.data = NULL;
1351 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1352 memcpy(rawcsd, cmd.resp, 4 * sizeof(uint32_t));
1353 return (err);
1354 }
1355
1356 static int
mmc_app_send_scr(struct mmc_softc * sc,uint16_t rca,uint32_t * rawscr)1357 mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr)
1358 {
1359 int err;
1360 struct mmc_command cmd;
1361 struct mmc_data data;
1362
1363 memset(&cmd, 0, sizeof(cmd));
1364 memset(&data, 0, sizeof(data));
1365
1366 memset(rawscr, 0, 8);
1367 cmd.opcode = ACMD_SEND_SCR;
1368 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1369 cmd.arg = 0;
1370 cmd.data = &data;
1371
1372 data.data = rawscr;
1373 data.len = 8;
1374 data.flags = MMC_DATA_READ;
1375
1376 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES);
1377 rawscr[0] = be32toh(rawscr[0]);
1378 rawscr[1] = be32toh(rawscr[1]);
1379 return (err);
1380 }
1381
1382 static int
mmc_app_sd_status(struct mmc_softc * sc,uint16_t rca,uint32_t * rawsdstatus)1383 mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus)
1384 {
1385 struct mmc_command cmd;
1386 struct mmc_data data;
1387 int err, i;
1388
1389 memset(&cmd, 0, sizeof(cmd));
1390 memset(&data, 0, sizeof(data));
1391
1392 memset(rawsdstatus, 0, 64);
1393 cmd.opcode = ACMD_SD_STATUS;
1394 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1395 cmd.arg = 0;
1396 cmd.data = &data;
1397
1398 data.data = rawsdstatus;
1399 data.len = 64;
1400 data.flags = MMC_DATA_READ;
1401
1402 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES);
1403 for (i = 0; i < 16; i++)
1404 rawsdstatus[i] = be32toh(rawsdstatus[i]);
1405 return (err);
1406 }
1407
1408 static int
mmc_set_relative_addr(struct mmc_softc * sc,uint16_t resp)1409 mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp)
1410 {
1411 struct mmc_command cmd;
1412 int err;
1413
1414 memset(&cmd, 0, sizeof(cmd));
1415 cmd.opcode = MMC_SET_RELATIVE_ADDR;
1416 cmd.arg = resp << 16;
1417 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1418 cmd.data = NULL;
1419 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1420 return (err);
1421 }
1422
1423 static int
mmc_send_relative_addr(struct mmc_softc * sc,uint32_t * resp)1424 mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp)
1425 {
1426 struct mmc_command cmd;
1427 int err;
1428
1429 memset(&cmd, 0, sizeof(cmd));
1430 cmd.opcode = SD_SEND_RELATIVE_ADDR;
1431 cmd.arg = 0;
1432 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1433 cmd.data = NULL;
1434 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1435 *resp = cmd.resp[0];
1436 return (err);
1437 }
1438
1439 static int
mmc_set_blocklen(struct mmc_softc * sc,uint32_t len)1440 mmc_set_blocklen(struct mmc_softc *sc, uint32_t len)
1441 {
1442 struct mmc_command cmd;
1443 int err;
1444
1445 memset(&cmd, 0, sizeof(cmd));
1446 cmd.opcode = MMC_SET_BLOCKLEN;
1447 cmd.arg = len;
1448 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
1449 cmd.data = NULL;
1450 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1451 return (err);
1452 }
1453
1454 static uint32_t
mmc_timing_to_dtr(struct mmc_ivars * ivar,enum mmc_bus_timing timing)1455 mmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing)
1456 {
1457
1458 switch (timing) {
1459 case bus_timing_normal:
1460 return (ivar->tran_speed);
1461 case bus_timing_hs:
1462 return (ivar->hs_tran_speed);
1463 case bus_timing_uhs_sdr12:
1464 return (SD_SDR12_MAX);
1465 case bus_timing_uhs_sdr25:
1466 return (SD_SDR25_MAX);
1467 case bus_timing_uhs_ddr50:
1468 return (SD_DDR50_MAX);
1469 case bus_timing_uhs_sdr50:
1470 return (SD_SDR50_MAX);
1471 case bus_timing_uhs_sdr104:
1472 return (SD_SDR104_MAX);
1473 case bus_timing_mmc_ddr52:
1474 return (MMC_TYPE_DDR52_MAX);
1475 case bus_timing_mmc_hs200:
1476 case bus_timing_mmc_hs400:
1477 case bus_timing_mmc_hs400es:
1478 return (MMC_TYPE_HS200_HS400ES_MAX);
1479 }
1480 return (0);
1481 }
1482
1483 static const char *
mmc_timing_to_string(enum mmc_bus_timing timing)1484 mmc_timing_to_string(enum mmc_bus_timing timing)
1485 {
1486
1487 switch (timing) {
1488 case bus_timing_normal:
1489 return ("normal speed");
1490 case bus_timing_hs:
1491 return ("high speed");
1492 case bus_timing_uhs_sdr12:
1493 case bus_timing_uhs_sdr25:
1494 case bus_timing_uhs_sdr50:
1495 case bus_timing_uhs_sdr104:
1496 return ("single data rate");
1497 case bus_timing_uhs_ddr50:
1498 case bus_timing_mmc_ddr52:
1499 return ("dual data rate");
1500 case bus_timing_mmc_hs200:
1501 return ("HS200");
1502 case bus_timing_mmc_hs400:
1503 return ("HS400");
1504 case bus_timing_mmc_hs400es:
1505 return ("HS400 with enhanced strobe");
1506 }
1507 return ("");
1508 }
1509
1510 static bool
mmc_host_timing(device_t dev,enum mmc_bus_timing timing)1511 mmc_host_timing(device_t dev, enum mmc_bus_timing timing)
1512 {
1513 int host_caps;
1514
1515 host_caps = mmcbr_get_caps(dev);
1516
1517 #define HOST_TIMING_CAP(host_caps, cap) ({ \
1518 bool retval; \
1519 if (((host_caps) & (cap)) == (cap)) \
1520 retval = true; \
1521 else \
1522 retval = false; \
1523 retval; \
1524 })
1525
1526 switch (timing) {
1527 case bus_timing_normal:
1528 return (true);
1529 case bus_timing_hs:
1530 return (HOST_TIMING_CAP(host_caps, MMC_CAP_HSPEED));
1531 case bus_timing_uhs_sdr12:
1532 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR12));
1533 case bus_timing_uhs_sdr25:
1534 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR25));
1535 case bus_timing_uhs_ddr50:
1536 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_DDR50));
1537 case bus_timing_uhs_sdr50:
1538 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR50));
1539 case bus_timing_uhs_sdr104:
1540 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR104));
1541 case bus_timing_mmc_ddr52:
1542 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_DDR52));
1543 case bus_timing_mmc_hs200:
1544 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS200_120) ||
1545 HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS200_180));
1546 case bus_timing_mmc_hs400:
1547 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400_120) ||
1548 HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400_180));
1549 case bus_timing_mmc_hs400es:
1550 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400 |
1551 MMC_CAP_MMC_ENH_STROBE));
1552 }
1553
1554 #undef HOST_TIMING_CAP
1555
1556 return (false);
1557 }
1558
1559 static void
mmc_log_card(device_t dev,struct mmc_ivars * ivar,int newcard)1560 mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard)
1561 {
1562 enum mmc_bus_timing timing;
1563
1564 device_printf(dev, "Card at relative address 0x%04x%s:\n",
1565 ivar->rca, newcard ? " added" : "");
1566 device_printf(dev, " card: %s\n", ivar->card_id_string);
1567 for (timing = bus_timing_max; timing > bus_timing_normal; timing--) {
1568 if (isset(&ivar->timings, timing))
1569 break;
1570 }
1571 device_printf(dev, " quirks: %b\n", ivar->quirks, MMC_QUIRKS_FMT);
1572 device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n",
1573 (ivar->bus_width == bus_width_1 ? 1 :
1574 (ivar->bus_width == bus_width_4 ? 4 : 8)),
1575 mmc_timing_to_dtr(ivar, timing) / 1000000,
1576 mmc_timing_to_string(timing));
1577 device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n",
1578 ivar->sec_count, ivar->erase_sector,
1579 ivar->read_only ? ", read-only" : "");
1580 }
1581
1582 static void
mmc_discover_cards(struct mmc_softc * sc)1583 mmc_discover_cards(struct mmc_softc *sc)
1584 {
1585 u_char switch_res[64];
1586 uint32_t raw_cid[4];
1587 struct mmc_ivars *ivar = NULL;
1588 const struct mmc_quirk *quirk;
1589 const uint8_t *ext_csd;
1590 device_t child;
1591 int err, host_caps, i, newcard;
1592 uint32_t resp, sec_count, status;
1593 uint16_t rca = 2;
1594 int16_t rev;
1595 uint8_t card_type;
1596
1597 host_caps = mmcbr_get_caps(sc->dev);
1598 if (bootverbose || mmc_debug)
1599 device_printf(sc->dev, "Probing cards\n");
1600 while (1) {
1601 child = NULL;
1602 sc->squelched++; /* Errors are expected, squelch reporting. */
1603 err = mmc_all_send_cid(sc, raw_cid);
1604 sc->squelched--;
1605 if (err == MMC_ERR_TIMEOUT)
1606 break;
1607 if (err != MMC_ERR_NONE) {
1608 device_printf(sc->dev, "Error reading CID %d\n", err);
1609 break;
1610 }
1611 newcard = 1;
1612 for (i = 0; i < sc->child_count; i++) {
1613 ivar = device_get_ivars(sc->child_list[i]);
1614 if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) ==
1615 0) {
1616 newcard = 0;
1617 break;
1618 }
1619 }
1620 if (bootverbose || mmc_debug) {
1621 device_printf(sc->dev,
1622 "%sard detected (CID %08x%08x%08x%08x)\n",
1623 newcard ? "New c" : "C",
1624 raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]);
1625 }
1626 if (newcard) {
1627 ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF,
1628 M_WAITOK | M_ZERO);
1629 memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid));
1630 }
1631 if (mmcbr_get_ro(sc->dev))
1632 ivar->read_only = 1;
1633 ivar->bus_width = bus_width_1;
1634 setbit(&ivar->timings, bus_timing_normal);
1635 ivar->mode = mmcbr_get_mode(sc->dev);
1636 if (ivar->mode == mode_sd) {
1637 mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid);
1638 err = mmc_send_relative_addr(sc, &resp);
1639 if (err != MMC_ERR_NONE) {
1640 device_printf(sc->dev,
1641 "Error getting RCA %d\n", err);
1642 goto free_ivar;
1643 }
1644 ivar->rca = resp >> 16;
1645 /* Get card CSD. */
1646 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1647 if (err != MMC_ERR_NONE) {
1648 device_printf(sc->dev,
1649 "Error getting CSD %d\n", err);
1650 goto free_ivar;
1651 }
1652 if (bootverbose || mmc_debug)
1653 device_printf(sc->dev,
1654 "%sard detected (CSD %08x%08x%08x%08x)\n",
1655 newcard ? "New c" : "C", ivar->raw_csd[0],
1656 ivar->raw_csd[1], ivar->raw_csd[2],
1657 ivar->raw_csd[3]);
1658 err = mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd);
1659 if (err != MMC_ERR_NONE) {
1660 device_printf(sc->dev, "Error decoding CSD\n");
1661 goto free_ivar;
1662 }
1663 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1664 if (ivar->csd.csd_structure > 0)
1665 ivar->high_cap = 1;
1666 ivar->tran_speed = ivar->csd.tran_speed;
1667 ivar->erase_sector = ivar->csd.erase_sector *
1668 ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1669
1670 err = mmc_send_status(sc->dev, sc->dev, ivar->rca,
1671 &status);
1672 if (err != MMC_ERR_NONE) {
1673 device_printf(sc->dev,
1674 "Error reading card status %d\n", err);
1675 goto free_ivar;
1676 }
1677 if ((status & R1_CARD_IS_LOCKED) != 0) {
1678 device_printf(sc->dev,
1679 "Card is password protected, skipping\n");
1680 goto free_ivar;
1681 }
1682
1683 /* Get card SCR. Card must be selected to fetch it. */
1684 err = mmc_select_card(sc, ivar->rca);
1685 if (err != MMC_ERR_NONE) {
1686 device_printf(sc->dev,
1687 "Error selecting card %d\n", err);
1688 goto free_ivar;
1689 }
1690 err = mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr);
1691 if (err != MMC_ERR_NONE) {
1692 device_printf(sc->dev,
1693 "Error reading SCR %d\n", err);
1694 goto free_ivar;
1695 }
1696 mmc_app_decode_scr(ivar->raw_scr, &ivar->scr);
1697 /* Get card switch capabilities (command class 10). */
1698 if ((ivar->scr.sda_vsn >= 1) &&
1699 (ivar->csd.ccc & (1 << 10))) {
1700 err = mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK,
1701 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE,
1702 switch_res);
1703 if (err == MMC_ERR_NONE &&
1704 switch_res[13] & (1 << SD_SWITCH_HS_MODE)) {
1705 setbit(&ivar->timings, bus_timing_hs);
1706 ivar->hs_tran_speed = SD_HS_MAX;
1707 }
1708 }
1709
1710 /*
1711 * We deselect then reselect the card here. Some cards
1712 * become unselected and timeout with the above two
1713 * commands, although the state tables / diagrams in the
1714 * standard suggest they go back to the transfer state.
1715 * Other cards don't become deselected, and if we
1716 * attempt to blindly re-select them, we get timeout
1717 * errors from some controllers. So we deselect then
1718 * reselect to handle all situations. The only thing we
1719 * use from the sd_status is the erase sector size, but
1720 * it is still nice to get that right.
1721 */
1722 (void)mmc_select_card(sc, 0);
1723 (void)mmc_select_card(sc, ivar->rca);
1724 (void)mmc_app_sd_status(sc, ivar->rca,
1725 ivar->raw_sd_status);
1726 mmc_app_decode_sd_status(ivar->raw_sd_status,
1727 &ivar->sd_status);
1728 if (ivar->sd_status.au_size != 0) {
1729 ivar->erase_sector =
1730 16 << ivar->sd_status.au_size;
1731 }
1732 /* Find maximum supported bus width. */
1733 if ((host_caps & MMC_CAP_4_BIT_DATA) &&
1734 (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4))
1735 ivar->bus_width = bus_width_4;
1736
1737 goto child_common;
1738 }
1739 ivar->rca = rca++;
1740 err = mmc_set_relative_addr(sc, ivar->rca);
1741 if (err != MMC_ERR_NONE) {
1742 device_printf(sc->dev, "Error setting RCA %d\n", err);
1743 goto free_ivar;
1744 }
1745 /* Get card CSD. */
1746 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1747 if (err != MMC_ERR_NONE) {
1748 device_printf(sc->dev, "Error getting CSD %d\n", err);
1749 goto free_ivar;
1750 }
1751 if (bootverbose || mmc_debug)
1752 device_printf(sc->dev,
1753 "%sard detected (CSD %08x%08x%08x%08x)\n",
1754 newcard ? "New c" : "C", ivar->raw_csd[0],
1755 ivar->raw_csd[1], ivar->raw_csd[2],
1756 ivar->raw_csd[3]);
1757
1758 mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd);
1759 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1760 ivar->tran_speed = ivar->csd.tran_speed;
1761 ivar->erase_sector = ivar->csd.erase_sector *
1762 ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1763
1764 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, &status);
1765 if (err != MMC_ERR_NONE) {
1766 device_printf(sc->dev,
1767 "Error reading card status %d\n", err);
1768 goto free_ivar;
1769 }
1770 if ((status & R1_CARD_IS_LOCKED) != 0) {
1771 device_printf(sc->dev,
1772 "Card is password protected, skipping\n");
1773 goto free_ivar;
1774 }
1775
1776 err = mmc_select_card(sc, ivar->rca);
1777 if (err != MMC_ERR_NONE) {
1778 device_printf(sc->dev, "Error selecting card %d\n",
1779 err);
1780 goto free_ivar;
1781 }
1782
1783 rev = -1;
1784 /* Only MMC >= 4.x devices support EXT_CSD. */
1785 if (ivar->csd.spec_vers >= 4) {
1786 err = mmc_send_ext_csd(sc->dev, sc->dev,
1787 ivar->raw_ext_csd);
1788 if (err != MMC_ERR_NONE) {
1789 device_printf(sc->dev,
1790 "Error reading EXT_CSD %d\n", err);
1791 goto free_ivar;
1792 }
1793 ext_csd = ivar->raw_ext_csd;
1794 rev = ext_csd[EXT_CSD_REV];
1795 /* Handle extended capacity from EXT_CSD */
1796 sec_count = le32dec(&ext_csd[EXT_CSD_SEC_CNT]);
1797 if (sec_count != 0) {
1798 ivar->sec_count = sec_count;
1799 ivar->high_cap = 1;
1800 }
1801 /* Find maximum supported bus width. */
1802 ivar->bus_width = mmc_test_bus_width(sc);
1803 /* Get device speeds beyond normal mode. */
1804 card_type = ext_csd[EXT_CSD_CARD_TYPE];
1805 if ((card_type & EXT_CSD_CARD_TYPE_HS_52) != 0) {
1806 setbit(&ivar->timings, bus_timing_hs);
1807 ivar->hs_tran_speed = MMC_TYPE_HS_52_MAX;
1808 } else if ((card_type & EXT_CSD_CARD_TYPE_HS_26) != 0) {
1809 setbit(&ivar->timings, bus_timing_hs);
1810 ivar->hs_tran_speed = MMC_TYPE_HS_26_MAX;
1811 }
1812 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 &&
1813 (host_caps & MMC_CAP_SIGNALING_120) != 0) {
1814 setbit(&ivar->timings, bus_timing_mmc_ddr52);
1815 setbit(&ivar->vccq_120, bus_timing_mmc_ddr52);
1816 }
1817 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 &&
1818 (host_caps & MMC_CAP_SIGNALING_180) != 0) {
1819 setbit(&ivar->timings, bus_timing_mmc_ddr52);
1820 setbit(&ivar->vccq_180, bus_timing_mmc_ddr52);
1821 }
1822 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_2V) != 0 &&
1823 (host_caps & MMC_CAP_SIGNALING_120) != 0) {
1824 setbit(&ivar->timings, bus_timing_mmc_hs200);
1825 setbit(&ivar->vccq_120, bus_timing_mmc_hs200);
1826 }
1827 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_8V) != 0 &&
1828 (host_caps & MMC_CAP_SIGNALING_180) != 0) {
1829 setbit(&ivar->timings, bus_timing_mmc_hs200);
1830 setbit(&ivar->vccq_180, bus_timing_mmc_hs200);
1831 }
1832 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 &&
1833 (host_caps & MMC_CAP_SIGNALING_120) != 0 &&
1834 ivar->bus_width == bus_width_8) {
1835 setbit(&ivar->timings, bus_timing_mmc_hs400);
1836 setbit(&ivar->vccq_120, bus_timing_mmc_hs400);
1837 }
1838 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 &&
1839 (host_caps & MMC_CAP_SIGNALING_180) != 0 &&
1840 ivar->bus_width == bus_width_8) {
1841 setbit(&ivar->timings, bus_timing_mmc_hs400);
1842 setbit(&ivar->vccq_180, bus_timing_mmc_hs400);
1843 }
1844 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 &&
1845 (ext_csd[EXT_CSD_STROBE_SUPPORT] &
1846 EXT_CSD_STROBE_SUPPORT_EN) != 0 &&
1847 (host_caps & MMC_CAP_SIGNALING_120) != 0 &&
1848 ivar->bus_width == bus_width_8) {
1849 setbit(&ivar->timings, bus_timing_mmc_hs400es);
1850 setbit(&ivar->vccq_120, bus_timing_mmc_hs400es);
1851 }
1852 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 &&
1853 (ext_csd[EXT_CSD_STROBE_SUPPORT] &
1854 EXT_CSD_STROBE_SUPPORT_EN) != 0 &&
1855 (host_caps & MMC_CAP_SIGNALING_180) != 0 &&
1856 ivar->bus_width == bus_width_8) {
1857 setbit(&ivar->timings, bus_timing_mmc_hs400es);
1858 setbit(&ivar->vccq_180, bus_timing_mmc_hs400es);
1859 }
1860 /*
1861 * Determine generic switch timeout (provided in
1862 * units of 10 ms), defaulting to 500 ms.
1863 */
1864 ivar->cmd6_time = 500 * 1000;
1865 if (rev >= 6)
1866 ivar->cmd6_time = 10 *
1867 ext_csd[EXT_CSD_GEN_CMD6_TIME];
1868 /* Handle HC erase sector size. */
1869 if (ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) {
1870 ivar->erase_sector = 1024 *
1871 ext_csd[EXT_CSD_ERASE_GRP_SIZE];
1872 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
1873 EXT_CSD_CMD_SET_NORMAL,
1874 EXT_CSD_ERASE_GRP_DEF,
1875 EXT_CSD_ERASE_GRP_DEF_EN,
1876 ivar->cmd6_time, true);
1877 if (err != MMC_ERR_NONE) {
1878 device_printf(sc->dev,
1879 "Error setting erase group %d\n",
1880 err);
1881 goto free_ivar;
1882 }
1883 }
1884 }
1885
1886 mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid, rev >= 5);
1887
1888 child_common:
1889 for (quirk = &mmc_quirks[0]; quirk->mid != 0x0; quirk++) {
1890 if ((quirk->mid == MMC_QUIRK_MID_ANY ||
1891 quirk->mid == ivar->cid.mid) &&
1892 (quirk->oid == MMC_QUIRK_OID_ANY ||
1893 quirk->oid == ivar->cid.oid) &&
1894 strncmp(quirk->pnm, ivar->cid.pnm,
1895 sizeof(ivar->cid.pnm)) == 0) {
1896 ivar->quirks = quirk->quirks;
1897 break;
1898 }
1899 }
1900
1901 /*
1902 * Some cards that report maximum I/O block sizes greater
1903 * than 512 require the block length to be set to 512, even
1904 * though that is supposed to be the default. Example:
1905 *
1906 * Transcend 2GB SDSC card, CID:
1907 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000
1908 */
1909 if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE ||
1910 ivar->csd.write_bl_len != MMC_SECTOR_SIZE)
1911 mmc_set_blocklen(sc, MMC_SECTOR_SIZE);
1912
1913 mmc_format_card_id_string(ivar);
1914
1915 if (bootverbose || mmc_debug)
1916 mmc_log_card(sc->dev, ivar, newcard);
1917 if (newcard) {
1918 /* Add device. */
1919 child = device_add_child(sc->dev, NULL, -1);
1920 if (child != NULL) {
1921 device_set_ivars(child, ivar);
1922 sc->child_list = realloc(sc->child_list,
1923 sizeof(device_t) * (sc->child_count + 1),
1924 M_DEVBUF, M_WAITOK);
1925 sc->child_list[sc->child_count++] = child;
1926 } else
1927 device_printf(sc->dev, "Error adding child\n");
1928 }
1929
1930 free_ivar:
1931 if (newcard && child == NULL)
1932 free(ivar, M_DEVBUF);
1933 (void)mmc_select_card(sc, 0);
1934 /*
1935 * Not returning here when one MMC device could no be added
1936 * potentially would mean looping forever when that device
1937 * is broken (in which case it also may impact the remainder
1938 * of the bus anyway, though).
1939 */
1940 if ((newcard && child == NULL) ||
1941 mmcbr_get_mode(sc->dev) == mode_sd)
1942 return;
1943 }
1944 }
1945
1946 static void
mmc_update_child_list(struct mmc_softc * sc)1947 mmc_update_child_list(struct mmc_softc *sc)
1948 {
1949 device_t child;
1950 int i, j;
1951
1952 if (sc->child_count == 0) {
1953 free(sc->child_list, M_DEVBUF);
1954 return;
1955 }
1956 for (i = j = 0; i < sc->child_count; i++) {
1957 for (;;) {
1958 child = sc->child_list[j++];
1959 if (child != NULL)
1960 break;
1961 }
1962 if (i != j)
1963 sc->child_list[i] = child;
1964 }
1965 sc->child_list = realloc(sc->child_list, sizeof(device_t) *
1966 sc->child_count, M_DEVBUF, M_WAITOK);
1967 }
1968
1969 static void
mmc_rescan_cards(struct mmc_softc * sc)1970 mmc_rescan_cards(struct mmc_softc *sc)
1971 {
1972 struct mmc_ivars *ivar;
1973 int err, i, j;
1974
1975 for (i = j = 0; i < sc->child_count; i++) {
1976 ivar = device_get_ivars(sc->child_list[i]);
1977 if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE) {
1978 if (bootverbose || mmc_debug)
1979 device_printf(sc->dev,
1980 "Card at relative address %d lost\n",
1981 ivar->rca);
1982 err = device_delete_child(sc->dev, sc->child_list[i]);
1983 if (err != 0) {
1984 j++;
1985 continue;
1986 }
1987 free(ivar, M_DEVBUF);
1988 } else
1989 j++;
1990 }
1991 if (sc->child_count == j)
1992 goto out;
1993 sc->child_count = j;
1994 mmc_update_child_list(sc);
1995 out:
1996 (void)mmc_select_card(sc, 0);
1997 }
1998
1999 static int
mmc_delete_cards(struct mmc_softc * sc,bool final)2000 mmc_delete_cards(struct mmc_softc *sc, bool final)
2001 {
2002 struct mmc_ivars *ivar;
2003 int err, i, j;
2004
2005 err = 0;
2006 for (i = j = 0; i < sc->child_count; i++) {
2007 ivar = device_get_ivars(sc->child_list[i]);
2008 if (bootverbose || mmc_debug)
2009 device_printf(sc->dev,
2010 "Card at relative address %d deleted\n",
2011 ivar->rca);
2012 err = device_delete_child(sc->dev, sc->child_list[i]);
2013 if (err != 0) {
2014 j++;
2015 if (final == false)
2016 continue;
2017 else
2018 break;
2019 }
2020 free(ivar, M_DEVBUF);
2021 }
2022 sc->child_count = j;
2023 mmc_update_child_list(sc);
2024 return (err);
2025 }
2026
2027 static void
mmc_go_discovery(struct mmc_softc * sc)2028 mmc_go_discovery(struct mmc_softc *sc)
2029 {
2030 uint32_t ocr;
2031 device_t dev;
2032 int err;
2033
2034 dev = sc->dev;
2035 if (mmcbr_get_power_mode(dev) != power_on) {
2036 /*
2037 * First, try SD modes
2038 */
2039 sc->squelched++; /* Errors are expected, squelch reporting. */
2040 mmcbr_set_mode(dev, mode_sd);
2041 mmc_power_up(sc);
2042 mmcbr_set_bus_mode(dev, pushpull);
2043 if (bootverbose || mmc_debug)
2044 device_printf(sc->dev, "Probing bus\n");
2045 mmc_idle_cards(sc);
2046 err = mmc_send_if_cond(sc, 1);
2047 if ((bootverbose || mmc_debug) && err == 0)
2048 device_printf(sc->dev,
2049 "SD 2.0 interface conditions: OK\n");
2050 if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
2051 if (bootverbose || mmc_debug)
2052 device_printf(sc->dev, "SD probe: failed\n");
2053 /*
2054 * Failed, try MMC
2055 */
2056 mmcbr_set_mode(dev, mode_mmc);
2057 if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
2058 if (bootverbose || mmc_debug)
2059 device_printf(sc->dev,
2060 "MMC probe: failed\n");
2061 ocr = 0; /* Failed both, powerdown. */
2062 } else if (bootverbose || mmc_debug)
2063 device_printf(sc->dev,
2064 "MMC probe: OK (OCR: 0x%08x)\n", ocr);
2065 } else if (bootverbose || mmc_debug)
2066 device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n",
2067 ocr);
2068 sc->squelched--;
2069
2070 mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr));
2071 if (mmcbr_get_ocr(dev) != 0)
2072 mmc_idle_cards(sc);
2073 } else {
2074 mmcbr_set_bus_mode(dev, opendrain);
2075 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY);
2076 mmcbr_update_ios(dev);
2077 /* XXX recompute vdd based on new cards? */
2078 }
2079 /*
2080 * Make sure that we have a mutually agreeable voltage to at least
2081 * one card on the bus.
2082 */
2083 if (bootverbose || mmc_debug)
2084 device_printf(sc->dev, "Current OCR: 0x%08x\n",
2085 mmcbr_get_ocr(dev));
2086 if (mmcbr_get_ocr(dev) == 0) {
2087 device_printf(sc->dev, "No compatible cards found on bus\n");
2088 (void)mmc_delete_cards(sc, false);
2089 mmc_power_down(sc);
2090 return;
2091 }
2092 /*
2093 * Reselect the cards after we've idled them above.
2094 */
2095 if (mmcbr_get_mode(dev) == mode_sd) {
2096 err = mmc_send_if_cond(sc, 1);
2097 mmc_send_app_op_cond(sc,
2098 (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL);
2099 } else
2100 mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL);
2101 mmc_discover_cards(sc);
2102 mmc_rescan_cards(sc);
2103
2104 mmcbr_set_bus_mode(dev, pushpull);
2105 mmcbr_update_ios(dev);
2106 mmc_calculate_clock(sc);
2107 }
2108
2109 static int
mmc_calculate_clock(struct mmc_softc * sc)2110 mmc_calculate_clock(struct mmc_softc *sc)
2111 {
2112 device_t dev;
2113 struct mmc_ivars *ivar;
2114 int i;
2115 uint32_t dtr, max_dtr;
2116 uint16_t rca;
2117 enum mmc_bus_timing max_timing, timing;
2118 bool changed, hs400;
2119
2120 dev = sc->dev;
2121 max_dtr = mmcbr_get_f_max(dev);
2122 max_timing = bus_timing_max;
2123 do {
2124 changed = false;
2125 for (i = 0; i < sc->child_count; i++) {
2126 ivar = device_get_ivars(sc->child_list[i]);
2127 if (isclr(&ivar->timings, max_timing) ||
2128 !mmc_host_timing(dev, max_timing)) {
2129 for (timing = max_timing - 1; timing >=
2130 bus_timing_normal; timing--) {
2131 if (isset(&ivar->timings, timing) &&
2132 mmc_host_timing(dev, timing)) {
2133 max_timing = timing;
2134 break;
2135 }
2136 }
2137 changed = true;
2138 }
2139 dtr = mmc_timing_to_dtr(ivar, max_timing);
2140 if (dtr < max_dtr) {
2141 max_dtr = dtr;
2142 changed = true;
2143 }
2144 }
2145 } while (changed == true);
2146
2147 if (bootverbose || mmc_debug) {
2148 device_printf(dev,
2149 "setting transfer rate to %d.%03dMHz (%s timing)\n",
2150 max_dtr / 1000000, (max_dtr / 1000) % 1000,
2151 mmc_timing_to_string(max_timing));
2152 }
2153
2154 /*
2155 * HS400 must be tuned in HS200 mode, so in case of HS400 we begin
2156 * with HS200 following the sequence as described in "6.6.2.2 HS200
2157 * timing mode selection" of the eMMC specification v5.1, too, and
2158 * switch to max_timing later. HS400ES requires no tuning and, thus,
2159 * can be switch to directly, but requires the same detour via high
2160 * speed mode as does HS400 (see mmc_switch_to_hs400()).
2161 */
2162 hs400 = max_timing == bus_timing_mmc_hs400;
2163 timing = hs400 == true ? bus_timing_mmc_hs200 : max_timing;
2164 for (i = 0; i < sc->child_count; i++) {
2165 ivar = device_get_ivars(sc->child_list[i]);
2166 if ((ivar->timings & ~(1 << bus_timing_normal)) == 0)
2167 goto clock;
2168
2169 rca = ivar->rca;
2170 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) {
2171 device_printf(dev, "Card at relative address %d "
2172 "failed to select\n", rca);
2173 continue;
2174 }
2175
2176 if (timing == bus_timing_mmc_hs200 || /* includes HS400 */
2177 timing == bus_timing_mmc_hs400es) {
2178 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
2179 device_printf(dev, "Failed to set VCCQ for "
2180 "card at relative address %d\n", rca);
2181 continue;
2182 }
2183 }
2184
2185 if (timing == bus_timing_mmc_hs200) { /* includes HS400 */
2186 /* Set bus width (required for initial tuning). */
2187 if (mmc_set_card_bus_width(sc, ivar, timing) !=
2188 MMC_ERR_NONE) {
2189 device_printf(dev, "Card at relative address "
2190 "%d failed to set bus width\n", rca);
2191 continue;
2192 }
2193 mmcbr_set_bus_width(dev, ivar->bus_width);
2194 mmcbr_update_ios(dev);
2195 } else if (timing == bus_timing_mmc_hs400es) {
2196 if (mmc_switch_to_hs400(sc, ivar, max_dtr, timing) !=
2197 MMC_ERR_NONE) {
2198 device_printf(dev, "Card at relative address "
2199 "%d failed to set %s timing\n", rca,
2200 mmc_timing_to_string(timing));
2201 continue;
2202 }
2203 goto power_class;
2204 }
2205
2206 if (mmc_set_timing(sc, ivar, timing) != MMC_ERR_NONE) {
2207 device_printf(dev, "Card at relative address %d "
2208 "failed to set %s timing\n", rca,
2209 mmc_timing_to_string(timing));
2210 continue;
2211 }
2212
2213 if (timing == bus_timing_mmc_ddr52) {
2214 /*
2215 * Set EXT_CSD_BUS_WIDTH_n_DDR in EXT_CSD_BUS_WIDTH
2216 * (must be done after switching to EXT_CSD_HS_TIMING).
2217 */
2218 if (mmc_set_card_bus_width(sc, ivar, timing) !=
2219 MMC_ERR_NONE) {
2220 device_printf(dev, "Card at relative address "
2221 "%d failed to set bus width\n", rca);
2222 continue;
2223 }
2224 mmcbr_set_bus_width(dev, ivar->bus_width);
2225 mmcbr_update_ios(dev);
2226 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
2227 device_printf(dev, "Failed to set VCCQ for "
2228 "card at relative address %d\n", rca);
2229 continue;
2230 }
2231 }
2232
2233 clock:
2234 /* Set clock (must be done before initial tuning). */
2235 mmcbr_set_clock(dev, max_dtr);
2236 mmcbr_update_ios(dev);
2237
2238 /*
2239 * Don't call into the bridge driver for timings definitely
2240 * not requiring tuning. Note that it's up to the upper
2241 * layer to actually execute tuning otherwise.
2242 */
2243 if (timing <= bus_timing_uhs_sdr25 ||
2244 timing == bus_timing_mmc_ddr52)
2245 goto power_class;
2246
2247 if (mmcbr_tune(dev, hs400) != 0) {
2248 device_printf(dev, "Card at relative address %d "
2249 "failed to execute initial tuning\n", rca);
2250 continue;
2251 }
2252
2253 if (hs400 == true && mmc_switch_to_hs400(sc, ivar, max_dtr,
2254 max_timing) != MMC_ERR_NONE) {
2255 device_printf(dev, "Card at relative address %d "
2256 "failed to set %s timing\n", rca,
2257 mmc_timing_to_string(max_timing));
2258 continue;
2259 }
2260
2261 power_class:
2262 if (mmc_set_power_class(sc, ivar) != MMC_ERR_NONE) {
2263 device_printf(dev, "Card at relative address %d "
2264 "failed to set power class\n", rca);
2265 }
2266 }
2267 (void)mmc_select_card(sc, 0);
2268 return (max_dtr);
2269 }
2270
2271 /*
2272 * Switch from HS200 to HS400 (either initially or for re-tuning) or directly
2273 * to HS400ES. This follows the sequences described in "6.6.2.3 HS400 timing
2274 * mode selection" of the eMMC specification v5.1.
2275 */
2276 static int
mmc_switch_to_hs400(struct mmc_softc * sc,struct mmc_ivars * ivar,uint32_t clock,enum mmc_bus_timing max_timing)2277 mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar,
2278 uint32_t clock, enum mmc_bus_timing max_timing)
2279 {
2280 device_t dev;
2281 int err;
2282
2283 dev = sc->dev;
2284
2285 /*
2286 * Both clock and timing must be set as appropriate for high speed
2287 * before eventually switching to HS400/HS400ES; mmc_set_timing()
2288 * will issue mmcbr_update_ios().
2289 */
2290 mmcbr_set_clock(dev, ivar->hs_tran_speed);
2291 err = mmc_set_timing(sc, ivar, bus_timing_hs);
2292 if (err != MMC_ERR_NONE)
2293 return (err);
2294
2295 /*
2296 * Set EXT_CSD_BUS_WIDTH_8_DDR in EXT_CSD_BUS_WIDTH (and additionally
2297 * EXT_CSD_BUS_WIDTH_ES for HS400ES).
2298 */
2299 err = mmc_set_card_bus_width(sc, ivar, max_timing);
2300 if (err != MMC_ERR_NONE)
2301 return (err);
2302 mmcbr_set_bus_width(dev, ivar->bus_width);
2303 mmcbr_update_ios(dev);
2304
2305 /* Finally, switch to HS400/HS400ES mode. */
2306 err = mmc_set_timing(sc, ivar, max_timing);
2307 if (err != MMC_ERR_NONE)
2308 return (err);
2309 mmcbr_set_clock(dev, clock);
2310 mmcbr_update_ios(dev);
2311 return (MMC_ERR_NONE);
2312 }
2313
2314 /*
2315 * Switch from HS400 to HS200 (for re-tuning).
2316 */
2317 static int
mmc_switch_to_hs200(struct mmc_softc * sc,struct mmc_ivars * ivar,uint32_t clock)2318 mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar,
2319 uint32_t clock)
2320 {
2321 device_t dev;
2322 int err;
2323
2324 dev = sc->dev;
2325
2326 /*
2327 * Both clock and timing must initially be set as appropriate for
2328 * DDR52 before eventually switching to HS200; mmc_set_timing()
2329 * will issue mmcbr_update_ios().
2330 */
2331 mmcbr_set_clock(dev, ivar->hs_tran_speed);
2332 err = mmc_set_timing(sc, ivar, bus_timing_mmc_ddr52);
2333 if (err != MMC_ERR_NONE)
2334 return (err);
2335
2336 /*
2337 * Next, switch to high speed. Thus, clear EXT_CSD_BUS_WIDTH_n_DDR
2338 * in EXT_CSD_BUS_WIDTH and update bus width and timing in ios.
2339 */
2340 err = mmc_set_card_bus_width(sc, ivar, bus_timing_hs);
2341 if (err != MMC_ERR_NONE)
2342 return (err);
2343 mmcbr_set_bus_width(dev, ivar->bus_width);
2344 mmcbr_set_timing(sc->dev, bus_timing_hs);
2345 mmcbr_update_ios(dev);
2346
2347 /* Finally, switch to HS200 mode. */
2348 err = mmc_set_timing(sc, ivar, bus_timing_mmc_hs200);
2349 if (err != MMC_ERR_NONE)
2350 return (err);
2351 mmcbr_set_clock(dev, clock);
2352 mmcbr_update_ios(dev);
2353 return (MMC_ERR_NONE);
2354 }
2355
2356 static int
mmc_retune(device_t busdev,device_t dev,bool reset)2357 mmc_retune(device_t busdev, device_t dev, bool reset)
2358 {
2359 struct mmc_softc *sc;
2360 struct mmc_ivars *ivar;
2361 int err;
2362 uint32_t clock;
2363 enum mmc_bus_timing timing;
2364
2365 if (device_get_parent(dev) != busdev)
2366 return (MMC_ERR_INVALID);
2367
2368 sc = device_get_softc(busdev);
2369 if (sc->retune_needed != 1 && sc->retune_paused != 0)
2370 return (MMC_ERR_INVALID);
2371
2372 timing = mmcbr_get_timing(busdev);
2373 if (timing == bus_timing_mmc_hs400) {
2374 /*
2375 * Controllers use the data strobe line to latch data from
2376 * the devices in HS400 mode so periodic re-tuning isn't
2377 * expected to be required, i. e. only if a CRC or tuning
2378 * error is signaled to the bridge. In these latter cases
2379 * we are asked to reset the tuning circuit and need to do
2380 * the switch timing dance.
2381 */
2382 if (reset == false)
2383 return (0);
2384 ivar = device_get_ivars(dev);
2385 clock = mmcbr_get_clock(busdev);
2386 if (mmc_switch_to_hs200(sc, ivar, clock) != MMC_ERR_NONE)
2387 return (MMC_ERR_BADCRC);
2388 }
2389 err = mmcbr_retune(busdev, reset);
2390 if (err != 0 && timing == bus_timing_mmc_hs400)
2391 return (MMC_ERR_BADCRC);
2392 switch (err) {
2393 case 0:
2394 break;
2395 case EIO:
2396 return (MMC_ERR_FAILED);
2397 default:
2398 return (MMC_ERR_INVALID);
2399 }
2400 if (timing == bus_timing_mmc_hs400) {
2401 if (mmc_switch_to_hs400(sc, ivar, clock, timing) !=
2402 MMC_ERR_NONE)
2403 return (MMC_ERR_BADCRC);
2404 }
2405 return (MMC_ERR_NONE);
2406 }
2407
2408 static void
mmc_retune_pause(device_t busdev,device_t dev,bool retune)2409 mmc_retune_pause(device_t busdev, device_t dev, bool retune)
2410 {
2411 struct mmc_softc *sc;
2412
2413 sc = device_get_softc(busdev);
2414 KASSERT(device_get_parent(dev) == busdev,
2415 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev),
2416 device_get_nameunit(busdev)));
2417 KASSERT(sc->owner != NULL,
2418 ("%s: Request from %s without bus being acquired.", __func__,
2419 device_get_nameunit(dev)));
2420
2421 if (retune == true && sc->retune_paused == 0)
2422 sc->retune_needed = 1;
2423 sc->retune_paused++;
2424 }
2425
2426 static void
mmc_retune_unpause(device_t busdev,device_t dev)2427 mmc_retune_unpause(device_t busdev, device_t dev)
2428 {
2429 struct mmc_softc *sc;
2430
2431 sc = device_get_softc(busdev);
2432 KASSERT(device_get_parent(dev) == busdev,
2433 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev),
2434 device_get_nameunit(busdev)));
2435 KASSERT(sc->owner != NULL,
2436 ("%s: Request from %s without bus being acquired.", __func__,
2437 device_get_nameunit(dev)));
2438 KASSERT(sc->retune_paused != 0,
2439 ("%s: Re-tune pause count already at 0", __func__));
2440
2441 sc->retune_paused--;
2442 }
2443
2444 static void
mmc_scan(struct mmc_softc * sc)2445 mmc_scan(struct mmc_softc *sc)
2446 {
2447 device_t dev = sc->dev;
2448 int err;
2449
2450 err = mmc_acquire_bus(dev, dev);
2451 if (err != 0) {
2452 device_printf(dev, "Failed to acquire bus for scanning\n");
2453 return;
2454 }
2455 mmc_go_discovery(sc);
2456 err = mmc_release_bus(dev, dev);
2457 if (err != 0) {
2458 device_printf(dev, "Failed to release bus after scanning\n");
2459 return;
2460 }
2461 (void)bus_generic_attach(dev);
2462 }
2463
2464 static int
mmc_read_ivar(device_t bus,device_t child,int which,uintptr_t * result)2465 mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result)
2466 {
2467 struct mmc_ivars *ivar = device_get_ivars(child);
2468
2469 switch (which) {
2470 default:
2471 return (EINVAL);
2472 case MMC_IVAR_SPEC_VERS:
2473 *result = ivar->csd.spec_vers;
2474 break;
2475 case MMC_IVAR_DSR_IMP:
2476 *result = ivar->csd.dsr_imp;
2477 break;
2478 case MMC_IVAR_MEDIA_SIZE:
2479 *result = ivar->sec_count;
2480 break;
2481 case MMC_IVAR_RCA:
2482 *result = ivar->rca;
2483 break;
2484 case MMC_IVAR_SECTOR_SIZE:
2485 *result = MMC_SECTOR_SIZE;
2486 break;
2487 case MMC_IVAR_TRAN_SPEED:
2488 *result = mmcbr_get_clock(bus);
2489 break;
2490 case MMC_IVAR_READ_ONLY:
2491 *result = ivar->read_only;
2492 break;
2493 case MMC_IVAR_HIGH_CAP:
2494 *result = ivar->high_cap;
2495 break;
2496 case MMC_IVAR_CARD_TYPE:
2497 *result = ivar->mode;
2498 break;
2499 case MMC_IVAR_BUS_WIDTH:
2500 *result = ivar->bus_width;
2501 break;
2502 case MMC_IVAR_ERASE_SECTOR:
2503 *result = ivar->erase_sector;
2504 break;
2505 case MMC_IVAR_MAX_DATA:
2506 *result = mmcbr_get_max_data(bus);
2507 break;
2508 case MMC_IVAR_CMD6_TIMEOUT:
2509 *result = ivar->cmd6_time;
2510 break;
2511 case MMC_IVAR_QUIRKS:
2512 *result = ivar->quirks;
2513 break;
2514 case MMC_IVAR_CARD_ID_STRING:
2515 *(char **)result = ivar->card_id_string;
2516 break;
2517 case MMC_IVAR_CARD_SN_STRING:
2518 *(char **)result = ivar->card_sn_string;
2519 break;
2520 }
2521 return (0);
2522 }
2523
2524 static int
mmc_write_ivar(device_t bus,device_t child,int which,uintptr_t value)2525 mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
2526 {
2527
2528 /*
2529 * None are writable ATM
2530 */
2531 return (EINVAL);
2532 }
2533
2534 static void
mmc_delayed_attach(void * xsc)2535 mmc_delayed_attach(void *xsc)
2536 {
2537 struct mmc_softc *sc = xsc;
2538
2539 mmc_scan(sc);
2540 config_intrhook_disestablish(&sc->config_intrhook);
2541 }
2542
2543 static int
mmc_child_location(device_t dev,device_t child,struct sbuf * sb)2544 mmc_child_location(device_t dev, device_t child, struct sbuf *sb)
2545 {
2546
2547 sbuf_printf(sb, "rca=0x%04x", mmc_get_rca(child));
2548 return (0);
2549 }
2550
2551 static device_method_t mmc_methods[] = {
2552 /* device_if */
2553 DEVMETHOD(device_probe, mmc_probe),
2554 DEVMETHOD(device_attach, mmc_attach),
2555 DEVMETHOD(device_detach, mmc_detach),
2556 DEVMETHOD(device_suspend, mmc_suspend),
2557 DEVMETHOD(device_resume, mmc_resume),
2558
2559 /* Bus interface */
2560 DEVMETHOD(bus_read_ivar, mmc_read_ivar),
2561 DEVMETHOD(bus_write_ivar, mmc_write_ivar),
2562 DEVMETHOD(bus_child_location, mmc_child_location),
2563
2564 /* MMC Bus interface */
2565 DEVMETHOD(mmcbus_retune_pause, mmc_retune_pause),
2566 DEVMETHOD(mmcbus_retune_unpause, mmc_retune_unpause),
2567 DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request),
2568 DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus),
2569 DEVMETHOD(mmcbus_release_bus, mmc_release_bus),
2570
2571 DEVMETHOD_END
2572 };
2573
2574 driver_t mmc_driver = {
2575 "mmc",
2576 mmc_methods,
2577 sizeof(struct mmc_softc),
2578 };
2579
2580 MODULE_VERSION(mmc, MMC_VERSION);
2581