1 /*-
2 * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #ifndef __MLX5_ACCEL_IPSEC_H__
34 #define __MLX5_ACCEL_IPSEC_H__
35
36 #ifdef CONFIG_MLX5_ACCEL
37
38 #include <dev/mlx5/driver.h>
39
40 enum {
41 MLX5_ACCEL_IPSEC_DEVICE = BIT(1),
42 MLX5_ACCEL_IPSEC_IPV6 = BIT(2),
43 MLX5_ACCEL_IPSEC_ESP = BIT(3),
44 MLX5_ACCEL_IPSEC_LSO = BIT(4),
45 };
46
47 #define MLX5_IPSEC_SADB_IP_AH BIT(7)
48 #define MLX5_IPSEC_SADB_IP_ESP BIT(6)
49 #define MLX5_IPSEC_SADB_SA_VALID BIT(5)
50 #define MLX5_IPSEC_SADB_SPI_EN BIT(4)
51 #define MLX5_IPSEC_SADB_DIR_SX BIT(3)
52 #define MLX5_IPSEC_SADB_IPV6 BIT(2)
53
54 enum {
55 MLX5_IPSEC_CMD_ADD_SA = 0,
56 MLX5_IPSEC_CMD_DEL_SA = 1,
57 };
58
59 enum mlx5_accel_ipsec_enc_mode {
60 MLX5_IPSEC_SADB_MODE_NONE = 0,
61 MLX5_IPSEC_SADB_MODE_AES_GCM_128_AUTH_128 = 1,
62 MLX5_IPSEC_SADB_MODE_AES_GCM_256_AUTH_128 = 3,
63 };
64
65 #define MLX5_IPSEC_DEV(mdev) (mlx5_accel_ipsec_device_caps(mdev) & \
66 MLX5_ACCEL_IPSEC_DEVICE)
67
68 struct mlx5_accel_ipsec_sa {
69 __be32 cmd;
70 u8 key_enc[32];
71 u8 key_auth[32];
72 __be32 sip[4];
73 __be32 dip[4];
74 union {
75 struct {
76 __be32 reserved;
77 u8 salt_iv[8];
78 __be32 salt;
79 } __packed gcm;
80 struct {
81 u8 salt[16];
82 } __packed cbc;
83 };
84 __be32 spi;
85 __be32 sw_sa_handle;
86 __be16 tfclen;
87 u8 enc_mode;
88 u8 sip_masklen;
89 u8 dip_masklen;
90 u8 flags;
91 u8 reserved[2];
92 } __packed;
93
94 /**
95 * mlx5_accel_ipsec_sa_cmd_exec - Execute an IPSec SADB command
96 * @mdev: mlx5 device
97 * @cmd: command to execute
98 * May be called from atomic context. Returns context pointer, or error
99 * Caller must eventually call mlx5_accel_ipsec_sa_cmd_wait from non-atomic
100 * context, to cleanup the context pointer
101 */
102 void *mlx5_accel_ipsec_sa_cmd_exec(struct mlx5_core_dev *mdev,
103 struct mlx5_accel_ipsec_sa *cmd);
104
105 /**
106 * mlx5_accel_ipsec_sa_cmd_wait - Wait for command execution completion
107 * @context: Context pointer returned from call to mlx5_accel_ipsec_sa_cmd_exec
108 * Sleeps (killable) until command execution is complete.
109 * Returns the command result, or -EINTR if killed
110 */
111 int mlx5_accel_ipsec_sa_cmd_wait(void *context);
112
113 u32 mlx5_accel_ipsec_device_caps(struct mlx5_core_dev *mdev);
114
115 unsigned int mlx5_accel_ipsec_counters_count(struct mlx5_core_dev *mdev);
116 int mlx5_accel_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
117 unsigned int count);
118
119 int mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev);
120 void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev);
121
122 #else
123
124 #define MLX5_IPSEC_DEV(mdev) false
125
mlx5_accel_ipsec_init(struct mlx5_core_dev * mdev)126 static inline int mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev)
127 {
128 return 0;
129 }
130
mlx5_accel_ipsec_cleanup(struct mlx5_core_dev * mdev)131 static inline void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev)
132 {
133 }
134
135 #endif
136
137 #endif /* __MLX5_ACCEL_IPSEC_H__ */
138