1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (c) 1990 The Regents of the University of California.
5 * Copyright (c) 2010 Alexander Motin <[email protected]>
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * William Jolitz and Don Ahn.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. Neither the name of the University nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91
36 */
37
38 #include <sys/cdefs.h>
39 __FBSDID("$FreeBSD$");
40
41 /*
42 * Routines to handle clock hardware.
43 */
44
45 #ifdef __amd64__
46 #define DEV_APIC
47 #else
48 #include "opt_apic.h"
49 #endif
50 #include "opt_clock.h"
51 #include "opt_isa.h"
52
53 #include <sys/param.h>
54 #include <sys/systm.h>
55 #include <sys/bus.h>
56 #include <sys/lock.h>
57 #include <sys/kdb.h>
58 #include <sys/mutex.h>
59 #include <sys/proc.h>
60 #include <sys/kernel.h>
61 #include <sys/module.h>
62 #include <sys/rman.h>
63 #include <sys/sched.h>
64 #include <sys/smp.h>
65 #include <sys/sysctl.h>
66 #include <sys/timeet.h>
67 #include <sys/timetc.h>
68
69 #include <machine/clock.h>
70 #include <machine/cpu.h>
71 #include <machine/intr_machdep.h>
72 #include <machine/ppireg.h>
73 #include <machine/timerreg.h>
74 #include <x86/apicvar.h>
75 #include <x86/init.h>
76
77 #include <isa/rtc.h>
78 #ifdef DEV_ISA
79 #include <isa/isareg.h>
80 #include <isa/isavar.h>
81 #endif
82
83 int clkintr_pending;
84 #ifndef TIMER_FREQ
85 #define TIMER_FREQ 1193182
86 #endif
87 u_int i8254_freq = TIMER_FREQ;
88 TUNABLE_INT("hw.i8254.freq", &i8254_freq);
89 int i8254_max_count;
90 static int i8254_timecounter = 1;
91
92 static struct mtx clock_lock;
93 static struct intsrc *i8254_intsrc;
94 static uint16_t i8254_lastcount;
95 static uint16_t i8254_offset;
96 static int (*i8254_pending)(struct intsrc *);
97 static int i8254_ticked;
98
99 struct attimer_softc {
100 int intr_en;
101 int port_rid, intr_rid;
102 struct resource *port_res;
103 struct resource *intr_res;
104 void *intr_handler;
105 struct timecounter tc;
106 struct eventtimer et;
107 int mode;
108 #define MODE_STOP 0
109 #define MODE_PERIODIC 1
110 #define MODE_ONESHOT 2
111 uint32_t period;
112 };
113 static struct attimer_softc *attimer_sc = NULL;
114
115 static int timer0_period = -2;
116 static int timer0_mode = 0xffff;
117 static int timer0_last = 0xffff;
118
119 /* Values for timerX_state: */
120 #define RELEASED 0
121 #define RELEASE_PENDING 1
122 #define ACQUIRED 2
123 #define ACQUIRE_PENDING 3
124
125 static u_char timer2_state;
126
127 static unsigned i8254_get_timecount(struct timecounter *tc);
128 static void set_i8254_freq(int mode, uint32_t period);
129
130 void
clock_init(void)131 clock_init(void)
132 {
133 /* Init the clock lock */
134 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE);
135 /* Init the clock in order to use DELAY */
136 init_ops.early_clock_source_init();
137 }
138
139 static int
clkintr(void * arg)140 clkintr(void *arg)
141 {
142 struct attimer_softc *sc = (struct attimer_softc *)arg;
143
144 if (i8254_timecounter && sc->period != 0) {
145 mtx_lock_spin(&clock_lock);
146 if (i8254_ticked)
147 i8254_ticked = 0;
148 else {
149 i8254_offset += i8254_max_count;
150 i8254_lastcount = 0;
151 }
152 clkintr_pending = 0;
153 mtx_unlock_spin(&clock_lock);
154 }
155
156 if (sc->et.et_active && sc->mode != MODE_STOP)
157 sc->et.et_event_cb(&sc->et, sc->et.et_arg);
158
159 return (FILTER_HANDLED);
160 }
161
162 int
timer_spkr_acquire(void)163 timer_spkr_acquire(void)
164 {
165 int mode;
166
167 mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT;
168
169 if (timer2_state != RELEASED)
170 return (-1);
171 timer2_state = ACQUIRED;
172
173 /*
174 * This access to the timer registers is as atomic as possible
175 * because it is a single instruction. We could do better if we
176 * knew the rate. Use of splclock() limits glitches to 10-100us,
177 * and this is probably good enough for timer2, so we aren't as
178 * careful with it as with timer0.
179 */
180 outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
181
182 ppi_spkr_on(); /* enable counter2 output to speaker */
183 return (0);
184 }
185
186 int
timer_spkr_release(void)187 timer_spkr_release(void)
188 {
189
190 if (timer2_state != ACQUIRED)
191 return (-1);
192 timer2_state = RELEASED;
193 outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
194
195 ppi_spkr_off(); /* disable counter2 output to speaker */
196 return (0);
197 }
198
199 void
timer_spkr_setfreq(int freq)200 timer_spkr_setfreq(int freq)
201 {
202
203 freq = i8254_freq / freq;
204 mtx_lock_spin(&clock_lock);
205 outb(TIMER_CNTR2, freq & 0xff);
206 outb(TIMER_CNTR2, freq >> 8);
207 mtx_unlock_spin(&clock_lock);
208 }
209
210 static int
getit(void)211 getit(void)
212 {
213 int high, low;
214
215 mtx_lock_spin(&clock_lock);
216
217 /* Select timer0 and latch counter value. */
218 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
219
220 low = inb(TIMER_CNTR0);
221 high = inb(TIMER_CNTR0);
222
223 mtx_unlock_spin(&clock_lock);
224 return ((high << 8) | low);
225 }
226
227 /*
228 * Wait "n" microseconds.
229 * Relies on timer 1 counting down from (i8254_freq / hz)
230 * Note: timer had better have been programmed before this is first used!
231 */
232 void
i8254_delay(int n)233 i8254_delay(int n)
234 {
235 int delta, prev_tick, tick, ticks_left;
236 #ifdef DELAYDEBUG
237 int getit_calls = 1;
238 int n1;
239 static int state = 0;
240
241 if (state == 0) {
242 state = 1;
243 for (n1 = 1; n1 <= 10000000; n1 *= 10)
244 DELAY(n1);
245 state = 2;
246 }
247 if (state == 1)
248 printf("DELAY(%d)...", n);
249 #endif
250 /*
251 * Read the counter first, so that the rest of the setup overhead is
252 * counted. Guess the initial overhead is 20 usec (on most systems it
253 * takes about 1.5 usec for each of the i/o's in getit(). The loop
254 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The
255 * multiplications and divisions to scale the count take a while).
256 *
257 * However, if ddb is active then use a fake counter since reading
258 * the i8254 counter involves acquiring a lock. ddb must not do
259 * locking for many reasons, but it calls here for at least atkbd
260 * input.
261 */
262 #ifdef KDB
263 if (kdb_active)
264 prev_tick = 1;
265 else
266 #endif
267 prev_tick = getit();
268 n -= 0; /* XXX actually guess no initial overhead */
269 /*
270 * Calculate (n * (i8254_freq / 1e6)) without using floating point
271 * and without any avoidable overflows.
272 */
273 if (n <= 0)
274 ticks_left = 0;
275 else if (n < 256)
276 /*
277 * Use fixed point to avoid a slow division by 1000000.
278 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest.
279 * 2^15 is the first power of 2 that gives exact results
280 * for n between 0 and 256.
281 */
282 ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15;
283 else
284 /*
285 * Don't bother using fixed point, although gcc-2.7.2
286 * generates particularly poor code for the long long
287 * division, since even the slow way will complete long
288 * before the delay is up (unless we're interrupted).
289 */
290 ticks_left = ((u_int)n * (long long)i8254_freq + 999999)
291 / 1000000;
292
293 while (ticks_left > 0) {
294 #ifdef KDB
295 if (kdb_active) {
296 inb(0x84);
297 tick = prev_tick - 1;
298 if (tick <= 0)
299 tick = i8254_max_count;
300 } else
301 #endif
302 tick = getit();
303 #ifdef DELAYDEBUG
304 ++getit_calls;
305 #endif
306 delta = prev_tick - tick;
307 prev_tick = tick;
308 if (delta < 0) {
309 delta += i8254_max_count;
310 /*
311 * Guard against i8254_max_count being wrong.
312 * This shouldn't happen in normal operation,
313 * but it may happen if set_i8254_freq() is
314 * traced.
315 */
316 if (delta < 0)
317 delta = 0;
318 }
319 ticks_left -= delta;
320 }
321 #ifdef DELAYDEBUG
322 if (state == 1)
323 printf(" %d calls to getit() at %d usec each\n",
324 getit_calls, (n + 5) / getit_calls);
325 #endif
326 }
327
328 static void
set_i8254_freq(int mode,uint32_t period)329 set_i8254_freq(int mode, uint32_t period)
330 {
331 int new_count, new_mode;
332
333 mtx_lock_spin(&clock_lock);
334 if (mode == MODE_STOP) {
335 if (i8254_timecounter) {
336 mode = MODE_PERIODIC;
337 new_count = 0x10000;
338 } else
339 new_count = -1;
340 } else {
341 new_count = min(((uint64_t)i8254_freq * period +
342 0x80000000LLU) >> 32, 0x10000);
343 }
344 if (new_count == timer0_period)
345 goto out;
346 i8254_max_count = ((new_count & ~0xffff) != 0) ? 0xffff : new_count;
347 timer0_period = (mode == MODE_PERIODIC) ? new_count : -1;
348 switch (mode) {
349 case MODE_STOP:
350 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT;
351 outb(TIMER_MODE, new_mode);
352 outb(TIMER_CNTR0, 0);
353 outb(TIMER_CNTR0, 0);
354 break;
355 case MODE_PERIODIC:
356 new_mode = TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT;
357 outb(TIMER_MODE, new_mode);
358 outb(TIMER_CNTR0, new_count & 0xff);
359 outb(TIMER_CNTR0, new_count >> 8);
360 break;
361 case MODE_ONESHOT:
362 if (new_count < 256 && timer0_last < 256) {
363 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_LSB;
364 if (new_mode != timer0_mode)
365 outb(TIMER_MODE, new_mode);
366 outb(TIMER_CNTR0, new_count & 0xff);
367 break;
368 }
369 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT;
370 if (new_mode != timer0_mode)
371 outb(TIMER_MODE, new_mode);
372 outb(TIMER_CNTR0, new_count & 0xff);
373 outb(TIMER_CNTR0, new_count >> 8);
374 break;
375 default:
376 panic("set_i8254_freq: unknown operational mode");
377 }
378 timer0_mode = new_mode;
379 timer0_last = new_count;
380 out:
381 mtx_unlock_spin(&clock_lock);
382 }
383
384 static void
i8254_restore(void)385 i8254_restore(void)
386 {
387
388 timer0_period = -2;
389 timer0_mode = 0xffff;
390 timer0_last = 0xffff;
391 if (attimer_sc != NULL)
392 set_i8254_freq(attimer_sc->mode, attimer_sc->period);
393 else
394 set_i8254_freq(MODE_STOP, 0);
395 }
396
397 /* This is separate from startrtclock() so that it can be called early. */
398 void
i8254_init(void)399 i8254_init(void)
400 {
401
402 set_i8254_freq(MODE_STOP, 0);
403 }
404
405 void
startrtclock()406 startrtclock()
407 {
408
409 init_TSC();
410 }
411
412 void
cpu_initclocks(void)413 cpu_initclocks(void)
414 {
415 #ifdef EARLY_AP_STARTUP
416 struct thread *td;
417 int i;
418
419 td = curthread;
420
421 tsc_calibrate();
422 #ifdef DEV_APIC
423 lapic_calibrate_timer();
424 #endif
425 cpu_initclocks_bsp();
426 CPU_FOREACH(i) {
427 if (i == 0)
428 continue;
429 thread_lock(td);
430 sched_bind(td, i);
431 thread_unlock(td);
432 cpu_initclocks_ap();
433 }
434 thread_lock(td);
435 if (sched_is_bound(td))
436 sched_unbind(td);
437 thread_unlock(td);
438 #else
439 tsc_calibrate();
440 #ifdef DEV_APIC
441 lapic_calibrate_timer();
442 #endif
443 cpu_initclocks_bsp();
444 #endif
445 }
446
447 static int
sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)448 sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
449 {
450 int error;
451 u_int freq;
452
453 /*
454 * Use `i8254' instead of `timer' in external names because `timer'
455 * is too generic. Should use it everywhere.
456 */
457 freq = i8254_freq;
458 error = sysctl_handle_int(oidp, &freq, 0, req);
459 if (error == 0 && req->newptr != NULL) {
460 i8254_freq = freq;
461 if (attimer_sc != NULL) {
462 set_i8254_freq(attimer_sc->mode, attimer_sc->period);
463 attimer_sc->tc.tc_frequency = freq;
464 } else {
465 set_i8254_freq(MODE_STOP, 0);
466 }
467 }
468 return (error);
469 }
470
471 SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq,
472 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE,
473 0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU",
474 "i8254 timer frequency");
475
476 static unsigned
i8254_get_timecount(struct timecounter * tc)477 i8254_get_timecount(struct timecounter *tc)
478 {
479 device_t dev = (device_t)tc->tc_priv;
480 struct attimer_softc *sc = device_get_softc(dev);
481 register_t flags;
482 uint16_t count;
483 u_int high, low;
484
485 if (sc->period == 0)
486 return (i8254_max_count - getit());
487
488 #ifdef __amd64__
489 flags = read_rflags();
490 #else
491 flags = read_eflags();
492 #endif
493 mtx_lock_spin(&clock_lock);
494
495 /* Select timer0 and latch counter value. */
496 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
497
498 low = inb(TIMER_CNTR0);
499 high = inb(TIMER_CNTR0);
500 count = i8254_max_count - ((high << 8) | low);
501 if (count < i8254_lastcount ||
502 (!i8254_ticked && (clkintr_pending ||
503 ((count < 20 || (!(flags & PSL_I) &&
504 count < i8254_max_count / 2u)) &&
505 i8254_pending != NULL && i8254_pending(i8254_intsrc))))) {
506 i8254_ticked = 1;
507 i8254_offset += i8254_max_count;
508 }
509 i8254_lastcount = count;
510 count += i8254_offset;
511 mtx_unlock_spin(&clock_lock);
512 return (count);
513 }
514
515 static int
attimer_start(struct eventtimer * et,sbintime_t first,sbintime_t period)516 attimer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
517 {
518 device_t dev = (device_t)et->et_priv;
519 struct attimer_softc *sc = device_get_softc(dev);
520
521 if (period != 0) {
522 sc->mode = MODE_PERIODIC;
523 sc->period = period;
524 } else {
525 sc->mode = MODE_ONESHOT;
526 sc->period = first;
527 }
528 if (!sc->intr_en) {
529 i8254_intsrc->is_pic->pic_enable_source(i8254_intsrc);
530 sc->intr_en = 1;
531 }
532 set_i8254_freq(sc->mode, sc->period);
533 return (0);
534 }
535
536 static int
attimer_stop(struct eventtimer * et)537 attimer_stop(struct eventtimer *et)
538 {
539 device_t dev = (device_t)et->et_priv;
540 struct attimer_softc *sc = device_get_softc(dev);
541
542 sc->mode = MODE_STOP;
543 sc->period = 0;
544 set_i8254_freq(sc->mode, sc->period);
545 return (0);
546 }
547
548 #ifdef DEV_ISA
549 /*
550 * Attach to the ISA PnP descriptors for the timer
551 */
552 static struct isa_pnp_id attimer_ids[] = {
553 { 0x0001d041 /* PNP0100 */, "AT timer" },
554 { 0 }
555 };
556
557 static int
attimer_probe(device_t dev)558 attimer_probe(device_t dev)
559 {
560 int result;
561
562 result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids);
563 /* ENOENT means no PnP-ID, device is hinted. */
564 if (result == ENOENT) {
565 device_set_desc(dev, "AT timer");
566 return (BUS_PROBE_LOW_PRIORITY);
567 }
568 return (result);
569 }
570
571 static int
attimer_attach(device_t dev)572 attimer_attach(device_t dev)
573 {
574 struct attimer_softc *sc;
575 rman_res_t s;
576 int i;
577
578 attimer_sc = sc = device_get_softc(dev);
579 bzero(sc, sizeof(struct attimer_softc));
580 if (!(sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT,
581 &sc->port_rid, IO_TIMER1, IO_TIMER1 + 3, 4, RF_ACTIVE)))
582 device_printf(dev,"Warning: Couldn't map I/O.\n");
583 i8254_intsrc = intr_lookup_source(0);
584 if (i8254_intsrc != NULL)
585 i8254_pending = i8254_intsrc->is_pic->pic_source_pending;
586 resource_int_value(device_get_name(dev), device_get_unit(dev),
587 "timecounter", &i8254_timecounter);
588 set_i8254_freq(MODE_STOP, 0);
589 if (i8254_timecounter) {
590 sc->tc.tc_get_timecount = i8254_get_timecount;
591 sc->tc.tc_counter_mask = 0xffff;
592 sc->tc.tc_frequency = i8254_freq;
593 sc->tc.tc_name = "i8254";
594 sc->tc.tc_quality = 0;
595 sc->tc.tc_priv = dev;
596 tc_init(&sc->tc);
597 }
598 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
599 "clock", &i) != 0 || i != 0) {
600 sc->intr_rid = 0;
601 while (bus_get_resource(dev, SYS_RES_IRQ, sc->intr_rid,
602 &s, NULL) == 0 && s != 0)
603 sc->intr_rid++;
604 if (!(sc->intr_res = bus_alloc_resource(dev, SYS_RES_IRQ,
605 &sc->intr_rid, 0, 0, 1, RF_ACTIVE))) {
606 device_printf(dev,"Can't map interrupt.\n");
607 return (0);
608 }
609 /* Dirty hack, to make bus_setup_intr to not enable source. */
610 i8254_intsrc->is_handlers++;
611 if ((bus_setup_intr(dev, sc->intr_res,
612 INTR_MPSAFE | INTR_TYPE_CLK,
613 (driver_filter_t *)clkintr, NULL,
614 sc, &sc->intr_handler))) {
615 device_printf(dev, "Can't setup interrupt.\n");
616 i8254_intsrc->is_handlers--;
617 return (0);
618 }
619 i8254_intsrc->is_handlers--;
620 i8254_intsrc->is_pic->pic_enable_intr(i8254_intsrc);
621 sc->et.et_name = "i8254";
622 sc->et.et_flags = ET_FLAGS_PERIODIC;
623 if (!i8254_timecounter)
624 sc->et.et_flags |= ET_FLAGS_ONESHOT;
625 sc->et.et_quality = 100;
626 sc->et.et_frequency = i8254_freq;
627 sc->et.et_min_period = (0x0002LLU << 32) / i8254_freq;
628 sc->et.et_max_period = (0xfffeLLU << 32) / i8254_freq;
629 sc->et.et_start = attimer_start;
630 sc->et.et_stop = attimer_stop;
631 sc->et.et_priv = dev;
632 et_register(&sc->et);
633 }
634 return(0);
635 }
636
637 static int
attimer_resume(device_t dev)638 attimer_resume(device_t dev)
639 {
640
641 i8254_restore();
642 return (0);
643 }
644
645 static device_method_t attimer_methods[] = {
646 /* Device interface */
647 DEVMETHOD(device_probe, attimer_probe),
648 DEVMETHOD(device_attach, attimer_attach),
649 DEVMETHOD(device_detach, bus_generic_detach),
650 DEVMETHOD(device_shutdown, bus_generic_shutdown),
651 DEVMETHOD(device_suspend, bus_generic_suspend),
652 DEVMETHOD(device_resume, attimer_resume),
653 { 0, 0 }
654 };
655
656 static driver_t attimer_driver = {
657 "attimer",
658 attimer_methods,
659 sizeof(struct attimer_softc),
660 };
661
662 static devclass_t attimer_devclass;
663
664 DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0);
665 DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0);
666 ISA_PNP_INFO(attimer_ids);
667
668 #endif /* DEV_ISA */
669