18b8807f5SBjoern A. Zeeb# 28b8807f5SBjoern A. Zeeb# BERI_NETFPGA_MDROOT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible 38b8807f5SBjoern A. Zeeb# RISC Implementation) FPGA soft core, as configured in its NetFPGA reference 48b8807f5SBjoern A. Zeeb# configuration. 58b8807f5SBjoern A. Zeeb# 68b8807f5SBjoern A. Zeeb# $FreeBSD$ 78b8807f5SBjoern A. Zeeb# 88b8807f5SBjoern A. Zeeb 9*9fa34a2bSBrooks Davisinclude "std.BERI" 108b8807f5SBjoern A. Zeeb 118b8807f5SBjoern A. Zeebident BERI_NETFPGA_MDROOT 128b8807f5SBjoern A. Zeeb 13da1b85e4SBjoern A. Zeeboptions HZ=100 14da1b85e4SBjoern A. Zeeb 158b8807f5SBjoern A. Zeeboptions FDT 168b8807f5SBjoern A. Zeeboptions FDT_DTB_STATIC 178b8807f5SBjoern A. Zeebmakeoptions FDT_DTS_FILE=beri-netfpga.dts 188b8807f5SBjoern A. Zeeb 19da1b85e4SBjoern A. Zeeb#device uart 20da1b85e4SBjoern A. Zeebdevice altera_jtag_uart 218b8807f5SBjoern A. Zeeb 224a9af7d5SBjoern A. Zeebdevice bpf 234a9af7d5SBjoern A. Zeeb 244a9af7d5SBjoern A. Zeeboptions DEVICE_POLLING 254a9af7d5SBjoern A. Zeebdevice netfpga10g_nf10bmac 2662820660SBjoern A. Zeeboptions NF10BMAC_64BIT 274a9af7d5SBjoern A. Zeeb 288b8807f5SBjoern A. Zeeb# 298b8807f5SBjoern A. Zeeb# This kernel configuration uses an embedded memory root file system. 308b8807f5SBjoern A. Zeeb# Adjust the following path and size based on local requirements. 318b8807f5SBjoern A. Zeeb# 328b8807f5SBjoern A. Zeeboptions MD_ROOT # MD is a potential root device 338b8807f5SBjoern A. Zeeboptions MD_ROOT_SIZE=26112 # 25.5MB 348b8807f5SBjoern A. Zeeboptions ROOTDEVNAME=\"ufs:md0\" 358b8807f5SBjoern A. Zeeb#makeoptions MFS_IMAGE=/foo/baz/baz/mdroot.img 368b8807f5SBjoern A. Zeeb 378b8807f5SBjoern A. Zeeb# end 38