History log of /freebsd-13.1/sys/mips/conf/BERI_NETFPGA_MDROOT (Results 1 – 5 of 5)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: release/12.4.0, release/13.1.0, release/12.3.0, release/13.0.0, release/12.2.0, release/11.4.0, release/12.1.0, release/11.3.0, release/12.0.0, release/11.2.0, release/10.4.0, release/11.1.0
# 9fa34a2b 21-Feb-2017 Brooks Davis <[email protected]>

Rename BERI_TEMPLATE to std.BERI to be more like other configs.

Sponsored by: DARPA, AFRL


Revision tags: release/11.0.1, release/11.0.0, release/10.3.0, release/10.2.0, release/10.1.0, release/9.3.0
# 62820660 26-Jun-2014 Bjoern A. Zeeb <[email protected]>

Introduce opt_netfpga.h and allow setting NF10BMAC_64BIT from mips kernel
configs. Switch the BERI_NETFPGA_MDROOT to 64bit by default.

Give we have working interrupts also cleanup the extra polling

Introduce opt_netfpga.h and allow setting NF10BMAC_64BIT from mips kernel
configs. Switch the BERI_NETFPGA_MDROOT to 64bit by default.

Give we have working interrupts also cleanup the extra polling CFLAGS from
the module Makefile.

MFC after: 2 weeks

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# 4a9af7d5 17-Apr-2014 Bjoern A. Zeeb <[email protected]>

Add the initial version of if_nf10bmac(4), a driver to support an
NetFPGA-10G Embedded CPU Ethernet Core.

The current version operates on a simple PIO based interface connected
to a NetFPGA-10G port

Add the initial version of if_nf10bmac(4), a driver to support an
NetFPGA-10G Embedded CPU Ethernet Core.

The current version operates on a simple PIO based interface connected
to a NetFPGA-10G port.

To avoid confusion: this driver operates on a CPU running on the FPGA,
e.g. BERI/mips, and is not suited for the PCI host interface.

MFC after: 1 week
Relnotes: yes
Sponsored by: DARPA/AFRL

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# da1b85e4 22-Mar-2014 Bjoern A. Zeeb <[email protected]>

For BERI on NetFPGA assume HZ=100 by default.

Remove the uart support in favour of a "jtag-uart" interface imitation
providing a much simpler interface, directly exported to the host,
allowing the t

For BERI on NetFPGA assume HZ=100 by default.

Remove the uart support in favour of a "jtag-uart" interface imitation
providing a much simpler interface, directly exported to the host,
allowing the toolchain to be shared with BERI on Altera. [1]

Submitted by: Jong Hun HAN (jong.han cl.cam.ac.uk) [1]
MFC after: 2 weeks

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Revision tags: release/10.0.0
# 8b8807f5 12-Dec-2013 Bjoern A. Zeeb <[email protected]>

Add an FDT DTS and MDROOT kernel configuration for BERI on NetFPGA.

At this point we only support one CPU, the PIC, and a UART console.

Reviewed by: brooks
Sponsored by: DARPA, AFRL
MFC after: 5 da

Add an FDT DTS and MDROOT kernel configuration for BERI on NetFPGA.

At this point we only support one CPU, the PIC, and a UART console.

Reviewed by: brooks
Sponsored by: DARPA, AFRL
MFC after: 5 days

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