1 /* $NetBSD: uchcom.c,v 1.1 2007/09/03 17:57:37 tshiozak Exp $ */
2
3 /*-
4 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-2-Clause-NetBSD
5 *
6 * Copyright (c) 2007, Takanori Watanabe
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31 /*
32 * Copyright (c) 2007 The NetBSD Foundation, Inc.
33 * All rights reserved.
34 *
35 * This code is derived from software contributed to The NetBSD Foundation
36 * by Takuya SHIOZAKI ([email protected]).
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
48 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
49 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
50 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
51 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
52 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
53 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
54 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
55 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
56 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
57 * POSSIBILITY OF SUCH DAMAGE.
58 */
59
60 #include <sys/cdefs.h>
61 __FBSDID("$FreeBSD$");
62
63 /*
64 * Driver for WinChipHead CH341/340, the worst USB-serial chip in the
65 * world.
66 */
67
68 #include <sys/stdint.h>
69 #include <sys/stddef.h>
70 #include <sys/param.h>
71 #include <sys/queue.h>
72 #include <sys/types.h>
73 #include <sys/systm.h>
74 #include <sys/kernel.h>
75 #include <sys/bus.h>
76 #include <sys/module.h>
77 #include <sys/lock.h>
78 #include <sys/mutex.h>
79 #include <sys/condvar.h>
80 #include <sys/sysctl.h>
81 #include <sys/sx.h>
82 #include <sys/unistd.h>
83 #include <sys/callout.h>
84 #include <sys/malloc.h>
85 #include <sys/priv.h>
86
87 #include <dev/usb/usb.h>
88 #include <dev/usb/usbdi.h>
89 #include <dev/usb/usbdi_util.h>
90 #include "usbdevs.h"
91
92 #define USB_DEBUG_VAR uchcom_debug
93 #include <dev/usb/usb_debug.h>
94 #include <dev/usb/usb_process.h>
95
96 #include <dev/usb/serial/usb_serial.h>
97
98 #ifdef USB_DEBUG
99 static int uchcom_debug = 0;
100
101 static SYSCTL_NODE(_hw_usb, OID_AUTO, uchcom, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
102 "USB uchcom");
103 SYSCTL_INT(_hw_usb_uchcom, OID_AUTO, debug, CTLFLAG_RWTUN,
104 &uchcom_debug, 0, "uchcom debug level");
105 #endif
106
107 #define UCHCOM_IFACE_INDEX 0
108 #define UCHCOM_CONFIG_INDEX 0
109
110 #define UCHCOM_REV_CH340 0x0250
111 #define UCHCOM_INPUT_BUF_SIZE 8
112
113 #define UCHCOM_REQ_GET_VERSION 0x5F
114 #define UCHCOM_REQ_READ_REG 0x95
115 #define UCHCOM_REQ_WRITE_REG 0x9A
116 #define UCHCOM_REQ_RESET 0xA1
117 #define UCHCOM_REQ_SET_DTRRTS 0xA4
118
119 #define UCHCOM_REG_STAT1 0x06
120 #define UCHCOM_REG_STAT2 0x07
121 #define UCHCOM_REG_BPS_PRE 0x12
122 #define UCHCOM_REG_BPS_DIV 0x13
123 #define UCHCOM_REG_BPS_MOD 0x14
124 #define UCHCOM_REG_BPS_PAD 0x0F
125 #define UCHCOM_REG_BREAK1 0x05
126 #define UCHCOM_REG_LCR1 0x18
127 #define UCHCOM_REG_LCR2 0x25
128
129 #define UCHCOM_VER_20 0x20
130 #define UCHCOM_VER_30 0x30
131
132 #define UCHCOM_BASE_UNKNOWN 0
133 #define UCHCOM_BPS_MOD_BASE 20000000
134 #define UCHCOM_BPS_MOD_BASE_OFS 1100
135
136 #define UCHCOM_DTR_MASK 0x20
137 #define UCHCOM_RTS_MASK 0x40
138
139 #define UCHCOM_BRK_MASK 0x01
140
141 #define UCHCOM_LCR1_MASK 0xAF
142 #define UCHCOM_LCR2_MASK 0x07
143 #define UCHCOM_LCR1_RX 0x80
144 #define UCHCOM_LCR1_TX 0x40
145 #define UCHCOM_LCR1_PARENB 0x08
146 #define UCHCOM_LCR1_CS8 0x03
147 #define UCHCOM_LCR2_PAREVEN 0x07
148 #define UCHCOM_LCR2_PARODD 0x06
149 #define UCHCOM_LCR2_PARMARK 0x05
150 #define UCHCOM_LCR2_PARSPACE 0x04
151
152 #define UCHCOM_INTR_STAT1 0x02
153 #define UCHCOM_INTR_STAT2 0x03
154 #define UCHCOM_INTR_LEAST 4
155
156 #define UCHCOM_BULK_BUF_SIZE 1024 /* bytes */
157
158 enum {
159 UCHCOM_BULK_DT_WR,
160 UCHCOM_BULK_DT_RD,
161 UCHCOM_INTR_DT_RD,
162 UCHCOM_N_TRANSFER,
163 };
164
165 struct uchcom_softc {
166 struct ucom_super_softc sc_super_ucom;
167 struct ucom_softc sc_ucom;
168
169 struct usb_xfer *sc_xfer[UCHCOM_N_TRANSFER];
170 struct usb_device *sc_udev;
171 struct mtx sc_mtx;
172
173 uint8_t sc_dtr; /* local copy */
174 uint8_t sc_rts; /* local copy */
175 uint8_t sc_version;
176 uint8_t sc_msr;
177 uint8_t sc_lsr; /* local status register */
178 };
179
180 struct uchcom_divider {
181 uint8_t dv_prescaler;
182 uint8_t dv_div;
183 uint8_t dv_mod;
184 };
185
186 struct uchcom_divider_record {
187 uint32_t dvr_high;
188 uint32_t dvr_low;
189 uint32_t dvr_base_clock;
190 struct uchcom_divider dvr_divider;
191 };
192
193 static const struct uchcom_divider_record dividers[] =
194 {
195 {307200, 307200, UCHCOM_BASE_UNKNOWN, {7, 0xD9, 0}},
196 {921600, 921600, UCHCOM_BASE_UNKNOWN, {7, 0xF3, 0}},
197 {2999999, 23530, 6000000, {3, 0, 0}},
198 {23529, 2942, 750000, {2, 0, 0}},
199 {2941, 368, 93750, {1, 0, 0}},
200 {367, 1, 11719, {0, 0, 0}},
201 };
202
203 #define NUM_DIVIDERS nitems(dividers)
204
205 static const STRUCT_USB_HOST_ID uchcom_devs[] = {
206 {USB_VPI(USB_VENDOR_WCH, USB_PRODUCT_WCH_CH341SER, 0)},
207 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER, 0)},
208 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER_2, 0)},
209 };
210
211 /* protypes */
212
213 static void uchcom_free(struct ucom_softc *);
214 static int uchcom_pre_param(struct ucom_softc *, struct termios *);
215 static void uchcom_cfg_get_status(struct ucom_softc *, uint8_t *,
216 uint8_t *);
217 static void uchcom_cfg_open(struct ucom_softc *ucom);
218 static void uchcom_cfg_param(struct ucom_softc *, struct termios *);
219 static void uchcom_cfg_set_break(struct ucom_softc *, uint8_t);
220 static void uchcom_cfg_set_dtr(struct ucom_softc *, uint8_t);
221 static void uchcom_cfg_set_rts(struct ucom_softc *, uint8_t);
222 static void uchcom_start_read(struct ucom_softc *);
223 static void uchcom_start_write(struct ucom_softc *);
224 static void uchcom_stop_read(struct ucom_softc *);
225 static void uchcom_stop_write(struct ucom_softc *);
226 static void uchcom_update_version(struct uchcom_softc *);
227 static void uchcom_convert_status(struct uchcom_softc *, uint8_t);
228 static void uchcom_update_status(struct uchcom_softc *);
229 static void uchcom_set_dtr_rts(struct uchcom_softc *);
230 static int uchcom_calc_divider_settings(struct uchcom_divider *, uint32_t);
231 static void uchcom_set_baudrate(struct uchcom_softc *, uint32_t);
232 static void uchcom_poll(struct ucom_softc *ucom);
233
234 static device_probe_t uchcom_probe;
235 static device_attach_t uchcom_attach;
236 static device_detach_t uchcom_detach;
237 static void uchcom_free_softc(struct uchcom_softc *);
238
239 static usb_callback_t uchcom_intr_callback;
240 static usb_callback_t uchcom_write_callback;
241 static usb_callback_t uchcom_read_callback;
242
243 static const struct usb_config uchcom_config_data[UCHCOM_N_TRANSFER] = {
244 [UCHCOM_BULK_DT_WR] = {
245 .type = UE_BULK,
246 .endpoint = UE_ADDR_ANY,
247 .direction = UE_DIR_OUT,
248 .bufsize = UCHCOM_BULK_BUF_SIZE,
249 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
250 .callback = &uchcom_write_callback,
251 },
252
253 [UCHCOM_BULK_DT_RD] = {
254 .type = UE_BULK,
255 .endpoint = UE_ADDR_ANY,
256 .direction = UE_DIR_IN,
257 .bufsize = UCHCOM_BULK_BUF_SIZE,
258 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
259 .callback = &uchcom_read_callback,
260 },
261
262 [UCHCOM_INTR_DT_RD] = {
263 .type = UE_INTERRUPT,
264 .endpoint = UE_ADDR_ANY,
265 .direction = UE_DIR_IN,
266 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
267 .bufsize = 0, /* use wMaxPacketSize */
268 .callback = &uchcom_intr_callback,
269 },
270 };
271
272 static struct ucom_callback uchcom_callback = {
273 .ucom_cfg_get_status = &uchcom_cfg_get_status,
274 .ucom_cfg_set_dtr = &uchcom_cfg_set_dtr,
275 .ucom_cfg_set_rts = &uchcom_cfg_set_rts,
276 .ucom_cfg_set_break = &uchcom_cfg_set_break,
277 .ucom_cfg_open = &uchcom_cfg_open,
278 .ucom_cfg_param = &uchcom_cfg_param,
279 .ucom_pre_param = &uchcom_pre_param,
280 .ucom_start_read = &uchcom_start_read,
281 .ucom_stop_read = &uchcom_stop_read,
282 .ucom_start_write = &uchcom_start_write,
283 .ucom_stop_write = &uchcom_stop_write,
284 .ucom_poll = &uchcom_poll,
285 .ucom_free = &uchcom_free,
286 };
287
288 /* ----------------------------------------------------------------------
289 * driver entry points
290 */
291
292 static int
uchcom_probe(device_t dev)293 uchcom_probe(device_t dev)
294 {
295 struct usb_attach_arg *uaa = device_get_ivars(dev);
296
297 DPRINTFN(11, "\n");
298
299 if (uaa->usb_mode != USB_MODE_HOST) {
300 return (ENXIO);
301 }
302 if (uaa->info.bConfigIndex != UCHCOM_CONFIG_INDEX) {
303 return (ENXIO);
304 }
305 if (uaa->info.bIfaceIndex != UCHCOM_IFACE_INDEX) {
306 return (ENXIO);
307 }
308 return (usbd_lookup_id_by_uaa(uchcom_devs, sizeof(uchcom_devs), uaa));
309 }
310
311 static int
uchcom_attach(device_t dev)312 uchcom_attach(device_t dev)
313 {
314 struct uchcom_softc *sc = device_get_softc(dev);
315 struct usb_attach_arg *uaa = device_get_ivars(dev);
316 int error;
317 uint8_t iface_index;
318
319 DPRINTFN(11, "\n");
320
321 device_set_usb_desc(dev);
322 mtx_init(&sc->sc_mtx, "uchcom", NULL, MTX_DEF);
323 ucom_ref(&sc->sc_super_ucom);
324
325 sc->sc_udev = uaa->device;
326
327 switch (uaa->info.idProduct) {
328 case USB_PRODUCT_WCH2_CH341SER:
329 device_printf(dev, "CH340 detected\n");
330 break;
331 case USB_PRODUCT_WCH2_CH341SER_2:
332 case USB_PRODUCT_WCH2_CH341SER_3:
333 device_printf(dev, "CH341 detected\n");
334 break;
335 default:
336 device_printf(dev, "New CH340/CH341 product 0x%04x detected\n",
337 uaa->info.idProduct);
338 break;
339 }
340
341 iface_index = UCHCOM_IFACE_INDEX;
342 error = usbd_transfer_setup(uaa->device,
343 &iface_index, sc->sc_xfer, uchcom_config_data,
344 UCHCOM_N_TRANSFER, sc, &sc->sc_mtx);
345
346 if (error) {
347 DPRINTF("one or more missing USB endpoints, "
348 "error=%s\n", usbd_errstr(error));
349 goto detach;
350 }
351
352 /* clear stall at first run */
353 mtx_lock(&sc->sc_mtx);
354 usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
355 usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
356 mtx_unlock(&sc->sc_mtx);
357
358 error = ucom_attach(&sc->sc_super_ucom, &sc->sc_ucom, 1, sc,
359 &uchcom_callback, &sc->sc_mtx);
360 if (error) {
361 goto detach;
362 }
363 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev);
364
365 return (0);
366
367 detach:
368 uchcom_detach(dev);
369 return (ENXIO);
370 }
371
372 static int
uchcom_detach(device_t dev)373 uchcom_detach(device_t dev)
374 {
375 struct uchcom_softc *sc = device_get_softc(dev);
376
377 DPRINTFN(11, "\n");
378
379 ucom_detach(&sc->sc_super_ucom, &sc->sc_ucom);
380 usbd_transfer_unsetup(sc->sc_xfer, UCHCOM_N_TRANSFER);
381
382 device_claim_softc(dev);
383
384 uchcom_free_softc(sc);
385
386 return (0);
387 }
388
389 UCOM_UNLOAD_DRAIN(uchcom);
390
391 static void
uchcom_free_softc(struct uchcom_softc * sc)392 uchcom_free_softc(struct uchcom_softc *sc)
393 {
394 if (ucom_unref(&sc->sc_super_ucom)) {
395 mtx_destroy(&sc->sc_mtx);
396 device_free_softc(sc);
397 }
398 }
399
400 static void
uchcom_free(struct ucom_softc * ucom)401 uchcom_free(struct ucom_softc *ucom)
402 {
403 uchcom_free_softc(ucom->sc_parent);
404 }
405
406 /* ----------------------------------------------------------------------
407 * low level i/o
408 */
409
410 static void
uchcom_ctrl_write(struct uchcom_softc * sc,uint8_t reqno,uint16_t value,uint16_t index)411 uchcom_ctrl_write(struct uchcom_softc *sc, uint8_t reqno,
412 uint16_t value, uint16_t index)
413 {
414 struct usb_device_request req;
415
416 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
417 req.bRequest = reqno;
418 USETW(req.wValue, value);
419 USETW(req.wIndex, index);
420 USETW(req.wLength, 0);
421
422 DPRINTF("WR REQ 0x%02X VAL 0x%04X IDX 0x%04X\n",
423 reqno, value, index);
424 ucom_cfg_do_request(sc->sc_udev,
425 &sc->sc_ucom, &req, NULL, 0, 1000);
426 }
427
428 static void
uchcom_ctrl_read(struct uchcom_softc * sc,uint8_t reqno,uint16_t value,uint16_t index,void * buf,uint16_t buflen)429 uchcom_ctrl_read(struct uchcom_softc *sc, uint8_t reqno,
430 uint16_t value, uint16_t index, void *buf, uint16_t buflen)
431 {
432 struct usb_device_request req;
433
434 req.bmRequestType = UT_READ_VENDOR_DEVICE;
435 req.bRequest = reqno;
436 USETW(req.wValue, value);
437 USETW(req.wIndex, index);
438 USETW(req.wLength, buflen);
439
440 DPRINTF("RD REQ 0x%02X VAL 0x%04X IDX 0x%04X LEN %d\n",
441 reqno, value, index, buflen);
442 ucom_cfg_do_request(sc->sc_udev,
443 &sc->sc_ucom, &req, buf, USB_SHORT_XFER_OK, 1000);
444 }
445
446 static void
uchcom_write_reg(struct uchcom_softc * sc,uint8_t reg1,uint8_t val1,uint8_t reg2,uint8_t val2)447 uchcom_write_reg(struct uchcom_softc *sc,
448 uint8_t reg1, uint8_t val1, uint8_t reg2, uint8_t val2)
449 {
450 DPRINTF("0x%02X<-0x%02X, 0x%02X<-0x%02X\n",
451 (unsigned)reg1, (unsigned)val1,
452 (unsigned)reg2, (unsigned)val2);
453 uchcom_ctrl_write(
454 sc, UCHCOM_REQ_WRITE_REG,
455 reg1 | ((uint16_t)reg2 << 8), val1 | ((uint16_t)val2 << 8));
456 }
457
458 static void
uchcom_read_reg(struct uchcom_softc * sc,uint8_t reg1,uint8_t * rval1,uint8_t reg2,uint8_t * rval2)459 uchcom_read_reg(struct uchcom_softc *sc,
460 uint8_t reg1, uint8_t *rval1, uint8_t reg2, uint8_t *rval2)
461 {
462 uint8_t buf[UCHCOM_INPUT_BUF_SIZE];
463
464 uchcom_ctrl_read(
465 sc, UCHCOM_REQ_READ_REG,
466 reg1 | ((uint16_t)reg2 << 8), 0, buf, sizeof(buf));
467
468 DPRINTF("0x%02X->0x%02X, 0x%02X->0x%02X\n",
469 (unsigned)reg1, (unsigned)buf[0],
470 (unsigned)reg2, (unsigned)buf[1]);
471
472 if (rval1)
473 *rval1 = buf[0];
474 if (rval2)
475 *rval2 = buf[1];
476 }
477
478 static void
uchcom_get_version(struct uchcom_softc * sc,uint8_t * rver)479 uchcom_get_version(struct uchcom_softc *sc, uint8_t *rver)
480 {
481 uint8_t buf[UCHCOM_INPUT_BUF_SIZE];
482
483 uchcom_ctrl_read(sc, UCHCOM_REQ_GET_VERSION, 0, 0, buf, sizeof(buf));
484
485 if (rver)
486 *rver = buf[0];
487 }
488
489 static void
uchcom_get_status(struct uchcom_softc * sc,uint8_t * rval)490 uchcom_get_status(struct uchcom_softc *sc, uint8_t *rval)
491 {
492 uchcom_read_reg(sc, UCHCOM_REG_STAT1, rval, UCHCOM_REG_STAT2, NULL);
493 }
494
495 static void
uchcom_set_dtr_rts_10(struct uchcom_softc * sc,uint8_t val)496 uchcom_set_dtr_rts_10(struct uchcom_softc *sc, uint8_t val)
497 {
498 uchcom_write_reg(sc, UCHCOM_REG_STAT1, val, UCHCOM_REG_STAT1, val);
499 }
500
501 static void
uchcom_set_dtr_rts_20(struct uchcom_softc * sc,uint8_t val)502 uchcom_set_dtr_rts_20(struct uchcom_softc *sc, uint8_t val)
503 {
504 uchcom_ctrl_write(sc, UCHCOM_REQ_SET_DTRRTS, val, 0);
505 }
506
507 /* ----------------------------------------------------------------------
508 * middle layer
509 */
510
511 static void
uchcom_update_version(struct uchcom_softc * sc)512 uchcom_update_version(struct uchcom_softc *sc)
513 {
514 uchcom_get_version(sc, &sc->sc_version);
515 DPRINTF("Chip version: 0x%02x\n", sc->sc_version);
516 }
517
518 static void
uchcom_convert_status(struct uchcom_softc * sc,uint8_t cur)519 uchcom_convert_status(struct uchcom_softc *sc, uint8_t cur)
520 {
521 sc->sc_dtr = !(cur & UCHCOM_DTR_MASK);
522 sc->sc_rts = !(cur & UCHCOM_RTS_MASK);
523
524 cur = ~cur & 0x0F;
525 sc->sc_msr = (cur << 4) | ((sc->sc_msr >> 4) ^ cur);
526 }
527
528 static void
uchcom_update_status(struct uchcom_softc * sc)529 uchcom_update_status(struct uchcom_softc *sc)
530 {
531 uint8_t cur;
532
533 uchcom_get_status(sc, &cur);
534 uchcom_convert_status(sc, cur);
535 }
536
537 static void
uchcom_set_dtr_rts(struct uchcom_softc * sc)538 uchcom_set_dtr_rts(struct uchcom_softc *sc)
539 {
540 uint8_t val = 0;
541
542 if (sc->sc_dtr)
543 val |= UCHCOM_DTR_MASK;
544 if (sc->sc_rts)
545 val |= UCHCOM_RTS_MASK;
546
547 if (sc->sc_version < UCHCOM_VER_20)
548 uchcom_set_dtr_rts_10(sc, ~val);
549 else
550 uchcom_set_dtr_rts_20(sc, ~val);
551 }
552
553 static void
uchcom_cfg_set_break(struct ucom_softc * ucom,uint8_t onoff)554 uchcom_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff)
555 {
556 struct uchcom_softc *sc = ucom->sc_parent;
557 uint8_t brk1;
558 uint8_t brk2;
559
560 uchcom_read_reg(sc, UCHCOM_REG_BREAK1, &brk1, UCHCOM_REG_LCR1, &brk2);
561 if (onoff) {
562 /* on - clear bits */
563 brk1 &= ~UCHCOM_BRK_MASK;
564 brk2 &= ~UCHCOM_LCR1_TX;
565 } else {
566 /* off - set bits */
567 brk1 |= UCHCOM_BRK_MASK;
568 brk2 |= UCHCOM_LCR1_TX;
569 }
570 uchcom_write_reg(sc, UCHCOM_REG_BREAK1, brk1, UCHCOM_REG_LCR1, brk2);
571 }
572
573 static int
uchcom_calc_divider_settings(struct uchcom_divider * dp,uint32_t rate)574 uchcom_calc_divider_settings(struct uchcom_divider *dp, uint32_t rate)
575 {
576 const struct uchcom_divider_record *rp;
577 uint32_t div;
578 uint32_t rem;
579 uint32_t mod;
580 uint8_t i;
581
582 /* find record */
583 for (i = 0; i != NUM_DIVIDERS; i++) {
584 if (dividers[i].dvr_high >= rate &&
585 dividers[i].dvr_low <= rate) {
586 rp = ÷rs[i];
587 goto found;
588 }
589 }
590 return (-1);
591
592 found:
593 dp->dv_prescaler = rp->dvr_divider.dv_prescaler;
594 if (rp->dvr_base_clock == UCHCOM_BASE_UNKNOWN)
595 dp->dv_div = rp->dvr_divider.dv_div;
596 else {
597 div = rp->dvr_base_clock / rate;
598 rem = rp->dvr_base_clock % rate;
599 if (div == 0 || div >= 0xFF)
600 return (-1);
601 if ((rem << 1) >= rate)
602 div += 1;
603 dp->dv_div = (uint8_t)-div;
604 }
605
606 mod = (UCHCOM_BPS_MOD_BASE / rate) + UCHCOM_BPS_MOD_BASE_OFS;
607 mod = mod + (mod / 2);
608
609 dp->dv_mod = (mod + 0xFF) / 0x100;
610
611 return (0);
612 }
613
614 static void
uchcom_set_baudrate(struct uchcom_softc * sc,uint32_t rate)615 uchcom_set_baudrate(struct uchcom_softc *sc, uint32_t rate)
616 {
617 struct uchcom_divider dv;
618
619 if (uchcom_calc_divider_settings(&dv, rate))
620 return;
621
622 /*
623 * According to linux code we need to set bit 7 of UCHCOM_REG_BPS_PRE,
624 * otherwise the chip will buffer data.
625 */
626 uchcom_write_reg(sc,
627 UCHCOM_REG_BPS_PRE, dv.dv_prescaler | 0x80,
628 UCHCOM_REG_BPS_DIV, dv.dv_div);
629 uchcom_write_reg(sc,
630 UCHCOM_REG_BPS_MOD, dv.dv_mod,
631 UCHCOM_REG_BPS_PAD, 0);
632 }
633
634 /* ----------------------------------------------------------------------
635 * methods for ucom
636 */
637 static void
uchcom_cfg_get_status(struct ucom_softc * ucom,uint8_t * lsr,uint8_t * msr)638 uchcom_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr)
639 {
640 struct uchcom_softc *sc = ucom->sc_parent;
641
642 DPRINTF("\n");
643
644 /* XXX Note: sc_lsr is always zero */
645 *lsr = sc->sc_lsr;
646 *msr = sc->sc_msr;
647 }
648
649 static void
uchcom_cfg_set_dtr(struct ucom_softc * ucom,uint8_t onoff)650 uchcom_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff)
651 {
652 struct uchcom_softc *sc = ucom->sc_parent;
653
654 DPRINTF("onoff = %d\n", onoff);
655
656 sc->sc_dtr = onoff;
657 uchcom_set_dtr_rts(sc);
658 }
659
660 static void
uchcom_cfg_set_rts(struct ucom_softc * ucom,uint8_t onoff)661 uchcom_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff)
662 {
663 struct uchcom_softc *sc = ucom->sc_parent;
664
665 DPRINTF("onoff = %d\n", onoff);
666
667 sc->sc_rts = onoff;
668 uchcom_set_dtr_rts(sc);
669 }
670
671 static void
uchcom_cfg_open(struct ucom_softc * ucom)672 uchcom_cfg_open(struct ucom_softc *ucom)
673 {
674 struct uchcom_softc *sc = ucom->sc_parent;
675
676 DPRINTF("\n");
677
678 uchcom_update_version(sc);
679 uchcom_update_status(sc);
680 }
681
682 static int
uchcom_pre_param(struct ucom_softc * ucom,struct termios * t)683 uchcom_pre_param(struct ucom_softc *ucom, struct termios *t)
684 {
685 struct uchcom_divider dv;
686
687 switch (t->c_cflag & CSIZE) {
688 case CS8:
689 break;
690 default:
691 return (EIO);
692 }
693 if ((t->c_cflag & CSTOPB) != 0)
694 return (EIO);
695 if ((t->c_cflag & PARENB) != 0)
696 return (EIO);
697
698 if (uchcom_calc_divider_settings(&dv, t->c_ospeed)) {
699 return (EIO);
700 }
701 return (0); /* success */
702 }
703
704 static void
uchcom_cfg_param(struct ucom_softc * ucom,struct termios * t)705 uchcom_cfg_param(struct ucom_softc *ucom, struct termios *t)
706 {
707 struct uchcom_softc *sc = ucom->sc_parent;
708
709 uchcom_get_version(sc, NULL);
710 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0, 0);
711 uchcom_set_baudrate(sc, t->c_ospeed);
712 if (sc->sc_version < UCHCOM_VER_30) {
713 uchcom_read_reg(sc, UCHCOM_REG_LCR1, NULL,
714 UCHCOM_REG_LCR2, NULL);
715 uchcom_write_reg(sc, UCHCOM_REG_LCR1, 0x50,
716 UCHCOM_REG_LCR2, 0x00);
717 } else {
718 /*
719 * Set up line control:
720 * - enable transmit and receive
721 * - set 8n1 mode
722 * To do: support other sizes, parity, stop bits.
723 */
724 uchcom_write_reg(sc,
725 UCHCOM_REG_LCR1,
726 UCHCOM_LCR1_RX | UCHCOM_LCR1_TX | UCHCOM_LCR1_CS8,
727 UCHCOM_REG_LCR2, 0x00);
728 }
729 uchcom_update_status(sc);
730 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0x501f, 0xd90a);
731 uchcom_set_baudrate(sc, t->c_ospeed);
732 uchcom_set_dtr_rts(sc);
733 uchcom_update_status(sc);
734 }
735
736 static void
uchcom_start_read(struct ucom_softc * ucom)737 uchcom_start_read(struct ucom_softc *ucom)
738 {
739 struct uchcom_softc *sc = ucom->sc_parent;
740
741 /* start interrupt endpoint */
742 usbd_transfer_start(sc->sc_xfer[UCHCOM_INTR_DT_RD]);
743
744 /* start read endpoint */
745 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
746 }
747
748 static void
uchcom_stop_read(struct ucom_softc * ucom)749 uchcom_stop_read(struct ucom_softc *ucom)
750 {
751 struct uchcom_softc *sc = ucom->sc_parent;
752
753 /* stop interrupt endpoint */
754 usbd_transfer_stop(sc->sc_xfer[UCHCOM_INTR_DT_RD]);
755
756 /* stop read endpoint */
757 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_RD]);
758 }
759
760 static void
uchcom_start_write(struct ucom_softc * ucom)761 uchcom_start_write(struct ucom_softc *ucom)
762 {
763 struct uchcom_softc *sc = ucom->sc_parent;
764
765 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
766 }
767
768 static void
uchcom_stop_write(struct ucom_softc * ucom)769 uchcom_stop_write(struct ucom_softc *ucom)
770 {
771 struct uchcom_softc *sc = ucom->sc_parent;
772
773 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_WR]);
774 }
775
776 /* ----------------------------------------------------------------------
777 * callback when the modem status is changed.
778 */
779 static void
uchcom_intr_callback(struct usb_xfer * xfer,usb_error_t error)780 uchcom_intr_callback(struct usb_xfer *xfer, usb_error_t error)
781 {
782 struct uchcom_softc *sc = usbd_xfer_softc(xfer);
783 struct usb_page_cache *pc;
784 uint8_t buf[UCHCOM_INTR_LEAST];
785 int actlen;
786
787 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
788
789 switch (USB_GET_STATE(xfer)) {
790 case USB_ST_TRANSFERRED:
791
792 DPRINTF("actlen = %u\n", actlen);
793
794 if (actlen >= UCHCOM_INTR_LEAST) {
795 pc = usbd_xfer_get_frame(xfer, 0);
796 usbd_copy_out(pc, 0, buf, UCHCOM_INTR_LEAST);
797
798 DPRINTF("data = 0x%02X 0x%02X 0x%02X 0x%02X\n",
799 (unsigned)buf[0], (unsigned)buf[1],
800 (unsigned)buf[2], (unsigned)buf[3]);
801
802 uchcom_convert_status(sc, buf[UCHCOM_INTR_STAT1]);
803 ucom_status_change(&sc->sc_ucom);
804 }
805 case USB_ST_SETUP:
806 tr_setup:
807 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
808 usbd_transfer_submit(xfer);
809 break;
810
811 default: /* Error */
812 if (error != USB_ERR_CANCELLED) {
813 /* try to clear stall first */
814 usbd_xfer_set_stall(xfer);
815 goto tr_setup;
816 }
817 break;
818 }
819 }
820
821 static void
uchcom_write_callback(struct usb_xfer * xfer,usb_error_t error)822 uchcom_write_callback(struct usb_xfer *xfer, usb_error_t error)
823 {
824 struct uchcom_softc *sc = usbd_xfer_softc(xfer);
825 struct usb_page_cache *pc;
826 uint32_t actlen;
827
828 switch (USB_GET_STATE(xfer)) {
829 case USB_ST_SETUP:
830 case USB_ST_TRANSFERRED:
831 tr_setup:
832 pc = usbd_xfer_get_frame(xfer, 0);
833 if (ucom_get_data(&sc->sc_ucom, pc, 0,
834 usbd_xfer_max_len(xfer), &actlen)) {
835 DPRINTF("actlen = %d\n", actlen);
836
837 usbd_xfer_set_frame_len(xfer, 0, actlen);
838 usbd_transfer_submit(xfer);
839 }
840 break;
841
842 default: /* Error */
843 if (error != USB_ERR_CANCELLED) {
844 /* try to clear stall first */
845 usbd_xfer_set_stall(xfer);
846 goto tr_setup;
847 }
848 break;
849 }
850 }
851
852 static void
uchcom_read_callback(struct usb_xfer * xfer,usb_error_t error)853 uchcom_read_callback(struct usb_xfer *xfer, usb_error_t error)
854 {
855 struct uchcom_softc *sc = usbd_xfer_softc(xfer);
856 struct usb_page_cache *pc;
857 int actlen;
858
859 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
860
861 switch (USB_GET_STATE(xfer)) {
862 case USB_ST_TRANSFERRED:
863
864 if (actlen > 0) {
865 pc = usbd_xfer_get_frame(xfer, 0);
866 ucom_put_data(&sc->sc_ucom, pc, 0, actlen);
867 }
868
869 case USB_ST_SETUP:
870 tr_setup:
871 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
872 usbd_transfer_submit(xfer);
873 break;
874
875 default: /* Error */
876 if (error != USB_ERR_CANCELLED) {
877 /* try to clear stall first */
878 usbd_xfer_set_stall(xfer);
879 goto tr_setup;
880 }
881 break;
882 }
883 }
884
885 static void
uchcom_poll(struct ucom_softc * ucom)886 uchcom_poll(struct ucom_softc *ucom)
887 {
888 struct uchcom_softc *sc = ucom->sc_parent;
889 usbd_transfer_poll(sc->sc_xfer, UCHCOM_N_TRANSFER);
890 }
891
892 static device_method_t uchcom_methods[] = {
893 /* Device interface */
894 DEVMETHOD(device_probe, uchcom_probe),
895 DEVMETHOD(device_attach, uchcom_attach),
896 DEVMETHOD(device_detach, uchcom_detach),
897 DEVMETHOD_END
898 };
899
900 static driver_t uchcom_driver = {
901 .name = "uchcom",
902 .methods = uchcom_methods,
903 .size = sizeof(struct uchcom_softc)
904 };
905
906 static devclass_t uchcom_devclass;
907
908 DRIVER_MODULE(uchcom, uhub, uchcom_driver, uchcom_devclass, NULL, 0);
909 MODULE_DEPEND(uchcom, ucom, 1, 1, 1);
910 MODULE_DEPEND(uchcom, usb, 1, 1, 1);
911 MODULE_VERSION(uchcom, 1);
912 USB_PNP_HOST_INFO(uchcom_devs);
913