xref: /freebsd-13.1/sys/dev/mly/mlyvar.h (revision 5ef3520a)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2000, 2001 Michael Smith
5  * Copyright (c) 2000 BSDi
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  *
29  *	$FreeBSD$
30  */
31 
32 /********************************************************************************
33  ********************************************************************************
34                                                      Driver Parameter Definitions
35  ********************************************************************************
36  ********************************************************************************/
37 
38 /*
39  * The firmware interface allows for a 16-bit command identifier.  A lookup
40  * table this size (256k) would be too expensive, so we cap ourselves at a
41  * reasonable limit.
42  */
43 #define MLY_MAX_COMMANDS	256	/* max commands per controller */
44 
45 /*
46  * The firmware interface allows for a 16-bit s/g list length.  We limit
47  * ourselves to a reasonable maximum and ensure alignment.
48  */
49 #define MLY_MAX_SGENTRIES	64	/* max S/G entries, limit 65535 */
50 
51 /*
52  * The interval at which we poke the controller for status updates (in seconds).
53  */
54 #define MLY_PERIODIC_INTERVAL	1
55 
56 /********************************************************************************
57  ********************************************************************************
58                                                       Cross-version Compatibility
59  ********************************************************************************
60  ********************************************************************************/
61 
62 # include <sys/taskqueue.h>
63 
64 /********************************************************************************
65  ********************************************************************************
66                                                       Driver Variable Definitions
67  ********************************************************************************
68  ********************************************************************************/
69 
70 /*
71  * Debugging levels:
72  *  0 - quiet, only emit warnings
73  *  1 - noisy, emit major function points and things done
74  *  2 - extremely noisy, emit trace items in loops, etc.
75  */
76 #ifdef MLY_DEBUG
77 # define debug(level, fmt, args...)	do { if (level <= MLY_DEBUG) printf("%s: " fmt "\n", __func__ , ##args); } while(0)
78 # define debug_called(level)		do { if (level <= MLY_DEBUG) printf("%s: called\n", __func__); } while(0)
79 # define debug_struct(s)		printf("  SIZE %s: %d\n", #s, sizeof(struct s))
80 # define debug_union(s)			printf("  SIZE %s: %d\n", #s, sizeof(union s))
81 # define debug_field(s, f)		printf("  OFFSET %s.%s: %d\n", #s, #f, ((int)&(((struct s *)0)->f)))
82 extern void		mly_printstate0(void);
83 extern struct mly_softc	*mly_softc0;
84 #else
85 # define debug(level, fmt, args...)
86 # define debug_called(level)
87 # define debug_struct(s)
88 #endif
89 
90 #define mly_printf(sc, fmt, args...)	device_printf(sc->mly_dev, fmt , ##args)
91 
92 /*
93  * Per-device structure, used to save persistent state on devices.
94  *
95  * Note that this isn't really Bus/Target/Lun since we don't support
96  * lun != 0 at this time.
97  */
98 struct mly_btl {
99     int			mb_flags;
100 #define MLY_BTL_PHYSICAL	(1<<0)		/* physical device */
101 #define MLY_BTL_LOGICAL		(1<<1)		/* logical device */
102 #define MLY_BTL_PROTECTED	(1<<2)		/* device is protected - I/O not allowed */
103 #define MLY_BTL_RESCAN		(1<<3)		/* device needs to be rescanned */
104     char		mb_name[16];		/* peripheral attached to this device */
105     int			mb_state;		/* see 8.1 */
106     int			mb_type;		/* see 8.2 */
107 
108     /* physical devices only */
109     int			mb_speed;		/* interface transfer rate */
110     int			mb_width;		/* interface width */
111 };
112 
113 /*
114  * Per-command control structure.
115  */
116 struct mly_command {
117     TAILQ_ENTRY(mly_command)	mc_link;	/* list linkage */
118 
119     struct mly_softc		*mc_sc;		/* controller that owns us */
120     u_int16_t			mc_slot;	/* command slot we occupy */
121     int				mc_flags;
122 #define MLY_CMD_BUSY		(1<<0)		/* command is being run, or ready to run, or not completed */
123 #define MLY_CMD_COMPLETE	(1<<1)		/* command has been completed */
124 #define MLY_CMD_MAPPED		(1<<3)		/* command has had its data mapped */
125 #define MLY_CMD_DATAIN		(1<<4)		/* data moves controller->system */
126 #define MLY_CMD_DATAOUT		(1<<5)		/* data moves system->controller */
127 #define MLY_CMD_CCB		(1<<6)		/* data is ccb. */
128     u_int16_t			mc_status;	/* command completion status */
129     u_int8_t			mc_sense;	/* sense data length */
130     int32_t			mc_resid;	/* I/O residual count */
131 
132     union mly_command_packet	*mc_packet;	/* our controller command */
133     u_int64_t			mc_packetphys;	/* physical address of the mapped packet */
134 
135     void			*mc_data;	/* data buffer */
136     size_t			mc_length;	/* data length */
137     bus_dmamap_t		mc_datamap;	/* DMA map for data */
138 
139     void	(* mc_complete)(struct mly_command *mc);	/* completion handler */
140     void	*mc_private;					/* caller-private data */
141 
142     int				mc_timestamp;
143 };
144 
145 /*
146  * Command slot regulation.
147  *
148  * We can't use slot 0 due to the memory mailbox implementation.
149  */
150 #define MLY_SLOT_START		1
151 #define MLY_SLOT_MAX		(MLY_SLOT_START + MLY_MAX_COMMANDS)
152 
153 /*
154  * Per-controller structure.
155  */
156 struct mly_softc {
157     /* bus connections */
158     device_t		mly_dev;
159     struct cdev *mly_dev_t;
160     struct resource	*mly_regs_resource;	/* register interface window */
161     int			mly_regs_rid;		/* resource ID */
162     bus_dma_tag_t	mly_parent_dmat;	/* parent DMA tag */
163     bus_dma_tag_t	mly_buffer_dmat;	/* data buffer/command DMA tag */
164     struct resource	*mly_irq;		/* interrupt */
165     int			mly_irq_rid;
166     void		*mly_intr;		/* interrupt handle */
167 
168     /* scatter/gather lists and their controller-visible mappings */
169     struct mly_sg_entry	*mly_sg_table;		/* s/g lists */
170     u_int32_t		mly_sg_busaddr;		/* s/g table base address in bus space */
171     bus_dma_tag_t	mly_sg_dmat;		/* s/g buffer DMA tag */
172     bus_dmamap_t	mly_sg_dmamap;		/* map for s/g buffers */
173 
174     /* controller hardware interface */
175     int			mly_hwif;
176 #define MLY_HWIF_I960RX		0
177 #define MLY_HWIF_STRONGARM	1
178     u_int8_t		mly_doorbell_true;	/* xor map to make hardware doorbell 'true' bits into 1s */
179     u_int8_t		mly_command_mailbox;	/* register offsets */
180     u_int8_t		mly_status_mailbox;
181     u_int8_t		mly_idbr;
182     u_int8_t		mly_odbr;
183     u_int8_t		mly_error_status;
184     u_int8_t		mly_interrupt_status;
185     u_int8_t		mly_interrupt_mask;
186     struct mly_mmbox	*mly_mmbox;			/* kernel-space address of memory mailbox */
187     u_int64_t		mly_mmbox_busaddr;		/* bus-space address of memory mailbox */
188     bus_dma_tag_t	mly_mmbox_dmat;			/* memory mailbox DMA tag */
189     bus_dmamap_t	mly_mmbox_dmamap;		/* memory mailbox DMA map */
190     u_int32_t		mly_mmbox_command_index;	/* next index to use */
191     u_int32_t		mly_mmbox_status_index;		/* index we next expect status at */
192 
193     /* controller features, limits and status */
194     struct mtx		mly_lock;
195     int			mly_state;
196 #define	MLY_STATE_OPEN		(1<<1)
197 #define MLY_STATE_INTERRUPTS_ON	(1<<2)
198 #define MLY_STATE_MMBOX_ACTIVE	(1<<3)
199 #define MLY_STATE_CAM_FROZEN	(1<<4)
200     struct mly_ioctl_getcontrollerinfo	*mly_controllerinfo;
201     struct mly_param_controller		*mly_controllerparam;
202     struct mly_btl			mly_btl[MLY_MAX_CHANNELS][MLY_MAX_TARGETS];
203 
204     /* command management */
205     struct mly_command		mly_command[MLY_MAX_COMMANDS];	/* commands */
206     union mly_command_packet	*mly_packet;		/* command packets */
207     bus_dma_tag_t		mly_packet_dmat;	/* packet DMA tag */
208     bus_dmamap_t		mly_packetmap;		/* packet DMA map */
209     u_int64_t			mly_packetphys;		/* packet array base address */
210     TAILQ_HEAD(,mly_command)	mly_free;		/* commands available for reuse */
211     TAILQ_HEAD(,mly_command)	mly_busy;
212     TAILQ_HEAD(,mly_command)	mly_complete;		/* commands which have been returned by the controller */
213     struct mly_qstat		mly_qstat[MLYQ_COUNT];	/* queue statistics */
214 
215     /* health monitoring */
216     u_int32_t			mly_event_change;	/* event status change indicator */
217     u_int32_t			mly_event_counter;	/* next event for which we anticpiate status */
218     u_int32_t			mly_event_waiting;	/* next event the controller will post status for */
219     struct callout		mly_periodic;		/* periodic event handling */
220 
221     /* CAM connection */
222     struct cam_devq		*mly_cam_devq;			/* CAM device queue */
223     struct cam_sim		*mly_cam_sim[MLY_MAX_CHANNELS];	/* CAM SIMs */
224     struct cam_path		*mly_cam_path;			/* rescan path */
225     int				mly_cam_channels;		/* total channel count */
226 
227     /* command-completion task */
228     struct task			mly_task_complete;	/* deferred-completion task */
229     int				mly_qfrzn_cnt;		/* Track simq freezes */
230 
231 #ifdef MLY_DEBUG
232     struct callout		mly_timeout;
233 #endif
234 };
235 
236 #define	MLY_LOCK(sc)		mtx_lock(&(sc)->mly_lock)
237 #define	MLY_UNLOCK(sc)		mtx_unlock(&(sc)->mly_lock)
238 #define	MLY_ASSERT_LOCKED(sc)	mtx_assert(&(sc)->mly_lock, MA_OWNED)
239 
240 /*
241  * Register access helpers.
242  */
243 #define MLY_SET_REG(sc, reg, val)	bus_write_1(sc->mly_regs_resource, reg, val)
244 #define MLY_GET_REG(sc, reg)		bus_read_1 (sc->mly_regs_resource, reg)
245 #define MLY_GET_REG2(sc, reg)		bus_read_2 (sc->mly_regs_resource, reg)
246 #define MLY_GET_REG4(sc, reg)		bus_read_4 (sc->mly_regs_resource, reg)
247 
248 #define MLY_SET_MBOX(sc, mbox, ptr)									\
249 	do {												\
250 	    bus_write_4(sc->mly_regs_resource, mbox,      *((u_int32_t *)ptr));		\
251 	    bus_write_4(sc->mly_regs_resource, mbox +  4, *((u_int32_t *)ptr + 1));	\
252 	    bus_write_4(sc->mly_regs_resource, mbox +  8, *((u_int32_t *)ptr + 2));	\
253 	    bus_write_4(sc->mly_regs_resource, mbox + 12, *((u_int32_t *)ptr + 3));	\
254 	} while(0);
255 #define MLY_GET_MBOX(sc, mbox, ptr)									\
256 	do {												\
257 	    *((u_int32_t *)ptr) = bus_read_4(sc->mly_regs_resource, mbox);		\
258 	    *((u_int32_t *)ptr + 1) = bus_read_4(sc->mly_regs_resource, mbox + 4);	\
259 	    *((u_int32_t *)ptr + 2) = bus_read_4(sc->mly_regs_resource, mbox + 8);	\
260 	    *((u_int32_t *)ptr + 3) = bus_read_4(sc->mly_regs_resource, mbox + 12);	\
261 	} while(0);
262 
263 #define MLY_IDBR_TRUE(sc, mask)								\
264 	((((MLY_GET_REG((sc), (sc)->mly_idbr)) ^ (sc)->mly_doorbell_true) & (mask)) == (mask))
265 #define MLY_ODBR_TRUE(sc, mask)								\
266 	((MLY_GET_REG((sc), (sc)->mly_odbr) & (mask)) == (mask))
267 #define MLY_ERROR_VALID(sc)								\
268 	((((MLY_GET_REG((sc), (sc)->mly_error_status)) ^ (sc)->mly_doorbell_true) & (MLY_MSG_EMPTY)) == 0)
269 
270 #define MLY_MASK_INTERRUPTS(sc)								\
271 	do {										\
272 	    MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_DISABLE);	\
273 	    sc->mly_state &= ~MLY_STATE_INTERRUPTS_ON;					\
274 	} while(0);
275 #define MLY_UNMASK_INTERRUPTS(sc)							\
276 	do {										\
277 	    MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_ENABLE);	\
278 	    sc->mly_state |= MLY_STATE_INTERRUPTS_ON;					\
279 	} while(0);
280 
281 /*
282  * Bus/target/logical ID-related macros.
283  */
284 #define MLY_LOGDEV_ID(sc, bus, target)	(((bus) - (sc)->mly_controllerinfo->physical_channels_present) * \
285 					 MLY_MAX_TARGETS + (target))
286 #define MLY_LOGDEV_BUS(sc, logdev)	(((logdev) / MLY_MAX_TARGETS) + \
287 					 (sc)->mly_controllerinfo->physical_channels_present)
288 #define MLY_LOGDEV_TARGET(sc, logdev)	((logdev) % MLY_MAX_TARGETS)
289 #define MLY_BUS_IS_VIRTUAL(sc, bus)	((bus) >= (sc)->mly_controllerinfo->physical_channels_present)
290 #define MLY_BUS_IS_VALID(sc, bus)	(((bus) < (sc)->mly_cam_channels) && ((sc)->mly_cam_sim[(bus)] != NULL))
291 
292 /********************************************************************************
293  * Queue primitives
294  */
295 
296 #define MLYQ_ADD(sc, qname)					\
297 	do {							\
298 	    struct mly_qstat *qs = &(sc)->mly_qstat[qname];	\
299 								\
300 	    qs->q_length++;					\
301 	    if (qs->q_length > qs->q_max)			\
302 		qs->q_max = qs->q_length;			\
303 	} while(0)
304 
305 #define MLYQ_REMOVE(sc, qname)    (sc)->mly_qstat[qname].q_length--
306 #define MLYQ_INIT(sc, qname)			\
307 	do {					\
308 	    sc->mly_qstat[qname].q_length = 0;	\
309 	    sc->mly_qstat[qname].q_max = 0;	\
310 	} while(0)
311 
312 #define MLYQ_COMMAND_QUEUE(name, index)					\
313 static __inline void							\
314 mly_initq_ ## name (struct mly_softc *sc)				\
315 {									\
316     TAILQ_INIT(&sc->mly_ ## name);					\
317     MLYQ_INIT(sc, index);						\
318 }									\
319 static __inline void							\
320 mly_enqueue_ ## name (struct mly_command *mc)				\
321 {									\
322 									\
323     TAILQ_INSERT_TAIL(&mc->mc_sc->mly_ ## name, mc, mc_link);		\
324     MLYQ_ADD(mc->mc_sc, index);						\
325 }									\
326 static __inline void							\
327 mly_requeue_ ## name (struct mly_command *mc)				\
328 {									\
329 									\
330     TAILQ_INSERT_HEAD(&mc->mc_sc->mly_ ## name, mc, mc_link);		\
331     MLYQ_ADD(mc->mc_sc, index);						\
332 }									\
333 static __inline struct mly_command *					\
334 mly_dequeue_ ## name (struct mly_softc *sc)				\
335 {									\
336     struct mly_command	*mc;						\
337 									\
338     if ((mc = TAILQ_FIRST(&sc->mly_ ## name)) != NULL) {		\
339 	TAILQ_REMOVE(&sc->mly_ ## name, mc, mc_link);			\
340 	MLYQ_REMOVE(sc, index);						\
341     }									\
342     return(mc);								\
343 }									\
344 static __inline void							\
345 mly_remove_ ## name (struct mly_command *mc)				\
346 {									\
347 									\
348     TAILQ_REMOVE(&mc->mc_sc->mly_ ## name, mc, mc_link);		\
349     MLYQ_REMOVE(mc->mc_sc, index);					\
350 }									\
351 struct hack
352 
353 MLYQ_COMMAND_QUEUE(free, MLYQ_FREE);
354 MLYQ_COMMAND_QUEUE(busy, MLYQ_BUSY);
355 MLYQ_COMMAND_QUEUE(complete, MLYQ_COMPLETE);
356 
357 /********************************************************************************
358  * space-fill a character string
359  */
360 static __inline void
padstr(char * targ,char * src,int len)361 padstr(char *targ, char *src, int len)
362 {
363     while (len-- > 0) {
364 	if (*src != 0) {
365 	    *targ++ = *src++;
366 	} else {
367 	    *targ++ = ' ';
368 	}
369     }
370 }
371