xref: /freebsd-12.1/sys/mips/include/mips_opcode.h (revision 51369649)
1 /*	$OpenBSD: mips_opcode.h,v 1.2 1999/01/27 04:46:05 imp Exp $	*/
2 
3 /*-
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  * Copyright (c) 1992, 1993
7  *	The Regents of the University of California.  All rights reserved.
8  *
9  * This code is derived from software contributed to Berkeley by
10  * Ralph Campbell.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  * 3. Neither the name of the University nor the names of its contributors
21  *    may be used to endorse or promote products derived from this software
22  *    without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  *
36  *	from: @(#)mips_opcode.h 8.1 (Berkeley) 6/10/93
37  *	JNPR: mips_opcode.h,v 1.1 2006/08/07 05:38:57 katta
38  * $FreeBSD$
39  */
40 
41 #ifndef _MACHINE_MIPS_OPCODE_H_
42 #define	_MACHINE_MIPS_OPCODE_H_
43 
44 /*
45  * Define the instruction formats and opcode values for the
46  * MIPS instruction set.
47  */
48 #include <machine/endian.h>
49 
50 /*
51  * Define the instruction formats.
52  */
53 typedef union {
54 	unsigned word;
55 
56 #if BYTE_ORDER == BIG_ENDIAN
57 	struct {
58 		unsigned op: 6;
59 		unsigned rs: 5;
60 		unsigned rt: 5;
61 		unsigned imm: 16;
62 	} IType;
63 
64 	struct {
65 		unsigned op: 6;
66 		unsigned target: 26;
67 	} JType;
68 
69 	struct {
70 		unsigned op: 6;
71 		unsigned rs: 5;
72 		unsigned rt: 5;
73 		unsigned rd: 5;
74 		unsigned shamt: 5;
75 		unsigned func: 6;
76 	} RType;
77 
78 	struct {
79 		unsigned op: 6;		/* always '0x11' */
80 		unsigned : 1;		/* always '1' */
81 		unsigned fmt: 4;
82 		unsigned ft: 5;
83 		unsigned fs: 5;
84 		unsigned fd: 5;
85 		unsigned func: 6;
86 	} FRType;
87 #endif
88 #if BYTE_ORDER == LITTLE_ENDIAN
89 	struct {
90 		unsigned imm: 16;
91 		unsigned rt: 5;
92 		unsigned rs: 5;
93 		unsigned op: 6;
94 	} IType;
95 
96 	struct {
97 		unsigned target: 26;
98 		unsigned op: 6;
99 	} JType;
100 
101 	struct {
102 		unsigned func: 6;
103 		unsigned shamt: 5;
104 		unsigned rd: 5;
105 		unsigned rt: 5;
106 		unsigned rs: 5;
107 		unsigned op: 6;
108 	} RType;
109 
110 	struct {
111 		unsigned func: 6;
112 		unsigned fd: 5;
113 		unsigned fs: 5;
114 		unsigned ft: 5;
115 		unsigned fmt: 4;
116 		unsigned : 1;		/* always '1' */
117 		unsigned op: 6;		/* always '0x11' */
118 	} FRType;
119 #endif
120 } InstFmt;
121 
122 /* instruction field decoding macros */
123 #define	MIPS_INST_OPCODE(val)	(val >> 26)
124 #define	MIPS_INST_RS(val)	((val & 0x03e00000) >> 21)
125 #define	MIPS_INST_RT(val)	((val & 0x001f0000) >> 16)
126 #define	MIPS_INST_IMM(val)	((val & 0x0000ffff))
127 
128 #define	MIPS_INST_RD(val)	((val & 0x0000f800) >> 11)
129 #define	MIPS_INST_SA(val)	((val & 0x000007c0) >> 6)
130 #define	MIPS_INST_FUNC(val)	(val & 0x0000003f)
131 
132 #define	MIPS_INST_INDEX(val)	(val & 0x03ffffff)
133 
134 /*
135  * the mips opcode and function table use a 3bit row and 3bit col
136  * number we define the following macro for easy transcribing
137  */
138 
139 #define	MIPS_OPCODE(r, c)	(((r & 0x07) << 3) | (c & 0x07))
140 
141 
142 /*
143  * Values for the 'op' field.
144  */
145 #define	OP_SPECIAL	000
146 #define	OP_BCOND	001
147 #define	OP_J		002
148 #define	OP_JAL		003
149 #define	OP_BEQ		004
150 #define	OP_BNE		005
151 #define	OP_BLEZ		006
152 #define	OP_BGTZ		007
153 
154 #define	OP_REGIMM	OP_BCOND
155 
156 #define	OP_ADDI		010
157 #define	OP_ADDIU	011
158 #define	OP_SLTI		012
159 #define	OP_SLTIU	013
160 #define	OP_ANDI		014
161 #define	OP_ORI		015
162 #define	OP_XORI		016
163 #define	OP_LUI		017
164 
165 #define	OP_COP0		020
166 #define	OP_COP1		021
167 #define	OP_COP2		022
168 #define	OP_COP3		023
169 #define	OP_BEQL		024
170 #define	OP_BNEL		025
171 #define	OP_BLEZL	026
172 #define	OP_BGTZL	027
173 
174 #define	OP_COP1X	OP_COP3
175 
176 #define	OP_DADDI	030
177 #define	OP_DADDIU	031
178 #define	OP_LDL		032
179 #define	OP_LDR		033
180 
181 #define OP_SPECIAL2	034
182 #define OP_JALX		035
183 
184 #define OP_SPECIAL3	037
185 
186 #define	OP_LB		040
187 #define	OP_LH		041
188 #define	OP_LWL		042
189 #define	OP_LW		043
190 #define	OP_LBU		044
191 #define	OP_LHU		045
192 #define	OP_LWR		046
193 #define	OP_LWU		047
194 
195 #define	OP_SB		050
196 #define	OP_SH		051
197 #define	OP_SWL		052
198 #define	OP_SW		053
199 #define	OP_SDL		054
200 #define	OP_SDR		055
201 #define	OP_SWR		056
202 #define	OP_CACHE	057
203 
204 #define	OP_LL		060
205 #define	OP_LWC1		061
206 #define	OP_LWC2		062
207 #define	OP_LWC3		063
208 #define	OP_LLD		064
209 #define	OP_LDC1		065
210 #define	OP_LDC2		066
211 #define	OP_LD		067
212 
213 #define	OP_PREF		OP_LWC3
214 
215 #define	OP_SC		070
216 #define	OP_SWC1		071
217 #define	OP_SWC2		072
218 #define	OP_SWC3		073
219 #define	OP_SCD		074
220 #define	OP_SDC1		075
221 #define	OP_SDC2		076
222 #define	OP_SD		077
223 
224 /*
225  * Values for the 'func' field when 'op' == OP_SPECIAL.
226  */
227 #define	OP_SLL		000
228 #define	OP_MOVCI	001
229 #define	OP_SRL		002
230 #define	OP_SRA		003
231 #define	OP_SLLV		004
232 #define	OP_SRLV		006
233 #define	OP_SRAV		007
234 
235 #define	OP_F_SLL	OP_SLL
236 #define	OP_F_MOVCI	OP_MOVCI
237 #define	OP_F_SRL	OP_SRL
238 #define	OP_F_SRA	OP_SRA
239 #define	OP_F_SLLV	OP_SLLV
240 #define	OP_F_SRLV	OP_SRLV
241 #define	OP_F_SRAV	OP_SRAV
242 
243 #define	OP_JR		010
244 #define	OP_JALR		011
245 #define	OP_MOVZ		012
246 #define	OP_MOVN		013
247 #define	OP_SYSCALL	014
248 #define	OP_BREAK	015
249 #define	OP_SYNC		017
250 
251 #define	OP_F_JR		OP_JR
252 #define	OP_F_JALR	OP_JALR
253 #define	OP_F_MOVZ	OP_MOVZ
254 #define	OP_F_MOVN	OP_MOVN
255 #define	OP_F_SYSCALL	OP_SYSCALL
256 #define	OP_F_BREAK	OP_BREAK
257 #define	OP_F_SYNC	OP_SYNC
258 
259 #define	OP_MFHI		020
260 #define	OP_MTHI		021
261 #define	OP_MFLO		022
262 #define	OP_MTLO		023
263 #define	OP_DSLLV	024
264 #define	OP_DSRLV	026
265 #define	OP_DSRAV	027
266 
267 #define	OP_F_MFHI	OP_MFHI
268 #define	OP_F_MTHI	OP_MTHI
269 #define	OP_F_MFLO	OP_MFLO
270 #define	OP_F_MTLO	OP_MTLO
271 #define	OP_F_DSLLV	OP_DSLLV
272 #define	OP_F_DSRLV	OP_DSRLV
273 #define	OP_F_DSRAV	OP_DSRAV
274 
275 #define	OP_MULT		030
276 #define	OP_MULTU	031
277 #define	OP_DIV		032
278 #define	OP_DIVU		033
279 #define	OP_DMULT	034
280 #define	OP_DMULTU	035
281 #define	OP_DDIV		036
282 #define	OP_DDIVU	037
283 
284 #define	OP_F_MULT	OP_MULT
285 #define	OP_F_MULTU	OP_MULTU
286 #define	OP_F_DIV	OP_DIV
287 #define	OP_F_DIVU	OP_DIVU
288 #define	OP_F_DMULT	OP_DMULT
289 #define	OP_F_DMULTU	OP_DMULTU
290 #define	OP_F_DDIV	OP_DDIV
291 #define	OP_F_DDIVU	OP_DDIVU
292 
293 #define	OP_ADD		040
294 #define	OP_ADDU		041
295 #define	OP_SUB		042
296 #define	OP_SUBU		043
297 #define	OP_AND		044
298 #define	OP_OR		045
299 #define	OP_XOR		046
300 #define	OP_NOR		047
301 
302 #define	OP_F_ADD	OP_ADD
303 #define	OP_F_ADDU	OP_ADDU
304 #define	OP_F_SUB	OP_SUB
305 #define	OP_F_SUBU	OP_SUBU
306 #define	OP_F_AND	OP_AND
307 #define	OP_F_OR		OP_OR
308 #define	OP_F_XOR	OP_XOR
309 #define	OP_F_NOR	OP_NOR
310 
311 #define	OP_SLT		052
312 #define	OP_SLTU		053
313 #define	OP_DADD		054
314 #define	OP_DADDU	055
315 #define	OP_DSUB		056
316 #define	OP_DSUBU	057
317 
318 #define	OP_F_SLT	OP_SLT
319 #define	OP_F_SLTU	OP_SLTU
320 #define	OP_F_DADD	OP_DADD
321 #define	OP_F_DADDU	OP_DADDU
322 #define	OP_F_DSUB	OP_DSUB
323 #define	OP_F_DSUBU	OP_DSUBU
324 
325 #define	OP_TGE		060
326 #define	OP_TGEU		061
327 #define	OP_TLT		062
328 #define	OP_TLTU		063
329 #define	OP_TEQ		064
330 #define	OP_TNE		066
331 
332 #define	OP_F_TGE	OP_TGE
333 #define	OP_F_TGEU	OP_TGEU
334 #define	OP_F_TLT	OP_TLT
335 #define	OP_F_TLTU	OP_TLTU
336 #define	OP_F_TEQ	OP_TEQ
337 #define	OP_F_TNE	OP_TNE
338 
339 #define	OP_DSLL		070
340 #define	OP_DSRL		072
341 #define	OP_DSRA		073
342 #define	OP_DSLL32	074
343 #define	OP_DSRL32	076
344 #define	OP_DSRA32	077
345 
346 #define	OP_F_DSLL	OP_DSLL
347 #define	OP_F_DSRL	OP_DSRL
348 #define	OP_F_DSRA	OP_DSRA
349 #define	OP_F_DSLL32	OP_DSLL32
350 #define	OP_F_DSRL32	OP_DSRL32
351 #define	OP_F_DSRA32	OP_DSRA32
352 
353 /*
354  * The REGIMM - register immediate instructions are further
355  * decoded using this table that has 2bit row numbers, hence
356  * a need for a new helper macro.
357  */
358 
359 #define	MIPS_ROP(r, c)	((r & 0x03) << 3) | (c & 0x07)
360 
361 /*
362  * Values for the 'func' field when 'op' == OP_BCOND.
363  */
364 #define	OP_BLTZ		000
365 #define	OP_BGEZ		001
366 #define	OP_BLTZL	002
367 #define	OP_BGEZL	003
368 
369 #define	OP_R_BLTZ	OP_BLTZ
370 #define	OP_R_BGEZ	OP_BGEZ
371 #define	OP_R_BLTZL	OP_BLTZL
372 #define	OP_R_BGEZL	OP_BGEZL
373 
374 #define	OP_TGEI		010
375 #define	OP_TGEIU	011
376 #define	OP_TLTI		012
377 #define	OP_TLTIU	013
378 #define	OP_TEQI		014
379 #define	OP_TNEI		016
380 
381 #define	OP_R_TGEI	OP_TGEI
382 #define	OP_R_TGEIU	OP_TGEIU
383 #define	OP_R_TLTI	OP_TLTI
384 #define	OP_R_TLTIU	OP_TLTIU
385 #define	OP_R_TEQI	OP_TEQI
386 #define	OP_R_TNEI	OP_TNEI
387 
388 #define	OP_BLTZAL	020
389 #define	OP_BGEZAL	021
390 #define	OP_BLTZALL	022
391 #define	OP_BGEZALL	023
392 
393 #define	OP_R_BLTZAL	OP_BLTZAL
394 #define	OP_R_BGEZAL	OP_BGEZAL
395 #define	OP_R_BLTZALL	OP_BLTZALL
396 #define	OP_R_BGEZALL	OP_BGEZALL
397 
398 /*
399  * Values for the 'func' field when 'op' == OP_SPECIAL3.
400  */
401 #define	OP_RDHWR	073
402 
403 /*
404  * Values for the 'rs' field when 'op' == OP_COPz.
405  */
406 #define	OP_MF		000
407 #define	OP_DMF		001
408 #define	OP_MT		004
409 #define	OP_DMT		005
410 #define	OP_BCx		010
411 #define	OP_BCy		014
412 #define	OP_CF		002
413 #define	OP_CT		006
414 
415 /*
416  * Values for the 'rt' field when 'op' == OP_COPz.
417  */
418 #define	COPz_BC_TF_MASK		0x01
419 #define	COPz_BC_TRUE		0x01
420 #define	COPz_BC_FALSE		0x00
421 #define	COPz_BCL_TF_MASK	0x02
422 #define	COPz_BCL_TRUE		0x02
423 #define	COPz_BCL_FALSE		0x00
424 
425 #endif /* !_MACHINE_MIPS_OPCODE_H_ */
426