1 /*-
2 * BSD LICENSE
3 *
4 * Copyright (c) 2015-2017 Amazon.com, Inc. or its affiliates.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 *
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/bus.h>
36 #include <sys/endian.h>
37 #include <sys/kernel.h>
38 #include <sys/kthread.h>
39 #include <sys/malloc.h>
40 #include <sys/mbuf.h>
41 #include <sys/module.h>
42 #include <sys/rman.h>
43 #include <sys/smp.h>
44 #include <sys/socket.h>
45 #include <sys/sockio.h>
46 #include <sys/sysctl.h>
47 #include <sys/taskqueue.h>
48 #include <sys/time.h>
49 #include <sys/eventhandler.h>
50
51 #include <machine/bus.h>
52 #include <machine/resource.h>
53 #include <machine/in_cksum.h>
54
55 #include <net/bpf.h>
56 #include <net/ethernet.h>
57 #include <net/if.h>
58 #include <net/if_var.h>
59 #include <net/if_arp.h>
60 #include <net/if_dl.h>
61 #include <net/if_media.h>
62 #include <net/rss_config.h>
63 #include <net/if_types.h>
64 #include <net/if_vlan_var.h>
65
66 #include <netinet/in_rss.h>
67 #include <netinet/in_systm.h>
68 #include <netinet/in.h>
69 #include <netinet/if_ether.h>
70 #include <netinet/ip.h>
71 #include <netinet/ip6.h>
72 #include <netinet/tcp.h>
73 #include <netinet/udp.h>
74
75 #include <dev/pci/pcivar.h>
76 #include <dev/pci/pcireg.h>
77
78 #include "ena.h"
79 #include "ena_sysctl.h"
80
81 /*********************************************************
82 * Function prototypes
83 *********************************************************/
84 static int ena_probe(device_t);
85 static void ena_intr_msix_mgmnt(void *);
86 static int ena_allocate_pci_resources(struct ena_adapter*);
87 static void ena_free_pci_resources(struct ena_adapter *);
88 static int ena_change_mtu(if_t, int);
89 static inline void ena_alloc_counters(counter_u64_t *, int);
90 static inline void ena_free_counters(counter_u64_t *, int);
91 static inline void ena_reset_counters(counter_u64_t *, int);
92 static void ena_init_io_rings_common(struct ena_adapter *,
93 struct ena_ring *, uint16_t);
94 static void ena_init_io_rings(struct ena_adapter *);
95 static void ena_free_io_ring_resources(struct ena_adapter *, unsigned int);
96 static void ena_free_all_io_rings_resources(struct ena_adapter *);
97 static int ena_setup_tx_dma_tag(struct ena_adapter *);
98 static int ena_free_tx_dma_tag(struct ena_adapter *);
99 static int ena_setup_rx_dma_tag(struct ena_adapter *);
100 static int ena_free_rx_dma_tag(struct ena_adapter *);
101 static int ena_setup_tx_resources(struct ena_adapter *, int);
102 static void ena_free_tx_resources(struct ena_adapter *, int);
103 static int ena_setup_all_tx_resources(struct ena_adapter *);
104 static void ena_free_all_tx_resources(struct ena_adapter *);
105 static inline int validate_rx_req_id(struct ena_ring *, uint16_t);
106 static int ena_setup_rx_resources(struct ena_adapter *, unsigned int);
107 static void ena_free_rx_resources(struct ena_adapter *, unsigned int);
108 static int ena_setup_all_rx_resources(struct ena_adapter *);
109 static void ena_free_all_rx_resources(struct ena_adapter *);
110 static inline int ena_alloc_rx_mbuf(struct ena_adapter *, struct ena_ring *,
111 struct ena_rx_buffer *);
112 static void ena_free_rx_mbuf(struct ena_adapter *, struct ena_ring *,
113 struct ena_rx_buffer *);
114 static int ena_refill_rx_bufs(struct ena_ring *, uint32_t);
115 static void ena_free_rx_bufs(struct ena_adapter *, unsigned int);
116 static void ena_refill_all_rx_bufs(struct ena_adapter *);
117 static void ena_free_all_rx_bufs(struct ena_adapter *);
118 static void ena_free_tx_bufs(struct ena_adapter *, unsigned int);
119 static void ena_free_all_tx_bufs(struct ena_adapter *);
120 static void ena_destroy_all_tx_queues(struct ena_adapter *);
121 static void ena_destroy_all_rx_queues(struct ena_adapter *);
122 static void ena_destroy_all_io_queues(struct ena_adapter *);
123 static int ena_create_io_queues(struct ena_adapter *);
124 static int ena_tx_cleanup(struct ena_ring *);
125 static void ena_deferred_rx_cleanup(void *, int);
126 static int ena_rx_cleanup(struct ena_ring *);
127 static inline int validate_tx_req_id(struct ena_ring *, uint16_t);
128 static void ena_rx_hash_mbuf(struct ena_ring *, struct ena_com_rx_ctx *,
129 struct mbuf *);
130 static struct mbuf* ena_rx_mbuf(struct ena_ring *, struct ena_com_rx_buf_info *,
131 struct ena_com_rx_ctx *, uint16_t *);
132 static inline void ena_rx_checksum(struct ena_ring *, struct ena_com_rx_ctx *,
133 struct mbuf *);
134 static void ena_handle_msix(void *);
135 static int ena_enable_msix(struct ena_adapter *);
136 static void ena_setup_mgmnt_intr(struct ena_adapter *);
137 static void ena_setup_io_intr(struct ena_adapter *);
138 static int ena_request_mgmnt_irq(struct ena_adapter *);
139 static int ena_request_io_irq(struct ena_adapter *);
140 static void ena_free_mgmnt_irq(struct ena_adapter *);
141 static void ena_free_io_irq(struct ena_adapter *);
142 static void ena_free_irqs(struct ena_adapter*);
143 static void ena_disable_msix(struct ena_adapter *);
144 static void ena_unmask_all_io_irqs(struct ena_adapter *);
145 static int ena_rss_configure(struct ena_adapter *);
146 static int ena_up_complete(struct ena_adapter *);
147 static int ena_up(struct ena_adapter *);
148 static void ena_down(struct ena_adapter *);
149 static uint64_t ena_get_counter(if_t, ift_counter);
150 static int ena_media_change(if_t);
151 static void ena_media_status(if_t, struct ifmediareq *);
152 static void ena_init(void *);
153 static int ena_ioctl(if_t, u_long, caddr_t);
154 static int ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *);
155 static void ena_update_host_info(struct ena_admin_host_info *, if_t);
156 static void ena_update_hwassist(struct ena_adapter *);
157 static int ena_setup_ifnet(device_t, struct ena_adapter *,
158 struct ena_com_dev_get_features_ctx *);
159 static void ena_tx_csum(struct ena_com_tx_ctx *, struct mbuf *);
160 static int ena_check_and_collapse_mbuf(struct ena_ring *tx_ring,
161 struct mbuf **mbuf);
162 static int ena_xmit_mbuf(struct ena_ring *, struct mbuf **);
163 static void ena_start_xmit(struct ena_ring *);
164 static int ena_mq_start(if_t, struct mbuf *);
165 static void ena_deferred_mq_start(void *, int);
166 static void ena_qflush(if_t);
167 static int ena_calc_io_queue_num(struct ena_adapter *,
168 struct ena_com_dev_get_features_ctx *);
169 static int ena_calc_queue_size(struct ena_adapter *, uint16_t *,
170 uint16_t *, struct ena_com_dev_get_features_ctx *);
171 static int ena_rss_init_default(struct ena_adapter *);
172 static void ena_rss_init_default_deferred(void *);
173 static void ena_config_host_info(struct ena_com_dev *);
174 static int ena_attach(device_t);
175 static int ena_detach(device_t);
176 static int ena_device_init(struct ena_adapter *, device_t,
177 struct ena_com_dev_get_features_ctx *, int *);
178 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *,
179 int);
180 static void ena_update_on_link_change(void *, struct ena_admin_aenq_entry *);
181 static void unimplemented_aenq_handler(void *,
182 struct ena_admin_aenq_entry *);
183 static void ena_timer_service(void *);
184
185 static char ena_version[] = DEVICE_NAME DRV_MODULE_NAME " v" DRV_MODULE_VERSION;
186
187 static SYSCTL_NODE(_hw, OID_AUTO, ena, CTLFLAG_RD, 0, "ENA driver parameters");
188
189 /*
190 * Tuneable number of buffers in the buf-ring (drbr)
191 */
192 static int ena_buf_ring_size = 4096;
193 SYSCTL_INT(_hw_ena, OID_AUTO, buf_ring_size, CTLFLAG_RWTUN,
194 &ena_buf_ring_size, 0, "Size of the bufring");
195
196 /*
197 * Logging level for changing verbosity of the output
198 */
199 int ena_log_level = ENA_ALERT | ENA_WARNING;
200 SYSCTL_INT(_hw_ena, OID_AUTO, log_level, CTLFLAG_RWTUN,
201 &ena_log_level, 0, "Logging level indicating verbosity of the logs");
202
203 /*
204 * Use 9k mbufs for the Rx buffers. Default to 0 (use page size mbufs instead).
205 * Using 9k mbufs in low memory conditions might cause allocation to take a lot
206 * of time and lead to the OS instability as it needs to look for the contiguous
207 * pages.
208 * However, page size mbufs has a bit smaller throughput than 9k mbufs, so if
209 * the network performance is the priority, the 9k mbufs can be used.
210 */
211 int ena_enable_9k_mbufs = 0;
212 SYSCTL_INT(_hw_ena, OID_AUTO, enable_9k_mbufs, CTLFLAG_RDTUN,
213 &ena_enable_9k_mbufs, 0, "Use 9 kB mbufs for Rx descriptors");
214 #define ena_mbuf_sz (ena_enable_9k_mbufs ? MJUM9BYTES : MJUMPAGESIZE)
215
216 static ena_vendor_info_t ena_vendor_info_array[] = {
217 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_PF, 0},
218 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_LLQ_PF, 0},
219 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_VF, 0},
220 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_LLQ_VF, 0},
221 /* Last entry */
222 { 0, 0, 0 }
223 };
224
225 /*
226 * Contains pointers to event handlers, e.g. link state chage.
227 */
228 static struct ena_aenq_handlers aenq_handlers;
229
230 void
ena_dmamap_callback(void * arg,bus_dma_segment_t * segs,int nseg,int error)231 ena_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nseg, int error)
232 {
233 if (error != 0)
234 return;
235 *(bus_addr_t *) arg = segs[0].ds_addr;
236 }
237
238 int
ena_dma_alloc(device_t dmadev,bus_size_t size,ena_mem_handle_t * dma,int mapflags)239 ena_dma_alloc(device_t dmadev, bus_size_t size,
240 ena_mem_handle_t *dma , int mapflags)
241 {
242 struct ena_adapter* adapter = device_get_softc(dmadev);
243 uint32_t maxsize;
244 uint64_t dma_space_addr;
245 int error;
246
247 maxsize = ((size - 1) / PAGE_SIZE + 1) * PAGE_SIZE;
248
249 dma_space_addr = ENA_DMA_BIT_MASK(adapter->dma_width);
250 if (unlikely(dma_space_addr == 0))
251 dma_space_addr = BUS_SPACE_MAXADDR;
252
253 error = bus_dma_tag_create(bus_get_dma_tag(dmadev), /* parent */
254 8, 0, /* alignment, bounds */
255 dma_space_addr, /* lowaddr of exclusion window */
256 BUS_SPACE_MAXADDR,/* highaddr of exclusion window */
257 NULL, NULL, /* filter, filterarg */
258 maxsize, /* maxsize */
259 1, /* nsegments */
260 maxsize, /* maxsegsize */
261 BUS_DMA_ALLOCNOW, /* flags */
262 NULL, /* lockfunc */
263 NULL, /* lockarg */
264 &dma->tag);
265 if (unlikely(error != 0)) {
266 ena_trace(ENA_ALERT, "bus_dma_tag_create failed: %d\n", error);
267 goto fail_tag;
268 }
269
270 error = bus_dmamem_alloc(dma->tag, (void**) &dma->vaddr,
271 BUS_DMA_COHERENT | BUS_DMA_ZERO, &dma->map);
272 if (unlikely(error != 0)) {
273 ena_trace(ENA_ALERT, "bus_dmamem_alloc(%ju) failed: %d\n",
274 (uintmax_t)size, error);
275 goto fail_map_create;
276 }
277
278 dma->paddr = 0;
279 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr,
280 size, ena_dmamap_callback, &dma->paddr, mapflags);
281 if (unlikely((error != 0) || (dma->paddr == 0))) {
282 ena_trace(ENA_ALERT, ": bus_dmamap_load failed: %d\n", error);
283 goto fail_map_load;
284 }
285
286 return (0);
287
288 fail_map_load:
289 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
290 fail_map_create:
291 bus_dma_tag_destroy(dma->tag);
292 fail_tag:
293 dma->tag = NULL;
294
295 return (error);
296 }
297
298 static int
ena_allocate_pci_resources(struct ena_adapter * adapter)299 ena_allocate_pci_resources(struct ena_adapter* adapter)
300 {
301 device_t pdev = adapter->pdev;
302 int rid;
303
304 rid = PCIR_BAR(ENA_REG_BAR);
305 adapter->memory = NULL;
306 adapter->registers = bus_alloc_resource_any(pdev, SYS_RES_MEMORY,
307 &rid, RF_ACTIVE);
308 if (unlikely(adapter->registers == NULL)) {
309 device_printf(pdev, "Unable to allocate bus resource: "
310 "registers\n");
311 return (ENXIO);
312 }
313
314 return (0);
315 }
316
317 static void
ena_free_pci_resources(struct ena_adapter * adapter)318 ena_free_pci_resources(struct ena_adapter *adapter)
319 {
320 device_t pdev = adapter->pdev;
321
322 if (adapter->memory != NULL) {
323 bus_release_resource(pdev, SYS_RES_MEMORY,
324 PCIR_BAR(ENA_MEM_BAR), adapter->memory);
325 }
326
327 if (adapter->registers != NULL) {
328 bus_release_resource(pdev, SYS_RES_MEMORY,
329 PCIR_BAR(ENA_REG_BAR), adapter->registers);
330 }
331 }
332
333 static int
ena_probe(device_t dev)334 ena_probe(device_t dev)
335 {
336 ena_vendor_info_t *ent;
337 char adapter_name[60];
338 uint16_t pci_vendor_id = 0;
339 uint16_t pci_device_id = 0;
340
341 pci_vendor_id = pci_get_vendor(dev);
342 pci_device_id = pci_get_device(dev);
343
344 ent = ena_vendor_info_array;
345 while (ent->vendor_id != 0) {
346 if ((pci_vendor_id == ent->vendor_id) &&
347 (pci_device_id == ent->device_id)) {
348 ena_trace(ENA_DBG, "vendor=%x device=%x ",
349 pci_vendor_id, pci_device_id);
350
351 sprintf(adapter_name, DEVICE_DESC);
352 device_set_desc_copy(dev, adapter_name);
353 return (BUS_PROBE_DEFAULT);
354 }
355
356 ent++;
357
358 }
359
360 return (ENXIO);
361 }
362
363 static int
ena_change_mtu(if_t ifp,int new_mtu)364 ena_change_mtu(if_t ifp, int new_mtu)
365 {
366 struct ena_adapter *adapter = if_getsoftc(ifp);
367 int rc;
368
369 if ((new_mtu > adapter->max_mtu) || (new_mtu < ENA_MIN_MTU)) {
370 device_printf(adapter->pdev, "Invalid MTU setting. "
371 "new_mtu: %d max mtu: %d min mtu: %d\n",
372 new_mtu, adapter->max_mtu, ENA_MIN_MTU);
373 return (EINVAL);
374 }
375
376 rc = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
377 if (likely(rc == 0)) {
378 ena_trace(ENA_DBG, "set MTU to %d\n", new_mtu);
379 if_setmtu(ifp, new_mtu);
380 } else {
381 device_printf(adapter->pdev, "Failed to set MTU to %d\n",
382 new_mtu);
383 }
384
385 return (rc);
386 }
387
388 static inline void
ena_alloc_counters(counter_u64_t * begin,int size)389 ena_alloc_counters(counter_u64_t *begin, int size)
390 {
391 counter_u64_t *end = (counter_u64_t *)((char *)begin + size);
392
393 for (; begin < end; ++begin)
394 *begin = counter_u64_alloc(M_WAITOK);
395 }
396
397 static inline void
ena_free_counters(counter_u64_t * begin,int size)398 ena_free_counters(counter_u64_t *begin, int size)
399 {
400 counter_u64_t *end = (counter_u64_t *)((char *)begin + size);
401
402 for (; begin < end; ++begin)
403 counter_u64_free(*begin);
404 }
405
406 static inline void
ena_reset_counters(counter_u64_t * begin,int size)407 ena_reset_counters(counter_u64_t *begin, int size)
408 {
409 counter_u64_t *end = (counter_u64_t *)((char *)begin + size);
410
411 for (; begin < end; ++begin)
412 counter_u64_zero(*begin);
413 }
414
415 static void
ena_init_io_rings_common(struct ena_adapter * adapter,struct ena_ring * ring,uint16_t qid)416 ena_init_io_rings_common(struct ena_adapter *adapter, struct ena_ring *ring,
417 uint16_t qid)
418 {
419
420 ring->qid = qid;
421 ring->adapter = adapter;
422 ring->ena_dev = adapter->ena_dev;
423 }
424
425 static void
ena_init_io_rings(struct ena_adapter * adapter)426 ena_init_io_rings(struct ena_adapter *adapter)
427 {
428 struct ena_com_dev *ena_dev;
429 struct ena_ring *txr, *rxr;
430 struct ena_que *que;
431 int i;
432
433 ena_dev = adapter->ena_dev;
434
435 for (i = 0; i < adapter->num_queues; i++) {
436 txr = &adapter->tx_ring[i];
437 rxr = &adapter->rx_ring[i];
438
439 /* TX/RX common ring state */
440 ena_init_io_rings_common(adapter, txr, i);
441 ena_init_io_rings_common(adapter, rxr, i);
442
443 /* TX specific ring state */
444 txr->ring_size = adapter->tx_ring_size;
445 txr->tx_max_header_size = ena_dev->tx_max_header_size;
446 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
447 txr->smoothed_interval =
448 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
449
450 /* Allocate a buf ring */
451 txr->br = buf_ring_alloc(ena_buf_ring_size, M_DEVBUF,
452 M_WAITOK, &txr->ring_mtx);
453
454 /* Alloc TX statistics. */
455 ena_alloc_counters((counter_u64_t *)&txr->tx_stats,
456 sizeof(txr->tx_stats));
457
458 /* RX specific ring state */
459 rxr->ring_size = adapter->rx_ring_size;
460 rxr->smoothed_interval =
461 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
462
463 /* Alloc RX statistics. */
464 ena_alloc_counters((counter_u64_t *)&rxr->rx_stats,
465 sizeof(rxr->rx_stats));
466
467 /* Initialize locks */
468 snprintf(txr->mtx_name, nitems(txr->mtx_name), "%s:tx(%d)",
469 device_get_nameunit(adapter->pdev), i);
470 snprintf(rxr->mtx_name, nitems(rxr->mtx_name), "%s:rx(%d)",
471 device_get_nameunit(adapter->pdev), i);
472
473 mtx_init(&txr->ring_mtx, txr->mtx_name, NULL, MTX_DEF);
474 mtx_init(&rxr->ring_mtx, rxr->mtx_name, NULL, MTX_DEF);
475
476 que = &adapter->que[i];
477 que->adapter = adapter;
478 que->id = i;
479 que->tx_ring = txr;
480 que->rx_ring = rxr;
481
482 txr->que = que;
483 rxr->que = que;
484
485 rxr->empty_rx_queue = 0;
486 rxr->rx_mbuf_sz = ena_mbuf_sz;
487 }
488 }
489
490 static void
ena_free_io_ring_resources(struct ena_adapter * adapter,unsigned int qid)491 ena_free_io_ring_resources(struct ena_adapter *adapter, unsigned int qid)
492 {
493 struct ena_ring *txr = &adapter->tx_ring[qid];
494 struct ena_ring *rxr = &adapter->rx_ring[qid];
495
496 ena_free_counters((counter_u64_t *)&txr->tx_stats,
497 sizeof(txr->tx_stats));
498 ena_free_counters((counter_u64_t *)&rxr->rx_stats,
499 sizeof(rxr->rx_stats));
500
501 ENA_RING_MTX_LOCK(txr);
502 drbr_free(txr->br, M_DEVBUF);
503 ENA_RING_MTX_UNLOCK(txr);
504
505 mtx_destroy(&txr->ring_mtx);
506 mtx_destroy(&rxr->ring_mtx);
507 }
508
509 static void
ena_free_all_io_rings_resources(struct ena_adapter * adapter)510 ena_free_all_io_rings_resources(struct ena_adapter *adapter)
511 {
512 int i;
513
514 for (i = 0; i < adapter->num_queues; i++)
515 ena_free_io_ring_resources(adapter, i);
516
517 }
518
519 static int
ena_setup_tx_dma_tag(struct ena_adapter * adapter)520 ena_setup_tx_dma_tag(struct ena_adapter *adapter)
521 {
522 int ret;
523
524 /* Create DMA tag for Tx buffers */
525 ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev),
526 1, 0, /* alignment, bounds */
527 ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window */
528 BUS_SPACE_MAXADDR, /* highaddr of excl window */
529 NULL, NULL, /* filter, filterarg */
530 ENA_TSO_MAXSIZE, /* maxsize */
531 adapter->max_tx_sgl_size - 1, /* nsegments */
532 ENA_TSO_MAXSIZE, /* maxsegsize */
533 0, /* flags */
534 NULL, /* lockfunc */
535 NULL, /* lockfuncarg */
536 &adapter->tx_buf_tag);
537
538 return (ret);
539 }
540
541 static int
ena_free_tx_dma_tag(struct ena_adapter * adapter)542 ena_free_tx_dma_tag(struct ena_adapter *adapter)
543 {
544 int ret;
545
546 ret = bus_dma_tag_destroy(adapter->tx_buf_tag);
547
548 if (likely(ret == 0))
549 adapter->tx_buf_tag = NULL;
550
551 return (ret);
552 }
553
554 static int
ena_setup_rx_dma_tag(struct ena_adapter * adapter)555 ena_setup_rx_dma_tag(struct ena_adapter *adapter)
556 {
557 int ret;
558
559 /* Create DMA tag for Rx buffers*/
560 ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev), /* parent */
561 1, 0, /* alignment, bounds */
562 ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window */
563 BUS_SPACE_MAXADDR, /* highaddr of excl window */
564 NULL, NULL, /* filter, filterarg */
565 ena_mbuf_sz, /* maxsize */
566 adapter->max_rx_sgl_size, /* nsegments */
567 ena_mbuf_sz, /* maxsegsize */
568 0, /* flags */
569 NULL, /* lockfunc */
570 NULL, /* lockarg */
571 &adapter->rx_buf_tag);
572
573 return (ret);
574 }
575
576 static int
ena_free_rx_dma_tag(struct ena_adapter * adapter)577 ena_free_rx_dma_tag(struct ena_adapter *adapter)
578 {
579 int ret;
580
581 ret = bus_dma_tag_destroy(adapter->rx_buf_tag);
582
583 if (likely(ret == 0))
584 adapter->rx_buf_tag = NULL;
585
586 return (ret);
587 }
588
589 /**
590 * ena_setup_tx_resources - allocate Tx resources (Descriptors)
591 * @adapter: network interface device structure
592 * @qid: queue index
593 *
594 * Returns 0 on success, otherwise on failure.
595 **/
596 static int
ena_setup_tx_resources(struct ena_adapter * adapter,int qid)597 ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
598 {
599 struct ena_que *que = &adapter->que[qid];
600 struct ena_ring *tx_ring = que->tx_ring;
601 int size, i, err;
602 #ifdef RSS
603 cpuset_t cpu_mask;
604 #endif
605
606 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
607
608 tx_ring->tx_buffer_info = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
609 if (unlikely(tx_ring->tx_buffer_info == NULL))
610 return (ENOMEM);
611
612 size = sizeof(uint16_t) * tx_ring->ring_size;
613 tx_ring->free_tx_ids = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
614 if (unlikely(tx_ring->free_tx_ids == NULL))
615 goto err_buf_info_free;
616
617 /* Req id stack for TX OOO completions */
618 for (i = 0; i < tx_ring->ring_size; i++)
619 tx_ring->free_tx_ids[i] = i;
620
621 /* Reset TX statistics. */
622 ena_reset_counters((counter_u64_t *)&tx_ring->tx_stats,
623 sizeof(tx_ring->tx_stats));
624
625 tx_ring->next_to_use = 0;
626 tx_ring->next_to_clean = 0;
627
628 /* Make sure that drbr is empty */
629 ENA_RING_MTX_LOCK(tx_ring);
630 drbr_flush(adapter->ifp, tx_ring->br);
631 ENA_RING_MTX_UNLOCK(tx_ring);
632
633 /* ... and create the buffer DMA maps */
634 for (i = 0; i < tx_ring->ring_size; i++) {
635 err = bus_dmamap_create(adapter->tx_buf_tag, 0,
636 &tx_ring->tx_buffer_info[i].map);
637 if (unlikely(err != 0)) {
638 ena_trace(ENA_ALERT,
639 "Unable to create Tx DMA map for buffer %d\n", i);
640 goto err_buf_info_unmap;
641 }
642 }
643
644 /* Allocate taskqueues */
645 TASK_INIT(&tx_ring->enqueue_task, 0, ena_deferred_mq_start, tx_ring);
646 tx_ring->enqueue_tq = taskqueue_create_fast("ena_tx_enque", M_NOWAIT,
647 taskqueue_thread_enqueue, &tx_ring->enqueue_tq);
648 if (unlikely(tx_ring->enqueue_tq == NULL)) {
649 ena_trace(ENA_ALERT,
650 "Unable to create taskqueue for enqueue task\n");
651 i = tx_ring->ring_size;
652 goto err_buf_info_unmap;
653 }
654
655 /* RSS set cpu for thread */
656 #ifdef RSS
657 CPU_SETOF(que->cpu, &cpu_mask);
658 taskqueue_start_threads_cpuset(&tx_ring->enqueue_tq, 1, PI_NET,
659 &cpu_mask, "%s tx_ring enq (bucket %d)",
660 device_get_nameunit(adapter->pdev), que->cpu);
661 #else /* RSS */
662 taskqueue_start_threads(&tx_ring->enqueue_tq, 1, PI_NET,
663 "%s txeq %d", device_get_nameunit(adapter->pdev), que->cpu);
664 #endif /* RSS */
665
666 return (0);
667
668 err_buf_info_unmap:
669 while (i--) {
670 bus_dmamap_destroy(adapter->tx_buf_tag,
671 tx_ring->tx_buffer_info[i].map);
672 }
673 free(tx_ring->free_tx_ids, M_DEVBUF);
674 tx_ring->free_tx_ids = NULL;
675 err_buf_info_free:
676 free(tx_ring->tx_buffer_info, M_DEVBUF);
677 tx_ring->tx_buffer_info = NULL;
678
679 return (ENOMEM);
680 }
681
682 /**
683 * ena_free_tx_resources - Free Tx Resources per Queue
684 * @adapter: network interface device structure
685 * @qid: queue index
686 *
687 * Free all transmit software resources
688 **/
689 static void
ena_free_tx_resources(struct ena_adapter * adapter,int qid)690 ena_free_tx_resources(struct ena_adapter *adapter, int qid)
691 {
692 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
693
694 while (taskqueue_cancel(tx_ring->enqueue_tq, &tx_ring->enqueue_task,
695 NULL))
696 taskqueue_drain(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
697
698 taskqueue_free(tx_ring->enqueue_tq);
699
700 ENA_RING_MTX_LOCK(tx_ring);
701 /* Flush buffer ring, */
702 drbr_flush(adapter->ifp, tx_ring->br);
703
704 /* Free buffer DMA maps, */
705 for (int i = 0; i < tx_ring->ring_size; i++) {
706 m_freem(tx_ring->tx_buffer_info[i].mbuf);
707 tx_ring->tx_buffer_info[i].mbuf = NULL;
708 bus_dmamap_unload(adapter->tx_buf_tag,
709 tx_ring->tx_buffer_info[i].map);
710 bus_dmamap_destroy(adapter->tx_buf_tag,
711 tx_ring->tx_buffer_info[i].map);
712 }
713 ENA_RING_MTX_UNLOCK(tx_ring);
714
715 /* And free allocated memory. */
716 free(tx_ring->tx_buffer_info, M_DEVBUF);
717 tx_ring->tx_buffer_info = NULL;
718
719 free(tx_ring->free_tx_ids, M_DEVBUF);
720 tx_ring->free_tx_ids = NULL;
721 }
722
723 /**
724 * ena_setup_all_tx_resources - allocate all queues Tx resources
725 * @adapter: network interface device structure
726 *
727 * Returns 0 on success, otherwise on failure.
728 **/
729 static int
ena_setup_all_tx_resources(struct ena_adapter * adapter)730 ena_setup_all_tx_resources(struct ena_adapter *adapter)
731 {
732 int i, rc;
733
734 for (i = 0; i < adapter->num_queues; i++) {
735 rc = ena_setup_tx_resources(adapter, i);
736 if (rc != 0) {
737 device_printf(adapter->pdev,
738 "Allocation for Tx Queue %u failed\n", i);
739 goto err_setup_tx;
740 }
741 }
742
743 return (0);
744
745 err_setup_tx:
746 /* Rewind the index freeing the rings as we go */
747 while (i--)
748 ena_free_tx_resources(adapter, i);
749 return (rc);
750 }
751
752 /**
753 * ena_free_all_tx_resources - Free Tx Resources for All Queues
754 * @adapter: network interface device structure
755 *
756 * Free all transmit software resources
757 **/
758 static void
ena_free_all_tx_resources(struct ena_adapter * adapter)759 ena_free_all_tx_resources(struct ena_adapter *adapter)
760 {
761 int i;
762
763 for (i = 0; i < adapter->num_queues; i++)
764 ena_free_tx_resources(adapter, i);
765 }
766
767 static inline int
validate_rx_req_id(struct ena_ring * rx_ring,uint16_t req_id)768 validate_rx_req_id(struct ena_ring *rx_ring, uint16_t req_id)
769 {
770 if (likely(req_id < rx_ring->ring_size))
771 return (0);
772
773 device_printf(rx_ring->adapter->pdev, "Invalid rx req_id: %hu\n",
774 req_id);
775 counter_u64_add(rx_ring->rx_stats.bad_req_id, 1);
776
777 /* Trigger device reset */
778 rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
779 rx_ring->adapter->trigger_reset = true;
780
781 return (EFAULT);
782 }
783
784 /**
785 * ena_setup_rx_resources - allocate Rx resources (Descriptors)
786 * @adapter: network interface device structure
787 * @qid: queue index
788 *
789 * Returns 0 on success, otherwise on failure.
790 **/
791 static int
ena_setup_rx_resources(struct ena_adapter * adapter,unsigned int qid)792 ena_setup_rx_resources(struct ena_adapter *adapter, unsigned int qid)
793 {
794 struct ena_que *que = &adapter->que[qid];
795 struct ena_ring *rx_ring = que->rx_ring;
796 int size, err, i;
797 #ifdef RSS
798 cpuset_t cpu_mask;
799 #endif
800
801 size = sizeof(struct ena_rx_buffer) * rx_ring->ring_size;
802
803 /*
804 * Alloc extra element so in rx path
805 * we can always prefetch rx_info + 1
806 */
807 size += sizeof(struct ena_rx_buffer);
808
809 rx_ring->rx_buffer_info = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
810
811 size = sizeof(uint16_t) * rx_ring->ring_size;
812 rx_ring->free_rx_ids = malloc(size, M_DEVBUF, M_WAITOK);
813
814 for (i = 0; i < rx_ring->ring_size; i++)
815 rx_ring->free_rx_ids[i] = i;
816
817 /* Reset RX statistics. */
818 ena_reset_counters((counter_u64_t *)&rx_ring->rx_stats,
819 sizeof(rx_ring->rx_stats));
820
821 rx_ring->next_to_clean = 0;
822 rx_ring->next_to_use = 0;
823
824 /* ... and create the buffer DMA maps */
825 for (i = 0; i < rx_ring->ring_size; i++) {
826 err = bus_dmamap_create(adapter->rx_buf_tag, 0,
827 &(rx_ring->rx_buffer_info[i].map));
828 if (err != 0) {
829 ena_trace(ENA_ALERT,
830 "Unable to create Rx DMA map for buffer %d\n", i);
831 goto err_buf_info_unmap;
832 }
833 }
834
835 /* Create LRO for the ring */
836 if ((adapter->ifp->if_capenable & IFCAP_LRO) != 0) {
837 int err = tcp_lro_init(&rx_ring->lro);
838 if (err != 0) {
839 device_printf(adapter->pdev,
840 "LRO[%d] Initialization failed!\n", qid);
841 } else {
842 ena_trace(ENA_INFO,
843 "RX Soft LRO[%d] Initialized\n", qid);
844 rx_ring->lro.ifp = adapter->ifp;
845 }
846 }
847
848 /* Allocate taskqueues */
849 TASK_INIT(&rx_ring->cmpl_task, 0, ena_deferred_rx_cleanup, rx_ring);
850 rx_ring->cmpl_tq = taskqueue_create_fast("ena RX completion", M_WAITOK,
851 taskqueue_thread_enqueue, &rx_ring->cmpl_tq);
852
853 /* RSS set cpu for thread */
854 #ifdef RSS
855 CPU_SETOF(que->cpu, &cpu_mask);
856 taskqueue_start_threads_cpuset(&rx_ring->cmpl_tq, 1, PI_NET, &cpu_mask,
857 "%s rx_ring cmpl (bucket %d)",
858 device_get_nameunit(adapter->pdev), que->cpu);
859 #else
860 taskqueue_start_threads(&rx_ring->cmpl_tq, 1, PI_NET,
861 "%s rx_ring cmpl %d", device_get_nameunit(adapter->pdev), que->cpu);
862 #endif
863
864 return (0);
865
866 err_buf_info_unmap:
867 while (i--) {
868 bus_dmamap_destroy(adapter->rx_buf_tag,
869 rx_ring->rx_buffer_info[i].map);
870 }
871
872 free(rx_ring->free_rx_ids, M_DEVBUF);
873 rx_ring->free_rx_ids = NULL;
874 free(rx_ring->rx_buffer_info, M_DEVBUF);
875 rx_ring->rx_buffer_info = NULL;
876 return (ENOMEM);
877 }
878
879 /**
880 * ena_free_rx_resources - Free Rx Resources
881 * @adapter: network interface device structure
882 * @qid: queue index
883 *
884 * Free all receive software resources
885 **/
886 static void
ena_free_rx_resources(struct ena_adapter * adapter,unsigned int qid)887 ena_free_rx_resources(struct ena_adapter *adapter, unsigned int qid)
888 {
889 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
890
891 while (taskqueue_cancel(rx_ring->cmpl_tq, &rx_ring->cmpl_task, NULL) != 0)
892 taskqueue_drain(rx_ring->cmpl_tq, &rx_ring->cmpl_task);
893
894 taskqueue_free(rx_ring->cmpl_tq);
895
896 /* Free buffer DMA maps, */
897 for (int i = 0; i < rx_ring->ring_size; i++) {
898 m_freem(rx_ring->rx_buffer_info[i].mbuf);
899 rx_ring->rx_buffer_info[i].mbuf = NULL;
900 bus_dmamap_unload(adapter->rx_buf_tag,
901 rx_ring->rx_buffer_info[i].map);
902 bus_dmamap_destroy(adapter->rx_buf_tag,
903 rx_ring->rx_buffer_info[i].map);
904 }
905
906 /* free LRO resources, */
907 tcp_lro_free(&rx_ring->lro);
908
909 /* free allocated memory */
910 free(rx_ring->rx_buffer_info, M_DEVBUF);
911 rx_ring->rx_buffer_info = NULL;
912
913 free(rx_ring->free_rx_ids, M_DEVBUF);
914 rx_ring->free_rx_ids = NULL;
915 }
916
917 /**
918 * ena_setup_all_rx_resources - allocate all queues Rx resources
919 * @adapter: network interface device structure
920 *
921 * Returns 0 on success, otherwise on failure.
922 **/
923 static int
ena_setup_all_rx_resources(struct ena_adapter * adapter)924 ena_setup_all_rx_resources(struct ena_adapter *adapter)
925 {
926 int i, rc = 0;
927
928 for (i = 0; i < adapter->num_queues; i++) {
929 rc = ena_setup_rx_resources(adapter, i);
930 if (rc != 0) {
931 device_printf(adapter->pdev,
932 "Allocation for Rx Queue %u failed\n", i);
933 goto err_setup_rx;
934 }
935 }
936 return (0);
937
938 err_setup_rx:
939 /* rewind the index freeing the rings as we go */
940 while (i--)
941 ena_free_rx_resources(adapter, i);
942 return (rc);
943 }
944
945 /**
946 * ena_free_all_rx_resources - Free Rx resources for all queues
947 * @adapter: network interface device structure
948 *
949 * Free all receive software resources
950 **/
951 static void
ena_free_all_rx_resources(struct ena_adapter * adapter)952 ena_free_all_rx_resources(struct ena_adapter *adapter)
953 {
954 int i;
955
956 for (i = 0; i < adapter->num_queues; i++)
957 ena_free_rx_resources(adapter, i);
958 }
959
960 static inline int
ena_alloc_rx_mbuf(struct ena_adapter * adapter,struct ena_ring * rx_ring,struct ena_rx_buffer * rx_info)961 ena_alloc_rx_mbuf(struct ena_adapter *adapter,
962 struct ena_ring *rx_ring, struct ena_rx_buffer *rx_info)
963 {
964 struct ena_com_buf *ena_buf;
965 bus_dma_segment_t segs[1];
966 int nsegs, error;
967 int mlen;
968
969 /* if previous allocated frag is not used */
970 if (unlikely(rx_info->mbuf != NULL))
971 return (0);
972
973 /* Get mbuf using UMA allocator */
974 rx_info->mbuf = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
975 rx_ring->rx_mbuf_sz);
976
977 if (unlikely(rx_info->mbuf == NULL)) {
978 counter_u64_add(rx_ring->rx_stats.mjum_alloc_fail, 1);
979 rx_info->mbuf = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
980 if (unlikely(rx_info->mbuf == NULL)) {
981 counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1);
982 return (ENOMEM);
983 }
984 mlen = MCLBYTES;
985 } else {
986 mlen = rx_ring->rx_mbuf_sz;
987 }
988 /* Set mbuf length*/
989 rx_info->mbuf->m_pkthdr.len = rx_info->mbuf->m_len = mlen;
990
991 /* Map packets for DMA */
992 ena_trace(ENA_DBG | ENA_RSC | ENA_RXPTH,
993 "Using tag %p for buffers' DMA mapping, mbuf %p len: %d",
994 adapter->rx_buf_tag,rx_info->mbuf, rx_info->mbuf->m_len);
995 error = bus_dmamap_load_mbuf_sg(adapter->rx_buf_tag, rx_info->map,
996 rx_info->mbuf, segs, &nsegs, BUS_DMA_NOWAIT);
997 if (unlikely((error != 0) || (nsegs != 1))) {
998 ena_trace(ENA_WARNING, "failed to map mbuf, error: %d, "
999 "nsegs: %d\n", error, nsegs);
1000 counter_u64_add(rx_ring->rx_stats.dma_mapping_err, 1);
1001 goto exit;
1002
1003 }
1004
1005 bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map, BUS_DMASYNC_PREREAD);
1006
1007 ena_buf = &rx_info->ena_buf;
1008 ena_buf->paddr = segs[0].ds_addr;
1009 ena_buf->len = mlen;
1010
1011 ena_trace(ENA_DBG | ENA_RSC | ENA_RXPTH,
1012 "ALLOC RX BUF: mbuf %p, rx_info %p, len %d, paddr %#jx\n",
1013 rx_info->mbuf, rx_info,ena_buf->len, (uintmax_t)ena_buf->paddr);
1014
1015 return (0);
1016
1017 exit:
1018 m_freem(rx_info->mbuf);
1019 rx_info->mbuf = NULL;
1020 return (EFAULT);
1021 }
1022
1023 static void
ena_free_rx_mbuf(struct ena_adapter * adapter,struct ena_ring * rx_ring,struct ena_rx_buffer * rx_info)1024 ena_free_rx_mbuf(struct ena_adapter *adapter, struct ena_ring *rx_ring,
1025 struct ena_rx_buffer *rx_info)
1026 {
1027
1028 if (rx_info->mbuf == NULL) {
1029 ena_trace(ENA_WARNING, "Trying to free unallocated buffer\n");
1030 return;
1031 }
1032
1033 bus_dmamap_unload(adapter->rx_buf_tag, rx_info->map);
1034 m_freem(rx_info->mbuf);
1035 rx_info->mbuf = NULL;
1036 }
1037
1038 /**
1039 * ena_refill_rx_bufs - Refills ring with descriptors
1040 * @rx_ring: the ring which we want to feed with free descriptors
1041 * @num: number of descriptors to refill
1042 * Refills the ring with newly allocated DMA-mapped mbufs for receiving
1043 **/
1044 static int
ena_refill_rx_bufs(struct ena_ring * rx_ring,uint32_t num)1045 ena_refill_rx_bufs(struct ena_ring *rx_ring, uint32_t num)
1046 {
1047 struct ena_adapter *adapter = rx_ring->adapter;
1048 uint16_t next_to_use, req_id;
1049 uint32_t i;
1050 int rc;
1051
1052 ena_trace(ENA_DBG | ENA_RXPTH | ENA_RSC, "refill qid: %d",
1053 rx_ring->qid);
1054
1055 next_to_use = rx_ring->next_to_use;
1056
1057 for (i = 0; i < num; i++) {
1058 struct ena_rx_buffer *rx_info;
1059
1060 ena_trace(ENA_DBG | ENA_RXPTH | ENA_RSC,
1061 "RX buffer - next to use: %d", next_to_use);
1062
1063 req_id = rx_ring->free_rx_ids[next_to_use];
1064 rx_info = &rx_ring->rx_buffer_info[req_id];
1065
1066 rc = ena_alloc_rx_mbuf(adapter, rx_ring, rx_info);
1067 if (unlikely(rc != 0)) {
1068 ena_trace(ENA_WARNING,
1069 "failed to alloc buffer for rx queue %d\n",
1070 rx_ring->qid);
1071 break;
1072 }
1073 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
1074 &rx_info->ena_buf, req_id);
1075 if (unlikely(rc != 0)) {
1076 ena_trace(ENA_WARNING,
1077 "failed to add buffer for rx queue %d\n",
1078 rx_ring->qid);
1079 break;
1080 }
1081 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
1082 rx_ring->ring_size);
1083 }
1084
1085 if (unlikely(i < num)) {
1086 counter_u64_add(rx_ring->rx_stats.refil_partial, 1);
1087 ena_trace(ENA_WARNING,
1088 "refilled rx qid %d with only %d mbufs (from %d)\n",
1089 rx_ring->qid, i, num);
1090 }
1091
1092 if (likely(i != 0)) {
1093 wmb();
1094 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
1095 }
1096 rx_ring->next_to_use = next_to_use;
1097 return (i);
1098 }
1099
1100 static void
ena_free_rx_bufs(struct ena_adapter * adapter,unsigned int qid)1101 ena_free_rx_bufs(struct ena_adapter *adapter, unsigned int qid)
1102 {
1103 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
1104 unsigned int i;
1105
1106 for (i = 0; i < rx_ring->ring_size; i++) {
1107 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
1108
1109 if (rx_info->mbuf != NULL)
1110 ena_free_rx_mbuf(adapter, rx_ring, rx_info);
1111 }
1112 }
1113
1114 /**
1115 * ena_refill_all_rx_bufs - allocate all queues Rx buffers
1116 * @adapter: network interface device structure
1117 *
1118 */
1119 static void
ena_refill_all_rx_bufs(struct ena_adapter * adapter)1120 ena_refill_all_rx_bufs(struct ena_adapter *adapter)
1121 {
1122 struct ena_ring *rx_ring;
1123 int i, rc, bufs_num;
1124
1125 for (i = 0; i < adapter->num_queues; i++) {
1126 rx_ring = &adapter->rx_ring[i];
1127 bufs_num = rx_ring->ring_size - 1;
1128 rc = ena_refill_rx_bufs(rx_ring, bufs_num);
1129
1130 if (unlikely(rc != bufs_num))
1131 ena_trace(ENA_WARNING, "refilling Queue %d failed. "
1132 "Allocated %d buffers from: %d\n", i, rc, bufs_num);
1133 }
1134 }
1135
1136 static void
ena_free_all_rx_bufs(struct ena_adapter * adapter)1137 ena_free_all_rx_bufs(struct ena_adapter *adapter)
1138 {
1139 int i;
1140
1141 for (i = 0; i < adapter->num_queues; i++)
1142 ena_free_rx_bufs(adapter, i);
1143 }
1144
1145 /**
1146 * ena_free_tx_bufs - Free Tx Buffers per Queue
1147 * @adapter: network interface device structure
1148 * @qid: queue index
1149 **/
1150 static void
ena_free_tx_bufs(struct ena_adapter * adapter,unsigned int qid)1151 ena_free_tx_bufs(struct ena_adapter *adapter, unsigned int qid)
1152 {
1153 bool print_once = true;
1154 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
1155
1156 ENA_RING_MTX_LOCK(tx_ring);
1157 for (int i = 0; i < tx_ring->ring_size; i++) {
1158 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
1159
1160 if (tx_info->mbuf == NULL)
1161 continue;
1162
1163 if (print_once) {
1164 device_printf(adapter->pdev,
1165 "free uncompleted tx mbuf qid %d idx 0x%x",
1166 qid, i);
1167 print_once = false;
1168 } else {
1169 ena_trace(ENA_DBG,
1170 "free uncompleted tx mbuf qid %d idx 0x%x",
1171 qid, i);
1172 }
1173
1174 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map);
1175 m_free(tx_info->mbuf);
1176 tx_info->mbuf = NULL;
1177 }
1178 ENA_RING_MTX_UNLOCK(tx_ring);
1179 }
1180
1181 static void
ena_free_all_tx_bufs(struct ena_adapter * adapter)1182 ena_free_all_tx_bufs(struct ena_adapter *adapter)
1183 {
1184
1185 for (int i = 0; i < adapter->num_queues; i++)
1186 ena_free_tx_bufs(adapter, i);
1187 }
1188
1189 static void
ena_destroy_all_tx_queues(struct ena_adapter * adapter)1190 ena_destroy_all_tx_queues(struct ena_adapter *adapter)
1191 {
1192 uint16_t ena_qid;
1193 int i;
1194
1195 for (i = 0; i < adapter->num_queues; i++) {
1196 ena_qid = ENA_IO_TXQ_IDX(i);
1197 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1198 }
1199 }
1200
1201 static void
ena_destroy_all_rx_queues(struct ena_adapter * adapter)1202 ena_destroy_all_rx_queues(struct ena_adapter *adapter)
1203 {
1204 uint16_t ena_qid;
1205 int i;
1206
1207 for (i = 0; i < adapter->num_queues; i++) {
1208 ena_qid = ENA_IO_RXQ_IDX(i);
1209 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1210 }
1211 }
1212
1213 static void
ena_destroy_all_io_queues(struct ena_adapter * adapter)1214 ena_destroy_all_io_queues(struct ena_adapter *adapter)
1215 {
1216 ena_destroy_all_tx_queues(adapter);
1217 ena_destroy_all_rx_queues(adapter);
1218 }
1219
1220 static inline int
validate_tx_req_id(struct ena_ring * tx_ring,uint16_t req_id)1221 validate_tx_req_id(struct ena_ring *tx_ring, uint16_t req_id)
1222 {
1223 struct ena_adapter *adapter = tx_ring->adapter;
1224 struct ena_tx_buffer *tx_info = NULL;
1225
1226 if (likely(req_id < tx_ring->ring_size)) {
1227 tx_info = &tx_ring->tx_buffer_info[req_id];
1228 if (tx_info->mbuf != NULL)
1229 return (0);
1230 }
1231
1232 if (tx_info->mbuf == NULL)
1233 device_printf(adapter->pdev,
1234 "tx_info doesn't have valid mbuf\n");
1235 else
1236 device_printf(adapter->pdev, "Invalid req_id: %hu\n", req_id);
1237
1238 counter_u64_add(tx_ring->tx_stats.bad_req_id, 1);
1239
1240 return (EFAULT);
1241 }
1242
1243 static int
ena_create_io_queues(struct ena_adapter * adapter)1244 ena_create_io_queues(struct ena_adapter *adapter)
1245 {
1246 struct ena_com_dev *ena_dev = adapter->ena_dev;
1247 struct ena_com_create_io_ctx ctx;
1248 struct ena_ring *ring;
1249 uint16_t ena_qid;
1250 uint32_t msix_vector;
1251 int rc, i;
1252
1253 /* Create TX queues */
1254 for (i = 0; i < adapter->num_queues; i++) {
1255 msix_vector = ENA_IO_IRQ_IDX(i);
1256 ena_qid = ENA_IO_TXQ_IDX(i);
1257 ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
1258 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
1259 ctx.queue_size = adapter->tx_ring_size;
1260 ctx.msix_vector = msix_vector;
1261 ctx.qid = ena_qid;
1262 rc = ena_com_create_io_queue(ena_dev, &ctx);
1263 if (rc != 0) {
1264 device_printf(adapter->pdev,
1265 "Failed to create io TX queue #%d rc: %d\n", i, rc);
1266 goto err_tx;
1267 }
1268 ring = &adapter->tx_ring[i];
1269 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1270 &ring->ena_com_io_sq,
1271 &ring->ena_com_io_cq);
1272 if (rc != 0) {
1273 device_printf(adapter->pdev,
1274 "Failed to get TX queue handlers. TX queue num"
1275 " %d rc: %d\n", i, rc);
1276 ena_com_destroy_io_queue(ena_dev, ena_qid);
1277 goto err_tx;
1278 }
1279 }
1280
1281 /* Create RX queues */
1282 for (i = 0; i < adapter->num_queues; i++) {
1283 msix_vector = ENA_IO_IRQ_IDX(i);
1284 ena_qid = ENA_IO_RXQ_IDX(i);
1285 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
1286 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
1287 ctx.queue_size = adapter->rx_ring_size;
1288 ctx.msix_vector = msix_vector;
1289 ctx.qid = ena_qid;
1290 rc = ena_com_create_io_queue(ena_dev, &ctx);
1291 if (unlikely(rc != 0)) {
1292 device_printf(adapter->pdev,
1293 "Failed to create io RX queue[%d] rc: %d\n", i, rc);
1294 goto err_rx;
1295 }
1296
1297 ring = &adapter->rx_ring[i];
1298 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1299 &ring->ena_com_io_sq,
1300 &ring->ena_com_io_cq);
1301 if (unlikely(rc != 0)) {
1302 device_printf(adapter->pdev,
1303 "Failed to get RX queue handlers. RX queue num"
1304 " %d rc: %d\n", i, rc);
1305 ena_com_destroy_io_queue(ena_dev, ena_qid);
1306 goto err_rx;
1307 }
1308 }
1309
1310 return (0);
1311
1312 err_rx:
1313 while (i--)
1314 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
1315 i = adapter->num_queues;
1316 err_tx:
1317 while (i--)
1318 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
1319
1320 return (ENXIO);
1321 }
1322
1323 /**
1324 * ena_tx_cleanup - clear sent packets and corresponding descriptors
1325 * @tx_ring: ring for which we want to clean packets
1326 *
1327 * Once packets are sent, we ask the device in a loop for no longer used
1328 * descriptors. We find the related mbuf chain in a map (index in an array)
1329 * and free it, then update ring state.
1330 * This is performed in "endless" loop, updating ring pointers every
1331 * TX_COMMIT. The first check of free descriptor is performed before the actual
1332 * loop, then repeated at the loop end.
1333 **/
1334 static int
ena_tx_cleanup(struct ena_ring * tx_ring)1335 ena_tx_cleanup(struct ena_ring *tx_ring)
1336 {
1337 struct ena_adapter *adapter;
1338 struct ena_com_io_cq* io_cq;
1339 uint16_t next_to_clean;
1340 uint16_t req_id;
1341 uint16_t ena_qid;
1342 unsigned int total_done = 0;
1343 int rc;
1344 int commit = TX_COMMIT;
1345 int budget = TX_BUDGET;
1346 int work_done;
1347
1348 adapter = tx_ring->que->adapter;
1349 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id);
1350 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
1351 next_to_clean = tx_ring->next_to_clean;
1352
1353 do {
1354 struct ena_tx_buffer *tx_info;
1355 struct mbuf *mbuf;
1356
1357 rc = ena_com_tx_comp_req_id_get(io_cq, &req_id);
1358 if (unlikely(rc != 0))
1359 break;
1360
1361 rc = validate_tx_req_id(tx_ring, req_id);
1362 if (unlikely(rc != 0))
1363 break;
1364
1365 tx_info = &tx_ring->tx_buffer_info[req_id];
1366
1367 mbuf = tx_info->mbuf;
1368
1369 tx_info->mbuf = NULL;
1370 bintime_clear(&tx_info->timestamp);
1371
1372 if (likely(tx_info->num_of_bufs != 0)) {
1373 /* Map is no longer required */
1374 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map);
1375 }
1376
1377 ena_trace(ENA_DBG | ENA_TXPTH, "tx: q %d mbuf %p completed",
1378 tx_ring->qid, mbuf);
1379
1380 m_freem(mbuf);
1381
1382 total_done += tx_info->tx_descs;
1383
1384 tx_ring->free_tx_ids[next_to_clean] = req_id;
1385 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1386 tx_ring->ring_size);
1387
1388 if (unlikely(--commit == 0)) {
1389 commit = TX_COMMIT;
1390 /* update ring state every TX_COMMIT descriptor */
1391 tx_ring->next_to_clean = next_to_clean;
1392 ena_com_comp_ack(
1393 &adapter->ena_dev->io_sq_queues[ena_qid],
1394 total_done);
1395 ena_com_update_dev_comp_head(io_cq);
1396 total_done = 0;
1397 }
1398 } while (likely(--budget));
1399
1400 work_done = TX_BUDGET - budget;
1401
1402 ena_trace(ENA_DBG | ENA_TXPTH, "tx: q %d done. total pkts: %d",
1403 tx_ring->qid, work_done);
1404
1405 /* If there is still something to commit update ring state */
1406 if (likely(commit != TX_COMMIT)) {
1407 tx_ring->next_to_clean = next_to_clean;
1408 ena_com_comp_ack(&adapter->ena_dev->io_sq_queues[ena_qid],
1409 total_done);
1410 ena_com_update_dev_comp_head(io_cq);
1411 }
1412
1413 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
1414
1415 return (work_done);
1416 }
1417
1418 static void
ena_rx_hash_mbuf(struct ena_ring * rx_ring,struct ena_com_rx_ctx * ena_rx_ctx,struct mbuf * mbuf)1419 ena_rx_hash_mbuf(struct ena_ring *rx_ring, struct ena_com_rx_ctx *ena_rx_ctx,
1420 struct mbuf *mbuf)
1421 {
1422 struct ena_adapter *adapter = rx_ring->adapter;
1423
1424 if (likely(adapter->rss_support)) {
1425 mbuf->m_pkthdr.flowid = ena_rx_ctx->hash;
1426
1427 if (ena_rx_ctx->frag &&
1428 (ena_rx_ctx->l3_proto != ENA_ETH_IO_L3_PROTO_UNKNOWN)) {
1429 M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE_HASH);
1430 return;
1431 }
1432
1433 switch (ena_rx_ctx->l3_proto) {
1434 case ENA_ETH_IO_L3_PROTO_IPV4:
1435 switch (ena_rx_ctx->l4_proto) {
1436 case ENA_ETH_IO_L4_PROTO_TCP:
1437 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_TCP_IPV4);
1438 break;
1439 case ENA_ETH_IO_L4_PROTO_UDP:
1440 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_UDP_IPV4);
1441 break;
1442 default:
1443 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_IPV4);
1444 }
1445 break;
1446 case ENA_ETH_IO_L3_PROTO_IPV6:
1447 switch (ena_rx_ctx->l4_proto) {
1448 case ENA_ETH_IO_L4_PROTO_TCP:
1449 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_TCP_IPV6);
1450 break;
1451 case ENA_ETH_IO_L4_PROTO_UDP:
1452 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_UDP_IPV6);
1453 break;
1454 default:
1455 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_IPV6);
1456 }
1457 break;
1458 case ENA_ETH_IO_L3_PROTO_UNKNOWN:
1459 M_HASHTYPE_SET(mbuf, M_HASHTYPE_NONE);
1460 break;
1461 default:
1462 M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE_HASH);
1463 }
1464 } else {
1465 mbuf->m_pkthdr.flowid = rx_ring->qid;
1466 M_HASHTYPE_SET(mbuf, M_HASHTYPE_NONE);
1467 }
1468 }
1469
1470 /**
1471 * ena_rx_mbuf - assemble mbuf from descriptors
1472 * @rx_ring: ring for which we want to clean packets
1473 * @ena_bufs: buffer info
1474 * @ena_rx_ctx: metadata for this packet(s)
1475 * @next_to_clean: ring pointer, will be updated only upon success
1476 *
1477 **/
1478 static struct mbuf*
ena_rx_mbuf(struct ena_ring * rx_ring,struct ena_com_rx_buf_info * ena_bufs,struct ena_com_rx_ctx * ena_rx_ctx,uint16_t * next_to_clean)1479 ena_rx_mbuf(struct ena_ring *rx_ring, struct ena_com_rx_buf_info *ena_bufs,
1480 struct ena_com_rx_ctx *ena_rx_ctx, uint16_t *next_to_clean)
1481 {
1482 struct mbuf *mbuf;
1483 struct ena_rx_buffer *rx_info;
1484 struct ena_adapter *adapter;
1485 unsigned int descs = ena_rx_ctx->descs;
1486 int rc;
1487 uint16_t ntc, len, req_id, buf = 0;
1488
1489 ntc = *next_to_clean;
1490 adapter = rx_ring->adapter;
1491
1492 len = ena_bufs[buf].len;
1493 req_id = ena_bufs[buf].req_id;
1494 rc = validate_rx_req_id(rx_ring, req_id);
1495 if (unlikely(rc != 0))
1496 return (NULL);
1497
1498 rx_info = &rx_ring->rx_buffer_info[req_id];
1499 if (unlikely(rx_info->mbuf == NULL)) {
1500 device_printf(adapter->pdev, "NULL mbuf in rx_info");
1501 return (NULL);
1502 }
1503
1504 ena_trace(ENA_DBG | ENA_RXPTH, "rx_info %p, mbuf %p, paddr %jx",
1505 rx_info, rx_info->mbuf, (uintmax_t)rx_info->ena_buf.paddr);
1506
1507 mbuf = rx_info->mbuf;
1508 mbuf->m_flags |= M_PKTHDR;
1509 mbuf->m_pkthdr.len = len;
1510 mbuf->m_len = len;
1511 mbuf->m_pkthdr.rcvif = rx_ring->que->adapter->ifp;
1512
1513 /* Fill mbuf with hash key and it's interpretation for optimization */
1514 ena_rx_hash_mbuf(rx_ring, ena_rx_ctx, mbuf);
1515
1516 ena_trace(ENA_DBG | ENA_RXPTH, "rx mbuf 0x%p, flags=0x%x, len: %d",
1517 mbuf, mbuf->m_flags, mbuf->m_pkthdr.len);
1518
1519 /* DMA address is not needed anymore, unmap it */
1520 bus_dmamap_unload(rx_ring->adapter->rx_buf_tag, rx_info->map);
1521
1522 rx_info->mbuf = NULL;
1523 rx_ring->free_rx_ids[ntc] = req_id;
1524 ntc = ENA_RX_RING_IDX_NEXT(ntc, rx_ring->ring_size);
1525
1526 /*
1527 * While we have more than 1 descriptors for one rcvd packet, append
1528 * other mbufs to the main one
1529 */
1530 while (--descs) {
1531 ++buf;
1532 len = ena_bufs[buf].len;
1533 req_id = ena_bufs[buf].req_id;
1534 rc = validate_rx_req_id(rx_ring, req_id);
1535 if (unlikely(rc != 0)) {
1536 /*
1537 * If the req_id is invalid, then the device will be
1538 * reset. In that case we must free all mbufs that
1539 * were already gathered.
1540 */
1541 m_freem(mbuf);
1542 return (NULL);
1543 }
1544 rx_info = &rx_ring->rx_buffer_info[req_id];
1545
1546 if (unlikely(rx_info->mbuf == NULL)) {
1547 device_printf(adapter->pdev, "NULL mbuf in rx_info");
1548 /*
1549 * If one of the required mbufs was not allocated yet,
1550 * we can break there.
1551 * All earlier used descriptors will be reallocated
1552 * later and not used mbufs can be reused.
1553 * The next_to_clean pointer will not be updated in case
1554 * of an error, so caller should advance it manually
1555 * in error handling routine to keep it up to date
1556 * with hw ring.
1557 */
1558 m_freem(mbuf);
1559 return (NULL);
1560 }
1561
1562 if (unlikely(m_append(mbuf, len, rx_info->mbuf->m_data) == 0)) {
1563 counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1);
1564 ena_trace(ENA_WARNING, "Failed to append Rx mbuf %p",
1565 mbuf);
1566 }
1567
1568 ena_trace(ENA_DBG | ENA_RXPTH,
1569 "rx mbuf updated. len %d", mbuf->m_pkthdr.len);
1570
1571 /* Free already appended mbuf, it won't be useful anymore */
1572 bus_dmamap_unload(rx_ring->adapter->rx_buf_tag, rx_info->map);
1573 m_freem(rx_info->mbuf);
1574 rx_info->mbuf = NULL;
1575
1576 rx_ring->free_rx_ids[ntc] = req_id;
1577 ntc = ENA_RX_RING_IDX_NEXT(ntc, rx_ring->ring_size);
1578 }
1579
1580 *next_to_clean = ntc;
1581
1582 return (mbuf);
1583 }
1584
1585 /**
1586 * ena_rx_checksum - indicate in mbuf if hw indicated a good cksum
1587 **/
1588 static inline void
ena_rx_checksum(struct ena_ring * rx_ring,struct ena_com_rx_ctx * ena_rx_ctx,struct mbuf * mbuf)1589 ena_rx_checksum(struct ena_ring *rx_ring, struct ena_com_rx_ctx *ena_rx_ctx,
1590 struct mbuf *mbuf)
1591 {
1592
1593 /* if IP and error */
1594 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
1595 ena_rx_ctx->l3_csum_err)) {
1596 /* ipv4 checksum error */
1597 mbuf->m_pkthdr.csum_flags = 0;
1598 counter_u64_add(rx_ring->rx_stats.bad_csum, 1);
1599 ena_trace(ENA_DBG, "RX IPv4 header checksum error");
1600 return;
1601 }
1602
1603 /* if TCP/UDP */
1604 if ((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1605 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)) {
1606 if (ena_rx_ctx->l4_csum_err) {
1607 /* TCP/UDP checksum error */
1608 mbuf->m_pkthdr.csum_flags = 0;
1609 counter_u64_add(rx_ring->rx_stats.bad_csum, 1);
1610 ena_trace(ENA_DBG, "RX L4 checksum error");
1611 } else {
1612 mbuf->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
1613 mbuf->m_pkthdr.csum_flags |= CSUM_IP_VALID;
1614 }
1615 }
1616 }
1617
1618 static void
ena_deferred_rx_cleanup(void * arg,int pending)1619 ena_deferred_rx_cleanup(void *arg, int pending)
1620 {
1621 struct ena_ring *rx_ring = arg;
1622 int budget = CLEAN_BUDGET;
1623
1624 ENA_RING_MTX_LOCK(rx_ring);
1625 /*
1626 * If deferred task was executed, perform cleanup of all awaiting
1627 * descs (or until given budget is depleted to avoid infinite loop).
1628 */
1629 while (likely(budget--)) {
1630 if (ena_rx_cleanup(rx_ring) == 0)
1631 break;
1632 }
1633 ENA_RING_MTX_UNLOCK(rx_ring);
1634 }
1635
1636 /**
1637 * ena_rx_cleanup - handle rx irq
1638 * @arg: ring for which irq is being handled
1639 **/
1640 static int
ena_rx_cleanup(struct ena_ring * rx_ring)1641 ena_rx_cleanup(struct ena_ring *rx_ring)
1642 {
1643 struct ena_adapter *adapter;
1644 struct mbuf *mbuf;
1645 struct ena_com_rx_ctx ena_rx_ctx;
1646 struct ena_com_io_cq* io_cq;
1647 struct ena_com_io_sq* io_sq;
1648 if_t ifp;
1649 uint16_t ena_qid;
1650 uint16_t next_to_clean;
1651 uint32_t refill_required;
1652 uint32_t refill_threshold;
1653 uint32_t do_if_input = 0;
1654 unsigned int qid;
1655 int rc, i;
1656 int budget = RX_BUDGET;
1657
1658 adapter = rx_ring->que->adapter;
1659 ifp = adapter->ifp;
1660 qid = rx_ring->que->id;
1661 ena_qid = ENA_IO_RXQ_IDX(qid);
1662 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
1663 io_sq = &adapter->ena_dev->io_sq_queues[ena_qid];
1664 next_to_clean = rx_ring->next_to_clean;
1665
1666 ena_trace(ENA_DBG, "rx: qid %d", qid);
1667
1668 do {
1669 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
1670 ena_rx_ctx.max_bufs = adapter->max_rx_sgl_size;
1671 ena_rx_ctx.descs = 0;
1672 rc = ena_com_rx_pkt(io_cq, io_sq, &ena_rx_ctx);
1673
1674 if (unlikely(rc != 0))
1675 goto error;
1676
1677 if (unlikely(ena_rx_ctx.descs == 0))
1678 break;
1679
1680 ena_trace(ENA_DBG | ENA_RXPTH, "rx: q %d got packet from ena. "
1681 "descs #: %d l3 proto %d l4 proto %d hash: %x",
1682 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
1683 ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
1684
1685 /* Receive mbuf from the ring */
1686 mbuf = ena_rx_mbuf(rx_ring, rx_ring->ena_bufs,
1687 &ena_rx_ctx, &next_to_clean);
1688
1689 /* Exit if we failed to retrieve a buffer */
1690 if (unlikely(mbuf == NULL)) {
1691 for (i = 0; i < ena_rx_ctx.descs; ++i) {
1692 rx_ring->free_rx_ids[next_to_clean] =
1693 rx_ring->ena_bufs[i].req_id;
1694 next_to_clean =
1695 ENA_RX_RING_IDX_NEXT(next_to_clean,
1696 rx_ring->ring_size);
1697
1698 }
1699 break;
1700 }
1701
1702 if (((ifp->if_capenable & IFCAP_RXCSUM) != 0) ||
1703 ((ifp->if_capenable & IFCAP_RXCSUM_IPV6) != 0)) {
1704 ena_rx_checksum(rx_ring, &ena_rx_ctx, mbuf);
1705 }
1706
1707 counter_enter();
1708 counter_u64_add_protected(rx_ring->rx_stats.bytes,
1709 mbuf->m_pkthdr.len);
1710 counter_u64_add_protected(adapter->hw_stats.rx_bytes,
1711 mbuf->m_pkthdr.len);
1712 counter_exit();
1713 /*
1714 * LRO is only for IP/TCP packets and TCP checksum of the packet
1715 * should be computed by hardware.
1716 */
1717 do_if_input = 1;
1718 if (((ifp->if_capenable & IFCAP_LRO) != 0) &&
1719 ((mbuf->m_pkthdr.csum_flags & CSUM_IP_VALID) != 0) &&
1720 (ena_rx_ctx.l4_proto == ENA_ETH_IO_L4_PROTO_TCP)) {
1721 /*
1722 * Send to the stack if:
1723 * - LRO not enabled, or
1724 * - no LRO resources, or
1725 * - lro enqueue fails
1726 */
1727 if ((rx_ring->lro.lro_cnt != 0) &&
1728 (tcp_lro_rx(&rx_ring->lro, mbuf, 0) == 0))
1729 do_if_input = 0;
1730 }
1731 if (do_if_input != 0) {
1732 ena_trace(ENA_DBG | ENA_RXPTH,
1733 "calling if_input() with mbuf %p", mbuf);
1734 (*ifp->if_input)(ifp, mbuf);
1735 }
1736
1737 counter_enter();
1738 counter_u64_add_protected(rx_ring->rx_stats.cnt, 1);
1739 counter_u64_add_protected(adapter->hw_stats.rx_packets, 1);
1740 counter_exit();
1741 } while (--budget);
1742
1743 rx_ring->next_to_clean = next_to_clean;
1744
1745 refill_required = ena_com_free_desc(io_sq);
1746 refill_threshold = rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER;
1747
1748 if (refill_required > refill_threshold) {
1749 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1750 ena_refill_rx_bufs(rx_ring, refill_required);
1751 }
1752
1753 tcp_lro_flush_all(&rx_ring->lro);
1754
1755 return (RX_BUDGET - budget);
1756
1757 error:
1758 counter_u64_add(rx_ring->rx_stats.bad_desc_num, 1);
1759 return (RX_BUDGET - budget);
1760 }
1761
1762 /*********************************************************************
1763 *
1764 * MSIX & Interrupt Service routine
1765 *
1766 **********************************************************************/
1767
1768 /**
1769 * ena_handle_msix - MSIX Interrupt Handler for admin/async queue
1770 * @arg: interrupt number
1771 **/
1772 static void
ena_intr_msix_mgmnt(void * arg)1773 ena_intr_msix_mgmnt(void *arg)
1774 {
1775 struct ena_adapter *adapter = (struct ena_adapter *)arg;
1776
1777 ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1778 if (likely(adapter->running))
1779 ena_com_aenq_intr_handler(adapter->ena_dev, arg);
1780 }
1781
1782 /**
1783 * ena_handle_msix - MSIX Interrupt Handler for Tx/Rx
1784 * @arg: interrupt number
1785 **/
1786 static void
ena_handle_msix(void * arg)1787 ena_handle_msix(void *arg)
1788 {
1789 struct ena_que *que = arg;
1790 struct ena_adapter *adapter = que->adapter;
1791 if_t ifp = adapter->ifp;
1792 struct ena_ring *tx_ring;
1793 struct ena_ring *rx_ring;
1794 struct ena_com_io_cq* io_cq;
1795 struct ena_eth_io_intr_reg intr_reg;
1796 int qid, ena_qid;
1797 int txc, rxc, i;
1798
1799 if (unlikely((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0))
1800 return;
1801
1802 ena_trace(ENA_DBG, "MSI-X TX/RX routine");
1803
1804 tx_ring = que->tx_ring;
1805 rx_ring = que->rx_ring;
1806 qid = que->id;
1807 ena_qid = ENA_IO_TXQ_IDX(qid);
1808 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
1809
1810 for (i = 0; i < CLEAN_BUDGET; ++i) {
1811 /*
1812 * If lock cannot be acquired, then deferred cleanup task was
1813 * being executed and rx ring is being cleaned up in
1814 * another thread.
1815 */
1816 if (likely(ENA_RING_MTX_TRYLOCK(rx_ring) != 0)) {
1817 rxc = ena_rx_cleanup(rx_ring);
1818 ENA_RING_MTX_UNLOCK(rx_ring);
1819 } else {
1820 rxc = 0;
1821 }
1822
1823 /* Protection from calling ena_tx_cleanup from ena_start_xmit */
1824 ENA_RING_MTX_LOCK(tx_ring);
1825 txc = ena_tx_cleanup(tx_ring);
1826 ENA_RING_MTX_UNLOCK(tx_ring);
1827
1828 if (unlikely((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0))
1829 return;
1830
1831 if ((txc != TX_BUDGET) && (rxc != RX_BUDGET))
1832 break;
1833 }
1834
1835 /* Signal that work is done and unmask interrupt */
1836 ena_com_update_intr_reg(&intr_reg,
1837 RX_IRQ_INTERVAL,
1838 TX_IRQ_INTERVAL,
1839 true);
1840 ena_com_unmask_intr(io_cq, &intr_reg);
1841 }
1842
1843 static int
ena_enable_msix(struct ena_adapter * adapter)1844 ena_enable_msix(struct ena_adapter *adapter)
1845 {
1846 device_t dev = adapter->pdev;
1847 int msix_vecs, msix_req;
1848 int i, rc = 0;
1849
1850 /* Reserved the max msix vectors we might need */
1851 msix_vecs = ENA_MAX_MSIX_VEC(adapter->num_queues);
1852
1853 adapter->msix_entries = malloc(msix_vecs * sizeof(struct msix_entry),
1854 M_DEVBUF, M_WAITOK | M_ZERO);
1855
1856 ena_trace(ENA_DBG, "trying to enable MSI-X, vectors: %d", msix_vecs);
1857
1858 for (i = 0; i < msix_vecs; i++) {
1859 adapter->msix_entries[i].entry = i;
1860 /* Vectors must start from 1 */
1861 adapter->msix_entries[i].vector = i + 1;
1862 }
1863
1864 msix_req = msix_vecs;
1865 rc = pci_alloc_msix(dev, &msix_vecs);
1866 if (unlikely(rc != 0)) {
1867 device_printf(dev,
1868 "Failed to enable MSIX, vectors %d rc %d\n", msix_vecs, rc);
1869
1870 rc = ENOSPC;
1871 goto err_msix_free;
1872 }
1873
1874 if (msix_vecs != msix_req) {
1875 device_printf(dev, "Enable only %d MSI-x (out of %d), reduce "
1876 "the number of queues\n", msix_vecs, msix_req);
1877 adapter->num_queues = msix_vecs - ENA_ADMIN_MSIX_VEC;
1878 }
1879
1880 adapter->msix_vecs = msix_vecs;
1881 adapter->msix_enabled = true;
1882
1883 return (0);
1884
1885 err_msix_free:
1886 free(adapter->msix_entries, M_DEVBUF);
1887 adapter->msix_entries = NULL;
1888
1889 return (rc);
1890 }
1891
1892 static void
ena_setup_mgmnt_intr(struct ena_adapter * adapter)1893 ena_setup_mgmnt_intr(struct ena_adapter *adapter)
1894 {
1895
1896 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
1897 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
1898 device_get_nameunit(adapter->pdev));
1899 /*
1900 * Handler is NULL on purpose, it will be set
1901 * when mgmnt interrupt is acquired
1902 */
1903 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = NULL;
1904 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
1905 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
1906 adapter->msix_entries[ENA_MGMNT_IRQ_IDX].vector;
1907 }
1908
1909 static void
ena_setup_io_intr(struct ena_adapter * adapter)1910 ena_setup_io_intr(struct ena_adapter *adapter)
1911 {
1912 static int last_bind_cpu = -1;
1913 int irq_idx;
1914
1915 for (int i = 0; i < adapter->num_queues; i++) {
1916 irq_idx = ENA_IO_IRQ_IDX(i);
1917
1918 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
1919 "%s-TxRx-%d", device_get_nameunit(adapter->pdev), i);
1920 adapter->irq_tbl[irq_idx].handler = ena_handle_msix;
1921 adapter->irq_tbl[irq_idx].data = &adapter->que[i];
1922 adapter->irq_tbl[irq_idx].vector =
1923 adapter->msix_entries[irq_idx].vector;
1924 ena_trace(ENA_INFO | ENA_IOQ, "ena_setup_io_intr vector: %d\n",
1925 adapter->msix_entries[irq_idx].vector);
1926 #ifdef RSS
1927 adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu =
1928 rss_getcpu(i % rss_getnumbuckets());
1929 #else
1930 /*
1931 * We still want to bind rings to the corresponding cpu
1932 * using something similar to the RSS round-robin technique.
1933 */
1934 if (unlikely(last_bind_cpu < 0))
1935 last_bind_cpu = CPU_FIRST();
1936 adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu =
1937 last_bind_cpu;
1938 last_bind_cpu = CPU_NEXT(last_bind_cpu);
1939 #endif
1940 }
1941 }
1942
1943 static int
ena_request_mgmnt_irq(struct ena_adapter * adapter)1944 ena_request_mgmnt_irq(struct ena_adapter *adapter)
1945 {
1946 struct ena_irq *irq;
1947 unsigned long flags;
1948 int rc, rcc;
1949
1950 flags = RF_ACTIVE | RF_SHAREABLE;
1951
1952 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1953 irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ,
1954 &irq->vector, flags);
1955
1956 if (unlikely(irq->res == NULL)) {
1957 device_printf(adapter->pdev, "could not allocate "
1958 "irq vector: %d\n", irq->vector);
1959 return (ENXIO);
1960 }
1961
1962 rc = bus_setup_intr(adapter->pdev, irq->res,
1963 INTR_TYPE_NET | INTR_MPSAFE, NULL, ena_intr_msix_mgmnt,
1964 irq->data, &irq->cookie);
1965 if (unlikely(rc != 0)) {
1966 device_printf(adapter->pdev, "failed to register "
1967 "interrupt handler for irq %ju: %d\n",
1968 rman_get_start(irq->res), rc);
1969 goto err_res_free;
1970 }
1971 irq->requested = true;
1972
1973 return (rc);
1974
1975 err_res_free:
1976 ena_trace(ENA_INFO | ENA_ADMQ, "releasing resource for irq %d\n",
1977 irq->vector);
1978 rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
1979 irq->vector, irq->res);
1980 if (unlikely(rcc != 0))
1981 device_printf(adapter->pdev, "dev has no parent while "
1982 "releasing res for irq: %d\n", irq->vector);
1983 irq->res = NULL;
1984
1985 return (rc);
1986 }
1987
1988 static int
ena_request_io_irq(struct ena_adapter * adapter)1989 ena_request_io_irq(struct ena_adapter *adapter)
1990 {
1991 struct ena_irq *irq;
1992 unsigned long flags = 0;
1993 int rc = 0, i, rcc;
1994
1995 if (unlikely(adapter->msix_enabled == 0)) {
1996 device_printf(adapter->pdev,
1997 "failed to request I/O IRQ: MSI-X is not enabled\n");
1998 return (EINVAL);
1999 } else {
2000 flags = RF_ACTIVE | RF_SHAREABLE;
2001 }
2002
2003 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
2004 irq = &adapter->irq_tbl[i];
2005
2006 if (unlikely(irq->requested))
2007 continue;
2008
2009 irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ,
2010 &irq->vector, flags);
2011 if (unlikely(irq->res == NULL)) {
2012 device_printf(adapter->pdev, "could not allocate "
2013 "irq vector: %d\n", irq->vector);
2014 goto err;
2015 }
2016
2017 rc = bus_setup_intr(adapter->pdev, irq->res,
2018 INTR_TYPE_NET | INTR_MPSAFE, NULL,
2019 irq->handler, irq->data, &irq->cookie);
2020 if (unlikely(rc != 0)) {
2021 device_printf(adapter->pdev, "failed to register "
2022 "interrupt handler for irq %ju: %d\n",
2023 rman_get_start(irq->res), rc);
2024 goto err;
2025 }
2026 irq->requested = true;
2027
2028 #ifdef RSS
2029 ena_trace(ENA_INFO, "queue %d - RSS bucket %d\n",
2030 i - ENA_IO_IRQ_FIRST_IDX, irq->cpu);
2031 #else
2032 ena_trace(ENA_INFO, "queue %d - cpu %d\n",
2033 i - ENA_IO_IRQ_FIRST_IDX, irq->cpu);
2034 #endif
2035 }
2036
2037 return (rc);
2038
2039 err:
2040
2041 for (; i >= ENA_IO_IRQ_FIRST_IDX; i--) {
2042 irq = &adapter->irq_tbl[i];
2043 rcc = 0;
2044
2045 /* Once we entered err: section and irq->requested is true we
2046 free both intr and resources */
2047 if (irq->requested)
2048 rcc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie);
2049 if (unlikely(rcc != 0))
2050 device_printf(adapter->pdev, "could not release"
2051 " irq: %d, error: %d\n", irq->vector, rcc);
2052
2053 /* If we entred err: section without irq->requested set we know
2054 it was bus_alloc_resource_any() that needs cleanup, provided
2055 res is not NULL. In case res is NULL no work in needed in
2056 this iteration */
2057 rcc = 0;
2058 if (irq->res != NULL) {
2059 rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
2060 irq->vector, irq->res);
2061 }
2062 if (unlikely(rcc != 0))
2063 device_printf(adapter->pdev, "dev has no parent while "
2064 "releasing res for irq: %d\n", irq->vector);
2065 irq->requested = false;
2066 irq->res = NULL;
2067 }
2068
2069 return (rc);
2070 }
2071
2072 static void
ena_free_mgmnt_irq(struct ena_adapter * adapter)2073 ena_free_mgmnt_irq(struct ena_adapter *adapter)
2074 {
2075 struct ena_irq *irq;
2076 int rc;
2077
2078 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2079 if (irq->requested) {
2080 ena_trace(ENA_INFO | ENA_ADMQ, "tear down irq: %d\n",
2081 irq->vector);
2082 rc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie);
2083 if (unlikely(rc != 0))
2084 device_printf(adapter->pdev, "failed to tear "
2085 "down irq: %d\n", irq->vector);
2086 irq->requested = 0;
2087 }
2088
2089 if (irq->res != NULL) {
2090 ena_trace(ENA_INFO | ENA_ADMQ, "release resource irq: %d\n",
2091 irq->vector);
2092 rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
2093 irq->vector, irq->res);
2094 irq->res = NULL;
2095 if (unlikely(rc != 0))
2096 device_printf(adapter->pdev, "dev has no parent while "
2097 "releasing res for irq: %d\n", irq->vector);
2098 }
2099 }
2100
2101 static void
ena_free_io_irq(struct ena_adapter * adapter)2102 ena_free_io_irq(struct ena_adapter *adapter)
2103 {
2104 struct ena_irq *irq;
2105 int rc;
2106
2107 for (int i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
2108 irq = &adapter->irq_tbl[i];
2109 if (irq->requested) {
2110 ena_trace(ENA_INFO | ENA_IOQ, "tear down irq: %d\n",
2111 irq->vector);
2112 rc = bus_teardown_intr(adapter->pdev, irq->res,
2113 irq->cookie);
2114 if (unlikely(rc != 0)) {
2115 device_printf(adapter->pdev, "failed to tear "
2116 "down irq: %d\n", irq->vector);
2117 }
2118 irq->requested = 0;
2119 }
2120
2121 if (irq->res != NULL) {
2122 ena_trace(ENA_INFO | ENA_IOQ, "release resource irq: %d\n",
2123 irq->vector);
2124 rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
2125 irq->vector, irq->res);
2126 irq->res = NULL;
2127 if (unlikely(rc != 0)) {
2128 device_printf(adapter->pdev, "dev has no parent"
2129 " while releasing res for irq: %d\n",
2130 irq->vector);
2131 }
2132 }
2133 }
2134 }
2135
2136 static void
ena_free_irqs(struct ena_adapter * adapter)2137 ena_free_irqs(struct ena_adapter* adapter)
2138 {
2139
2140 ena_free_io_irq(adapter);
2141 ena_free_mgmnt_irq(adapter);
2142 ena_disable_msix(adapter);
2143 }
2144
2145 static void
ena_disable_msix(struct ena_adapter * adapter)2146 ena_disable_msix(struct ena_adapter *adapter)
2147 {
2148
2149 pci_release_msi(adapter->pdev);
2150
2151 adapter->msix_vecs = 0;
2152 free(adapter->msix_entries, M_DEVBUF);
2153 adapter->msix_entries = NULL;
2154 }
2155
2156 static void
ena_unmask_all_io_irqs(struct ena_adapter * adapter)2157 ena_unmask_all_io_irqs(struct ena_adapter *adapter)
2158 {
2159 struct ena_com_io_cq* io_cq;
2160 struct ena_eth_io_intr_reg intr_reg;
2161 uint16_t ena_qid;
2162 int i;
2163
2164 /* Unmask interrupts for all queues */
2165 for (i = 0; i < adapter->num_queues; i++) {
2166 ena_qid = ENA_IO_TXQ_IDX(i);
2167 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
2168 ena_com_update_intr_reg(&intr_reg, 0, 0, true);
2169 ena_com_unmask_intr(io_cq, &intr_reg);
2170 }
2171 }
2172
2173 /* Configure the Rx forwarding */
2174 static int
ena_rss_configure(struct ena_adapter * adapter)2175 ena_rss_configure(struct ena_adapter *adapter)
2176 {
2177 struct ena_com_dev *ena_dev = adapter->ena_dev;
2178 int rc;
2179
2180 /* Set indirect table */
2181 rc = ena_com_indirect_table_set(ena_dev);
2182 if (unlikely((rc != 0) && (rc != EOPNOTSUPP)))
2183 return (rc);
2184
2185 /* Configure hash function (if supported) */
2186 rc = ena_com_set_hash_function(ena_dev);
2187 if (unlikely((rc != 0) && (rc != EOPNOTSUPP)))
2188 return (rc);
2189
2190 /* Configure hash inputs (if supported) */
2191 rc = ena_com_set_hash_ctrl(ena_dev);
2192 if (unlikely((rc != 0) && (rc != EOPNOTSUPP)))
2193 return (rc);
2194
2195 return (0);
2196 }
2197
2198 static int
ena_up_complete(struct ena_adapter * adapter)2199 ena_up_complete(struct ena_adapter *adapter)
2200 {
2201 int rc;
2202
2203 if (likely(adapter->rss_support)) {
2204 rc = ena_rss_configure(adapter);
2205 if (rc != 0)
2206 return (rc);
2207 }
2208
2209 rc = ena_change_mtu(adapter->ifp, adapter->ifp->if_mtu);
2210 if (unlikely(rc != 0))
2211 return (rc);
2212
2213 ena_refill_all_rx_bufs(adapter);
2214 ena_reset_counters((counter_u64_t *)&adapter->hw_stats,
2215 sizeof(adapter->hw_stats));
2216
2217 return (0);
2218 }
2219
2220 static int
ena_up(struct ena_adapter * adapter)2221 ena_up(struct ena_adapter *adapter)
2222 {
2223 int rc = 0;
2224
2225 if (unlikely(device_is_attached(adapter->pdev) == 0)) {
2226 device_printf(adapter->pdev, "device is not attached!\n");
2227 return (ENXIO);
2228 }
2229
2230 if (unlikely(!adapter->running)) {
2231 device_printf(adapter->pdev, "device is not running!\n");
2232 return (ENXIO);
2233 }
2234
2235 if (!adapter->up) {
2236 device_printf(adapter->pdev, "device is going UP\n");
2237
2238 /* setup interrupts for IO queues */
2239 ena_setup_io_intr(adapter);
2240 rc = ena_request_io_irq(adapter);
2241 if (unlikely(rc != 0)) {
2242 ena_trace(ENA_ALERT, "err_req_irq");
2243 goto err_req_irq;
2244 }
2245
2246 /* allocate transmit descriptors */
2247 rc = ena_setup_all_tx_resources(adapter);
2248 if (unlikely(rc != 0)) {
2249 ena_trace(ENA_ALERT, "err_setup_tx");
2250 goto err_setup_tx;
2251 }
2252
2253 /* allocate receive descriptors */
2254 rc = ena_setup_all_rx_resources(adapter);
2255 if (unlikely(rc != 0)) {
2256 ena_trace(ENA_ALERT, "err_setup_rx");
2257 goto err_setup_rx;
2258 }
2259
2260 /* create IO queues for Rx & Tx */
2261 rc = ena_create_io_queues(adapter);
2262 if (unlikely(rc != 0)) {
2263 ena_trace(ENA_ALERT,
2264 "create IO queues failed");
2265 goto err_io_que;
2266 }
2267
2268 if (unlikely(adapter->link_status))
2269 if_link_state_change(adapter->ifp, LINK_STATE_UP);
2270
2271 rc = ena_up_complete(adapter);
2272 if (unlikely(rc != 0))
2273 goto err_up_complete;
2274
2275 counter_u64_add(adapter->dev_stats.interface_up, 1);
2276
2277 ena_update_hwassist(adapter);
2278
2279 if_setdrvflagbits(adapter->ifp, IFF_DRV_RUNNING,
2280 IFF_DRV_OACTIVE);
2281
2282 callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S,
2283 ena_timer_service, (void *)adapter, 0);
2284
2285 adapter->up = true;
2286
2287 ena_unmask_all_io_irqs(adapter);
2288 }
2289
2290 return (0);
2291
2292 err_up_complete:
2293 ena_destroy_all_io_queues(adapter);
2294 err_io_que:
2295 ena_free_all_rx_resources(adapter);
2296 err_setup_rx:
2297 ena_free_all_tx_resources(adapter);
2298 err_setup_tx:
2299 ena_free_io_irq(adapter);
2300 err_req_irq:
2301 return (rc);
2302 }
2303
2304 static uint64_t
ena_get_counter(if_t ifp,ift_counter cnt)2305 ena_get_counter(if_t ifp, ift_counter cnt)
2306 {
2307 struct ena_adapter *adapter;
2308 struct ena_hw_stats *stats;
2309
2310 adapter = if_getsoftc(ifp);
2311 stats = &adapter->hw_stats;
2312
2313 switch (cnt) {
2314 case IFCOUNTER_IPACKETS:
2315 return (counter_u64_fetch(stats->rx_packets));
2316 case IFCOUNTER_OPACKETS:
2317 return (counter_u64_fetch(stats->tx_packets));
2318 case IFCOUNTER_IBYTES:
2319 return (counter_u64_fetch(stats->rx_bytes));
2320 case IFCOUNTER_OBYTES:
2321 return (counter_u64_fetch(stats->tx_bytes));
2322 case IFCOUNTER_IQDROPS:
2323 return (counter_u64_fetch(stats->rx_drops));
2324 default:
2325 return (if_get_counter_default(ifp, cnt));
2326 }
2327 }
2328
2329 static int
ena_media_change(if_t ifp)2330 ena_media_change(if_t ifp)
2331 {
2332 /* Media Change is not supported by firmware */
2333 return (0);
2334 }
2335
2336 static void
ena_media_status(if_t ifp,struct ifmediareq * ifmr)2337 ena_media_status(if_t ifp, struct ifmediareq *ifmr)
2338 {
2339 struct ena_adapter *adapter = if_getsoftc(ifp);
2340 ena_trace(ENA_DBG, "enter");
2341
2342 mtx_lock(&adapter->global_mtx);
2343
2344 ifmr->ifm_status = IFM_AVALID;
2345 ifmr->ifm_active = IFM_ETHER;
2346
2347 if (!adapter->link_status) {
2348 mtx_unlock(&adapter->global_mtx);
2349 ena_trace(ENA_INFO, "link_status = false");
2350 return;
2351 }
2352
2353 ifmr->ifm_status |= IFM_ACTIVE;
2354 ifmr->ifm_active |= IFM_10G_T | IFM_FDX;
2355
2356 mtx_unlock(&adapter->global_mtx);
2357 }
2358
2359 static void
ena_init(void * arg)2360 ena_init(void *arg)
2361 {
2362 struct ena_adapter *adapter = (struct ena_adapter *)arg;
2363
2364 if (!adapter->up) {
2365 sx_xlock(&adapter->ioctl_sx);
2366 ena_up(adapter);
2367 sx_unlock(&adapter->ioctl_sx);
2368 }
2369 }
2370
2371 static int
ena_ioctl(if_t ifp,u_long command,caddr_t data)2372 ena_ioctl(if_t ifp, u_long command, caddr_t data)
2373 {
2374 struct ena_adapter *adapter;
2375 struct ifreq *ifr;
2376 int rc;
2377
2378 adapter = ifp->if_softc;
2379 ifr = (struct ifreq *)data;
2380
2381 /*
2382 * Acquiring lock to prevent from running up and down routines parallel.
2383 */
2384 rc = 0;
2385 switch (command) {
2386 case SIOCSIFMTU:
2387 if (ifp->if_mtu == ifr->ifr_mtu)
2388 break;
2389 sx_xlock(&adapter->ioctl_sx);
2390 ena_down(adapter);
2391
2392 ena_change_mtu(ifp, ifr->ifr_mtu);
2393
2394 rc = ena_up(adapter);
2395 sx_unlock(&adapter->ioctl_sx);
2396 break;
2397
2398 case SIOCSIFFLAGS:
2399 if ((ifp->if_flags & IFF_UP) != 0) {
2400 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) {
2401 if ((ifp->if_flags & (IFF_PROMISC |
2402 IFF_ALLMULTI)) != 0) {
2403 device_printf(adapter->pdev,
2404 "ioctl promisc/allmulti\n");
2405 }
2406 } else {
2407 sx_xlock(&adapter->ioctl_sx);
2408 rc = ena_up(adapter);
2409 sx_unlock(&adapter->ioctl_sx);
2410 }
2411 } else {
2412 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) {
2413 sx_xlock(&adapter->ioctl_sx);
2414 ena_down(adapter);
2415 sx_unlock(&adapter->ioctl_sx);
2416 }
2417 }
2418 break;
2419
2420 case SIOCADDMULTI:
2421 case SIOCDELMULTI:
2422 break;
2423
2424 case SIOCSIFMEDIA:
2425 case SIOCGIFMEDIA:
2426 rc = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
2427 break;
2428
2429 case SIOCSIFCAP:
2430 {
2431 int reinit = 0;
2432
2433 if (ifr->ifr_reqcap != ifp->if_capenable) {
2434 ifp->if_capenable = ifr->ifr_reqcap;
2435 reinit = 1;
2436 }
2437
2438 if ((reinit != 0) &&
2439 ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0)) {
2440 sx_xlock(&adapter->ioctl_sx);
2441 ena_down(adapter);
2442 rc = ena_up(adapter);
2443 sx_unlock(&adapter->ioctl_sx);
2444 }
2445 }
2446
2447 break;
2448 default:
2449 rc = ether_ioctl(ifp, command, data);
2450 break;
2451 }
2452
2453 return (rc);
2454 }
2455
2456 static int
ena_get_dev_offloads(struct ena_com_dev_get_features_ctx * feat)2457 ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *feat)
2458 {
2459 int caps = 0;
2460
2461 if ((feat->offload.tx &
2462 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK |
2463 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK |
2464 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK)) != 0)
2465 caps |= IFCAP_TXCSUM;
2466
2467 if ((feat->offload.tx &
2468 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_MASK |
2469 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)) != 0)
2470 caps |= IFCAP_TXCSUM_IPV6;
2471
2472 if ((feat->offload.tx &
2473 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) != 0)
2474 caps |= IFCAP_TSO4;
2475
2476 if ((feat->offload.tx &
2477 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) != 0)
2478 caps |= IFCAP_TSO6;
2479
2480 if ((feat->offload.rx_supported &
2481 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK |
2482 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L3_CSUM_IPV4_MASK)) != 0)
2483 caps |= IFCAP_RXCSUM;
2484
2485 if ((feat->offload.rx_supported &
2486 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) != 0)
2487 caps |= IFCAP_RXCSUM_IPV6;
2488
2489 caps |= IFCAP_LRO | IFCAP_JUMBO_MTU;
2490
2491 return (caps);
2492 }
2493
2494 static void
ena_update_host_info(struct ena_admin_host_info * host_info,if_t ifp)2495 ena_update_host_info(struct ena_admin_host_info *host_info, if_t ifp)
2496 {
2497
2498 host_info->supported_network_features[0] =
2499 (uint32_t)if_getcapabilities(ifp);
2500 }
2501
2502 static void
ena_update_hwassist(struct ena_adapter * adapter)2503 ena_update_hwassist(struct ena_adapter *adapter)
2504 {
2505 if_t ifp = adapter->ifp;
2506 uint32_t feat = adapter->tx_offload_cap;
2507 int cap = if_getcapenable(ifp);
2508 int flags = 0;
2509
2510 if_clearhwassist(ifp);
2511
2512 if ((cap & IFCAP_TXCSUM) != 0) {
2513 if ((feat &
2514 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK) != 0)
2515 flags |= CSUM_IP;
2516 if ((feat &
2517 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK |
2518 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)) != 0)
2519 flags |= CSUM_IP_UDP | CSUM_IP_TCP;
2520 }
2521
2522 if ((cap & IFCAP_TXCSUM_IPV6) != 0)
2523 flags |= CSUM_IP6_UDP | CSUM_IP6_TCP;
2524
2525 if ((cap & IFCAP_TSO4) != 0)
2526 flags |= CSUM_IP_TSO;
2527
2528 if ((cap & IFCAP_TSO6) != 0)
2529 flags |= CSUM_IP6_TSO;
2530
2531 if_sethwassistbits(ifp, flags, 0);
2532 }
2533
2534 static int
ena_setup_ifnet(device_t pdev,struct ena_adapter * adapter,struct ena_com_dev_get_features_ctx * feat)2535 ena_setup_ifnet(device_t pdev, struct ena_adapter *adapter,
2536 struct ena_com_dev_get_features_ctx *feat)
2537 {
2538 if_t ifp;
2539 int caps = 0;
2540
2541 ifp = adapter->ifp = if_gethandle(IFT_ETHER);
2542 if (unlikely(ifp == NULL)) {
2543 ena_trace(ENA_ALERT, "can not allocate ifnet structure\n");
2544 return (ENXIO);
2545 }
2546 if_initname(ifp, device_get_name(pdev), device_get_unit(pdev));
2547 if_setdev(ifp, pdev);
2548 if_setsoftc(ifp, adapter);
2549
2550 if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST);
2551 if_setinitfn(ifp, ena_init);
2552 if_settransmitfn(ifp, ena_mq_start);
2553 if_setqflushfn(ifp, ena_qflush);
2554 if_setioctlfn(ifp, ena_ioctl);
2555 if_setgetcounterfn(ifp, ena_get_counter);
2556
2557 if_setsendqlen(ifp, adapter->tx_ring_size);
2558 if_setsendqready(ifp);
2559 if_setmtu(ifp, ETHERMTU);
2560 if_setbaudrate(ifp, 0);
2561 /* Zeroize capabilities... */
2562 if_setcapabilities(ifp, 0);
2563 if_setcapenable(ifp, 0);
2564 /* check hardware support */
2565 caps = ena_get_dev_offloads(feat);
2566 /* ... and set them */
2567 if_setcapabilitiesbit(ifp, caps, 0);
2568
2569 /* TSO parameters */
2570 ifp->if_hw_tsomax = ENA_TSO_MAXSIZE -
2571 (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN);
2572 ifp->if_hw_tsomaxsegcount = adapter->max_tx_sgl_size - 1;
2573 ifp->if_hw_tsomaxsegsize = ENA_TSO_MAXSIZE;
2574
2575 if_setifheaderlen(ifp, sizeof(struct ether_vlan_header));
2576 if_setcapenable(ifp, if_getcapabilities(ifp));
2577
2578 /*
2579 * Specify the media types supported by this adapter and register
2580 * callbacks to update media and link information
2581 */
2582 ifmedia_init(&adapter->media, IFM_IMASK,
2583 ena_media_change, ena_media_status);
2584 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2585 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2586
2587 ether_ifattach(ifp, adapter->mac_addr);
2588
2589 return (0);
2590 }
2591
2592 static void
ena_down(struct ena_adapter * adapter)2593 ena_down(struct ena_adapter *adapter)
2594 {
2595 int rc;
2596
2597 if (adapter->up) {
2598 device_printf(adapter->pdev, "device is going DOWN\n");
2599
2600 callout_drain(&adapter->timer_service);
2601
2602 adapter->up = false;
2603 if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE,
2604 IFF_DRV_RUNNING);
2605
2606 ena_free_io_irq(adapter);
2607
2608 if (adapter->trigger_reset) {
2609 rc = ena_com_dev_reset(adapter->ena_dev,
2610 adapter->reset_reason);
2611 if (unlikely(rc != 0))
2612 device_printf(adapter->pdev,
2613 "Device reset failed\n");
2614 }
2615
2616 ena_destroy_all_io_queues(adapter);
2617
2618 ena_free_all_tx_bufs(adapter);
2619 ena_free_all_rx_bufs(adapter);
2620 ena_free_all_tx_resources(adapter);
2621 ena_free_all_rx_resources(adapter);
2622
2623 counter_u64_add(adapter->dev_stats.interface_down, 1);
2624 }
2625 }
2626
2627 static void
ena_tx_csum(struct ena_com_tx_ctx * ena_tx_ctx,struct mbuf * mbuf)2628 ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct mbuf *mbuf)
2629 {
2630 struct ena_com_tx_meta *ena_meta;
2631 struct ether_vlan_header *eh;
2632 u32 mss;
2633 bool offload;
2634 uint16_t etype;
2635 int ehdrlen;
2636 struct ip *ip;
2637 int iphlen;
2638 struct tcphdr *th;
2639
2640 offload = false;
2641 ena_meta = &ena_tx_ctx->ena_meta;
2642 mss = mbuf->m_pkthdr.tso_segsz;
2643
2644 if (mss != 0)
2645 offload = true;
2646
2647 if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) != 0)
2648 offload = true;
2649
2650 if ((mbuf->m_pkthdr.csum_flags & CSUM_OFFLOAD) != 0)
2651 offload = true;
2652
2653 if (!offload) {
2654 ena_tx_ctx->meta_valid = 0;
2655 return;
2656 }
2657
2658 /* Determine where frame payload starts. */
2659 eh = mtod(mbuf, struct ether_vlan_header *);
2660 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
2661 etype = ntohs(eh->evl_proto);
2662 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
2663 } else {
2664 etype = ntohs(eh->evl_encap_proto);
2665 ehdrlen = ETHER_HDR_LEN;
2666 }
2667
2668 ip = (struct ip *)(mbuf->m_data + ehdrlen);
2669 iphlen = ip->ip_hl << 2;
2670 th = (struct tcphdr *)((caddr_t)ip + iphlen);
2671
2672 if ((mbuf->m_pkthdr.csum_flags & CSUM_IP) != 0) {
2673 ena_tx_ctx->l3_csum_enable = 1;
2674 }
2675 if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) != 0) {
2676 ena_tx_ctx->tso_enable = 1;
2677 ena_meta->l4_hdr_len = (th->th_off);
2678 }
2679
2680 switch (etype) {
2681 case ETHERTYPE_IP:
2682 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
2683 if ((ip->ip_off & htons(IP_DF)) != 0)
2684 ena_tx_ctx->df = 1;
2685 break;
2686 case ETHERTYPE_IPV6:
2687 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
2688
2689 default:
2690 break;
2691 }
2692
2693 if (ip->ip_p == IPPROTO_TCP) {
2694 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
2695 if ((mbuf->m_pkthdr.csum_flags &
2696 (CSUM_IP_TCP | CSUM_IP6_TCP)) != 0)
2697 ena_tx_ctx->l4_csum_enable = 1;
2698 else
2699 ena_tx_ctx->l4_csum_enable = 0;
2700 } else if (ip->ip_p == IPPROTO_UDP) {
2701 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
2702 if ((mbuf->m_pkthdr.csum_flags &
2703 (CSUM_IP_UDP | CSUM_IP6_UDP)) != 0)
2704 ena_tx_ctx->l4_csum_enable = 1;
2705 else
2706 ena_tx_ctx->l4_csum_enable = 0;
2707 } else {
2708 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UNKNOWN;
2709 ena_tx_ctx->l4_csum_enable = 0;
2710 }
2711
2712 ena_meta->mss = mss;
2713 ena_meta->l3_hdr_len = iphlen;
2714 ena_meta->l3_hdr_offset = ehdrlen;
2715 ena_tx_ctx->meta_valid = 1;
2716 }
2717
2718 static int
ena_check_and_collapse_mbuf(struct ena_ring * tx_ring,struct mbuf ** mbuf)2719 ena_check_and_collapse_mbuf(struct ena_ring *tx_ring, struct mbuf **mbuf)
2720 {
2721 struct ena_adapter *adapter;
2722 struct mbuf *collapsed_mbuf;
2723 int num_frags;
2724
2725 adapter = tx_ring->adapter;
2726 num_frags = ena_mbuf_count(*mbuf);
2727
2728 /* One segment must be reserved for configuration descriptor. */
2729 if (num_frags < adapter->max_tx_sgl_size)
2730 return (0);
2731 counter_u64_add(tx_ring->tx_stats.collapse, 1);
2732
2733 collapsed_mbuf = m_collapse(*mbuf, M_NOWAIT,
2734 adapter->max_tx_sgl_size - 1);
2735 if (unlikely(collapsed_mbuf == NULL)) {
2736 counter_u64_add(tx_ring->tx_stats.collapse_err, 1);
2737 return (ENOMEM);
2738 }
2739
2740 /* If mbuf was collapsed succesfully, original mbuf is released. */
2741 *mbuf = collapsed_mbuf;
2742
2743 return (0);
2744 }
2745
2746 static int
ena_xmit_mbuf(struct ena_ring * tx_ring,struct mbuf ** mbuf)2747 ena_xmit_mbuf(struct ena_ring *tx_ring, struct mbuf **mbuf)
2748 {
2749 struct ena_adapter *adapter;
2750 struct ena_tx_buffer *tx_info;
2751 struct ena_com_tx_ctx ena_tx_ctx;
2752 struct ena_com_dev *ena_dev;
2753 struct ena_com_buf *ena_buf;
2754 struct ena_com_io_sq* io_sq;
2755 bus_dma_segment_t segs[ENA_BUS_DMA_SEGS];
2756 void *push_hdr;
2757 uint16_t next_to_use;
2758 uint16_t req_id;
2759 uint16_t push_len;
2760 uint16_t ena_qid;
2761 uint32_t nsegs, header_len;
2762 int i, rc;
2763 int nb_hw_desc;
2764
2765 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id);
2766 adapter = tx_ring->que->adapter;
2767 ena_dev = adapter->ena_dev;
2768 io_sq = &ena_dev->io_sq_queues[ena_qid];
2769
2770 rc = ena_check_and_collapse_mbuf(tx_ring, mbuf);
2771 if (unlikely(rc != 0)) {
2772 ena_trace(ENA_WARNING,
2773 "Failed to collapse mbuf! err: %d", rc);
2774 return (rc);
2775 }
2776
2777 next_to_use = tx_ring->next_to_use;
2778 req_id = tx_ring->free_tx_ids[next_to_use];
2779 tx_info = &tx_ring->tx_buffer_info[req_id];
2780
2781 tx_info->mbuf = *mbuf;
2782 tx_info->num_of_bufs = 0;
2783
2784 ena_buf = tx_info->bufs;
2785
2786 ena_trace(ENA_DBG | ENA_TXPTH, "Tx: %d bytes", (*mbuf)->m_pkthdr.len);
2787
2788 push_len = 0;
2789 /*
2790 * header_len is just a hint for the device. Because FreeBSD is not
2791 * giving us information about packet header length and it is not
2792 * guaranteed that all packet headers will be in the 1st mbuf, setting
2793 * header_len to 0 is making the device ignore this value and resolve
2794 * header on it's own.
2795 */
2796 header_len = 0;
2797 push_hdr = NULL;
2798
2799 rc = bus_dmamap_load_mbuf_sg(adapter->tx_buf_tag, tx_info->map,
2800 *mbuf, segs, &nsegs, BUS_DMA_NOWAIT);
2801
2802 if (unlikely((rc != 0) || (nsegs == 0))) {
2803 ena_trace(ENA_WARNING,
2804 "dmamap load failed! err: %d nsegs: %d", rc, nsegs);
2805 counter_u64_add(tx_ring->tx_stats.dma_mapping_err, 1);
2806 tx_info->mbuf = NULL;
2807 if (rc == ENOMEM)
2808 return (ENA_COM_NO_MEM);
2809 else
2810 return (ENA_COM_INVAL);
2811 }
2812
2813 for (i = 0; i < nsegs; i++) {
2814 ena_buf->len = segs[i].ds_len;
2815 ena_buf->paddr = segs[i].ds_addr;
2816 ena_buf++;
2817 }
2818 tx_info->num_of_bufs = nsegs;
2819
2820 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
2821 ena_tx_ctx.ena_bufs = tx_info->bufs;
2822 ena_tx_ctx.push_header = push_hdr;
2823 ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
2824 ena_tx_ctx.req_id = req_id;
2825 ena_tx_ctx.header_len = header_len;
2826
2827 /* Set flags and meta data */
2828 ena_tx_csum(&ena_tx_ctx, *mbuf);
2829 /* Prepare the packet's descriptors and send them to device */
2830 rc = ena_com_prepare_tx(io_sq, &ena_tx_ctx, &nb_hw_desc);
2831 if (unlikely(rc != 0)) {
2832 ena_trace(ENA_DBG | ENA_TXPTH, "failed to prepare tx bufs\n");
2833 counter_u64_add(tx_ring->tx_stats.prepare_ctx_err, 1);
2834 goto dma_error;
2835 }
2836
2837 counter_enter();
2838 counter_u64_add_protected(tx_ring->tx_stats.cnt, 1);
2839 counter_u64_add_protected(tx_ring->tx_stats.bytes,
2840 (*mbuf)->m_pkthdr.len);
2841
2842 counter_u64_add_protected(adapter->hw_stats.tx_packets, 1);
2843 counter_u64_add_protected(adapter->hw_stats.tx_bytes,
2844 (*mbuf)->m_pkthdr.len);
2845 counter_exit();
2846
2847 tx_info->tx_descs = nb_hw_desc;
2848 getbinuptime(&tx_info->timestamp);
2849 tx_info->print_once = true;
2850
2851 tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
2852 tx_ring->ring_size);
2853
2854 bus_dmamap_sync(adapter->tx_buf_tag, tx_info->map,
2855 BUS_DMASYNC_PREWRITE);
2856
2857 return (0);
2858
2859 dma_error:
2860 tx_info->mbuf = NULL;
2861 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map);
2862
2863 return (rc);
2864 }
2865
2866 static void
ena_start_xmit(struct ena_ring * tx_ring)2867 ena_start_xmit(struct ena_ring *tx_ring)
2868 {
2869 struct mbuf *mbuf;
2870 struct ena_adapter *adapter = tx_ring->adapter;
2871 struct ena_com_io_sq* io_sq;
2872 int ena_qid;
2873 int acum_pkts = 0;
2874 int ret = 0;
2875
2876 if (unlikely((if_getdrvflags(adapter->ifp) & IFF_DRV_RUNNING) == 0))
2877 return;
2878
2879 if (unlikely(!adapter->link_status))
2880 return;
2881
2882 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id);
2883 io_sq = &adapter->ena_dev->io_sq_queues[ena_qid];
2884
2885 while ((mbuf = drbr_peek(adapter->ifp, tx_ring->br)) != NULL) {
2886 ena_trace(ENA_DBG | ENA_TXPTH, "\ndequeued mbuf %p with flags %#x and"
2887 " header csum flags %#jx",
2888 mbuf, mbuf->m_flags, (uint64_t)mbuf->m_pkthdr.csum_flags);
2889
2890 if (unlikely(!ena_com_sq_have_enough_space(io_sq,
2891 ENA_TX_CLEANUP_THRESHOLD)))
2892 ena_tx_cleanup(tx_ring);
2893
2894 if (unlikely((ret = ena_xmit_mbuf(tx_ring, &mbuf)) != 0)) {
2895 if (ret == ENA_COM_NO_MEM) {
2896 drbr_putback(adapter->ifp, tx_ring->br, mbuf);
2897 } else if (ret == ENA_COM_NO_SPACE) {
2898 drbr_putback(adapter->ifp, tx_ring->br, mbuf);
2899 } else {
2900 m_freem(mbuf);
2901 drbr_advance(adapter->ifp, tx_ring->br);
2902 }
2903
2904 break;
2905 }
2906
2907 drbr_advance(adapter->ifp, tx_ring->br);
2908
2909 if (unlikely((if_getdrvflags(adapter->ifp) &
2910 IFF_DRV_RUNNING) == 0))
2911 return;
2912
2913 acum_pkts++;
2914
2915 BPF_MTAP(adapter->ifp, mbuf);
2916
2917 if (unlikely(acum_pkts == DB_THRESHOLD)) {
2918 acum_pkts = 0;
2919 wmb();
2920 /* Trigger the dma engine */
2921 ena_com_write_sq_doorbell(io_sq);
2922 counter_u64_add(tx_ring->tx_stats.doorbells, 1);
2923 }
2924
2925 }
2926
2927 if (likely(acum_pkts != 0)) {
2928 wmb();
2929 /* Trigger the dma engine */
2930 ena_com_write_sq_doorbell(io_sq);
2931 counter_u64_add(tx_ring->tx_stats.doorbells, 1);
2932 }
2933
2934 if (!ena_com_sq_have_enough_space(io_sq, ENA_TX_CLEANUP_THRESHOLD))
2935 ena_tx_cleanup(tx_ring);
2936 }
2937
2938 static void
ena_deferred_mq_start(void * arg,int pending)2939 ena_deferred_mq_start(void *arg, int pending)
2940 {
2941 struct ena_ring *tx_ring = (struct ena_ring *)arg;
2942 struct ifnet *ifp = tx_ring->adapter->ifp;
2943
2944 while (!drbr_empty(ifp, tx_ring->br) &&
2945 (if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) {
2946 ENA_RING_MTX_LOCK(tx_ring);
2947 ena_start_xmit(tx_ring);
2948 ENA_RING_MTX_UNLOCK(tx_ring);
2949 }
2950 }
2951
2952 static int
ena_mq_start(if_t ifp,struct mbuf * m)2953 ena_mq_start(if_t ifp, struct mbuf *m)
2954 {
2955 struct ena_adapter *adapter = ifp->if_softc;
2956 struct ena_ring *tx_ring;
2957 int ret, is_drbr_empty;
2958 uint32_t i;
2959
2960 if (unlikely((if_getdrvflags(adapter->ifp) & IFF_DRV_RUNNING) == 0))
2961 return (ENODEV);
2962
2963 /* Which queue to use */
2964 /*
2965 * If everything is setup correctly, it should be the
2966 * same bucket that the current CPU we're on is.
2967 * It should improve performance.
2968 */
2969 if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE) {
2970 #ifdef RSS
2971 if (rss_hash2bucket(m->m_pkthdr.flowid,
2972 M_HASHTYPE_GET(m), &i) == 0) {
2973 i = i % adapter->num_queues;
2974
2975 } else
2976 #endif
2977 {
2978 i = m->m_pkthdr.flowid % adapter->num_queues;
2979 }
2980 } else {
2981 i = curcpu % adapter->num_queues;
2982 }
2983 tx_ring = &adapter->tx_ring[i];
2984
2985 /* Check if drbr is empty before putting packet */
2986 is_drbr_empty = drbr_empty(ifp, tx_ring->br);
2987 ret = drbr_enqueue(ifp, tx_ring->br, m);
2988 if (unlikely(ret != 0)) {
2989 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
2990 return (ret);
2991 }
2992
2993 if ((is_drbr_empty != 0) && (ENA_RING_MTX_TRYLOCK(tx_ring) != 0)) {
2994 ena_start_xmit(tx_ring);
2995 ENA_RING_MTX_UNLOCK(tx_ring);
2996 } else {
2997 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
2998 }
2999
3000 return (0);
3001 }
3002
3003 static void
ena_qflush(if_t ifp)3004 ena_qflush(if_t ifp)
3005 {
3006 struct ena_adapter *adapter = ifp->if_softc;
3007 struct ena_ring *tx_ring = adapter->tx_ring;
3008 int i;
3009
3010 for(i = 0; i < adapter->num_queues; ++i, ++tx_ring)
3011 if (!drbr_empty(ifp, tx_ring->br)) {
3012 ENA_RING_MTX_LOCK(tx_ring);
3013 drbr_flush(ifp, tx_ring->br);
3014 ENA_RING_MTX_UNLOCK(tx_ring);
3015 }
3016
3017 if_qflush(ifp);
3018 }
3019
3020 static int
ena_calc_io_queue_num(struct ena_adapter * adapter,struct ena_com_dev_get_features_ctx * get_feat_ctx)3021 ena_calc_io_queue_num(struct ena_adapter *adapter,
3022 struct ena_com_dev_get_features_ctx *get_feat_ctx)
3023 {
3024 int io_sq_num, io_cq_num, io_queue_num;
3025
3026 io_sq_num = get_feat_ctx->max_queues.max_sq_num;
3027 io_cq_num = get_feat_ctx->max_queues.max_cq_num;
3028
3029 io_queue_num = min_t(int, mp_ncpus, ENA_MAX_NUM_IO_QUEUES);
3030 io_queue_num = min_t(int, io_queue_num, io_sq_num);
3031 io_queue_num = min_t(int, io_queue_num, io_cq_num);
3032 /* 1 IRQ for for mgmnt and 1 IRQ for each TX/RX pair */
3033 io_queue_num = min_t(int, io_queue_num,
3034 pci_msix_count(adapter->pdev) - 1);
3035 #ifdef RSS
3036 io_queue_num = min_t(int, io_queue_num, rss_getnumbuckets());
3037 #endif
3038
3039 return (io_queue_num);
3040 }
3041
3042 static int
ena_calc_queue_size(struct ena_adapter * adapter,uint16_t * max_tx_sgl_size,uint16_t * max_rx_sgl_size,struct ena_com_dev_get_features_ctx * feat)3043 ena_calc_queue_size(struct ena_adapter *adapter, uint16_t *max_tx_sgl_size,
3044 uint16_t *max_rx_sgl_size, struct ena_com_dev_get_features_ctx *feat)
3045 {
3046 uint32_t queue_size = ENA_DEFAULT_RING_SIZE;
3047 uint32_t v;
3048 uint32_t q;
3049
3050 queue_size = min_t(uint32_t, queue_size,
3051 feat->max_queues.max_cq_depth);
3052 queue_size = min_t(uint32_t, queue_size,
3053 feat->max_queues.max_sq_depth);
3054
3055 /* round down to the nearest power of 2 */
3056 v = queue_size;
3057 while (v != 0) {
3058 if (powerof2(queue_size) != 0)
3059 break;
3060 v /= 2;
3061 q = rounddown2(queue_size, v);
3062 if (q != 0) {
3063 queue_size = q;
3064 break;
3065 }
3066 }
3067
3068 if (unlikely(queue_size == 0)) {
3069 device_printf(adapter->pdev, "Invalid queue size\n");
3070 return (ENA_COM_FAULT);
3071 }
3072
3073 *max_tx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS,
3074 feat->max_queues.max_packet_tx_descs);
3075 *max_rx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS,
3076 feat->max_queues.max_packet_rx_descs);
3077
3078 return (queue_size);
3079 }
3080
3081 static int
ena_rss_init_default(struct ena_adapter * adapter)3082 ena_rss_init_default(struct ena_adapter *adapter)
3083 {
3084 struct ena_com_dev *ena_dev = adapter->ena_dev;
3085 device_t dev = adapter->pdev;
3086 int qid, rc, i;
3087
3088 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
3089 if (unlikely(rc != 0)) {
3090 device_printf(dev, "Cannot init indirect table\n");
3091 return (rc);
3092 }
3093
3094 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
3095 #ifdef RSS
3096 qid = rss_get_indirection_to_bucket(i);
3097 qid = qid % adapter->num_queues;
3098 #else
3099 qid = i % adapter->num_queues;
3100 #endif
3101 rc = ena_com_indirect_table_fill_entry(ena_dev, i,
3102 ENA_IO_RXQ_IDX(qid));
3103 if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) {
3104 device_printf(dev, "Cannot fill indirect table\n");
3105 goto err_rss_destroy;
3106 }
3107 }
3108
3109 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL,
3110 ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
3111 if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) {
3112 device_printf(dev, "Cannot fill hash function\n");
3113 goto err_rss_destroy;
3114 }
3115
3116 rc = ena_com_set_default_hash_ctrl(ena_dev);
3117 if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) {
3118 device_printf(dev, "Cannot fill hash control\n");
3119 goto err_rss_destroy;
3120 }
3121
3122 return (0);
3123
3124 err_rss_destroy:
3125 ena_com_rss_destroy(ena_dev);
3126 return (rc);
3127 }
3128
3129 static void
ena_rss_init_default_deferred(void * arg)3130 ena_rss_init_default_deferred(void *arg)
3131 {
3132 struct ena_adapter *adapter;
3133 devclass_t dc;
3134 int max;
3135 int rc;
3136
3137 dc = devclass_find("ena");
3138 if (unlikely(dc == NULL)) {
3139 ena_trace(ENA_ALERT, "No devclass ena\n");
3140 return;
3141 }
3142
3143 max = devclass_get_maxunit(dc);
3144 while (max-- >= 0) {
3145 adapter = devclass_get_softc(dc, max);
3146 if (adapter != NULL) {
3147 rc = ena_rss_init_default(adapter);
3148 adapter->rss_support = true;
3149 if (unlikely(rc != 0)) {
3150 device_printf(adapter->pdev,
3151 "WARNING: RSS was not properly initialized,"
3152 " it will affect bandwidth\n");
3153 adapter->rss_support = false;
3154 }
3155 }
3156 }
3157 }
3158 SYSINIT(ena_rss_init, SI_SUB_KICK_SCHEDULER, SI_ORDER_SECOND, ena_rss_init_default_deferred, NULL);
3159
3160 static void
ena_config_host_info(struct ena_com_dev * ena_dev)3161 ena_config_host_info(struct ena_com_dev *ena_dev)
3162 {
3163 struct ena_admin_host_info *host_info;
3164 int rc;
3165
3166 /* Allocate only the host info */
3167 rc = ena_com_allocate_host_info(ena_dev);
3168 if (unlikely(rc != 0)) {
3169 ena_trace(ENA_ALERT, "Cannot allocate host info\n");
3170 return;
3171 }
3172
3173 host_info = ena_dev->host_attr.host_info;
3174
3175 host_info->os_type = ENA_ADMIN_OS_FREEBSD;
3176 host_info->kernel_ver = osreldate;
3177
3178 sprintf(host_info->kernel_ver_str, "%d", osreldate);
3179 host_info->os_dist = 0;
3180 strncpy(host_info->os_dist_str, osrelease,
3181 sizeof(host_info->os_dist_str) - 1);
3182
3183 host_info->driver_version =
3184 (DRV_MODULE_VER_MAJOR) |
3185 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
3186 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT);
3187
3188 rc = ena_com_set_host_attributes(ena_dev);
3189 if (unlikely(rc != 0)) {
3190 if (rc == EOPNOTSUPP)
3191 ena_trace(ENA_WARNING, "Cannot set host attributes\n");
3192 else
3193 ena_trace(ENA_ALERT, "Cannot set host attributes\n");
3194
3195 goto err;
3196 }
3197
3198 return;
3199
3200 err:
3201 ena_com_delete_host_info(ena_dev);
3202 }
3203
3204 static int
ena_device_init(struct ena_adapter * adapter,device_t pdev,struct ena_com_dev_get_features_ctx * get_feat_ctx,int * wd_active)3205 ena_device_init(struct ena_adapter *adapter, device_t pdev,
3206 struct ena_com_dev_get_features_ctx *get_feat_ctx, int *wd_active)
3207 {
3208 struct ena_com_dev* ena_dev = adapter->ena_dev;
3209 bool readless_supported;
3210 uint32_t aenq_groups;
3211 int dma_width;
3212 int rc;
3213
3214 rc = ena_com_mmio_reg_read_request_init(ena_dev);
3215 if (unlikely(rc != 0)) {
3216 device_printf(pdev, "failed to init mmio read less\n");
3217 return (rc);
3218 }
3219
3220 /*
3221 * The PCIe configuration space revision id indicate if mmio reg
3222 * read is disabled
3223 */
3224 readless_supported = !(pci_get_revid(pdev) & ENA_MMIO_DISABLE_REG_READ);
3225 ena_com_set_mmio_read_mode(ena_dev, readless_supported);
3226
3227 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
3228 if (unlikely(rc != 0)) {
3229 device_printf(pdev, "Can not reset device\n");
3230 goto err_mmio_read_less;
3231 }
3232
3233 rc = ena_com_validate_version(ena_dev);
3234 if (unlikely(rc != 0)) {
3235 device_printf(pdev, "device version is too low\n");
3236 goto err_mmio_read_less;
3237 }
3238
3239 dma_width = ena_com_get_dma_width(ena_dev);
3240 if (unlikely(dma_width < 0)) {
3241 device_printf(pdev, "Invalid dma width value %d", dma_width);
3242 rc = dma_width;
3243 goto err_mmio_read_less;
3244 }
3245 adapter->dma_width = dma_width;
3246
3247 /* ENA admin level init */
3248 rc = ena_com_admin_init(ena_dev, &aenq_handlers, true);
3249 if (unlikely(rc != 0)) {
3250 device_printf(pdev,
3251 "Can not initialize ena admin queue with device\n");
3252 goto err_mmio_read_less;
3253 }
3254
3255 /*
3256 * To enable the msix interrupts the driver needs to know the number
3257 * of queues. So the driver uses polling mode to retrieve this
3258 * information
3259 */
3260 ena_com_set_admin_polling_mode(ena_dev, true);
3261
3262 ena_config_host_info(ena_dev);
3263
3264 /* Get Device Attributes */
3265 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
3266 if (unlikely(rc != 0)) {
3267 device_printf(pdev,
3268 "Cannot get attribute for ena device rc: %d\n", rc);
3269 goto err_admin_init;
3270 }
3271
3272 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | BIT(ENA_ADMIN_KEEP_ALIVE);
3273
3274 aenq_groups &= get_feat_ctx->aenq.supported_groups;
3275 rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
3276 if (unlikely(rc != 0)) {
3277 device_printf(pdev, "Cannot configure aenq groups rc: %d\n", rc);
3278 goto err_admin_init;
3279 }
3280
3281 *wd_active = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
3282
3283 return (0);
3284
3285 err_admin_init:
3286 ena_com_delete_host_info(ena_dev);
3287 ena_com_admin_destroy(ena_dev);
3288 err_mmio_read_less:
3289 ena_com_mmio_reg_read_request_destroy(ena_dev);
3290
3291 return (rc);
3292 }
3293
ena_enable_msix_and_set_admin_interrupts(struct ena_adapter * adapter,int io_vectors)3294 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter,
3295 int io_vectors)
3296 {
3297 struct ena_com_dev *ena_dev = adapter->ena_dev;
3298 int rc;
3299
3300 rc = ena_enable_msix(adapter);
3301 if (unlikely(rc != 0)) {
3302 device_printf(adapter->pdev, "Error with MSI-X enablement\n");
3303 return (rc);
3304 }
3305
3306 ena_setup_mgmnt_intr(adapter);
3307
3308 rc = ena_request_mgmnt_irq(adapter);
3309 if (unlikely(rc != 0)) {
3310 device_printf(adapter->pdev, "Cannot setup mgmnt queue intr\n");
3311 goto err_disable_msix;
3312 }
3313
3314 ena_com_set_admin_polling_mode(ena_dev, false);
3315
3316 ena_com_admin_aenq_enable(ena_dev);
3317
3318 return (0);
3319
3320 err_disable_msix:
3321 ena_disable_msix(adapter);
3322
3323 return (rc);
3324 }
3325
3326 /* Function called on ENA_ADMIN_KEEP_ALIVE event */
ena_keep_alive_wd(void * adapter_data,struct ena_admin_aenq_entry * aenq_e)3327 static void ena_keep_alive_wd(void *adapter_data,
3328 struct ena_admin_aenq_entry *aenq_e)
3329 {
3330 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3331 struct ena_admin_aenq_keep_alive_desc *desc;
3332 sbintime_t stime;
3333 uint64_t rx_drops;
3334
3335 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
3336
3337 rx_drops = ((uint64_t)desc->rx_drops_high << 32) | desc->rx_drops_low;
3338 counter_u64_zero(adapter->hw_stats.rx_drops);
3339 counter_u64_add(adapter->hw_stats.rx_drops, rx_drops);
3340
3341 stime = getsbinuptime();
3342 atomic_store_rel_64(&adapter->keep_alive_timestamp, stime);
3343 }
3344
3345 /* Check for keep alive expiration */
check_for_missing_keep_alive(struct ena_adapter * adapter)3346 static void check_for_missing_keep_alive(struct ena_adapter *adapter)
3347 {
3348 sbintime_t timestamp, time;
3349
3350 if (adapter->wd_active == 0)
3351 return;
3352
3353 if (likely(adapter->keep_alive_timeout == 0))
3354 return;
3355
3356 timestamp = atomic_load_acq_64(&adapter->keep_alive_timestamp);
3357 time = getsbinuptime() - timestamp;
3358 if (unlikely(time > adapter->keep_alive_timeout)) {
3359 device_printf(adapter->pdev,
3360 "Keep alive watchdog timeout.\n");
3361 counter_u64_add(adapter->dev_stats.wd_expired, 1);
3362 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
3363 adapter->trigger_reset = true;
3364 }
3365 }
3366
3367 /* Check if admin queue is enabled */
check_for_admin_com_state(struct ena_adapter * adapter)3368 static void check_for_admin_com_state(struct ena_adapter *adapter)
3369 {
3370 if (unlikely(ena_com_get_admin_running_state(adapter->ena_dev) ==
3371 false)) {
3372 device_printf(adapter->pdev,
3373 "ENA admin queue is not in running state!\n");
3374 counter_u64_add(adapter->dev_stats.admin_q_pause, 1);
3375 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
3376 adapter->trigger_reset = true;
3377 }
3378 }
3379
3380 static int
check_missing_comp_in_queue(struct ena_adapter * adapter,struct ena_ring * tx_ring)3381 check_missing_comp_in_queue(struct ena_adapter *adapter,
3382 struct ena_ring *tx_ring)
3383 {
3384 struct bintime curtime, time;
3385 struct ena_tx_buffer *tx_buf;
3386 uint32_t missed_tx = 0;
3387 int i;
3388
3389 getbinuptime(&curtime);
3390
3391 for (i = 0; i < tx_ring->ring_size; i++) {
3392 tx_buf = &tx_ring->tx_buffer_info[i];
3393
3394 if (bintime_isset(&tx_buf->timestamp) == 0)
3395 continue;
3396
3397 time = curtime;
3398 bintime_sub(&time, &tx_buf->timestamp);
3399
3400 /* Check again if packet is still waiting */
3401 if (unlikely(bttosbt(time) > adapter->missing_tx_timeout)) {
3402
3403 if (!tx_buf->print_once)
3404 ena_trace(ENA_WARNING, "Found a Tx that wasn't "
3405 "completed on time, qid %d, index %d.\n",
3406 tx_ring->qid, i);
3407
3408 tx_buf->print_once = true;
3409 missed_tx++;
3410 counter_u64_add(tx_ring->tx_stats.missing_tx_comp, 1);
3411
3412 if (unlikely(missed_tx >
3413 adapter->missing_tx_threshold)) {
3414 device_printf(adapter->pdev,
3415 "The number of lost tx completion "
3416 "is above the threshold (%d > %d). "
3417 "Reset the device\n",
3418 missed_tx, adapter->missing_tx_threshold);
3419 adapter->reset_reason =
3420 ENA_REGS_RESET_MISS_TX_CMPL;
3421 adapter->trigger_reset = true;
3422 return (EIO);
3423 }
3424 }
3425 }
3426
3427 return (0);
3428 }
3429
3430 /*
3431 * Check for TX which were not completed on time.
3432 * Timeout is defined by "missing_tx_timeout".
3433 * Reset will be performed if number of incompleted
3434 * transactions exceeds "missing_tx_threshold".
3435 */
3436 static void
check_for_missing_tx_completions(struct ena_adapter * adapter)3437 check_for_missing_tx_completions(struct ena_adapter *adapter)
3438 {
3439 struct ena_ring *tx_ring;
3440 int i, budget, rc;
3441
3442 /* Make sure the driver doesn't turn the device in other process */
3443 rmb();
3444
3445 if (!adapter->up)
3446 return;
3447
3448 if (adapter->trigger_reset)
3449 return;
3450
3451 if (adapter->missing_tx_timeout == 0)
3452 return;
3453
3454 budget = adapter->missing_tx_max_queues;
3455
3456 for (i = adapter->next_monitored_tx_qid; i < adapter->num_queues; i++) {
3457 tx_ring = &adapter->tx_ring[i];
3458
3459 rc = check_missing_comp_in_queue(adapter, tx_ring);
3460 if (unlikely(rc != 0))
3461 return;
3462
3463 budget--;
3464 if (budget == 0) {
3465 i++;
3466 break;
3467 }
3468 }
3469
3470 adapter->next_monitored_tx_qid = i % adapter->num_queues;
3471 }
3472
3473 /* trigger deferred rx cleanup after 2 consecutive detections */
3474 #define EMPTY_RX_REFILL 2
3475 /* For the rare case where the device runs out of Rx descriptors and the
3476 * msix handler failed to refill new Rx descriptors (due to a lack of memory
3477 * for example).
3478 * This case will lead to a deadlock:
3479 * The device won't send interrupts since all the new Rx packets will be dropped
3480 * The msix handler won't allocate new Rx descriptors so the device won't be
3481 * able to send new packets.
3482 *
3483 * When such a situation is detected - execute rx cleanup task in another thread
3484 */
3485 static void
check_for_empty_rx_ring(struct ena_adapter * adapter)3486 check_for_empty_rx_ring(struct ena_adapter *adapter)
3487 {
3488 struct ena_ring *rx_ring;
3489 int i, refill_required;
3490
3491 if (!adapter->up)
3492 return;
3493
3494 if (adapter->trigger_reset)
3495 return;
3496
3497 for (i = 0; i < adapter->num_queues; i++) {
3498 rx_ring = &adapter->rx_ring[i];
3499
3500 refill_required = ena_com_free_desc(rx_ring->ena_com_io_sq);
3501 if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
3502 rx_ring->empty_rx_queue++;
3503
3504 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) {
3505 counter_u64_add(rx_ring->rx_stats.empty_rx_ring,
3506 1);
3507
3508 device_printf(adapter->pdev,
3509 "trigger refill for ring %d\n", i);
3510
3511 taskqueue_enqueue(rx_ring->cmpl_tq,
3512 &rx_ring->cmpl_task);
3513 rx_ring->empty_rx_queue = 0;
3514 }
3515 } else {
3516 rx_ring->empty_rx_queue = 0;
3517 }
3518 }
3519 }
3520
3521 static void
ena_timer_service(void * data)3522 ena_timer_service(void *data)
3523 {
3524 struct ena_adapter *adapter = (struct ena_adapter *)data;
3525 struct ena_admin_host_info *host_info =
3526 adapter->ena_dev->host_attr.host_info;
3527
3528 check_for_missing_keep_alive(adapter);
3529
3530 check_for_admin_com_state(adapter);
3531
3532 check_for_missing_tx_completions(adapter);
3533
3534 check_for_empty_rx_ring(adapter);
3535
3536 if (host_info != NULL)
3537 ena_update_host_info(host_info, adapter->ifp);
3538
3539 if (unlikely(adapter->trigger_reset)) {
3540 device_printf(adapter->pdev, "Trigger reset is on\n");
3541 taskqueue_enqueue(adapter->reset_tq, &adapter->reset_task);
3542 return;
3543 }
3544
3545 /*
3546 * Schedule another timeout one second from now.
3547 */
3548 callout_schedule_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 0);
3549 }
3550
3551 static void
ena_reset_task(void * arg,int pending)3552 ena_reset_task(void *arg, int pending)
3553 {
3554 struct ena_com_dev_get_features_ctx get_feat_ctx;
3555 struct ena_adapter *adapter = (struct ena_adapter *)arg;
3556 struct ena_com_dev *ena_dev = adapter->ena_dev;
3557 bool dev_up;
3558 int rc;
3559
3560 if (unlikely(!adapter->trigger_reset)) {
3561 device_printf(adapter->pdev,
3562 "device reset scheduled but trigger_reset is off\n");
3563 return;
3564 }
3565
3566 sx_xlock(&adapter->ioctl_sx);
3567
3568 callout_drain(&adapter->timer_service);
3569
3570 dev_up = adapter->up;
3571
3572 ena_com_set_admin_running_state(ena_dev, false);
3573 ena_down(adapter);
3574 ena_free_mgmnt_irq(adapter);
3575 ena_disable_msix(adapter);
3576 ena_com_abort_admin_commands(ena_dev);
3577 ena_com_wait_for_abort_completion(ena_dev);
3578 ena_com_admin_destroy(ena_dev);
3579 ena_com_mmio_reg_read_request_destroy(ena_dev);
3580
3581 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3582 adapter->trigger_reset = false;
3583
3584 /* Finished destroy part. Restart the device */
3585 rc = ena_device_init(adapter, adapter->pdev, &get_feat_ctx,
3586 &adapter->wd_active);
3587 if (unlikely(rc != 0)) {
3588 device_printf(adapter->pdev,
3589 "ENA device init failed! (err: %d)\n", rc);
3590 goto err_dev_free;
3591 }
3592
3593 rc = ena_enable_msix_and_set_admin_interrupts(adapter,
3594 adapter->num_queues);
3595 if (unlikely(rc != 0)) {
3596 device_printf(adapter->pdev, "Enable MSI-X failed\n");
3597 goto err_com_free;
3598 }
3599
3600 /* If the interface was up before the reset bring it up */
3601 if (dev_up) {
3602 rc = ena_up(adapter);
3603 if (unlikely(rc != 0)) {
3604 device_printf(adapter->pdev,
3605 "Failed to create I/O queues\n");
3606 goto err_msix_free;
3607 }
3608 }
3609
3610 callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S,
3611 ena_timer_service, (void *)adapter, 0);
3612
3613 sx_unlock(&adapter->ioctl_sx);
3614
3615 return;
3616
3617 err_msix_free:
3618 ena_free_mgmnt_irq(adapter);
3619 ena_disable_msix(adapter);
3620 err_com_free:
3621 ena_com_admin_destroy(ena_dev);
3622 err_dev_free:
3623 device_printf(adapter->pdev, "ENA reset failed!\n");
3624 adapter->running = false;
3625 sx_unlock(&adapter->ioctl_sx);
3626 }
3627
3628 /**
3629 * ena_attach - Device Initialization Routine
3630 * @pdev: device information struct
3631 *
3632 * Returns 0 on success, otherwise on failure.
3633 *
3634 * ena_attach initializes an adapter identified by a device structure.
3635 * The OS initialization, configuring of the adapter private structure,
3636 * and a hardware reset occur.
3637 **/
3638 static int
ena_attach(device_t pdev)3639 ena_attach(device_t pdev)
3640 {
3641 struct ena_com_dev_get_features_ctx get_feat_ctx;
3642 static int version_printed;
3643 struct ena_adapter *adapter;
3644 struct ena_com_dev *ena_dev = NULL;
3645 uint16_t tx_sgl_size = 0;
3646 uint16_t rx_sgl_size = 0;
3647 int io_queue_num;
3648 int queue_size;
3649 int rc;
3650 adapter = device_get_softc(pdev);
3651 adapter->pdev = pdev;
3652
3653 mtx_init(&adapter->global_mtx, "ENA global mtx", NULL, MTX_DEF);
3654 sx_init(&adapter->ioctl_sx, "ENA ioctl sx");
3655
3656 /* Set up the timer service */
3657 callout_init_mtx(&adapter->timer_service, &adapter->global_mtx, 0);
3658 adapter->keep_alive_timeout = DEFAULT_KEEP_ALIVE_TO;
3659 adapter->missing_tx_timeout = DEFAULT_TX_CMP_TO;
3660 adapter->missing_tx_max_queues = DEFAULT_TX_MONITORED_QUEUES;
3661 adapter->missing_tx_threshold = DEFAULT_TX_CMP_THRESHOLD;
3662
3663 if (version_printed++ == 0)
3664 device_printf(pdev, "%s\n", ena_version);
3665
3666 rc = ena_allocate_pci_resources(adapter);
3667 if (unlikely(rc != 0)) {
3668 device_printf(pdev, "PCI resource allocation failed!\n");
3669 ena_free_pci_resources(adapter);
3670 return (rc);
3671 }
3672
3673 /* Allocate memory for ena_dev structure */
3674 ena_dev = malloc(sizeof(struct ena_com_dev), M_DEVBUF,
3675 M_WAITOK | M_ZERO);
3676
3677 adapter->ena_dev = ena_dev;
3678 ena_dev->dmadev = pdev;
3679 ena_dev->bus = malloc(sizeof(struct ena_bus), M_DEVBUF,
3680 M_WAITOK | M_ZERO);
3681
3682 /* Store register resources */
3683 ((struct ena_bus*)(ena_dev->bus))->reg_bar_t =
3684 rman_get_bustag(adapter->registers);
3685 ((struct ena_bus*)(ena_dev->bus))->reg_bar_h =
3686 rman_get_bushandle(adapter->registers);
3687
3688 if (unlikely(((struct ena_bus*)(ena_dev->bus))->reg_bar_h == 0)) {
3689 device_printf(pdev, "failed to pmap registers bar\n");
3690 rc = ENXIO;
3691 goto err_bus_free;
3692 }
3693
3694 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3695
3696 /* Device initialization */
3697 rc = ena_device_init(adapter, pdev, &get_feat_ctx, &adapter->wd_active);
3698 if (unlikely(rc != 0)) {
3699 device_printf(pdev, "ENA device init failed! (err: %d)\n", rc);
3700 rc = ENXIO;
3701 goto err_bus_free;
3702 }
3703
3704 adapter->keep_alive_timestamp = getsbinuptime();
3705
3706 adapter->tx_offload_cap = get_feat_ctx.offload.tx;
3707
3708 /* Set for sure that interface is not up */
3709 adapter->up = false;
3710
3711 memcpy(adapter->mac_addr, get_feat_ctx.dev_attr.mac_addr,
3712 ETHER_ADDR_LEN);
3713
3714 /* calculate IO queue number to create */
3715 io_queue_num = ena_calc_io_queue_num(adapter, &get_feat_ctx);
3716
3717 ENA_ASSERT(io_queue_num > 0, "Invalid queue number: %d\n",
3718 io_queue_num);
3719 adapter->num_queues = io_queue_num;
3720
3721 adapter->max_mtu = get_feat_ctx.dev_attr.max_mtu;
3722
3723 /* calculatre ring sizes */
3724 queue_size = ena_calc_queue_size(adapter,&tx_sgl_size,
3725 &rx_sgl_size, &get_feat_ctx);
3726 if (unlikely((queue_size <= 0) || (io_queue_num <= 0))) {
3727 rc = ENA_COM_FAULT;
3728 goto err_com_free;
3729 }
3730
3731 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3732
3733 adapter->tx_ring_size = queue_size;
3734 adapter->rx_ring_size = queue_size;
3735
3736 adapter->max_tx_sgl_size = tx_sgl_size;
3737 adapter->max_rx_sgl_size = rx_sgl_size;
3738
3739 /* set up dma tags for rx and tx buffers */
3740 rc = ena_setup_tx_dma_tag(adapter);
3741 if (unlikely(rc != 0)) {
3742 device_printf(pdev, "Failed to create TX DMA tag\n");
3743 goto err_com_free;
3744 }
3745
3746 rc = ena_setup_rx_dma_tag(adapter);
3747 if (unlikely(rc != 0)) {
3748 device_printf(pdev, "Failed to create RX DMA tag\n");
3749 goto err_tx_tag_free;
3750 }
3751
3752 /* initialize rings basic information */
3753 device_printf(pdev, "initalize %d io queues\n", io_queue_num);
3754 ena_init_io_rings(adapter);
3755
3756 /* setup network interface */
3757 rc = ena_setup_ifnet(pdev, adapter, &get_feat_ctx);
3758 if (unlikely(rc != 0)) {
3759 device_printf(pdev, "Error with network interface setup\n");
3760 goto err_io_free;
3761 }
3762
3763 rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num);
3764 if (unlikely(rc != 0)) {
3765 device_printf(pdev,
3766 "Failed to enable and set the admin interrupts\n");
3767 goto err_ifp_free;
3768 }
3769
3770 /* Initialize reset task queue */
3771 TASK_INIT(&adapter->reset_task, 0, ena_reset_task, adapter);
3772 adapter->reset_tq = taskqueue_create("ena_reset_enqueue",
3773 M_WAITOK | M_ZERO, taskqueue_thread_enqueue, &adapter->reset_tq);
3774 taskqueue_start_threads(&adapter->reset_tq, 1, PI_NET,
3775 "%s rstq", device_get_nameunit(adapter->pdev));
3776
3777 /* Initialize statistics */
3778 ena_alloc_counters((counter_u64_t *)&adapter->dev_stats,
3779 sizeof(struct ena_stats_dev));
3780 ena_alloc_counters((counter_u64_t *)&adapter->hw_stats,
3781 sizeof(struct ena_hw_stats));
3782 ena_sysctl_add_nodes(adapter);
3783
3784 /* Tell the stack that the interface is not active */
3785 if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING);
3786
3787 adapter->running = true;
3788 return (0);
3789
3790 err_ifp_free:
3791 if_detach(adapter->ifp);
3792 if_free(adapter->ifp);
3793 err_io_free:
3794 ena_free_all_io_rings_resources(adapter);
3795 ena_free_rx_dma_tag(adapter);
3796 err_tx_tag_free:
3797 ena_free_tx_dma_tag(adapter);
3798 err_com_free:
3799 ena_com_admin_destroy(ena_dev);
3800 ena_com_delete_host_info(ena_dev);
3801 ena_com_mmio_reg_read_request_destroy(ena_dev);
3802 err_bus_free:
3803 free(ena_dev->bus, M_DEVBUF);
3804 free(ena_dev, M_DEVBUF);
3805 ena_free_pci_resources(adapter);
3806
3807 return (rc);
3808 }
3809
3810 /**
3811 * ena_detach - Device Removal Routine
3812 * @pdev: device information struct
3813 *
3814 * ena_detach is called by the device subsystem to alert the driver
3815 * that it should release a PCI device.
3816 **/
3817 static int
ena_detach(device_t pdev)3818 ena_detach(device_t pdev)
3819 {
3820 struct ena_adapter *adapter = device_get_softc(pdev);
3821 struct ena_com_dev *ena_dev = adapter->ena_dev;
3822 int rc;
3823
3824 /* Make sure VLANS are not using driver */
3825 if (adapter->ifp->if_vlantrunk != NULL) {
3826 device_printf(adapter->pdev ,"VLAN is in use, detach first\n");
3827 return (EBUSY);
3828 }
3829
3830 /* Free reset task and callout */
3831 callout_drain(&adapter->timer_service);
3832 while (taskqueue_cancel(adapter->reset_tq, &adapter->reset_task, NULL))
3833 taskqueue_drain(adapter->reset_tq, &adapter->reset_task);
3834 taskqueue_free(adapter->reset_tq);
3835
3836 sx_xlock(&adapter->ioctl_sx);
3837 ena_down(adapter);
3838 sx_unlock(&adapter->ioctl_sx);
3839
3840 if (adapter->ifp != NULL) {
3841 ether_ifdetach(adapter->ifp);
3842 if_free(adapter->ifp);
3843 }
3844
3845 ena_free_all_io_rings_resources(adapter);
3846
3847 ena_free_counters((counter_u64_t *)&adapter->hw_stats,
3848 sizeof(struct ena_hw_stats));
3849 ena_free_counters((counter_u64_t *)&adapter->dev_stats,
3850 sizeof(struct ena_stats_dev));
3851
3852 if (likely(adapter->rss_support))
3853 ena_com_rss_destroy(ena_dev);
3854
3855 rc = ena_free_rx_dma_tag(adapter);
3856 if (unlikely(rc != 0))
3857 device_printf(adapter->pdev,
3858 "Unmapped RX DMA tag associations\n");
3859
3860 rc = ena_free_tx_dma_tag(adapter);
3861 if (unlikely(rc != 0))
3862 device_printf(adapter->pdev,
3863 "Unmapped TX DMA tag associations\n");
3864
3865 /* Reset the device only if the device is running. */
3866 if (adapter->running)
3867 ena_com_dev_reset(ena_dev, adapter->reset_reason);
3868
3869 ena_com_delete_host_info(ena_dev);
3870
3871 ena_free_irqs(adapter);
3872
3873 ena_com_abort_admin_commands(ena_dev);
3874
3875 ena_com_wait_for_abort_completion(ena_dev);
3876
3877 ena_com_admin_destroy(ena_dev);
3878
3879 ena_com_mmio_reg_read_request_destroy(ena_dev);
3880
3881 ena_free_pci_resources(adapter);
3882
3883 mtx_destroy(&adapter->global_mtx);
3884 sx_destroy(&adapter->ioctl_sx);
3885
3886 if (ena_dev->bus != NULL)
3887 free(ena_dev->bus, M_DEVBUF);
3888
3889 if (ena_dev != NULL)
3890 free(ena_dev, M_DEVBUF);
3891
3892 return (bus_generic_detach(pdev));
3893 }
3894
3895 /******************************************************************************
3896 ******************************** AENQ Handlers *******************************
3897 *****************************************************************************/
3898 /**
3899 * ena_update_on_link_change:
3900 * Notify the network interface about the change in link status
3901 **/
3902 static void
ena_update_on_link_change(void * adapter_data,struct ena_admin_aenq_entry * aenq_e)3903 ena_update_on_link_change(void *adapter_data,
3904 struct ena_admin_aenq_entry *aenq_e)
3905 {
3906 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3907 struct ena_admin_aenq_link_change_desc *aenq_desc;
3908 int status;
3909 if_t ifp;
3910
3911 aenq_desc = (struct ena_admin_aenq_link_change_desc *)aenq_e;
3912 ifp = adapter->ifp;
3913 status = aenq_desc->flags &
3914 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
3915
3916 if (status != 0) {
3917 device_printf(adapter->pdev, "link is UP\n");
3918 if_link_state_change(ifp, LINK_STATE_UP);
3919 } else if (status == 0) {
3920 device_printf(adapter->pdev, "link is DOWN\n");
3921 if_link_state_change(ifp, LINK_STATE_DOWN);
3922 } else {
3923 device_printf(adapter->pdev, "invalid value recvd\n");
3924 BUG();
3925 }
3926
3927 adapter->link_status = status;
3928 }
3929
3930 /**
3931 * This handler will called for unknown event group or unimplemented handlers
3932 **/
3933 static void
unimplemented_aenq_handler(void * data,struct ena_admin_aenq_entry * aenq_e)3934 unimplemented_aenq_handler(void *data,
3935 struct ena_admin_aenq_entry *aenq_e)
3936 {
3937 return;
3938 }
3939
3940 static struct ena_aenq_handlers aenq_handlers = {
3941 .handlers = {
3942 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
3943 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
3944 },
3945 .unimplemented_handler = unimplemented_aenq_handler
3946 };
3947
3948 /*********************************************************************
3949 * FreeBSD Device Interface Entry Points
3950 *********************************************************************/
3951
3952 static device_method_t ena_methods[] = {
3953 /* Device interface */
3954 DEVMETHOD(device_probe, ena_probe),
3955 DEVMETHOD(device_attach, ena_attach),
3956 DEVMETHOD(device_detach, ena_detach),
3957 DEVMETHOD_END
3958 };
3959
3960 static driver_t ena_driver = {
3961 "ena", ena_methods, sizeof(struct ena_adapter),
3962 };
3963
3964 devclass_t ena_devclass;
3965 DRIVER_MODULE(ena, pci, ena_driver, ena_devclass, 0, 0);
3966 MODULE_PNP_INFO("U16:vendor;U16:device", pci, ena, ena_vendor_info_array,
3967 nitems(ena_vendor_info_array) - 1);
3968 MODULE_DEPEND(ena, pci, 1, 1, 1);
3969 MODULE_DEPEND(ena, ether, 1, 1, 1);
3970
3971 /*********************************************************************/
3972