1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2011 NetApp, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33
34 #include <sys/param.h>
35 #include <sys/sysctl.h>
36 #include <sys/ioctl.h>
37 #include <sys/mman.h>
38 #include <sys/_iovec.h>
39 #include <sys/cpuset.h>
40
41 #include <x86/segments.h>
42 #include <machine/specialreg.h>
43
44 #include <errno.h>
45 #include <stdio.h>
46 #include <stdlib.h>
47 #include <assert.h>
48 #include <string.h>
49 #include <fcntl.h>
50 #include <unistd.h>
51
52 #include <libutil.h>
53
54 #include <machine/vmm.h>
55 #include <machine/vmm_dev.h>
56
57 #include "vmmapi.h"
58
59 #define MB (1024 * 1024UL)
60 #define GB (1024 * 1024 * 1024UL)
61
62 /*
63 * Size of the guard region before and after the virtual address space
64 * mapping the guest physical memory. This must be a multiple of the
65 * superpage size for performance reasons.
66 */
67 #define VM_MMAP_GUARD_SIZE (4 * MB)
68
69 #define PROT_RW (PROT_READ | PROT_WRITE)
70 #define PROT_ALL (PROT_READ | PROT_WRITE | PROT_EXEC)
71
72 struct vmctx {
73 int fd;
74 uint32_t lowmem_limit;
75 int memflags;
76 size_t lowmem;
77 size_t highmem;
78 char *baseaddr;
79 char *name;
80 };
81
82 #define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x)))
83 #define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x)))
84
85 static int
vm_device_open(const char * name)86 vm_device_open(const char *name)
87 {
88 int fd, len;
89 char *vmfile;
90
91 len = strlen("/dev/vmm/") + strlen(name) + 1;
92 vmfile = malloc(len);
93 assert(vmfile != NULL);
94 snprintf(vmfile, len, "/dev/vmm/%s", name);
95
96 /* Open the device file */
97 fd = open(vmfile, O_RDWR, 0);
98
99 free(vmfile);
100 return (fd);
101 }
102
103 int
vm_create(const char * name)104 vm_create(const char *name)
105 {
106
107 return (CREATE((char *)name));
108 }
109
110 struct vmctx *
vm_open(const char * name)111 vm_open(const char *name)
112 {
113 struct vmctx *vm;
114
115 vm = malloc(sizeof(struct vmctx) + strlen(name) + 1);
116 assert(vm != NULL);
117
118 vm->fd = -1;
119 vm->memflags = 0;
120 vm->lowmem_limit = 3 * GB;
121 vm->name = (char *)(vm + 1);
122 strcpy(vm->name, name);
123
124 if ((vm->fd = vm_device_open(vm->name)) < 0)
125 goto err;
126
127 return (vm);
128 err:
129 vm_destroy(vm);
130 return (NULL);
131 }
132
133 void
vm_destroy(struct vmctx * vm)134 vm_destroy(struct vmctx *vm)
135 {
136 assert(vm != NULL);
137
138 if (vm->fd >= 0)
139 close(vm->fd);
140 DESTROY(vm->name);
141
142 free(vm);
143 }
144
145 int
vm_parse_memsize(const char * optarg,size_t * ret_memsize)146 vm_parse_memsize(const char *optarg, size_t *ret_memsize)
147 {
148 char *endptr;
149 size_t optval;
150 int error;
151
152 optval = strtoul(optarg, &endptr, 0);
153 if (*optarg != '\0' && *endptr == '\0') {
154 /*
155 * For the sake of backward compatibility if the memory size
156 * specified on the command line is less than a megabyte then
157 * it is interpreted as being in units of MB.
158 */
159 if (optval < MB)
160 optval *= MB;
161 *ret_memsize = optval;
162 error = 0;
163 } else
164 error = expand_number(optarg, ret_memsize);
165
166 return (error);
167 }
168
169 uint32_t
vm_get_lowmem_limit(struct vmctx * ctx)170 vm_get_lowmem_limit(struct vmctx *ctx)
171 {
172
173 return (ctx->lowmem_limit);
174 }
175
176 void
vm_set_lowmem_limit(struct vmctx * ctx,uint32_t limit)177 vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit)
178 {
179
180 ctx->lowmem_limit = limit;
181 }
182
183 void
vm_set_memflags(struct vmctx * ctx,int flags)184 vm_set_memflags(struct vmctx *ctx, int flags)
185 {
186
187 ctx->memflags = flags;
188 }
189
190 int
vm_get_memflags(struct vmctx * ctx)191 vm_get_memflags(struct vmctx *ctx)
192 {
193
194 return (ctx->memflags);
195 }
196
197 /*
198 * Map segment 'segid' starting at 'off' into guest address range [gpa,gpa+len).
199 */
200 int
vm_mmap_memseg(struct vmctx * ctx,vm_paddr_t gpa,int segid,vm_ooffset_t off,size_t len,int prot)201 vm_mmap_memseg(struct vmctx *ctx, vm_paddr_t gpa, int segid, vm_ooffset_t off,
202 size_t len, int prot)
203 {
204 struct vm_memmap memmap;
205 int error, flags;
206
207 memmap.gpa = gpa;
208 memmap.segid = segid;
209 memmap.segoff = off;
210 memmap.len = len;
211 memmap.prot = prot;
212 memmap.flags = 0;
213
214 if (ctx->memflags & VM_MEM_F_WIRED)
215 memmap.flags |= VM_MEMMAP_F_WIRED;
216
217 /*
218 * If this mapping already exists then don't create it again. This
219 * is the common case for SYSMEM mappings created by bhyveload(8).
220 */
221 error = vm_mmap_getnext(ctx, &gpa, &segid, &off, &len, &prot, &flags);
222 if (error == 0 && gpa == memmap.gpa) {
223 if (segid != memmap.segid || off != memmap.segoff ||
224 prot != memmap.prot || flags != memmap.flags) {
225 errno = EEXIST;
226 return (-1);
227 } else {
228 return (0);
229 }
230 }
231
232 error = ioctl(ctx->fd, VM_MMAP_MEMSEG, &memmap);
233 return (error);
234 }
235
236 int
vm_mmap_getnext(struct vmctx * ctx,vm_paddr_t * gpa,int * segid,vm_ooffset_t * segoff,size_t * len,int * prot,int * flags)237 vm_mmap_getnext(struct vmctx *ctx, vm_paddr_t *gpa, int *segid,
238 vm_ooffset_t *segoff, size_t *len, int *prot, int *flags)
239 {
240 struct vm_memmap memmap;
241 int error;
242
243 bzero(&memmap, sizeof(struct vm_memmap));
244 memmap.gpa = *gpa;
245 error = ioctl(ctx->fd, VM_MMAP_GETNEXT, &memmap);
246 if (error == 0) {
247 *gpa = memmap.gpa;
248 *segid = memmap.segid;
249 *segoff = memmap.segoff;
250 *len = memmap.len;
251 *prot = memmap.prot;
252 *flags = memmap.flags;
253 }
254 return (error);
255 }
256
257 /*
258 * Return 0 if the segments are identical and non-zero otherwise.
259 *
260 * This is slightly complicated by the fact that only device memory segments
261 * are named.
262 */
263 static int
cmpseg(size_t len,const char * str,size_t len2,const char * str2)264 cmpseg(size_t len, const char *str, size_t len2, const char *str2)
265 {
266
267 if (len == len2) {
268 if ((!str && !str2) || (str && str2 && !strcmp(str, str2)))
269 return (0);
270 }
271 return (-1);
272 }
273
274 static int
vm_alloc_memseg(struct vmctx * ctx,int segid,size_t len,const char * name)275 vm_alloc_memseg(struct vmctx *ctx, int segid, size_t len, const char *name)
276 {
277 struct vm_memseg memseg;
278 size_t n;
279 int error;
280
281 /*
282 * If the memory segment has already been created then just return.
283 * This is the usual case for the SYSMEM segment created by userspace
284 * loaders like bhyveload(8).
285 */
286 error = vm_get_memseg(ctx, segid, &memseg.len, memseg.name,
287 sizeof(memseg.name));
288 if (error)
289 return (error);
290
291 if (memseg.len != 0) {
292 if (cmpseg(len, name, memseg.len, VM_MEMSEG_NAME(&memseg))) {
293 errno = EINVAL;
294 return (-1);
295 } else {
296 return (0);
297 }
298 }
299
300 bzero(&memseg, sizeof(struct vm_memseg));
301 memseg.segid = segid;
302 memseg.len = len;
303 if (name != NULL) {
304 n = strlcpy(memseg.name, name, sizeof(memseg.name));
305 if (n >= sizeof(memseg.name)) {
306 errno = ENAMETOOLONG;
307 return (-1);
308 }
309 }
310
311 error = ioctl(ctx->fd, VM_ALLOC_MEMSEG, &memseg);
312 return (error);
313 }
314
315 int
vm_get_memseg(struct vmctx * ctx,int segid,size_t * lenp,char * namebuf,size_t bufsize)316 vm_get_memseg(struct vmctx *ctx, int segid, size_t *lenp, char *namebuf,
317 size_t bufsize)
318 {
319 struct vm_memseg memseg;
320 size_t n;
321 int error;
322
323 memseg.segid = segid;
324 error = ioctl(ctx->fd, VM_GET_MEMSEG, &memseg);
325 if (error == 0) {
326 *lenp = memseg.len;
327 n = strlcpy(namebuf, memseg.name, bufsize);
328 if (n >= bufsize) {
329 errno = ENAMETOOLONG;
330 error = -1;
331 }
332 }
333 return (error);
334 }
335
336 static int
setup_memory_segment(struct vmctx * ctx,vm_paddr_t gpa,size_t len,char * base)337 setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char *base)
338 {
339 char *ptr;
340 int error, flags;
341
342 /* Map 'len' bytes starting at 'gpa' in the guest address space */
343 error = vm_mmap_memseg(ctx, gpa, VM_SYSMEM, gpa, len, PROT_ALL);
344 if (error)
345 return (error);
346
347 flags = MAP_SHARED | MAP_FIXED;
348 if ((ctx->memflags & VM_MEM_F_INCORE) == 0)
349 flags |= MAP_NOCORE;
350
351 /* mmap into the process address space on the host */
352 ptr = mmap(base + gpa, len, PROT_RW, flags, ctx->fd, gpa);
353 if (ptr == MAP_FAILED)
354 return (-1);
355
356 return (0);
357 }
358
359 int
vm_setup_memory(struct vmctx * ctx,size_t memsize,enum vm_mmap_style vms)360 vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms)
361 {
362 size_t objsize, len;
363 vm_paddr_t gpa;
364 char *baseaddr, *ptr;
365 int error;
366
367 assert(vms == VM_MMAP_ALL);
368
369 /*
370 * If 'memsize' cannot fit entirely in the 'lowmem' segment then
371 * create another 'highmem' segment above 4GB for the remainder.
372 */
373 if (memsize > ctx->lowmem_limit) {
374 ctx->lowmem = ctx->lowmem_limit;
375 ctx->highmem = memsize - ctx->lowmem_limit;
376 objsize = 4*GB + ctx->highmem;
377 } else {
378 ctx->lowmem = memsize;
379 ctx->highmem = 0;
380 objsize = ctx->lowmem;
381 }
382
383 error = vm_alloc_memseg(ctx, VM_SYSMEM, objsize, NULL);
384 if (error)
385 return (error);
386
387 /*
388 * Stake out a contiguous region covering the guest physical memory
389 * and the adjoining guard regions.
390 */
391 len = VM_MMAP_GUARD_SIZE + objsize + VM_MMAP_GUARD_SIZE;
392 ptr = mmap(NULL, len, PROT_NONE, MAP_GUARD | MAP_ALIGNED_SUPER, -1, 0);
393 if (ptr == MAP_FAILED)
394 return (-1);
395
396 baseaddr = ptr + VM_MMAP_GUARD_SIZE;
397 if (ctx->highmem > 0) {
398 gpa = 4*GB;
399 len = ctx->highmem;
400 error = setup_memory_segment(ctx, gpa, len, baseaddr);
401 if (error)
402 return (error);
403 }
404
405 if (ctx->lowmem > 0) {
406 gpa = 0;
407 len = ctx->lowmem;
408 error = setup_memory_segment(ctx, gpa, len, baseaddr);
409 if (error)
410 return (error);
411 }
412
413 ctx->baseaddr = baseaddr;
414
415 return (0);
416 }
417
418 /*
419 * Returns a non-NULL pointer if [gaddr, gaddr+len) is entirely contained in
420 * the lowmem or highmem regions.
421 *
422 * In particular return NULL if [gaddr, gaddr+len) falls in guest MMIO region.
423 * The instruction emulation code depends on this behavior.
424 */
425 void *
vm_map_gpa(struct vmctx * ctx,vm_paddr_t gaddr,size_t len)426 vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len)
427 {
428
429 if (ctx->lowmem > 0) {
430 if (gaddr < ctx->lowmem && len <= ctx->lowmem &&
431 gaddr + len <= ctx->lowmem)
432 return (ctx->baseaddr + gaddr);
433 }
434
435 if (ctx->highmem > 0) {
436 if (gaddr >= 4*GB) {
437 if (gaddr < 4*GB + ctx->highmem &&
438 len <= ctx->highmem &&
439 gaddr + len <= 4*GB + ctx->highmem)
440 return (ctx->baseaddr + gaddr);
441 }
442 }
443
444 return (NULL);
445 }
446
447 size_t
vm_get_lowmem_size(struct vmctx * ctx)448 vm_get_lowmem_size(struct vmctx *ctx)
449 {
450
451 return (ctx->lowmem);
452 }
453
454 size_t
vm_get_highmem_size(struct vmctx * ctx)455 vm_get_highmem_size(struct vmctx *ctx)
456 {
457
458 return (ctx->highmem);
459 }
460
461 void *
vm_create_devmem(struct vmctx * ctx,int segid,const char * name,size_t len)462 vm_create_devmem(struct vmctx *ctx, int segid, const char *name, size_t len)
463 {
464 char pathname[MAXPATHLEN];
465 size_t len2;
466 char *base, *ptr;
467 int fd, error, flags;
468
469 fd = -1;
470 ptr = MAP_FAILED;
471 if (name == NULL || strlen(name) == 0) {
472 errno = EINVAL;
473 goto done;
474 }
475
476 error = vm_alloc_memseg(ctx, segid, len, name);
477 if (error)
478 goto done;
479
480 strlcpy(pathname, "/dev/vmm.io/", sizeof(pathname));
481 strlcat(pathname, ctx->name, sizeof(pathname));
482 strlcat(pathname, ".", sizeof(pathname));
483 strlcat(pathname, name, sizeof(pathname));
484
485 fd = open(pathname, O_RDWR);
486 if (fd < 0)
487 goto done;
488
489 /*
490 * Stake out a contiguous region covering the device memory and the
491 * adjoining guard regions.
492 */
493 len2 = VM_MMAP_GUARD_SIZE + len + VM_MMAP_GUARD_SIZE;
494 base = mmap(NULL, len2, PROT_NONE, MAP_GUARD | MAP_ALIGNED_SUPER, -1,
495 0);
496 if (base == MAP_FAILED)
497 goto done;
498
499 flags = MAP_SHARED | MAP_FIXED;
500 if ((ctx->memflags & VM_MEM_F_INCORE) == 0)
501 flags |= MAP_NOCORE;
502
503 /* mmap the devmem region in the host address space */
504 ptr = mmap(base + VM_MMAP_GUARD_SIZE, len, PROT_RW, flags, fd, 0);
505 done:
506 if (fd >= 0)
507 close(fd);
508 return (ptr);
509 }
510
511 int
vm_set_desc(struct vmctx * ctx,int vcpu,int reg,uint64_t base,uint32_t limit,uint32_t access)512 vm_set_desc(struct vmctx *ctx, int vcpu, int reg,
513 uint64_t base, uint32_t limit, uint32_t access)
514 {
515 int error;
516 struct vm_seg_desc vmsegdesc;
517
518 bzero(&vmsegdesc, sizeof(vmsegdesc));
519 vmsegdesc.cpuid = vcpu;
520 vmsegdesc.regnum = reg;
521 vmsegdesc.desc.base = base;
522 vmsegdesc.desc.limit = limit;
523 vmsegdesc.desc.access = access;
524
525 error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc);
526 return (error);
527 }
528
529 int
vm_get_desc(struct vmctx * ctx,int vcpu,int reg,uint64_t * base,uint32_t * limit,uint32_t * access)530 vm_get_desc(struct vmctx *ctx, int vcpu, int reg,
531 uint64_t *base, uint32_t *limit, uint32_t *access)
532 {
533 int error;
534 struct vm_seg_desc vmsegdesc;
535
536 bzero(&vmsegdesc, sizeof(vmsegdesc));
537 vmsegdesc.cpuid = vcpu;
538 vmsegdesc.regnum = reg;
539
540 error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc);
541 if (error == 0) {
542 *base = vmsegdesc.desc.base;
543 *limit = vmsegdesc.desc.limit;
544 *access = vmsegdesc.desc.access;
545 }
546 return (error);
547 }
548
549 int
vm_get_seg_desc(struct vmctx * ctx,int vcpu,int reg,struct seg_desc * seg_desc)550 vm_get_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *seg_desc)
551 {
552 int error;
553
554 error = vm_get_desc(ctx, vcpu, reg, &seg_desc->base, &seg_desc->limit,
555 &seg_desc->access);
556 return (error);
557 }
558
559 int
vm_set_register(struct vmctx * ctx,int vcpu,int reg,uint64_t val)560 vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val)
561 {
562 int error;
563 struct vm_register vmreg;
564
565 bzero(&vmreg, sizeof(vmreg));
566 vmreg.cpuid = vcpu;
567 vmreg.regnum = reg;
568 vmreg.regval = val;
569
570 error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg);
571 return (error);
572 }
573
574 int
vm_get_register(struct vmctx * ctx,int vcpu,int reg,uint64_t * ret_val)575 vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val)
576 {
577 int error;
578 struct vm_register vmreg;
579
580 bzero(&vmreg, sizeof(vmreg));
581 vmreg.cpuid = vcpu;
582 vmreg.regnum = reg;
583
584 error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg);
585 *ret_val = vmreg.regval;
586 return (error);
587 }
588
589 int
vm_set_register_set(struct vmctx * ctx,int vcpu,unsigned int count,const int * regnums,uint64_t * regvals)590 vm_set_register_set(struct vmctx *ctx, int vcpu, unsigned int count,
591 const int *regnums, uint64_t *regvals)
592 {
593 int error;
594 struct vm_register_set vmregset;
595
596 bzero(&vmregset, sizeof(vmregset));
597 vmregset.cpuid = vcpu;
598 vmregset.count = count;
599 vmregset.regnums = regnums;
600 vmregset.regvals = regvals;
601
602 error = ioctl(ctx->fd, VM_SET_REGISTER_SET, &vmregset);
603 return (error);
604 }
605
606 int
vm_get_register_set(struct vmctx * ctx,int vcpu,unsigned int count,const int * regnums,uint64_t * regvals)607 vm_get_register_set(struct vmctx *ctx, int vcpu, unsigned int count,
608 const int *regnums, uint64_t *regvals)
609 {
610 int error;
611 struct vm_register_set vmregset;
612
613 bzero(&vmregset, sizeof(vmregset));
614 vmregset.cpuid = vcpu;
615 vmregset.count = count;
616 vmregset.regnums = regnums;
617 vmregset.regvals = regvals;
618
619 error = ioctl(ctx->fd, VM_GET_REGISTER_SET, &vmregset);
620 return (error);
621 }
622
623 int
vm_run(struct vmctx * ctx,int vcpu,struct vm_exit * vmexit)624 vm_run(struct vmctx *ctx, int vcpu, struct vm_exit *vmexit)
625 {
626 int error;
627 struct vm_run vmrun;
628
629 bzero(&vmrun, sizeof(vmrun));
630 vmrun.cpuid = vcpu;
631
632 error = ioctl(ctx->fd, VM_RUN, &vmrun);
633 bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit));
634 return (error);
635 }
636
637 int
vm_suspend(struct vmctx * ctx,enum vm_suspend_how how)638 vm_suspend(struct vmctx *ctx, enum vm_suspend_how how)
639 {
640 struct vm_suspend vmsuspend;
641
642 bzero(&vmsuspend, sizeof(vmsuspend));
643 vmsuspend.how = how;
644 return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend));
645 }
646
647 int
vm_reinit(struct vmctx * ctx)648 vm_reinit(struct vmctx *ctx)
649 {
650
651 return (ioctl(ctx->fd, VM_REINIT, 0));
652 }
653
654 int
vm_inject_exception(struct vmctx * ctx,int vcpu,int vector,int errcode_valid,uint32_t errcode,int restart_instruction)655 vm_inject_exception(struct vmctx *ctx, int vcpu, int vector, int errcode_valid,
656 uint32_t errcode, int restart_instruction)
657 {
658 struct vm_exception exc;
659
660 exc.cpuid = vcpu;
661 exc.vector = vector;
662 exc.error_code = errcode;
663 exc.error_code_valid = errcode_valid;
664 exc.restart_instruction = restart_instruction;
665
666 return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc));
667 }
668
669 int
vm_apicid2vcpu(struct vmctx * ctx,int apicid)670 vm_apicid2vcpu(struct vmctx *ctx, int apicid)
671 {
672 /*
673 * The apic id associated with the 'vcpu' has the same numerical value
674 * as the 'vcpu' itself.
675 */
676 return (apicid);
677 }
678
679 int
vm_lapic_irq(struct vmctx * ctx,int vcpu,int vector)680 vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector)
681 {
682 struct vm_lapic_irq vmirq;
683
684 bzero(&vmirq, sizeof(vmirq));
685 vmirq.cpuid = vcpu;
686 vmirq.vector = vector;
687
688 return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq));
689 }
690
691 int
vm_lapic_local_irq(struct vmctx * ctx,int vcpu,int vector)692 vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector)
693 {
694 struct vm_lapic_irq vmirq;
695
696 bzero(&vmirq, sizeof(vmirq));
697 vmirq.cpuid = vcpu;
698 vmirq.vector = vector;
699
700 return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq));
701 }
702
703 int
vm_lapic_msi(struct vmctx * ctx,uint64_t addr,uint64_t msg)704 vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg)
705 {
706 struct vm_lapic_msi vmmsi;
707
708 bzero(&vmmsi, sizeof(vmmsi));
709 vmmsi.addr = addr;
710 vmmsi.msg = msg;
711
712 return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi));
713 }
714
715 int
vm_ioapic_assert_irq(struct vmctx * ctx,int irq)716 vm_ioapic_assert_irq(struct vmctx *ctx, int irq)
717 {
718 struct vm_ioapic_irq ioapic_irq;
719
720 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
721 ioapic_irq.irq = irq;
722
723 return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq));
724 }
725
726 int
vm_ioapic_deassert_irq(struct vmctx * ctx,int irq)727 vm_ioapic_deassert_irq(struct vmctx *ctx, int irq)
728 {
729 struct vm_ioapic_irq ioapic_irq;
730
731 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
732 ioapic_irq.irq = irq;
733
734 return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq));
735 }
736
737 int
vm_ioapic_pulse_irq(struct vmctx * ctx,int irq)738 vm_ioapic_pulse_irq(struct vmctx *ctx, int irq)
739 {
740 struct vm_ioapic_irq ioapic_irq;
741
742 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
743 ioapic_irq.irq = irq;
744
745 return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq));
746 }
747
748 int
vm_ioapic_pincount(struct vmctx * ctx,int * pincount)749 vm_ioapic_pincount(struct vmctx *ctx, int *pincount)
750 {
751
752 return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount));
753 }
754
755 int
vm_isa_assert_irq(struct vmctx * ctx,int atpic_irq,int ioapic_irq)756 vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
757 {
758 struct vm_isa_irq isa_irq;
759
760 bzero(&isa_irq, sizeof(struct vm_isa_irq));
761 isa_irq.atpic_irq = atpic_irq;
762 isa_irq.ioapic_irq = ioapic_irq;
763
764 return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq));
765 }
766
767 int
vm_isa_deassert_irq(struct vmctx * ctx,int atpic_irq,int ioapic_irq)768 vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
769 {
770 struct vm_isa_irq isa_irq;
771
772 bzero(&isa_irq, sizeof(struct vm_isa_irq));
773 isa_irq.atpic_irq = atpic_irq;
774 isa_irq.ioapic_irq = ioapic_irq;
775
776 return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq));
777 }
778
779 int
vm_isa_pulse_irq(struct vmctx * ctx,int atpic_irq,int ioapic_irq)780 vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
781 {
782 struct vm_isa_irq isa_irq;
783
784 bzero(&isa_irq, sizeof(struct vm_isa_irq));
785 isa_irq.atpic_irq = atpic_irq;
786 isa_irq.ioapic_irq = ioapic_irq;
787
788 return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq));
789 }
790
791 int
vm_isa_set_irq_trigger(struct vmctx * ctx,int atpic_irq,enum vm_intr_trigger trigger)792 vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq,
793 enum vm_intr_trigger trigger)
794 {
795 struct vm_isa_irq_trigger isa_irq_trigger;
796
797 bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger));
798 isa_irq_trigger.atpic_irq = atpic_irq;
799 isa_irq_trigger.trigger = trigger;
800
801 return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger));
802 }
803
804 int
vm_inject_nmi(struct vmctx * ctx,int vcpu)805 vm_inject_nmi(struct vmctx *ctx, int vcpu)
806 {
807 struct vm_nmi vmnmi;
808
809 bzero(&vmnmi, sizeof(vmnmi));
810 vmnmi.cpuid = vcpu;
811
812 return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi));
813 }
814
815 static struct {
816 const char *name;
817 int type;
818 } capstrmap[] = {
819 { "hlt_exit", VM_CAP_HALT_EXIT },
820 { "mtrap_exit", VM_CAP_MTRAP_EXIT },
821 { "pause_exit", VM_CAP_PAUSE_EXIT },
822 { "unrestricted_guest", VM_CAP_UNRESTRICTED_GUEST },
823 { "enable_invpcid", VM_CAP_ENABLE_INVPCID },
824 { 0 }
825 };
826
827 int
vm_capability_name2type(const char * capname)828 vm_capability_name2type(const char *capname)
829 {
830 int i;
831
832 for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) {
833 if (strcmp(capstrmap[i].name, capname) == 0)
834 return (capstrmap[i].type);
835 }
836
837 return (-1);
838 }
839
840 const char *
vm_capability_type2name(int type)841 vm_capability_type2name(int type)
842 {
843 int i;
844
845 for (i = 0; capstrmap[i].name != NULL; i++) {
846 if (capstrmap[i].type == type)
847 return (capstrmap[i].name);
848 }
849
850 return (NULL);
851 }
852
853 int
vm_get_capability(struct vmctx * ctx,int vcpu,enum vm_cap_type cap,int * retval)854 vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap,
855 int *retval)
856 {
857 int error;
858 struct vm_capability vmcap;
859
860 bzero(&vmcap, sizeof(vmcap));
861 vmcap.cpuid = vcpu;
862 vmcap.captype = cap;
863
864 error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap);
865 *retval = vmcap.capval;
866 return (error);
867 }
868
869 int
vm_set_capability(struct vmctx * ctx,int vcpu,enum vm_cap_type cap,int val)870 vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val)
871 {
872 struct vm_capability vmcap;
873
874 bzero(&vmcap, sizeof(vmcap));
875 vmcap.cpuid = vcpu;
876 vmcap.captype = cap;
877 vmcap.capval = val;
878
879 return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap));
880 }
881
882 int
vm_assign_pptdev(struct vmctx * ctx,int bus,int slot,int func)883 vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
884 {
885 struct vm_pptdev pptdev;
886
887 bzero(&pptdev, sizeof(pptdev));
888 pptdev.bus = bus;
889 pptdev.slot = slot;
890 pptdev.func = func;
891
892 return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev));
893 }
894
895 int
vm_unassign_pptdev(struct vmctx * ctx,int bus,int slot,int func)896 vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
897 {
898 struct vm_pptdev pptdev;
899
900 bzero(&pptdev, sizeof(pptdev));
901 pptdev.bus = bus;
902 pptdev.slot = slot;
903 pptdev.func = func;
904
905 return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev));
906 }
907
908 int
vm_map_pptdev_mmio(struct vmctx * ctx,int bus,int slot,int func,vm_paddr_t gpa,size_t len,vm_paddr_t hpa)909 vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func,
910 vm_paddr_t gpa, size_t len, vm_paddr_t hpa)
911 {
912 struct vm_pptdev_mmio pptmmio;
913
914 bzero(&pptmmio, sizeof(pptmmio));
915 pptmmio.bus = bus;
916 pptmmio.slot = slot;
917 pptmmio.func = func;
918 pptmmio.gpa = gpa;
919 pptmmio.len = len;
920 pptmmio.hpa = hpa;
921
922 return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio));
923 }
924
925 int
vm_setup_pptdev_msi(struct vmctx * ctx,int vcpu,int bus,int slot,int func,uint64_t addr,uint64_t msg,int numvec)926 vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
927 uint64_t addr, uint64_t msg, int numvec)
928 {
929 struct vm_pptdev_msi pptmsi;
930
931 bzero(&pptmsi, sizeof(pptmsi));
932 pptmsi.vcpu = vcpu;
933 pptmsi.bus = bus;
934 pptmsi.slot = slot;
935 pptmsi.func = func;
936 pptmsi.msg = msg;
937 pptmsi.addr = addr;
938 pptmsi.numvec = numvec;
939
940 return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi));
941 }
942
943 int
vm_setup_pptdev_msix(struct vmctx * ctx,int vcpu,int bus,int slot,int func,int idx,uint64_t addr,uint64_t msg,uint32_t vector_control)944 vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
945 int idx, uint64_t addr, uint64_t msg, uint32_t vector_control)
946 {
947 struct vm_pptdev_msix pptmsix;
948
949 bzero(&pptmsix, sizeof(pptmsix));
950 pptmsix.vcpu = vcpu;
951 pptmsix.bus = bus;
952 pptmsix.slot = slot;
953 pptmsix.func = func;
954 pptmsix.idx = idx;
955 pptmsix.msg = msg;
956 pptmsix.addr = addr;
957 pptmsix.vector_control = vector_control;
958
959 return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix);
960 }
961
962 uint64_t *
vm_get_stats(struct vmctx * ctx,int vcpu,struct timeval * ret_tv,int * ret_entries)963 vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv,
964 int *ret_entries)
965 {
966 int error;
967
968 static struct vm_stats vmstats;
969
970 vmstats.cpuid = vcpu;
971
972 error = ioctl(ctx->fd, VM_STATS, &vmstats);
973 if (error == 0) {
974 if (ret_entries)
975 *ret_entries = vmstats.num_entries;
976 if (ret_tv)
977 *ret_tv = vmstats.tv;
978 return (vmstats.statbuf);
979 } else
980 return (NULL);
981 }
982
983 const char *
vm_get_stat_desc(struct vmctx * ctx,int index)984 vm_get_stat_desc(struct vmctx *ctx, int index)
985 {
986 static struct vm_stat_desc statdesc;
987
988 statdesc.index = index;
989 if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0)
990 return (statdesc.desc);
991 else
992 return (NULL);
993 }
994
995 int
vm_get_x2apic_state(struct vmctx * ctx,int vcpu,enum x2apic_state * state)996 vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state)
997 {
998 int error;
999 struct vm_x2apic x2apic;
1000
1001 bzero(&x2apic, sizeof(x2apic));
1002 x2apic.cpuid = vcpu;
1003
1004 error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic);
1005 *state = x2apic.state;
1006 return (error);
1007 }
1008
1009 int
vm_set_x2apic_state(struct vmctx * ctx,int vcpu,enum x2apic_state state)1010 vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state)
1011 {
1012 int error;
1013 struct vm_x2apic x2apic;
1014
1015 bzero(&x2apic, sizeof(x2apic));
1016 x2apic.cpuid = vcpu;
1017 x2apic.state = state;
1018
1019 error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic);
1020
1021 return (error);
1022 }
1023
1024 /*
1025 * From Intel Vol 3a:
1026 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT
1027 */
1028 int
vcpu_reset(struct vmctx * vmctx,int vcpu)1029 vcpu_reset(struct vmctx *vmctx, int vcpu)
1030 {
1031 int error;
1032 uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx;
1033 uint32_t desc_access, desc_limit;
1034 uint16_t sel;
1035
1036 zero = 0;
1037
1038 rflags = 0x2;
1039 error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags);
1040 if (error)
1041 goto done;
1042
1043 rip = 0xfff0;
1044 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0)
1045 goto done;
1046
1047 cr0 = CR0_NE;
1048 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0)
1049 goto done;
1050
1051 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0)
1052 goto done;
1053
1054 cr4 = 0;
1055 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0)
1056 goto done;
1057
1058 /*
1059 * CS: present, r/w, accessed, 16-bit, byte granularity, usable
1060 */
1061 desc_base = 0xffff0000;
1062 desc_limit = 0xffff;
1063 desc_access = 0x0093;
1064 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS,
1065 desc_base, desc_limit, desc_access);
1066 if (error)
1067 goto done;
1068
1069 sel = 0xf000;
1070 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0)
1071 goto done;
1072
1073 /*
1074 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity
1075 */
1076 desc_base = 0;
1077 desc_limit = 0xffff;
1078 desc_access = 0x0093;
1079 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS,
1080 desc_base, desc_limit, desc_access);
1081 if (error)
1082 goto done;
1083
1084 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS,
1085 desc_base, desc_limit, desc_access);
1086 if (error)
1087 goto done;
1088
1089 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES,
1090 desc_base, desc_limit, desc_access);
1091 if (error)
1092 goto done;
1093
1094 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS,
1095 desc_base, desc_limit, desc_access);
1096 if (error)
1097 goto done;
1098
1099 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS,
1100 desc_base, desc_limit, desc_access);
1101 if (error)
1102 goto done;
1103
1104 sel = 0;
1105 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0)
1106 goto done;
1107 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0)
1108 goto done;
1109 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0)
1110 goto done;
1111 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0)
1112 goto done;
1113 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0)
1114 goto done;
1115
1116 /* General purpose registers */
1117 rdx = 0xf00;
1118 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0)
1119 goto done;
1120 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0)
1121 goto done;
1122 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0)
1123 goto done;
1124 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0)
1125 goto done;
1126 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0)
1127 goto done;
1128 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0)
1129 goto done;
1130 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0)
1131 goto done;
1132 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0)
1133 goto done;
1134
1135 /* GDTR, IDTR */
1136 desc_base = 0;
1137 desc_limit = 0xffff;
1138 desc_access = 0;
1139 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR,
1140 desc_base, desc_limit, desc_access);
1141 if (error != 0)
1142 goto done;
1143
1144 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR,
1145 desc_base, desc_limit, desc_access);
1146 if (error != 0)
1147 goto done;
1148
1149 /* TR */
1150 desc_base = 0;
1151 desc_limit = 0xffff;
1152 desc_access = 0x0000008b;
1153 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access);
1154 if (error)
1155 goto done;
1156
1157 sel = 0;
1158 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0)
1159 goto done;
1160
1161 /* LDTR */
1162 desc_base = 0;
1163 desc_limit = 0xffff;
1164 desc_access = 0x00000082;
1165 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base,
1166 desc_limit, desc_access);
1167 if (error)
1168 goto done;
1169
1170 sel = 0;
1171 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0)
1172 goto done;
1173
1174 /* XXX cr2, debug registers */
1175
1176 error = 0;
1177 done:
1178 return (error);
1179 }
1180
1181 int
vm_get_gpa_pmap(struct vmctx * ctx,uint64_t gpa,uint64_t * pte,int * num)1182 vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num)
1183 {
1184 int error, i;
1185 struct vm_gpa_pte gpapte;
1186
1187 bzero(&gpapte, sizeof(gpapte));
1188 gpapte.gpa = gpa;
1189
1190 error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte);
1191
1192 if (error == 0) {
1193 *num = gpapte.ptenum;
1194 for (i = 0; i < gpapte.ptenum; i++)
1195 pte[i] = gpapte.pte[i];
1196 }
1197
1198 return (error);
1199 }
1200
1201 int
vm_get_hpet_capabilities(struct vmctx * ctx,uint32_t * capabilities)1202 vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities)
1203 {
1204 int error;
1205 struct vm_hpet_cap cap;
1206
1207 bzero(&cap, sizeof(struct vm_hpet_cap));
1208 error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap);
1209 if (capabilities != NULL)
1210 *capabilities = cap.capabilities;
1211 return (error);
1212 }
1213
1214 int
vm_gla2gpa(struct vmctx * ctx,int vcpu,struct vm_guest_paging * paging,uint64_t gla,int prot,uint64_t * gpa,int * fault)1215 vm_gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
1216 uint64_t gla, int prot, uint64_t *gpa, int *fault)
1217 {
1218 struct vm_gla2gpa gg;
1219 int error;
1220
1221 bzero(&gg, sizeof(struct vm_gla2gpa));
1222 gg.vcpuid = vcpu;
1223 gg.prot = prot;
1224 gg.gla = gla;
1225 gg.paging = *paging;
1226
1227 error = ioctl(ctx->fd, VM_GLA2GPA, &gg);
1228 if (error == 0) {
1229 *fault = gg.fault;
1230 *gpa = gg.gpa;
1231 }
1232 return (error);
1233 }
1234
1235 int
vm_gla2gpa_nofault(struct vmctx * ctx,int vcpu,struct vm_guest_paging * paging,uint64_t gla,int prot,uint64_t * gpa,int * fault)1236 vm_gla2gpa_nofault(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
1237 uint64_t gla, int prot, uint64_t *gpa, int *fault)
1238 {
1239 struct vm_gla2gpa gg;
1240 int error;
1241
1242 bzero(&gg, sizeof(struct vm_gla2gpa));
1243 gg.vcpuid = vcpu;
1244 gg.prot = prot;
1245 gg.gla = gla;
1246 gg.paging = *paging;
1247
1248 error = ioctl(ctx->fd, VM_GLA2GPA_NOFAULT, &gg);
1249 if (error == 0) {
1250 *fault = gg.fault;
1251 *gpa = gg.gpa;
1252 }
1253 return (error);
1254 }
1255
1256 #ifndef min
1257 #define min(a,b) (((a) < (b)) ? (a) : (b))
1258 #endif
1259
1260 int
vm_copy_setup(struct vmctx * ctx,int vcpu,struct vm_guest_paging * paging,uint64_t gla,size_t len,int prot,struct iovec * iov,int iovcnt,int * fault)1261 vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
1262 uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt,
1263 int *fault)
1264 {
1265 void *va;
1266 uint64_t gpa;
1267 int error, i, n, off;
1268
1269 for (i = 0; i < iovcnt; i++) {
1270 iov[i].iov_base = 0;
1271 iov[i].iov_len = 0;
1272 }
1273
1274 while (len) {
1275 assert(iovcnt > 0);
1276 error = vm_gla2gpa(ctx, vcpu, paging, gla, prot, &gpa, fault);
1277 if (error || *fault)
1278 return (error);
1279
1280 off = gpa & PAGE_MASK;
1281 n = min(len, PAGE_SIZE - off);
1282
1283 va = vm_map_gpa(ctx, gpa, n);
1284 if (va == NULL)
1285 return (EFAULT);
1286
1287 iov->iov_base = va;
1288 iov->iov_len = n;
1289 iov++;
1290 iovcnt--;
1291
1292 gla += n;
1293 len -= n;
1294 }
1295 return (0);
1296 }
1297
1298 void
vm_copy_teardown(struct vmctx * ctx,int vcpu,struct iovec * iov,int iovcnt)1299 vm_copy_teardown(struct vmctx *ctx, int vcpu, struct iovec *iov, int iovcnt)
1300 {
1301
1302 return;
1303 }
1304
1305 void
vm_copyin(struct vmctx * ctx,int vcpu,struct iovec * iov,void * vp,size_t len)1306 vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len)
1307 {
1308 const char *src;
1309 char *dst;
1310 size_t n;
1311
1312 dst = vp;
1313 while (len) {
1314 assert(iov->iov_len);
1315 n = min(len, iov->iov_len);
1316 src = iov->iov_base;
1317 bcopy(src, dst, n);
1318
1319 iov++;
1320 dst += n;
1321 len -= n;
1322 }
1323 }
1324
1325 void
vm_copyout(struct vmctx * ctx,int vcpu,const void * vp,struct iovec * iov,size_t len)1326 vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov,
1327 size_t len)
1328 {
1329 const char *src;
1330 char *dst;
1331 size_t n;
1332
1333 src = vp;
1334 while (len) {
1335 assert(iov->iov_len);
1336 n = min(len, iov->iov_len);
1337 dst = iov->iov_base;
1338 bcopy(src, dst, n);
1339
1340 iov++;
1341 src += n;
1342 len -= n;
1343 }
1344 }
1345
1346 static int
vm_get_cpus(struct vmctx * ctx,int which,cpuset_t * cpus)1347 vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus)
1348 {
1349 struct vm_cpuset vm_cpuset;
1350 int error;
1351
1352 bzero(&vm_cpuset, sizeof(struct vm_cpuset));
1353 vm_cpuset.which = which;
1354 vm_cpuset.cpusetsize = sizeof(cpuset_t);
1355 vm_cpuset.cpus = cpus;
1356
1357 error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset);
1358 return (error);
1359 }
1360
1361 int
vm_active_cpus(struct vmctx * ctx,cpuset_t * cpus)1362 vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus)
1363 {
1364
1365 return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus));
1366 }
1367
1368 int
vm_suspended_cpus(struct vmctx * ctx,cpuset_t * cpus)1369 vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus)
1370 {
1371
1372 return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus));
1373 }
1374
1375 int
vm_debug_cpus(struct vmctx * ctx,cpuset_t * cpus)1376 vm_debug_cpus(struct vmctx *ctx, cpuset_t *cpus)
1377 {
1378
1379 return (vm_get_cpus(ctx, VM_DEBUG_CPUS, cpus));
1380 }
1381
1382 int
vm_activate_cpu(struct vmctx * ctx,int vcpu)1383 vm_activate_cpu(struct vmctx *ctx, int vcpu)
1384 {
1385 struct vm_activate_cpu ac;
1386 int error;
1387
1388 bzero(&ac, sizeof(struct vm_activate_cpu));
1389 ac.vcpuid = vcpu;
1390 error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac);
1391 return (error);
1392 }
1393
1394 int
vm_suspend_cpu(struct vmctx * ctx,int vcpu)1395 vm_suspend_cpu(struct vmctx *ctx, int vcpu)
1396 {
1397 struct vm_activate_cpu ac;
1398 int error;
1399
1400 bzero(&ac, sizeof(struct vm_activate_cpu));
1401 ac.vcpuid = vcpu;
1402 error = ioctl(ctx->fd, VM_SUSPEND_CPU, &ac);
1403 return (error);
1404 }
1405
1406 int
vm_resume_cpu(struct vmctx * ctx,int vcpu)1407 vm_resume_cpu(struct vmctx *ctx, int vcpu)
1408 {
1409 struct vm_activate_cpu ac;
1410 int error;
1411
1412 bzero(&ac, sizeof(struct vm_activate_cpu));
1413 ac.vcpuid = vcpu;
1414 error = ioctl(ctx->fd, VM_RESUME_CPU, &ac);
1415 return (error);
1416 }
1417
1418 int
vm_get_intinfo(struct vmctx * ctx,int vcpu,uint64_t * info1,uint64_t * info2)1419 vm_get_intinfo(struct vmctx *ctx, int vcpu, uint64_t *info1, uint64_t *info2)
1420 {
1421 struct vm_intinfo vmii;
1422 int error;
1423
1424 bzero(&vmii, sizeof(struct vm_intinfo));
1425 vmii.vcpuid = vcpu;
1426 error = ioctl(ctx->fd, VM_GET_INTINFO, &vmii);
1427 if (error == 0) {
1428 *info1 = vmii.info1;
1429 *info2 = vmii.info2;
1430 }
1431 return (error);
1432 }
1433
1434 int
vm_set_intinfo(struct vmctx * ctx,int vcpu,uint64_t info1)1435 vm_set_intinfo(struct vmctx *ctx, int vcpu, uint64_t info1)
1436 {
1437 struct vm_intinfo vmii;
1438 int error;
1439
1440 bzero(&vmii, sizeof(struct vm_intinfo));
1441 vmii.vcpuid = vcpu;
1442 vmii.info1 = info1;
1443 error = ioctl(ctx->fd, VM_SET_INTINFO, &vmii);
1444 return (error);
1445 }
1446
1447 int
vm_rtc_write(struct vmctx * ctx,int offset,uint8_t value)1448 vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value)
1449 {
1450 struct vm_rtc_data rtcdata;
1451 int error;
1452
1453 bzero(&rtcdata, sizeof(struct vm_rtc_data));
1454 rtcdata.offset = offset;
1455 rtcdata.value = value;
1456 error = ioctl(ctx->fd, VM_RTC_WRITE, &rtcdata);
1457 return (error);
1458 }
1459
1460 int
vm_rtc_read(struct vmctx * ctx,int offset,uint8_t * retval)1461 vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval)
1462 {
1463 struct vm_rtc_data rtcdata;
1464 int error;
1465
1466 bzero(&rtcdata, sizeof(struct vm_rtc_data));
1467 rtcdata.offset = offset;
1468 error = ioctl(ctx->fd, VM_RTC_READ, &rtcdata);
1469 if (error == 0)
1470 *retval = rtcdata.value;
1471 return (error);
1472 }
1473
1474 int
vm_rtc_settime(struct vmctx * ctx,time_t secs)1475 vm_rtc_settime(struct vmctx *ctx, time_t secs)
1476 {
1477 struct vm_rtc_time rtctime;
1478 int error;
1479
1480 bzero(&rtctime, sizeof(struct vm_rtc_time));
1481 rtctime.secs = secs;
1482 error = ioctl(ctx->fd, VM_RTC_SETTIME, &rtctime);
1483 return (error);
1484 }
1485
1486 int
vm_rtc_gettime(struct vmctx * ctx,time_t * secs)1487 vm_rtc_gettime(struct vmctx *ctx, time_t *secs)
1488 {
1489 struct vm_rtc_time rtctime;
1490 int error;
1491
1492 bzero(&rtctime, sizeof(struct vm_rtc_time));
1493 error = ioctl(ctx->fd, VM_RTC_GETTIME, &rtctime);
1494 if (error == 0)
1495 *secs = rtctime.secs;
1496 return (error);
1497 }
1498
1499 int
vm_restart_instruction(void * arg,int vcpu)1500 vm_restart_instruction(void *arg, int vcpu)
1501 {
1502 struct vmctx *ctx = arg;
1503
1504 return (ioctl(ctx->fd, VM_RESTART_INSTRUCTION, &vcpu));
1505 }
1506
1507 int
vm_set_topology(struct vmctx * ctx,uint16_t sockets,uint16_t cores,uint16_t threads,uint16_t maxcpus)1508 vm_set_topology(struct vmctx *ctx,
1509 uint16_t sockets, uint16_t cores, uint16_t threads, uint16_t maxcpus)
1510 {
1511 struct vm_cpu_topology topology;
1512
1513 bzero(&topology, sizeof (struct vm_cpu_topology));
1514 topology.sockets = sockets;
1515 topology.cores = cores;
1516 topology.threads = threads;
1517 topology.maxcpus = maxcpus;
1518 return (ioctl(ctx->fd, VM_SET_TOPOLOGY, &topology));
1519 }
1520
1521 int
vm_get_topology(struct vmctx * ctx,uint16_t * sockets,uint16_t * cores,uint16_t * threads,uint16_t * maxcpus)1522 vm_get_topology(struct vmctx *ctx,
1523 uint16_t *sockets, uint16_t *cores, uint16_t *threads, uint16_t *maxcpus)
1524 {
1525 struct vm_cpu_topology topology;
1526 int error;
1527
1528 bzero(&topology, sizeof (struct vm_cpu_topology));
1529 error = ioctl(ctx->fd, VM_GET_TOPOLOGY, &topology);
1530 if (error == 0) {
1531 *sockets = topology.sockets;
1532 *cores = topology.cores;
1533 *threads = topology.threads;
1534 *maxcpus = topology.maxcpus;
1535 }
1536 return (error);
1537 }
1538
1539 int
vm_get_device_fd(struct vmctx * ctx)1540 vm_get_device_fd(struct vmctx *ctx)
1541 {
1542
1543 return (ctx->fd);
1544 }
1545
1546 const cap_ioctl_t *
vm_get_ioctls(size_t * len)1547 vm_get_ioctls(size_t *len)
1548 {
1549 cap_ioctl_t *cmds;
1550 /* keep in sync with machine/vmm_dev.h */
1551 static const cap_ioctl_t vm_ioctl_cmds[] = { VM_RUN, VM_SUSPEND, VM_REINIT,
1552 VM_ALLOC_MEMSEG, VM_GET_MEMSEG, VM_MMAP_MEMSEG, VM_MMAP_MEMSEG,
1553 VM_MMAP_GETNEXT, VM_SET_REGISTER, VM_GET_REGISTER,
1554 VM_SET_SEGMENT_DESCRIPTOR, VM_GET_SEGMENT_DESCRIPTOR,
1555 VM_SET_REGISTER_SET, VM_GET_REGISTER_SET,
1556 VM_INJECT_EXCEPTION, VM_LAPIC_IRQ, VM_LAPIC_LOCAL_IRQ,
1557 VM_LAPIC_MSI, VM_IOAPIC_ASSERT_IRQ, VM_IOAPIC_DEASSERT_IRQ,
1558 VM_IOAPIC_PULSE_IRQ, VM_IOAPIC_PINCOUNT, VM_ISA_ASSERT_IRQ,
1559 VM_ISA_DEASSERT_IRQ, VM_ISA_PULSE_IRQ, VM_ISA_SET_IRQ_TRIGGER,
1560 VM_SET_CAPABILITY, VM_GET_CAPABILITY, VM_BIND_PPTDEV,
1561 VM_UNBIND_PPTDEV, VM_MAP_PPTDEV_MMIO, VM_PPTDEV_MSI,
1562 VM_PPTDEV_MSIX, VM_INJECT_NMI, VM_STATS, VM_STAT_DESC,
1563 VM_SET_X2APIC_STATE, VM_GET_X2APIC_STATE,
1564 VM_GET_HPET_CAPABILITIES, VM_GET_GPA_PMAP, VM_GLA2GPA,
1565 VM_GLA2GPA_NOFAULT,
1566 VM_ACTIVATE_CPU, VM_GET_CPUS, VM_SUSPEND_CPU, VM_RESUME_CPU,
1567 VM_SET_INTINFO, VM_GET_INTINFO,
1568 VM_RTC_WRITE, VM_RTC_READ, VM_RTC_SETTIME, VM_RTC_GETTIME,
1569 VM_RESTART_INSTRUCTION, VM_SET_TOPOLOGY, VM_GET_TOPOLOGY };
1570
1571 if (len == NULL) {
1572 cmds = malloc(sizeof(vm_ioctl_cmds));
1573 if (cmds == NULL)
1574 return (NULL);
1575 bcopy(vm_ioctl_cmds, cmds, sizeof(vm_ioctl_cmds));
1576 return (cmds);
1577 }
1578
1579 *len = nitems(vm_ioctl_cmds);
1580 return (NULL);
1581 }
1582