1//===-- SystemZ.td - Describe the SystemZ target machine -----*- tblgen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10//===----------------------------------------------------------------------===// 11// Target-independent interfaces which we are implementing 12//===----------------------------------------------------------------------===// 13 14include "llvm/Target/Target.td" 15 16//===----------------------------------------------------------------------===// 17// SystemZ subtarget features 18//===----------------------------------------------------------------------===// 19 20include "SystemZFeatures.td" 21 22//===----------------------------------------------------------------------===// 23// SystemZ subtarget scheduling models 24//===----------------------------------------------------------------------===// 25 26include "SystemZSchedule.td" 27 28//===----------------------------------------------------------------------===// 29// SystemZ supported processors 30//===----------------------------------------------------------------------===// 31 32include "SystemZProcessors.td" 33 34//===----------------------------------------------------------------------===// 35// Register file description 36//===----------------------------------------------------------------------===// 37 38include "SystemZRegisterInfo.td" 39 40//===----------------------------------------------------------------------===// 41// Calling convention description 42//===----------------------------------------------------------------------===// 43 44include "SystemZCallingConv.td" 45 46//===----------------------------------------------------------------------===// 47// Instruction descriptions 48//===----------------------------------------------------------------------===// 49 50include "SystemZOperators.td" 51include "SystemZOperands.td" 52include "SystemZPatterns.td" 53include "SystemZInstrFormats.td" 54include "SystemZInstrInfo.td" 55include "SystemZInstrVector.td" 56include "SystemZInstrFP.td" 57include "SystemZInstrHFP.td" 58include "SystemZInstrDFP.td" 59include "SystemZInstrSystem.td" 60 61def SystemZInstrInfo : InstrInfo { let guessInstructionProperties = 0; } 62 63//===----------------------------------------------------------------------===// 64// Assembly parser 65//===----------------------------------------------------------------------===// 66 67def SystemZAsmParser : AsmParser { 68 let ShouldEmitMatchRegisterName = 0; 69} 70 71//===----------------------------------------------------------------------===// 72// Top-level target declaration 73//===----------------------------------------------------------------------===// 74 75def SystemZ : Target { 76 let InstructionSet = SystemZInstrInfo; 77 let AssemblyParsers = [SystemZAsmParser]; 78 let AllowRegisterRenaming = 1; 79} 80