1 //===--------------------- Support.cpp --------------------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 ///
11 /// This file implements a few helper functions used by various pipeline
12 /// components.
13 ///
14 //===----------------------------------------------------------------------===//
15
16 #include "llvm/MCA/Support.h"
17 #include "llvm/MC/MCSchedule.h"
18
19 namespace llvm {
20 namespace mca {
21
22 #define DEBUG_TYPE "llvm-mca"
23
computeProcResourceMasks(const MCSchedModel & SM,MutableArrayRef<uint64_t> Masks)24 void computeProcResourceMasks(const MCSchedModel &SM,
25 MutableArrayRef<uint64_t> Masks) {
26 unsigned ProcResourceID = 0;
27
28 assert(Masks.size() == SM.getNumProcResourceKinds() &&
29 "Invalid number of elements");
30 // Resource at index 0 is the 'InvalidUnit'. Set an invalid mask for it.
31 Masks[0] = 0;
32
33 // Create a unique bitmask for every processor resource unit.
34 for (unsigned I = 1, E = SM.getNumProcResourceKinds(); I < E; ++I) {
35 const MCProcResourceDesc &Desc = *SM.getProcResource(I);
36 if (Desc.SubUnitsIdxBegin)
37 continue;
38 Masks[I] = 1ULL << ProcResourceID;
39 ProcResourceID++;
40 }
41
42 // Create a unique bitmask for every processor resource group.
43 for (unsigned I = 1, E = SM.getNumProcResourceKinds(); I < E; ++I) {
44 const MCProcResourceDesc &Desc = *SM.getProcResource(I);
45 if (!Desc.SubUnitsIdxBegin)
46 continue;
47 Masks[I] = 1ULL << ProcResourceID;
48 for (unsigned U = 0; U < Desc.NumUnits; ++U) {
49 uint64_t OtherMask = Masks[Desc.SubUnitsIdxBegin[U]];
50 Masks[I] |= OtherMask;
51 }
52 ProcResourceID++;
53 }
54
55 #ifndef NDEBUG
56 LLVM_DEBUG(dbgs() << "\nProcessor resource masks:"
57 << "\n");
58 for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
59 const MCProcResourceDesc &Desc = *SM.getProcResource(I);
60 LLVM_DEBUG(dbgs() << '[' << I << "] " << Desc.Name << " - " << Masks[I]
61 << '\n');
62 }
63 #endif
64 }
65
computeBlockRThroughput(const MCSchedModel & SM,unsigned DispatchWidth,unsigned NumMicroOps,ArrayRef<unsigned> ProcResourceUsage)66 double computeBlockRThroughput(const MCSchedModel &SM, unsigned DispatchWidth,
67 unsigned NumMicroOps,
68 ArrayRef<unsigned> ProcResourceUsage) {
69 // The block throughput is bounded from above by the hardware dispatch
70 // throughput. That is because the DispatchWidth is an upper bound on the
71 // number of opcodes that can be part of a single dispatch group.
72 double Max = static_cast<double>(NumMicroOps) / DispatchWidth;
73
74 // The block throughput is also limited by the amount of hardware parallelism.
75 // The number of available resource units affects the resource pressure
76 // distribution, as well as how many blocks can be executed every cycle.
77 for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
78 unsigned ResourceCycles = ProcResourceUsage[I];
79 if (!ResourceCycles)
80 continue;
81
82 const MCProcResourceDesc &MCDesc = *SM.getProcResource(I);
83 double Throughput = static_cast<double>(ResourceCycles) / MCDesc.NumUnits;
84 Max = std::max(Max, Throughput);
85 }
86
87 // The block reciprocal throughput is computed as the MAX of:
88 // - (NumMicroOps / DispatchWidth)
89 // - (NumUnits / ResourceCycles) for every consumed processor resource.
90 return Max;
91 }
92
93 } // namespace mca
94 } // namespace llvm
95